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-rw-r--r--Documentation/ABI/testing/sysfs-bus-usb25
-rw-r--r--Documentation/cgroups/cgroups.txt51
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/insignal-boards.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/samsung-boards.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/tegra.txt14
-rw-r--r--Documentation/devicetree/bindings/dma/arm-pl330.txt30
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-samsung.txt40
-rw-r--r--Documentation/devicetree/bindings/input/samsung-keypad.txt88
-rw-r--r--Documentation/devicetree/bindings/net/macb.txt25
-rw-r--r--Documentation/devicetree/bindings/nvec/nvec_nvidia.txt9
-rw-r--r--Documentation/devicetree/bindings/rtc/s3c-rtc.txt20
-rw-r--r--Documentation/devicetree/bindings/serial/omap_serial.txt10
-rw-r--r--Documentation/devicetree/bindings/serial/samsung_uart.txt14
-rw-r--r--Documentation/devicetree/bindings/usb/tegra-usb.txt13
-rw-r--r--Documentation/dontdiff1
-rw-r--r--Documentation/feature-removal-schedule.txt14
-rw-r--r--Documentation/kdump/kdump.txt35
-rw-r--r--Documentation/kernel-parameters.txt4
-rw-r--r--Documentation/s390/Debugging390.txt34
-rw-r--r--Documentation/serial/driver2
-rw-r--r--Documentation/usb/usbmon.txt14
-rw-r--r--MAINTAINERS70
-rw-r--r--arch/arm/Kconfig7
-rw-r--r--arch/arm/Kconfig.debug45
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts5
-rw-r--r--arch/arm/boot/dts/exynos4210-origen.dts137
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts182
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi397
-rw-r--r--arch/arm/boot/dts/highbank.dts12
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts17
-rw-r--r--arch/arm/boot/dts/imx51.dtsi20
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts18
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts17
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts18
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts19
-rw-r--r--arch/arm/boot/dts/imx53.dtsi34
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts (renamed from arch/arm/boot/dts/imx6q-sabreauto.dts)12
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts49
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi34
-rw-r--r--arch/arm/boot/dts/omap2.dtsi67
-rw-r--r--arch/arm/boot/dts/omap3.dtsi31
-rw-r--r--arch/arm/boot/dts/omap4.dtsi28
-rw-r--r--arch/arm/boot/dts/tegra-cardhu.dts36
-rw-r--r--arch/arm/boot/dts/tegra-harmony.dts29
-rw-r--r--arch/arm/boot/dts/tegra-paz00.dts77
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts74
-rw-r--r--arch/arm/boot/dts/tegra-trimslice.dts65
-rw-r--r--arch/arm/boot/dts/tegra-ventana.dts45
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi71
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi127
-rw-r--r--arch/arm/boot/dts/usb_a9g20.dts5
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/omap1_defconfig1
-rw-r--r--arch/arm/configs/pcontrol_g20_defconfig175
-rw-r--r--arch/arm/configs/tegra_defconfig9
-rw-r--r--arch/arm/mach-at91/Kconfig24
-rw-r--r--arch/arm/mach-at91/at91cap9.c40
-rw-r--r--arch/arm/mach-at91/at91cap9_devices.c49
-rw-r--r--arch/arm/mach-at91/at91rm9200.c24
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c48
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c8
-rw-r--r--arch/arm/mach-at91/at91sam9260.c36
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c55
-rw-r--r--arch/arm/mach-at91/at91sam9261.c32
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c33
-rw-r--r--arch/arm/mach-at91/at91sam9263.c45
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c59
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c38
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c44
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c69
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c36
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c43
-rw-r--r--arch/arm/mach-at91/board-1arm.c4
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c10
-rw-r--r--arch/arm/mach-at91/board-cam60.c8
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c21
-rw-r--r--arch/arm/mach-at91/board-carmeva.c9
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c14
-rw-r--r--arch/arm/mach-at91/board-cpuat91.c7
-rw-r--r--arch/arm/mach-at91/board-csb337.c7
-rw-r--r--arch/arm/mach-at91/board-csb637.c4
-rw-r--r--arch/arm/mach-at91/board-dt.c3
-rw-r--r--arch/arm/mach-at91/board-eb9200.c11
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c7
-rw-r--r--arch/arm/mach-at91/board-eco920.c7
-rw-r--r--arch/arm/mach-at91/board-flexibity.c5
-rw-r--r--arch/arm/mach-at91/board-foxg20.c9
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c7
-rw-r--r--arch/arm/mach-at91/board-kafa.c4
-rw-r--r--arch/arm/mach-at91/board-kb9202.c8
-rw-r--r--arch/arm/mach-at91/board-neocore926.c9
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c8
-rw-r--r--arch/arm/mach-at91/board-picotux200.c5
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c18
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c13
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c5
-rw-r--r--arch/arm/mach-at91/board-rsi-ews.c4
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c12
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c16
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c13
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c12
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c13
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c8
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c9
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c10
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c16
-rw-r--r--arch/arm/mach-at91/board-usb-a926x.c14
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c9
-rw-r--r--arch/arm/mach-at91/generic.h7
-rw-r--r--arch/arm/mach-at91/gpio.c85
-rw-r--r--arch/arm/mach-at91/include/mach/at91_aic.h48
-rw-r--r--arch/arm/mach-at91/include/mach/at91_dbgu.h2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pit.h8
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rtc.h24
-rw-r--r--arch/arm/mach-at91/include/mach/at91_shdwc.h16
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h27
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h14
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h23
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h20
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h33
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9_smc.h17
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h30
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h29
-rw-r--r--arch/arm/mach-at91/include/mach/at91x40.h1
-rw-r--r--arch/arm/mach-at91/include/mach/board.h42
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S10
-rw-r--r--arch/arm/mach-at91/include/mach/entry-macro.S11
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h336
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h12
-rw-r--r--arch/arm/mach-at91/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-at91/include/mach/timex.h65
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h6
-rw-r--r--arch/arm/mach-at91/irq.c38
-rw-r--r--arch/arm/mach-at91/pm.c11
-rw-r--r--arch/arm/mach-at91/sam9_smc.c62
-rw-r--r--arch/arm/mach-at91/sam9_smc.h3
-rw-r--r--arch/arm/mach-at91/setup.c26
-rw-r--r--arch/arm/mach-at91/soc.h1
-rw-r--r--arch/arm/mach-davinci/clock.c13
-rw-r--r--arch/arm/mach-davinci/clock.h10
-rw-r--r--arch/arm/mach-davinci/dm644x.c4
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h53
-rw-r--r--arch/arm/mach-dove/addr-map.c121
-rw-r--r--arch/arm/mach-dove/common.c16
-rw-r--r--arch/arm/mach-dove/common.h1
-rw-r--r--arch/arm/mach-dove/pcie.c4
-rw-r--r--arch/arm/mach-exynos/Kconfig36
-rw-r--r--arch/arm/mach-exynos/Makefile8
-rw-r--r--arch/arm/mach-exynos/clock.c302
-rw-r--r--arch/arm/mach-exynos/common.c53
-rw-r--r--arch/arm/mach-exynos/dev-ohci.c52
-rw-r--r--arch/arm/mach-exynos/dma.c229
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h11
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h8
-rw-r--r--arch/arm/mach-exynos/include/mach/ohci.h21
-rw-r--r--arch/arm/mach-exynos/include/mach/spi-clocks.h16
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c85
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c9
-rw-r--r--arch/arm/mach-exynos/mach-origen.c13
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c17
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c10
-rw-r--r--arch/arm/mach-exynos/pm.c24
-rw-r--r--arch/arm/mach-exynos/setup-sdhci.c22
-rw-r--r--arch/arm/mach-exynos/setup-spi.c72
-rw-r--r--arch/arm/mach-exynos/setup-usb-phy.c15
-rw-r--r--arch/arm/mach-imx/Kconfig2
-rw-r--r--arch/arm/mach-imx/Makefile6
-rw-r--r--arch/arm/mach-imx/Makefile.boot3
-rw-r--r--arch/arm/mach-imx/head-v7.S17
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c10
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c24
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c2
-rw-r--r--arch/arm/mach-imx/pm-imx6q.c2
-rw-r--r--arch/arm/mach-kirkwood/addr-map.c137
-rw-r--r--arch/arm/mach-kirkwood/common.c19
-rw-r--r--arch/arm/mach-kirkwood/common.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h1
-rw-r--r--arch/arm/mach-kirkwood/mpp.c1
-rw-r--r--arch/arm/mach-kirkwood/mpp.h1
-rw-r--r--arch/arm/mach-kirkwood/pcie.c4
-rw-r--r--arch/arm/mach-mmp/aspenite.c5
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c1
-rw-r--r--arch/arm/mach-mmp/brownstone.c1
-rw-r--r--arch/arm/mach-mmp/flint.c5
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h7
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h6
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h2
-rw-r--r--arch/arm/mach-mmp/mmp2.c39
-rw-r--r--arch/arm/mach-mmp/pxa168.c40
-rw-r--r--arch/arm/mach-mmp/pxa910.c40
-rw-r--r--arch/arm/mach-mmp/tavorevb.c6
-rw-r--r--arch/arm/mach-mmp/teton_bga.c3
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c8
-rw-r--r--arch/arm/mach-msm/Kconfig35
-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S51
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x00.h12
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x30.h12
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x50.h12
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h12
-rw-r--r--arch/arm/mach-msm/include/mach/uncompress.h39
-rw-r--r--arch/arm/mach-msm/io.c15
-rw-r--r--arch/arm/mach-msm/platsmp.c2
-rw-r--r--arch/arm/mach-msm/timer.c347
-rw-r--r--arch/arm/mach-mv78xx0/addr-map.c102
-rw-r--r--arch/arm/mach-mv78xx0/common.c22
-rw-r--r--arch/arm/mach-mv78xx0/common.h1
-rw-r--r--arch/arm/mach-mv78xx0/mpp.c1
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c4
-rw-r--r--arch/arm/mach-mx5/mm.c19
-rw-r--r--arch/arm/mach-mx5/system.c3
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c10
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c48
-rw-r--r--arch/arm/mach-mxs/clock.c33
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h3
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-saif.c5
-rw-r--r--arch/arm/mach-mxs/include/mach/common.h1
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h4
-rw-r--r--arch/arm/mach-mxs/include/mach/digctl.h21
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c20
-rw-r--r--arch/arm/mach-mxs/system.c2
-rw-r--r--arch/arm/mach-mxs/timer.c2
-rw-r--r--arch/arm/mach-omap1/Kconfig64
-rw-r--r--arch/arm/mach-omap1/clock.c14
-rw-r--r--arch/arm/mach-omap1/clock.h3
-rw-r--r--arch/arm/mach-omap1/clock_data.c19
-rw-r--r--arch/arm/mach-omap1/opp.h1
-rw-r--r--arch/arm/mach-omap1/opp_data.c63
-rw-r--r--arch/arm/mach-omap2/Kconfig37
-rw-r--r--arch/arm/mach-omap2/Makefile20
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c100
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c75
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c22
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c82
-rw-r--r--arch/arm/mach-omap2/board-generic.c1
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c8
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c68
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c46
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c43
-rw-r--r--arch/arm/mach-omap2/clock.c2
-rw-r--r--arch/arm/mach-omap2/clock.h2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c43
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c19
-rw-r--r--arch/arm/mach-omap2/common.c48
-rw-r--r--arch/arm/mach-omap2/common.h87
-rw-r--r--arch/arm/mach-omap2/control.h8
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c21
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c245
-rw-r--r--arch/arm/mach-omap2/devices.c22
-rw-r--r--arch/arm/mach-omap2/hsmmc.c59
-rw-r--r--arch/arm/mach-omap2/hsmmc.h1
-rw-r--r--arch/arm/mach-omap2/id.c52
-rw-r--r--arch/arm/mach-omap2/include/mach/barriers.h31
-rw-r--r--arch/arm/mach-omap2/include/mach/debug-macro.S12
-rw-r--r--arch/arm/mach-omap2/include/mach/omap-secure.h57
-rw-r--r--arch/arm/mach-omap2/include/mach/omap-wakeupgen.h39
-rw-r--r--arch/arm/mach-omap2/io.c47
-rw-r--r--arch/arm/mach-omap2/irq.c2
-rw-r--r--arch/arm/mach-omap2/mux.c89
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S5
-rw-r--r--arch/arm/mach-omap2/omap-hotplug.c14
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c398
-rw-r--r--arch/arm/mach-omap2/omap-secure.c81
-rw-r--r--arch/arm/mach-omap2/omap-smc.S (renamed from arch/arm/mach-omap2/omap44xx-smc.S)23
-rw-r--r--arch/arm/mach-omap2/omap-smp.c45
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c389
-rw-r--r--arch/arm/mach-omap2/omap4-common.c94
-rw-r--r--arch/arm/mach-omap2/omap4-sar-layout.h50
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c223
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c388
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c217
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c35
-rw-r--r--arch/arm/mach-omap2/opp2xxx.h2
-rw-r--r--arch/arm/mach-omap2/pm.h1
-rw-r--r--arch/arm/mach-omap2/pm24xx.c20
-rw-r--r--arch/arm/mach-omap2/pm34xx.c158
-rw-r--r--arch/arm/mach-omap2/pm44xx.c153
-rw-r--r--arch/arm/mach-omap2/prcm-common.h77
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c97
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.h9
-rw-r--r--arch/arm/mach-omap2/prm44xx.c116
-rw-r--r--arch/arm/mach-omap2/prm44xx.h8
-rw-r--r--arch/arm/mach-omap2/prm_common.c320
-rw-r--r--arch/arm/mach-omap2/sdram-nokia.c25
-rw-r--r--arch/arm/mach-omap2/serial.c907
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S379
-rw-r--r--arch/arm/mach-omap2/usb-host.c100
-rw-r--r--arch/arm/mach-omap2/usb-musb.c3
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c40
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-rw-r--r--drivers/tty/tty_io.c309
-rw-r--r--drivers/tty/tty_ldisc.c22
-rw-r--r--drivers/tty/vt/consolemap.c2
-rw-r--r--drivers/usb/Kconfig1
-rw-r--r--drivers/usb/Makefile3
-rw-r--r--drivers/usb/c67x00/c67x00-drv.c15
-rw-r--r--drivers/usb/c67x00/c67x00-hcd.c1
-rw-r--r--drivers/usb/class/cdc-acm.c338
-rw-r--r--drivers/usb/class/cdc-acm.h1
-rw-r--r--drivers/usb/core/devio.c189
-rw-r--r--drivers/usb/core/driver.c36
-rw-r--r--drivers/usb/core/hcd-pci.c4
-rw-r--r--drivers/usb/core/hcd.c31
-rw-r--r--drivers/usb/core/hub.c89
-rw-r--r--drivers/usb/core/quirks.c5
-rw-r--r--drivers/usb/core/usb.h14
-rw-r--r--drivers/usb/dwc3/Kconfig5
-rw-r--r--drivers/usb/dwc3/Makefile6
-rw-r--r--drivers/usb/dwc3/core.c209
-rw-r--r--drivers/usb/dwc3/core.h62
-rw-r--r--drivers/usb/dwc3/debugfs.c83
-rw-r--r--drivers/usb/dwc3/dwc3-omap.c43
-rw-r--r--drivers/usb/dwc3/dwc3-pci.c51
-rw-r--r--drivers/usb/dwc3/ep0.c160
-rw-r--r--drivers/usb/dwc3/gadget.c440
-rw-r--r--drivers/usb/dwc3/gadget.h29
-rw-r--r--drivers/usb/dwc3/host.c102
-rw-r--r--drivers/usb/dwc3/io.h2
-rw-r--r--drivers/usb/gadget/Kconfig28
-rw-r--r--drivers/usb/gadget/Makefile2
-rw-r--r--drivers/usb/gadget/amd5536udc.c4
-rw-r--r--drivers/usb/gadget/at91_udc.c16
-rw-r--r--drivers/usb/gadget/atmel_usba_udc.c2
-rw-r--r--drivers/usb/gadget/ci13xxx_udc.c36
-rw-r--r--drivers/usb/gadget/ci13xxx_udc.h2
-rw-r--r--drivers/usb/gadget/composite.c8
-rw-r--r--drivers/usb/gadget/dbgp.c2
-rw-r--r--drivers/usb/gadget/dummy_hcd.c15
-rw-r--r--drivers/usb/gadget/epautoconf.c6
-rw-r--r--drivers/usb/gadget/f_fs.c2
-rw-r--r--drivers/usb/gadget/f_mass_storage.c60
-rw-r--r--drivers/usb/gadget/file_storage.c64
-rw-r--r--drivers/usb/gadget/fsl_qe_udc.c19
-rw-r--r--drivers/usb/gadget/fsl_udc_core.c4
-rw-r--r--drivers/usb/gadget/fusb300_udc.c4
-rw-r--r--drivers/usb/gadget/goku_udc.c3
-rw-r--r--drivers/usb/gadget/imx_udc.c2
-rw-r--r--drivers/usb/gadget/inode.c6
-rw-r--r--drivers/usb/gadget/langwell_udc.c2
-rw-r--r--drivers/usb/gadget/m66592-udc.c4
-rw-r--r--drivers/usb/gadget/mv_udc.h7
-rw-r--r--drivers/usb/gadget/mv_udc_core.c344
-rw-r--r--drivers/usb/gadget/net2272.c4
-rw-r--r--drivers/usb/gadget/net2280.c4
-rw-r--r--drivers/usb/gadget/omap_udc.c3
-rw-r--r--drivers/usb/gadget/pch_udc.c4
-rw-r--r--drivers/usb/gadget/printer.c6
-rw-r--r--drivers/usb/gadget/pxa25x_udc.c2
-rw-r--r--drivers/usb/gadget/pxa27x_udc.c2
-rw-r--r--drivers/usb/gadget/r8a66597-udc.c4
-rw-r--r--drivers/usb/gadget/s3c-hsotg.c17
-rw-r--r--drivers/usb/gadget/s3c-hsudc.c136
-rw-r--r--drivers/usb/gadget/s3c2410_udc.c4
-rw-r--r--drivers/usb/gadget/udc-core.c26
-rw-r--r--drivers/usb/gadget/usbstring.c73
-rw-r--r--drivers/usb/host/Kconfig15
-rw-r--r--drivers/usb/host/ehci-au1xxx.c1
-rw-r--r--drivers/usb/host/ehci-hcd.c69
-rw-r--r--drivers/usb/host/ehci-mv.c391
-rw-r--r--drivers/usb/host/ehci-octeon.c2
-rw-r--r--drivers/usb/host/ehci-omap.c19
-rw-r--r--drivers/usb/host/ehci-orion.c10
-rw-r--r--drivers/usb/host/ehci-ps3.c30
-rw-r--r--drivers/usb/host/ehci-pxa168.c2
-rw-r--r--drivers/usb/host/ehci-q.c13
-rw-r--r--drivers/usb/host/ehci-s5p.c4
-rw-r--r--drivers/usb/host/ehci-tegra.c71
-rw-r--r--drivers/usb/host/ehci-vt8500.c2
-rw-r--r--drivers/usb/host/ehci-w90x900.c2
-rw-r--r--drivers/usb/host/ehci-xls.c2
-rw-r--r--drivers/usb/host/fhci-hcd.c12
-rw-r--r--drivers/usb/host/fsl-mph-dr-of.c12
-rw-r--r--drivers/usb/host/hwa-hc.c1
-rw-r--r--drivers/usb/host/imx21-hcd.c13
-rw-r--r--drivers/usb/host/isp1760-hcd.c74
-rw-r--r--drivers/usb/host/isp1760-if.c19
-rw-r--r--drivers/usb/host/ohci-at91.c12
-rw-r--r--drivers/usb/host/ohci-au1xxx.c5
-rw-r--r--drivers/usb/host/ohci-dbg.c18
-rw-r--r--drivers/usb/host/ohci-ep93xx.c2
-rw-r--r--drivers/usb/host/ohci-exynos.c274
-rw-r--r--drivers/usb/host/ohci-hcd.c33
-rw-r--r--drivers/usb/host/ohci-hub.c7
-rw-r--r--drivers/usb/host/ohci-omap.c1
-rw-r--r--drivers/usb/host/ohci-omap3.c18
-rw-r--r--drivers/usb/host/ohci-pci.c5
-rw-r--r--drivers/usb/host/ohci-pxa27x.c2
-rw-r--r--drivers/usb/host/ohci-q.c8
-rw-r--r--drivers/usb/host/ohci-s3c2410.c55
-rw-r--r--drivers/usb/host/ohci-sh.c1
-rw-r--r--drivers/usb/host/ohci-sm501.c1
-rw-r--r--drivers/usb/host/ohci-spear.c1
-rw-r--r--drivers/usb/host/ohci-tmio.c3
-rw-r--r--drivers/usb/host/ohci-xls.c2
-rw-r--r--drivers/usb/host/ohci.h14
-rw-r--r--drivers/usb/host/oxu210hp-hcd.c19
-rw-r--r--drivers/usb/host/uhci-q.c2
-rw-r--r--drivers/usb/host/whci/qset.c4
-rw-r--r--drivers/usb/host/xhci-hub.c18
-rw-r--r--drivers/usb/host/xhci-mem.c14
-rw-r--r--drivers/usb/host/xhci-ring.c113
-rw-r--r--drivers/usb/host/xhci.c31
-rw-r--r--drivers/usb/host/xhci.h3
-rw-r--r--drivers/usb/misc/isight_firmware.c6
-rw-r--r--drivers/usb/misc/usbtest.c1
-rw-r--r--drivers/usb/musb/Kconfig61
-rw-r--r--drivers/usb/musb/Makefile26
-rw-r--r--drivers/usb/musb/musb_core.c8
-rw-r--r--drivers/usb/musb/musb_core.h4
-rw-r--r--drivers/usb/musb/musb_debug.h4
-rw-r--r--drivers/usb/musb/musb_debugfs.c8
-rw-r--r--drivers/usb/musb/musb_gadget.c6
-rw-r--r--drivers/usb/musb/musb_gadget_ep0.c1
-rw-r--r--drivers/usb/musb/musb_io.h2
-rw-r--r--drivers/usb/musb/omap2430.c61
-rw-r--r--drivers/usb/musb/tusb6010.c1
-rw-r--r--drivers/usb/musb/ux500_dma.c39
-rw-r--r--drivers/usb/otg/Kconfig32
-rw-r--r--drivers/usb/otg/Makefile1
-rw-r--r--drivers/usb/otg/fsl_otg.c13
-rw-r--r--drivers/usb/otg/mv_otg.c957
-rw-r--r--drivers/usb/otg/mv_otg.h165
-rw-r--r--drivers/usb/renesas_usbhs/common.c52
-rw-r--r--drivers/usb/renesas_usbhs/common.h9
-rw-r--r--drivers/usb/renesas_usbhs/fifo.c9
-rw-r--r--drivers/usb/renesas_usbhs/fifo.h3
-rw-r--r--drivers/usb/renesas_usbhs/mod.c4
-rw-r--r--drivers/usb/renesas_usbhs/mod_gadget.c195
-rw-r--r--drivers/usb/renesas_usbhs/mod_host.c952
-rw-r--r--drivers/usb/renesas_usbhs/pipe.c31
-rw-r--r--drivers/usb/renesas_usbhs/pipe.h1
-rw-r--r--drivers/usb/serial/ChangeLog.history730
-rw-r--r--drivers/usb/serial/belkin_sa.c43
-rw-r--r--drivers/usb/serial/ch341.c3
-rw-r--r--drivers/usb/serial/cp210x.c59
-rw-r--r--drivers/usb/serial/cyberjack.c33
-rw-r--r--drivers/usb/serial/cypress_m8.c29
-rw-r--r--drivers/usb/serial/digi_acceleport.c227
-rw-r--r--drivers/usb/serial/ftdi_sio.c4
-rw-r--r--drivers/usb/serial/garmin_gps.c9
-rw-r--r--drivers/usb/serial/generic.c83
-rw-r--r--drivers/usb/serial/io_edgeport.c3
-rw-r--r--drivers/usb/serial/io_ti.c28
-rw-r--r--drivers/usb/serial/ipaq.c34
-rw-r--r--drivers/usb/serial/ir-usb.c32
-rw-r--r--drivers/usb/serial/iuu_phoenix.c3
-rw-r--r--drivers/usb/serial/keyspan.c90
-rw-r--r--drivers/usb/serial/keyspan_pda.c66
-rw-r--r--drivers/usb/serial/kobil_sct.c25
-rw-r--r--drivers/usb/serial/mct_u232.c46
-rw-r--r--drivers/usb/serial/mos7720.c18
-rw-r--r--drivers/usb/serial/mos7840.c4
-rw-r--r--drivers/usb/serial/omninet.c51
-rw-r--r--drivers/usb/serial/opticon.c1
-rw-r--r--drivers/usb/serial/option.c5
-rw-r--r--drivers/usb/serial/oti6858.c23
-rw-r--r--drivers/usb/serial/pl2303.c17
-rw-r--r--drivers/usb/serial/sierra.c1
-rw-r--r--drivers/usb/serial/symbolserial.c1
-rw-r--r--drivers/usb/serial/ti_usb_3410_5052.c13
-rw-r--r--drivers/usb/serial/usb-serial.c98
-rw-r--r--drivers/usb/serial/usb_debug.c13
-rw-r--r--drivers/usb/serial/whiteheat.c58
-rw-r--r--drivers/usb/storage/alauda.c2
-rw-r--r--drivers/usb/storage/cypress_atacb.c2
-rw-r--r--drivers/usb/storage/datafab.c2
-rw-r--r--drivers/usb/storage/ene_ub6250.c12
-rw-r--r--drivers/usb/storage/freecom.c2
-rw-r--r--drivers/usb/storage/isd200.c2
-rw-r--r--drivers/usb/storage/jumpshot.c2
-rw-r--r--drivers/usb/storage/karma.c2
-rw-r--r--drivers/usb/storage/onetouch.c2
-rw-r--r--drivers/usb/storage/realtek_cr.c14
-rw-r--r--drivers/usb/storage/sddr09.c2
-rw-r--r--drivers/usb/storage/sddr55.c2
-rw-r--r--drivers/usb/storage/shuttle_usbat.c2
-rw-r--r--drivers/usb/storage/usb.c1
-rw-r--r--drivers/usb/usb-skeleton.c40
-rw-r--r--drivers/usb/wusbcore/Kconfig1
-rw-r--r--drivers/usb/wusbcore/security.c2
-rw-r--r--drivers/uwb/est.c2
-rw-r--r--drivers/video/mxsfb.c8
-rw-r--r--drivers/video/omap2/omapfb/Kconfig2
-rw-r--r--drivers/watchdog/at91sam9_wdt.c22
-rw-r--r--drivers/watchdog/at91sam9_wdt.h6
-rw-r--r--fs/Kconfig2
-rw-r--r--fs/char_dev.c6
-rw-r--r--fs/exofs/Kconfig11
-rw-r--r--fs/exofs/Kconfig.ore12
-rw-r--r--fs/exofs/ore.c8
-rw-r--r--fs/exofs/ore_raid.c78
-rw-r--r--fs/ext2/ialloc.c7
-rw-r--r--fs/ext2/inode.c5
-rw-r--r--fs/ext2/super.c3
-rw-r--r--fs/ext2/xattr.c1
-rw-r--r--fs/ext2/xattr_security.c1
-rw-r--r--fs/ext2/xattr_trusted.c1
-rw-r--r--fs/ext2/xattr_user.c1
-rw-r--r--fs/ext3/ialloc.c8
-rw-r--r--fs/ext3/inode.c43
-rw-r--r--fs/ext3/ioctl.c6
-rw-r--r--fs/ext3/namei.c9
-rw-r--r--fs/ext3/super.c15
-rw-r--r--fs/ext3/xattr_security.c1
-rw-r--r--fs/ext3/xattr_trusted.c1
-rw-r--r--fs/ext3/xattr_user.c1
-rw-r--r--fs/ext4/block_validity.c1
-rw-r--r--fs/ext4/extents.c1
-rw-r--r--fs/ext4/indirect.c1
-rw-r--r--fs/ext4/inode.c1
-rw-r--r--fs/ext4/ioctl.c6
-rw-r--r--fs/ext4/migrate.c1
-rw-r--r--fs/ext4/page-io.c1
-rw-r--r--fs/ext4/xattr_security.c1
-rw-r--r--fs/ext4/xattr_trusted.c1
-rw-r--r--fs/ext4/xattr_user.c1
-rw-r--r--fs/fat/namei_vfat.c3
-rw-r--r--fs/jbd/commit.c6
-rw-r--r--fs/jbd/journal.c1
-rw-r--r--fs/jbd/revoke.c34
-rw-r--r--fs/jbd/transaction.c38
-rw-r--r--fs/nls/nls_base.c73
-rw-r--r--fs/reiserfs/super.c27
-rw-r--r--fs/udf/file.c6
-rw-r--r--fs/udf/inode.c57
-rw-r--r--fs/udf/super.c6
-rw-r--r--fs/udf/symlink.c14
-rw-r--r--fs/xfs/xfs_discard.c4
-rw-r--r--include/linux/amba/pl330.h15
-rw-r--r--include/linux/ata_platform.h3
-rw-r--r--include/linux/cgroup.h31
-rw-r--r--include/linux/clk.h22
-rw-r--r--include/linux/gpio-pxa.h16
-rw-r--r--include/linux/hyperv.h2
-rw-r--r--include/linux/init_task.h9
-rw-r--r--include/linux/jbd.h5
-rw-r--r--include/linux/mbus.h13
-rw-r--r--include/linux/memcontrol.h2
-rw-r--r--include/linux/netdevice.h9
-rw-r--r--include/linux/netfilter/x_tables.h4
-rw-r--r--include/linux/nls.h5
-rw-r--r--include/linux/percpu.h190
-rw-r--r--include/linux/platform_data/macb.h17
-rw-r--r--include/linux/platform_data/mv_usb.h18
-rw-r--r--include/linux/platform_data/s3c-hsudc.h34
-rw-r--r--include/linux/sched.h73
-rw-r--r--include/linux/serial_8250.h5
-rw-r--r--include/linux/serial_core.h100
-rw-r--r--include/linux/slab_def.h2
-rw-r--r--include/linux/usb.h14
-rw-r--r--include/linux/usb/ch11.h31
-rw-r--r--include/linux/usb/ch9.h20
-rw-r--r--include/linux/usb/gadget.h26
-rw-r--r--include/linux/usb/hcd.h2
-rw-r--r--include/linux/usb/renesas_usbhs.h10
-rw-r--r--include/linux/usb/serial.h11
-rw-r--r--include/media/davinci/vpif_types.h71
-rw-r--r--include/net/snmp.h14
-rw-r--r--include/sound/saif.h4
-rw-r--r--kernel/audit.c5
-rw-r--r--kernel/cgroup.c401
-rw-r--r--kernel/cgroup_freezer.c16
-rw-r--r--kernel/cpuset.c105
-rw-r--r--kernel/events/core.c13
-rw-r--r--kernel/fork.c8
-rw-r--r--kernel/res_counter.c3
-rw-r--r--kernel/sched/core.c31
-rw-r--r--kernel/signal.c10
-rw-r--r--mm/memcontrol.c35
-rw-r--r--mm/slab.c2
-rw-r--r--mm/slub.c6
-rw-r--r--net/caif/caif_dev.c4
-rw-r--r--net/caif/cffrml.c4
-rw-r--r--net/core/dev_addr_lists.c16
-rw-r--r--net/core/pktgen.c4
-rw-r--r--net/core/sock.c9
-rw-r--r--net/ipv4/Kconfig6
-rw-r--r--net/ipv4/igmp.c2
-rw-r--r--net/unix/Kconfig2
-rw-r--r--security/device_cgroup.c7
-rw-r--r--sound/soc/kirkwood/kirkwood-dma.c15
-rw-r--r--sound/soc/mxs/mxs-saif.c24
1478 files changed, 50893 insertions, 53578 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb
index e647378e9e88..b4f548792e32 100644
--- a/Documentation/ABI/testing/sysfs-bus-usb
+++ b/Documentation/ABI/testing/sysfs-bus-usb
@@ -119,6 +119,31 @@ Description:
119 Write a 1 to force the device to disconnect 119 Write a 1 to force the device to disconnect
120 (equivalent to unplugging a wired USB device). 120 (equivalent to unplugging a wired USB device).
121 121
122What: /sys/bus/usb/drivers/.../new_id
123Date: October 2011
124Contact: linux-usb@vger.kernel.org
125Description:
126 Writing a device ID to this file will attempt to
127 dynamically add a new device ID to a USB device driver.
128 This may allow the driver to support more hardware than
129 was included in the driver's static device ID support
130 table at compile time. The format for the device ID is:
131 idVendor idProduct bInterfaceClass.
132 The vendor ID and device ID fields are required, the
133 interface class is optional.
134 Upon successfully adding an ID, the driver will probe
135 for the device and attempt to bind to it. For example:
136 # echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id
137
138What: /sys/bus/usb-serial/drivers/.../new_id
139Date: October 2011
140Contact: linux-usb@vger.kernel.org
141Description:
142 For serial USB drivers, this attribute appears under the
143 extra bus folder "usb-serial" in sysfs; apart from that
144 difference, all descriptions from the entry
145 "/sys/bus/usb/drivers/.../new_id" apply.
146
122What: /sys/bus/usb/drivers/.../remove_id 147What: /sys/bus/usb/drivers/.../remove_id
123Date: November 2009 148Date: November 2009
124Contact: CHENG Renquan <rqcheng@smu.edu.sg> 149Contact: CHENG Renquan <rqcheng@smu.edu.sg>
diff --git a/Documentation/cgroups/cgroups.txt b/Documentation/cgroups/cgroups.txt
index 9c452ef2328c..a7c96ae5557c 100644
--- a/Documentation/cgroups/cgroups.txt
+++ b/Documentation/cgroups/cgroups.txt
@@ -594,53 +594,44 @@ rmdir() will fail with it. From this behavior, pre_destroy() can be
594called multiple times against a cgroup. 594called multiple times against a cgroup.
595 595
596int can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp, 596int can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
597 struct task_struct *task) 597 struct cgroup_taskset *tset)
598(cgroup_mutex held by caller) 598(cgroup_mutex held by caller)
599 599
600Called prior to moving a task into a cgroup; if the subsystem 600Called prior to moving one or more tasks into a cgroup; if the
601returns an error, this will abort the attach operation. If a NULL 601subsystem returns an error, this will abort the attach operation.
602task is passed, then a successful result indicates that *any* 602@tset contains the tasks to be attached and is guaranteed to have at
603unspecified task can be moved into the cgroup. Note that this isn't 603least one task in it.
604called on a fork. If this method returns 0 (success) then this should 604
605remain valid while the caller holds cgroup_mutex and it is ensured that either 605If there are multiple tasks in the taskset, then:
606 - it's guaranteed that all are from the same thread group
607 - @tset contains all tasks from the thread group whether or not
608 they're switching cgroups
609 - the first task is the leader
610
611Each @tset entry also contains the task's old cgroup and tasks which
612aren't switching cgroup can be skipped easily using the
613cgroup_taskset_for_each() iterator. Note that this isn't called on a
614fork. If this method returns 0 (success) then this should remain valid
615while the caller holds cgroup_mutex and it is ensured that either
606attach() or cancel_attach() will be called in future. 616attach() or cancel_attach() will be called in future.
607 617
608int can_attach_task(struct cgroup *cgrp, struct task_struct *tsk);
609(cgroup_mutex held by caller)
610
611As can_attach, but for operations that must be run once per task to be
612attached (possibly many when using cgroup_attach_proc). Called after
613can_attach.
614
615void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp, 618void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
616 struct task_struct *task, bool threadgroup) 619 struct cgroup_taskset *tset)
617(cgroup_mutex held by caller) 620(cgroup_mutex held by caller)
618 621
619Called when a task attach operation has failed after can_attach() has succeeded. 622Called when a task attach operation has failed after can_attach() has succeeded.
620A subsystem whose can_attach() has some side-effects should provide this 623A subsystem whose can_attach() has some side-effects should provide this
621function, so that the subsystem can implement a rollback. If not, not necessary. 624function, so that the subsystem can implement a rollback. If not, not necessary.
622This will be called only about subsystems whose can_attach() operation have 625This will be called only about subsystems whose can_attach() operation have
623succeeded. 626succeeded. The parameters are identical to can_attach().
624
625void pre_attach(struct cgroup *cgrp);
626(cgroup_mutex held by caller)
627
628For any non-per-thread attachment work that needs to happen before
629attach_task. Needed by cpuset.
630 627
631void attach(struct cgroup_subsys *ss, struct cgroup *cgrp, 628void attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
632 struct cgroup *old_cgrp, struct task_struct *task) 629 struct cgroup_taskset *tset)
633(cgroup_mutex held by caller) 630(cgroup_mutex held by caller)
634 631
635Called after the task has been attached to the cgroup, to allow any 632Called after the task has been attached to the cgroup, to allow any
636post-attachment activity that requires memory allocations or blocking. 633post-attachment activity that requires memory allocations or blocking.
637 634The parameters are identical to can_attach().
638void attach_task(struct cgroup *cgrp, struct task_struct *tsk);
639(cgroup_mutex held by caller)
640
641As attach, but for operations that must be run once per task to be attached,
642like can_attach_task. Called before attach. Currently does not support any
643subsystem that might need the old_cgrp for every thread in the group.
644 635
645void fork(struct cgroup_subsy *ss, struct task_struct *task) 636void fork(struct cgroup_subsy *ss, struct task_struct *task)
646 637
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index c9848ad0e2e3..54bdddadf1cf 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -21,6 +21,10 @@ i.MX53 Smart Mobile Reference Design Board
21Required root node properties: 21Required root node properties:
22 - compatible = "fsl,imx53-smd", "fsl,imx53"; 22 - compatible = "fsl,imx53-smd", "fsl,imx53";
23 23
24i.MX6 Quad SABRE Automotive Board 24i.MX6 Quad Armadillo2 Board
25Required root node properties: 25Required root node properties:
26 - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; 26 - compatible = "fsl,imx6q-arm2", "fsl,imx6q";
27
28i.MX6 Quad SABRE Lite Board
29Required root node properties:
30 - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
diff --git a/Documentation/devicetree/bindings/arm/insignal-boards.txt b/Documentation/devicetree/bindings/arm/insignal-boards.txt
new file mode 100644
index 000000000000..524c3dc5d808
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/insignal-boards.txt
@@ -0,0 +1,8 @@
1* Insignal's Exynos4210 based Origen evaluation board
2
3Origen low-cost evaluation board is based on Samsung's Exynos4210 SoC.
4
5Required root node properties:
6 - compatible = should be one or more of the following.
7 (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
8 (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung-boards.txt
new file mode 100644
index 000000000000..0bf68be56fd1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt
@@ -0,0 +1,8 @@
1* Samsung's Exynos4210 based SMDKV310 evaluation board
2
3SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC.
4
5Required root node properties:
6 - compatible = should be one or more of the following.
7 (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
8 (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt
new file mode 100644
index 000000000000..6e69d2e5e766
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra.txt
@@ -0,0 +1,14 @@
1NVIDIA Tegra device tree bindings
2-------------------------------------------
3
4Boards with the tegra20 SoC shall have the following properties:
5
6Required root node property:
7
8compatible = "nvidia,tegra20";
9
10Boards with the tegra30 SoC shall have the following properties:
11
12Required root node property:
13
14compatible = "nvidia,tegra30";
diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt b/Documentation/devicetree/bindings/dma/arm-pl330.txt
new file mode 100644
index 000000000000..a4cd273b2a67
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt
@@ -0,0 +1,30 @@
1* ARM PrimeCell PL330 DMA Controller
2
3The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
4between memory and peripherals or memory to memory.
5
6Required properties:
7 - compatible: should include both "arm,pl330" and "arm,primecell".
8 - reg: physical base address of the controller and length of memory mapped
9 region.
10 - interrupts: interrupt number to the cpu.
11
12Example:
13
14 pdma0: pdma@12680000 {
15 compatible = "arm,pl330", "arm,primecell";
16 reg = <0x12680000 0x1000>;
17 interrupts = <99>;
18 };
19
20Client drivers (device nodes requiring dma transfers from dev-to-mem or
21mem-to-dev) should specify the DMA channel numbers using a two-value pair
22as shown below.
23
24 [property name] = <[phandle of the dma controller] [dma request id]>;
25
26 where 'dma request id' is the dma request number which is connected
27 to the client controller. The 'property name' is recommended to be
28 of the form <name>-dma-channel.
29
30 Example: tx-dma-channel = <&pdma0 12>;
diff --git a/Documentation/devicetree/bindings/gpio/gpio-samsung.txt b/Documentation/devicetree/bindings/gpio/gpio-samsung.txt
new file mode 100644
index 000000000000..8f50fe5e6c42
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-samsung.txt
@@ -0,0 +1,40 @@
1Samsung Exynos4 GPIO Controller
2
3Required properties:
4- compatible: Compatible property value should be "samsung,exynos4-gpio>".
5
6- reg: Physical base address of the controller and length of memory mapped
7 region.
8
9- #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
10 should be the following with values derived from the SoC user manual.
11 <[phandle of the gpio controller node]
12 [pin number within the gpio controller]
13 [mux function]
14 [pull up/down]
15 [drive strength]>
16
17 Values for gpio specifier:
18 - Pin number: is a value between 0 to 7.
19 - Pull Up/Down: 0 - Pull Up/Down Disabled.
20 1 - Pull Down Enabled.
21 3 - Pull Up Enabled.
22 - Drive Strength: 0 - 1x,
23 1 - 3x,
24 2 - 2x,
25 3 - 4x
26
27- gpio-controller: Specifies that the node is a gpio controller.
28- #address-cells: should be 1.
29- #size-cells: should be 1.
30
31Example:
32
33 gpa0: gpio-controller@11400000 {
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "samsung,exynos4-gpio";
37 reg = <0x11400000 0x20>;
38 #gpio-cells = <4>;
39 gpio-controller;
40 };
diff --git a/Documentation/devicetree/bindings/input/samsung-keypad.txt b/Documentation/devicetree/bindings/input/samsung-keypad.txt
new file mode 100644
index 000000000000..ce3e394c0e64
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/samsung-keypad.txt
@@ -0,0 +1,88 @@
1* Samsung's Keypad Controller device tree bindings
2
3Samsung's Keypad controller is used to interface a SoC with a matrix-type
4keypad device. The keypad controller supports multiple row and column lines.
5A key can be placed at each intersection of a unique row and a unique column.
6The keypad controller can sense a key-press and key-release and report the
7event using a interrupt to the cpu.
8
9Required SoC Specific Properties:
10- compatible: should be one of the following
11 - "samsung,s3c6410-keypad": For controllers compatible with s3c6410 keypad
12 controller.
13 - "samsung,s5pv210-keypad": For controllers compatible with s5pv210 keypad
14 controller.
15
16- reg: physical base address of the controller and length of memory mapped
17 region.
18
19- interrupts: The interrupt number to the cpu.
20
21Required Board Specific Properties:
22- samsung,keypad-num-rows: Number of row lines connected to the keypad
23 controller.
24
25- samsung,keypad-num-columns: Number of column lines connected to the
26 keypad controller.
27
28- row-gpios: List of gpios used as row lines. The gpio specifier for
29 this property depends on the gpio controller to which these row lines
30 are connected.
31
32- col-gpios: List of gpios used as column lines. The gpio specifier for
33 this property depends on the gpio controller to which these column
34 lines are connected.
35
36- Keys represented as child nodes: Each key connected to the keypad
37 controller is represented as a child node to the keypad controller
38 device node and should include the following properties.
39 - keypad,row: the row number to which the key is connected.
40 - keypad,column: the column number to which the key is connected.
41 - linux,code: the key-code to be reported when the key is pressed
42 and released.
43
44Optional Properties specific to linux:
45- linux,keypad-no-autorepeat: do no enable autorepeat feature.
46- linux,keypad-wakeup: use any event on keypad as wakeup event.
47
48
49Example:
50 keypad@100A0000 {
51 compatible = "samsung,s5pv210-keypad";
52 reg = <0x100A0000 0x100>;
53 interrupts = <173>;
54 samsung,keypad-num-rows = <2>;
55 samsung,keypad-num-columns = <8>;
56 linux,input-no-autorepeat;
57 linux,input-wakeup;
58
59 row-gpios = <&gpx2 0 3 3 0
60 &gpx2 1 3 3 0>;
61
62 col-gpios = <&gpx1 0 3 0 0
63 &gpx1 1 3 0 0
64 &gpx1 2 3 0 0
65 &gpx1 3 3 0 0
66 &gpx1 4 3 0 0
67 &gpx1 5 3 0 0
68 &gpx1 6 3 0 0
69 &gpx1 7 3 0 0>;
70
71 key_1 {
72 keypad,row = <0>;
73 keypad,column = <3>;
74 linux,code = <2>;
75 };
76
77 key_2 {
78 keypad,row = <0>;
79 keypad,column = <4>;
80 linux,code = <3>;
81 };
82
83 key_3 {
84 keypad,row = <0>;
85 keypad,column = <5>;
86 linux,code = <4>;
87 };
88 };
diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
new file mode 100644
index 000000000000..44afa0e5057d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -0,0 +1,25 @@
1* Cadence MACB/GEM Ethernet controller
2
3Required properties:
4- compatible: Should be "cdns,[<chip>-]{macb|gem}"
5 Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs.
6 Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
7 Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on
8 the Cadence GEM, or the generic form: "cdns,gem".
9- reg: Address and length of the register set for the device
10- interrupts: Should contain macb interrupt
11- phy-mode: String, operation mode of the PHY interface.
12 Supported values are: "mii", "rmii", "gmii", "rgmii".
13
14Optional properties:
15- local-mac-address: 6 bytes, mac address
16
17Examples:
18
19 macb0: ethernet@fffc4000 {
20 compatible = "cdns,at32ap7000-macb";
21 reg = <0xfffc4000 0x4000>;
22 interrupts = <21>;
23 phy-mode = "rmii";
24 local-mac-address = [3a 0e 03 04 05 06];
25 };
diff --git a/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt b/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt
new file mode 100644
index 000000000000..5aeee53ff9f4
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt
@@ -0,0 +1,9 @@
1NVIDIA compliant embedded controller
2
3Required properties:
4- compatible : should be "nvidia,nvec".
5- reg : the iomem of the i2c slave controller
6- interrupts : the interrupt line of the i2c slave controller
7- clock-frequency : the frequency of the i2c bus
8- gpios : the gpio used for ec request
9- slave-addr: the i2c address of the slave controller
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
new file mode 100644
index 000000000000..90ec45fd33ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
@@ -0,0 +1,20 @@
1* Samsung's S3C Real Time Clock controller
2
3Required properties:
4- compatible: should be one of the following.
5 * "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc.
6 * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
7- reg: physical base address of the controller and length of memory mapped
8 region.
9- interrupts: Two interrupt numbers to the cpu should be specified. First
10 interrupt number is the rtc alarm interupt and second interrupt number
11 is the rtc tick interrupt. The number of cells representing a interrupt
12 depends on the parent interrupt controller.
13
14Example:
15
16 rtc@10070000 {
17 compatible = "samsung,s3c6410-rtc";
18 reg = <0x10070000 0x100>;
19 interrupts = <44 0 45 0>;
20 };
diff --git a/Documentation/devicetree/bindings/serial/omap_serial.txt b/Documentation/devicetree/bindings/serial/omap_serial.txt
new file mode 100644
index 000000000000..342eedd10050
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/omap_serial.txt
@@ -0,0 +1,10 @@
1OMAP UART controller
2
3Required properties:
4- compatible : should be "ti,omap2-uart" for OMAP2 controllers
5- compatible : should be "ti,omap3-uart" for OMAP3 controllers
6- compatible : should be "ti,omap4-uart" for OMAP4 controllers
7- ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
8
9Optional properties:
10- clock-frequency : frequency of the clock input to the UART
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.txt b/Documentation/devicetree/bindings/serial/samsung_uart.txt
new file mode 100644
index 000000000000..2c8a17cf5cb5
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/samsung_uart.txt
@@ -0,0 +1,14 @@
1* Samsung's UART Controller
2
3The Samsung's UART controller is used for interfacing SoC with serial communicaion
4devices.
5
6Required properties:
7- compatible: should be
8 - "samsung,exynos4210-uart", for UART's compatible with Exynos4210 uart ports.
9
10- reg: base physical address of the controller and length of memory mapped
11 region.
12
13- interrupts: interrupt number to the cpu. The interrupt specifier format depends
14 on the interrupt controller parent.
diff --git a/Documentation/devicetree/bindings/usb/tegra-usb.txt b/Documentation/devicetree/bindings/usb/tegra-usb.txt
new file mode 100644
index 000000000000..035d63d5646d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/tegra-usb.txt
@@ -0,0 +1,13 @@
1Tegra SOC USB controllers
2
3The device node for a USB controller that is part of a Tegra
4SOC is as described in the document "Open Firmware Recommended
5Practice : Universal Serial Bus" with the following modifications
6and additions :
7
8Required properties :
9 - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
10 used in host mode.
11 - phy_type : Should be one of "ulpi" or "utmi".
12 - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
13 activated for the bus to be powered.
diff --git a/Documentation/dontdiff b/Documentation/dontdiff
index dfa6fc6e4b28..0c083c5c2faa 100644
--- a/Documentation/dontdiff
+++ b/Documentation/dontdiff
@@ -66,7 +66,6 @@ GRTAGS
66GSYMS 66GSYMS
67GTAGS 67GTAGS
68Image 68Image
69Kerntypes
70Module.markers 69Module.markers
71Module.symvers 70Module.symvers
72PENDING 71PENDING
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index a1e7f3eec98f..284b44259750 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -523,6 +523,20 @@ Why: In 3.0, we can now autodetect internal 3G device and already have
523 information log when acer-wmi initial. 523 information log when acer-wmi initial.
524Who: Lee, Chun-Yi <jlee@novell.com> 524Who: Lee, Chun-Yi <jlee@novell.com>
525 525
526---------------------------
527
528What: /sys/devices/platform/_UDC_/udc/_UDC_/is_dualspeed file and
529 is_dualspeed line in /sys/devices/platform/ci13xxx_*/udc/device file.
530When: 3.8
531Why: The is_dualspeed file is superseded by maximum_speed in the same
532 directory and is_dualspeed line in device file is superseded by
533 max_speed line in the same file.
534
535 The maximum_speed/max_speed specifies maximum speed supported by UDC.
536 To check if dualspeeed is supported, check if the value is >= 3.
537 Various possible speeds are defined in <linux/usb/ch9.h>.
538Who: Michal Nazarewicz <mina86@mina86.com>
539
526---------------------------- 540----------------------------
527 541
528What: The XFS nodelaylog mount option 542What: The XFS nodelaylog mount option
diff --git a/Documentation/kdump/kdump.txt b/Documentation/kdump/kdump.txt
index 7a9e0b4b2903..506c7390c2b9 100644
--- a/Documentation/kdump/kdump.txt
+++ b/Documentation/kdump/kdump.txt
@@ -17,8 +17,8 @@ You can use common commands, such as cp and scp, to copy the
17memory image to a dump file on the local disk, or across the network to 17memory image to a dump file on the local disk, or across the network to
18a remote system. 18a remote system.
19 19
20Kdump and kexec are currently supported on the x86, x86_64, ppc64 and ia64 20Kdump and kexec are currently supported on the x86, x86_64, ppc64, ia64,
21architectures. 21and s390x architectures.
22 22
23When the system kernel boots, it reserves a small section of memory for 23When the system kernel boots, it reserves a small section of memory for
24the dump-capture kernel. This ensures that ongoing Direct Memory Access 24the dump-capture kernel. This ensures that ongoing Direct Memory Access
@@ -34,11 +34,18 @@ Similarly on PPC64 machines first 32KB of physical memory is needed for
34booting regardless of where the kernel is loaded and to support 64K page 34booting regardless of where the kernel is loaded and to support 64K page
35size kexec backs up the first 64KB memory. 35size kexec backs up the first 64KB memory.
36 36
37For s390x, when kdump is triggered, the crashkernel region is exchanged
38with the region [0, crashkernel region size] and then the kdump kernel
39runs in [0, crashkernel region size]. Therefore no relocatable kernel is
40needed for s390x.
41
37All of the necessary information about the system kernel's core image is 42All of the necessary information about the system kernel's core image is
38encoded in the ELF format, and stored in a reserved area of memory 43encoded in the ELF format, and stored in a reserved area of memory
39before a crash. The physical address of the start of the ELF header is 44before a crash. The physical address of the start of the ELF header is
40passed to the dump-capture kernel through the elfcorehdr= boot 45passed to the dump-capture kernel through the elfcorehdr= boot
41parameter. 46parameter. Optionally the size of the ELF header can also be passed
47when using the elfcorehdr=[size[KMG]@]offset[KMG] syntax.
48
42 49
43With the dump-capture kernel, you can access the memory image, or "old 50With the dump-capture kernel, you can access the memory image, or "old
44memory," in two ways: 51memory," in two ways:
@@ -291,6 +298,10 @@ Boot into System Kernel
291 The region may be automatically placed on ia64, see the 298 The region may be automatically placed on ia64, see the
292 dump-capture kernel config option notes above. 299 dump-capture kernel config option notes above.
293 300
301 On s390x, typically use "crashkernel=xxM". The value of xx is dependent
302 on the memory consumption of the kdump system. In general this is not
303 dependent on the memory size of the production system.
304
294Load the Dump-capture Kernel 305Load the Dump-capture Kernel
295============================ 306============================
296 307
@@ -308,6 +319,8 @@ For ppc64:
308 - Use vmlinux 319 - Use vmlinux
309For ia64: 320For ia64:
310 - Use vmlinux or vmlinuz.gz 321 - Use vmlinux or vmlinuz.gz
322For s390x:
323 - Use image or bzImage
311 324
312 325
313If you are using a uncompressed vmlinux image then use following command 326If you are using a uncompressed vmlinux image then use following command
@@ -337,6 +350,8 @@ For i386, x86_64 and ia64:
337For ppc64: 350For ppc64:
338 "1 maxcpus=1 noirqdistrib reset_devices" 351 "1 maxcpus=1 noirqdistrib reset_devices"
339 352
353For s390x:
354 "1 maxcpus=1 cgroup_disable=memory"
340 355
341Notes on loading the dump-capture kernel: 356Notes on loading the dump-capture kernel:
342 357
@@ -362,6 +377,20 @@ Notes on loading the dump-capture kernel:
362 dump. Hence generally it is useful either to build a UP dump-capture 377 dump. Hence generally it is useful either to build a UP dump-capture
363 kernel or specify maxcpus=1 option while loading dump-capture kernel. 378 kernel or specify maxcpus=1 option while loading dump-capture kernel.
364 379
380* For s390x there are two kdump modes: If a ELF header is specified with
381 the elfcorehdr= kernel parameter, it is used by the kdump kernel as it
382 is done on all other architectures. If no elfcorehdr= kernel parameter is
383 specified, the s390x kdump kernel dynamically creates the header. The
384 second mode has the advantage that for CPU and memory hotplug, kdump has
385 not to be reloaded with kexec_load().
386
387* For s390x systems with many attached devices the "cio_ignore" kernel
388 parameter should be used for the kdump kernel in order to prevent allocation
389 of kernel memory for devices that are not relevant for kdump. The same
390 applies to systems that use SCSI/FCP devices. In that case the
391 "allow_lun_scan" zfcp module parameter should be set to zero before
392 setting FCP devices online.
393
365Kernel Panic 394Kernel Panic
366============ 395============
367 396
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index e229769606f2..7b2e5c5eefa6 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2637,6 +2637,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
2637 [USB] Start with the old device initialization 2637 [USB] Start with the old device initialization
2638 scheme (default 0 = off). 2638 scheme (default 0 = off).
2639 2639
2640 usbcore.usbfs_memory_mb=
2641 [USB] Memory limit (in MB) for buffers allocated by
2642 usbfs (default = 16, 0 = max = 2047).
2643
2640 usbcore.use_both_schemes= 2644 usbcore.use_both_schemes=
2641 [USB] Try the other device initialization scheme 2645 [USB] Try the other device initialization scheme
2642 if the first one fails (default 1 = enabled). 2646 if the first one fails (default 1 = enabled).
diff --git a/Documentation/s390/Debugging390.txt b/Documentation/s390/Debugging390.txt
index efe998becc5b..462321c1aeea 100644
--- a/Documentation/s390/Debugging390.txt
+++ b/Documentation/s390/Debugging390.txt
@@ -41,7 +41,6 @@ ldd
41Debugging modules 41Debugging modules
42The proc file system 42The proc file system
43Starting points for debugging scripting languages etc. 43Starting points for debugging scripting languages etc.
44Dumptool & Lcrash
45SysRq 44SysRq
46References 45References
47Special Thanks 46Special Thanks
@@ -2455,39 +2454,6 @@ jdb <filename> another fully interactive gdb style debugger.
2455 2454
2456 2455
2457 2456
2458Dumptool & Lcrash ( lkcd )
2459==========================
2460Michael Holzheu & others here at IBM have a fairly mature port of
2461SGI's lcrash tool which allows one to look at kernel structures in a
2462running kernel.
2463
2464It also complements a tool called dumptool which dumps all the kernel's
2465memory pages & registers to either a tape or a disk.
2466This can be used by tech support or an ambitious end user do
2467post mortem debugging of a machine like gdb core dumps.
2468
2469Going into how to use this tool in detail will be explained
2470in other documentation supplied by IBM with the patches & the
2471lcrash homepage http://oss.sgi.com/projects/lkcd/ & the lcrash manpage.
2472
2473How they work
2474-------------
2475Lcrash is a perfectly normal program,however, it requires 2
2476additional files, Kerntypes which is built using a patch to the
2477linux kernel sources in the linux root directory & the System.map.
2478
2479Kerntypes is an objectfile whose sole purpose in life
2480is to provide stabs debug info to lcrash, to do this
2481Kerntypes is built from kerntypes.c which just includes the most commonly
2482referenced header files used when debugging, lcrash can then read the
2483.stabs section of this file.
2484
2485Debugging a live system it uses /dev/mem
2486alternatively for post mortem debugging it uses the data
2487collected by dumptool.
2488
2489
2490
2491SysRq 2457SysRq
2492===== 2458=====
2493This is now supported by linux for s/390 & z/Architecture. 2459This is now supported by linux for s/390 & z/Architecture.
diff --git a/Documentation/serial/driver b/Documentation/serial/driver
index 77ba0afbe4db..0a25a9191864 100644
--- a/Documentation/serial/driver
+++ b/Documentation/serial/driver
@@ -101,7 +101,7 @@ hardware.
101 Returns the current state of modem control inputs. The state 101 Returns the current state of modem control inputs. The state
102 of the outputs should not be returned, since the core keeps 102 of the outputs should not be returned, since the core keeps
103 track of their state. The state information should include: 103 track of their state. The state information should include:
104 - TIOCM_DCD state of DCD signal 104 - TIOCM_CAR state of DCD signal
105 - TIOCM_CTS state of CTS signal 105 - TIOCM_CTS state of CTS signal
106 - TIOCM_DSR state of DSR signal 106 - TIOCM_DSR state of DSR signal
107 - TIOCM_RI state of RI signal 107 - TIOCM_RI state of RI signal
diff --git a/Documentation/usb/usbmon.txt b/Documentation/usb/usbmon.txt
index a4efa0462f05..5335fa8b06eb 100644
--- a/Documentation/usb/usbmon.txt
+++ b/Documentation/usb/usbmon.txt
@@ -47,10 +47,11 @@ This allows to filter away annoying devices that talk continuously.
47 47
482. Find which bus connects to the desired device 482. Find which bus connects to the desired device
49 49
50Run "cat /proc/bus/usb/devices", and find the T-line which corresponds to 50Run "cat /sys/kernel/debug/usb/devices", and find the T-line which corresponds
51the device. Usually you do it by looking for the vendor string. If you have 51to the device. Usually you do it by looking for the vendor string. If you have
52many similar devices, unplug one and compare two /proc/bus/usb/devices outputs. 52many similar devices, unplug one and compare the two
53The T-line will have a bus number. Example: 53/sys/kernel/debug/usb/devices outputs. The T-line will have a bus number.
54Example:
54 55
55T: Bus=03 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 0 56T: Bus=03 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
56D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs= 1 57D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs= 1
@@ -58,7 +59,10 @@ P: Vendor=0557 ProdID=2004 Rev= 1.00
58S: Manufacturer=ATEN 59S: Manufacturer=ATEN
59S: Product=UC100KM V2.00 60S: Product=UC100KM V2.00
60 61
61Bus=03 means it's bus 3. 62"Bus=03" means it's bus 3. Alternatively, you can look at the output from
63"lsusb" and get the bus number from the appropriate line. Example:
64
65Bus 003 Device 002: ID 0557:2004 ATEN UC100KM V2.00
62 66
633. Start 'cat' 673. Start 'cat'
64 68
diff --git a/MAINTAINERS b/MAINTAINERS
index 1e7d90442651..0ae41c9a6c13 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -184,11 +184,6 @@ S: Maintained
184F: Documentation/filesystems/9p.txt 184F: Documentation/filesystems/9p.txt
185F: fs/9p/ 185F: fs/9p/
186 186
187A2232 SERIAL BOARD DRIVER
188L: linux-m68k@lists.linux-m68k.org
189S: Orphan
190F: drivers/staging/generic_serial/ser_a2232*
191
192AACRAID SCSI RAID DRIVER 187AACRAID SCSI RAID DRIVER
193M: Adaptec OEM Raid Solutions <aacraid@adaptec.com> 188M: Adaptec OEM Raid Solutions <aacraid@adaptec.com>
194L: linux-scsi@vger.kernel.org 189L: linux-scsi@vger.kernel.org
@@ -1587,7 +1582,7 @@ M: Franky (Zhenhui) Lin <frankyl@broadcom.com>
1587M: Kan Yan <kanyan@broadcom.com> 1582M: Kan Yan <kanyan@broadcom.com>
1588L: linux-wireless@vger.kernel.org 1583L: linux-wireless@vger.kernel.org
1589S: Supported 1584S: Supported
1590F: drivers/staging/brcm80211/ 1585F: drivers/net/wireless/brcm80211/
1591 1586
1592BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER 1587BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER
1593M: Bhanu Prakash Gollapudi <bprakash@broadcom.com> 1588M: Bhanu Prakash Gollapudi <bprakash@broadcom.com>
@@ -1891,12 +1886,6 @@ L: platform-driver-x86@vger.kernel.org
1891S: Maintained 1886S: Maintained
1892F: drivers/platform/x86/compal-laptop.c 1887F: drivers/platform/x86/compal-laptop.c
1893 1888
1894COMPUTONE INTELLIPORT MULTIPORT CARD
1895W: http://www.wittsend.com/computone.html
1896S: Orphan
1897F: Documentation/serial/computone.txt
1898F: drivers/staging/tty/ip2/
1899
1900CONEXANT ACCESSRUNNER USB DRIVER 1889CONEXANT ACCESSRUNNER USB DRIVER
1901M: Simon Arlott <cxacru@fire.lp0.eu> 1890M: Simon Arlott <cxacru@fire.lp0.eu>
1902L: accessrunner-general@lists.sourceforge.net 1891L: accessrunner-general@lists.sourceforge.net
@@ -2200,15 +2189,6 @@ F: drivers/md/dm*
2200F: include/linux/device-mapper.h 2189F: include/linux/device-mapper.h
2201F: include/linux/dm-*.h 2190F: include/linux/dm-*.h
2202 2191
2203DIGI INTL. EPCA DRIVER
2204M: "Digi International, Inc" <Eng.Linux@digi.com>
2205L: Eng.Linux@digi.com
2206W: http://www.digi.com
2207S: Orphan
2208F: Documentation/serial/digiepca.txt
2209F: drivers/staging/tty/epca*
2210F: drivers/staging/tty/digi*
2211
2212DIOLAN U2C-12 I2C DRIVER 2192DIOLAN U2C-12 I2C DRIVER
2213M: Guenter Roeck <guenter.roeck@ericsson.com> 2193M: Guenter Roeck <guenter.roeck@ericsson.com>
2214L: linux-i2c@vger.kernel.org 2194L: linux-i2c@vger.kernel.org
@@ -5131,6 +5111,15 @@ L: linux-mtd@lists.infradead.org
5131S: Maintained 5111S: Maintained
5132F: drivers/mtd/devices/phram.c 5112F: drivers/mtd/devices/phram.c
5133 5113
5114PICOXCELL SUPPORT
5115M: Jamie Iles <jamie@jamieiles.com>
5116L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5117T: git git://github.com/jamieiles/linux-2.6-ji.git
5118S: Supported
5119F: arch/arm/mach-picoxcell
5120F: drivers/*/picoxcell*
5121F: drivers/*/*/picoxcell*
5122
5134PIN CONTROL SUBSYSTEM 5123PIN CONTROL SUBSYSTEM
5135M: Linus Walleij <linus.walleij@linaro.org> 5124M: Linus Walleij <linus.walleij@linaro.org>
5136S: Maintained 5125S: Maintained
@@ -5317,7 +5306,10 @@ F: drivers/media/video/pvrusb2/
5317PXA2xx/PXA3xx SUPPORT 5306PXA2xx/PXA3xx SUPPORT
5318M: Eric Miao <eric.y.miao@gmail.com> 5307M: Eric Miao <eric.y.miao@gmail.com>
5319M: Russell King <linux@arm.linux.org.uk> 5308M: Russell King <linux@arm.linux.org.uk>
5309M: Haojian Zhuang <haojian.zhuang@marvell.com>
5320L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 5310L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5311T: git git://github.com/hzhuang1/linux.git
5312T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
5321S: Maintained 5313S: Maintained
5322F: arch/arm/mach-pxa/ 5314F: arch/arm/mach-pxa/
5323F: drivers/pcmcia/pxa2xx* 5315F: drivers/pcmcia/pxa2xx*
@@ -5327,25 +5319,14 @@ F: include/sound/pxa2xx-lib.h
5327F: sound/arm/pxa* 5319F: sound/arm/pxa*
5328F: sound/soc/pxa 5320F: sound/soc/pxa
5329 5321
5330PXA168 SUPPORT 5322MMP SUPPORT
5331M: Eric Miao <eric.y.miao@gmail.com> 5323M: Eric Miao <eric.y.miao@gmail.com>
5332M: Jason Chagas <jason.chagas@marvell.com>
5333L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5334T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
5335S: Maintained
5336
5337PXA910 SUPPORT
5338M: Eric Miao <eric.y.miao@gmail.com>
5339L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5340T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
5341S: Maintained
5342
5343MMP2 SUPPORT (aka ARMADA610)
5344M: Haojian Zhuang <haojian.zhuang@marvell.com> 5324M: Haojian Zhuang <haojian.zhuang@marvell.com>
5345M: Eric Miao <eric.y.miao@gmail.com>
5346L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 5325L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
5347T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git 5326T: git git://github.com/hzhuang1/linux.git
5327T: git git://git.linaro.org/people/ycmiao/pxa-linux.git
5348S: Maintained 5328S: Maintained
5329F: arch/arm/mach-mmp/
5349 5330
5350PXA MMCI DRIVER 5331PXA MMCI DRIVER
5351S: Orphan 5332S: Orphan
@@ -5555,11 +5536,6 @@ M: Maxim Levitsky <maximlevitsky@gmail.com>
5555S: Maintained 5536S: Maintained
5556F: drivers/memstick/host/r592.* 5537F: drivers/memstick/host/r592.*
5557 5538
5558RISCOM8 DRIVER
5559S: Orphan
5560F: Documentation/serial/riscom8.txt
5561F: drivers/staging/tty/riscom8*
5562
5563ROCKETPORT DRIVER 5539ROCKETPORT DRIVER
5564P: Comtrol Corp. 5540P: Comtrol Corp.
5565W: http://www.comtrol.com 5541W: http://www.comtrol.com
@@ -6222,11 +6198,6 @@ F: arch/arm/mach-spear3xx/spear3*0_evb.c
6222F: arch/arm/mach-spear6xx/spear600.c 6198F: arch/arm/mach-spear6xx/spear600.c
6223F: arch/arm/mach-spear6xx/spear600_evb.c 6199F: arch/arm/mach-spear6xx/spear600_evb.c
6224 6200
6225SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER
6226S: Orphan
6227F: Documentation/serial/specialix.txt
6228F: drivers/staging/tty/specialix*
6229
6230SPI SUBSYSTEM 6201SPI SUBSYSTEM
6231M: Grant Likely <grant.likely@secretlab.ca> 6202M: Grant Likely <grant.likely@secretlab.ca>
6232L: spi-devel-general@lists.sourceforge.net 6203L: spi-devel-general@lists.sourceforge.net
@@ -6304,11 +6275,6 @@ M: Manu Abraham <abraham.manu@gmail.com>
6304S: Odd Fixes 6275S: Odd Fixes
6305F: drivers/staging/crystalhd/ 6276F: drivers/staging/crystalhd/
6306 6277
6307STAGING - CYPRESS WESTBRIDGE SUPPORT
6308M: David Cross <david.cross@cypress.com>
6309S: Odd Fixes
6310F: drivers/staging/westbridge/
6311
6312STAGING - ECHO CANCELLER 6278STAGING - ECHO CANCELLER
6313M: Steve Underwood <steveu@coppice.org> 6279M: Steve Underwood <steveu@coppice.org>
6314M: David Rowe <david@rowetel.com> 6280M: David Rowe <david@rowetel.com>
@@ -6414,7 +6380,7 @@ S: Odd Fixes
6414F: drivers/staging/winbond/ 6380F: drivers/staging/winbond/
6415 6381
6416STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER 6382STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER
6417M: Arnaud Patard <apatard@mandriva.com> 6383M: Arnaud Patard <arnaud.patard@rtp-net.org>
6418S: Odd Fixes 6384S: Odd Fixes
6419F: drivers/staging/xgifb/ 6385F: drivers/staging/xgifb/
6420 6386
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f72e1707d463..9d66dfc33a5a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -447,6 +447,7 @@ config ARCH_MXS
447 select ARCH_REQUIRE_GPIOLIB 447 select ARCH_REQUIRE_GPIOLIB
448 select CLKDEV_LOOKUP 448 select CLKDEV_LOOKUP
449 select CLKSRC_MMIO 449 select CLKSRC_MMIO
450 select HAVE_CLK_PREPARE
450 help 451 help
451 Support for Freescale MXS-based family of processors 452 Support for Freescale MXS-based family of processors
452 453
@@ -597,6 +598,7 @@ config ARCH_MMP
597 select ARCH_REQUIRE_GPIOLIB 598 select ARCH_REQUIRE_GPIOLIB
598 select CLKDEV_LOOKUP 599 select CLKDEV_LOOKUP
599 select GENERIC_CLOCKEVENTS 600 select GENERIC_CLOCKEVENTS
601 select GPIO_PXA
600 select HAVE_SCHED_CLOCK 602 select HAVE_SCHED_CLOCK
601 select TICK_ONESHOT 603 select TICK_ONESHOT
602 select PLAT_PXA 604 select PLAT_PXA
@@ -658,6 +660,7 @@ config ARCH_PICOXCELL
658 select HAVE_SCHED_CLOCK 660 select HAVE_SCHED_CLOCK
659 select HAVE_TCM 661 select HAVE_TCM
660 select NO_IOPORT 662 select NO_IOPORT
663 select SPARSE_IRQ
661 select USE_OF 664 select USE_OF
662 help 665 help
663 This enables support for systems based on the Picochip picoXcell 666 This enables support for systems based on the Picochip picoXcell
@@ -681,6 +684,7 @@ config ARCH_PXA
681 select CLKSRC_MMIO 684 select CLKSRC_MMIO
682 select ARCH_REQUIRE_GPIOLIB 685 select ARCH_REQUIRE_GPIOLIB
683 select GENERIC_CLOCKEVENTS 686 select GENERIC_CLOCKEVENTS
687 select GPIO_PXA
684 select HAVE_SCHED_CLOCK 688 select HAVE_SCHED_CLOCK
685 select TICK_ONESHOT 689 select TICK_ONESHOT
686 select PLAT_PXA 690 select PLAT_PXA
@@ -748,7 +752,7 @@ config ARCH_SA1100
748 select ARCH_HAS_CPUFREQ 752 select ARCH_HAS_CPUFREQ
749 select CPU_FREQ 753 select CPU_FREQ
750 select GENERIC_CLOCKEVENTS 754 select GENERIC_CLOCKEVENTS
751 select HAVE_CLK 755 select CLKDEV_LOOKUP
752 select HAVE_SCHED_CLOCK 756 select HAVE_SCHED_CLOCK
753 select TICK_ONESHOT 757 select TICK_ONESHOT
754 select ARCH_REQUIRE_GPIOLIB 758 select ARCH_REQUIRE_GPIOLIB
@@ -892,7 +896,6 @@ config ARCH_U300
892 select HAVE_MACH_CLKDEV 896 select HAVE_MACH_CLKDEV
893 select GENERIC_GPIO 897 select GENERIC_GPIO
894 select ARCH_REQUIRE_GPIOLIB 898 select ARCH_REQUIRE_GPIOLIB
895 select NEED_MACH_MEMORY_H
896 help 899 help
897 Support for ST-Ericsson U300 series mobile platforms. 900 Support for ST-Ericsson U300 series mobile platforms.
898 901
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index c5213e78606b..e0d236d7ff73 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -100,6 +100,14 @@ choice
100 Note that the system will appear to hang during boot if there 100 Note that the system will appear to hang during boot if there
101 is nothing connected to read from the DCC. 101 is nothing connected to read from the DCC.
102 102
103 config AT91_DEBUG_LL_DBGU0
104 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
105 depends on HAVE_AT91_DBGU0
106
107 config AT91_DEBUG_LL_DBGU1
108 bool "Kernel low-level debugging on 9263, 9g45 and cap9"
109 depends on HAVE_AT91_DBGU1
110
103 config DEBUG_FOOTBRIDGE_COM1 111 config DEBUG_FOOTBRIDGE_COM1
104 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" 112 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
105 depends on FOOTBRIDGE 113 depends on FOOTBRIDGE
@@ -247,6 +255,43 @@ choice
247 their output to the standard serial port on the RealView 255 their output to the standard serial port on the RealView
248 PB1176 platform. 256 PB1176 platform.
249 257
258 config DEBUG_MSM_UART1
259 bool "Kernel low-level debugging messages via MSM UART1"
260 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
261 help
262 Say Y here if you want the debug print routines to direct
263 their output to the first serial port on MSM devices.
264
265 config DEBUG_MSM_UART2
266 bool "Kernel low-level debugging messages via MSM UART2"
267 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
268 help
269 Say Y here if you want the debug print routines to direct
270 their output to the second serial port on MSM devices.
271
272 config DEBUG_MSM_UART3
273 bool "Kernel low-level debugging messages via MSM UART3"
274 depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
275 help
276 Say Y here if you want the debug print routines to direct
277 their output to the third serial port on MSM devices.
278
279 config DEBUG_MSM8660_UART
280 bool "Kernel low-level debugging messages via MSM 8660 UART"
281 depends on ARCH_MSM8X60
282 select MSM_HAS_DEBUG_UART_HS
283 help
284 Say Y here if you want the debug print routines to direct
285 their output to the serial port on MSM 8660 devices.
286
287 config DEBUG_MSM8960_UART
288 bool "Kernel low-level debugging messages via MSM 8960 UART"
289 depends on ARCH_MSM8960
290 select MSM_HAS_DEBUG_UART_HS
291 help
292 Say Y here if you want the debug print routines to direct
293 their output to the serial port on MSM 8960 devices.
294
250endchoice 295endchoice
251 296
252config EARLY_PRINTK 297config EARLY_PRINTK
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index aeef04269cf8..07603b8c9503 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -114,6 +114,13 @@
114 atmel,use-dma-tx; 114 atmel,use-dma-tx;
115 status = "disabled"; 115 status = "disabled";
116 }; 116 };
117
118 macb0: ethernet@fffc4000 {
119 compatible = "cdns,at32ap7000-macb", "cdns,macb";
120 reg = <0xfffc4000 0x100>;
121 interrupts = <21>;
122 status = "disabled";
123 };
117 }; 124 };
118 }; 125 };
119}; 126};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index db6a45202f26..fffa005300a4 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -101,6 +101,13 @@
101 atmel,use-dma-tx; 101 atmel,use-dma-tx;
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104
105 macb0: ethernet@fffbc000 {
106 compatible = "cdns,at32ap7000-macb", "cdns,macb";
107 reg = <0xfffbc000 0x100>;
108 interrupts = <25>;
109 status = "disabled";
110 };
104 }; 111 };
105 }; 112 };
106}; 113};
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 85b34f59cd82..a387e7704ce1 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -30,6 +30,11 @@
30 usart1: serial@fff90000 { 30 usart1: serial@fff90000 {
31 status = "okay"; 31 status = "okay";
32 }; 32 };
33
34 macb0: ethernet@fffbc000 {
35 phy-mode = "rmii";
36 status = "okay";
37 };
33 }; 38 };
34 }; 39 };
35}; 40};
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
new file mode 100644
index 000000000000..b8c476384eef
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -0,0 +1,137 @@
1/*
2 * Samsung's Exynos4210 based Origen board device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Device tree source file for Insignal's Origen board which is based on
10 * Samsung's Exynos4210 SoC.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17/dts-v1/;
18/include/ "exynos4210.dtsi"
19
20/ {
21 model = "Insignal Origen evaluation board based on Exynos4210";
22 compatible = "insignal,origen", "samsung,exynos4210";
23
24 memory {
25 reg = <0x40000000 0x40000000>;
26 };
27
28 chosen {
29 bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
30 };
31
32 sdhci@12530000 {
33 samsung,sdhci-bus-width = <4>;
34 linux,mmc_cap_4_bit_data;
35 samsung,sdhci-cd-internal;
36 gpio-cd = <&gpk2 2 2 3 3>;
37 gpios = <&gpk2 0 2 0 3>,
38 <&gpk2 1 2 0 3>,
39 <&gpk2 3 2 3 3>,
40 <&gpk2 4 2 3 3>,
41 <&gpk2 5 2 3 3>,
42 <&gpk2 6 2 3 3>;
43 };
44
45 sdhci@12510000 {
46 samsung,sdhci-bus-width = <4>;
47 linux,mmc_cap_4_bit_data;
48 samsung,sdhci-cd-internal;
49 gpio-cd = <&gpk0 2 2 3 3>;
50 gpios = <&gpk0 0 2 0 3>,
51 <&gpk0 1 2 0 3>,
52 <&gpk0 3 2 3 3>,
53 <&gpk0 4 2 3 3>,
54 <&gpk0 5 2 3 3>,
55 <&gpk0 6 2 3 3>;
56 };
57
58 gpio_keys {
59 compatible = "gpio-keys";
60 #address-cells = <1>;
61 #size-cells = <0>;
62
63 up {
64 label = "Up";
65 gpios = <&gpx2 0 0 0 2>;
66 linux,code = <103>;
67 };
68
69 down {
70 label = "Down";
71 gpios = <&gpx2 1 0 0 2>;
72 linux,code = <108>;
73 };
74
75 back {
76 label = "Back";
77 gpios = <&gpx1 7 0 0 2>;
78 linux,code = <158>;
79 };
80
81 home {
82 label = "Home";
83 gpios = <&gpx1 6 0 0 2>;
84 linux,code = <102>;
85 };
86
87 menu {
88 label = "Menu";
89 gpios = <&gpx1 5 0 0 2>;
90 linux,code = <139>;
91 };
92 };
93
94 keypad@100A0000 {
95 status = "disabled";
96 };
97
98 sdhci@12520000 {
99 status = "disabled";
100 };
101
102 sdhci@12540000 {
103 status = "disabled";
104 };
105
106 i2c@13860000 {
107 status = "disabled";
108 };
109
110 i2c@13870000 {
111 status = "disabled";
112 };
113
114 i2c@13880000 {
115 status = "disabled";
116 };
117
118 i2c@13890000 {
119 status = "disabled";
120 };
121
122 i2c@138A0000 {
123 status = "disabled";
124 };
125
126 i2c@138B0000 {
127 status = "disabled";
128 };
129
130 i2c@138C0000 {
131 status = "disabled";
132 };
133
134 i2c@138D0000 {
135 status = "disabled";
136 };
137};
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
new file mode 100644
index 000000000000..27afc8e535ca
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -0,0 +1,182 @@
1/*
2 * Samsung's Exynos4210 based SMDKV310 board device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Device tree source file for Samsung's SMDKV310 board which is based on
10 * Samsung's Exynos4210 SoC.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17/dts-v1/;
18/include/ "exynos4210.dtsi"
19
20/ {
21 model = "Samsung smdkv310 evaluation board based on Exynos4210";
22 compatible = "samsung,smdkv310", "samsung,exynos4210";
23
24 memory {
25 reg = <0x40000000 0x80000000>;
26 };
27
28 chosen {
29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
30 };
31
32 sdhci@12530000 {
33 samsung,sdhci-bus-width = <4>;
34 linux,mmc_cap_4_bit_data;
35 samsung,sdhci-cd-internal;
36 gpio-cd = <&gpk2 2 2 3 3>;
37 gpios = <&gpk2 0 2 0 3>,
38 <&gpk2 1 2 0 3>,
39 <&gpk2 3 2 3 3>,
40 <&gpk2 4 2 3 3>,
41 <&gpk2 5 2 3 3>,
42 <&gpk2 6 2 3 3>;
43 };
44
45 keypad@100A0000 {
46 samsung,keypad-num-rows = <2>;
47 samsung,keypad-num-columns = <8>;
48 linux,keypad-no-autorepeat;
49 linux,keypad-wakeup;
50
51 row-gpios = <&gpx2 0 3 3 0>,
52 <&gpx2 1 3 3 0>;
53
54 col-gpios = <&gpx1 0 3 0 0>,
55 <&gpx1 1 3 0 0>,
56 <&gpx1 2 3 0 0>,
57 <&gpx1 3 3 0 0>,
58 <&gpx1 4 3 0 0>,
59 <&gpx1 5 3 0 0>,
60 <&gpx1 6 3 0 0>,
61 <&gpx1 7 3 0 0>;
62
63 key_1 {
64 keypad,row = <0>;
65 keypad,column = <3>;
66 linux,code = <2>;
67 };
68
69 key_2 {
70 keypad,row = <0>;
71 keypad,column = <4>;
72 linux,code = <3>;
73 };
74
75 key_3 {
76 keypad,row = <0>;
77 keypad,column = <5>;
78 linux,code = <4>;
79 };
80
81 key_4 {
82 keypad,row = <0>;
83 keypad,column = <6>;
84 linux,code = <5>;
85 };
86
87 key_5 {
88 keypad,row = <0>;
89 keypad,column = <7>;
90 linux,code = <6>;
91 };
92
93 key_a {
94 keypad,row = <1>;
95 keypad,column = <3>;
96 linux,code = <30>;
97 };
98
99 key_b {
100 keypad,row = <1>;
101 keypad,column = <4>;
102 linux,code = <48>;
103 };
104
105 key_c {
106 keypad,row = <1>;
107 keypad,column = <5>;
108 linux,code = <46>;
109 };
110
111 key_d {
112 keypad,row = <1>;
113 keypad,column = <6>;
114 linux,code = <32>;
115 };
116
117 key_e {
118 keypad,row = <1>;
119 keypad,column = <7>;
120 linux,code = <18>;
121 };
122 };
123
124 i2c@13860000 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 samsung,i2c-sda-delay = <100>;
128 samsung,i2c-max-bus-freq = <20000>;
129 gpios = <&gpd1 0 2 3 0>,
130 <&gpd1 1 2 3 0>;
131
132 eeprom@50 {
133 compatible = "samsung,24ad0xd1";
134 reg = <0x50>;
135 };
136
137 eeprom@52 {
138 compatible = "samsung,24ad0xd1";
139 reg = <0x52>;
140 };
141 };
142
143 sdhci@12510000 {
144 status = "disabled";
145 };
146
147 sdhci@12520000 {
148 status = "disabled";
149 };
150
151 sdhci@12540000 {
152 status = "disabled";
153 };
154
155 i2c@13870000 {
156 status = "disabled";
157 };
158
159 i2c@13880000 {
160 status = "disabled";
161 };
162
163 i2c@13890000 {
164 status = "disabled";
165 };
166
167 i2c@138A0000 {
168 status = "disabled";
169 };
170
171 i2c@138B0000 {
172 status = "disabled";
173 };
174
175 i2c@138C0000 {
176 status = "disabled";
177 };
178
179 i2c@138D0000 {
180 status = "disabled";
181 };
182};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
new file mode 100644
index 000000000000..63d7578856c1
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -0,0 +1,397 @@
1/*
2 * Samsung's Exynos4210 SoC device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
10 * based board files can include this file and provide values for board specfic
11 * bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20*/
21
22/include/ "skeleton.dtsi"
23
24/ {
25 compatible = "samsung,exynos4210";
26 interrupt-parent = <&gic>;
27
28 gic:interrupt-controller@10490000 {
29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>;
31 interrupt-controller;
32 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
33 };
34
35 watchdog@10060000 {
36 compatible = "samsung,s3c2410-wdt";
37 reg = <0x10060000 0x100>;
38 interrupts = <0 43 0>;
39 };
40
41 rtc@10070000 {
42 compatible = "samsung,s3c6410-rtc";
43 reg = <0x10070000 0x100>;
44 interrupts = <0 44 0>, <0 45 0>;
45 };
46
47 keypad@100A0000 {
48 compatible = "samsung,s5pv210-keypad";
49 reg = <0x100A0000 0x100>;
50 interrupts = <0 109 0>;
51 };
52
53 sdhci@12510000 {
54 compatible = "samsung,exynos4210-sdhci";
55 reg = <0x12510000 0x100>;
56 interrupts = <0 73 0>;
57 };
58
59 sdhci@12520000 {
60 compatible = "samsung,exynos4210-sdhci";
61 reg = <0x12520000 0x100>;
62 interrupts = <0 74 0>;
63 };
64
65 sdhci@12530000 {
66 compatible = "samsung,exynos4210-sdhci";
67 reg = <0x12530000 0x100>;
68 interrupts = <0 75 0>;
69 };
70
71 sdhci@12540000 {
72 compatible = "samsung,exynos4210-sdhci";
73 reg = <0x12540000 0x100>;
74 interrupts = <0 76 0>;
75 };
76
77 serial@13800000 {
78 compatible = "samsung,exynos4210-uart";
79 reg = <0x13800000 0x100>;
80 interrupts = <0 52 0>;
81 };
82
83 serial@13810000 {
84 compatible = "samsung,exynos4210-uart";
85 reg = <0x13810000 0x100>;
86 interrupts = <0 53 0>;
87 };
88
89 serial@13820000 {
90 compatible = "samsung,exynos4210-uart";
91 reg = <0x13820000 0x100>;
92 interrupts = <0 54 0>;
93 };
94
95 serial@13830000 {
96 compatible = "samsung,exynos4210-uart";
97 reg = <0x13830000 0x100>;
98 interrupts = <0 55 0>;
99 };
100
101 i2c@13860000 {
102 compatible = "samsung,s3c2440-i2c";
103 reg = <0x13860000 0x100>;
104 interrupts = <0 58 0>;
105 };
106
107 i2c@13870000 {
108 compatible = "samsung,s3c2440-i2c";
109 reg = <0x13870000 0x100>;
110 interrupts = <0 59 0>;
111 };
112
113 i2c@13880000 {
114 compatible = "samsung,s3c2440-i2c";
115 reg = <0x13880000 0x100>;
116 interrupts = <0 60 0>;
117 };
118
119 i2c@13890000 {
120 compatible = "samsung,s3c2440-i2c";
121 reg = <0x13890000 0x100>;
122 interrupts = <0 61 0>;
123 };
124
125 i2c@138A0000 {
126 compatible = "samsung,s3c2440-i2c";
127 reg = <0x138A0000 0x100>;
128 interrupts = <0 62 0>;
129 };
130
131 i2c@138B0000 {
132 compatible = "samsung,s3c2440-i2c";
133 reg = <0x138B0000 0x100>;
134 interrupts = <0 63 0>;
135 };
136
137 i2c@138C0000 {
138 compatible = "samsung,s3c2440-i2c";
139 reg = <0x138C0000 0x100>;
140 interrupts = <0 64 0>;
141 };
142
143 i2c@138D0000 {
144 compatible = "samsung,s3c2440-i2c";
145 reg = <0x138D0000 0x100>;
146 interrupts = <0 65 0>;
147 };
148
149 amba {
150 #address-cells = <1>;
151 #size-cells = <1>;
152 compatible = "arm,amba-bus";
153 interrupt-parent = <&gic>;
154 ranges;
155
156 pdma0: pdma@12680000 {
157 compatible = "arm,pl330", "arm,primecell";
158 reg = <0x12680000 0x1000>;
159 interrupts = <0 35 0>;
160 };
161
162 pdma1: pdma@12690000 {
163 compatible = "arm,pl330", "arm,primecell";
164 reg = <0x12690000 0x1000>;
165 interrupts = <0 36 0>;
166 };
167 };
168
169 gpio-controllers {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 gpio-controller;
173 ranges;
174
175 gpa0: gpio-controller@11400000 {
176 compatible = "samsung,exynos4-gpio";
177 reg = <0x11400000 0x20>;
178 #gpio-cells = <4>;
179 };
180
181 gpa1: gpio-controller@11400020 {
182 compatible = "samsung,exynos4-gpio";
183 reg = <0x11400020 0x20>;
184 #gpio-cells = <4>;
185 };
186
187 gpb: gpio-controller@11400040 {
188 compatible = "samsung,exynos4-gpio";
189 reg = <0x11400040 0x20>;
190 #gpio-cells = <4>;
191 };
192
193 gpc0: gpio-controller@11400060 {
194 compatible = "samsung,exynos4-gpio";
195 reg = <0x11400060 0x20>;
196 #gpio-cells = <4>;
197 };
198
199 gpc1: gpio-controller@11400080 {
200 compatible = "samsung,exynos4-gpio";
201 reg = <0x11400080 0x20>;
202 #gpio-cells = <4>;
203 };
204
205 gpd0: gpio-controller@114000A0 {
206 compatible = "samsung,exynos4-gpio";
207 reg = <0x114000A0 0x20>;
208 #gpio-cells = <4>;
209 };
210
211 gpd1: gpio-controller@114000C0 {
212 compatible = "samsung,exynos4-gpio";
213 reg = <0x114000C0 0x20>;
214 #gpio-cells = <4>;
215 };
216
217 gpe0: gpio-controller@114000E0 {
218 compatible = "samsung,exynos4-gpio";
219 reg = <0x114000E0 0x20>;
220 #gpio-cells = <4>;
221 };
222
223 gpe1: gpio-controller@11400100 {
224 compatible = "samsung,exynos4-gpio";
225 reg = <0x11400100 0x20>;
226 #gpio-cells = <4>;
227 };
228
229 gpe2: gpio-controller@11400120 {
230 compatible = "samsung,exynos4-gpio";
231 reg = <0x11400120 0x20>;
232 #gpio-cells = <4>;
233 };
234
235 gpe3: gpio-controller@11400140 {
236 compatible = "samsung,exynos4-gpio";
237 reg = <0x11400140 0x20>;
238 #gpio-cells = <4>;
239 };
240
241 gpe4: gpio-controller@11400160 {
242 compatible = "samsung,exynos4-gpio";
243 reg = <0x11400160 0x20>;
244 #gpio-cells = <4>;
245 };
246
247 gpf0: gpio-controller@11400180 {
248 compatible = "samsung,exynos4-gpio";
249 reg = <0x11400180 0x20>;
250 #gpio-cells = <4>;
251 };
252
253 gpf1: gpio-controller@114001A0 {
254 compatible = "samsung,exynos4-gpio";
255 reg = <0x114001A0 0x20>;
256 #gpio-cells = <4>;
257 };
258
259 gpf2: gpio-controller@114001C0 {
260 compatible = "samsung,exynos4-gpio";
261 reg = <0x114001C0 0x20>;
262 #gpio-cells = <4>;
263 };
264
265 gpf3: gpio-controller@114001E0 {
266 compatible = "samsung,exynos4-gpio";
267 reg = <0x114001E0 0x20>;
268 #gpio-cells = <4>;
269 };
270
271 gpj0: gpio-controller@11000000 {
272 compatible = "samsung,exynos4-gpio";
273 reg = <0x11000000 0x20>;
274 #gpio-cells = <4>;
275 };
276
277 gpj1: gpio-controller@11000020 {
278 compatible = "samsung,exynos4-gpio";
279 reg = <0x11000020 0x20>;
280 #gpio-cells = <4>;
281 };
282
283 gpk0: gpio-controller@11000040 {
284 compatible = "samsung,exynos4-gpio";
285 reg = <0x11000040 0x20>;
286 #gpio-cells = <4>;
287 };
288
289 gpk1: gpio-controller@11000060 {
290 compatible = "samsung,exynos4-gpio";
291 reg = <0x11000060 0x20>;
292 #gpio-cells = <4>;
293 };
294
295 gpk2: gpio-controller@11000080 {
296 compatible = "samsung,exynos4-gpio";
297 reg = <0x11000080 0x20>;
298 #gpio-cells = <4>;
299 };
300
301 gpk3: gpio-controller@110000A0 {
302 compatible = "samsung,exynos4-gpio";
303 reg = <0x110000A0 0x20>;
304 #gpio-cells = <4>;
305 };
306
307 gpl0: gpio-controller@110000C0 {
308 compatible = "samsung,exynos4-gpio";
309 reg = <0x110000C0 0x20>;
310 #gpio-cells = <4>;
311 };
312
313 gpl1: gpio-controller@110000E0 {
314 compatible = "samsung,exynos4-gpio";
315 reg = <0x110000E0 0x20>;
316 #gpio-cells = <4>;
317 };
318
319 gpl2: gpio-controller@11000100 {
320 compatible = "samsung,exynos4-gpio";
321 reg = <0x11000100 0x20>;
322 #gpio-cells = <4>;
323 };
324
325 gpy0: gpio-controller@11000120 {
326 compatible = "samsung,exynos4-gpio";
327 reg = <0x11000120 0x20>;
328 #gpio-cells = <4>;
329 };
330
331 gpy1: gpio-controller@11000140 {
332 compatible = "samsung,exynos4-gpio";
333 reg = <0x11000140 0x20>;
334 #gpio-cells = <4>;
335 };
336
337 gpy2: gpio-controller@11000160 {
338 compatible = "samsung,exynos4-gpio";
339 reg = <0x11000160 0x20>;
340 #gpio-cells = <4>;
341 };
342
343 gpy3: gpio-controller@11000180 {
344 compatible = "samsung,exynos4-gpio";
345 reg = <0x11000180 0x20>;
346 #gpio-cells = <4>;
347 };
348
349 gpy4: gpio-controller@110001A0 {
350 compatible = "samsung,exynos4-gpio";
351 reg = <0x110001A0 0x20>;
352 #gpio-cells = <4>;
353 };
354
355 gpy5: gpio-controller@110001C0 {
356 compatible = "samsung,exynos4-gpio";
357 reg = <0x110001C0 0x20>;
358 #gpio-cells = <4>;
359 };
360
361 gpy6: gpio-controller@110001E0 {
362 compatible = "samsung,exynos4-gpio";
363 reg = <0x110001E0 0x20>;
364 #gpio-cells = <4>;
365 };
366
367 gpx0: gpio-controller@11000C00 {
368 compatible = "samsung,exynos4-gpio";
369 reg = <0x11000C00 0x20>;
370 #gpio-cells = <4>;
371 };
372
373 gpx1: gpio-controller@11000C20 {
374 compatible = "samsung,exynos4-gpio";
375 reg = <0x11000C20 0x20>;
376 #gpio-cells = <4>;
377 };
378
379 gpx2: gpio-controller@11000C40 {
380 compatible = "samsung,exynos4-gpio";
381 reg = <0x11000C40 0x20>;
382 #gpio-cells = <4>;
383 };
384
385 gpx3: gpio-controller@11000C60 {
386 compatible = "samsung,exynos4-gpio";
387 reg = <0x11000C60 0x20>;
388 #gpio-cells = <4>;
389 };
390
391 gpz: gpio-controller@03860000 {
392 compatible = "samsung,exynos4-gpio";
393 reg = <0x03860000 0x20>;
394 #gpio-cells = <4>;
395 };
396 };
397};
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index aeb1a7578fad..305635bd45c0 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -194,5 +194,17 @@
194 reg = <0xfff3d000 0x1000>; 194 reg = <0xfff3d000 0x1000>;
195 interrupts = <0 92 4>; 195 interrupts = <0 92 4>;
196 }; 196 };
197
198 ethernet@fff50000 {
199 compatible = "calxeda,hb-xgmac";
200 reg = <0xfff50000 0x1000>;
201 interrupts = <0 77 4 0 78 4 0 79 4>;
202 };
203
204 ethernet@fff51000 {
205 compatible = "calxeda,hb-xgmac";
206 reg = <0xfff51000 0x1000>;
207 interrupts = <0 80 4 0 81 4 0 82 4>;
208 };
197 }; 209 };
198}; 210};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index f8766af11215..564cb8c19f15 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -35,20 +35,19 @@
35 }; 35 };
36 36
37 esdhc@70008000 { /* ESDHC2 */ 37 esdhc@70008000 { /* ESDHC2 */
38 cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ 38 cd-gpios = <&gpio1 6 0>;
39 wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ 39 wp-gpios = <&gpio1 5 0>;
40 status = "okay"; 40 status = "okay";
41 }; 41 };
42 42
43 uart2: uart@7000c000 { /* UART3 */ 43 uart3: uart@7000c000 {
44 fsl,uart-has-rtscts; 44 fsl,uart-has-rtscts;
45 status = "okay"; 45 status = "okay";
46 }; 46 };
47 47
48 ecspi@70010000 { /* ECSPI1 */ 48 ecspi@70010000 { /* ECSPI1 */
49 fsl,spi-num-chipselects = <2>; 49 fsl,spi-num-chipselects = <2>;
50 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ 50 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
51 <&gpio3 25 0>; /* GPIO4_25 */
52 status = "okay"; 51 status = "okay";
53 52
54 pmic: mc13892@0 { 53 pmic: mc13892@0 {
@@ -57,7 +56,7 @@
57 compatible = "fsl,mc13892"; 56 compatible = "fsl,mc13892";
58 spi-max-frequency = <6000000>; 57 spi-max-frequency = <6000000>;
59 reg = <0>; 58 reg = <0>;
60 mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */ 59 mc13xxx-irq-gpios = <&gpio1 8 0>;
61 fsl,mc13xxx-uses-regulator; 60 fsl,mc13xxx-uses-regulator;
62 }; 61 };
63 62
@@ -91,12 +90,12 @@
91 reg = <0x73fa8000 0x4000>; 90 reg = <0x73fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@73fbc000 { 93 uart1: uart@73fbc000 {
95 fsl,uart-has-rtscts; 94 fsl,uart-has-rtscts;
96 status = "okay"; 95 status = "okay";
97 }; 96 };
98 97
99 uart1: uart@73fc0000 { 98 uart2: uart@73fc0000 {
100 status = "okay"; 99 status = "okay";
101 }; 100 };
102 }; 101 };
@@ -127,7 +126,7 @@
127 126
128 power { 127 power {
129 label = "Power Button"; 128 label = "Power Button";
130 gpios = <&gpio1 21 0>; 129 gpios = <&gpio2 21 0>;
131 linux,code = <116>; /* KEY_POWER */ 130 linux,code = <116>; /* KEY_POWER */
132 gpio-key,wakeup; 131 gpio-key,wakeup;
133 }; 132 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 327ab8e3a4c8..6663986fe1c8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -14,9 +14,9 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 }; 20 };
21 21
22 tzic: tz-interrupt-controller@e0000000 { 22 tzic: tz-interrupt-controller@e0000000 {
@@ -86,7 +86,7 @@
86 status = "disabled"; 86 status = "disabled";
87 }; 87 };
88 88
89 uart2: uart@7000c000 { /* UART3 */ 89 uart3: uart@7000c000 {
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>; 91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>; 92 interrupts = <33>;
@@ -117,7 +117,7 @@
117 }; 117 };
118 }; 118 };
119 119
120 gpio0: gpio@73f84000 { /* GPIO1 */ 120 gpio1: gpio@73f84000 {
121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
122 reg = <0x73f84000 0x4000>; 122 reg = <0x73f84000 0x4000>;
123 interrupts = <50 51>; 123 interrupts = <50 51>;
@@ -127,7 +127,7 @@
127 #interrupt-cells = <1>; 127 #interrupt-cells = <1>;
128 }; 128 };
129 129
130 gpio1: gpio@73f88000 { /* GPIO2 */ 130 gpio2: gpio@73f88000 {
131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
132 reg = <0x73f88000 0x4000>; 132 reg = <0x73f88000 0x4000>;
133 interrupts = <52 53>; 133 interrupts = <52 53>;
@@ -137,7 +137,7 @@
137 #interrupt-cells = <1>; 137 #interrupt-cells = <1>;
138 }; 138 };
139 139
140 gpio2: gpio@73f8c000 { /* GPIO3 */ 140 gpio3: gpio@73f8c000 {
141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
142 reg = <0x73f8c000 0x4000>; 142 reg = <0x73f8c000 0x4000>;
143 interrupts = <54 55>; 143 interrupts = <54 55>;
@@ -147,7 +147,7 @@
147 #interrupt-cells = <1>; 147 #interrupt-cells = <1>;
148 }; 148 };
149 149
150 gpio3: gpio@73f90000 { /* GPIO4 */ 150 gpio4: gpio@73f90000 {
151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
152 reg = <0x73f90000 0x4000>; 152 reg = <0x73f90000 0x4000>;
153 interrupts = <56 57>; 153 interrupts = <56 57>;
@@ -171,14 +171,14 @@
171 status = "disabled"; 171 status = "disabled";
172 }; 172 };
173 173
174 uart0: uart@73fbc000 { 174 uart1: uart@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>; 176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>; 177 interrupts = <31>;
178 status = "disabled"; 178 status = "disabled";
179 }; 179 };
180 180
181 uart1: uart@73fc0000 { 181 uart2: uart@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>; 183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>; 184 interrupts = <32>;
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 2ab7f80a0a35..2dccce46ed81 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */ 32 cd-gpios = <&gpio1 1 0>;
33 wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */ 33 wp-gpios = <&gpio1 9 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 }; 36 };
@@ -44,7 +44,7 @@
44 reg = <0x53fa8000 0x4000>; 44 reg = <0x53fa8000 0x4000>;
45 }; 45 };
46 46
47 uart0: uart@53fbc000 { /* UART1 */ 47 uart1: uart@53fbc000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -67,7 +67,7 @@
67 compatible = "smsc,lan9220", "smsc,lan9115"; 67 compatible = "smsc,lan9220", "smsc,lan9115";
68 reg = <0xf4000000 0x2000000>; 68 reg = <0xf4000000 0x2000000>;
69 phy-mode = "mii"; 69 phy-mode = "mii";
70 interrupt-parent = <&gpio1>; 70 interrupt-parent = <&gpio2>;
71 interrupts = <31>; 71 interrupts = <31>;
72 reg-io-width = <4>; 72 reg-io-width = <4>;
73 smsc,irq-push-pull; 73 smsc,irq-push-pull;
@@ -79,34 +79,34 @@
79 79
80 home { 80 home {
81 label = "Home"; 81 label = "Home";
82 gpios = <&gpio4 10 0>; /* GPIO5_10 */ 82 gpios = <&gpio5 10 0>;
83 linux,code = <102>; /* KEY_HOME */ 83 linux,code = <102>; /* KEY_HOME */
84 gpio-key,wakeup; 84 gpio-key,wakeup;
85 }; 85 };
86 86
87 back { 87 back {
88 label = "Back"; 88 label = "Back";
89 gpios = <&gpio4 11 0>; /* GPIO5_11 */ 89 gpios = <&gpio5 11 0>;
90 linux,code = <158>; /* KEY_BACK */ 90 linux,code = <158>; /* KEY_BACK */
91 gpio-key,wakeup; 91 gpio-key,wakeup;
92 }; 92 };
93 93
94 program { 94 program {
95 label = "Program"; 95 label = "Program";
96 gpios = <&gpio4 12 0>; /* GPIO5_12 */ 96 gpios = <&gpio5 12 0>;
97 linux,code = <362>; /* KEY_PROGRAM */ 97 linux,code = <362>; /* KEY_PROGRAM */
98 gpio-key,wakeup; 98 gpio-key,wakeup;
99 }; 99 };
100 100
101 volume-up { 101 volume-up {
102 label = "Volume Up"; 102 label = "Volume Up";
103 gpios = <&gpio4 13 0>; /* GPIO5_13 */ 103 gpios = <&gpio5 13 0>;
104 linux,code = <115>; /* KEY_VOLUMEUP */ 104 linux,code = <115>; /* KEY_VOLUMEUP */
105 }; 105 };
106 106
107 volume-down { 107 volume-down {
108 label = "Volume Down"; 108 label = "Volume Down";
109 gpios = <&gpio3 0 0>; /* GPIO4_0 */ 109 gpios = <&gpio4 0 0>;
110 linux,code = <114>; /* KEY_VOLUMEDOWN */ 110 linux,code = <114>; /* KEY_VOLUMEDOWN */
111 }; 111 };
112 }; 112 };
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 3f3a88185ff8..5bac4aa4800b 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -29,15 +29,14 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */ 33 wp-gpios = <&gpio3 14 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
37 ecspi@50010000 { /* ECSPI1 */ 37 ecspi@50010000 { /* ECSPI1 */
38 fsl,spi-num-chipselects = <2>; 38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 39 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
40 <&gpio2 19 0>; /* GPIO3_19 */
41 status = "okay"; 40 status = "okay";
42 41
43 flash: at45db321d@1 { 42 flash: at45db321d@1 {
@@ -61,8 +60,8 @@
61 }; 60 };
62 61
63 esdhc@50020000 { /* ESDHC3 */ 62 esdhc@50020000 { /* ESDHC3 */
64 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 63 cd-gpios = <&gpio3 11 0>;
65 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 64 wp-gpios = <&gpio3 12 0>;
66 status = "okay"; 65 status = "okay";
67 }; 66 };
68 }; 67 };
@@ -76,7 +75,7 @@
76 reg = <0x53fa8000 0x4000>; 75 reg = <0x53fa8000 0x4000>;
77 }; 76 };
78 77
79 uart0: uart@53fbc000 { /* UART1 */ 78 uart1: uart@53fbc000 {
80 status = "okay"; 79 status = "okay";
81 }; 80 };
82 }; 81 };
@@ -102,7 +101,7 @@
102 101
103 fec@63fec000 { 102 fec@63fec000 {
104 phy-mode = "rmii"; 103 phy-mode = "rmii";
105 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 104 phy-reset-gpios = <&gpio7 6 0>;
106 status = "okay"; 105 status = "okay";
107 }; 106 };
108 }; 107 };
@@ -113,7 +112,7 @@
113 112
114 green { 113 green {
115 label = "Heartbeat"; 114 label = "Heartbeat";
116 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 115 gpios = <&gpio7 7 0>;
117 linux,default-trigger = "heartbeat"; 116 linux,default-trigger = "heartbeat";
118 }; 117 };
119 }; 118 };
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index ae6de6d0c3f1..5c57c8672c36 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -29,13 +29,13 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 status = "okay"; 33 status = "okay";
34 }; 34 };
35 35
36 esdhc@50020000 { /* ESDHC3 */ 36 esdhc@50020000 { /* ESDHC3 */
37 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 37 cd-gpios = <&gpio3 11 0>;
38 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 38 wp-gpios = <&gpio3 12 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 }; 41 };
@@ -49,7 +49,7 @@
49 reg = <0x53fa8000 0x4000>; 49 reg = <0x53fa8000 0x4000>;
50 }; 50 };
51 51
52 uart0: uart@53fbc000 { /* UART1 */ 52 uart1: uart@53fbc000 {
53 status = "okay"; 53 status = "okay";
54 }; 54 };
55 }; 55 };
@@ -84,7 +84,7 @@
84 84
85 fec@63fec000 { 85 fec@63fec000 {
86 phy-mode = "rmii"; 86 phy-mode = "rmii";
87 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 87 phy-reset-gpios = <&gpio7 6 0>;
88 status = "okay"; 88 status = "okay";
89 }; 89 };
90 }; 90 };
@@ -95,20 +95,20 @@
95 95
96 power { 96 power {
97 label = "Power Button"; 97 label = "Power Button";
98 gpios = <&gpio0 8 0>; /* GPIO1_8 */ 98 gpios = <&gpio1 8 0>;
99 linux,code = <116>; /* KEY_POWER */ 99 linux,code = <116>; /* KEY_POWER */
100 gpio-key,wakeup; 100 gpio-key,wakeup;
101 }; 101 };
102 102
103 volume-up { 103 volume-up {
104 label = "Volume Up"; 104 label = "Volume Up";
105 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 105 gpios = <&gpio2 14 0>;
106 linux,code = <115>; /* KEY_VOLUMEUP */ 106 linux,code = <115>; /* KEY_VOLUMEUP */
107 }; 107 };
108 108
109 volume-down { 109 volume-down {
110 label = "Volume Down"; 110 label = "Volume Down";
111 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 111 gpios = <&gpio2 15 0>;
112 linux,code = <114>; /* KEY_VOLUMEDOWN */ 112 linux,code = <114>; /* KEY_VOLUMEDOWN */
113 }; 113 };
114 }; 114 };
@@ -118,7 +118,7 @@
118 118
119 user { 119 user {
120 label = "Heartbeat"; 120 label = "Heartbeat";
121 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 121 gpios = <&gpio7 7 0>;
122 linux,default-trigger = "heartbeat"; 122 linux,default-trigger = "heartbeat";
123 }; 123 };
124 }; 124 };
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index b1c062eea715..c7ee86c2dfb5 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */ 33 wp-gpios = <&gpio4 11 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
@@ -39,15 +39,14 @@
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
42 uart2: uart@5000c000 { /* UART3 */ 42 uart3: uart@5000c000 {
43 fsl,uart-has-rtscts; 43 fsl,uart-has-rtscts;
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 ecspi@50010000 { /* ECSPI1 */ 47 ecspi@50010000 { /* ECSPI1 */
48 fsl,spi-num-chipselects = <2>; 48 fsl,spi-num-chipselects = <2>;
49 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 49 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
50 <&gpio2 19 0>; /* GPIO3_19 */
51 status = "okay"; 50 status = "okay";
52 51
53 zigbee: mc1323@0 { 52 zigbee: mc1323@0 {
@@ -91,11 +90,11 @@
91 reg = <0x53fa8000 0x4000>; 90 reg = <0x53fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@53fbc000 { /* UART1 */ 93 uart1: uart@53fbc000 {
95 status = "okay"; 94 status = "okay";
96 }; 95 };
97 96
98 uart1: uart@53fc0000 { /* UART2 */ 97 uart2: uart@53fc0000 {
99 status = "okay"; 98 status = "okay";
100 }; 99 };
101 }; 100 };
@@ -145,7 +144,7 @@
145 144
146 fec@63fec000 { 145 fec@63fec000 {
147 phy-mode = "rmii"; 146 phy-mode = "rmii";
148 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 147 phy-reset-gpios = <&gpio7 6 0>;
149 status = "okay"; 148 status = "okay";
150 }; 149 };
151 }; 150 };
@@ -156,13 +155,13 @@
156 155
157 volume-up { 156 volume-up {
158 label = "Volume Up"; 157 label = "Volume Up";
159 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 158 gpios = <&gpio2 14 0>;
160 linux,code = <115>; /* KEY_VOLUMEUP */ 159 linux,code = <115>; /* KEY_VOLUMEUP */
161 }; 160 };
162 161
163 volume-down { 162 volume-down {
164 label = "Volume Down"; 163 label = "Volume Down";
165 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 164 gpios = <&gpio2 15 0>;
166 linux,code = <114>; /* KEY_VOLUMEDOWN */ 165 linux,code = <114>; /* KEY_VOLUMEDOWN */
167 }; 166 };
168 }; 167 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 099cd84ee372..5dd91b942c91 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 tzic: tz-interrupt-controller@0fffc000 { 24 tzic: tz-interrupt-controller@0fffc000 {
@@ -88,7 +88,7 @@
88 status = "disabled"; 88 status = "disabled";
89 }; 89 };
90 90
91 uart2: uart@5000c000 { /* UART3 */ 91 uart3: uart@5000c000 {
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>; 93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>; 94 interrupts = <33>;
@@ -119,7 +119,7 @@
119 }; 119 };
120 }; 120 };
121 121
122 gpio0: gpio@53f84000 { /* GPIO1 */ 122 gpio1: gpio@53f84000 {
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>; 124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>; 125 interrupts = <50 51>;
@@ -129,7 +129,7 @@
129 #interrupt-cells = <1>; 129 #interrupt-cells = <1>;
130 }; 130 };
131 131
132 gpio1: gpio@53f88000 { /* GPIO2 */ 132 gpio2: gpio@53f88000 {
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>; 134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>; 135 interrupts = <52 53>;
@@ -139,7 +139,7 @@
139 #interrupt-cells = <1>; 139 #interrupt-cells = <1>;
140 }; 140 };
141 141
142 gpio2: gpio@53f8c000 { /* GPIO3 */ 142 gpio3: gpio@53f8c000 {
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>; 144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>; 145 interrupts = <54 55>;
@@ -149,7 +149,7 @@
149 #interrupt-cells = <1>; 149 #interrupt-cells = <1>;
150 }; 150 };
151 151
152 gpio3: gpio@53f90000 { /* GPIO4 */ 152 gpio4: gpio@53f90000 {
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>; 154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>; 155 interrupts = <56 57>;
@@ -173,21 +173,21 @@
173 status = "disabled"; 173 status = "disabled";
174 }; 174 };
175 175
176 uart0: uart@53fbc000 { /* UART1 */ 176 uart1: uart@53fbc000 {
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>; 178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>; 179 interrupts = <31>;
180 status = "disabled"; 180 status = "disabled";
181 }; 181 };
182 182
183 uart1: uart@53fc0000 { /* UART2 */ 183 uart2: uart@53fc0000 {
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>; 185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>; 186 interrupts = <32>;
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
190 gpio4: gpio@53fdc000 { /* GPIO5 */ 190 gpio5: gpio@53fdc000 {
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>; 192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>; 193 interrupts = <103 104>;
@@ -197,7 +197,7 @@
197 #interrupt-cells = <1>; 197 #interrupt-cells = <1>;
198 }; 198 };
199 199
200 gpio5: gpio@53fe0000 { /* GPIO6 */ 200 gpio6: gpio@53fe0000 {
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>; 202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>; 203 interrupts = <105 106>;
@@ -207,7 +207,7 @@
207 #interrupt-cells = <1>; 207 #interrupt-cells = <1>;
208 }; 208 };
209 209
210 gpio6: gpio@53fe4000 { /* GPIO7 */ 210 gpio7: gpio@53fe4000 {
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>; 212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>; 213 interrupts = <107 108>;
@@ -226,7 +226,7 @@
226 status = "disabled"; 226 status = "disabled";
227 }; 227 };
228 228
229 uart3: uart@53ff0000 { /* UART4 */ 229 uart4: uart@53ff0000 {
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>; 231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>; 232 interrupts = <13>;
@@ -241,7 +241,7 @@
241 reg = <0x60000000 0x10000000>; 241 reg = <0x60000000 0x10000000>;
242 ranges; 242 ranges;
243 243
244 uart4: uart@63f90000 { /* UART5 */ 244 uart5: uart@63f90000 {
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>; 246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>; 247 interrupts = <86>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 072974e443f2..c3977e0478b9 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -14,8 +14,8 @@
14/include/ "imx6q.dtsi" 14/include/ "imx6q.dtsi"
15 15
16/ { 16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board"; 17 model = "Freescale i.MX6 Quad Armadillo2 Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; 18 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
19 19
20 chosen { 20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; 21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
@@ -34,8 +34,8 @@
34 }; 34 };
35 35
36 usdhc@02198000 { /* uSDHC3 */ 36 usdhc@02198000 { /* uSDHC3 */
37 cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */ 37 cd-gpios = <&gpio6 11 0>;
38 wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */ 38 wp-gpios = <&gpio6 14 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
@@ -44,7 +44,7 @@
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 uart3: uart@021f0000 { /* UART4 */ 47 uart4: uart@021f0000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -55,7 +55,7 @@
55 55
56 debug-led { 56 debug-led {
57 label = "Heartbeat"; 57 label = "Heartbeat";
58 gpios = <&gpio2 25 0>; /* GPIO3_25 */ 58 gpios = <&gpio3 25 0>;
59 linux,default-trigger = "heartbeat"; 59 linux,default-trigger = "heartbeat";
60 }; 60 };
61 }; 61 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
new file mode 100644
index 000000000000..08d920de7286
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -0,0 +1,49 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Lite Board";
18 compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 soc {
25 aips-bus@02100000 { /* AIPS2 */
26 enet@02188000 {
27 phy-mode = "rgmii";
28 phy-reset-gpios = <&gpio3 23 0>;
29 status = "okay";
30 };
31
32 usdhc@02198000 { /* uSDHC3 */
33 cd-gpios = <&gpio7 0 0>;
34 wp-gpios = <&gpio7 1 0>;
35 status = "okay";
36 };
37
38 usdhc@0219c000 { /* uSDHC4 */
39 cd-gpios = <&gpio2 6 0>;
40 wp-gpios = <&gpio2 7 0>;
41 status = "okay";
42 };
43
44 uart2: uart@021e8000 {
45 status = "okay";
46 };
47 };
48 };
49};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 7dda599558cc..263e8f3664b5 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 cpus { 24 cpus {
@@ -165,7 +165,7 @@
165 status = "disabled"; 165 status = "disabled";
166 }; 166 };
167 167
168 uart0: uart@02020000 { /* UART1 */ 168 uart1: uart@02020000 {
169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
170 reg = <0x02020000 0x4000>; 170 reg = <0x02020000 0x4000>;
171 interrupts = <0 26 0x04>; 171 interrupts = <0 26 0x04>;
@@ -247,7 +247,7 @@
247 interrupts = <0 55 0x04>; 247 interrupts = <0 55 0x04>;
248 }; 248 };
249 249
250 gpio0: gpio@0209c000 { /* GPIO1 */ 250 gpio1: gpio@0209c000 {
251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
252 reg = <0x0209c000 0x4000>; 252 reg = <0x0209c000 0x4000>;
253 interrupts = <0 66 0x04 0 67 0x04>; 253 interrupts = <0 66 0x04 0 67 0x04>;
@@ -257,7 +257,7 @@
257 #interrupt-cells = <1>; 257 #interrupt-cells = <1>;
258 }; 258 };
259 259
260 gpio1: gpio@020a0000 { /* GPIO2 */ 260 gpio2: gpio@020a0000 {
261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
262 reg = <0x020a0000 0x4000>; 262 reg = <0x020a0000 0x4000>;
263 interrupts = <0 68 0x04 0 69 0x04>; 263 interrupts = <0 68 0x04 0 69 0x04>;
@@ -267,7 +267,7 @@
267 #interrupt-cells = <1>; 267 #interrupt-cells = <1>;
268 }; 268 };
269 269
270 gpio2: gpio@020a4000 { /* GPIO3 */ 270 gpio3: gpio@020a4000 {
271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
272 reg = <0x020a4000 0x4000>; 272 reg = <0x020a4000 0x4000>;
273 interrupts = <0 70 0x04 0 71 0x04>; 273 interrupts = <0 70 0x04 0 71 0x04>;
@@ -277,7 +277,7 @@
277 #interrupt-cells = <1>; 277 #interrupt-cells = <1>;
278 }; 278 };
279 279
280 gpio3: gpio@020a8000 { /* GPIO4 */ 280 gpio4: gpio@020a8000 {
281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
282 reg = <0x020a8000 0x4000>; 282 reg = <0x020a8000 0x4000>;
283 interrupts = <0 72 0x04 0 73 0x04>; 283 interrupts = <0 72 0x04 0 73 0x04>;
@@ -287,7 +287,7 @@
287 #interrupt-cells = <1>; 287 #interrupt-cells = <1>;
288 }; 288 };
289 289
290 gpio4: gpio@020ac000 { /* GPIO5 */ 290 gpio5: gpio@020ac000 {
291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
292 reg = <0x020ac000 0x4000>; 292 reg = <0x020ac000 0x4000>;
293 interrupts = <0 74 0x04 0 75 0x04>; 293 interrupts = <0 74 0x04 0 75 0x04>;
@@ -297,7 +297,7 @@
297 #interrupt-cells = <1>; 297 #interrupt-cells = <1>;
298 }; 298 };
299 299
300 gpio5: gpio@020b0000 { /* GPIO6 */ 300 gpio6: gpio@020b0000 {
301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
302 reg = <0x020b0000 0x4000>; 302 reg = <0x020b0000 0x4000>;
303 interrupts = <0 76 0x04 0 77 0x04>; 303 interrupts = <0 76 0x04 0 77 0x04>;
@@ -307,7 +307,7 @@
307 #interrupt-cells = <1>; 307 #interrupt-cells = <1>;
308 }; 308 };
309 309
310 gpio6: gpio@020b4000 { /* GPIO7 */ 310 gpio7: gpio@020b4000 {
311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
312 reg = <0x020b4000 0x4000>; 312 reg = <0x020b4000 0x4000>;
313 interrupts = <0 78 0x04 0 79 0x04>; 313 interrupts = <0 78 0x04 0 79 0x04>;
@@ -543,28 +543,28 @@
543 interrupts = <0 18 0x04>; 543 interrupts = <0 18 0x04>;
544 }; 544 };
545 545
546 uart1: uart@021e8000 { /* UART2 */ 546 uart2: uart@021e8000 {
547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
548 reg = <0x021e8000 0x4000>; 548 reg = <0x021e8000 0x4000>;
549 interrupts = <0 27 0x04>; 549 interrupts = <0 27 0x04>;
550 status = "disabled"; 550 status = "disabled";
551 }; 551 };
552 552
553 uart2: uart@021ec000 { /* UART3 */ 553 uart3: uart@021ec000 {
554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
555 reg = <0x021ec000 0x4000>; 555 reg = <0x021ec000 0x4000>;
556 interrupts = <0 28 0x04>; 556 interrupts = <0 28 0x04>;
557 status = "disabled"; 557 status = "disabled";
558 }; 558 };
559 559
560 uart3: uart@021f0000 { /* UART4 */ 560 uart4: uart@021f0000 {
561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
562 reg = <0x021f0000 0x4000>; 562 reg = <0x021f0000 0x4000>;
563 interrupts = <0 29 0x04>; 563 interrupts = <0 29 0x04>;
564 status = "disabled"; 564 status = "disabled";
565 }; 565 };
566 566
567 uart4: uart@021f4000 { /* UART5 */ 567 uart5: uart@021f4000 {
568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
569 reg = <0x021f4000 0x4000>; 569 reg = <0x021f4000 0x4000>;
570 interrupts = <0 30 0x04>; 570 interrupts = <0 30 0x04>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
new file mode 100644
index 000000000000..f2ab4ea7cc0e
--- /dev/null
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -0,0 +1,67 @@
1/*
2 * Device Tree Source for OMAP2 SoC
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
15
16 aliases {
17 serial0 = &uart1;
18 serial1 = &uart2;
19 serial2 = &uart3;
20 };
21
22 cpus {
23 cpu@0 {
24 compatible = "arm,arm1136jf-s";
25 };
26 };
27
28 soc {
29 compatible = "ti,omap-infra";
30 mpu {
31 compatible = "ti,omap2-mpu";
32 ti,hwmods = "mpu";
33 };
34 };
35
36 ocp {
37 compatible = "simple-bus";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges;
41 ti,hwmods = "l3_main";
42
43 intc: interrupt-controller@1 {
44 compatible = "ti,omap2-intc";
45 interrupt-controller;
46 #interrupt-cells = <1>;
47 };
48
49 uart1: serial@4806a000 {
50 compatible = "ti,omap2-uart";
51 ti,hwmods = "uart1";
52 clock-frequency = <48000000>;
53 };
54
55 uart2: serial@4806c000 {
56 compatible = "ti,omap2-uart";
57 ti,hwmods = "uart2";
58 clock-frequency = <48000000>;
59 };
60
61 uart3: serial@4806e000 {
62 compatible = "ti,omap2-uart";
63 ti,hwmods = "uart3";
64 clock-frequency = <48000000>;
65 };
66 };
67};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index d202bb5ec7ef..216c3317461d 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -13,6 +13,13 @@
13/ { 13/ {
14 compatible = "ti,omap3430", "ti,omap3"; 14 compatible = "ti,omap3430", "ti,omap3";
15 15
16 aliases {
17 serial0 = &uart1;
18 serial1 = &uart2;
19 serial2 = &uart3;
20 serial3 = &uart4;
21 };
22
16 cpus { 23 cpus {
17 cpu@0 { 24 cpu@0 {
18 compatible = "arm,cortex-a8"; 25 compatible = "arm,cortex-a8";
@@ -59,5 +66,29 @@
59 interrupt-controller; 66 interrupt-controller;
60 #interrupt-cells = <1>; 67 #interrupt-cells = <1>;
61 }; 68 };
69
70 uart1: serial@0x4806a000 {
71 compatible = "ti,omap3-uart";
72 ti,hwmods = "uart1";
73 clock-frequency = <48000000>;
74 };
75
76 uart2: serial@0x4806c000 {
77 compatible = "ti,omap3-uart";
78 ti,hwmods = "uart2";
79 clock-frequency = <48000000>;
80 };
81
82 uart3: serial@0x49020000 {
83 compatible = "ti,omap3-uart";
84 ti,hwmods = "uart3";
85 clock-frequency = <48000000>;
86 };
87
88 uart4: serial@0x49042000 {
89 compatible = "ti,omap3-uart";
90 ti,hwmods = "uart4";
91 clock-frequency = <48000000>;
92 };
62 }; 93 };
63}; 94};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 4c61c829043a..e8fe75fac7c5 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -21,6 +21,10 @@
21 interrupt-parent = <&gic>; 21 interrupt-parent = <&gic>;
22 22
23 aliases { 23 aliases {
24 serial0 = &uart1;
25 serial1 = &uart2;
26 serial2 = &uart3;
27 serial3 = &uart4;
24 }; 28 };
25 29
26 cpus { 30 cpus {
@@ -99,5 +103,29 @@
99 reg = <0x48241000 0x1000>, 103 reg = <0x48241000 0x1000>,
100 <0x48240100 0x0100>; 104 <0x48240100 0x0100>;
101 }; 105 };
106
107 uart1: serial@0x4806a000 {
108 compatible = "ti,omap4-uart";
109 ti,hwmods = "uart1";
110 clock-frequency = <48000000>;
111 };
112
113 uart2: serial@0x4806c000 {
114 compatible = "ti,omap4-uart";
115 ti,hwmods = "uart2";
116 clock-frequency = <48000000>;
117 };
118
119 uart3: serial@0x48020000 {
120 compatible = "ti,omap4-uart";
121 ti,hwmods = "uart3";
122 clock-frequency = <48000000>;
123 };
124
125 uart4: serial@0x4806e000 {
126 compatible = "ti,omap4-uart";
127 ti,hwmods = "uart4";
128 clock-frequency = <48000000>;
129 };
102 }; 130 };
103}; 131};
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts
new file mode 100644
index 000000000000..70c41fc897d7
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-cardhu.dts
@@ -0,0 +1,36 @@
1/dts-v1/;
2
3/include/ "tegra30.dtsi"
4
5/ {
6 model = "NVIDIA Tegra30 Cardhu evaluation board";
7 compatible = "nvidia,cardhu", "nvidia,tegra30";
8
9 memory {
10 reg = < 0x80000000 0x40000000 >;
11 };
12
13 serial@70006000 {
14 clock-frequency = < 408000000 >;
15 };
16
17 i2c@7000c000 {
18 clock-frequency = <100000>;
19 };
20
21 i2c@7000c400 {
22 clock-frequency = <100000>;
23 };
24
25 i2c@7000c500 {
26 clock-frequency = <100000>;
27 };
28
29 i2c@7000c700 {
30 clock-frequency = <100000>;
31 };
32
33 i2c@7000d000 {
34 clock-frequency = <100000>;
35 };
36};
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 0e225b86b652..80afa1b70b80 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -1,16 +1,11 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/memreserve/ 0x1c000000 0x04000000;
4/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
5 4
6/ { 5/ {
7 model = "NVIDIA Tegra2 Harmony evaluation board"; 6 model = "NVIDIA Tegra2 Harmony evaluation board";
8 compatible = "nvidia,harmony", "nvidia,tegra20"; 7 compatible = "nvidia,harmony", "nvidia,tegra20";
9 8
10 chosen {
11 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait";
12 };
13
14 memory@0 { 9 memory@0 {
15 reg = < 0x00000000 0x40000000 >; 10 reg = < 0x00000000 0x40000000 >;
16 }; 11 };
@@ -52,16 +47,40 @@
52 ext-mic-en-gpios = <&gpio 185 0>; 47 ext-mic-en-gpios = <&gpio 185 0>;
53 }; 48 };
54 49
50 serial@70006000 {
51 status = "disable";
52 };
53
54 serial@70006040 {
55 status = "disable";
56 };
57
58 serial@70006200 {
59 status = "disable";
60 };
61
55 serial@70006300 { 62 serial@70006300 {
56 clock-frequency = < 216000000 >; 63 clock-frequency = < 216000000 >;
57 }; 64 };
58 65
66 serial@70006400 {
67 status = "disable";
68 };
69
70 sdhci@c8000000 {
71 status = "disable";
72 };
73
59 sdhci@c8000200 { 74 sdhci@c8000200 {
60 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 75 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
61 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 76 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
62 power-gpios = <&gpio 155 0>; /* gpio PT3 */ 77 power-gpios = <&gpio 155 0>; /* gpio PT3 */
63 }; 78 };
64 79
80 sdhci@c8000400 {
81 status = "disable";
82 };
83
65 sdhci@c8000600 { 84 sdhci@c8000600 {
66 cd-gpios = <&gpio 58 0>; /* gpio PH2 */ 85 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
67 wp-gpios = <&gpio 59 0>; /* gpio PH3 */ 86 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
new file mode 100644
index 000000000000..1a1d7023b69b
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -0,0 +1,77 @@
1/dts-v1/;
2
3/include/ "tegra20.dtsi"
4
5/ {
6 model = "Toshiba AC100 / Dynabook AZ";
7 compatible = "compal,paz00", "nvidia,tegra20";
8
9 memory@0 {
10 reg = <0x00000000 0x20000000>;
11 };
12
13 i2c@7000c000 {
14 clock-frequency = <400000>;
15 };
16
17 i2c@7000c400 {
18 clock-frequency = <400000>;
19 };
20
21 i2c@7000c500 {
22 status = "disable";
23 };
24
25 nvec@7000c500 {
26 #address-cells = <1>;
27 #size-cells = <0>;
28 compatible = "nvidia,nvec";
29 reg = <0x7000C500 0x100>;
30 interrupts = <0 92 0x04>;
31 clock-frequency = <80000>;
32 request-gpios = <&gpio 170 0>;
33 slave-addr = <138>;
34 };
35
36 i2c@7000d000 {
37 clock-frequency = <400000>;
38 };
39
40 serial@70006000 {
41 clock-frequency = <216000000>;
42 };
43
44 serial@70006040 {
45 status = "disable";
46 };
47
48 serial@70006200 {
49 status = "disable";
50 };
51
52 serial@70006300 {
53 clock-frequency = <216000000>;
54 };
55
56 serial@70006400 {
57 status = "disable";
58 };
59
60 sdhci@c8000000 {
61 cd-gpios = <&gpio 173 0>; /* gpio PV5 */
62 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
63 power-gpios = <&gpio 155 0>; /* gpio PT3 */
64 };
65
66 sdhci@c8000200 {
67 status = "disable";
68 };
69
70 sdhci@c8000400 {
71 status = "disable";
72 };
73
74 sdhci@c8000600 {
75 support-8bit;
76 };
77};
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index a72299b8e668..b55a02e34ba7 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -1,25 +1,65 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/memreserve/ 0x1c000000 0x04000000;
4/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
5 4
6/ { 5/ {
7 model = "NVIDIA Seaboard"; 6 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20"; 7 compatible = "nvidia,seaboard", "nvidia,tegra20";
9 8
10 chosen {
11 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
12 };
13
14 memory { 9 memory {
15 device_type = "memory"; 10 device_type = "memory";
16 reg = < 0x00000000 0x40000000 >; 11 reg = < 0x00000000 0x40000000 >;
17 }; 12 };
18 13
14 i2c@7000c000 {
15 clock-frequency = <400000>;
16 };
17
18 i2c@7000c400 {
19 clock-frequency = <400000>;
20 };
21
22 i2c@7000c500 {
23 clock-frequency = <400000>;
24 };
25
26 i2c@7000d000 {
27 clock-frequency = <400000>;
28
29 adt7461@4c {
30 compatible = "adt7461";
31 reg = <0x4c>;
32 };
33 };
34
35 serial@70006000 {
36 status = "disable";
37 };
38
39 serial@70006040 {
40 status = "disable";
41 };
42
43 serial@70006200 {
44 status = "disable";
45 };
46
19 serial@70006300 { 47 serial@70006300 {
20 clock-frequency = < 216000000 >; 48 clock-frequency = < 216000000 >;
21 }; 49 };
22 50
51 serial@70006400 {
52 status = "disable";
53 };
54
55 sdhci@c8000000 {
56 status = "disable";
57 };
58
59 sdhci@c8000200 {
60 status = "disable";
61 };
62
23 sdhci@c8000400 { 63 sdhci@c8000400 {
24 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 64 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
25 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 65 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
@@ -29,4 +69,28 @@
29 sdhci@c8000600 { 69 sdhci@c8000600 {
30 support-8bit; 70 support-8bit;
31 }; 71 };
72
73 usb@c5000000 {
74 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
75 };
76
77 gpio-keys {
78 compatible = "gpio-keys";
79
80 power {
81 label = "Power";
82 gpios = <&gpio 170 1>; /* gpio PV2, active low */
83 linux,code = <116>; /* KEY_POWER */
84 gpio-key,wakeup;
85 };
86
87 lid {
88 label = "Lid";
89 gpios = <&gpio 23 0>; /* gpio PC7 */
90 linux,input-type = <5>; /* EV_SW */
91 linux,code = <0>; /* SW_LID */
92 debounce-interval = <1>;
93 gpio-key,wakeup;
94 };
95 };
32}; 96};
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
new file mode 100644
index 000000000000..3b3ee7db99f3
--- /dev/null
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -0,0 +1,65 @@
1/dts-v1/;
2
3/include/ "tegra20.dtsi"
4
5/ {
6 model = "Compulab TrimSlice board";
7 compatible = "compulab,trimslice", "nvidia,tegra20";
8
9 memory@0 {
10 reg = < 0x00000000 0x40000000 >;
11 };
12
13 i2c@7000c000 {
14 clock-frequency = <400000>;
15 };
16
17 i2c@7000c400 {
18 clock-frequency = <400000>;
19 };
20
21 i2c@7000c500 {
22 clock-frequency = <400000>;
23 };
24
25 i2c@7000d000 {
26 status = "disable";
27 };
28
29 serial@70006000 {
30 clock-frequency = < 216000000 >;
31 };
32
33 serial@70006040 {
34 status = "disable";
35 };
36
37 serial@70006200 {
38 status = "disable";
39 };
40
41 serial@70006300 {
42 status = "disable";
43 };
44
45 serial@70006400 {
46 status = "disable";
47 };
48
49 sdhci@c8000000 {
50 status = "disable";
51 };
52
53 sdhci@c8000200 {
54 status = "disable";
55 };
56
57 sdhci@c8000400 {
58 status = "disable";
59 };
60
61 sdhci@c8000600 {
62 cd-gpios = <&gpio 121 0>;
63 wp-gpios = <&gpio 122 0>;
64 };
65};
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 3f9abd6b6964..c7d3b87f29df 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -1,24 +1,59 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/memreserve/ 0x1c000000 0x04000000;
4/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
5 4
6/ { 5/ {
7 model = "NVIDIA Tegra2 Ventana evaluation board"; 6 model = "NVIDIA Tegra2 Ventana evaluation board";
8 compatible = "nvidia,ventana", "nvidia,tegra20"; 7 compatible = "nvidia,ventana", "nvidia,tegra20";
9 8
10 chosen {
11 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init";
12 };
13
14 memory { 9 memory {
15 reg = < 0x00000000 0x40000000 >; 10 reg = < 0x00000000 0x40000000 >;
16 }; 11 };
17 12
13 i2c@7000c000 {
14 clock-frequency = <400000>;
15 };
16
17 i2c@7000c400 {
18 clock-frequency = <400000>;
19 };
20
21 i2c@7000c500 {
22 clock-frequency = <400000>;
23 };
24
25 i2c@7000d000 {
26 clock-frequency = <400000>;
27 };
28
29 serial@70006000 {
30 status = "disable";
31 };
32
33 serial@70006040 {
34 status = "disable";
35 };
36
37 serial@70006200 {
38 status = "disable";
39 };
40
18 serial@70006300 { 41 serial@70006300 {
19 clock-frequency = < 216000000 >; 42 clock-frequency = < 216000000 >;
20 }; 43 };
21 44
45 serial@70006400 {
46 status = "disable";
47 };
48
49 sdhci@c8000000 {
50 status = "disable";
51 };
52
53 sdhci@c8000200 {
54 status = "disable";
55 };
56
22 sdhci@c8000400 { 57 sdhci@c8000400 {
23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 58 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 59 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 65d7e6a333eb..3da7afd45322 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -5,9 +5,9 @@
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 intc: interrupt-controller@50041000 { 7 intc: interrupt-controller@50041000 {
8 compatible = "nvidia,tegra20-gic"; 8 compatible = "arm,cortex-a9-gic";
9 interrupt-controller; 9 interrupt-controller;
10 #interrupt-cells = <1>; 10 #interrupt-cells = <3>;
11 reg = < 0x50041000 0x1000 >, 11 reg = < 0x50041000 0x1000 >,
12 < 0x50040100 0x0100 >; 12 < 0x50040100 0x0100 >;
13 }; 13 };
@@ -17,7 +17,7 @@
17 #size-cells = <0>; 17 #size-cells = <0>;
18 compatible = "nvidia,tegra20-i2c"; 18 compatible = "nvidia,tegra20-i2c";
19 reg = <0x7000C000 0x100>; 19 reg = <0x7000C000 0x100>;
20 interrupts = < 70 >; 20 interrupts = < 0 38 0x04 >;
21 }; 21 };
22 22
23 i2c@7000c400 { 23 i2c@7000c400 {
@@ -25,7 +25,7 @@
25 #size-cells = <0>; 25 #size-cells = <0>;
26 compatible = "nvidia,tegra20-i2c"; 26 compatible = "nvidia,tegra20-i2c";
27 reg = <0x7000C400 0x100>; 27 reg = <0x7000C400 0x100>;
28 interrupts = < 116 >; 28 interrupts = < 0 84 0x04 >;
29 }; 29 };
30 30
31 i2c@7000c500 { 31 i2c@7000c500 {
@@ -33,38 +33,32 @@
33 #size-cells = <0>; 33 #size-cells = <0>;
34 compatible = "nvidia,tegra20-i2c"; 34 compatible = "nvidia,tegra20-i2c";
35 reg = <0x7000C500 0x100>; 35 reg = <0x7000C500 0x100>;
36 interrupts = < 124 >; 36 interrupts = < 0 92 0x04 >;
37 }; 37 };
38 38
39 i2c@7000d000 { 39 i2c@7000d000 {
40 #address-cells = <1>; 40 #address-cells = <1>;
41 #size-cells = <0>; 41 #size-cells = <0>;
42 compatible = "nvidia,tegra20-i2c"; 42 compatible = "nvidia,tegra20-i2c-dvc";
43 reg = <0x7000D000 0x200>; 43 reg = <0x7000D000 0x200>;
44 interrupts = < 85 >; 44 interrupts = < 0 53 0x04 >;
45 }; 45 };
46 46
47 i2s@70002800 { 47 i2s@70002800 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 compatible = "nvidia,tegra20-i2s"; 48 compatible = "nvidia,tegra20-i2s";
51 reg = <0x70002800 0x200>; 49 reg = <0x70002800 0x200>;
52 interrupts = < 45 >; 50 interrupts = < 0 13 0x04 >;
53 dma-channel = < 2 >; 51 dma-channel = < 2 >;
54 }; 52 };
55 53
56 i2s@70002a00 { 54 i2s@70002a00 {
57 #address-cells = <1>;
58 #size-cells = <0>;
59 compatible = "nvidia,tegra20-i2s"; 55 compatible = "nvidia,tegra20-i2s";
60 reg = <0x70002a00 0x200>; 56 reg = <0x70002a00 0x200>;
61 interrupts = < 35 >; 57 interrupts = < 0 3 0x04 >;
62 dma-channel = < 1 >; 58 dma-channel = < 1 >;
63 }; 59 };
64 60
65 das@70000c00 { 61 das@70000c00 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "nvidia,tegra20-das"; 62 compatible = "nvidia,tegra20-das";
69 reg = <0x70000c00 0x80>; 63 reg = <0x70000c00 0x80>;
70 }; 64 };
@@ -72,7 +66,13 @@
72 gpio: gpio@6000d000 { 66 gpio: gpio@6000d000 {
73 compatible = "nvidia,tegra20-gpio"; 67 compatible = "nvidia,tegra20-gpio";
74 reg = < 0x6000d000 0x1000 >; 68 reg = < 0x6000d000 0x1000 >;
75 interrupts = < 64 65 66 67 87 119 121 >; 69 interrupts = < 0 32 0x04
70 0 33 0x04
71 0 34 0x04
72 0 35 0x04
73 0 55 0x04
74 0 87 0x04
75 0 89 0x04 >;
76 #gpio-cells = <2>; 76 #gpio-cells = <2>;
77 gpio-controller; 77 gpio-controller;
78 }; 78 };
@@ -89,59 +89,80 @@
89 compatible = "nvidia,tegra20-uart"; 89 compatible = "nvidia,tegra20-uart";
90 reg = <0x70006000 0x40>; 90 reg = <0x70006000 0x40>;
91 reg-shift = <2>; 91 reg-shift = <2>;
92 interrupts = < 68 >; 92 interrupts = < 0 36 0x04 >;
93 }; 93 };
94 94
95 serial@70006040 { 95 serial@70006040 {
96 compatible = "nvidia,tegra20-uart"; 96 compatible = "nvidia,tegra20-uart";
97 reg = <0x70006040 0x40>; 97 reg = <0x70006040 0x40>;
98 reg-shift = <2>; 98 reg-shift = <2>;
99 interrupts = < 69 >; 99 interrupts = < 0 37 0x04 >;
100 }; 100 };
101 101
102 serial@70006200 { 102 serial@70006200 {
103 compatible = "nvidia,tegra20-uart"; 103 compatible = "nvidia,tegra20-uart";
104 reg = <0x70006200 0x100>; 104 reg = <0x70006200 0x100>;
105 reg-shift = <2>; 105 reg-shift = <2>;
106 interrupts = < 78 >; 106 interrupts = < 0 46 0x04 >;
107 }; 107 };
108 108
109 serial@70006300 { 109 serial@70006300 {
110 compatible = "nvidia,tegra20-uart"; 110 compatible = "nvidia,tegra20-uart";
111 reg = <0x70006300 0x100>; 111 reg = <0x70006300 0x100>;
112 reg-shift = <2>; 112 reg-shift = <2>;
113 interrupts = < 122 >; 113 interrupts = < 0 90 0x04 >;
114 }; 114 };
115 115
116 serial@70006400 { 116 serial@70006400 {
117 compatible = "nvidia,tegra20-uart"; 117 compatible = "nvidia,tegra20-uart";
118 reg = <0x70006400 0x100>; 118 reg = <0x70006400 0x100>;
119 reg-shift = <2>; 119 reg-shift = <2>;
120 interrupts = < 123 >; 120 interrupts = < 0 91 0x04 >;
121 }; 121 };
122 122
123 sdhci@c8000000 { 123 sdhci@c8000000 {
124 compatible = "nvidia,tegra20-sdhci"; 124 compatible = "nvidia,tegra20-sdhci";
125 reg = <0xc8000000 0x200>; 125 reg = <0xc8000000 0x200>;
126 interrupts = < 46 >; 126 interrupts = < 0 14 0x04 >;
127 }; 127 };
128 128
129 sdhci@c8000200 { 129 sdhci@c8000200 {
130 compatible = "nvidia,tegra20-sdhci"; 130 compatible = "nvidia,tegra20-sdhci";
131 reg = <0xc8000200 0x200>; 131 reg = <0xc8000200 0x200>;
132 interrupts = < 47 >; 132 interrupts = < 0 15 0x04 >;
133 }; 133 };
134 134
135 sdhci@c8000400 { 135 sdhci@c8000400 {
136 compatible = "nvidia,tegra20-sdhci"; 136 compatible = "nvidia,tegra20-sdhci";
137 reg = <0xc8000400 0x200>; 137 reg = <0xc8000400 0x200>;
138 interrupts = < 51 >; 138 interrupts = < 0 19 0x04 >;
139 }; 139 };
140 140
141 sdhci@c8000600 { 141 sdhci@c8000600 {
142 compatible = "nvidia,tegra20-sdhci"; 142 compatible = "nvidia,tegra20-sdhci";
143 reg = <0xc8000600 0x200>; 143 reg = <0xc8000600 0x200>;
144 interrupts = < 63 >; 144 interrupts = < 0 31 0x04 >;
145 };
146
147 usb@c5000000 {
148 compatible = "nvidia,tegra20-ehci", "usb-ehci";
149 reg = <0xc5000000 0x4000>;
150 interrupts = < 0 20 0x04 >;
151 phy_type = "utmi";
152 };
153
154 usb@c5004000 {
155 compatible = "nvidia,tegra20-ehci", "usb-ehci";
156 reg = <0xc5004000 0x4000>;
157 interrupts = < 0 21 0x04 >;
158 phy_type = "ulpi";
159 };
160
161 usb@c5008000 {
162 compatible = "nvidia,tegra20-ehci", "usb-ehci";
163 reg = <0xc5008000 0x4000>;
164 interrupts = < 0 97 0x04 >;
165 phy_type = "utmi";
145 }; 166 };
146}; 167};
147 168
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
new file mode 100644
index 000000000000..ee7db9892e02
--- /dev/null
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -0,0 +1,127 @@
1/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "nvidia,tegra30";
5 interrupt-parent = <&intc>;
6
7 intc: interrupt-controller@50041000 {
8 compatible = "arm,cortex-a9-gic";
9 interrupt-controller;
10 #interrupt-cells = <3>;
11 reg = < 0x50041000 0x1000 >,
12 < 0x50040100 0x0100 >;
13 };
14
15 i2c@7000c000 {
16 #address-cells = <1>;
17 #size-cells = <0>;
18 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
19 reg = <0x7000C000 0x100>;
20 interrupts = < 0 38 0x04 >;
21 };
22
23 i2c@7000c400 {
24 #address-cells = <1>;
25 #size-cells = <0>;
26 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
27 reg = <0x7000C400 0x100>;
28 interrupts = < 0 84 0x04 >;
29 };
30
31 i2c@7000c500 {
32 #address-cells = <1>;
33 #size-cells = <0>;
34 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
35 reg = <0x7000C500 0x100>;
36 interrupts = < 0 92 0x04 >;
37 };
38
39 i2c@7000c700 {
40 #address-cells = <1>;
41 #size-cells = <0>;
42 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
43 reg = <0x7000c700 0x100>;
44 interrupts = < 0 120 0x04 >;
45 };
46
47 i2c@7000d000 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
51 reg = <0x7000D000 0x100>;
52 interrupts = < 0 53 0x04 >;
53 };
54
55 gpio: gpio@6000d000 {
56 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
57 reg = < 0x6000d000 0x1000 >;
58 interrupts = < 0 32 0x04 0 33 0x04 0 34 0x04 0 35 0x04 0 55 0x04 0 87 0x04 0 89 0x04 >;
59 #gpio-cells = <2>;
60 gpio-controller;
61 };
62
63 serial@70006000 {
64 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
65 reg = <0x70006000 0x40>;
66 reg-shift = <2>;
67 interrupts = < 0 36 0x04 >;
68 };
69
70 serial@70006040 {
71 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
72 reg = <0x70006040 0x40>;
73 reg-shift = <2>;
74 interrupts = < 0 37 0x04 >;
75 };
76
77 serial@70006200 {
78 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
79 reg = <0x70006200 0x100>;
80 reg-shift = <2>;
81 interrupts = < 0 46 0x04 >;
82 };
83
84 serial@70006300 {
85 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
86 reg = <0x70006300 0x100>;
87 reg-shift = <2>;
88 interrupts = < 0 90 0x04 >;
89 };
90
91 serial@70006400 {
92 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
93 reg = <0x70006400 0x100>;
94 reg-shift = <2>;
95 interrupts = < 0 91 0x04 >;
96 };
97
98 sdhci@78000000 {
99 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
100 reg = <0x78000000 0x200>;
101 interrupts = < 0 14 0x04 >;
102 };
103
104 sdhci@78000200 {
105 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
106 reg = <0x78000200 0x200>;
107 interrupts = < 0 15 0x04 >;
108 };
109
110 sdhci@78000400 {
111 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
112 reg = <0x78000400 0x200>;
113 interrupts = < 0 19 0x04 >;
114 };
115
116 sdhci@78000600 {
117 compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
118 reg = <0x78000600 0x200>;
119 interrupts = < 0 31 0x04 >;
120 };
121
122 pinmux: pinmux@70000000 {
123 compatible = "nvidia,tegra30-pinmux";
124 reg = < 0x70000868 0xd0 /* Pad control registers */
125 0x70003000 0x3e0 >; /* Mux registers */
126 };
127};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index d66e2c00ac35..f04b535477f5 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -25,6 +25,11 @@
25 dbgu: serial@fffff200 { 25 dbgu: serial@fffff200 {
26 status = "okay"; 26 status = "okay";
27 }; 27 };
28
29 macb0: ethernet@fffc4000 {
30 phy-mode = "rmii";
31 status = "okay";
32 };
28 }; 33 };
29 }; 34 };
30}; 35};
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index cf497ce41dfe..a22e93079063 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -68,7 +68,6 @@ CONFIG_MTD_CFI=y
68CONFIG_MTD_CFI_ADV_OPTIONS=y 68CONFIG_MTD_CFI_ADV_OPTIONS=y
69CONFIG_MTD_CFI_GEOMETRY=y 69CONFIG_MTD_CFI_GEOMETRY=y
70# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set 70# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
71# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
72# CONFIG_MTD_CFI_I2 is not set 71# CONFIG_MTD_CFI_I2 is not set
73CONFIG_MTD_CFI_INTELEXT=y 72CONFIG_MTD_CFI_INTELEXT=y
74CONFIG_MTD_PHYSMAP=y 73CONFIG_MTD_PHYSMAP=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 945a34f2a34d..dde2a1af7b39 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y
48CONFIG_MACH_NOKIA770=y 48CONFIG_MACH_NOKIA770=y
49CONFIG_MACH_AMS_DELTA=y 49CONFIG_MACH_AMS_DELTA=y
50CONFIG_MACH_OMAP_GENERIC=y 50CONFIG_MACH_OMAP_GENERIC=y
51CONFIG_OMAP_ARM_182MHZ=y
52# CONFIG_ARM_THUMB is not set 51# CONFIG_ARM_THUMB is not set
53CONFIG_PCCARD=y 52CONFIG_PCCARD=y
54CONFIG_OMAP_CF=y 53CONFIG_OMAP_CF=y
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig
deleted file mode 100644
index c75c9fcede58..000000000000
--- a/arch/arm/configs/pcontrol_g20_defconfig
+++ /dev/null
@@ -1,175 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-"
3# CONFIG_LOCALVERSION_AUTO is not set
4# CONFIG_SWAP is not set
5CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y
7CONFIG_TREE_PREEMPT_RCU=y
8CONFIG_IKCONFIG=y
9CONFIG_IKCONFIG_PROC=y
10CONFIG_LOG_BUF_SHIFT=14
11CONFIG_NAMESPACES=y
12CONFIG_BLK_DEV_INITRD=y
13CONFIG_EXPERT=y
14# CONFIG_SYSCTL_SYSCALL is not set
15# CONFIG_KALLSYMS is not set
16# CONFIG_VM_EVENT_COUNTERS is not set
17# CONFIG_COMPAT_BRK is not set
18CONFIG_SLAB=y
19CONFIG_MODULES=y
20CONFIG_MODULE_UNLOAD=y
21# CONFIG_LBDAF is not set
22# CONFIG_BLK_DEV_BSG is not set
23CONFIG_DEFAULT_DEADLINE=y
24CONFIG_ARCH_AT91=y
25CONFIG_ARCH_AT91SAM9G20=y
26CONFIG_MACH_PCONTROL_G20=y
27CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
28CONFIG_NO_HZ=y
29CONFIG_HIGH_RES_TIMERS=y
30CONFIG_PREEMPT=y
31CONFIG_AEABI=y
32# CONFIG_OABI_COMPAT is not set
33CONFIG_ZBOOT_ROM_TEXT=0x0
34CONFIG_ZBOOT_ROM_BSS=0x0
35CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw"
36CONFIG_VFP=y
37CONFIG_BINFMT_MISC=y
38CONFIG_NET=y
39CONFIG_PACKET=y
40CONFIG_UNIX=y
41CONFIG_INET=y
42# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
43# CONFIG_INET_XFRM_MODE_TUNNEL is not set
44# CONFIG_INET_XFRM_MODE_BEET is not set
45# CONFIG_INET_LRO is not set
46# CONFIG_IPV6 is not set
47CONFIG_VLAN_8021Q=y
48# CONFIG_WIRELESS is not set
49CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
50# CONFIG_FW_LOADER is not set
51CONFIG_MTD=y
52CONFIG_MTD_PARTITIONS=y
53CONFIG_MTD_CMDLINE_PARTS=y
54CONFIG_MTD_CHAR=y
55CONFIG_MTD_BLOCK=y
56CONFIG_MTD_COMPLEX_MAPPINGS=y
57CONFIG_MTD_PHRAM=m
58CONFIG_MTD_NAND=y
59CONFIG_MTD_NAND_ATMEL=y
60CONFIG_BLK_DEV_LOOP=y
61CONFIG_BLK_DEV_RAM=y
62CONFIG_BLK_DEV_RAM_SIZE=8192
63CONFIG_ATMEL_TCLIB=y
64CONFIG_EEPROM_AT24=m
65CONFIG_SCSI=m
66# CONFIG_SCSI_PROC_FS is not set
67CONFIG_BLK_DEV_SD=m
68CONFIG_SCSI_MULTI_LUN=y
69# CONFIG_SCSI_LOWLEVEL is not set
70CONFIG_NETDEVICES=y
71CONFIG_MACVLAN=m
72CONFIG_TUN=m
73CONFIG_SMSC_PHY=m
74CONFIG_BROADCOM_PHY=m
75CONFIG_NET_ETHERNET=y
76CONFIG_MII=y
77CONFIG_MACB=y
78CONFIG_SMSC911X=m
79# CONFIG_NETDEV_1000 is not set
80# CONFIG_NETDEV_10000 is not set
81# CONFIG_WLAN is not set
82CONFIG_PPP=m
83CONFIG_PPP_ASYNC=m
84CONFIG_PPP_DEFLATE=m
85CONFIG_PPP_MPPE=m
86CONFIG_INPUT_POLLDEV=y
87CONFIG_INPUT_SPARSEKMAP=y
88# CONFIG_INPUT_MOUSEDEV is not set
89CONFIG_INPUT_EVDEV=m
90CONFIG_INPUT_EVBUG=m
91# CONFIG_KEYBOARD_ATKBD is not set
92CONFIG_KEYBOARD_GPIO=m
93CONFIG_KEYBOARD_MATRIX=m
94# CONFIG_INPUT_MOUSE is not set
95CONFIG_INPUT_TOUCHSCREEN=y
96CONFIG_INPUT_MISC=y
97CONFIG_INPUT_UINPUT=m
98CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
99# CONFIG_SERIO is not set
100# CONFIG_DEVKMEM is not set
101CONFIG_SERIAL_ATMEL=y
102CONFIG_SERIAL_ATMEL_CONSOLE=y
103CONFIG_SERIAL_MAX3100=m
104# CONFIG_LEGACY_PTYS is not set
105# CONFIG_HW_RANDOM is not set
106CONFIG_R3964=m
107CONFIG_I2C=m
108CONFIG_I2C_CHARDEV=m
109# CONFIG_I2C_HELPER_AUTO is not set
110CONFIG_I2C_GPIO=m
111CONFIG_SPI=y
112CONFIG_SPI_ATMEL=m
113CONFIG_SPI_SPIDEV=m
114CONFIG_GPIO_SYSFS=y
115CONFIG_W1=m
116CONFIG_W1_MASTER_GPIO=m
117CONFIG_W1_SLAVE_DS2431=m
118# CONFIG_HWMON is not set
119CONFIG_WATCHDOG=y
120CONFIG_AT91SAM9X_WATCHDOG=y
121# CONFIG_MFD_SUPPORT is not set
122# CONFIG_HID_SUPPORT is not set
123CONFIG_USB=y
124# CONFIG_USB_DEVICE_CLASS is not set
125CONFIG_USB_OHCI_HCD=y
126CONFIG_USB_STORAGE=m
127CONFIG_USB_LIBUSUAL=y
128CONFIG_USB_SERIAL=m
129CONFIG_USB_SERIAL_GENERIC=y
130CONFIG_USB_SERIAL_FTDI_SIO=m
131CONFIG_USB_SERIAL_PL2303=m
132CONFIG_USB_GADGET=y
133CONFIG_USB_ZERO=m
134CONFIG_USB_ETH=m
135CONFIG_USB_FILE_STORAGE=m
136CONFIG_USB_G_SERIAL=m
137CONFIG_USB_G_HID=m
138CONFIG_MMC=y
139CONFIG_MMC_UNSAFE_RESUME=y
140CONFIG_MMC_ATMELMCI=y
141CONFIG_NEW_LEDS=y
142CONFIG_LEDS_CLASS=y
143CONFIG_LEDS_GPIO=y
144CONFIG_LEDS_TRIGGERS=y
145CONFIG_LEDS_TRIGGER_TIMER=y
146CONFIG_LEDS_TRIGGER_HEARTBEAT=y
147CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
148CONFIG_RTC_CLASS=y
149CONFIG_RTC_DRV_AT91SAM9=y
150CONFIG_AUXDISPLAY=y
151CONFIG_UIO=y
152CONFIG_UIO_PDRV=y
153CONFIG_STAGING=y
154# CONFIG_STAGING_EXCLUDE_BUILD is not set
155CONFIG_IIO=y
156CONFIG_EXT2_FS=y
157CONFIG_EXT3_FS=y
158# CONFIG_EXT3_FS_XATTR is not set
159CONFIG_VFAT_FS=y
160CONFIG_TMPFS=y
161CONFIG_JFFS2_FS=y
162CONFIG_NFS_FS=y
163CONFIG_NFS_V3=y
164CONFIG_NFS_V4=y
165CONFIG_PARTITION_ADVANCED=y
166CONFIG_NLS_CODEPAGE_437=y
167CONFIG_NLS_CODEPAGE_850=y
168CONFIG_NLS_ISO8859_1=y
169CONFIG_NLS_ISO8859_15=y
170CONFIG_NLS_UTF8=y
171# CONFIG_RCU_CPU_STALL_DETECTOR is not set
172CONFIG_CRYPTO=y
173CONFIG_CRYPTO_ANSI_CPRNG=y
174# CONFIG_CRYPTO_HW is not set
175CONFIG_CRC_CCITT=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 195729760aeb..fd5d3041d717 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -9,9 +9,8 @@ CONFIG_RESOURCE_COUNTERS=y
9CONFIG_CGROUP_SCHED=y 9CONFIG_CGROUP_SCHED=y
10CONFIG_RT_GROUP_SCHED=y 10CONFIG_RT_GROUP_SCHED=y
11CONFIG_BLK_DEV_INITRD=y 11CONFIG_BLK_DEV_INITRD=y
12CONFIG_EMBEDDED=y
13# CONFIG_SYSCTL_SYSCALL is not set
14# CONFIG_ELF_CORE is not set 12# CONFIG_ELF_CORE is not set
13CONFIG_EMBEDDED=y
15CONFIG_SLAB=y 14CONFIG_SLAB=y
16CONFIG_MODULES=y 15CONFIG_MODULES=y
17CONFIG_MODULE_UNLOAD=y 16CONFIG_MODULE_UNLOAD=y
@@ -20,6 +19,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
20# CONFIG_IOSCHED_DEADLINE is not set 19# CONFIG_IOSCHED_DEADLINE is not set
21# CONFIG_IOSCHED_CFQ is not set 20# CONFIG_IOSCHED_CFQ is not set
22CONFIG_ARCH_TEGRA=y 21CONFIG_ARCH_TEGRA=y
22CONFIG_ARCH_TEGRA_2x_SOC=y
23CONFIG_ARCH_TEGRA_3x_SOC=y
23CONFIG_MACH_HARMONY=y 24CONFIG_MACH_HARMONY=y
24CONFIG_MACH_KAEN=y 25CONFIG_MACH_KAEN=y
25CONFIG_MACH_PAZ00=y 26CONFIG_MACH_PAZ00=y
@@ -78,14 +79,12 @@ CONFIG_BLK_DEV_SD=y
78# CONFIG_SCSI_LOWLEVEL is not set 79# CONFIG_SCSI_LOWLEVEL is not set
79CONFIG_NETDEVICES=y 80CONFIG_NETDEVICES=y
80CONFIG_DUMMY=y 81CONFIG_DUMMY=y
81CONFIG_NET_ETHERNET=y
82CONFIG_R8169=y 82CONFIG_R8169=y
83# CONFIG_NETDEV_10000 is not set
84# CONFIG_WLAN is not set
85CONFIG_USB_PEGASUS=y 83CONFIG_USB_PEGASUS=y
86CONFIG_USB_USBNET=y 84CONFIG_USB_USBNET=y
87CONFIG_USB_NET_SMSC75XX=y 85CONFIG_USB_NET_SMSC75XX=y
88CONFIG_USB_NET_SMSC95XX=y 86CONFIG_USB_NET_SMSC95XX=y
87# CONFIG_WLAN is not set
89# CONFIG_INPUT is not set 88# CONFIG_INPUT is not set
90# CONFIG_SERIO is not set 89# CONFIG_SERIO is not set
91# CONFIG_VT is not set 90# CONFIG_VT is not set
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d111c3e99249..4f991f295284 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,12 @@ if ARCH_AT91
3config HAVE_AT91_DATAFLASH_CARD 3config HAVE_AT91_DATAFLASH_CARD
4 bool 4 bool
5 5
6config HAVE_AT91_DBGU0
7 bool
8
9config HAVE_AT91_DBGU1
10 bool
11
6config HAVE_AT91_USART3 12config HAVE_AT91_USART3
7 bool 13 bool
8 14
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200
21 bool "AT91RM9200" 27 bool "AT91RM9200"
22 select CPU_ARM920T 28 select CPU_ARM920T
23 select GENERIC_CLOCKEVENTS 29 select GENERIC_CLOCKEVENTS
30 select HAVE_AT91_DBGU0
24 select HAVE_AT91_USART3 31 select HAVE_AT91_USART3
25 32
26config ARCH_AT91SAM9260 33config ARCH_AT91SAM9260
27 bool "AT91SAM9260 or AT91SAM9XE" 34 bool "AT91SAM9260 or AT91SAM9XE"
28 select CPU_ARM926T 35 select CPU_ARM926T
29 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
37 select HAVE_AT91_DBGU0
30 select HAVE_AT91_USART3 38 select HAVE_AT91_USART3
31 select HAVE_AT91_USART4 39 select HAVE_AT91_USART4
32 select HAVE_AT91_USART5 40 select HAVE_AT91_USART5
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
37 select CPU_ARM926T 45 select CPU_ARM926T
38 select GENERIC_CLOCKEVENTS 46 select GENERIC_CLOCKEVENTS
39 select HAVE_FB_ATMEL 47 select HAVE_FB_ATMEL
48 select HAVE_AT91_DBGU0
40 49
41config ARCH_AT91SAM9G10 50config ARCH_AT91SAM9G10
42 bool "AT91SAM9G10" 51 bool "AT91SAM9G10"
43 select CPU_ARM926T 52 select CPU_ARM926T
44 select GENERIC_CLOCKEVENTS 53 select GENERIC_CLOCKEVENTS
54 select HAVE_AT91_DBGU0
45 select HAVE_FB_ATMEL 55 select HAVE_FB_ATMEL
46 56
47config ARCH_AT91SAM9263 57config ARCH_AT91SAM9263
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
50 select GENERIC_CLOCKEVENTS 60 select GENERIC_CLOCKEVENTS
51 select HAVE_FB_ATMEL 61 select HAVE_FB_ATMEL
52 select HAVE_NET_MACB 62 select HAVE_NET_MACB
63 select HAVE_AT91_DBGU1
53 64
54config ARCH_AT91SAM9RL 65config ARCH_AT91SAM9RL
55 bool "AT91SAM9RL" 66 bool "AT91SAM9RL"
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
57 select GENERIC_CLOCKEVENTS 68 select GENERIC_CLOCKEVENTS
58 select HAVE_AT91_USART3 69 select HAVE_AT91_USART3
59 select HAVE_FB_ATMEL 70 select HAVE_FB_ATMEL
71 select HAVE_AT91_DBGU0
60 72
61config ARCH_AT91SAM9G20 73config ARCH_AT91SAM9G20
62 bool "AT91SAM9G20" 74 bool "AT91SAM9G20"
63 select CPU_ARM926T 75 select CPU_ARM926T
64 select GENERIC_CLOCKEVENTS 76 select GENERIC_CLOCKEVENTS
77 select HAVE_AT91_DBGU0
65 select HAVE_AT91_USART3 78 select HAVE_AT91_USART3
66 select HAVE_AT91_USART4 79 select HAVE_AT91_USART4
67 select HAVE_AT91_USART5 80 select HAVE_AT91_USART5
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
74 select HAVE_AT91_USART3 87 select HAVE_AT91_USART3
75 select HAVE_FB_ATMEL 88 select HAVE_FB_ATMEL
76 select HAVE_NET_MACB 89 select HAVE_NET_MACB
90 select HAVE_AT91_DBGU1
77 91
78config ARCH_AT91CAP9 92config ARCH_AT91CAP9
79 bool "AT91CAP9" 93 bool "AT91CAP9"
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9
81 select GENERIC_CLOCKEVENTS 95 select GENERIC_CLOCKEVENTS
82 select HAVE_FB_ATMEL 96 select HAVE_FB_ATMEL
83 select HAVE_NET_MACB 97 select HAVE_NET_MACB
98 select HAVE_AT91_DBGU1
84 99
85config ARCH_AT91X40 100config ARCH_AT91X40
86 bool "AT91x40" 101 bool "AT91x40"
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ
510choice 525choice
511 prompt "Select a UART for early kernel messages" 526 prompt "Select a UART for early kernel messages"
512 527
513config AT91_EARLY_DBGU 528config AT91_EARLY_DBGU0
514 bool "DBGU" 529 bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
530 depends on HAVE_AT91_DBGU0
531
532config AT91_EARLY_DBGU1
533 bool "DBGU on 9263, 9g45 and cap9"
534 depends on HAVE_AT91_DBGU1
515 535
516config AT91_EARLY_USART0 536config AT91_EARLY_USART0
517 bool "USART0" 537 bool "USART0"
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 29373397d2df..edb879ac04c8 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -13,7 +13,6 @@
13 */ 13 */
14 14
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/pm.h>
17 16
18#include <asm/irq.h> 17#include <asm/irq.h>
19#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
@@ -23,11 +22,11 @@
23#include <mach/at91cap9.h> 22#include <mach/at91cap9.h>
24#include <mach/at91_pmc.h> 23#include <mach/at91_pmc.h>
25#include <mach/at91_rstc.h> 24#include <mach/at91_rstc.h>
26#include <mach/at91_shdwc.h>
27 25
28#include "soc.h" 26#include "soc.h"
29#include "generic.h" 27#include "generic.h"
30#include "clock.h" 28#include "clock.h"
29#include "sam9_smc.h"
31 30
32/* -------------------------------------------------------------------- 31/* --------------------------------------------------------------------
33 * Clocks 32 * Clocks
@@ -137,7 +136,7 @@ static struct clk pwm_clk = {
137 .type = CLK_TYPE_PERIPHERAL, 136 .type = CLK_TYPE_PERIPHERAL,
138}; 137};
139static struct clk macb_clk = { 138static struct clk macb_clk = {
140 .name = "macb_clk", 139 .name = "pclk",
141 .pmc_mask = 1 << AT91CAP9_ID_EMAC, 140 .pmc_mask = 1 << AT91CAP9_ID_EMAC,
142 .type = CLK_TYPE_PERIPHERAL, 141 .type = CLK_TYPE_PERIPHERAL,
143}; 142};
@@ -210,6 +209,8 @@ static struct clk *periph_clocks[] __initdata = {
210}; 209};
211 210
212static struct clk_lookup periph_clocks_lookups[] = { 211static struct clk_lookup periph_clocks_lookups[] = {
212 /* One additional fake clock for macb_hclk */
213 CLKDEV_CON_ID("hclk", &macb_clk),
213 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), 214 CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
214 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), 215 CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
215 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), 216 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
@@ -221,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
221 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 222 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
222 /* fake hclk clock */ 223 /* fake hclk clock */
223 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 224 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
225 CLKDEV_CON_ID("pioA", &pioABCD_clk),
226 CLKDEV_CON_ID("pioB", &pioABCD_clk),
227 CLKDEV_CON_ID("pioC", &pioABCD_clk),
228 CLKDEV_CON_ID("pioD", &pioABCD_clk),
224}; 229};
225 230
226static struct clk_lookup usart_clocks_lookups[] = { 231static struct clk_lookup usart_clocks_lookups[] = {
@@ -293,23 +298,19 @@ void __init at91cap9_set_console_clock(int id)
293 * GPIO 298 * GPIO
294 * -------------------------------------------------------------------- */ 299 * -------------------------------------------------------------------- */
295 300
296static struct at91_gpio_bank at91cap9_gpio[] = { 301static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
297 { 302 {
298 .id = AT91CAP9_ID_PIOABCD, 303 .id = AT91CAP9_ID_PIOABCD,
299 .offset = AT91_PIOA, 304 .regbase = AT91CAP9_BASE_PIOA,
300 .clock = &pioABCD_clk,
301 }, { 305 }, {
302 .id = AT91CAP9_ID_PIOABCD, 306 .id = AT91CAP9_ID_PIOABCD,
303 .offset = AT91_PIOB, 307 .regbase = AT91CAP9_BASE_PIOB,
304 .clock = &pioABCD_clk,
305 }, { 308 }, {
306 .id = AT91CAP9_ID_PIOABCD, 309 .id = AT91CAP9_ID_PIOABCD,
307 .offset = AT91_PIOC, 310 .regbase = AT91CAP9_BASE_PIOC,
308 .clock = &pioABCD_clk,
309 }, { 311 }, {
310 .id = AT91CAP9_ID_PIOABCD, 312 .id = AT91CAP9_ID_PIOABCD,
311 .offset = AT91_PIOD, 313 .regbase = AT91CAP9_BASE_PIOD,
312 .clock = &pioABCD_clk,
313 } 314 }
314}; 315};
315 316
@@ -318,12 +319,6 @@ static void at91cap9_restart(char mode, const char *cmd)
318 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 319 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
319} 320}
320 321
321static void at91cap9_poweroff(void)
322{
323 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
324}
325
326
327/* -------------------------------------------------------------------- 322/* --------------------------------------------------------------------
328 * AT91CAP9 processor initialization 323 * AT91CAP9 processor initialization
329 * -------------------------------------------------------------------- */ 324 * -------------------------------------------------------------------- */
@@ -333,10 +328,16 @@ static void __init at91cap9_map_io(void)
333 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); 328 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
334} 329}
335 330
331static void __init at91cap9_ioremap_registers(void)
332{
333 at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
334 at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
335 at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
336}
337
336static void __init at91cap9_initialize(void) 338static void __init at91cap9_initialize(void)
337{ 339{
338 arm_pm_restart = at91cap9_restart; 340 arm_pm_restart = at91cap9_restart;
339 pm_power_off = at91cap9_poweroff;
340 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 341 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
341 342
342 /* Register GPIO subsystem */ 343 /* Register GPIO subsystem */
@@ -394,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
394struct at91_init_soc __initdata at91cap9_soc = { 395struct at91_init_soc __initdata at91cap9_soc = {
395 .map_io = at91cap9_map_io, 396 .map_io = at91cap9_map_io,
396 .default_irq_priority = at91cap9_default_irq_priority, 397 .default_irq_priority = at91cap9_default_irq_priority,
398 .ioremap_registers = at91cap9_ioremap_registers,
397 .register_clocks = at91cap9_register_clocks, 399 .register_clocks = at91cap9_register_clocks,
398 .init = at91cap9_initialize, 400 .init = at91cap9_initialize,
399}; 401};
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index adad70db70eb..d298fb7cb210 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
76 76
77 /* Enable VBus control for UHP ports */ 77 /* Enable VBus control for UHP ports */
78 for (i = 0; i < data->ports; i++) { 78 for (i = 0; i < data->ports; i++) {
79 if (data->vbus_pin[i]) 79 if (gpio_is_valid(data->vbus_pin[i]))
80 at91_set_gpio_output(data->vbus_pin[i], 0); 80 at91_set_gpio_output(data->vbus_pin[i], 0);
81 } 81 }
82 82
@@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 179 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 180 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
181 181
182 if (data && data->vbus_pin > 0) { 182 if (data && gpio_is_valid(data->vbus_pin)) {
183 at91_set_gpio_input(data->vbus_pin, 0); 183 at91_set_gpio_input(data->vbus_pin, 0);
184 at91_set_deglitch(data->vbus_pin, 1); 184 at91_set_deglitch(data->vbus_pin, 1);
185 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 185 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -200,7 +200,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
200 200
201#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) 201#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
202static u64 eth_dmamask = DMA_BIT_MASK(32); 202static u64 eth_dmamask = DMA_BIT_MASK(32);
203static struct at91_eth_data eth_data; 203static struct macb_platform_data eth_data;
204 204
205static struct resource eth_resources[] = { 205static struct resource eth_resources[] = {
206 [0] = { 206 [0] = {
@@ -227,12 +227,12 @@ static struct platform_device at91cap9_eth_device = {
227 .num_resources = ARRAY_SIZE(eth_resources), 227 .num_resources = ARRAY_SIZE(eth_resources),
228}; 228};
229 229
230void __init at91_add_device_eth(struct at91_eth_data *data) 230void __init at91_add_device_eth(struct macb_platform_data *data)
231{ 231{
232 if (!data) 232 if (!data)
233 return; 233 return;
234 234
235 if (data->phy_irq_pin) { 235 if (gpio_is_valid(data->phy_irq_pin)) {
236 at91_set_gpio_input(data->phy_irq_pin, 0); 236 at91_set_gpio_input(data->phy_irq_pin, 0);
237 at91_set_deglitch(data->phy_irq_pin, 1); 237 at91_set_deglitch(data->phy_irq_pin, 1);
238 } 238 }
@@ -264,7 +264,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
264 platform_device_register(&at91cap9_eth_device); 264 platform_device_register(&at91cap9_eth_device);
265} 265}
266#else 266#else
267void __init at91_add_device_eth(struct at91_eth_data *data) {} 267void __init at91_add_device_eth(struct macb_platform_data *data) {}
268#endif 268#endif
269 269
270 270
@@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
332 return; 332 return;
333 333
334 /* input/irq */ 334 /* input/irq */
335 if (data->det_pin) { 335 if (gpio_is_valid(data->det_pin)) {
336 at91_set_gpio_input(data->det_pin, 1); 336 at91_set_gpio_input(data->det_pin, 1);
337 at91_set_deglitch(data->det_pin, 1); 337 at91_set_deglitch(data->det_pin, 1);
338 } 338 }
339 if (data->wp_pin) 339 if (gpio_is_valid(data->wp_pin))
340 at91_set_gpio_input(data->wp_pin, 1); 340 at91_set_gpio_input(data->wp_pin, 1);
341 if (data->vcc_pin) 341 if (gpio_is_valid(data->vcc_pin))
342 at91_set_gpio_output(data->vcc_pin, 0); 342 at91_set_gpio_output(data->vcc_pin, 0);
343 343
344 if (mmc_id == 0) { /* MCI0 */ 344 if (mmc_id == 0) { /* MCI0 */
@@ -398,8 +398,8 @@ static struct resource nand_resources[] = {
398 .flags = IORESOURCE_MEM, 398 .flags = IORESOURCE_MEM,
399 }, 399 },
400 [1] = { 400 [1] = {
401 .start = AT91_BASE_SYS + AT91_ECC, 401 .start = AT91CAP9_BASE_ECC,
402 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 402 .end = AT91CAP9_BASE_ECC + SZ_512 - 1,
403 .flags = IORESOURCE_MEM, 403 .flags = IORESOURCE_MEM,
404 } 404 }
405}; 405};
@@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 425 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
426 426
427 /* enable pin */ 427 /* enable pin */
428 if (data->enable_pin) 428 if (gpio_is_valid(data->enable_pin))
429 at91_set_gpio_output(data->enable_pin, 1); 429 at91_set_gpio_output(data->enable_pin, 1);
430 430
431 /* ready/busy pin */ 431 /* ready/busy pin */
432 if (data->rdy_pin) 432 if (gpio_is_valid(data->rdy_pin))
433 at91_set_gpio_input(data->rdy_pin, 1); 433 at91_set_gpio_input(data->rdy_pin, 1);
434 434
435 /* card detect pin */ 435 /* card detect pin */
436 if (data->det_pin) 436 if (gpio_is_valid(data->det_pin))
437 at91_set_gpio_input(data->det_pin, 1); 437 at91_set_gpio_input(data->det_pin, 1);
438 438
439 nand_data = *data; 439 nand_data = *data;
@@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { }
670 670
671static struct resource rtt_resources[] = { 671static struct resource rtt_resources[] = {
672 { 672 {
673 .start = AT91_BASE_SYS + AT91_RTT, 673 .start = AT91CAP9_BASE_RTT,
674 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 674 .end = AT91CAP9_BASE_RTT + SZ_16 - 1,
675 .flags = IORESOURCE_MEM, 675 .flags = IORESOURCE_MEM,
676 } 676 }
677}; 677};
@@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void)
694 * -------------------------------------------------------------------- */ 694 * -------------------------------------------------------------------- */
695 695
696#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 696#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
697static struct resource wdt_resources[] = {
698 {
699 .start = AT91CAP9_BASE_WDT,
700 .end = AT91CAP9_BASE_WDT + SZ_16 - 1,
701 .flags = IORESOURCE_MEM,
702 }
703};
704
697static struct platform_device at91cap9_wdt_device = { 705static struct platform_device at91cap9_wdt_device = {
698 .name = "at91_wdt", 706 .name = "at91_wdt",
699 .id = -1, 707 .id = -1,
700 .num_resources = 0, 708 .resource = wdt_resources,
709 .num_resources = ARRAY_SIZE(wdt_resources),
701}; 710};
702 711
703static void __init at91_add_device_watchdog(void) 712static void __init at91_add_device_watchdog(void)
@@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
807 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ 816 at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */
808 817
809 /* reset */ 818 /* reset */
810 if (data->reset_pin) 819 if (gpio_is_valid(data->reset_pin))
811 at91_set_gpio_output(data->reset_pin, 0); 820 at91_set_gpio_output(data->reset_pin, 0);
812 821
813 ac97_data = *data; 822 ac97_data = *data;
@@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1021#if defined(CONFIG_SERIAL_ATMEL) 1030#if defined(CONFIG_SERIAL_ATMEL)
1022static struct resource dbgu_resources[] = { 1031static struct resource dbgu_resources[] = {
1023 [0] = { 1032 [0] = {
1024 .start = AT91_BASE_SYS + AT91_DBGU, 1033 .start = AT91CAP9_BASE_DBGU,
1025 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1034 .end = AT91CAP9_BASE_DBGU + SZ_512 - 1,
1026 .flags = IORESOURCE_MEM, 1035 .flags = IORESOURCE_MEM,
1027 }, 1036 },
1028 [1] = { 1037 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 430a9fdc3dbf..99c3174e24a2 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -23,6 +23,7 @@
23#include "soc.h" 23#include "soc.h"
24#include "generic.h" 24#include "generic.h"
25#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
26 27
27static struct map_desc at91rm9200_io_desc[] __initdata = { 28static struct map_desc at91rm9200_io_desc[] __initdata = {
28 { 29 {
@@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
195 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 196 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
196 /* fake hclk clock */ 197 /* fake hclk clock */
197 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 198 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
199 CLKDEV_CON_ID("pioA", &pioA_clk),
200 CLKDEV_CON_ID("pioB", &pioB_clk),
201 CLKDEV_CON_ID("pioC", &pioC_clk),
202 CLKDEV_CON_ID("pioD", &pioD_clk),
198}; 203};
199 204
200static struct clk_lookup usart_clocks_lookups[] = { 205static struct clk_lookup usart_clocks_lookups[] = {
@@ -268,23 +273,19 @@ void __init at91rm9200_set_console_clock(int id)
268 * GPIO 273 * GPIO
269 * -------------------------------------------------------------------- */ 274 * -------------------------------------------------------------------- */
270 275
271static struct at91_gpio_bank at91rm9200_gpio[] = { 276static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
272 { 277 {
273 .id = AT91RM9200_ID_PIOA, 278 .id = AT91RM9200_ID_PIOA,
274 .offset = AT91_PIOA, 279 .regbase = AT91RM9200_BASE_PIOA,
275 .clock = &pioA_clk,
276 }, { 280 }, {
277 .id = AT91RM9200_ID_PIOB, 281 .id = AT91RM9200_ID_PIOB,
278 .offset = AT91_PIOB, 282 .regbase = AT91RM9200_BASE_PIOB,
279 .clock = &pioB_clk,
280 }, { 283 }, {
281 .id = AT91RM9200_ID_PIOC, 284 .id = AT91RM9200_ID_PIOC,
282 .offset = AT91_PIOC, 285 .regbase = AT91RM9200_BASE_PIOC,
283 .clock = &pioC_clk,
284 }, { 286 }, {
285 .id = AT91RM9200_ID_PIOD, 287 .id = AT91RM9200_ID_PIOD,
286 .offset = AT91_PIOD, 288 .regbase = AT91RM9200_BASE_PIOD,
287 .clock = &pioD_clk,
288 } 289 }
289}; 290};
290 291
@@ -307,6 +308,10 @@ static void __init at91rm9200_map_io(void)
307 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 308 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
308} 309}
309 310
311static void __init at91rm9200_ioremap_registers(void)
312{
313}
314
310static void __init at91rm9200_initialize(void) 315static void __init at91rm9200_initialize(void)
311{ 316{
312 arm_pm_restart = at91rm9200_restart; 317 arm_pm_restart = at91rm9200_restart;
@@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
366struct at91_init_soc __initdata at91rm9200_soc = { 371struct at91_init_soc __initdata at91rm9200_soc = {
367 .map_io = at91rm9200_map_io, 372 .map_io = at91rm9200_map_io,
368 .default_irq_priority = at91rm9200_default_irq_priority, 373 .default_irq_priority = at91rm9200_default_irq_priority,
374 .ioremap_registers = at91rm9200_ioremap_registers,
369 .register_clocks = at91rm9200_register_clocks, 375 .register_clocks = at91rm9200_register_clocks,
370 .init = at91rm9200_initialize, 376 .init = at91rm9200_initialize,
371}; 377};
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index ad930688358c..18bacec2b094 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
114 if (!data) 114 if (!data)
115 return; 115 return;
116 116
117 if (data->vbus_pin) { 117 if (gpio_is_valid(data->vbus_pin)) {
118 at91_set_gpio_input(data->vbus_pin, 0); 118 at91_set_gpio_input(data->vbus_pin, 0);
119 at91_set_deglitch(data->vbus_pin, 1); 119 at91_set_deglitch(data->vbus_pin, 1);
120 } 120 }
121 if (data->pullup_pin) 121 if (gpio_is_valid(data->pullup_pin))
122 at91_set_gpio_output(data->pullup_pin, 0); 122 at91_set_gpio_output(data->pullup_pin, 0);
123 123
124 udc_data = *data; 124 udc_data = *data;
@@ -135,7 +135,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
135 135
136#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) 136#if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
137static u64 eth_dmamask = DMA_BIT_MASK(32); 137static u64 eth_dmamask = DMA_BIT_MASK(32);
138static struct at91_eth_data eth_data; 138static struct macb_platform_data eth_data;
139 139
140static struct resource eth_resources[] = { 140static struct resource eth_resources[] = {
141 [0] = { 141 [0] = {
@@ -162,12 +162,12 @@ static struct platform_device at91rm9200_eth_device = {
162 .num_resources = ARRAY_SIZE(eth_resources), 162 .num_resources = ARRAY_SIZE(eth_resources),
163}; 163};
164 164
165void __init at91_add_device_eth(struct at91_eth_data *data) 165void __init at91_add_device_eth(struct macb_platform_data *data)
166{ 166{
167 if (!data) 167 if (!data)
168 return; 168 return;
169 169
170 if (data->phy_irq_pin) { 170 if (gpio_is_valid(data->phy_irq_pin)) {
171 at91_set_gpio_input(data->phy_irq_pin, 0); 171 at91_set_gpio_input(data->phy_irq_pin, 0);
172 at91_set_deglitch(data->phy_irq_pin, 1); 172 at91_set_deglitch(data->phy_irq_pin, 1);
173 } 173 }
@@ -199,7 +199,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
199 platform_device_register(&at91rm9200_eth_device); 199 platform_device_register(&at91rm9200_eth_device);
200} 200}
201#else 201#else
202void __init at91_add_device_eth(struct at91_eth_data *data) {} 202void __init at91_add_device_eth(struct macb_platform_data *data) {}
203#endif 203#endif
204 204
205 205
@@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
260 ); 260 );
261 261
262 /* input/irq */ 262 /* input/irq */
263 if (data->irq_pin) { 263 if (gpio_is_valid(data->irq_pin)) {
264 at91_set_gpio_input(data->irq_pin, 1); 264 at91_set_gpio_input(data->irq_pin, 1);
265 at91_set_deglitch(data->irq_pin, 1); 265 at91_set_deglitch(data->irq_pin, 1);
266 } 266 }
@@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
268 at91_set_deglitch(data->det_pin, 1); 268 at91_set_deglitch(data->det_pin, 1);
269 269
270 /* outputs, initially off */ 270 /* outputs, initially off */
271 if (data->vcc_pin) 271 if (gpio_is_valid(data->vcc_pin))
272 at91_set_gpio_output(data->vcc_pin, 0); 272 at91_set_gpio_output(data->vcc_pin, 0);
273 at91_set_gpio_output(data->rst_pin, 0); 273 at91_set_gpio_output(data->rst_pin, 0);
274 274
@@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
328 return; 328 return;
329 329
330 /* input/irq */ 330 /* input/irq */
331 if (data->det_pin) { 331 if (gpio_is_valid(data->det_pin)) {
332 at91_set_gpio_input(data->det_pin, 1); 332 at91_set_gpio_input(data->det_pin, 1);
333 at91_set_deglitch(data->det_pin, 1); 333 at91_set_deglitch(data->det_pin, 1);
334 } 334 }
335 if (data->wp_pin) 335 if (gpio_is_valid(data->wp_pin))
336 at91_set_gpio_input(data->wp_pin, 1); 336 at91_set_gpio_input(data->wp_pin, 1);
337 if (data->vcc_pin) 337 if (gpio_is_valid(data->vcc_pin))
338 at91_set_gpio_output(data->vcc_pin, 0); 338 at91_set_gpio_output(data->vcc_pin, 0);
339 339
340 /* CLK */ 340 /* CLK */
@@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
419 ); 419 );
420 420
421 /* enable pin */ 421 /* enable pin */
422 if (data->enable_pin) 422 if (gpio_is_valid(data->enable_pin))
423 at91_set_gpio_output(data->enable_pin, 1); 423 at91_set_gpio_output(data->enable_pin, 1);
424 424
425 /* ready/busy pin */ 425 /* ready/busy pin */
426 if (data->rdy_pin) 426 if (gpio_is_valid(data->rdy_pin))
427 at91_set_gpio_input(data->rdy_pin, 1); 427 at91_set_gpio_input(data->rdy_pin, 1);
428 428
429 /* card detect pin */ 429 /* card detect pin */
430 if (data->det_pin) 430 if (gpio_is_valid(data->det_pin))
431 at91_set_gpio_input(data->det_pin, 1); 431 at91_set_gpio_input(data->det_pin, 1);
432 432
433 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ 433 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { }
665 * -------------------------------------------------------------------- */ 665 * -------------------------------------------------------------------- */
666 666
667#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) 667#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
668static struct resource rtc_resources[] = {
669 [0] = {
670 .start = AT91RM9200_BASE_RTC,
671 .end = AT91RM9200_BASE_RTC + SZ_256 - 1,
672 .flags = IORESOURCE_MEM,
673 },
674 [1] = {
675 .start = AT91_ID_SYS,
676 .end = AT91_ID_SYS,
677 .flags = IORESOURCE_IRQ,
678 },
679};
680
668static struct platform_device at91rm9200_rtc_device = { 681static struct platform_device at91rm9200_rtc_device = {
669 .name = "at91_rtc", 682 .name = "at91_rtc",
670 .id = -1, 683 .id = -1,
671 .num_resources = 0, 684 .resource = rtc_resources,
685 .num_resources = ARRAY_SIZE(rtc_resources),
672}; 686};
673 687
674static void __init at91_add_device_rtc(void) 688static void __init at91_add_device_rtc(void)
@@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
877#if defined(CONFIG_SERIAL_ATMEL) 891#if defined(CONFIG_SERIAL_ATMEL)
878static struct resource dbgu_resources[] = { 892static struct resource dbgu_resources[] = {
879 [0] = { 893 [0] = {
880 .start = AT91_BASE_SYS + AT91_DBGU, 894 .start = AT91RM9200_BASE_DBGU,
881 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 895 .end = AT91RM9200_BASE_DBGU + SZ_512 - 1,
882 .flags = IORESOURCE_MEM, 896 .flags = IORESOURCE_MEM,
883 }, 897 },
884 [1] = { 898 [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 1dd69c85dfec..a028cdf8f974 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -32,6 +32,8 @@ static unsigned long last_crtr;
32static u32 irqmask; 32static u32 irqmask;
33static struct clock_event_device clkevt; 33static struct clock_event_device clkevt;
34 34
35#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ)
36
35/* 37/*
36 * The ST_CRTR is updated asynchronously to the master clock ... but 38 * The ST_CRTR is updated asynchronously to the master clock ... but
37 * the updates as seen by the CPU don't seem to be strictly monotonic. 39 * the updates as seen by the CPU don't seem to be strictly monotonic.
@@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
74 if (sr & AT91_ST_PITS) { 76 if (sr & AT91_ST_PITS) {
75 u32 crtr = read_CRTR(); 77 u32 crtr = read_CRTR();
76 78
77 while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { 79 while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) {
78 last_crtr += LATCH; 80 last_crtr += RM9200_TIMER_LATCH;
79 clkevt.event_handler(&clkevt); 81 clkevt.event_handler(&clkevt);
80 } 82 }
81 return IRQ_HANDLED; 83 return IRQ_HANDLED;
@@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
116 case CLOCK_EVT_MODE_PERIODIC: 118 case CLOCK_EVT_MODE_PERIODIC:
117 /* PIT for periodic irqs; fixed rate of 1/HZ */ 119 /* PIT for periodic irqs; fixed rate of 1/HZ */
118 irqmask = AT91_ST_PITS; 120 irqmask = AT91_ST_PITS;
119 at91_sys_write(AT91_ST_PIMR, LATCH); 121 at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
120 break; 122 break;
121 case CLOCK_EVT_MODE_ONESHOT: 123 case CLOCK_EVT_MODE_ONESHOT:
122 /* ALM for oneshot irqs, set by next_event() 124 /* ALM for oneshot irqs, set by next_event()
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index e76cd49ebc9e..5e46e4a96430 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -21,11 +20,11 @@
21#include <mach/at91sam9260.h> 20#include <mach/at91sam9260.h>
22#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
23#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
24#include <mach/at91_shdwc.h>
25 23
26#include "soc.h" 24#include "soc.h"
27#include "generic.h" 25#include "generic.h"
28#include "clock.h" 26#include "clock.h"
27#include "sam9_smc.h"
29 28
30/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
31 * Clocks 30 * Clocks
@@ -120,7 +119,7 @@ static struct clk ohci_clk = {
120 .type = CLK_TYPE_PERIPHERAL, 119 .type = CLK_TYPE_PERIPHERAL,
121}; 120};
122static struct clk macb_clk = { 121static struct clk macb_clk = {
123 .name = "macb_clk", 122 .name = "pclk",
124 .pmc_mask = 1 << AT91SAM9260_ID_EMAC, 123 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
125 .type = CLK_TYPE_PERIPHERAL, 124 .type = CLK_TYPE_PERIPHERAL,
126}; 125};
@@ -190,6 +189,8 @@ static struct clk *periph_clocks[] __initdata = {
190}; 189};
191 190
192static struct clk_lookup periph_clocks_lookups[] = { 191static struct clk_lookup periph_clocks_lookups[] = {
192 /* One additional fake clock for macb_hclk */
193 CLKDEV_CON_ID("hclk", &macb_clk),
193 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), 194 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
194 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), 195 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 196 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
@@ -209,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
209 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), 210 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
210 /* fake hclk clock */ 211 /* fake hclk clock */
211 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 212 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
213 CLKDEV_CON_ID("pioA", &pioA_clk),
214 CLKDEV_CON_ID("pioB", &pioB_clk),
215 CLKDEV_CON_ID("pioC", &pioC_clk),
212}; 216};
213 217
214static struct clk_lookup usart_clocks_lookups[] = { 218static struct clk_lookup usart_clocks_lookups[] = {
@@ -270,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id)
270 * GPIO 274 * GPIO
271 * -------------------------------------------------------------------- */ 275 * -------------------------------------------------------------------- */
272 276
273static struct at91_gpio_bank at91sam9260_gpio[] = { 277static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
274 { 278 {
275 .id = AT91SAM9260_ID_PIOA, 279 .id = AT91SAM9260_ID_PIOA,
276 .offset = AT91_PIOA, 280 .regbase = AT91SAM9260_BASE_PIOA,
277 .clock = &pioA_clk,
278 }, { 281 }, {
279 .id = AT91SAM9260_ID_PIOB, 282 .id = AT91SAM9260_ID_PIOB,
280 .offset = AT91_PIOB, 283 .regbase = AT91SAM9260_BASE_PIOB,
281 .clock = &pioB_clk,
282 }, { 284 }, {
283 .id = AT91SAM9260_ID_PIOC, 285 .id = AT91SAM9260_ID_PIOC,
284 .offset = AT91_PIOC, 286 .regbase = AT91SAM9260_BASE_PIOC,
285 .clock = &pioC_clk,
286 } 287 }
287}; 288};
288 289
289static void at91sam9260_poweroff(void)
290{
291 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
292}
293
294
295/* -------------------------------------------------------------------- 290/* --------------------------------------------------------------------
296 * AT91SAM9260 processor initialization 291 * AT91SAM9260 processor initialization
297 * -------------------------------------------------------------------- */ 292 * -------------------------------------------------------------------- */
@@ -325,10 +320,16 @@ static void __init at91sam9260_map_io(void)
325 } 320 }
326} 321}
327 322
323static void __init at91sam9260_ioremap_registers(void)
324{
325 at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
326 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
327 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
328}
329
328static void __init at91sam9260_initialize(void) 330static void __init at91sam9260_initialize(void)
329{ 331{
330 arm_pm_restart = at91sam9_alt_restart; 332 arm_pm_restart = at91sam9_alt_restart;
331 pm_power_off = at91sam9260_poweroff;
332 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 333 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
333 | (1 << AT91SAM9260_ID_IRQ2); 334 | (1 << AT91SAM9260_ID_IRQ2);
334 335
@@ -381,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
381struct at91_init_soc __initdata at91sam9260_soc = { 382struct at91_init_soc __initdata at91sam9260_soc = {
382 .map_io = at91sam9260_map_io, 383 .map_io = at91sam9260_map_io,
383 .default_irq_priority = at91sam9260_default_irq_priority, 384 .default_irq_priority = at91sam9260_default_irq_priority,
385 .ioremap_registers = at91sam9260_ioremap_registers,
384 .register_clocks = at91sam9260_register_clocks, 386 .register_clocks = at91sam9260_register_clocks,
385 .init = at91sam9260_initialize, 387 .init = at91sam9260_initialize,
386}; 388};
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 629fa9774972..642ccb6d26b2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
115 if (!data) 115 if (!data)
116 return; 116 return;
117 117
118 if (data->vbus_pin) { 118 if (gpio_is_valid(data->vbus_pin)) {
119 at91_set_gpio_input(data->vbus_pin, 0); 119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1); 120 at91_set_deglitch(data->vbus_pin, 1);
121 } 121 }
@@ -136,7 +136,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
136 136
137#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) 137#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
138static u64 eth_dmamask = DMA_BIT_MASK(32); 138static u64 eth_dmamask = DMA_BIT_MASK(32);
139static struct at91_eth_data eth_data; 139static struct macb_platform_data eth_data;
140 140
141static struct resource eth_resources[] = { 141static struct resource eth_resources[] = {
142 [0] = { 142 [0] = {
@@ -163,12 +163,12 @@ static struct platform_device at91sam9260_eth_device = {
163 .num_resources = ARRAY_SIZE(eth_resources), 163 .num_resources = ARRAY_SIZE(eth_resources),
164}; 164};
165 165
166void __init at91_add_device_eth(struct at91_eth_data *data) 166void __init at91_add_device_eth(struct macb_platform_data *data)
167{ 167{
168 if (!data) 168 if (!data)
169 return; 169 return;
170 170
171 if (data->phy_irq_pin) { 171 if (gpio_is_valid(data->phy_irq_pin)) {
172 at91_set_gpio_input(data->phy_irq_pin, 0); 172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1); 173 at91_set_deglitch(data->phy_irq_pin, 1);
174 } 174 }
@@ -200,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
200 platform_device_register(&at91sam9260_eth_device); 200 platform_device_register(&at91sam9260_eth_device);
201} 201}
202#else 202#else
203void __init at91_add_device_eth(struct at91_eth_data *data) {} 203void __init at91_add_device_eth(struct macb_platform_data *data) {}
204#endif 204#endif
205 205
206 206
@@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
243 return; 243 return;
244 244
245 /* input/irq */ 245 /* input/irq */
246 if (data->det_pin) { 246 if (gpio_is_valid(data->det_pin)) {
247 at91_set_gpio_input(data->det_pin, 1); 247 at91_set_gpio_input(data->det_pin, 1);
248 at91_set_deglitch(data->det_pin, 1); 248 at91_set_deglitch(data->det_pin, 1);
249 } 249 }
250 if (data->wp_pin) 250 if (gpio_is_valid(data->wp_pin))
251 at91_set_gpio_input(data->wp_pin, 1); 251 at91_set_gpio_input(data->wp_pin, 1);
252 if (data->vcc_pin) 252 if (gpio_is_valid(data->vcc_pin))
253 at91_set_gpio_output(data->vcc_pin, 0); 253 at91_set_gpio_output(data->vcc_pin, 0);
254 254
255 /* CLK */ 255 /* CLK */
@@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 330 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
331 if (data->slot[i].bus_width) { 331 if (data->slot[i].bus_width) {
332 /* input/irq */ 332 /* input/irq */
333 if (data->slot[i].detect_pin) { 333 if (gpio_is_valid(data->slot[i].detect_pin)) {
334 at91_set_gpio_input(data->slot[i].detect_pin, 1); 334 at91_set_gpio_input(data->slot[i].detect_pin, 1);
335 at91_set_deglitch(data->slot[i].detect_pin, 1); 335 at91_set_deglitch(data->slot[i].detect_pin, 1);
336 } 336 }
337 if (data->slot[i].wp_pin) 337 if (gpio_is_valid(data->slot[i].wp_pin))
338 at91_set_gpio_input(data->slot[i].wp_pin, 1); 338 at91_set_gpio_input(data->slot[i].wp_pin, 1);
339 339
340 switch (i) { 340 switch (i) {
@@ -399,8 +399,8 @@ static struct resource nand_resources[] = {
399 .flags = IORESOURCE_MEM, 399 .flags = IORESOURCE_MEM,
400 }, 400 },
401 [1] = { 401 [1] = {
402 .start = AT91_BASE_SYS + AT91_ECC, 402 .start = AT91SAM9260_BASE_ECC,
403 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 403 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
404 .flags = IORESOURCE_MEM, 404 .flags = IORESOURCE_MEM,
405 } 405 }
406}; 406};
@@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 426 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
427 427
428 /* enable pin */ 428 /* enable pin */
429 if (data->enable_pin) 429 if (gpio_is_valid(data->enable_pin))
430 at91_set_gpio_output(data->enable_pin, 1); 430 at91_set_gpio_output(data->enable_pin, 1);
431 431
432 /* ready/busy pin */ 432 /* ready/busy pin */
433 if (data->rdy_pin) 433 if (gpio_is_valid(data->rdy_pin))
434 at91_set_gpio_input(data->rdy_pin, 1); 434 at91_set_gpio_input(data->rdy_pin, 1);
435 435
436 /* card detect pin */ 436 /* card detect pin */
437 if (data->det_pin) 437 if (gpio_is_valid(data->det_pin))
438 at91_set_gpio_input(data->det_pin, 1); 438 at91_set_gpio_input(data->det_pin, 1);
439 439
440 nand_data = *data; 440 nand_data = *data;
@@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { }
714 714
715static struct resource rtt_resources[] = { 715static struct resource rtt_resources[] = {
716 { 716 {
717 .start = AT91_BASE_SYS + AT91_RTT, 717 .start = AT91SAM9260_BASE_RTT,
718 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 718 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
719 .flags = IORESOURCE_MEM, 719 .flags = IORESOURCE_MEM,
720 } 720 }
721}; 721};
@@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void)
738 * -------------------------------------------------------------------- */ 738 * -------------------------------------------------------------------- */
739 739
740#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 740#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
741static struct resource wdt_resources[] = {
742 {
743 .start = AT91SAM9260_BASE_WDT,
744 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
745 .flags = IORESOURCE_MEM,
746 }
747};
748
741static struct platform_device at91sam9260_wdt_device = { 749static struct platform_device at91sam9260_wdt_device = {
742 .name = "at91_wdt", 750 .name = "at91_wdt",
743 .id = -1, 751 .id = -1,
744 .num_resources = 0, 752 .resource = wdt_resources,
753 .num_resources = ARRAY_SIZE(wdt_resources),
745}; 754};
746 755
747static void __init at91_add_device_watchdog(void) 756static void __init at91_add_device_watchdog(void)
@@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
837#if defined(CONFIG_SERIAL_ATMEL) 846#if defined(CONFIG_SERIAL_ATMEL)
838static struct resource dbgu_resources[] = { 847static struct resource dbgu_resources[] = {
839 [0] = { 848 [0] = {
840 .start = AT91_BASE_SYS + AT91_DBGU, 849 .start = AT91SAM9260_BASE_DBGU,
841 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 850 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
842 .flags = IORESOURCE_MEM, 851 .flags = IORESOURCE_MEM,
843 }, 852 },
844 [1] = { 853 [1] = {
@@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
1281 1290
1282 at91_sys_write(AT91_MATRIX_EBICSA, csa); 1291 at91_sys_write(AT91_MATRIX_EBICSA, csa);
1283 1292
1284 if (data->rst_pin) { 1293 if (gpio_is_valid(data->rst_pin)) {
1285 at91_set_multi_drive(data->rst_pin, 0); 1294 at91_set_multi_drive(data->rst_pin, 0);
1286 at91_set_gpio_output(data->rst_pin, 1); 1295 at91_set_gpio_output(data->rst_pin, 1);
1287 } 1296 }
1288 1297
1289 if (data->irq_pin) { 1298 if (gpio_is_valid(data->irq_pin)) {
1290 at91_set_gpio_input(data->irq_pin, 0); 1299 at91_set_gpio_input(data->irq_pin, 0);
1291 at91_set_deglitch(data->irq_pin, 1); 1300 at91_set_deglitch(data->irq_pin, 1);
1292 } 1301 }
1293 1302
1294 if (data->det_pin) { 1303 if (gpio_is_valid(data->det_pin)) {
1295 at91_set_gpio_input(data->det_pin, 0); 1304 at91_set_gpio_input(data->det_pin, 0);
1296 at91_set_deglitch(data->det_pin, 1); 1305 at91_set_deglitch(data->det_pin, 1);
1297 } 1306 }
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 19ac7c0729a0..b85b9ea60170 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9261.h> 19#include <mach/at91sam9261.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
176 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 175 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
177 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 176 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
178 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), 177 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
178 CLKDEV_CON_ID("pioA", &pioA_clk),
179 CLKDEV_CON_ID("pioB", &pioB_clk),
180 CLKDEV_CON_ID("pioC", &pioC_clk),
179}; 181};
180 182
181static struct clk_lookup usart_clocks_lookups[] = { 183static struct clk_lookup usart_clocks_lookups[] = {
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id)
251 * GPIO 253 * GPIO
252 * -------------------------------------------------------------------- */ 254 * -------------------------------------------------------------------- */
253 255
254static struct at91_gpio_bank at91sam9261_gpio[] = { 256static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
255 { 257 {
256 .id = AT91SAM9261_ID_PIOA, 258 .id = AT91SAM9261_ID_PIOA,
257 .offset = AT91_PIOA, 259 .regbase = AT91SAM9261_BASE_PIOA,
258 .clock = &pioA_clk,
259 }, { 260 }, {
260 .id = AT91SAM9261_ID_PIOB, 261 .id = AT91SAM9261_ID_PIOB,
261 .offset = AT91_PIOB, 262 .regbase = AT91SAM9261_BASE_PIOB,
262 .clock = &pioB_clk,
263 }, { 263 }, {
264 .id = AT91SAM9261_ID_PIOC, 264 .id = AT91SAM9261_ID_PIOC,
265 .offset = AT91_PIOC, 265 .regbase = AT91SAM9261_BASE_PIOC,
266 .clock = &pioC_clk,
267 } 266 }
268}; 267};
269 268
270static void at91sam9261_poweroff(void)
271{
272 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
273}
274
275
276/* -------------------------------------------------------------------- 269/* --------------------------------------------------------------------
277 * AT91SAM9261 processor initialization 270 * AT91SAM9261 processor initialization
278 * -------------------------------------------------------------------- */ 271 * -------------------------------------------------------------------- */
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void)
285 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); 278 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
286} 279}
287 280
281static void __init at91sam9261_ioremap_registers(void)
282{
283 at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
284 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
285 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
286}
287
288static void __init at91sam9261_initialize(void) 288static void __init at91sam9261_initialize(void)
289{ 289{
290 arm_pm_restart = at91sam9_alt_restart; 290 arm_pm_restart = at91sam9_alt_restart;
291 pm_power_off = at91sam9261_poweroff;
292 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
293 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
294 293
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
341struct at91_init_soc __initdata at91sam9261_soc = { 340struct at91_init_soc __initdata at91sam9261_soc = {
342 .map_io = at91sam9261_map_io, 341 .map_io = at91sam9261_map_io,
343 .default_irq_priority = at91sam9261_default_irq_priority, 342 .default_irq_priority = at91sam9261_default_irq_priority,
343 .ioremap_registers = at91sam9261_ioremap_registers,
344 .register_clocks = at91sam9261_register_clocks, 344 .register_clocks = at91sam9261_register_clocks,
345 .init = at91sam9261_initialize, 345 .init = at91sam9261_initialize,
346}; 346};
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index a178b58b0b9c..fc59cbdb0e3c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
118 if (!data) 118 if (!data)
119 return; 119 return;
120 120
121 if (data->vbus_pin) { 121 if (gpio_is_valid(data->vbus_pin)) {
122 at91_set_gpio_input(data->vbus_pin, 0); 122 at91_set_gpio_input(data->vbus_pin, 0);
123 at91_set_deglitch(data->vbus_pin, 1); 123 at91_set_deglitch(data->vbus_pin, 1);
124 } 124 }
@@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
171 return; 171 return;
172 172
173 /* input/irq */ 173 /* input/irq */
174 if (data->det_pin) { 174 if (gpio_is_valid(data->det_pin)) {
175 at91_set_gpio_input(data->det_pin, 1); 175 at91_set_gpio_input(data->det_pin, 1);
176 at91_set_deglitch(data->det_pin, 1); 176 at91_set_deglitch(data->det_pin, 1);
177 } 177 }
178 if (data->wp_pin) 178 if (gpio_is_valid(data->wp_pin))
179 at91_set_gpio_input(data->wp_pin, 1); 179 at91_set_gpio_input(data->wp_pin, 1);
180 if (data->vcc_pin) 180 if (gpio_is_valid(data->vcc_pin))
181 at91_set_gpio_output(data->vcc_pin, 0); 181 at91_set_gpio_output(data->vcc_pin, 0);
182 182
183 /* CLK */ 183 /* CLK */
@@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
240 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 240 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
241 241
242 /* enable pin */ 242 /* enable pin */
243 if (data->enable_pin) 243 if (gpio_is_valid(data->enable_pin))
244 at91_set_gpio_output(data->enable_pin, 1); 244 at91_set_gpio_output(data->enable_pin, 1);
245 245
246 /* ready/busy pin */ 246 /* ready/busy pin */
247 if (data->rdy_pin) 247 if (gpio_is_valid(data->rdy_pin))
248 at91_set_gpio_input(data->rdy_pin, 1); 248 at91_set_gpio_input(data->rdy_pin, 1);
249 249
250 /* card detect pin */ 250 /* card detect pin */
251 if (data->det_pin) 251 if (gpio_is_valid(data->det_pin))
252 at91_set_gpio_input(data->det_pin, 1); 252 at91_set_gpio_input(data->det_pin, 1);
253 253
254 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ 254 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
@@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { }
600 600
601static struct resource rtt_resources[] = { 601static struct resource rtt_resources[] = {
602 { 602 {
603 .start = AT91_BASE_SYS + AT91_RTT, 603 .start = AT91SAM9261_BASE_RTT,
604 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 604 .end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
605 .flags = IORESOURCE_MEM, 605 .flags = IORESOURCE_MEM,
606 } 606 }
607}; 607};
@@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void)
624 * -------------------------------------------------------------------- */ 624 * -------------------------------------------------------------------- */
625 625
626#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 626#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
627static struct resource wdt_resources[] = {
628 {
629 .start = AT91SAM9261_BASE_WDT,
630 .end = AT91SAM9261_BASE_WDT + SZ_16 - 1,
631 .flags = IORESOURCE_MEM,
632 }
633};
634
627static struct platform_device at91sam9261_wdt_device = { 635static struct platform_device at91sam9261_wdt_device = {
628 .name = "at91_wdt", 636 .name = "at91_wdt",
629 .id = -1, 637 .id = -1,
630 .num_resources = 0, 638 .resource = wdt_resources,
639 .num_resources = ARRAY_SIZE(wdt_resources),
631}; 640};
632 641
633static void __init at91_add_device_watchdog(void) 642static void __init at91_add_device_watchdog(void)
@@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
816#if defined(CONFIG_SERIAL_ATMEL) 825#if defined(CONFIG_SERIAL_ATMEL)
817static struct resource dbgu_resources[] = { 826static struct resource dbgu_resources[] = {
818 [0] = { 827 [0] = {
819 .start = AT91_BASE_SYS + AT91_DBGU, 828 .start = AT91SAM9261_BASE_DBGU,
820 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 829 .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
821 .flags = IORESOURCE_MEM, 830 .flags = IORESOURCE_MEM,
822 }, 831 },
823 [1] = { 832 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 50d016310031..79e3669b1117 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15 14
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
@@ -19,11 +18,11 @@
19#include <mach/at91sam9263.h> 18#include <mach/at91sam9263.h>
20#include <mach/at91_pmc.h> 19#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h> 20#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h>
23 21
24#include "soc.h" 22#include "soc.h"
25#include "generic.h" 23#include "generic.h"
26#include "clock.h" 24#include "clock.h"
25#include "sam9_smc.h"
27 26
28/* -------------------------------------------------------------------- 27/* --------------------------------------------------------------------
29 * Clocks 28 * Clocks
@@ -118,7 +117,7 @@ static struct clk pwm_clk = {
118 .type = CLK_TYPE_PERIPHERAL, 117 .type = CLK_TYPE_PERIPHERAL,
119}; 118};
120static struct clk macb_clk = { 119static struct clk macb_clk = {
121 .name = "macb_clk", 120 .name = "pclk",
122 .pmc_mask = 1 << AT91SAM9263_ID_EMAC, 121 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
123 .type = CLK_TYPE_PERIPHERAL, 122 .type = CLK_TYPE_PERIPHERAL,
124}; 123};
@@ -182,6 +181,8 @@ static struct clk *periph_clocks[] __initdata = {
182}; 181};
183 182
184static struct clk_lookup periph_clocks_lookups[] = { 183static struct clk_lookup periph_clocks_lookups[] = {
184 /* One additional fake clock for macb_hclk */
185 CLKDEV_CON_ID("hclk", &macb_clk),
185 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 186 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
186 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 187 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
187 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), 188 CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
@@ -191,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
191 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), 192 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
192 /* fake hclk clock */ 193 /* fake hclk clock */
193 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), 194 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
195 CLKDEV_CON_ID("pioA", &pioA_clk),
196 CLKDEV_CON_ID("pioB", &pioB_clk),
197 CLKDEV_CON_ID("pioC", &pioCDE_clk),
198 CLKDEV_CON_ID("pioD", &pioCDE_clk),
199 CLKDEV_CON_ID("pioE", &pioCDE_clk),
194}; 200};
195 201
196static struct clk_lookup usart_clocks_lookups[] = { 202static struct clk_lookup usart_clocks_lookups[] = {
@@ -263,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id)
263 * GPIO 269 * GPIO
264 * -------------------------------------------------------------------- */ 270 * -------------------------------------------------------------------- */
265 271
266static struct at91_gpio_bank at91sam9263_gpio[] = { 272static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
267 { 273 {
268 .id = AT91SAM9263_ID_PIOA, 274 .id = AT91SAM9263_ID_PIOA,
269 .offset = AT91_PIOA, 275 .regbase = AT91SAM9263_BASE_PIOA,
270 .clock = &pioA_clk,
271 }, { 276 }, {
272 .id = AT91SAM9263_ID_PIOB, 277 .id = AT91SAM9263_ID_PIOB,
273 .offset = AT91_PIOB, 278 .regbase = AT91SAM9263_BASE_PIOB,
274 .clock = &pioB_clk,
275 }, { 279 }, {
276 .id = AT91SAM9263_ID_PIOCDE, 280 .id = AT91SAM9263_ID_PIOCDE,
277 .offset = AT91_PIOC, 281 .regbase = AT91SAM9263_BASE_PIOC,
278 .clock = &pioCDE_clk,
279 }, { 282 }, {
280 .id = AT91SAM9263_ID_PIOCDE, 283 .id = AT91SAM9263_ID_PIOCDE,
281 .offset = AT91_PIOD, 284 .regbase = AT91SAM9263_BASE_PIOD,
282 .clock = &pioCDE_clk,
283 }, { 285 }, {
284 .id = AT91SAM9263_ID_PIOCDE, 286 .id = AT91SAM9263_ID_PIOCDE,
285 .offset = AT91_PIOE, 287 .regbase = AT91SAM9263_BASE_PIOE,
286 .clock = &pioCDE_clk,
287 } 288 }
288}; 289};
289 290
290static void at91sam9263_poweroff(void)
291{
292 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
293}
294
295
296/* -------------------------------------------------------------------- 291/* --------------------------------------------------------------------
297 * AT91SAM9263 processor initialization 292 * AT91SAM9263 processor initialization
298 * -------------------------------------------------------------------- */ 293 * -------------------------------------------------------------------- */
@@ -303,10 +298,17 @@ static void __init at91sam9263_map_io(void)
303 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); 298 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
304} 299}
305 300
301static void __init at91sam9263_ioremap_registers(void)
302{
303 at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
304 at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
305 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
306 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
307}
308
306static void __init at91sam9263_initialize(void) 309static void __init at91sam9263_initialize(void)
307{ 310{
308 arm_pm_restart = at91sam9_alt_restart; 311 arm_pm_restart = at91sam9_alt_restart;
309 pm_power_off = at91sam9263_poweroff;
310 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
311 313
312 /* Register GPIO subsystem */ 314 /* Register GPIO subsystem */
@@ -358,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
358struct at91_init_soc __initdata at91sam9263_soc = { 360struct at91_init_soc __initdata at91sam9263_soc = {
359 .map_io = at91sam9263_map_io, 361 .map_io = at91sam9263_map_io,
360 .default_irq_priority = at91sam9263_default_irq_priority, 362 .default_irq_priority = at91sam9263_default_irq_priority,
363 .ioremap_registers = at91sam9263_ioremap_registers,
361 .register_clocks = at91sam9263_register_clocks, 364 .register_clocks = at91sam9263_register_clocks,
362 .init = at91sam9263_initialize, 365 .init = at91sam9263_initialize,
363}; 366};
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index d5fbac9ff4fa..7b46b2787022 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 70
71 /* Enable VBus control for UHP ports */ 71 /* Enable VBus control for UHP ports */
72 for (i = 0; i < data->ports; i++) { 72 for (i = 0; i < data->ports; i++) {
73 if (data->vbus_pin[i]) 73 if (gpio_is_valid(data->vbus_pin[i]))
74 at91_set_gpio_output(data->vbus_pin[i], 0); 74 at91_set_gpio_output(data->vbus_pin[i], 0);
75 } 75 }
76 76
@@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
123 if (!data) 123 if (!data)
124 return; 124 return;
125 125
126 if (data->vbus_pin) { 126 if (gpio_is_valid(data->vbus_pin)) {
127 at91_set_gpio_input(data->vbus_pin, 0); 127 at91_set_gpio_input(data->vbus_pin, 0);
128 at91_set_deglitch(data->vbus_pin, 1); 128 at91_set_deglitch(data->vbus_pin, 1);
129 } 129 }
@@ -144,7 +144,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
144 144
145#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) 145#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
146static u64 eth_dmamask = DMA_BIT_MASK(32); 146static u64 eth_dmamask = DMA_BIT_MASK(32);
147static struct at91_eth_data eth_data; 147static struct macb_platform_data eth_data;
148 148
149static struct resource eth_resources[] = { 149static struct resource eth_resources[] = {
150 [0] = { 150 [0] = {
@@ -171,12 +171,12 @@ static struct platform_device at91sam9263_eth_device = {
171 .num_resources = ARRAY_SIZE(eth_resources), 171 .num_resources = ARRAY_SIZE(eth_resources),
172}; 172};
173 173
174void __init at91_add_device_eth(struct at91_eth_data *data) 174void __init at91_add_device_eth(struct macb_platform_data *data)
175{ 175{
176 if (!data) 176 if (!data)
177 return; 177 return;
178 178
179 if (data->phy_irq_pin) { 179 if (gpio_is_valid(data->phy_irq_pin)) {
180 at91_set_gpio_input(data->phy_irq_pin, 0); 180 at91_set_gpio_input(data->phy_irq_pin, 0);
181 at91_set_deglitch(data->phy_irq_pin, 1); 181 at91_set_deglitch(data->phy_irq_pin, 1);
182 } 182 }
@@ -208,7 +208,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
208 platform_device_register(&at91sam9263_eth_device); 208 platform_device_register(&at91sam9263_eth_device);
209} 209}
210#else 210#else
211void __init at91_add_device_eth(struct at91_eth_data *data) {} 211void __init at91_add_device_eth(struct macb_platform_data *data) {}
212#endif 212#endif
213 213
214 214
@@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
276 return; 276 return;
277 277
278 /* input/irq */ 278 /* input/irq */
279 if (data->det_pin) { 279 if (gpio_is_valid(data->det_pin)) {
280 at91_set_gpio_input(data->det_pin, 1); 280 at91_set_gpio_input(data->det_pin, 1);
281 at91_set_deglitch(data->det_pin, 1); 281 at91_set_deglitch(data->det_pin, 1);
282 } 282 }
283 if (data->wp_pin) 283 if (gpio_is_valid(data->wp_pin))
284 at91_set_gpio_input(data->wp_pin, 1); 284 at91_set_gpio_input(data->wp_pin, 1);
285 if (data->vcc_pin) 285 if (gpio_is_valid(data->vcc_pin))
286 at91_set_gpio_output(data->vcc_pin, 0); 286 at91_set_gpio_output(data->vcc_pin, 0);
287 287
288 if (mmc_id == 0) { /* MCI0 */ 288 if (mmc_id == 0) { /* MCI0 */
@@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
430 } 430 }
431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); 431 at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
432 432
433 if (data->det_pin) { 433 if (gpio_is_valid(data->det_pin)) {
434 at91_set_gpio_input(data->det_pin, 1); 434 at91_set_gpio_input(data->det_pin, 1);
435 at91_set_deglitch(data->det_pin, 1); 435 at91_set_deglitch(data->det_pin, 1);
436 } 436 }
437 437
438 if (data->irq_pin) { 438 if (gpio_is_valid(data->irq_pin)) {
439 at91_set_gpio_input(data->irq_pin, 1); 439 at91_set_gpio_input(data->irq_pin, 1);
440 at91_set_deglitch(data->irq_pin, 1); 440 at91_set_deglitch(data->irq_pin, 1);
441 } 441 }
442 442
443 if (data->vcc_pin) 443 if (gpio_is_valid(data->vcc_pin))
444 /* initially off */ 444 /* initially off */
445 at91_set_gpio_output(data->vcc_pin, 0); 445 at91_set_gpio_output(data->vcc_pin, 0);
446 446
@@ -473,8 +473,8 @@ static struct resource nand_resources[] = {
473 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
474 }, 474 },
475 [1] = { 475 [1] = {
476 .start = AT91_BASE_SYS + AT91_ECC0, 476 .start = AT91SAM9263_BASE_ECC0,
477 .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, 477 .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
478 .flags = IORESOURCE_MEM, 478 .flags = IORESOURCE_MEM,
479 } 479 }
480}; 480};
@@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); 500 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
501 501
502 /* enable pin */ 502 /* enable pin */
503 if (data->enable_pin) 503 if (gpio_is_valid(data->enable_pin))
504 at91_set_gpio_output(data->enable_pin, 1); 504 at91_set_gpio_output(data->enable_pin, 1);
505 505
506 /* ready/busy pin */ 506 /* ready/busy pin */
507 if (data->rdy_pin) 507 if (gpio_is_valid(data->rdy_pin))
508 at91_set_gpio_input(data->rdy_pin, 1); 508 at91_set_gpio_input(data->rdy_pin, 1);
509 509
510 /* card detect pin */ 510 /* card detect pin */
511 if (data->det_pin) 511 if (gpio_is_valid(data->det_pin))
512 at91_set_gpio_input(data->det_pin, 1); 512 at91_set_gpio_input(data->det_pin, 1);
513 513
514 nand_data = *data; 514 nand_data = *data;
@@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ 749 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
750 750
751 /* reset */ 751 /* reset */
752 if (data->reset_pin) 752 if (gpio_is_valid(data->reset_pin))
753 at91_set_gpio_output(data->reset_pin, 0); 753 at91_set_gpio_output(data->reset_pin, 0);
754 754
755 ac97_data = *data; 755 ac97_data = *data;
@@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { }
956 956
957static struct resource rtt0_resources[] = { 957static struct resource rtt0_resources[] = {
958 { 958 {
959 .start = AT91_BASE_SYS + AT91_RTT0, 959 .start = AT91SAM9263_BASE_RTT0,
960 .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, 960 .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
961 .flags = IORESOURCE_MEM, 961 .flags = IORESOURCE_MEM,
962 } 962 }
963}; 963};
@@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = {
971 971
972static struct resource rtt1_resources[] = { 972static struct resource rtt1_resources[] = {
973 { 973 {
974 .start = AT91_BASE_SYS + AT91_RTT1, 974 .start = AT91SAM9263_BASE_RTT1,
975 .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, 975 .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
976 .flags = IORESOURCE_MEM, 976 .flags = IORESOURCE_MEM,
977 } 977 }
978}; 978};
@@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void)
996 * -------------------------------------------------------------------- */ 996 * -------------------------------------------------------------------- */
997 997
998#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 998#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
999static struct resource wdt_resources[] = {
1000 {
1001 .start = AT91SAM9263_BASE_WDT,
1002 .end = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1003 .flags = IORESOURCE_MEM,
1004 }
1005};
1006
999static struct platform_device at91sam9263_wdt_device = { 1007static struct platform_device at91sam9263_wdt_device = {
1000 .name = "at91_wdt", 1008 .name = "at91_wdt",
1001 .id = -1, 1009 .id = -1,
1002 .num_resources = 0, 1010 .resource = wdt_resources,
1011 .num_resources = ARRAY_SIZE(wdt_resources),
1003}; 1012};
1004 1013
1005static void __init at91_add_device_watchdog(void) 1014static void __init at91_add_device_watchdog(void)
@@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1196 1205
1197static struct resource dbgu_resources[] = { 1206static struct resource dbgu_resources[] = {
1198 [0] = { 1207 [0] = {
1199 .start = AT91_BASE_SYS + AT91_DBGU, 1208 .start = AT91SAM9263_BASE_DBGU,
1200 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1209 .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1201 .flags = IORESOURCE_MEM, 1210 .flags = IORESOURCE_MEM,
1202 }, 1211 },
1203 [1] = { 1212 [1] = {
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4ba85499fa97..d89ead740a99 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -25,7 +25,17 @@
25 25
26static u32 pit_cycle; /* write-once */ 26static u32 pit_cycle; /* write-once */
27static u32 pit_cnt; /* access only w/system irq blocked */ 27static u32 pit_cnt; /* access only w/system irq blocked */
28static void __iomem *pit_base_addr __read_mostly;
28 29
30static inline unsigned int pit_read(unsigned int reg_offset)
31{
32 return __raw_readl(pit_base_addr + reg_offset);
33}
34
35static inline void pit_write(unsigned int reg_offset, unsigned long value)
36{
37 __raw_writel(value, pit_base_addr + reg_offset);
38}
29 39
30/* 40/*
31 * Clocksource: just a monotonic counter of MCK/16 cycles. 41 * Clocksource: just a monotonic counter of MCK/16 cycles.
@@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs)
39 49
40 raw_local_irq_save(flags); 50 raw_local_irq_save(flags);
41 elapsed = pit_cnt; 51 elapsed = pit_cnt;
42 t = at91_sys_read(AT91_PIT_PIIR); 52 t = pit_read(AT91_PIT_PIIR);
43 raw_local_irq_restore(flags); 53 raw_local_irq_restore(flags);
44 54
45 elapsed += PIT_PICNT(t) * pit_cycle; 55 elapsed += PIT_PICNT(t) * pit_cycle;
@@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
64 switch (mode) { 74 switch (mode) {
65 case CLOCK_EVT_MODE_PERIODIC: 75 case CLOCK_EVT_MODE_PERIODIC:
66 /* update clocksource counter */ 76 /* update clocksource counter */
67 pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 77 pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
68 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN 78 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
69 | AT91_PIT_PITIEN); 79 | AT91_PIT_PITIEN);
70 break; 80 break;
71 case CLOCK_EVT_MODE_ONESHOT: 81 case CLOCK_EVT_MODE_ONESHOT:
@@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
74 case CLOCK_EVT_MODE_SHUTDOWN: 84 case CLOCK_EVT_MODE_SHUTDOWN:
75 case CLOCK_EVT_MODE_UNUSED: 85 case CLOCK_EVT_MODE_UNUSED:
76 /* disable irq, leaving the clocksource active */ 86 /* disable irq, leaving the clocksource active */
77 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); 87 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
78 break; 88 break;
79 case CLOCK_EVT_MODE_RESUME: 89 case CLOCK_EVT_MODE_RESUME:
80 break; 90 break;
@@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
103 113
104 /* The PIT interrupt may be disabled, and is shared */ 114 /* The PIT interrupt may be disabled, and is shared */
105 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) 115 if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
106 && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) { 116 && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
107 unsigned nr_ticks; 117 unsigned nr_ticks;
108 118
109 /* Get number of ticks performed before irq, and ack it */ 119 /* Get number of ticks performed before irq, and ack it */
110 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); 120 nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
111 do { 121 do {
112 pit_cnt += pit_cycle; 122 pit_cnt += pit_cycle;
113 pit_clkevt.event_handler(&pit_clkevt); 123 pit_clkevt.event_handler(&pit_clkevt);
@@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = {
129static void at91sam926x_pit_reset(void) 139static void at91sam926x_pit_reset(void)
130{ 140{
131 /* Disable timer and irqs */ 141 /* Disable timer and irqs */
132 at91_sys_write(AT91_PIT_MR, 0); 142 pit_write(AT91_PIT_MR, 0);
133 143
134 /* Clear any pending interrupts, wait for PIT to stop counting */ 144 /* Clear any pending interrupts, wait for PIT to stop counting */
135 while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0) 145 while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
136 cpu_relax(); 146 cpu_relax();
137 147
138 /* Start PIT but don't enable IRQ */ 148 /* Start PIT but don't enable IRQ */
139 at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); 149 pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
140} 150}
141 151
142/* 152/*
@@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void)
178static void at91sam926x_pit_suspend(void) 188static void at91sam926x_pit_suspend(void)
179{ 189{
180 /* Disable timer */ 190 /* Disable timer */
181 at91_sys_write(AT91_PIT_MR, 0); 191 pit_write(AT91_PIT_MR, 0);
192}
193
194void __init at91sam926x_ioremap_pit(u32 addr)
195{
196 pit_base_addr = ioremap(addr, 16);
197
198 if (!pit_base_addr)
199 panic("Impossible to ioremap PIT\n");
182} 200}
183 201
184struct sys_timer at91sam926x_timer = { 202struct sys_timer at91sam926x_timer = {
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index ff21f7a60c63..7032dd32cdf0 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/pm.h>
15#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
16 15
17#include <asm/irq.h> 16#include <asm/irq.h>
@@ -20,12 +19,12 @@
20#include <mach/at91sam9g45.h> 19#include <mach/at91sam9g45.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24#include <mach/cpu.h> 22#include <mach/cpu.h>
25 23
26#include "soc.h" 24#include "soc.h"
27#include "generic.h" 25#include "generic.h"
28#include "clock.h" 26#include "clock.h"
27#include "sam9_smc.h"
29 28
30/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
31 * Clocks 30 * Clocks
@@ -150,7 +149,7 @@ static struct clk ac97_clk = {
150 .type = CLK_TYPE_PERIPHERAL, 149 .type = CLK_TYPE_PERIPHERAL,
151}; 150};
152static struct clk macb_clk = { 151static struct clk macb_clk = {
153 .name = "macb_clk", 152 .name = "pclk",
154 .pmc_mask = 1 << AT91SAM9G45_ID_EMAC, 153 .pmc_mask = 1 << AT91SAM9G45_ID_EMAC,
155 .type = CLK_TYPE_PERIPHERAL, 154 .type = CLK_TYPE_PERIPHERAL,
156}; 155};
@@ -209,6 +208,8 @@ static struct clk *periph_clocks[] __initdata = {
209}; 208};
210 209
211static struct clk_lookup periph_clocks_lookups[] = { 210static struct clk_lookup periph_clocks_lookups[] = {
211 /* One additional fake clock for macb_hclk */
212 CLKDEV_CON_ID("hclk", &macb_clk),
212 /* One additional fake clock for ohci */ 213 /* One additional fake clock for ohci */
213 CLKDEV_CON_ID("ohci_clk", &uhphs_clk), 214 CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
214 CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk), 215 CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
@@ -231,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
231 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), 232 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
232 /* fake hclk clock */ 233 /* fake hclk clock */
233 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), 234 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
235 CLKDEV_CON_ID("pioA", &pioA_clk),
236 CLKDEV_CON_ID("pioB", &pioB_clk),
237 CLKDEV_CON_ID("pioC", &pioC_clk),
238 CLKDEV_CON_ID("pioD", &pioDE_clk),
239 CLKDEV_CON_ID("pioE", &pioDE_clk),
234}; 240};
235 241
236static struct clk_lookup usart_clocks_lookups[] = { 242static struct clk_lookup usart_clocks_lookups[] = {
@@ -293,27 +299,22 @@ void __init at91sam9g45_set_console_clock(int id)
293 * GPIO 299 * GPIO
294 * -------------------------------------------------------------------- */ 300 * -------------------------------------------------------------------- */
295 301
296static struct at91_gpio_bank at91sam9g45_gpio[] = { 302static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
297 { 303 {
298 .id = AT91SAM9G45_ID_PIOA, 304 .id = AT91SAM9G45_ID_PIOA,
299 .offset = AT91_PIOA, 305 .regbase = AT91SAM9G45_BASE_PIOA,
300 .clock = &pioA_clk,
301 }, { 306 }, {
302 .id = AT91SAM9G45_ID_PIOB, 307 .id = AT91SAM9G45_ID_PIOB,
303 .offset = AT91_PIOB, 308 .regbase = AT91SAM9G45_BASE_PIOB,
304 .clock = &pioB_clk,
305 }, { 309 }, {
306 .id = AT91SAM9G45_ID_PIOC, 310 .id = AT91SAM9G45_ID_PIOC,
307 .offset = AT91_PIOC, 311 .regbase = AT91SAM9G45_BASE_PIOC,
308 .clock = &pioC_clk,
309 }, { 312 }, {
310 .id = AT91SAM9G45_ID_PIODE, 313 .id = AT91SAM9G45_ID_PIODE,
311 .offset = AT91_PIOD, 314 .regbase = AT91SAM9G45_BASE_PIOD,
312 .clock = &pioDE_clk,
313 }, { 315 }, {
314 .id = AT91SAM9G45_ID_PIODE, 316 .id = AT91SAM9G45_ID_PIODE,
315 .offset = AT91_PIOE, 317 .regbase = AT91SAM9G45_BASE_PIOE,
316 .clock = &pioDE_clk,
317 } 318 }
318}; 319};
319 320
@@ -322,12 +323,6 @@ static void at91sam9g45_restart(char mode, const char *cmd)
322 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 323 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
323} 324}
324 325
325static void at91sam9g45_poweroff(void)
326{
327 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
328}
329
330
331/* -------------------------------------------------------------------- 326/* --------------------------------------------------------------------
332 * AT91SAM9G45 processor initialization 327 * AT91SAM9G45 processor initialization
333 * -------------------------------------------------------------------- */ 328 * -------------------------------------------------------------------- */
@@ -338,10 +333,16 @@ static void __init at91sam9g45_map_io(void)
338 init_consistent_dma_size(SZ_4M); 333 init_consistent_dma_size(SZ_4M);
339} 334}
340 335
336static void __init at91sam9g45_ioremap_registers(void)
337{
338 at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
339 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
340 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
341}
342
341static void __init at91sam9g45_initialize(void) 343static void __init at91sam9g45_initialize(void)
342{ 344{
343 arm_pm_restart = at91sam9g45_restart; 345 arm_pm_restart = at91sam9g45_restart;
344 pm_power_off = at91sam9g45_poweroff;
345 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 346 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
346 347
347 /* Register GPIO subsystem */ 348 /* Register GPIO subsystem */
@@ -393,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
393struct at91_init_soc __initdata at91sam9g45_soc = { 394struct at91_init_soc __initdata at91sam9g45_soc = {
394 .map_io = at91sam9g45_map_io, 395 .map_io = at91sam9g45_map_io,
395 .default_irq_priority = at91sam9g45_default_irq_priority, 396 .default_irq_priority = at91sam9g45_default_irq_priority,
397 .ioremap_registers = at91sam9g45_ioremap_registers,
396 .register_clocks = at91sam9g45_register_clocks, 398 .register_clocks = at91sam9g45_register_clocks,
397 .init = at91sam9g45_initialize, 399 .init = at91sam9g45_initialize,
398}; 400};
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 09a16d6bd5cd..b7582dd10dc3 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = {
44 44
45static struct resource hdmac_resources[] = { 45static struct resource hdmac_resources[] = {
46 [0] = { 46 [0] = {
47 .start = AT91_BASE_SYS + AT91_DMA, 47 .start = AT91SAM9G45_BASE_DMA,
48 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 48 .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
49 .flags = IORESOURCE_MEM, 49 .flags = IORESOURCE_MEM,
50 }, 50 },
51 [1] = { 51 [1] = {
@@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
120 120
121 /* Enable VBus control for UHP ports */ 121 /* Enable VBus control for UHP ports */
122 for (i = 0; i < data->ports; i++) { 122 for (i = 0; i < data->ports; i++) {
123 if (data->vbus_pin[i]) 123 if (gpio_is_valid(data->vbus_pin[i]))
124 at91_set_gpio_output(data->vbus_pin[i], 0); 124 at91_set_gpio_output(data->vbus_pin[i], 0);
125 } 125 }
126 126
@@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
181 181
182 /* Enable VBus control for UHP ports */ 182 /* Enable VBus control for UHP ports */
183 for (i = 0; i < data->ports; i++) { 183 for (i = 0; i < data->ports; i++) {
184 if (data->vbus_pin[i]) 184 if (gpio_is_valid(data->vbus_pin[i]))
185 at91_set_gpio_output(data->vbus_pin[i], 0); 185 at91_set_gpio_output(data->vbus_pin[i], 0);
186 } 186 }
187 187
@@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
263 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 263 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
264 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 264 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
265 265
266 if (data && data->vbus_pin > 0) { 266 if (data && gpio_is_valid(data->vbus_pin)) {
267 at91_set_gpio_input(data->vbus_pin, 0); 267 at91_set_gpio_input(data->vbus_pin, 0);
268 at91_set_deglitch(data->vbus_pin, 1); 268 at91_set_deglitch(data->vbus_pin, 1);
269 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 269 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -284,7 +284,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
284 284
285#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) 285#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
286static u64 eth_dmamask = DMA_BIT_MASK(32); 286static u64 eth_dmamask = DMA_BIT_MASK(32);
287static struct at91_eth_data eth_data; 287static struct macb_platform_data eth_data;
288 288
289static struct resource eth_resources[] = { 289static struct resource eth_resources[] = {
290 [0] = { 290 [0] = {
@@ -311,12 +311,12 @@ static struct platform_device at91sam9g45_eth_device = {
311 .num_resources = ARRAY_SIZE(eth_resources), 311 .num_resources = ARRAY_SIZE(eth_resources),
312}; 312};
313 313
314void __init at91_add_device_eth(struct at91_eth_data *data) 314void __init at91_add_device_eth(struct macb_platform_data *data)
315{ 315{
316 if (!data) 316 if (!data)
317 return; 317 return;
318 318
319 if (data->phy_irq_pin) { 319 if (gpio_is_valid(data->phy_irq_pin)) {
320 at91_set_gpio_input(data->phy_irq_pin, 0); 320 at91_set_gpio_input(data->phy_irq_pin, 0);
321 at91_set_deglitch(data->phy_irq_pin, 1); 321 at91_set_deglitch(data->phy_irq_pin, 1);
322 } 322 }
@@ -348,7 +348,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
348 platform_device_register(&at91sam9g45_eth_device); 348 platform_device_register(&at91sam9g45_eth_device);
349} 349}
350#else 350#else
351void __init at91_add_device_eth(struct at91_eth_data *data) {} 351void __init at91_add_device_eth(struct macb_platform_data *data) {}
352#endif 352#endif
353 353
354 354
@@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
449 449
450 450
451 /* input/irq */ 451 /* input/irq */
452 if (data->slot[0].detect_pin) { 452 if (gpio_is_valid(data->slot[0].detect_pin)) {
453 at91_set_gpio_input(data->slot[0].detect_pin, 1); 453 at91_set_gpio_input(data->slot[0].detect_pin, 1);
454 at91_set_deglitch(data->slot[0].detect_pin, 1); 454 at91_set_deglitch(data->slot[0].detect_pin, 1);
455 } 455 }
456 if (data->slot[0].wp_pin) 456 if (gpio_is_valid(data->slot[0].wp_pin))
457 at91_set_gpio_input(data->slot[0].wp_pin, 1); 457 at91_set_gpio_input(data->slot[0].wp_pin, 1);
458 458
459 if (mmc_id == 0) { /* MCI0 */ 459 if (mmc_id == 0) { /* MCI0 */
@@ -529,8 +529,8 @@ static struct resource nand_resources[] = {
529 .flags = IORESOURCE_MEM, 529 .flags = IORESOURCE_MEM,
530 }, 530 },
531 [1] = { 531 [1] = {
532 .start = AT91_BASE_SYS + AT91_ECC, 532 .start = AT91SAM9G45_BASE_ECC,
533 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 533 .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
534 .flags = IORESOURCE_MEM, 534 .flags = IORESOURCE_MEM,
535 } 535 }
536}; 536};
@@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
556 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 556 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
557 557
558 /* enable pin */ 558 /* enable pin */
559 if (data->enable_pin) 559 if (gpio_is_valid(data->enable_pin))
560 at91_set_gpio_output(data->enable_pin, 1); 560 at91_set_gpio_output(data->enable_pin, 1);
561 561
562 /* ready/busy pin */ 562 /* ready/busy pin */
563 if (data->rdy_pin) 563 if (gpio_is_valid(data->rdy_pin))
564 at91_set_gpio_input(data->rdy_pin, 1); 564 at91_set_gpio_input(data->rdy_pin, 1);
565 565
566 /* card detect pin */ 566 /* card detect pin */
567 if (data->det_pin) 567 if (gpio_is_valid(data->det_pin))
568 at91_set_gpio_input(data->det_pin, 1); 568 at91_set_gpio_input(data->det_pin, 1);
569 569
570 nand_data = *data; 570 nand_data = *data;
@@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
859 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ 859 at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */
860 860
861 /* reset */ 861 /* reset */
862 if (data->reset_pin) 862 if (gpio_is_valid(data->reset_pin))
863 at91_set_gpio_output(data->reset_pin, 0); 863 at91_set_gpio_output(data->reset_pin, 0);
864 864
865 ac97_data = *data; 865 ac97_data = *data;
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { }
1009 * -------------------------------------------------------------------- */ 1009 * -------------------------------------------------------------------- */
1010 1010
1011#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) 1011#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
1012static struct resource rtc_resources[] = {
1013 [0] = {
1014 .start = AT91SAM9G45_BASE_RTC,
1015 .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1,
1016 .flags = IORESOURCE_MEM,
1017 },
1018 [1] = {
1019 .start = AT91_ID_SYS,
1020 .end = AT91_ID_SYS,
1021 .flags = IORESOURCE_IRQ,
1022 },
1023};
1024
1012static struct platform_device at91sam9g45_rtc_device = { 1025static struct platform_device at91sam9g45_rtc_device = {
1013 .name = "at91_rtc", 1026 .name = "at91_rtc",
1014 .id = -1, 1027 .id = -1,
1015 .num_resources = 0, 1028 .resource = rtc_resources,
1029 .num_resources = ARRAY_SIZE(rtc_resources),
1016}; 1030};
1017 1031
1018static void __init at91_add_device_rtc(void) 1032static void __init at91_add_device_rtc(void)
@@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
1081 1095
1082static struct resource rtt_resources[] = { 1096static struct resource rtt_resources[] = {
1083 { 1097 {
1084 .start = AT91_BASE_SYS + AT91_RTT, 1098 .start = AT91SAM9G45_BASE_RTT,
1085 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 1099 .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
1086 .flags = IORESOURCE_MEM, 1100 .flags = IORESOURCE_MEM,
1087 } 1101 }
1088}; 1102};
@@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {}
1133 * -------------------------------------------------------------------- */ 1147 * -------------------------------------------------------------------- */
1134 1148
1135#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 1149#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1150static struct resource wdt_resources[] = {
1151 {
1152 .start = AT91SAM9G45_BASE_WDT,
1153 .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1,
1154 .flags = IORESOURCE_MEM,
1155 }
1156};
1157
1136static struct platform_device at91sam9g45_wdt_device = { 1158static struct platform_device at91sam9g45_wdt_device = {
1137 .name = "at91_wdt", 1159 .name = "at91_wdt",
1138 .id = -1, 1160 .id = -1,
1139 .num_resources = 0, 1161 .resource = wdt_resources,
1162 .num_resources = ARRAY_SIZE(wdt_resources),
1140}; 1163};
1141 1164
1142static void __init at91_add_device_watchdog(void) 1165static void __init at91_add_device_watchdog(void)
@@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1332#if defined(CONFIG_SERIAL_ATMEL) 1355#if defined(CONFIG_SERIAL_ATMEL)
1333static struct resource dbgu_resources[] = { 1356static struct resource dbgu_resources[] = {
1334 [0] = { 1357 [0] = {
1335 .start = AT91_BASE_SYS + AT91_DBGU, 1358 .start = AT91SAM9G45_BASE_DBGU,
1336 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1359 .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
1337 .flags = IORESOURCE_MEM, 1360 .flags = IORESOURCE_MEM,
1338 }, 1361 },
1339 [1] = { 1362 [1] = {
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 61cbb46f5b0e..d6bcb1da11df 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/pm.h>
14 13
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
20#include <mach/at91sam9rl.h> 19#include <mach/at91sam9rl.h>
21#include <mach/at91_pmc.h> 20#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h>
24 22
25#include "soc.h" 23#include "soc.h"
26#include "generic.h" 24#include "generic.h"
27#include "clock.h" 25#include "clock.h"
26#include "sam9_smc.h"
28 27
29/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
30 * Clocks 29 * Clocks
@@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
184 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 183 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
185 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 184 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
186 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 185 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
186 CLKDEV_CON_ID("pioA", &pioA_clk),
187 CLKDEV_CON_ID("pioB", &pioB_clk),
188 CLKDEV_CON_ID("pioC", &pioC_clk),
189 CLKDEV_CON_ID("pioD", &pioD_clk),
187}; 190};
188 191
189static struct clk_lookup usart_clocks_lookups[] = { 192static struct clk_lookup usart_clocks_lookups[] = {
@@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id)
243 * GPIO 246 * GPIO
244 * -------------------------------------------------------------------- */ 247 * -------------------------------------------------------------------- */
245 248
246static struct at91_gpio_bank at91sam9rl_gpio[] = { 249static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = {
247 { 250 {
248 .id = AT91SAM9RL_ID_PIOA, 251 .id = AT91SAM9RL_ID_PIOA,
249 .offset = AT91_PIOA, 252 .regbase = AT91SAM9RL_BASE_PIOA,
250 .clock = &pioA_clk,
251 }, { 253 }, {
252 .id = AT91SAM9RL_ID_PIOB, 254 .id = AT91SAM9RL_ID_PIOB,
253 .offset = AT91_PIOB, 255 .regbase = AT91SAM9RL_BASE_PIOB,
254 .clock = &pioB_clk,
255 }, { 256 }, {
256 .id = AT91SAM9RL_ID_PIOC, 257 .id = AT91SAM9RL_ID_PIOC,
257 .offset = AT91_PIOC, 258 .regbase = AT91SAM9RL_BASE_PIOC,
258 .clock = &pioC_clk,
259 }, { 259 }, {
260 .id = AT91SAM9RL_ID_PIOD, 260 .id = AT91SAM9RL_ID_PIOD,
261 .offset = AT91_PIOD, 261 .regbase = AT91SAM9RL_BASE_PIOD,
262 .clock = &pioD_clk,
263 } 262 }
264}; 263};
265 264
266static void at91sam9rl_poweroff(void)
267{
268 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
269}
270
271
272/* -------------------------------------------------------------------- 265/* --------------------------------------------------------------------
273 * AT91SAM9RL processor initialization 266 * AT91SAM9RL processor initialization
274 * -------------------------------------------------------------------- */ 267 * -------------------------------------------------------------------- */
@@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void)
290 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); 283 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
291} 284}
292 285
286static void __init at91sam9rl_ioremap_registers(void)
287{
288 at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
289 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
290 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
291}
292
293static void __init at91sam9rl_initialize(void) 293static void __init at91sam9rl_initialize(void)
294{ 294{
295 arm_pm_restart = at91sam9_alt_restart; 295 arm_pm_restart = at91sam9_alt_restart;
296 pm_power_off = at91sam9rl_poweroff;
297 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 296 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
298 297
299 /* Register GPIO subsystem */ 298 /* Register GPIO subsystem */
@@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
345struct at91_init_soc __initdata at91sam9rl_soc = { 344struct at91_init_soc __initdata at91sam9rl_soc = {
346 .map_io = at91sam9rl_map_io, 345 .map_io = at91sam9rl_map_io,
347 .default_irq_priority = at91sam9rl_default_irq_priority, 346 .default_irq_priority = at91sam9rl_default_irq_priority,
347 .ioremap_registers = at91sam9rl_ioremap_registers,
348 .register_clocks = at91sam9rl_register_clocks, 348 .register_clocks = at91sam9rl_register_clocks,
349 .init = at91sam9rl_initialize, 349 .init = at91sam9rl_initialize,
350}; 350};
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 628eb566d60c..61908dce9784 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = {
39 39
40static struct resource hdmac_resources[] = { 40static struct resource hdmac_resources[] = {
41 [0] = { 41 [0] = {
42 .start = AT91_BASE_SYS + AT91_DMA, 42 .start = AT91SAM9RL_BASE_DMA,
43 .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, 43 .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
44 .flags = IORESOURCE_MEM, 44 .flags = IORESOURCE_MEM,
45 }, 45 },
46 [2] = { 46 [2] = {
@@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); 147 usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); 148 memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
149 149
150 if (data && data->vbus_pin > 0) { 150 if (data && gpio_is_valid(data->vbus_pin)) {
151 at91_set_gpio_input(data->vbus_pin, 0); 151 at91_set_gpio_input(data->vbus_pin, 0);
152 at91_set_deglitch(data->vbus_pin, 1); 152 at91_set_deglitch(data->vbus_pin, 1);
153 usba_udc_data.pdata.vbus_pin = data->vbus_pin; 153 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
201 return; 201 return;
202 202
203 /* input/irq */ 203 /* input/irq */
204 if (data->det_pin) { 204 if (gpio_is_valid(data->det_pin)) {
205 at91_set_gpio_input(data->det_pin, 1); 205 at91_set_gpio_input(data->det_pin, 1);
206 at91_set_deglitch(data->det_pin, 1); 206 at91_set_deglitch(data->det_pin, 1);
207 } 207 }
208 if (data->wp_pin) 208 if (gpio_is_valid(data->wp_pin))
209 at91_set_gpio_input(data->wp_pin, 1); 209 at91_set_gpio_input(data->wp_pin, 1);
210 if (data->vcc_pin) 210 if (gpio_is_valid(data->vcc_pin))
211 at91_set_gpio_output(data->vcc_pin, 0); 211 at91_set_gpio_output(data->vcc_pin, 0);
212 212
213 /* CLK */ 213 /* CLK */
@@ -248,8 +248,8 @@ static struct resource nand_resources[] = {
248 .flags = IORESOURCE_MEM, 248 .flags = IORESOURCE_MEM,
249 }, 249 },
250 [1] = { 250 [1] = {
251 .start = AT91_BASE_SYS + AT91_ECC, 251 .start = AT91SAM9RL_BASE_ECC,
252 .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, 252 .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
253 .flags = IORESOURCE_MEM, 253 .flags = IORESOURCE_MEM,
254 } 254 }
255}; 255};
@@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); 275 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
276 276
277 /* enable pin */ 277 /* enable pin */
278 if (data->enable_pin) 278 if (gpio_is_valid(data->enable_pin))
279 at91_set_gpio_output(data->enable_pin, 1); 279 at91_set_gpio_output(data->enable_pin, 1);
280 280
281 /* ready/busy pin */ 281 /* ready/busy pin */
282 if (data->rdy_pin) 282 if (gpio_is_valid(data->rdy_pin))
283 at91_set_gpio_input(data->rdy_pin, 1); 283 at91_set_gpio_input(data->rdy_pin, 1);
284 284
285 /* card detect pin */ 285 /* card detect pin */
286 if (data->det_pin) 286 if (gpio_is_valid(data->det_pin))
287 at91_set_gpio_input(data->det_pin, 1); 287 at91_set_gpio_input(data->det_pin, 1);
288 288
289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ 289 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
@@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ 483 at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */
484 484
485 /* reset */ 485 /* reset */
486 if (data->reset_pin) 486 if (gpio_is_valid(data->reset_pin))
487 at91_set_gpio_output(data->reset_pin, 0); 487 at91_set_gpio_output(data->reset_pin, 0);
488 488
489 ac97_data = *data; 489 ac97_data = *data;
@@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {}
685 685
686static struct resource rtt_resources[] = { 686static struct resource rtt_resources[] = {
687 { 687 {
688 .start = AT91_BASE_SYS + AT91_RTT, 688 .start = AT91SAM9RL_BASE_RTT,
689 .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, 689 .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
690 .flags = IORESOURCE_MEM, 690 .flags = IORESOURCE_MEM,
691 } 691 }
692}; 692};
@@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void)
709 * -------------------------------------------------------------------- */ 709 * -------------------------------------------------------------------- */
710 710
711#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) 711#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
712static struct resource wdt_resources[] = {
713 {
714 .start = AT91SAM9RL_BASE_WDT,
715 .end = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
716 .flags = IORESOURCE_MEM,
717 }
718};
719
712static struct platform_device at91sam9rl_wdt_device = { 720static struct platform_device at91sam9rl_wdt_device = {
713 .name = "at91_wdt", 721 .name = "at91_wdt",
714 .id = -1, 722 .id = -1,
715 .num_resources = 0, 723 .resource = wdt_resources,
724 .num_resources = ARRAY_SIZE(wdt_resources),
716}; 725};
717 726
718static void __init at91_add_device_watchdog(void) 727static void __init at91_add_device_watchdog(void)
@@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
908#if defined(CONFIG_SERIAL_ATMEL) 917#if defined(CONFIG_SERIAL_ATMEL)
909static struct resource dbgu_resources[] = { 918static struct resource dbgu_resources[] = {
910 [0] = { 919 [0] = {
911 .start = AT91_BASE_SYS + AT91_DBGU, 920 .start = AT91SAM9RL_BASE_DBGU,
912 .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 921 .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
913 .flags = IORESOURCE_MEM, 922 .flags = IORESOURCE_MEM,
914 }, 923 },
915 [1] = { 924 [1] = {
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 367d5cd5e362..2628384aaae1 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -63,13 +63,15 @@ static void __init onearm_init_early(void)
63 at91_set_serial_console(0); 63 at91_set_serial_console(0);
64} 64}
65 65
66static struct at91_eth_data __initdata onearm_eth_data = { 66static struct macb_platform_data __initdata onearm_eth_data = {
67 .phy_irq_pin = AT91_PIN_PC4, 67 .phy_irq_pin = AT91_PIN_PC4,
68 .is_rmii = 1, 68 .is_rmii = 1,
69}; 69};
70 70
71static struct at91_usbh_data __initdata onearm_usbh_data = { 71static struct at91_usbh_data __initdata onearm_usbh_data = {
72 .ports = 1, 72 .ports = 1,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75static struct at91_udc_data __initdata onearm_udc_data = { 77static struct at91_udc_data __initdata onearm_udc_data = {
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 4282d96dffa8..3bb40694b02d 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void)
75 */ 75 */
76static struct at91_usbh_data __initdata afeb9260_usbh_data = { 76static struct at91_usbh_data __initdata afeb9260_usbh_data = {
77 .ports = 1, 77 .ports = 1,
78 .vbus_pin = {-EINVAL, -EINVAL},
79 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 80};
79 81
80/* 82/*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = {
82 */ 84 */
83static struct at91_udc_data __initdata afeb9260_udc_data = { 85static struct at91_udc_data __initdata afeb9260_udc_data = {
84 .vbus_pin = AT91_PIN_PC5, 86 .vbus_pin = AT91_PIN_PC5,
85 .pullup_pin = 0, /* pull-up driven by UDC */ 87 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
86}; 88};
87 89
88 90
@@ -103,7 +105,7 @@ static struct spi_board_info afeb9260_spi_devices[] = {
103/* 105/*
104 * MACB Ethernet device 106 * MACB Ethernet device
105 */ 107 */
106static struct at91_eth_data __initdata afeb9260_macb_data = { 108static struct macb_platform_data __initdata afeb9260_macb_data = {
107 .phy_irq_pin = AT91_PIN_PA9, 109 .phy_irq_pin = AT91_PIN_PA9,
108 .is_rmii = 0, 110 .is_rmii = 0,
109}; 111};
@@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = {
138 .bus_width_16 = 0, 140 .bus_width_16 = 0,
139 .parts = afeb9260_nand_partition, 141 .parts = afeb9260_nand_partition,
140 .num_parts = ARRAY_SIZE(afeb9260_nand_partition), 142 .num_parts = ARRAY_SIZE(afeb9260_nand_partition),
143 .det_pin = -EINVAL,
141}; 144};
142 145
143 146
@@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
149 .wp_pin = AT91_PIN_PC4, 152 .wp_pin = AT91_PIN_PC4,
150 .slot_b = 1, 153 .slot_b = 1,
151 .wire4 = 1, 154 .wire4 = 1,
155 .vcc_pin = -EINVAL,
152}; 156};
153 157
154 158
@@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
169static struct at91_cf_data afeb9260_cf_data = { 173static struct at91_cf_data afeb9260_cf_data = {
170 .chipselect = 4, 174 .chipselect = 4,
171 .irq_pin = AT91_PIN_PA6, 175 .irq_pin = AT91_PIN_PA6,
176 .det_pin = -EINVAL,
177 .vcc_pin = -EINVAL,
172 .rst_pin = AT91_PIN_PA7, 178 .rst_pin = AT91_PIN_PA7,
173 .flags = AT91_CF_TRUE_IDE, 179 .flags = AT91_CF_TRUE_IDE,
174}; 180};
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index f90cfb32bad2..8510e9e54988 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -62,6 +62,8 @@ static void __init cam60_init_early(void)
62 */ 62 */
63static struct at91_usbh_data __initdata cam60_usbh_data = { 63static struct at91_usbh_data __initdata cam60_usbh_data = {
64 .ports = 1, 64 .ports = 1,
65 .vbus_pin = {-EINVAL, -EINVAL},
66 .overcurrent_pin= {-EINVAL, -EINVAL},
65}; 67};
66 68
67 69
@@ -115,7 +117,7 @@ static struct spi_board_info cam60_spi_devices[] __initdata = {
115/* 117/*
116 * MACB Ethernet device 118 * MACB Ethernet device
117 */ 119 */
118static struct __initdata at91_eth_data cam60_macb_data = { 120static struct __initdata macb_platform_data cam60_macb_data = {
119 .phy_irq_pin = AT91_PIN_PB5, 121 .phy_irq_pin = AT91_PIN_PB5,
120 .is_rmii = 0, 122 .is_rmii = 0,
121}; 123};
@@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = {
135static struct atmel_nand_data __initdata cam60_nand_data = { 137static struct atmel_nand_data __initdata cam60_nand_data = {
136 .ale = 21, 138 .ale = 21,
137 .cle = 22, 139 .cle = 22,
138 // .det_pin = ... not there 140 .det_pin = -EINVAL,
139 .rdy_pin = AT91_PIN_PA9, 141 .rdy_pin = AT91_PIN_PA9,
140 .enable_pin = AT91_PIN_PA7, 142 .enable_pin = AT91_PIN_PA7,
141 .parts = cam60_nand_partition, 143 .parts = cam60_nand_partition,
@@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = {
163static void __init cam60_add_device_nand(void) 165static void __init cam60_add_device_nand(void)
164{ 166{
165 /* configure chip-select 3 (NAND) */ 167 /* configure chip-select 3 (NAND) */
166 sam9_smc_configure(3, &cam60_nand_smc_config); 168 sam9_smc_configure(0, 3, &cam60_nand_smc_config);
167 169
168 at91_add_device_nand(&cam60_nand_data); 170 at91_add_device_nand(&cam60_nand_data);
169} 171}
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 5dffd3be62d2..ac3de4f7c31d 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void)
70 */ 70 */
71static struct at91_usbh_data __initdata cap9adk_usbh_data = { 71static struct at91_usbh_data __initdata cap9adk_usbh_data = {
72 .ports = 2, 72 .ports = 2,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75/* 77/*
@@ -144,16 +146,17 @@ static struct spi_board_info cap9adk_spi_devices[] = {
144 */ 146 */
145static struct at91_mmc_data __initdata cap9adk_mmc_data = { 147static struct at91_mmc_data __initdata cap9adk_mmc_data = {
146 .wire4 = 1, 148 .wire4 = 1,
147// .det_pin = ... not connected 149 .det_pin = -EINVAL,
148// .wp_pin = ... not connected 150 .wp_pin = -EINVAL,
149// .vcc_pin = ... not connected 151 .vcc_pin = -EINVAL,
150}; 152};
151 153
152 154
153/* 155/*
154 * MACB Ethernet device 156 * MACB Ethernet device
155 */ 157 */
156static struct at91_eth_data __initdata cap9adk_macb_data = { 158static struct macb_platform_data __initdata cap9adk_macb_data = {
159 .phy_irq_pin = -EINVAL,
157 .is_rmii = 1, 160 .is_rmii = 1,
158}; 161};
159 162
@@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
172static struct atmel_nand_data __initdata cap9adk_nand_data = { 175static struct atmel_nand_data __initdata cap9adk_nand_data = {
173 .ale = 21, 176 .ale = 21,
174 .cle = 22, 177 .cle = 22,
175// .det_pin = ... not connected 178 .det_pin = -EINVAL,
176// .rdy_pin = ... not connected 179 .rdy_pin = -EINVAL,
177 .enable_pin = AT91_PIN_PD15, 180 .enable_pin = AT91_PIN_PD15,
178 .parts = cap9adk_nand_partitions, 181 .parts = cap9adk_nand_partitions,
179 .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), 182 .num_parts = ARRAY_SIZE(cap9adk_nand_partitions),
@@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void)
212 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; 215 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
213 216
214 /* configure chip-select 3 (NAND) */ 217 /* configure chip-select 3 (NAND) */
215 sam9_smc_configure(3, &cap9adk_nand_smc_config); 218 sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
216 219
217 at91_add_device_nand(&cap9adk_nand_data); 220 at91_add_device_nand(&cap9adk_nand_data);
218} 221}
@@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void)
282 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); 285 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
283 286
284 /* configure chip-select 0 (NOR) */ 287 /* configure chip-select 0 (NOR) */
285 sam9_smc_configure(0, &cap9adk_nor_smc_config); 288 sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
286 289
287 platform_device_register(&cap9adk_nor_flash); 290 platform_device_register(&cap9adk_nor_flash);
288} 291}
@@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
351 * AC97 354 * AC97
352 */ 355 */
353static struct ac97c_platform_data cap9adk_ac97_data = { 356static struct ac97c_platform_data cap9adk_ac97_data = {
354// .reset_pin = ... not connected 357 .reset_pin = -EINVAL,
355}; 358};
356 359
357 360
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 774c87fcbd5b..59d9cf997537 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -57,13 +57,15 @@ static void __init carmeva_init_early(void)
57 at91_set_serial_console(0); 57 at91_set_serial_console(0);
58} 58}
59 59
60static struct at91_eth_data __initdata carmeva_eth_data = { 60static struct macb_platform_data __initdata carmeva_eth_data = {
61 .phy_irq_pin = AT91_PIN_PC4, 61 .phy_irq_pin = AT91_PIN_PC4,
62 .is_rmii = 1, 62 .is_rmii = 1,
63}; 63};
64 64
65static struct at91_usbh_data __initdata carmeva_usbh_data = { 65static struct at91_usbh_data __initdata carmeva_usbh_data = {
66 .ports = 2, 66 .ports = 2,
67 .vbus_pin = {-EINVAL, -EINVAL},
68 .overcurrent_pin= {-EINVAL, -EINVAL},
67}; 69};
68 70
69static struct at91_udc_data __initdata carmeva_udc_data = { 71static struct at91_udc_data __initdata carmeva_udc_data = {
@@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
75// static struct at91_cf_data __initdata carmeva_cf_data = { 77// static struct at91_cf_data __initdata carmeva_cf_data = {
76// .det_pin = AT91_PIN_PB0, 78// .det_pin = AT91_PIN_PB0,
77// .rst_pin = AT91_PIN_PC5, 79// .rst_pin = AT91_PIN_PC5,
78 // .irq_pin = ... not connected 80 // .irq_pin = -EINVAL,
79 // .vcc_pin = ... always powered 81 // .vcc_pin = -EINVAL,
80// }; 82// };
81 83
82static struct at91_mmc_data __initdata carmeva_mmc_data = { 84static struct at91_mmc_data __initdata carmeva_mmc_data = {
@@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = {
84 .wire4 = 1, 86 .wire4 = 1,
85 .det_pin = AT91_PIN_PB10, 87 .det_pin = AT91_PIN_PB10,
86 .wp_pin = AT91_PIN_PC14, 88 .wp_pin = AT91_PIN_PC14,
89 .vcc_pin = -EINVAL,
87}; 90};
88 91
89static struct spi_board_info carmeva_spi_devices[] = { 92static struct spi_board_info carmeva_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index fc885a4ce243..9ab3d1ea326d 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void)
86 */ 86 */
87static struct at91_usbh_data __initdata cpu9krea_usbh_data = { 87static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
88 .ports = 2, 88 .ports = 2,
89 .vbus_pin = {-EINVAL, -EINVAL},
90 .overcurrent_pin= {-EINVAL, -EINVAL},
89}; 91};
90 92
91/* 93/*
@@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
93 */ 95 */
94static struct at91_udc_data __initdata cpu9krea_udc_data = { 96static struct at91_udc_data __initdata cpu9krea_udc_data = {
95 .vbus_pin = AT91_PIN_PC8, 97 .vbus_pin = AT91_PIN_PC8,
96 .pullup_pin = 0, /* pull-up driven by UDC */ 98 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
97}; 99};
98 100
99/* 101/*
100 * MACB Ethernet device 102 * MACB Ethernet device
101 */ 103 */
102static struct at91_eth_data __initdata cpu9krea_macb_data = { 104static struct macb_platform_data __initdata cpu9krea_macb_data = {
105 .phy_irq_pin = -EINVAL,
103 .is_rmii = 1, 106 .is_rmii = 1,
104}; 107};
105 108
@@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = {
112 .rdy_pin = AT91_PIN_PC13, 115 .rdy_pin = AT91_PIN_PC13,
113 .enable_pin = AT91_PIN_PC14, 116 .enable_pin = AT91_PIN_PC14,
114 .bus_width_16 = 0, 117 .bus_width_16 = 0,
118 .det_pin = -EINVAL,
115}; 119};
116 120
117#ifdef CONFIG_MACH_CPU9260 121#ifdef CONFIG_MACH_CPU9260
@@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
156 160
157static void __init cpu9krea_add_device_nand(void) 161static void __init cpu9krea_add_device_nand(void)
158{ 162{
159 sam9_smc_configure(3, &cpu9krea_nand_smc_config); 163 sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
160 at91_add_device_nand(&cpu9krea_nand_data); 164 at91_add_device_nand(&cpu9krea_nand_data);
161} 165}
162 166
@@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void)
238 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); 242 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
239 243
240 /* configure chip-select 0 (NOR) */ 244 /* configure chip-select 0 (NOR) */
241 sam9_smc_configure(0, &cpu9krea_nor_smc_config); 245 sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
242 246
243 platform_device_register(&cpu9krea_nor_flash); 247 platform_device_register(&cpu9krea_nor_flash);
244} 248}
@@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = {
337 .slot_b = 0, 341 .slot_b = 0,
338 .wire4 = 1, 342 .wire4 = 1,
339 .det_pin = AT91_PIN_PA29, 343 .det_pin = AT91_PIN_PA29,
344 .wp_pin = -EINVAL,
345 .vcc_pin = -EINVAL,
340}; 346};
341 347
342static void __init cpu9krea_board_init(void) 348static void __init cpu9krea_board_init(void)
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index d35e65b08ccd..368e1427ad99 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -82,12 +82,15 @@ static void __init cpuat91_init_early(void)
82 at91_set_serial_console(0); 82 at91_set_serial_console(0);
83} 83}
84 84
85static struct at91_eth_data __initdata cpuat91_eth_data = { 85static struct macb_platform_data __initdata cpuat91_eth_data = {
86 .phy_irq_pin = -EINVAL,
86 .is_rmii = 1, 87 .is_rmii = 1,
87}; 88};
88 89
89static struct at91_usbh_data __initdata cpuat91_usbh_data = { 90static struct at91_usbh_data __initdata cpuat91_usbh_data = {
90 .ports = 1, 91 .ports = 1,
92 .vbus_pin = {-EINVAL, -EINVAL},
93 .overcurrent_pin= {-EINVAL, -EINVAL},
91}; 94};
92 95
93static struct at91_udc_data __initdata cpuat91_udc_data = { 96static struct at91_udc_data __initdata cpuat91_udc_data = {
@@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = {
98static struct at91_mmc_data __initdata cpuat91_mmc_data = { 101static struct at91_mmc_data __initdata cpuat91_mmc_data = {
99 .det_pin = AT91_PIN_PC2, 102 .det_pin = AT91_PIN_PC2,
100 .wire4 = 1, 103 .wire4 = 1,
104 .wp_pin = -EINVAL,
105 .vcc_pin = -EINVAL,
101}; 106};
102 107
103static struct physmap_flash_data cpuat91_flash_data = { 108static struct physmap_flash_data cpuat91_flash_data = {
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index c3936665e645..1a1547b1ce4e 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -58,18 +58,20 @@ static void __init csb337_init_early(void)
58 at91_set_serial_console(0); 58 at91_set_serial_console(0);
59} 59}
60 60
61static struct at91_eth_data __initdata csb337_eth_data = { 61static struct macb_platform_data __initdata csb337_eth_data = {
62 .phy_irq_pin = AT91_PIN_PC2, 62 .phy_irq_pin = AT91_PIN_PC2,
63 .is_rmii = 0, 63 .is_rmii = 0,
64}; 64};
65 65
66static struct at91_usbh_data __initdata csb337_usbh_data = { 66static struct at91_usbh_data __initdata csb337_usbh_data = {
67 .ports = 2, 67 .ports = 2,
68 .vbus_pin = {-EINVAL, -EINVAL},
69 .overcurrent_pin= {-EINVAL, -EINVAL},
68}; 70};
69 71
70static struct at91_udc_data __initdata csb337_udc_data = { 72static struct at91_udc_data __initdata csb337_udc_data = {
71 // this has no VBUS sensing pin
72 .pullup_pin = AT91_PIN_PA24, 73 .pullup_pin = AT91_PIN_PA24,
74 .vbus_pin = -EINVAL,
73}; 75};
74 76
75static struct i2c_board_info __initdata csb337_i2c_devices[] = { 77static struct i2c_board_info __initdata csb337_i2c_devices[] = {
@@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = {
98 .slot_b = 0, 100 .slot_b = 0,
99 .wire4 = 1, 101 .wire4 = 1,
100 .wp_pin = AT91_PIN_PD6, 102 .wp_pin = AT91_PIN_PD6,
103 .vcc_pin = -EINVAL,
101}; 104};
102 105
103static struct spi_board_info csb337_spi_devices[] = { 106static struct spi_board_info csb337_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 586100e2acbb..f650bf39455d 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -52,13 +52,15 @@ static void __init csb637_init_early(void)
52 at91_set_serial_console(0); 52 at91_set_serial_console(0);
53} 53}
54 54
55static struct at91_eth_data __initdata csb637_eth_data = { 55static struct macb_platform_data __initdata csb637_eth_data = {
56 .phy_irq_pin = AT91_PIN_PC0, 56 .phy_irq_pin = AT91_PIN_PC0,
57 .is_rmii = 0, 57 .is_rmii = 0,
58}; 58};
59 59
60static struct at91_usbh_data __initdata csb637_usbh_data = { 60static struct at91_usbh_data __initdata csb637_usbh_data = {
61 .ports = 2, 61 .ports = 2,
62 .vbus_pin = {-EINVAL, -EINVAL},
63 .overcurrent_pin= {-EINVAL, -EINVAL},
62}; 64};
63 65
64static struct at91_udc_data __initdata csb637_udc_data = { 66static struct at91_udc_data __initdata csb637_udc_data = {
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 0b7d32778210..bb6b434ec0c1 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -50,6 +50,7 @@ static void __init ek_init_early(void)
50static struct atmel_nand_data __initdata ek_nand_data = { 50static struct atmel_nand_data __initdata ek_nand_data = {
51 .ale = 21, 51 .ale = 21,
52 .cle = 22, 52 .cle = 22,
53 .det_pin = -EINVAL,
53 .rdy_pin = AT91_PIN_PC8, 54 .rdy_pin = AT91_PIN_PC8,
54 .enable_pin = AT91_PIN_PC14, 55 .enable_pin = AT91_PIN_PC14,
55}; 56};
@@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void)
82 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 83 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
83 84
84 /* configure chip-select 3 (NAND) */ 85 /* configure chip-select 3 (NAND) */
85 sam9_smc_configure(3, &ek_nand_smc_config); 86 sam9_smc_configure(0, 3, &ek_nand_smc_config);
86 87
87 at91_add_device_nand(&ek_nand_data); 88 at91_add_device_nand(&ek_nand_data);
88} 89}
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 45db7a3dbef0..d302ca3eeb64 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -60,13 +60,15 @@ static void __init eb9200_init_early(void)
60 at91_set_serial_console(0); 60 at91_set_serial_console(0);
61} 61}
62 62
63static struct at91_eth_data __initdata eb9200_eth_data = { 63static struct macb_platform_data __initdata eb9200_eth_data = {
64 .phy_irq_pin = AT91_PIN_PC4, 64 .phy_irq_pin = AT91_PIN_PC4,
65 .is_rmii = 1, 65 .is_rmii = 1,
66}; 66};
67 67
68static struct at91_usbh_data __initdata eb9200_usbh_data = { 68static struct at91_usbh_data __initdata eb9200_usbh_data = {
69 .ports = 2, 69 .ports = 2,
70 .vbus_pin = {-EINVAL, -EINVAL},
71 .overcurrent_pin= {-EINVAL, -EINVAL},
70}; 72};
71 73
72static struct at91_udc_data __initdata eb9200_udc_data = { 74static struct at91_udc_data __initdata eb9200_udc_data = {
@@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = {
75}; 77};
76 78
77static struct at91_cf_data __initdata eb9200_cf_data = { 79static struct at91_cf_data __initdata eb9200_cf_data = {
80 .irq_pin = -EINVAL,
78 .det_pin = AT91_PIN_PB0, 81 .det_pin = AT91_PIN_PB0,
82 .vcc_pin = -EINVAL,
79 .rst_pin = AT91_PIN_PC5, 83 .rst_pin = AT91_PIN_PC5,
80 // .irq_pin = ... not connected
81 // .vcc_pin = ... always powered
82}; 84};
83 85
84static struct at91_mmc_data __initdata eb9200_mmc_data = { 86static struct at91_mmc_data __initdata eb9200_mmc_data = {
85 .slot_b = 0, 87 .slot_b = 0,
86 .wire4 = 1, 88 .wire4 = 1,
89 .det_pin = -EINVAL,
90 .wp_pin = -EINVAL,
91 .vcc_pin = -EINVAL,
87}; 92};
88 93
89static struct i2c_board_info __initdata eb9200_i2c_devices[] = { 94static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 2f9c16d29212..69966ce4d776 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -64,18 +64,23 @@ static void __init ecb_at91init_early(void)
64 at91_set_serial_console(0); 64 at91_set_serial_console(0);
65} 65}
66 66
67static struct at91_eth_data __initdata ecb_at91eth_data = { 67static struct macb_platform_data __initdata ecb_at91eth_data = {
68 .phy_irq_pin = AT91_PIN_PC4, 68 .phy_irq_pin = AT91_PIN_PC4,
69 .is_rmii = 0, 69 .is_rmii = 0,
70}; 70};
71 71
72static struct at91_usbh_data __initdata ecb_at91usbh_data = { 72static struct at91_usbh_data __initdata ecb_at91usbh_data = {
73 .ports = 1, 73 .ports = 1,
74 .vbus_pin = {-EINVAL, -EINVAL},
75 .overcurrent_pin= {-EINVAL, -EINVAL},
74}; 76};
75 77
76static struct at91_mmc_data __initdata ecb_at91mmc_data = { 78static struct at91_mmc_data __initdata ecb_at91mmc_data = {
77 .slot_b = 0, 79 .slot_b = 0,
78 .wire4 = 1, 80 .wire4 = 1,
81 .det_pin = -EINVAL,
82 .wp_pin = -EINVAL,
83 .vcc_pin = -EINVAL,
79}; 84};
80 85
81 86
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 8252c722607b..07ef35b0ec2c 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -47,13 +47,15 @@ static void __init eco920_init_early(void)
47 at91_set_serial_console(0); 47 at91_set_serial_console(0);
48} 48}
49 49
50static struct at91_eth_data __initdata eco920_eth_data = { 50static struct macb_platform_data __initdata eco920_eth_data = {
51 .phy_irq_pin = AT91_PIN_PC2, 51 .phy_irq_pin = AT91_PIN_PC2,
52 .is_rmii = 1, 52 .is_rmii = 1,
53}; 53};
54 54
55static struct at91_usbh_data __initdata eco920_usbh_data = { 55static struct at91_usbh_data __initdata eco920_usbh_data = {
56 .ports = 1, 56 .ports = 1,
57 .vbus_pin = {-EINVAL, -EINVAL},
58 .overcurrent_pin= {-EINVAL, -EINVAL},
57}; 59};
58 60
59static struct at91_udc_data __initdata eco920_udc_data = { 61static struct at91_udc_data __initdata eco920_udc_data = {
@@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = {
64static struct at91_mmc_data __initdata eco920_mmc_data = { 66static struct at91_mmc_data __initdata eco920_mmc_data = {
65 .slot_b = 0, 67 .slot_b = 0,
66 .wire4 = 0, 68 .wire4 = 0,
69 .det_pin = -EINVAL,
70 .wp_pin = -EINVAL,
71 .vcc_pin = -EINVAL,
67}; 72};
68 73
69static struct physmap_flash_data eco920_flash_data = { 74static struct physmap_flash_data eco920_flash_data = {
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 4c3f65d9c59b..eec02cd57ced 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -52,12 +52,14 @@ static void __init flexibity_init_early(void)
52/* USB Host port */ 52/* USB Host port */
53static struct at91_usbh_data __initdata flexibity_usbh_data = { 53static struct at91_usbh_data __initdata flexibity_usbh_data = {
54 .ports = 2, 54 .ports = 2,
55 .vbus_pin = {-EINVAL, -EINVAL},
56 .overcurrent_pin= {-EINVAL, -EINVAL},
55}; 57};
56 58
57/* USB Device port */ 59/* USB Device port */
58static struct at91_udc_data __initdata flexibity_udc_data = { 60static struct at91_udc_data __initdata flexibity_udc_data = {
59 .vbus_pin = AT91_PIN_PC5, 61 .vbus_pin = AT91_PIN_PC5,
60 .pullup_pin = 0, /* pull-up driven by UDC */ 62 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
61}; 63};
62 64
63/* SPI devices */ 65/* SPI devices */
@@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = {
76 .wire4 = 1, 78 .wire4 = 1,
77 .det_pin = AT91_PIN_PC9, 79 .det_pin = AT91_PIN_PC9,
78 .wp_pin = AT91_PIN_PC4, 80 .wp_pin = AT91_PIN_PC4,
81 .vcc_pin = -EINVAL,
79}; 82};
80 83
81/* LEDs */ 84/* LEDs */
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index f27d1a780cfa..caf017f0f4ee 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -106,6 +106,8 @@ static void __init foxg20_init_early(void)
106 */ 106 */
107static struct at91_usbh_data __initdata foxg20_usbh_data = { 107static struct at91_usbh_data __initdata foxg20_usbh_data = {
108 .ports = 2, 108 .ports = 2,
109 .vbus_pin = {-EINVAL, -EINVAL},
110 .overcurrent_pin= {-EINVAL, -EINVAL},
109}; 111};
110 112
111/* 113/*
@@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = {
113 */ 115 */
114static struct at91_udc_data __initdata foxg20_udc_data = { 116static struct at91_udc_data __initdata foxg20_udc_data = {
115 .vbus_pin = AT91_PIN_PC6, 117 .vbus_pin = AT91_PIN_PC6,
116 .pullup_pin = 0, /* pull-up driven by UDC */ 118 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
117}; 119};
118 120
119 121
@@ -135,7 +137,7 @@ static struct spi_board_info foxg20_spi_devices[] = {
135/* 137/*
136 * MACB Ethernet device 138 * MACB Ethernet device
137 */ 139 */
138static struct at91_eth_data __initdata foxg20_macb_data = { 140static struct macb_platform_data __initdata foxg20_macb_data = {
139 .phy_irq_pin = AT91_PIN_PA7, 141 .phy_irq_pin = AT91_PIN_PA7,
140 .is_rmii = 1, 142 .is_rmii = 1,
141}; 143};
@@ -147,6 +149,9 @@ static struct at91_eth_data __initdata foxg20_macb_data = {
147static struct at91_mmc_data __initdata foxg20_mmc_data = { 149static struct at91_mmc_data __initdata foxg20_mmc_data = {
148 .slot_b = 1, 150 .slot_b = 1,
149 .wire4 = 1, 151 .wire4 = 1,
152 .det_pin = -EINVAL,
153 .wp_pin = -EINVAL,
154 .vcc_pin = -EINVAL,
150}; 155};
151 156
152 157
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 2e95949737e6..230e71969fb7 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void)
80 */ 80 */
81static struct at91_usbh_data __initdata usbh_data = { 81static struct at91_usbh_data __initdata usbh_data = {
82 .ports = 2, 82 .ports = 2,
83 .vbus_pin = {-EINVAL, -EINVAL},
84 .overcurrent_pin= {-EINVAL, -EINVAL},
83}; 85};
84 86
85/* 87/*
@@ -87,13 +89,13 @@ static struct at91_usbh_data __initdata usbh_data = {
87 */ 89 */
88static struct at91_udc_data __initdata udc_data = { 90static struct at91_udc_data __initdata udc_data = {
89 .vbus_pin = AT91_PIN_PA22, 91 .vbus_pin = AT91_PIN_PA22,
90 .pullup_pin = 0, /* pull-up driven by UDC */ 92 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
91}; 93};
92 94
93/* 95/*
94 * MACB Ethernet device 96 * MACB Ethernet device
95 */ 97 */
96static struct at91_eth_data __initdata macb_data = { 98static struct macb_platform_data __initdata macb_data = {
97 .phy_irq_pin = AT91_PIN_PA28, 99 .phy_irq_pin = AT91_PIN_PA28,
98 .is_rmii = 1, 100 .is_rmii = 1,
99}; 101};
@@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
530static struct at91_cf_data __initdata gsia18s_cf1_data = { 532static struct at91_cf_data __initdata gsia18s_cf1_data = {
531 .irq_pin = AT91_PIN_PA27, 533 .irq_pin = AT91_PIN_PA27,
532 .det_pin = AT91_PIN_PB30, 534 .det_pin = AT91_PIN_PB30,
535 .vcc_pin = -EINVAL,
533 .rst_pin = AT91_PIN_PB31, 536 .rst_pin = AT91_PIN_PB31,
534 .chipselect = 5, 537 .chipselect = 5,
535 .flags = AT91_CF_TRUE_IDE, 538 .flags = AT91_CF_TRUE_IDE,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 3bae73e63633..efde1b2327c8 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -61,13 +61,15 @@ static void __init kafa_init_early(void)
61 at91_set_serial_console(0); 61 at91_set_serial_console(0);
62} 62}
63 63
64static struct at91_eth_data __initdata kafa_eth_data = { 64static struct macb_platform_data __initdata kafa_eth_data = {
65 .phy_irq_pin = AT91_PIN_PC4, 65 .phy_irq_pin = AT91_PIN_PC4,
66 .is_rmii = 0, 66 .is_rmii = 0,
67}; 67};
68 68
69static struct at91_usbh_data __initdata kafa_usbh_data = { 69static struct at91_usbh_data __initdata kafa_usbh_data = {
70 .ports = 1, 70 .ports = 1,
71 .vbus_pin = {-EINVAL, -EINVAL},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
71}; 73};
72 74
73static struct at91_udc_data __initdata kafa_udc_data = { 75static struct at91_udc_data __initdata kafa_udc_data = {
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index e61351ffad50..d75a4a2ad9c2 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -69,13 +69,15 @@ static void __init kb9202_init_early(void)
69 at91_set_serial_console(0); 69 at91_set_serial_console(0);
70} 70}
71 71
72static struct at91_eth_data __initdata kb9202_eth_data = { 72static struct macb_platform_data __initdata kb9202_eth_data = {
73 .phy_irq_pin = AT91_PIN_PB29, 73 .phy_irq_pin = AT91_PIN_PB29,
74 .is_rmii = 0, 74 .is_rmii = 0,
75}; 75};
76 76
77static struct at91_usbh_data __initdata kb9202_usbh_data = { 77static struct at91_usbh_data __initdata kb9202_usbh_data = {
78 .ports = 1, 78 .ports = 1,
79 .vbus_pin = {-EINVAL, -EINVAL},
80 .overcurrent_pin= {-EINVAL, -EINVAL},
79}; 81};
80 82
81static struct at91_udc_data __initdata kb9202_udc_data = { 83static struct at91_udc_data __initdata kb9202_udc_data = {
@@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = {
87 .det_pin = AT91_PIN_PB2, 89 .det_pin = AT91_PIN_PB2,
88 .slot_b = 0, 90 .slot_b = 0,
89 .wire4 = 1, 91 .wire4 = 1,
92 .wp_pin = -EINVAL,
93 .vcc_pin = -EINVAL,
90}; 94};
91 95
92static struct mtd_partition __initdata kb9202_nand_partition[] = { 96static struct mtd_partition __initdata kb9202_nand_partition[] = {
@@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = {
100static struct atmel_nand_data __initdata kb9202_nand_data = { 104static struct atmel_nand_data __initdata kb9202_nand_data = {
101 .ale = 22, 105 .ale = 22,
102 .cle = 21, 106 .cle = 21,
103 // .det_pin = ... not there 107 .det_pin = -EINVAL,
104 .rdy_pin = AT91_PIN_PC29, 108 .rdy_pin = AT91_PIN_PC29,
105 .enable_pin = AT91_PIN_PC28, 109 .enable_pin = AT91_PIN_PC28,
106 .parts = kb9202_nand_partition, 110 .parts = kb9202_nand_partition,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index ef816c17dc61..3f8617c0e04e 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -72,6 +72,7 @@ static void __init neocore926_init_early(void)
72static struct at91_usbh_data __initdata neocore926_usbh_data = { 72static struct at91_usbh_data __initdata neocore926_usbh_data = {
73 .ports = 2, 73 .ports = 2,
74 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 74 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
75 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 76};
76 77
77/* 78/*
@@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = {
79 */ 80 */
80static struct at91_udc_data __initdata neocore926_udc_data = { 81static struct at91_udc_data __initdata neocore926_udc_data = {
81 .vbus_pin = AT91_PIN_PA25, 82 .vbus_pin = AT91_PIN_PA25,
82 .pullup_pin = 0, /* pull-up driven by UDC */ 83 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83}; 84};
84 85
85 86
@@ -149,13 +150,14 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = {
149 .wire4 = 1, 150 .wire4 = 1,
150 .det_pin = AT91_PIN_PE18, 151 .det_pin = AT91_PIN_PE18,
151 .wp_pin = AT91_PIN_PE19, 152 .wp_pin = AT91_PIN_PE19,
153 .vcc_pin = -EINVAL,
152}; 154};
153 155
154 156
155/* 157/*
156 * MACB Ethernet device 158 * MACB Ethernet device
157 */ 159 */
158static struct at91_eth_data __initdata neocore926_macb_data = { 160static struct macb_platform_data __initdata neocore926_macb_data = {
159 .phy_irq_pin = AT91_PIN_PE31, 161 .phy_irq_pin = AT91_PIN_PE31,
160 .is_rmii = 1, 162 .is_rmii = 1,
161}; 163};
@@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = {
190 .enable_pin = AT91_PIN_PD15, 192 .enable_pin = AT91_PIN_PD15,
191 .parts = neocore926_nand_partition, 193 .parts = neocore926_nand_partition,
192 .num_parts = ARRAY_SIZE(neocore926_nand_partition), 194 .num_parts = ARRAY_SIZE(neocore926_nand_partition),
195 .det_pin = -EINVAL,
193}; 196};
194 197
195static struct sam9_smc_config __initdata neocore926_nand_smc_config = { 198static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
@@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
213static void __init neocore926_add_device_nand(void) 216static void __init neocore926_add_device_nand(void)
214{ 217{
215 /* configure chip-select 3 (NAND) */ 218 /* configure chip-select 3 (NAND) */
216 sam9_smc_configure(3, &neocore926_nand_smc_config); 219 sam9_smc_configure(0, 3, &neocore926_nand_smc_config);
217 220
218 at91_add_device_nand(&neocore926_nand_data); 221 at91_add_device_nand(&neocore926_nand_data);
219} 222}
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index 49e3f699b48e..b4a12fc184c8 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
96static void __init add_device_pcontrol(void) 96static void __init add_device_pcontrol(void)
97{ 97{
98 /* configure chip-select 4 (IO compatible to 8051 X4 ) */ 98 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
99 sam9_smc_configure(4, &pcontrol_smc_config[0]); 99 sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
100 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ 100 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */
101 sam9_smc_configure(7, &pcontrol_smc_config[1]); 101 sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
102} 102}
103 103
104 104
@@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void)
107 */ 107 */
108static struct at91_usbh_data __initdata usbh_data = { 108static struct at91_usbh_data __initdata usbh_data = {
109 .ports = 2, 109 .ports = 2,
110 .vbus_pin = {-EINVAL, -EINVAL},
111 .overcurrent_pin= {-EINVAL, -EINVAL},
110}; 112};
111 113
112 114
@@ -122,7 +124,7 @@ static struct at91_udc_data __initdata pcontrol_g20_udc_data = {
122/* 124/*
123 * MACB Ethernet device 125 * MACB Ethernet device
124 */ 126 */
125static struct at91_eth_data __initdata macb_data = { 127static struct macb_platform_data __initdata macb_data = {
126 .phy_irq_pin = AT91_PIN_PA28, 128 .phy_irq_pin = AT91_PIN_PA28,
127 .is_rmii = 1, 129 .is_rmii = 1,
128}; 130};
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 0a8fe6a1b7c8..ab024fa11d5c 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -60,13 +60,15 @@ static void __init picotux200_init_early(void)
60 at91_set_serial_console(0); 60 at91_set_serial_console(0);
61} 61}
62 62
63static struct at91_eth_data __initdata picotux200_eth_data = { 63static struct macb_platform_data __initdata picotux200_eth_data = {
64 .phy_irq_pin = AT91_PIN_PC4, 64 .phy_irq_pin = AT91_PIN_PC4,
65 .is_rmii = 1, 65 .is_rmii = 1,
66}; 66};
67 67
68static struct at91_usbh_data __initdata picotux200_usbh_data = { 68static struct at91_usbh_data __initdata picotux200_usbh_data = {
69 .ports = 1, 69 .ports = 1,
70 .vbus_pin = {-EINVAL, -EINVAL},
71 .overcurrent_pin= {-EINVAL, -EINVAL},
70}; 72};
71 73
72static struct at91_mmc_data __initdata picotux200_mmc_data = { 74static struct at91_mmc_data __initdata picotux200_mmc_data = {
@@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = {
74 .slot_b = 0, 76 .slot_b = 0,
75 .wire4 = 1, 77 .wire4 = 1,
76 .wp_pin = AT91_PIN_PA17, 78 .wp_pin = AT91_PIN_PA17,
79 .vcc_pin = -EINVAL,
77}; 80};
78 81
79#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 82#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 07421bdb88ea..e029d220cb84 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -77,6 +77,8 @@ static void __init ek_init_early(void)
77 */ 77 */
78static struct at91_usbh_data __initdata ek_usbh_data = { 78static struct at91_usbh_data __initdata ek_usbh_data = {
79 .ports = 2, 79 .ports = 2,
80 .vbus_pin = {-EINVAL, -EINVAL},
81 .overcurrent_pin= {-EINVAL, -EINVAL},
80}; 82};
81 83
82/* 84/*
@@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
84 */ 86 */
85static struct at91_udc_data __initdata ek_udc_data = { 87static struct at91_udc_data __initdata ek_udc_data = {
86 .vbus_pin = AT91_PIN_PC5, 88 .vbus_pin = AT91_PIN_PC5,
87 .pullup_pin = 0, /* pull-up driven by UDC */ 89 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
88}; 90};
89 91
90/* 92/*
@@ -104,7 +106,7 @@ static struct spi_board_info ek_spi_devices[] = {
104/* 106/*
105 * MACB Ethernet device 107 * MACB Ethernet device
106 */ 108 */
107static struct at91_eth_data __initdata ek_macb_data = { 109static struct macb_platform_data __initdata ek_macb_data = {
108 .phy_irq_pin = AT91_PIN_PA31, 110 .phy_irq_pin = AT91_PIN_PA31,
109 .is_rmii = 1, 111 .is_rmii = 1,
110}; 112};
@@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
133static struct atmel_nand_data __initdata ek_nand_data = { 135static struct atmel_nand_data __initdata ek_nand_data = {
134 .ale = 21, 136 .ale = 21,
135 .cle = 22, 137 .cle = 22,
136// .det_pin = ... not connected 138 .det_pin = -EINVAL,
137 .rdy_pin = AT91_PIN_PC13, 139 .rdy_pin = AT91_PIN_PC13,
138 .enable_pin = AT91_PIN_PC14, 140 .enable_pin = AT91_PIN_PC14,
139 .parts = ek_nand_partition, 141 .parts = ek_nand_partition,
@@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
161static void __init ek_add_device_nand(void) 163static void __init ek_add_device_nand(void)
162{ 164{
163 /* configure chip-select 3 (NAND) */ 165 /* configure chip-select 3 (NAND) */
164 sam9_smc_configure(3, &ek_nand_smc_config); 166 sam9_smc_configure(0, 3, &ek_nand_smc_config);
165 167
166 at91_add_device_nand(&ek_nand_data); 168 at91_add_device_nand(&ek_nand_data);
167} 169}
@@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void)
172static struct at91_mmc_data __initdata ek_mmc_data = { 174static struct at91_mmc_data __initdata ek_mmc_data = {
173 .slot_b = 0, 175 .slot_b = 0,
174 .wire4 = 1, 176 .wire4 = 1,
175// .det_pin = ... not connected 177 .det_pin = -EINVAL,
176// .wp_pin = ... not connected 178 .wp_pin = -EINVAL,
177// .vcc_pin = ... not connected 179 .vcc_pin = -EINVAL,
178}; 180};
179 181
180/* 182/*
@@ -251,7 +253,7 @@ static void __init ek_board_init(void)
251 /* LEDs */ 253 /* LEDs */
252 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); 254 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
253 /* shutdown controller, wakeup button (5 msec low) */ 255 /* shutdown controller, wakeup button (5 msec low) */
254 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW 256 at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
255 | AT91_SHDW_RTTWKEN); 257 | AT91_SHDW_RTTWKEN);
256} 258}
257 259
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 80a8c9c6e922..782f37946af5 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -65,13 +65,15 @@ static void __init dk_init_early(void)
65 at91_set_serial_console(0); 65 at91_set_serial_console(0);
66} 66}
67 67
68static struct at91_eth_data __initdata dk_eth_data = { 68static struct macb_platform_data __initdata dk_eth_data = {
69 .phy_irq_pin = AT91_PIN_PC4, 69 .phy_irq_pin = AT91_PIN_PC4,
70 .is_rmii = 1, 70 .is_rmii = 1,
71}; 71};
72 72
73static struct at91_usbh_data __initdata dk_usbh_data = { 73static struct at91_usbh_data __initdata dk_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77static struct at91_udc_data __initdata dk_udc_data = { 79static struct at91_udc_data __initdata dk_udc_data = {
@@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = {
80}; 82};
81 83
82static struct at91_cf_data __initdata dk_cf_data = { 84static struct at91_cf_data __initdata dk_cf_data = {
85 .irq_pin = -EINVAL,
83 .det_pin = AT91_PIN_PB0, 86 .det_pin = AT91_PIN_PB0,
87 .vcc_pin = -EINVAL,
84 .rst_pin = AT91_PIN_PC5, 88 .rst_pin = AT91_PIN_PC5,
85 // .irq_pin = ... not connected
86 // .vcc_pin = ... always powered
87}; 89};
88 90
89#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD 91#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
90static struct at91_mmc_data __initdata dk_mmc_data = { 92static struct at91_mmc_data __initdata dk_mmc_data = {
91 .slot_b = 0, 93 .slot_b = 0,
92 .wire4 = 1, 94 .wire4 = 1,
95 .det_pin = -EINVAL,
96 .wp_pin = -EINVAL,
97 .vcc_pin = -EINVAL,
93}; 98};
94#endif 99#endif
95 100
@@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = {
143 .cle = 21, 148 .cle = 21,
144 .det_pin = AT91_PIN_PB1, 149 .det_pin = AT91_PIN_PB1,
145 .rdy_pin = AT91_PIN_PC2, 150 .rdy_pin = AT91_PIN_PC2,
146 // .enable_pin = ... not there 151 .enable_pin = -EINVAL,
147 .parts = dk_nand_partition, 152 .parts = dk_nand_partition,
148 .num_parts = ARRAY_SIZE(dk_nand_partition), 153 .num_parts = ARRAY_SIZE(dk_nand_partition),
149}; 154};
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 99fd7f8aee0e..ef7c12a92246 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -65,13 +65,15 @@ static void __init ek_init_early(void)
65 at91_set_serial_console(0); 65 at91_set_serial_console(0);
66} 66}
67 67
68static struct at91_eth_data __initdata ek_eth_data = { 68static struct macb_platform_data __initdata ek_eth_data = {
69 .phy_irq_pin = AT91_PIN_PC4, 69 .phy_irq_pin = AT91_PIN_PC4,
70 .is_rmii = 1, 70 .is_rmii = 1,
71}; 71};
72 72
73static struct at91_usbh_data __initdata ek_usbh_data = { 73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77static struct at91_udc_data __initdata ek_udc_data = { 79static struct at91_udc_data __initdata ek_udc_data = {
@@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
85 .slot_b = 0, 87 .slot_b = 0,
86 .wire4 = 1, 88 .wire4 = 1,
87 .wp_pin = AT91_PIN_PA17, 89 .wp_pin = AT91_PIN_PA17,
90 .vcc_pin = -EINVAL,
88}; 91};
89#endif 92#endif
90 93
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
index e927df0175df..af0750fafa29 100644
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ b/arch/arm/mach-at91/board-rsi-ews.c
@@ -60,7 +60,7 @@ static void __init rsi_ews_init_early(void)
60/* 60/*
61 * Ethernet 61 * Ethernet
62 */ 62 */
63static struct at91_eth_data rsi_ews_eth_data __initdata = { 63static struct macb_platform_data rsi_ews_eth_data __initdata = {
64 .phy_irq_pin = AT91_PIN_PC4, 64 .phy_irq_pin = AT91_PIN_PC4,
65 .is_rmii = 1, 65 .is_rmii = 1,
66}; 66};
@@ -70,6 +70,8 @@ static struct at91_eth_data rsi_ews_eth_data __initdata = {
70 */ 70 */
71static struct at91_usbh_data rsi_ews_usbh_data __initdata = { 71static struct at91_usbh_data rsi_ews_usbh_data __initdata = {
72 .ports = 1, 72 .ports = 1,
73 .vbus_pin = {-EINVAL, -EINVAL},
74 .overcurrent_pin= {-EINVAL, -EINVAL},
73}; 75};
74 76
75/* 77/*
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 072d53af98d9..84bce587735f 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -72,6 +72,8 @@ static void __init ek_init_early(void)
72 */ 72 */
73static struct at91_usbh_data __initdata ek_usbh_data = { 73static struct at91_usbh_data __initdata ek_usbh_data = {
74 .ports = 2, 74 .ports = 2,
75 .vbus_pin = {-EINVAL, -EINVAL},
76 .overcurrent_pin= {-EINVAL, -EINVAL},
75}; 77};
76 78
77/* 79/*
@@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
79 */ 81 */
80static struct at91_udc_data __initdata ek_udc_data = { 82static struct at91_udc_data __initdata ek_udc_data = {
81 .vbus_pin = AT91_PIN_PC5, 83 .vbus_pin = AT91_PIN_PC5,
82 .pullup_pin = 0, /* pull-up driven by UDC */ 84 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
83}; 85};
84 86
85 87
@@ -109,7 +111,7 @@ static struct spi_board_info ek_spi_devices[] = {
109/* 111/*
110 * MACB Ethernet device 112 * MACB Ethernet device
111 */ 113 */
112static struct at91_eth_data __initdata ek_macb_data = { 114static struct macb_platform_data __initdata ek_macb_data = {
113 .phy_irq_pin = AT91_PIN_PA7, 115 .phy_irq_pin = AT91_PIN_PA7,
114 .is_rmii = 0, 116 .is_rmii = 0,
115}; 117};
@@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
134static struct atmel_nand_data __initdata ek_nand_data = { 136static struct atmel_nand_data __initdata ek_nand_data = {
135 .ale = 21, 137 .ale = 21,
136 .cle = 22, 138 .cle = 22,
137// .det_pin = ... not connected 139 .det_pin = -EINVAL,
138 .rdy_pin = AT91_PIN_PC13, 140 .rdy_pin = AT91_PIN_PC13,
139 .enable_pin = AT91_PIN_PC14, 141 .enable_pin = AT91_PIN_PC14,
140 .parts = ek_nand_partition, 142 .parts = ek_nand_partition,
@@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
162static void __init ek_add_device_nand(void) 164static void __init ek_add_device_nand(void)
163{ 165{
164 /* configure chip-select 3 (NAND) */ 166 /* configure chip-select 3 (NAND) */
165 sam9_smc_configure(3, &ek_nand_smc_config); 167 sam9_smc_configure(0, 3, &ek_nand_smc_config);
166 168
167 at91_add_device_nand(&ek_nand_data); 169 at91_add_device_nand(&ek_nand_data);
168} 170}
@@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
176 .wire4 = 1, 178 .wire4 = 1,
177 .det_pin = AT91_PIN_PC8, 179 .det_pin = AT91_PIN_PC8,
178 .wp_pin = AT91_PIN_PC4, 180 .wp_pin = AT91_PIN_PC4,
179// .vcc_pin = ... not connected 181 .vcc_pin = -EINVAL,
180}; 182};
181 183
182static void __init ek_board_init(void) 184static void __init ek_board_init(void)
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 4f10181a0782..be8233bcabdc 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -75,6 +75,8 @@ static void __init ek_init_early(void)
75 */ 75 */
76static struct at91_usbh_data __initdata ek_usbh_data = { 76static struct at91_usbh_data __initdata ek_usbh_data = {
77 .ports = 2, 77 .ports = 2,
78 .vbus_pin = {-EINVAL, -EINVAL},
79 .overcurrent_pin= {-EINVAL, -EINVAL},
78}; 80};
79 81
80/* 82/*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
82 */ 84 */
83static struct at91_udc_data __initdata ek_udc_data = { 85static struct at91_udc_data __initdata ek_udc_data = {
84 .vbus_pin = AT91_PIN_PC5, 86 .vbus_pin = AT91_PIN_PC5,
85 .pullup_pin = 0, /* pull-up driven by UDC */ 87 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
86}; 88};
87 89
88 90
@@ -151,7 +153,7 @@ static struct spi_board_info ek_spi_devices[] = {
151/* 153/*
152 * MACB Ethernet device 154 * MACB Ethernet device
153 */ 155 */
154static struct at91_eth_data __initdata ek_macb_data = { 156static struct macb_platform_data __initdata ek_macb_data = {
155 .phy_irq_pin = AT91_PIN_PA7, 157 .phy_irq_pin = AT91_PIN_PA7,
156 .is_rmii = 1, 158 .is_rmii = 1,
157}; 159};
@@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
176static struct atmel_nand_data __initdata ek_nand_data = { 178static struct atmel_nand_data __initdata ek_nand_data = {
177 .ale = 21, 179 .ale = 21,
178 .cle = 22, 180 .cle = 22,
179// .det_pin = ... not connected 181 .det_pin = -EINVAL,
180 .rdy_pin = AT91_PIN_PC13, 182 .rdy_pin = AT91_PIN_PC13,
181 .enable_pin = AT91_PIN_PC14, 183 .enable_pin = AT91_PIN_PC14,
182 .parts = ek_nand_partition, 184 .parts = ek_nand_partition,
@@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void)
211 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 213 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
212 214
213 /* configure chip-select 3 (NAND) */ 215 /* configure chip-select 3 (NAND) */
214 sam9_smc_configure(3, &ek_nand_smc_config); 216 sam9_smc_configure(0, 3, &ek_nand_smc_config);
215 217
216 at91_add_device_nand(&ek_nand_data); 218 at91_add_device_nand(&ek_nand_data);
217} 219}
@@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void)
223static struct at91_mmc_data __initdata ek_mmc_data = { 225static struct at91_mmc_data __initdata ek_mmc_data = {
224 .slot_b = 1, 226 .slot_b = 1,
225 .wire4 = 1, 227 .wire4 = 1,
226// .det_pin = ... not connected 228 .det_pin = -EINVAL,
227// .wp_pin = ... not connected 229 .wp_pin = -EINVAL,
228// .vcc_pin = ... not connected 230 .vcc_pin = -EINVAL,
229}; 231};
230 232
231 233
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index b005b738e8ff..40895072a1a7 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
131static void __init ek_add_device_dm9000(void) 131static void __init ek_add_device_dm9000(void)
132{ 132{
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
136 /* Configure Reset signal as output */ 136 /* Configure Reset signal as output */
137 at91_set_gpio_output(AT91_PIN_PC10, 0); 137 at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {}
151 */ 151 */
152static struct at91_usbh_data __initdata ek_usbh_data = { 152static struct at91_usbh_data __initdata ek_usbh_data = {
153 .ports = 2, 153 .ports = 2,
154 .vbus_pin = {-EINVAL, -EINVAL},
155 .overcurrent_pin= {-EINVAL, -EINVAL},
154}; 156};
155 157
156 158
@@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
159 */ 161 */
160static struct at91_udc_data __initdata ek_udc_data = { 162static struct at91_udc_data __initdata ek_udc_data = {
161 .vbus_pin = AT91_PIN_PB29, 163 .vbus_pin = AT91_PIN_PB29,
162 .pullup_pin = 0, /* pull-up driven by UDC */ 164 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
163}; 165};
164 166
165 167
@@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
182static struct atmel_nand_data __initdata ek_nand_data = { 184static struct atmel_nand_data __initdata ek_nand_data = {
183 .ale = 22, 185 .ale = 22,
184 .cle = 21, 186 .cle = 21,
185// .det_pin = ... not connected 187 .det_pin = -EINVAL,
186 .rdy_pin = AT91_PIN_PC15, 188 .rdy_pin = AT91_PIN_PC15,
187 .enable_pin = AT91_PIN_PC14, 189 .enable_pin = AT91_PIN_PC14,
188 .parts = ek_nand_partition, 190 .parts = ek_nand_partition,
@@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void)
217 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 219 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
218 220
219 /* configure chip-select 3 (NAND) */ 221 /* configure chip-select 3 (NAND) */
220 sam9_smc_configure(3, &ek_nand_smc_config); 222 sam9_smc_configure(0, 3, &ek_nand_smc_config);
221 223
222 at91_add_device_nand(&ek_nand_data); 224 at91_add_device_nand(&ek_nand_data);
223} 225}
@@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = {
345 */ 347 */
346static struct at91_mmc_data __initdata ek_mmc_data = { 348static struct at91_mmc_data __initdata ek_mmc_data = {
347 .wire4 = 1, 349 .wire4 = 1,
350 .det_pin = -EINVAL,
351 .wp_pin = -EINVAL,
352 .vcc_pin = -EINVAL,
348}; 353};
349 354
350#endif /* CONFIG_SPI_ATMEL_* */ 355#endif /* CONFIG_SPI_ATMEL_* */
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index bccdcf23caa1..29f66052fe63 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
74static struct at91_usbh_data __initdata ek_usbh_data = { 74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2, 75 .ports = 2,
76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, 76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
77 .overcurrent_pin= {-EINVAL, -EINVAL},
77}; 78};
78 79
79/* 80/*
@@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
81 */ 82 */
82static struct at91_udc_data __initdata ek_udc_data = { 83static struct at91_udc_data __initdata ek_udc_data = {
83 .vbus_pin = AT91_PIN_PA25, 84 .vbus_pin = AT91_PIN_PA25,
84 .pullup_pin = 0, /* pull-up driven by UDC */ 85 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
85}; 86};
86 87
87 88
@@ -151,14 +152,14 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
151 .wire4 = 1, 152 .wire4 = 1,
152 .det_pin = AT91_PIN_PE18, 153 .det_pin = AT91_PIN_PE18,
153 .wp_pin = AT91_PIN_PE19, 154 .wp_pin = AT91_PIN_PE19,
154// .vcc_pin = ... not connected 155 .vcc_pin = -EINVAL,
155}; 156};
156 157
157 158
158/* 159/*
159 * MACB Ethernet device 160 * MACB Ethernet device
160 */ 161 */
161static struct at91_eth_data __initdata ek_macb_data = { 162static struct macb_platform_data __initdata ek_macb_data = {
162 .phy_irq_pin = AT91_PIN_PE31, 163 .phy_irq_pin = AT91_PIN_PE31,
163 .is_rmii = 1, 164 .is_rmii = 1,
164}; 165};
@@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
183static struct atmel_nand_data __initdata ek_nand_data = { 184static struct atmel_nand_data __initdata ek_nand_data = {
184 .ale = 21, 185 .ale = 21,
185 .cle = 22, 186 .cle = 22,
186// .det_pin = ... not connected 187 .det_pin = -EINVAL,
187 .rdy_pin = AT91_PIN_PA22, 188 .rdy_pin = AT91_PIN_PA22,
188 .enable_pin = AT91_PIN_PD15, 189 .enable_pin = AT91_PIN_PD15,
189 .parts = ek_nand_partition, 190 .parts = ek_nand_partition,
@@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void)
218 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 219 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
219 220
220 /* configure chip-select 3 (NAND) */ 221 /* configure chip-select 3 (NAND) */
221 sam9_smc_configure(3, &ek_nand_smc_config); 222 sam9_smc_configure(0, 3, &ek_nand_smc_config);
222 223
223 at91_add_device_nand(&ek_nand_data); 224 at91_add_device_nand(&ek_nand_data);
224} 225}
@@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {}
353 * reset_pin is not connected: NRST 354 * reset_pin is not connected: NRST
354 */ 355 */
355static struct ac97c_platform_data ek_ac97_data = { 356static struct ac97c_platform_data ek_ac97_data = {
357 .reset_pin = -EINVAL,
356}; 358};
357 359
358 360
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 64fc75c9d0ac..843d6286c6f4 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -86,6 +86,8 @@ static void __init ek_init_early(void)
86 */ 86 */
87static struct at91_usbh_data __initdata ek_usbh_data = { 87static struct at91_usbh_data __initdata ek_usbh_data = {
88 .ports = 2, 88 .ports = 2,
89 .vbus_pin = {-EINVAL, -EINVAL},
90 .overcurrent_pin= {-EINVAL, -EINVAL},
89}; 91};
90 92
91/* 93/*
@@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
93 */ 95 */
94static struct at91_udc_data __initdata ek_udc_data = { 96static struct at91_udc_data __initdata ek_udc_data = {
95 .vbus_pin = AT91_PIN_PC5, 97 .vbus_pin = AT91_PIN_PC5,
96 .pullup_pin = 0, /* pull-up driven by UDC */ 98 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
97}; 99};
98 100
99 101
@@ -123,7 +125,7 @@ static struct spi_board_info ek_spi_devices[] = {
123/* 125/*
124 * MACB Ethernet device 126 * MACB Ethernet device
125 */ 127 */
126static struct at91_eth_data __initdata ek_macb_data = { 128static struct macb_platform_data __initdata ek_macb_data = {
127 .phy_irq_pin = AT91_PIN_PA7, 129 .phy_irq_pin = AT91_PIN_PA7,
128 .is_rmii = 1, 130 .is_rmii = 1,
129}; 131};
@@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
163 .cle = 22, 165 .cle = 22,
164 .rdy_pin = AT91_PIN_PC13, 166 .rdy_pin = AT91_PIN_PC13,
165 .enable_pin = AT91_PIN_PC14, 167 .enable_pin = AT91_PIN_PC14,
168 .det_pin = -EINVAL,
166 .parts = ek_nand_partition, 169 .parts = ek_nand_partition,
167 .num_parts = ARRAY_SIZE(ek_nand_partition), 170 .num_parts = ARRAY_SIZE(ek_nand_partition),
168}; 171};
@@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void)
195 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 198 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
196 199
197 /* configure chip-select 3 (NAND) */ 200 /* configure chip-select 3 (NAND) */
198 sam9_smc_configure(3, &ek_nand_smc_config); 201 sam9_smc_configure(0, 3, &ek_nand_smc_config);
199 202
200 at91_add_device_nand(&ek_nand_data); 203 at91_add_device_nand(&ek_nand_data);
201} 204}
@@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = {
210 .slot[1] = { 213 .slot[1] = {
211 .bus_width = 4, 214 .bus_width = 4,
212 .detect_pin = AT91_PIN_PC9, 215 .detect_pin = AT91_PIN_PC9,
216 .wp_pin = -EINVAL,
213 }, 217 },
214 218
215}; 219};
@@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
218 .slot_b = 1, /* Only one slot so use slot B */ 222 .slot_b = 1, /* Only one slot so use slot B */
219 .wire4 = 1, 223 .wire4 = 1,
220 .det_pin = AT91_PIN_PC9, 224 .det_pin = AT91_PIN_PC9,
225 .wp_pin = -EINVAL,
226 .vcc_pin = -EINVAL,
221}; 227};
222#endif 228#endif
223 229
@@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void)
227 if (ek_have_2mmc()) { 233 if (ek_have_2mmc()) {
228 ek_mmc_data.slot[0].bus_width = 4; 234 ek_mmc_data.slot[0].bus_width = 4;
229 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; 235 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
236 ek_mmc_data.slot[0].wp_pin = -1;
230 } 237 }
231 at91_add_device_mci(0, &ek_mmc_data); 238 at91_add_device_mci(0, &ek_mmc_data);
232#else 239#else
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 92de9127923a..ea0d1b9c2b7b 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -69,6 +69,7 @@ static void __init ek_init_early(void)
69static struct at91_usbh_data __initdata ek_usbh_hs_data = { 69static struct at91_usbh_data __initdata ek_usbh_hs_data = {
70 .ports = 2, 70 .ports = 2,
71 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, 71 .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
72 .overcurrent_pin= {-EINVAL, -EINVAL},
72}; 73};
73 74
74 75
@@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = {
100 .slot[0] = { 101 .slot[0] = {
101 .bus_width = 4, 102 .bus_width = 4,
102 .detect_pin = AT91_PIN_PD10, 103 .detect_pin = AT91_PIN_PD10,
104 .wp_pin = -EINVAL,
103 }, 105 },
104}; 106};
105 107
@@ -115,7 +117,7 @@ static struct mci_platform_data __initdata mci1_data = {
115/* 117/*
116 * MACB Ethernet device 118 * MACB Ethernet device
117 */ 119 */
118static struct at91_eth_data __initdata ek_macb_data = { 120static struct macb_platform_data __initdata ek_macb_data = {
119 .phy_irq_pin = AT91_PIN_PD5, 121 .phy_irq_pin = AT91_PIN_PD5,
120 .is_rmii = 1, 122 .is_rmii = 1,
121}; 123};
@@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
143 .cle = 22, 145 .cle = 22,
144 .rdy_pin = AT91_PIN_PC8, 146 .rdy_pin = AT91_PIN_PC8,
145 .enable_pin = AT91_PIN_PC14, 147 .enable_pin = AT91_PIN_PC14,
148 .det_pin = -EINVAL,
146 .parts = ek_nand_partition, 149 .parts = ek_nand_partition,
147 .num_parts = ARRAY_SIZE(ek_nand_partition), 150 .num_parts = ARRAY_SIZE(ek_nand_partition),
148}; 151};
@@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void)
175 ek_nand_smc_config.mode |= AT91_SMC_DBW_8; 178 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
176 179
177 /* configure chip-select 3 (NAND) */ 180 /* configure chip-select 3 (NAND) */
178 sam9_smc_configure(3, &ek_nand_smc_config); 181 sam9_smc_configure(0, 3, &ek_nand_smc_config);
179 182
180 at91_add_device_nand(&ek_nand_data); 183 at91_add_device_nand(&ek_nand_data);
181} 184}
@@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {}
330 * reset_pin is not connected: NRST 333 * reset_pin is not connected: NRST
331 */ 334 */
332static struct ac97c_platform_data ek_ac97_data = { 335static struct ac97c_platform_data ek_ac97_data = {
336 .reset_pin = -EINVAL,
333}; 337};
334 338
335 339
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index b2b748239f36..c1366d0032bf 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
67static struct at91_mmc_data __initdata ek_mmc_data = { 67static struct at91_mmc_data __initdata ek_mmc_data = {
68 .wire4 = 1, 68 .wire4 = 1,
69 .det_pin = AT91_PIN_PA15, 69 .det_pin = AT91_PIN_PA15,
70// .wp_pin = ... not connected 70 .wp_pin = -EINVAL,
71// .vcc_pin = ... not connected 71 .vcc_pin = -EINVAL,
72}; 72};
73 73
74 74
@@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
91static struct atmel_nand_data __initdata ek_nand_data = { 91static struct atmel_nand_data __initdata ek_nand_data = {
92 .ale = 21, 92 .ale = 21,
93 .cle = 22, 93 .cle = 22,
94// .det_pin = ... not connected 94 .det_pin = -EINVAL,
95 .rdy_pin = AT91_PIN_PD17, 95 .rdy_pin = AT91_PIN_PD17,
96 .enable_pin = AT91_PIN_PB6, 96 .enable_pin = AT91_PIN_PB6,
97 .parts = ek_nand_partition, 97 .parts = ek_nand_partition,
@@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
119static void __init ek_add_device_nand(void) 119static void __init ek_add_device_nand(void)
120{ 120{
121 /* configure chip-select 3 (NAND) */ 121 /* configure chip-select 3 (NAND) */
122 sam9_smc_configure(3, &ek_nand_smc_config); 122 sam9_smc_configure(0, 3, &ek_nand_smc_config);
123 123
124 at91_add_device_nand(&ek_nand_data); 124 at91_add_device_nand(&ek_nand_data);
125} 125}
@@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
204 * reset_pin is not connected: NRST 204 * reset_pin is not connected: NRST
205 */ 205 */
206static struct ac97c_platform_data ek_ac97_data = { 206static struct ac97c_platform_data ek_ac97_data = {
207 .reset_pin = -EINVAL,
207}; 208};
208 209
209 210
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 0df01c6e2d0c..4770db08e5a6 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void)
57 57
58static struct at91_usbh_data __initdata snapper9260_usbh_data = { 58static struct at91_usbh_data __initdata snapper9260_usbh_data = {
59 .ports = 2, 59 .ports = 2,
60 .vbus_pin = {-EINVAL, -EINVAL},
61 .overcurrent_pin= {-EINVAL, -EINVAL},
60}; 62};
61 63
62static struct at91_udc_data __initdata snapper9260_udc_data = { 64static struct at91_udc_data __initdata snapper9260_udc_data = {
63 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), 65 .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5),
64 .vbus_active_low = 1, 66 .vbus_active_low = 1,
65 .vbus_polled = 1, 67 .vbus_polled = 1,
68 .pullup_pin = -EINVAL,
66}; 69};
67 70
68static struct at91_eth_data snapper9260_macb_data = { 71static struct macb_platform_data snapper9260_macb_data = {
72 .phy_irq_pin = -EINVAL,
69 .is_rmii = 1, 73 .is_rmii = 1,
70}; 74};
71 75
@@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = {
104 .parts = snapper9260_nand_partitions, 108 .parts = snapper9260_nand_partitions,
105 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), 109 .num_parts = ARRAY_SIZE(snapper9260_nand_partitions),
106 .bus_width_16 = 0, 110 .bus_width_16 = 0,
111 .enable_pin = -EINVAL,
112 .det_pin = -EINVAL,
107}; 113};
108 114
109static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { 115static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
@@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
149static void __init snapper9260_add_device_nand(void) 155static void __init snapper9260_add_device_nand(void)
150{ 156{
151 at91_set_A_periph(AT91_PIN_PC14, 0); 157 at91_set_A_periph(AT91_PIN_PC14, 0);
152 sam9_smc_configure(3, &snapper9260_nand_smc_config); 158 sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
153 at91_add_device_nand(&snapper9260_nand_data); 159 at91_add_device_nand(&snapper9260_nand_data);
154} 160}
155 161
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 936e5fd7f406..72eb3b4d9ab6 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = {
85 .rdy_pin = AT91_PIN_PC13, 85 .rdy_pin = AT91_PIN_PC13,
86 .enable_pin = AT91_PIN_PC14, 86 .enable_pin = AT91_PIN_PC14,
87 .bus_width_16 = 0, 87 .bus_width_16 = 0,
88 .det_pin = -EINVAL,
88}; 89};
89 90
90static struct sam9_smc_config __initdata nand_smc_config = { 91static struct sam9_smc_config __initdata nand_smc_config = {
@@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = {
108static void __init add_device_nand(void) 109static void __init add_device_nand(void)
109{ 110{
110 /* configure chip-select 3 (NAND) */ 111 /* configure chip-select 3 (NAND) */
111 sam9_smc_configure(3, &nand_smc_config); 112 sam9_smc_configure(0, 3, &nand_smc_config);
112 113
113 at91_add_device_nand(&nand_data); 114 at91_add_device_nand(&nand_data);
114} 115}
@@ -122,12 +123,17 @@ static void __init add_device_nand(void)
122static struct mci_platform_data __initdata mmc_data = { 123static struct mci_platform_data __initdata mmc_data = {
123 .slot[0] = { 124 .slot[0] = {
124 .bus_width = 4, 125 .bus_width = 4,
126 .detect_pin = -1,
127 .wp_pin = -1,
125 }, 128 },
126}; 129};
127#else 130#else
128static struct at91_mmc_data __initdata mmc_data = { 131static struct at91_mmc_data __initdata mmc_data = {
129 .slot_b = 0, 132 .slot_b = 0,
130 .wire4 = 1, 133 .wire4 = 1,
134 .det_pin = -EINVAL,
135 .wp_pin = -EINVAL,
136 .vcc_pin = -EINVAL,
131}; 137};
132#endif 138#endif
133 139
@@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = {
137 */ 143 */
138static struct at91_usbh_data __initdata usbh_data = { 144static struct at91_usbh_data __initdata usbh_data = {
139 .ports = 2, 145 .ports = 2,
146 .vbus_pin = {-EINVAL, -EINVAL},
147 .overcurrent_pin= {-EINVAL, -EINVAL},
140}; 148};
141 149
142 150
@@ -145,19 +153,19 @@ static struct at91_usbh_data __initdata usbh_data = {
145 */ 153 */
146static struct at91_udc_data __initdata portuxg20_udc_data = { 154static struct at91_udc_data __initdata portuxg20_udc_data = {
147 .vbus_pin = AT91_PIN_PC7, 155 .vbus_pin = AT91_PIN_PC7,
148 .pullup_pin = 0, /* pull-up driven by UDC */ 156 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
149}; 157};
150 158
151static struct at91_udc_data __initdata stamp9g20evb_udc_data = { 159static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
152 .vbus_pin = AT91_PIN_PA22, 160 .vbus_pin = AT91_PIN_PA22,
153 .pullup_pin = 0, /* pull-up driven by UDC */ 161 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
154}; 162};
155 163
156 164
157/* 165/*
158 * MACB Ethernet device 166 * MACB Ethernet device
159 */ 167 */
160static struct at91_eth_data __initdata macb_data = { 168static struct macb_platform_data __initdata macb_data = {
161 .phy_irq_pin = AT91_PIN_PA28, 169 .phy_irq_pin = AT91_PIN_PA28,
162 .is_rmii = 1, 170 .is_rmii = 1,
163}; 171};
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index 0a20bab21f99..26c36fc2d1e5 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -66,6 +66,8 @@ static void __init ek_init_early(void)
66 */ 66 */
67static struct at91_usbh_data __initdata ek_usbh_data = { 67static struct at91_usbh_data __initdata ek_usbh_data = {
68 .ports = 2, 68 .ports = 2,
69 .vbus_pin = {-EINVAL, -EINVAL},
70 .overcurrent_pin= {-EINVAL, -EINVAL},
69}; 71};
70 72
71/* 73/*
@@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
73 */ 75 */
74static struct at91_udc_data __initdata ek_udc_data = { 76static struct at91_udc_data __initdata ek_udc_data = {
75 .vbus_pin = AT91_PIN_PB11, 77 .vbus_pin = AT91_PIN_PB11,
76 .pullup_pin = 0, /* pull-up driven by UDC */ 78 .pullup_pin = -EINVAL, /* pull-up driven by UDC */
77}; 79};
78 80
79static void __init ek_add_device_udc(void) 81static void __init ek_add_device_udc(void)
@@ -146,7 +148,7 @@ static void __init ek_add_device_spi(void)
146/* 148/*
147 * MACB Ethernet device 149 * MACB Ethernet device
148 */ 150 */
149static struct at91_eth_data __initdata ek_macb_data = { 151static struct macb_platform_data __initdata ek_macb_data = {
150 .phy_irq_pin = AT91_PIN_PE31, 152 .phy_irq_pin = AT91_PIN_PE31,
151 .is_rmii = 1, 153 .is_rmii = 1,
152}; 154};
@@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
193static struct atmel_nand_data __initdata ek_nand_data = { 195static struct atmel_nand_data __initdata ek_nand_data = {
194 .ale = 21, 196 .ale = 21,
195 .cle = 22, 197 .cle = 22,
196// .det_pin = ... not connected 198 .det_pin = -EINVAL,
197 .rdy_pin = AT91_PIN_PA22, 199 .rdy_pin = AT91_PIN_PA22,
198 .enable_pin = AT91_PIN_PD15, 200 .enable_pin = AT91_PIN_PD15,
199 .parts = ek_nand_partition, 201 .parts = ek_nand_partition,
@@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void)
245 247
246 /* configure chip-select 3 (NAND) */ 248 /* configure chip-select 3 (NAND) */
247 if (machine_is_usb_a9g20()) 249 if (machine_is_usb_a9g20())
248 sam9_smc_configure(3, &usb_a9g20_nand_smc_config); 250 sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config);
249 else 251 else
250 sam9_smc_configure(3, &usb_a9260_nand_smc_config); 252 sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config);
251 253
252 at91_add_device_nand(&ek_nand_data); 254 at91_add_device_nand(&ek_nand_data);
253} 255}
@@ -344,7 +346,7 @@ static void __init ek_board_init(void)
344 /* I2C */ 346 /* I2C */
345 at91_add_device_i2c(NULL, 0); 347 at91_add_device_i2c(NULL, 0);
346 /* shutdown controller, wakeup button (5 msec low) */ 348 /* shutdown controller, wakeup button (5 msec low) */
347 at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) 349 at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
348 | AT91_SHDW_WKMODE0_LOW 350 | AT91_SHDW_WKMODE0_LOW
349 | AT91_SHDW_RTTWKEN); 351 | AT91_SHDW_RTTWKEN);
350 } 352 }
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 12a3f955162b..bbd553e1cd93 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -110,7 +110,7 @@ static struct gpio_led yl9200_leds[] = {
110/* 110/*
111 * Ethernet 111 * Ethernet
112 */ 112 */
113static struct at91_eth_data __initdata yl9200_eth_data = { 113static struct macb_platform_data __initdata yl9200_eth_data = {
114 .phy_irq_pin = AT91_PIN_PB28, 114 .phy_irq_pin = AT91_PIN_PB28,
115 .is_rmii = 1, 115 .is_rmii = 1,
116}; 116};
@@ -120,6 +120,8 @@ static struct at91_eth_data __initdata yl9200_eth_data = {
120 */ 120 */
121static struct at91_usbh_data __initdata yl9200_usbh_data = { 121static struct at91_usbh_data __initdata yl9200_usbh_data = {
122 .ports = 1, /* PQFP version of AT91RM9200 */ 122 .ports = 1, /* PQFP version of AT91RM9200 */
123 .vbus_pin = {-EINVAL, -EINVAL},
124 .overcurrent_pin= {-EINVAL, -EINVAL},
123}; 125};
124 126
125/* 127/*
@@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = {
137 */ 139 */
138static struct at91_mmc_data __initdata yl9200_mmc_data = { 140static struct at91_mmc_data __initdata yl9200_mmc_data = {
139 .det_pin = AT91_PIN_PB9, 141 .det_pin = AT91_PIN_PB9,
140 // .wp_pin = ... not connected
141 .wire4 = 1, 142 .wire4 = 1,
143 .wp_pin = -EINVAL,
144 .vcc_pin = -EINVAL,
142}; 145};
143 146
144/* 147/*
@@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = {
175static struct atmel_nand_data __initdata yl9200_nand_data = { 178static struct atmel_nand_data __initdata yl9200_nand_data = {
176 .ale = 6, 179 .ale = 6,
177 .cle = 7, 180 .cle = 7,
178 // .det_pin = ... not connected 181 .det_pin = -EINVAL,
179 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ 182 .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */
180 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ 183 .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */
181 .parts = yl9200_nand_partition, 184 .parts = yl9200_nand_partition,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 7f4503bc4cbb..4866b8180d66 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
29 /* Timer */ 29 /* Timer */
30struct sys_timer; 30struct sys_timer;
31extern struct sys_timer at91rm9200_timer; 31extern struct sys_timer at91rm9200_timer;
32extern void at91sam926x_ioremap_pit(u32 addr);
32extern struct sys_timer at91sam926x_timer; 33extern struct sys_timer at91sam926x_timer;
33extern struct sys_timer at91x40_timer; 34extern struct sys_timer at91x40_timer;
34 35
@@ -59,14 +60,16 @@ extern void at91_irq_resume(void);
59/* reset */ 60/* reset */
60extern void at91sam9_alt_restart(char, const char *); 61extern void at91sam9_alt_restart(char, const char *);
61 62
63/* shutdown */
64extern void at91_ioremap_shdwc(u32 base_addr);
65
62 /* GPIO */ 66 /* GPIO */
63#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ 67#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
64#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ 68#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
65 69
66struct at91_gpio_bank { 70struct at91_gpio_bank {
67 unsigned short id; /* peripheral ID */ 71 unsigned short id; /* peripheral ID */
68 unsigned long offset; /* offset from system peripheral base */ 72 unsigned long regbase; /* offset from system peripheral base */
69 struct clk *clock; /* associated clock */
70}; 73};
71extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 74extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
72extern void __init at91_gpio_irq_setup(void); 75extern void __init at91_gpio_irq_setup(void);
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 224e9e2f8674..74d6783eeabb 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -29,8 +29,9 @@
29struct at91_gpio_chip { 29struct at91_gpio_chip {
30 struct gpio_chip chip; 30 struct gpio_chip chip;
31 struct at91_gpio_chip *next; /* Bank sharing same clock */ 31 struct at91_gpio_chip *next; /* Bank sharing same clock */
32 struct at91_gpio_bank *bank; /* Bank definition */ 32 int id; /* ID of register bank */
33 void __iomem *regbase; /* Base of register bank */ 33 void __iomem *regbase; /* Base of register bank */
34 struct clk *clock; /* associated clock */
34}; 35};
35 36
36#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) 37#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
58 } 59 }
59 60
60static struct at91_gpio_chip gpio_chip[] = { 61static struct at91_gpio_chip gpio_chip[] = {
61 AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), 62 AT91_GPIO_CHIP("pioA", 0x00, 32),
62 AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), 63 AT91_GPIO_CHIP("pioB", 0x20, 32),
63 AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), 64 AT91_GPIO_CHIP("pioC", 0x40, 32),
64 AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), 65 AT91_GPIO_CHIP("pioD", 0x60, 32),
65 AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), 66 AT91_GPIO_CHIP("pioE", 0x80, 32),
66}; 67};
67 68
68static int gpio_banks; 69static int gpio_banks;
69 70
70static inline void __iomem *pin_to_controller(unsigned pin) 71static inline void __iomem *pin_to_controller(unsigned pin)
71{ 72{
72 pin -= PIN_BASE;
73 pin /= 32; 73 pin /= 32;
74 if (likely(pin < gpio_banks)) 74 if (likely(pin < gpio_banks))
75 return gpio_chip[pin].regbase; 75 return gpio_chip[pin].regbase;
@@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin)
79 79
80static inline unsigned pin_to_mask(unsigned pin) 80static inline unsigned pin_to_mask(unsigned pin)
81{ 81{
82 pin -= PIN_BASE;
83 return 1 << (pin % 32); 82 return 1 << (pin % 32);
84} 83}
85 84
@@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS];
274 273
275static int gpio_irq_set_wake(struct irq_data *d, unsigned state) 274static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
276{ 275{
277 unsigned mask = pin_to_mask(d->irq); 276 unsigned pin = irq_to_gpio(d->irq);
278 unsigned bank = (d->irq - PIN_BASE) / 32; 277 unsigned mask = pin_to_mask(pin);
278 unsigned bank = pin / 32;
279 279
280 if (unlikely(bank >= MAX_GPIO_BANKS)) 280 if (unlikely(bank >= MAX_GPIO_BANKS))
281 return -EINVAL; 281 return -EINVAL;
@@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
285 else 285 else
286 wakeups[bank] &= ~mask; 286 wakeups[bank] &= ~mask;
287 287
288 irq_set_irq_wake(gpio_chip[bank].bank->id, state); 288 irq_set_irq_wake(gpio_chip[bank].id, state);
289 289
290 return 0; 290 return 0;
291} 291}
@@ -302,7 +302,7 @@ void at91_gpio_suspend(void)
302 __raw_writel(wakeups[i], pio + PIO_IER); 302 __raw_writel(wakeups[i], pio + PIO_IER);
303 303
304 if (!wakeups[i]) 304 if (!wakeups[i])
305 clk_disable(gpio_chip[i].bank->clock); 305 clk_disable(gpio_chip[i].clock);
306 else { 306 else {
307#ifdef CONFIG_PM_DEBUG 307#ifdef CONFIG_PM_DEBUG
308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); 308 printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
@@ -319,7 +319,7 @@ void at91_gpio_resume(void)
319 void __iomem *pio = gpio_chip[i].regbase; 319 void __iomem *pio = gpio_chip[i].regbase;
320 320
321 if (!wakeups[i]) 321 if (!wakeups[i])
322 clk_enable(gpio_chip[i].bank->clock); 322 clk_enable(gpio_chip[i].clock);
323 323
324 __raw_writel(wakeups[i], pio + PIO_IDR); 324 __raw_writel(wakeups[i], pio + PIO_IDR);
325 __raw_writel(backups[i], pio + PIO_IER); 325 __raw_writel(backups[i], pio + PIO_IER);
@@ -344,8 +344,9 @@ void at91_gpio_resume(void)
344 344
345static void gpio_irq_mask(struct irq_data *d) 345static void gpio_irq_mask(struct irq_data *d)
346{ 346{
347 void __iomem *pio = pin_to_controller(d->irq); 347 unsigned pin = irq_to_gpio(d->irq);
348 unsigned mask = pin_to_mask(d->irq); 348 void __iomem *pio = pin_to_controller(pin);
349 unsigned mask = pin_to_mask(pin);
349 350
350 if (pio) 351 if (pio)
351 __raw_writel(mask, pio + PIO_IDR); 352 __raw_writel(mask, pio + PIO_IDR);
@@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d)
353 354
354static void gpio_irq_unmask(struct irq_data *d) 355static void gpio_irq_unmask(struct irq_data *d)
355{ 356{
356 void __iomem *pio = pin_to_controller(d->irq); 357 unsigned pin = irq_to_gpio(d->irq);
357 unsigned mask = pin_to_mask(d->irq); 358 void __iomem *pio = pin_to_controller(pin);
359 unsigned mask = pin_to_mask(pin);
358 360
359 if (pio) 361 if (pio)
360 __raw_writel(mask, pio + PIO_IER); 362 __raw_writel(mask, pio + PIO_IER);
@@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = {
382 384
383static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) 385static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
384{ 386{
385 unsigned pin; 387 unsigned irq_pin;
386 struct irq_data *idata = irq_desc_get_irq_data(desc); 388 struct irq_data *idata = irq_desc_get_irq_data(desc);
387 struct irq_chip *chip = irq_data_get_irq_chip(idata); 389 struct irq_chip *chip = irq_data_get_irq_chip(idata);
388 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); 390 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
@@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
405 continue; 407 continue;
406 } 408 }
407 409
408 pin = at91_gpio->chip.base; 410 irq_pin = gpio_to_irq(at91_gpio->chip.base);
409 411
410 while (isr) { 412 while (isr) {
411 if (isr & 1) 413 if (isr & 1)
412 generic_handle_irq(pin); 414 generic_handle_irq(irq_pin);
413 pin++; 415 irq_pin++;
414 isr >>= 1; 416 isr >>= 1;
415 } 417 }
416 } 418 }
@@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
438 seq_printf(s, "%i:\t", j); 440 seq_printf(s, "%i:\t", j);
439 441
440 for (bank = 0; bank < gpio_banks; bank++) { 442 for (bank = 0; bank < gpio_banks; bank++) {
441 unsigned pin = PIN_BASE + (32 * bank) + j; 443 unsigned pin = (32 * bank) + j;
442 void __iomem *pio = pin_to_controller(pin); 444 void __iomem *pio = pin_to_controller(pin);
443 unsigned mask = pin_to_mask(pin); 445 unsigned mask = pin_to_mask(pin);
444 446
@@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class;
491 */ 493 */
492void __init at91_gpio_irq_setup(void) 494void __init at91_gpio_irq_setup(void)
493{ 495{
494 unsigned pioc, pin; 496 unsigned pioc, irq = gpio_to_irq(0);
495 struct at91_gpio_chip *this, *prev; 497 struct at91_gpio_chip *this, *prev;
496 498
497 for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; 499 for (pioc = 0, this = gpio_chip, prev = NULL;
498 pioc++ < gpio_banks; 500 pioc++ < gpio_banks;
499 prev = this, this++) { 501 prev = this, this++) {
500 unsigned id = this->bank->id; 502 unsigned id = this->id;
501 unsigned i; 503 unsigned i;
502 504
503 __raw_writel(~0, this->regbase + PIO_IDR); 505 __raw_writel(~0, this->regbase + PIO_IDR);
504 506
505 for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { 507 for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32;
506 irq_set_lockdep_class(pin, &gpio_lock_class); 508 i++, irq++) {
509 irq_set_lockdep_class(irq, &gpio_lock_class);
507 510
508 /* 511 /*
509 * Can use the "simple" and not "edge" handler since it's 512 * Can use the "simple" and not "edge" handler since it's
510 * shorter, and the AIC handles interrupts sanely. 513 * shorter, and the AIC handles interrupts sanely.
511 */ 514 */
512 irq_set_chip_and_handler(pin, &gpio_irqchip, 515 irq_set_chip_and_handler(irq, &gpio_irqchip,
513 handle_simple_irq); 516 handle_simple_irq);
514 set_irq_flags(pin, IRQF_VALID); 517 set_irq_flags(irq, IRQF_VALID);
515 } 518 }
516 519
517 /* The toplevel handler handles one bank of GPIOs, except 520 /* The toplevel handler handles one bank of GPIOs, except
@@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void)
524 irq_set_chip_data(id, this); 527 irq_set_chip_data(id, this);
525 irq_set_chained_handler(id, gpio_irq_handler); 528 irq_set_chained_handler(id, gpio_irq_handler);
526 } 529 }
527 pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); 530 pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks);
528} 531}
529 532
530/* gpiolib support */ 533/* gpiolib support */
@@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
612 for (i = 0; i < nr_banks; i++) { 615 for (i = 0; i < nr_banks; i++) {
613 at91_gpio = &gpio_chip[i]; 616 at91_gpio = &gpio_chip[i];
614 617
615 at91_gpio->bank = &data[i]; 618 at91_gpio->id = data[i].id;
616 at91_gpio->chip.base = PIN_BASE + i * 32; 619 at91_gpio->chip.base = i * 32;
617 at91_gpio->regbase = at91_gpio->bank->offset + 620
618 (void __iomem *)AT91_VA_BASE_SYS; 621 at91_gpio->regbase = ioremap(data[i].regbase, 512);
622 if (!at91_gpio->regbase) {
623 pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i);
624 continue;
625 }
626
627 at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
628 if (!at91_gpio->clock) {
629 pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i);
630 continue;
631 }
619 632
620 /* enable PIO controller's clock */ 633 /* enable PIO controller's clock */
621 clk_enable(at91_gpio->bank->clock); 634 clk_enable(at91_gpio->clock);
622 635
623 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ 636 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
624 if (last && last->bank->id == at91_gpio->bank->id) 637 if (last && last->id == at91_gpio->id)
625 last->next = at91_gpio; 638 last->next = at91_gpio;
626 last = at91_gpio; 639 last = at91_gpio;
627 640
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h
index 03566799d3be..3045781c473f 100644
--- a/arch/arm/mach-at91/include/mach/at91_aic.h
+++ b/arch/arm/mach-at91/include/mach/at91_aic.h
@@ -16,7 +16,19 @@
16#ifndef AT91_AIC_H 16#ifndef AT91_AIC_H
17#define AT91_AIC_H 17#define AT91_AIC_H
18 18
19#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_aic_base;
21
22#define at91_aic_read(field) \
23 __raw_readl(at91_aic_base + field)
24
25#define at91_aic_write(field, value) \
26 __raw_writel(value, at91_aic_base + field);
27#else
28.extern at91_aic_base
29#endif
30
31#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */
20#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ 32#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */
21#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ 33#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */
22#define AT91_AIC_SRCTYPE_LOW (0 << 5) 34#define AT91_AIC_SRCTYPE_LOW (0 << 5)
@@ -24,30 +36,30 @@
24#define AT91_AIC_SRCTYPE_HIGH (2 << 5) 36#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
25#define AT91_AIC_SRCTYPE_RISING (3 << 5) 37#define AT91_AIC_SRCTYPE_RISING (3 << 5)
26 38
27#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ 39#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */
28#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ 40#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */
29#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ 41#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */
30#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ 42#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */
31#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ 43#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */
32 44
33#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ 45#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */
34#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ 46#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */
35#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ 47#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */
36#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ 48#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */
37#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ 49#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */
38 50
39#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ 51#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */
40#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ 52#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */
41#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ 53#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */
42#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ 54#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */
43#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ 55#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */
44#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ 56#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */
45#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ 57#define AT91_AIC_DCR 0x138 /* Debug Control Register */
46#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ 58#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */
47#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ 59#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */
48 60
49#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ 61#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */
50#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ 62#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */
51#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ 63#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */
52 64
53#endif 65#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index dbfe455a4c41..2aa0c5e13495 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
19#define dbgu_readl(dbgu, field) \ 19#define dbgu_readl(dbgu, field) \
20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) 20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
21 21
22#ifdef AT91_DBGU 22#if !defined(CONFIG_ARCH_AT91X40)
23#define AT91_DBGU_CR (0x00) /* Control Register */ 23#define AT91_DBGU_CR (0x00) /* Control Register */
24#define AT91_DBGU_MR (0x04) /* Mode Register */ 24#define AT91_DBGU_MR (0x04) /* Mode Register */
25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ 25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h
index 974d0bd05b5b..d1f80ad7f4d4 100644
--- a/arch/arm/mach-at91/include/mach/at91_pit.h
+++ b/arch/arm/mach-at91/include/mach/at91_pit.h
@@ -16,16 +16,16 @@
16#ifndef AT91_PIT_H 16#ifndef AT91_PIT_H
17#define AT91_PIT_H 17#define AT91_PIT_H
18 18
19#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ 19#define AT91_PIT_MR 0x00 /* Mode Register */
20#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ 20#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */
21#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ 21#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */
22#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ 22#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */
23 23
24#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ 24#define AT91_PIT_SR 0x04 /* Status Register */
25#define AT91_PIT_PITS (1 << 0) /* Timer Status */ 25#define AT91_PIT_PITS (1 << 0) /* Timer Status */
26 26
27#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ 27#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */
28#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ 28#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */
29#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ 29#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */
30#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ 30#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */
31 31
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h
index e56f4701a3e5..da1945e5f714 100644
--- a/arch/arm/mach-at91/include/mach/at91_rtc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rtc.h
@@ -16,7 +16,7 @@
16#ifndef AT91_RTC_H 16#ifndef AT91_RTC_H
17#define AT91_RTC_H 17#define AT91_RTC_H
18 18
19#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ 19#define AT91_RTC_CR 0x00 /* Control Register */
20#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ 20#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */
21#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ 21#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */
22#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ 22#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */
@@ -29,44 +29,44 @@
29#define AT91_RTC_CALEVSEL_MONTH (1 << 16) 29#define AT91_RTC_CALEVSEL_MONTH (1 << 16)
30#define AT91_RTC_CALEVSEL_YEAR (2 << 16) 30#define AT91_RTC_CALEVSEL_YEAR (2 << 16)
31 31
32#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ 32#define AT91_RTC_MR 0x04 /* Mode Register */
33#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ 33#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */
34 34
35#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ 35#define AT91_RTC_TIMR 0x08 /* Time Register */
36#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ 36#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
37#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ 37#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
38#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ 38#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
39#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ 39#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
40 40
41#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ 41#define AT91_RTC_CALR 0x0c /* Calendar Register */
42#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ 42#define AT91_RTC_CENT (0x7f << 0) /* Current Century */
43#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ 43#define AT91_RTC_YEAR (0xff << 8) /* Current Year */
44#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ 44#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */
45#define AT91_RTC_DAY (7 << 21) /* Current Day */ 45#define AT91_RTC_DAY (7 << 21) /* Current Day */
46#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ 46#define AT91_RTC_DATE (0x3f << 24) /* Current Date */
47 47
48#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ 48#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */
49#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ 49#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */
50#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ 50#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */
51#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ 51#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */
52 52
53#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ 53#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */
54#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ 54#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */
55#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ 55#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */
56 56
57#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ 57#define AT91_RTC_SR 0x18 /* Status Register */
58#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ 58#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */
59#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ 59#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */
60#define AT91_RTC_SECEV (1 << 2) /* Second Event */ 60#define AT91_RTC_SECEV (1 << 2) /* Second Event */
61#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ 61#define AT91_RTC_TIMEV (1 << 3) /* Time Event */
62#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ 62#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */
63 63
64#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ 64#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */
65#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ 65#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */
66#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ 66#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
67#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ 67#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
68 68
69#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ 69#define AT91_RTC_VER 0x2c /* Valid Entry Register */
70#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ 70#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */
71#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ 71#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */
72#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ 72#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index c4ce07e8a8fa..1d4fe822c77a 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -16,11 +16,21 @@
16#ifndef AT91_SHDWC_H 16#ifndef AT91_SHDWC_H
17#define AT91_SHDWC_H 17#define AT91_SHDWC_H
18 18
19#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ 19#ifndef __ASSEMBLY__
20extern void __iomem *at91_shdwc_base;
21
22#define at91_shdwc_read(field) \
23 __raw_readl(at91_shdwc_base + field)
24
25#define at91_shdwc_write(field, value) \
26 __raw_writel(value, at91_shdwc_base + field);
27#endif
28
29#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
20#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ 30#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */
21#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ 31#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */
22 32
23#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ 33#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
24#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ 34#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */
25#define AT91_SHDW_WKMODE0_NONE 0 35#define AT91_SHDW_WKMODE0_NONE 0
26#define AT91_SHDW_WKMODE0_HIGH 1 36#define AT91_SHDW_WKMODE0_HIGH 1
@@ -30,7 +40,7 @@
30#define AT91_SHDW_CPTWK0_(x) ((x) << 4) 40#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
31#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ 41#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
32 42
33#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ 43#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
34#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ 44#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
35#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ 45#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
36#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ 46#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index c5df1e8f1955..4c0e2f6011d7 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -79,29 +79,28 @@
79/* 79/*
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
83#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) 82#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS)
84#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 83#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
85#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
86#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
87#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS)
88#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
89#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
90#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
91#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
92#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
93#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
94#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
95#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
96#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
97#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
98#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
99#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
100#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
101#define AT91_GPBR (cpu_is_at91cap9_revB() ? \ 87#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
102 (0xfffffd50 - AT91_BASE_SYS) : \ 88 (0xfffffd50 - AT91_BASE_SYS) : \
103 (0xfffffd60 - AT91_BASE_SYS)) 89 (0xfffffd60 - AT91_BASE_SYS))
104 90
91#define AT91CAP9_BASE_ECC 0xffffe200
92#define AT91CAP9_BASE_DMA 0xffffec00
93#define AT91CAP9_BASE_SMC 0xffffe800
94#define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1
95#define AT91CAP9_BASE_PIOA 0xfffff200
96#define AT91CAP9_BASE_PIOB 0xfffff400
97#define AT91CAP9_BASE_PIOC 0xfffff600
98#define AT91CAP9_BASE_PIOD 0xfffff800
99#define AT91CAP9_BASE_SHDWC 0xfffffd10
100#define AT91CAP9_BASE_RTT 0xfffffd20
101#define AT91CAP9_BASE_PIT 0xfffffd30
102#define AT91CAP9_BASE_WDT 0xfffffd40
103
105#define AT91_USART0 AT91CAP9_BASE_US0 104#define AT91_USART0 AT91CAP9_BASE_US0
106#define AT91_USART1 AT91CAP9_BASE_US1 105#define AT91_USART1 AT91CAP9_BASE_US1
107#define AT91_USART2 AT91CAP9_BASE_US2 106#define AT91_USART2 AT91CAP9_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index e4037b500302..bacb51141819 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -79,17 +79,17 @@
79/* 79/*
80 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
81 */ 81 */
82#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
83#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */
84#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */
85#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */
86#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */
87#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */
88#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ 82#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
89#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ 83#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */
90#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
91#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ 84#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
92 85
86#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
87#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
88#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
89#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */
90#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */
91#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
92
93#define AT91_USART0 AT91RM9200_BASE_US0 93#define AT91_USART0 AT91RM9200_BASE_US0
94#define AT91_USART1 AT91RM9200_BASE_US1 94#define AT91_USART1 AT91RM9200_BASE_US1
95#define AT91_USART2 AT91RM9200_BASE_US2 95#define AT91_USART2 AT91RM9200_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 9a791165913f..f937c476bb67 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -80,24 +80,23 @@
80/* 80/*
81 * System Peripherals (offset from AT91_BASE_SYS) 81 * System Peripherals (offset from AT91_BASE_SYS)
82 */ 82 */
83#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
84#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 83#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
85#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
86#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 84#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
87#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
88#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
89#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
90#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
91#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
92#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
93#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 85#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
94#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 86#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
95#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
96#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
97#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
98#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
99#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 87#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
100 88
89#define AT91SAM9260_BASE_ECC 0xffffe800
90#define AT91SAM9260_BASE_SMC 0xffffec00
91#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0
92#define AT91SAM9260_BASE_PIOA 0xfffff400
93#define AT91SAM9260_BASE_PIOB 0xfffff600
94#define AT91SAM9260_BASE_PIOC 0xfffff800
95#define AT91SAM9260_BASE_SHDWC 0xfffffd10
96#define AT91SAM9260_BASE_RTT 0xfffffd20
97#define AT91SAM9260_BASE_PIT 0xfffffd30
98#define AT91SAM9260_BASE_WDT 0xfffffd40
99
101#define AT91_USART0 AT91SAM9260_BASE_US0 100#define AT91_USART0 AT91SAM9260_BASE_US0
102#define AT91_USART1 AT91SAM9260_BASE_US1 101#define AT91_USART1 AT91SAM9260_BASE_US1
103#define AT91_USART2 AT91SAM9260_BASE_US2 102#define AT91_USART2 AT91SAM9260_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index ce596204cefa..175604e261be 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -66,21 +66,21 @@
66 * System Peripherals (offset from AT91_BASE_SYS) 66 * System Peripherals (offset from AT91_BASE_SYS)
67 */ 67 */
68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 68#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
69#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
70#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 69#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
71#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
72#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
73#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
74#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
75#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
76#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 70#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
77#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 71#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
78#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
79#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
80#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
81#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
82#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 72#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
83 73
74#define AT91SAM9261_BASE_SMC 0xffffec00
75#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0
76#define AT91SAM9261_BASE_PIOA 0xfffff400
77#define AT91SAM9261_BASE_PIOB 0xfffff600
78#define AT91SAM9261_BASE_PIOC 0xfffff800
79#define AT91SAM9261_BASE_SHDWC 0xfffffd10
80#define AT91SAM9261_BASE_RTT 0xfffffd20
81#define AT91SAM9261_BASE_PIT 0xfffffd30
82#define AT91SAM9261_BASE_WDT 0xfffffd40
83
84#define AT91_USART0 AT91SAM9261_BASE_US0 84#define AT91_USART0 AT91SAM9261_BASE_US0
85#define AT91_USART1 AT91SAM9261_BASE_US1 85#define AT91_USART1 AT91SAM9261_BASE_US1
86#define AT91_USART2 AT91SAM9261_BASE_US2 86#define AT91_USART2 AT91SAM9261_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index f1b92961a2b1..80c915002d83 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -74,30 +74,29 @@
74/* 74/*
75 * System Peripherals (offset from AT91_BASE_SYS) 75 * System Peripherals (offset from AT91_BASE_SYS)
76 */ 76 */
77#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS)
78#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) 77#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
79#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS)
80#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS)
81#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) 78#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
82#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS)
83#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) 79#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
84#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS)
85#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
86#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
87#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
88#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
89#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
90#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
91#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 80#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 81#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
94#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
95#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS)
96#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
97#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
98#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
99#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 82#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
100 83
84#define AT91SAM9263_BASE_ECC0 0xffffe000
85#define AT91SAM9263_BASE_SMC0 0xffffe400
86#define AT91SAM9263_BASE_ECC1 0xffffe600
87#define AT91SAM9263_BASE_SMC1 0xffffea00
88#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1
89#define AT91SAM9263_BASE_PIOA 0xfffff200
90#define AT91SAM9263_BASE_PIOB 0xfffff400
91#define AT91SAM9263_BASE_PIOC 0xfffff600
92#define AT91SAM9263_BASE_PIOD 0xfffff800
93#define AT91SAM9263_BASE_PIOE 0xfffffa00
94#define AT91SAM9263_BASE_SHDWC 0xfffffd10
95#define AT91SAM9263_BASE_RTT0 0xfffffd20
96#define AT91SAM9263_BASE_PIT 0xfffffd30
97#define AT91SAM9263_BASE_WDT 0xfffffd40
98#define AT91SAM9263_BASE_RTT1 0xfffffd50
99
101#define AT91_USART0 AT91SAM9263_BASE_US0 100#define AT91_USART0 AT91SAM9263_BASE_US0
102#define AT91_USART1 AT91SAM9263_BASE_US1 101#define AT91_USART1 AT91SAM9263_BASE_US1
103#define AT91_USART2 AT91SAM9263_BASE_US2 102#define AT91_USART2 AT91SAM9263_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index 57de6207e57e..eb18a70fa647 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -16,7 +16,9 @@
16#ifndef AT91SAM9_SMC_H 16#ifndef AT91SAM9_SMC_H
17#define AT91SAM9_SMC_H 17#define AT91SAM9_SMC_H
18 18
19#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ 19#include <mach/cpu.h>
20
21#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */
20#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ 22#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
21#define AT91_SMC_NWESETUP_(x) ((x) << 0) 23#define AT91_SMC_NWESETUP_(x) ((x) << 0)
22#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ 24#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */
@@ -26,7 +28,7 @@
26#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ 28#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */
27#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) 29#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24)
28 30
29#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ 31#define AT91_SMC_PULSE 0x04 /* Pulse Register for CS n */
30#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ 32#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */
31#define AT91_SMC_NWEPULSE_(x) ((x) << 0) 33#define AT91_SMC_NWEPULSE_(x) ((x) << 0)
32#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ 34#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */
@@ -36,13 +38,13 @@
36#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ 38#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */
37#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) 39#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
38 40
39#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ 41#define AT91_SMC_CYCLE 0x08 /* Cycle Register for CS n */
40#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ 42#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */
41#define AT91_SMC_NWECYCLE_(x) ((x) << 0) 43#define AT91_SMC_NWECYCLE_(x) ((x) << 0)
42#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ 44#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */
43#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) 45#define AT91_SMC_NRDCYCLE_(x) ((x) << 16)
44 46
45#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ 47#define AT91_SMC_MODE 0x0c /* Mode Register for CS n */
46#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ 48#define AT91_SMC_READMODE (1 << 0) /* Read Mode */
47#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ 49#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */
48#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ 50#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */
@@ -66,11 +68,4 @@
66#define AT91_SMC_PS_16 (2 << 28) 68#define AT91_SMC_PS_16 (2 << 28)
67#define AT91_SMC_PS_32 (3 << 28) 69#define AT91_SMC_PS_32 (3 << 28)
68 70
69#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */
70#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
71#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
72#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
73#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
74#endif
75
76#endif 71#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 406bb6496805..f0c23c960dec 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -86,27 +86,27 @@
86/* 86/*
87 * System Peripherals (offset from AT91_BASE_SYS) 87 * System Peripherals (offset from AT91_BASE_SYS)
88 */ 88 */
89#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
90#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) 89#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
91#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) 90#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
92#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
93#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) 91#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
94#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
95#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
96#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
97#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
98#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
99#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
100#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
101#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
102#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 92#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
103#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 93#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
104#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
105#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
106#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
107#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
108#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
109#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) 95
96#define AT91SAM9G45_BASE_ECC 0xffffe200
97#define AT91SAM9G45_BASE_DMA 0xffffec00
98#define AT91SAM9G45_BASE_SMC 0xffffe800
99#define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1
100#define AT91SAM9G45_BASE_PIOA 0xfffff200
101#define AT91SAM9G45_BASE_PIOB 0xfffff400
102#define AT91SAM9G45_BASE_PIOC 0xfffff600
103#define AT91SAM9G45_BASE_PIOD 0xfffff800
104#define AT91SAM9G45_BASE_PIOE 0xfffffa00
105#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
106#define AT91SAM9G45_BASE_RTT 0xfffffd20
107#define AT91SAM9G45_BASE_PIT 0xfffffd30
108#define AT91SAM9G45_BASE_WDT 0xfffffd40
109#define AT91SAM9G45_BASE_RTC 0xfffffdb0
110 110
111#define AT91_USART0 AT91SAM9G45_BASE_US0 111#define AT91_USART0 AT91SAM9G45_BASE_US0
112#define AT91_USART1 AT91SAM9G45_BASE_US1 112#define AT91_USART1 AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 1aabacd315d4..2bb359e60b97 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,27 +69,26 @@
69/* 69/*
70 * System Peripherals (offset from AT91_BASE_SYS) 70 * System Peripherals (offset from AT91_BASE_SYS)
71 */ 71 */
72#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
73#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
74#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) 72#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
75#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
76#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) 73#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
77#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS)
78#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
79#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
80#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS)
81#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS)
82#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS)
83#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS)
84#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) 74#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
85#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) 75#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
86#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
87#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
88#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
89#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
90#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) 76#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
91#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 77#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
92#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) 78
79#define AT91SAM9RL_BASE_DMA 0xffffe600
80#define AT91SAM9RL_BASE_ECC 0xffffe800
81#define AT91SAM9RL_BASE_SMC 0xffffec00
82#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0
83#define AT91SAM9RL_BASE_PIOA 0xfffff400
84#define AT91SAM9RL_BASE_PIOB 0xfffff600
85#define AT91SAM9RL_BASE_PIOC 0xfffff800
86#define AT91SAM9RL_BASE_PIOD 0xfffffa00
87#define AT91SAM9RL_BASE_SHDWC 0xfffffd10
88#define AT91SAM9RL_BASE_RTT 0xfffffd20
89#define AT91SAM9RL_BASE_PIT 0xfffffd30
90#define AT91SAM9RL_BASE_WDT 0xfffffd40
91#define AT91SAM9RL_BASE_RTC 0xfffffe00
93 92
94#define AT91_USART0 AT91SAM9RL_BASE_US0 93#define AT91_USART0 AT91SAM9RL_BASE_US0
95#define AT91_USART1 AT91SAM9RL_BASE_US1 94#define AT91_USART1 AT91SAM9RL_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a152ff87e688..a57829f4fd18 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -40,7 +40,6 @@
40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ 40#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */
41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ 41#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */
42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ 42#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */
43#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */
44 43
45/* 44/*
46 * The AT91x40 series doesn't have a debug unit like the other AT91 parts. 45 * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index eac92e995bb5..d0b377b21bd7 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -40,13 +40,14 @@
40#include <linux/atmel-mci.h> 40#include <linux/atmel-mci.h>
41#include <sound/atmel-ac97c.h> 41#include <sound/atmel-ac97c.h>
42#include <linux/serial.h> 42#include <linux/serial.h>
43#include <linux/platform_data/macb.h>
43 44
44 /* USB Device */ 45 /* USB Device */
45struct at91_udc_data { 46struct at91_udc_data {
46 u8 vbus_pin; /* high == host powering us */ 47 int vbus_pin; /* high == host powering us */
47 u8 vbus_active_low; /* vbus polarity */ 48 u8 vbus_active_low; /* vbus polarity */
48 u8 vbus_polled; /* Use polling, not interrupt */ 49 u8 vbus_polled; /* Use polling, not interrupt */
49 u8 pullup_pin; /* active == D+ pulled up */ 50 int pullup_pin; /* active == D+ pulled up */
50 u8 pullup_active_low; /* true == pullup_pin is active low */ 51 u8 pullup_active_low; /* true == pullup_pin is active low */
51}; 52};
52extern void __init at91_add_device_udc(struct at91_udc_data *data); 53extern void __init at91_add_device_udc(struct at91_udc_data *data);
@@ -56,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data);
56 57
57 /* Compact Flash */ 58 /* Compact Flash */
58struct at91_cf_data { 59struct at91_cf_data {
59 u8 irq_pin; /* I/O IRQ */ 60 int irq_pin; /* I/O IRQ */
60 u8 det_pin; /* Card detect */ 61 int det_pin; /* Card detect */
61 u8 vcc_pin; /* power switching */ 62 int vcc_pin; /* power switching */
62 u8 rst_pin; /* card reset */ 63 int rst_pin; /* card reset */
63 u8 chipselect; /* EBI Chip Select number */ 64 u8 chipselect; /* EBI Chip Select number */
64 u8 flags; 65 u8 flags;
65#define AT91_CF_TRUE_IDE 0x01 66#define AT91_CF_TRUE_IDE 0x01
@@ -70,37 +71,26 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data);
70 /* MMC / SD */ 71 /* MMC / SD */
71 /* at91_mci platform config */ 72 /* at91_mci platform config */
72struct at91_mmc_data { 73struct at91_mmc_data {
73 u8 det_pin; /* card detect IRQ */ 74 int det_pin; /* card detect IRQ */
74 unsigned slot_b:1; /* uses Slot B */ 75 unsigned slot_b:1; /* uses Slot B */
75 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ 76 unsigned wire4:1; /* (SD) supports DAT0..DAT3 */
76 u8 wp_pin; /* (SD) writeprotect detect */ 77 int wp_pin; /* (SD) writeprotect detect */
77 u8 vcc_pin; /* power switching (high == on) */ 78 int vcc_pin; /* power switching (high == on) */
78}; 79};
79extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); 80extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
80 81
81 /* atmel-mci platform config */ 82 /* atmel-mci platform config */
82extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data); 83extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data);
83 84
84 /* Ethernet (EMAC & MACB) */ 85extern void __init at91_add_device_eth(struct macb_platform_data *data);
85struct at91_eth_data {
86 u32 phy_mask;
87 u8 phy_irq_pin; /* PHY IRQ */
88 u8 is_rmii; /* using RMII interface? */
89};
90extern void __init at91_add_device_eth(struct at91_eth_data *data);
91
92#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \
93 || defined(CONFIG_ARCH_AT91SAM9G45)
94#define eth_platform_data at91_eth_data
95#endif
96 86
97 /* USB Host */ 87 /* USB Host */
98struct at91_usbh_data { 88struct at91_usbh_data {
99 u8 ports; /* number of ports on root hub */ 89 u8 ports; /* number of ports on root hub */
100 u8 vbus_pin[2]; /* port power-control pin */ 90 int vbus_pin[2]; /* port power-control pin */
101 u8 vbus_pin_inverted; 91 u8 vbus_pin_inverted;
102 u8 overcurrent_supported; 92 u8 overcurrent_supported;
103 u8 overcurrent_pin[2]; 93 int overcurrent_pin[2];
104 u8 overcurrent_status[2]; 94 u8 overcurrent_status[2];
105 u8 overcurrent_changed[2]; 95 u8 overcurrent_changed[2];
106}; 96};
@@ -110,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
110 100
111 /* NAND / SmartMedia */ 101 /* NAND / SmartMedia */
112struct atmel_nand_data { 102struct atmel_nand_data {
113 u8 enable_pin; /* chip enable */ 103 int enable_pin; /* chip enable */
114 u8 det_pin; /* card detect */ 104 int det_pin; /* card detect */
115 u8 rdy_pin; /* ready/busy */ 105 int rdy_pin; /* ready/busy */
116 u8 rdy_pin_active_low; /* rdy_pin value is inverted */ 106 u8 rdy_pin_active_low; /* rdy_pin value is inverted */
117 u8 ale; /* address line number connected to ALE */ 107 u8 ale; /* address line number connected to ALE */
118 u8 cle; /* address line number connected to CLE */ 108 u8 cle; /* address line number connected to CLE */
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0ed8648c6452..c6bb9e2d9baa 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,9 +14,15 @@
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
16 16
17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
18#define AT91_DBGU AT91_BASE_DBGU0
19#else
20#define AT91_DBGU AT91_BASE_DBGU1
21#endif
22
17 .macro addruart, rp, rv, tmp 23 .macro addruart, rp, rv, tmp
18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 24 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 25 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
20 .endm 26 .endm
21 27
22 .macro senduart,rd,rx 28 .macro senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
index 7ab68f972227..423eea0ed74c 100644
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ b/arch/arm/mach-at91/include/mach/entry-macro.S
@@ -17,16 +17,17 @@
17 .endm 17 .endm
18 18
19 .macro get_irqnr_preamble, base, tmp 19 .macro get_irqnr_preamble, base, tmp
20 ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral 20 ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
21 ldr \base, [\base]
21 .endm 22 .endm
22 23
23 .macro arch_ret_to_user, tmp1, tmp2 24 .macro arch_ret_to_user, tmp1, tmp2
24 .endm 25 .endm
25 26
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) 28 ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
28 ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number 29 ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
29 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt 30 teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
30 streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. 31 streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
31 .endm 32 .endm
32 33
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 2b9a1f51210f..e3fd225121c7 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -16,177 +16,175 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <asm/irq.h> 17#include <asm/irq.h>
18 18
19#define PIN_BASE NR_AIC_IRQS
20
21#define MAX_GPIO_BANKS 5 19#define MAX_GPIO_BANKS 5
22#define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) 20#define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32)
23 21
24/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ 22/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
25 23
26#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) 24#define AT91_PIN_PA0 (0x00 + 0)
27#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) 25#define AT91_PIN_PA1 (0x00 + 1)
28#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) 26#define AT91_PIN_PA2 (0x00 + 2)
29#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) 27#define AT91_PIN_PA3 (0x00 + 3)
30#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) 28#define AT91_PIN_PA4 (0x00 + 4)
31#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) 29#define AT91_PIN_PA5 (0x00 + 5)
32#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) 30#define AT91_PIN_PA6 (0x00 + 6)
33#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) 31#define AT91_PIN_PA7 (0x00 + 7)
34#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) 32#define AT91_PIN_PA8 (0x00 + 8)
35#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) 33#define AT91_PIN_PA9 (0x00 + 9)
36#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) 34#define AT91_PIN_PA10 (0x00 + 10)
37#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) 35#define AT91_PIN_PA11 (0x00 + 11)
38#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) 36#define AT91_PIN_PA12 (0x00 + 12)
39#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) 37#define AT91_PIN_PA13 (0x00 + 13)
40#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) 38#define AT91_PIN_PA14 (0x00 + 14)
41#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) 39#define AT91_PIN_PA15 (0x00 + 15)
42#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) 40#define AT91_PIN_PA16 (0x00 + 16)
43#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) 41#define AT91_PIN_PA17 (0x00 + 17)
44#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) 42#define AT91_PIN_PA18 (0x00 + 18)
45#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) 43#define AT91_PIN_PA19 (0x00 + 19)
46#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) 44#define AT91_PIN_PA20 (0x00 + 20)
47#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) 45#define AT91_PIN_PA21 (0x00 + 21)
48#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) 46#define AT91_PIN_PA22 (0x00 + 22)
49#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) 47#define AT91_PIN_PA23 (0x00 + 23)
50#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) 48#define AT91_PIN_PA24 (0x00 + 24)
51#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) 49#define AT91_PIN_PA25 (0x00 + 25)
52#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) 50#define AT91_PIN_PA26 (0x00 + 26)
53#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) 51#define AT91_PIN_PA27 (0x00 + 27)
54#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) 52#define AT91_PIN_PA28 (0x00 + 28)
55#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) 53#define AT91_PIN_PA29 (0x00 + 29)
56#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) 54#define AT91_PIN_PA30 (0x00 + 30)
57#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) 55#define AT91_PIN_PA31 (0x00 + 31)
58 56
59#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) 57#define AT91_PIN_PB0 (0x20 + 0)
60#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) 58#define AT91_PIN_PB1 (0x20 + 1)
61#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) 59#define AT91_PIN_PB2 (0x20 + 2)
62#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) 60#define AT91_PIN_PB3 (0x20 + 3)
63#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) 61#define AT91_PIN_PB4 (0x20 + 4)
64#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) 62#define AT91_PIN_PB5 (0x20 + 5)
65#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) 63#define AT91_PIN_PB6 (0x20 + 6)
66#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) 64#define AT91_PIN_PB7 (0x20 + 7)
67#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) 65#define AT91_PIN_PB8 (0x20 + 8)
68#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) 66#define AT91_PIN_PB9 (0x20 + 9)
69#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) 67#define AT91_PIN_PB10 (0x20 + 10)
70#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) 68#define AT91_PIN_PB11 (0x20 + 11)
71#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) 69#define AT91_PIN_PB12 (0x20 + 12)
72#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) 70#define AT91_PIN_PB13 (0x20 + 13)
73#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) 71#define AT91_PIN_PB14 (0x20 + 14)
74#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) 72#define AT91_PIN_PB15 (0x20 + 15)
75#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) 73#define AT91_PIN_PB16 (0x20 + 16)
76#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) 74#define AT91_PIN_PB17 (0x20 + 17)
77#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) 75#define AT91_PIN_PB18 (0x20 + 18)
78#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) 76#define AT91_PIN_PB19 (0x20 + 19)
79#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) 77#define AT91_PIN_PB20 (0x20 + 20)
80#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) 78#define AT91_PIN_PB21 (0x20 + 21)
81#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) 79#define AT91_PIN_PB22 (0x20 + 22)
82#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) 80#define AT91_PIN_PB23 (0x20 + 23)
83#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) 81#define AT91_PIN_PB24 (0x20 + 24)
84#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) 82#define AT91_PIN_PB25 (0x20 + 25)
85#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) 83#define AT91_PIN_PB26 (0x20 + 26)
86#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) 84#define AT91_PIN_PB27 (0x20 + 27)
87#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) 85#define AT91_PIN_PB28 (0x20 + 28)
88#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) 86#define AT91_PIN_PB29 (0x20 + 29)
89#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) 87#define AT91_PIN_PB30 (0x20 + 30)
90#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) 88#define AT91_PIN_PB31 (0x20 + 31)
91 89
92#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) 90#define AT91_PIN_PC0 (0x40 + 0)
93#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) 91#define AT91_PIN_PC1 (0x40 + 1)
94#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) 92#define AT91_PIN_PC2 (0x40 + 2)
95#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) 93#define AT91_PIN_PC3 (0x40 + 3)
96#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) 94#define AT91_PIN_PC4 (0x40 + 4)
97#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) 95#define AT91_PIN_PC5 (0x40 + 5)
98#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) 96#define AT91_PIN_PC6 (0x40 + 6)
99#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) 97#define AT91_PIN_PC7 (0x40 + 7)
100#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) 98#define AT91_PIN_PC8 (0x40 + 8)
101#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) 99#define AT91_PIN_PC9 (0x40 + 9)
102#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) 100#define AT91_PIN_PC10 (0x40 + 10)
103#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) 101#define AT91_PIN_PC11 (0x40 + 11)
104#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) 102#define AT91_PIN_PC12 (0x40 + 12)
105#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) 103#define AT91_PIN_PC13 (0x40 + 13)
106#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) 104#define AT91_PIN_PC14 (0x40 + 14)
107#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) 105#define AT91_PIN_PC15 (0x40 + 15)
108#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) 106#define AT91_PIN_PC16 (0x40 + 16)
109#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) 107#define AT91_PIN_PC17 (0x40 + 17)
110#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) 108#define AT91_PIN_PC18 (0x40 + 18)
111#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) 109#define AT91_PIN_PC19 (0x40 + 19)
112#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) 110#define AT91_PIN_PC20 (0x40 + 20)
113#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) 111#define AT91_PIN_PC21 (0x40 + 21)
114#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) 112#define AT91_PIN_PC22 (0x40 + 22)
115#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) 113#define AT91_PIN_PC23 (0x40 + 23)
116#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) 114#define AT91_PIN_PC24 (0x40 + 24)
117#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) 115#define AT91_PIN_PC25 (0x40 + 25)
118#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) 116#define AT91_PIN_PC26 (0x40 + 26)
119#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) 117#define AT91_PIN_PC27 (0x40 + 27)
120#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) 118#define AT91_PIN_PC28 (0x40 + 28)
121#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) 119#define AT91_PIN_PC29 (0x40 + 29)
122#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) 120#define AT91_PIN_PC30 (0x40 + 30)
123#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) 121#define AT91_PIN_PC31 (0x40 + 31)
124 122
125#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) 123#define AT91_PIN_PD0 (0x60 + 0)
126#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) 124#define AT91_PIN_PD1 (0x60 + 1)
127#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) 125#define AT91_PIN_PD2 (0x60 + 2)
128#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) 126#define AT91_PIN_PD3 (0x60 + 3)
129#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) 127#define AT91_PIN_PD4 (0x60 + 4)
130#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) 128#define AT91_PIN_PD5 (0x60 + 5)
131#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) 129#define AT91_PIN_PD6 (0x60 + 6)
132#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) 130#define AT91_PIN_PD7 (0x60 + 7)
133#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) 131#define AT91_PIN_PD8 (0x60 + 8)
134#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) 132#define AT91_PIN_PD9 (0x60 + 9)
135#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) 133#define AT91_PIN_PD10 (0x60 + 10)
136#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) 134#define AT91_PIN_PD11 (0x60 + 11)
137#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) 135#define AT91_PIN_PD12 (0x60 + 12)
138#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) 136#define AT91_PIN_PD13 (0x60 + 13)
139#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) 137#define AT91_PIN_PD14 (0x60 + 14)
140#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) 138#define AT91_PIN_PD15 (0x60 + 15)
141#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) 139#define AT91_PIN_PD16 (0x60 + 16)
142#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) 140#define AT91_PIN_PD17 (0x60 + 17)
143#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) 141#define AT91_PIN_PD18 (0x60 + 18)
144#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) 142#define AT91_PIN_PD19 (0x60 + 19)
145#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) 143#define AT91_PIN_PD20 (0x60 + 20)
146#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) 144#define AT91_PIN_PD21 (0x60 + 21)
147#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) 145#define AT91_PIN_PD22 (0x60 + 22)
148#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) 146#define AT91_PIN_PD23 (0x60 + 23)
149#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) 147#define AT91_PIN_PD24 (0x60 + 24)
150#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) 148#define AT91_PIN_PD25 (0x60 + 25)
151#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) 149#define AT91_PIN_PD26 (0x60 + 26)
152#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) 150#define AT91_PIN_PD27 (0x60 + 27)
153#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) 151#define AT91_PIN_PD28 (0x60 + 28)
154#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) 152#define AT91_PIN_PD29 (0x60 + 29)
155#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) 153#define AT91_PIN_PD30 (0x60 + 30)
156#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) 154#define AT91_PIN_PD31 (0x60 + 31)
157 155
158#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) 156#define AT91_PIN_PE0 (0x80 + 0)
159#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) 157#define AT91_PIN_PE1 (0x80 + 1)
160#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) 158#define AT91_PIN_PE2 (0x80 + 2)
161#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) 159#define AT91_PIN_PE3 (0x80 + 3)
162#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) 160#define AT91_PIN_PE4 (0x80 + 4)
163#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) 161#define AT91_PIN_PE5 (0x80 + 5)
164#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) 162#define AT91_PIN_PE6 (0x80 + 6)
165#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) 163#define AT91_PIN_PE7 (0x80 + 7)
166#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) 164#define AT91_PIN_PE8 (0x80 + 8)
167#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) 165#define AT91_PIN_PE9 (0x80 + 9)
168#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) 166#define AT91_PIN_PE10 (0x80 + 10)
169#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) 167#define AT91_PIN_PE11 (0x80 + 11)
170#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) 168#define AT91_PIN_PE12 (0x80 + 12)
171#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) 169#define AT91_PIN_PE13 (0x80 + 13)
172#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) 170#define AT91_PIN_PE14 (0x80 + 14)
173#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) 171#define AT91_PIN_PE15 (0x80 + 15)
174#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) 172#define AT91_PIN_PE16 (0x80 + 16)
175#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) 173#define AT91_PIN_PE17 (0x80 + 17)
176#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) 174#define AT91_PIN_PE18 (0x80 + 18)
177#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) 175#define AT91_PIN_PE19 (0x80 + 19)
178#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) 176#define AT91_PIN_PE20 (0x80 + 20)
179#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) 177#define AT91_PIN_PE21 (0x80 + 21)
180#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) 178#define AT91_PIN_PE22 (0x80 + 22)
181#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) 179#define AT91_PIN_PE23 (0x80 + 23)
182#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) 180#define AT91_PIN_PE24 (0x80 + 24)
183#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) 181#define AT91_PIN_PE25 (0x80 + 25)
184#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) 182#define AT91_PIN_PE26 (0x80 + 26)
185#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) 183#define AT91_PIN_PE27 (0x80 + 27)
186#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) 184#define AT91_PIN_PE28 (0x80 + 28)
187#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) 185#define AT91_PIN_PE29 (0x80 + 29)
188#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) 186#define AT91_PIN_PE30 (0x80 + 30)
189#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) 187#define AT91_PIN_PE31 (0x80 + 31)
190 188
191#ifndef __ASSEMBLY__ 189#ifndef __ASSEMBLY__
192/* setup setup routines, called from board init or driver probe() */ 190/* setup setup routines, called from board init or driver probe() */
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void);
215 213
216#include <asm/errno.h> 214#include <asm/errno.h>
217 215
218#define gpio_to_irq(gpio) (gpio) 216#define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS)
219#define irq_to_gpio(irq) (irq) 217#define irq_to_gpio(irq) (irq - NR_AIC_IRQS)
220 218
221#endif /* __ASSEMBLY__ */ 219#endif /* __ASSEMBLY__ */
222 220
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 483478d8be6b..2d0e4e998566 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,12 @@
16 16
17#include <asm/sizes.h> 17#include <asm/sizes.h>
18 18
19/* DBGU base */
20/* rm9200, 9260/9g20, 9261/9g10, 9rl */
21#define AT91_BASE_DBGU0 0xfffff200
22/* 9263, 9g45, cap9 */
23#define AT91_BASE_DBGU1 0xffffee00
24
19#if defined(CONFIG_ARCH_AT91RM9200) 25#if defined(CONFIG_ARCH_AT91RM9200)
20#include <mach/at91rm9200.h> 26#include <mach/at91rm9200.h>
21#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) 27#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
@@ -52,6 +58,12 @@
52#endif 58#endif
53 59
54/* 60/*
61 * On all at91 have the Advanced Interrupt Controller starts at address
62 * 0xfffff000
63 */
64#define AT91_AIC 0xfffff000
65
66/*
55 * Peripheral identifiers/interrupts. 67 * Peripheral identifiers/interrupts.
56 */ 68 */
57#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 69#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f3fc6e..ac8b7dfc85ef 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -31,7 +31,7 @@
31 * Acknowledge interrupt with AIC after interrupt has been handled. 31 * Acknowledge interrupt with AIC after interrupt has been handled.
32 * (by kernel/irq.c) 32 * (by kernel/irq.c)
33 */ 33 */
34#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) 34#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
35 35
36 36
37/* 37/*
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h
index 85820ad801cc..5e917a66edd7 100644
--- a/arch/arm/mach-at91/include/mach/timex.h
+++ b/arch/arm/mach-at91/include/mach/timex.h
@@ -23,70 +23,15 @@
23 23
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25 25
26#if defined(CONFIG_ARCH_AT91RM9200) 26#ifdef CONFIG_ARCH_AT91X40
27 27
28#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) 28#define AT91X40_MASTER_CLOCK 40000000
29 29#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
30#elif defined(CONFIG_ARCH_AT91SAM9260)
31
32#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260)
33#define AT91SAM9_MASTER_CLOCK 90000000
34#else
35#define AT91SAM9_MASTER_CLOCK 99300000
36#endif
37
38#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
39
40#elif defined(CONFIG_ARCH_AT91SAM9261)
41
42#define AT91SAM9_MASTER_CLOCK 99300000
43#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
44
45#elif defined(CONFIG_ARCH_AT91SAM9G10)
46
47#define AT91SAM9_MASTER_CLOCK 133000000
48#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
49
50#elif defined(CONFIG_ARCH_AT91SAM9263)
51
52#if defined(CONFIG_MACH_USB_A9263)
53#define AT91SAM9_MASTER_CLOCK 90000000
54#else
55#define AT91SAM9_MASTER_CLOCK 99959500
56#endif
57
58#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
59
60#elif defined(CONFIG_ARCH_AT91SAM9RL)
61
62#define AT91SAM9_MASTER_CLOCK 100000000
63#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
64
65#elif defined(CONFIG_ARCH_AT91SAM9G20)
66 30
67#if defined(CONFIG_MACH_USB_A9G20)
68#define AT91SAM9_MASTER_CLOCK 133000000
69#else 31#else
70#define AT91SAM9_MASTER_CLOCK 132096000
71#endif
72
73#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
74
75#elif defined(CONFIG_ARCH_AT91SAM9G45)
76 32
77#define AT91SAM9_MASTER_CLOCK 133333333 33#define CLOCK_TICK_RATE 12345678
78#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
79
80#elif defined(CONFIG_ARCH_AT91CAP9)
81
82#define AT91CAP9_MASTER_CLOCK 100000000
83#define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16)
84
85#elif defined(CONFIG_ARCH_AT91X40)
86
87#define AT91X40_MASTER_CLOCK 40000000
88#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK)
89 34
90#endif 35#endif
91 36
92#endif 37#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 18bdcdeb474f..0234fd9d20d6 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -24,8 +24,10 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/atmel_serial.h> 25#include <linux/atmel_serial.h>
26 26
27#if defined(CONFIG_AT91_EARLY_DBGU) 27#if defined(CONFIG_AT91_EARLY_DBGU0)
28#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) 28#define UART_OFFSET AT91_BASE_DBGU0
29#elif defined(CONFIG_AT91_EARLY_DBGU1)
30#define UART_OFFSET AT91_BASE_DBGU1
29#elif defined(CONFIG_AT91_EARLY_USART0) 31#elif defined(CONFIG_AT91_EARLY_USART0)
30#define UART_OFFSET AT91_USART0 32#define UART_OFFSET AT91_USART0
31#elif defined(CONFIG_AT91_EARLY_USART1) 33#elif defined(CONFIG_AT91_EARLY_USART1)
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 9665265ec757..be6b639ecd7b 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -33,17 +33,18 @@
33#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
34#include <asm/mach/map.h> 34#include <asm/mach/map.h>
35 35
36void __iomem *at91_aic_base;
36 37
37static void at91_aic_mask_irq(struct irq_data *d) 38static void at91_aic_mask_irq(struct irq_data *d)
38{ 39{
39 /* Disable interrupt on AIC */ 40 /* Disable interrupt on AIC */
40 at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); 41 at91_aic_write(AT91_AIC_IDCR, 1 << d->irq);
41} 42}
42 43
43static void at91_aic_unmask_irq(struct irq_data *d) 44static void at91_aic_unmask_irq(struct irq_data *d)
44{ 45{
45 /* Enable interrupt on AIC */ 46 /* Enable interrupt on AIC */
46 at91_sys_write(AT91_AIC_IECR, 1 << d->irq); 47 at91_aic_write(AT91_AIC_IECR, 1 << d->irq);
47} 48}
48 49
49unsigned int at91_extern_irq; 50unsigned int at91_extern_irq;
@@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
77 return -EINVAL; 78 return -EINVAL;
78 } 79 }
79 80
80 smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; 81 smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
81 at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); 82 at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype);
82 return 0; 83 return 0;
83} 84}
84 85
@@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
102 103
103void at91_irq_suspend(void) 104void at91_irq_suspend(void)
104{ 105{
105 backups = at91_sys_read(AT91_AIC_IMR); 106 backups = at91_aic_read(AT91_AIC_IMR);
106 at91_sys_write(AT91_AIC_IDCR, backups); 107 at91_aic_write(AT91_AIC_IDCR, backups);
107 at91_sys_write(AT91_AIC_IECR, wakeups); 108 at91_aic_write(AT91_AIC_IECR, wakeups);
108} 109}
109 110
110void at91_irq_resume(void) 111void at91_irq_resume(void)
111{ 112{
112 at91_sys_write(AT91_AIC_IDCR, wakeups); 113 at91_aic_write(AT91_AIC_IDCR, wakeups);
113 at91_sys_write(AT91_AIC_IECR, backups); 114 at91_aic_write(AT91_AIC_IECR, backups);
114} 115}
115 116
116#else 117#else
@@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
133{ 134{
134 unsigned int i; 135 unsigned int i;
135 136
137 at91_aic_base = ioremap(AT91_AIC, 512);
138
139 if (!at91_aic_base)
140 panic("Impossible to ioremap AT91_AIC\n");
141
136 /* 142 /*
137 * The IVR is used by macro get_irqnr_and_base to read and verify. 143 * The IVR is used by macro get_irqnr_and_base to read and verify.
138 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. 144 * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
139 */ 145 */
140 for (i = 0; i < NR_AIC_IRQS; i++) { 146 for (i = 0; i < NR_AIC_IRQS; i++) {
141 /* Put irq number in Source Vector Register: */ 147 /* Put irq number in Source Vector Register: */
142 at91_sys_write(AT91_AIC_SVR(i), i); 148 at91_aic_write(AT91_AIC_SVR(i), i);
143 /* Active Low interrupt, with the specified priority */ 149 /* Active Low interrupt, with the specified priority */
144 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 150 at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
145 151
146 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); 152 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
147 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 153 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
148 154
149 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ 155 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
150 if (i < 8) 156 if (i < 8)
151 at91_sys_write(AT91_AIC_EOICR, 0); 157 at91_aic_write(AT91_AIC_EOICR, 0);
152 } 158 }
153 159
154 /* 160 /*
155 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS 161 * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
156 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU 162 * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
157 */ 163 */
158 at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS); 164 at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS);
159 165
160 /* No debugging in AIC: Debug (Protect) Control Register */ 166 /* No debugging in AIC: Debug (Protect) Control Register */
161 at91_sys_write(AT91_AIC_DCR, 0); 167 at91_aic_write(AT91_AIC_DCR, 0);
162 168
163 /* Disable and clear all interrupts initially */ 169 /* Disable and clear all interrupts initially */
164 at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF); 170 at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
165 at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF); 171 at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
166} 172}
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 7046158109d7..62ad95556c36 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,7 @@
34/* 34/*
35 * Show the reason for the previous system reset. 35 * Show the reason for the previous system reset.
36 */ 36 */
37#if defined(AT91_SHDWC) 37#if defined(AT91_RSTC)
38 38
39#include <mach/at91_rstc.h> 39#include <mach/at91_rstc.h>
40#include <mach/at91_shdwc.h> 40#include <mach/at91_shdwc.h>
@@ -58,8 +58,11 @@ static void __init show_reset_status(void)
58 char *reason, *r2 = reset; 58 char *reason, *r2 = reset;
59 u32 reset_type, wake_type; 59 u32 reset_type, wake_type;
60 60
61 if (!at91_shdwc_base)
62 return;
63
61 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; 64 reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
62 wake_type = at91_sys_read(AT91_SHDW_SR); 65 wake_type = at91_shdwc_read(AT91_SHDW_SR);
63 66
64 switch (reset_type) { 67 switch (reset_type) {
65 case AT91_RSTC_RSTTYP_GENERAL: 68 case AT91_RSTC_RSTTYP_GENERAL:
@@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state)
215 | (1 << AT91_ID_FIQ) 218 | (1 << AT91_ID_FIQ)
216 | (1 << AT91_ID_SYS) 219 | (1 << AT91_ID_SYS)
217 | (at91_extern_irq)) 220 | (at91_extern_irq))
218 & at91_sys_read(AT91_AIC_IMR), 221 & at91_aic_read(AT91_AIC_IMR),
219 state); 222 state);
220 223
221 switch (state) { 224 switch (state) {
@@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state)
283 } 286 }
284 287
285 pr_debug("AT91: PM - wakeup %08x\n", 288 pr_debug("AT91: PM - wakeup %08x\n",
286 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); 289 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
287 290
288error: 291error:
289 target_state = PM_SUSPEND_ON; 292 target_state = PM_SUSPEND_ON;
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index 5eab6aa621d0..8294783b679d 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -10,38 +10,58 @@
10 10
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/of.h>
14#include <linux/of_address.h>
13 15
14#include <mach/at91sam9_smc.h> 16#include <mach/at91sam9_smc.h>
15 17
16#include "sam9_smc.h" 18#include "sam9_smc.h"
17 19
18void __init sam9_smc_configure(int cs, struct sam9_smc_config* config) 20
21#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10))
22
23static void __iomem *smc_base_addr[2];
24
25static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
19{ 26{
27
20 /* Setup register */ 28 /* Setup register */
21 at91_sys_write(AT91_SMC_SETUP(cs), 29 __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
22 AT91_SMC_NWESETUP_(config->nwe_setup) 30 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
23 | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) 31 | AT91_SMC_NRDSETUP_(config->nrd_setup)
24 | AT91_SMC_NRDSETUP_(config->nrd_setup) 32 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
25 | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup) 33 base + AT91_SMC_SETUP);
26 );
27 34
28 /* Pulse register */ 35 /* Pulse register */
29 at91_sys_write(AT91_SMC_PULSE(cs), 36 __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
30 AT91_SMC_NWEPULSE_(config->nwe_pulse) 37 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
31 | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) 38 | AT91_SMC_NRDPULSE_(config->nrd_pulse)
32 | AT91_SMC_NRDPULSE_(config->nrd_pulse) 39 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
33 | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse) 40 base + AT91_SMC_PULSE);
34 );
35 41
36 /* Cycle register */ 42 /* Cycle register */
37 at91_sys_write(AT91_SMC_CYCLE(cs), 43 __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
38 AT91_SMC_NWECYCLE_(config->write_cycle) 44 | AT91_SMC_NRDCYCLE_(config->read_cycle),
39 | AT91_SMC_NRDCYCLE_(config->read_cycle) 45 base + AT91_SMC_CYCLE);
40 );
41 46
42 /* Mode register */ 47 /* Mode register */
43 at91_sys_write(AT91_SMC_MODE(cs), 48 __raw_writel(config->mode
44 config->mode 49 | AT91_SMC_TDF_(config->tdf_cycles),
45 | AT91_SMC_TDF_(config->tdf_cycles) 50 base + AT91_SMC_MODE);
46 ); 51}
52
53void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
54{
55 sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
56}
57
58void __init at91sam9_ioremap_smc(int id, u32 addr)
59{
60 if (id > 1) {
61 pr_warn("%s: id > 2\n", __func__);
62 return;
63 }
64 smc_base_addr[id] = ioremap(addr, 512);
65 if (!smc_base_addr[id])
66 pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
47} 67}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
index bf72cfb3455b..039c5ce17aec 100644
--- a/arch/arm/mach-at91/sam9_smc.h
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -30,4 +30,5 @@ struct sam9_smc_config {
30 u8 tdf_cycles:4; 30 u8 tdf_cycles:4;
31}; 31};
32 32
33extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); 33extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
34extern void __init at91sam9_ioremap_smc(int id, u32 addr);
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index cf98a8f94dc5..8bdcc3cb6012 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -8,6 +8,7 @@
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/mm.h> 10#include <linux/mm.h>
11#include <linux/pm.h>
11 12
12#include <asm/mach/map.h> 13#include <asm/mach/map.h>
13 14
@@ -15,6 +16,7 @@
15#include <mach/cpu.h> 16#include <mach/cpu.h>
16#include <mach/at91_dbgu.h> 17#include <mach/at91_dbgu.h>
17#include <mach/at91_pmc.h> 18#include <mach/at91_pmc.h>
19#include <mach/at91_shdwc.h>
18 20
19#include "soc.h" 21#include "soc.h"
20#include "generic.h" 22#include "generic.h"
@@ -73,9 +75,6 @@ static struct map_desc at91_io_desc __initdata = {
73 .type = MT_DEVICE, 75 .type = MT_DEVICE,
74}; 76};
75 77
76#define AT91_DBGU0 0xfffff200
77#define AT91_DBGU1 0xffffee00
78
79static void __init soc_detect(u32 dbgu_base) 78static void __init soc_detect(u32 dbgu_base)
80{ 79{
81 u32 cidr, socid; 80 u32 cidr, socid;
@@ -248,9 +247,9 @@ void __init at91_map_io(void)
248 at91_soc_initdata.type = AT91_SOC_NONE; 247 at91_soc_initdata.type = AT91_SOC_NONE;
249 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; 248 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
250 249
251 soc_detect(AT91_DBGU0); 250 soc_detect(AT91_BASE_DBGU0);
252 if (!at91_soc_is_detected()) 251 if (!at91_soc_is_detected())
253 soc_detect(AT91_DBGU1); 252 soc_detect(AT91_BASE_DBGU1);
254 253
255 if (!at91_soc_is_detected()) 254 if (!at91_soc_is_detected())
256 panic("AT91: Impossible to detect the SOC type"); 255 panic("AT91: Impossible to detect the SOC type");
@@ -267,8 +266,25 @@ void __init at91_map_io(void)
267 at91_boot_soc.map_io(); 266 at91_boot_soc.map_io();
268} 267}
269 268
269void __iomem *at91_shdwc_base = NULL;
270
271static void at91sam9_poweroff(void)
272{
273 at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
274}
275
276void __init at91_ioremap_shdwc(u32 base_addr)
277{
278 at91_shdwc_base = ioremap(base_addr, 16);
279 if (!at91_shdwc_base)
280 panic("Impossible to ioremap at91_shdwc_base\n");
281 pm_power_off = at91sam9_poweroff;
282}
283
270void __init at91_initialize(unsigned long main_clock) 284void __init at91_initialize(unsigned long main_clock)
271{ 285{
286 at91_boot_soc.ioremap_registers();
287
272 /* Init clock subsystem */ 288 /* Init clock subsystem */
273 at91_clock_init(main_clock); 289 at91_clock_init(main_clock);
274 290
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 21ed8816e6f7..4588ae6f7acd 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -7,6 +7,7 @@
7struct at91_init_soc { 7struct at91_init_soc {
8 unsigned int *default_irq_priority; 8 unsigned int *default_irq_priority;
9 void (*map_io)(void); 9 void (*map_io)(void);
10 void (*ioremap_registers)(void);
10 void (*register_clocks)(void); 11 void (*register_clocks)(void);
11 void (*init)(void); 12 void (*init)(void);
12}; 13};
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 00861139101d..008772e3b843 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -31,19 +31,12 @@ static LIST_HEAD(clocks);
31static DEFINE_MUTEX(clocks_mutex); 31static DEFINE_MUTEX(clocks_mutex);
32static DEFINE_SPINLOCK(clockfw_lock); 32static DEFINE_SPINLOCK(clockfw_lock);
33 33
34static unsigned psc_domain(struct clk *clk)
35{
36 return (clk->flags & PSC_DSP)
37 ? DAVINCI_GPSC_DSPDOMAIN
38 : DAVINCI_GPSC_ARMDOMAIN;
39}
40
41static void __clk_enable(struct clk *clk) 34static void __clk_enable(struct clk *clk)
42{ 35{
43 if (clk->parent) 36 if (clk->parent)
44 __clk_enable(clk->parent); 37 __clk_enable(clk->parent);
45 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) 38 if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
46 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 39 davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
47 true, clk->flags); 40 true, clk->flags);
48} 41}
49 42
@@ -53,7 +46,7 @@ static void __clk_disable(struct clk *clk)
53 return; 46 return;
54 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && 47 if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) &&
55 (clk->flags & CLK_PSC)) 48 (clk->flags & CLK_PSC))
56 davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 49 davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
57 false, clk->flags); 50 false, clk->flags);
58 if (clk->parent) 51 if (clk->parent)
59 __clk_disable(clk->parent); 52 __clk_disable(clk->parent);
@@ -237,7 +230,7 @@ static int __init clk_disable_unused(void)
237 230
238 pr_debug("Clocks: disable unused %s\n", ck->name); 231 pr_debug("Clocks: disable unused %s\n", ck->name);
239 232
240 davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 233 davinci_psc_config(ck->domain, ck->gpsc, ck->lpsc,
241 false, ck->flags); 234 false, ck->flags);
242 } 235 }
243 spin_unlock_irq(&clockfw_lock); 236 spin_unlock_irq(&clockfw_lock);
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index a705f367a84d..46f0f1bf1a4c 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -93,6 +93,7 @@ struct clk {
93 u8 usecount; 93 u8 usecount;
94 u8 lpsc; 94 u8 lpsc;
95 u8 gpsc; 95 u8 gpsc;
96 u8 domain;
96 u32 flags; 97 u32 flags;
97 struct clk *parent; 98 struct clk *parent;
98 struct list_head children; /* list of children */ 99 struct list_head children; /* list of children */
@@ -107,11 +108,10 @@ struct clk {
107/* Clock flags: SoC-specific flags start at BIT(16) */ 108/* Clock flags: SoC-specific flags start at BIT(16) */
108#define ALWAYS_ENABLED BIT(1) 109#define ALWAYS_ENABLED BIT(1)
109#define CLK_PSC BIT(2) 110#define CLK_PSC BIT(2)
110#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ 111#define CLK_PLL BIT(3) /* PLL-derived clock */
111#define CLK_PLL BIT(4) /* PLL-derived clock */ 112#define PRE_PLL BIT(4) /* source is before PLL mult/div */
112#define PRE_PLL BIT(5) /* source is before PLL mult/div */ 113#define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */
113#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ 114#define PSC_FORCE BIT(6) /* Force module state transtition */
114#define PSC_FORCE BIT(7) /* Force module state transtition */
115 115
116#define CLK(dev, con, ck) \ 116#define CLK(dev, con, ck) \
117 { \ 117 { \
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 0800f9cf33bb..43a48ee1917b 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -130,7 +130,7 @@ static struct clk dsp_clk = {
130 .name = "dsp", 130 .name = "dsp",
131 .parent = &pll1_sysclk1, 131 .parent = &pll1_sysclk1,
132 .lpsc = DAVINCI_LPSC_GEM, 132 .lpsc = DAVINCI_LPSC_GEM,
133 .flags = PSC_DSP, 133 .domain = DAVINCI_GPSC_DSPDOMAIN,
134 .usecount = 1, /* REVISIT how to disable? */ 134 .usecount = 1, /* REVISIT how to disable? */
135}; 135};
136 136
@@ -145,7 +145,7 @@ static struct clk vicp_clk = {
145 .name = "vicp", 145 .name = "vicp",
146 .parent = &pll1_sysclk2, 146 .parent = &pll1_sysclk2,
147 .lpsc = DAVINCI_LPSC_IMCOP, 147 .lpsc = DAVINCI_LPSC_IMCOP,
148 .flags = PSC_DSP, 148 .domain = DAVINCI_GPSC_DSPDOMAIN,
149 .usecount = 1, /* REVISIT how to disable? */ 149 .usecount = 1, /* REVISIT how to disable? */
150}; 150};
151 151
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 2a00fe5ac253..a8ee6c9f0bb0 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -16,6 +16,7 @@
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/videodev2.h> 17#include <linux/videodev2.h>
18#include <linux/davinci_emac.h> 18#include <linux/davinci_emac.h>
19#include <media/davinci/vpif_types.h>
19 20
20#define DM646X_EMAC_BASE (0x01C80000) 21#define DM646X_EMAC_BASE (0x01C80000)
21#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) 22#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
@@ -34,58 +35,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv);
34 35
35void dm646x_video_init(void); 36void dm646x_video_init(void);
36 37
37enum vpif_if_type {
38 VPIF_IF_BT656,
39 VPIF_IF_BT1120,
40 VPIF_IF_RAW_BAYER
41};
42
43struct vpif_interface {
44 enum vpif_if_type if_type;
45 unsigned hd_pol:1;
46 unsigned vd_pol:1;
47 unsigned fid_pol:1;
48};
49
50struct vpif_subdev_info {
51 const char *name;
52 struct i2c_board_info board_info;
53 u32 input;
54 u32 output;
55 unsigned can_route:1;
56 struct vpif_interface vpif_if;
57};
58
59struct vpif_display_config {
60 int (*set_clock)(int, int);
61 struct vpif_subdev_info *subdevinfo;
62 int subdev_count;
63 const char **output;
64 int output_count;
65 const char *card_name;
66};
67
68struct vpif_input {
69 struct v4l2_input input;
70 const char *subdev_name;
71};
72
73#define VPIF_CAPTURE_MAX_CHANNELS 2
74
75struct vpif_capture_chan_config {
76 const struct vpif_input *inputs;
77 int input_count;
78};
79
80struct vpif_capture_config {
81 int (*setup_input_channel_mode)(int);
82 int (*setup_input_path)(int, const char *);
83 struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
84 struct vpif_subdev_info *subdev_info;
85 int subdev_count;
86 const char *card_name;
87};
88
89void dm646x_setup_vpif(struct vpif_display_config *, 38void dm646x_setup_vpif(struct vpif_display_config *,
90 struct vpif_capture_config *); 39 struct vpif_capture_config *);
91 40
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 00be4fc26dd7..98b8c83b09ab 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/setup.h> 16#include <asm/setup.h>
17#include <plat/addr-map.h>
17#include "common.h" 18#include "common.h"
18 19
19/* 20/*
@@ -34,98 +35,72 @@
34#define ATTR_PCIE_MEM 0xe8 35#define ATTR_PCIE_MEM 0xe8
35#define ATTR_SCRATCHPAD 0x0 36#define ATTR_SCRATCHPAD 0x0
36 37
37/*
38 * CPU Address Decode Windows registers
39 */
40#define WIN_CTRL(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x0)
41#define WIN_BASE(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x4)
42#define WIN_REMAP_LO(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x8)
43#define WIN_REMAP_HI(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0xc)
44
45struct mbus_dram_target_info dove_mbus_dram_info;
46
47static inline void __iomem *ddr_map_sc(int i) 38static inline void __iomem *ddr_map_sc(int i)
48{ 39{
49 return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4)); 40 return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
50} 41}
51 42
52static int cpu_win_can_remap(int win) 43/*
53{ 44 * Description of the windows needed by the platform code
54 if (win < 4) 45 */
55 return 1; 46static struct __initdata orion_addr_map_cfg addr_map_cfg = {
56 47 .num_wins = 8,
57 return 0; 48 .remappable_wins = 4,
58} 49 .bridge_virt_base = BRIDGE_VIRT_BASE,
59 50};
60static void __init setup_cpu_win(int win, u32 base, u32 size,
61 u8 target, u8 attr, int remap)
62{
63 u32 ctrl;
64
65 base &= 0xffff0000;
66 ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
67
68 writel(base, WIN_BASE(win));
69 writel(ctrl, WIN_CTRL(win));
70 if (cpu_win_can_remap(win)) {
71 if (remap < 0)
72 remap = base;
73 writel(remap & 0xffff0000, WIN_REMAP_LO(win));
74 writel(0, WIN_REMAP_HI(win));
75 }
76}
77
78void __init dove_setup_cpu_mbus(void)
79{
80 int i;
81 int cs;
82 51
52static const struct __initdata orion_addr_map_info addr_map_info[] = {
83 /* 53 /*
84 * First, disable and clear windows. 54 * Windows for PCIe IO+MEM space.
85 */ 55 */
86 for (i = 0; i < 8; i++) { 56 { 0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
87 writel(0, WIN_BASE(i)); 57 TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE
88 writel(0, WIN_CTRL(i)); 58 },
89 if (cpu_win_can_remap(i)) { 59 { 1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
90 writel(0, WIN_REMAP_LO(i)); 60 TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE
91 writel(0, WIN_REMAP_HI(i)); 61 },
92 } 62 { 2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
93 } 63 TARGET_PCIE0, ATTR_PCIE_MEM, -1
94 64 },
65 { 3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
66 TARGET_PCIE1, ATTR_PCIE_MEM, -1
67 },
95 /* 68 /*
96 * Setup windows for PCIe IO+MEM space. 69 * Window for CESA engine.
97 */ 70 */
98 setup_cpu_win(0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE, 71 { 4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
99 TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE); 72 TARGET_CESA, ATTR_CESA, -1
100 setup_cpu_win(1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE, 73 },
101 TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE);
102 setup_cpu_win(2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
103 TARGET_PCIE0, ATTR_PCIE_MEM, -1);
104 setup_cpu_win(3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
105 TARGET_PCIE1, ATTR_PCIE_MEM, -1);
106
107 /* 74 /*
108 * Setup window for CESA engine. 75 * Window to the BootROM for Standby and Sleep Resume
109 */ 76 */
110 setup_cpu_win(4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE, 77 { 5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
111 TARGET_CESA, ATTR_CESA, -1); 78 TARGET_BOOTROM, ATTR_BOOTROM, -1
112 79 },
113 /* 80 /*
114 * Setup the Window to the BootROM for Standby and Sleep Resume 81 * Window to the PMU Scratch Pad space
115 */ 82 */
116 setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE, 83 { 6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
117 TARGET_BOOTROM, ATTR_BOOTROM, -1); 84 TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1
85 },
86 /* End marker */
87 { -1, 0, 0, 0, 0, 0 }
88};
89
90void __init dove_setup_cpu_mbus(void)
91{
92 int i;
93 int cs;
118 94
119 /* 95 /*
120 * Setup the Window to the PMU Scratch Pad space 96 * Disable, clear and configure windows.
121 */ 97 */
122 setup_cpu_win(6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE, 98 orion_config_wins(&addr_map_cfg, addr_map_info);
123 TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1);
124 99
125 /* 100 /*
126 * Setup MBUS dram target info. 101 * Setup MBUS dram target info.
127 */ 102 */
128 dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; 103 orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
129 104
130 for (i = 0, cs = 0; i < 2; i++) { 105 for (i = 0, cs = 0; i < 2; i++) {
131 u32 map = readl(ddr_map_sc(i)); 106 u32 map = readl(ddr_map_sc(i));
@@ -136,7 +111,7 @@ void __init dove_setup_cpu_mbus(void)
136 if (map & 1) { 111 if (map & 1) {
137 struct mbus_dram_window *w; 112 struct mbus_dram_window *w;
138 113
139 w = &dove_mbus_dram_info.cs[cs++]; 114 w = &orion_mbus_dram_info.cs[cs++];
140 w->cs_index = i; 115 w->cs_index = i;
141 w->mbus_attr = 0; /* CS address decoding done inside */ 116 w->mbus_attr = 0; /* CS address decoding done inside */
142 /* the DDR controller, no need to */ 117 /* the DDR controller, no need to */
@@ -145,5 +120,5 @@ void __init dove_setup_cpu_mbus(void)
145 w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4); 120 w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4);
146 } 121 }
147 } 122 }
148 dove_mbus_dram_info.num_cs = cs; 123 orion_mbus_dram_info.num_cs = cs;
149} 124}
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 13bb236cd0cd..dd1429ae6405 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -14,7 +14,6 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/mbus.h>
18#include <linux/ata_platform.h> 17#include <linux/ata_platform.h>
19#include <linux/gpio.h> 18#include <linux/gpio.h>
20#include <asm/page.h> 19#include <asm/page.h>
@@ -30,6 +29,7 @@
30#include <linux/irq.h> 29#include <linux/irq.h>
31#include <plat/time.h> 30#include <plat/time.h>
32#include <plat/common.h> 31#include <plat/common.h>
32#include <plat/addr-map.h>
33#include "common.h" 33#include "common.h"
34 34
35static int get_tclk(void); 35static int get_tclk(void);
@@ -71,8 +71,7 @@ void __init dove_map_io(void)
71 ****************************************************************************/ 71 ****************************************************************************/
72void __init dove_ehci0_init(void) 72void __init dove_ehci0_init(void)
73{ 73{
74 orion_ehci_init(&dove_mbus_dram_info, 74 orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
75 DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
76} 75}
77 76
78/***************************************************************************** 77/*****************************************************************************
@@ -80,8 +79,7 @@ void __init dove_ehci0_init(void)
80 ****************************************************************************/ 79 ****************************************************************************/
81void __init dove_ehci1_init(void) 80void __init dove_ehci1_init(void)
82{ 81{
83 orion_ehci_1_init(&dove_mbus_dram_info, 82 orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
84 DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
85} 83}
86 84
87/***************************************************************************** 85/*****************************************************************************
@@ -89,7 +87,7 @@ void __init dove_ehci1_init(void)
89 ****************************************************************************/ 87 ****************************************************************************/
90void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) 88void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
91{ 89{
92 orion_ge00_init(eth_data, &dove_mbus_dram_info, 90 orion_ge00_init(eth_data,
93 DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 91 DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
94 0, get_tclk()); 92 0, get_tclk());
95} 93}
@@ -107,8 +105,7 @@ void __init dove_rtc_init(void)
107 ****************************************************************************/ 105 ****************************************************************************/
108void __init dove_sata_init(struct mv_sata_platform_data *sata_data) 106void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
109{ 107{
110 orion_sata_init(sata_data, &dove_mbus_dram_info, 108 orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
111 DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
112 109
113} 110}
114 111
@@ -198,8 +195,7 @@ struct sys_timer dove_timer = {
198 ****************************************************************************/ 195 ****************************************************************************/
199void __init dove_xor0_init(void) 196void __init dove_xor0_init(void)
200{ 197{
201 orion_xor0_init(&dove_mbus_dram_info, 198 orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
202 DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
203 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01); 199 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
204} 200}
205 201
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 42027305c107..6432a3ba864b 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -15,7 +15,6 @@ struct mv643xx_eth_platform_data;
15struct mv_sata_platform_data; 15struct mv_sata_platform_data;
16 16
17extern struct sys_timer dove_timer; 17extern struct sys_timer dove_timer;
18extern struct mbus_dram_target_info dove_mbus_dram_info;
19 18
20/* 19/*
21 * Basic Dove init functions used early by machine-setup. 20 * Basic Dove init functions used early by machine-setup.
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index aa2b3a09a51d..6c11a4df7178 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -10,7 +10,6 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/mbus.h>
14#include <video/vga.h> 13#include <video/vga.h>
15#include <asm/mach/pci.h> 14#include <asm/mach/pci.h>
16#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
@@ -19,6 +18,7 @@
19#include <plat/pcie.h> 18#include <plat/pcie.h>
20#include <mach/irqs.h> 19#include <mach/irqs.h>
21#include <mach/bridge-regs.h> 20#include <mach/bridge-regs.h>
21#include <plat/addr-map.h>
22#include "common.h" 22#include "common.h"
23 23
24struct pcie_port { 24struct pcie_port {
@@ -50,7 +50,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
50 */ 50 */
51 orion_pcie_set_local_bus_nr(pp->base, sys->busnr); 51 orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
52 52
53 orion_pcie_setup(pp->base, &dove_mbus_dram_info); 53 orion_pcie_setup(pp->base);
54 54
55 /* 55 /*
56 * IORESOURCE_IO 56 * IORESOURCE_IO
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index e1efbca2a539..5d602f68a0e8 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -59,6 +59,11 @@ config EXYNOS4_MCT
59 help 59 help
60 Use MCT (Multi Core Timer) as kernel timers 60 Use MCT (Multi Core Timer) as kernel timers
61 61
62config EXYNOS4_DEV_DMA
63 bool
64 help
65 Compile in amba device definitions for DMA controller
66
62config EXYNOS4_DEV_AHCI 67config EXYNOS4_DEV_AHCI
63 bool 68 bool
64 help 69 help
@@ -84,6 +89,11 @@ config EXYNOS4_DEV_DWMCI
84 help 89 help
85 Compile in platform device definitions for DWMCI 90 Compile in platform device definitions for DWMCI
86 91
92config EXYNOS4_DEV_USB_OHCI
93 bool
94 help
95 Compile in platform device definition for USB OHCI
96
87config EXYNOS4_SETUP_I2C1 97config EXYNOS4_SETUP_I2C1
88 bool 98 bool
89 help 99 help
@@ -145,6 +155,11 @@ config EXYNOS4_SETUP_USB_PHY
145 help 155 help
146 Common setup code for USB PHY controller 156 Common setup code for USB PHY controller
147 157
158config EXYNOS4_SETUP_SPI
159 bool
160 help
161 Common setup code for SPI GPIO configurations.
162
148# machine support 163# machine support
149 164
150if ARCH_EXYNOS4 165if ARCH_EXYNOS4
@@ -179,8 +194,10 @@ config MACH_SMDKV310
179 select SAMSUNG_DEV_BACKLIGHT 194 select SAMSUNG_DEV_BACKLIGHT
180 select EXYNOS4_DEV_AHCI 195 select EXYNOS4_DEV_AHCI
181 select SAMSUNG_DEV_KEYPAD 196 select SAMSUNG_DEV_KEYPAD
197 select EXYNOS4_DEV_DMA
182 select EXYNOS4_DEV_PD 198 select EXYNOS4_DEV_PD
183 select SAMSUNG_DEV_PWM 199 select SAMSUNG_DEV_PWM
200 select EXYNOS4_DEV_USB_OHCI
184 select EXYNOS4_DEV_SYSMMU 201 select EXYNOS4_DEV_SYSMMU
185 select EXYNOS4_SETUP_FIMD0 202 select EXYNOS4_SETUP_FIMD0
186 select EXYNOS4_SETUP_I2C1 203 select EXYNOS4_SETUP_I2C1
@@ -199,6 +216,7 @@ config MACH_ARMLEX4210
199 select S3C_DEV_HSMMC2 216 select S3C_DEV_HSMMC2
200 select S3C_DEV_HSMMC3 217 select S3C_DEV_HSMMC3
201 select EXYNOS4_DEV_AHCI 218 select EXYNOS4_DEV_AHCI
219 select EXYNOS4_DEV_DMA
202 select EXYNOS4_DEV_SYSMMU 220 select EXYNOS4_DEV_SYSMMU
203 select EXYNOS4_SETUP_SDHCI 221 select EXYNOS4_SETUP_SDHCI
204 help 222 help
@@ -224,6 +242,7 @@ config MACH_UNIVERSAL_C210
224 select S5P_DEV_MFC 242 select S5P_DEV_MFC
225 select S5P_DEV_ONENAND 243 select S5P_DEV_ONENAND
226 select S5P_DEV_TV 244 select S5P_DEV_TV
245 select EXYNOS4_DEV_DMA
227 select EXYNOS4_DEV_PD 246 select EXYNOS4_DEV_PD
228 select EXYNOS4_SETUP_FIMD0 247 select EXYNOS4_SETUP_FIMD0
229 select EXYNOS4_SETUP_I2C1 248 select EXYNOS4_SETUP_I2C1
@@ -257,6 +276,7 @@ config MACH_NURI
257 select S5P_DEV_MFC 276 select S5P_DEV_MFC
258 select S5P_DEV_USB_EHCI 277 select S5P_DEV_USB_EHCI
259 select S5P_SETUP_MIPIPHY 278 select S5P_SETUP_MIPIPHY
279 select EXYNOS4_DEV_DMA
260 select EXYNOS4_DEV_PD 280 select EXYNOS4_DEV_PD
261 select EXYNOS4_SETUP_FIMC 281 select EXYNOS4_SETUP_FIMC
262 select EXYNOS4_SETUP_FIMD0 282 select EXYNOS4_SETUP_FIMD0
@@ -289,7 +309,9 @@ config MACH_ORIGEN
289 select S5P_DEV_USB_EHCI 309 select S5P_DEV_USB_EHCI
290 select SAMSUNG_DEV_BACKLIGHT 310 select SAMSUNG_DEV_BACKLIGHT
291 select SAMSUNG_DEV_PWM 311 select SAMSUNG_DEV_PWM
312 select EXYNOS4_DEV_DMA
292 select EXYNOS4_DEV_PD 313 select EXYNOS4_DEV_PD
314 select EXYNOS4_DEV_USB_OHCI
293 select EXYNOS4_SETUP_FIMD0 315 select EXYNOS4_SETUP_FIMD0
294 select EXYNOS4_SETUP_SDHCI 316 select EXYNOS4_SETUP_SDHCI
295 select EXYNOS4_SETUP_USB_PHY 317 select EXYNOS4_SETUP_USB_PHY
@@ -329,6 +351,20 @@ config MACH_SMDK4412
329 Machine support for Samsung SMDK4412 351 Machine support for Samsung SMDK4412
330endif 352endif
331 353
354comment "Flattened Device Tree based board for Exynos4 based SoC"
355
356config MACH_EXYNOS4_DT
357 bool "Samsung Exynos4 Machine using device tree"
358 select CPU_EXYNOS4210
359 select USE_OF
360 select ARM_AMBA
361 select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD
362 help
363 Machine support for Samsung Exynos4 machine with device tree enabled.
364 Select this if a fdt blob is available for the Exynos4 SoC based board.
365 Note: This is under development and not all peripherals can be supported
366 with this machine file.
367
332if ARCH_EXYNOS4 368if ARCH_EXYNOS4
333 369
334comment "Configuration for HSMMC 8-bit bus width" 370comment "Configuration for HSMMC 8-bit bus width"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bcb9efc576e9..5fc202cdfdb6 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -19,7 +19,7 @@ obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
19obj-$(CONFIG_PM) += pm.o 19obj-$(CONFIG_PM) += pm.o
20obj-$(CONFIG_CPU_IDLE) += cpuidle.o 20obj-$(CONFIG_CPU_IDLE) += cpuidle.o
21 21
22obj-$(CONFIG_ARCH_EXYNOS4) += dma.o pmu.o 22obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o
23 23
24obj-$(CONFIG_SMP) += platsmp.o headsmp.o 24obj-$(CONFIG_SMP) += platsmp.o headsmp.o
25 25
@@ -39,6 +39,8 @@ obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o
39obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o 39obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o
40obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o 40obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o
41 41
42obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o
43
42# device support 44# device support
43 45
44obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o 46obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
@@ -46,6 +48,8 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
46obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o 48obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
47obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o 49obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
48obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o 50obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
51obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
52obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
49 53
50obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o 54obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o
51obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o 55obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
@@ -58,6 +62,6 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C5) += setup-i2c5.o
58obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o 62obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o
59obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o 63obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
60obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o 64obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
61obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
62obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 65obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
63obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o 66obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o
67obj-$(CONFIG_EXYNOS4_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 83616a039b15..5a8c42e90005 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -554,16 +554,6 @@ static struct clk init_clocks_off[] = {
554 .enable = exynos4_clk_dac_ctrl, 554 .enable = exynos4_clk_dac_ctrl,
555 .ctrlbit = (1 << 0), 555 .ctrlbit = (1 << 0),
556 }, { 556 }, {
557 .name = "dma",
558 .devname = "dma-pl330.0",
559 .enable = exynos4_clk_ip_fsys_ctrl,
560 .ctrlbit = (1 << 0),
561 }, {
562 .name = "dma",
563 .devname = "dma-pl330.1",
564 .enable = exynos4_clk_ip_fsys_ctrl,
565 .ctrlbit = (1 << 1),
566 }, {
567 .name = "adc", 557 .name = "adc",
568 .enable = exynos4_clk_ip_peril_ctrl, 558 .enable = exynos4_clk_ip_peril_ctrl,
569 .ctrlbit = (1 << 15), 559 .ctrlbit = (1 << 15),
@@ -779,6 +769,20 @@ static struct clk init_clocks[] = {
779 } 769 }
780}; 770};
781 771
772static struct clk clk_pdma0 = {
773 .name = "dma",
774 .devname = "dma-pl330.0",
775 .enable = exynos4_clk_ip_fsys_ctrl,
776 .ctrlbit = (1 << 0),
777};
778
779static struct clk clk_pdma1 = {
780 .name = "dma",
781 .devname = "dma-pl330.1",
782 .enable = exynos4_clk_ip_fsys_ctrl,
783 .ctrlbit = (1 << 1),
784};
785
782struct clk *clkset_group_list[] = { 786struct clk *clkset_group_list[] = {
783 [0] = &clk_ext_xtal_mux, 787 [0] = &clk_ext_xtal_mux,
784 [1] = &clk_xusbxti, 788 [1] = &clk_xusbxti,
@@ -1010,46 +1014,6 @@ static struct clksrc_clk clk_dout_mmc4 = {
1010 1014
1011static struct clksrc_clk clksrcs[] = { 1015static struct clksrc_clk clksrcs[] = {
1012 { 1016 {
1013 .clk = {
1014 .name = "uclk1",
1015 .devname = "s5pv210-uart.0",
1016 .enable = exynos4_clksrc_mask_peril0_ctrl,
1017 .ctrlbit = (1 << 0),
1018 },
1019 .sources = &clkset_group,
1020 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 },
1021 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 },
1022 }, {
1023 .clk = {
1024 .name = "uclk1",
1025 .devname = "s5pv210-uart.1",
1026 .enable = exynos4_clksrc_mask_peril0_ctrl,
1027 .ctrlbit = (1 << 4),
1028 },
1029 .sources = &clkset_group,
1030 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
1031 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 },
1032 }, {
1033 .clk = {
1034 .name = "uclk1",
1035 .devname = "s5pv210-uart.2",
1036 .enable = exynos4_clksrc_mask_peril0_ctrl,
1037 .ctrlbit = (1 << 8),
1038 },
1039 .sources = &clkset_group,
1040 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
1041 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 },
1042 }, {
1043 .clk = {
1044 .name = "uclk1",
1045 .devname = "s5pv210-uart.3",
1046 .enable = exynos4_clksrc_mask_peril0_ctrl,
1047 .ctrlbit = (1 << 12),
1048 },
1049 .sources = &clkset_group,
1050 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
1051 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 },
1052 }, {
1053 .clk = { 1017 .clk = {
1054 .name = "sclk_pwm", 1018 .name = "sclk_pwm",
1055 .enable = exynos4_clksrc_mask_peril0_ctrl, 1019 .enable = exynos4_clksrc_mask_peril0_ctrl,
@@ -1148,36 +1112,6 @@ static struct clksrc_clk clksrcs[] = {
1148 .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, 1112 .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 },
1149 }, { 1113 }, {
1150 .clk = { 1114 .clk = {
1151 .name = "sclk_spi",
1152 .devname = "s3c64xx-spi.0",
1153 .enable = exynos4_clksrc_mask_peril1_ctrl,
1154 .ctrlbit = (1 << 16),
1155 },
1156 .sources = &clkset_group,
1157 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
1158 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
1159 }, {
1160 .clk = {
1161 .name = "sclk_spi",
1162 .devname = "s3c64xx-spi.1",
1163 .enable = exynos4_clksrc_mask_peril1_ctrl,
1164 .ctrlbit = (1 << 20),
1165 },
1166 .sources = &clkset_group,
1167 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
1168 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
1169 }, {
1170 .clk = {
1171 .name = "sclk_spi",
1172 .devname = "s3c64xx-spi.2",
1173 .enable = exynos4_clksrc_mask_peril1_ctrl,
1174 .ctrlbit = (1 << 24),
1175 },
1176 .sources = &clkset_group,
1177 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
1178 .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
1179 }, {
1180 .clk = {
1181 .name = "sclk_fimg2d", 1115 .name = "sclk_fimg2d",
1182 }, 1116 },
1183 .sources = &clkset_mout_g2d, 1117 .sources = &clkset_mout_g2d,
@@ -1193,42 +1127,6 @@ static struct clksrc_clk clksrcs[] = {
1193 .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 }, 1127 .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 },
1194 }, { 1128 }, {
1195 .clk = { 1129 .clk = {
1196 .name = "sclk_mmc",
1197 .devname = "s3c-sdhci.0",
1198 .parent = &clk_dout_mmc0.clk,
1199 .enable = exynos4_clksrc_mask_fsys_ctrl,
1200 .ctrlbit = (1 << 0),
1201 },
1202 .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 },
1203 }, {
1204 .clk = {
1205 .name = "sclk_mmc",
1206 .devname = "s3c-sdhci.1",
1207 .parent = &clk_dout_mmc1.clk,
1208 .enable = exynos4_clksrc_mask_fsys_ctrl,
1209 .ctrlbit = (1 << 4),
1210 },
1211 .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 },
1212 }, {
1213 .clk = {
1214 .name = "sclk_mmc",
1215 .devname = "s3c-sdhci.2",
1216 .parent = &clk_dout_mmc2.clk,
1217 .enable = exynos4_clksrc_mask_fsys_ctrl,
1218 .ctrlbit = (1 << 8),
1219 },
1220 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 },
1221 }, {
1222 .clk = {
1223 .name = "sclk_mmc",
1224 .devname = "s3c-sdhci.3",
1225 .parent = &clk_dout_mmc3.clk,
1226 .enable = exynos4_clksrc_mask_fsys_ctrl,
1227 .ctrlbit = (1 << 12),
1228 },
1229 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
1230 }, {
1231 .clk = {
1232 .name = "sclk_dwmmc", 1130 .name = "sclk_dwmmc",
1233 .parent = &clk_dout_mmc4.clk, 1131 .parent = &clk_dout_mmc4.clk,
1234 .enable = exynos4_clksrc_mask_fsys_ctrl, 1132 .enable = exynos4_clksrc_mask_fsys_ctrl,
@@ -1238,6 +1136,134 @@ static struct clksrc_clk clksrcs[] = {
1238 } 1136 }
1239}; 1137};
1240 1138
1139static struct clksrc_clk clk_sclk_uart0 = {
1140 .clk = {
1141 .name = "uclk1",
1142 .devname = "exynos4210-uart.0",
1143 .enable = exynos4_clksrc_mask_peril0_ctrl,
1144 .ctrlbit = (1 << 0),
1145 },
1146 .sources = &clkset_group,
1147 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 },
1148 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 },
1149};
1150
1151static struct clksrc_clk clk_sclk_uart1 = {
1152 .clk = {
1153 .name = "uclk1",
1154 .devname = "exynos4210-uart.1",
1155 .enable = exynos4_clksrc_mask_peril0_ctrl,
1156 .ctrlbit = (1 << 4),
1157 },
1158 .sources = &clkset_group,
1159 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
1160 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 },
1161};
1162
1163static struct clksrc_clk clk_sclk_uart2 = {
1164 .clk = {
1165 .name = "uclk1",
1166 .devname = "exynos4210-uart.2",
1167 .enable = exynos4_clksrc_mask_peril0_ctrl,
1168 .ctrlbit = (1 << 8),
1169 },
1170 .sources = &clkset_group,
1171 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
1172 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 },
1173};
1174
1175static struct clksrc_clk clk_sclk_uart3 = {
1176 .clk = {
1177 .name = "uclk1",
1178 .devname = "exynos4210-uart.3",
1179 .enable = exynos4_clksrc_mask_peril0_ctrl,
1180 .ctrlbit = (1 << 12),
1181 },
1182 .sources = &clkset_group,
1183 .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
1184 .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 },
1185};
1186
1187static struct clksrc_clk clk_sclk_mmc0 = {
1188 .clk = {
1189 .name = "sclk_mmc",
1190 .devname = "s3c-sdhci.0",
1191 .parent = &clk_dout_mmc0.clk,
1192 .enable = exynos4_clksrc_mask_fsys_ctrl,
1193 .ctrlbit = (1 << 0),
1194 },
1195 .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 },
1196};
1197
1198static struct clksrc_clk clk_sclk_mmc1 = {
1199 .clk = {
1200 .name = "sclk_mmc",
1201 .devname = "s3c-sdhci.1",
1202 .parent = &clk_dout_mmc1.clk,
1203 .enable = exynos4_clksrc_mask_fsys_ctrl,
1204 .ctrlbit = (1 << 4),
1205 },
1206 .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 },
1207};
1208
1209static struct clksrc_clk clk_sclk_mmc2 = {
1210 .clk = {
1211 .name = "sclk_mmc",
1212 .devname = "s3c-sdhci.2",
1213 .parent = &clk_dout_mmc2.clk,
1214 .enable = exynos4_clksrc_mask_fsys_ctrl,
1215 .ctrlbit = (1 << 8),
1216 },
1217 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 },
1218};
1219
1220static struct clksrc_clk clk_sclk_mmc3 = {
1221 .clk = {
1222 .name = "sclk_mmc",
1223 .devname = "s3c-sdhci.3",
1224 .parent = &clk_dout_mmc3.clk,
1225 .enable = exynos4_clksrc_mask_fsys_ctrl,
1226 .ctrlbit = (1 << 12),
1227 },
1228 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
1229};
1230
1231static struct clksrc_clk clk_sclk_spi0 = {
1232 .clk = {
1233 .name = "sclk_spi",
1234 .devname = "s3c64xx-spi.0",
1235 .enable = exynos4_clksrc_mask_peril1_ctrl,
1236 .ctrlbit = (1 << 16),
1237 },
1238 .sources = &clkset_group,
1239 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
1240 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
1241};
1242
1243static struct clksrc_clk clk_sclk_spi1 = {
1244 .clk = {
1245 .name = "sclk_spi",
1246 .devname = "s3c64xx-spi.1",
1247 .enable = exynos4_clksrc_mask_peril1_ctrl,
1248 .ctrlbit = (1 << 20),
1249 },
1250 .sources = &clkset_group,
1251 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
1252 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
1253};
1254
1255static struct clksrc_clk clk_sclk_spi2 = {
1256 .clk = {
1257 .name = "sclk_spi",
1258 .devname = "s3c64xx-spi.2",
1259 .enable = exynos4_clksrc_mask_peril1_ctrl,
1260 .ctrlbit = (1 << 24),
1261 },
1262 .sources = &clkset_group,
1263 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
1264 .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
1265};
1266
1241/* Clock initialization code */ 1267/* Clock initialization code */
1242static struct clksrc_clk *sysclks[] = { 1268static struct clksrc_clk *sysclks[] = {
1243 &clk_mout_apll, 1269 &clk_mout_apll,
@@ -1272,6 +1298,42 @@ static struct clksrc_clk *sysclks[] = {
1272 &clk_mout_mfc1, 1298 &clk_mout_mfc1,
1273}; 1299};
1274 1300
1301static struct clk *clk_cdev[] = {
1302 &clk_pdma0,
1303 &clk_pdma1,
1304};
1305
1306static struct clksrc_clk *clksrc_cdev[] = {
1307 &clk_sclk_uart0,
1308 &clk_sclk_uart1,
1309 &clk_sclk_uart2,
1310 &clk_sclk_uart3,
1311 &clk_sclk_mmc0,
1312 &clk_sclk_mmc1,
1313 &clk_sclk_mmc2,
1314 &clk_sclk_mmc3,
1315 &clk_sclk_spi0,
1316 &clk_sclk_spi1,
1317 &clk_sclk_spi2,
1318
1319};
1320
1321static struct clk_lookup exynos4_clk_lookup[] = {
1322 CLKDEV_INIT("exynos4210-uart.0", "clk_uart_baud0", &clk_sclk_uart0.clk),
1323 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &clk_sclk_uart1.clk),
1324 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &clk_sclk_uart2.clk),
1325 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &clk_sclk_uart3.clk),
1326 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
1327 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
1328 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
1329 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
1330 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
1331 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
1332 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &clk_sclk_spi0.clk),
1333 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk0", &clk_sclk_spi1.clk),
1334 CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk0", &clk_sclk_spi2.clk),
1335};
1336
1275static int xtal_rate; 1337static int xtal_rate;
1276 1338
1277static unsigned long exynos4_fout_apll_get_rate(struct clk *clk) 1339static unsigned long exynos4_fout_apll_get_rate(struct clk *clk)
@@ -1479,11 +1541,19 @@ void __init exynos4_register_clocks(void)
1479 for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) 1541 for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
1480 s3c_register_clksrc(sclk_tv[ptr], 1); 1542 s3c_register_clksrc(sclk_tv[ptr], 1);
1481 1543
1544 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
1545 s3c_register_clksrc(clksrc_cdev[ptr], 1);
1546
1482 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 1547 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
1483 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 1548 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1484 1549
1550 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
1551 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1552 s3c_disable_clocks(clk_cdev[ptr], 1);
1553
1485 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1554 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1486 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1555 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1556 clkdev_add_table(exynos4_clk_lookup, ARRAY_SIZE(exynos4_clk_lookup));
1487 1557
1488 register_syscore_ops(&exynos4_clock_syscore_ops); 1558 register_syscore_ops(&exynos4_clock_syscore_ops);
1489 s3c24xx_register_clock(&dummy_apb_pclk); 1559 s3c24xx_register_clock(&dummy_apb_pclk);
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index b6ac6ee658c0..c59e18871006 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -17,8 +17,11 @@
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/sched.h> 18#include <linux/sched.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/of.h>
21#include <linux/of_irq.h>
20 22
21#include <asm/proc-fns.h> 23#include <asm/proc-fns.h>
24#include <asm/exception.h>
22#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
23#include <asm/hardware/gic.h> 26#include <asm/hardware/gic.h>
24#include <asm/mach/map.h> 27#include <asm/mach/map.h>
@@ -43,8 +46,6 @@
43 46
44#include "common.h" 47#include "common.h"
45 48
46unsigned int gic_bank_offset __read_mostly;
47
48static const char name_exynos4210[] = "EXYNOS4210"; 49static const char name_exynos4210[] = "EXYNOS4210";
49static const char name_exynos4212[] = "EXYNOS4212"; 50static const char name_exynos4212[] = "EXYNOS4212";
50static const char name_exynos4412[] = "EXYNOS4412"; 51static const char name_exynos4412[] = "EXYNOS4412";
@@ -386,27 +387,26 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
386 } 387 }
387} 388}
388 389
389static void exynos4_gic_irq_fix_base(struct irq_data *d) 390#ifdef CONFIG_OF
390{ 391static const struct of_device_id exynos4_dt_irq_match[] = {
391 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); 392 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
392 393 {},
393 gic_data->cpu_base = S5P_VA_GIC_CPU + 394};
394 (gic_bank_offset * smp_processor_id()); 395#endif
395
396 gic_data->dist_base = S5P_VA_GIC_DIST +
397 (gic_bank_offset * smp_processor_id());
398}
399 396
400void __init exynos4_init_irq(void) 397void __init exynos4_init_irq(void)
401{ 398{
402 int irq; 399 int irq;
400 unsigned int gic_bank_offset;
403 401
404 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; 402 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
405 403
406 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 404 if (!of_have_populated_dt())
407 gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base; 405 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
408 gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base; 406#ifdef CONFIG_OF
409 gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base; 407 else
408 of_irq_init(exynos4_dt_irq_match);
409#endif
410 410
411 for (irq = 0; irq < MAX_COMBINER_NR; irq++) { 411 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
412 412
@@ -474,15 +474,6 @@ int __init exynos_init(void)
474 return device_register(&exynos4_dev); 474 return device_register(&exynos4_dev);
475} 475}
476 476
477static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
478 [0] = {
479 .name = "uclk1",
480 .divisor = 1,
481 .min_baud = 0,
482 .max_baud = 0,
483 },
484};
485
486/* uart registration process */ 477/* uart registration process */
487 478
488void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) 479void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
@@ -490,16 +481,10 @@ void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
490 struct s3c2410_uartcfg *tcfg = cfg; 481 struct s3c2410_uartcfg *tcfg = cfg;
491 u32 ucnt; 482 u32 ucnt;
492 483
493 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { 484 for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
494 if (!tcfg->clocks) { 485 tcfg->has_fracval = 1;
495 tcfg->has_fracval = 1;
496 tcfg->clocks = exynos4_serial_clocks;
497 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
498 }
499 tcfg->flags |= NO_NEED_CHECK_CLKSRC;
500 }
501 486
502 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); 487 s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
503} 488}
504 489
505static DEFINE_SPINLOCK(eint_lock); 490static DEFINE_SPINLOCK(eint_lock);
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
new file mode 100644
index 000000000000..b8e75300c77d
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -0,0 +1,52 @@
1/* linux/arch/arm/mach-exynos/dev-ohci.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS - OHCI support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18#include <mach/ohci.h>
19
20#include <plat/devs.h>
21#include <plat/usb-phy.h>
22
23static struct resource exynos4_ohci_resource[] = {
24 [0] = DEFINE_RES_MEM(EXYNOS4_PA_OHCI, SZ_256),
25 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
26};
27
28static u64 exynos4_ohci_dma_mask = DMA_BIT_MASK(32);
29
30struct platform_device exynos4_device_ohci = {
31 .name = "exynos-ohci",
32 .id = -1,
33 .num_resources = ARRAY_SIZE(exynos4_ohci_resource),
34 .resource = exynos4_ohci_resource,
35 .dev = {
36 .dma_mask = &exynos4_ohci_dma_mask,
37 .coherent_dma_mask = DMA_BIT_MASK(32),
38 }
39};
40
41void __init exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd)
42{
43 struct exynos4_ohci_platdata *npd;
44
45 npd = s3c_set_platdata(pd, sizeof(struct exynos4_ohci_platdata),
46 &exynos4_device_ohci);
47
48 if (!npd->phy_init)
49 npd->phy_init = s5p_usb_phy_init;
50 if (!npd->phy_exit)
51 npd->phy_exit = s5p_usb_phy_exit;
52}
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 9667c61e64fb..b10fcd270f07 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -24,6 +24,7 @@
24#include <linux/dma-mapping.h> 24#include <linux/dma-mapping.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/amba/pl330.h> 26#include <linux/amba/pl330.h>
27#include <linux/of.h>
27 28
28#include <asm/irq.h> 29#include <asm/irq.h>
29#include <plat/devs.h> 30#include <plat/devs.h>
@@ -35,95 +36,42 @@
35 36
36static u64 dma_dmamask = DMA_BIT_MASK(32); 37static u64 dma_dmamask = DMA_BIT_MASK(32);
37 38
38struct dma_pl330_peri pdma0_peri[28] = { 39u8 pdma0_peri[] = {
39 { 40 DMACH_PCM0_RX,
40 .peri_id = (u8)DMACH_PCM0_RX, 41 DMACH_PCM0_TX,
41 .rqtype = DEVTOMEM, 42 DMACH_PCM2_RX,
42 }, { 43 DMACH_PCM2_TX,
43 .peri_id = (u8)DMACH_PCM0_TX, 44 DMACH_MSM_REQ0,
44 .rqtype = MEMTODEV, 45 DMACH_MSM_REQ2,
45 }, { 46 DMACH_SPI0_RX,
46 .peri_id = (u8)DMACH_PCM2_RX, 47 DMACH_SPI0_TX,
47 .rqtype = DEVTOMEM, 48 DMACH_SPI2_RX,
48 }, { 49 DMACH_SPI2_TX,
49 .peri_id = (u8)DMACH_PCM2_TX, 50 DMACH_I2S0S_TX,
50 .rqtype = MEMTODEV, 51 DMACH_I2S0_RX,
51 }, { 52 DMACH_I2S0_TX,
52 .peri_id = (u8)DMACH_MSM_REQ0, 53 DMACH_I2S2_RX,
53 }, { 54 DMACH_I2S2_TX,
54 .peri_id = (u8)DMACH_MSM_REQ2, 55 DMACH_UART0_RX,
55 }, { 56 DMACH_UART0_TX,
56 .peri_id = (u8)DMACH_SPI0_RX, 57 DMACH_UART2_RX,
57 .rqtype = DEVTOMEM, 58 DMACH_UART2_TX,
58 }, { 59 DMACH_UART4_RX,
59 .peri_id = (u8)DMACH_SPI0_TX, 60 DMACH_UART4_TX,
60 .rqtype = MEMTODEV, 61 DMACH_SLIMBUS0_RX,
61 }, { 62 DMACH_SLIMBUS0_TX,
62 .peri_id = (u8)DMACH_SPI2_RX, 63 DMACH_SLIMBUS2_RX,
63 .rqtype = DEVTOMEM, 64 DMACH_SLIMBUS2_TX,
64 }, { 65 DMACH_SLIMBUS4_RX,
65 .peri_id = (u8)DMACH_SPI2_TX, 66 DMACH_SLIMBUS4_TX,
66 .rqtype = MEMTODEV, 67 DMACH_AC97_MICIN,
67 }, { 68 DMACH_AC97_PCMIN,
68 .peri_id = (u8)DMACH_I2S0S_TX, 69 DMACH_AC97_PCMOUT,
69 .rqtype = MEMTODEV,
70 }, {
71 .peri_id = (u8)DMACH_I2S0_RX,
72 .rqtype = DEVTOMEM,
73 }, {
74 .peri_id = (u8)DMACH_I2S0_TX,
75 .rqtype = MEMTODEV,
76 }, {
77 .peri_id = (u8)DMACH_UART0_RX,
78 .rqtype = DEVTOMEM,
79 }, {
80 .peri_id = (u8)DMACH_UART0_TX,
81 .rqtype = MEMTODEV,
82 }, {
83 .peri_id = (u8)DMACH_UART2_RX,
84 .rqtype = DEVTOMEM,
85 }, {
86 .peri_id = (u8)DMACH_UART2_TX,
87 .rqtype = MEMTODEV,
88 }, {
89 .peri_id = (u8)DMACH_UART4_RX,
90 .rqtype = DEVTOMEM,
91 }, {
92 .peri_id = (u8)DMACH_UART4_TX,
93 .rqtype = MEMTODEV,
94 }, {
95 .peri_id = (u8)DMACH_SLIMBUS0_RX,
96 .rqtype = DEVTOMEM,
97 }, {
98 .peri_id = (u8)DMACH_SLIMBUS0_TX,
99 .rqtype = MEMTODEV,
100 }, {
101 .peri_id = (u8)DMACH_SLIMBUS2_RX,
102 .rqtype = DEVTOMEM,
103 }, {
104 .peri_id = (u8)DMACH_SLIMBUS2_TX,
105 .rqtype = MEMTODEV,
106 }, {
107 .peri_id = (u8)DMACH_SLIMBUS4_RX,
108 .rqtype = DEVTOMEM,
109 }, {
110 .peri_id = (u8)DMACH_SLIMBUS4_TX,
111 .rqtype = MEMTODEV,
112 }, {
113 .peri_id = (u8)DMACH_AC97_MICIN,
114 .rqtype = DEVTOMEM,
115 }, {
116 .peri_id = (u8)DMACH_AC97_PCMIN,
117 .rqtype = DEVTOMEM,
118 }, {
119 .peri_id = (u8)DMACH_AC97_PCMOUT,
120 .rqtype = MEMTODEV,
121 },
122}; 70};
123 71
124struct dma_pl330_platdata exynos4_pdma0_pdata = { 72struct dma_pl330_platdata exynos4_pdma0_pdata = {
125 .nr_valid_peri = ARRAY_SIZE(pdma0_peri), 73 .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
126 .peri = pdma0_peri, 74 .peri_id = pdma0_peri,
127}; 75};
128 76
129struct amba_device exynos4_device_pdma0 = { 77struct amba_device exynos4_device_pdma0 = {
@@ -142,86 +90,37 @@ struct amba_device exynos4_device_pdma0 = {
142 .periphid = 0x00041330, 90 .periphid = 0x00041330,
143}; 91};
144 92
145struct dma_pl330_peri pdma1_peri[25] = { 93u8 pdma1_peri[] = {
146 { 94 DMACH_PCM0_RX,
147 .peri_id = (u8)DMACH_PCM0_RX, 95 DMACH_PCM0_TX,
148 .rqtype = DEVTOMEM, 96 DMACH_PCM1_RX,
149 }, { 97 DMACH_PCM1_TX,
150 .peri_id = (u8)DMACH_PCM0_TX, 98 DMACH_MSM_REQ1,
151 .rqtype = MEMTODEV, 99 DMACH_MSM_REQ3,
152 }, { 100 DMACH_SPI1_RX,
153 .peri_id = (u8)DMACH_PCM1_RX, 101 DMACH_SPI1_TX,
154 .rqtype = DEVTOMEM, 102 DMACH_I2S0S_TX,
155 }, { 103 DMACH_I2S0_RX,
156 .peri_id = (u8)DMACH_PCM1_TX, 104 DMACH_I2S0_TX,
157 .rqtype = MEMTODEV, 105 DMACH_I2S1_RX,
158 }, { 106 DMACH_I2S1_TX,
159 .peri_id = (u8)DMACH_MSM_REQ1, 107 DMACH_UART0_RX,
160 }, { 108 DMACH_UART0_TX,
161 .peri_id = (u8)DMACH_MSM_REQ3, 109 DMACH_UART1_RX,
162 }, { 110 DMACH_UART1_TX,
163 .peri_id = (u8)DMACH_SPI1_RX, 111 DMACH_UART3_RX,
164 .rqtype = DEVTOMEM, 112 DMACH_UART3_TX,
165 }, { 113 DMACH_SLIMBUS1_RX,
166 .peri_id = (u8)DMACH_SPI1_TX, 114 DMACH_SLIMBUS1_TX,
167 .rqtype = MEMTODEV, 115 DMACH_SLIMBUS3_RX,
168 }, { 116 DMACH_SLIMBUS3_TX,
169 .peri_id = (u8)DMACH_I2S0S_TX, 117 DMACH_SLIMBUS5_RX,
170 .rqtype = MEMTODEV, 118 DMACH_SLIMBUS5_TX,
171 }, {
172 .peri_id = (u8)DMACH_I2S0_RX,
173 .rqtype = DEVTOMEM,
174 }, {
175 .peri_id = (u8)DMACH_I2S0_TX,
176 .rqtype = MEMTODEV,
177 }, {
178 .peri_id = (u8)DMACH_I2S1_RX,
179 .rqtype = DEVTOMEM,
180 }, {
181 .peri_id = (u8)DMACH_I2S1_TX,
182 .rqtype = MEMTODEV,
183 }, {
184 .peri_id = (u8)DMACH_UART0_RX,
185 .rqtype = DEVTOMEM,
186 }, {
187 .peri_id = (u8)DMACH_UART0_TX,
188 .rqtype = MEMTODEV,
189 }, {
190 .peri_id = (u8)DMACH_UART1_RX,
191 .rqtype = DEVTOMEM,
192 }, {
193 .peri_id = (u8)DMACH_UART1_TX,
194 .rqtype = MEMTODEV,
195 }, {
196 .peri_id = (u8)DMACH_UART3_RX,
197 .rqtype = DEVTOMEM,
198 }, {
199 .peri_id = (u8)DMACH_UART3_TX,
200 .rqtype = MEMTODEV,
201 }, {
202 .peri_id = (u8)DMACH_SLIMBUS1_RX,
203 .rqtype = DEVTOMEM,
204 }, {
205 .peri_id = (u8)DMACH_SLIMBUS1_TX,
206 .rqtype = MEMTODEV,
207 }, {
208 .peri_id = (u8)DMACH_SLIMBUS3_RX,
209 .rqtype = DEVTOMEM,
210 }, {
211 .peri_id = (u8)DMACH_SLIMBUS3_TX,
212 .rqtype = MEMTODEV,
213 }, {
214 .peri_id = (u8)DMACH_SLIMBUS5_RX,
215 .rqtype = DEVTOMEM,
216 }, {
217 .peri_id = (u8)DMACH_SLIMBUS5_TX,
218 .rqtype = MEMTODEV,
219 },
220}; 119};
221 120
222struct dma_pl330_platdata exynos4_pdma1_pdata = { 121struct dma_pl330_platdata exynos4_pdma1_pdata = {
223 .nr_valid_peri = ARRAY_SIZE(pdma1_peri), 122 .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
224 .peri = pdma1_peri, 123 .peri_id = pdma1_peri,
225}; 124};
226 125
227struct amba_device exynos4_device_pdma1 = { 126struct amba_device exynos4_device_pdma1 = {
@@ -242,7 +141,15 @@ struct amba_device exynos4_device_pdma1 = {
242 141
243static int __init exynos4_dma_init(void) 142static int __init exynos4_dma_init(void)
244{ 143{
144 if (of_have_populated_dt())
145 return 0;
146
147 dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
148 dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
245 amba_device_register(&exynos4_device_pdma0, &iomem_resource); 149 amba_device_register(&exynos4_device_pdma0, &iomem_resource);
150
151 dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
152 dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
246 amba_device_register(&exynos4_device_pdma1, &iomem_resource); 153 amba_device_register(&exynos4_device_pdma1, &iomem_resource);
247 154
248 return 0; 155 return 0;
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index dfd4b7eecb90..f77bce04789a 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -17,13 +17,13 @@
17 17
18/* PPI: Private Peripheral Interrupt */ 18/* PPI: Private Peripheral Interrupt */
19 19
20#define IRQ_PPI(x) S5P_IRQ(x+16) 20#define IRQ_PPI(x) (x+16)
21 21
22#define IRQ_MCT_LOCALTIMER IRQ_PPI(12) 22#define IRQ_MCT_LOCALTIMER IRQ_PPI(12)
23 23
24/* SPI: Shared Peripheral Interrupt */ 24/* SPI: Shared Peripheral Interrupt */
25 25
26#define IRQ_SPI(x) S5P_IRQ(x+32) 26#define IRQ_SPI(x) (x+32)
27 27
28#define IRQ_EINT0 IRQ_SPI(16) 28#define IRQ_EINT0 IRQ_SPI(16)
29#define IRQ_EINT1 IRQ_SPI(17) 29#define IRQ_EINT1 IRQ_SPI(17)
@@ -72,6 +72,9 @@
72#define IRQ_IIC5 IRQ_SPI(63) 72#define IRQ_IIC5 IRQ_SPI(63)
73#define IRQ_IIC6 IRQ_SPI(64) 73#define IRQ_IIC6 IRQ_SPI(64)
74#define IRQ_IIC7 IRQ_SPI(65) 74#define IRQ_IIC7 IRQ_SPI(65)
75#define IRQ_SPI0 IRQ_SPI(66)
76#define IRQ_SPI1 IRQ_SPI(67)
77#define IRQ_SPI2 IRQ_SPI(68)
75 78
76#define IRQ_USB_HOST IRQ_SPI(70) 79#define IRQ_USB_HOST IRQ_SPI(70)
77#define IRQ_USB_HSOTG IRQ_SPI(71) 80#define IRQ_USB_HSOTG IRQ_SPI(71)
@@ -163,7 +166,9 @@
163#define IRQ_GPIO2_NR_GROUPS 9 166#define IRQ_GPIO2_NR_GROUPS 9
164#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) 167#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
165 168
169#define IRQ_TIMER_BASE (IRQ_GPIO_END + 64)
170
166/* Set the default NR_IRQS */ 171/* Set the default NR_IRQS */
167#define NR_IRQS (IRQ_GPIO_END + 64) 172#define NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
168 173
169#endif /* __ASM_ARCH_IRQS_H */ 174#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index d1829860a0ec..c754a22a2bb3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -87,6 +87,10 @@
87#define EXYNOS4_PA_SYSMMU_TV 0x12E20000 87#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
88#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 88#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
89#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 89#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
90#define EXYNOS4_PA_SPI0 0x13920000
91#define EXYNOS4_PA_SPI1 0x13930000
92#define EXYNOS4_PA_SPI2 0x13940000
93
90 94
91#define EXYNOS4_PA_GPIO1 0x11400000 95#define EXYNOS4_PA_GPIO1 0x11400000
92#define EXYNOS4_PA_GPIO2 0x11000000 96#define EXYNOS4_PA_GPIO2 0x11000000
@@ -107,6 +111,7 @@
107#define EXYNOS4_PA_SROMC 0x12570000 111#define EXYNOS4_PA_SROMC 0x12570000
108 112
109#define EXYNOS4_PA_EHCI 0x12580000 113#define EXYNOS4_PA_EHCI 0x12580000
114#define EXYNOS4_PA_OHCI 0x12590000
110#define EXYNOS4_PA_HSPHY 0x125B0000 115#define EXYNOS4_PA_HSPHY 0x125B0000
111#define EXYNOS4_PA_MFC 0x13400000 116#define EXYNOS4_PA_MFC 0x13400000
112 117
@@ -148,6 +153,9 @@
148#define S3C_PA_RTC EXYNOS4_PA_RTC 153#define S3C_PA_RTC EXYNOS4_PA_RTC
149#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG 154#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
150#define S3C_PA_UART EXYNOS4_PA_UART 155#define S3C_PA_UART EXYNOS4_PA_UART
156#define S3C_PA_SPI0 EXYNOS4_PA_SPI0
157#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
158#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
151 159
152#define S5P_PA_EHCI EXYNOS4_PA_EHCI 160#define S5P_PA_EHCI EXYNOS4_PA_EHCI
153#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 161#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
diff --git a/arch/arm/mach-exynos/include/mach/ohci.h b/arch/arm/mach-exynos/include/mach/ohci.h
new file mode 100644
index 000000000000..c256c595be5e
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/ohci.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * http://www.samsung.com/
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __MACH_EXYNOS_OHCI_H
12#define __MACH_EXYNOS_OHCI_H
13
14struct exynos4_ohci_platdata {
15 int (*phy_init)(struct platform_device *pdev, int type);
16 int (*phy_exit)(struct platform_device *pdev, int type);
17};
18
19extern void exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd);
20
21#endif /* __MACH_EXYNOS_OHCI_H */
diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..576efdf6d091
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/spi-clocks.h
@@ -0,0 +1,16 @@
1/* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2011 Samsung Electronics Co. Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#ifndef __ASM_ARCH_SPI_CLKS_H
11#define __ASM_ARCH_SPI_CLKS_H __FILE__
12
13/* Must source from SCLK_SPI */
14#define EXYNOS4_SPI_SRCCLK_SCLK 0
15
16#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
new file mode 100644
index 000000000000..85fa02767d67
--- /dev/null
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -0,0 +1,85 @@
1/*
2 * Samsung's Exynos4210 flattened device tree enabled machine
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/of_platform.h>
15#include <linux/serial_core.h>
16
17#include <asm/mach/arch.h>
18#include <mach/map.h>
19
20#include <plat/cpu.h>
21#include <plat/regs-serial.h>
22#include <plat/exynos4.h>
23
24/*
25 * The following lookup table is used to override device names when devices
26 * are registered from device tree. This is temporarily added to enable
27 * device tree support addition for the Exynos4 architecture.
28 *
29 * For drivers that require platform data to be provided from the machine
30 * file, a platform data pointer can also be supplied along with the
31 * devices names. Usually, the platform data elements that cannot be parsed
32 * from the device tree by the drivers (example: function pointers) are
33 * supplied. But it should be noted that this is a temporary mechanism and
34 * at some point, the drivers should be capable of parsing all the platform
35 * data from the device tree.
36 */
37static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
38 OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART0,
39 "exynos4210-uart.0", NULL),
40 OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART1,
41 "exynos4210-uart.1", NULL),
42 OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART2,
43 "exynos4210-uart.2", NULL),
44 OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART3,
45 "exynos4210-uart.3", NULL),
46 OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(0),
47 "exynos4-sdhci.0", NULL),
48 OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(1),
49 "exynos4-sdhci.1", NULL),
50 OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(2),
51 "exynos4-sdhci.2", NULL),
52 OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(3),
53 "exynos4-sdhci.3", NULL),
54 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(0),
55 "s3c2440-i2c.0", NULL),
56 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
57 OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
58 {},
59};
60
61static void __init exynos4210_dt_map_io(void)
62{
63 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
64 s3c24xx_init_clocks(24000000);
65}
66
67static void __init exynos4210_dt_machine_init(void)
68{
69 of_platform_populate(NULL, of_default_bus_match_table,
70 exynos4210_auxdata_lookup, NULL);
71}
72
73static char const *exynos4210_dt_compat[] __initdata = {
74 "samsung,exynos4210",
75 NULL
76};
77
78DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
79 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
80 .init_irq = exynos4_init_irq,
81 .map_io = exynos4210_dt_map_io,
82 .init_machine = exynos4210_dt_machine_init,
83 .timer = &exynos4_timer,
84 .dt_compat = exynos4210_dt_compat,
85MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 635fb97e31ab..b895ec031105 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -249,13 +249,8 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
249 249
250static int nuri_bl_init(struct device *dev) 250static int nuri_bl_init(struct device *dev)
251{ 251{
252 int ret, gpio = EXYNOS4_GPE2(3); 252 return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW,
253 253 "LCD_LD0_EN");
254 ret = gpio_request(gpio, "LCD_LDO_EN");
255 if (!ret)
256 gpio_direction_output(gpio, 0);
257
258 return ret;
259} 254}
260 255
261static int nuri_bl_notify(struct device *dev, int brightness) 256static int nuri_bl_notify(struct device *dev, int brightness)
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 586eb995aa96..2b11e046d391 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -41,6 +41,7 @@
41#include <plat/fb.h> 41#include <plat/fb.h>
42#include <plat/mfc.h> 42#include <plat/mfc.h>
43 43
44#include <mach/ohci.h>
44#include <mach/map.h> 45#include <mach/map.h>
45 46
46#include "common.h" 47#include "common.h"
@@ -485,6 +486,16 @@ static void __init origen_ehci_init(void)
485 s5p_ehci_set_platdata(pdata); 486 s5p_ehci_set_platdata(pdata);
486} 487}
487 488
489/* USB OHCI */
490static struct exynos4_ohci_platdata origen_ohci_pdata;
491
492static void __init origen_ohci_init(void)
493{
494 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
495
496 exynos4_ohci_set_platdata(pdata);
497}
498
488static struct gpio_keys_button origen_gpio_keys_table[] = { 499static struct gpio_keys_button origen_gpio_keys_table[] = {
489 { 500 {
490 .code = KEY_MENU, 501 .code = KEY_MENU,
@@ -608,6 +619,7 @@ static struct platform_device *origen_devices[] __initdata = {
608 &s5p_device_mfc_l, 619 &s5p_device_mfc_l,
609 &s5p_device_mfc_r, 620 &s5p_device_mfc_r,
610 &s5p_device_mixer, 621 &s5p_device_mixer,
622 &exynos4_device_ohci,
611 &exynos4_device_pd[PD_LCD0], 623 &exynos4_device_pd[PD_LCD0],
612 &exynos4_device_pd[PD_TV], 624 &exynos4_device_pd[PD_TV],
613 &exynos4_device_pd[PD_G3D], 625 &exynos4_device_pd[PD_G3D],
@@ -672,6 +684,7 @@ static void __init origen_machine_init(void)
672 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); 684 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
673 685
674 origen_ehci_init(); 686 origen_ehci_init();
687 origen_ohci_init();
675 clk_xusbxti.rate = 24000000; 688 clk_xusbxti.rate = 24000000;
676 689
677 s5p_tv_setup(); 690 s5p_tv_setup();
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 5b365613b470..b2c5557f50e4 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -42,6 +42,7 @@
42#include <plat/clock.h> 42#include <plat/clock.h>
43 43
44#include <mach/map.h> 44#include <mach/map.h>
45#include <mach/ohci.h>
45 46
46#include "common.h" 47#include "common.h"
47 48
@@ -131,9 +132,7 @@ static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
131 gpio_free(EXYNOS4_GPD0(1)); 132 gpio_free(EXYNOS4_GPD0(1));
132#endif 133#endif
133 /* fire nRESET on power up */ 134 /* fire nRESET on power up */
134 gpio_request(EXYNOS4_GPX0(6), "GPX0"); 135 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
135
136 gpio_direction_output(EXYNOS4_GPX0(6), 1);
137 mdelay(100); 136 mdelay(100);
138 137
139 gpio_set_value(EXYNOS4_GPX0(6), 0); 138 gpio_set_value(EXYNOS4_GPX0(6), 0);
@@ -247,6 +246,16 @@ static void __init smdkv310_ehci_init(void)
247 s5p_ehci_set_platdata(pdata); 246 s5p_ehci_set_platdata(pdata);
248} 247}
249 248
249/* USB OHCI */
250static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
251
252static void __init smdkv310_ohci_init(void)
253{
254 struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
255
256 exynos4_ohci_set_platdata(pdata);
257}
258
250static struct platform_device *smdkv310_devices[] __initdata = { 259static struct platform_device *smdkv310_devices[] __initdata = {
251 &s3c_device_hsmmc0, 260 &s3c_device_hsmmc0,
252 &s3c_device_hsmmc1, 261 &s3c_device_hsmmc1,
@@ -263,6 +272,7 @@ static struct platform_device *smdkv310_devices[] __initdata = {
263 &s5p_device_fimc3, 272 &s5p_device_fimc3,
264 &exynos4_device_ac97, 273 &exynos4_device_ac97,
265 &exynos4_device_i2s0, 274 &exynos4_device_i2s0,
275 &exynos4_device_ohci,
266 &samsung_device_keypad, 276 &samsung_device_keypad,
267 &s5p_device_mfc, 277 &s5p_device_mfc,
268 &s5p_device_mfc_l, 278 &s5p_device_mfc_l,
@@ -365,6 +375,7 @@ static void __init smdkv310_machine_init(void)
365 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); 375 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
366 376
367 smdkv310_ehci_init(); 377 smdkv310_ehci_init();
378 smdkv310_ohci_init();
368 clk_xusbxti.rate = 24000000; 379 clk_xusbxti.rate = 24000000;
369 380
370 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); 381 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 52aea972746a..37ac93e8d6d9 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -610,8 +610,7 @@ static void __init universal_tsp_init(void)
610 610
611 /* TSP_LDO_ON: XMDMADDR_11 */ 611 /* TSP_LDO_ON: XMDMADDR_11 */
612 gpio = EXYNOS4_GPE2(3); 612 gpio = EXYNOS4_GPE2(3);
613 gpio_request(gpio, "TSP_LDO_ON"); 613 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
614 gpio_direction_output(gpio, 1);
615 gpio_export(gpio, 0); 614 gpio_export(gpio, 0);
616 615
617 /* TSP_INT: XMDMADDR_7 */ 616 /* TSP_INT: XMDMADDR_7 */
@@ -671,8 +670,7 @@ static void __init universal_touchkey_init(void)
671 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); 670 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
672 671
673 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ 672 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
674 gpio_request(gpio, "3_TOUCH_EN"); 673 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
675 gpio_direction_output(gpio, 1);
676} 674}
677 675
678static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { 676static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
@@ -1002,9 +1000,7 @@ static void __init universal_map_io(void)
1002void s5p_tv_setup(void) 1000void s5p_tv_setup(void)
1003{ 1001{
1004 /* direct HPD to HDMI chip */ 1002 /* direct HPD to HDMI chip */
1005 gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); 1003 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1006
1007 gpio_direction_input(EXYNOS4_GPX3(7));
1008 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); 1004 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1009 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); 1005 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1010 1006
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c4f792dcad19..a4f61a43c7ba 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -23,6 +23,7 @@
23 23
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
25#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
26#include <asm/smp_scu.h>
26 27
27#include <plat/cpu.h> 28#include <plat/cpu.h>
28#include <plat/pm.h> 29#include <plat/pm.h>
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct device *dev)
213 return 0; 214 return 0;
214} 215}
215 216
216/* This function copy from linux/arch/arm/kernel/smp_scu.c */
217
218void exynos4_scu_enable(void __iomem *scu_base)
219{
220 u32 scu_ctrl;
221
222 scu_ctrl = __raw_readl(scu_base);
223 /* already enabled? */
224 if (scu_ctrl & 1)
225 return;
226
227 scu_ctrl |= 1;
228 __raw_writel(scu_ctrl, scu_base);
229
230 /*
231 * Ensure that the data accessed by CPU0 before the SCU was
232 * initialised is visible to the other CPUs.
233 */
234 flush_cache_all();
235}
236
237static unsigned long pll_base_rate; 217static unsigned long pll_base_rate;
238 218
239static void exynos4_restore_pll(void) 219static void exynos4_restore_pll(void)
@@ -404,7 +384,7 @@ static void exynos4_pm_resume(void)
404 384
405 exynos4_restore_pll(); 385 exynos4_restore_pll();
406 386
407 exynos4_scu_enable(S5P_VA_SCU); 387 scu_enable(S5P_VA_SCU);
408 388
409#ifdef CONFIG_CACHE_L2X0 389#ifdef CONFIG_CACHE_L2X0
410 s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); 390 s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));
diff --git a/arch/arm/mach-exynos/setup-sdhci.c b/arch/arm/mach-exynos/setup-sdhci.c
deleted file mode 100644
index 92937b410906..000000000000
--- a/arch/arm/mach-exynos/setup-sdhci.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-exynos4/setup-sdhci.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/types.h>
14
15/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
16
17char *exynos4_hsmmc_clksrcs[4] = {
18 [0] = NULL,
19 [1] = NULL,
20 [2] = "sclk_mmc", /* mmc_bus */
21 [3] = NULL,
22};
diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c
new file mode 100644
index 000000000000..833ff40ee0e8
--- /dev/null
+++ b/arch/arm/mach-exynos/setup-spi.c
@@ -0,0 +1,72 @@
1/* linux/arch/arm/mach-exynos4/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
19 .fifo_lvl_mask = 0x1ff,
20 .rx_lvl_offset = 15,
21 .high_speed = 1,
22 .clk_from_cmu = true,
23 .tx_st_done = 25,
24};
25
26int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
27{
28 s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
30 s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
31 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
32 return 0;
33}
34#endif
35
36#ifdef CONFIG_S3C64XX_DEV_SPI1
37struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
38 .fifo_lvl_mask = 0x7f,
39 .rx_lvl_offset = 15,
40 .high_speed = 1,
41 .clk_from_cmu = true,
42 .tx_st_done = 25,
43};
44
45int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
46{
47 s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2));
48 s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP);
49 s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
50 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
51 return 0;
52}
53#endif
54
55#ifdef CONFIG_S3C64XX_DEV_SPI2
56struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
57 .fifo_lvl_mask = 0x7f,
58 .rx_lvl_offset = 15,
59 .high_speed = 1,
60 .clk_from_cmu = true,
61 .tx_st_done = 25,
62};
63
64int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
65{
66 s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
67 s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
68 s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
69 S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
70 return 0;
71}
72#endif
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c
index 39aca045f660..41743d21e8c6 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -19,6 +19,13 @@
19#include <plat/cpu.h> 19#include <plat/cpu.h>
20#include <plat/usb-phy.h> 20#include <plat/usb-phy.h>
21 21
22static atomic_t host_usage;
23
24static int exynos4_usb_host_phy_is_on(void)
25{
26 return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1;
27}
28
22static int exynos4_usb_phy1_init(struct platform_device *pdev) 29static int exynos4_usb_phy1_init(struct platform_device *pdev)
23{ 30{
24 struct clk *otg_clk; 31 struct clk *otg_clk;
@@ -27,6 +34,8 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
27 u32 rstcon; 34 u32 rstcon;
28 int err; 35 int err;
29 36
37 atomic_inc(&host_usage);
38
30 otg_clk = clk_get(&pdev->dev, "otg"); 39 otg_clk = clk_get(&pdev->dev, "otg");
31 if (IS_ERR(otg_clk)) { 40 if (IS_ERR(otg_clk)) {
32 dev_err(&pdev->dev, "Failed to get otg clock\n"); 41 dev_err(&pdev->dev, "Failed to get otg clock\n");
@@ -39,6 +48,9 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
39 return err; 48 return err;
40 } 49 }
41 50
51 if (exynos4_usb_host_phy_is_on())
52 return 0;
53
42 writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, 54 writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE,
43 S5P_USBHOST_PHY_CONTROL); 55 S5P_USBHOST_PHY_CONTROL);
44 56
@@ -95,6 +107,9 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev)
95 struct clk *otg_clk; 107 struct clk *otg_clk;
96 int err; 108 int err;
97 109
110 if (atomic_dec_return(&host_usage) > 0)
111 return 0;
112
98 otg_clk = clk_get(&pdev->dev, "otg"); 113 otg_clk = clk_get(&pdev->dev, "otg");
99 if (IS_ERR(otg_clk)) { 114 if (IS_ERR(otg_clk)) {
100 dev_err(&pdev->dev, "Failed to get otg clock\n"); 115 dev_err(&pdev->dev, "Failed to get otg clock\n");
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 35a218cb5c7e..0e6de366c648 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -98,6 +98,7 @@ config MACH_SCB9328
98config MACH_APF9328 98config MACH_APF9328
99 bool "APF9328" 99 bool "APF9328"
100 select SOC_IMX1 100 select SOC_IMX1
101 select IMX_HAVE_PLATFORM_IMX_I2C
101 select IMX_HAVE_PLATFORM_IMX_UART 102 select IMX_HAVE_PLATFORM_IMX_UART
102 help 103 help
103 Say Yes here if you are using the Armadeus APF9328 development board 104 Say Yes here if you are using the Armadeus APF9328 development board
@@ -595,6 +596,7 @@ comment "i.MX6 family:"
595 596
596config SOC_IMX6Q 597config SOC_IMX6Q
597 bool "i.MX6 Quad support" 598 bool "i.MX6 Quad support"
599 select ARM_CPU_SUSPEND if PM
598 select ARM_GIC 600 select ARM_GIC
599 select CPU_V7 601 select CPU_V7
600 select HAVE_ARM_SCU 602 select HAVE_ARM_SCU
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index d97f409ce98b..f5920c24f7d7 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -70,4 +70,8 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a
70obj-$(CONFIG_SMP) += platsmp.o 70obj-$(CONFIG_SMP) += platsmp.o
71obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 71obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
72obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o 72obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
73obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o 73obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o
74
75ifeq ($(CONFIG_PM),y)
76obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
77endif
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index cfede5768aa0..5f4d06af4912 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -25,3 +25,6 @@ initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
28
29dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
30 imx6q-sabrelite.dtb
diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/head-v7.S
index 6229efbc70cb..7e49deb128a4 100644
--- a/arch/arm/mach-imx/head-v7.S
+++ b/arch/arm/mach-imx/head-v7.S
@@ -16,7 +16,6 @@
16#include <asm/hardware/cache-l2x0.h> 16#include <asm/hardware/cache-l2x0.h>
17 17
18 .section ".text.head", "ax" 18 .section ".text.head", "ax"
19 __CPUINIT
20 19
21/* 20/*
22 * The secondary kernel init calls v7_flush_dcache_all before it enables 21 * The secondary kernel init calls v7_flush_dcache_all before it enables
@@ -33,6 +32,7 @@
33 */ 32 */
34ENTRY(v7_invalidate_l1) 33ENTRY(v7_invalidate_l1)
35 mov r0, #0 34 mov r0, #0
35 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
36 mcr p15, 2, r0, c0, c0, 0 36 mcr p15, 2, r0, c0, c0, 0
37 mrc p15, 1, r0, c0, c0, 0 37 mrc p15, 1, r0, c0, c0, 0
38 38
@@ -71,6 +71,7 @@ ENTRY(v7_secondary_startup)
71ENDPROC(v7_secondary_startup) 71ENDPROC(v7_secondary_startup)
72#endif 72#endif
73 73
74#ifdef CONFIG_PM
74/* 75/*
75 * The following code is located into the .data section. This is to 76 * The following code is located into the .data section. This is to
76 * allow phys_l2x0_saved_regs to be accessed with a relative load 77 * allow phys_l2x0_saved_regs to be accessed with a relative load
@@ -79,6 +80,7 @@ ENDPROC(v7_secondary_startup)
79 .data 80 .data
80 .align 81 .align
81 82
83#ifdef CONFIG_CACHE_L2X0
82 .macro pl310_resume 84 .macro pl310_resume
83 ldr r2, phys_l2x0_saved_regs 85 ldr r2, phys_l2x0_saved_regs
84 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 86 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
@@ -88,12 +90,17 @@ ENDPROC(v7_secondary_startup)
88 str r1, [r0, #L2X0_CTRL] @ re-enable L2 90 str r1, [r0, #L2X0_CTRL] @ re-enable L2
89 .endm 91 .endm
90 92
93 .globl phys_l2x0_saved_regs
94phys_l2x0_saved_regs:
95 .long 0
96#else
97 .macro pl310_resume
98 .endm
99#endif
100
91ENTRY(v7_cpu_resume) 101ENTRY(v7_cpu_resume)
92 bl v7_invalidate_l1 102 bl v7_invalidate_l1
93 pl310_resume 103 pl310_resume
94 b cpu_resume 104 b cpu_resume
95ENDPROC(v7_cpu_resume) 105ENDPROC(v7_cpu_resume)
96 106#endif
97 .globl phys_l2x0_saved_regs
98phys_l2x0_saved_regs:
99 .long 0
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 146a4f073464..f4a63ee9e217 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -18,6 +18,7 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/dm9000.h> 20#include <linux/dm9000.h>
21#include <linux/i2c.h>
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -41,6 +42,9 @@ static const int apf9328_pins[] __initconst = {
41 PB29_PF_UART2_RTS, 42 PB29_PF_UART2_RTS,
42 PB30_PF_UART2_TXD, 43 PB30_PF_UART2_TXD,
43 PB31_PF_UART2_RXD, 44 PB31_PF_UART2_RXD,
45 /* I2C */
46 PA15_PF_I2C_SDA,
47 PA16_PF_I2C_SCL,
44}; 48};
45 49
46/* 50/*
@@ -103,6 +107,10 @@ static const struct imxuart_platform_data uart1_pdata __initconst = {
103 .flags = IMXUART_HAVE_RTSCTS, 107 .flags = IMXUART_HAVE_RTSCTS,
104}; 108};
105 109
110static const struct imxi2c_platform_data apf9328_i2c_data __initconst = {
111 .bitrate = 100000,
112};
113
106static struct platform_device *devices[] __initdata = { 114static struct platform_device *devices[] __initdata = {
107 &apf9328_flash_device, 115 &apf9328_flash_device,
108 &dm9000x_device, 116 &dm9000x_device,
@@ -119,6 +127,8 @@ static void __init apf9328_init(void)
119 imx1_add_imx_uart0(NULL); 127 imx1_add_imx_uart0(NULL);
120 imx1_add_imx_uart1(&uart1_pdata); 128 imx1_add_imx_uart1(&uart1_pdata);
121 129
130 imx1_add_imx_i2c(&apf9328_i2c_data);
131
122 platform_add_devices(devices, ARRAY_SIZE(devices)); 132 platform_add_devices(devices, ARRAY_SIZE(devices));
123} 133}
124 134
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 05b49bb5d677..c25728106917 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -19,6 +19,8 @@
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/of_irq.h> 20#include <linux/of_irq.h>
21#include <linux/of_platform.h> 21#include <linux/of_platform.h>
22#include <linux/phy.h>
23#include <linux/micrel_phy.h>
22#include <asm/hardware/cache-l2x0.h> 24#include <asm/hardware/cache-l2x0.h>
23#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
24#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -56,8 +58,27 @@ soft:
56 soft_restart(0); 58 soft_restart(0);
57} 59}
58 60
61/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
62static int ksz9021rn_phy_fixup(struct phy_device *phydev)
63{
64 /* min rx data delay */
65 phy_write(phydev, 0x0b, 0x8105);
66 phy_write(phydev, 0x0c, 0x0000);
67
68 /* max rx/tx clock delay, min rx/tx control delay */
69 phy_write(phydev, 0x0b, 0x8104);
70 phy_write(phydev, 0x0c, 0xf0f0);
71 phy_write(phydev, 0x0b, 0x104);
72
73 return 0;
74}
75
59static void __init imx6q_init_machine(void) 76static void __init imx6q_init_machine(void)
60{ 77{
78 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
79 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
80 ksz9021rn_phy_fixup);
81
61 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 82 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
62 83
63 imx6q_pm_init(); 84 imx6q_pm_init();
@@ -105,7 +126,8 @@ static struct sys_timer imx6q_timer = {
105}; 126};
106 127
107static const char *imx6q_dt_compat[] __initdata = { 128static const char *imx6q_dt_compat[] __initdata = {
108 "fsl,imx6q-sabreauto", 129 "fsl,imx6q-arm2",
130 "fsl,imx6q-sabrelite",
109 NULL, 131 NULL,
110}; 132};
111 133
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 2b565c381347..89c33258639f 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -492,7 +492,7 @@ static struct mc13xxx_platform_data mc13783_pdata = {
492 .regulators = mx31_3ds_regulators, 492 .regulators = mx31_3ds_regulators,
493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), 493 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
494 }, 494 },
495 .flags = MC13XXX_USE_TOUCHSCREEN, 495 .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC,
496}; 496};
497 497
498/* SPI */ 498/* SPI */
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index f20f191d7cca..f7b0c2b1b905 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -64,7 +64,9 @@ void __init imx6q_pm_init(void)
64 * address of the data structure used by l2x0 core to save registers, 64 * address of the data structure used by l2x0 core to save registers,
65 * and later restore the necessary ones in imx6q resume entry. 65 * and later restore the necessary ones in imx6q resume entry.
66 */ 66 */
67#ifdef CONFIG_CACHE_L2X0
67 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs); 68 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
69#endif
68 70
69 suspend_set_ops(&imx6q_pm_ops); 71 suspend_set_ops(&imx6q_pm_ops);
70} 72}
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 8d03bcef5182..e9a7180863d9 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -13,12 +13,12 @@
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <mach/hardware.h> 15#include <mach/hardware.h>
16#include <plat/addr-map.h>
16#include "common.h" 17#include "common.h"
17 18
18/* 19/*
19 * Generic Address Decode Windows bit settings 20 * Generic Address Decode Windows bit settings
20 */ 21 */
21#define TARGET_DDR 0
22#define TARGET_DEV_BUS 1 22#define TARGET_DEV_BUS 1
23#define TARGET_SRAM 3 23#define TARGET_SRAM 3
24#define TARGET_PCIE 4 24#define TARGET_PCIE 4
@@ -36,118 +36,55 @@
36#define ATTR_SRAM 0x01 36#define ATTR_SRAM 0x01
37 37
38/* 38/*
39 * Helpers to get DDR bank info 39 * Description of the windows needed by the platform code
40 */ 40 */
41#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) 41static struct __initdata orion_addr_map_cfg addr_map_cfg = {
42#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) 42 .num_wins = 8,
43 43 .remappable_wins = 4,
44/* 44 .bridge_virt_base = BRIDGE_VIRT_BASE,
45 * CPU Address Decode Windows registers 45};
46 */
47#define WIN_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
48#define WIN_CTRL_OFF 0x0000
49#define WIN_BASE_OFF 0x0004
50#define WIN_REMAP_LO_OFF 0x0008
51#define WIN_REMAP_HI_OFF 0x000c
52
53
54struct mbus_dram_target_info kirkwood_mbus_dram_info;
55
56static int __init cpu_win_can_remap(int win)
57{
58 if (win < 4)
59 return 1;
60
61 return 0;
62}
63
64static void __init setup_cpu_win(int win, u32 base, u32 size,
65 u8 target, u8 attr, int remap)
66{
67 void __iomem *addr = (void __iomem *)WIN_OFF(win);
68 u32 ctrl;
69
70 base &= 0xffff0000;
71 ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
72
73 writel(base, addr + WIN_BASE_OFF);
74 writel(ctrl, addr + WIN_CTRL_OFF);
75 if (cpu_win_can_remap(win)) {
76 if (remap < 0)
77 remap = base;
78
79 writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
80 writel(0, addr + WIN_REMAP_HI_OFF);
81 }
82}
83
84void __init kirkwood_setup_cpu_mbus(void)
85{
86 void __iomem *addr;
87 int i;
88 int cs;
89 46
47static const struct __initdata orion_addr_map_info addr_map_info[] = {
90 /* 48 /*
91 * First, disable and clear windows. 49 * Windows for PCIe IO+MEM space.
92 */ 50 */
93 for (i = 0; i < 8; i++) { 51 { 0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
94 addr = (void __iomem *)WIN_OFF(i); 52 TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE
95 53 },
96 writel(0, addr + WIN_BASE_OFF); 54 { 1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
97 writel(0, addr + WIN_CTRL_OFF); 55 TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE
98 if (cpu_win_can_remap(i)) { 56 },
99 writel(0, addr + WIN_REMAP_LO_OFF); 57 { 2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
100 writel(0, addr + WIN_REMAP_HI_OFF); 58 TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE
101 } 59 },
102 } 60 { 3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
103 61 TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE
62 },
104 /* 63 /*
105 * Setup windows for PCIe IO+MEM space. 64 * Window for NAND controller.
106 */ 65 */
107 setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE, 66 { 4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
108 TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE); 67 TARGET_DEV_BUS, ATTR_DEV_NAND, -1
109 setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE, 68 },
110 TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
111 setup_cpu_win(2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
112 TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE);
113 setup_cpu_win(3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
114 TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE);
115
116 /* 69 /*
117 * Setup window for NAND controller. 70 * Window for SRAM.
118 */ 71 */
119 setup_cpu_win(4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, 72 { 5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
120 TARGET_DEV_BUS, ATTR_DEV_NAND, -1); 73 TARGET_SRAM, ATTR_SRAM, -1
74 },
75 /* End marker */
76 { -1, 0, 0, 0, 0, 0 }
77};
121 78
79void __init kirkwood_setup_cpu_mbus(void)
80{
122 /* 81 /*
123 * Setup window for SRAM. 82 * Disable, clear and configure windows.
124 */ 83 */
125 setup_cpu_win(5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE, 84 orion_config_wins(&addr_map_cfg, addr_map_info);
126 TARGET_SRAM, ATTR_SRAM, -1);
127 85
128 /* 86 /*
129 * Setup MBUS dram target info. 87 * Setup MBUS dram target info.
130 */ 88 */
131 kirkwood_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; 89 orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE);
132
133 addr = (void __iomem *)DDR_WINDOW_CPU_BASE;
134
135 for (i = 0, cs = 0; i < 4; i++) {
136 u32 base = readl(addr + DDR_BASE_CS_OFF(i));
137 u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
138
139 /*
140 * Chip select enabled?
141 */
142 if (size & 1) {
143 struct mbus_dram_window *w;
144
145 w = &kirkwood_mbus_dram_info.cs[cs++];
146 w->cs_index = i;
147 w->mbus_attr = 0xf & ~(1 << i);
148 w->base = base & 0xffff0000;
149 w->size = (size | 0x0000ffff) + 1;
150 }
151 }
152 kirkwood_mbus_dram_info.num_cs = cs;
153} 90}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 0bff4a916231..cc15426787b1 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -12,7 +12,6 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
17#include <linux/mtd/nand.h> 16#include <linux/mtd/nand.h>
18#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
@@ -30,6 +29,7 @@
30#include <plat/orion_nand.h> 29#include <plat/orion_nand.h>
31#include <plat/common.h> 30#include <plat/common.h>
32#include <plat/time.h> 31#include <plat/time.h>
32#include <plat/addr-map.h>
33#include "common.h" 33#include "common.h"
34 34
35/***************************************************************************** 35/*****************************************************************************
@@ -73,8 +73,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
73void __init kirkwood_ehci_init(void) 73void __init kirkwood_ehci_init(void)
74{ 74{
75 kirkwood_clk_ctrl |= CGC_USB0; 75 kirkwood_clk_ctrl |= CGC_USB0;
76 orion_ehci_init(&kirkwood_mbus_dram_info, 76 orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
77 USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
78} 77}
79 78
80 79
@@ -85,7 +84,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
85{ 84{
86 kirkwood_clk_ctrl |= CGC_GE0; 85 kirkwood_clk_ctrl |= CGC_GE0;
87 86
88 orion_ge00_init(eth_data, &kirkwood_mbus_dram_info, 87 orion_ge00_init(eth_data,
89 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, 88 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
90 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk); 89 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
91} 90}
@@ -99,7 +98,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
99 98
100 kirkwood_clk_ctrl |= CGC_GE1; 99 kirkwood_clk_ctrl |= CGC_GE1;
101 100
102 orion_ge01_init(eth_data, &kirkwood_mbus_dram_info, 101 orion_ge01_init(eth_data,
103 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, 102 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
104 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk); 103 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
105} 104}
@@ -178,8 +177,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
178 if (sata_data->n_ports > 1) 177 if (sata_data->n_ports > 1)
179 kirkwood_clk_ctrl |= CGC_SATA1; 178 kirkwood_clk_ctrl |= CGC_SATA1;
180 179
181 orion_sata_init(sata_data, &kirkwood_mbus_dram_info, 180 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
182 SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
183} 181}
184 182
185 183
@@ -221,7 +219,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
221 mvsdio_data->clock = 100000000; 219 mvsdio_data->clock = 100000000;
222 else 220 else
223 mvsdio_data->clock = 200000000; 221 mvsdio_data->clock = 200000000;
224 mvsdio_data->dram = &kirkwood_mbus_dram_info;
225 kirkwood_clk_ctrl |= CGC_SDIO; 222 kirkwood_clk_ctrl |= CGC_SDIO;
226 kirkwood_sdio.dev.platform_data = mvsdio_data; 223 kirkwood_sdio.dev.platform_data = mvsdio_data;
227 platform_device_register(&kirkwood_sdio); 224 platform_device_register(&kirkwood_sdio);
@@ -285,8 +282,7 @@ static void __init kirkwood_xor0_init(void)
285{ 282{
286 kirkwood_clk_ctrl |= CGC_XOR0; 283 kirkwood_clk_ctrl |= CGC_XOR0;
287 284
288 orion_xor0_init(&kirkwood_mbus_dram_info, 285 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
289 XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
290 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); 286 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
291} 287}
292 288
@@ -364,7 +360,6 @@ static struct resource kirkwood_i2s_resources[] = {
364}; 360};
365 361
366static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { 362static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
367 .dram = &kirkwood_mbus_dram_info,
368 .burst = 128, 363 .burst = 128,
369}; 364};
370 365
@@ -430,6 +425,8 @@ static char * __init kirkwood_id(void)
430 } else if (dev == MV88F6282_DEV_ID) { 425 } else if (dev == MV88F6282_DEV_ID) {
431 if (rev == MV88F6282_REV_A0) 426 if (rev == MV88F6282_REV_A0)
432 return "MV88F6282-Rev-A0"; 427 return "MV88F6282-Rev-A0";
428 else if (rev == MV88F6282_REV_A1)
429 return "MV88F6282-Rev-A1";
433 else 430 else
434 return "MV88F6282-Rev-Unsupported"; 431 return "MV88F6282-Rev-Unsupported";
435 } else { 432 } else {
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 1529280246d6..9071a397136d 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -30,7 +30,6 @@ void kirkwood_init(void);
30void kirkwood_init_early(void); 30void kirkwood_init_early(void);
31void kirkwood_init_irq(void); 31void kirkwood_init_irq(void);
32 32
33extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
34void kirkwood_setup_cpu_mbus(void); 33void kirkwood_setup_cpu_mbus(void);
35 34
36void kirkwood_enable_pcie(void); 35void kirkwood_enable_pcie(void);
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 010bdeb4ac5f..fede3d503efa 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -135,4 +135,5 @@
135 135
136#define MV88F6282_DEV_ID 0x6282 136#define MV88F6282_DEV_ID 0x6282
137#define MV88F6282_REV_A0 0 137#define MV88F6282_REV_A0 0
138#define MV88F6282_REV_A1 1
138#endif 139#endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index cc431fa22ccb..0c6ad63f10c7 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -10,7 +10,6 @@
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h> 13#include <linux/io.h>
15#include <mach/hardware.h> 14#include <mach/hardware.h>
16#include <plat/mpp.h> 15#include <plat/mpp.h>
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
index ac787957e2d9..e8fda45c0736 100644
--- a/arch/arm/mach-kirkwood/mpp.h
+++ b/arch/arm/mach-kirkwood/mpp.h
@@ -102,6 +102,7 @@
102#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 ) 102#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1, 1 )
103 103
104#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) 104#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 )
105#define MPP12_GPIO MPP( 12, 0x0, 1, 1, 0, 0, 0, 1, 0 )
105#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 ) 106#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1, 1 )
106#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 ) 107#define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 1, 0, 0, 0, 0, 1 )
107#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 ) 108#define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 1, 0, 0, 0, 0, 1 )
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 74b992d810ea..fb451bfe478b 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -11,12 +11,12 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/mbus.h>
15#include <video/vga.h> 14#include <video/vga.h>
16#include <asm/irq.h> 15#include <asm/irq.h>
17#include <asm/mach/pci.h> 16#include <asm/mach/pci.h>
18#include <plat/pcie.h> 17#include <plat/pcie.h>
19#include <mach/bridge-regs.h> 18#include <mach/bridge-regs.h>
19#include <plat/addr-map.h>
20#include "common.h" 20#include "common.h"
21 21
22void kirkwood_enable_pcie(void) 22void kirkwood_enable_pcie(void)
@@ -208,7 +208,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
208 */ 208 */
209 orion_pcie_set_local_bus_nr(pp->base, sys->busnr); 209 orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
210 210
211 orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info); 211 orion_pcie_setup(pp->base);
212 212
213 return 1; 213 return 1;
214} 214}
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 3e6dfab59ef6..17cb76060125 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = {
120 .flags = IORESOURCE_MEM, 120 .flags = IORESOURCE_MEM,
121 }, 121 },
122 [1] = { 122 [1] = {
123 .start = gpio_to_irq(27), 123 .start = MMP_GPIO_TO_IRQ(27),
124 .end = gpio_to_irq(27), 124 .end = MMP_GPIO_TO_IRQ(27),
125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126 } 126 }
127}; 127};
@@ -232,6 +232,7 @@ static void __init common_init(void)
232 pxa168_add_nand(&aspenite_nand_info); 232 pxa168_add_nand(&aspenite_nand_info);
233 pxa168_add_fb(&aspenite_lcd_info); 233 pxa168_add_fb(&aspenite_lcd_info);
234 pxa168_add_keypad(&aspenite_keypad_info); 234 pxa168_add_keypad(&aspenite_keypad_info);
235 platform_device_register(&pxa168_device_gpio);
235 236
236 /* off-chip devices */ 237 /* off-chip devices */
237 platform_device_register(&smc91x_device); 238 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 8de3dc6131a4..b148a9dc5a44 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)
38 38
39 /* on-chip devices */ 39 /* on-chip devices */
40 pxa168_add_uart(2); 40 pxa168_add_uart(2);
41 platform_device_register(&pxa168_device_gpio);
41} 42}
42 43
43MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") 44MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index e16f04b39b15..d839fe6421e6 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -202,6 +202,7 @@ static void __init brownstone_init(void)
202 /* on-chip devices */ 202 /* on-chip devices */
203 mmp2_add_uart(1); 203 mmp2_add_uart(1);
204 mmp2_add_uart(3); 204 mmp2_add_uart(3);
205 platform_device_register(&mmp2_device_gpio);
205 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); 206 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
206 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ 207 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
207 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ 208 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 5a6a27a6cfd0..2ee8cd7829dd 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = {
87 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
88 }, 88 },
89 [1] = { 89 [1] = {
90 .start = gpio_to_irq(155), 90 .start = MMP_GPIO_TO_IRQ(155),
91 .end = gpio_to_irq(155), 91 .end = MMP_GPIO_TO_IRQ(155),
92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
93 } 93 }
94}; 94};
@@ -110,6 +110,7 @@ static void __init flint_init(void)
110 /* on-chip devices */ 110 /* on-chip devices */
111 mmp2_add_uart(1); 111 mmp2_add_uart(1);
112 mmp2_add_uart(2); 112 mmp2_add_uart(2);
113 platform_device_register(&mmp2_device_gpio);
113 114
114 /* off-chip devices */ 115 /* off-chip devices */
115 platform_device_register(&smc91x_device); 116 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 1e3abbe37cac..87765467de63 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)
184 pxa168_add_uart(3); 184 pxa168_add_uart(3);
185 pxa168_add_ssp(1); 185 pxa168_add_ssp(1);
186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); 186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187 platform_device_register(&pxa168_device_gpio);
187 188
188 pxa168_add_eth(&gplugd_eth_platform_data); 189 pxa168_add_eth(&gplugd_eth_platform_data);
189} 190}
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index 99b4ce1b6562..0e135a599f3e 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -2,6 +2,7 @@
2#define __ASM_MACH_GPIO_PXA_H 2#define __ASM_MACH_GPIO_PXA_H
3 3
4#include <mach/addr-map.h> 4#include <mach/addr-map.h>
5#include <mach/cputype.h>
5#include <mach/irqs.h> 6#include <mach/irqs.h>
6 7
7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) 8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
@@ -9,8 +10,6 @@
9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) 11#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
11 12
12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13
14#define gpio_to_bank(gpio) ((gpio) >> 5) 13#define gpio_to_bank(gpio) ((gpio) >> 5)
15 14
16/* NOTE: these macros are defined here to make optimization of 15/* NOTE: these macros are defined here to make optimization of
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 681262359d1c..13219ebf5128 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,11 +3,6 @@
3 3
4#include <asm-generic/gpio.h> 4#include <asm-generic/gpio.h>
5 5
6#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 6#include <mach/cputype.h>
7#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
8 7
9#define __gpio_is_inverted(gpio) (0)
10#define __gpio_is_occupied(gpio) (0)
11
12#include <plat/gpio.h>
13#endif /* __ASM_MACH_GPIO_H */ 8#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index a09d328e2ddd..34635a0bbb59 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -219,10 +219,10 @@
219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2) 219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2)
220 220
221#define IRQ_GPIO_START 128 221#define IRQ_GPIO_START 128
222#define IRQ_GPIO_NUM 192 222#define MMP_NR_BUILTIN_GPIO 192
223#define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) 223#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio))
224 224
225#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) 225#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
226 226
227#define NR_IRQS (IRQ_BOARD_START) 227#define NR_IRQS (IRQ_BOARD_START)
228 228
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 2f7b2d3c2b18..cba22fed2265 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3;
32extern struct pxa_device_desc mmp2_device_asram; 32extern struct pxa_device_desc mmp2_device_asram;
33extern struct pxa_device_desc mmp2_device_isram; 33extern struct pxa_device_desc mmp2_device_isram;
34 34
35extern struct platform_device mmp2_device_gpio;
36
35static inline int mmp2_add_uart(int id) 37static inline int mmp2_add_uart(int id)
36{ 38{
37 struct pxa_device_desc *d = NULL; 39 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index a677aa732c26..dc03d580a06d 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -43,6 +43,8 @@ struct pxa168_usb_pdata {
43/* pdata can be NULL */ 43/* pdata can be NULL */
44int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); 44int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
45 45
46extern struct platform_device pxa168_device_gpio;
47
46static inline int pxa168_add_uart(int id) 48static inline int pxa168_add_uart(int id)
47{ 49{
48 struct pxa_device_desc *d = NULL; 50 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 91be75591398..4de13abef7bb 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
21extern struct pxa_device_desc pxa910_device_pwm4; 21extern struct pxa_device_desc pxa910_device_pwm4;
22extern struct pxa_device_desc pxa910_device_nand; 22extern struct pxa_device_desc pxa910_device_nand;
23 23
24extern struct platform_device pxa910_device_gpio;
25
24static inline int pxa910_add_uart(int id) 26static inline int pxa910_add_uart(int id)
25{ 27{
26 struct pxa_device_desc *d = NULL; 28 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 5dd1d4a6aeb9..617c60a170a4 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/hardware/cache-tauros2.h> 18#include <asm/hardware/cache-tauros2.h>
18 19
@@ -24,7 +25,6 @@
24#include <mach/irqs.h> 25#include <mach/irqs.h>
25#include <mach/dma.h> 26#include <mach/dma.h>
26#include <mach/mfp.h> 27#include <mach/mfp.h>
27#include <mach/gpio-pxa.h>
28#include <mach/devices.h> 28#include <mach/devices.h>
29#include <mach/mmp2.h> 29#include <mach/mmp2.h>
30 30
@@ -33,8 +33,6 @@
33 33
34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
35 35
36#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
37
38static struct mfp_addr_map mmp2_addr_map[] __initdata = { 36static struct mfp_addr_map mmp2_addr_map[] __initdata = {
39 37
40 MFP_ADDR_X(GPIO0, GPIO58, 0x54), 38 MFP_ADDR_X(GPIO0, GPIO58, 0x54),
@@ -95,24 +93,9 @@ void mmp2_clear_pmic_int(void)
95 __raw_writel(data, mfpr_pmic); 93 __raw_writel(data, mfpr_pmic);
96} 94}
97 95
98static void __init mmp2_init_gpio(void)
99{
100 int i;
101
102 /* enable GPIO clock */
103 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
104
105 /* unmask GPIO edge detection for all 6 banks -- APMASKx */
106 for (i = 0; i < 6; i++)
107 __raw_writel(0xffffffff, APMASK(i));
108
109 pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
110}
111
112void __init mmp2_init_irq(void) 96void __init mmp2_init_irq(void)
113{ 97{
114 mmp2_init_icu(); 98 mmp2_init_icu();
115 mmp2_init_gpio();
116} 99}
117 100
118static void sdhc_clk_enable(struct clk *clk) 101static void sdhc_clk_enable(struct clk *clk)
@@ -149,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
149static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); 132static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
150static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); 133static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
151static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 134static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
135static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
152 136
153static APMU_CLK(nand, NAND, 0xbf, 100000000); 137static APMU_CLK(nand, NAND, 0xbf, 100000000);
154static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); 138static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -168,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {
168 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 152 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
169 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 153 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
170 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 154 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
155 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
171 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), 156 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
172 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), 157 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
173 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), 158 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
@@ -230,3 +215,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
230/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ 215/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
231MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); 216MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
232 217
218struct resource mmp2_resource_gpio[] = {
219 {
220 .start = 0xd4019000,
221 .end = 0xd4019fff,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = IRQ_MMP2_GPIO,
225 .end = IRQ_MMP2_GPIO,
226 .flags = IORESOURCE_IRQ,
227 },
228};
229
230struct platform_device mmp2_device_gpio = {
231 .name = "pxa-gpio",
232 .id = -1,
233 .num_resources = ARRAY_SIZE(mmp2_resource_gpio),
234 .resource = mmp2_resource_gpio,
235};
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 13f23867a86a..7bc17eaa12eb 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/mach/time.h> 18#include <asm/mach/time.h>
18#include <mach/addr-map.h> 19#include <mach/addr-map.h>
@@ -20,7 +21,6 @@
20#include <mach/regs-apbc.h> 21#include <mach/regs-apbc.h>
21#include <mach/regs-apmu.h> 22#include <mach/regs-apmu.h>
22#include <mach/irqs.h> 23#include <mach/irqs.h>
23#include <mach/gpio-pxa.h>
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
@@ -43,26 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
43 MFP_ADDR_END, 43 MFP_ADDR_END,
44}; 44};
45 45
46#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
47
48static void __init pxa168_init_gpio(void)
49{
50 int i;
51
52 /* enable GPIO clock */
53 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
54
55 /* unmask GPIO edge detection for all 4 banks - APMASKx */
56 for (i = 0; i < 4; i++)
57 __raw_writel(0xffffffff, APMASK(i));
58
59 pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
60}
61
62void __init pxa168_init_irq(void) 46void __init pxa168_init_irq(void)
63{ 47{
64 icu_init_irq(); 48 icu_init_irq();
65 pxa168_init_gpio();
66} 49}
67 50
68/* APB peripheral clocks */ 51/* APB peripheral clocks */
@@ -80,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
80static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); 63static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
81static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); 64static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
82static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); 65static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
66static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
83static APBC_CLK(keypad, PXA168_KPC, 0, 32000); 67static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
84 68
85static APMU_CLK(nand, NAND, 0x19b, 156000000); 69static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -105,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {
105 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), 89 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
106 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
107 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), 91 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
92 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
108 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), 93 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
109 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), 94 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
110 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), 95 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
@@ -174,6 +159,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
174PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); 159PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
175PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); 160PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
176 161
162struct resource pxa168_resource_gpio[] = {
163 {
164 .start = 0xd4019000,
165 .end = 0xd4019fff,
166 .flags = IORESOURCE_MEM,
167 }, {
168 .start = IRQ_PXA168_GPIOX,
169 .end = IRQ_PXA168_GPIOX,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174struct platform_device pxa168_device_gpio = {
175 .name = "pxa-gpio",
176 .id = -1,
177 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
178 .resource = pxa168_resource_gpio,
179};
180
177struct resource pxa168_usb_host_resources[] = { 181struct resource pxa168_usb_host_resources[] = {
178 /* USB Host conroller register base */ 182 /* USB Host conroller register base */
179 [0] = { 183 [0] = {
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4ebbfbba39fc..3241a25784d0 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/platform_device.h>
15 16
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
17#include <mach/addr-map.h> 18#include <mach/addr-map.h>
@@ -19,7 +20,6 @@
19#include <mach/regs-apmu.h> 20#include <mach/regs-apmu.h>
20#include <mach/cputype.h> 21#include <mach/cputype.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/gpio-pxa.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/mfp.h> 24#include <mach/mfp.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
@@ -77,26 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
77 MFP_ADDR_END, 77 MFP_ADDR_END,
78}; 78};
79 79
80#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
81
82static void __init pxa910_init_gpio(void)
83{
84 int i;
85
86 /* enable GPIO clock */
87 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
88
89 /* unmask GPIO edge detection for all 4 banks - APMASKx */
90 for (i = 0; i < 4; i++)
91 __raw_writel(0xffffffff, APMASK(i));
92
93 pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
94}
95
96void __init pxa910_init_irq(void) 80void __init pxa910_init_irq(void)
97{ 81{
98 icu_init_irq(); 82 icu_init_irq();
99 pxa910_init_gpio();
100} 83}
101 84
102/* APB peripheral clocks */ 85/* APB peripheral clocks */
@@ -108,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
108static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); 91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
109static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); 92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
110static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
94static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
111 95
112static APMU_CLK(nand, NAND, 0x19b, 156000000); 96static APMU_CLK(nand, NAND, 0x19b, 156000000);
113static APMU_CLK(u2o, USB, 0x1b, 480000000); 97static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -123,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = {
123 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 107 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
124 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 108 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
125 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 109 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
110 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
126 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), 111 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
127}; 112};
128 113
@@ -179,3 +164,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
179PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); 164PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
180PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); 165PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
181PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 166PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
167
168struct resource pxa910_resource_gpio[] = {
169 {
170 .start = 0xd4019000,
171 .end = 0xd4019fff,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PXA910_AP_GPIO,
175 .end = IRQ_PXA910_AP_GPIO,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180struct platform_device pxa910_device_gpio = {
181 .name = "pxa-gpio",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
184 .resource = pxa910_resource_gpio,
185};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 257a21283ec1..8e3b5af04a57 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -19,6 +19,7 @@
19#include <mach/addr-map.h> 19#include <mach/addr-map.h>
20#include <mach/mfp-pxa910.h> 20#include <mach/mfp-pxa910.h>
21#include <mach/pxa910.h> 21#include <mach/pxa910.h>
22#include <mach/irqs.h>
22 23
23#include "common.h" 24#include "common.h"
24 25
@@ -71,8 +72,8 @@ static struct resource smc91x_resources[] = {
71 .flags = IORESOURCE_MEM, 72 .flags = IORESOURCE_MEM,
72 }, 73 },
73 [1] = { 74 [1] = {
74 .start = gpio_to_irq(80), 75 .start = MMP_GPIO_TO_IRQ(80),
75 .end = gpio_to_irq(80), 76 .end = MMP_GPIO_TO_IRQ(80),
76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 77 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
77 } 78 }
78}; 79};
@@ -93,6 +94,7 @@ static void __init tavorevb_init(void)
93 94
94 /* on-chip devices */ 95 /* on-chip devices */
95 pxa910_add_uart(1); 96 pxa910_add_uart(1);
97 platform_device_register(&pxa910_device_gpio);
96 98
97 /* off-chip devices */ 99 /* off-chip devices */
98 platform_device_register(&smc91x_device); 100 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 8ac22a62bf1a..0523e422990e 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
66static struct i2c_board_info teton_bga_i2c_info[] __initdata = { 66static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
67 { 67 {
68 I2C_BOARD_INFO("ds1337", 0x68), 68 I2C_BOARD_INFO("ds1337", 0x68),
69 .irq = gpio_to_irq(RTC_INT_GPIO) 69 .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
70 }, 70 },
71}; 71};
72 72
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)
78 pxa168_add_uart(1); 78 pxa168_add_uart(1);
79 pxa168_add_keypad(&teton_bga_keypad_info); 79 pxa168_add_keypad(&teton_bga_keypad_info);
80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); 80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
81 platform_device_register(&pxa168_device_gpio);
81} 82}
82 83
83MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") 84MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index f02658825576..5ac5d5832e45 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -24,12 +24,13 @@
24#include <mach/addr-map.h> 24#include <mach/addr-map.h>
25#include <mach/mfp-pxa910.h> 25#include <mach/mfp-pxa910.h>
26#include <mach/pxa910.h> 26#include <mach/pxa910.h>
27#include <mach/irqs.h>
27 28
28#include "common.h" 29#include "common.h"
29 30
30#define TTCDKB_GPIO_EXT0(x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ 31#define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \
31 ((x < 16) ? x : 15))) 32 ((x < 16) ? x : 15)))
32#define TTCDKB_GPIO_EXT1(x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ 33#define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
33 ((x < 16) ? x : 15))) 34 ((x < 16) ? x : 15)))
34 35
35/* 36/*
@@ -122,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = {
122}; 123};
123 124
124static struct platform_device *ttc_dkb_devices[] = { 125static struct platform_device *ttc_dkb_devices[] = {
126 &pxa910_device_gpio,
125 &ttc_dkb_device_onenand, 127 &ttc_dkb_device_onenand,
126}; 128};
127 129
@@ -136,7 +138,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
136 { 138 {
137 .type = "max7312", 139 .type = "max7312",
138 .addr = 0x23, 140 .addr = 0x23,
139 .irq = IRQ_GPIO(80), 141 .irq = MMP_GPIO_TO_IRQ(80),
140 .platform_data = &max7312_data, 142 .platform_data = &max7312_data,
141 }, 143 },
142}; 144};
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index e6beaff7621e..1cd40ad301d3 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -13,7 +13,6 @@ config ARCH_MSM7X00A
13 select CPU_V6 13 select CPU_V6
14 select GPIO_MSM_V1 14 select GPIO_MSM_V1
15 select MSM_PROC_COMM 15 select MSM_PROC_COMM
16 select HAS_MSM_DEBUG_UART_PHYS
17 16
18config ARCH_MSM7X30 17config ARCH_MSM7X30
19 bool "MSM7x30" 18 bool "MSM7x30"
@@ -25,7 +24,6 @@ config ARCH_MSM7X30
25 select MSM_GPIOMUX 24 select MSM_GPIOMUX
26 select GPIO_MSM_V1 25 select GPIO_MSM_V1
27 select MSM_PROC_COMM 26 select MSM_PROC_COMM
28 select HAS_MSM_DEBUG_UART_PHYS
29 27
30config ARCH_QSD8X50 28config ARCH_QSD8X50
31 bool "QSD8X50" 29 bool "QSD8X50"
@@ -37,7 +35,6 @@ config ARCH_QSD8X50
37 select MSM_GPIOMUX 35 select MSM_GPIOMUX
38 select GPIO_MSM_V1 36 select GPIO_MSM_V1
39 select MSM_PROC_COMM 37 select MSM_PROC_COMM
40 select HAS_MSM_DEBUG_UART_PHYS
41 38
42config ARCH_MSM8X60 39config ARCH_MSM8X60
43 bool "MSM8X60" 40 bool "MSM8X60"
@@ -63,6 +60,9 @@ config ARCH_MSM8960
63 60
64endchoice 61endchoice
65 62
63config MSM_HAS_DEBUG_UART_HS
64 bool
65
66config MSM_SOC_REV_A 66config MSM_SOC_REV_A
67 bool 67 bool
68config ARCH_MSM_SCORPIONMP 68config ARCH_MSM_SCORPIONMP
@@ -74,9 +74,6 @@ config ARCH_MSM_ARM11
74config ARCH_MSM_SCORPION 74config ARCH_MSM_SCORPION
75 bool 75 bool
76 76
77config HAS_MSM_DEBUG_UART_PHYS
78 bool
79
80config MSM_VIC 77config MSM_VIC
81 bool 78 bool
82 79
@@ -153,32 +150,6 @@ config MACH_MSM8960_RUMI3
153 150
154endmenu 151endmenu
155 152
156config MSM_DEBUG_UART
157 int
158 default 1 if MSM_DEBUG_UART1
159 default 2 if MSM_DEBUG_UART2
160 default 3 if MSM_DEBUG_UART3
161
162if HAS_MSM_DEBUG_UART_PHYS
163choice
164 prompt "Debug UART"
165
166 default MSM_DEBUG_UART_NONE
167
168 config MSM_DEBUG_UART_NONE
169 bool "None"
170
171 config MSM_DEBUG_UART1
172 bool "UART1"
173
174 config MSM_DEBUG_UART2
175 bool "UART2"
176
177 config MSM_DEBUG_UART3
178 bool "UART3"
179endchoice
180endif
181
182config MSM_SMD_PKG3 153config MSM_SMD_PKG3
183 bool 154 bool
184 155
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 2dc73ccddb11..3ffd8668c9a5 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -1,6 +1,7 @@
1/* arch/arm/mach-msm7200/include/mach/debug-macro.S 1/*
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 * Author: Brian Swetland <swetland@google.com> 5 * Author: Brian Swetland <swetland@google.com>
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
@@ -14,40 +15,52 @@
14 * 15 *
15 */ 16 */
16 17
17
18
19#include <mach/hardware.h> 18#include <mach/hardware.h>
20#include <mach/msm_iomap.h> 19#include <mach/msm_iomap.h>
21 20
22#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
23 .macro addruart, rp, rv, tmp 21 .macro addruart, rp, rv, tmp
22#ifdef MSM_DEBUG_UART_PHYS
24 ldr \rp, =MSM_DEBUG_UART_PHYS 23 ldr \rp, =MSM_DEBUG_UART_PHYS
25 ldr \rv, =MSM_DEBUG_UART_BASE 24 ldr \rv, =MSM_DEBUG_UART_BASE
25#endif
26 .endm 26 .endm
27 27
28 .macro senduart,rd,rx 28 .macro senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
31 str \rd, [\rx, #0x70]
32#else
29 teq \rx, #0 33 teq \rx, #0
30 strne \rd, [\rx, #0x0C] 34 strne \rd, [\rx, #0x0C]
35#endif
31 .endm 36 .endm
32 37
33 .macro waituart,rd,rx 38 .macro waituart, rd, rx
39#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
40 @ check for TX_EMT in UARTDM_SR
41 ldr \rd, [\rx, #0x08]
42 tst \rd, #0x08
43 bne 1002f
44 @ wait for TXREADY in UARTDM_ISR
451001: ldr \rd, [\rx, #0x14]
46 tst \rd, #0x80
47 beq 1001b
481002:
49 @ Clear TX_READY by writing to the UARTDM_CR register
50 mov \rd, #0x300
51 str \rd, [\rx, #0x10]
52 @ Write 0x1 to NCF register
53 mov \rd, #0x1
54 str \rd, [\rx, #0x40]
55 @ UARTDM reg. Read to induce delay
56 ldr \rd, [\rx, #0x08]
57#else
34 @ wait for TX_READY 58 @ wait for TX_READY
351001: ldr \rd, [\rx, #0x08] 591001: ldr \rd, [\rx, #0x08]
36 tst \rd, #0x04 60 tst \rd, #0x04
37 beq 1001b 61 beq 1001b
38 .endm
39#else
40 .macro addruart, rp, rv, tmp
41 mov \rv, #0xff000000
42 orr \rv, \rv, #0x00f00000
43 .endm
44
45 .macro senduart,rd,rx
46 .endm
47
48 .macro waituart,rd,rx
49 .endm
50#endif 62#endif
63 .endm
51 64
52 .macro busyuart,rd,rx 65 .macro busyuart, rd, rx
53 .endm 66 .endm
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 94fe9fe6feb3..8af46123dab6 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -78,18 +78,6 @@
78#define MSM_UART3_PHYS 0xA9C00000 78#define MSM_UART3_PHYS 0xA9C00000
79#define MSM_UART3_SIZE SZ_4K 79#define MSM_UART3_SIZE SZ_4K
80 80
81#ifdef CONFIG_MSM_DEBUG_UART
82#define MSM_DEBUG_UART_BASE 0xE1000000
83#if CONFIG_MSM_DEBUG_UART == 1
84#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
85#elif CONFIG_MSM_DEBUG_UART == 2
86#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
87#elif CONFIG_MSM_DEBUG_UART == 3
88#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
89#endif
90#define MSM_DEBUG_UART_SIZE SZ_4K
91#endif
92
93#define MSM_SDC1_PHYS 0xA0400000 81#define MSM_SDC1_PHYS 0xA0400000
94#define MSM_SDC1_SIZE SZ_4K 82#define MSM_SDC1_SIZE SZ_4K
95 83
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 37694442d1bd..198202c267c8 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -89,18 +89,6 @@
89#define MSM_UART3_PHYS 0xACC00000 89#define MSM_UART3_PHYS 0xACC00000
90#define MSM_UART3_SIZE SZ_4K 90#define MSM_UART3_SIZE SZ_4K
91 91
92#ifdef CONFIG_MSM_DEBUG_UART
93#define MSM_DEBUG_UART_BASE 0xE1000000
94#if CONFIG_MSM_DEBUG_UART == 1
95#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
96#elif CONFIG_MSM_DEBUG_UART == 2
97#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
98#elif CONFIG_MSM_DEBUG_UART == 3
99#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
100#endif
101#define MSM_DEBUG_UART_SIZE SZ_4K
102#endif
103
104#define MSM_MDC_BASE IOMEM(0xE0200000) 92#define MSM_MDC_BASE IOMEM(0xE0200000)
105#define MSM_MDC_PHYS 0xAA500000 93#define MSM_MDC_PHYS 0xAA500000
106#define MSM_MDC_SIZE SZ_1M 94#define MSM_MDC_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 3c9d9602a318..800b55767e6b 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -45,4 +45,9 @@
45#define MSM8960_TMR0_PHYS 0x0208A000 45#define MSM8960_TMR0_PHYS 0x0208A000
46#define MSM8960_TMR0_SIZE SZ_4K 46#define MSM8960_TMR0_SIZE SZ_4K
47 47
48#ifdef CONFIG_DEBUG_MSM8960_UART
49#define MSM_DEBUG_UART_BASE 0xE1040000
50#define MSM_DEBUG_UART_PHYS 0x16440000
51#endif
52
48#endif 53#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index d67cd73316f4..0faa894729b7 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -83,18 +83,6 @@
83#define MSM_UART3_PHYS 0xA9C00000 83#define MSM_UART3_PHYS 0xA9C00000
84#define MSM_UART3_SIZE SZ_4K 84#define MSM_UART3_SIZE SZ_4K
85 85
86#ifdef CONFIG_MSM_DEBUG_UART
87#define MSM_DEBUG_UART_BASE 0xE1000000
88#if CONFIG_MSM_DEBUG_UART == 1
89#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
90#elif CONFIG_MSM_DEBUG_UART == 2
91#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
92#elif CONFIG_MSM_DEBUG_UART == 3
93#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
94#endif
95#define MSM_DEBUG_UART_SIZE SZ_4K
96#endif
97
98#define MSM_MDC_BASE IOMEM(0xE0200000) 86#define MSM_MDC_BASE IOMEM(0xE0200000)
99#define MSM_MDC_PHYS 0xAA500000 87#define MSM_MDC_PHYS 0xAA500000
100#define MSM_MDC_SIZE SZ_1M 88#define MSM_MDC_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 3b19b8f244b8..54e12caa8d86 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -62,4 +62,9 @@
62#define MSM8X60_TMR0_PHYS 0x02040000 62#define MSM8X60_TMR0_PHYS 0x02040000
63#define MSM8X60_TMR0_SIZE SZ_4K 63#define MSM8X60_TMR0_SIZE SZ_4K
64 64
65#ifdef CONFIG_DEBUG_MSM8660_UART
66#define MSM_DEBUG_UART_BASE 0xE1040000
67#define MSM_DEBUG_UART_PHYS 0x19C40000
68#endif
69
65#endif 70#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 4ded15238b60..90682f4599d3 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -55,6 +55,18 @@
55 55
56#include "msm_iomap-8960.h" 56#include "msm_iomap-8960.h"
57 57
58#define MSM_DEBUG_UART_SIZE SZ_4K
59#if defined(CONFIG_DEBUG_MSM_UART1)
60#define MSM_DEBUG_UART_BASE 0xE1000000
61#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
62#elif defined(CONFIG_DEBUG_MSM_UART2)
63#define MSM_DEBUG_UART_BASE 0xE1000000
64#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
65#elif defined(CONFIG_DEBUG_MSM_UART3)
66#define MSM_DEBUG_UART_BASE 0xE1000000
67#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
68#endif
69
58/* Virtual addresses shared across all MSM targets. */ 70/* Virtual addresses shared across all MSM targets. */
59#define MSM_CSR_BASE IOMEM(0xE0001000) 71#define MSM_CSR_BASE IOMEM(0xE0001000)
60#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) 72#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index d94292c29d8e..169a84007456 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -1,6 +1,6 @@
1/* arch/arm/mach-msm/include/mach/uncompress.h 1/*
2 *
3 * Copyright (C) 2007 Google, Inc. 2 * Copyright (C) 2007 Google, Inc.
3 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 * 4 *
5 * This software is licensed under the terms of the GNU General Public 5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and 6 * License version 2, as published by the Free Software Foundation, and
@@ -14,17 +14,40 @@
14 */ 14 */
15 15
16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H 16#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17#define __ASM_ARCH_MSM_UNCOMPRESS_H
18
19#include <asm/processor.h>
20#include <mach/msm_iomap.h>
21
22#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
23#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
17 24
18#include "hardware.h" 25#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
19#include "linux/io.h" 26#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
20#include "mach/msm_iomap.h" 27#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
28#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
29#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
21 30
22static void putc(int c) 31static void putc(int c)
23{ 32{
24#if defined(MSM_DEBUG_UART_PHYS) 33#if defined(MSM_DEBUG_UART_PHYS)
25 unsigned base = MSM_DEBUG_UART_PHYS; 34#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
26 while (!(readl(base + 0x08) & 0x04)) ; 35 /*
27 writel(c, base + 0x0c); 36 * Wait for TX_READY to be set; but skip it if we have a
37 * TX underrun.
38 */
39 if (UART_DM_SR & 0x08)
40 while (!(UART_DM_ISR & 0x80))
41 cpu_relax();
42
43 UART_DM_CR = 0x300;
44 UART_DM_NCHAR = 0x1;
45 UART_DM_TF = c;
46#else
47 while (!(UART_CSR & 0x04))
48 cpu_relax();
49 UART_TF = c;
50#endif
28#endif 51#endif
29} 52}
30 53
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 8759ecf7454f..578b04e42deb 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = {
47 MSM_CHIP_DEVICE(GPIO1, MSM7X00), 47 MSM_CHIP_DEVICE(GPIO1, MSM7X00),
48 MSM_CHIP_DEVICE(GPIO2, MSM7X00), 48 MSM_CHIP_DEVICE(GPIO2, MSM7X00),
49 MSM_DEVICE(CLK_CTL), 49 MSM_DEVICE(CLK_CTL),
50#ifdef CONFIG_MSM_DEBUG_UART 50#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
51 defined(CONFIG_DEBUG_MSM_UART3)
51 MSM_DEVICE(DEBUG_UART), 52 MSM_DEVICE(DEBUG_UART),
52#endif 53#endif
53#ifdef CONFIG_ARCH_MSM7X30 54#ifdef CONFIG_ARCH_MSM7X30
@@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
84 MSM_DEVICE(SCPLL), 85 MSM_DEVICE(SCPLL),
85 MSM_DEVICE(AD5), 86 MSM_DEVICE(AD5),
86 MSM_DEVICE(MDC), 87 MSM_DEVICE(MDC),
87#ifdef CONFIG_MSM_DEBUG_UART 88#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
89 defined(CONFIG_DEBUG_MSM_UART3)
88 MSM_DEVICE(DEBUG_UART), 90 MSM_DEVICE(DEBUG_UART),
89#endif 91#endif
90 { 92 {
@@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = {
109 MSM_CHIP_DEVICE(TMR0, MSM8X60), 111 MSM_CHIP_DEVICE(TMR0, MSM8X60),
110 MSM_DEVICE(ACC), 112 MSM_DEVICE(ACC),
111 MSM_DEVICE(GCC), 113 MSM_DEVICE(GCC),
114#ifdef CONFIG_DEBUG_MSM8660_UART
115 MSM_DEVICE(DEBUG_UART),
116#endif
112}; 117};
113 118
114void __init msm_map_msm8x60_io(void) 119void __init msm_map_msm8x60_io(void)
@@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = {
123 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), 128 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
124 MSM_CHIP_DEVICE(TMR, MSM8960), 129 MSM_CHIP_DEVICE(TMR, MSM8960),
125 MSM_CHIP_DEVICE(TMR0, MSM8960), 130 MSM_CHIP_DEVICE(TMR0, MSM8960),
131#ifdef CONFIG_DEBUG_MSM8960_UART
132 MSM_DEVICE(DEBUG_UART),
133#endif
126}; 134};
127 135
128void __init msm_map_msm8960_io(void) 136void __init msm_map_msm8960_io(void)
@@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
146 MSM_DEVICE(SAW), 154 MSM_DEVICE(SAW),
147 MSM_DEVICE(GCC), 155 MSM_DEVICE(GCC),
148 MSM_DEVICE(TCSR), 156 MSM_DEVICE(TCSR),
149#ifdef CONFIG_MSM_DEBUG_UART 157#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
158 defined(CONFIG_DEBUG_MSM_UART3)
150 MSM_DEVICE(DEBUG_UART), 159 MSM_DEVICE(DEBUG_UART),
151#endif 160#endif
152 { 161 {
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index fdec58aaa35c..0b3e357c4c8c 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
79 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), 79 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
80 SCM_FLAG_COLDBOOT_CPU1); 80 SCM_FLAG_COLDBOOT_CPU1);
81 if (ret == 0) { 81 if (ret == 0) {
82 void *sc1_base_ptr; 82 void __iomem *sc1_base_ptr;
83 sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); 83 sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2);
84 if (sc1_base_ptr) { 84 if (sc1_base_ptr) {
85 writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); 85 writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL);
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index afeeca52fc66..11d0d8f2656c 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -1,6 +1,7 @@
1/* linux/arch/arm/mach-msm/timer.c 1/*
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
4 * 5 *
5 * This software is licensed under the terms of the GNU General Public 6 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and 7 * License version 2, as published by the Free Software Foundation, and
@@ -13,306 +14,207 @@
13 * 14 *
14 */ 15 */
15 16
17#include <linux/clocksource.h>
18#include <linux/clockchips.h>
16#include <linux/init.h> 19#include <linux/init.h>
17#include <linux/time.h>
18#include <linux/interrupt.h> 20#include <linux/interrupt.h>
19#include <linux/irq.h> 21#include <linux/irq.h>
20#include <linux/clk.h>
21#include <linux/clockchips.h>
22#include <linux/delay.h>
23#include <linux/io.h> 22#include <linux/io.h>
24 23
25#include <asm/mach/time.h> 24#include <asm/mach/time.h>
26#include <asm/hardware/gic.h> 25#include <asm/hardware/gic.h>
26#include <asm/localtimer.h>
27 27
28#include <mach/msm_iomap.h> 28#include <mach/msm_iomap.h>
29#include <mach/cpu.h> 29#include <mach/cpu.h>
30#include <mach/board.h>
30 31
31#define TIMER_MATCH_VAL 0x0000 32#define TIMER_MATCH_VAL 0x0000
32#define TIMER_COUNT_VAL 0x0004 33#define TIMER_COUNT_VAL 0x0004
33#define TIMER_ENABLE 0x0008 34#define TIMER_ENABLE 0x0008
34#define TIMER_ENABLE_CLR_ON_MATCH_EN 2 35#define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1)
35#define TIMER_ENABLE_EN 1 36#define TIMER_ENABLE_EN BIT(0)
36#define TIMER_CLEAR 0x000C 37#define TIMER_CLEAR 0x000C
37#define DGT_CLK_CTL 0x0034 38#define DGT_CLK_CTL 0x0034
38enum { 39#define DGT_CLK_CTL_DIV_4 0x3
39 DGT_CLK_CTL_DIV_1 = 0,
40 DGT_CLK_CTL_DIV_2 = 1,
41 DGT_CLK_CTL_DIV_3 = 2,
42 DGT_CLK_CTL_DIV_4 = 3,
43};
44#define CSR_PROTECTION 0x0020
45#define CSR_PROTECTION_EN 1
46 40
47#define GPT_HZ 32768 41#define GPT_HZ 32768
48 42
49enum timer_location { 43#define MSM_DGT_SHIFT 5
50 LOCAL_TIMER = 0,
51 GLOBAL_TIMER = 1,
52};
53
54#define MSM_GLOBAL_TIMER MSM_CLOCK_DGT
55
56/* TODO: Remove these ifdefs */
57#if defined(CONFIG_ARCH_QSD8X50)
58#define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */
59#define MSM_DGT_SHIFT (0)
60#elif defined(CONFIG_ARCH_MSM7X30)
61#define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */
62#define MSM_DGT_SHIFT (0)
63#elif defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960)
64#define DGT_HZ (27000000 / 4) /* 27 MHz (PXO) / 4 by default */
65#define MSM_DGT_SHIFT (0)
66#else
67#define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */
68#define MSM_DGT_SHIFT (5)
69#endif
70 44
71struct msm_clock { 45static void __iomem *event_base;
72 struct clock_event_device clockevent;
73 struct clocksource clocksource;
74 unsigned int irq;
75 void __iomem *regbase;
76 uint32_t freq;
77 uint32_t shift;
78 void __iomem *global_counter;
79 void __iomem *local_counter;
80 union {
81 struct clock_event_device *evt;
82 struct clock_event_device __percpu **percpu_evt;
83 };
84};
85
86enum {
87 MSM_CLOCK_GPT,
88 MSM_CLOCK_DGT,
89 NR_TIMERS,
90};
91
92
93static struct msm_clock msm_clocks[];
94 46
95static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) 47static irqreturn_t msm_timer_interrupt(int irq, void *dev_id)
96{ 48{
97 struct clock_event_device *evt = *(struct clock_event_device **)dev_id; 49 struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
98 if (evt->event_handler == NULL) 50 /* Stop the timer tick */
99 return IRQ_HANDLED; 51 if (evt->mode == CLOCK_EVT_MODE_ONESHOT) {
52 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
53 ctrl &= ~TIMER_ENABLE_EN;
54 writel_relaxed(ctrl, event_base + TIMER_ENABLE);
55 }
100 evt->event_handler(evt); 56 evt->event_handler(evt);
101 return IRQ_HANDLED; 57 return IRQ_HANDLED;
102} 58}
103 59
104static cycle_t msm_read_timer_count(struct clocksource *cs)
105{
106 struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource);
107
108 /*
109 * Shift timer count down by a constant due to unreliable lower bits
110 * on some targets.
111 */
112 return readl(clk->global_counter) >> clk->shift;
113}
114
115static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)
116{
117#ifdef CONFIG_SMP
118 int i;
119 for (i = 0; i < NR_TIMERS; i++)
120 if (evt == &(msm_clocks[i].clockevent))
121 return &msm_clocks[i];
122 return &msm_clocks[MSM_GLOBAL_TIMER];
123#else
124 return container_of(evt, struct msm_clock, clockevent);
125#endif
126}
127
128static int msm_timer_set_next_event(unsigned long cycles, 60static int msm_timer_set_next_event(unsigned long cycles,
129 struct clock_event_device *evt) 61 struct clock_event_device *evt)
130{ 62{
131 struct msm_clock *clock = clockevent_to_clock(evt); 63 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
132 uint32_t now = readl(clock->local_counter);
133 uint32_t alarm = now + (cycles << clock->shift);
134 64
135 writel(alarm, clock->regbase + TIMER_MATCH_VAL); 65 writel_relaxed(0, event_base + TIMER_CLEAR);
66 writel_relaxed(cycles, event_base + TIMER_MATCH_VAL);
67 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE);
136 return 0; 68 return 0;
137} 69}
138 70
139static void msm_timer_set_mode(enum clock_event_mode mode, 71static void msm_timer_set_mode(enum clock_event_mode mode,
140 struct clock_event_device *evt) 72 struct clock_event_device *evt)
141{ 73{
142 struct msm_clock *clock = clockevent_to_clock(evt); 74 u32 ctrl;
75
76 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
77 ctrl &= ~(TIMER_ENABLE_EN | TIMER_ENABLE_CLR_ON_MATCH_EN);
143 78
144 switch (mode) { 79 switch (mode) {
145 case CLOCK_EVT_MODE_RESUME: 80 case CLOCK_EVT_MODE_RESUME:
146 case CLOCK_EVT_MODE_PERIODIC: 81 case CLOCK_EVT_MODE_PERIODIC:
147 break; 82 break;
148 case CLOCK_EVT_MODE_ONESHOT: 83 case CLOCK_EVT_MODE_ONESHOT:
149 writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE); 84 /* Timer is enabled in set_next_event */
150 break; 85 break;
151 case CLOCK_EVT_MODE_UNUSED: 86 case CLOCK_EVT_MODE_UNUSED:
152 case CLOCK_EVT_MODE_SHUTDOWN: 87 case CLOCK_EVT_MODE_SHUTDOWN:
153 writel(0, clock->regbase + TIMER_ENABLE);
154 break; 88 break;
155 } 89 }
90 writel_relaxed(ctrl, event_base + TIMER_ENABLE);
156} 91}
157 92
158static struct msm_clock msm_clocks[] = { 93static struct clock_event_device msm_clockevent = {
159 [MSM_CLOCK_GPT] = { 94 .name = "gp_timer",
160 .clockevent = { 95 .features = CLOCK_EVT_FEAT_ONESHOT,
161 .name = "gp_timer", 96 .rating = 200,
162 .features = CLOCK_EVT_FEAT_ONESHOT, 97 .set_next_event = msm_timer_set_next_event,
163 .shift = 32, 98 .set_mode = msm_timer_set_mode,
164 .rating = 200, 99};
165 .set_next_event = msm_timer_set_next_event, 100
166 .set_mode = msm_timer_set_mode, 101static union {
167 }, 102 struct clock_event_device *evt;
168 .clocksource = { 103 struct clock_event_device __percpu **percpu_evt;
169 .name = "gp_timer", 104} msm_evt;
170 .rating = 200, 105
171 .read = msm_read_timer_count, 106static void __iomem *source_base;
172 .mask = CLOCKSOURCE_MASK(32), 107
173 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 108static cycle_t msm_read_timer_count(struct clocksource *cs)
174 }, 109{
175 .irq = INT_GP_TIMER_EXP, 110 return readl_relaxed(source_base + TIMER_COUNT_VAL);
176 .freq = GPT_HZ, 111}
177 }, 112
178 [MSM_CLOCK_DGT] = { 113static cycle_t msm_read_timer_count_shift(struct clocksource *cs)
179 .clockevent = { 114{
180 .name = "dg_timer", 115 /*
181 .features = CLOCK_EVT_FEAT_ONESHOT, 116 * Shift timer count down by a constant due to unreliable lower bits
182 .shift = 32 + MSM_DGT_SHIFT, 117 * on some targets.
183 .rating = 300, 118 */
184 .set_next_event = msm_timer_set_next_event, 119 return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
185 .set_mode = msm_timer_set_mode, 120}
186 }, 121
187 .clocksource = { 122static struct clocksource msm_clocksource = {
188 .name = "dg_timer", 123 .name = "dg_timer",
189 .rating = 300, 124 .rating = 300,
190 .read = msm_read_timer_count, 125 .read = msm_read_timer_count,
191 .mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)), 126 .mask = CLOCKSOURCE_MASK(32),
192 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 127 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
193 },
194 .irq = INT_DEBUG_TIMER_EXP,
195 .freq = DGT_HZ >> MSM_DGT_SHIFT,
196 .shift = MSM_DGT_SHIFT,
197 }
198}; 128};
199 129
200static void __init msm_timer_init(void) 130static void __init msm_timer_init(void)
201{ 131{
202 int i; 132 struct clock_event_device *ce = &msm_clockevent;
133 struct clocksource *cs = &msm_clocksource;
203 int res; 134 int res;
204 int global_offset = 0; 135 u32 dgt_hz;
205 136
206 if (cpu_is_msm7x01()) { 137 if (cpu_is_msm7x01()) {
207 msm_clocks[MSM_CLOCK_GPT].regbase = MSM_CSR_BASE; 138 event_base = MSM_CSR_BASE;
208 msm_clocks[MSM_CLOCK_DGT].regbase = MSM_CSR_BASE + 0x10; 139 source_base = MSM_CSR_BASE + 0x10;
140 dgt_hz = 19200000 >> MSM_DGT_SHIFT; /* 600 KHz */
141 cs->read = msm_read_timer_count_shift;
142 cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
209 } else if (cpu_is_msm7x30()) { 143 } else if (cpu_is_msm7x30()) {
210 msm_clocks[MSM_CLOCK_GPT].regbase = MSM_CSR_BASE + 0x04; 144 event_base = MSM_CSR_BASE + 0x04;
211 msm_clocks[MSM_CLOCK_DGT].regbase = MSM_CSR_BASE + 0x24; 145 source_base = MSM_CSR_BASE + 0x24;
146 dgt_hz = 24576000 / 4;
212 } else if (cpu_is_qsd8x50()) { 147 } else if (cpu_is_qsd8x50()) {
213 msm_clocks[MSM_CLOCK_GPT].regbase = MSM_CSR_BASE; 148 event_base = MSM_CSR_BASE;
214 msm_clocks[MSM_CLOCK_DGT].regbase = MSM_CSR_BASE + 0x10; 149 source_base = MSM_CSR_BASE + 0x10;
150 dgt_hz = 19200000 / 4;
215 } else if (cpu_is_msm8x60() || cpu_is_msm8960()) { 151 } else if (cpu_is_msm8x60() || cpu_is_msm8960()) {
216 msm_clocks[MSM_CLOCK_GPT].regbase = MSM_TMR_BASE + 0x04; 152 event_base = MSM_TMR_BASE + 0x04;
217 msm_clocks[MSM_CLOCK_DGT].regbase = MSM_TMR_BASE + 0x24; 153 /* Use CPU0's timer as the global clock source. */
218 154 source_base = MSM_TMR0_BASE + 0x24;
219 /* Use CPU0's timer as the global timer. */ 155 dgt_hz = 27000000 / 4;
220 global_offset = MSM_TMR0_BASE - MSM_TMR_BASE; 156 writel_relaxed(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
221 } else 157 } else
222 BUG(); 158 BUG();
223 159
224#ifdef CONFIG_ARCH_MSM_SCORPIONMP 160 writel_relaxed(0, event_base + TIMER_ENABLE);
225 writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); 161 writel_relaxed(0, event_base + TIMER_CLEAR);
226#endif 162 writel_relaxed(~0, event_base + TIMER_MATCH_VAL);
227 163 ce->cpumask = cpumask_of(0);
228 for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) { 164
229 struct msm_clock *clock = &msm_clocks[i]; 165 ce->irq = INT_GP_TIMER_EXP;
230 struct clock_event_device *ce = &clock->clockevent; 166 clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff);
231 struct clocksource *cs = &clock->clocksource; 167 if (cpu_is_msm8x60() || cpu_is_msm8960()) {
232 168 msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
233 clock->local_counter = clock->regbase + TIMER_COUNT_VAL; 169 if (!msm_evt.percpu_evt) {
234 clock->global_counter = clock->local_counter + global_offset; 170 pr_err("memory allocation failed for %s\n", ce->name);
235 171 goto err;
236 writel(0, clock->regbase + TIMER_ENABLE);
237 writel(0, clock->regbase + TIMER_CLEAR);
238 writel(~0, clock->regbase + TIMER_MATCH_VAL);
239
240 ce->mult = div_sc(clock->freq, NSEC_PER_SEC, ce->shift);
241 /* allow at least 10 seconds to notice that the timer wrapped */
242 ce->max_delta_ns =
243 clockevent_delta2ns(0xf0000000 >> clock->shift, ce);
244 /* 4 gets rounded down to 3 */
245 ce->min_delta_ns = clockevent_delta2ns(4, ce);
246 ce->cpumask = cpumask_of(0);
247
248 res = clocksource_register_hz(cs, clock->freq);
249 if (res)
250 printk(KERN_ERR "msm_timer_init: clocksource_register "
251 "failed for %s\n", cs->name);
252
253 ce->irq = clock->irq;
254 if (cpu_is_msm8x60() || cpu_is_msm8960()) {
255 clock->percpu_evt = alloc_percpu(struct clock_event_device *);
256 if (!clock->percpu_evt) {
257 pr_err("msm_timer_init: memory allocation "
258 "failed for %s\n", ce->name);
259 continue;
260 }
261
262 *__this_cpu_ptr(clock->percpu_evt) = ce;
263 res = request_percpu_irq(ce->irq, msm_timer_interrupt,
264 ce->name, clock->percpu_evt);
265 if (!res)
266 enable_percpu_irq(ce->irq, 0);
267 } else {
268 clock->evt = ce;
269 res = request_irq(ce->irq, msm_timer_interrupt,
270 IRQF_TIMER | IRQF_NOBALANCING | IRQF_TRIGGER_RISING,
271 ce->name, &clock->evt);
272 } 172 }
273 173 *__this_cpu_ptr(msm_evt.percpu_evt) = ce;
274 if (res) 174 res = request_percpu_irq(ce->irq, msm_timer_interrupt,
275 pr_err("msm_timer_init: request_irq failed for %s\n", 175 ce->name, msm_evt.percpu_evt);
276 ce->name); 176 if (!res)
277 177 enable_percpu_irq(ce->irq, 0);
278 clockevents_register_device(ce); 178 } else {
179 msm_evt.evt = ce;
180 res = request_irq(ce->irq, msm_timer_interrupt,
181 IRQF_TIMER | IRQF_NOBALANCING |
182 IRQF_TRIGGER_RISING, ce->name, &msm_evt.evt);
279 } 183 }
184
185 if (res)
186 pr_err("request_irq failed for %s\n", ce->name);
187err:
188 writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
189 res = clocksource_register_hz(cs, dgt_hz);
190 if (res)
191 pr_err("clocksource_register failed\n");
280} 192}
281 193
282#ifdef CONFIG_SMP 194#ifdef CONFIG_LOCAL_TIMERS
283int __cpuinit local_timer_setup(struct clock_event_device *evt) 195int __cpuinit local_timer_setup(struct clock_event_device *evt)
284{ 196{
285 static bool local_timer_inited;
286 struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
287
288 /* Use existing clock_event for cpu 0 */ 197 /* Use existing clock_event for cpu 0 */
289 if (!smp_processor_id()) 198 if (!smp_processor_id())
290 return 0; 199 return 0;
291 200
292 writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); 201 writel_relaxed(0, event_base + TIMER_ENABLE);
293 202 writel_relaxed(0, event_base + TIMER_CLEAR);
294 if (!local_timer_inited) { 203 writel_relaxed(~0, event_base + TIMER_MATCH_VAL);
295 writel(0, clock->regbase + TIMER_ENABLE); 204 evt->irq = msm_clockevent.irq;
296 writel(0, clock->regbase + TIMER_CLEAR);
297 writel(~0, clock->regbase + TIMER_MATCH_VAL);
298 local_timer_inited = true;
299 }
300 evt->irq = clock->irq;
301 evt->name = "local_timer"; 205 evt->name = "local_timer";
302 evt->features = CLOCK_EVT_FEAT_ONESHOT; 206 evt->features = msm_clockevent.features;
303 evt->rating = clock->clockevent.rating; 207 evt->rating = msm_clockevent.rating;
304 evt->set_mode = msm_timer_set_mode; 208 evt->set_mode = msm_timer_set_mode;
305 evt->set_next_event = msm_timer_set_next_event; 209 evt->set_next_event = msm_timer_set_next_event;
306 evt->shift = clock->clockevent.shift; 210 evt->shift = msm_clockevent.shift;
307 evt->mult = div_sc(clock->freq, NSEC_PER_SEC, evt->shift); 211 evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift);
308 evt->max_delta_ns = 212 evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt);
309 clockevent_delta2ns(0xf0000000 >> clock->shift, evt);
310 evt->min_delta_ns = clockevent_delta2ns(4, evt); 213 evt->min_delta_ns = clockevent_delta2ns(4, evt);
311 214
312 *__this_cpu_ptr(clock->percpu_evt) = evt; 215 *__this_cpu_ptr(msm_evt.percpu_evt) = evt;
313 enable_percpu_irq(evt->irq, 0);
314
315 clockevents_register_device(evt); 216 clockevents_register_device(evt);
217 enable_percpu_irq(evt->irq, 0);
316 return 0; 218 return 0;
317} 219}
318 220
@@ -321,8 +223,7 @@ void local_timer_stop(struct clock_event_device *evt)
321 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); 223 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
322 disable_percpu_irq(evt->irq); 224 disable_percpu_irq(evt->irq);
323} 225}
324 226#endif /* CONFIG_LOCAL_TIMERS */
325#endif
326 227
327struct sys_timer msm_timer = { 228struct sys_timer msm_timer = {
328 .init = msm_timer_init 229 .init = msm_timer_init
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 311d5b0e9bc7..62b53d710efd 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -12,12 +12,12 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <plat/addr-map.h>
15#include "common.h" 16#include "common.h"
16 17
17/* 18/*
18 * Generic Address Decode Windows bit settings 19 * Generic Address Decode Windows bit settings
19 */ 20 */
20#define TARGET_DDR 0
21#define TARGET_DEV_BUS 1 21#define TARGET_DEV_BUS 1
22#define TARGET_PCIE0 4 22#define TARGET_PCIE0 4
23#define TARGET_PCIE1 8 23#define TARGET_PCIE1 8
@@ -32,23 +32,10 @@
32#define ATTR_PCIE_MEM(l) (0xf8 & ~(0x10 << (l))) 32#define ATTR_PCIE_MEM(l) (0xf8 & ~(0x10 << (l)))
33 33
34/* 34/*
35 * Helpers to get DDR bank info
36 */
37#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
38#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
39
40/*
41 * CPU Address Decode Windows registers 35 * CPU Address Decode Windows registers
42 */ 36 */
43#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4)) 37#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
44#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4)) 38#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
45#define WIN_CTRL_OFF 0x0000
46#define WIN_BASE_OFF 0x0004
47#define WIN_REMAP_LO_OFF 0x0008
48#define WIN_REMAP_HI_OFF 0x000c
49
50
51struct mbus_dram_target_info mv78xx0_mbus_dram_info;
52 39
53static void __init __iomem *win_cfg_base(int win) 40static void __init __iomem *win_cfg_base(int win)
54{ 41{
@@ -63,94 +50,43 @@ static void __init __iomem *win_cfg_base(int win)
63 return (void __iomem *)((win < 8) ? WIN0_OFF(win) : WIN8_OFF(win)); 50 return (void __iomem *)((win < 8) ? WIN0_OFF(win) : WIN8_OFF(win));
64} 51}
65 52
66static int __init cpu_win_can_remap(int win) 53/*
67{ 54 * Description of the windows needed by the platform code
68 if (win < 8) 55 */
69 return 1; 56static struct __initdata orion_addr_map_cfg addr_map_cfg = {
70 57 .num_wins = 14,
71 return 0; 58 .remappable_wins = 8,
72} 59 .win_cfg_base = win_cfg_base,
73 60};
74static void __init setup_cpu_win(int win, u32 base, u32 size,
75 u8 target, u8 attr, int remap)
76{
77 void __iomem *addr = win_cfg_base(win);
78 u32 ctrl;
79
80 base &= 0xffff0000;
81 ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
82
83 writel(base, addr + WIN_BASE_OFF);
84 writel(ctrl, addr + WIN_CTRL_OFF);
85 if (cpu_win_can_remap(win)) {
86 if (remap < 0)
87 remap = base;
88
89 writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
90 writel(0, addr + WIN_REMAP_HI_OFF);
91 }
92}
93 61
94void __init mv78xx0_setup_cpu_mbus(void) 62void __init mv78xx0_setup_cpu_mbus(void)
95{ 63{
96 void __iomem *addr;
97 int i;
98 int cs;
99
100 /* 64 /*
101 * First, disable and clear windows. 65 * Disable, clear and configure windows.
102 */ 66 */
103 for (i = 0; i < 14; i++) { 67 orion_config_wins(&addr_map_cfg, NULL);
104 addr = win_cfg_base(i);
105
106 writel(0, addr + WIN_BASE_OFF);
107 writel(0, addr + WIN_CTRL_OFF);
108 if (cpu_win_can_remap(i)) {
109 writel(0, addr + WIN_REMAP_LO_OFF);
110 writel(0, addr + WIN_REMAP_HI_OFF);
111 }
112 }
113 68
114 /* 69 /*
115 * Setup MBUS dram target info. 70 * Setup MBUS dram target info.
116 */ 71 */
117 mv78xx0_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
118
119 if (mv78xx0_core_index() == 0) 72 if (mv78xx0_core_index() == 0)
120 addr = (void __iomem *)DDR_WINDOW_CPU0_BASE; 73 orion_setup_cpu_mbus_target(&addr_map_cfg,
74 DDR_WINDOW_CPU0_BASE);
121 else 75 else
122 addr = (void __iomem *)DDR_WINDOW_CPU1_BASE; 76 orion_setup_cpu_mbus_target(&addr_map_cfg,
123 77 DDR_WINDOW_CPU1_BASE);
124 for (i = 0, cs = 0; i < 4; i++) {
125 u32 base = readl(addr + DDR_BASE_CS_OFF(i));
126 u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
127
128 /*
129 * Chip select enabled?
130 */
131 if (size & 1) {
132 struct mbus_dram_window *w;
133
134 w = &mv78xx0_mbus_dram_info.cs[cs++];
135 w->cs_index = i;
136 w->mbus_attr = 0xf & ~(1 << i);
137 w->base = base & 0xffff0000;
138 w->size = (size | 0x0000ffff) + 1;
139 }
140 }
141 mv78xx0_mbus_dram_info.num_cs = cs;
142} 78}
143 79
144void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size, 80void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
145 int maj, int min) 81 int maj, int min)
146{ 82{
147 setup_cpu_win(window, base, size, TARGET_PCIE(maj), 83 orion_setup_cpu_win(&addr_map_cfg, window, base, size,
148 ATTR_PCIE_IO(min), -1); 84 TARGET_PCIE(maj), ATTR_PCIE_IO(min), -1);
149} 85}
150 86
151void __init mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size, 87void __init mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
152 int maj, int min) 88 int maj, int min)
153{ 89{
154 setup_cpu_win(window, base, size, TARGET_PCIE(maj), 90 orion_setup_cpu_win(&addr_map_cfg, window, base, size,
155 ATTR_PCIE_MEM(min), -1); 91 TARGET_PCIE(maj), ATTR_PCIE_MEM(min), -1);
156} 92}
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 5b9632b01169..0cdd41004ad0 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -12,7 +12,6 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
17#include <linux/ethtool.h> 16#include <linux/ethtool.h>
18#include <asm/mach/map.h> 17#include <asm/mach/map.h>
@@ -23,6 +22,7 @@
23#include <plat/orion_nand.h> 22#include <plat/orion_nand.h>
24#include <plat/time.h> 23#include <plat/time.h>
25#include <plat/common.h> 24#include <plat/common.h>
25#include <plat/addr-map.h>
26#include "common.h" 26#include "common.h"
27 27
28static int get_tclk(void); 28static int get_tclk(void);
@@ -169,8 +169,7 @@ void __init mv78xx0_map_io(void)
169 ****************************************************************************/ 169 ****************************************************************************/
170void __init mv78xx0_ehci0_init(void) 170void __init mv78xx0_ehci0_init(void)
171{ 171{
172 orion_ehci_init(&mv78xx0_mbus_dram_info, 172 orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
173 USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
174} 173}
175 174
176 175
@@ -179,8 +178,7 @@ void __init mv78xx0_ehci0_init(void)
179 ****************************************************************************/ 178 ****************************************************************************/
180void __init mv78xx0_ehci1_init(void) 179void __init mv78xx0_ehci1_init(void)
181{ 180{
182 orion_ehci_1_init(&mv78xx0_mbus_dram_info, 181 orion_ehci_1_init(USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
183 USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
184} 182}
185 183
186 184
@@ -189,8 +187,7 @@ void __init mv78xx0_ehci1_init(void)
189 ****************************************************************************/ 187 ****************************************************************************/
190void __init mv78xx0_ehci2_init(void) 188void __init mv78xx0_ehci2_init(void)
191{ 189{
192 orion_ehci_2_init(&mv78xx0_mbus_dram_info, 190 orion_ehci_2_init(USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
193 USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
194} 191}
195 192
196 193
@@ -199,7 +196,7 @@ void __init mv78xx0_ehci2_init(void)
199 ****************************************************************************/ 196 ****************************************************************************/
200void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) 197void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
201{ 198{
202 orion_ge00_init(eth_data, &mv78xx0_mbus_dram_info, 199 orion_ge00_init(eth_data,
203 GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM, 200 GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
204 IRQ_MV78XX0_GE_ERR, get_tclk()); 201 IRQ_MV78XX0_GE_ERR, get_tclk());
205} 202}
@@ -210,7 +207,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
210 ****************************************************************************/ 207 ****************************************************************************/
211void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) 208void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
212{ 209{
213 orion_ge01_init(eth_data, &mv78xx0_mbus_dram_info, 210 orion_ge01_init(eth_data,
214 GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM, 211 GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
215 NO_IRQ, get_tclk()); 212 NO_IRQ, get_tclk());
216} 213}
@@ -234,7 +231,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
234 eth_data->duplex = DUPLEX_FULL; 231 eth_data->duplex = DUPLEX_FULL;
235 } 232 }
236 233
237 orion_ge10_init(eth_data, &mv78xx0_mbus_dram_info, 234 orion_ge10_init(eth_data,
238 GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM, 235 GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,
239 NO_IRQ, get_tclk()); 236 NO_IRQ, get_tclk());
240} 237}
@@ -258,7 +255,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
258 eth_data->duplex = DUPLEX_FULL; 255 eth_data->duplex = DUPLEX_FULL;
259 } 256 }
260 257
261 orion_ge11_init(eth_data, &mv78xx0_mbus_dram_info, 258 orion_ge11_init(eth_data,
262 GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM, 259 GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,
263 NO_IRQ, get_tclk()); 260 NO_IRQ, get_tclk());
264} 261}
@@ -277,8 +274,7 @@ void __init mv78xx0_i2c_init(void)
277 ****************************************************************************/ 274 ****************************************************************************/
278void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data) 275void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)
279{ 276{
280 orion_sata_init(sata_data, &mv78xx0_mbus_dram_info, 277 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
281 SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
282} 278}
283 279
284 280
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 07d5f8f6be7d..507c767d49e0 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -23,7 +23,6 @@ void mv78xx0_init(void);
23void mv78xx0_init_early(void); 23void mv78xx0_init_early(void);
24void mv78xx0_init_irq(void); 24void mv78xx0_init_irq(void);
25 25
26extern struct mbus_dram_target_info mv78xx0_mbus_dram_info;
27void mv78xx0_setup_cpu_mbus(void); 26void mv78xx0_setup_cpu_mbus(void);
28void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size, 27void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
29 int maj, int min); 28 int maj, int min);
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index cf4e494d44bf..df50342179e2 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -10,7 +10,6 @@
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h> 13#include <linux/io.h>
15#include <plat/mpp.h> 14#include <plat/mpp.h>
16#include <mach/hardware.h> 15#include <mach/hardware.h>
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index c51af1cac300..12fcb108b0e1 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -10,11 +10,11 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/mbus.h>
14#include <video/vga.h> 13#include <video/vga.h>
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/mach/pci.h> 15#include <asm/mach/pci.h>
17#include <plat/pcie.h> 16#include <plat/pcie.h>
17#include <plat/addr-map.h>
18#include "common.h" 18#include "common.h"
19 19
20struct pcie_port { 20struct pcie_port {
@@ -153,7 +153,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
153 * Generic PCIe unit setup. 153 * Generic PCIe unit setup.
154 */ 154 */
155 orion_pcie_set_local_bus_nr(pp->base, sys->busnr); 155 orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
156 orion_pcie_setup(pp->base, &mv78xx0_mbus_dram_info); 156 orion_pcie_setup(pp->base);
157 157
158 sys->resource[0] = &pp->res[0]; 158 sys->resource[0] = &pp->res[0];
159 sys->resource[1] = &pp->res[1]; 159 sys->resource[1] = &pp->res[1];
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index df4a508f240a..bc17dfea3817 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/clk.h>
16 17
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
18 19
@@ -21,10 +22,26 @@
21#include <mach/devices-common.h> 22#include <mach/devices-common.h>
22#include <mach/iomux-v3.h> 23#include <mach/iomux-v3.h>
23 24
25static struct clk *gpc_dvfs_clk;
26
24static void imx5_idle(void) 27static void imx5_idle(void)
25{ 28{
26 if (!need_resched()) 29 if (!need_resched()) {
30 /* gpc clock is needed for SRPG */
31 if (gpc_dvfs_clk == NULL) {
32 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
33 if (IS_ERR(gpc_dvfs_clk))
34 goto err0;
35 }
36 clk_enable(gpc_dvfs_clk);
27 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake())
39 goto err1;
40 cpu_do_idle();
41err1:
42 clk_disable(gpc_dvfs_clk);
43 }
44err0:
28 local_irq_enable(); 45 local_irq_enable();
29} 46}
30 47
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
index 144ebebc4a61..5eebfaad1226 100644
--- a/arch/arm/mach-mx5/system.c
+++ b/arch/arm/mach-mx5/system.c
@@ -55,9 +55,6 @@ void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
55 stop_mode = 1; 55 stop_mode = 1;
56 } 56 }
57 arm_srpgcr |= MXC_SRPGCR_PCR; 57 arm_srpgcr |= MXC_SRPGCR_PCR;
58
59 if (tzic_enable_wake(1) != 0)
60 return;
61 break; 58 break;
62 case STOP_POWER_ON: 59 case STOP_POWER_ON:
63 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; 60 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index 0163b6d83773..e12e11231dc7 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -545,11 +545,11 @@ int __init mx23_clocks_init(void)
545 */ 545 */
546 clk_set_parent(&ssp_clk, &ref_io_clk); 546 clk_set_parent(&ssp_clk, &ref_io_clk);
547 547
548 clk_enable(&cpu_clk); 548 clk_prepare_enable(&cpu_clk);
549 clk_enable(&hbus_clk); 549 clk_prepare_enable(&hbus_clk);
550 clk_enable(&xbus_clk); 550 clk_prepare_enable(&xbus_clk);
551 clk_enable(&emi_clk); 551 clk_prepare_enable(&emi_clk);
552 clk_enable(&uart_clk); 552 clk_prepare_enable(&uart_clk);
553 553
554 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 554 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
555 555
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index da6e4aad177c..5d68e4152220 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/jiffies.h> 23#include <linux/jiffies.h>
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <linux/spinlock.h>
25 26
26#include <asm/clkdev.h> 27#include <asm/clkdev.h>
27#include <asm/div64.h> 28#include <asm/div64.h>
@@ -29,6 +30,7 @@
29#include <mach/mx28.h> 30#include <mach/mx28.h>
30#include <mach/common.h> 31#include <mach/common.h>
31#include <mach/clock.h> 32#include <mach/clock.h>
33#include <mach/digctl.h>
32 34
33#include "regs-clkctrl-mx28.h" 35#include "regs-clkctrl-mx28.h"
34 36
@@ -43,6 +45,33 @@ static struct clk emi_clk;
43static struct clk saif0_clk; 45static struct clk saif0_clk;
44static struct clk saif1_clk; 46static struct clk saif1_clk;
45static struct clk clk32k_clk; 47static struct clk clk32k_clk;
48static DEFINE_SPINLOCK(clkmux_lock);
49
50/*
51 * HW_SAIF_CLKMUX_SEL:
52 * DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1
53 * clock pins selected for SAIF1 input clocks.
54 * CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and
55 * SAIF0 clock inputs selected for SAIF1 input clocks.
56 * EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input
57 * clocks.
58 * EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input
59 * clocks.
60 */
61int mxs_saif_clkmux_select(unsigned int clkmux)
62{
63 if (clkmux > 0x3)
64 return -EINVAL;
65
66 spin_lock(&clkmux_lock);
67 __raw_writel(BM_DIGCTL_CTRL_SAIF_CLKMUX,
68 DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_CLR_ADDR);
69 __raw_writel(clkmux << BP_DIGCTL_CTRL_SAIF_CLKMUX,
70 DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_SET_ADDR);
71 spin_unlock(&clkmux_lock);
72
73 return 0;
74}
46 75
47static int _raw_clk_enable(struct clk *clk) 76static int _raw_clk_enable(struct clk *clk)
48{ 77{
@@ -775,16 +804,25 @@ int __init mx28_clocks_init(void)
775 clk_set_parent(&ssp0_clk, &ref_io0_clk); 804 clk_set_parent(&ssp0_clk, &ref_io0_clk);
776 clk_set_parent(&ssp1_clk, &ref_io0_clk); 805 clk_set_parent(&ssp1_clk, &ref_io0_clk);
777 806
778 clk_enable(&cpu_clk); 807 clk_prepare_enable(&cpu_clk);
779 clk_enable(&hbus_clk); 808 clk_prepare_enable(&hbus_clk);
780 clk_enable(&xbus_clk); 809 clk_prepare_enable(&xbus_clk);
781 clk_enable(&emi_clk); 810 clk_prepare_enable(&emi_clk);
782 clk_enable(&uart_clk); 811 clk_prepare_enable(&uart_clk);
783 812
784 clk_set_parent(&lcdif_clk, &ref_pix_clk); 813 clk_set_parent(&lcdif_clk, &ref_pix_clk);
785 clk_set_parent(&saif0_clk, &pll0_clk); 814 clk_set_parent(&saif0_clk, &pll0_clk);
786 clk_set_parent(&saif1_clk, &pll0_clk); 815 clk_set_parent(&saif1_clk, &pll0_clk);
787 816
817 /*
818 * Set an initial clock rate for the saif internal logic to work
819 * properly. This is important when working in EXTMASTER mode that
820 * uses the other saif's BITCLK&LRCLK but it still needs a basic
821 * clock which should be fast enough for the internal logic.
822 */
823 clk_set_rate(&saif0_clk, 24000000);
824 clk_set_rate(&saif1_clk, 24000000);
825
788 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 826 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
789 827
790 mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0); 828 mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);
diff --git a/arch/arm/mach-mxs/clock.c b/arch/arm/mach-mxs/clock.c
index a7093c88e6a6..97a6f4acc6cc 100644
--- a/arch/arm/mach-mxs/clock.c
+++ b/arch/arm/mach-mxs/clock.c
@@ -74,10 +74,15 @@ static int __clk_enable(struct clk *clk)
74 return 0; 74 return 0;
75} 75}
76 76
77/* This function increments the reference count on the clock and enables the 77/*
78 * clock if not already enabled. The parent clock tree is recursively enabled 78 * The clk_enable/clk_disable could be called by drivers in atomic context,
79 * so they should not really hold mutex. Instead, clk_prepare/clk_unprepare
80 * can hold a mutex, as the pair will only be called in non-atomic context.
81 * Before migrating to common clk framework, we can have __clk_enable and
82 * __clk_disable called in clk_prepare/clk_unprepare with mutex held and
83 * leave clk_enable/clk_disable as the dummy functions.
79 */ 84 */
80int clk_enable(struct clk *clk) 85int clk_prepare(struct clk *clk)
81{ 86{
82 int ret = 0; 87 int ret = 0;
83 88
@@ -90,13 +95,9 @@ int clk_enable(struct clk *clk)
90 95
91 return ret; 96 return ret;
92} 97}
93EXPORT_SYMBOL(clk_enable); 98EXPORT_SYMBOL(clk_prepare);
94 99
95/* This function decrements the reference count on the clock and disables 100void clk_unprepare(struct clk *clk)
96 * the clock when reference count is 0. The parent clock tree is
97 * recursively disabled
98 */
99void clk_disable(struct clk *clk)
100{ 101{
101 if (clk == NULL || IS_ERR(clk)) 102 if (clk == NULL || IS_ERR(clk))
102 return; 103 return;
@@ -105,6 +106,18 @@ void clk_disable(struct clk *clk)
105 __clk_disable(clk); 106 __clk_disable(clk);
106 mutex_unlock(&clocks_mutex); 107 mutex_unlock(&clocks_mutex);
107} 108}
109EXPORT_SYMBOL(clk_unprepare);
110
111int clk_enable(struct clk *clk)
112{
113 return 0;
114}
115EXPORT_SYMBOL(clk_enable);
116
117void clk_disable(struct clk *clk)
118{
119 /* nothing to do */
120}
108EXPORT_SYMBOL(clk_disable); 121EXPORT_SYMBOL(clk_disable);
109 122
110/* Retrieve the *current* clock rate. If the clock itself 123/* Retrieve the *current* clock rate. If the clock itself
@@ -166,7 +179,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
166 return ret; 179 return ret;
167 180
168 if (clk->usecount) 181 if (clk->usecount)
169 clk_enable(parent); 182 clk_prepare_enable(parent);
170 183
171 mutex_lock(&clocks_mutex); 184 mutex_lock(&clocks_mutex);
172 ret = clk->set_parent(clk, parent); 185 ret = clk->set_parent(clk, parent);
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index c8887103f0e3..4f50094e293d 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -47,6 +47,7 @@ struct platform_device *__init mx28_add_mxsfb(
47 const struct mxsfb_platform_data *pdata); 47 const struct mxsfb_platform_data *pdata);
48 48
49extern const struct mxs_saif_data mx28_saif_data[] __initconst; 49extern const struct mxs_saif_data mx28_saif_data[] __initconst;
50#define mx28_add_saif(id) mxs_add_saif(&mx28_saif_data[id]) 50#define mx28_add_saif(id, pdata) \
51 mxs_add_saif(&mx28_saif_data[id], pdata)
51 52
52struct platform_device *__init mx28_add_rtc_stmp3xxx(void); 53struct platform_device *__init mx28_add_rtc_stmp3xxx(void);
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-saif.c b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
index 1ec965e9fe92..f6e3a60b4201 100644
--- a/arch/arm/mach-mxs/devices/platform-mxs-saif.c
+++ b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
@@ -32,7 +32,8 @@ const struct mxs_saif_data mx28_saif_data[] __initconst = {
32}; 32};
33#endif 33#endif
34 34
35struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data) 35struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data,
36 const struct mxs_saif_platform_data *pdata)
36{ 37{
37 struct resource res[] = { 38 struct resource res[] = {
38 { 39 {
@@ -56,5 +57,5 @@ struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data)
56 }; 57 };
57 58
58 return mxs_add_platform_device("mxs-saif", data->id, res, 59 return mxs_add_platform_device("mxs-saif", data->id, res,
59 ARRAY_SIZE(res), NULL, 0); 60 ARRAY_SIZE(res), pdata, sizeof(*pdata));
60} 61}
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 1388485414c9..e1237ab25862 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -17,6 +17,7 @@ extern const u32 *mxs_get_ocotp(void);
17extern int mxs_reset_block(void __iomem *); 17extern int mxs_reset_block(void __iomem *);
18extern void mxs_timer_init(struct clk *, int); 18extern void mxs_timer_init(struct clk *, int);
19extern void mxs_restart(char, const char *); 19extern void mxs_restart(char, const char *);
20extern int mxs_saif_clkmux_select(unsigned int clkmux);
20 21
21extern int mx23_register_gpios(void); 22extern int mx23_register_gpios(void);
22extern int mx23_clocks_init(void); 23extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index a8080f44c03d..dc369c1239fc 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -94,6 +94,7 @@ struct platform_device *__init mxs_add_mxs_pwm(
94 resource_size_t iobase, int id); 94 resource_size_t iobase, int id);
95 95
96/* saif */ 96/* saif */
97#include <sound/saif.h>
97struct mxs_saif_data { 98struct mxs_saif_data {
98 int id; 99 int id;
99 resource_size_t iobase; 100 resource_size_t iobase;
@@ -103,4 +104,5 @@ struct mxs_saif_data {
103}; 104};
104 105
105struct platform_device *__init mxs_add_saif( 106struct platform_device *__init mxs_add_saif(
106 const struct mxs_saif_data *data); 107 const struct mxs_saif_data *data,
108 const struct mxs_saif_platform_data *pdata);
diff --git a/arch/arm/mach-mxs/include/mach/digctl.h b/arch/arm/mach-mxs/include/mach/digctl.h
new file mode 100644
index 000000000000..49a888c65d6d
--- /dev/null
+++ b/arch/arm/mach-mxs/include/mach/digctl.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MACH_DIGCTL_H__
10#define __MACH_DIGCTL_H__
11
12/* MXS DIGCTL SAIF CLKMUX */
13#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0
14#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1
15#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2
16#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3
17
18#define HW_DIGCTL_CTRL 0x0
19#define BP_DIGCTL_CTRL_SAIF_CLKMUX 10
20#define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10)
21#endif
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index d0cc37fd23a4..fdb0a5664dd6 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -27,6 +27,7 @@
27 27
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/iomux-mx28.h> 29#include <mach/iomux-mx28.h>
30#include <mach/digctl.h>
30 31
31#include "devices-mx28.h" 32#include "devices-mx28.h"
32 33
@@ -228,7 +229,7 @@ static void __init mx28evk_fec_reset(void)
228 /* Enable fec phy clock */ 229 /* Enable fec phy clock */
229 clk = clk_get_sys("pll2", NULL); 230 clk = clk_get_sys("pll2", NULL);
230 if (!IS_ERR(clk)) 231 if (!IS_ERR(clk))
231 clk_enable(clk); 232 clk_prepare_enable(clk);
232 233
233 /* Power up fec phy */ 234 /* Power up fec phy */
234 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power"); 235 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
@@ -421,6 +422,18 @@ static struct gpio mx28evk_lcd_gpios[] = {
421 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, 422 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
422}; 423};
423 424
425static const struct mxs_saif_platform_data
426 mx28evk_mxs_saif_pdata[] __initconst = {
427 /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
428 {
429 .master_mode = 1,
430 .master_id = 0,
431 }, {
432 .master_mode = 0,
433 .master_id = 0,
434 },
435};
436
424static void __init mx28evk_init(void) 437static void __init mx28evk_init(void)
425{ 438{
426 int ret; 439 int ret;
@@ -454,8 +467,9 @@ static void __init mx28evk_init(void)
454 else 467 else
455 mx28_add_mxsfb(&mx28evk_mxsfb_pdata); 468 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
456 469
457 mx28_add_saif(0); 470 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
458 mx28_add_saif(1); 471 mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]);
472 mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]);
459 473
460 mx28_add_mxs_i2c(0); 474 mx28_add_mxs_i2c(0);
461 i2c_register_board_info(0, mxs_i2c0_board_info, 475 i2c_register_board_info(0, mxs_i2c0_board_info,
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index b936633b7682..54f91ad1c965 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -66,7 +66,7 @@ static int __init mxs_arch_reset_init(void)
66 66
67 clk = clk_get_sys("rtc", NULL); 67 clk = clk_get_sys("rtc", NULL);
68 if (!IS_ERR(clk)) 68 if (!IS_ERR(clk))
69 clk_enable(clk); 69 clk_prepare_enable(clk);
70 70
71 return 0; 71 return 0;
72} 72}
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index cace0d2e5a55..564a63279f18 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -245,7 +245,7 @@ static int __init mxs_clocksource_init(struct clk *timer_clk)
245 245
246void __init mxs_timer_init(struct clk *timer_clk, int irq) 246void __init mxs_timer_init(struct clk *timer_clk, int irq)
247{ 247{
248 clk_enable(timer_clk); 248 clk_prepare_enable(timer_clk);
249 249
250 /* 250 /*
251 * Initialize timers to a known state 251 * Initialize timers to a known state
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 73f287d6429b..4f8d66f044e7 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -168,70 +168,6 @@ config MACH_OMAP_GENERIC
168 custom OMAP boards. Say Y here if you have a custom 168 custom OMAP boards. Say Y here if you have a custom
169 board. 169 board.
170 170
171comment "OMAP CPU Speed"
172 depends on ARCH_OMAP1
173
174config OMAP_ARM_216MHZ
175 bool "OMAP ARM 216 MHz CPU (1710 only)"
176 depends on ARCH_OMAP1 && ARCH_OMAP16XX
177 help
178 Enable 216 MHz clock for OMAP1710 CPU. If unsure, say N.
179
180config OMAP_ARM_195MHZ
181 bool "OMAP ARM 195 MHz CPU"
182 depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
183 help
184 Enable 195MHz clock for OMAP CPU. If unsure, say N.
185
186config OMAP_ARM_192MHZ
187 bool "OMAP ARM 192 MHz CPU"
188 depends on ARCH_OMAP1 && ARCH_OMAP16XX
189 help
190 Enable 192MHz clock for OMAP CPU. If unsure, say N.
191
192config OMAP_ARM_182MHZ
193 bool "OMAP ARM 182 MHz CPU"
194 depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
195 help
196 Enable 182MHz clock for OMAP CPU. If unsure, say N.
197
198config OMAP_ARM_168MHZ
199 bool "OMAP ARM 168 MHz CPU"
200 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
201 help
202 Enable 168MHz clock for OMAP CPU. If unsure, say N.
203
204config OMAP_ARM_150MHZ
205 bool "OMAP ARM 150 MHz CPU"
206 depends on ARCH_OMAP1 && ARCH_OMAP15XX
207 help
208 Enable 150MHz clock for OMAP CPU. If unsure, say N.
209
210config OMAP_ARM_120MHZ
211 bool "OMAP ARM 120 MHz CPU"
212 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
213 help
214 Enable 120MHz clock for OMAP CPU. If unsure, say N.
215
216config OMAP_ARM_96MHZ
217 bool "OMAP ARM 96 MHz CPU"
218 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
219 help
220 Enable 96MHz clock for OMAP CPU. If unsure, say N.
221
222config OMAP_ARM_60MHZ
223 bool "OMAP ARM 60 MHz CPU"
224 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
225 default y
226 help
227 Enable 60MHz clock for OMAP CPU. If unsure, say Y.
228
229config OMAP_ARM_30MHZ
230 bool "OMAP ARM 30 MHz CPU"
231 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
232 help
233 Enable 30MHz clock for OMAP CPU. If unsure, say N.
234
235endmenu 171endmenu
236 172
237endif 173endif
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 84ef70476b51..0c50df05d135 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -197,11 +197,10 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
197 ref_rate = ck_ref_p->rate; 197 ref_rate = ck_ref_p->rate;
198 198
199 for (ptr = omap1_rate_table; ptr->rate; ptr++) { 199 for (ptr = omap1_rate_table; ptr->rate; ptr++) {
200 if (ptr->xtal != ref_rate) 200 if (!(ptr->flags & cpu_mask))
201 continue; 201 continue;
202 202
203 /* DPLL1 cannot be reprogrammed without risking system crash */ 203 if (ptr->xtal != ref_rate)
204 if (likely(dpll1_rate != 0) && ptr->pll_rate != dpll1_rate)
205 continue; 204 continue;
206 205
207 /* Can check only after xtal frequency check */ 206 /* Can check only after xtal frequency check */
@@ -215,12 +214,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
215 /* 214 /*
216 * In most cases we should not need to reprogram DPLL. 215 * In most cases we should not need to reprogram DPLL.
217 * Reprogramming the DPLL is tricky, it must be done from SRAM. 216 * Reprogramming the DPLL is tricky, it must be done from SRAM.
218 * (on 730, bit 13 must always be 1)
219 */ 217 */
220 if (cpu_is_omap7xx()) 218 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
221 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
222 else
223 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
224 219
225 /* XXX Do we need to recalculate the tree below DPLL1 at this point? */ 220 /* XXX Do we need to recalculate the tree below DPLL1 at this point? */
226 ck_dpll1_p->rate = ptr->pll_rate; 221 ck_dpll1_p->rate = ptr->pll_rate;
@@ -290,6 +285,9 @@ long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
290 highest_rate = -EINVAL; 285 highest_rate = -EINVAL;
291 286
292 for (ptr = omap1_rate_table; ptr->rate; ptr++) { 287 for (ptr = omap1_rate_table; ptr->rate; ptr++) {
288 if (!(ptr->flags & cpu_mask))
289 continue;
290
293 if (ptr->xtal != ref_rate) 291 if (ptr->xtal != ref_rate)
294 continue; 292 continue;
295 293
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 16b1423b454a..3d04f4f67676 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -111,4 +111,7 @@ extern const struct clkops clkops_dummy;
111extern const struct clkops clkops_uart_16xx; 111extern const struct clkops clkops_uart_16xx;
112extern const struct clkops clkops_generic; 112extern const struct clkops clkops_generic;
113 113
114/* used for passing SoC type to omap1_{select,round_to}_table_rate() */
115extern u32 cpu_mask;
116
114#endif 117#endif
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 9ff90a744a21..94699a82a734 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -25,6 +25,7 @@
25#include <plat/clock.h> 25#include <plat/clock.h>
26#include <plat/cpu.h> 26#include <plat/cpu.h>
27#include <plat/clkdev_omap.h> 27#include <plat/clkdev_omap.h>
28#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
28#include <plat/usb.h> /* for OTG_BASE */ 29#include <plat/usb.h> /* for OTG_BASE */
29 30
30#include "clock.h" 31#include "clock.h"
@@ -778,12 +779,14 @@ static void __init omap1_show_rates(void)
778 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); 779 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
779} 780}
780 781
782u32 cpu_mask;
783
781int __init omap1_clk_init(void) 784int __init omap1_clk_init(void)
782{ 785{
783 struct omap_clk *c; 786 struct omap_clk *c;
784 const struct omap_clock_config *info; 787 const struct omap_clock_config *info;
785 int crystal_type = 0; /* Default 12 MHz */ 788 int crystal_type = 0; /* Default 12 MHz */
786 u32 reg, cpu_mask; 789 u32 reg;
787 790
788#ifdef CONFIG_DEBUG_LL 791#ifdef CONFIG_DEBUG_LL
789 /* 792 /*
@@ -808,6 +811,8 @@ int __init omap1_clk_init(void)
808 clk_preinit(c->lk.clk); 811 clk_preinit(c->lk.clk);
809 812
810 cpu_mask = 0; 813 cpu_mask = 0;
814 if (cpu_is_omap1710())
815 cpu_mask |= CK_1710;
811 if (cpu_is_omap16xx()) 816 if (cpu_is_omap16xx())
812 cpu_mask |= CK_16XX; 817 cpu_mask |= CK_16XX;
813 if (cpu_is_omap1510()) 818 if (cpu_is_omap1510())
@@ -931,17 +936,13 @@ void __init omap1_clk_late_init(void)
931{ 936{
932 unsigned long rate = ck_dpll1.rate; 937 unsigned long rate = ck_dpll1.rate;
933 938
934 if (rate >= OMAP1_DPLL1_SANE_VALUE)
935 return;
936
937 /* System booting at unusable rate, force reprogramming of DPLL1 */
938 ck_dpll1_p->rate = 0;
939
940 /* Find the highest supported frequency and enable it */ 939 /* Find the highest supported frequency and enable it */
941 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { 940 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
942 pr_err("System frequencies not set, using default. Check your config.\n"); 941 pr_err("System frequencies not set, using default. Check your config.\n");
943 omap_writew(0x2290, DPLL_CTL); 942 /*
944 omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL); 943 * Reprogramming the DPLL is tricky, it must be done from SRAM.
944 */
945 omap_sram_reprogram_clock(0x2290, 0x0005);
945 ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; 946 ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
946 } 947 }
947 propagate_rate(&ck_dpll1); 948 propagate_rate(&ck_dpll1);
diff --git a/arch/arm/mach-omap1/opp.h b/arch/arm/mach-omap1/opp.h
index 07074d79adce..79a683864a5c 100644
--- a/arch/arm/mach-omap1/opp.h
+++ b/arch/arm/mach-omap1/opp.h
@@ -21,6 +21,7 @@ struct mpu_rate {
21 unsigned long pll_rate; 21 unsigned long pll_rate;
22 __u16 ckctl_val; 22 __u16 ckctl_val;
23 __u16 dpllctl_val; 23 __u16 dpllctl_val;
24 u32 flags;
24}; 25};
25 26
26extern struct mpu_rate omap1_rate_table[]; 27extern struct mpu_rate omap1_rate_table[];
diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c
index 75a546514994..9cd4ddb51397 100644
--- a/arch/arm/mach-omap1/opp_data.c
+++ b/arch/arm/mach-omap1/opp_data.c
@@ -10,6 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13#include <plat/clkdev_omap.h>
13#include "opp.h" 14#include "opp.h"
14 15
15/*------------------------------------------------------------------------- 16/*-------------------------------------------------------------------------
@@ -20,40 +21,34 @@ struct mpu_rate omap1_rate_table[] = {
20 * NOTE: Comment order here is different from bits in CKCTL value: 21 * NOTE: Comment order here is different from bits in CKCTL value:
21 * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv 22 * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
22 */ 23 */
23#if defined(CONFIG_OMAP_ARM_216MHZ) 24 { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */
24 { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ 25 CK_1710 },
25#endif 26 { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */
26#if defined(CONFIG_OMAP_ARM_195MHZ) 27 CK_7XX },
27 { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ 28 { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */
28#endif 29 CK_16XX },
29#if defined(CONFIG_OMAP_ARM_192MHZ) 30 { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */
30 { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ 31 CK_16XX },
31 { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ 32 { 96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */
32 { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ 33 CK_16XX },
33 { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ 34 { 48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */
34 { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ 35 CK_16XX },
35#endif 36 { 24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */
36#if defined(CONFIG_OMAP_ARM_182MHZ) 37 CK_16XX },
37 { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ 38 { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */
38#endif 39 CK_7XX },
39#if defined(CONFIG_OMAP_ARM_168MHZ) 40 { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */
40 { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ 41 CK_16XX|CK_7XX },
41#endif 42 { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */
42#if defined(CONFIG_OMAP_ARM_150MHZ) 43 CK_1510 },
43 { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ 44 { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */
44#endif 45 CK_16XX|CK_1510|CK_310|CK_7XX },
45#if defined(CONFIG_OMAP_ARM_120MHZ) 46 { 96000000, 12000000, 96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */
46 { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ 47 CK_16XX|CK_1510|CK_310|CK_7XX },
47#endif 48 { 60000000, 12000000, 60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */
48#if defined(CONFIG_OMAP_ARM_96MHZ) 49 CK_16XX|CK_1510|CK_310|CK_7XX },
49 { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ 50 { 30000000, 12000000, 60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */
50#endif 51 CK_16XX|CK_1510|CK_310|CK_7XX },
51#if defined(CONFIG_OMAP_ARM_60MHZ)
52 { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
53#endif
54#if defined(CONFIG_OMAP_ARM_30MHZ)
55 { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
56#endif
57 { 0, 0, 0, 0, 0 }, 52 { 0, 0, 0, 0, 0 },
58}; 53};
59 54
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4f01533083cc..904bd1dfcd2e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -78,8 +78,13 @@ config SOC_OMAP3430
78 default y 78 default y
79 select ARCH_OMAP_OTG 79 select ARCH_OMAP_OTG
80 80
81config SOC_OMAPTI816X 81config SOC_OMAPTI81XX
82 bool "TI816X support" 82 bool "TI81XX support"
83 depends on ARCH_OMAP3
84 default y
85
86config SOC_OMAPAM33XX
87 bool "AM33XX support"
83 depends on ARCH_OMAP3 88 depends on ARCH_OMAP3
84 default y 89 default y
85 90
@@ -316,7 +321,12 @@ config MACH_OMAP_3630SDP
316 321
317config MACH_TI8168EVM 322config MACH_TI8168EVM
318 bool "TI8168 Evaluation Module" 323 bool "TI8168 Evaluation Module"
319 depends on SOC_OMAPTI816X 324 depends on SOC_OMAPTI81XX
325 default y
326
327config MACH_TI8148EVM
328 bool "TI8148 Evaluation Module"
329 depends on SOC_OMAPTI81XX
320 default y 330 default y
321 331
322config MACH_OMAP_4430SDP 332config MACH_OMAP_4430SDP
@@ -355,6 +365,27 @@ config OMAP3_SDRC_AC_TIMING
355 wish to say no. Selecting yes without understanding what is 365 wish to say no. Selecting yes without understanding what is
356 going on could result in system crashes; 366 going on could result in system crashes;
357 367
368config OMAP4_ERRATA_I688
369 bool "OMAP4 errata: Async Bridge Corruption"
370 depends on ARCH_OMAP4
371 select ARCH_HAS_BARRIERS
372 help
373 If a data is stalled inside asynchronous bridge because of back
374 pressure, it may be accepted multiple times, creating pointer
375 misalignment that will corrupt next transfers on that data path
376 until next reset of the system (No recovery procedure once the
377 issue is hit, the path remains consistently broken). Async bridge
378 can be found on path between MPU to EMIF and MPU to L3 interconnect.
379 This situation can happen only when the idle is initiated by a
380 Master Request Disconnection (which is trigged by software when
381 executing WFI on CPU).
382 The work-around for this errata needs all the initiators connected
383 through async bridge must ensure that data path is properly drained
384 before issuing WFI. This condition will be met if one Strongly ordered
385 access is performed to the target right before executing the WFI.
386 In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
387 IO barrier ensure that there is no synchronisation loss on initiators
388 operating on both interconnect port simultaneously.
358endmenu 389endmenu
359 390
360endif 391endif
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b009f17dee56..fc9b238cbc19 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -11,10 +11,11 @@ hwmod-common = omap_hwmod.o \
11 omap_hwmod_common_data.o 11 omap_hwmod_common_data.o
12clock-common = clock.o clock_common_data.o \ 12clock-common = clock.o clock_common_data.o \
13 clkt_dpll.o clkt_clksel.o 13 clkt_dpll.o clkt_clksel.o
14secure-common = omap-smc.o omap-secure.o
14 15
15obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) 16obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
16obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) 17obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
17obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) 18obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
18 19
19obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
20 21
@@ -24,11 +25,13 @@ obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
24obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o 25obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
25obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o 26obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
26obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o 27obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
27obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o 28obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o \
29 sleep44xx.o
28 30
29plus_sec := $(call as-instr,.arch_extension sec,+sec) 31plus_sec := $(call as-instr,.arch_extension sec,+sec)
30AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) 32AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
31AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a$(plus_sec) 33AFLAGS_omap-smc.o :=-Wa,-march=armv7-a$(plus_sec)
34AFLAGS_sleep44xx.o :=-Wa,-march=armv7-a$(plus_sec)
32 35
33# Functions loaded to SRAM 36# Functions loaded to SRAM
34obj-$(CONFIG_SOC_OMAP2420) += sram242x.o 37obj-$(CONFIG_SOC_OMAP2420) += sram242x.o
@@ -62,7 +65,8 @@ obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
62obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o 65obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
63obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o \ 66obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o \
64 cpuidle34xx.o 67 cpuidle34xx.o
65obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o 68obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o \
69 cpuidle44xx.o
66obj-$(CONFIG_PM_DEBUG) += pm-debug.o 70obj-$(CONFIG_PM_DEBUG) += pm-debug.o
67obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o 71obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
68obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o 72obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
@@ -77,6 +81,7 @@ endif
77endif 81endif
78 82
79# PRCM 83# PRCM
84obj-y += prm_common.o
80obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o 85obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
81obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \ 86obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \
82 vc3xxx_data.o vp3xxx_data.o 87 vc3xxx_data.o vp3xxx_data.o
@@ -86,7 +91,7 @@ obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \
86obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ 91obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
87 cm44xx.o prcm_mpu44xx.o \ 92 cm44xx.o prcm_mpu44xx.o \
88 prminst44xx.o vc44xx_data.o \ 93 prminst44xx.o vc44xx_data.o \
89 vp44xx_data.o 94 vp44xx_data.o prm44xx.o
90 95
91# OMAP voltage domains 96# OMAP voltage domains
92voltagedomain-common := voltage.o vc.o vp.o 97voltagedomain-common := voltage.o vc.o vp.o
@@ -232,6 +237,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
232 237
233obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o 238obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
234obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o 239obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
240obj-$(CONFIG_MACH_TI8148EVM) += board-ti8168evm.o
235 241
236# Platform specific device init code 242# Platform specific device init code
237 243
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 9996334cb687..383717ba63b9 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -475,106 +475,8 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
475static struct omap_board_mux board_mux[] __initdata = { 475static struct omap_board_mux board_mux[] __initdata = {
476 { .reg_offset = OMAP_MUX_TERMINATOR }, 476 { .reg_offset = OMAP_MUX_TERMINATOR },
477}; 477};
478
479static struct omap_device_pad serial1_pads[] __initdata = {
480 /*
481 * Note that off output enable is an active low
482 * signal. So setting this means pin is a
483 * input enabled in off mode
484 */
485 OMAP_MUX_STATIC("uart1_cts.uart1_cts",
486 OMAP_PIN_INPUT |
487 OMAP_PIN_OFF_INPUT_PULLDOWN |
488 OMAP_OFFOUT_EN |
489 OMAP_MUX_MODE0),
490 OMAP_MUX_STATIC("uart1_rts.uart1_rts",
491 OMAP_PIN_OUTPUT |
492 OMAP_OFF_EN |
493 OMAP_MUX_MODE0),
494 OMAP_MUX_STATIC("uart1_rx.uart1_rx",
495 OMAP_PIN_INPUT |
496 OMAP_PIN_OFF_INPUT_PULLDOWN |
497 OMAP_OFFOUT_EN |
498 OMAP_MUX_MODE0),
499 OMAP_MUX_STATIC("uart1_tx.uart1_tx",
500 OMAP_PIN_OUTPUT |
501 OMAP_OFF_EN |
502 OMAP_MUX_MODE0),
503};
504
505static struct omap_device_pad serial2_pads[] __initdata = {
506 OMAP_MUX_STATIC("uart2_cts.uart2_cts",
507 OMAP_PIN_INPUT_PULLUP |
508 OMAP_PIN_OFF_INPUT_PULLDOWN |
509 OMAP_OFFOUT_EN |
510 OMAP_MUX_MODE0),
511 OMAP_MUX_STATIC("uart2_rts.uart2_rts",
512 OMAP_PIN_OUTPUT |
513 OMAP_OFF_EN |
514 OMAP_MUX_MODE0),
515 OMAP_MUX_STATIC("uart2_rx.uart2_rx",
516 OMAP_PIN_INPUT |
517 OMAP_PIN_OFF_INPUT_PULLDOWN |
518 OMAP_OFFOUT_EN |
519 OMAP_MUX_MODE0),
520 OMAP_MUX_STATIC("uart2_tx.uart2_tx",
521 OMAP_PIN_OUTPUT |
522 OMAP_OFF_EN |
523 OMAP_MUX_MODE0),
524};
525
526static struct omap_device_pad serial3_pads[] __initdata = {
527 OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
528 OMAP_PIN_INPUT_PULLDOWN |
529 OMAP_PIN_OFF_INPUT_PULLDOWN |
530 OMAP_OFFOUT_EN |
531 OMAP_MUX_MODE0),
532 OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
533 OMAP_PIN_OUTPUT |
534 OMAP_OFF_EN |
535 OMAP_MUX_MODE0),
536 OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
537 OMAP_PIN_INPUT |
538 OMAP_PIN_OFF_INPUT_PULLDOWN |
539 OMAP_OFFOUT_EN |
540 OMAP_MUX_MODE0),
541 OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
542 OMAP_PIN_OUTPUT |
543 OMAP_OFF_EN |
544 OMAP_MUX_MODE0),
545};
546
547static struct omap_board_data serial1_data __initdata = {
548 .id = 0,
549 .pads = serial1_pads,
550 .pads_cnt = ARRAY_SIZE(serial1_pads),
551};
552
553static struct omap_board_data serial2_data __initdata = {
554 .id = 1,
555 .pads = serial2_pads,
556 .pads_cnt = ARRAY_SIZE(serial2_pads),
557};
558
559static struct omap_board_data serial3_data __initdata = {
560 .id = 2,
561 .pads = serial3_pads,
562 .pads_cnt = ARRAY_SIZE(serial3_pads),
563};
564
565static inline void board_serial_init(void)
566{
567 omap_serial_init_port(&serial1_data);
568 omap_serial_init_port(&serial2_data);
569 omap_serial_init_port(&serial3_data);
570}
571#else 478#else
572#define board_mux NULL 479#define board_mux NULL
573
574static inline void board_serial_init(void)
575{
576 omap_serial_init();
577}
578#endif 480#endif
579 481
580/* 482/*
@@ -711,7 +613,7 @@ static void __init omap_3430sdp_init(void)
711 else 613 else
712 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1; 614 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
713 omap_ads7846_init(1, gpio_pendown, 310, NULL); 615 omap_ads7846_init(1, gpio_pendown, 310, NULL);
714 board_serial_init(); 616 omap_serial_init();
715 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL); 617 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
716 usb_musb_init(NULL); 618 usb_musb_init(NULL);
717 board_smc91x_init(); 619 board_smc91x_init();
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index bad5d5a5ef79..2ceb75d21eb2 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -372,11 +372,17 @@ static struct platform_device sdp4430_vbat = {
372 }, 372 },
373}; 373};
374 374
375static struct platform_device sdp4430_dmic_codec = {
376 .name = "dmic-codec",
377 .id = -1,
378};
379
375static struct platform_device *sdp4430_devices[] __initdata = { 380static struct platform_device *sdp4430_devices[] __initdata = {
376 &sdp4430_gpio_keys_device, 381 &sdp4430_gpio_keys_device,
377 &sdp4430_leds_gpio, 382 &sdp4430_leds_gpio,
378 &sdp4430_leds_pwm, 383 &sdp4430_leds_pwm,
379 &sdp4430_vbat, 384 &sdp4430_vbat,
385 &sdp4430_dmic_codec,
380}; 386};
381 387
382static struct omap_musb_board_data musb_board_data = { 388static struct omap_musb_board_data musb_board_data = {
@@ -404,6 +410,7 @@ static struct omap2_hsmmc_info mmc[] = {
404 { 410 {
405 .mmc = 5, 411 .mmc = 5,
406 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, 412 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
413 .pm_caps = MMC_PM_KEEP_POWER,
407 .gpio_cd = -EINVAL, 414 .gpio_cd = -EINVAL,
408 .gpio_wp = -EINVAL, 415 .gpio_wp = -EINVAL,
409 .ocr_mask = MMC_VDD_165_195, 416 .ocr_mask = MMC_VDD_165_195,
@@ -837,74 +844,8 @@ static struct omap_board_mux board_mux[] __initdata = {
837 { .reg_offset = OMAP_MUX_TERMINATOR }, 844 { .reg_offset = OMAP_MUX_TERMINATOR },
838}; 845};
839 846
840static struct omap_device_pad serial2_pads[] __initdata = {
841 OMAP_MUX_STATIC("uart2_cts.uart2_cts",
842 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
843 OMAP_MUX_STATIC("uart2_rts.uart2_rts",
844 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
845 OMAP_MUX_STATIC("uart2_rx.uart2_rx",
846 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
847 OMAP_MUX_STATIC("uart2_tx.uart2_tx",
848 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
849};
850
851static struct omap_device_pad serial3_pads[] __initdata = {
852 OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
853 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
854 OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
855 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
856 OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
857 OMAP_PIN_INPUT | OMAP_MUX_MODE0),
858 OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
859 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
860};
861
862static struct omap_device_pad serial4_pads[] __initdata = {
863 OMAP_MUX_STATIC("uart4_rx.uart4_rx",
864 OMAP_PIN_INPUT | OMAP_MUX_MODE0),
865 OMAP_MUX_STATIC("uart4_tx.uart4_tx",
866 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
867};
868
869static struct omap_board_data serial2_data __initdata = {
870 .id = 1,
871 .pads = serial2_pads,
872 .pads_cnt = ARRAY_SIZE(serial2_pads),
873};
874
875static struct omap_board_data serial3_data __initdata = {
876 .id = 2,
877 .pads = serial3_pads,
878 .pads_cnt = ARRAY_SIZE(serial3_pads),
879};
880
881static struct omap_board_data serial4_data __initdata = {
882 .id = 3,
883 .pads = serial4_pads,
884 .pads_cnt = ARRAY_SIZE(serial4_pads),
885};
886
887static inline void board_serial_init(void)
888{
889 struct omap_board_data bdata;
890 bdata.flags = 0;
891 bdata.pads = NULL;
892 bdata.pads_cnt = 0;
893 bdata.id = 0;
894 /* pass dummy data for UART1 */
895 omap_serial_init_port(&bdata);
896
897 omap_serial_init_port(&serial2_data);
898 omap_serial_init_port(&serial3_data);
899 omap_serial_init_port(&serial4_data);
900}
901#else 847#else
902#define board_mux NULL 848#define board_mux NULL
903
904static inline void board_serial_init(void)
905{
906 omap_serial_init();
907}
908 #endif 849 #endif
909 850
910static void omap4_sdp4430_wifi_mux_init(void) 851static void omap4_sdp4430_wifi_mux_init(void)
@@ -954,7 +895,7 @@ static void __init omap_4430sdp_init(void)
954 omap4_i2c_init(); 895 omap4_i2c_init();
955 omap_sfh7741prox_init(); 896 omap_sfh7741prox_init();
956 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); 897 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
957 board_serial_init(); 898 omap_serial_init();
958 omap_sdrc_init(NULL, NULL); 899 omap_sdrc_init(NULL, NULL);
959 omap4_sdp4430_wifi_init(); 900 omap4_sdp4430_wifi_init();
960 omap4_twl6030_hsmmc_init(mmc); 901 omap4_twl6030_hsmmc_init(mmc);
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f5a3a3f11739..4b1cfe32e6ba 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -24,6 +24,7 @@
24#include <linux/i2c/pca953x.h> 24#include <linux/i2c/pca953x.h>
25#include <linux/can/platform/ti_hecc.h> 25#include <linux/can/platform/ti_hecc.h>
26#include <linux/davinci_emac.h> 26#include <linux/davinci_emac.h>
27#include <linux/mmc/host.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/am35xx.h> 30#include <mach/am35xx.h>
@@ -40,6 +41,7 @@
40 41
41#include "mux.h" 42#include "mux.h"
42#include "control.h" 43#include "control.h"
44#include "hsmmc.h"
43 45
44#define AM35XX_EVM_MDIO_FREQUENCY (1000000) 46#define AM35XX_EVM_MDIO_FREQUENCY (1000000)
45 47
@@ -455,6 +457,23 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
455static struct omap_board_config_kernel am3517_evm_config[] __initdata = { 457static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
456}; 458};
457 459
460static struct omap2_hsmmc_info mmc[] = {
461 {
462 .mmc = 1,
463 .caps = MMC_CAP_4_BIT_DATA,
464 .gpio_cd = 127,
465 .gpio_wp = 126,
466 },
467 {
468 .mmc = 2,
469 .caps = MMC_CAP_4_BIT_DATA,
470 .gpio_cd = 128,
471 .gpio_wp = 129,
472 },
473 {} /* Terminator */
474};
475
476
458static void __init am3517_evm_init(void) 477static void __init am3517_evm_init(void)
459{ 478{
460 omap_board_config = am3517_evm_config; 479 omap_board_config = am3517_evm_config;
@@ -483,6 +502,9 @@ static void __init am3517_evm_init(void)
483 502
484 /* MUSB */ 503 /* MUSB */
485 am3517_evm_musb_init(); 504 am3517_evm_musb_init();
505
506 /* MMC init function */
507 omap2_hsmmc_init(mmc);
486} 508}
487 509
488MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") 510MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 1545102d1f9b..e921e3be24a4 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -53,7 +53,8 @@
53#include "hsmmc.h" 53#include "hsmmc.h"
54#include "common-board-devices.h" 54#include "common-board-devices.h"
55 55
56#define CM_T35_GPIO_PENDOWN 57 56#define CM_T35_GPIO_PENDOWN 57
57#define SB_T35_USB_HUB_RESET_GPIO 167
57 58
58#define CM_T35_SMSC911X_CS 5 59#define CM_T35_SMSC911X_CS 5
59#define CM_T35_SMSC911X_GPIO 163 60#define CM_T35_SMSC911X_GPIO 163
@@ -339,8 +340,10 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
339 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), 340 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
340}; 341};
341 342
342static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { 343static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
343 REGULATOR_SUPPLY("vdvi", "omapdss"), 344 REGULATOR_SUPPLY("vcc", "spi1.0"),
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
346 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
344}; 347};
345 348
346/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ 349/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
@@ -373,6 +376,19 @@ static struct regulator_init_data cm_t35_vsim = {
373 .consumer_supplies = cm_t35_vsim_supply, 376 .consumer_supplies = cm_t35_vsim_supply,
374}; 377};
375 378
379static struct regulator_init_data cm_t35_vio = {
380 .constraints = {
381 .min_uV = 1800000,
382 .max_uV = 1800000,
383 .apply_uV = true,
384 .valid_modes_mask = REGULATOR_MODE_NORMAL
385 | REGULATOR_MODE_STANDBY,
386 .valid_ops_mask = REGULATOR_CHANGE_MODE,
387 },
388 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
389 .consumer_supplies = cm_t35_vio_supplies,
390};
391
376static uint32_t cm_t35_keymap[] = { 392static uint32_t cm_t35_keymap[] = {
377 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), 393 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
378 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), 394 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
@@ -421,6 +437,23 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
421 .reset_gpio_port[2] = -EINVAL 437 .reset_gpio_port[2] = -EINVAL
422}; 438};
423 439
440static void cm_t35_init_usbh(void)
441{
442 int err;
443
444 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
445 GPIOF_OUT_INIT_LOW, "usb hub rst");
446 if (err) {
447 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
448 } else {
449 udelay(10);
450 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
451 msleep(1);
452 }
453
454 usbhs_init(&usbhs_bdata);
455}
456
424static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, 457static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
425 unsigned ngpio) 458 unsigned ngpio)
426{ 459{
@@ -456,17 +489,14 @@ static struct twl4030_platform_data cm_t35_twldata = {
456 .gpio = &cm_t35_gpio_data, 489 .gpio = &cm_t35_gpio_data,
457 .vmmc1 = &cm_t35_vmmc1, 490 .vmmc1 = &cm_t35_vmmc1,
458 .vsim = &cm_t35_vsim, 491 .vsim = &cm_t35_vsim,
492 .vio = &cm_t35_vio,
459}; 493};
460 494
461static void __init cm_t35_init_i2c(void) 495static void __init cm_t35_init_i2c(void)
462{ 496{
463 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 497 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
464 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); 498 TWL_COMMON_REGULATOR_VDAC |
465 499 TWL_COMMON_PDATA_AUDIO);
466 cm_t35_twldata.vpll2->constraints.name = "VDVI";
467 cm_t35_twldata.vpll2->num_consumer_supplies =
468 ARRAY_SIZE(cm_t35_vdvi_supply);
469 cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
470 500
471 omap3_pmic_init("tps65930", &cm_t35_twldata); 501 omap3_pmic_init("tps65930", &cm_t35_twldata);
472} 502}
@@ -570,24 +600,28 @@ static void __init cm_t3x_common_dss_mux_init(int mux_mode)
570 600
571static void __init cm_t35_init_mux(void) 601static void __init cm_t35_init_mux(void)
572{ 602{
573 omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 603 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
574 omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 604
575 omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 605 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
576 omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 606 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
577 omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 607 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
578 omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 608 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
579 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT); 609 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
610 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
611 cm_t3x_common_dss_mux_init(mux_mode);
580} 612}
581 613
582static void __init cm_t3730_init_mux(void) 614static void __init cm_t3730_init_mux(void)
583{ 615{
584 omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 616 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
585 omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 617
586 omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 618 omap_mux_init_signal("sys_boot0", mux_mode);
587 omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 619 omap_mux_init_signal("sys_boot1", mux_mode);
588 omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 620 omap_mux_init_signal("sys_boot3", mux_mode);
589 omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 621 omap_mux_init_signal("sys_boot4", mux_mode);
590 cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT); 622 omap_mux_init_signal("sys_boot5", mux_mode);
623 omap_mux_init_signal("sys_boot6", mux_mode);
624 cm_t3x_common_dss_mux_init(mux_mode);
591} 625}
592#else 626#else
593static inline void cm_t35_init_mux(void) {} 627static inline void cm_t35_init_mux(void) {}
@@ -612,7 +646,7 @@ static void __init cm_t3x_common_init(void)
612 cm_t35_init_display(); 646 cm_t35_init_display();
613 647
614 usb_musb_init(NULL); 648 usb_musb_init(NULL);
615 usbhs_init(&usbhs_bdata); 649 cm_t35_init_usbh();
616} 650}
617 651
618static void __init cm_t35_init(void) 652static void __init cm_t35_init(void)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index f8c5b2cc7c9c..d58756060483 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -69,7 +69,6 @@ static void __init omap_generic_init(void)
69 if (node) 69 if (node)
70 irq_domain_add_simple(node, 0); 70 irq_domain_add_simple(node, 0);
71 71
72 omap_serial_init();
73 omap_sdrc_init(NULL, NULL); 72 omap_sdrc_init(NULL, NULL);
74 73
75 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); 74 of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index cef2cf1c0b8d..42a4d11fad23 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -46,7 +46,7 @@ static struct device *mmc_device;
46#define TUSB6010_GPIO_ENABLE 0 46#define TUSB6010_GPIO_ENABLE 0
47#define TUSB6010_DMACHAN 0x3f 47#define TUSB6010_DMACHAN 0x3f
48 48
49#ifdef CONFIG_USB_MUSB_TUSB6010 49#if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
50/* 50/*
51 * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and 51 * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
52 * 1.5 V voltage regulators of PM companion chip. Companion chip will then 52 * 1.5 V voltage regulators of PM companion chip. Companion chip will then
@@ -644,15 +644,15 @@ static inline void board_serial_init(void)
644 bdata.pads_cnt = 0; 644 bdata.pads_cnt = 0;
645 645
646 bdata.id = 0; 646 bdata.id = 0;
647 omap_serial_init_port(&bdata); 647 omap_serial_init_port(&bdata, NULL);
648 648
649 bdata.id = 1; 649 bdata.id = 1;
650 omap_serial_init_port(&bdata); 650 omap_serial_init_port(&bdata, NULL);
651 651
652 bdata.id = 2; 652 bdata.id = 2;
653 bdata.pads = serial2_pads; 653 bdata.pads = serial2_pads;
654 bdata.pads_cnt = ARRAY_SIZE(serial2_pads); 654 bdata.pads_cnt = ARRAY_SIZE(serial2_pads);
655 omap_serial_init_port(&bdata); 655 omap_serial_init_port(&bdata, NULL);
656} 656}
657 657
658#else 658#else
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 8b06c6a60d02..e96a2e7ad36f 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -364,74 +364,8 @@ static struct omap_board_mux board_mux[] __initdata = {
364 { .reg_offset = OMAP_MUX_TERMINATOR }, 364 { .reg_offset = OMAP_MUX_TERMINATOR },
365}; 365};
366 366
367static struct omap_device_pad serial2_pads[] __initdata = {
368 OMAP_MUX_STATIC("uart2_cts.uart2_cts",
369 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
370 OMAP_MUX_STATIC("uart2_rts.uart2_rts",
371 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
372 OMAP_MUX_STATIC("uart2_rx.uart2_rx",
373 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
374 OMAP_MUX_STATIC("uart2_tx.uart2_tx",
375 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
376};
377
378static struct omap_device_pad serial3_pads[] __initdata = {
379 OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
380 OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
381 OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
382 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
383 OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
384 OMAP_PIN_INPUT | OMAP_MUX_MODE0),
385 OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
386 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
387};
388
389static struct omap_device_pad serial4_pads[] __initdata = {
390 OMAP_MUX_STATIC("uart4_rx.uart4_rx",
391 OMAP_PIN_INPUT | OMAP_MUX_MODE0),
392 OMAP_MUX_STATIC("uart4_tx.uart4_tx",
393 OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
394};
395
396static struct omap_board_data serial2_data __initdata = {
397 .id = 1,
398 .pads = serial2_pads,
399 .pads_cnt = ARRAY_SIZE(serial2_pads),
400};
401
402static struct omap_board_data serial3_data __initdata = {
403 .id = 2,
404 .pads = serial3_pads,
405 .pads_cnt = ARRAY_SIZE(serial3_pads),
406};
407
408static struct omap_board_data serial4_data __initdata = {
409 .id = 3,
410 .pads = serial4_pads,
411 .pads_cnt = ARRAY_SIZE(serial4_pads),
412};
413
414static inline void board_serial_init(void)
415{
416 struct omap_board_data bdata;
417 bdata.flags = 0;
418 bdata.pads = NULL;
419 bdata.pads_cnt = 0;
420 bdata.id = 0;
421 /* pass dummy data for UART1 */
422 omap_serial_init_port(&bdata);
423
424 omap_serial_init_port(&serial2_data);
425 omap_serial_init_port(&serial3_data);
426 omap_serial_init_port(&serial4_data);
427}
428#else 367#else
429#define board_mux NULL 368#define board_mux NULL
430
431static inline void board_serial_init(void)
432{
433 omap_serial_init();
434}
435#endif 369#endif
436 370
437/* Display DVI */ 371/* Display DVI */
@@ -562,7 +496,7 @@ static void __init omap4_panda_init(void)
562 omap4_panda_i2c_init(); 496 omap4_panda_i2c_init();
563 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 497 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
564 platform_device_register(&omap_vwlan_device); 498 platform_device_register(&omap_vwlan_device);
565 board_serial_init(); 499 omap_serial_init();
566 omap_sdrc_init(NULL, NULL); 500 omap_sdrc_init(NULL, NULL);
567 omap4_twl6030_hsmmc_init(mmc); 501 omap4_twl6030_hsmmc_init(mmc);
568 omap4_ehci_init(); 502 omap4_ehci_init();
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 108fee6146fc..d67bcdf724d7 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -15,6 +15,7 @@
15#include <linux/input/matrix_keypad.h> 15#include <linux/input/matrix_keypad.h>
16#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
17#include <linux/wl12xx.h> 17#include <linux/wl12xx.h>
18#include <linux/spi/tsc2005.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
19#include <linux/i2c/twl.h> 20#include <linux/i2c/twl.h>
20#include <linux/clk.h> 21#include <linux/clk.h>
@@ -58,6 +59,9 @@
58 59
59#define RX51_USB_TRANSCEIVER_RST_GPIO 67 60#define RX51_USB_TRANSCEIVER_RST_GPIO 67
60 61
62#define RX51_TSC2005_RESET_GPIO 104
63#define RX51_TSC2005_IRQ_GPIO 100
64
61/* list all spi devices here */ 65/* list all spi devices here */
62enum { 66enum {
63 RX51_SPI_WL1251, 67 RX51_SPI_WL1251,
@@ -66,6 +70,7 @@ enum {
66}; 70};
67 71
68static struct wl12xx_platform_data wl1251_pdata; 72static struct wl12xx_platform_data wl1251_pdata;
73static struct tsc2005_platform_data tsc2005_pdata;
69 74
70#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) 75#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
71static struct tsl2563_platform_data rx51_tsl2563_platform_data = { 76static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
@@ -167,10 +172,10 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
167 .modalias = "tsc2005", 172 .modalias = "tsc2005",
168 .bus_num = 1, 173 .bus_num = 1,
169 .chip_select = 0, 174 .chip_select = 0,
170 /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ 175 .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
171 .max_speed_hz = 6000000, 176 .max_speed_hz = 6000000,
172 .controller_data = &tsc2005_mcspi_config, 177 .controller_data = &tsc2005_mcspi_config,
173 /* .platform_data = &tsc2005_config,*/ 178 .platform_data = &tsc2005_pdata,
174 }, 179 },
175}; 180};
176 181
@@ -1086,6 +1091,42 @@ error:
1086 */ 1091 */
1087} 1092}
1088 1093
1094static struct tsc2005_platform_data tsc2005_pdata = {
1095 .ts_pressure_max = 2048,
1096 .ts_pressure_fudge = 2,
1097 .ts_x_max = 4096,
1098 .ts_x_fudge = 4,
1099 .ts_y_max = 4096,
1100 .ts_y_fudge = 7,
1101 .ts_x_plate_ohm = 280,
1102 .esd_timeout_ms = 8000,
1103};
1104
1105static void rx51_tsc2005_set_reset(bool enable)
1106{
1107 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1108}
1109
1110static void __init rx51_init_tsc2005(void)
1111{
1112 int r;
1113
1114 r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ");
1115 if (r < 0) {
1116 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ");
1117 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0;
1118 }
1119
1120 r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH,
1121 "tsc2005 reset");
1122 if (r >= 0) {
1123 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
1124 } else {
1125 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset");
1126 tsc2005_pdata.esd_timeout_ms = 0;
1127 }
1128}
1129
1089void __init rx51_peripherals_init(void) 1130void __init rx51_peripherals_init(void)
1090{ 1131{
1091 rx51_i2c_init(); 1132 rx51_i2c_init();
@@ -1094,6 +1135,7 @@ void __init rx51_peripherals_init(void)
1094 board_smc91x_init(); 1135 board_smc91x_init();
1095 rx51_add_gpio_keys(); 1136 rx51_add_gpio_keys();
1096 rx51_init_wl1251(); 1137 rx51_init_wl1251();
1138 rx51_init_tsc2005();
1097 rx51_init_si4713(); 1139 rx51_init_si4713();
1098 spi_register_board_info(rx51_peripherals_spi_board_info, 1140 spi_register_board_info(rx51_peripherals_spi_board_info,
1099 ARRAY_SIZE(rx51_peripherals_spi_board_info)); 1141 ARRAY_SIZE(rx51_peripherals_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 74713e3993e5..ab9a7a9e9d64 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Code for TI8168 EVM. 2 * Code for TI8168/TI8148 EVM.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -23,30 +23,45 @@
23#include <plat/irqs.h> 23#include <plat/irqs.h>
24#include <plat/board.h> 24#include <plat/board.h>
25#include "common.h" 25#include "common.h"
26#include <plat/usb.h>
26 27
27static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { 28static struct omap_musb_board_data musb_board_data = {
29 .set_phy_power = ti81xx_musb_phy_power,
30 .interface_type = MUSB_INTERFACE_ULPI,
31 .mode = MUSB_OTG,
32 .power = 500,
28}; 33};
29 34
30static void __init ti8168_evm_init(void) 35static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
36};
37
38static void __init ti81xx_evm_init(void)
31{ 39{
32 omap_serial_init(); 40 omap_serial_init();
33 omap_sdrc_init(NULL, NULL); 41 omap_sdrc_init(NULL, NULL);
34 omap_board_config = ti8168_evm_config; 42 omap_board_config = ti81xx_evm_config;
35 omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); 43 omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
36} 44 usb_musb_init(&musb_board_data);
37
38static void __init ti8168_evm_map_io(void)
39{
40 omapti816x_map_common_io();
41} 45}
42 46
43MACHINE_START(TI8168EVM, "ti8168evm") 47MACHINE_START(TI8168EVM, "ti8168evm")
44 /* Maintainer: Texas Instruments */ 48 /* Maintainer: Texas Instruments */
45 .atag_offset = 0x100, 49 .atag_offset = 0x100,
46 .map_io = ti8168_evm_map_io, 50 .map_io = ti81xx_map_io,
47 .init_early = ti816x_init_early, 51 .init_early = ti81xx_init_early,
48 .init_irq = ti816x_init_irq, 52 .init_irq = ti81xx_init_irq,
53 .timer = &omap3_timer,
54 .init_machine = ti81xx_evm_init,
55 .restart = omap_prcm_restart,
56MACHINE_END
57
58MACHINE_START(TI8148EVM, "ti8148evm")
59 /* Maintainer: Texas Instruments */
60 .atag_offset = 0x100,
61 .map_io = ti81xx_map_io,
62 .init_early = ti81xx_init_early,
63 .init_irq = ti81xx_init_irq,
49 .timer = &omap3_timer, 64 .timer = &omap3_timer,
50 .init_machine = ti8168_evm_init, 65 .init_machine = ti81xx_evm_init,
51 .restart = omap_prcm_restart, 66 .restart = omap_prcm_restart,
52MACHINE_END 67MACHINE_END
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1f3481f8d695..f57ed5baeccf 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -35,7 +35,7 @@
35#include "cm-regbits-24xx.h" 35#include "cm-regbits-24xx.h"
36#include "cm-regbits-34xx.h" 36#include "cm-regbits-34xx.h"
37 37
38u8 cpu_mask; 38u16 cpu_mask;
39 39
40/* 40/*
41 * clkdm_control: if true, then when a clock is enabled in the 41 * clkdm_control: if true, then when a clock is enabled in the
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 2311bc217226..b8c2a686481c 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -132,7 +132,7 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
132 const char *core_ck_name, 132 const char *core_ck_name,
133 const char *mpu_ck_name); 133 const char *mpu_ck_name);
134 134
135extern u8 cpu_mask; 135extern u16 cpu_mask;
136 136
137extern const struct clkops clkops_omap2_dflt_wait; 137extern const struct clkops clkops_omap2_dflt_wait;
138extern const struct clkops clkops_dummy; 138extern const struct clkops clkops_dummy;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 5d0064a4fb5a..d75e5f6b8a01 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -2480,6 +2480,16 @@ static struct clk uart4_fck = {
2480 .recalc = &followparent_recalc, 2480 .recalc = &followparent_recalc,
2481}; 2481};
2482 2482
2483static struct clk uart4_fck_am35xx = {
2484 .name = "uart4_fck",
2485 .ops = &clkops_omap2_dflt_wait,
2486 .parent = &per_48m_fck,
2487 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2488 .enable_bit = OMAP3430_EN_UART4_SHIFT,
2489 .clkdm_name = "core_l4_clkdm",
2490 .recalc = &followparent_recalc,
2491};
2492
2483static struct clk gpt2_fck = { 2493static struct clk gpt2_fck = {
2484 .name = "gpt2_fck", 2494 .name = "gpt2_fck",
2485 .ops = &clkops_omap2_dflt_wait, 2495 .ops = &clkops_omap2_dflt_wait,
@@ -3287,7 +3297,7 @@ static struct omap_clk omap3xxx_clks[] = {
3287 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3297 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3288 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3298 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3289 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3299 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3290 CLK("usbhs-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3300 CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3291 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), 3301 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
3292 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), 3302 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
3293 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), 3303 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
@@ -3323,7 +3333,7 @@ static struct omap_clk omap3xxx_clks[] = {
3323 CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), 3333 CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX),
3324 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), 3334 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX),
3325 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3335 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3326 CLK("usbhs-omap.0", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3336 CLK("usbhs_omap", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3327 CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3337 CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3328 CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), 3338 CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX),
3329 CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), 3339 CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX),
@@ -3369,20 +3379,18 @@ static struct omap_clk omap3xxx_clks[] = {
3369 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), 3379 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX),
3370 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), 3380 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX),
3371 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3381 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3372 CLK("usbhs-omap.0", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3373 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3382 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3374 CLK("usbhs-omap.0", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3375 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3383 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3376 CLK("usbhs-omap.0", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3384 CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3377 CLK("usbhs-omap.0", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), 3385 CLK("usbhs_omap", "utmi_p1_gfclk", &dummy_ck, CK_3XXX),
3378 CLK("usbhs-omap.0", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), 3386 CLK("usbhs_omap", "utmi_p2_gfclk", &dummy_ck, CK_3XXX),
3379 CLK("usbhs-omap.0", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), 3387 CLK("usbhs_omap", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX),
3380 CLK("usbhs-omap.0", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), 3388 CLK("usbhs_omap", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX),
3381 CLK("usbhs-omap.0", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), 3389 CLK("usbhs_omap", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX),
3382 CLK("usbhs-omap.0", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), 3390 CLK("usbhs_omap", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX),
3383 CLK("usbhs-omap.0", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), 3391 CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX),
3384 CLK("usbhs-omap.0", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), 3392 CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX),
3385 CLK("usbhs-omap.0", "init_60m_fclk", &dummy_ck, CK_3XXX), 3393 CLK("usbhs_omap", "init_60m_fclk", &dummy_ck, CK_3XXX),
3386 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), 3394 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX),
3387 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), 3395 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX),
3388 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), 3396 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX),
@@ -3403,6 +3411,7 @@ static struct omap_clk omap3xxx_clks[] = {
3403 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), 3411 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
3404 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), 3412 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
3405 CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), 3413 CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX),
3414 CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517),
3406 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), 3415 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX),
3407 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), 3416 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX),
3408 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), 3417 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX),
@@ -3517,6 +3526,10 @@ int __init omap3xxx_clk_init(void)
3517 } else if (cpu_is_ti816x()) { 3526 } else if (cpu_is_ti816x()) {
3518 cpu_mask = RATE_IN_TI816X; 3527 cpu_mask = RATE_IN_TI816X;
3519 cpu_clkflg = CK_TI816X; 3528 cpu_clkflg = CK_TI816X;
3529 } else if (cpu_is_am33xx()) {
3530 cpu_mask = RATE_IN_AM33XX;
3531 } else if (cpu_is_ti814x()) {
3532 cpu_mask = RATE_IN_TI814X;
3520 } else if (cpu_is_omap34xx()) { 3533 } else if (cpu_is_omap34xx()) {
3521 if (omap_rev() == OMAP3430_REV_ES1_0) { 3534 if (omap_rev() == OMAP3430_REV_ES1_0) {
3522 cpu_mask = RATE_IN_3430ES1; 3535 cpu_mask = RATE_IN_3430ES1;
@@ -3600,7 +3613,7 @@ int __init omap3xxx_clk_init(void)
3600 * Lock DPLL5 -- here only until other device init code can 3613 * Lock DPLL5 -- here only until other device init code can
3601 * handle this 3614 * handle this
3602 */ 3615 */
3603 if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0)) 3616 if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0))
3604 omap3_clk_lock_dpll5(); 3617 omap3_clk_lock_dpll5();
3605 3618
3606 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ 3619 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 0798a802497a..08e86d793a1f 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1206,6 +1206,14 @@ static const struct clksel ocp_abe_iclk_div[] = {
1206 { .parent = NULL }, 1206 { .parent = NULL },
1207}; 1207};
1208 1208
1209static struct clk mpu_periphclk = {
1210 .name = "mpu_periphclk",
1211 .parent = &dpll_mpu_ck,
1212 .ops = &clkops_null,
1213 .fixed_div = 2,
1214 .recalc = &omap_fixed_divisor_recalc,
1215};
1216
1209static struct clk ocp_abe_iclk = { 1217static struct clk ocp_abe_iclk = {
1210 .name = "ocp_abe_iclk", 1218 .name = "ocp_abe_iclk",
1211 .parent = &aess_fclk, 1219 .parent = &aess_fclk,
@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
3189 CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), 3197 CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
3190 CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), 3198 CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
3191 CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), 3199 CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
3200 CLK("smp_twd", NULL, &mpu_periphclk, CK_443X),
3192 CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), 3201 CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
3193 CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), 3202 CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
3194 CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), 3203 CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
@@ -3295,7 +3304,7 @@ static struct omap_clk omap44xx_clks[] = {
3295 CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), 3304 CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
3296 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), 3305 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
3297 CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), 3306 CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
3298 CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), 3307 CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_443X),
3299 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), 3308 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
3300 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), 3309 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
3301 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), 3310 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X),
@@ -3306,7 +3315,7 @@ static struct omap_clk omap44xx_clks[] = {
3306 CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), 3315 CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X),
3307 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), 3316 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
3308 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), 3317 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
3309 CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), 3318 CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_443X),
3310 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), 3319 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
3311 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), 3320 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
3312 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), 3321 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
@@ -3314,7 +3323,7 @@ static struct omap_clk omap44xx_clks[] = {
3314 CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), 3323 CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X),
3315 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), 3324 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
3316 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), 3325 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
3317 CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), 3326 CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
3318 CLK(NULL, "usim_ck", &usim_ck, CK_443X), 3327 CLK(NULL, "usim_ck", &usim_ck, CK_443X),
3319 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), 3328 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
3320 CLK(NULL, "usim_fck", &usim_fck, CK_443X), 3329 CLK(NULL, "usim_fck", &usim_fck, CK_443X),
@@ -3374,8 +3383,8 @@ static struct omap_clk omap44xx_clks[] = {
3374 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), 3383 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
3375 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), 3384 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
3376 CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), 3385 CLK(NULL, "uart4_ick", &dummy_ck, CK_443X),
3377 CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), 3386 CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X),
3378 CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), 3387 CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X),
3379 CLK("omap_wdt", "ick", &dummy_ck, CK_443X), 3388 CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
3380 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), 3389 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
3381 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), 3390 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 684b8a7cd401..aaf421178c91 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -110,23 +110,49 @@ void __init omap3_map_io(void)
110 110
111/* 111/*
112 * Adjust TAP register base such that omap3_check_revision accesses the correct 112 * Adjust TAP register base such that omap3_check_revision accesses the correct
113 * TI816X register for checking device ID (it adds 0x204 to tap base while 113 * TI81XX register for checking device ID (it adds 0x204 to tap base while
114 * TI816X DEVICE ID register is at offset 0x600 from control base). 114 * TI81XX DEVICE ID register is at offset 0x600 from control base).
115 */ 115 */
116#define TI816X_TAP_BASE (TI816X_CTRL_BASE + \ 116#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
117 TI816X_CONTROL_DEVICE_ID - 0x204) 117 TI81XX_CONTROL_DEVICE_ID - 0x204)
118 118
119static struct omap_globals ti816x_globals = { 119static struct omap_globals ti81xx_globals = {
120 .class = OMAP343X_CLASS, 120 .class = OMAP343X_CLASS,
121 .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), 121 .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
122 .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE), 122 .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
123 .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), 123 .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
124 .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), 124 .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
125}; 125};
126 126
127void __init omap2_set_globals_ti816x(void) 127void __init omap2_set_globals_ti81xx(void)
128{ 128{
129 __omap2_set_globals(&ti816x_globals); 129 __omap2_set_globals(&ti81xx_globals);
130}
131
132void __init ti81xx_map_io(void)
133{
134 omapti81xx_map_common_io();
135}
136
137#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
138 TI81XX_CONTROL_DEVICE_ID - 0x204)
139
140static struct omap_globals am33xx_globals = {
141 .class = AM335X_CLASS,
142 .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
143 .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
144 .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
145 .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
146};
147
148void __init omap2_set_globals_am33xx(void)
149{
150 __omap2_set_globals(&am33xx_globals);
151}
152
153void __init am33xx_map_io(void)
154{
155 omapam33xx_map_common_io();
130} 156}
131#endif 157#endif
132 158
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index cda888a2e635..febffde2ff10 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -24,9 +24,11 @@
24 24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27#ifndef __ASSEMBLER__
27 28
28#include <linux/delay.h> 29#include <linux/delay.h>
29#include <plat/common.h> 30#include <plat/common.h>
31#include <asm/proc-fns.h>
30 32
31#ifdef CONFIG_SOC_OMAP2420 33#ifdef CONFIG_SOC_OMAP2420
32extern void omap242x_map_common_io(void); 34extern void omap242x_map_common_io(void);
@@ -52,10 +54,18 @@ static inline void omap34xx_map_common_io(void)
52} 54}
53#endif 55#endif
54 56
55#ifdef CONFIG_SOC_OMAPTI816X 57#ifdef CONFIG_SOC_OMAPTI81XX
56extern void omapti816x_map_common_io(void); 58extern void omapti81xx_map_common_io(void);
57#else 59#else
58static inline void omapti816x_map_common_io(void) 60static inline void omapti81xx_map_common_io(void)
61{
62}
63#endif
64
65#ifdef CONFIG_SOC_OMAPAM33XX
66extern void omapam33xx_map_common_io(void);
67#else
68static inline void omapam33xx_map_common_io(void)
59{ 69{
60} 70}
61#endif 71#endif
@@ -82,7 +92,7 @@ void omap35xx_init_early(void);
82void omap3630_init_early(void); 92void omap3630_init_early(void);
83void omap3_init_early(void); /* Do not use this one */ 93void omap3_init_early(void); /* Do not use this one */
84void am35xx_init_early(void); 94void am35xx_init_early(void);
85void ti816x_init_early(void); 95void ti81xx_init_early(void);
86void omap4430_init_early(void); 96void omap4430_init_early(void);
87void omap_prcm_restart(char, const char *); 97void omap_prcm_restart(char, const char *);
88 98
@@ -107,7 +117,8 @@ void omap2_set_globals_242x(void);
107void omap2_set_globals_243x(void); 117void omap2_set_globals_243x(void);
108void omap2_set_globals_3xxx(void); 118void omap2_set_globals_3xxx(void);
109void omap2_set_globals_443x(void); 119void omap2_set_globals_443x(void);
110void omap2_set_globals_ti816x(void); 120void omap2_set_globals_ti81xx(void);
121void omap2_set_globals_am33xx(void);
111 122
112/* These get called from omap2_set_globals_xxxx(), do not call these */ 123/* These get called from omap2_set_globals_xxxx(), do not call these */
113void omap2_set_globals_tap(struct omap_globals *); 124void omap2_set_globals_tap(struct omap_globals *);
@@ -118,7 +129,9 @@ void omap2_set_globals_prcm(struct omap_globals *);
118void omap242x_map_io(void); 129void omap242x_map_io(void);
119void omap243x_map_io(void); 130void omap243x_map_io(void);
120void omap3_map_io(void); 131void omap3_map_io(void);
132void am33xx_map_io(void);
121void omap4_map_io(void); 133void omap4_map_io(void);
134void ti81xx_map_io(void);
122 135
123/** 136/**
124 * omap_test_timeout - busy-loop, testing a condition 137 * omap_test_timeout - busy-loop, testing a condition
@@ -147,7 +160,7 @@ extern struct device *omap4_get_dsp_device(void);
147 160
148void omap2_init_irq(void); 161void omap2_init_irq(void);
149void omap3_init_irq(void); 162void omap3_init_irq(void);
150void ti816x_init_irq(void); 163void ti81xx_init_irq(void);
151extern int omap_irq_pending(void); 164extern int omap_irq_pending(void);
152void omap_intc_save_context(void); 165void omap_intc_save_context(void);
153void omap_intc_restore_context(void); 166void omap_intc_restore_context(void);
@@ -157,23 +170,23 @@ void omap3_intc_resume_idle(void);
157void omap2_intc_handle_irq(struct pt_regs *regs); 170void omap2_intc_handle_irq(struct pt_regs *regs);
158void omap3_intc_handle_irq(struct pt_regs *regs); 171void omap3_intc_handle_irq(struct pt_regs *regs);
159 172
160/* 173#ifdef CONFIG_CACHE_L2X0
161 * wfi used in low power code. Directly opcode is used instead 174extern void __iomem *omap4_get_l2cache_base(void);
162 * of instruction to avoid mulit-omap build break
163 */
164#ifdef CONFIG_THUMB2_KERNEL
165#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
166#else
167#define do_wfi() \
168 __asm__ __volatile__ (".word 0xe320f003" : : : "memory")
169#endif 175#endif
170 176
171#ifdef CONFIG_CACHE_L2X0 177#ifdef CONFIG_SMP
172extern void __iomem *l2cache_base; 178extern void __iomem *omap4_get_scu_base(void);
179#else
180static inline void __iomem *omap4_get_scu_base(void)
181{
182 return NULL;
183}
173#endif 184#endif
174 185
175extern void __init gic_init_irq(void); 186extern void __init gic_init_irq(void);
176extern void omap_smc1(u32 fn, u32 arg); 187extern void omap_smc1(u32 fn, u32 arg);
188extern void __iomem *omap4_get_sar_ram_base(void);
189extern void omap_do_wfi(void);
177 190
178#ifdef CONFIG_SMP 191#ifdef CONFIG_SMP
179/* Needed for secondary core boot */ 192/* Needed for secondary core boot */
@@ -183,4 +196,44 @@ extern void omap_auxcoreboot_addr(u32 cpu_addr);
183extern u32 omap_read_auxcoreboot0(void); 196extern u32 omap_read_auxcoreboot0(void);
184#endif 197#endif
185 198
199#if defined(CONFIG_SMP) && defined(CONFIG_PM)
200extern int omap4_mpuss_init(void);
201extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
202extern int omap4_finish_suspend(unsigned long cpu_state);
203extern void omap4_cpu_resume(void);
204extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
205extern u32 omap4_mpuss_read_prev_context_state(void);
206#else
207static inline int omap4_enter_lowpower(unsigned int cpu,
208 unsigned int power_state)
209{
210 cpu_do_idle();
211 return 0;
212}
213
214static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
215{
216 cpu_do_idle();
217 return 0;
218}
219
220static inline int omap4_mpuss_init(void)
221{
222 return 0;
223}
224
225static inline int omap4_finish_suspend(unsigned long cpu_state)
226{
227 return 0;
228}
229
230static inline void omap4_cpu_resume(void)
231{}
232
233static inline u32 omap4_mpuss_read_prev_context_state(void)
234{
235 return 0;
236}
237#endif
238#endif /* __ASSEMBLER__ */
186#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 239#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index d4ef75d5a382..0ba68d3764bc 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -52,8 +52,8 @@
52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 52#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00
53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 53#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
54 54
55/* TI816X spefic control submodules */ 55/* TI81XX spefic control submodules */
56#define TI816X_CONTROL_DEVCONF 0x600 56#define TI81XX_CONTROL_DEVCONF 0x600
57 57
58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ 58/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
59 59
@@ -244,8 +244,8 @@
244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 244#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 245#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
246 246
247/* TI816X CONTROL_DEVCONF register offsets */ 247/* TI81XX CONTROL_DEVCONF register offsets */
248#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000) 248#define TI81XX_CONTROL_DEVICE_ID (TI81XX_CONTROL_DEVCONF + 0x000)
249 249
250/* 250/*
251 * REVISIT: This list of registers is not comprehensive - there are more 251 * REVISIT: This list of registers is not comprehensive - there are more
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index e20332f4abdc..464cffde58fe 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -25,12 +25,12 @@
25#include <linux/sched.h> 25#include <linux/sched.h>
26#include <linux/cpuidle.h> 26#include <linux/cpuidle.h>
27#include <linux/export.h> 27#include <linux/export.h>
28#include <linux/cpu_pm.h>
28 29
29#include <plat/prcm.h> 30#include <plat/prcm.h>
30#include <plat/irqs.h> 31#include <plat/irqs.h>
31#include "powerdomain.h" 32#include "powerdomain.h"
32#include "clockdomain.h" 33#include "clockdomain.h"
33#include <plat/serial.h>
34 34
35#include "pm.h" 35#include "pm.h"
36#include "control.h" 36#include "control.h"
@@ -124,9 +124,23 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
124 pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle); 124 pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
125 } 125 }
126 126
127 /*
128 * Call idle CPU PM enter notifier chain so that
129 * VFP context is saved.
130 */
131 if (mpu_state == PWRDM_POWER_OFF)
132 cpu_pm_enter();
133
127 /* Execute ARM wfi */ 134 /* Execute ARM wfi */
128 omap_sram_idle(); 135 omap_sram_idle();
129 136
137 /*
138 * Call idle CPU PM enter notifier chain to restore
139 * VFP context.
140 */
141 if (pwrdm_read_prev_pwrst(mpu_pd) == PWRDM_POWER_OFF)
142 cpu_pm_exit();
143
130 /* Re-allow idle for C1 */ 144 /* Re-allow idle for C1 */
131 if (index == 0) { 145 if (index == 0) {
132 pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle); 146 pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
@@ -245,11 +259,6 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
245 struct omap3_idle_statedata *cx; 259 struct omap3_idle_statedata *cx;
246 int ret; 260 int ret;
247 261
248 if (!omap3_can_sleep()) {
249 new_state_idx = drv->safe_state_index;
250 goto select_state;
251 }
252
253 /* 262 /*
254 * Prevent idle completely if CAM is active. 263 * Prevent idle completely if CAM is active.
255 * CAM does not have wakeup capability in OMAP3. 264 * CAM does not have wakeup capability in OMAP3.
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
new file mode 100644
index 000000000000..cfdbb86bc84e
--- /dev/null
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -0,0 +1,245 @@
1/*
2 * OMAP4 CPU idle Routines
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Rajendra Nayak <rnayak@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/sched.h>
14#include <linux/cpuidle.h>
15#include <linux/cpu_pm.h>
16#include <linux/export.h>
17#include <linux/clockchips.h>
18
19#include <asm/proc-fns.h>
20
21#include "common.h"
22#include "pm.h"
23#include "prm.h"
24
25#ifdef CONFIG_CPU_IDLE
26
27/* Machine specific information to be recorded in the C-state driver_data */
28struct omap4_idle_statedata {
29 u32 cpu_state;
30 u32 mpu_logic_state;
31 u32 mpu_state;
32 u8 valid;
33};
34
35static struct cpuidle_params cpuidle_params_table[] = {
36 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
37 {.exit_latency = 2 + 2 , .target_residency = 5, .valid = 1},
38 /* C2- CPU0 OFF + CPU1 OFF + MPU CSWR */
39 {.exit_latency = 328 + 440 , .target_residency = 960, .valid = 1},
40 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
41 {.exit_latency = 460 + 518 , .target_residency = 1100, .valid = 1},
42};
43
44#define OMAP4_NUM_STATES ARRAY_SIZE(cpuidle_params_table)
45
46struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES];
47static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
48
49/**
50 * omap4_enter_idle - Programs OMAP4 to enter the specified state
51 * @dev: cpuidle device
52 * @drv: cpuidle driver
53 * @index: the index of state to be entered
54 *
55 * Called from the CPUidle framework to program the device to the
56 * specified low power state selected by the governor.
57 * Returns the amount of time spent in the low power state.
58 */
59static int omap4_enter_idle(struct cpuidle_device *dev,
60 struct cpuidle_driver *drv,
61 int index)
62{
63 struct omap4_idle_statedata *cx =
64 cpuidle_get_statedata(&dev->states_usage[index]);
65 struct timespec ts_preidle, ts_postidle, ts_idle;
66 u32 cpu1_state;
67 int idle_time;
68 int new_state_idx;
69 int cpu_id = smp_processor_id();
70
71 /* Used to keep track of the total time in idle */
72 getnstimeofday(&ts_preidle);
73
74 local_irq_disable();
75 local_fiq_disable();
76
77 /*
78 * CPU0 has to stay ON (i.e in C1) until CPU1 is OFF state.
79 * This is necessary to honour hardware recommondation
80 * of triggeing all the possible low power modes once CPU1 is
81 * out of coherency and in OFF mode.
82 * Update dev->last_state so that governor stats reflects right
83 * data.
84 */
85 cpu1_state = pwrdm_read_pwrst(cpu1_pd);
86 if (cpu1_state != PWRDM_POWER_OFF) {
87 new_state_idx = drv->safe_state_index;
88 cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]);
89 }
90
91 if (index > 0)
92 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
93
94 /*
95 * Call idle CPU PM enter notifier chain so that
96 * VFP and per CPU interrupt context is saved.
97 */
98 if (cx->cpu_state == PWRDM_POWER_OFF)
99 cpu_pm_enter();
100
101 pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
102 omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
103
104 /*
105 * Call idle CPU cluster PM enter notifier chain
106 * to save GIC and wakeupgen context.
107 */
108 if ((cx->mpu_state == PWRDM_POWER_RET) &&
109 (cx->mpu_logic_state == PWRDM_POWER_OFF))
110 cpu_cluster_pm_enter();
111
112 omap4_enter_lowpower(dev->cpu, cx->cpu_state);
113
114 /*
115 * Call idle CPU PM exit notifier chain to restore
116 * VFP and per CPU IRQ context. Only CPU0 state is
117 * considered since CPU1 is managed by CPU hotplug.
118 */
119 if (pwrdm_read_prev_pwrst(cpu0_pd) == PWRDM_POWER_OFF)
120 cpu_pm_exit();
121
122 /*
123 * Call idle CPU cluster PM exit notifier chain
124 * to restore GIC and wakeupgen context.
125 */
126 if (omap4_mpuss_read_prev_context_state())
127 cpu_cluster_pm_exit();
128
129 if (index > 0)
130 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
131
132 getnstimeofday(&ts_postidle);
133 ts_idle = timespec_sub(ts_postidle, ts_preidle);
134
135 local_irq_enable();
136 local_fiq_enable();
137
138 idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
139 USEC_PER_SEC;
140
141 /* Update cpuidle counters */
142 dev->last_residency = idle_time;
143
144 return index;
145}
146
147DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev);
148
149struct cpuidle_driver omap4_idle_driver = {
150 .name = "omap4_idle",
151 .owner = THIS_MODULE,
152};
153
154static inline void _fill_cstate(struct cpuidle_driver *drv,
155 int idx, const char *descr)
156{
157 struct cpuidle_state *state = &drv->states[idx];
158
159 state->exit_latency = cpuidle_params_table[idx].exit_latency;
160 state->target_residency = cpuidle_params_table[idx].target_residency;
161 state->flags = CPUIDLE_FLAG_TIME_VALID;
162 state->enter = omap4_enter_idle;
163 sprintf(state->name, "C%d", idx + 1);
164 strncpy(state->desc, descr, CPUIDLE_DESC_LEN);
165}
166
167static inline struct omap4_idle_statedata *_fill_cstate_usage(
168 struct cpuidle_device *dev,
169 int idx)
170{
171 struct omap4_idle_statedata *cx = &omap4_idle_data[idx];
172 struct cpuidle_state_usage *state_usage = &dev->states_usage[idx];
173
174 cx->valid = cpuidle_params_table[idx].valid;
175 cpuidle_set_statedata(state_usage, cx);
176
177 return cx;
178}
179
180
181
182/**
183 * omap4_idle_init - Init routine for OMAP4 idle
184 *
185 * Registers the OMAP4 specific cpuidle driver to the cpuidle
186 * framework with the valid set of states.
187 */
188int __init omap4_idle_init(void)
189{
190 struct omap4_idle_statedata *cx;
191 struct cpuidle_device *dev;
192 struct cpuidle_driver *drv = &omap4_idle_driver;
193 unsigned int cpu_id = 0;
194
195 mpu_pd = pwrdm_lookup("mpu_pwrdm");
196 cpu0_pd = pwrdm_lookup("cpu0_pwrdm");
197 cpu1_pd = pwrdm_lookup("cpu1_pwrdm");
198 if ((!mpu_pd) || (!cpu0_pd) || (!cpu1_pd))
199 return -ENODEV;
200
201
202 drv->safe_state_index = -1;
203 dev = &per_cpu(omap4_idle_dev, cpu_id);
204 dev->cpu = cpu_id;
205
206 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
207 _fill_cstate(drv, 0, "MPUSS ON");
208 drv->safe_state_index = 0;
209 cx = _fill_cstate_usage(dev, 0);
210 cx->valid = 1; /* C1 is always valid */
211 cx->cpu_state = PWRDM_POWER_ON;
212 cx->mpu_state = PWRDM_POWER_ON;
213 cx->mpu_logic_state = PWRDM_POWER_RET;
214
215 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
216 _fill_cstate(drv, 1, "MPUSS CSWR");
217 cx = _fill_cstate_usage(dev, 1);
218 cx->cpu_state = PWRDM_POWER_OFF;
219 cx->mpu_state = PWRDM_POWER_RET;
220 cx->mpu_logic_state = PWRDM_POWER_RET;
221
222 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
223 _fill_cstate(drv, 2, "MPUSS OSWR");
224 cx = _fill_cstate_usage(dev, 2);
225 cx->cpu_state = PWRDM_POWER_OFF;
226 cx->mpu_state = PWRDM_POWER_RET;
227 cx->mpu_logic_state = PWRDM_POWER_OFF;
228
229 drv->state_count = OMAP4_NUM_STATES;
230 cpuidle_register_driver(&omap4_idle_driver);
231
232 dev->state_count = OMAP4_NUM_STATES;
233 if (cpuidle_register_device(dev)) {
234 pr_err("%s: CPUidle register device failed\n", __func__);
235 return -EIO;
236 }
237
238 return 0;
239}
240#else
241int __init omap4_idle_init(void)
242{
243 return 0;
244}
245#endif /* CONFIG_CPU_IDLE */
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c15cfada5f13..35d5dffab7e1 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -336,6 +336,27 @@ static void omap_init_mcpdm(void)
336static inline void omap_init_mcpdm(void) {} 336static inline void omap_init_mcpdm(void) {}
337#endif 337#endif
338 338
339#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
340 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
341
342static void omap_init_dmic(void)
343{
344 struct omap_hwmod *oh;
345 struct platform_device *pdev;
346
347 oh = omap_hwmod_lookup("dmic");
348 if (!oh) {
349 printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
350 return;
351 }
352
353 pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
354 WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
355}
356#else
357static inline void omap_init_dmic(void) {}
358#endif
359
339#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 360#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
340 361
341#include <plat/mcspi.h> 362#include <plat/mcspi.h>
@@ -681,6 +702,7 @@ static int __init omap2_init_devices(void)
681 */ 702 */
682 omap_init_audio(); 703 omap_init_audio();
683 omap_init_mcpdm(); 704 omap_init_mcpdm();
705 omap_init_dmic();
684 omap_init_camera(); 706 omap_init_camera();
685 omap_init_mbox(); 707 omap_init_mbox();
686 omap_init_mcspi(); 708 omap_init_mcspi();
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index f4a1020559a7..bd844af13af5 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -171,6 +171,17 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
171 } 171 }
172} 172}
173 173
174static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
175{
176 u32 reg;
177
178 if (mmc->slots[0].internal_clock) {
179 reg = omap_ctrl_readl(control_devconf1_offset);
180 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
181 omap_ctrl_writel(reg, control_devconf1_offset);
182 }
183}
184
174static void hsmmc23_before_set_reg(struct device *dev, int slot, 185static void hsmmc23_before_set_reg(struct device *dev, int slot,
175 int power_on, int vdd) 186 int power_on, int vdd)
176{ 187{
@@ -179,16 +190,19 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot,
179 if (mmc->slots[0].remux) 190 if (mmc->slots[0].remux)
180 mmc->slots[0].remux(dev, slot, power_on); 191 mmc->slots[0].remux(dev, slot, power_on);
181 192
182 if (power_on) { 193 if (power_on)
183 /* Only MMC2 supports a CLKIN */ 194 hsmmc2_select_input_clk_src(mmc);
184 if (mmc->slots[0].internal_clock) { 195}
185 u32 reg;
186 196
187 reg = omap_ctrl_readl(control_devconf1_offset); 197static int am35x_hsmmc2_set_power(struct device *dev, int slot,
188 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 198 int power_on, int vdd)
189 omap_ctrl_writel(reg, control_devconf1_offset); 199{
190 } 200 struct omap_mmc_platform_data *mmc = dev->platform_data;
191 } 201
202 if (power_on)
203 hsmmc2_select_input_clk_src(mmc);
204
205 return 0;
192} 206}
193 207
194static int nop_mmc_set_power(struct device *dev, int slot, int power_on, 208static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
@@ -200,10 +214,12 @@ static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
200static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, 214static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
201 int controller_nr) 215 int controller_nr)
202{ 216{
203 if (gpio_is_valid(mmc_controller->slots[0].switch_pin)) 217 if (gpio_is_valid(mmc_controller->slots[0].switch_pin) &&
218 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
204 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, 219 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
205 OMAP_PIN_INPUT_PULLUP); 220 OMAP_PIN_INPUT_PULLUP);
206 if (gpio_is_valid(mmc_controller->slots[0].gpio_wp)) 221 if (gpio_is_valid(mmc_controller->slots[0].gpio_wp) &&
222 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
207 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, 223 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
208 OMAP_PIN_INPUT_PULLUP); 224 OMAP_PIN_INPUT_PULLUP);
209 if (cpu_is_omap34xx()) { 225 if (cpu_is_omap34xx()) {
@@ -296,6 +312,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
296 mmc->slots[0].name = hc_name; 312 mmc->slots[0].name = hc_name;
297 mmc->nr_slots = 1; 313 mmc->nr_slots = 1;
298 mmc->slots[0].caps = c->caps; 314 mmc->slots[0].caps = c->caps;
315 mmc->slots[0].pm_caps = c->pm_caps;
299 mmc->slots[0].internal_clock = !c->ext_clock; 316 mmc->slots[0].internal_clock = !c->ext_clock;
300 mmc->dma_mask = 0xffffffff; 317 mmc->dma_mask = 0xffffffff;
301 if (cpu_is_omap44xx()) 318 if (cpu_is_omap44xx())
@@ -336,11 +353,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
336 * 353 *
337 * temporary HACK: ocr_mask instead of fixed supply 354 * temporary HACK: ocr_mask instead of fixed supply
338 */ 355 */
339 mmc->slots[0].ocr_mask = c->ocr_mask; 356 if (cpu_is_omap3505() || cpu_is_omap3517())
340 357 mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
341 if (cpu_is_omap3517() || cpu_is_omap3505()) 358 MMC_VDD_26_27 |
342 mmc->slots[0].set_power = nop_mmc_set_power; 359 MMC_VDD_27_28 |
360 MMC_VDD_29_30 |
361 MMC_VDD_30_31 |
362 MMC_VDD_31_32;
343 else 363 else
364 mmc->slots[0].ocr_mask = c->ocr_mask;
365
366 if (!cpu_is_omap3517() && !cpu_is_omap3505())
344 mmc->slots[0].features |= HSMMC_HAS_PBIAS; 367 mmc->slots[0].features |= HSMMC_HAS_PBIAS;
345 368
346 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) 369 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
@@ -363,6 +386,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
363 } 386 }
364 } 387 }
365 388
389 if (cpu_is_omap3517() || cpu_is_omap3505())
390 mmc->slots[0].set_power = nop_mmc_set_power;
391
366 /* OMAP3630 HSMMC1 supports only 4-bit */ 392 /* OMAP3630 HSMMC1 supports only 4-bit */
367 if (cpu_is_omap3630() && 393 if (cpu_is_omap3630() &&
368 (c->caps & MMC_CAP_8_BIT_DATA)) { 394 (c->caps & MMC_CAP_8_BIT_DATA)) {
@@ -372,6 +398,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
372 } 398 }
373 break; 399 break;
374 case 2: 400 case 2:
401 if (cpu_is_omap3517() || cpu_is_omap3505())
402 mmc->slots[0].set_power = am35x_hsmmc2_set_power;
403
375 if (c->ext_clock) 404 if (c->ext_clock)
376 c->transceiver = 1; 405 c->transceiver = 1;
377 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { 406 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) {
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index f757e78d4d4f..c4409730c4bb 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -12,6 +12,7 @@ struct omap2_hsmmc_info {
12 u8 mmc; /* controller 1/2/3 */ 12 u8 mmc; /* controller 1/2/3 */
13 u32 caps; /* 4/8 wires and any additional host 13 u32 caps; /* 4/8 wires and any additional host
14 * capabilities OR'd (ref. linux/mmc/host.h) */ 14 * capabilities OR'd (ref. linux/mmc/host.h) */
15 u32 pm_caps; /* PM capabilities */
15 bool transceiver; /* MMC-2 option */ 16 bool transceiver; /* MMC-2 option */
16 bool ext_clock; /* use external pin for input clock */ 17 bool ext_clock; /* use external pin for input clock */
17 bool cover_only; /* No card detect - just cover switch */ 18 bool cover_only; /* No card detect - just cover switch */
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 27ad722df637..6c5826605eae 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -226,7 +226,7 @@ static void __init omap4_check_features(void)
226 } 226 }
227} 227}
228 228
229static void __init ti816x_check_features(void) 229static void __init ti81xx_check_features(void)
230{ 230{
231 omap_features = OMAP3_HAS_NEON; 231 omap_features = OMAP3_HAS_NEON;
232} 232}
@@ -340,6 +340,29 @@ static void __init omap3_check_revision(const char **cpu_rev)
340 break; 340 break;
341 } 341 }
342 break; 342 break;
343 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0";
346 case 0xb8f2:
347 switch (rev) {
348 case 0:
349 /* FALLTHROUGH */
350 case 1:
351 omap_revision = TI8148_REV_ES1_0;
352 *cpu_rev = "1.0";
353 break;
354 case 2:
355 omap_revision = TI8148_REV_ES2_0;
356 *cpu_rev = "2.0";
357 break;
358 case 3:
359 /* FALLTHROUGH */
360 default:
361 omap_revision = TI8148_REV_ES2_1;
362 *cpu_rev = "2.1";
363 break;
364 }
365 break;
343 default: 366 default:
344 /* Unknown default to latest silicon rev as default */ 367 /* Unknown default to latest silicon rev as default */
345 omap_revision = OMAP3630_REV_ES1_2; 368 omap_revision = OMAP3630_REV_ES1_2;
@@ -367,7 +390,7 @@ static void __init omap4_check_revision(void)
367 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0 390 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
368 * Use ARM register to detect the correct ES version 391 * Use ARM register to detect the correct ES version
369 */ 392 */
370 if (!rev && (hawkeye != 0xb94e)) { 393 if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
371 idcode = read_cpuid(CPUID_ID); 394 idcode = read_cpuid(CPUID_ID);
372 rev = (idcode & 0xf) - 1; 395 rev = (idcode & 0xf) - 1;
373 } 396 }
@@ -389,8 +412,11 @@ static void __init omap4_check_revision(void)
389 omap_revision = OMAP4430_REV_ES2_1; 412 omap_revision = OMAP4430_REV_ES2_1;
390 break; 413 break;
391 case 4: 414 case 4:
392 default:
393 omap_revision = OMAP4430_REV_ES2_2; 415 omap_revision = OMAP4430_REV_ES2_2;
416 break;
417 case 6:
418 default:
419 omap_revision = OMAP4430_REV_ES2_3;
394 } 420 }
395 break; 421 break;
396 case 0xb94e: 422 case 0xb94e:
@@ -401,9 +427,17 @@ static void __init omap4_check_revision(void)
401 break; 427 break;
402 } 428 }
403 break; 429 break;
430 case 0xb975:
431 switch (rev) {
432 case 0:
433 default:
434 omap_revision = OMAP4470_REV_ES1_0;
435 break;
436 }
437 break;
404 default: 438 default:
405 /* Unknown default to latest silicon rev as default */ 439 /* Unknown default to latest silicon rev as default */
406 omap_revision = OMAP4430_REV_ES2_2; 440 omap_revision = OMAP4430_REV_ES2_3;
407 } 441 }
408 442
409 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, 443 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -432,6 +466,10 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
432 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; 466 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
433 } else if (cpu_is_ti816x()) { 467 } else if (cpu_is_ti816x()) {
434 cpu_name = "TI816X"; 468 cpu_name = "TI816X";
469 } else if (cpu_is_am335x()) {
470 cpu_name = "AM335X";
471 } else if (cpu_is_ti814x()) {
472 cpu_name = "TI814X";
435 } else if (omap3_has_iva() && omap3_has_sgx()) { 473 } else if (omap3_has_iva() && omap3_has_sgx()) {
436 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ 474 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
437 cpu_name = "OMAP3430/3530"; 475 cpu_name = "OMAP3430/3530";
@@ -472,11 +510,11 @@ void __init omap2_check_revision(void)
472 } else if (cpu_is_omap34xx()) { 510 } else if (cpu_is_omap34xx()) {
473 omap3_check_revision(&cpu_rev); 511 omap3_check_revision(&cpu_rev);
474 512
475 /* TI816X doesn't have feature register */ 513 /* TI81XX doesn't have feature register */
476 if (!cpu_is_ti816x()) 514 if (!cpu_is_ti81xx())
477 omap3_check_features(); 515 omap3_check_features();
478 else 516 else
479 ti816x_check_features(); 517 ti81xx_check_features();
480 518
481 omap3_cpuinfo(cpu_rev); 519 omap3_cpuinfo(cpu_rev);
482 return; 520 return;
diff --git a/arch/arm/mach-omap2/include/mach/barriers.h b/arch/arm/mach-omap2/include/mach/barriers.h
new file mode 100644
index 000000000000..4fa72c7cc7cd
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/barriers.h
@@ -0,0 +1,31 @@
1/*
2 * OMAP memory barrier header.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Richard Woodruff <r-woodruff2@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __MACH_BARRIERS_H
23#define __MACH_BARRIERS_H
24
25extern void omap_bus_sync(void);
26
27#define rmb() dsb()
28#define wmb() do { dsb(); outer_sync(); omap_bus_sync(); } while (0)
29#define mb() wmb()
30
31#endif /* __MACH_BARRIERS_H */
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 13f98e59cfef..cdfc2a1f0e75 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -66,11 +66,11 @@ omap_uart_lsr: .word 0
66 beq 34f @ configure OMAP3UART4 66 beq 34f @ configure OMAP3UART4
67 cmp \rp, #OMAP4UART4 @ only on 44xx 67 cmp \rp, #OMAP4UART4 @ only on 44xx
68 beq 44f @ configure OMAP4UART4 68 beq 44f @ configure OMAP4UART4
69 cmp \rp, #TI816XUART1 @ ti816x UART offsets different 69 cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
70 beq 81f @ configure UART1 70 beq 81f @ configure UART1
71 cmp \rp, #TI816XUART2 @ ti816x UART offsets different 71 cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
72 beq 82f @ configure UART2 72 beq 82f @ configure UART2
73 cmp \rp, #TI816XUART3 @ ti816x UART offsets different 73 cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
74 beq 83f @ configure UART3 74 beq 83f @ configure UART3
75 cmp \rp, #ZOOM_UART @ only on zoom2/3 75 cmp \rp, #ZOOM_UART @ only on zoom2/3
76 beq 95f @ configure ZOOM_UART 76 beq 95f @ configure ZOOM_UART
@@ -94,11 +94,11 @@ omap_uart_lsr: .word 0
94 b 98f 94 b 98f
9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
96 b 98f 96 b 98f
9781: mov \rp, #UART_OFFSET(TI816X_UART1_BASE) 9781: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
98 b 98f 98 b 98f
9982: mov \rp, #UART_OFFSET(TI816X_UART2_BASE) 9982: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
100 b 98f 100 b 98f
10183: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) 10183: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
102 b 98f 102 b 98f
103 103
10495: ldr \rp, =ZOOM_UART_BASE 10495: ldr \rp, =ZOOM_UART_BASE
diff --git a/arch/arm/mach-omap2/include/mach/omap-secure.h b/arch/arm/mach-omap2/include/mach/omap-secure.h
new file mode 100644
index 000000000000..c90a43589abe
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/omap-secure.h
@@ -0,0 +1,57 @@
1/*
2 * omap-secure.h: OMAP Secure infrastructure header.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef OMAP_ARCH_OMAP_SECURE_H
12#define OMAP_ARCH_OMAP_SECURE_H
13
14/* Monitor error code */
15#define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
16#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
17
18/* HAL API error codes */
19#define API_HAL_RET_VALUE_OK 0x00
20#define API_HAL_RET_VALUE_FAIL 0x01
21
22/* Secure HAL API flags */
23#define FLAG_START_CRITICAL 0x4
24#define FLAG_IRQFIQ_MASK 0x3
25#define FLAG_IRQ_ENABLE 0x2
26#define FLAG_FIQ_ENABLE 0x1
27#define NO_FLAG 0x0
28
29/* Maximum Secure memory storage size */
30#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
31
32/* Secure low power HAL API index */
33#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
34#define OMAP4_HAL_SAVEHW_INDEX 0x1b
35#define OMAP4_HAL_SAVEALL_INDEX 0x1c
36#define OMAP4_HAL_SAVEGIC_INDEX 0x1d
37
38/* Secure Monitor mode APIs */
39#define OMAP4_MON_SCU_PWR_INDEX 0x108
40#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
41#define OMAP4_MON_L2X0_CTRL_INDEX 0x102
42#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
43#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
44
45/* Secure PPA(Primary Protected Application) APIs */
46#define OMAP4_PPA_L2_POR_INDEX 0x23
47#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
48
49#ifndef __ASSEMBLER__
50
51extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
52 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
53extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
54extern phys_addr_t omap_secure_ram_mempool_base(void);
55
56#endif /* __ASSEMBLER__ */
57#endif /* OMAP_ARCH_OMAP_SECURE_H */
diff --git a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
new file mode 100644
index 000000000000..d79321b0f2a2
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
@@ -0,0 +1,39 @@
1/*
2 * OMAP WakeupGen header file
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef OMAP_ARCH_WAKEUPGEN_H
12#define OMAP_ARCH_WAKEUPGEN_H
13
14#define OMAP_WKG_CONTROL_0 0x00
15#define OMAP_WKG_ENB_A_0 0x10
16#define OMAP_WKG_ENB_B_0 0x14
17#define OMAP_WKG_ENB_C_0 0x18
18#define OMAP_WKG_ENB_D_0 0x1c
19#define OMAP_WKG_ENB_SECURE_A_0 0x20
20#define OMAP_WKG_ENB_SECURE_B_0 0x24
21#define OMAP_WKG_ENB_SECURE_C_0 0x28
22#define OMAP_WKG_ENB_SECURE_D_0 0x2c
23#define OMAP_WKG_ENB_A_1 0x410
24#define OMAP_WKG_ENB_B_1 0x414
25#define OMAP_WKG_ENB_C_1 0x418
26#define OMAP_WKG_ENB_D_1 0x41c
27#define OMAP_WKG_ENB_SECURE_A_1 0x420
28#define OMAP_WKG_ENB_SECURE_B_1 0x424
29#define OMAP_WKG_ENB_SECURE_C_1 0x428
30#define OMAP_WKG_ENB_SECURE_D_1 0x42c
31#define OMAP_AUX_CORE_BOOT_0 0x800
32#define OMAP_AUX_CORE_BOOT_1 0x804
33#define OMAP_PTMSYNCREQ_MASK 0xc00
34#define OMAP_PTMSYNCREQ_EN 0xc04
35#define OMAP_TIMESTAMPCYCLELO 0xc08
36#define OMAP_TIMESTAMPCYCLEHI 0xc0c
37
38extern int __init omap_wakeupgen_init(void);
39#endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3f565dd2ea8d..3f174d51f67f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -176,14 +176,31 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
176}; 176};
177#endif 177#endif
178 178
179#ifdef CONFIG_SOC_OMAPTI816X 179#ifdef CONFIG_SOC_OMAPTI81XX
180static struct map_desc omapti816x_io_desc[] __initdata = { 180static struct map_desc omapti81xx_io_desc[] __initdata = {
181 {
182 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE
186 }
187};
188#endif
189
190#ifdef CONFIG_SOC_OMAPAM33XX
191static struct map_desc omapam33xx_io_desc[] __initdata = {
181 { 192 {
182 .virtual = L4_34XX_VIRT, 193 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS), 194 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE, 195 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE 196 .type = MT_DEVICE
186 }, 197 },
198 {
199 .virtual = L4_WK_AM33XX_VIRT,
200 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
201 .length = L4_WK_AM33XX_SIZE,
202 .type = MT_DEVICE
203 }
187}; 204};
188#endif 205#endif
189 206
@@ -237,6 +254,15 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
237 .length = L4_EMU_44XX_SIZE, 254 .length = L4_EMU_44XX_SIZE,
238 .type = MT_DEVICE, 255 .type = MT_DEVICE,
239 }, 256 },
257#ifdef CONFIG_OMAP4_ERRATA_I688
258 {
259 .virtual = OMAP4_SRAM_VA,
260 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
261 .length = PAGE_SIZE,
262 .type = MT_MEMORY_SO,
263 },
264#endif
265
240}; 266};
241#endif 267#endif
242 268
@@ -263,10 +289,17 @@ void __init omap34xx_map_common_io(void)
263} 289}
264#endif 290#endif
265 291
266#ifdef CONFIG_SOC_OMAPTI816X 292#ifdef CONFIG_SOC_OMAPTI81XX
267void __init omapti816x_map_common_io(void) 293void __init omapti81xx_map_common_io(void)
294{
295 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
296}
297#endif
298
299#ifdef CONFIG_SOC_OMAPAM33XX
300void __init omapam33xx_map_common_io(void)
268{ 301{
269 iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); 302 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
270} 303}
271#endif 304#endif
272 305
@@ -418,9 +451,9 @@ void __init am35xx_init_early(void)
418 omap3_init_early(); 451 omap3_init_early();
419} 452}
420 453
421void __init ti816x_init_early(void) 454void __init ti81xx_init_early(void)
422{ 455{
423 omap2_set_globals_ti816x(); 456 omap2_set_globals_ti81xx();
424 omap_common_init_early(); 457 omap_common_init_early();
425 omap3xxx_voltagedomains_init(); 458 omap3xxx_voltagedomains_init();
426 omap3xxx_powerdomains_init(); 459 omap3xxx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 42b1d6591912..1fef061f7927 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -193,7 +193,7 @@ void __init omap3_init_irq(void)
193 omap_init_irq(OMAP34XX_IC_BASE, 96); 193 omap_init_irq(OMAP34XX_IC_BASE, 96);
194} 194}
195 195
196void __init ti816x_init_irq(void) 196void __init ti81xx_init_irq(void)
197{ 197{
198 omap_init_irq(OMAP34XX_IC_BASE, 128); 198 omap_init_irq(OMAP34XX_IC_BASE, 128);
199} 199}
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 655e9480eb98..e1cc75d1a57a 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -32,6 +32,8 @@
32#include <linux/debugfs.h> 32#include <linux/debugfs.h>
33#include <linux/seq_file.h> 33#include <linux/seq_file.h>
34#include <linux/uaccess.h> 34#include <linux/uaccess.h>
35#include <linux/irq.h>
36#include <linux/interrupt.h>
35 37
36#include <asm/system.h> 38#include <asm/system.h>
37 39
@@ -39,6 +41,7 @@
39 41
40#include "control.h" 42#include "control.h"
41#include "mux.h" 43#include "mux.h"
44#include "prm.h"
42 45
43#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ 46#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
44#define OMAP_MUX_BASE_SZ 0x5ca 47#define OMAP_MUX_BASE_SZ 0x5ca
@@ -306,7 +309,8 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads)
306 pad->idle = bpad->idle; 309 pad->idle = bpad->idle;
307 pad->off = bpad->off; 310 pad->off = bpad->off;
308 311
309 if (pad->flags & OMAP_DEVICE_PAD_REMUX) 312 if (pad->flags &
313 (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP))
310 nr_pads_dynamic++; 314 nr_pads_dynamic++;
311 315
312 pr_debug("%s: Initialized %s\n", __func__, pad->name); 316 pr_debug("%s: Initialized %s\n", __func__, pad->name);
@@ -331,7 +335,8 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads)
331 for (i = 0; i < hmux->nr_pads; i++) { 335 for (i = 0; i < hmux->nr_pads; i++) {
332 struct omap_device_pad *pad = &hmux->pads[i]; 336 struct omap_device_pad *pad = &hmux->pads[i];
333 337
334 if (pad->flags & OMAP_DEVICE_PAD_REMUX) { 338 if (pad->flags &
339 (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) {
335 pr_debug("%s: pad %s tagged dynamic\n", 340 pr_debug("%s: pad %s tagged dynamic\n",
336 __func__, pad->name); 341 __func__, pad->name);
337 hmux->pads_dynamic[nr_pads_dynamic] = pad; 342 hmux->pads_dynamic[nr_pads_dynamic] = pad;
@@ -351,6 +356,78 @@ err1:
351 return NULL; 356 return NULL;
352} 357}
353 358
359/**
360 * omap_hwmod_mux_scan_wakeups - omap hwmod scan wakeup pads
361 * @hmux: Pads for a hwmod
362 * @mpu_irqs: MPU irq array for a hwmod
363 *
364 * Scans the wakeup status of pads for a single hwmod. If an irq
365 * array is defined for this mux, the parser will call the registered
366 * ISRs for corresponding pads, otherwise the parser will stop at the
367 * first wakeup active pad and return. Returns true if there is a
368 * pending and non-served wakeup event for the mux, otherwise false.
369 */
370static bool omap_hwmod_mux_scan_wakeups(struct omap_hwmod_mux_info *hmux,
371 struct omap_hwmod_irq_info *mpu_irqs)
372{
373 int i, irq;
374 unsigned int val;
375 u32 handled_irqs = 0;
376
377 for (i = 0; i < hmux->nr_pads_dynamic; i++) {
378 struct omap_device_pad *pad = hmux->pads_dynamic[i];
379
380 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP) ||
381 !(pad->idle & OMAP_WAKEUP_EN))
382 continue;
383
384 val = omap_mux_read(pad->partition, pad->mux->reg_offset);
385 if (!(val & OMAP_WAKEUP_EVENT))
386 continue;
387
388 if (!hmux->irqs)
389 return true;
390
391 irq = hmux->irqs[i];
392 /* make sure we only handle each irq once */
393 if (handled_irqs & 1 << irq)
394 continue;
395
396 handled_irqs |= 1 << irq;
397
398 generic_handle_irq(mpu_irqs[irq].irq);
399 }
400
401 return false;
402}
403
404/**
405 * _omap_hwmod_mux_handle_irq - Process wakeup events for a single hwmod
406 *
407 * Checks a single hwmod for every wakeup capable pad to see if there is an
408 * active wakeup event. If this is the case, call the corresponding ISR.
409 */
410static int _omap_hwmod_mux_handle_irq(struct omap_hwmod *oh, void *data)
411{
412 if (!oh->mux || !oh->mux->enabled)
413 return 0;
414 if (omap_hwmod_mux_scan_wakeups(oh->mux, oh->mpu_irqs))
415 generic_handle_irq(oh->mpu_irqs[0].irq);
416 return 0;
417}
418
419/**
420 * omap_hwmod_mux_handle_irq - Process pad wakeup irqs.
421 *
422 * Calls a function for each registered omap_hwmod to check
423 * pad wakeup statuses.
424 */
425static irqreturn_t omap_hwmod_mux_handle_irq(int irq, void *unused)
426{
427 omap_hwmod_for_each(_omap_hwmod_mux_handle_irq, NULL);
428 return IRQ_HANDLED;
429}
430
354/* Assumes the calling function takes care of locking */ 431/* Assumes the calling function takes care of locking */
355void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state) 432void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
356{ 433{
@@ -715,6 +792,7 @@ static void __init omap_mux_free_names(struct omap_mux *m)
715static int __init omap_mux_late_init(void) 792static int __init omap_mux_late_init(void)
716{ 793{
717 struct omap_mux_partition *partition; 794 struct omap_mux_partition *partition;
795 int ret;
718 796
719 list_for_each_entry(partition, &mux_partitions, node) { 797 list_for_each_entry(partition, &mux_partitions, node) {
720 struct omap_mux_entry *e, *tmp; 798 struct omap_mux_entry *e, *tmp;
@@ -735,6 +813,13 @@ static int __init omap_mux_late_init(void)
735 } 813 }
736 } 814 }
737 815
816 ret = request_irq(omap_prcm_event_to_irq("io"),
817 omap_hwmod_mux_handle_irq, IRQF_SHARED | IRQF_NO_SUSPEND,
818 "hwmod_io", omap_mux_late_init);
819
820 if (ret)
821 pr_warning("mux: Failed to setup hwmod io irq %d\n", ret);
822
738 omap_mux_dbg_init(); 823 omap_mux_dbg_init();
739 824
740 return 0; 825 return 0;
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 4ee6aeca885a..b13ef7ef5ef4 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -18,11 +18,6 @@
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21/* Physical address needed since MMU not enabled yet on secondary core */
22#define OMAP4_AUX_CORE_BOOT1_PA 0x48281804
23
24 __INIT
25
26/* 21/*
27 * OMAP4 specific entry point for secondary CPU to jump from ROM 22 * OMAP4 specific entry point for secondary CPU to jump from ROM
28 * code. This routine also provides a holding flag into which 23 * code. This routine also provides a holding flag into which
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index e5a1c3f40a86..adbe4d8c7caf 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -22,6 +22,8 @@
22 22
23#include "common.h" 23#include "common.h"
24 24
25#include "powerdomain.h"
26
25int platform_cpu_kill(unsigned int cpu) 27int platform_cpu_kill(unsigned int cpu)
26{ 28{
27 return 1; 29 return 1;
@@ -33,6 +35,8 @@ int platform_cpu_kill(unsigned int cpu)
33 */ 35 */
34void platform_cpu_die(unsigned int cpu) 36void platform_cpu_die(unsigned int cpu)
35{ 37{
38 unsigned int this_cpu;
39
36 flush_cache_all(); 40 flush_cache_all();
37 dsb(); 41 dsb();
38 42
@@ -40,15 +44,15 @@ void platform_cpu_die(unsigned int cpu)
40 * we're ready for shutdown now, so do it 44 * we're ready for shutdown now, so do it
41 */ 45 */
42 if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0) 46 if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0)
43 printk(KERN_CRIT "Secure clear status failed\n"); 47 pr_err("Secure clear status failed\n");
44 48
45 for (;;) { 49 for (;;) {
46 /* 50 /*
47 * Execute WFI 51 * Enter into low power state
48 */ 52 */
49 do_wfi(); 53 omap4_hotplug_cpu(cpu, PWRDM_POWER_OFF);
50 54 this_cpu = smp_processor_id();
51 if (omap_read_auxcoreboot0() == cpu) { 55 if (omap_read_auxcoreboot0() == this_cpu) {
52 /* 56 /*
53 * OK, proper wakeup, we're done 57 * OK, proper wakeup, we're done
54 */ 58 */
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
new file mode 100644
index 000000000000..1d5d01056558
--- /dev/null
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -0,0 +1,398 @@
1/*
2 * OMAP MPUSS low power code
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU
8 * Local timer and Watchdog, GIC, SCU, PL310 L2 cache controller,
9 * CPU0 and CPU1 LPRM modules.
10 * CPU0, CPU1 and MPUSS each have there own power domain and
11 * hence multiple low power combinations of MPUSS are possible.
12 *
13 * The CPU0 and CPU1 can't support Closed switch Retention (CSWR)
14 * because the mode is not supported by hw constraints of dormant
15 * mode. While waking up from the dormant mode, a reset signal
16 * to the Cortex-A9 processor must be asserted by the external
17 * power controller.
18 *
19 * With architectural inputs and hardware recommendations, only
20 * below modes are supported from power gain vs latency point of view.
21 *
22 * CPU0 CPU1 MPUSS
23 * ----------------------------------------------
24 * ON ON ON
25 * ON(Inactive) OFF ON(Inactive)
26 * OFF OFF CSWR
27 * OFF OFF OSWR
28 * OFF OFF OFF(Device OFF *TBD)
29 * ----------------------------------------------
30 *
31 * Note: CPU0 is the master core and it is the last CPU to go down
32 * and first to wake-up when MPUSS low power states are excercised
33 *
34 *
35 * This program is free software; you can redistribute it and/or modify
36 * it under the terms of the GNU General Public License version 2 as
37 * published by the Free Software Foundation.
38 */
39
40#include <linux/kernel.h>
41#include <linux/io.h>
42#include <linux/errno.h>
43#include <linux/linkage.h>
44#include <linux/smp.h>
45
46#include <asm/cacheflush.h>
47#include <asm/tlbflush.h>
48#include <asm/smp_scu.h>
49#include <asm/system.h>
50#include <asm/pgalloc.h>
51#include <asm/suspend.h>
52#include <asm/hardware/cache-l2x0.h>
53
54#include <plat/omap44xx.h>
55
56#include "common.h"
57#include "omap4-sar-layout.h"
58#include "pm.h"
59#include "prcm_mpu44xx.h"
60#include "prminst44xx.h"
61#include "prcm44xx.h"
62#include "prm44xx.h"
63#include "prm-regbits-44xx.h"
64
65#ifdef CONFIG_SMP
66
67struct omap4_cpu_pm_info {
68 struct powerdomain *pwrdm;
69 void __iomem *scu_sar_addr;
70 void __iomem *wkup_sar_addr;
71 void __iomem *l2x0_sar_addr;
72};
73
74static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
75static struct powerdomain *mpuss_pd;
76static void __iomem *sar_base;
77
78/*
79 * Program the wakeup routine address for the CPU0 and CPU1
80 * used for OFF or DORMANT wakeup.
81 */
82static inline void set_cpu_wakeup_addr(unsigned int cpu_id, u32 addr)
83{
84 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
85
86 __raw_writel(addr, pm_info->wkup_sar_addr);
87}
88
89/*
90 * Set the CPUx powerdomain's previous power state
91 */
92static inline void set_cpu_next_pwrst(unsigned int cpu_id,
93 unsigned int power_state)
94{
95 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
96
97 pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
98}
99
100/*
101 * Read CPU's previous power state
102 */
103static inline unsigned int read_cpu_prev_pwrst(unsigned int cpu_id)
104{
105 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
106
107 return pwrdm_read_prev_pwrst(pm_info->pwrdm);
108}
109
110/*
111 * Clear the CPUx powerdomain's previous power state
112 */
113static inline void clear_cpu_prev_pwrst(unsigned int cpu_id)
114{
115 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
116
117 pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
118}
119
120/*
121 * Store the SCU power status value to scratchpad memory
122 */
123static void scu_pwrst_prepare(unsigned int cpu_id, unsigned int cpu_state)
124{
125 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
126 u32 scu_pwr_st;
127
128 switch (cpu_state) {
129 case PWRDM_POWER_RET:
130 scu_pwr_st = SCU_PM_DORMANT;
131 break;
132 case PWRDM_POWER_OFF:
133 scu_pwr_st = SCU_PM_POWEROFF;
134 break;
135 case PWRDM_POWER_ON:
136 case PWRDM_POWER_INACTIVE:
137 default:
138 scu_pwr_st = SCU_PM_NORMAL;
139 break;
140 }
141
142 __raw_writel(scu_pwr_st, pm_info->scu_sar_addr);
143}
144
145/* Helper functions for MPUSS OSWR */
146static inline void mpuss_clear_prev_logic_pwrst(void)
147{
148 u32 reg;
149
150 reg = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
151 OMAP4430_PRM_MPU_INST, OMAP4_RM_MPU_MPU_CONTEXT_OFFSET);
152 omap4_prminst_write_inst_reg(reg, OMAP4430_PRM_PARTITION,
153 OMAP4430_PRM_MPU_INST, OMAP4_RM_MPU_MPU_CONTEXT_OFFSET);
154}
155
156static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id)
157{
158 u32 reg;
159
160 if (cpu_id) {
161 reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU1_INST,
162 OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET);
163 omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU1_INST,
164 OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET);
165 } else {
166 reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU0_INST,
167 OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET);
168 omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU0_INST,
169 OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET);
170 }
171}
172
173/**
174 * omap4_mpuss_read_prev_context_state:
175 * Function returns the MPUSS previous context state
176 */
177u32 omap4_mpuss_read_prev_context_state(void)
178{
179 u32 reg;
180
181 reg = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
182 OMAP4430_PRM_MPU_INST, OMAP4_RM_MPU_MPU_CONTEXT_OFFSET);
183 reg &= OMAP4430_LOSTCONTEXT_DFF_MASK;
184 return reg;
185}
186
187/*
188 * Store the CPU cluster state for L2X0 low power operations.
189 */
190static void l2x0_pwrst_prepare(unsigned int cpu_id, unsigned int save_state)
191{
192 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
193
194 __raw_writel(save_state, pm_info->l2x0_sar_addr);
195}
196
197/*
198 * Save the L2X0 AUXCTRL and POR value to SAR memory. Its used to
199 * in every restore MPUSS OFF path.
200 */
201#ifdef CONFIG_CACHE_L2X0
202static void save_l2x0_context(void)
203{
204 u32 val;
205 void __iomem *l2x0_base = omap4_get_l2cache_base();
206
207 val = __raw_readl(l2x0_base + L2X0_AUX_CTRL);
208 __raw_writel(val, sar_base + L2X0_AUXCTRL_OFFSET);
209 val = __raw_readl(l2x0_base + L2X0_PREFETCH_CTRL);
210 __raw_writel(val, sar_base + L2X0_PREFETCH_CTRL_OFFSET);
211}
212#else
213static void save_l2x0_context(void)
214{}
215#endif
216
217/**
218 * omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
219 * The purpose of this function is to manage low power programming
220 * of OMAP4 MPUSS subsystem
221 * @cpu : CPU ID
222 * @power_state: Low power state.
223 *
224 * MPUSS states for the context save:
225 * save_state =
226 * 0 - Nothing lost and no need to save: MPUSS INACTIVE
227 * 1 - CPUx L1 and logic lost: MPUSS CSWR
228 * 2 - CPUx L1 and logic lost + GIC lost: MPUSS OSWR
229 * 3 - CPUx L1 and logic lost + GIC + L2 lost: DEVICE OFF
230 */
231int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
232{
233 unsigned int save_state = 0;
234 unsigned int wakeup_cpu;
235
236 if (omap_rev() == OMAP4430_REV_ES1_0)
237 return -ENXIO;
238
239 switch (power_state) {
240 case PWRDM_POWER_ON:
241 case PWRDM_POWER_INACTIVE:
242 save_state = 0;
243 break;
244 case PWRDM_POWER_OFF:
245 save_state = 1;
246 break;
247 case PWRDM_POWER_RET:
248 default:
249 /*
250 * CPUx CSWR is invalid hardware state. Also CPUx OSWR
251 * doesn't make much scense, since logic is lost and $L1
252 * needs to be cleaned because of coherency. This makes
253 * CPUx OSWR equivalent to CPUX OFF and hence not supported
254 */
255 WARN_ON(1);
256 return -ENXIO;
257 }
258
259 pwrdm_pre_transition();
260
261 /*
262 * Check MPUSS next state and save interrupt controller if needed.
263 * In MPUSS OSWR or device OFF, interrupt controller contest is lost.
264 */
265 mpuss_clear_prev_logic_pwrst();
266 pwrdm_clear_all_prev_pwrst(mpuss_pd);
267 if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) &&
268 (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF))
269 save_state = 2;
270
271 clear_cpu_prev_pwrst(cpu);
272 cpu_clear_prev_logic_pwrst(cpu);
273 set_cpu_next_pwrst(cpu, power_state);
274 set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
275 scu_pwrst_prepare(cpu, power_state);
276 l2x0_pwrst_prepare(cpu, save_state);
277
278 /*
279 * Call low level function with targeted low power state.
280 */
281 cpu_suspend(save_state, omap4_finish_suspend);
282
283 /*
284 * Restore the CPUx power state to ON otherwise CPUx
285 * power domain can transitions to programmed low power
286 * state while doing WFI outside the low powe code. On
287 * secure devices, CPUx does WFI which can result in
288 * domain transition
289 */
290 wakeup_cpu = smp_processor_id();
291 set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
292
293 pwrdm_post_transition();
294
295 return 0;
296}
297
298/**
299 * omap4_hotplug_cpu: OMAP4 CPU hotplug entry
300 * @cpu : CPU ID
301 * @power_state: CPU low power state.
302 */
303int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
304{
305 unsigned int cpu_state = 0;
306
307 if (omap_rev() == OMAP4430_REV_ES1_0)
308 return -ENXIO;
309
310 if (power_state == PWRDM_POWER_OFF)
311 cpu_state = 1;
312
313 clear_cpu_prev_pwrst(cpu);
314 set_cpu_next_pwrst(cpu, power_state);
315 set_cpu_wakeup_addr(cpu, virt_to_phys(omap_secondary_startup));
316 scu_pwrst_prepare(cpu, power_state);
317
318 /*
319 * CPU never retuns back if targetted power state is OFF mode.
320 * CPU ONLINE follows normal CPU ONLINE ptah via
321 * omap_secondary_startup().
322 */
323 omap4_finish_suspend(cpu_state);
324
325 set_cpu_next_pwrst(cpu, PWRDM_POWER_ON);
326 return 0;
327}
328
329
330/*
331 * Initialise OMAP4 MPUSS
332 */
333int __init omap4_mpuss_init(void)
334{
335 struct omap4_cpu_pm_info *pm_info;
336
337 if (omap_rev() == OMAP4430_REV_ES1_0) {
338 WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
339 return -ENODEV;
340 }
341
342 sar_base = omap4_get_sar_ram_base();
343
344 /* Initilaise per CPU PM information */
345 pm_info = &per_cpu(omap4_pm_info, 0x0);
346 pm_info->scu_sar_addr = sar_base + SCU_OFFSET0;
347 pm_info->wkup_sar_addr = sar_base + CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
348 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0;
349 pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm");
350 if (!pm_info->pwrdm) {
351 pr_err("Lookup failed for CPU0 pwrdm\n");
352 return -ENODEV;
353 }
354
355 /* Clear CPU previous power domain state */
356 pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
357 cpu_clear_prev_logic_pwrst(0);
358
359 /* Initialise CPU0 power domain state to ON */
360 pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
361
362 pm_info = &per_cpu(omap4_pm_info, 0x1);
363 pm_info->scu_sar_addr = sar_base + SCU_OFFSET1;
364 pm_info->wkup_sar_addr = sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
365 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1;
366 pm_info->pwrdm = pwrdm_lookup("cpu1_pwrdm");
367 if (!pm_info->pwrdm) {
368 pr_err("Lookup failed for CPU1 pwrdm\n");
369 return -ENODEV;
370 }
371
372 /* Clear CPU previous power domain state */
373 pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
374 cpu_clear_prev_logic_pwrst(1);
375
376 /* Initialise CPU1 power domain state to ON */
377 pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
378
379 mpuss_pd = pwrdm_lookup("mpu_pwrdm");
380 if (!mpuss_pd) {
381 pr_err("Failed to lookup MPUSS power domain\n");
382 return -ENODEV;
383 }
384 pwrdm_clear_all_prev_pwrst(mpuss_pd);
385 mpuss_clear_prev_logic_pwrst();
386
387 /* Save device type on scratchpad for low level code to use */
388 if (omap_type() != OMAP2_DEVICE_TYPE_GP)
389 __raw_writel(1, sar_base + OMAP_TYPE_OFFSET);
390 else
391 __raw_writel(0, sar_base + OMAP_TYPE_OFFSET);
392
393 save_l2x0_context();
394
395 return 0;
396}
397
398#endif
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c
new file mode 100644
index 000000000000..69f3c72d959b
--- /dev/null
+++ b/arch/arm/mach-omap2/omap-secure.c
@@ -0,0 +1,81 @@
1/*
2 * OMAP Secure API infrastructure.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 *
8 * This program is free software,you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/memblock.h>
17
18#include <asm/cacheflush.h>
19
20#include <mach/omap-secure.h>
21
22static phys_addr_t omap_secure_memblock_base;
23
24/**
25 * omap_sec_dispatcher: Routine to dispatch low power secure
26 * service routines
27 * @idx: The HAL API index
28 * @flag: The flag indicating criticality of operation
29 * @nargs: Number of valid arguments out of four.
30 * @arg1, arg2, arg3 args4: Parameters passed to secure API
31 *
32 * Return the non-zero error value on failure.
33 */
34u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2,
35 u32 arg3, u32 arg4)
36{
37 u32 ret;
38 u32 param[5];
39
40 param[0] = nargs;
41 param[1] = arg1;
42 param[2] = arg2;
43 param[3] = arg3;
44 param[4] = arg4;
45
46 /*
47 * Secure API needs physical address
48 * pointer for the parameters
49 */
50 flush_cache_all();
51 outer_clean_range(__pa(param), __pa(param + 5));
52 ret = omap_smc2(idx, flag, __pa(param));
53
54 return ret;
55}
56
57/* Allocate the memory to save secure ram */
58int __init omap_secure_ram_reserve_memblock(void)
59{
60 phys_addr_t paddr;
61 u32 size = OMAP_SECURE_RAM_STORAGE;
62
63 size = ALIGN(size, SZ_1M);
64 paddr = memblock_alloc(size, SZ_1M);
65 if (!paddr) {
66 pr_err("%s: failed to reserve %x bytes\n",
67 __func__, size);
68 return -ENOMEM;
69 }
70 memblock_free(paddr, size);
71 memblock_remove(paddr, size);
72
73 omap_secure_memblock_base = paddr;
74
75 return 0;
76}
77
78phys_addr_t omap_secure_ram_mempool_base(void)
79{
80 return omap_secure_memblock_base;
81}
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap-smc.S
index e69d37d95204..f6441c13cd8c 100644
--- a/arch/arm/mach-omap2/omap44xx-smc.S
+++ b/arch/arm/mach-omap2/omap-smc.S
@@ -31,6 +31,29 @@ ENTRY(omap_smc1)
31 ldmfd sp!, {r2-r12, pc} 31 ldmfd sp!, {r2-r12, pc}
32ENDPROC(omap_smc1) 32ENDPROC(omap_smc1)
33 33
34/**
35 * u32 omap_smc2(u32 id, u32 falg, u32 pargs)
36 * Low level common routine for secure HAL and PPA APIs.
37 * @id: Application ID of HAL APIs
38 * @flag: Flag to indicate the criticality of operation
39 * @pargs: Physical address of parameter list starting
40 * with number of parametrs
41 */
42ENTRY(omap_smc2)
43 stmfd sp!, {r4-r12, lr}
44 mov r3, r2
45 mov r2, r1
46 mov r1, #0x0 @ Process ID
47 mov r6, #0xff
48 mov r12, #0x00 @ Secure Service ID
49 mov r7, #0
50 mcr p15, 0, r7, c7, c5, 6
51 dsb
52 dmb
53 smc #0
54 ldmfd sp!, {r4-r12, pc}
55ENDPROC(omap_smc2)
56
34ENTRY(omap_modify_auxcoreboot0) 57ENTRY(omap_modify_auxcoreboot0)
35 stmfd sp!, {r1-r12, lr} 58 stmfd sp!, {r1-r12, lr}
36 ldr r12, =0x104 59 ldr r12, =0x104
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index e99bc6cd4714..c1bf3ef0ba02 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -24,17 +24,37 @@
24#include <asm/hardware/gic.h> 24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/omap-secure.h>
27 28
28#include "common.h" 29#include "common.h"
29 30
31#include "clockdomain.h"
32
30/* SCU base address */ 33/* SCU base address */
31static void __iomem *scu_base; 34static void __iomem *scu_base;
32 35
33static DEFINE_SPINLOCK(boot_lock); 36static DEFINE_SPINLOCK(boot_lock);
34 37
38void __iomem *omap4_get_scu_base(void)
39{
40 return scu_base;
41}
42
35void __cpuinit platform_secondary_init(unsigned int cpu) 43void __cpuinit platform_secondary_init(unsigned int cpu)
36{ 44{
37 /* 45 /*
46 * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
47 * OMAP44XX EMU/HS devices - CPU0 SMP bit access is enabled in PPA
48 * init and for CPU1, a secure PPA API provided. CPU0 must be ON
49 * while executing NS_SMP API on CPU1 and PPA version must be 1.4.0+.
50 * OMAP443X GP devices- SMP bit isn't accessible.
51 * OMAP446X GP devices - SMP bit access is enabled on both CPUs.
52 */
53 if (cpu_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
54 omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
55 4, 0, 0, 0, 0, 0);
56
57 /*
38 * If any interrupts are already enabled for the primary 58 * If any interrupts are already enabled for the primary
39 * core (e.g. timer irq), then they will not have been enabled 59 * core (e.g. timer irq), then they will not have been enabled
40 * for us: do so 60 * for us: do so
@@ -50,6 +70,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
50 70
51int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) 71int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
52{ 72{
73 static struct clockdomain *cpu1_clkdm;
74 static bool booted;
53 /* 75 /*
54 * Set synchronisation state between this boot processor 76 * Set synchronisation state between this boot processor
55 * and the secondary one 77 * and the secondary one
@@ -65,6 +87,29 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
65 omap_modify_auxcoreboot0(0x200, 0xfffffdff); 87 omap_modify_auxcoreboot0(0x200, 0xfffffdff);
66 flush_cache_all(); 88 flush_cache_all();
67 smp_wmb(); 89 smp_wmb();
90
91 if (!cpu1_clkdm)
92 cpu1_clkdm = clkdm_lookup("mpu1_clkdm");
93
94 /*
95 * The SGI(Software Generated Interrupts) are not wakeup capable
96 * from low power states. This is known limitation on OMAP4 and
97 * needs to be worked around by using software forced clockdomain
98 * wake-up. To wakeup CPU1, CPU0 forces the CPU1 clockdomain to
99 * software force wakeup. The clockdomain is then put back to
100 * hardware supervised mode.
101 * More details can be found in OMAP4430 TRM - Version J
102 * Section :
103 * 4.3.4.2 Power States of CPU0 and CPU1
104 */
105 if (booted) {
106 clkdm_wakeup(cpu1_clkdm);
107 clkdm_allow_idle(cpu1_clkdm);
108 } else {
109 dsb_sev();
110 booted = true;
111 }
112
68 gic_raise_softirq(cpumask_of(cpu), 1); 113 gic_raise_softirq(cpumask_of(cpu), 1);
69 114
70 /* 115 /*
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
new file mode 100644
index 000000000000..d3d8971d7f30
--- /dev/null
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -0,0 +1,389 @@
1/*
2 * OMAP WakeupGen Source file
3 *
4 * OMAP WakeupGen is the interrupt controller extension used along
5 * with ARM GIC to wake the CPU out from low power states on
6 * external interrupts. It is responsible for generating wakeup
7 * event from the incoming interrupts and enable bits. It is
8 * implemented in MPU always ON power domain. During normal operation,
9 * WakeupGen delivers external interrupts directly to the GIC.
10 *
11 * Copyright (C) 2011 Texas Instruments, Inc.
12 * Santosh Shilimkar <santosh.shilimkar@ti.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/irq.h>
23#include <linux/platform_device.h>
24#include <linux/cpu.h>
25#include <linux/notifier.h>
26#include <linux/cpu_pm.h>
27
28#include <asm/hardware/gic.h>
29
30#include <mach/omap-wakeupgen.h>
31#include <mach/omap-secure.h>
32
33#include "omap4-sar-layout.h"
34#include "common.h"
35
36#define NR_REG_BANKS 4
37#define MAX_IRQS 128
38#define WKG_MASK_ALL 0x00000000
39#define WKG_UNMASK_ALL 0xffffffff
40#define CPU_ENA_OFFSET 0x400
41#define CPU0_ID 0x0
42#define CPU1_ID 0x1
43
44static void __iomem *wakeupgen_base;
45static void __iomem *sar_base;
46static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
47static DEFINE_SPINLOCK(wakeupgen_lock);
48static unsigned int irq_target_cpu[NR_IRQS];
49
50/*
51 * Static helper functions.
52 */
53static inline u32 wakeupgen_readl(u8 idx, u32 cpu)
54{
55 return __raw_readl(wakeupgen_base + OMAP_WKG_ENB_A_0 +
56 (cpu * CPU_ENA_OFFSET) + (idx * 4));
57}
58
59static inline void wakeupgen_writel(u32 val, u8 idx, u32 cpu)
60{
61 __raw_writel(val, wakeupgen_base + OMAP_WKG_ENB_A_0 +
62 (cpu * CPU_ENA_OFFSET) + (idx * 4));
63}
64
65static inline void sar_writel(u32 val, u32 offset, u8 idx)
66{
67 __raw_writel(val, sar_base + offset + (idx * 4));
68}
69
70static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
71{
72 u8 i;
73
74 for (i = 0; i < NR_REG_BANKS; i++)
75 wakeupgen_writel(reg, i, cpu);
76}
77
78static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
79{
80 unsigned int spi_irq;
81
82 /*
83 * PPIs and SGIs are not supported.
84 */
85 if (irq < OMAP44XX_IRQ_GIC_START)
86 return -EINVAL;
87
88 /*
89 * Subtract the GIC offset.
90 */
91 spi_irq = irq - OMAP44XX_IRQ_GIC_START;
92 if (spi_irq > MAX_IRQS) {
93 pr_err("omap wakeupGen: Invalid IRQ%d\n", irq);
94 return -EINVAL;
95 }
96
97 /*
98 * Each WakeupGen register controls 32 interrupt.
99 * i.e. 1 bit per SPI IRQ
100 */
101 *reg_index = spi_irq >> 5;
102 *bit_posn = spi_irq %= 32;
103
104 return 0;
105}
106
107static void _wakeupgen_clear(unsigned int irq, unsigned int cpu)
108{
109 u32 val, bit_number;
110 u8 i;
111
112 if (_wakeupgen_get_irq_info(irq, &bit_number, &i))
113 return;
114
115 val = wakeupgen_readl(i, cpu);
116 val &= ~BIT(bit_number);
117 wakeupgen_writel(val, i, cpu);
118}
119
120static void _wakeupgen_set(unsigned int irq, unsigned int cpu)
121{
122 u32 val, bit_number;
123 u8 i;
124
125 if (_wakeupgen_get_irq_info(irq, &bit_number, &i))
126 return;
127
128 val = wakeupgen_readl(i, cpu);
129 val |= BIT(bit_number);
130 wakeupgen_writel(val, i, cpu);
131}
132
133static void _wakeupgen_save_masks(unsigned int cpu)
134{
135 u8 i;
136
137 for (i = 0; i < NR_REG_BANKS; i++)
138 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
139}
140
141static void _wakeupgen_restore_masks(unsigned int cpu)
142{
143 u8 i;
144
145 for (i = 0; i < NR_REG_BANKS; i++)
146 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
147}
148
149/*
150 * Architecture specific Mask extension
151 */
152static void wakeupgen_mask(struct irq_data *d)
153{
154 unsigned long flags;
155
156 spin_lock_irqsave(&wakeupgen_lock, flags);
157 _wakeupgen_clear(d->irq, irq_target_cpu[d->irq]);
158 spin_unlock_irqrestore(&wakeupgen_lock, flags);
159}
160
161/*
162 * Architecture specific Unmask extension
163 */
164static void wakeupgen_unmask(struct irq_data *d)
165{
166 unsigned long flags;
167
168 spin_lock_irqsave(&wakeupgen_lock, flags);
169 _wakeupgen_set(d->irq, irq_target_cpu[d->irq]);
170 spin_unlock_irqrestore(&wakeupgen_lock, flags);
171}
172
173/*
174 * Mask or unmask all interrupts on given CPU.
175 * 0 = Mask all interrupts on the 'cpu'
176 * 1 = Unmask all interrupts on the 'cpu'
177 * Ensure that the initial mask is maintained. This is faster than
178 * iterating through GIC registers to arrive at the correct masks.
179 */
180static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set)
181{
182 unsigned long flags;
183
184 spin_lock_irqsave(&wakeupgen_lock, flags);
185 if (set) {
186 _wakeupgen_save_masks(cpu);
187 _wakeupgen_set_all(cpu, WKG_MASK_ALL);
188 } else {
189 _wakeupgen_set_all(cpu, WKG_UNMASK_ALL);
190 _wakeupgen_restore_masks(cpu);
191 }
192 spin_unlock_irqrestore(&wakeupgen_lock, flags);
193}
194
195#ifdef CONFIG_CPU_PM
196/*
197 * Save WakeupGen interrupt context in SAR BANK3. Restore is done by
198 * ROM code. WakeupGen IP is integrated along with GIC to manage the
199 * interrupt wakeups from CPU low power states. It manages
200 * masking/unmasking of Shared peripheral interrupts(SPI). So the
201 * interrupt enable/disable control should be in sync and consistent
202 * at WakeupGen and GIC so that interrupts are not lost.
203 */
204static void irq_save_context(void)
205{
206 u32 i, val;
207
208 if (omap_rev() == OMAP4430_REV_ES1_0)
209 return;
210
211 if (!sar_base)
212 sar_base = omap4_get_sar_ram_base();
213
214 for (i = 0; i < NR_REG_BANKS; i++) {
215 /* Save the CPUx interrupt mask for IRQ 0 to 127 */
216 val = wakeupgen_readl(i, 0);
217 sar_writel(val, WAKEUPGENENB_OFFSET_CPU0, i);
218 val = wakeupgen_readl(i, 1);
219 sar_writel(val, WAKEUPGENENB_OFFSET_CPU1, i);
220
221 /*
222 * Disable the secure interrupts for CPUx. The restore
223 * code blindly restores secure and non-secure interrupt
224 * masks from SAR RAM. Secure interrupts are not suppose
225 * to be enabled from HLOS. So overwrite the SAR location
226 * so that the secure interrupt remains disabled.
227 */
228 sar_writel(0x0, WAKEUPGENENB_SECURE_OFFSET_CPU0, i);
229 sar_writel(0x0, WAKEUPGENENB_SECURE_OFFSET_CPU1, i);
230 }
231
232 /* Save AuxBoot* registers */
233 val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
234 __raw_writel(val, sar_base + AUXCOREBOOT0_OFFSET);
235 val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
236 __raw_writel(val, sar_base + AUXCOREBOOT1_OFFSET);
237
238 /* Save SyncReq generation logic */
239 val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
240 __raw_writel(val, sar_base + AUXCOREBOOT0_OFFSET);
241 val = __raw_readl(wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
242 __raw_writel(val, sar_base + AUXCOREBOOT1_OFFSET);
243
244 /* Save SyncReq generation logic */
245 val = __raw_readl(wakeupgen_base + OMAP_PTMSYNCREQ_MASK);
246 __raw_writel(val, sar_base + PTMSYNCREQ_MASK_OFFSET);
247 val = __raw_readl(wakeupgen_base + OMAP_PTMSYNCREQ_EN);
248 __raw_writel(val, sar_base + PTMSYNCREQ_EN_OFFSET);
249
250 /* Set the Backup Bit Mask status */
251 val = __raw_readl(sar_base + SAR_BACKUP_STATUS_OFFSET);
252 val |= SAR_BACKUP_STATUS_WAKEUPGEN;
253 __raw_writel(val, sar_base + SAR_BACKUP_STATUS_OFFSET);
254}
255
256/*
257 * Clear WakeupGen SAR backup status.
258 */
259void irq_sar_clear(void)
260{
261 u32 val;
262 val = __raw_readl(sar_base + SAR_BACKUP_STATUS_OFFSET);
263 val &= ~SAR_BACKUP_STATUS_WAKEUPGEN;
264 __raw_writel(val, sar_base + SAR_BACKUP_STATUS_OFFSET);
265}
266
267/*
268 * Save GIC and Wakeupgen interrupt context using secure API
269 * for HS/EMU devices.
270 */
271static void irq_save_secure_context(void)
272{
273 u32 ret;
274 ret = omap_secure_dispatcher(OMAP4_HAL_SAVEGIC_INDEX,
275 FLAG_START_CRITICAL,
276 0, 0, 0, 0, 0);
277 if (ret != API_HAL_RET_VALUE_OK)
278 pr_err("GIC and Wakeupgen context save failed\n");
279}
280#endif
281
282#ifdef CONFIG_HOTPLUG_CPU
283static int __cpuinit irq_cpu_hotplug_notify(struct notifier_block *self,
284 unsigned long action, void *hcpu)
285{
286 unsigned int cpu = (unsigned int)hcpu;
287
288 switch (action) {
289 case CPU_ONLINE:
290 wakeupgen_irqmask_all(cpu, 0);
291 break;
292 case CPU_DEAD:
293 wakeupgen_irqmask_all(cpu, 1);
294 break;
295 }
296 return NOTIFY_OK;
297}
298
299static struct notifier_block __refdata irq_hotplug_notifier = {
300 .notifier_call = irq_cpu_hotplug_notify,
301};
302
303static void __init irq_hotplug_init(void)
304{
305 register_hotcpu_notifier(&irq_hotplug_notifier);
306}
307#else
308static void __init irq_hotplug_init(void)
309{}
310#endif
311
312#ifdef CONFIG_CPU_PM
313static int irq_notifier(struct notifier_block *self, unsigned long cmd, void *v)
314{
315 switch (cmd) {
316 case CPU_CLUSTER_PM_ENTER:
317 if (omap_type() == OMAP2_DEVICE_TYPE_GP)
318 irq_save_context();
319 else
320 irq_save_secure_context();
321 break;
322 case CPU_CLUSTER_PM_EXIT:
323 if (omap_type() == OMAP2_DEVICE_TYPE_GP)
324 irq_sar_clear();
325 break;
326 }
327 return NOTIFY_OK;
328}
329
330static struct notifier_block irq_notifier_block = {
331 .notifier_call = irq_notifier,
332};
333
334static void __init irq_pm_init(void)
335{
336 cpu_pm_register_notifier(&irq_notifier_block);
337}
338#else
339static void __init irq_pm_init(void)
340{}
341#endif
342
343/*
344 * Initialise the wakeupgen module.
345 */
346int __init omap_wakeupgen_init(void)
347{
348 int i;
349 unsigned int boot_cpu = smp_processor_id();
350
351 /* Not supported on OMAP4 ES1.0 silicon */
352 if (omap_rev() == OMAP4430_REV_ES1_0) {
353 WARN(1, "WakeupGen: Not supported on OMAP4430 ES1.0\n");
354 return -EPERM;
355 }
356
357 /* Static mapping, never released */
358 wakeupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);
359 if (WARN_ON(!wakeupgen_base))
360 return -ENOMEM;
361
362 /* Clear all IRQ bitmasks at wakeupGen level */
363 for (i = 0; i < NR_REG_BANKS; i++) {
364 wakeupgen_writel(0, i, CPU0_ID);
365 wakeupgen_writel(0, i, CPU1_ID);
366 }
367
368 /*
369 * Override GIC architecture specific functions to add
370 * OMAP WakeupGen interrupt controller along with GIC
371 */
372 gic_arch_extn.irq_mask = wakeupgen_mask;
373 gic_arch_extn.irq_unmask = wakeupgen_unmask;
374 gic_arch_extn.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
375
376 /*
377 * FIXME: Add support to set_smp_affinity() once the core
378 * GIC code has necessary hooks in place.
379 */
380
381 /* Associate all the IRQs to boot CPU like GIC init does. */
382 for (i = 0; i < NR_IRQS; i++)
383 irq_target_cpu[i] = boot_cpu;
384
385 irq_hotplug_init();
386 irq_pm_init();
387
388 return 0;
389}
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index beecfdd56ea3..bc16c818c6b7 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -15,18 +15,73 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/memblock.h>
18 19
19#include <asm/hardware/gic.h> 20#include <asm/hardware/gic.h>
20#include <asm/hardware/cache-l2x0.h> 21#include <asm/hardware/cache-l2x0.h>
22#include <asm/mach/map.h>
21 23
22#include <plat/irqs.h> 24#include <plat/irqs.h>
25#include <plat/sram.h>
23 26
24#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/omap-wakeupgen.h>
25 29
26#include "common.h" 30#include "common.h"
31#include "omap4-sar-layout.h"
27 32
28#ifdef CONFIG_CACHE_L2X0 33#ifdef CONFIG_CACHE_L2X0
29void __iomem *l2cache_base; 34static void __iomem *l2cache_base;
35#endif
36
37static void __iomem *sar_ram_base;
38
39#ifdef CONFIG_OMAP4_ERRATA_I688
40/* Used to implement memory barrier on DRAM path */
41#define OMAP4_DRAM_BARRIER_VA 0xfe600000
42
43void __iomem *dram_sync, *sram_sync;
44
45void omap_bus_sync(void)
46{
47 if (dram_sync && sram_sync) {
48 writel_relaxed(readl_relaxed(dram_sync), dram_sync);
49 writel_relaxed(readl_relaxed(sram_sync), sram_sync);
50 isb();
51 }
52}
53
54static int __init omap_barriers_init(void)
55{
56 struct map_desc dram_io_desc[1];
57 phys_addr_t paddr;
58 u32 size;
59
60 if (!cpu_is_omap44xx())
61 return -ENODEV;
62
63 size = ALIGN(PAGE_SIZE, SZ_1M);
64 paddr = memblock_alloc(size, SZ_1M);
65 if (!paddr) {
66 pr_err("%s: failed to reserve 4 Kbytes\n", __func__);
67 return -ENOMEM;
68 }
69 memblock_free(paddr, size);
70 memblock_remove(paddr, size);
71 dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
72 dram_io_desc[0].pfn = __phys_to_pfn(paddr);
73 dram_io_desc[0].length = size;
74 dram_io_desc[0].type = MT_MEMORY_SO;
75 iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc));
76 dram_sync = (void __iomem *) dram_io_desc[0].virtual;
77 sram_sync = (void __iomem *) OMAP4_SRAM_VA;
78
79 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
80 (long long) paddr, dram_io_desc[0].virtual);
81
82 return 0;
83}
84core_initcall(omap_barriers_init);
30#endif 85#endif
31 86
32void __init gic_init_irq(void) 87void __init gic_init_irq(void)
@@ -42,11 +97,18 @@ void __init gic_init_irq(void)
42 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); 97 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
43 BUG_ON(!omap_irq_base); 98 BUG_ON(!omap_irq_base);
44 99
100 omap_wakeupgen_init();
101
45 gic_init(0, 29, gic_dist_base_addr, omap_irq_base); 102 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
46} 103}
47 104
48#ifdef CONFIG_CACHE_L2X0 105#ifdef CONFIG_CACHE_L2X0
49 106
107void __iomem *omap4_get_l2cache_base(void)
108{
109 return l2cache_base;
110}
111
50static void omap4_l2x0_disable(void) 112static void omap4_l2x0_disable(void)
51{ 113{
52 /* Disable PL310 L2 Cache controller */ 114 /* Disable PL310 L2 Cache controller */
@@ -72,7 +134,8 @@ static int __init omap_l2_cache_init(void)
72 134
73 /* Static mapping, never released */ 135 /* Static mapping, never released */
74 l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); 136 l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
75 BUG_ON(!l2cache_base); 137 if (WARN_ON(!l2cache_base))
138 return -ENOMEM;
76 139
77 /* 140 /*
78 * 16-way associativity, parity disabled 141 * 16-way associativity, parity disabled
@@ -112,3 +175,30 @@ static int __init omap_l2_cache_init(void)
112} 175}
113early_initcall(omap_l2_cache_init); 176early_initcall(omap_l2_cache_init);
114#endif 177#endif
178
179void __iomem *omap4_get_sar_ram_base(void)
180{
181 return sar_ram_base;
182}
183
184/*
185 * SAR RAM used to save and restore the HW
186 * context in low power modes
187 */
188static int __init omap4_sar_ram_init(void)
189{
190 /*
191 * To avoid code running on other OMAPs in
192 * multi-omap builds
193 */
194 if (!cpu_is_omap44xx())
195 return -ENOMEM;
196
197 /* Static mapping, never released */
198 sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);
199 if (WARN_ON(!sar_ram_base))
200 return -ENOMEM;
201
202 return 0;
203}
204early_initcall(omap4_sar_ram_init);
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
new file mode 100644
index 000000000000..fe5b545ad443
--- /dev/null
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -0,0 +1,50 @@
1/*
2 * omap4-sar-layout.h: OMAP4 SAR RAM layout header file
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef OMAP_ARCH_OMAP4_SAR_LAYOUT_H
12#define OMAP_ARCH_OMAP4_SAR_LAYOUT_H
13
14/*
15 * SAR BANK offsets from base address OMAP44XX_SAR_RAM_BASE
16 */
17#define SAR_BANK1_OFFSET 0x0000
18#define SAR_BANK2_OFFSET 0x1000
19#define SAR_BANK3_OFFSET 0x2000
20#define SAR_BANK4_OFFSET 0x3000
21
22/* Scratch pad memory offsets from SAR_BANK1 */
23#define SCU_OFFSET0 0xd00
24#define SCU_OFFSET1 0xd04
25#define OMAP_TYPE_OFFSET 0xd10
26#define L2X0_SAVE_OFFSET0 0xd14
27#define L2X0_SAVE_OFFSET1 0xd18
28#define L2X0_AUXCTRL_OFFSET 0xd1c
29#define L2X0_PREFETCH_CTRL_OFFSET 0xd20
30
31/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
32#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04
33#define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08
34
35#define SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x500)
36#define SAR_SECURE_RAM_SIZE_OFFSET (SAR_BANK3_OFFSET + 0x504)
37#define SAR_SECRAM_SAVED_AT_OFFSET (SAR_BANK3_OFFSET + 0x508)
38
39/* WakeUpGen save restore offset from OMAP44XX_SAR_RAM_BASE */
40#define WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x684)
41#define WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x694)
42#define WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6a4)
43#define WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6b4)
44#define AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x6c4)
45#define AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x6c8)
46#define PTMSYNCREQ_MASK_OFFSET (SAR_BANK3_OFFSET + 0x6cc)
47#define PTMSYNCREQ_EN_OFFSET (SAR_BANK3_OFFSET + 0x6d0)
48#define SAR_BACKUP_STATUS_WAKEUPGEN 0x10
49
50#endif
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 529142aff766..5192cabb40ed 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -136,6 +136,7 @@
136#include <linux/list.h> 136#include <linux/list.h>
137#include <linux/mutex.h> 137#include <linux/mutex.h>
138#include <linux/spinlock.h> 138#include <linux/spinlock.h>
139#include <linux/slab.h>
139 140
140#include "common.h" 141#include "common.h"
141#include <plat/cpu.h> 142#include <plat/cpu.h>
@@ -381,6 +382,51 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
381} 382}
382 383
383/** 384/**
385 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
386 * @oh: struct omap_hwmod *
387 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
388 *
389 * Set or clear the I/O pad wakeup flag in the mux entries for the
390 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
391 * in memory. If the hwmod is currently idled, and the new idle
392 * values don't match the previous ones, this function will also
393 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
394 * currently idled, this function won't touch the hardware: the new
395 * mux settings are written to the SCM PADCTRL registers when the
396 * hwmod is idled. No return value.
397 */
398static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
399{
400 struct omap_device_pad *pad;
401 bool change = false;
402 u16 prev_idle;
403 int j;
404
405 if (!oh->mux || !oh->mux->enabled)
406 return;
407
408 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
409 pad = oh->mux->pads_dynamic[j];
410
411 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
412 continue;
413
414 prev_idle = pad->idle;
415
416 if (set_wake)
417 pad->idle |= OMAP_WAKEUP_EN;
418 else
419 pad->idle &= ~OMAP_WAKEUP_EN;
420
421 if (prev_idle != pad->idle)
422 change = true;
423 }
424
425 if (change && oh->_state == _HWMOD_STATE_IDLE)
426 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
427}
428
429/**
384 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 430 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
385 * @oh: struct omap_hwmod * 431 * @oh: struct omap_hwmod *
386 * 432 *
@@ -706,27 +752,65 @@ static void _enable_module(struct omap_hwmod *oh)
706} 752}
707 753
708/** 754/**
709 * _disable_module - enable CLKCTRL modulemode on OMAP4 755 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
756 * @oh: struct omap_hwmod *
757 *
758 * Wait for a module @oh to enter slave idle. Returns 0 if the module
759 * does not have an IDLEST bit or if the module successfully enters
760 * slave idle; otherwise, pass along the return value of the
761 * appropriate *_cm*_wait_module_idle() function.
762 */
763static int _omap4_wait_target_disable(struct omap_hwmod *oh)
764{
765 if (!cpu_is_omap44xx())
766 return 0;
767
768 if (!oh)
769 return -EINVAL;
770
771 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
772 return 0;
773
774 if (oh->flags & HWMOD_NO_IDLEST)
775 return 0;
776
777 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
778 oh->clkdm->cm_inst,
779 oh->clkdm->clkdm_offs,
780 oh->prcm.omap4.clkctrl_offs);
781}
782
783/**
784 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
710 * @oh: struct omap_hwmod * 785 * @oh: struct omap_hwmod *
711 * 786 *
712 * Disable the PRCM module mode related to the hwmod @oh. 787 * Disable the PRCM module mode related to the hwmod @oh.
713 * No return value. 788 * Return EINVAL if the modulemode is not supported and 0 in case of success.
714 */ 789 */
715static void _disable_module(struct omap_hwmod *oh) 790static int _omap4_disable_module(struct omap_hwmod *oh)
716{ 791{
792 int v;
793
717 /* The module mode does not exist prior OMAP4 */ 794 /* The module mode does not exist prior OMAP4 */
718 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 795 if (!cpu_is_omap44xx())
719 return; 796 return -EINVAL;
720 797
721 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 798 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
722 return; 799 return -EINVAL;
723 800
724 pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); 801 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
725 802
726 omap4_cminst_module_disable(oh->clkdm->prcm_partition, 803 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
727 oh->clkdm->cm_inst, 804 oh->clkdm->cm_inst,
728 oh->clkdm->clkdm_offs, 805 oh->clkdm->clkdm_offs,
729 oh->prcm.omap4.clkctrl_offs); 806 oh->prcm.omap4.clkctrl_offs);
807
808 v = _omap4_wait_target_disable(oh);
809 if (v)
810 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
811 oh->name);
812
813 return 0;
730} 814}
731 815
732/** 816/**
@@ -1153,36 +1237,6 @@ static int _wait_target_ready(struct omap_hwmod *oh)
1153} 1237}
1154 1238
1155/** 1239/**
1156 * _wait_target_disable - wait for a module to be disabled
1157 * @oh: struct omap_hwmod *
1158 *
1159 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1160 * does not have an IDLEST bit or if the module successfully enters
1161 * slave idle; otherwise, pass along the return value of the
1162 * appropriate *_cm*_wait_module_idle() function.
1163 */
1164static int _wait_target_disable(struct omap_hwmod *oh)
1165{
1166 /* TODO: For now just handle OMAP4+ */
1167 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1168 return 0;
1169
1170 if (!oh)
1171 return -EINVAL;
1172
1173 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1174 return 0;
1175
1176 if (oh->flags & HWMOD_NO_IDLEST)
1177 return 0;
1178
1179 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1180 oh->clkdm->cm_inst,
1181 oh->clkdm->clkdm_offs,
1182 oh->prcm.omap4.clkctrl_offs);
1183}
1184
1185/**
1186 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1240 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1187 * @oh: struct omap_hwmod * 1241 * @oh: struct omap_hwmod *
1188 * @name: name of the reset line in the context of this hwmod 1242 * @name: name of the reset line in the context of this hwmod
@@ -1441,6 +1495,25 @@ static int _enable(struct omap_hwmod *oh)
1441 1495
1442 pr_debug("omap_hwmod: %s: enabling\n", oh->name); 1496 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1443 1497
1498 /*
1499 * hwmods with HWMOD_INIT_NO_IDLE flag set are left
1500 * in enabled state at init.
1501 * Now that someone is really trying to enable them,
1502 * just ensure that the hwmod mux is set.
1503 */
1504 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1505 /*
1506 * If the caller has mux data populated, do the mux'ing
1507 * which wouldn't have been done as part of the _enable()
1508 * done during setup.
1509 */
1510 if (oh->mux)
1511 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1512
1513 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1514 return 0;
1515 }
1516
1444 if (oh->_state != _HWMOD_STATE_INITIALIZED && 1517 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1445 oh->_state != _HWMOD_STATE_IDLE && 1518 oh->_state != _HWMOD_STATE_IDLE &&
1446 oh->_state != _HWMOD_STATE_DISABLED) { 1519 oh->_state != _HWMOD_STATE_DISABLED) {
@@ -1524,8 +1597,6 @@ static int _enable(struct omap_hwmod *oh)
1524 */ 1597 */
1525static int _idle(struct omap_hwmod *oh) 1598static int _idle(struct omap_hwmod *oh)
1526{ 1599{
1527 int ret;
1528
1529 pr_debug("omap_hwmod: %s: idling\n", oh->name); 1600 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1530 1601
1531 if (oh->_state != _HWMOD_STATE_ENABLED) { 1602 if (oh->_state != _HWMOD_STATE_ENABLED) {
@@ -1537,11 +1608,9 @@ static int _idle(struct omap_hwmod *oh)
1537 if (oh->class->sysc) 1608 if (oh->class->sysc)
1538 _idle_sysc(oh); 1609 _idle_sysc(oh);
1539 _del_initiator_dep(oh, mpu_oh); 1610 _del_initiator_dep(oh, mpu_oh);
1540 _disable_module(oh); 1611
1541 ret = _wait_target_disable(oh); 1612 _omap4_disable_module(oh);
1542 if (ret) 1613
1543 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1544 oh->name);
1545 /* 1614 /*
1546 * The module must be in idle mode before disabling any parents 1615 * The module must be in idle mode before disabling any parents
1547 * clocks. Otherwise, the parent clock might be disabled before 1616 * clocks. Otherwise, the parent clock might be disabled before
@@ -1642,11 +1711,7 @@ static int _shutdown(struct omap_hwmod *oh)
1642 if (oh->_state == _HWMOD_STATE_ENABLED) { 1711 if (oh->_state == _HWMOD_STATE_ENABLED) {
1643 _del_initiator_dep(oh, mpu_oh); 1712 _del_initiator_dep(oh, mpu_oh);
1644 /* XXX what about the other system initiators here? dma, dsp */ 1713 /* XXX what about the other system initiators here? dma, dsp */
1645 _disable_module(oh); 1714 _omap4_disable_module(oh);
1646 ret = _wait_target_disable(oh);
1647 if (ret)
1648 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1649 oh->name);
1650 _disable_clocks(oh); 1715 _disable_clocks(oh);
1651 if (oh->clkdm) 1716 if (oh->clkdm)
1652 clkdm_hwmod_disable(oh->clkdm, oh); 1717 clkdm_hwmod_disable(oh->clkdm, oh);
@@ -1744,8 +1809,10 @@ static int _setup(struct omap_hwmod *oh, void *data)
1744 * it should be set by the core code as a runtime flag during startup 1809 * it should be set by the core code as a runtime flag during startup
1745 */ 1810 */
1746 if ((oh->flags & HWMOD_INIT_NO_IDLE) && 1811 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1747 (postsetup_state == _HWMOD_STATE_IDLE)) 1812 (postsetup_state == _HWMOD_STATE_IDLE)) {
1813 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1748 postsetup_state = _HWMOD_STATE_ENABLED; 1814 postsetup_state = _HWMOD_STATE_ENABLED;
1815 }
1749 1816
1750 if (postsetup_state == _HWMOD_STATE_IDLE) 1817 if (postsetup_state == _HWMOD_STATE_IDLE)
1751 _idle(oh); 1818 _idle(oh);
@@ -2416,6 +2483,7 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2416 v = oh->_sysc_cache; 2483 v = oh->_sysc_cache;
2417 _enable_wakeup(oh, &v); 2484 _enable_wakeup(oh, &v);
2418 _write_sysconfig(v, oh); 2485 _write_sysconfig(v, oh);
2486 _set_idle_ioring_wakeup(oh, true);
2419 spin_unlock_irqrestore(&oh->_lock, flags); 2487 spin_unlock_irqrestore(&oh->_lock, flags);
2420 2488
2421 return 0; 2489 return 0;
@@ -2446,6 +2514,7 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2446 v = oh->_sysc_cache; 2514 v = oh->_sysc_cache;
2447 _disable_wakeup(oh, &v); 2515 _disable_wakeup(oh, &v);
2448 _write_sysconfig(v, oh); 2516 _write_sysconfig(v, oh);
2517 _set_idle_ioring_wakeup(oh, false);
2449 spin_unlock_irqrestore(&oh->_lock, flags); 2518 spin_unlock_irqrestore(&oh->_lock, flags);
2450 2519
2451 return 0; 2520 return 0;
@@ -2662,3 +2731,57 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2662 2731
2663 return 0; 2732 return 0;
2664} 2733}
2734
2735/**
2736 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
2737 * @oh: struct omap_hwmod * containing hwmod mux entries
2738 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
2739 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
2740 *
2741 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
2742 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
2743 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
2744 * this function is not called for a given pad_idx, then the ISR
2745 * associated with @oh's first MPU IRQ will be triggered when an I/O
2746 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
2747 * the _dynamic or wakeup_ entry: if there are other entries not
2748 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
2749 * entries are NOT COUNTED in the dynamic pad index. This function
2750 * must be called separately for each pad that requires its interrupt
2751 * to be re-routed this way. Returns -EINVAL if there is an argument
2752 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
2753 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
2754 *
2755 * XXX This function interface is fragile. Rather than using array
2756 * indexes, which are subject to unpredictable change, it should be
2757 * using hwmod IRQ names, and some other stable key for the hwmod mux
2758 * pad records.
2759 */
2760int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
2761{
2762 int nr_irqs;
2763
2764 might_sleep();
2765
2766 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
2767 pad_idx >= oh->mux->nr_pads_dynamic)
2768 return -EINVAL;
2769
2770 /* Check the number of available mpu_irqs */
2771 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
2772 ;
2773
2774 if (irq_idx >= nr_irqs)
2775 return -EINVAL;
2776
2777 if (!oh->mux->irqs) {
2778 /* XXX What frees this? */
2779 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
2780 GFP_KERNEL);
2781 if (!oh->mux->irqs)
2782 return -ENOMEM;
2783 }
2784 oh->mux->irqs[pad_idx] = irq_idx;
2785
2786 return 0;
2787}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index eef43e2e163e..5324e8d93bc0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
84static struct omap_hwmod omap3xxx_mcbsp5_hwmod; 84static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
85static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod; 85static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
86static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod; 86static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
87static struct omap_hwmod omap3xxx_usb_host_hs_hwmod;
88static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod;
87 89
88/* L3 -> L4_CORE interface */ 90/* L3 -> L4_CORE interface */
89static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { 91static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -164,6 +166,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod;
164static struct omap_hwmod omap3xxx_uart2_hwmod; 166static struct omap_hwmod omap3xxx_uart2_hwmod;
165static struct omap_hwmod omap3xxx_uart3_hwmod; 167static struct omap_hwmod omap3xxx_uart3_hwmod;
166static struct omap_hwmod omap3xxx_uart4_hwmod; 168static struct omap_hwmod omap3xxx_uart4_hwmod;
169static struct omap_hwmod am35xx_uart4_hwmod;
167static struct omap_hwmod omap3xxx_usbhsotg_hwmod; 170static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
168 171
169/* l3_core -> usbhsotg interface */ 172/* l3_core -> usbhsotg interface */
@@ -299,6 +302,23 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
299 .user = OCP_USER_MPU | OCP_USER_SDMA, 302 .user = OCP_USER_MPU | OCP_USER_SDMA,
300}; 303};
301 304
305/* AM35xx: L4 CORE -> UART4 interface */
306static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {
307 {
308 .pa_start = OMAP3_UART4_AM35XX_BASE,
309 .pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,
310 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
311 },
312};
313
314static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {
315 .master = &omap3xxx_l4_core_hwmod,
316 .slave = &am35xx_uart4_hwmod,
317 .clk = "uart4_ick",
318 .addr = am35xx_uart4_addr_space,
319 .user = OCP_USER_MPU | OCP_USER_SDMA,
320};
321
302/* L4 CORE -> I2C1 interface */ 322/* L4 CORE -> I2C1 interface */
303static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { 323static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
304 .master = &omap3xxx_l4_core_hwmod, 324 .master = &omap3xxx_l4_core_hwmod,
@@ -1162,6 +1182,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
1162 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 1182 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1163 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 1183 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1164 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 1184 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1185 .clockact = CLOCKACT_TEST_ICLK,
1165 .sysc_fields = &omap_hwmod_sysc_type1, 1186 .sysc_fields = &omap_hwmod_sysc_type1,
1166}; 1187};
1167 1188
@@ -1309,6 +1330,39 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1309 .class = &omap2_uart_class, 1330 .class = &omap2_uart_class,
1310}; 1331};
1311 1332
1333static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = {
1334 { .irq = INT_35XX_UART4_IRQ, },
1335};
1336
1337static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
1338 { .name = "rx", .dma_req = AM35XX_DMA_UART4_RX, },
1339 { .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },
1340};
1341
1342static struct omap_hwmod_ocp_if *am35xx_uart4_slaves[] = {
1343 &am35xx_l4_core__uart4,
1344};
1345
1346static struct omap_hwmod am35xx_uart4_hwmod = {
1347 .name = "uart4",
1348 .mpu_irqs = am35xx_uart4_mpu_irqs,
1349 .sdma_reqs = am35xx_uart4_sdma_reqs,
1350 .main_clk = "uart4_fck",
1351 .prcm = {
1352 .omap2 = {
1353 .module_offs = CORE_MOD,
1354 .prcm_reg_id = 1,
1355 .module_bit = OMAP3430_EN_UART4_SHIFT,
1356 .idlest_reg_id = 1,
1357 .idlest_idle_bit = OMAP3430_EN_UART4_SHIFT,
1358 },
1359 },
1360 .slaves = am35xx_uart4_slaves,
1361 .slaves_cnt = ARRAY_SIZE(am35xx_uart4_slaves),
1362 .class = &omap2_uart_class,
1363};
1364
1365
1312static struct omap_hwmod_class i2c_class = { 1366static struct omap_hwmod_class i2c_class = {
1313 .name = "i2c", 1367 .name = "i2c",
1314 .sysc = &i2c_sysc, 1368 .sysc = &i2c_sysc,
@@ -1636,7 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
1636 1690
1637static struct omap_hwmod omap3xxx_i2c1_hwmod = { 1691static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1638 .name = "i2c1", 1692 .name = "i2c1",
1639 .flags = HWMOD_16BIT_REG, 1693 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
1640 .mpu_irqs = omap2_i2c1_mpu_irqs, 1694 .mpu_irqs = omap2_i2c1_mpu_irqs,
1641 .sdma_reqs = omap2_i2c1_sdma_reqs, 1695 .sdma_reqs = omap2_i2c1_sdma_reqs,
1642 .main_clk = "i2c1_fck", 1696 .main_clk = "i2c1_fck",
@@ -1670,7 +1724,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
1670 1724
1671static struct omap_hwmod omap3xxx_i2c2_hwmod = { 1725static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1672 .name = "i2c2", 1726 .name = "i2c2",
1673 .flags = HWMOD_16BIT_REG, 1727 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
1674 .mpu_irqs = omap2_i2c2_mpu_irqs, 1728 .mpu_irqs = omap2_i2c2_mpu_irqs,
1675 .sdma_reqs = omap2_i2c2_sdma_reqs, 1729 .sdma_reqs = omap2_i2c2_sdma_reqs,
1676 .main_clk = "i2c2_fck", 1730 .main_clk = "i2c2_fck",
@@ -1715,7 +1769,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
1715 1769
1716static struct omap_hwmod omap3xxx_i2c3_hwmod = { 1770static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1717 .name = "i2c3", 1771 .name = "i2c3",
1718 .flags = HWMOD_16BIT_REG, 1772 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
1719 .mpu_irqs = i2c3_mpu_irqs, 1773 .mpu_irqs = i2c3_mpu_irqs,
1720 .sdma_reqs = i2c3_sdma_reqs, 1774 .sdma_reqs = i2c3_sdma_reqs,
1721 .main_clk = "i2c3_fck", 1775 .main_clk = "i2c3_fck",
@@ -3072,7 +3126,35 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
3072 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 3126 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
3073}; 3127};
3074 3128
3075static struct omap_hwmod omap3xxx_mmc1_hwmod = { 3129/* See 35xx errata 2.1.1.128 in SPRZ278F */
3130static struct omap_mmc_dev_attr mmc1_pre_es3_dev_attr = {
3131 .flags = (OMAP_HSMMC_SUPPORTS_DUAL_VOLT |
3132 OMAP_HSMMC_BROKEN_MULTIBLOCK_READ),
3133};
3134
3135static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {
3136 .name = "mmc1",
3137 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
3138 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
3139 .opt_clks = omap34xx_mmc1_opt_clks,
3140 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks),
3141 .main_clk = "mmchs1_fck",
3142 .prcm = {
3143 .omap2 = {
3144 .module_offs = CORE_MOD,
3145 .prcm_reg_id = 1,
3146 .module_bit = OMAP3430_EN_MMC1_SHIFT,
3147 .idlest_reg_id = 1,
3148 .idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
3149 },
3150 },
3151 .dev_attr = &mmc1_pre_es3_dev_attr,
3152 .slaves = omap3xxx_mmc1_slaves,
3153 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
3154 .class = &omap34xx_mmc_class,
3155};
3156
3157static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
3076 .name = "mmc1", 3158 .name = "mmc1",
3077 .mpu_irqs = omap34xx_mmc1_mpu_irqs, 3159 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
3078 .sdma_reqs = omap34xx_mmc1_sdma_reqs, 3160 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
@@ -3115,7 +3197,34 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
3115 &omap3xxx_l4_core__mmc2, 3197 &omap3xxx_l4_core__mmc2,
3116}; 3198};
3117 3199
3118static struct omap_hwmod omap3xxx_mmc2_hwmod = { 3200/* See 35xx errata 2.1.1.128 in SPRZ278F */
3201static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = {
3202 .flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
3203};
3204
3205static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {
3206 .name = "mmc2",
3207 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
3208 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
3209 .opt_clks = omap34xx_mmc2_opt_clks,
3210 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks),
3211 .main_clk = "mmchs2_fck",
3212 .prcm = {
3213 .omap2 = {
3214 .module_offs = CORE_MOD,
3215 .prcm_reg_id = 1,
3216 .module_bit = OMAP3430_EN_MMC2_SHIFT,
3217 .idlest_reg_id = 1,
3218 .idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
3219 },
3220 },
3221 .dev_attr = &mmc2_pre_es3_dev_attr,
3222 .slaves = omap3xxx_mmc2_slaves,
3223 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
3224 .class = &omap34xx_mmc_class,
3225};
3226
3227static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
3119 .name = "mmc2", 3228 .name = "mmc2",
3120 .mpu_irqs = omap34xx_mmc2_mpu_irqs, 3229 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
3121 .sdma_reqs = omap34xx_mmc2_sdma_reqs, 3230 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
@@ -3177,13 +3286,223 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3177 .class = &omap34xx_mmc_class, 3286 .class = &omap34xx_mmc_class,
3178}; 3287};
3179 3288
3289/*
3290 * 'usb_host_hs' class
3291 * high-speed multi-port usb host controller
3292 */
3293static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = {
3294 .master = &omap3xxx_usb_host_hs_hwmod,
3295 .slave = &omap3xxx_l3_main_hwmod,
3296 .clk = "core_l3_ick",
3297 .user = OCP_USER_MPU,
3298};
3299
3300static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
3301 .rev_offs = 0x0000,
3302 .sysc_offs = 0x0010,
3303 .syss_offs = 0x0014,
3304 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
3305 SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
3306 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
3307 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
3308 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
3309 .sysc_fields = &omap_hwmod_sysc_type1,
3310};
3311
3312static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
3313 .name = "usb_host_hs",
3314 .sysc = &omap3xxx_usb_host_hs_sysc,
3315};
3316
3317static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_masters[] = {
3318 &omap3xxx_usb_host_hs__l3_main_2,
3319};
3320
3321static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {
3322 {
3323 .name = "uhh",
3324 .pa_start = 0x48064000,
3325 .pa_end = 0x480643ff,
3326 .flags = ADDR_TYPE_RT
3327 },
3328 {
3329 .name = "ohci",
3330 .pa_start = 0x48064400,
3331 .pa_end = 0x480647ff,
3332 },
3333 {
3334 .name = "ehci",
3335 .pa_start = 0x48064800,
3336 .pa_end = 0x48064cff,
3337 },
3338 {}
3339};
3340
3341static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {
3342 .master = &omap3xxx_l4_core_hwmod,
3343 .slave = &omap3xxx_usb_host_hs_hwmod,
3344 .clk = "usbhost_ick",
3345 .addr = omap3xxx_usb_host_hs_addrs,
3346 .user = OCP_USER_MPU | OCP_USER_SDMA,
3347};
3348
3349static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_slaves[] = {
3350 &omap3xxx_l4_core__usb_host_hs,
3351};
3352
3353static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
3354 { .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
3355};
3356
3357static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
3358 { .name = "ohci-irq", .irq = 76 },
3359 { .name = "ehci-irq", .irq = 77 },
3360 { .irq = -1 }
3361};
3362
3363static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
3364 .name = "usb_host_hs",
3365 .class = &omap3xxx_usb_host_hs_hwmod_class,
3366 .clkdm_name = "l3_init_clkdm",
3367 .mpu_irqs = omap3xxx_usb_host_hs_irqs,
3368 .main_clk = "usbhost_48m_fck",
3369 .prcm = {
3370 .omap2 = {
3371 .module_offs = OMAP3430ES2_USBHOST_MOD,
3372 .prcm_reg_id = 1,
3373 .module_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
3374 .idlest_reg_id = 1,
3375 .idlest_idle_bit = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
3376 .idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
3377 },
3378 },
3379 .opt_clks = omap3xxx_usb_host_hs_opt_clks,
3380 .opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
3381 .slaves = omap3xxx_usb_host_hs_slaves,
3382 .slaves_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_slaves),
3383 .masters = omap3xxx_usb_host_hs_masters,
3384 .masters_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_masters),
3385
3386 /*
3387 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
3388 * id: i660
3389 *
3390 * Description:
3391 * In the following configuration :
3392 * - USBHOST module is set to smart-idle mode
3393 * - PRCM asserts idle_req to the USBHOST module ( This typically
3394 * happens when the system is going to a low power mode : all ports
3395 * have been suspended, the master part of the USBHOST module has
3396 * entered the standby state, and SW has cut the functional clocks)
3397 * - an USBHOST interrupt occurs before the module is able to answer
3398 * idle_ack, typically a remote wakeup IRQ.
3399 * Then the USB HOST module will enter a deadlock situation where it
3400 * is no more accessible nor functional.
3401 *
3402 * Workaround:
3403 * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
3404 */
3405
3406 /*
3407 * Errata: USB host EHCI may stall when entering smart-standby mode
3408 * Id: i571
3409 *
3410 * Description:
3411 * When the USBHOST module is set to smart-standby mode, and when it is
3412 * ready to enter the standby state (i.e. all ports are suspended and
3413 * all attached devices are in suspend mode), then it can wrongly assert
3414 * the Mstandby signal too early while there are still some residual OCP
3415 * transactions ongoing. If this condition occurs, the internal state
3416 * machine may go to an undefined state and the USB link may be stuck
3417 * upon the next resume.
3418 *
3419 * Workaround:
3420 * Don't use smart standby; use only force standby,
3421 * hence HWMOD_SWSUP_MSTANDBY
3422 */
3423
3424 /*
3425 * During system boot; If the hwmod framework resets the module
3426 * the module will have smart idle settings; which can lead to deadlock
3427 * (above Errata Id:i660); so, dont reset the module during boot;
3428 * Use HWMOD_INIT_NO_RESET.
3429 */
3430
3431 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
3432 HWMOD_INIT_NO_RESET,
3433};
3434
3435/*
3436 * 'usb_tll_hs' class
3437 * usb_tll_hs module is the adapter on the usb_host_hs ports
3438 */
3439static struct omap_hwmod_class_sysconfig omap3xxx_usb_tll_hs_sysc = {
3440 .rev_offs = 0x0000,
3441 .sysc_offs = 0x0010,
3442 .syss_offs = 0x0014,
3443 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
3444 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
3445 SYSC_HAS_AUTOIDLE),
3446 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
3447 .sysc_fields = &omap_hwmod_sysc_type1,
3448};
3449
3450static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = {
3451 .name = "usb_tll_hs",
3452 .sysc = &omap3xxx_usb_tll_hs_sysc,
3453};
3454
3455static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
3456 { .name = "tll-irq", .irq = 78 },
3457 { .irq = -1 }
3458};
3459
3460static struct omap_hwmod_addr_space omap3xxx_usb_tll_hs_addrs[] = {
3461 {
3462 .name = "tll",
3463 .pa_start = 0x48062000,
3464 .pa_end = 0x48062fff,
3465 .flags = ADDR_TYPE_RT
3466 },
3467 {}
3468};
3469
3470static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = {
3471 .master = &omap3xxx_l4_core_hwmod,
3472 .slave = &omap3xxx_usb_tll_hs_hwmod,
3473 .clk = "usbtll_ick",
3474 .addr = omap3xxx_usb_tll_hs_addrs,
3475 .user = OCP_USER_MPU | OCP_USER_SDMA,
3476};
3477
3478static struct omap_hwmod_ocp_if *omap3xxx_usb_tll_hs_slaves[] = {
3479 &omap3xxx_l4_core__usb_tll_hs,
3480};
3481
3482static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
3483 .name = "usb_tll_hs",
3484 .class = &omap3xxx_usb_tll_hs_hwmod_class,
3485 .clkdm_name = "l3_init_clkdm",
3486 .mpu_irqs = omap3xxx_usb_tll_hs_irqs,
3487 .main_clk = "usbtll_fck",
3488 .prcm = {
3489 .omap2 = {
3490 .module_offs = CORE_MOD,
3491 .prcm_reg_id = 3,
3492 .module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
3493 .idlest_reg_id = 3,
3494 .idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
3495 },
3496 },
3497 .slaves = omap3xxx_usb_tll_hs_slaves,
3498 .slaves_cnt = ARRAY_SIZE(omap3xxx_usb_tll_hs_slaves),
3499};
3500
3180static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { 3501static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3181 &omap3xxx_l3_main_hwmod, 3502 &omap3xxx_l3_main_hwmod,
3182 &omap3xxx_l4_core_hwmod, 3503 &omap3xxx_l4_core_hwmod,
3183 &omap3xxx_l4_per_hwmod, 3504 &omap3xxx_l4_per_hwmod,
3184 &omap3xxx_l4_wkup_hwmod, 3505 &omap3xxx_l4_wkup_hwmod,
3185 &omap3xxx_mmc1_hwmod,
3186 &omap3xxx_mmc2_hwmod,
3187 &omap3xxx_mmc3_hwmod, 3506 &omap3xxx_mmc3_hwmod,
3188 &omap3xxx_mpu_hwmod, 3507 &omap3xxx_mpu_hwmod,
3189 3508
@@ -3198,12 +3517,12 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3198 &omap3xxx_timer9_hwmod, 3517 &omap3xxx_timer9_hwmod,
3199 &omap3xxx_timer10_hwmod, 3518 &omap3xxx_timer10_hwmod,
3200 &omap3xxx_timer11_hwmod, 3519 &omap3xxx_timer11_hwmod,
3201 &omap3xxx_timer12_hwmod,
3202 3520
3203 &omap3xxx_wd_timer2_hwmod, 3521 &omap3xxx_wd_timer2_hwmod,
3204 &omap3xxx_uart1_hwmod, 3522 &omap3xxx_uart1_hwmod,
3205 &omap3xxx_uart2_hwmod, 3523 &omap3xxx_uart2_hwmod,
3206 &omap3xxx_uart3_hwmod, 3524 &omap3xxx_uart3_hwmod,
3525
3207 /* dss class */ 3526 /* dss class */
3208 &omap3xxx_dss_dispc_hwmod, 3527 &omap3xxx_dss_dispc_hwmod,
3209 &omap3xxx_dss_dsi1_hwmod, 3528 &omap3xxx_dss_dsi1_hwmod,
@@ -3245,6 +3564,12 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3245 NULL, 3564 NULL,
3246}; 3565};
3247 3566
3567/* GP-only hwmods */
3568static __initdata struct omap_hwmod *omap3xxx_gp_hwmods[] = {
3569 &omap3xxx_timer12_hwmod,
3570 NULL
3571};
3572
3248/* 3430ES1-only hwmods */ 3573/* 3430ES1-only hwmods */
3249static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { 3574static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3250 &omap3430es1_dss_core_hwmod, 3575 &omap3430es1_dss_core_hwmod,
@@ -3255,6 +3580,22 @@ static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3255static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { 3580static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
3256 &omap3xxx_dss_core_hwmod, 3581 &omap3xxx_dss_core_hwmod,
3257 &omap3xxx_usbhsotg_hwmod, 3582 &omap3xxx_usbhsotg_hwmod,
3583 &omap3xxx_usb_host_hs_hwmod,
3584 &omap3xxx_usb_tll_hs_hwmod,
3585 NULL
3586};
3587
3588/* <= 3430ES3-only hwmods */
3589static struct omap_hwmod *omap3430_pre_es3_hwmods[] __initdata = {
3590 &omap3xxx_pre_es3_mmc1_hwmod,
3591 &omap3xxx_pre_es3_mmc2_hwmod,
3592 NULL
3593};
3594
3595/* 3430ES3+-only hwmods */
3596static struct omap_hwmod *omap3430_es3plus_hwmods[] __initdata = {
3597 &omap3xxx_es3plus_mmc1_hwmod,
3598 &omap3xxx_es3plus_mmc2_hwmod,
3258 NULL 3599 NULL
3259}; 3600};
3260 3601
@@ -3276,12 +3617,21 @@ static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
3276 &omap36xx_sr2_hwmod, 3617 &omap36xx_sr2_hwmod,
3277 &omap3xxx_usbhsotg_hwmod, 3618 &omap3xxx_usbhsotg_hwmod,
3278 &omap3xxx_mailbox_hwmod, 3619 &omap3xxx_mailbox_hwmod,
3620 &omap3xxx_usb_host_hs_hwmod,
3621 &omap3xxx_usb_tll_hs_hwmod,
3622 &omap3xxx_es3plus_mmc1_hwmod,
3623 &omap3xxx_es3plus_mmc2_hwmod,
3279 NULL 3624 NULL
3280}; 3625};
3281 3626
3282static __initdata struct omap_hwmod *am35xx_hwmods[] = { 3627static __initdata struct omap_hwmod *am35xx_hwmods[] = {
3283 &omap3xxx_dss_core_hwmod, /* XXX ??? */ 3628 &omap3xxx_dss_core_hwmod, /* XXX ??? */
3284 &am35xx_usbhsotg_hwmod, 3629 &am35xx_usbhsotg_hwmod,
3630 &am35xx_uart4_hwmod,
3631 &omap3xxx_usb_host_hs_hwmod,
3632 &omap3xxx_usb_tll_hs_hwmod,
3633 &omap3xxx_es3plus_mmc1_hwmod,
3634 &omap3xxx_es3plus_mmc2_hwmod,
3285 NULL 3635 NULL
3286}; 3636};
3287 3637
@@ -3296,6 +3646,13 @@ int __init omap3xxx_hwmod_init(void)
3296 if (r < 0) 3646 if (r < 0)
3297 return r; 3647 return r;
3298 3648
3649 /* Register GP-only hwmods. */
3650 if (omap_type() == OMAP2_DEVICE_TYPE_GP) {
3651 r = omap_hwmod_register(omap3xxx_gp_hwmods);
3652 if (r < 0)
3653 return r;
3654 }
3655
3299 rev = omap_rev(); 3656 rev = omap_rev();
3300 3657
3301 /* 3658 /*
@@ -3334,6 +3691,21 @@ int __init omap3xxx_hwmod_init(void)
3334 h = omap3430es2plus_hwmods; 3691 h = omap3430es2plus_hwmods;
3335 }; 3692 };
3336 3693
3694 if (h) {
3695 r = omap_hwmod_register(h);
3696 if (r < 0)
3697 return r;
3698 }
3699
3700 h = NULL;
3701 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
3702 rev == OMAP3430_REV_ES2_1) {
3703 h = omap3430_pre_es3_hwmods;
3704 } else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
3705 rev == OMAP3430_REV_ES3_1_2) {
3706 h = omap3430_es3plus_hwmods;
3707 };
3708
3337 if (h) 3709 if (h)
3338 r = omap_hwmod_register(h); 3710 r = omap_hwmod_register(h);
3339 3711
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index daaf165af696..f9f151081760 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -70,6 +70,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod;
70static struct omap_hwmod omap44xx_mpu_hwmod; 70static struct omap_hwmod omap44xx_mpu_hwmod;
71static struct omap_hwmod omap44xx_mpu_private_hwmod; 71static struct omap_hwmod omap44xx_mpu_private_hwmod;
72static struct omap_hwmod omap44xx_usb_otg_hs_hwmod; 72static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
73static struct omap_hwmod omap44xx_usb_host_hs_hwmod;
74static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;
73 75
74/* 76/*
75 * Interconnects omap_hwmod structures 77 * Interconnects omap_hwmod structures
@@ -2246,6 +2248,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
2246 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), 2248 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
2247 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2249 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2248 SIDLE_SMART_WKUP), 2250 SIDLE_SMART_WKUP),
2251 .clockact = CLOCKACT_TEST_ICLK,
2249 .sysc_fields = &omap_hwmod_sysc_type1, 2252 .sysc_fields = &omap_hwmod_sysc_type1,
2250}; 2253};
2251 2254
@@ -2300,7 +2303,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2300 .name = "i2c1", 2303 .name = "i2c1",
2301 .class = &omap44xx_i2c_hwmod_class, 2304 .class = &omap44xx_i2c_hwmod_class,
2302 .clkdm_name = "l4_per_clkdm", 2305 .clkdm_name = "l4_per_clkdm",
2303 .flags = HWMOD_16BIT_REG, 2306 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2304 .mpu_irqs = omap44xx_i2c1_irqs, 2307 .mpu_irqs = omap44xx_i2c1_irqs,
2305 .sdma_reqs = omap44xx_i2c1_sdma_reqs, 2308 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
2306 .main_clk = "i2c1_fck", 2309 .main_clk = "i2c1_fck",
@@ -2356,7 +2359,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2356 .name = "i2c2", 2359 .name = "i2c2",
2357 .class = &omap44xx_i2c_hwmod_class, 2360 .class = &omap44xx_i2c_hwmod_class,
2358 .clkdm_name = "l4_per_clkdm", 2361 .clkdm_name = "l4_per_clkdm",
2359 .flags = HWMOD_16BIT_REG, 2362 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2360 .mpu_irqs = omap44xx_i2c2_irqs, 2363 .mpu_irqs = omap44xx_i2c2_irqs,
2361 .sdma_reqs = omap44xx_i2c2_sdma_reqs, 2364 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
2362 .main_clk = "i2c2_fck", 2365 .main_clk = "i2c2_fck",
@@ -2412,7 +2415,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2412 .name = "i2c3", 2415 .name = "i2c3",
2413 .class = &omap44xx_i2c_hwmod_class, 2416 .class = &omap44xx_i2c_hwmod_class,
2414 .clkdm_name = "l4_per_clkdm", 2417 .clkdm_name = "l4_per_clkdm",
2415 .flags = HWMOD_16BIT_REG, 2418 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2416 .mpu_irqs = omap44xx_i2c3_irqs, 2419 .mpu_irqs = omap44xx_i2c3_irqs,
2417 .sdma_reqs = omap44xx_i2c3_sdma_reqs, 2420 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
2418 .main_clk = "i2c3_fck", 2421 .main_clk = "i2c3_fck",
@@ -2468,7 +2471,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2468 .name = "i2c4", 2471 .name = "i2c4",
2469 .class = &omap44xx_i2c_hwmod_class, 2472 .class = &omap44xx_i2c_hwmod_class,
2470 .clkdm_name = "l4_per_clkdm", 2473 .clkdm_name = "l4_per_clkdm",
2471 .flags = HWMOD_16BIT_REG, 2474 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2472 .mpu_irqs = omap44xx_i2c4_irqs, 2475 .mpu_irqs = omap44xx_i2c4_irqs,
2473 .sdma_reqs = omap44xx_i2c4_sdma_reqs, 2476 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
2474 .main_clk = "i2c4_fck", 2477 .main_clk = "i2c4_fck",
@@ -5276,6 +5279,207 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5276 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves), 5279 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
5277}; 5280};
5278 5281
5282/*
5283 * 'usb_host_hs' class
5284 * high-speed multi-port usb host controller
5285 */
5286static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {
5287 .master = &omap44xx_usb_host_hs_hwmod,
5288 .slave = &omap44xx_l3_main_2_hwmod,
5289 .clk = "l3_div_ck",
5290 .user = OCP_USER_MPU | OCP_USER_SDMA,
5291};
5292
5293static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
5294 .rev_offs = 0x0000,
5295 .sysc_offs = 0x0010,
5296 .syss_offs = 0x0014,
5297 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
5298 SYSC_HAS_SOFTRESET),
5299 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
5300 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
5301 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
5302 .sysc_fields = &omap_hwmod_sysc_type2,
5303};
5304
5305static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
5306 .name = "usb_host_hs",
5307 .sysc = &omap44xx_usb_host_hs_sysc,
5308};
5309
5310static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
5311 &omap44xx_usb_host_hs__l3_main_2,
5312};
5313
5314static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
5315 {
5316 .name = "uhh",
5317 .pa_start = 0x4a064000,
5318 .pa_end = 0x4a0647ff,
5319 .flags = ADDR_TYPE_RT
5320 },
5321 {
5322 .name = "ohci",
5323 .pa_start = 0x4a064800,
5324 .pa_end = 0x4a064bff,
5325 },
5326 {
5327 .name = "ehci",
5328 .pa_start = 0x4a064c00,
5329 .pa_end = 0x4a064fff,
5330 },
5331 {}
5332};
5333
5334static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
5335 { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
5336 { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
5337 { .irq = -1 }
5338};
5339
5340static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
5341 .master = &omap44xx_l4_cfg_hwmod,
5342 .slave = &omap44xx_usb_host_hs_hwmod,
5343 .clk = "l4_div_ck",
5344 .addr = omap44xx_usb_host_hs_addrs,
5345 .user = OCP_USER_MPU | OCP_USER_SDMA,
5346};
5347
5348static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
5349 &omap44xx_l4_cfg__usb_host_hs,
5350};
5351
5352static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
5353 .name = "usb_host_hs",
5354 .class = &omap44xx_usb_host_hs_hwmod_class,
5355 .clkdm_name = "l3_init_clkdm",
5356 .main_clk = "usb_host_hs_fck",
5357 .prcm = {
5358 .omap4 = {
5359 .clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET,
5360 .context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET,
5361 .modulemode = MODULEMODE_SWCTRL,
5362 },
5363 },
5364 .mpu_irqs = omap44xx_usb_host_hs_irqs,
5365 .slaves = omap44xx_usb_host_hs_slaves,
5366 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
5367 .masters = omap44xx_usb_host_hs_masters,
5368 .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
5369
5370 /*
5371 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
5372 * id: i660
5373 *
5374 * Description:
5375 * In the following configuration :
5376 * - USBHOST module is set to smart-idle mode
5377 * - PRCM asserts idle_req to the USBHOST module ( This typically
5378 * happens when the system is going to a low power mode : all ports
5379 * have been suspended, the master part of the USBHOST module has
5380 * entered the standby state, and SW has cut the functional clocks)
5381 * - an USBHOST interrupt occurs before the module is able to answer
5382 * idle_ack, typically a remote wakeup IRQ.
5383 * Then the USB HOST module will enter a deadlock situation where it
5384 * is no more accessible nor functional.
5385 *
5386 * Workaround:
5387 * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
5388 */
5389
5390 /*
5391 * Errata: USB host EHCI may stall when entering smart-standby mode
5392 * Id: i571
5393 *
5394 * Description:
5395 * When the USBHOST module is set to smart-standby mode, and when it is
5396 * ready to enter the standby state (i.e. all ports are suspended and
5397 * all attached devices are in suspend mode), then it can wrongly assert
5398 * the Mstandby signal too early while there are still some residual OCP
5399 * transactions ongoing. If this condition occurs, the internal state
5400 * machine may go to an undefined state and the USB link may be stuck
5401 * upon the next resume.
5402 *
5403 * Workaround:
5404 * Don't use smart standby; use only force standby,
5405 * hence HWMOD_SWSUP_MSTANDBY
5406 */
5407
5408 /*
5409 * During system boot; If the hwmod framework resets the module
5410 * the module will have smart idle settings; which can lead to deadlock
5411 * (above Errata Id:i660); so, dont reset the module during boot;
5412 * Use HWMOD_INIT_NO_RESET.
5413 */
5414
5415 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
5416 HWMOD_INIT_NO_RESET,
5417};
5418
5419/*
5420 * 'usb_tll_hs' class
5421 * usb_tll_hs module is the adapter on the usb_host_hs ports
5422 */
5423static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {
5424 .rev_offs = 0x0000,
5425 .sysc_offs = 0x0010,
5426 .syss_offs = 0x0014,
5427 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
5428 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
5429 SYSC_HAS_AUTOIDLE),
5430 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
5431 .sysc_fields = &omap_hwmod_sysc_type1,
5432};
5433
5434static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
5435 .name = "usb_tll_hs",
5436 .sysc = &omap44xx_usb_tll_hs_sysc,
5437};
5438
5439static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
5440 { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
5441 { .irq = -1 }
5442};
5443
5444static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
5445 {
5446 .name = "tll",
5447 .pa_start = 0x4a062000,
5448 .pa_end = 0x4a063fff,
5449 .flags = ADDR_TYPE_RT
5450 },
5451 {}
5452};
5453
5454static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
5455 .master = &omap44xx_l4_cfg_hwmod,
5456 .slave = &omap44xx_usb_tll_hs_hwmod,
5457 .clk = "l4_div_ck",
5458 .addr = omap44xx_usb_tll_hs_addrs,
5459 .user = OCP_USER_MPU | OCP_USER_SDMA,
5460};
5461
5462static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
5463 &omap44xx_l4_cfg__usb_tll_hs,
5464};
5465
5466static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
5467 .name = "usb_tll_hs",
5468 .class = &omap44xx_usb_tll_hs_hwmod_class,
5469 .clkdm_name = "l3_init_clkdm",
5470 .main_clk = "usb_tll_hs_ick",
5471 .prcm = {
5472 .omap4 = {
5473 .clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET,
5474 .context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET,
5475 .modulemode = MODULEMODE_HWCTRL,
5476 },
5477 },
5478 .mpu_irqs = omap44xx_usb_tll_hs_irqs,
5479 .slaves = omap44xx_usb_tll_hs_slaves,
5480 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
5481};
5482
5279static __initdata struct omap_hwmod *omap44xx_hwmods[] = { 5483static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
5280 5484
5281 /* dmm class */ 5485 /* dmm class */
@@ -5415,13 +5619,16 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
5415 &omap44xx_uart3_hwmod, 5619 &omap44xx_uart3_hwmod,
5416 &omap44xx_uart4_hwmod, 5620 &omap44xx_uart4_hwmod,
5417 5621
5622 /* usb host class */
5623 &omap44xx_usb_host_hs_hwmod,
5624 &omap44xx_usb_tll_hs_hwmod,
5625
5418 /* usb_otg_hs class */ 5626 /* usb_otg_hs class */
5419 &omap44xx_usb_otg_hs_hwmod, 5627 &omap44xx_usb_otg_hs_hwmod,
5420 5628
5421 /* wd_timer class */ 5629 /* wd_timer class */
5422 &omap44xx_wd_timer2_hwmod, 5630 &omap44xx_wd_timer2_hwmod,
5423 &omap44xx_wd_timer3_hwmod, 5631 &omap44xx_wd_timer3_hwmod,
5424
5425 NULL, 5632 NULL,
5426}; 5633};
5427 5634
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3c8476..4c90477e6f82 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,38 @@ void am35x_set_mode(u8 musb_mode)
260 260
261 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); 261 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
262} 262}
263
264void ti81xx_musb_phy_power(u8 on)
265{
266 void __iomem *scm_base = NULL;
267 u32 usbphycfg;
268
269 scm_base = ioremap(TI81XX_SCM_BASE, SZ_2K);
270 if (!scm_base) {
271 pr_err("system control module ioremap failed\n");
272 return;
273 }
274
275 usbphycfg = __raw_readl(scm_base + USBCTRL0);
276
277 if (on) {
278 if (cpu_is_ti816x()) {
279 usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
280 usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC;
281 } else if (cpu_is_ti814x()) {
282 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
283 | USBPHY_DPINPUT | USBPHY_DMINPUT);
284 usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
285 | USBPHY_DPOPBUFCTL | USBPHY_DMOPBUFCTL);
286 }
287 } else {
288 if (cpu_is_ti816x())
289 usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE;
290 else if (cpu_is_ti814x())
291 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
292
293 }
294 __raw_writel(usbphycfg, scm_base + USBCTRL0);
295
296 iounmap(scm_base);
297}
diff --git a/arch/arm/mach-omap2/opp2xxx.h b/arch/arm/mach-omap2/opp2xxx.h
index 8affc66a92c2..8fae534eb157 100644
--- a/arch/arm/mach-omap2/opp2xxx.h
+++ b/arch/arm/mach-omap2/opp2xxx.h
@@ -51,7 +51,7 @@ struct prcm_config {
51 unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */ 51 unsigned long cm_clksel2_pll; /* dpllx1 or x2 out */
52 unsigned long cm_clksel_mdm; /* modem dividers 2430 only */ 52 unsigned long cm_clksel_mdm; /* modem dividers 2430 only */
53 unsigned long base_sdrc_rfr; /* base refresh timing for a set */ 53 unsigned long base_sdrc_rfr; /* base refresh timing for a set */
54 unsigned char flags; 54 unsigned short flags;
55}; 55};
56 56
57 57
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 4e166add2f35..b737b11e4499 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -21,6 +21,7 @@ extern void omap_sram_idle(void);
21extern int omap3_can_sleep(void); 21extern int omap3_can_sleep(void);
22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
23extern int omap3_idle_init(void); 23extern int omap3_idle_init(void);
24extern int omap4_idle_init(void);
24 25
25#if defined(CONFIG_PM_OPP) 26#if defined(CONFIG_PM_OPP)
26extern int omap3_opp_init(void); 27extern int omap3_opp_init(void);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index ef8595c80296..b8822f8b2891 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -30,7 +30,6 @@
30#include <linux/irq.h> 30#include <linux/irq.h>
31#include <linux/time.h> 31#include <linux/time.h>
32#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/console.h>
34 33
35#include <asm/mach/time.h> 34#include <asm/mach/time.h>
36#include <asm/mach/irq.h> 35#include <asm/mach/irq.h>
@@ -127,27 +126,11 @@ static void omap2_enter_full_retention(void)
127 if (omap_irq_pending()) 126 if (omap_irq_pending())
128 goto no_sleep; 127 goto no_sleep;
129 128
130 /* Block console output in case it is on one of the OMAP UARTs */
131 if (!is_suspending())
132 if (!console_trylock())
133 goto no_sleep;
134
135 omap_uart_prepare_idle(0);
136 omap_uart_prepare_idle(1);
137 omap_uart_prepare_idle(2);
138
139 /* Jump to SRAM suspend code */ 129 /* Jump to SRAM suspend code */
140 omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL), 130 omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL),
141 OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL), 131 OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL),
142 OMAP_SDRC_REGADDR(SDRC_POWER)); 132 OMAP_SDRC_REGADDR(SDRC_POWER));
143 133
144 omap_uart_resume_idle(2);
145 omap_uart_resume_idle(1);
146 omap_uart_resume_idle(0);
147
148 if (!is_suspending())
149 console_unlock();
150
151no_sleep: 134no_sleep:
152 omap2_gpio_resume_after_idle(); 135 omap2_gpio_resume_after_idle();
153 136
@@ -239,8 +222,6 @@ static int omap2_can_sleep(void)
239{ 222{
240 if (omap2_fclks_active()) 223 if (omap2_fclks_active())
241 return 0; 224 return 0;
242 if (!omap_uart_can_sleep())
243 return 0;
244 if (osc_ck->usecount > 1) 225 if (osc_ck->usecount > 1)
245 return 0; 226 return 0;
246 if (omap_dma_running()) 227 if (omap_dma_running())
@@ -291,7 +272,6 @@ static int omap2_pm_suspend(void)
291 mir1 = omap_readl(0x480fe0a4); 272 mir1 = omap_readl(0x480fe0a4);
292 omap_writel(1 << 5, 0x480fe0ac); 273 omap_writel(1 << 5, 0x480fe0ac);
293 274
294 omap_uart_prepare_suspend();
295 omap2_enter_full_retention(); 275 omap2_enter_full_retention();
296 276
297 omap_writel(mir1, 0x480fe0a4); 277 omap_writel(mir1, 0x480fe0a4);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fa637dfdda53..fc6987578920 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -28,7 +28,6 @@
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/console.h>
32#include <trace/events/power.h> 31#include <trace/events/power.h>
33 32
34#include <asm/suspend.h> 33#include <asm/suspend.h>
@@ -36,7 +35,6 @@
36#include <plat/sram.h> 35#include <plat/sram.h>
37#include "clockdomain.h" 36#include "clockdomain.h"
38#include "powerdomain.h" 37#include "powerdomain.h"
39#include <plat/serial.h>
40#include <plat/sdrc.h> 38#include <plat/sdrc.h>
41#include <plat/prcm.h> 39#include <plat/prcm.h>
42#include <plat/gpmc.h> 40#include <plat/gpmc.h>
@@ -54,15 +52,6 @@
54 52
55#ifdef CONFIG_SUSPEND 53#ifdef CONFIG_SUSPEND
56static suspend_state_t suspend_state = PM_SUSPEND_ON; 54static suspend_state_t suspend_state = PM_SUSPEND_ON;
57static inline bool is_suspending(void)
58{
59 return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled;
60}
61#else
62static inline bool is_suspending(void)
63{
64 return false;
65}
66#endif 55#endif
67 56
68/* pm34xx errata defined in pm.h */ 57/* pm34xx errata defined in pm.h */
@@ -195,7 +184,7 @@ static void omap3_save_secure_ram_context(void)
195 * that any peripheral wake-up events occurring while attempting to 184 * that any peripheral wake-up events occurring while attempting to
196 * clear the PM_WKST_x are detected and cleared. 185 * clear the PM_WKST_x are detected and cleared.
197 */ 186 */
198static int prcm_clear_mod_irqs(s16 module, u8 regs) 187static int prcm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits)
199{ 188{
200 u32 wkst, fclk, iclk, clken; 189 u32 wkst, fclk, iclk, clken;
201 u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; 190 u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
@@ -207,6 +196,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
207 196
208 wkst = omap2_prm_read_mod_reg(module, wkst_off); 197 wkst = omap2_prm_read_mod_reg(module, wkst_off);
209 wkst &= omap2_prm_read_mod_reg(module, grpsel_off); 198 wkst &= omap2_prm_read_mod_reg(module, grpsel_off);
199 wkst &= ~ignore_bits;
210 if (wkst) { 200 if (wkst) {
211 iclk = omap2_cm_read_mod_reg(module, iclk_off); 201 iclk = omap2_cm_read_mod_reg(module, iclk_off);
212 fclk = omap2_cm_read_mod_reg(module, fclk_off); 202 fclk = omap2_cm_read_mod_reg(module, fclk_off);
@@ -222,6 +212,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
222 omap2_cm_set_mod_reg_bits(clken, module, fclk_off); 212 omap2_cm_set_mod_reg_bits(clken, module, fclk_off);
223 omap2_prm_write_mod_reg(wkst, module, wkst_off); 213 omap2_prm_write_mod_reg(wkst, module, wkst_off);
224 wkst = omap2_prm_read_mod_reg(module, wkst_off); 214 wkst = omap2_prm_read_mod_reg(module, wkst_off);
215 wkst &= ~ignore_bits;
225 c++; 216 c++;
226 } 217 }
227 omap2_cm_write_mod_reg(iclk, module, iclk_off); 218 omap2_cm_write_mod_reg(iclk, module, iclk_off);
@@ -231,76 +222,35 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
231 return c; 222 return c;
232} 223}
233 224
234static int _prcm_int_handle_wakeup(void) 225static irqreturn_t _prcm_int_handle_io(int irq, void *unused)
235{ 226{
236 int c; 227 int c;
237 228
238 c = prcm_clear_mod_irqs(WKUP_MOD, 1); 229 c = prcm_clear_mod_irqs(WKUP_MOD, 1,
239 c += prcm_clear_mod_irqs(CORE_MOD, 1); 230 ~(OMAP3430_ST_IO_MASK | OMAP3430_ST_IO_CHAIN_MASK));
240 c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1);
241 if (omap_rev() > OMAP3430_REV_ES1_0) {
242 c += prcm_clear_mod_irqs(CORE_MOD, 3);
243 c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
244 }
245 231
246 return c; 232 return c ? IRQ_HANDLED : IRQ_NONE;
247} 233}
248 234
249/* 235static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused)
250 * PRCM Interrupt Handler
251 *
252 * The PRM_IRQSTATUS_MPU register indicates if there are any pending
253 * interrupts from the PRCM for the MPU. These bits must be cleared in
254 * order to clear the PRCM interrupt. The PRCM interrupt handler is
255 * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
256 * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
257 * register indicates that a wake-up event is pending for the MPU and
258 * this bit can only be cleared if the all the wake-up events latched
259 * in the various PM_WKST_x registers have been cleared. The interrupt
260 * handler is implemented using a do-while loop so that if a wake-up
261 * event occurred during the processing of the prcm interrupt handler
262 * (setting a bit in the corresponding PM_WKST_x register and thus
263 * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
264 * this would be handled.
265 */
266static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
267{ 236{
268 u32 irqenable_mpu, irqstatus_mpu; 237 int c;
269 int c = 0;
270
271 irqenable_mpu = omap2_prm_read_mod_reg(OCP_MOD,
272 OMAP3_PRM_IRQENABLE_MPU_OFFSET);
273 irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
274 OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
275 irqstatus_mpu &= irqenable_mpu;
276
277 do {
278 if (irqstatus_mpu & (OMAP3430_WKUP_ST_MASK |
279 OMAP3430_IO_ST_MASK)) {
280 c = _prcm_int_handle_wakeup();
281
282 /*
283 * Is the MPU PRCM interrupt handler racing with the
284 * IVA2 PRCM interrupt handler ?
285 */
286 WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup "
287 "but no wakeup sources are marked\n");
288 } else {
289 /* XXX we need to expand our PRCM interrupt handler */
290 WARN(1, "prcm: WARNING: PRCM interrupt received, but "
291 "no code to handle it (%08x)\n", irqstatus_mpu);
292 }
293
294 omap2_prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
295 OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
296
297 irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
298 OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
299 irqstatus_mpu &= irqenable_mpu;
300 238
301 } while (irqstatus_mpu); 239 /*
240 * Clear all except ST_IO and ST_IO_CHAIN for wkup module,
241 * these are handled in a separate handler to avoid acking
242 * IO events before parsing in mux code
243 */
244 c = prcm_clear_mod_irqs(WKUP_MOD, 1,
245 OMAP3430_ST_IO_MASK | OMAP3430_ST_IO_CHAIN_MASK);
246 c += prcm_clear_mod_irqs(CORE_MOD, 1, 0);
247 c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1, 0);
248 if (omap_rev() > OMAP3430_REV_ES1_0) {
249 c += prcm_clear_mod_irqs(CORE_MOD, 3, 0);
250 c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, 0);
251 }
302 252
303 return IRQ_HANDLED; 253 return c ? IRQ_HANDLED : IRQ_NONE;
304} 254}
305 255
306static void omap34xx_save_context(u32 *save) 256static void omap34xx_save_context(u32 *save)
@@ -376,20 +326,11 @@ void omap_sram_idle(void)
376 omap3_enable_io_chain(); 326 omap3_enable_io_chain();
377 } 327 }
378 328
379 /* Block console output in case it is on one of the OMAP UARTs */
380 if (!is_suspending())
381 if (per_next_state < PWRDM_POWER_ON ||
382 core_next_state < PWRDM_POWER_ON)
383 if (!console_trylock())
384 goto console_still_active;
385
386 pwrdm_pre_transition(); 329 pwrdm_pre_transition();
387 330
388 /* PER */ 331 /* PER */
389 if (per_next_state < PWRDM_POWER_ON) { 332 if (per_next_state < PWRDM_POWER_ON) {
390 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; 333 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
391 omap_uart_prepare_idle(2);
392 omap_uart_prepare_idle(3);
393 omap2_gpio_prepare_for_idle(per_going_off); 334 omap2_gpio_prepare_for_idle(per_going_off);
394 if (per_next_state == PWRDM_POWER_OFF) 335 if (per_next_state == PWRDM_POWER_OFF)
395 omap3_per_save_context(); 336 omap3_per_save_context();
@@ -397,8 +338,6 @@ void omap_sram_idle(void)
397 338
398 /* CORE */ 339 /* CORE */
399 if (core_next_state < PWRDM_POWER_ON) { 340 if (core_next_state < PWRDM_POWER_ON) {
400 omap_uart_prepare_idle(0);
401 omap_uart_prepare_idle(1);
402 if (core_next_state == PWRDM_POWER_OFF) { 341 if (core_next_state == PWRDM_POWER_OFF) {
403 omap3_core_save_context(); 342 omap3_core_save_context();
404 omap3_cm_save_context(); 343 omap3_cm_save_context();
@@ -447,8 +386,6 @@ void omap_sram_idle(void)
447 omap3_sram_restore_context(); 386 omap3_sram_restore_context();
448 omap2_sms_restore_context(); 387 omap2_sms_restore_context();
449 } 388 }
450 omap_uart_resume_idle(0);
451 omap_uart_resume_idle(1);
452 if (core_next_state == PWRDM_POWER_OFF) 389 if (core_next_state == PWRDM_POWER_OFF)
453 omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK, 390 omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
454 OMAP3430_GR_MOD, 391 OMAP3430_GR_MOD,
@@ -464,14 +401,8 @@ void omap_sram_idle(void)
464 omap2_gpio_resume_after_idle(); 401 omap2_gpio_resume_after_idle();
465 if (per_prev_state == PWRDM_POWER_OFF) 402 if (per_prev_state == PWRDM_POWER_OFF)
466 omap3_per_restore_context(); 403 omap3_per_restore_context();
467 omap_uart_resume_idle(2);
468 omap_uart_resume_idle(3);
469 } 404 }
470 405
471 if (!is_suspending())
472 console_unlock();
473
474console_still_active:
475 /* Disable IO-PAD and IO-CHAIN wakeup */ 406 /* Disable IO-PAD and IO-CHAIN wakeup */
476 if (omap3_has_io_wakeup() && 407 if (omap3_has_io_wakeup() &&
477 (per_next_state < PWRDM_POWER_ON || 408 (per_next_state < PWRDM_POWER_ON ||
@@ -485,21 +416,11 @@ console_still_active:
485 clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); 416 clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
486} 417}
487 418
488int omap3_can_sleep(void)
489{
490 if (!omap_uart_can_sleep())
491 return 0;
492 return 1;
493}
494
495static void omap3_pm_idle(void) 419static void omap3_pm_idle(void)
496{ 420{
497 local_irq_disable(); 421 local_irq_disable();
498 local_fiq_disable(); 422 local_fiq_disable();
499 423
500 if (!omap3_can_sleep())
501 goto out;
502
503 if (omap_irq_pending() || need_resched()) 424 if (omap_irq_pending() || need_resched())
504 goto out; 425 goto out;
505 426
@@ -533,7 +454,6 @@ static int omap3_pm_suspend(void)
533 goto restore; 454 goto restore;
534 } 455 }
535 456
536 omap_uart_prepare_suspend();
537 omap3_intc_suspend(); 457 omap3_intc_suspend();
538 458
539 omap_sram_idle(); 459 omap_sram_idle();
@@ -580,22 +500,27 @@ static int omap3_pm_begin(suspend_state_t state)
580{ 500{
581 disable_hlt(); 501 disable_hlt();
582 suspend_state = state; 502 suspend_state = state;
583 omap_uart_enable_irqs(0); 503 omap_prcm_irq_prepare();
584 return 0; 504 return 0;
585} 505}
586 506
587static void omap3_pm_end(void) 507static void omap3_pm_end(void)
588{ 508{
589 suspend_state = PM_SUSPEND_ON; 509 suspend_state = PM_SUSPEND_ON;
590 omap_uart_enable_irqs(1);
591 enable_hlt(); 510 enable_hlt();
592 return; 511 return;
593} 512}
594 513
514static void omap3_pm_finish(void)
515{
516 omap_prcm_irq_complete();
517}
518
595static const struct platform_suspend_ops omap_pm_ops = { 519static const struct platform_suspend_ops omap_pm_ops = {
596 .begin = omap3_pm_begin, 520 .begin = omap3_pm_begin,
597 .end = omap3_pm_end, 521 .end = omap3_pm_end,
598 .enter = omap3_pm_enter, 522 .enter = omap3_pm_enter,
523 .finish = omap3_pm_finish,
599 .valid = suspend_valid_only_mem, 524 .valid = suspend_valid_only_mem,
600}; 525};
601#endif /* CONFIG_SUSPEND */ 526#endif /* CONFIG_SUSPEND */
@@ -701,10 +626,6 @@ static void __init prcm_setup_regs(void)
701 OMAP3430_GRPSEL_GPT1_MASK | 626 OMAP3430_GRPSEL_GPT1_MASK |
702 OMAP3430_GRPSEL_GPT12_MASK, 627 OMAP3430_GRPSEL_GPT12_MASK,
703 WKUP_MOD, OMAP3430_PM_MPUGRPSEL); 628 WKUP_MOD, OMAP3430_PM_MPUGRPSEL);
704 /* For some reason IO doesn't generate wakeup event even if
705 * it is selected to mpu wakeup goup */
706 omap2_prm_write_mod_reg(OMAP3430_IO_EN_MASK | OMAP3430_WKUP_EN_MASK,
707 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
708 629
709 /* Enable PM_WKEN to support DSS LPR */ 630 /* Enable PM_WKEN to support DSS LPR */
710 omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK, 631 omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK,
@@ -881,12 +802,21 @@ static int __init omap3_pm_init(void)
881 * supervised mode for powerdomains */ 802 * supervised mode for powerdomains */
882 prcm_setup_regs(); 803 prcm_setup_regs();
883 804
884 ret = request_irq(INT_34XX_PRCM_MPU_IRQ, 805 ret = request_irq(omap_prcm_event_to_irq("wkup"),
885 (irq_handler_t)prcm_interrupt_handler, 806 _prcm_int_handle_wakeup, IRQF_NO_SUSPEND, "pm_wkup", NULL);
886 IRQF_DISABLED, "prcm", NULL); 807
808 if (ret) {
809 pr_err("pm: Failed to request pm_wkup irq\n");
810 goto err1;
811 }
812
813 /* IO interrupt is shared with mux code */
814 ret = request_irq(omap_prcm_event_to_irq("io"),
815 _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io",
816 omap3_pm_init);
817
887 if (ret) { 818 if (ret) {
888 printk(KERN_ERR "request_irq failed to register for 0x%x\n", 819 pr_err("pm: Failed to request pm_io irq\n");
889 INT_34XX_PRCM_MPU_IRQ);
890 goto err1; 820 goto err1;
891 } 821 }
892 822
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 8edb015f5618..c264ef7219c1 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -1,8 +1,9 @@
1/* 1/*
2 * OMAP4 Power Management Routines 2 * OMAP4 Power Management Routines
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. 4 * Copyright (C) 2010-2011 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com> 5 * Rajendra Nayak <rnayak@ti.com>
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
@@ -17,13 +18,16 @@
17#include <linux/slab.h> 18#include <linux/slab.h>
18 19
19#include "common.h" 20#include "common.h"
21#include "clockdomain.h"
20#include "powerdomain.h" 22#include "powerdomain.h"
23#include "pm.h"
21 24
22struct power_state { 25struct power_state {
23 struct powerdomain *pwrdm; 26 struct powerdomain *pwrdm;
24 u32 next_state; 27 u32 next_state;
25#ifdef CONFIG_SUSPEND 28#ifdef CONFIG_SUSPEND
26 u32 saved_state; 29 u32 saved_state;
30 u32 saved_logic_state;
27#endif 31#endif
28 struct list_head node; 32 struct list_head node;
29}; 33};
@@ -33,7 +37,50 @@ static LIST_HEAD(pwrst_list);
33#ifdef CONFIG_SUSPEND 37#ifdef CONFIG_SUSPEND
34static int omap4_pm_suspend(void) 38static int omap4_pm_suspend(void)
35{ 39{
36 do_wfi(); 40 struct power_state *pwrst;
41 int state, ret = 0;
42 u32 cpu_id = smp_processor_id();
43
44 /* Save current powerdomain state */
45 list_for_each_entry(pwrst, &pwrst_list, node) {
46 pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
47 pwrst->saved_logic_state = pwrdm_read_logic_retst(pwrst->pwrdm);
48 }
49
50 /* Set targeted power domain states by suspend */
51 list_for_each_entry(pwrst, &pwrst_list, node) {
52 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
53 pwrdm_set_logic_retst(pwrst->pwrdm, PWRDM_POWER_OFF);
54 }
55
56 /*
57 * For MPUSS to hit power domain retention(CSWR or OSWR),
58 * CPU0 and CPU1 power domains need to be in OFF or DORMANT state,
59 * since CPU power domain CSWR is not supported by hardware
60 * Only master CPU follows suspend path. All other CPUs follow
61 * CPU hotplug path in system wide suspend. On OMAP4, CPU power
62 * domain CSWR is not supported by hardware.
63 * More details can be found in OMAP4430 TRM section 4.3.4.2.
64 */
65 omap4_enter_lowpower(cpu_id, PWRDM_POWER_OFF);
66
67 /* Restore next powerdomain state */
68 list_for_each_entry(pwrst, &pwrst_list, node) {
69 state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
70 if (state > pwrst->next_state) {
71 pr_info("Powerdomain (%s) didn't enter "
72 "target state %d\n",
73 pwrst->pwrdm->name, pwrst->next_state);
74 ret = -1;
75 }
76 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
77 pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->saved_logic_state);
78 }
79 if (ret)
80 pr_crit("Could not enter target state in pm_suspend\n");
81 else
82 pr_info("Successfully put all powerdomains to target state\n");
83
37 return 0; 84 return 0;
38} 85}
39 86
@@ -73,6 +120,22 @@ static const struct platform_suspend_ops omap_pm_ops = {
73}; 120};
74#endif /* CONFIG_SUSPEND */ 121#endif /* CONFIG_SUSPEND */
75 122
123/*
124 * Enable hardware supervised mode for all clockdomains if it's
125 * supported. Initiate sleep transition for other clockdomains, if
126 * they are not used
127 */
128static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
129{
130 if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
131 clkdm_allow_idle(clkdm);
132 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
133 atomic_read(&clkdm->usecount) == 0)
134 clkdm_sleep(clkdm);
135 return 0;
136}
137
138
76static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) 139static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
77{ 140{
78 struct power_state *pwrst; 141 struct power_state *pwrst;
@@ -80,14 +143,48 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
80 if (!pwrdm->pwrsts) 143 if (!pwrdm->pwrsts)
81 return 0; 144 return 0;
82 145
146 /*
147 * Skip CPU0 and CPU1 power domains. CPU1 is programmed
148 * through hotplug path and CPU0 explicitly programmed
149 * further down in the code path
150 */
151 if (!strncmp(pwrdm->name, "cpu", 3))
152 return 0;
153
154 /*
155 * FIXME: Remove this check when core retention is supported
156 * Only MPUSS power domain is added in the list.
157 */
158 if (strcmp(pwrdm->name, "mpu_pwrdm"))
159 return 0;
160
83 pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); 161 pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
84 if (!pwrst) 162 if (!pwrst)
85 return -ENOMEM; 163 return -ENOMEM;
164
86 pwrst->pwrdm = pwrdm; 165 pwrst->pwrdm = pwrdm;
87 pwrst->next_state = PWRDM_POWER_ON; 166 pwrst->next_state = PWRDM_POWER_RET;
88 list_add(&pwrst->node, &pwrst_list); 167 list_add(&pwrst->node, &pwrst_list);
89 168
90 return pwrdm_set_next_pwrst(pwrst->pwrdm, pwrst->next_state); 169 return omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
170}
171
172/**
173 * omap_default_idle - OMAP4 default ilde routine.'
174 *
175 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
176 * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
177 * by secondary CPU with CONFIG_CPUIDLE.
178 */
179static void omap_default_idle(void)
180{
181 local_irq_disable();
182 local_fiq_disable();
183
184 omap_do_wfi();
185
186 local_fiq_enable();
187 local_irq_enable();
91} 188}
92 189
93/** 190/**
@@ -99,10 +196,17 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
99static int __init omap4_pm_init(void) 196static int __init omap4_pm_init(void)
100{ 197{
101 int ret; 198 int ret;
199 struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
200 struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;
102 201
103 if (!cpu_is_omap44xx()) 202 if (!cpu_is_omap44xx())
104 return -ENODEV; 203 return -ENODEV;
105 204
205 if (omap_rev() == OMAP4430_REV_ES1_0) {
206 WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
207 return -ENODEV;
208 }
209
106 pr_err("Power Management for TI OMAP4.\n"); 210 pr_err("Power Management for TI OMAP4.\n");
107 211
108 ret = pwrdm_for_each(pwrdms_setup, NULL); 212 ret = pwrdm_for_each(pwrdms_setup, NULL);
@@ -111,10 +215,51 @@ static int __init omap4_pm_init(void)
111 goto err2; 215 goto err2;
112 } 216 }
113 217
218 /*
219 * The dynamic dependency between MPUSS -> MEMIF and
220 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
221 * expected. The hardware recommendation is to enable static
222 * dependencies for these to avoid system lock ups or random crashes.
223 */
224 mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
225 emif_clkdm = clkdm_lookup("l3_emif_clkdm");
226 l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
227 l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
228 l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
229 ducati_clkdm = clkdm_lookup("ducati_clkdm");
230 if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||
231 (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
232 goto err2;
233
234 ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm);
235 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
236 ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
237 ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
238 ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
239 ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
240 if (ret) {
241 pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 "
242 "wakeup dependency\n");
243 goto err2;
244 }
245
246 ret = omap4_mpuss_init();
247 if (ret) {
248 pr_err("Failed to initialise OMAP4 MPUSS\n");
249 goto err2;
250 }
251
252 (void) clkdm_for_each(clkdms_setup, NULL);
253
114#ifdef CONFIG_SUSPEND 254#ifdef CONFIG_SUSPEND
115 suspend_set_ops(&omap_pm_ops); 255 suspend_set_ops(&omap_pm_ops);
116#endif /* CONFIG_SUSPEND */ 256#endif /* CONFIG_SUSPEND */
117 257
258 /* Overwrite the default arch_idle() */
259 pm_idle = omap_default_idle;
260
261 omap4_idle_init();
262
118err2: 263err2:
119 return ret; 264 return ret;
120} 265}
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 0363dcb0ef93..5aa5435e3ff1 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -4,7 +4,7 @@
4/* 4/*
5 * OMAP2/3 PRCM base and module definitions 5 * OMAP2/3 PRCM base and module definitions
6 * 6 *
7 * Copyright (C) 2007-2009 Texas Instruments, Inc. 7 * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
8 * Copyright (C) 2007-2009 Nokia Corporation 8 * Copyright (C) 2007-2009 Nokia Corporation
9 * 9 *
10 * Written by Paul Walmsley 10 * Written by Paul Walmsley
@@ -201,6 +201,8 @@
201#define OMAP3430_EN_MMC2_SHIFT 25 201#define OMAP3430_EN_MMC2_SHIFT 25
202#define OMAP3430_EN_MMC1_MASK (1 << 24) 202#define OMAP3430_EN_MMC1_MASK (1 << 24)
203#define OMAP3430_EN_MMC1_SHIFT 24 203#define OMAP3430_EN_MMC1_SHIFT 24
204#define OMAP3430_EN_UART4_MASK (1 << 23)
205#define OMAP3430_EN_UART4_SHIFT 23
204#define OMAP3430_EN_MCSPI4_MASK (1 << 21) 206#define OMAP3430_EN_MCSPI4_MASK (1 << 21)
205#define OMAP3430_EN_MCSPI4_SHIFT 21 207#define OMAP3430_EN_MCSPI4_SHIFT 21
206#define OMAP3430_EN_MCSPI3_MASK (1 << 20) 208#define OMAP3430_EN_MCSPI3_MASK (1 << 20)
@@ -408,6 +410,79 @@
408extern void __iomem *prm_base; 410extern void __iomem *prm_base;
409extern void __iomem *cm_base; 411extern void __iomem *cm_base;
410extern void __iomem *cm2_base; 412extern void __iomem *cm2_base;
413
414/**
415 * struct omap_prcm_irq - describes a PRCM interrupt bit
416 * @name: a short name describing the interrupt type, e.g. "wkup" or "io"
417 * @offset: the bit shift of the interrupt inside the IRQ{ENABLE,STATUS} regs
418 * @priority: should this interrupt be handled before @priority=false IRQs?
419 *
420 * Describes interrupt bits inside the PRM_IRQ{ENABLE,STATUS}_MPU* registers.
421 * On systems with multiple PRM MPU IRQ registers, the bitfields read from
422 * the registers are concatenated, so @offset could be > 31 on these systems -
423 * see omap_prm_irq_handler() for more details. I/O ring interrupts should
424 * have @priority set to true.
425 */
426struct omap_prcm_irq {
427 const char *name;
428 unsigned int offset;
429 bool priority;
430};
431
432/**
433 * struct omap_prcm_irq_setup - PRCM interrupt controller details
434 * @ack: PRM register offset for the first PRM_IRQSTATUS_MPU register
435 * @mask: PRM register offset for the first PRM_IRQENABLE_MPU register
436 * @nr_regs: number of PRM_IRQ{STATUS,ENABLE}_MPU* registers
437 * @nr_irqs: number of entries in the @irqs array
438 * @irqs: ptr to an array of PRCM interrupt bits (see @nr_irqs)
439 * @irq: MPU IRQ asserted when a PRCM interrupt arrives
440 * @read_pending_irqs: fn ptr to determine if any PRCM IRQs are pending
441 * @ocp_barrier: fn ptr to force buffered PRM writes to complete
442 * @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
443 * @restore_irqen: fn ptr to save and clear IRQENABLE regs
444 * @saved_mask: IRQENABLE regs are saved here during suspend
445 * @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
446 * @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init
447 * @suspended: set to true after Linux suspend code has called our ->prepare()
448 * @suspend_save_flag: set to true after IRQ masks have been saved and disabled
449 *
450 * @saved_mask, @priority_mask, @base_irq, @suspended, and
451 * @suspend_save_flag are populated dynamically, and are not to be
452 * specified in static initializers.
453 */
454struct omap_prcm_irq_setup {
455 u16 ack;
456 u16 mask;
457 u8 nr_regs;
458 u8 nr_irqs;
459 const struct omap_prcm_irq *irqs;
460 int irq;
461 void (*read_pending_irqs)(unsigned long *events);
462 void (*ocp_barrier)(void);
463 void (*save_and_clear_irqen)(u32 *saved_mask);
464 void (*restore_irqen)(u32 *saved_mask);
465 u32 *saved_mask;
466 u32 *priority_mask;
467 int base_irq;
468 bool suspended;
469 bool suspend_save_flag;
470};
471
472/* OMAP_PRCM_IRQ: convenience macro for creating struct omap_prcm_irq records */
473#define OMAP_PRCM_IRQ(_name, _offset, _priority) { \
474 .name = _name, \
475 .offset = _offset, \
476 .priority = _priority \
477 }
478
479extern void omap_prcm_irq_cleanup(void);
480extern int omap_prcm_register_chain_handler(
481 struct omap_prcm_irq_setup *irq_setup);
482extern int omap_prcm_event_to_irq(const char *event);
483extern void omap_prcm_irq_prepare(void);
484extern void omap_prcm_irq_complete(void);
485
411# endif 486# endif
412 487
413#endif 488#endif
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9a08ba397327..c1c4d86a79a8 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP2/3 PRM module functions 2 * OMAP2/3 PRM module functions
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. 4 * Copyright (C) 2010-2011 Texas Instruments, Inc.
5 * Copyright (C) 2010 Nokia Corporation 5 * Copyright (C) 2010 Nokia Corporation
6 * Benoît Cousson 6 * Benoît Cousson
7 * Paul Walmsley 7 * Paul Walmsley
@@ -27,6 +27,24 @@
27#include "prm-regbits-24xx.h" 27#include "prm-regbits-24xx.h"
28#include "prm-regbits-34xx.h" 28#include "prm-regbits-34xx.h"
29 29
30static const struct omap_prcm_irq omap3_prcm_irqs[] = {
31 OMAP_PRCM_IRQ("wkup", 0, 0),
32 OMAP_PRCM_IRQ("io", 9, 1),
33};
34
35static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
36 .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
37 .mask = OMAP3_PRM_IRQENABLE_MPU_OFFSET,
38 .nr_regs = 1,
39 .irqs = omap3_prcm_irqs,
40 .nr_irqs = ARRAY_SIZE(omap3_prcm_irqs),
41 .irq = INT_34XX_PRCM_MPU_IRQ,
42 .read_pending_irqs = &omap3xxx_prm_read_pending_irqs,
43 .ocp_barrier = &omap3xxx_prm_ocp_barrier,
44 .save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen,
45 .restore_irqen = &omap3xxx_prm_restore_irqen,
46};
47
30u32 omap2_prm_read_mod_reg(s16 module, u16 idx) 48u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
31{ 49{
32 return __raw_readl(prm_base + module + idx); 50 return __raw_readl(prm_base + module + idx);
@@ -212,3 +230,80 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
212{ 230{
213 return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); 231 return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
214} 232}
233
234/**
235 * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events
236 * @events: ptr to a u32, preallocated by caller
237 *
238 * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM
239 * MPU IRQs, and store the result into the u32 pointed to by @events.
240 * No return value.
241 */
242void omap3xxx_prm_read_pending_irqs(unsigned long *events)
243{
244 u32 mask, st;
245
246 /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */
247 mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
248 st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
249
250 events[0] = mask & st;
251}
252
253/**
254 * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete
255 *
256 * Force any buffered writes to the PRM IP block to complete. Needed
257 * by the PRM IRQ handler, which reads and writes directly to the IP
258 * block, to avoid race conditions after acknowledging or clearing IRQ
259 * bits. No return value.
260 */
261void omap3xxx_prm_ocp_barrier(void)
262{
263 omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
264}
265
266/**
267 * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg
268 * @saved_mask: ptr to a u32 array to save IRQENABLE bits
269 *
270 * Save the PRM_IRQENABLE_MPU register to @saved_mask. @saved_mask
271 * must be allocated by the caller. Intended to be used in the PRM
272 * interrupt handler suspend callback. The OCP barrier is needed to
273 * ensure the write to disable PRM interrupts reaches the PRM before
274 * returning; otherwise, spurious interrupts might occur. No return
275 * value.
276 */
277void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
278{
279 saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
280 OMAP3_PRM_IRQENABLE_MPU_OFFSET);
281 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
282
283 /* OCP barrier */
284 omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
285}
286
287/**
288 * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args
289 * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously
290 *
291 * Restore the PRM_IRQENABLE_MPU register from @saved_mask. Intended
292 * to be used in the PRM interrupt handler resume callback to restore
293 * values saved by omap3xxx_prm_save_and_clear_irqen(). No OCP
294 * barrier should be needed here; any pending PRM interrupts will fire
295 * once the writes reach the PRM. No return value.
296 */
297void omap3xxx_prm_restore_irqen(u32 *saved_mask)
298{
299 omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
300 OMAP3_PRM_IRQENABLE_MPU_OFFSET);
301}
302
303static int __init omap3xxx_prcm_init(void)
304{
305 if (cpu_is_omap34xx())
306 return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
307 return 0;
308}
309subsys_initcall(omap3xxx_prcm_init);
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index cef533df0861..70ac2a19dc5f 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP2/3 Power/Reset Management (PRM) register definitions 2 * OMAP2/3 Power/Reset Management (PRM) register definitions
3 * 3 *
4 * Copyright (C) 2007-2009 Texas Instruments, Inc. 4 * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation 5 * Copyright (C) 2008-2010 Nokia Corporation
6 * Paul Walmsley 6 * Paul Walmsley
7 * 7 *
@@ -314,6 +314,13 @@ void omap3_prm_vp_clear_txdone(u8 vp_id);
314extern u32 omap3_prm_vcvp_read(u8 offset); 314extern u32 omap3_prm_vcvp_read(u8 offset);
315extern void omap3_prm_vcvp_write(u32 val, u8 offset); 315extern void omap3_prm_vcvp_write(u32 val, u8 offset);
316extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); 316extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
317
318/* PRM interrupt-related functions */
319extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
320extern void omap3xxx_prm_ocp_barrier(void);
321extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
322extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
323
317#endif /* CONFIG_ARCH_OMAP4 */ 324#endif /* CONFIG_ARCH_OMAP4 */
318 325
319#endif 326#endif
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index dd885eecf22a..33dd655e6aab 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -27,6 +27,24 @@
27#include "prcm44xx.h" 27#include "prcm44xx.h"
28#include "prminst44xx.h" 28#include "prminst44xx.h"
29 29
30static const struct omap_prcm_irq omap4_prcm_irqs[] = {
31 OMAP_PRCM_IRQ("wkup", 0, 0),
32 OMAP_PRCM_IRQ("io", 9, 1),
33};
34
35static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
36 .ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
37 .mask = OMAP4_PRM_IRQENABLE_MPU_OFFSET,
38 .nr_regs = 2,
39 .irqs = omap4_prcm_irqs,
40 .nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
41 .irq = OMAP44XX_IRQ_PRCM,
42 .read_pending_irqs = &omap44xx_prm_read_pending_irqs,
43 .ocp_barrier = &omap44xx_prm_ocp_barrier,
44 .save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
45 .restore_irqen = &omap44xx_prm_restore_irqen,
46};
47
30/* PRM low-level functions */ 48/* PRM low-level functions */
31 49
32/* Read a register in a CM/PRM instance in the PRM module */ 50/* Read a register in a CM/PRM instance in the PRM module */
@@ -121,3 +139,101 @@ u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
121 OMAP4430_PRM_DEVICE_INST, 139 OMAP4430_PRM_DEVICE_INST,
122 offset); 140 offset);
123} 141}
142
143static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
144{
145 u32 mask, st;
146
147 /* XXX read mask from RAM? */
148 mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs);
149 st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs);
150
151 return mask & st;
152}
153
154/**
155 * omap44xx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events
156 * @events: ptr to two consecutive u32s, preallocated by caller
157 *
158 * Read PRM_IRQSTATUS_MPU* bits, AND'ed with the currently-enabled PRM
159 * MPU IRQs, and store the result into the two u32s pointed to by @events.
160 * No return value.
161 */
162void omap44xx_prm_read_pending_irqs(unsigned long *events)
163{
164 events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
165 OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
166
167 events[1] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_2_OFFSET,
168 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
169}
170
171/**
172 * omap44xx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete
173 *
174 * Force any buffered writes to the PRM IP block to complete. Needed
175 * by the PRM IRQ handler, which reads and writes directly to the IP
176 * block, to avoid race conditions after acknowledging or clearing IRQ
177 * bits. No return value.
178 */
179void omap44xx_prm_ocp_barrier(void)
180{
181 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
182 OMAP4_REVISION_PRM_OFFSET);
183}
184
185/**
186 * omap44xx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU* regs
187 * @saved_mask: ptr to a u32 array to save IRQENABLE bits
188 *
189 * Save the PRM_IRQENABLE_MPU and PRM_IRQENABLE_MPU_2 registers to
190 * @saved_mask. @saved_mask must be allocated by the caller.
191 * Intended to be used in the PRM interrupt handler suspend callback.
192 * The OCP barrier is needed to ensure the write to disable PRM
193 * interrupts reaches the PRM before returning; otherwise, spurious
194 * interrupts might occur. No return value.
195 */
196void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
197{
198 saved_mask[0] =
199 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
200 OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
201 saved_mask[1] =
202 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
203 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
204
205 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST,
206 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
207 omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST,
208 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
209
210 /* OCP barrier */
211 omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
212 OMAP4_REVISION_PRM_OFFSET);
213}
214
215/**
216 * omap44xx_prm_restore_irqen - set PRM_IRQENABLE_MPU* registers from args
217 * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously
218 *
219 * Restore the PRM_IRQENABLE_MPU and PRM_IRQENABLE_MPU_2 registers from
220 * @saved_mask. Intended to be used in the PRM interrupt handler resume
221 * callback to restore values saved by omap44xx_prm_save_and_clear_irqen().
222 * No OCP barrier should be needed here; any pending PRM interrupts will fire
223 * once the writes reach the PRM. No return value.
224 */
225void omap44xx_prm_restore_irqen(u32 *saved_mask)
226{
227 omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST,
228 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
229 omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST,
230 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
231}
232
233static int __init omap4xxx_prcm_init(void)
234{
235 if (cpu_is_omap44xx())
236 return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
237 return 0;
238}
239subsys_initcall(omap4xxx_prcm_init);
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 3d66ccd849d2..7978092946db 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * OMAP44xx PRM instance offset macros 2 * OMAP44xx PRM instance offset macros
3 * 3 *
4 * Copyright (C) 2009-2010 Texas Instruments, Inc. 4 * Copyright (C) 2009-2011 Texas Instruments, Inc.
5 * Copyright (C) 2009-2010 Nokia Corporation 5 * Copyright (C) 2009-2010 Nokia Corporation
6 * 6 *
7 * Paul Walmsley (paul@pwsan.com) 7 * Paul Walmsley (paul@pwsan.com)
@@ -763,6 +763,12 @@ extern u32 omap4_prm_vcvp_read(u8 offset);
763extern void omap4_prm_vcvp_write(u32 val, u8 offset); 763extern void omap4_prm_vcvp_write(u32 val, u8 offset);
764extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); 764extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
765 765
766/* PRM interrupt-related functions */
767extern void omap44xx_prm_read_pending_irqs(unsigned long *events);
768extern void omap44xx_prm_ocp_barrier(void);
769extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
770extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
771
766# endif 772# endif
767 773
768#endif 774#endif
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
new file mode 100644
index 000000000000..860118ab43e2
--- /dev/null
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -0,0 +1,320 @@
1/*
2 * OMAP2+ common Power & Reset Management (PRM) IP block functions
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Tero Kristo <t-kristo@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 *
12 * For historical purposes, the API used to configure the PRM
13 * interrupt handler refers to it as the "PRCM interrupt." The
14 * underlying registers are located in the PRM on OMAP3/4.
15 *
16 * XXX This code should eventually be moved to a PRM driver.
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/io.h>
23#include <linux/irq.h>
24#include <linux/interrupt.h>
25#include <linux/slab.h>
26
27#include <mach/system.h>
28#include <plat/common.h>
29#include <plat/prcm.h>
30#include <plat/irqs.h>
31
32#include "prm2xxx_3xxx.h"
33#include "prm44xx.h"
34
35/*
36 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
37 * XXX this is technically not needed, since
38 * omap_prcm_register_chain_handler() could allocate this based on the
39 * actual amount of memory needed for the SoC
40 */
41#define OMAP_PRCM_MAX_NR_PENDING_REG 2
42
43/*
44 * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
45 * by the PRCM interrupt handler code. There will be one 'chip' per
46 * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair. (So OMAP3 will have
47 * one "chip" and OMAP4 will have two.)
48 */
49static struct irq_chip_generic **prcm_irq_chips;
50
51/*
52 * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
53 * is currently running on. Defined and passed by initialization code
54 * that calls omap_prcm_register_chain_handler().
55 */
56static struct omap_prcm_irq_setup *prcm_irq_setup;
57
58/* Private functions */
59
60/*
61 * Move priority events from events to priority_events array
62 */
63static void omap_prcm_events_filter_priority(unsigned long *events,
64 unsigned long *priority_events)
65{
66 int i;
67
68 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
69 priority_events[i] =
70 events[i] & prcm_irq_setup->priority_mask[i];
71 events[i] ^= priority_events[i];
72 }
73}
74
75/*
76 * PRCM Interrupt Handler
77 *
78 * This is a common handler for the OMAP PRCM interrupts. Pending
79 * interrupts are detected by a call to prcm_pending_events and
80 * dispatched accordingly. Clearing of the wakeup events should be
81 * done by the SoC specific individual handlers.
82 */
83static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc)
84{
85 unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
86 unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
87 struct irq_chip *chip = irq_desc_get_chip(desc);
88 unsigned int virtirq;
89 int nr_irqs = prcm_irq_setup->nr_regs * 32;
90
91 /*
92 * If we are suspended, mask all interrupts from PRCM level,
93 * this does not ack them, and they will be pending until we
94 * re-enable the interrupts, at which point the
95 * omap_prcm_irq_handler will be executed again. The
96 * _save_and_clear_irqen() function must ensure that the PRM
97 * write to disable all IRQs has reached the PRM before
98 * returning, or spurious PRCM interrupts may occur during
99 * suspend.
100 */
101 if (prcm_irq_setup->suspended) {
102 prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
103 prcm_irq_setup->suspend_save_flag = true;
104 }
105
106 /*
107 * Loop until all pending irqs are handled, since
108 * generic_handle_irq() can cause new irqs to come
109 */
110 while (!prcm_irq_setup->suspended) {
111 prcm_irq_setup->read_pending_irqs(pending);
112
113 /* No bit set, then all IRQs are handled */
114 if (find_first_bit(pending, nr_irqs) >= nr_irqs)
115 break;
116
117 omap_prcm_events_filter_priority(pending, priority_pending);
118
119 /*
120 * Loop on all currently pending irqs so that new irqs
121 * cannot starve previously pending irqs
122 */
123
124 /* Serve priority events first */
125 for_each_set_bit(virtirq, priority_pending, nr_irqs)
126 generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
127
128 /* Serve normal events next */
129 for_each_set_bit(virtirq, pending, nr_irqs)
130 generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
131 }
132 if (chip->irq_ack)
133 chip->irq_ack(&desc->irq_data);
134 if (chip->irq_eoi)
135 chip->irq_eoi(&desc->irq_data);
136 chip->irq_unmask(&desc->irq_data);
137
138 prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
139}
140
141/* Public functions */
142
143/**
144 * omap_prcm_event_to_irq - given a PRCM event name, returns the
145 * corresponding IRQ on which the handler should be registered
146 * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
147 *
148 * Returns the Linux internal IRQ ID corresponding to @name upon success,
149 * or -ENOENT upon failure.
150 */
151int omap_prcm_event_to_irq(const char *name)
152{
153 int i;
154
155 if (!prcm_irq_setup || !name)
156 return -ENOENT;
157
158 for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
159 if (!strcmp(prcm_irq_setup->irqs[i].name, name))
160 return prcm_irq_setup->base_irq +
161 prcm_irq_setup->irqs[i].offset;
162
163 return -ENOENT;
164}
165
166/**
167 * omap_prcm_irq_cleanup - reverses memory allocated and other steps
168 * done by omap_prcm_register_chain_handler()
169 *
170 * No return value.
171 */
172void omap_prcm_irq_cleanup(void)
173{
174 int i;
175
176 if (!prcm_irq_setup) {
177 pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
178 return;
179 }
180
181 if (prcm_irq_chips) {
182 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
183 if (prcm_irq_chips[i])
184 irq_remove_generic_chip(prcm_irq_chips[i],
185 0xffffffff, 0, 0);
186 prcm_irq_chips[i] = NULL;
187 }
188 kfree(prcm_irq_chips);
189 prcm_irq_chips = NULL;
190 }
191
192 kfree(prcm_irq_setup->saved_mask);
193 prcm_irq_setup->saved_mask = NULL;
194
195 kfree(prcm_irq_setup->priority_mask);
196 prcm_irq_setup->priority_mask = NULL;
197
198 irq_set_chained_handler(prcm_irq_setup->irq, NULL);
199
200 if (prcm_irq_setup->base_irq > 0)
201 irq_free_descs(prcm_irq_setup->base_irq,
202 prcm_irq_setup->nr_regs * 32);
203 prcm_irq_setup->base_irq = 0;
204}
205
206void omap_prcm_irq_prepare(void)
207{
208 prcm_irq_setup->suspended = true;
209}
210
211void omap_prcm_irq_complete(void)
212{
213 prcm_irq_setup->suspended = false;
214
215 /* If we have not saved the masks, do not attempt to restore */
216 if (!prcm_irq_setup->suspend_save_flag)
217 return;
218
219 prcm_irq_setup->suspend_save_flag = false;
220
221 /*
222 * Re-enable all masked PRCM irq sources, this causes the PRCM
223 * interrupt to fire immediately if the events were masked
224 * previously in the chain handler
225 */
226 prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
227}
228
229/**
230 * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
231 * handler based on provided parameters
232 * @irq_setup: hardware data about the underlying PRM/PRCM
233 *
234 * Set up the PRCM chained interrupt handler on the PRCM IRQ. Sets up
235 * one generic IRQ chip per PRM interrupt status/enable register pair.
236 * Returns 0 upon success, -EINVAL if called twice or if invalid
237 * arguments are passed, or -ENOMEM on any other error.
238 */
239int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
240{
241 int nr_regs = irq_setup->nr_regs;
242 u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
243 int offset, i;
244 struct irq_chip_generic *gc;
245 struct irq_chip_type *ct;
246
247 if (!irq_setup)
248 return -EINVAL;
249
250 if (prcm_irq_setup) {
251 pr_err("PRCM: already initialized; won't reinitialize\n");
252 return -EINVAL;
253 }
254
255 if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
256 pr_err("PRCM: nr_regs too large\n");
257 return -EINVAL;
258 }
259
260 prcm_irq_setup = irq_setup;
261
262 prcm_irq_chips = kzalloc(sizeof(void *) * nr_regs, GFP_KERNEL);
263 prcm_irq_setup->saved_mask = kzalloc(sizeof(u32) * nr_regs, GFP_KERNEL);
264 prcm_irq_setup->priority_mask = kzalloc(sizeof(u32) * nr_regs,
265 GFP_KERNEL);
266
267 if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
268 !prcm_irq_setup->priority_mask) {
269 pr_err("PRCM: kzalloc failed\n");
270 goto err;
271 }
272
273 memset(mask, 0, sizeof(mask));
274
275 for (i = 0; i < irq_setup->nr_irqs; i++) {
276 offset = irq_setup->irqs[i].offset;
277 mask[offset >> 5] |= 1 << (offset & 0x1f);
278 if (irq_setup->irqs[i].priority)
279 irq_setup->priority_mask[offset >> 5] |=
280 1 << (offset & 0x1f);
281 }
282
283 irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler);
284
285 irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
286 0);
287
288 if (irq_setup->base_irq < 0) {
289 pr_err("PRCM: failed to allocate irq descs: %d\n",
290 irq_setup->base_irq);
291 goto err;
292 }
293
294 for (i = 0; i <= irq_setup->nr_regs; i++) {
295 gc = irq_alloc_generic_chip("PRCM", 1,
296 irq_setup->base_irq + i * 32, prm_base,
297 handle_level_irq);
298
299 if (!gc) {
300 pr_err("PRCM: failed to allocate generic chip\n");
301 goto err;
302 }
303 ct = gc->chip_types;
304 ct->chip.irq_ack = irq_gc_ack_set_bit;
305 ct->chip.irq_mask = irq_gc_mask_clr_bit;
306 ct->chip.irq_unmask = irq_gc_mask_set_bit;
307
308 ct->regs.ack = irq_setup->ack + i * 4;
309 ct->regs.mask = irq_setup->mask + i * 4;
310
311 irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
312 prcm_irq_chips[i] = gc;
313 }
314
315 return 0;
316
317err:
318 omap_prcm_irq_cleanup();
319 return -ENOMEM;
320}
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index ee3a8ad304cb..7479d7ea1379 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SDRC register values for Nokia boards 2 * SDRC register values for Nokia boards
3 * 3 *
4 * Copyright (C) 2008, 2010 Nokia Corporation 4 * Copyright (C) 2008, 2010-2011 Nokia Corporation
5 * 5 *
6 * Lauri Leukkunen <lauri.leukkunen@nokia.com> 6 * Lauri Leukkunen <lauri.leukkunen@nokia.com>
7 * 7 *
@@ -107,14 +107,37 @@ static const struct sdram_timings nokia_195dot2mhz_timings[] = {
107 }, 107 },
108}; 108};
109 109
110static const struct sdram_timings nokia_200mhz_timings[] = {
111 {
112 .casl = 3,
113 .tDAL = 30000,
114 .tDPL = 15000,
115 .tRRD = 10000,
116 .tRCD = 20000,
117 .tRP = 15000,
118 .tRAS = 40000,
119 .tRC = 55000,
120 .tRFC = 140000,
121 .tXSR = 200000,
122
123 .tREF = 7800,
124
125 .tXP = 2,
126 .tCKE = 4,
127 .tWTR = 2
128 },
129};
130
110static const struct { 131static const struct {
111 long rate; 132 long rate;
112 struct sdram_timings const *data; 133 struct sdram_timings const *data;
113} nokia_timings[] = { 134} nokia_timings[] = {
114 { 83000000, nokia_166mhz_timings }, 135 { 83000000, nokia_166mhz_timings },
115 { 97600000, nokia_97dot6mhz_timings }, 136 { 97600000, nokia_97dot6mhz_timings },
137 { 100000000, nokia_200mhz_timings },
116 { 166000000, nokia_166mhz_timings }, 138 { 166000000, nokia_166mhz_timings },
117 { 195200000, nokia_195dot2mhz_timings }, 139 { 195200000, nokia_195dot2mhz_timings },
140 { 200000000, nokia_200mhz_timings },
118}; 141};
119static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1]; 142static struct omap_sdrc_params nokia_sdrc_params[ARRAY_SIZE(nokia_timings) + 1];
120 143
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 42c326732a29..247d89478f24 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -19,26 +19,21 @@
19 */ 19 */
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/serial_reg.h>
23#include <linux/clk.h> 22#include <linux/clk.h>
24#include <linux/io.h> 23#include <linux/io.h>
25#include <linux/delay.h> 24#include <linux/delay.h>
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28#include <linux/serial_8250.h>
29#include <linux/pm_runtime.h> 27#include <linux/pm_runtime.h>
30#include <linux/console.h> 28#include <linux/console.h>
31 29
32#ifdef CONFIG_SERIAL_OMAP
33#include <plat/omap-serial.h> 30#include <plat/omap-serial.h>
34#endif
35
36#include "common.h" 31#include "common.h"
37#include <plat/board.h> 32#include <plat/board.h>
38#include <plat/clock.h>
39#include <plat/dma.h> 33#include <plat/dma.h>
40#include <plat/omap_hwmod.h> 34#include <plat/omap_hwmod.h>
41#include <plat/omap_device.h> 35#include <plat/omap_device.h>
36#include <plat/omap-pm.h>
42 37
43#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
44#include "pm.h" 39#include "pm.h"
@@ -47,603 +42,226 @@
47#include "control.h" 42#include "control.h"
48#include "mux.h" 43#include "mux.h"
49 44
50#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
51#define UART_OMAP_WER 0x17 /* Wake-up enable register */
52
53#define UART_ERRATA_FIFO_FULL_ABORT (0x1 << 0)
54#define UART_ERRATA_i202_MDR1_ACCESS (0x1 << 1)
55
56/* 45/*
57 * NOTE: By default the serial timeout is disabled as it causes lost characters 46 * NOTE: By default the serial auto_suspend timeout is disabled as it causes
58 * over the serial ports. This means that the UART clocks will stay on until 47 * lost characters over the serial ports. This means that the UART clocks will
59 * disabled via sysfs. This also causes that any deeper omap sleep states are 48 * stay on until power/autosuspend_delay is set for the uart from sysfs.
60 * blocked. 49 * This also causes that any deeper omap sleep states are blocked.
61 */ 50 */
62#define DEFAULT_TIMEOUT 0 51#define DEFAULT_AUTOSUSPEND_DELAY -1
63 52
64#define MAX_UART_HWMOD_NAME_LEN 16 53#define MAX_UART_HWMOD_NAME_LEN 16
65 54
66struct omap_uart_state { 55struct omap_uart_state {
67 int num; 56 int num;
68 int can_sleep; 57 int can_sleep;
69 struct timer_list timer;
70 u32 timeout;
71
72 void __iomem *wk_st;
73 void __iomem *wk_en;
74 u32 wk_mask;
75 u32 padconf;
76 u32 dma_enabled;
77
78 struct clk *ick;
79 struct clk *fck;
80 int clocked;
81
82 int irq;
83 int regshift;
84 int irqflags;
85 void __iomem *membase;
86 resource_size_t mapbase;
87 58
88 struct list_head node; 59 struct list_head node;
89 struct omap_hwmod *oh; 60 struct omap_hwmod *oh;
90 struct platform_device *pdev; 61 struct platform_device *pdev;
91
92 u32 errata;
93#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
94 int context_valid;
95
96 /* Registers to be saved/restored for OFF-mode */
97 u16 dll;
98 u16 dlh;
99 u16 ier;
100 u16 sysc;
101 u16 scr;
102 u16 wer;
103 u16 mcr;
104#endif
105}; 62};
106 63
107static LIST_HEAD(uart_list); 64static LIST_HEAD(uart_list);
108static u8 num_uarts; 65static u8 num_uarts;
66static u8 console_uart_id = -1;
67static u8 no_console_suspend;
68static u8 uart_debug;
69
70#define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */
71#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */
72#define DEFAULT_RXDMA_TIMEOUT (3 * HZ)/* RX DMA timeout (jiffies) */
73
74static struct omap_uart_port_info omap_serial_default_info[] __initdata = {
75 {
76 .dma_enabled = false,
77 .dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
78 .dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
79 .dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
80 .autosuspend_timeout = DEFAULT_AUTOSUSPEND_DELAY,
81 },
82};
109 83
110static inline unsigned int __serial_read_reg(struct uart_port *up, 84#ifdef CONFIG_PM
111 int offset) 85static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
112{
113 offset <<= up->regshift;
114 return (unsigned int)__raw_readb(up->membase + offset);
115}
116
117static inline unsigned int serial_read_reg(struct omap_uart_state *uart,
118 int offset)
119{ 86{
120 offset <<= uart->regshift; 87 struct omap_device *od = to_omap_device(pdev);
121 return (unsigned int)__raw_readb(uart->membase + offset);
122}
123 88
124static inline void __serial_write_reg(struct uart_port *up, int offset, 89 if (!od)
125 int value) 90 return;
126{
127 offset <<= up->regshift;
128 __raw_writeb(value, up->membase + offset);
129}
130 91
131static inline void serial_write_reg(struct omap_uart_state *uart, int offset, 92 if (enable)
132 int value) 93 omap_hwmod_enable_wakeup(od->hwmods[0]);
133{ 94 else
134 offset <<= uart->regshift; 95 omap_hwmod_disable_wakeup(od->hwmods[0]);
135 __raw_writeb(value, uart->membase + offset);
136} 96}
137 97
138/* 98/*
139 * Internal UARTs need to be initialized for the 8250 autoconfig to work 99 * Errata i291: [UART]:Cannot Acknowledge Idle Requests
140 * properly. Note that the TX watermark initialization may not be needed 100 * in Smartidle Mode When Configured for DMA Operations.
141 * once the 8250.c watermark handling code is merged. 101 * WA: configure uart in force idle mode.
142 */ 102 */
143 103static void omap_uart_set_noidle(struct platform_device *pdev)
144static inline void __init omap_uart_reset(struct omap_uart_state *uart)
145{ 104{
146 serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 105 struct omap_device *od = to_omap_device(pdev);
147 serial_write_reg(uart, UART_OMAP_SCR, 0x08);
148 serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
149}
150
151#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
152 106
153/* 107 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
154 * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
155 * The access to uart register after MDR1 Access
156 * causes UART to corrupt data.
157 *
158 * Need a delay =
159 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
160 * give 10 times as much
161 */
162static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
163 u8 fcr_val)
164{
165 u8 timeout = 255;
166
167 serial_write_reg(uart, UART_OMAP_MDR1, mdr1_val);
168 udelay(2);
169 serial_write_reg(uart, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT |
170 UART_FCR_CLEAR_RCVR);
171 /*
172 * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
173 * TX_FIFO_E bit is 1.
174 */
175 while (UART_LSR_THRE != (serial_read_reg(uart, UART_LSR) &
176 (UART_LSR_THRE | UART_LSR_DR))) {
177 timeout--;
178 if (!timeout) {
179 /* Should *never* happen. we warn and carry on */
180 dev_crit(&uart->pdev->dev, "Errata i202: timedout %x\n",
181 serial_read_reg(uart, UART_LSR));
182 break;
183 }
184 udelay(1);
185 }
186} 108}
187 109
188static void omap_uart_save_context(struct omap_uart_state *uart) 110static void omap_uart_set_forceidle(struct platform_device *pdev)
189{ 111{
190 u16 lcr = 0; 112 struct omap_device *od = to_omap_device(pdev);
191 113
192 if (!enable_off_mode) 114 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE);
193 return;
194
195 lcr = serial_read_reg(uart, UART_LCR);
196 serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
197 uart->dll = serial_read_reg(uart, UART_DLL);
198 uart->dlh = serial_read_reg(uart, UART_DLM);
199 serial_write_reg(uart, UART_LCR, lcr);
200 uart->ier = serial_read_reg(uart, UART_IER);
201 uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC);
202 uart->scr = serial_read_reg(uart, UART_OMAP_SCR);
203 uart->wer = serial_read_reg(uart, UART_OMAP_WER);
204 serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
205 uart->mcr = serial_read_reg(uart, UART_MCR);
206 serial_write_reg(uart, UART_LCR, lcr);
207
208 uart->context_valid = 1;
209} 115}
210 116
211static void omap_uart_restore_context(struct omap_uart_state *uart)
212{
213 u16 efr = 0;
214
215 if (!enable_off_mode)
216 return;
217
218 if (!uart->context_valid)
219 return;
220
221 uart->context_valid = 0;
222
223 if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
224 omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_DISABLE, 0xA0);
225 else
226 serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
227
228 serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
229 efr = serial_read_reg(uart, UART_EFR);
230 serial_write_reg(uart, UART_EFR, UART_EFR_ECB);
231 serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
232 serial_write_reg(uart, UART_IER, 0x0);
233 serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
234 serial_write_reg(uart, UART_DLL, uart->dll);
235 serial_write_reg(uart, UART_DLM, uart->dlh);
236 serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
237 serial_write_reg(uart, UART_IER, uart->ier);
238 serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
239 serial_write_reg(uart, UART_MCR, uart->mcr);
240 serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
241 serial_write_reg(uart, UART_EFR, efr);
242 serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8);
243 serial_write_reg(uart, UART_OMAP_SCR, uart->scr);
244 serial_write_reg(uart, UART_OMAP_WER, uart->wer);
245 serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc);
246
247 if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
248 omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_16X_MODE, 0xA1);
249 else
250 /* UART 16x mode */
251 serial_write_reg(uart, UART_OMAP_MDR1,
252 UART_OMAP_MDR1_16X_MODE);
253}
254#else 117#else
255static inline void omap_uart_save_context(struct omap_uart_state *uart) {} 118static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
256static inline void omap_uart_restore_context(struct omap_uart_state *uart) {} 119{}
257#endif /* CONFIG_PM && CONFIG_ARCH_OMAP3 */ 120static void omap_uart_set_noidle(struct platform_device *pdev) {}
258 121static void omap_uart_set_forceidle(struct platform_device *pdev) {}
259static inline void omap_uart_enable_clocks(struct omap_uart_state *uart) 122#endif /* CONFIG_PM */
260{
261 if (uart->clocked)
262 return;
263
264 omap_device_enable(uart->pdev);
265 uart->clocked = 1;
266 omap_uart_restore_context(uart);
267}
268
269#ifdef CONFIG_PM
270
271static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
272{
273 if (!uart->clocked)
274 return;
275
276 omap_uart_save_context(uart);
277 uart->clocked = 0;
278 omap_device_idle(uart->pdev);
279}
280
281static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
282{
283 /* Set wake-enable bit */
284 if (uart->wk_en && uart->wk_mask) {
285 u32 v = __raw_readl(uart->wk_en);
286 v |= uart->wk_mask;
287 __raw_writel(v, uart->wk_en);
288 }
289
290 /* Ensure IOPAD wake-enables are set */
291 if (cpu_is_omap34xx() && uart->padconf) {
292 u16 v = omap_ctrl_readw(uart->padconf);
293 v |= OMAP3_PADCONF_WAKEUPENABLE0;
294 omap_ctrl_writew(v, uart->padconf);
295 }
296}
297
298static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
299{
300 /* Clear wake-enable bit */
301 if (uart->wk_en && uart->wk_mask) {
302 u32 v = __raw_readl(uart->wk_en);
303 v &= ~uart->wk_mask;
304 __raw_writel(v, uart->wk_en);
305 }
306
307 /* Ensure IOPAD wake-enables are cleared */
308 if (cpu_is_omap34xx() && uart->padconf) {
309 u16 v = omap_ctrl_readw(uart->padconf);
310 v &= ~OMAP3_PADCONF_WAKEUPENABLE0;
311 omap_ctrl_writew(v, uart->padconf);
312 }
313}
314
315static void omap_uart_smart_idle_enable(struct omap_uart_state *uart,
316 int enable)
317{
318 u8 idlemode;
319
320 if (enable) {
321 /**
322 * Errata 2.15: [UART]:Cannot Acknowledge Idle Requests
323 * in Smartidle Mode When Configured for DMA Operations.
324 */
325 if (uart->dma_enabled)
326 idlemode = HWMOD_IDLEMODE_FORCE;
327 else
328 idlemode = HWMOD_IDLEMODE_SMART;
329 } else {
330 idlemode = HWMOD_IDLEMODE_NO;
331 }
332
333 omap_hwmod_set_slave_idlemode(uart->oh, idlemode);
334}
335
336static void omap_uart_block_sleep(struct omap_uart_state *uart)
337{
338 omap_uart_enable_clocks(uart);
339
340 omap_uart_smart_idle_enable(uart, 0);
341 uart->can_sleep = 0;
342 if (uart->timeout)
343 mod_timer(&uart->timer, jiffies + uart->timeout);
344 else
345 del_timer(&uart->timer);
346}
347
348static void omap_uart_allow_sleep(struct omap_uart_state *uart)
349{
350 if (device_may_wakeup(&uart->pdev->dev))
351 omap_uart_enable_wakeup(uart);
352 else
353 omap_uart_disable_wakeup(uart);
354
355 if (!uart->clocked)
356 return;
357
358 omap_uart_smart_idle_enable(uart, 1);
359 uart->can_sleep = 1;
360 del_timer(&uart->timer);
361}
362
363static void omap_uart_idle_timer(unsigned long data)
364{
365 struct omap_uart_state *uart = (struct omap_uart_state *)data;
366
367 omap_uart_allow_sleep(uart);
368}
369
370void omap_uart_prepare_idle(int num)
371{
372 struct omap_uart_state *uart;
373
374 list_for_each_entry(uart, &uart_list, node) {
375 if (num == uart->num && uart->can_sleep) {
376 omap_uart_disable_clocks(uart);
377 return;
378 }
379 }
380}
381
382void omap_uart_resume_idle(int num)
383{
384 struct omap_uart_state *uart;
385
386 list_for_each_entry(uart, &uart_list, node) {
387 if (num == uart->num && uart->can_sleep) {
388 omap_uart_enable_clocks(uart);
389
390 /* Check for IO pad wakeup */
391 if (cpu_is_omap34xx() && uart->padconf) {
392 u16 p = omap_ctrl_readw(uart->padconf);
393
394 if (p & OMAP3_PADCONF_WAKEUPEVENT0)
395 omap_uart_block_sleep(uart);
396 }
397
398 /* Check for normal UART wakeup */
399 if (__raw_readl(uart->wk_st) & uart->wk_mask)
400 omap_uart_block_sleep(uart);
401 return;
402 }
403 }
404}
405
406void omap_uart_prepare_suspend(void)
407{
408 struct omap_uart_state *uart;
409
410 list_for_each_entry(uart, &uart_list, node) {
411 omap_uart_allow_sleep(uart);
412 }
413}
414
415int omap_uart_can_sleep(void)
416{
417 struct omap_uart_state *uart;
418 int can_sleep = 1;
419
420 list_for_each_entry(uart, &uart_list, node) {
421 if (!uart->clocked)
422 continue;
423
424 if (!uart->can_sleep) {
425 can_sleep = 0;
426 continue;
427 }
428
429 /* This UART can now safely sleep. */
430 omap_uart_allow_sleep(uart);
431 }
432
433 return can_sleep;
434}
435 123
436/** 124#ifdef CONFIG_OMAP_MUX
437 * omap_uart_interrupt() 125static struct omap_device_pad default_uart1_pads[] __initdata = {
438 * 126 {
439 * This handler is used only to detect that *any* UART interrupt has 127 .name = "uart1_cts.uart1_cts",
440 * occurred. It does _nothing_ to handle the interrupt. Rather, 128 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
441 * any UART interrupt will trigger the inactivity timer so the 129 },
442 * UART will not idle or sleep for its timeout period. 130 {
443 * 131 .name = "uart1_rts.uart1_rts",
444 **/ 132 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
445/* static int first_interrupt; */ 133 },
446static irqreturn_t omap_uart_interrupt(int irq, void *dev_id) 134 {
447{ 135 .name = "uart1_tx.uart1_tx",
448 struct omap_uart_state *uart = dev_id; 136 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
137 },
138 {
139 .name = "uart1_rx.uart1_rx",
140 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
141 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
142 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
143 },
144};
449 145
450 omap_uart_block_sleep(uart); 146static struct omap_device_pad default_uart2_pads[] __initdata = {
147 {
148 .name = "uart2_cts.uart2_cts",
149 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
150 },
151 {
152 .name = "uart2_rts.uart2_rts",
153 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
154 },
155 {
156 .name = "uart2_tx.uart2_tx",
157 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
158 },
159 {
160 .name = "uart2_rx.uart2_rx",
161 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
162 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
163 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
164 },
165};
451 166
452 return IRQ_NONE; 167static struct omap_device_pad default_uart3_pads[] __initdata = {
453} 168 {
169 .name = "uart3_cts_rctx.uart3_cts_rctx",
170 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
171 },
172 {
173 .name = "uart3_rts_sd.uart3_rts_sd",
174 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
175 },
176 {
177 .name = "uart3_tx_irtx.uart3_tx_irtx",
178 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
179 },
180 {
181 .name = "uart3_rx_irrx.uart3_rx_irrx",
182 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
183 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
184 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
185 },
186};
454 187
455static void omap_uart_idle_init(struct omap_uart_state *uart) 188static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
456{ 189 {
457 int ret; 190 .name = "gpmc_wait2.uart4_tx",
458 191 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
459 uart->can_sleep = 0; 192 },
460 uart->timeout = DEFAULT_TIMEOUT; 193 {
461 setup_timer(&uart->timer, omap_uart_idle_timer, 194 .name = "gpmc_wait3.uart4_rx",
462 (unsigned long) uart); 195 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
463 if (uart->timeout) 196 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
464 mod_timer(&uart->timer, jiffies + uart->timeout); 197 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
465 omap_uart_smart_idle_enable(uart, 0); 198 },
466 199};
467 if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
468 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
469 u32 wk_mask = 0;
470 u32 padconf = 0;
471
472 /* XXX These PRM accesses do not belong here */
473 uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
474 uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
475 switch (uart->num) {
476 case 0:
477 wk_mask = OMAP3430_ST_UART1_MASK;
478 padconf = 0x182;
479 break;
480 case 1:
481 wk_mask = OMAP3430_ST_UART2_MASK;
482 padconf = 0x17a;
483 break;
484 case 2:
485 wk_mask = OMAP3430_ST_UART3_MASK;
486 padconf = 0x19e;
487 break;
488 case 3:
489 wk_mask = OMAP3630_ST_UART4_MASK;
490 padconf = 0x0d2;
491 break;
492 }
493 uart->wk_mask = wk_mask;
494 uart->padconf = padconf;
495 } else if (cpu_is_omap24xx()) {
496 u32 wk_mask = 0;
497 u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
498
499 switch (uart->num) {
500 case 0:
501 wk_mask = OMAP24XX_ST_UART1_MASK;
502 break;
503 case 1:
504 wk_mask = OMAP24XX_ST_UART2_MASK;
505 break;
506 case 2:
507 wk_en = OMAP24XX_PM_WKEN2;
508 wk_st = OMAP24XX_PM_WKST2;
509 wk_mask = OMAP24XX_ST_UART3_MASK;
510 break;
511 }
512 uart->wk_mask = wk_mask;
513 if (cpu_is_omap2430()) {
514 uart->wk_en = OMAP2430_PRM_REGADDR(CORE_MOD, wk_en);
515 uart->wk_st = OMAP2430_PRM_REGADDR(CORE_MOD, wk_st);
516 } else if (cpu_is_omap2420()) {
517 uart->wk_en = OMAP2420_PRM_REGADDR(CORE_MOD, wk_en);
518 uart->wk_st = OMAP2420_PRM_REGADDR(CORE_MOD, wk_st);
519 }
520 } else {
521 uart->wk_en = NULL;
522 uart->wk_st = NULL;
523 uart->wk_mask = 0;
524 uart->padconf = 0;
525 }
526 200
527 uart->irqflags |= IRQF_SHARED; 201static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
528 ret = request_threaded_irq(uart->irq, NULL, omap_uart_interrupt, 202 {
529 IRQF_SHARED, "serial idle", (void *)uart); 203 .name = "uart4_tx.uart4_tx",
530 WARN_ON(ret); 204 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
531} 205 },
206 {
207 .name = "uart4_rx.uart4_rx",
208 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
209 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
210 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
211 },
212};
532 213
533void omap_uart_enable_irqs(int enable) 214static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
534{ 215{
535 int ret; 216 switch (bdata->id) {
536 struct omap_uart_state *uart; 217 case 0:
537 218 bdata->pads = default_uart1_pads;
538 list_for_each_entry(uart, &uart_list, node) { 219 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
539 if (enable) { 220 break;
540 pm_runtime_put_sync(&uart->pdev->dev); 221 case 1:
541 ret = request_threaded_irq(uart->irq, NULL, 222 bdata->pads = default_uart2_pads;
542 omap_uart_interrupt, 223 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
543 IRQF_SHARED, 224 break;
544 "serial idle", 225 case 2:
545 (void *)uart); 226 bdata->pads = default_uart3_pads;
546 } else { 227 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
547 pm_runtime_get_noresume(&uart->pdev->dev); 228 break;
548 free_irq(uart->irq, (void *)uart); 229 case 3:
230 if (cpu_is_omap44xx()) {
231 bdata->pads = default_omap4_uart4_pads;
232 bdata->pads_cnt =
233 ARRAY_SIZE(default_omap4_uart4_pads);
234 } else if (cpu_is_omap3630()) {
235 bdata->pads = default_omap36xx_uart4_pads;
236 bdata->pads_cnt =
237 ARRAY_SIZE(default_omap36xx_uart4_pads);
549 } 238 }
239 break;
240 default:
241 break;
550 } 242 }
551} 243}
552
553static ssize_t sleep_timeout_show(struct device *dev,
554 struct device_attribute *attr,
555 char *buf)
556{
557 struct platform_device *pdev = to_platform_device(dev);
558 struct omap_device *odev = to_omap_device(pdev);
559 struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
560
561 return sprintf(buf, "%u\n", uart->timeout / HZ);
562}
563
564static ssize_t sleep_timeout_store(struct device *dev,
565 struct device_attribute *attr,
566 const char *buf, size_t n)
567{
568 struct platform_device *pdev = to_platform_device(dev);
569 struct omap_device *odev = to_omap_device(pdev);
570 struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
571 unsigned int value;
572
573 if (sscanf(buf, "%u", &value) != 1) {
574 dev_err(dev, "sleep_timeout_store: Invalid value\n");
575 return -EINVAL;
576 }
577
578 uart->timeout = value * HZ;
579 if (uart->timeout)
580 mod_timer(&uart->timer, jiffies + uart->timeout);
581 else
582 /* A zero value means disable timeout feature */
583 omap_uart_block_sleep(uart);
584
585 return n;
586}
587
588static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show,
589 sleep_timeout_store);
590#define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
591#else 244#else
592static inline void omap_uart_idle_init(struct omap_uart_state *uart) {} 245static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
593static void omap_uart_block_sleep(struct omap_uart_state *uart) 246#endif
594{
595 /* Needed to enable UART clocks when built without CONFIG_PM */
596 omap_uart_enable_clocks(uart);
597}
598#define DEV_CREATE_FILE(dev, attr)
599#endif /* CONFIG_PM */
600
601#ifndef CONFIG_SERIAL_OMAP
602/*
603 * Override the default 8250 read handler: mem_serial_in()
604 * Empty RX fifo read causes an abort on omap3630 and omap4
605 * This function makes sure that an empty rx fifo is not read on these silicons
606 * (OMAP1/2/3430 are not affected)
607 */
608static unsigned int serial_in_override(struct uart_port *up, int offset)
609{
610 if (UART_RX == offset) {
611 unsigned int lsr;
612 lsr = __serial_read_reg(up, UART_LSR);
613 if (!(lsr & UART_LSR_DR))
614 return -EPERM;
615 }
616
617 return __serial_read_reg(up, offset);
618}
619 247
620static void serial_out_override(struct uart_port *up, int offset, int value) 248char *cmdline_find_option(char *str)
621{ 249{
622 unsigned int status, tmout = 10000; 250 extern char *saved_command_line;
623 251
624 status = __serial_read_reg(up, UART_LSR); 252 return strstr(saved_command_line, str);
625 while (!(status & UART_LSR_THRE)) {
626 /* Wait up to 10ms for the character(s) to be sent. */
627 if (--tmout == 0)
628 break;
629 udelay(1);
630 status = __serial_read_reg(up, UART_LSR);
631 }
632 __serial_write_reg(up, offset, value);
633} 253}
634#endif
635 254
636static int __init omap_serial_early_init(void) 255static int __init omap_serial_early_init(void)
637{ 256{
638 int i = 0;
639
640 do { 257 do {
641 char oh_name[MAX_UART_HWMOD_NAME_LEN]; 258 char oh_name[MAX_UART_HWMOD_NAME_LEN];
642 struct omap_hwmod *oh; 259 struct omap_hwmod *oh;
643 struct omap_uart_state *uart; 260 struct omap_uart_state *uart;
261 char uart_name[MAX_UART_HWMOD_NAME_LEN];
644 262
645 snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN, 263 snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
646 "uart%d", i + 1); 264 "uart%d", num_uarts + 1);
647 oh = omap_hwmod_lookup(oh_name); 265 oh = omap_hwmod_lookup(oh_name);
648 if (!oh) 266 if (!oh)
649 break; 267 break;
@@ -653,21 +271,35 @@ static int __init omap_serial_early_init(void)
653 return -ENODEV; 271 return -ENODEV;
654 272
655 uart->oh = oh; 273 uart->oh = oh;
656 uart->num = i++; 274 uart->num = num_uarts++;
657 list_add_tail(&uart->node, &uart_list); 275 list_add_tail(&uart->node, &uart_list);
658 num_uarts++; 276 snprintf(uart_name, MAX_UART_HWMOD_NAME_LEN,
659 277 "%s%d", OMAP_SERIAL_NAME, uart->num);
660 /* 278
661 * NOTE: omap_hwmod_setup*() has not yet been called, 279 if (cmdline_find_option(uart_name)) {
662 * so no hwmod functions will work yet. 280 console_uart_id = uart->num;
663 */ 281
664 282 if (console_loglevel >= 10) {
665 /* 283 uart_debug = true;
666 * During UART early init, device need to be probed 284 pr_info("%s used as console in debug mode"
667 * to determine SoC specific init before omap_device 285 " uart%d clocks will not be"
668 * is ready. Therefore, don't allow idle here 286 " gated", uart_name, uart->num);
669 */ 287 }
670 uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET; 288
289 if (cmdline_find_option("no_console_suspend"))
290 no_console_suspend = true;
291
292 /*
293 * omap-uart can be used for earlyprintk logs
294 * So if omap-uart is used as console then prevent
295 * uart reset and idle to get logs from omap-uart
296 * until uart console driver is available to take
297 * care for console messages.
298 * Idling or resetting omap-uart while printing logs
299 * early boot logs can stall the boot-up.
300 */
301 oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
302 }
671 } while (1); 303 } while (1);
672 304
673 return 0; 305 return 0;
@@ -677,6 +309,7 @@ core_initcall(omap_serial_early_init);
677/** 309/**
678 * omap_serial_init_port() - initialize single serial port 310 * omap_serial_init_port() - initialize single serial port
679 * @bdata: port specific board data pointer 311 * @bdata: port specific board data pointer
312 * @info: platform specific data pointer
680 * 313 *
681 * This function initialies serial driver for given port only. 314 * This function initialies serial driver for given port only.
682 * Platforms can call this function instead of omap_serial_init() 315 * Platforms can call this function instead of omap_serial_init()
@@ -685,7 +318,8 @@ core_initcall(omap_serial_early_init);
685 * Don't mix calls to omap_serial_init_port() and omap_serial_init(), 318 * Don't mix calls to omap_serial_init_port() and omap_serial_init(),
686 * use only one of the two. 319 * use only one of the two.
687 */ 320 */
688void __init omap_serial_init_port(struct omap_board_data *bdata) 321void __init omap_serial_init_port(struct omap_board_data *bdata,
322 struct omap_uart_port_info *info)
689{ 323{
690 struct omap_uart_state *uart; 324 struct omap_uart_state *uart;
691 struct omap_hwmod *oh; 325 struct omap_hwmod *oh;
@@ -693,15 +327,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
693 void *pdata = NULL; 327 void *pdata = NULL;
694 u32 pdata_size = 0; 328 u32 pdata_size = 0;
695 char *name; 329 char *name;
696#ifndef CONFIG_SERIAL_OMAP
697 struct plat_serial8250_port ports[2] = {
698 {},
699 {.flags = 0},
700 };
701 struct plat_serial8250_port *p = &ports[0];
702#else
703 struct omap_uart_port_info omap_up; 330 struct omap_uart_port_info omap_up;
704#endif
705 331
706 if (WARN_ON(!bdata)) 332 if (WARN_ON(!bdata))
707 return; 333 return;
@@ -713,66 +339,34 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
713 list_for_each_entry(uart, &uart_list, node) 339 list_for_each_entry(uart, &uart_list, node)
714 if (bdata->id == uart->num) 340 if (bdata->id == uart->num)
715 break; 341 break;
342 if (!info)
343 info = omap_serial_default_info;
716 344
717 oh = uart->oh; 345 oh = uart->oh;
718 uart->dma_enabled = 0;
719#ifndef CONFIG_SERIAL_OMAP
720 name = "serial8250";
721
722 /*
723 * !! 8250 driver does not use standard IORESOURCE* It
724 * has it's own custom pdata that can be taken from
725 * the hwmod resource data. But, this needs to be
726 * done after the build.
727 *
728 * ?? does it have to be done before the register ??
729 * YES, because platform_device_data_add() copies
730 * pdata, it does not use a pointer.
731 */
732 p->flags = UPF_BOOT_AUTOCONF;
733 p->iotype = UPIO_MEM;
734 p->regshift = 2;
735 p->uartclk = OMAP24XX_BASE_BAUD * 16;
736 p->irq = oh->mpu_irqs[0].irq;
737 p->mapbase = oh->slaves[0]->addr->pa_start;
738 p->membase = omap_hwmod_get_mpu_rt_va(oh);
739 p->irqflags = IRQF_SHARED;
740 p->private_data = uart;
741
742 /*
743 * omap44xx, ti816x: Never read empty UART fifo
744 * omap3xxx: Never read empty UART fifo on UARTs
745 * with IP rev >=0x52
746 */
747 uart->regshift = p->regshift;
748 uart->membase = p->membase;
749 if (cpu_is_omap44xx() || cpu_is_ti816x())
750 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
751 else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
752 >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
753 uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
754
755 if (uart->errata & UART_ERRATA_FIFO_FULL_ABORT) {
756 p->serial_in = serial_in_override;
757 p->serial_out = serial_out_override;
758 }
759
760 pdata = &ports[0];
761 pdata_size = 2 * sizeof(struct plat_serial8250_port);
762#else
763
764 name = DRIVER_NAME; 346 name = DRIVER_NAME;
765 347
766 omap_up.dma_enabled = uart->dma_enabled; 348 omap_up.dma_enabled = info->dma_enabled;
767 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; 349 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
768 omap_up.mapbase = oh->slaves[0]->addr->pa_start; 350 omap_up.flags = UPF_BOOT_AUTOCONF;
769 omap_up.membase = omap_hwmod_get_mpu_rt_va(oh); 351 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
770 omap_up.irqflags = IRQF_SHARED; 352 omap_up.set_forceidle = omap_uart_set_forceidle;
771 omap_up.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; 353 omap_up.set_noidle = omap_uart_set_noidle;
354 omap_up.enable_wakeup = omap_uart_enable_wakeup;
355 omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
356 omap_up.dma_rx_timeout = info->dma_rx_timeout;
357 omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate;
358 omap_up.autosuspend_timeout = info->autosuspend_timeout;
359
360 /* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */
361 if (!cpu_is_omap2420() && !cpu_is_ti816x())
362 omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS;
363
364 /* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */
365 if (cpu_is_omap34xx() || cpu_is_omap3630())
366 omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE;
772 367
773 pdata = &omap_up; 368 pdata = &omap_up;
774 pdata_size = sizeof(struct omap_uart_port_info); 369 pdata_size = sizeof(struct omap_uart_port_info);
775#endif
776 370
777 if (WARN_ON(!oh)) 371 if (WARN_ON(!oh))
778 return; 372 return;
@@ -782,64 +376,29 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
782 WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", 376 WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
783 name, oh->name); 377 name, oh->name);
784 378
785 omap_device_disable_idle_on_suspend(pdev); 379 if ((console_uart_id == bdata->id) && no_console_suspend)
380 omap_device_disable_idle_on_suspend(pdev);
381
786 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 382 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
787 383
788 uart->irq = oh->mpu_irqs[0].irq;
789 uart->regshift = 2;
790 uart->mapbase = oh->slaves[0]->addr->pa_start;
791 uart->membase = omap_hwmod_get_mpu_rt_va(oh);
792 uart->pdev = pdev; 384 uart->pdev = pdev;
793 385
794 oh->dev_attr = uart; 386 oh->dev_attr = uart;
795 387
796 console_lock(); /* in case the earlycon is on the UART */ 388 if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
797 389 && !uart_debug)
798 /*
799 * Because of early UART probing, UART did not get idled
800 * on init. Now that omap_device is ready, ensure full idle
801 * before doing omap_device_enable().
802 */
803 omap_hwmod_idle(uart->oh);
804
805 omap_device_enable(uart->pdev);
806 omap_uart_idle_init(uart);
807 omap_uart_reset(uart);
808 omap_hwmod_enable_wakeup(uart->oh);
809 omap_device_idle(uart->pdev);
810
811 /*
812 * Need to block sleep long enough for interrupt driven
813 * driver to start. Console driver is in polling mode
814 * so device needs to be kept enabled while polling driver
815 * is in use.
816 */
817 if (uart->timeout)
818 uart->timeout = (30 * HZ);
819 omap_uart_block_sleep(uart);
820 uart->timeout = DEFAULT_TIMEOUT;
821
822 console_unlock();
823
824 if ((cpu_is_omap34xx() && uart->padconf) ||
825 (uart->wk_en && uart->wk_mask)) {
826 device_init_wakeup(&pdev->dev, true); 390 device_init_wakeup(&pdev->dev, true);
827 DEV_CREATE_FILE(&pdev->dev, &dev_attr_sleep_timeout);
828 }
829
830 /* Enable the MDR1 errata for OMAP3 */
831 if (cpu_is_omap34xx() && !cpu_is_ti816x())
832 uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
833} 391}
834 392
835/** 393/**
836 * omap_serial_init() - initialize all supported serial ports 394 * omap_serial_board_init() - initialize all supported serial ports
395 * @info: platform specific data pointer
837 * 396 *
838 * Initializes all available UARTs as serial ports. Platforms 397 * Initializes all available UARTs as serial ports. Platforms
839 * can call this function when they want to have default behaviour 398 * can call this function when they want to have default behaviour
840 * for serial ports (e.g initialize them all as serial ports). 399 * for serial ports (e.g initialize them all as serial ports).
841 */ 400 */
842void __init omap_serial_init(void) 401void __init omap_serial_board_init(struct omap_uart_port_info *info)
843{ 402{
844 struct omap_uart_state *uart; 403 struct omap_uart_state *uart;
845 struct omap_board_data bdata; 404 struct omap_board_data bdata;
@@ -849,7 +408,25 @@ void __init omap_serial_init(void)
849 bdata.flags = 0; 408 bdata.flags = 0;
850 bdata.pads = NULL; 409 bdata.pads = NULL;
851 bdata.pads_cnt = 0; 410 bdata.pads_cnt = 0;
852 omap_serial_init_port(&bdata);
853 411
412 if (cpu_is_omap44xx() || cpu_is_omap34xx())
413 omap_serial_fill_default_pads(&bdata);
414
415 if (!info)
416 omap_serial_init_port(&bdata, NULL);
417 else
418 omap_serial_init_port(&bdata, &info[uart->num]);
854 } 419 }
855} 420}
421
422/**
423 * omap_serial_init() - initialize all supported serial ports
424 *
425 * Initializes all available UARTs.
426 * Platforms can call this function when they want to have default behaviour
427 * for serial ports (e.g initialize them all as serial ports).
428 */
429void __init omap_serial_init(void)
430{
431 omap_serial_board_init(NULL);
432}
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
new file mode 100644
index 000000000000..abd283400490
--- /dev/null
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -0,0 +1,379 @@
1/*
2 * OMAP44xx sleep code.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 * This program is free software,you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/linkage.h>
13#include <asm/system.h>
14#include <asm/smp_scu.h>
15#include <asm/memory.h>
16#include <asm/hardware/cache-l2x0.h>
17
18#include <plat/omap44xx.h>
19#include <mach/omap-secure.h>
20
21#include "common.h"
22#include "omap4-sar-layout.h"
23
24#if defined(CONFIG_SMP) && defined(CONFIG_PM)
25
26.macro DO_SMC
27 dsb
28 smc #0
29 dsb
30.endm
31
32ppa_zero_params:
33 .word 0x0
34
35ppa_por_params:
36 .word 1, 0
37
38/*
39 * =============================
40 * == CPU suspend finisher ==
41 * =============================
42 *
43 * void omap4_finish_suspend(unsigned long cpu_state)
44 *
45 * This function code saves the CPU context and performs the CPU
46 * power down sequence. Calling WFI effectively changes the CPU
47 * power domains states to the desired target power state.
48 *
49 * @cpu_state : contains context save state (r0)
50 * 0 - No context lost
51 * 1 - CPUx L1 and logic lost: MPUSS CSWR
52 * 2 - CPUx L1 and logic lost + GIC lost: MPUSS OSWR
53 * 3 - CPUx L1 and logic lost + GIC + L2 lost: MPUSS OFF
54 * @return: This function never returns for CPU OFF and DORMANT power states.
55 * Post WFI, CPU transitions to DORMANT or OFF power state and on wake-up
56 * from this follows a full CPU reset path via ROM code to CPU restore code.
57 * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
58 * It returns to the caller for CPU INACTIVE and ON power states or in case
59 * CPU failed to transition to targeted OFF/DORMANT state.
60 */
61ENTRY(omap4_finish_suspend)
62 stmfd sp!, {lr}
63 cmp r0, #0x0
64 beq do_WFI @ No lowpower state, jump to WFI
65
66 /*
67 * Flush all data from the L1 data cache before disabling
68 * SCTLR.C bit.
69 */
70 bl omap4_get_sar_ram_base
71 ldr r9, [r0, #OMAP_TYPE_OFFSET]
72 cmp r9, #0x1 @ Check for HS device
73 bne skip_secure_l1_clean
74 mov r0, #SCU_PM_NORMAL
75 mov r1, #0xFF @ clean seucre L1
76 stmfd r13!, {r4-r12, r14}
77 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
78 DO_SMC
79 ldmfd r13!, {r4-r12, r14}
80skip_secure_l1_clean:
81 bl v7_flush_dcache_all
82
83 /*
84 * Clear the SCTLR.C bit to prevent further data cache
85 * allocation. Clearing SCTLR.C would make all the data accesses
86 * strongly ordered and would not hit the cache.
87 */
88 mrc p15, 0, r0, c1, c0, 0
89 bic r0, r0, #(1 << 2) @ Disable the C bit
90 mcr p15, 0, r0, c1, c0, 0
91 isb
92
93 /*
94 * Invalidate L1 data cache. Even though only invalidate is
95 * necessary exported flush API is used here. Doing clean
96 * on already clean cache would be almost NOP.
97 */
98 bl v7_flush_dcache_all
99
100 /*
101 * Switch the CPU from Symmetric Multiprocessing (SMP) mode
102 * to AsymmetricMultiprocessing (AMP) mode by programming
103 * the SCU power status to DORMANT or OFF mode.
104 * This enables the CPU to be taken out of coherency by
105 * preventing the CPU from receiving cache, TLB, or BTB
106 * maintenance operations broadcast by other CPUs in the cluster.
107 */
108 bl omap4_get_sar_ram_base
109 mov r8, r0
110 ldr r9, [r8, #OMAP_TYPE_OFFSET]
111 cmp r9, #0x1 @ Check for HS device
112 bne scu_gp_set
113 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
114 ands r0, r0, #0x0f
115 ldreq r0, [r8, #SCU_OFFSET0]
116 ldrne r0, [r8, #SCU_OFFSET1]
117 mov r1, #0x00
118 stmfd r13!, {r4-r12, r14}
119 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
120 DO_SMC
121 ldmfd r13!, {r4-r12, r14}
122 b skip_scu_gp_set
123scu_gp_set:
124 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
125 ands r0, r0, #0x0f
126 ldreq r1, [r8, #SCU_OFFSET0]
127 ldrne r1, [r8, #SCU_OFFSET1]
128 bl omap4_get_scu_base
129 bl scu_power_mode
130skip_scu_gp_set:
131 mrc p15, 0, r0, c1, c1, 2 @ Read NSACR data
132 tst r0, #(1 << 18)
133 mrcne p15, 0, r0, c1, c0, 1
134 bicne r0, r0, #(1 << 6) @ Disable SMP bit
135 mcrne p15, 0, r0, c1, c0, 1
136 isb
137 dsb
138#ifdef CONFIG_CACHE_L2X0
139 /*
140 * Clean and invalidate the L2 cache.
141 * Common cache-l2x0.c functions can't be used here since it
142 * uses spinlocks. We are out of coherency here with data cache
143 * disabled. The spinlock implementation uses exclusive load/store
144 * instruction which can fail without data cache being enabled.
145 * OMAP4 hardware doesn't support exclusive monitor which can
146 * overcome exclusive access issue. Because of this, CPU can
147 * lead to deadlock.
148 */
149 bl omap4_get_sar_ram_base
150 mov r8, r0
151 mrc p15, 0, r5, c0, c0, 5 @ Read MPIDR
152 ands r5, r5, #0x0f
153 ldreq r0, [r8, #L2X0_SAVE_OFFSET0] @ Retrieve L2 state from SAR
154 ldrne r0, [r8, #L2X0_SAVE_OFFSET1] @ memory.
155 cmp r0, #3
156 bne do_WFI
157#ifdef CONFIG_PL310_ERRATA_727915
158 mov r0, #0x03
159 mov r12, #OMAP4_MON_L2X0_DBG_CTRL_INDEX
160 DO_SMC
161#endif
162 bl omap4_get_l2cache_base
163 mov r2, r0
164 ldr r0, =0xffff
165 str r0, [r2, #L2X0_CLEAN_INV_WAY]
166wait:
167 ldr r0, [r2, #L2X0_CLEAN_INV_WAY]
168 ldr r1, =0xffff
169 ands r0, r0, r1
170 bne wait
171#ifdef CONFIG_PL310_ERRATA_727915
172 mov r0, #0x00
173 mov r12, #OMAP4_MON_L2X0_DBG_CTRL_INDEX
174 DO_SMC
175#endif
176l2x_sync:
177 bl omap4_get_l2cache_base
178 mov r2, r0
179 mov r0, #0x0
180 str r0, [r2, #L2X0_CACHE_SYNC]
181sync:
182 ldr r0, [r2, #L2X0_CACHE_SYNC]
183 ands r0, r0, #0x1
184 bne sync
185#endif
186
187do_WFI:
188 bl omap_do_wfi
189
190 /*
191 * CPU is here when it failed to enter OFF/DORMANT or
192 * no low power state was attempted.
193 */
194 mrc p15, 0, r0, c1, c0, 0
195 tst r0, #(1 << 2) @ Check C bit enabled?
196 orreq r0, r0, #(1 << 2) @ Enable the C bit
197 mcreq p15, 0, r0, c1, c0, 0
198 isb
199
200 /*
201 * Ensure the CPU power state is set to NORMAL in
202 * SCU power state so that CPU is back in coherency.
203 * In non-coherent mode CPU can lock-up and lead to
204 * system deadlock.
205 */
206 mrc p15, 0, r0, c1, c0, 1
207 tst r0, #(1 << 6) @ Check SMP bit enabled?
208 orreq r0, r0, #(1 << 6)
209 mcreq p15, 0, r0, c1, c0, 1
210 isb
211 bl omap4_get_sar_ram_base
212 mov r8, r0
213 ldr r9, [r8, #OMAP_TYPE_OFFSET]
214 cmp r9, #0x1 @ Check for HS device
215 bne scu_gp_clear
216 mov r0, #SCU_PM_NORMAL
217 mov r1, #0x00
218 stmfd r13!, {r4-r12, r14}
219 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
220 DO_SMC
221 ldmfd r13!, {r4-r12, r14}
222 b skip_scu_gp_clear
223scu_gp_clear:
224 bl omap4_get_scu_base
225 mov r1, #SCU_PM_NORMAL
226 bl scu_power_mode
227skip_scu_gp_clear:
228 isb
229 dsb
230 ldmfd sp!, {pc}
231ENDPROC(omap4_finish_suspend)
232
233/*
234 * ============================
235 * == CPU resume entry point ==
236 * ============================
237 *
238 * void omap4_cpu_resume(void)
239 *
240 * ROM code jumps to this function while waking up from CPU
241 * OFF or DORMANT state. Physical address of the function is
242 * stored in the SAR RAM while entering to OFF or DORMANT mode.
243 * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
244 */
245ENTRY(omap4_cpu_resume)
246 /*
247 * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
248 * OMAP44XX EMU/HS devices - CPU0 SMP bit access is enabled in PPA
249 * init and for CPU1, a secure PPA API provided. CPU0 must be ON
250 * while executing NS_SMP API on CPU1 and PPA version must be 1.4.0+.
251 * OMAP443X GP devices- SMP bit isn't accessible.
252 * OMAP446X GP devices - SMP bit access is enabled on both CPUs.
253 */
254 ldr r8, =OMAP44XX_SAR_RAM_BASE
255 ldr r9, [r8, #OMAP_TYPE_OFFSET]
256 cmp r9, #0x1 @ Skip if GP device
257 bne skip_ns_smp_enable
258 mrc p15, 0, r0, c0, c0, 5
259 ands r0, r0, #0x0f
260 beq skip_ns_smp_enable
261ppa_actrl_retry:
262 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
263 adr r3, ppa_zero_params @ Pointer to parameters
264 mov r1, #0x0 @ Process ID
265 mov r2, #0x4 @ Flag
266 mov r6, #0xff
267 mov r12, #0x00 @ Secure Service ID
268 DO_SMC
269 cmp r0, #0x0 @ API returns 0 on success.
270 beq enable_smp_bit
271 b ppa_actrl_retry
272enable_smp_bit:
273 mrc p15, 0, r0, c1, c0, 1
274 tst r0, #(1 << 6) @ Check SMP bit enabled?
275 orreq r0, r0, #(1 << 6)
276 mcreq p15, 0, r0, c1, c0, 1
277 isb
278skip_ns_smp_enable:
279#ifdef CONFIG_CACHE_L2X0
280 /*
281 * Restore the L2 AUXCTRL and enable the L2 cache.
282 * OMAP4_MON_L2X0_AUXCTRL_INDEX = Program the L2X0 AUXCTRL
283 * OMAP4_MON_L2X0_CTRL_INDEX = Enable the L2 using L2X0 CTRL
284 * register r0 contains value to be programmed.
285 * L2 cache is already invalidate by ROM code as part
286 * of MPUSS OFF wakeup path.
287 */
288 ldr r2, =OMAP44XX_L2CACHE_BASE
289 ldr r0, [r2, #L2X0_CTRL]
290 and r0, #0x0f
291 cmp r0, #1
292 beq skip_l2en @ Skip if already enabled
293 ldr r3, =OMAP44XX_SAR_RAM_BASE
294 ldr r1, [r3, #OMAP_TYPE_OFFSET]
295 cmp r1, #0x1 @ Check for HS device
296 bne set_gp_por
297 ldr r0, =OMAP4_PPA_L2_POR_INDEX
298 ldr r1, =OMAP44XX_SAR_RAM_BASE
299 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
300 adr r3, ppa_por_params
301 str r4, [r3, #0x04]
302 mov r1, #0x0 @ Process ID
303 mov r2, #0x4 @ Flag
304 mov r6, #0xff
305 mov r12, #0x00 @ Secure Service ID
306 DO_SMC
307 b set_aux_ctrl
308set_gp_por:
309 ldr r1, =OMAP44XX_SAR_RAM_BASE
310 ldr r0, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
311 ldr r12, =OMAP4_MON_L2X0_PREFETCH_INDEX @ Setup L2 PREFETCH
312 DO_SMC
313set_aux_ctrl:
314 ldr r1, =OMAP44XX_SAR_RAM_BASE
315 ldr r0, [r1, #L2X0_AUXCTRL_OFFSET]
316 ldr r12, =OMAP4_MON_L2X0_AUXCTRL_INDEX @ Setup L2 AUXCTRL
317 DO_SMC
318 mov r0, #0x1
319 ldr r12, =OMAP4_MON_L2X0_CTRL_INDEX @ Enable L2 cache
320 DO_SMC
321skip_l2en:
322#endif
323
324 b cpu_resume @ Jump to generic resume
325ENDPROC(omap4_cpu_resume)
326#endif
327
328#ifndef CONFIG_OMAP4_ERRATA_I688
329ENTRY(omap_bus_sync)
330 mov pc, lr
331ENDPROC(omap_bus_sync)
332#endif
333
334ENTRY(omap_do_wfi)
335 stmfd sp!, {lr}
336 /* Drain interconnect write buffers. */
337 bl omap_bus_sync
338
339 /*
340 * Execute an ISB instruction to ensure that all of the
341 * CP15 register changes have been committed.
342 */
343 isb
344
345 /*
346 * Execute a barrier instruction to ensure that all cache,
347 * TLB and branch predictor maintenance operations issued
348 * by any CPU in the cluster have completed.
349 */
350 dsb
351 dmb
352
353 /*
354 * Execute a WFI instruction and wait until the
355 * STANDBYWFI output is asserted to indicate that the
356 * CPU is in idle and low power state. CPU can specualatively
357 * prefetch the instructions so add NOPs after WFI. Sixteen
358 * NOPs as per Cortex-A9 pipeline.
359 */
360 wfi @ Wait For Interrupt
361 nop
362 nop
363 nop
364 nop
365 nop
366 nop
367 nop
368 nop
369 nop
370 nop
371 nop
372 nop
373 nop
374 nop
375 nop
376 nop
377
378 ldmfd sp!, {pc}
379ENDPROC(omap_do_wfi)
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 89ae29847c59..771dc781b746 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -28,51 +28,28 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <plat/usb.h> 30#include <plat/usb.h>
31#include <plat/omap_device.h>
31 32
32#include "mux.h" 33#include "mux.h"
33 34
34#ifdef CONFIG_MFD_OMAP_USB_HOST 35#ifdef CONFIG_MFD_OMAP_USB_HOST
35 36
36#define OMAP_USBHS_DEVICE "usbhs-omap" 37#define OMAP_USBHS_DEVICE "usbhs_omap"
37 38#define USBHS_UHH_HWMODNAME "usb_host_hs"
38static struct resource usbhs_resources[] = { 39#define USBHS_TLL_HWMODNAME "usb_tll_hs"
39 {
40 .name = "uhh",
41 .flags = IORESOURCE_MEM,
42 },
43 {
44 .name = "tll",
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .name = "ehci",
49 .flags = IORESOURCE_MEM,
50 },
51 {
52 .name = "ehci-irq",
53 .flags = IORESOURCE_IRQ,
54 },
55 {
56 .name = "ohci",
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .name = "ohci-irq",
61 .flags = IORESOURCE_IRQ,
62 }
63};
64
65static struct platform_device usbhs_device = {
66 .name = OMAP_USBHS_DEVICE,
67 .id = 0,
68 .num_resources = ARRAY_SIZE(usbhs_resources),
69 .resource = usbhs_resources,
70};
71 40
72static struct usbhs_omap_platform_data usbhs_data; 41static struct usbhs_omap_platform_data usbhs_data;
73static struct ehci_hcd_omap_platform_data ehci_data; 42static struct ehci_hcd_omap_platform_data ehci_data;
74static struct ohci_hcd_omap_platform_data ohci_data; 43static struct ohci_hcd_omap_platform_data ohci_data;
75 44
45static struct omap_device_pm_latency omap_uhhtll_latency[] = {
46 {
47 .deactivate_func = omap_device_idle_hwmods,
48 .activate_func = omap_device_enable_hwmods,
49 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
50 },
51};
52
76/* MUX settings for EHCI pins */ 53/* MUX settings for EHCI pins */
77/* 54/*
78 * setup_ehci_io_mux - initialize IO pad mux for USBHOST 55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
@@ -508,7 +485,10 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
508 485
509void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 486void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
510{ 487{
511 int i; 488 struct omap_hwmod *oh[2];
489 struct omap_device *od;
490 int bus_id = -1;
491 int i;
512 492
513 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { 493 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
514 usbhs_data.port_mode[i] = pdata->port_mode[i]; 494 usbhs_data.port_mode[i] = pdata->port_mode[i];
@@ -523,44 +503,34 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
523 usbhs_data.ohci_data = &ohci_data; 503 usbhs_data.ohci_data = &ohci_data;
524 504
525 if (cpu_is_omap34xx()) { 505 if (cpu_is_omap34xx()) {
526 usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE;
527 usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
528 usbhs_resources[1].start = OMAP34XX_USBTLL_BASE;
529 usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
530 usbhs_resources[2].start = OMAP34XX_EHCI_BASE;
531 usbhs_resources[2].end = OMAP34XX_EHCI_BASE + SZ_1K - 1;
532 usbhs_resources[3].start = INT_34XX_EHCI_IRQ;
533 usbhs_resources[4].start = OMAP34XX_OHCI_BASE;
534 usbhs_resources[4].end = OMAP34XX_OHCI_BASE + SZ_1K - 1;
535 usbhs_resources[5].start = INT_34XX_OHCI_IRQ;
536 setup_ehci_io_mux(pdata->port_mode); 506 setup_ehci_io_mux(pdata->port_mode);
537 setup_ohci_io_mux(pdata->port_mode); 507 setup_ohci_io_mux(pdata->port_mode);
538 } else if (cpu_is_omap44xx()) { 508 } else if (cpu_is_omap44xx()) {
539 usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE;
540 usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + SZ_1K - 1;
541 usbhs_resources[1].start = OMAP44XX_USBTLL_BASE;
542 usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
543 usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE;
544 usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
545 usbhs_resources[3].start = OMAP44XX_IRQ_EHCI;
546 usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE;
547 usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + SZ_1K - 1;
548 usbhs_resources[5].start = OMAP44XX_IRQ_OHCI;
549 setup_4430ehci_io_mux(pdata->port_mode); 509 setup_4430ehci_io_mux(pdata->port_mode);
550 setup_4430ohci_io_mux(pdata->port_mode); 510 setup_4430ohci_io_mux(pdata->port_mode);
551 } 511 }
552 512
553 if (platform_device_add_data(&usbhs_device, 513 oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
554 &usbhs_data, sizeof(usbhs_data)) < 0) { 514 if (!oh[0]) {
555 printk(KERN_ERR "USBHS platform_device_add_data failed\n"); 515 pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME);
556 goto init_end; 516 return;
557 } 517 }
558 518
559 if (platform_device_register(&usbhs_device) < 0) 519 oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
560 printk(KERN_ERR "USBHS platform_device_register failed\n"); 520 if (!oh[1]) {
521 pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME);
522 return;
523 }
561 524
562init_end: 525 od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
563 return; 526 (void *)&usbhs_data, sizeof(usbhs_data),
527 omap_uhhtll_latency,
528 ARRAY_SIZE(omap_uhhtll_latency), false);
529 if (IS_ERR(od)) {
530 pr_err("Could not build hwmod devices %s,%s\n",
531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532 return;
533 }
564} 534}
565 535
566#else 536#else
@@ -570,5 +540,3 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
570} 540}
571 541
572#endif 542#endif
573
574
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 267975086a7b..8d5ed775dd56 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -93,6 +93,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
93 if (cpu_is_omap3517() || cpu_is_omap3505()) { 93 if (cpu_is_omap3517() || cpu_is_omap3505()) {
94 oh_name = "am35x_otg_hs"; 94 oh_name = "am35x_otg_hs";
95 name = "musb-am35x"; 95 name = "musb-am35x";
96 } else if (cpu_is_ti81xx()) {
97 oh_name = "usb_otg_hs";
98 name = "musb-ti81xx";
96 } else { 99 } else {
97 oh_name = "usb_otg_hs"; 100 oh_name = "usb_otg_hs";
98 name = "musb-omap2430"; 101 name = "musb-omap2430";
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 474559d5b072..c005e2f5e383 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -31,6 +31,14 @@
31 * VDD data 31 * VDD data
32 */ 32 */
33 33
34/* OMAP3-common voltagedomain data */
35
36static struct voltagedomain omap3_voltdm_wkup = {
37 .name = "wakeup",
38};
39
40/* 34xx/36xx voltagedomain data */
41
34static const struct omap_vfsm_instance omap3_vdd1_vfsm = { 42static const struct omap_vfsm_instance omap3_vdd1_vfsm = {
35 .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, 43 .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET,
36 .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, 44 .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK,
@@ -63,10 +71,6 @@ static struct voltagedomain omap3_voltdm_core = {
63 .vp = &omap3_vp_core, 71 .vp = &omap3_vp_core,
64}; 72};
65 73
66static struct voltagedomain omap3_voltdm_wkup = {
67 .name = "wakeup",
68};
69
70static struct voltagedomain *voltagedomains_omap3[] __initdata = { 74static struct voltagedomain *voltagedomains_omap3[] __initdata = {
71 &omap3_voltdm_mpu, 75 &omap3_voltdm_mpu,
72 &omap3_voltdm_core, 76 &omap3_voltdm_core,
@@ -74,11 +78,30 @@ static struct voltagedomain *voltagedomains_omap3[] __initdata = {
74 NULL, 78 NULL,
75}; 79};
76 80
81/* AM35xx voltagedomain data */
82
83static struct voltagedomain am35xx_voltdm_mpu = {
84 .name = "mpu_iva",
85};
86
87static struct voltagedomain am35xx_voltdm_core = {
88 .name = "core",
89};
90
91static struct voltagedomain *voltagedomains_am35xx[] __initdata = {
92 &am35xx_voltdm_mpu,
93 &am35xx_voltdm_core,
94 &omap3_voltdm_wkup,
95 NULL,
96};
97
98
77static const char *sys_clk_name __initdata = "sys_ck"; 99static const char *sys_clk_name __initdata = "sys_ck";
78 100
79void __init omap3xxx_voltagedomains_init(void) 101void __init omap3xxx_voltagedomains_init(void)
80{ 102{
81 struct voltagedomain *voltdm; 103 struct voltagedomain *voltdm;
104 struct voltagedomain **voltdms;
82 int i; 105 int i;
83 106
84 /* 107 /*
@@ -93,8 +116,13 @@ void __init omap3xxx_voltagedomains_init(void)
93 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; 116 omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
94 } 117 }
95 118
96 for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) 119 if (cpu_is_omap3517() || cpu_is_omap3505())
120 voltdms = voltagedomains_am35xx;
121 else
122 voltdms = voltagedomains_omap3;
123
124 for (i = 0; voltdm = voltdms[i], voltdm; i++)
97 voltdm->sys_clk.name = sys_clk_name; 125 voltdm->sys_clk.name = sys_clk_name;
98 126
99 voltdm_init(voltagedomains_omap3); 127 voltdm_init(voltdms);
100}; 128};
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 5ceafdccc456..3638e5c12b7e 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -14,8 +14,8 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/errno.h>
18#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <plat/addr-map.h>
19#include "common.h" 19#include "common.h"
20 20
21/* 21/*
@@ -41,7 +41,6 @@
41/* 41/*
42 * Generic Address Decode Windows bit settings 42 * Generic Address Decode Windows bit settings
43 */ 43 */
44#define TARGET_DDR 0
45#define TARGET_DEV_BUS 1 44#define TARGET_DEV_BUS 1
46#define TARGET_PCI 3 45#define TARGET_PCI 3
47#define TARGET_PCIE 4 46#define TARGET_PCIE 4
@@ -57,27 +56,10 @@
57#define ATTR_DEV_BOOT 0xf 56#define ATTR_DEV_BOOT 0xf
58#define ATTR_SRAM 0x0 57#define ATTR_SRAM 0x0
59 58
60/*
61 * Helpers to get DDR bank info
62 */
63#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x))
64#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3))
65#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3))
66
67/*
68 * CPU Address Decode Windows registers
69 */
70#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x))
71#define CPU_WIN_CTRL(n) ORION5X_BRIDGE_REG(0x000 | ((n) << 4))
72#define CPU_WIN_BASE(n) ORION5X_BRIDGE_REG(0x004 | ((n) << 4))
73#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
74#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
75
76
77struct mbus_dram_target_info orion5x_mbus_dram_info;
78static int __initdata win_alloc_count; 59static int __initdata win_alloc_count;
79 60
80static int __init orion5x_cpu_win_can_remap(int win) 61static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
62 const int win)
81{ 63{
82 u32 dev, rev; 64 u32 dev, rev;
83 65
@@ -91,116 +73,82 @@ static int __init orion5x_cpu_win_can_remap(int win)
91 return 0; 73 return 0;
92} 74}
93 75
94static int __init setup_cpu_win(int win, u32 base, u32 size, 76/*
95 u8 target, u8 attr, int remap) 77 * Description of the windows needed by the platform code
96{ 78 */
97 if (win >= 8) { 79static struct __initdata orion_addr_map_cfg addr_map_cfg = {
98 printk(KERN_ERR "setup_cpu_win: trying to allocate " 80 .num_wins = 8,
99 "window %d\n", win); 81 .cpu_win_can_remap = cpu_win_can_remap,
100 return -ENOSPC; 82 .bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
101 } 83};
102
103 writel(base & 0xffff0000, CPU_WIN_BASE(win));
104 writel(((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1,
105 CPU_WIN_CTRL(win));
106
107 if (orion5x_cpu_win_can_remap(win)) {
108 if (remap < 0)
109 remap = base;
110
111 writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win));
112 writel(0, CPU_WIN_REMAP_HI(win));
113 }
114 return 0;
115}
116
117void __init orion5x_setup_cpu_mbus_bridge(void)
118{
119 int i;
120 int cs;
121 84
85static const struct __initdata orion_addr_map_info addr_map_info[] = {
122 /* 86 /*
123 * First, disable and clear windows. 87 * Setup windows for PCI+PCIe IO+MEM space.
124 */ 88 */
125 for (i = 0; i < 8; i++) { 89 { 0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
126 writel(0, CPU_WIN_BASE(i)); 90 TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE
127 writel(0, CPU_WIN_CTRL(i)); 91 },
128 if (orion5x_cpu_win_can_remap(i)) { 92 { 1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
129 writel(0, CPU_WIN_REMAP_LO(i)); 93 TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE
130 writel(0, CPU_WIN_REMAP_HI(i)); 94 },
131 } 95 { 2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
132 } 96 TARGET_PCIE, ATTR_PCIE_MEM, -1
97 },
98 { 3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
99 TARGET_PCI, ATTR_PCI_MEM, -1
100 },
101 /* End marker */
102 { -1, 0, 0, 0, 0, 0 }
103};
133 104
105void __init orion5x_setup_cpu_mbus_bridge(void)
106{
134 /* 107 /*
135 * Setup windows for PCI+PCIe IO+MEM space. 108 * Disable, clear and configure windows.
136 */ 109 */
137 setup_cpu_win(0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE, 110 orion_config_wins(&addr_map_cfg, addr_map_info);
138 TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE);
139 setup_cpu_win(1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
140 TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE);
141 setup_cpu_win(2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
142 TARGET_PCIE, ATTR_PCIE_MEM, -1);
143 setup_cpu_win(3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
144 TARGET_PCI, ATTR_PCI_MEM, -1);
145 win_alloc_count = 4; 111 win_alloc_count = 4;
146 112
147 /* 113 /*
148 * Setup MBUS dram target info. 114 * Setup MBUS dram target info.
149 */ 115 */
150 orion5x_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; 116 orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE);
151
152 for (i = 0, cs = 0; i < 4; i++) {
153 u32 base = readl(DDR_BASE_CS(i));
154 u32 size = readl(DDR_SIZE_CS(i));
155
156 /*
157 * Chip select enabled?
158 */
159 if (size & 1) {
160 struct mbus_dram_window *w;
161
162 w = &orion5x_mbus_dram_info.cs[cs++];
163 w->cs_index = i;
164 w->mbus_attr = 0xf & ~(1 << i);
165 w->base = base & 0xffff0000;
166 w->size = (size | 0x0000ffff) + 1;
167 }
168 }
169 orion5x_mbus_dram_info.num_cs = cs;
170} 117}
171 118
172void __init orion5x_setup_dev_boot_win(u32 base, u32 size) 119void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
173{ 120{
174 setup_cpu_win(win_alloc_count++, base, size, 121 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
175 TARGET_DEV_BUS, ATTR_DEV_BOOT, -1); 122 TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
176} 123}
177 124
178void __init orion5x_setup_dev0_win(u32 base, u32 size) 125void __init orion5x_setup_dev0_win(u32 base, u32 size)
179{ 126{
180 setup_cpu_win(win_alloc_count++, base, size, 127 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
181 TARGET_DEV_BUS, ATTR_DEV_CS0, -1); 128 TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
182} 129}
183 130
184void __init orion5x_setup_dev1_win(u32 base, u32 size) 131void __init orion5x_setup_dev1_win(u32 base, u32 size)
185{ 132{
186 setup_cpu_win(win_alloc_count++, base, size, 133 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
187 TARGET_DEV_BUS, ATTR_DEV_CS1, -1); 134 TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
188} 135}
189 136
190void __init orion5x_setup_dev2_win(u32 base, u32 size) 137void __init orion5x_setup_dev2_win(u32 base, u32 size)
191{ 138{
192 setup_cpu_win(win_alloc_count++, base, size, 139 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
193 TARGET_DEV_BUS, ATTR_DEV_CS2, -1); 140 TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
194} 141}
195 142
196void __init orion5x_setup_pcie_wa_win(u32 base, u32 size) 143void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
197{ 144{
198 setup_cpu_win(win_alloc_count++, base, size, 145 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
199 TARGET_PCIE, ATTR_PCIE_WA, -1); 146 TARGET_PCIE, ATTR_PCIE_WA, -1);
200} 147}
201 148
202int __init orion5x_setup_sram_win(void) 149void __init orion5x_setup_sram_win(void)
203{ 150{
204 return setup_cpu_win(win_alloc_count++, ORION5X_SRAM_PHYS_BASE, 151 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++,
205 ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1); 152 ORION5X_SRAM_PHYS_BASE, ORION5X_SRAM_SIZE,
153 TARGET_SRAM, ATTR_SRAM, -1);
206} 154}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 41127e80cc1e..0e28bae20bd4 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -15,7 +15,6 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
18#include <linux/mbus.h>
19#include <linux/mv643xx_i2c.h> 18#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h> 19#include <linux/ata_platform.h>
21#include <linux/delay.h> 20#include <linux/delay.h>
@@ -32,6 +31,7 @@
32#include <plat/orion_nand.h> 31#include <plat/orion_nand.h>
33#include <plat/time.h> 32#include <plat/time.h>
34#include <plat/common.h> 33#include <plat/common.h>
34#include <plat/addr-map.h>
35#include "common.h" 35#include "common.h"
36 36
37/***************************************************************************** 37/*****************************************************************************
@@ -72,8 +72,7 @@ void __init orion5x_map_io(void)
72 ****************************************************************************/ 72 ****************************************************************************/
73void __init orion5x_ehci0_init(void) 73void __init orion5x_ehci0_init(void)
74{ 74{
75 orion_ehci_init(&orion5x_mbus_dram_info, 75 orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
76 ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
77} 76}
78 77
79 78
@@ -82,8 +81,7 @@ void __init orion5x_ehci0_init(void)
82 ****************************************************************************/ 81 ****************************************************************************/
83void __init orion5x_ehci1_init(void) 82void __init orion5x_ehci1_init(void)
84{ 83{
85 orion_ehci_1_init(&orion5x_mbus_dram_info, 84 orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
86 ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
87} 85}
88 86
89 87
@@ -92,7 +90,7 @@ void __init orion5x_ehci1_init(void)
92 ****************************************************************************/ 90 ****************************************************************************/
93void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) 91void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
94{ 92{
95 orion_ge00_init(eth_data, &orion5x_mbus_dram_info, 93 orion_ge00_init(eth_data,
96 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, 94 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
97 IRQ_ORION5X_ETH_ERR, orion5x_tclk); 95 IRQ_ORION5X_ETH_ERR, orion5x_tclk);
98} 96}
@@ -122,8 +120,7 @@ void __init orion5x_i2c_init(void)
122 ****************************************************************************/ 120 ****************************************************************************/
123void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) 121void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
124{ 122{
125 orion_sata_init(sata_data, &orion5x_mbus_dram_info, 123 orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
126 ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
127} 124}
128 125
129 126
@@ -159,8 +156,7 @@ void __init orion5x_uart1_init(void)
159 ****************************************************************************/ 156 ****************************************************************************/
160void __init orion5x_xor_init(void) 157void __init orion5x_xor_init(void)
161{ 158{
162 orion_xor0_init(&orion5x_mbus_dram_info, 159 orion_xor0_init(ORION5X_XOR_PHYS_BASE,
163 ORION5X_XOR_PHYS_BASE,
164 ORION5X_XOR_PHYS_BASE + 0x200, 160 ORION5X_XOR_PHYS_BASE + 0x200,
165 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1); 161 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
166} 162}
@@ -170,12 +166,7 @@ void __init orion5x_xor_init(void)
170 ****************************************************************************/ 166 ****************************************************************************/
171static void __init orion5x_crypto_init(void) 167static void __init orion5x_crypto_init(void)
172{ 168{
173 int ret; 169 orion5x_setup_sram_win();
174
175 ret = orion5x_setup_sram_win();
176 if (ret)
177 return;
178
179 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE, 170 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
180 SZ_8K, IRQ_ORION5X_CESA); 171 SZ_8K, IRQ_ORION5X_CESA);
181} 172}
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 37ef18de61b7..d2513ac79ff5 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -20,14 +20,13 @@ extern struct sys_timer orion5x_timer;
20 * functions to map its interfaces and by the machine-setup to map its on- 20 * functions to map its interfaces and by the machine-setup to map its on-
21 * board devices. Details in /mach-orion/addr-map.c 21 * board devices. Details in /mach-orion/addr-map.c
22 */ 22 */
23extern struct mbus_dram_target_info orion5x_mbus_dram_info;
24void orion5x_setup_cpu_mbus_bridge(void); 23void orion5x_setup_cpu_mbus_bridge(void);
25void orion5x_setup_dev_boot_win(u32 base, u32 size); 24void orion5x_setup_dev_boot_win(u32 base, u32 size);
26void orion5x_setup_dev0_win(u32 base, u32 size); 25void orion5x_setup_dev0_win(u32 base, u32 size);
27void orion5x_setup_dev1_win(u32 base, u32 size); 26void orion5x_setup_dev1_win(u32 base, u32 size);
28void orion5x_setup_dev2_win(u32 base, u32 size); 27void orion5x_setup_dev2_win(u32 base, u32 size);
29void orion5x_setup_pcie_wa_win(u32 base, u32 size); 28void orion5x_setup_pcie_wa_win(u32 base, u32 size);
30int orion5x_setup_sram_win(void); 29void orion5x_setup_sram_win(void);
31 30
32void orion5x_ehci0_init(void); 31void orion5x_ehci0_init(void);
33void orion5x_ehci1_init(void); 32void orion5x_ehci1_init(void);
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 0a28bbc76891..2745f5d95b3f 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -69,7 +69,7 @@
69 ******************************************************************************/ 69 ******************************************************************************/
70 70
71#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000) 71#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000)
72 72#define ORION5X_DDR_WINDOW_CPU_BASE (ORION5X_DDR_VIRT_BASE | 0x1500)
73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) 75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index b6ddd7a5db6a..5b70026f478c 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -10,7 +10,6 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h> 13#include <linux/io.h>
15#include <mach/hardware.h> 14#include <mach/hardware.h>
16#include <plat/mpp.h> 15#include <plat/mpp.h>
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index bc4a920e26ee..a494c470e3e4 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -18,6 +18,7 @@
18#include <asm/irq.h> 18#include <asm/irq.h>
19#include <asm/mach/pci.h> 19#include <asm/mach/pci.h>
20#include <plat/pcie.h> 20#include <plat/pcie.h>
21#include <plat/addr-map.h>
21#include "common.h" 22#include "common.h"
22 23
23/***************************************************************************** 24/*****************************************************************************
@@ -145,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
145 /* 146 /*
146 * Generic PCIe unit setup. 147 * Generic PCIe unit setup.
147 */ 148 */
148 orion_pcie_setup(PCIE_BASE, &orion5x_mbus_dram_info); 149 orion_pcie_setup(PCIE_BASE);
149 150
150 /* 151 /*
151 * Check whether to apply Orion-1/Orion-NAS PCIe config 152 * Check whether to apply Orion-1/Orion-NAS PCIe config
@@ -477,7 +478,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
477 /* 478 /*
478 * Point PCI unit MBUS decode windows to DRAM space. 479 * Point PCI unit MBUS decode windows to DRAM space.
479 */ 480 */
480 orion5x_setup_pci_wins(&orion5x_mbus_dram_info); 481 orion5x_setup_pci_wins(&orion_mbus_dram_info);
481 482
482 /* 483 /*
483 * Master + Slave enable 484 * Master + Slave enable
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile
index c550b6363488..e5ec4a8d9bcb 100644
--- a/arch/arm/mach-picoxcell/Makefile
+++ b/arch/arm/mach-picoxcell/Makefile
@@ -1,3 +1,2 @@
1obj-y := common.o 1obj-y := common.o
2obj-y += time.o 2obj-y += time.o
3obj-y += io.o
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index ad871bd7b1ab..a2e8ae8b5821 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -7,6 +7,7 @@
7 * 7 *
8 * All enquiries to support@picochip.com 8 * All enquiries to support@picochip.com
9 */ 9 */
10#include <linux/delay.h>
10#include <linux/irq.h> 11#include <linux/irq.h>
11#include <linux/irqdomain.h> 12#include <linux/irqdomain.h>
12#include <linux/of.h> 13#include <linux/of.h>
@@ -16,15 +17,49 @@
16 17
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/hardware/vic.h> 19#include <asm/hardware/vic.h>
20#include <asm/mach/map.h>
19 21
20#include <mach/map.h> 22#include <mach/map.h>
21#include <mach/picoxcell_soc.h> 23#include <mach/picoxcell_soc.h>
22 24
23#include "common.h" 25#include "common.h"
24 26
27#define WDT_CTRL_REG_EN_MASK (1 << 0)
28#define WDT_CTRL_REG_OFFS (0x00)
29#define WDT_TIMEOUT_REG_OFFS (0x04)
30static void __iomem *wdt_regs;
31
32/*
33 * The machine restart method can be called from an atomic context so we won't
34 * be able to ioremap the regs then.
35 */
36static void picoxcell_setup_restart(void)
37{
38 struct device_node *np = of_find_compatible_node(NULL, NULL,
39 "snps,dw-apb-wdg");
40 if (WARN(!np, "unable to setup watchdog restart"))
41 return;
42
43 wdt_regs = of_iomap(np, 0);
44 WARN(!wdt_regs, "failed to remap watchdog regs");
45}
46
47static struct map_desc io_map __initdata = {
48 .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
49 .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
50 .length = PICOXCELL_PERIPH_LENGTH,
51 .type = MT_DEVICE,
52};
53
54static void __init picoxcell_map_io(void)
55{
56 iotable_init(&io_map, 1);
57}
58
25static void __init picoxcell_init_machine(void) 59static void __init picoxcell_init_machine(void)
26{ 60{
27 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 61 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
62 picoxcell_setup_restart();
28} 63}
29 64
30static const char *picoxcell_dt_match[] = { 65static const char *picoxcell_dt_match[] = {
@@ -43,12 +78,27 @@ static void __init picoxcell_init_irq(void)
43 of_irq_init(vic_of_match); 78 of_irq_init(vic_of_match);
44} 79}
45 80
81static void picoxcell_wdt_restart(char mode, const char *cmd)
82{
83 /*
84 * Configure the watchdog to reset with the shortest possible timeout
85 * and give it chance to do the reset.
86 */
87 if (wdt_regs) {
88 writel_relaxed(WDT_CTRL_REG_EN_MASK, wdt_regs + WDT_CTRL_REG_OFFS);
89 writel_relaxed(0, wdt_regs + WDT_TIMEOUT_REG_OFFS);
90 /* No sleeping, possibly atomic. */
91 mdelay(500);
92 }
93}
94
46DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 95DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
47 .map_io = picoxcell_map_io, 96 .map_io = picoxcell_map_io,
48 .nr_irqs = ARCH_NR_IRQS, 97 .nr_irqs = NR_IRQS_LEGACY,
49 .init_irq = picoxcell_init_irq, 98 .init_irq = picoxcell_init_irq,
50 .handle_irq = vic_handle_irq, 99 .handle_irq = vic_handle_irq,
51 .timer = &picoxcell_timer, 100 .timer = &picoxcell_timer,
52 .init_machine = picoxcell_init_machine, 101 .init_machine = picoxcell_init_machine,
53 .dt_compat = picoxcell_dt_match, 102 .dt_compat = picoxcell_dt_match,
103 .restart = picoxcell_wdt_restart,
54MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
index 5263f0fa095c..83d55ab956a4 100644
--- a/arch/arm/mach-picoxcell/common.h
+++ b/arch/arm/mach-picoxcell/common.h
@@ -13,6 +13,5 @@
13#include <asm/mach/time.h> 13#include <asm/mach/time.h>
14 14
15extern struct sys_timer picoxcell_timer; 15extern struct sys_timer picoxcell_timer;
16extern void picoxcell_map_io(void);
17 16
18#endif /* __PICOXCELL_COMMON_H__ */ 17#endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
index 4d13ed970919..59eac1ee2820 100644
--- a/arch/arm/mach-picoxcell/include/mach/irqs.h
+++ b/arch/arm/mach-picoxcell/include/mach/irqs.h
@@ -1,8 +1,6 @@
1/* 1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles 2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 * 3 *
4 * This file contains the hardware definitions of the picoXcell SoC devices.
5 *
6 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or 6 * the Free Software Foundation; either version 2 of the License, or
@@ -16,10 +14,7 @@
16#ifndef __MACH_IRQS_H 14#ifndef __MACH_IRQS_H
17#define __MACH_IRQS_H 15#define __MACH_IRQS_H
18 16
19#define ARCH_NR_IRQS 64 17/* We dynamically allocate our irq_desc's. */
20#define NR_IRQS (128 + ARCH_NR_IRQS) 18#define NR_IRQS 0
21
22#define IRQ_VIC0_BASE 0
23#define IRQ_VIC1_BASE 32
24 19
25#endif /* __MACH_IRQS_H */ 20#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/memory.h b/arch/arm/mach-picoxcell/include/mach/memory.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/memory.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/arm/mach-picoxcell/io.c b/arch/arm/mach-picoxcell/io.c
deleted file mode 100644
index 39e9b9e8cc37..000000000000
--- a/arch/arm/mach-picoxcell/io.c
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * All enquiries to support@picochip.com
9 */
10#include <linux/io.h>
11#include <linux/mm.h>
12#include <linux/module.h>
13#include <linux/of.h>
14
15#include <asm/mach/map.h>
16
17#include <mach/map.h>
18#include <mach/picoxcell_soc.h>
19
20#include "common.h"
21
22void __init picoxcell_map_io(void)
23{
24 struct map_desc io_map = {
25 .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
26 .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
27 .length = PICOXCELL_PERIPH_LENGTH,
28 .type = MT_DEVICE,
29 };
30
31 iotable_init(&io_map, 1);
32}
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 4cb069fd9af2..ccdac4b6a469 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par)
138{ 138{
139 int i; 139 int i;
140 140
141 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); 141 free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
142 142
143 for (i = 0; i < ARRAY_SIZE(gpios); i++) 143 for (i = 0; i < ARRAY_SIZE(gpios); i++)
144 gpio_free(gpios[i]); 144 gpio_free(gpios[i]);
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info)
292{ 292{
293 int ret; 293 int ret;
294 294
295 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq, 295 ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq,
296 IRQF_DISABLED|IRQF_TRIGGER_FALLING, 296 IRQF_DISABLED|IRQF_TRIGGER_FALLING,
297 "AM200", info->par); 297 "AM200", info->par);
298 if (ret) 298 if (ret)
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index fa8bad235d9f..76c4b9494031 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par)
176{ 176{
177 int i; 177 int i;
178 178
179 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); 179 free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
180 180
181 for (i = 0; i < ARRAY_SIZE(gpios); i++) 181 for (i = 0; i < ARRAY_SIZE(gpios); i++)
182 gpio_free(gpios[i]); 182 gpio_free(gpios[i]);
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)
240 int ret; 240 int ret;
241 struct broadsheetfb_par *par = info->par; 241 struct broadsheetfb_par *par = info->par;
242 242
243 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq, 243 ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq,
244 IRQF_DISABLED|IRQF_TRIGGER_RISING, 244 IRQF_DISABLED|IRQF_TRIGGER_RISING,
245 "AM300", par); 245 "AM300", par);
246 if (ret) 246 if (ret)
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 82514f5c38f1..c35456f02acb 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15 15
16#include <linux/export.h>
16#include <linux/init.h> 17#include <linux/init.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
@@ -179,7 +180,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = {
179}; 180};
180 181
181static struct ucb1400_pdata vpac270_ucb1400_pdata = { 182static struct ucb1400_pdata vpac270_ucb1400_pdata = {
182 .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), 183 .irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
183}; 184};
184 185
185 186
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index c2f0be040d27..c91727d1fe09 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = {
50 .flags = IORESOURCE_MEM 50 .flags = IORESOURCE_MEM
51 }, 51 },
52 [2] = { 52 [2] = {
53 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), 53 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
54 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), 54 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING 55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
56 } 56 }
57}; 57};
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)
80static struct plat_serial8250_port ti16c752_platform_data[] = { 80static struct plat_serial8250_port ti16c752_platform_data[] = {
81 [0] = { 81 [0] = {
82 .mapbase = 0x14000000, 82 .mapbase = 0x14000000,
83 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)), 83 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
84 .irqflags = IRQF_TRIGGER_RISING, 84 .irqflags = IRQF_TRIGGER_RISING,
85 .flags = TI16C752_FLAGS, 85 .flags = TI16C752_FLAGS,
86 .iotype = UPIO_MEM, 86 .iotype = UPIO_MEM,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
89 }, 89 },
90 [1] = { 90 [1] = {
91 .mapbase = 0x14000040, 91 .mapbase = 0x14000040,
92 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)), 92 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
93 .irqflags = IRQF_TRIGGER_RISING, 93 .irqflags = IRQF_TRIGGER_RISING,
94 .flags = TI16C752_FLAGS, 94 .flags = TI16C752_FLAGS,
95 .iotype = UPIO_MEM, 95 .iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
98 }, 98 },
99 [2] = { 99 [2] = {
100 .mapbase = 0x14000080, 100 .mapbase = 0x14000080,
101 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)), 101 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
102 .irqflags = IRQF_TRIGGER_RISING, 102 .irqflags = IRQF_TRIGGER_RISING,
103 .flags = TI16C752_FLAGS, 103 .flags = TI16C752_FLAGS,
104 .iotype = UPIO_MEM, 104 .iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
107 }, 107 },
108 [3] = { 108 [3] = {
109 .mapbase = 0x140000c0, 109 .mapbase = 0x140000c0,
110 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)), 110 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
111 .irqflags = IRQF_TRIGGER_RISING, 111 .irqflags = IRQF_TRIGGER_RISING,
112 .flags = TI16C752_FLAGS, 112 .flags = TI16C752_FLAGS,
113 .iotype = UPIO_MEM, 113 .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 13518a705399..431ef56700c4 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -33,7 +33,7 @@
33/* GPIO IRQ usage */ 33/* GPIO IRQ usage */
34#define GPIO83_MMC_IRQ (83) 34#define GPIO83_MMC_IRQ (83)
35 35
36#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) 36#define CMX270_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
37 37
38/* MMC power enable */ 38/* MMC power enable */
39#define GPIO105_MMC_POWER (105) 39#define GPIO105_MMC_POWER (105)
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = {
380 .modalias = "libertas_spi", 380 .modalias = "libertas_spi",
381 .max_speed_hz = 13000000, 381 .max_speed_hz = 13000000,
382 .bus_num = 2, 382 .bus_num = 2,
383 .irq = gpio_to_irq(95), 383 .irq = PXA_GPIO_TO_IRQ(95),
384 .chip_select = 0, 384 .chip_select = 0,
385 .controller_data = &cm_x270_libertas_chip, 385 .controller_data = &cm_x270_libertas_chip,
386 .platform_data = &cm_x270_libertas_pdata, 386 .platform_data = &cm_x270_libertas_pdata,
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index ec170a552c23..8fa4ad27edf3 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -58,8 +58,8 @@ extern void cmx270_init(void);
58#define CMX255_GPIO_IT8152_IRQ (0) 58#define CMX255_GPIO_IT8152_IRQ (0)
59#define CMX270_GPIO_IT8152_IRQ (22) 59#define CMX270_GPIO_IT8152_IRQ (22)
60 60
61#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) 61#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
62#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) 62#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
63 63
64#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 64#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
65static struct resource cmx255_dm9000_resource[] = { 65static struct resource cmx255_dm9000_resource[] = {
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 7236974da0b7..4b981b82d2a5 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -64,7 +64,7 @@
64#define GPIO82_MMC_IRQ (82) 64#define GPIO82_MMC_IRQ (82)
65#define GPIO85_MMC_WP (85) 65#define GPIO85_MMC_WP (85)
66 66
67#define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) 67#define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
68 68
69#define GPIO95_RTC_CS (95) 69#define GPIO95_RTC_CS (95)
70#define GPIO96_RTC_WR (96) 70#define GPIO96_RTC_WR (96)
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = {
229 .flags = IORESOURCE_MEM, 229 .flags = IORESOURCE_MEM,
230 }, 230 },
231 [2] = { 231 [2] = {
232 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), 232 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
233 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), 233 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
235 } 235 }
236}; 236};
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 6a685165c9f2..29d5d541f602 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -218,8 +218,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = {
218 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
219 }, 219 },
220 { 220 {
221 .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), 221 .start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
222 .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), 222 .end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, 223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
224 }, 224 },
225}; 225};
@@ -249,7 +249,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
249}; 249};
250 250
251static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { 251static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
252 .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ), 252 .irq = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ),
253}; 253};
254 254
255static struct platform_device colibri_pxa270_ucb1400_device = { 255static struct platform_device colibri_pxa270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c01059a61f33..0846d210cb05 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = {
78 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
79 }, 79 },
80 [1] = { 80 [1] = {
81 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 81 .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
82 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 82 .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
83 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 83 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
84 } 84 }
85}; 85};
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 5028f2300d50..6ad3359063af 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = {
115 .flags = IORESOURCE_MEM, 115 .flags = IORESOURCE_MEM,
116 }, 116 },
117 [1] = { 117 [1] = {
118 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 118 .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
119 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 119 .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
120 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 120 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
121 } 121 }
122}; 122};
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 9d4dc5970b9c..66600f05e436 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = {
531 .chip_select = 0, 531 .chip_select = 0,
532 .platform_data = &corgi_ads7846_info, 532 .platform_data = &corgi_ads7846_info,
533 .controller_data= &corgi_ads7846_chip, 533 .controller_data= &corgi_ads7846_chip,
534 .irq = gpio_to_irq(CORGI_GPIO_TP_INT), 534 .irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT),
535 }, { 535 }, {
536 .modalias = "corgi-lcd", 536 .modalias = "corgi-lcd",
537 .max_speed_hz = 50000, 537 .max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 29034778bfda..39e265cfc86d 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/gpio-pxa.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/apm-emulation.h> 21#include <linux/apm-emulation.h>
@@ -40,7 +41,9 @@ static struct gpio charger_gpios[] = {
40 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, 41 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
41 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, 42 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
42 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, 43 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" },
44 { CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
43 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, 45 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" },
46 { CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" },
44}; 47};
45 48
46static void corgi_charger_init(void) 49static void corgi_charger_init(void)
@@ -90,7 +93,12 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
90{ 93{
91 int is_resume = 0; 94 int is_resume = 0;
92 95
93 dev_dbg(sharpsl_pm.dev, "GPLR0 = %x,%x\n", GPLR0, PEDR); 96 dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, "
97 "GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n",
98 PEDR, gpio_get_value(CORGI_GPIO_AC_IN),
99 gpio_get_value(CORGI_GPIO_CHRG_FULL),
100 gpio_get_value(CORGI_GPIO_KEY_INT),
101 gpio_get_value(CORGI_GPIO_WAKEUP));
94 102
95 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { 103 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) {
96 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { 104 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
@@ -124,14 +132,21 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
124 132
125static unsigned long corgi_charger_wakeup(void) 133static unsigned long corgi_charger_wakeup(void)
126{ 134{
127 return ~GPLR0 & ( GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) ); 135 unsigned long ret;
136
137 ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN))
138 | (!gpio_get_value(CORGI_GPIO_KEY_INT)
139 << GPIO_bit(CORGI_GPIO_KEY_INT))
140 | (!gpio_get_value(CORGI_GPIO_WAKEUP)
141 << GPIO_bit(CORGI_GPIO_WAKEUP));
142 return ret;
128} 143}
129 144
130unsigned long corgipm_read_devdata(int type) 145unsigned long corgipm_read_devdata(int type)
131{ 146{
132 switch(type) { 147 switch(type) {
133 case SHARPSL_STATUS_ACIN: 148 case SHARPSL_STATUS_ACIN:
134 return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); 149 return !gpio_get_value(CORGI_GPIO_AC_IN);
135 case SHARPSL_STATUS_LOCK: 150 case SHARPSL_STATUS_LOCK:
136 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); 151 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
137 case SHARPSL_STATUS_CHRGFULL: 152 case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 2e0425404de5..18fd177073f4 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -415,9 +415,29 @@ static struct resource pxa_rtc_resources[] = {
415 }, 415 },
416}; 416};
417 417
418static struct resource sa1100_rtc_resources[] = {
419 [0] = {
420 .start = 0x40900000,
421 .end = 0x409000ff,
422 .flags = IORESOURCE_MEM,
423 },
424 [1] = {
425 .start = IRQ_RTC1Hz,
426 .end = IRQ_RTC1Hz,
427 .flags = IORESOURCE_IRQ,
428 },
429 [2] = {
430 .start = IRQ_RTCAlrm,
431 .end = IRQ_RTCAlrm,
432 .flags = IORESOURCE_IRQ,
433 },
434};
435
418struct platform_device sa1100_device_rtc = { 436struct platform_device sa1100_device_rtc = {
419 .name = "sa1100-rtc", 437 .name = "sa1100-rtc",
420 .id = -1, 438 .id = -1,
439 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
440 .resource = sa1100_rtc_resources,
421}; 441};
422 442
423struct platform_device pxa_device_rtc = { 443struct platform_device pxa_device_rtc = {
@@ -1051,6 +1071,36 @@ struct platform_device pxa3xx_device_ssp4 = {
1051}; 1071};
1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ 1072#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1053 1073
1074struct resource pxa_resource_gpio[] = {
1075 {
1076 .start = 0x40e00000,
1077 .end = 0x40e0ffff,
1078 .flags = IORESOURCE_MEM,
1079 }, {
1080 .start = IRQ_GPIO0,
1081 .end = IRQ_GPIO0,
1082 .name = "gpio0",
1083 .flags = IORESOURCE_IRQ,
1084 }, {
1085 .start = IRQ_GPIO1,
1086 .end = IRQ_GPIO1,
1087 .name = "gpio1",
1088 .flags = IORESOURCE_IRQ,
1089 }, {
1090 .start = IRQ_GPIO_2_x,
1091 .end = IRQ_GPIO_2_x,
1092 .name = "gpio_mux",
1093 .flags = IORESOURCE_IRQ,
1094 },
1095};
1096
1097struct platform_device pxa_device_gpio = {
1098 .name = "pxa-gpio",
1099 .id = -1,
1100 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1101 .resource = pxa_resource_gpio,
1102};
1103
1054/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1104/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1055 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1105 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1056void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) 1106void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 2fd5a8b35757..1475db107254 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp;
16extern struct platform_device sa1100_device_rtc; 16extern struct platform_device sa1100_device_rtc;
17extern struct platform_device pxa_device_rtc; 17extern struct platform_device pxa_device_rtc;
18extern struct platform_device pxa_device_ac97; 18extern struct platform_device pxa_device_ac97;
19extern struct platform_device pxa_device_gpio;
19 20
20extern struct platform_device pxa27x_device_i2c_power; 21extern struct platform_device pxa27x_device_i2c_power;
21extern struct platform_device pxa27x_device_ohci; 22extern struct platform_device pxa27x_device_ohci;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index bd396ba67af7..d80c0ba9a095 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -70,7 +70,7 @@
70/* common GPIOs */ 70/* common GPIOs */
71#define GPIO11_NAND_CS (11) 71#define GPIO11_NAND_CS (11)
72#define GPIO41_ETHIRQ (41) 72#define GPIO41_ETHIRQ (41)
73#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) 73#define EM_X270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)
74#define GPIO115_WLAN_PWEN (115) 74#define GPIO115_WLAN_PWEN (115)
75#define GPIO19_WLAN_STRAP (19) 75#define GPIO19_WLAN_STRAP (19)
76#define GPIO9_USB_VBUS_EN (9) 76#define GPIO9_USB_VBUS_EN (9)
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = {
805 .modalias = "libertas_spi", 805 .modalias = "libertas_spi",
806 .max_speed_hz = 13000000, 806 .max_speed_hz = 13000000,
807 .bus_num = 2, 807 .bus_num = 2,
808 .irq = IRQ_GPIO(116), 808 .irq = PXA_GPIO_TO_IRQ(116),
809 .chip_select = 0, 809 .chip_select = 0,
810 .controller_data = &em_x270_libertas_chip, 810 .controller_data = &em_x270_libertas_chip,
811 .platform_data = &em_x270_libertas_pdata, 811 .platform_data = &em_x270_libertas_pdata,
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {
1203 1203
1204static struct i2c_board_info em_x270_i2c_pmic_info = { 1204static struct i2c_board_info em_x270_i2c_pmic_info = {
1205 I2C_BOARD_INFO("da9030", 0x49), 1205 I2C_BOARD_INFO("da9030", 0x49),
1206 .irq = IRQ_GPIO(0), 1206 .irq = PXA_GPIO_TO_IRQ(0),
1207 .platform_data = &em_x270_da9030_info, 1207 .platform_data = &em_x270_da9030_info,
1208}; 1208};
1209 1209
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 69473db97758..f79a610c62fc 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = {
119 .flags = IORESOURCE_MEM, 119 .flags = IORESOURCE_MEM,
120 }, 120 },
121 [1] = { 121 [1] = {
122 .start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), 122 .start = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
123 .end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), 123 .end = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
124 .flags = IORESOURCE_IRQ, 124 .flags = IORESOURCE_IRQ,
125 }, 125 },
126}; 126};
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index ce16bdae96de..fb9b62dcf4ca 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = {
252 .flags = IORESOURCE_MEM, 252 .flags = IORESOURCE_MEM,
253 }, 253 },
254 [1] = { 254 [1] = {
255 .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), 255 .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
256 .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), 256 .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
257 .flags = IORESOURCE_IRQ, 257 .flags = IORESOURCE_IRQ,
258 }, 258 },
259 /* SD part */ 259 /* SD part */
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = {
263 .flags = IORESOURCE_MEM, 263 .flags = IORESOURCE_MEM,
264 }, 264 },
265 [3] = { 265 [3] = {
266 .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), 266 .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
267 .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), 267 .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
268 .flags = IORESOURCE_IRQ, 268 .flags = IORESOURCE_IRQ,
269 }, 269 },
270}; 270};
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = {
587 .modalias = "ads7846", 587 .modalias = "ads7846",
588 .bus_num = 2, 588 .bus_num = 2,
589 .max_speed_hz = 2600000, /* 100 kHz sample rate */ 589 .max_speed_hz = 2600000, /* 100 kHz sample rate */
590 .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ), 590 .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
591 .platform_data = &tsc2046_info, 591 .platform_data = &tsc2046_info,
592 .controller_data = &tsc2046_chip, 592 .controller_data = &tsc2046_chip,
593 }, 593 },
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = {
635 .name = "ac", 635 .name = "ac",
636 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 636 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
637 IORESOURCE_IRQ_LOWEDGE, 637 IORESOURCE_IRQ_LOWEDGE,
638 .start = gpio_to_irq(GPIOD9_nAC_IN), 638 .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
639 .end = gpio_to_irq(GPIOD9_nAC_IN), 639 .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
640 }, 640 },
641 [1] = { 641 [1] = {
642 .name = "usb", 642 .name = "usb",
643 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 643 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
644 IORESOURCE_IRQ_LOWEDGE, 644 IORESOURCE_IRQ_LOWEDGE,
645 .start = gpio_to_irq(GPIOD14_nUSBC_DETECT), 645 .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
646 .end = gpio_to_irq(GPIOD14_nUSBC_DETECT), 646 .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
647 }, 647 },
648}; 648};
649 649
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index e239b82c99d7..67400192ed3b 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = {
86 .chip_select = 0, 86 .chip_select = 0,
87 .platform_data = &mcp251x_info, 87 .platform_data = &mcp251x_info,
88 .controller_data = &mcp251x_chip_info1, 88 .controller_data = &mcp251x_chip_info1,
89 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ1) 89 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1)
90 }, 90 },
91 { 91 {
92 .modalias = "mcp2515", 92 .modalias = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = {
95 .chip_select = 1, 95 .chip_select = 1,
96 .platform_data = &mcp251x_info, 96 .platform_data = &mcp251x_info,
97 .controller_data = &mcp251x_chip_info2, 97 .controller_data = &mcp251x_chip_info2,
98 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ2) 98 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2)
99 }, 99 },
100 { 100 {
101 .modalias = "mcp2515", 101 .modalias = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = {
104 .chip_select = 0, 104 .chip_select = 0,
105 .platform_data = &mcp251x_info, 105 .platform_data = &mcp251x_info,
106 .controller_data = &mcp251x_chip_info3, 106 .controller_data = &mcp251x_chip_info3,
107 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ3) 107 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3)
108 }, 108 },
109 { 109 {
110 .modalias = "mcp2515", 110 .modalias = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = {
113 .chip_select = 1, 113 .chip_select = 1,
114 .platform_data = &mcp251x_info, 114 .platform_data = &mcp251x_info,
115 .controller_data = &mcp251x_chip_info4, 115 .controller_data = &mcp251x_chip_info4,
116 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4) 116 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4)
117 } 117 }
118}; 118};
119 119
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index fbabd84e110c..8af1840e12cc 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = {
75 .flags = IORESOURCE_MEM, 75 .flags = IORESOURCE_MEM,
76 }, 76 },
77 [1] = { 77 [1] = {
78 .start = IRQ_GPIO(4), 78 .start = PXA_GPIO_TO_IRQ(4),
79 .end = IRQ_GPIO(4), 79 .end = PXA_GPIO_TO_IRQ(4),
80 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 80 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
81 } 81 }
82}; 82};
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 6d7eab3d0867..f02fa1e6ba86 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -172,9 +172,9 @@ enum balloon3_features {
172/* Balloon3 Interrupts */ 172/* Balloon3 Interrupts */
173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) 173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
174 174
175#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) 175#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
176#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) 176#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
177#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) 177#define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
178 178
179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) 179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
180 180
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 5dfd1195a5a7..f3c3493b468d 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -66,18 +66,18 @@
66/* 66/*
67 * Corgi Interrupts 67 * Corgi Interrupts
68 */ 68 */
69#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) 69#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0)
70#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) 70#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
71#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) 71#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3)
72#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) 72#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4)
73#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) 73#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
74#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 74#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
75#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) 75#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10)
76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) 76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11)
77#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) 77#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
78#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ 78#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */
79#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 79#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
80#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ 80#define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */
81 81
82 82
83/* 83/*
@@ -98,7 +98,7 @@
98 CORGI_SCP_MIC_BIAS ) 98 CORGI_SCP_MIC_BIAS )
99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) 99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
100 100
101#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 101#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) 102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ 103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ 104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a71f2f..2628e7b72116 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
19#define CSB726_FLASH_SIZE (64 * 1024 * 1024) 19#define CSB726_FLASH_SIZE (64 * 1024 * 1024)
20#define CSB726_FLASH_uMON (8 * 1024 * 1024) 20#define CSB726_FLASH_uMON (8 * 1024 * 1024)
21 21
22#define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) 22#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
23#define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) 23#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
24 24
25#endif 25#endif
26 26
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 41b4c93a96c2..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Written by Philipp Zabel <philipp.zabel@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19#ifndef __MACH_PXA_GPIO_PXA_H
20#define __MACH_PXA_GPIO_PXA_H
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24
25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29
30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
32#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
33#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
34#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
35
36/* GPIO Pin Direction Registers */
37#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
38#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
39#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
40#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
41
42/* GPIO Pin Output Set Registers */
43#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
44#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
45#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
46#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
47
48/* GPIO Pin Output Clear Registers */
49#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
50#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
51#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
52#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
53
54/* GPIO Rising Edge Detect Registers */
55#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
56#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
57#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
58#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
59
60/* GPIO Falling Edge Detect Registers */
61#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
62#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
63#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
64#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
65
66/* GPIO Edge Detect Status Registers */
67#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
68#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
69#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
70#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
71
72/* GPIO Alternate Function Select Registers */
73#define GAFR0_L GPIO_REG(0x0054)
74#define GAFR0_U GPIO_REG(0x0058)
75#define GAFR1_L GPIO_REG(0x005C)
76#define GAFR1_U GPIO_REG(0x0060)
77#define GAFR2_L GPIO_REG(0x0064)
78#define GAFR2_U GPIO_REG(0x0068)
79#define GAFR3_L GPIO_REG(0x006C)
80#define GAFR3_U GPIO_REG(0x0070)
81
82/* More handy macros. The argument is a literal GPIO number. */
83
84#define GPIO_bit(x) (1 << ((x) & 0x1f))
85
86#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
87#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
88#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
89#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
90#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
91#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
92#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
93#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
94
95
96#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
97
98#define gpio_to_bank(gpio) ((gpio) >> 5)
99
100#ifdef CONFIG_CPU_PXA26x
101/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
102 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
103 */
104static inline int __gpio_is_inverted(unsigned gpio)
105{
106 return cpu_is_pxa25x() && gpio > 85;
107}
108#else
109static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
110#endif
111
112/*
113 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
114 * function of a GPIO, and GPDRx cannot be altered once configured. It
115 * is attributed as "occupied" here (I know this terminology isn't
116 * accurate, you are welcome to propose a better one :-)
117 */
118static inline int __gpio_is_occupied(unsigned gpio)
119{
120 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
121 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
122 int dir = GPDR(gpio) & GPIO_bit(gpio);
123
124 if (__gpio_is_inverted(gpio))
125 return af != 1 || dir == 0;
126 else
127 return af != 0 || dir != 0;
128 } else
129 return GPDR(gpio) & GPIO_bit(gpio);
130}
131
132#include <plat/gpio-pxa.h>
133#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 004cade7bb13..0248e433bc98 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,24 +25,8 @@
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <asm-generic/gpio.h> 27#include <asm-generic/gpio.h>
28/* The defines for the driver are needed for the accelerated accessors */
29#include "gpio-pxa.h"
30 28
31#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 29#include <mach/irqs.h>
30#include <mach/hardware.h>
32 31
33static inline int irq_to_gpio(unsigned int irq)
34{
35 int gpio;
36
37 if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
38 return irq - IRQ_GPIO0;
39
40 gpio = irq - PXA_GPIO_IRQ_BASE;
41 if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
42 return gpio;
43
44 return -1;
45}
46
47#include <plat/gpio.h>
48#endif 32#endif
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 9b898680b206..dba14b6503ad 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
24#define GPIO_GUMSTIX_USB_GPIOx 41 24#define GPIO_GUMSTIX_USB_GPIOx 41
25 25
26/* usb state change */ 26/* usb state change */
27#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) 27#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
28 28
29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) 29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) 30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
35 */ 35 */
36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ 36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ 37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
38#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) 38#define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
39 39
40/* 40/*
41 * SMC Ethernet definitions 41 * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
49 49
50#define GPIO_GUMSTIX_ETH0 36 50#define GPIO_GUMSTIX_ETH0 36
51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) 51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
52#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) 52#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
53#define GPIO_GUMSTIX_ETH1 27 53#define GPIO_GUMSTIX_ETH1 27
54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) 54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
55#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) 55#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
56 56
57 57
58/* CF reset line */ 58/* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
63#define GPIO4_nSTSCHG GPIO4_nBVD1 63#define GPIO4_nSTSCHG GPIO4_nBVD1
64#define GPIO11_nCD 11 64#define GPIO11_nCD 11
65#define GPIO26_PRDY_nBSY 26 65#define GPIO26_PRDY_nBSY 26
66#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) 66#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
67#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) 67#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
68#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) 68#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
69 69
70/* CF slot 1 */ 70/* CF slot 1 */
71#define GPIO18_nBVD1 18 71#define GPIO18_nBVD1 18
72#define GPIO18_nSTSCHG GPIO18_nBVD1 72#define GPIO18_nSTSCHG GPIO18_nBVD1
73#define GPIO36_nCD 36 73#define GPIO36_nCD 36
74#define GPIO27_PRDY_nBSY 27 74#define GPIO27_PRDY_nBSY 27
75#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) 75#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
76#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) 76#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
77#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) 77#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
78 78
79/* CF GPIO line modes */ 79/* CF GPIO line modes */
80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) 80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 37408449ec25..8bc02913517c 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -15,7 +15,7 @@
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h> 16#include <linux/mfd/asic3.h>
17 17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO 18#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) 19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70) 20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
21 21
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index 5eff96fcc944..22a96f87232b 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,28 +131,26 @@
131#define PCC_VS2 (1 << 1) 131#define PCC_VS2 (1 << 1)
132#define PCC_VS1 (1 << 0) 132#define PCC_VS1 (1 << 0)
133 133
134#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
135
136/* A listing of interrupts used by external hardware devices */ 134/* A listing of interrupts used by external hardware devices */
137 135
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 136#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
139#define IDE_IRQ IRQ_GPIO(21) 137#define IDE_IRQ PXA_GPIO_TO_IRQ(21)
140 138
141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 139#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 140
143#define ETHERNET_IRQ IRQ_GPIO(4) 141#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4)
144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING 142#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 143
146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 144#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 145
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 146#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 147#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 148
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 149#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 150#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 151
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 152#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 153#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22)
156 154
157 155
158/* 156/*
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 7cc5a781e99e..32975adf3ca4 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -88,10 +88,8 @@
88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ 88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
89 89
90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96) 90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
91#define PXA_GPIO_IRQ_NUM (192) 91#define PXA_NR_BUILTIN_GPIO (192)
92 92#define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
95 93
96/* 94/*
97 * The following interrupts are for board specific purposes. Since 95 * The following interrupts are for board specific purposes. Since
@@ -100,7 +98,7 @@
100 * By default, no board IRQ is reserved. It should be finished in 98 * By default, no board IRQ is reserved. It should be finished in
101 * custom board since sparse IRQ is already enabled. 99 * custom board since sparse IRQ is already enabled.
102 */ 100 */
103#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 101#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
104 102
105#define NR_IRQS (IRQ_BOARD_START) 103#define NR_IRQS (IRQ_BOARD_START)
106 104
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index b6238cbd8aea..8066be54e9f5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,13 +1,11 @@
1#ifndef __ASM_ARCH_LITTLETON_H 1#ifndef __ASM_ARCH_LITTLETON_H
2#define __ASM_ARCH_LITTLETON_H 2#define __ASM_ARCH_LITTLETON_H
3 3
4#include <mach/gpio-pxa.h>
5
6#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
7 5
8#define LITTLETON_GPIO_LCD_CS (17) 6#define LITTLETON_GPIO_LCD_CS (17)
9 7
10#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) 8#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
11#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) 9#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x))
12 10
13#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) 11#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 7cbfc5d3f9df..ba6a6e1d29e9 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -78,7 +78,7 @@
78 * CPLD EGPIOs 78 * CPLD EGPIOs
79 */ 79 */
80 80
81#define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO 81#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO
82#define MAGICIAN_EGPIO(reg,bit) \ 82#define MAGICIAN_EGPIO(reg,bit) \
83 (MAGICIAN_EGPIO_BASE + 8*reg + bit) 83 (MAGICIAN_EGPIO_BASE + 8*reg + bit)
84 84
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index ae536e86d8e8..2c4471336570 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -68,10 +68,10 @@
68/* 20, 53 and 86 are usb related too */ 68/* 20, 53 and 86 are usb related too */
69 69
70/* INTERRUPTS */ 70/* INTERRUPTS */
71#define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) 71#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
72#define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) 72#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
73#define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) 73#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
74#define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) 74#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
75 75
76 76
77/** HERE ARE INIT VALUES **/ 77/** HERE ARE INIT VALUES **/
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 6baf7469d4ec..0bd4f036c72f 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -48,10 +48,10 @@
48#define GPIO_NR_PALMT5_BT_RESET 83 48#define GPIO_NR_PALMT5_BT_RESET 83
49 49
50/* INTERRUPTS */ 50/* INTERRUPTS */
51#define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) 51#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
52#define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) 52#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
53#define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) 53#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
54#define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) 54#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
55 55
56/** HERE ARE INIT VALUES **/ 56/** HERE ARE INIT VALUES **/
57 57
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3f9dd3fd4638..c383a21680b6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -52,8 +52,8 @@
52#define GPIO_NR_PALMTC_IR_DISABLE 45 52#define GPIO_NR_PALMTC_IR_DISABLE 45
53 53
54/* IRQs */ 54/* IRQs */
55#define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N) 55#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
56#define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY) 56#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
57 57
58/* UCB1400 GPIOs */ 58/* UCB1400 GPIOs */
59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) 59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 7074a6ed46c6..f2e530380253 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -62,10 +62,10 @@
62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79
63 63
64/* INTERRUPTS */ 64/* INTERRUPTS */
65#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) 65#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
66#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) 66#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
67#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) 67#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
68#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) 68#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
69 69
70/** HERE ARE INIT VALUES **/ 70/** HERE ARE INIT VALUES **/
71 71
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4bac588478a8..6bf28de228bd 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -34,7 +34,7 @@
34 34
35/* I2C RTC */ 35/* I2C RTC */
36#define PCM027_RTC_IRQ_GPIO 0 36#define PCM027_RTC_IRQ_GPIO 0
37#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) 37#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
39#define ADR_PCM027_RTC 0x51 /* I2C address */ 39#define ADR_PCM027_RTC 0x51 /* I2C address */
40 40
@@ -43,21 +43,21 @@
43 43
44/* Ethernet chip (SMSC91C111) */ 44/* Ethernet chip (SMSC91C111) */
45#define PCM027_ETH_IRQ_GPIO 52 45#define PCM027_ETH_IRQ_GPIO 52
46#define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) 46#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING 47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING
48#define PCM027_ETH_PHYS PXA_CS5_PHYS 48#define PCM027_ETH_PHYS PXA_CS5_PHYS
49#define PCM027_ETH_SIZE (1*1024*1024) 49#define PCM027_ETH_SIZE (1*1024*1024)
50 50
51/* CAN controller SJA1000 (unsupported yet) */ 51/* CAN controller SJA1000 (unsupported yet) */
52#define PCM027_CAN_IRQ_GPIO 114 52#define PCM027_CAN_IRQ_GPIO 114
53#define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) 53#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
55#define PCM027_CAN_PHYS 0x22000000 55#define PCM027_CAN_PHYS 0x22000000
56#define PCM027_CAN_SIZE 0x100 56#define PCM027_CAN_SIZE 0x100
57 57
58/* SPI GPIO expander (unsupported yet) */ 58/* SPI GPIO expander (unsupported yet) */
59#define PCM027_EGPIO_IRQ_GPIO 27 59#define PCM027_EGPIO_IRQ_GPIO 27
60#define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) 60#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
62#define PCM027_EGPIO_CS 24 62#define PCM027_EGPIO_CS 24
63/* 63/*
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index 8a4383b776d7..d72791695b26 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -28,14 +28,14 @@
28 28
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@
132 * IDE 132 * IDE
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
@@ -188,11 +188,11 @@
188 * Compact Flash 188 * Compact Flash
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
@@ -258,14 +258,14 @@
258 * Wolfson AC97 Touch 258 * Wolfson AC97 Touch
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 83d1cfd00fc9..f32ff75dcca8 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -47,18 +47,18 @@
47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ 47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
48 48
49/* PXA GPIOs */ 49/* PXA GPIOs */
50#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) 50#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0)
51#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) 51#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
52#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) 52#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4)
53#define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) 53#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16)
54#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) 54#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
55#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) 55#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11)
56#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) 56#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10)
57#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 57#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
58#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) 58#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
59#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) 59#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8)
60#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 60#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) 61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13)
62 62
63/* SCOOP GPIOs */ 63/* SCOOP GPIOs */
64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
@@ -71,7 +71,7 @@
71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
72#define POODLE_SCOOP_IO_OUT ( 0 ) 72#define POODLE_SCOOP_IO_OUT ( 0 )
73 73
74#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 74#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) 75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) 76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) 77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 685749a51c42..0bfe6507c95d 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -108,7 +108,7 @@
108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
109#define SPITZ_SCP_SUS_SET 0 109#define SPITZ_SCP_SUS_SET 0
110 110
111#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) 111#define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) 112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) 113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) 114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@
140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
142 142
143#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) 143#define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) 144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) 145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1)
146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) 146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@
152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) 152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
153 153
154/* Akita IO Expander GPIOs */ 154/* Akita IO Expander GPIOs */
155#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) 155#define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) 156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) 157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) 158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
@@ -164,23 +164,23 @@
164 164
165/* Spitz IRQ Definitions */ 165/* Spitz IRQ Definitions */
166 166
167#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) 167#define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
168#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) 168#define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
169#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) 169#define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
170#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) 170#define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
171#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) 171#define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
172#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) 172#define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
173#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) 173#define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
174#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) 174#define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
175#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) 175#define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
176#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) 176#define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
177#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) 177#define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
178#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) 178#define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
179#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) 179#define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
180#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) 180#define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
181#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) 181#define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
182#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) 182#define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
183#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) 183#define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
184 184
185/* 185/*
186 * Shared data structures 186 * Shared data structures
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1272c4b56ceb..2bb0e862598c 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -24,7 +24,7 @@
24/* 24/*
25 * SCOOP2 internal GPIOs 25 * SCOOP2 internal GPIOs
26 */ 26 */
27#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO 27#define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO
28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) 29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1)
30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) 30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@
42/* 42/*
43 * SCOOP2 jacket GPIOs 43 * SCOOP2 jacket GPIOs
44 */ 44 */
45#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) 45#define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) 46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) 47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) 48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@
59/* 59/*
60 * TC6393XB GPIOs 60 * TC6393XB GPIOs
61 */ 61 */
62#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) 62#define TOSA_TC6393XB_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 2 * 12)
63 63
64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) 64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)
65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) 65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
@@ -141,30 +141,30 @@
141/* 141/*
142 * Interrupts 142 * Interrupts
143 */ 143 */
144#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) 144#define TOSA_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
145#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) 145#define TOSA_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
146#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) 146#define TOSA_IRQ_GPIO_RECORD_BTN PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
147#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) 147#define TOSA_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
148#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) 148#define TOSA_IRQ_GPIO_USB_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
149#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) 149#define TOSA_IRQ_GPIO_JACKET_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
150#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) 150#define TOSA_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
151#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) 151#define TOSA_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
152#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) 152#define TOSA_IRQ_GPIO_BAT1_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
153#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) 153#define TOSA_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
154#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) 154#define TOSA_IRQ_GPIO_BAT0_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
155#define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT) 155#define TOSA_IRQ_GPIO_TC6393XB_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
156#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) 156#define TOSA_IRQ_GPIO_BAT0_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
157#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) 157#define TOSA_IRQ_GPIO_EAR_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
158#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) 158#define TOSA_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
159#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) 159#define TOSA_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
160#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) 160#define TOSA_IRQ_GPIO_VGA_LINE PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
161#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) 161#define TOSA_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
162#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) 162#define TOSA_IRQ_GPIO_JC_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
163#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) 163#define TOSA_IRQ_GPIO_BAT_LOCKED PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
164#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) 164#define TOSA_IRQ_GPIO_BAT1_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
165#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) 165#define TOSA_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(69+(a))
166 166
167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) 167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
168 168
169#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 169#define TOSA_KEY_SYNC KEY_102ND /* ??? */
170 170
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 903e1a2e6641..d2ca01053f69 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -43,30 +43,30 @@
43 43
44/* Ethernet Controller Davicom DM9000 */ 44/* Ethernet Controller Davicom DM9000 */
45#define GPIO_DM9000 101 45#define GPIO_DM9000 101
46#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) 46#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000)
47 47
48/* UCB1400 audio / TS-controller */ 48/* UCB1400 audio / TS-controller */
49#define GPIO_UCB1400 1 49#define GPIO_UCB1400 1
50#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) 50#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400)
51 51
52/* PCMCIA socket Compact Flash */ 52/* PCMCIA socket Compact Flash */
53#define GPIO_PCD 11 /* PCMCIA Card Detect */ 53#define GPIO_PCD 11 /* PCMCIA Card Detect */
54#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) 54#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD)
55#define GPIO_PRDY 13 /* READY / nINT */ 55#define GPIO_PRDY 13 /* READY / nINT */
56#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) 56#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY)
57 57
58/* MMC socket */ 58/* MMC socket */
59#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
61 61
62/* DOC NAND chip */ 62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94 63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93 64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) 65#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
66 66
67/* SPI interface */ 67/* SPI interface */
68#define GPIO_SPI 53 68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) 69#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI)
70 70
71/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
72#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
@@ -74,7 +74,7 @@
74 74
75/* Off-module PIC on ConXS board */ 75/* Off-module PIC on ConXS board */
76#define GPIO_PIC 0 76#define GPIO_PIC 0
77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC)
78 78
79#ifdef CONFIG_MACH_TRIZEPS_CONXS 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
80/* for CONXS base board define these registers */ 80/* for CONXS base board define these registers */
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 532c5d3a97d2..5dae15ea6718 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -22,7 +22,6 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/gpio-pxa.h>
26 25
27#include "generic.h" 26#include "generic.h"
28 27
@@ -92,44 +91,6 @@ static struct irq_chip pxa_internal_irq_chip = {
92 .irq_unmask = pxa_unmask_irq, 91 .irq_unmask = pxa_unmask_irq,
93}; 92};
94 93
95/*
96 * GPIO IRQs for GPIO 0 and 1
97 */
98static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
99{
100 int gpio = d->irq - IRQ_GPIO0;
101
102 if (__gpio_is_occupied(gpio)) {
103 pr_err("%s failed: GPIO is configured\n", __func__);
104 return -EINVAL;
105 }
106
107 if (type & IRQ_TYPE_EDGE_RISING)
108 GRER0 |= GPIO_bit(gpio);
109 else
110 GRER0 &= ~GPIO_bit(gpio);
111
112 if (type & IRQ_TYPE_EDGE_FALLING)
113 GFER0 |= GPIO_bit(gpio);
114 else
115 GFER0 &= ~GPIO_bit(gpio);
116
117 return 0;
118}
119
120static void pxa_ack_low_gpio(struct irq_data *d)
121{
122 GEDR0 = (1 << (d->irq - IRQ_GPIO0));
123}
124
125static struct irq_chip pxa_low_gpio_chip = {
126 .name = "GPIO-l",
127 .irq_ack = pxa_ack_low_gpio,
128 .irq_mask = pxa_mask_irq,
129 .irq_unmask = pxa_unmask_irq,
130 .irq_set_type = pxa_set_low_gpio_type,
131};
132
133asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) 94asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
134{ 95{
135 uint32_t icip, icmr, mask; 96 uint32_t icip, icmr, mask;
@@ -160,26 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
160 } while (1); 121 } while (1);
161} 122}
162 123
163static void __init pxa_init_low_gpio_irq(set_wake_t fn) 124void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
164{
165 int irq;
166
167 /* clear edge detection on GPIO 0 and 1 */
168 GFER0 &= ~0x3;
169 GRER0 &= ~0x3;
170 GEDR0 = 0x3;
171
172 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
173 irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
174 handle_edge_irq);
175 irq_set_chip_data(irq, irq_base(0));
176 set_irq_flags(irq, IRQF_VALID);
177 }
178
179 pxa_low_gpio_chip.irq_set_wake = fn;
180}
181
182void __init pxa_init_irq(int irq_nr, set_wake_t fn)
183{ 125{
184 int irq, i, n; 126 int irq, i, n;
185 127
@@ -209,7 +151,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
209 __raw_writel(1, irq_base(0) + ICCR); 151 __raw_writel(1, irq_base(0) + ICCR);
210 152
211 pxa_internal_irq_chip.irq_set_wake = fn; 153 pxa_internal_irq_chip.irq_set_wake = fn;
212 pxa_init_low_gpio_irq(fn);
213} 154}
214 155
215#ifdef CONFIG_PM 156#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index c337c7eed514..1fb86edb857c 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = {
124 .flags = IORESOURCE_MEM, 124 .flags = IORESOURCE_MEM,
125 }, 125 },
126 [1] = { 126 [1] = {
127 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), 127 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
128 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), 128 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
130 } 130 }
131}; 131};
@@ -396,7 +396,7 @@ static struct i2c_board_info littleton_i2c_info[] = {
396 .type = "da9034", 396 .type = "da9034",
397 .addr = 0x34, 397 .addr = 0x34,
398 .platform_data = &littleton_da9034_info, 398 .platform_data = &littleton_da9034_info,
399 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)), 399 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)),
400 }, 400 },
401 [1] = { 401 [1] = {
402 .type = "max7320", 402 .type = "max7320",
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 6119c015f393..cee9ce2fc0b5 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void)
152 handle_level_irq); 152 handle_level_irq);
153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
154 } 154 }
155 irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); 155 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
156 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 156 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
157} 157}
158 158
159 159
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 4b7a52871652..6ebd276aebeb 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)
170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
171 } 171 }
172 172
173 irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); 173 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
174 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 174 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
175} 175}
176 176
177#ifdef CONFIG_PM 177#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4e6774fff422..3d6baf91396c 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = {
184 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
185 }, 185 },
186 [1] = { 186 [1] = {
187 .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), 187 .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
188 .end = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), 188 .end = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
189 .flags = IORESOURCE_IRQ, 189 .flags = IORESOURCE_IRQ,
190 }, 190 },
191}; 191};
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = {
468 }, 468 },
469 /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ 469 /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */
470 [1] = { 470 [1] = {
471 .start = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), 471 .start = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
472 .end = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), 472 .end = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
473 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 473 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
474 } 474 }
475}; 475};
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index ca14555d5e15..1aebaf719462 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)
178 MST_INTMSKENA = 0; 178 MST_INTMSKENA = 0;
179 MST_INTSETCLR = 0; 179 MST_INTSETCLR = 0;
180 180
181 irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 181 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
182 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 182 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
183} 183}
184 184
185#ifdef CONFIG_PM 185#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 43a5f6861ca3..f14775536b83 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/gpio-pxa.h>
16#include <linux/module.h> 17#include <linux/module.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/init.h> 19#include <linux/init.h>
@@ -20,7 +21,6 @@
20 21
21#include <mach/pxa2xx-regs.h> 22#include <mach/pxa2xx-regs.h>
22#include <mach/mfp-pxa2xx.h> 23#include <mach/mfp-pxa2xx.h>
23#include <mach/gpio-pxa.h>
24 24
25#include "generic.h" 25#include "generic.h"
26 26
@@ -29,6 +29,10 @@
29#define GAFR_L(x) __GAFR(0, x) 29#define GAFR_L(x) __GAFR(0, x)
30#define GAFR_U(x) __GAFR(1, x) 30#define GAFR_U(x) __GAFR(1, x)
31 31
32#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35
32#define PWER_WE35 (1 << 24) 36#define PWER_WE35 (1 << 24)
33 37
34struct gpio_desc { 38struct gpio_desc {
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 924a3b5f8da6..e80a3db735c2 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -53,6 +53,7 @@
53#include <mach/pxa27x-udc.h> 53#include <mach/pxa27x-udc.h>
54#include <mach/camera.h> 54#include <mach/camera.h>
55#include <mach/audio.h> 55#include <mach/audio.h>
56#include <mach/smemc.h>
56#include <media/soc_camera.h> 57#include <media/soc_camera.h>
57 58
58#include <mach/mioa701.h> 59#include <mach/mioa701.h>
@@ -390,24 +391,19 @@ static struct pxamci_platform_data mioa701_mci_info = {
390}; 391};
391 392
392/* FlashRAM */ 393/* FlashRAM */
393static struct resource strataflash_resource = { 394static struct resource docg3_resource = {
394 .start = PXA_CS0_PHYS, 395 .start = PXA_CS0_PHYS,
395 .end = PXA_CS0_PHYS + SZ_64M - 1, 396 .end = PXA_CS0_PHYS + SZ_8K - 1,
396 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
397}; 398};
398 399
399static struct physmap_flash_data strataflash_data = { 400static struct platform_device docg3 = {
400 .width = 2, 401 .name = "docg3",
401 /* .set_vpp = mioa701_set_vpp, */
402};
403
404static struct platform_device strataflash = {
405 .name = "physmap-flash",
406 .id = -1, 402 .id = -1,
407 .resource = &strataflash_resource, 403 .resource = &docg3_resource,
408 .num_resources = 1, 404 .num_resources = 1,
409 .dev = { 405 .dev = {
410 .platform_data = &strataflash_data, 406 .platform_data = NULL,
411 }, 407 },
412}; 408};
413 409
@@ -541,15 +537,15 @@ static struct pda_power_pdata power_pdata = {
541static struct resource power_resources[] = { 537static struct resource power_resources[] = {
542 [0] = { 538 [0] = {
543 .name = "ac", 539 .name = "ac",
544 .start = gpio_to_irq(GPIO96_AC_DETECT), 540 .start = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
545 .end = gpio_to_irq(GPIO96_AC_DETECT), 541 .end = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
546 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 542 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
547 IORESOURCE_IRQ_LOWEDGE, 543 IORESOURCE_IRQ_LOWEDGE,
548 }, 544 },
549 [1] = { 545 [1] = {
550 .name = "usb", 546 .name = "usb",
551 .start = gpio_to_irq(GPIO13_nUSB_DETECT), 547 .start = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
552 .end = gpio_to_irq(GPIO13_nUSB_DETECT), 548 .end = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
553 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 549 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
554 IORESOURCE_IRQ_LOWEDGE, 550 IORESOURCE_IRQ_LOWEDGE,
555 }, 551 },
@@ -685,7 +681,7 @@ static struct platform_device *devices[] __initdata = {
685 &pxa2xx_pcm, 681 &pxa2xx_pcm,
686 &mioa701_sound, 682 &mioa701_sound,
687 &power_dev, 683 &power_dev,
688 &strataflash, 684 &docg3,
689 &gpio_vbus, 685 &gpio_vbus,
690 &mioa701_camera, 686 &mioa701_camera,
691 &mioa701_board, 687 &mioa701_board,
@@ -720,6 +716,15 @@ static void __init mioa701_machine_init(void)
720 RTTR = 32768 - 1; /* Reset crazy WinCE value */ 716 RTTR = 32768 - 1; /* Reset crazy WinCE value */
721 UP2OCR = UP2OCR_HXOE; 717 UP2OCR = UP2OCR_HXOE;
722 718
719 /*
720 * Set up the flash memory : DiskOnChip G3 on first static memory bank
721 */
722 __raw_writel(0x7ff02dd8, MSC0);
723 __raw_writel(0x0001c391, MCMEM0);
724 __raw_writel(0x0001c391, MCATT0);
725 __raw_writel(0x0001c391, MCIO0);
726
727
723 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config)); 728 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
724 pxa_set_ffuart_info(NULL); 729 pxa_set_ffuart_info(NULL);
725 pxa_set_btuart_info(NULL); 730 pxa_set_btuart_info(NULL);
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 90928d6e1a5b..83570a79e7d2 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -417,8 +417,8 @@ static struct resource dm9k_resources[] = {
417 .flags = IORESOURCE_MEM 417 .flags = IORESOURCE_MEM
418 }, 418 },
419 [2] = { 419 [2] = {
420 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), 420 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
421 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), 421 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE 422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
423 } 423 }
424}; 424};
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6d38c6548b3d..abab4e2b122c 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
378#include <linux/i2c/pca953x.h> 378#include <linux/i2c/pca953x.h>
379 379
380static struct pca953x_platform_data pca9536_data = { 380static struct pca953x_platform_data pca9536_data = {
381 .gpio_base = NR_BUILTIN_GPIO, 381 .gpio_base = PXA_NR_BUILTIN_GPIO,
382}; 382};
383 383
384static int gpio_bus_switch = -EINVAL; 384static int gpio_bus_switch = -EINVAL;
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
406 int ret; 406 int ret;
407 407
408 if (gpio_bus_switch < 0) { 408 if (gpio_bus_switch < 0) {
409 ret = gpio_request(NR_BUILTIN_GPIO, "camera"); 409 ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
410 if (!ret) { 410 if (!ret) {
411 gpio_bus_switch = NR_BUILTIN_GPIO; 411 gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
412 gpio_direction_output(gpio_bus_switch, 0); 412 gpio_direction_output(gpio_bus_switch, 0);
413 } 413 }
414 } 414 }
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index b260ce872d2d..69036e42ca31 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -166,8 +166,8 @@ static struct resource locomo_resources[] = {
166 .flags = IORESOURCE_MEM, 166 .flags = IORESOURCE_MEM,
167 }, 167 },
168 [1] = { 168 [1] = {
169 .start = IRQ_GPIO(10), 169 .start = PXA_GPIO_TO_IRQ(10),
170 .end = IRQ_GPIO(10), 170 .end = PXA_GPIO_TO_IRQ(10),
171 .flags = IORESOURCE_IRQ, 171 .flags = IORESOURCE_IRQ,
172 }, 172 },
173}; 173};
@@ -212,7 +212,7 @@ static struct spi_board_info poodle_spi_devices[] = {
212 .bus_num = 1, 212 .bus_num = 1,
213 .platform_data = &poodle_ads7846_info, 213 .platform_data = &poodle_ads7846_info,
214 .controller_data= &poodle_ads7846_chip, 214 .controller_data= &poodle_ads7846_chip,
215 .irq = gpio_to_irq(POODLE_GPIO_TP_INT), 215 .irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT),
216 }, 216 },
217}; 217};
218 218
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index f05f9486b0cb..adf058fa97ee 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -17,6 +17,7 @@
17 * need be. 17 * need be.
18 */ 18 */
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/gpio-pxa.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/kernel.h> 22#include <linux/kernel.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -208,6 +209,8 @@ static struct clk_lookup pxa25x_clkregs[] = {
208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
212 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
213 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
211}; 214};
212 215
213static struct clk_lookup pxa25x_hwuart_clkreg = 216static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -287,7 +290,7 @@ static inline void pxa25x_init_pm(void) {}
287 290
288static int pxa25x_set_wake(struct irq_data *d, unsigned int on) 291static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
289{ 292{
290 int gpio = irq_to_gpio(d->irq); 293 int gpio = pxa_irq_to_gpio(d->irq);
291 uint32_t mask = 0; 294 uint32_t mask = 0;
292 295
293 if (gpio >= 0 && gpio < 85) 296 if (gpio >= 0 && gpio < 85)
@@ -312,14 +315,12 @@ set_pwer:
312void __init pxa25x_init_irq(void) 315void __init pxa25x_init_irq(void)
313{ 316{
314 pxa_init_irq(32, pxa25x_set_wake); 317 pxa_init_irq(32, pxa25x_set_wake);
315 pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
316} 318}
317 319
318#ifdef CONFIG_CPU_PXA26x 320#ifdef CONFIG_CPU_PXA26x
319void __init pxa26x_init_irq(void) 321void __init pxa26x_init_irq(void)
320{ 322{
321 pxa_init_irq(32, pxa25x_set_wake); 323 pxa_init_irq(32, pxa25x_set_wake);
322 pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
323} 324}
324#endif 325#endif
325 326
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index bc5a98ebaa72..180bd8675d4b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/gpio-pxa.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/init.h> 18#include <linux/init.h>
@@ -229,6 +230,8 @@ static struct clk_lookup pxa27x_clkregs[] = {
229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
233 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
234 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
232}; 235};
233 236
234#ifdef CONFIG_PM 237#ifdef CONFIG_PM
@@ -355,7 +358,7 @@ static inline void pxa27x_init_pm(void) {}
355 */ 358 */
356static int pxa27x_set_wake(struct irq_data *d, unsigned int on) 359static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
357{ 360{
358 int gpio = irq_to_gpio(d->irq); 361 int gpio = pxa_irq_to_gpio(d->irq);
359 uint32_t mask; 362 uint32_t mask;
360 363
361 if (gpio >= 0 && gpio < 128) 364 if (gpio >= 0 && gpio < 128)
@@ -386,7 +389,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
386void __init pxa27x_init_irq(void) 389void __init pxa27x_init_irq(void)
387{ 390{
388 pxa_init_irq(34, pxa27x_set_wake); 391 pxa_init_irq(34, pxa27x_set_wake);
389 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
390} 392}
391 393
392static struct map_desc pxa27x_io_desc[] __initdata = { 394static struct map_desc pxa27x_io_desc[] __initdata = {
@@ -422,6 +424,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
422} 424}
423 425
424static struct platform_device *devices[] __initdata = { 426static struct platform_device *devices[] __initdata = {
427 &pxa_device_gpio,
425 &pxa27x_device_udc, 428 &pxa27x_device_udc,
426 &pxa_device_pmu, 429 &pxa_device_pmu,
427 &pxa_device_i2s, 430 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 40bb16501d86..0388eda7878a 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -89,6 +89,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
89static struct clk_lookup common_clkregs[] = { 89static struct clk_lookup common_clkregs[] = {
90 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
91 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), 91 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
92 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
92}; 93};
93 94
94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); 95static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8d614ecd8e99..d487e1ff4c9a 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,6 +83,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
83static struct clk_lookup pxa320_clkregs[] = { 83static struct clk_lookup pxa320_clkregs[] = {
84 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), 84 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
85 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), 85 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
86 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
86}; 87};
87 88
88static int __init pxa320_init(void) 89static int __init pxa320_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 0737c59b88ae..f107c71c7589 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -25,7 +25,6 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/suspend.h> 26#include <asm/suspend.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/gpio-pxa.h>
29#include <mach/pxa3xx-regs.h> 28#include <mach/pxa3xx-regs.h>
30#include <mach/reset.h> 29#include <mach/reset.h>
31#include <mach/ohci.h> 30#include <mach/ohci.h>
@@ -56,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
56static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); 55static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
57static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); 56static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); 57static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);
59 59
60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); 60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); 61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -67,6 +67,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
67 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), 67 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
68 /* Power I2C clock is always on */ 68 /* Power I2C clock is always on */
69 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), 69 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
70 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
70 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL), 71 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
71 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"), 72 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
72 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"), 73 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
@@ -88,6 +89,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
88 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), 89 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
89 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), 90 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
90 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), 91 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
92 INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
91}; 93};
92 94
93#ifdef CONFIG_PM 95#ifdef CONFIG_PM
@@ -365,7 +367,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
365 .irq_set_type = pxa_set_ext_wakeup_type, 367 .irq_set_type = pxa_set_ext_wakeup_type,
366}; 368};
367 369
368static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) 370static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
371 unsigned int))
369{ 372{
370 int irq; 373 int irq;
371 374
@@ -388,7 +391,6 @@ void __init pxa3xx_init_irq(void)
388 391
389 pxa_init_irq(56, pxa3xx_set_wake); 392 pxa_init_irq(56, pxa3xx_set_wake);
390 pxa_init_ext_wakeup_irq(pxa3xx_set_wake); 393 pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
391 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
392} 394}
393 395
394static struct map_desc pxa3xx_io_desc[] __initdata = { 396static struct map_desc pxa3xx_io_desc[] __initdata = {
@@ -417,6 +419,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
417} 419}
418 420
419static struct platform_device *devices[] __initdata = { 421static struct platform_device *devices[] __initdata = {
422 &pxa_device_gpio,
420 &pxa27x_device_udc, 423 &pxa27x_device_udc,
421 &pxa_device_pmu, 424 &pxa_device_pmu,
422 &pxa_device_i2s, 425 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 51371b39d2a3..fccc644702e6 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -20,7 +20,6 @@
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/gpio-pxa.h>
24#include <mach/pxa3xx-regs.h> 23#include <mach/pxa3xx-regs.h>
25#include <mach/pxa930.h> 24#include <mach/pxa930.h>
26#include <mach/reset.h> 25#include <mach/reset.h>
@@ -212,11 +211,13 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
212static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); 211static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
213static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); 212static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); 213static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
215 215
216static struct clk_lookup pxa95x_clkregs[] = { 216static struct clk_lookup pxa95x_clkregs[] = {
217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), 217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
218 /* Power I2C clock is always on */ 218 /* Power I2C clock is always on */
219 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), 219 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
220 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
220 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), 221 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
221 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), 222 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
222 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), 223 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
@@ -230,12 +231,12 @@ static struct clk_lookup pxa95x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), 231 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
231 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), 232 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
232 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), 233 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
234 INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
233}; 235};
234 236
235void __init pxa95x_init_irq(void) 237void __init pxa95x_init_irq(void)
236{ 238{
237 pxa_init_irq(96, NULL); 239 pxa_init_irq(96, NULL);
238 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
239} 240}
240 241
241/* 242/*
@@ -248,6 +249,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
248} 249}
249 250
250static struct platform_device *devices[] __initdata = { 251static struct platform_device *devices[] __initdata = {
252 &pxa_device_gpio,
251 &sa1100_device_rtc, 253 &sa1100_device_rtc,
252 &pxa_device_rtc, 254 &pxa_device_rtc,
253 &pxa27x_device_ssp1, 255 &pxa27x_device_ssp1,
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 4962b1676629..22818c7694a8 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = {
292 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
293 }, 293 },
294 { 294 {
295 .start = gpio_to_irq(GPIO_ETH_IRQ), 295 .start = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
296 .end = gpio_to_irq(GPIO_ETH_IRQ), 296 .end = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
297 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 297 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
298 } 298 }
299}; 299};
@@ -672,7 +672,7 @@ static struct lis3lv02d_platform_data lis3_pdata = {
672 .chip_select = 1, \ 672 .chip_select = 1, \
673 .controller_data = (void *) GPIO_ACCEL_CS, \ 673 .controller_data = (void *) GPIO_ACCEL_CS, \
674 .platform_data = &lis3_pdata, \ 674 .platform_data = &lis3_pdata, \
675 .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \ 675 .irq = PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ), \
676} 676}
677 677
678#define SPI_DAC7512 \ 678#define SPI_DAC7512 \
@@ -956,7 +956,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {
956static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = { 956static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
957 .type = "eeti_ts", 957 .type = "eeti_ts",
958 .addr = 0x0a, 958 .addr = 0x0a,
959 .irq = gpio_to_irq(GPIO_TOUCH_IRQ), 959 .irq = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
960 .platform_data = &eeti_ts_pdata, 960 .platform_data = &eeti_ts_pdata,
961}; 961};
962 962
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 878707056e65..0fe354efb931 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = {
96 .flags = IORESOURCE_MEM, 96 .flags = IORESOURCE_MEM,
97 }, 97 },
98 [1] = { 98 [1] = {
99 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), 99 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
100 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), 100 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
102 } 102 }
103}; 103};
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = {
502 .type = "da9034", 502 .type = "da9034",
503 .addr = 0x34, 503 .addr = 0x34,
504 .platform_data = &saar_da9034_info, 504 .platform_data = &saar_da9034_info,
505 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 505 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
506 }, 506 },
507}; 507};
508 508
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index b6dbaca460c7..febc809ed5a6 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -92,7 +92,7 @@ static struct i2c_board_info saarb_i2c_info[] = {
92 .type = "88PM860x", 92 .type = "88PM860x",
93 .addr = 0x34, 93 .addr = 0x34,
94 .platform_data = &saarb_pm8607_info, 94 .platform_data = &saarb_pm8607_info,
95 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 95 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
96 }, 96 },
97}; 97};
98 98
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 785880f67b60..8d5168d253a9 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock); 907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
908 908
909 /* Register interrupt handlers */ 909 /* Register interrupt handlers */
910 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { 910 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
911 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); 911 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
912 } 912 }
913 913
914 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { 914 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
915 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); 915 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
916 } 916 }
917 917
918 if (sharpsl_pm.machinfo->gpio_fatal) { 918 if (sharpsl_pm.machinfo->gpio_fatal) {
919 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { 919 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
920 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); 920 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
921 } 921 }
922 } 922 }
923 923
924 if (sharpsl_pm.machinfo->batfull_irq) { 924 if (sharpsl_pm.machinfo->batfull_irq) {
925 /* Register interrupt handler. */ 925 /* Register interrupt handler. */
926 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { 926 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
927 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); 927 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
928 } 928 }
929 } 929 }
930 930
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
953 953
954 led_trigger_unregister_simple(sharpsl_charge_led_trigger); 954 led_trigger_unregister_simple(sharpsl_charge_led_trigger);
955 955
956 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); 956 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
957 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); 957 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
958 958
959 if (sharpsl_pm.machinfo->gpio_fatal) 959 if (sharpsl_pm.machinfo->gpio_fatal)
960 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); 960 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
961 961
962 if (sharpsl_pm.machinfo->batfull_irq) 962 if (sharpsl_pm.machinfo->batfull_irq)
963 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); 963 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
964 964
965 gpio_free(sharpsl_pm.machinfo->gpio_batlock); 965 gpio_free(sharpsl_pm.machinfo->gpio_batlock);
966 gpio_free(sharpsl_pm.machinfo->gpio_batfull); 966 gpio_free(sharpsl_pm.machinfo->gpio_batfull);
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index a7f81a3fd132..abf355d0c92f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -552,7 +552,7 @@ static struct spi_board_info spitz_spi_devices[] = {
552 .chip_select = 0, 552 .chip_select = 0,
553 .platform_data = &spitz_ads7846_info, 553 .platform_data = &spitz_ads7846_info,
554 .controller_data = &spitz_ads7846_chip, 554 .controller_data = &spitz_ads7846_chip,
555 .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), 555 .irq = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT),
556 }, { 556 }, {
557 .modalias = "corgi-lcd", 557 .modalias = "corgi-lcd",
558 .max_speed_hz = 50000, 558 .max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 094279aefe9c..34cbdac51525 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/gpio-pxa.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/apm-emulation.h> 21#include <linux/apm-emulation.h>
@@ -41,6 +42,7 @@ static int spitz_last_ac_status;
41static struct gpio spitz_charger_gpios[] = { 42static struct gpio spitz_charger_gpios[] = {
42 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" }, 43 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" },
43 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" }, 44 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" },
45 { SPITZ_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
44 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, 46 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
45 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" }, 47 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" },
46 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, 48 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
@@ -169,14 +171,19 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
169 171
170static unsigned long spitz_charger_wakeup(void) 172static unsigned long spitz_charger_wakeup(void)
171{ 173{
172 return (~GPLR0 & GPIO_bit(SPITZ_GPIO_KEY_INT)) | (GPLR0 & GPIO_bit(SPITZ_GPIO_SYNC)); 174 unsigned long ret;
175 ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
176 << GPIO_bit(SPITZ_GPIO_KEY_INT))
177 | (!gpio_get_value(SPITZ_GPIO_SYNC)
178 << GPIO_bit(SPITZ_GPIO_SYNC));
179 return ret;
173} 180}
174 181
175unsigned long spitzpm_read_devdata(int type) 182unsigned long spitzpm_read_devdata(int type)
176{ 183{
177 switch (type) { 184 switch (type) {
178 case SHARPSL_STATUS_ACIN: 185 case SHARPSL_STATUS_ACIN:
179 return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); 186 return !gpio_get_value(SPITZ_GPIO_AC_IN);
180 case SHARPSL_STATUS_LOCK: 187 case SHARPSL_STATUS_LOCK:
181 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); 188 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
182 case SHARPSL_STATUS_CHRGFULL: 189 case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 80d7f23ad0fd..d8a2467de92e 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
376 .bus_num = 1, 376 .bus_num = 1,
377 .chip_select = 0, 377 .chip_select = 0,
378 .controller_data = &staccel_chip_info, 378 .controller_data = &staccel_chip_info,
379 .irq = IRQ_GPIO(96), 379 .irq = PXA_GPIO_TO_IRQ(96),
380 }, { 380 }, {
381 .modalias = "cc2420", 381 .modalias = "cc2420",
382 .max_speed_hz = 6500000, 382 .max_speed_hz = 6500000,
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
546 .type = "da9030", 546 .type = "da9030",
547 .addr = 0x49, 547 .addr = 0x49,
548 .platform_data = &imote2_da9030_pdata, 548 .platform_data = &imote2_da9030_pdata,
549 .irq = gpio_to_irq(1), 549 .irq = PXA_GPIO_TO_IRQ(1),
550 }, 550 },
551}; 551};
552 552
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
560 /* Through a nand gate - Also beware, on V2 sensor board the 560 /* Through a nand gate - Also beware, on V2 sensor board the
561 * pull up resistors are missing. 561 * pull up resistors are missing.
562 */ 562 */
563 .irq = IRQ_GPIO(99), 563 .irq = PXA_GPIO_TO_IRQ(99),
564 }, { /* ITS400 Sensor board only */ 564 }, { /* ITS400 Sensor board only */
565 .type = "tsl2561", 565 .type = "tsl2561",
566 .addr = 0x49, 566 .addr = 0x49,
567 /* Through a nand gate - Also beware, on V2 sensor board the 567 /* Through a nand gate - Also beware, on V2 sensor board the
568 * pull up resistors are missing. 568 * pull up resistors are missing.
569 */ 569 */
570 .irq = IRQ_GPIO(99), 570 .irq = PXA_GPIO_TO_IRQ(99),
571 }, { /* ITS400 Sensor board only */ 571 }, { /* ITS400 Sensor board only */
572 .type = "tmp175", 572 .type = "tmp175",
573 .addr = 0x4A, 573 .addr = 0x4A,
574 .irq = IRQ_GPIO(96), 574 .irq = PXA_GPIO_TO_IRQ(96),
575 }, { /* IMB400 Multimedia board */ 575 }, { /* IMB400 Multimedia board */
576 .type = "wm8940", 576 .type = "wm8940",
577 .addr = 0x1A, 577 .addr = 0x1A,
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = {
661 .flags = IORESOURCE_MEM, 661 .flags = IORESOURCE_MEM,
662 }, 662 },
663 [1] = { 663 [1] = {
664 .start = IRQ_GPIO(40), 664 .start = PXA_GPIO_TO_IRQ(40),
665 .end = IRQ_GPIO(40), 665 .end = PXA_GPIO_TO_IRQ(40),
666 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 666 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
667 } 667 }
668}; 668};
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev,
707 } 707 }
708 gpio_direction_input(SG2_GPIO_nSD_DETECT); 708 gpio_direction_input(SG2_GPIO_nSD_DETECT);
709 709
710 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), 710 err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
711 stargate2_detect_int, 711 stargate2_detect_int,
712 IRQ_TYPE_EDGE_BOTH, 712 IRQ_TYPE_EDGE_BOTH,
713 "MMC card detect", 713 "MMC card detect",
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
738 738
739static void stargate2_mci_exit(struct device *dev, void *data) 739static void stargate2_mci_exit(struct device *dev, void *data)
740{ 740{
741 free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data); 741 free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
742 gpio_free(SG2_SD_POWER_ENABLE); 742 gpio_free(SG2_SD_POWER_ENABLE);
743 gpio_free(SG2_GPIO_nSD_DETECT); 743 gpio_free(SG2_GPIO_nSD_DETECT);
744} 744}
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
913 .type = "da9030", 913 .type = "da9030",
914 .addr = 0x49, 914 .addr = 0x49,
915 .platform_data = &stargate2_da9030_pdata, 915 .platform_data = &stargate2_da9030_pdata,
916 .irq = gpio_to_irq(1), 916 .irq = PXA_GPIO_TO_IRQ(1),
917 }, 917 },
918}; 918};
919 919
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
938 /* Through a nand gate - Also beware, on V2 sensor board the 938 /* Through a nand gate - Also beware, on V2 sensor board the
939 * pull up resistors are missing. 939 * pull up resistors are missing.
940 */ 940 */
941 .irq = IRQ_GPIO(99), 941 .irq = PXA_GPIO_TO_IRQ(99),
942 }, { /* ITS400 Sensor board only */ 942 }, { /* ITS400 Sensor board only */
943 .type = "tsl2561", 943 .type = "tsl2561",
944 .addr = 0x49, 944 .addr = 0x49,
945 /* Through a nand gate - Also beware, on V2 sensor board the 945 /* Through a nand gate - Also beware, on V2 sensor board the
946 * pull up resistors are missing. 946 * pull up resistors are missing.
947 */ 947 */
948 .irq = IRQ_GPIO(99), 948 .irq = PXA_GPIO_TO_IRQ(99),
949 }, { /* ITS400 Sensor board only */ 949 }, { /* ITS400 Sensor board only */
950 .type = "tmp175", 950 .type = "tmp175",
951 .addr = 0x4A, 951 .addr = 0x4A,
952 .irq = IRQ_GPIO(96), 952 .irq = PXA_GPIO_TO_IRQ(96),
953 }, 953 },
954}; 954};
955 955
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 4fa36a3e383c..9fb38e80e076 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = {
85 .flags = IORESOURCE_MEM, 85 .flags = IORESOURCE_MEM,
86 }, 86 },
87 [1] = { 87 [1] = {
88 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), 88 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
89 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), 89 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
91 } 91 }
92}; 92};
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index 8a22879f0bb0..f7d9305cfd77 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = {
101 .type = "88PM860x", 101 .type = "88PM860x",
102 .addr = 0x34, 102 .addr = 0x34,
103 .platform_data = &evb3_pm8607_info, 103 .platform_data = &evb3_pm8607_info,
104 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 104 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
105 }, 105 },
106}; 106};
107 107
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index dfe40f8705aa..7ce5c436cc4e 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = {
404static struct resource tosa_power_resource[] = { 404static struct resource tosa_power_resource[] = {
405 { 405 {
406 .name = "ac", 406 .name = "ac",
407 .start = gpio_to_irq(TOSA_GPIO_AC_IN), 407 .start = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
408 .end = gpio_to_irq(TOSA_GPIO_AC_IN), 408 .end = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
409 .flags = IORESOURCE_IRQ | 409 .flags = IORESOURCE_IRQ |
410 IORESOURCE_IRQ_HIGHEDGE | 410 IORESOURCE_IRQ_HIGHEDGE |
411 IORESOURCE_IRQ_LOWEDGE, 411 IORESOURCE_IRQ_LOWEDGE,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index afe2b7495523..023d6ca789de 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = {
422 .flags = IORESOURCE_MEM, 422 .flags = IORESOURCE_MEM,
423 }, 423 },
424 [1] = { 424 [1] = {
425 .start = gpio_to_irq(VIPER_ETH_GPIO), 425 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
426 .end = gpio_to_irq(VIPER_ETH_GPIO), 426 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
428 }, 428 },
429 [2] = { 429 [2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
546 /* External UARTs */ 546 /* External UARTs */
547 { 547 {
548 .mapbase = VIPER_UARTA_PHYS, 548 .mapbase = VIPER_UARTA_PHYS,
549 .irq = gpio_to_irq(VIPER_UARTA_GPIO), 549 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
550 .irqflags = IRQF_TRIGGER_RISING, 550 .irqflags = IRQF_TRIGGER_RISING,
551 .uartclk = 1843200, 551 .uartclk = 1843200,
552 .regshift = 1, 552 .regshift = 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
556 }, 556 },
557 { 557 {
558 .mapbase = VIPER_UARTB_PHYS, 558 .mapbase = VIPER_UARTB_PHYS,
559 .irq = gpio_to_irq(VIPER_UARTB_GPIO), 559 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
560 .irqflags = IRQF_TRIGGER_RISING, 560 .irqflags = IRQF_TRIGGER_RISING,
561 .uartclk = 1843200, 561 .uartclk = 1843200,
562 .regshift = 1, 562 .regshift = 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = {
596 .flags = IORESOURCE_MEM, 596 .flags = IORESOURCE_MEM,
597 }, 597 },
598 [2] = { 598 [2] = {
599 .start = gpio_to_irq(VIPER_USB_GPIO), 599 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
600 .end = gpio_to_irq(VIPER_USB_GPIO), 600 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
601 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 601 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
602 }, 602 },
603}; 603};
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index fed5fb088714..1f5cfa96f6d6 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = {
395 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
396 }, 396 },
397 [2] = { 397 [2] = {
398 .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), 398 .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
399 .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), 399 .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
400 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 400 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
401 }, 401 },
402}; 402};
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
433}; 433};
434 434
435static struct ucb1400_pdata vpac270_ucb1400_pdata = { 435static struct ucb1400_pdata vpac270_ucb1400_pdata = {
436 .irq = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ), 436 .irq = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
437}; 437};
438 438
439static struct platform_device vpac270_ucb1400_device = { 439static struct platform_device vpac270_ucb1400_device = {
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = {
610 .flags = IORESOURCE_DMA 610 .flags = IORESOURCE_DMA
611 }, 611 },
612 [3] = { /* IDE IRQ pin */ 612 [3] = { /* IDE IRQ pin */
613 .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), 613 .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
614 .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), 614 .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
615 .flags = IORESOURCE_IRQ 615 .flags = IORESOURCE_IRQ
616 } 616 }
617}; 617};
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index d75f66ab8c34..b6476848b561 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
573 .modalias = "libertas_spi", 573 .modalias = "libertas_spi",
574 .platform_data = &z2_lbs_pdata, 574 .platform_data = &z2_lbs_pdata,
575 .controller_data = &z2_lbs_chip_info, 575 .controller_data = &z2_lbs_chip_info,
576 .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ), 576 .irq = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ),
577 .max_speed_hz = 13000000, 577 .max_speed_hz = 13000000,
578 .bus_num = 1, 578 .bus_num = 1,
579 .chip_select = 0, 579 .chip_select = 0,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 9db35a7fcfc0..a4dd1c347050 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ 233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
234 { /* COM1 */ 234 { /* COM1 */
235 .mapbase = 0x10000000, 235 .mapbase = 0x10000000,
236 .irq = gpio_to_irq(ZEUS_UARTA_GPIO), 236 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
237 .irqflags = IRQF_TRIGGER_RISING, 237 .irqflags = IRQF_TRIGGER_RISING,
238 .uartclk = 14745600, 238 .uartclk = 14745600,
239 .regshift = 1, 239 .regshift = 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
242 }, 242 },
243 { /* COM2 */ 243 { /* COM2 */
244 .mapbase = 0x10800000, 244 .mapbase = 0x10800000,
245 .irq = gpio_to_irq(ZEUS_UARTB_GPIO), 245 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
246 .irqflags = IRQF_TRIGGER_RISING, 246 .irqflags = IRQF_TRIGGER_RISING,
247 .uartclk = 14745600, 247 .uartclk = 14745600,
248 .regshift = 1, 248 .regshift = 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
251 }, 251 },
252 { /* COM3 */ 252 { /* COM3 */
253 .mapbase = 0x11000000, 253 .mapbase = 0x11000000,
254 .irq = gpio_to_irq(ZEUS_UARTC_GPIO), 254 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
255 .irqflags = IRQF_TRIGGER_RISING, 255 .irqflags = IRQF_TRIGGER_RISING,
256 .uartclk = 14745600, 256 .uartclk = 14745600,
257 .regshift = 1, 257 .regshift = 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
260 }, 260 },
261 { /* COM4 */ 261 { /* COM4 */
262 .mapbase = 0x11800000, 262 .mapbase = 0x11800000,
263 .irq = gpio_to_irq(ZEUS_UARTD_GPIO), 263 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
264 .irqflags = IRQF_TRIGGER_RISING, 264 .irqflags = IRQF_TRIGGER_RISING,
265 .uartclk = 14745600, 265 .uartclk = 14745600,
266 .regshift = 1, 266 .regshift = 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = {
321 .flags = IORESOURCE_MEM 321 .flags = IORESOURCE_MEM
322 }, 322 },
323 [2] = { 323 [2] = {
324 .start = gpio_to_irq(ZEUS_ETH0_GPIO), 324 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
325 .end = gpio_to_irq(ZEUS_ETH0_GPIO), 325 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
327 }, 327 },
328}; 328};
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = {
339 .flags = IORESOURCE_MEM, 339 .flags = IORESOURCE_MEM,
340 }, 340 },
341 [2] = { 341 [2] = {
342 .start = gpio_to_irq(ZEUS_ETH1_GPIO), 342 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
343 .end = gpio_to_irq(ZEUS_ETH1_GPIO), 343 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
345 }, 345 },
346}; 346};
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
423 [0] = { 423 [0] = {
424 .modalias = "mcp2515", 424 .modalias = "mcp2515",
425 .platform_data = &zeus_mcp2515_pdata, 425 .platform_data = &zeus_mcp2515_pdata,
426 .irq = gpio_to_irq(ZEUS_CAN_GPIO), 426 .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
427 .max_speed_hz = 1*1000*1000, 427 .max_speed_hz = 1*1000*1000,
428 .bus_num = 3, 428 .bus_num = 3,
429 .mode = SPI_MODE_0, 429 .mode = SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
753 { 753 {
754 I2C_BOARD_INFO("pca9535", 0x20), 754 I2C_BOARD_INFO("pca9535", 0x20),
755 .platform_data = &zeus_pca953x_pdata[2], 755 .platform_data = &zeus_pca953x_pdata[2],
756 .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO), 756 .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
757 }, 757 },
758 { I2C_BOARD_INFO("lm75a", 0x48) }, 758 { I2C_BOARD_INFO("lm75a", 0x48) },
759 { I2C_BOARD_INFO("24c01", 0x50) }, 759 { I2C_BOARD_INFO("24c01", 0x50) },
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 7678b1bf7903..98eec80623e3 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -408,8 +408,8 @@ static void __init zylonite_init(void)
408 * Note: We depend that the bootloader set 408 * Note: We depend that the bootloader set
409 * the correct value to MSC register for SMC91x. 409 * the correct value to MSC register for SMC91x.
410 */ 410 */
411 smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq); 411 smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq);
412 smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); 412 smc91x_resources[1].end = PXA_GPIO_TO_IRQ(gpio_eth_irq);
413 platform_device_register(&smc91x_device); 413 platform_device_register(&smc91x_device);
414 414
415 pxa_set_ac97_info(NULL); 415 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 93c64d8d7de9..86e59c043de2 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = {
231 .type = "pca9539", 231 .type = "pca9539",
232 .addr = 0x74, 232 .addr = 0x74,
233 .platform_data = &gpio_exp[0], 233 .platform_data = &gpio_exp[0],
234 .irq = IRQ_GPIO(18), 234 .irq = PXA_GPIO_TO_IRQ(18),
235 }, { 235 }, {
236 .type = "pca9539", 236 .type = "pca9539",
237 .addr = 0x75, 237 .addr = 0x75,
238 .platform_data = &gpio_exp[1], 238 .platform_data = &gpio_exp[1],
239 .irq = IRQ_GPIO(19), 239 .irq = PXA_GPIO_TO_IRQ(19),
240 }, 240 },
241}; 241};
242 242
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index c6133c6ec18f..feeaf73933dc 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -165,22 +165,6 @@ static struct map_desc bast_iodesc[] __initdata = {
165#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 165#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
166#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 166#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
167 167
168static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
169 [0] = {
170 .name = "uclk",
171 .divisor = 1,
172 .min_baud = 0,
173 .max_baud = 0,
174 },
175 [1] = {
176 .name = "pclk",
177 .divisor = 1,
178 .min_baud = 0,
179 .max_baud = 0,
180 }
181};
182
183
184static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { 168static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
185 [0] = { 169 [0] = {
186 .hwport = 0, 170 .hwport = 0,
@@ -188,8 +172,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
188 .ucon = UCON, 172 .ucon = UCON,
189 .ulcon = ULCON, 173 .ulcon = ULCON,
190 .ufcon = UFCON, 174 .ufcon = UFCON,
191 .clocks = bast_serial_clocks,
192 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
193 }, 175 },
194 [1] = { 176 [1] = {
195 .hwport = 1, 177 .hwport = 1,
@@ -197,8 +179,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
197 .ucon = UCON, 179 .ucon = UCON,
198 .ulcon = ULCON, 180 .ulcon = ULCON,
199 .ufcon = UFCON, 181 .ufcon = UFCON,
200 .clocks = bast_serial_clocks,
201 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
202 }, 182 },
203 /* port 2 is not actually used */ 183 /* port 2 is not actually used */
204 [2] = { 184 [2] = {
@@ -207,8 +187,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
207 .ucon = UCON, 187 .ucon = UCON,
208 .ulcon = ULCON, 188 .ulcon = ULCON,
209 .ufcon = UFCON, 189 .ufcon = UFCON,
210 .clocks = bast_serial_clocks,
211 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
212 } 190 }
213}; 191};
214 192
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index cc7032b5c65b..dbe668a803ef 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -110,23 +110,6 @@ static struct map_desc vr1000_iodesc[] __initdata = {
110#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 110#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
111#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 111#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
112 112
113/* uart clock source(s) */
114
115static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
116 [0] = {
117 .name = "uclk",
118 .divisor = 1,
119 .min_baud = 0,
120 .max_baud = 0,
121 },
122 [1] = {
123 .name = "pclk",
124 .divisor = 1,
125 .min_baud = 0,
126 .max_baud = 0.
127 }
128};
129
130static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { 113static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
131 [0] = { 114 [0] = {
132 .hwport = 0, 115 .hwport = 0,
@@ -134,8 +117,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
134 .ucon = UCON, 117 .ucon = UCON,
135 .ulcon = ULCON, 118 .ulcon = ULCON,
136 .ufcon = UFCON, 119 .ufcon = UFCON,
137 .clocks = vr1000_serial_clocks,
138 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
139 }, 120 },
140 [1] = { 121 [1] = {
141 .hwport = 1, 122 .hwport = 1,
@@ -143,8 +124,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
143 .ucon = UCON, 124 .ucon = UCON,
144 .ulcon = ULCON, 125 .ulcon = ULCON,
145 .ufcon = UFCON, 126 .ufcon = UFCON,
146 .clocks = vr1000_serial_clocks,
147 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
148 }, 127 },
149 /* port 2 is not actually used */ 128 /* port 2 is not actually used */
150 [2] = { 129 [2] = {
@@ -153,9 +132,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
153 .ucon = UCON, 132 .ucon = UCON,
154 .ulcon = ULCON, 133 .ulcon = ULCON,
155 .ufcon = UFCON, 134 .ufcon = UFCON,
156 .clocks = vr1000_serial_clocks,
157 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
158
159 } 135 }
160}; 136};
161 137
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index eea559ec7a58..061b6bb1a557 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -124,12 +124,18 @@ static struct clk s3c2410_armclk = {
124 .id = -1, 124 .id = -1,
125}; 125};
126 126
127static struct clk_lookup s3c2410_clk_lookup[] = {
128 CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
129 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
130};
131
127void __init s3c2410_init_clocks(int xtal) 132void __init s3c2410_init_clocks(int xtal)
128{ 133{
129 s3c24xx_register_baseclocks(xtal); 134 s3c24xx_register_baseclocks(xtal);
130 s3c2410_setup_clocks(); 135 s3c2410_setup_clocks();
131 s3c2410_baseclk_add(); 136 s3c2410_baseclk_add();
132 s3c24xx_register_clock(&s3c2410_armclk); 137 s3c24xx_register_clock(&s3c2410_armclk);
138 clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
133} 139}
134 140
135struct bus_type s3c2410_subsys = { 141struct bus_type s3c2410_subsys = {
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 516881640808..d10b695a9066 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -659,6 +659,12 @@ static struct clk *clks[] __initdata = {
659 &clk_armclk, 659 &clk_armclk,
660}; 660};
661 661
662static struct clk_lookup s3c2412_clk_lookup[] = {
663 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
664 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
665 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_usysclk),
666};
667
662int __init s3c2412_baseclk_add(void) 668int __init s3c2412_baseclk_add(void)
663{ 669{
664 unsigned long clkcon = __raw_readl(S3C2410_CLKCON); 670 unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
@@ -751,6 +757,7 @@ int __init s3c2412_baseclk_add(void)
751 s3c2412_clkcon_enable(clkp, 0); 757 s3c2412_clkcon_enable(clkp, 0);
752 } 758 }
753 759
760 clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
754 s3c_pwmclk_init(); 761 s3c_pwmclk_init();
755 return 0; 762 return 0;
756} 763}
diff --git a/arch/arm/mach-s3c2416/Makefile b/arch/arm/mach-s3c2416/Makefile
index 7b805b279caf..ca0cd227f873 100644
--- a/arch/arm/mach-s3c2416/Makefile
+++ b/arch/arm/mach-s3c2416/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_S3C2416_PM) += pm.o
15#obj-$(CONFIG_S3C2416_DMA) += dma.o 15#obj-$(CONFIG_S3C2416_DMA) += dma.o
16 16
17# Device setup 17# Device setup
18obj-$(CONFIG_S3C2416_SETUP_SDHCI) += setup-sdhci.o
19obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 18obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
20 19
21# Machine support 20# Machine support
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index afbbe8bc21d1..59f54d1d7f8b 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -90,39 +90,38 @@ static struct clksrc_clk hsmmc_div[] = {
90 }, 90 },
91}; 91};
92 92
93static struct clksrc_clk hsmmc_mux[] = { 93static struct clksrc_clk hsmmc_mux0 = {
94 [0] = { 94 .clk = {
95 .clk = { 95 .name = "hsmmc-if",
96 .name = "hsmmc-if", 96 .devname = "s3c-sdhci.0",
97 .devname = "s3c-sdhci.0", 97 .ctrlbit = (1 << 6),
98 .ctrlbit = (1 << 6), 98 .enable = s3c2443_clkcon_enable_s,
99 .enable = s3c2443_clkcon_enable_s,
100 },
101 .sources = &(struct clksrc_sources) {
102 .nr_sources = 2,
103 .sources = (struct clk *[]) {
104 [0] = &hsmmc_div[0].clk,
105 [1] = NULL, /* to fix */
106 },
107 },
108 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
109 }, 99 },
110 [1] = { 100 .sources = &(struct clksrc_sources) {
111 .clk = { 101 .nr_sources = 2,
112 .name = "hsmmc-if", 102 .sources = (struct clk * []) {
113 .devname = "s3c-sdhci.1", 103 [0] = &hsmmc_div[0].clk,
114 .ctrlbit = (1 << 12), 104 [1] = NULL, /* to fix */
115 .enable = s3c2443_clkcon_enable_s,
116 }, 105 },
117 .sources = &(struct clksrc_sources) { 106 },
118 .nr_sources = 2, 107 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
119 .sources = (struct clk *[]) { 108};
120 [0] = &hsmmc_div[1].clk, 109
121 [1] = NULL, /* to fix */ 110static struct clksrc_clk hsmmc_mux1 = {
122 }, 111 .clk = {
112 .name = "hsmmc-if",
113 .devname = "s3c-sdhci.1",
114 .ctrlbit = (1 << 12),
115 .enable = s3c2443_clkcon_enable_s,
116 },
117 .sources = &(struct clksrc_sources) {
118 .nr_sources = 2,
119 .sources = (struct clk * []) {
120 [0] = &hsmmc_div[1].clk,
121 [1] = NULL, /* to fix */
123 }, 122 },
124 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
125 }, 123 },
124 .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
126}; 125};
127 126
128static struct clk hsmmc0_clk = { 127static struct clk hsmmc0_clk = {
@@ -144,8 +143,14 @@ static struct clksrc_clk *clksrcs[] __initdata = {
144 &hsspi_mux, 143 &hsspi_mux,
145 &hsmmc_div[0], 144 &hsmmc_div[0],
146 &hsmmc_div[1], 145 &hsmmc_div[1],
147 &hsmmc_mux[0], 146 &hsmmc_mux0,
148 &hsmmc_mux[1], 147 &hsmmc_mux1,
148};
149
150static struct clk_lookup s3c2416_clk_lookup[] = {
151 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
152 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
153 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
149}; 154};
150 155
151void __init s3c2416_init_clocks(int xtal) 156void __init s3c2416_init_clocks(int xtal)
@@ -167,6 +172,7 @@ void __init s3c2416_init_clocks(int xtal)
167 s3c_register_clksrc(clksrcs[ptr], 1); 172 s3c_register_clksrc(clksrcs[ptr], 1);
168 173
169 s3c24xx_register_clock(&hsmmc0_clk); 174 s3c24xx_register_clock(&hsmmc0_clk);
175 clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
170 176
171 s3c_pwmclk_init(); 177 s3c_pwmclk_init();
172 178
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c
index 66b71736609c..eebe1e72b93e 100644
--- a/arch/arm/mach-s3c2416/mach-smdk2416.c
+++ b/arch/arm/mach-s3c2416/mach-smdk2416.c
@@ -50,6 +50,7 @@
50#include <plat/nand.h> 50#include <plat/nand.h>
51#include <plat/sdhci.h> 51#include <plat/sdhci.h>
52#include <plat/udc.h> 52#include <plat/udc.h>
53#include <linux/platform_data/s3c-hsudc.h>
53 54
54#include <plat/regs-fb-v4.h> 55#include <plat/regs-fb-v4.h>
55#include <plat/fb.h> 56#include <plat/fb.h>
diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c
deleted file mode 100644
index cee53955eb02..000000000000
--- a/arch/arm/mach-s3c2416/setup-sdhci.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/* linux/arch/arm/mach-s3c2416/setup-sdhci.c
2 *
3 * Copyright 2010 Promwad Innovation Company
4 * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
5 *
6 * S3C2416 - Helper functions for settign up SDHCI device(s) (HSMMC)
7 *
8 * Based on mach-s3c64xx/setup-sdhci.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/types.h>
16
17/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
18
19char *s3c2416_hsmmc_clksrcs[4] = {
20 [0] = "hsmmc",
21 [1] = "hsmmc",
22 [2] = "hsmmc-if",
23 /* [3] = "48m", - note not successfully used yet */
24};
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index d8957592fdc4..bedbc87a3426 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -33,6 +33,7 @@
33#include <linux/mutex.h> 33#include <linux/mutex.h>
34#include <linux/clk.h> 34#include <linux/clk.h>
35#include <linux/io.h> 35#include <linux/io.h>
36#include <linux/serial_core.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38#include <linux/atomic.h> 39#include <linux/atomic.h>
@@ -42,6 +43,7 @@
42 43
43#include <plat/clock.h> 44#include <plat/clock.h>
44#include <plat/cpu.h> 45#include <plat/cpu.h>
46#include <plat/regs-serial.h>
45 47
46/* S3C2440 extended clock support */ 48/* S3C2440 extended clock support */
47 49
@@ -107,6 +109,46 @@ static struct clk s3c2440_clk_ac97 = {
107 .ctrlbit = S3C2440_CLKCON_CAMERA, 109 .ctrlbit = S3C2440_CLKCON_CAMERA,
108}; 110};
109 111
112static unsigned long s3c2440_fclk_n_getrate(struct clk *clk)
113{
114 unsigned long ucon0, ucon1, ucon2, divisor;
115
116 /* the fun of calculating the uart divisors on the s3c2440 */
117 ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
118 ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
119 ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
120
121 ucon0 &= S3C2440_UCON0_DIVMASK;
122 ucon1 &= S3C2440_UCON1_DIVMASK;
123 ucon2 &= S3C2440_UCON2_DIVMASK;
124
125 if (ucon0 != 0)
126 divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6;
127 else if (ucon1 != 0)
128 divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21;
129 else if (ucon2 != 0)
130 divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36;
131 else
132 /* manual calims 44, seems to be 9 */
133 divisor = 9;
134
135 return clk_get_rate(clk->parent) / divisor;
136}
137
138static struct clk s3c2440_clk_fclk_n = {
139 .name = "fclk_n",
140 .parent = &clk_f,
141 .ops = &(struct clk_ops) {
142 .get_rate = s3c2440_fclk_n_getrate,
143 },
144};
145
146static struct clk_lookup s3c2440_clk_lookup[] = {
147 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
148 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
149 CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
150};
151
110static int s3c2440_clk_add(struct device *dev) 152static int s3c2440_clk_add(struct device *dev)
111{ 153{
112 struct clk *clock_upll; 154 struct clk *clock_upll;
@@ -125,10 +167,12 @@ static int s3c2440_clk_add(struct device *dev)
125 s3c2440_clk_cam.parent = clock_h; 167 s3c2440_clk_cam.parent = clock_h;
126 s3c2440_clk_ac97.parent = clock_p; 168 s3c2440_clk_ac97.parent = clock_p;
127 s3c2440_clk_cam_upll.parent = clock_upll; 169 s3c2440_clk_cam_upll.parent = clock_upll;
170 s3c24xx_register_clock(&s3c2440_clk_fclk_n);
128 171
129 s3c24xx_register_clock(&s3c2440_clk_ac97); 172 s3c24xx_register_clock(&s3c2440_clk_ac97);
130 s3c24xx_register_clock(&s3c2440_clk_cam); 173 s3c24xx_register_clock(&s3c2440_clk_cam);
131 s3c24xx_register_clock(&s3c2440_clk_cam_upll); 174 s3c24xx_register_clock(&s3c2440_clk_cam_upll);
175 clkdev_add_table(s3c2440_clk_lookup, ARRAY_SIZE(s3c2440_clk_lookup));
132 176
133 clk_disable(&s3c2440_clk_ac97); 177 clk_disable(&s3c2440_clk_ac97);
134 clk_disable(&s3c2440_clk_cam); 178 clk_disable(&s3c2440_clk_cam);
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 121ff8d2c887..24569550de1a 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -98,22 +98,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
98#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 98#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
99#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 99#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
100 100
101static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
102 [0] = {
103 .name = "uclk",
104 .divisor = 1,
105 .min_baud = 0,
106 .max_baud = 0,
107 },
108 [1] = {
109 .name = "pclk",
110 .divisor = 1,
111 .min_baud = 0,
112 .max_baud = 0,
113 }
114};
115
116
117static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { 101static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
118 [0] = { 102 [0] = {
119 .hwport = 0, 103 .hwport = 0,
@@ -121,8 +105,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
121 .ucon = UCON, 105 .ucon = UCON,
122 .ulcon = ULCON, 106 .ulcon = ULCON,
123 .ufcon = UFCON, 107 .ufcon = UFCON,
124 .clocks = anubis_serial_clocks, 108 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
125 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
126 }, 109 },
127 [1] = { 110 [1] = {
128 .hwport = 2, 111 .hwport = 2,
@@ -130,8 +113,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
130 .ucon = UCON, 113 .ucon = UCON,
131 .ulcon = ULCON, 114 .ulcon = ULCON,
132 .ufcon = UFCON, 115 .ufcon = UFCON,
133 .clocks = anubis_serial_clocks, 116 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
134 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
135 }, 117 },
136}; 118};
137 119
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index b7e334f07da4..d6a9763110cd 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -59,22 +59,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
59#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 59#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
60#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 60#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
61 61
62static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
63 [0] = {
64 .name = "uclk",
65 .divisor = 1,
66 .min_baud = 0,
67 .max_baud = 0,
68 },
69 [1] = {
70 .name = "pclk",
71 .divisor = 1,
72 .min_baud = 0,
73 .max_baud = 0,
74 }
75};
76
77
78static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { 62static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
79 [0] = { 63 [0] = {
80 .hwport = 0, 64 .hwport = 0,
@@ -82,8 +66,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
82 .ucon = UCON, 66 .ucon = UCON,
83 .ulcon = ULCON, 67 .ulcon = ULCON,
84 .ufcon = UFCON, 68 .ufcon = UFCON,
85 .clocks = at2440evb_serial_clocks, 69 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
86 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
87 }, 70 },
88 [1] = { 71 [1] = {
89 .hwport = 1, 72 .hwport = 1,
@@ -91,8 +74,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
91 .ucon = UCON, 74 .ucon = UCON,
92 .ulcon = ULCON, 75 .ulcon = ULCON,
93 .ufcon = UFCON, 76 .ufcon = UFCON,
94 .clocks = at2440evb_serial_clocks, 77 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
95 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
96 }, 78 },
97}; 79};
98 80
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 437322ffd88d..adbbb85bc4cd 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -169,6 +169,24 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
169 .lcdcon5 = (S3C2410_LCDCON5_FRM565 | 169 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
170 S3C2410_LCDCON5_HWSWP), 170 S3C2410_LCDCON5_HWSWP),
171 }, 171 },
172 /* mini2440 + 3.5" TFT (LCD-W35i, LQ035Q1DG06 type) + touchscreen*/
173 [3] = {
174 _LCD_DECLARE(
175 /* clock */
176 7,
177 /* xres, margin_right, margin_left, hsync */
178 320, 68, 66, 4,
179 /* yres, margin_top, margin_bottom, vsync */
180 240, 4, 4, 9,
181 /* refresh rate */
182 60),
183 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
184 S3C2410_LCDCON5_INVVDEN |
185 S3C2410_LCDCON5_INVVFRAME |
186 S3C2410_LCDCON5_INVVLINE |
187 S3C2410_LCDCON5_INVVCLK |
188 S3C2410_LCDCON5_HWSWP),
189 },
172}; 190};
173 191
174/* todo - put into gpio header */ 192/* todo - put into gpio header */
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index e795715fba30..4c480ef734f6 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -102,21 +102,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
102#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 102#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
103#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 103#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
104 104
105static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
106 [0] = {
107 .name = "uclk",
108 .divisor = 1,
109 .min_baud = 0,
110 .max_baud = 0,
111 },
112 [1] = {
113 .name = "pclk",
114 .divisor = 1,
115 .min_baud = 0,
116 .max_baud = 0,
117 }
118};
119
120static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { 105static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
121 [0] = { 106 [0] = {
122 .hwport = 0, 107 .hwport = 0,
@@ -124,8 +109,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
124 .ucon = UCON, 109 .ucon = UCON,
125 .ulcon = ULCON, 110 .ulcon = ULCON,
126 .ufcon = UFCON, 111 .ufcon = UFCON,
127 .clocks = osiris_serial_clocks, 112 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
128 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
129 }, 113 },
130 [1] = { 114 [1] = {
131 .hwport = 1, 115 .hwport = 1,
@@ -133,8 +117,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
133 .ucon = UCON, 117 .ucon = UCON,
134 .ulcon = ULCON, 118 .ulcon = ULCON,
135 .ufcon = UFCON, 119 .ufcon = UFCON,
136 .clocks = osiris_serial_clocks, 120 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
137 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
138 }, 121 },
139 [2] = { 122 [2] = {
140 .hwport = 2, 123 .hwport = 2,
@@ -142,8 +125,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
142 .ucon = UCON, 125 .ucon = UCON,
143 .ulcon = ULCON, 126 .ulcon = ULCON,
144 .ufcon = UFCON, 127 .ufcon = UFCON,
145 .clocks = osiris_serial_clocks, 128 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
146 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
147 } 129 }
148}; 130};
149 131
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 332d7533bd96..80077f6472ee 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -70,15 +70,6 @@
70static struct map_desc rx1950_iodesc[] __initdata = { 70static struct map_desc rx1950_iodesc[] __initdata = {
71}; 71};
72 72
73static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
74 [0] = {
75 .name = "fclk",
76 .divisor = 0x0a,
77 .min_baud = 0,
78 .max_baud = 0,
79 },
80};
81
82static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { 73static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
83 [0] = { 74 [0] = {
84 .hwport = 0, 75 .hwport = 0,
@@ -86,8 +77,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
86 .ucon = 0x3c5, 77 .ucon = 0x3c5,
87 .ulcon = 0x03, 78 .ulcon = 0x03,
88 .ufcon = 0x51, 79 .ufcon = 0x51,
89 .clocks = rx1950_serial_clocks, 80 .clk_sel = S3C2410_UCON_CLKSEL3,
90 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
91 }, 81 },
92 [1] = { 82 [1] = {
93 .hwport = 1, 83 .hwport = 1,
@@ -95,8 +85,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
95 .ucon = 0x3c5, 85 .ucon = 0x3c5,
96 .ulcon = 0x03, 86 .ulcon = 0x03,
97 .ufcon = 0x51, 87 .ufcon = 0x51,
98 .clocks = rx1950_serial_clocks, 88 .clk_sel = S3C2410_UCON_CLKSEL3,
99 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
100 }, 89 },
101 /* IR port */ 90 /* IR port */
102 [2] = { 91 [2] = {
@@ -105,8 +94,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
105 .ucon = 0x3c5, 94 .ucon = 0x3c5,
106 .ulcon = 0x43, 95 .ulcon = 0x43,
107 .ufcon = 0xf1, 96 .ufcon = 0xf1,
108 .clocks = rx1950_serial_clocks, 97 .clk_sel = S3C2410_UCON_CLKSEL3,
109 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
110 }, 98 },
111}; 99};
112 100
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 80a0972873c2..20103bafbd4b 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -69,16 +69,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
69 }, 69 },
70}; 70};
71 71
72
73static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
74 [0] = {
75 .name = "fclk",
76 .divisor = 0,
77 .min_baud = 0,
78 .max_baud = 0,
79 }
80};
81
82static struct s3c2410_uartcfg rx3715_uartcfgs[] = { 72static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
83 [0] = { 73 [0] = {
84 .hwport = 0, 74 .hwport = 0,
@@ -86,8 +76,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
86 .ucon = 0x3c5, 76 .ucon = 0x3c5,
87 .ulcon = 0x03, 77 .ulcon = 0x03,
88 .ufcon = 0x51, 78 .ufcon = 0x51,
89 .clocks = rx3715_serial_clocks, 79 .clk_sel = S3C2410_UCON_CLKSEL3,
90 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
91 }, 80 },
92 [1] = { 81 [1] = {
93 .hwport = 1, 82 .hwport = 1,
@@ -95,8 +84,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
95 .ucon = 0x3c5, 84 .ucon = 0x3c5,
96 .ulcon = 0x03, 85 .ulcon = 0x03,
97 .ufcon = 0x00, 86 .ufcon = 0x00,
98 .clocks = rx3715_serial_clocks, 87 .clk_sel = S3C2410_UCON_CLKSEL3,
99 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
100 }, 88 },
101 /* IR port */ 89 /* IR port */
102 [2] = { 90 [2] = {
@@ -105,8 +93,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
105 .ucon = 0x3c5, 93 .ucon = 0x3c5,
106 .ulcon = 0x43, 94 .ulcon = 0x43,
107 .ufcon = 0x51, 95 .ufcon = 0x51,
108 .clocks = rx3715_serial_clocks, 96 .clk_sel = S3C2410_UCON_CLKSEL3,
109 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
110 } 97 }
111}; 98};
112 99
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 381586c7b1b2..dd20c66cd700 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -78,6 +78,11 @@ config S3C64XX_SETUP_SDHCI_GPIO
78 help 78 help
79 Common setup code for S3C64XX SDHCI GPIO configurations 79 Common setup code for S3C64XX SDHCI GPIO configurations
80 80
81config S3C64XX_SETUP_SPI
82 bool
83 help
84 Common setup code for SPI GPIO configurations
85
81# S36400 Macchine support 86# S36400 Macchine support
82 87
83config MACH_SMDK6400 88config MACH_SMDK6400
@@ -189,7 +194,7 @@ config SMDK6410_WM1190_EV1
189 depends on MACH_SMDK6410 194 depends on MACH_SMDK6410
190 select REGULATOR 195 select REGULATOR
191 select REGULATOR_WM8350 196 select REGULATOR_WM8350
192 select S3C24XX_GPIO_EXTRA64 197 select SAMSUNG_GPIO_EXTRA64
193 select MFD_WM8350_I2C 198 select MFD_WM8350_I2C
194 select MFD_WM8350_CONFIG_MODE_0 199 select MFD_WM8350_CONFIG_MODE_0
195 select MFD_WM8350_CONFIG_MODE_3 200 select MFD_WM8350_CONFIG_MODE_3
@@ -207,7 +212,7 @@ config SMDK6410_WM1192_EV1
207 depends on MACH_SMDK6410 212 depends on MACH_SMDK6410
208 select REGULATOR 213 select REGULATOR
209 select REGULATOR_WM831X 214 select REGULATOR_WM831X
210 select S3C24XX_GPIO_EXTRA64 215 select SAMSUNG_GPIO_EXTRA64
211 select MFD_WM831X 216 select MFD_WM831X
212 select MFD_WM831X_I2C 217 select MFD_WM831X_I2C
213 help 218 help
@@ -277,6 +282,7 @@ config MACH_WLF_CRAGG_6410
277 select S3C64XX_SETUP_IDE 282 select S3C64XX_SETUP_IDE
278 select S3C64XX_SETUP_FB_24BPP 283 select S3C64XX_SETUP_FB_24BPP
279 select S3C64XX_SETUP_KEYPAD 284 select S3C64XX_SETUP_KEYPAD
285 select S3C64XX_SETUP_SPI
280 select SAMSUNG_DEV_ADC 286 select SAMSUNG_DEV_ADC
281 select SAMSUNG_DEV_KEYPAD 287 select SAMSUNG_DEV_KEYPAD
282 select S3C_DEV_USB_HOST 288 select S3C_DEV_USB_HOST
@@ -287,8 +293,8 @@ config MACH_WLF_CRAGG_6410
287 select S3C_DEV_I2C1 293 select S3C_DEV_I2C1
288 select S3C_DEV_WDT 294 select S3C_DEV_WDT
289 select S3C_DEV_RTC 295 select S3C_DEV_RTC
290 select S3C64XX_DEV_SPI 296 select S3C64XX_DEV_SPI0
291 select S3C24XX_GPIO_EXTRA128 297 select SAMSUNG_GPIO_EXTRA128
292 select I2C 298 select I2C
293 help 299 help
294 Machine support for the Wolfson Cragganmore S3C6410 variant. 300 Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index f37016cebbe3..1822ac2eba31 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -40,8 +40,8 @@ obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
40obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o 40obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
41obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o 41obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
42obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o 42obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
43obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
44obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 43obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
44obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o
45 45
46# Machine support 46# Machine support
47 47
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 625219b9cefc..31bb27dc4aeb 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -184,18 +184,6 @@ static struct clk init_clocks_off[] = {
184 .enable = s3c64xx_pclk_ctrl, 184 .enable = s3c64xx_pclk_ctrl,
185 .ctrlbit = S3C_CLKCON_PCLK_SPI1, 185 .ctrlbit = S3C_CLKCON_PCLK_SPI1,
186 }, { 186 }, {
187 .name = "spi_48m",
188 .devname = "s3c64xx-spi.0",
189 .parent = &clk_48m,
190 .enable = s3c64xx_sclk_ctrl,
191 .ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
192 }, {
193 .name = "spi_48m",
194 .devname = "s3c64xx-spi.1",
195 .parent = &clk_48m,
196 .enable = s3c64xx_sclk_ctrl,
197 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
198 }, {
199 .name = "48m", 187 .name = "48m",
200 .devname = "s3c-sdhci.0", 188 .devname = "s3c-sdhci.0",
201 .parent = &clk_48m, 189 .parent = &clk_48m,
@@ -226,6 +214,22 @@ static struct clk init_clocks_off[] = {
226 }, 214 },
227}; 215};
228 216
217static struct clk clk_48m_spi0 = {
218 .name = "spi_48m",
219 .devname = "s3c64xx-spi.0",
220 .parent = &clk_48m,
221 .enable = s3c64xx_sclk_ctrl,
222 .ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
223};
224
225static struct clk clk_48m_spi1 = {
226 .name = "spi_48m",
227 .devname = "s3c64xx-spi.1",
228 .parent = &clk_48m,
229 .enable = s3c64xx_sclk_ctrl,
230 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
231};
232
229static struct clk init_clocks[] = { 233static struct clk init_clocks[] = {
230 { 234 {
231 .name = "lcd", 235 .name = "lcd",
@@ -243,24 +247,6 @@ static struct clk init_clocks[] = {
243 .enable = s3c64xx_hclk_ctrl, 247 .enable = s3c64xx_hclk_ctrl,
244 .ctrlbit = S3C_CLKCON_HCLK_UHOST, 248 .ctrlbit = S3C_CLKCON_HCLK_UHOST,
245 }, { 249 }, {
246 .name = "hsmmc",
247 .devname = "s3c-sdhci.0",
248 .parent = &clk_h,
249 .enable = s3c64xx_hclk_ctrl,
250 .ctrlbit = S3C_CLKCON_HCLK_HSMMC0,
251 }, {
252 .name = "hsmmc",
253 .devname = "s3c-sdhci.1",
254 .parent = &clk_h,
255 .enable = s3c64xx_hclk_ctrl,
256 .ctrlbit = S3C_CLKCON_HCLK_HSMMC1,
257 }, {
258 .name = "hsmmc",
259 .devname = "s3c-sdhci.2",
260 .parent = &clk_h,
261 .enable = s3c64xx_hclk_ctrl,
262 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
263 }, {
264 .name = "otg", 250 .name = "otg",
265 .parent = &clk_h, 251 .parent = &clk_h,
266 .enable = s3c64xx_hclk_ctrl, 252 .enable = s3c64xx_hclk_ctrl,
@@ -310,6 +296,29 @@ static struct clk init_clocks[] = {
310 } 296 }
311}; 297};
312 298
299static struct clk clk_hsmmc0 = {
300 .name = "hsmmc",
301 .devname = "s3c-sdhci.0",
302 .parent = &clk_h,
303 .enable = s3c64xx_hclk_ctrl,
304 .ctrlbit = S3C_CLKCON_HCLK_HSMMC0,
305};
306
307static struct clk clk_hsmmc1 = {
308 .name = "hsmmc",
309 .devname = "s3c-sdhci.1",
310 .parent = &clk_h,
311 .enable = s3c64xx_hclk_ctrl,
312 .ctrlbit = S3C_CLKCON_HCLK_HSMMC1,
313};
314
315static struct clk clk_hsmmc2 = {
316 .name = "hsmmc",
317 .devname = "s3c-sdhci.2",
318 .parent = &clk_h,
319 .enable = s3c64xx_hclk_ctrl,
320 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
321};
313 322
314static struct clk clk_fout_apll = { 323static struct clk clk_fout_apll = {
315 .name = "fout_apll", 324 .name = "fout_apll",
@@ -578,36 +587,6 @@ static struct clksrc_sources clkset_camif = {
578static struct clksrc_clk clksrcs[] = { 587static struct clksrc_clk clksrcs[] = {
579 { 588 {
580 .clk = { 589 .clk = {
581 .name = "mmc_bus",
582 .devname = "s3c-sdhci.0",
583 .ctrlbit = S3C_CLKCON_SCLK_MMC0,
584 .enable = s3c64xx_sclk_ctrl,
585 },
586 .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 },
587 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 },
588 .sources = &clkset_spi_mmc,
589 }, {
590 .clk = {
591 .name = "mmc_bus",
592 .devname = "s3c-sdhci.1",
593 .ctrlbit = S3C_CLKCON_SCLK_MMC1,
594 .enable = s3c64xx_sclk_ctrl,
595 },
596 .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 },
597 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 },
598 .sources = &clkset_spi_mmc,
599 }, {
600 .clk = {
601 .name = "mmc_bus",
602 .devname = "s3c-sdhci.2",
603 .ctrlbit = S3C_CLKCON_SCLK_MMC2,
604 .enable = s3c64xx_sclk_ctrl,
605 },
606 .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 },
607 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 },
608 .sources = &clkset_spi_mmc,
609 }, {
610 .clk = {
611 .name = "usb-bus-host", 590 .name = "usb-bus-host",
612 .ctrlbit = S3C_CLKCON_SCLK_UHOST, 591 .ctrlbit = S3C_CLKCON_SCLK_UHOST,
613 .enable = s3c64xx_sclk_ctrl, 592 .enable = s3c64xx_sclk_ctrl,
@@ -617,35 +596,6 @@ static struct clksrc_clk clksrcs[] = {
617 .sources = &clkset_uhost, 596 .sources = &clkset_uhost,
618 }, { 597 }, {
619 .clk = { 598 .clk = {
620 .name = "uclk1",
621 .ctrlbit = S3C_CLKCON_SCLK_UART,
622 .enable = s3c64xx_sclk_ctrl,
623 },
624 .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 },
625 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 },
626 .sources = &clkset_uart,
627 }, {
628/* Where does UCLK0 come from? */
629 .clk = {
630 .name = "spi-bus",
631 .devname = "s3c64xx-spi.0",
632 .ctrlbit = S3C_CLKCON_SCLK_SPI0,
633 .enable = s3c64xx_sclk_ctrl,
634 },
635 .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
636 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
637 .sources = &clkset_spi_mmc,
638 }, {
639 .clk = {
640 .name = "spi-bus",
641 .devname = "s3c64xx-spi.1",
642 .enable = s3c64xx_sclk_ctrl,
643 },
644 .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
645 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
646 .sources = &clkset_spi_mmc,
647 }, {
648 .clk = {
649 .name = "audio-bus", 599 .name = "audio-bus",
650 .devname = "samsung-i2s.0", 600 .devname = "samsung-i2s.0",
651 .ctrlbit = S3C_CLKCON_SCLK_AUDIO0, 601 .ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
@@ -695,6 +645,78 @@ static struct clksrc_clk clksrcs[] = {
695 }, 645 },
696}; 646};
697 647
648/* Where does UCLK0 come from? */
649static struct clksrc_clk clk_sclk_uclk = {
650 .clk = {
651 .name = "uclk1",
652 .ctrlbit = S3C_CLKCON_SCLK_UART,
653 .enable = s3c64xx_sclk_ctrl,
654 },
655 .reg_src = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1 },
656 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4 },
657 .sources = &clkset_uart,
658};
659
660static struct clksrc_clk clk_sclk_mmc0 = {
661 .clk = {
662 .name = "mmc_bus",
663 .devname = "s3c-sdhci.0",
664 .ctrlbit = S3C_CLKCON_SCLK_MMC0,
665 .enable = s3c64xx_sclk_ctrl,
666 },
667 .reg_src = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2 },
668 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4 },
669 .sources = &clkset_spi_mmc,
670};
671
672static struct clksrc_clk clk_sclk_mmc1 = {
673 .clk = {
674 .name = "mmc_bus",
675 .devname = "s3c-sdhci.1",
676 .ctrlbit = S3C_CLKCON_SCLK_MMC1,
677 .enable = s3c64xx_sclk_ctrl,
678 },
679 .reg_src = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2 },
680 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4 },
681 .sources = &clkset_spi_mmc,
682};
683
684static struct clksrc_clk clk_sclk_mmc2 = {
685 .clk = {
686 .name = "mmc_bus",
687 .devname = "s3c-sdhci.2",
688 .ctrlbit = S3C_CLKCON_SCLK_MMC2,
689 .enable = s3c64xx_sclk_ctrl,
690 },
691 .reg_src = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2 },
692 .reg_div = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4 },
693 .sources = &clkset_spi_mmc,
694};
695
696static struct clksrc_clk clk_sclk_spi0 = {
697 .clk = {
698 .name = "spi-bus",
699 .devname = "s3c64xx-spi.0",
700 .ctrlbit = S3C_CLKCON_SCLK_SPI0,
701 .enable = s3c64xx_sclk_ctrl,
702 },
703 .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
704 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
705 .sources = &clkset_spi_mmc,
706};
707
708static struct clksrc_clk clk_sclk_spi1 = {
709 .clk = {
710 .name = "spi-bus",
711 .devname = "s3c64xx-spi.1",
712 .ctrlbit = S3C_CLKCON_SCLK_SPI1,
713 .enable = s3c64xx_sclk_ctrl,
714 },
715 .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
716 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
717 .sources = &clkset_spi_mmc,
718};
719
698/* Clock initialisation code */ 720/* Clock initialisation code */
699 721
700static struct clksrc_clk *init_parents[] = { 722static struct clksrc_clk *init_parents[] = {
@@ -703,6 +725,39 @@ static struct clksrc_clk *init_parents[] = {
703 &clk_mout_mpll, 725 &clk_mout_mpll,
704}; 726};
705 727
728static struct clksrc_clk *clksrc_cdev[] = {
729 &clk_sclk_uclk,
730 &clk_sclk_mmc0,
731 &clk_sclk_mmc1,
732 &clk_sclk_mmc2,
733 &clk_sclk_spi0,
734 &clk_sclk_spi1,
735};
736
737static struct clk *clk_cdev[] = {
738 &clk_hsmmc0,
739 &clk_hsmmc1,
740 &clk_hsmmc2,
741 &clk_48m_spi0,
742 &clk_48m_spi1,
743};
744
745static struct clk_lookup s3c64xx_clk_lookup[] = {
746 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
747 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
748 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
749 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
750 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
751 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
752 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
753 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
754 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
755 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
756 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_48m_spi0),
757 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
758 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_48m_spi1),
759};
760
706#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) 761#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
707 762
708void __init_or_cpufreq s3c64xx_setup_clocks(void) 763void __init_or_cpufreq s3c64xx_setup_clocks(void)
@@ -811,6 +866,8 @@ static struct clk *clks[] __initdata = {
811void __init s3c64xx_register_clocks(unsigned long xtal, 866void __init s3c64xx_register_clocks(unsigned long xtal,
812 unsigned armclk_divlimit) 867 unsigned armclk_divlimit)
813{ 868{
869 unsigned int cnt;
870
814 armclk_mask = armclk_divlimit; 871 armclk_mask = armclk_divlimit;
815 872
816 s3c24xx_register_baseclocks(xtal); 873 s3c24xx_register_baseclocks(xtal);
@@ -821,7 +878,15 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
821 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 878 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
822 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 879 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
823 880
881 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
882 for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
883 s3c_disable_clocks(clk_cdev[cnt], 1);
884
824 s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); 885 s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
825 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 886 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
887 for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
888 s3c_register_clksrc(clksrc_cdev[cnt], 1);
889 clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
890
826 s3c_pwmclk_init(); 891 s3c_pwmclk_init();
827} 892}
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
deleted file mode 100644
index 3341fd118723..000000000000
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ /dev/null
@@ -1,180 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/dev-spi.c
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/export.h>
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17
18#include <mach/dma.h>
19#include <mach/map.h>
20#include <mach/spi-clocks.h>
21#include <mach/irqs.h>
22
23#include <plat/s3c64xx-spi.h>
24#include <plat/gpio-cfg.h>
25#include <plat/devs.h>
26
27static char *spi_src_clks[] = {
28 [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
29 [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
30 [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
31};
32
33/* SPI Controller platform_devices */
34
35/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
36 * The emulated CS is toggled by board specific mechanism, as it can
37 * be either some immediate GPIO or some signal out of some other
38 * chip in between ... or some yet another way.
39 * We simply do not assume anything about CS.
40 */
41static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
42{
43 unsigned int base;
44
45 switch (pdev->id) {
46 case 0:
47 base = S3C64XX_GPC(0);
48 break;
49
50 case 1:
51 base = S3C64XX_GPC(4);
52 break;
53
54 default:
55 dev_err(&pdev->dev, "Invalid SPI Controller number!");
56 return -EINVAL;
57 }
58
59 s3c_gpio_cfgall_range(base, 3,
60 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
61
62 return 0;
63}
64
65static struct resource s3c64xx_spi0_resource[] = {
66 [0] = {
67 .start = S3C64XX_PA_SPI0,
68 .end = S3C64XX_PA_SPI0 + 0x100 - 1,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = DMACH_SPI0_TX,
73 .end = DMACH_SPI0_TX,
74 .flags = IORESOURCE_DMA,
75 },
76 [2] = {
77 .start = DMACH_SPI0_RX,
78 .end = DMACH_SPI0_RX,
79 .flags = IORESOURCE_DMA,
80 },
81 [3] = {
82 .start = IRQ_SPI0,
83 .end = IRQ_SPI0,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
89 .cfg_gpio = s3c64xx_spi_cfg_gpio,
90 .fifo_lvl_mask = 0x7f,
91 .rx_lvl_offset = 13,
92 .tx_st_done = 21,
93};
94
95static u64 spi_dmamask = DMA_BIT_MASK(32);
96
97struct platform_device s3c64xx_device_spi0 = {
98 .name = "s3c64xx-spi",
99 .id = 0,
100 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
101 .resource = s3c64xx_spi0_resource,
102 .dev = {
103 .dma_mask = &spi_dmamask,
104 .coherent_dma_mask = DMA_BIT_MASK(32),
105 .platform_data = &s3c64xx_spi0_pdata,
106 },
107};
108EXPORT_SYMBOL(s3c64xx_device_spi0);
109
110static struct resource s3c64xx_spi1_resource[] = {
111 [0] = {
112 .start = S3C64XX_PA_SPI1,
113 .end = S3C64XX_PA_SPI1 + 0x100 - 1,
114 .flags = IORESOURCE_MEM,
115 },
116 [1] = {
117 .start = DMACH_SPI1_TX,
118 .end = DMACH_SPI1_TX,
119 .flags = IORESOURCE_DMA,
120 },
121 [2] = {
122 .start = DMACH_SPI1_RX,
123 .end = DMACH_SPI1_RX,
124 .flags = IORESOURCE_DMA,
125 },
126 [3] = {
127 .start = IRQ_SPI1,
128 .end = IRQ_SPI1,
129 .flags = IORESOURCE_IRQ,
130 },
131};
132
133static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
134 .cfg_gpio = s3c64xx_spi_cfg_gpio,
135 .fifo_lvl_mask = 0x7f,
136 .rx_lvl_offset = 13,
137 .tx_st_done = 21,
138};
139
140struct platform_device s3c64xx_device_spi1 = {
141 .name = "s3c64xx-spi",
142 .id = 1,
143 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
144 .resource = s3c64xx_spi1_resource,
145 .dev = {
146 .dma_mask = &spi_dmamask,
147 .coherent_dma_mask = DMA_BIT_MASK(32),
148 .platform_data = &s3c64xx_spi1_pdata,
149 },
150};
151EXPORT_SYMBOL(s3c64xx_device_spi1);
152
153void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
154{
155 struct s3c64xx_spi_info *pd;
156
157 /* Reject invalid configuration */
158 if (!num_cs || src_clk_nr < 0
159 || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
160 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
161 return;
162 }
163
164 switch (cntrlr) {
165 case 0:
166 pd = &s3c64xx_spi0_pdata;
167 break;
168 case 1:
169 pd = &s3c64xx_spi1_pdata;
170 break;
171 default:
172 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
173 __func__, cntrlr);
174 return;
175 }
176
177 pd->num_cs = num_cs;
178 pd->src_clk_nr = src_clk_nr;
179 pd->src_clk_name = spi_src_clks[src_clk_nr];
180}
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
index be9074e17dfd..5d55ab018b6b 100644
--- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
@@ -15,9 +15,11 @@
15 15
16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START 16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) 17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
18#define CODEC_IRQ_BASE (IRQ_BOARD_START + 128)
18 19
19#define PCA935X_GPIO_BASE GPIO_BOARD_START 20#define PCA935X_GPIO_BASE GPIO_BOARD_START
20#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) 21#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
21#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16) 22#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32)
23#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64)
22 24
23#endif 25#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index 6e34c2f6e670..8b540c42d5dd 100644
--- a/arch/arm/mach-s3c64xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -88,6 +88,6 @@ enum s3c_gpio_number {
88/* define the number of gpios we need to the one after the GPQ() range */ 88/* define the number of gpios we need to the one after the GPQ() range */
89#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) 89#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
90 90
91#define BOARD_NR_GPIOS 16 91#define BOARD_NR_GPIOS (16 + CONFIG_SAMSUNG_GPIO_EXTRA)
92 92
93#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS) 93#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 443f85b3c203..96d60e0d9372 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -169,7 +169,7 @@
169#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1) 169#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
170 170
171#ifdef CONFIG_MACH_WLF_CRAGG_6410 171#ifdef CONFIG_MACH_WLF_CRAGG_6410
172#define IRQ_BOARD_NR 128 172#define IRQ_BOARD_NR 160
173#elif defined(CONFIG_SMDK6410_WM1190_EV1) 173#elif defined(CONFIG_SMDK6410_WM1190_EV1)
174#define IRQ_BOARD_NR 64 174#define IRQ_BOARD_NR 64
175#elif defined(CONFIG_SMDK6410_WM1192_EV1) 175#elif defined(CONFIG_SMDK6410_WM1192_EV1)
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 23a1d71e4d53..8e2097bb208a 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -115,6 +115,8 @@
115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
116#define S3C_PA_RTC S3C64XX_PA_RTC 116#define S3C_PA_RTC S3C64XX_PA_RTC
117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG 117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
118#define S3C_PA_SPI0 S3C64XX_PA_SPI0
119#define S3C_PA_SPI1 S3C64XX_PA_SPI1
118 120
119#define SAMSUNG_PA_ADC S3C64XX_PA_ADC 121#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
120#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON 122#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index f208154b1382..cd3c97e2ee75 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -14,13 +14,43 @@
14 14
15#include <linux/mfd/wm831x/irq.h> 15#include <linux/mfd/wm831x/irq.h>
16#include <linux/mfd/wm831x/gpio.h> 16#include <linux/mfd/wm831x/gpio.h>
17#include <linux/mfd/wm8994/pdata.h>
17 18
19#include <sound/wm5100.h>
18#include <sound/wm8996.h> 20#include <sound/wm8996.h>
19#include <sound/wm8962.h> 21#include <sound/wm8962.h>
20#include <sound/wm9081.h> 22#include <sound/wm9081.h>
21 23
22#include <mach/crag6410.h> 24#include <mach/crag6410.h>
23 25
26static struct wm5100_pdata wm5100_pdata = {
27 .ldo_ena = S3C64XX_GPN(7),
28 .irq_flags = IRQF_TRIGGER_HIGH,
29 .gpio_base = CODEC_GPIO_BASE,
30
31 .in_mode = {
32 WM5100_IN_DIFF,
33 WM5100_IN_DIFF,
34 WM5100_IN_DIFF,
35 WM5100_IN_SE,
36 },
37
38 .hp_pol = CODEC_GPIO_BASE + 3,
39 .jack_modes = {
40 { WM5100_MICDET_MICBIAS3, 0, 0 },
41 { WM5100_MICDET_MICBIAS2, 1, 1 },
42 },
43
44 .gpio_defaults = {
45 0,
46 0,
47 0,
48 0,
49 0x2, /* IRQ: CMOS output */
50 0x3, /* CLKOUT: CMOS output */
51 },
52};
53
24static struct wm8996_retune_mobile_config wm8996_retune[] = { 54static struct wm8996_retune_mobile_config wm8996_retune[] = {
25 { 55 {
26 .name = "Sub LPF", 56 .name = "Sub LPF",
@@ -72,7 +102,6 @@ static struct wm8962_pdata wm8962_pdata __initdata = {
72 0x8000 | WM8962_GPIO_FN_DMICDAT, 102 0x8000 | WM8962_GPIO_FN_DMICDAT,
73 WM8962_GPIO_FN_IRQ, /* Open drain mode */ 103 WM8962_GPIO_FN_IRQ, /* Open drain mode */
74 }, 104 },
75 .irq_active_low = true,
76}; 105};
77 106
78static struct wm9081_pdata wm9081_pdata __initdata = { 107static struct wm9081_pdata wm9081_pdata __initdata = {
@@ -91,6 +120,7 @@ static const struct i2c_board_info wm1254_devs[] = {
91 120
92static const struct i2c_board_info wm1255_devs[] = { 121static const struct i2c_board_info wm1255_devs[] = {
93 { I2C_BOARD_INFO("wm5100", 0x1a), 122 { I2C_BOARD_INFO("wm5100", 0x1a),
123 .platform_data = &wm5100_pdata,
94 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, 124 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
95 }, 125 },
96 { I2C_BOARD_INFO("wm9081", 0x6c), 126 { I2C_BOARD_INFO("wm9081", 0x6c),
@@ -104,6 +134,24 @@ static const struct i2c_board_info wm1259_devs[] = {
104 }, 134 },
105}; 135};
106 136
137static struct wm8994_pdata wm8994_pdata = {
138 .gpio_base = CODEC_GPIO_BASE,
139 .gpio_defaults = {
140 0x3, /* IRQ out, active high, CMOS */
141 },
142 .irq_base = CODEC_IRQ_BASE,
143 .ldo = {
144 { .supply = "WALLVDD" },
145 { .supply = "WALLVDD" },
146 },
147};
148
149static const struct i2c_board_info wm1277_devs[] = {
150 { I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
151 .platform_data = &wm8994_pdata,
152 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
153 },
154};
107 155
108static __devinitdata const struct { 156static __devinitdata const struct {
109 u8 id; 157 u8 id;
@@ -125,6 +173,8 @@ static __devinitdata const struct {
125 { .id = 0x3b, .name = "1255-EV1 Kilchoman", 173 { .id = 0x3b, .name = "1255-EV1 Kilchoman",
126 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) }, 174 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
127 { .id = 0x3c, .name = "1273-EV1 Longmorn" }, 175 { .id = 0x3c, .name = "1273-EV1 Longmorn" },
176 { .id = 0x3d, .name = "1277-EV1 Littlemill",
177 .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
128}; 178};
129 179
130static __devinit int wlf_gf_module_probe(struct i2c_client *i2c, 180static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
@@ -154,8 +204,8 @@ static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
154 "Failed to register dev: %d\n", ret); 204 "Failed to register dev: %d\n", ret);
155 } 205 }
156 } else { 206 } else {
157 dev_warn(&i2c->dev, "Unknown module ID %d revision %d\n", 207 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
158 id, rev); 208 id, rev + 1);
159 } 209 }
160 210
161 return 0; 211 return 0;
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index fb786b6a2eae..680fd758ff2d 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,8 @@
37#include <linux/mfd/wm831x/irq.h> 37#include <linux/mfd/wm831x/irq.h>
38#include <linux/mfd/wm831x/gpio.h> 38#include <linux/mfd/wm831x/gpio.h>
39 39
40#include <sound/wm1250-ev1.h>
41
40#include <asm/hardware/vic.h> 42#include <asm/hardware/vic.h>
41#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
42#include <asm/mach-types.h> 44#include <asm/mach-types.h>
@@ -289,6 +291,11 @@ static struct platform_device speyside_wm8962_device = {
289 .id = -1, 291 .id = -1,
290}; 292};
291 293
294static struct platform_device littlemill_device = {
295 .name = "littlemill",
296 .id = -1,
297};
298
292static struct regulator_consumer_supply wallvdd_consumers[] = { 299static struct regulator_consumer_supply wallvdd_consumers[] = {
293 REGULATOR_SUPPLY("SPKVDD1", "1-001a"), 300 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
294 REGULATOR_SUPPLY("SPKVDD2", "1-001a"), 301 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
@@ -341,6 +348,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
341 &crag6410_backlight_device, 348 &crag6410_backlight_device,
342 &speyside_device, 349 &speyside_device,
343 &speyside_wm8962_device, 350 &speyside_wm8962_device,
351 &littlemill_device,
344 &lowland_device, 352 &lowland_device,
345 &wallvdd_device, 353 &wallvdd_device,
346}; 354};
@@ -374,6 +382,10 @@ static struct regulator_init_data vddarm __initdata = {
374 .driver_data = &vddarm_pdata, 382 .driver_data = &vddarm_pdata,
375}; 383};
376 384
385static struct regulator_consumer_supply vddint_consumers[] __initdata = {
386 REGULATOR_SUPPLY("vddint", NULL),
387};
388
377static struct regulator_init_data vddint __initdata = { 389static struct regulator_init_data vddint __initdata = {
378 .constraints = { 390 .constraints = {
379 .name = "VDDINT", 391 .name = "VDDINT",
@@ -382,6 +394,9 @@ static struct regulator_init_data vddint __initdata = {
382 .always_on = 1, 394 .always_on = 1,
383 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 395 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
384 }, 396 },
397 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
398 .consumer_supplies = vddint_consumers,
399 .supply_regulator = "WALLVDD",
385}; 400};
386 401
387static struct regulator_init_data vddmem __initdata = { 402static struct regulator_init_data vddmem __initdata = {
@@ -502,7 +517,8 @@ static struct wm831x_touch_pdata touch_pdata __initdata = {
502static struct wm831x_pdata crag_pmic_pdata __initdata = { 517static struct wm831x_pdata crag_pmic_pdata __initdata = {
503 .wm831x_num = 1, 518 .wm831x_num = 1,
504 .irq_base = BANFF_PMIC_IRQ_BASE, 519 .irq_base = BANFF_PMIC_IRQ_BASE,
505 .gpio_base = GPIO_BOARD_START + 8, 520 .gpio_base = BANFF_PMIC_GPIO_BASE,
521 .soft_shutdown = true,
506 522
507 .backup = &banff_backup_pdata, 523 .backup = &banff_backup_pdata,
508 524
@@ -607,6 +623,7 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
607 .wm831x_num = 2, 623 .wm831x_num = 2,
608 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, 624 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
609 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, 625 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
626 .soft_shutdown = true,
610 627
611 .gpio_defaults = { 628 .gpio_defaults = {
612 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ 629 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
@@ -624,6 +641,16 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
624 .disable_touch = true, 641 .disable_touch = true,
625}; 642};
626 643
644static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
645 .gpios = {
646 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
647 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
648 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
649 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
650 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
651 },
652};
653
627static struct i2c_board_info i2c_devs1[] __initdata = { 654static struct i2c_board_info i2c_devs1[] __initdata = {
628 { I2C_BOARD_INFO("wm8311", 0x34), 655 { I2C_BOARD_INFO("wm8311", 0x34),
629 .irq = S3C_EINT(0), 656 .irq = S3C_EINT(0),
@@ -633,7 +660,13 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
633 { I2C_BOARD_INFO("wlf-gf-module", 0x25) }, 660 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
634 { I2C_BOARD_INFO("wlf-gf-module", 0x26) }, 661 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
635 662
636 { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, 663 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
664 .platform_data = &wm1250_ev1_pdata },
665};
666
667static struct s3c2410_platform_i2c i2c1_pdata = {
668 .frequency = 400000,
669 .bus_num = 1,
637}; 670};
638 671
639static void __init crag6410_map_io(void) 672static void __init crag6410_map_io(void)
@@ -694,7 +727,7 @@ static void __init crag6410_machine_init(void)
694 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); 727 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
695 728
696 s3c_i2c0_set_platdata(&i2c0_pdata); 729 s3c_i2c0_set_platdata(&i2c0_pdata);
697 s3c_i2c1_set_platdata(NULL); 730 s3c_i2c1_set_platdata(&i2c1_pdata);
698 s3c_fb_set_platdata(&crag6410_lcd_pdata); 731 s3c_fb_set_platdata(&crag6410_lcd_pdata);
699 732
700 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 733 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 7d3e81b9dd06..055dac90e0e2 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -346,10 +346,23 @@ int __init s3c64xx_pm_init(void)
346 346
347static __init int s3c64xx_pm_initcall(void) 347static __init int s3c64xx_pm_initcall(void)
348{ 348{
349 u32 val;
350
349 pm_cpu_prep = s3c64xx_pm_prepare; 351 pm_cpu_prep = s3c64xx_pm_prepare;
350 pm_cpu_sleep = s3c64xx_cpu_suspend; 352 pm_cpu_sleep = s3c64xx_cpu_suspend;
351 pm_uart_udivslot = 1; 353 pm_uart_udivslot = 1;
352 354
355 /*
356 * Unconditionally disable power domains that contain only
357 * blocks which have no mainline driver support.
358 */
359 val = __raw_readl(S3C64XX_NORMAL_CFG);
360 val &= ~(S3C64XX_NORMALCFG_DOMAIN_G_ON |
361 S3C64XX_NORMALCFG_DOMAIN_V_ON |
362 S3C64XX_NORMALCFG_DOMAIN_I_ON |
363 S3C64XX_NORMALCFG_DOMAIN_P_ON);
364 __raw_writel(val, S3C64XX_NORMAL_CFG);
365
353#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 366#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
354 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0"); 367 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
355 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1"); 368 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
deleted file mode 100644
index c75a71b21165..000000000000
--- a/arch/arm/mach-s3c64xx/setup-sdhci.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/types.h>
16
17/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
18
19char *s3c64xx_hsmmc_clksrcs[4] = {
20 [0] = "hsmmc",
21 [1] = "hsmmc",
22 [2] = "mmc_bus",
23 /* [3] = "48m", - note not successfully used yet */
24};
diff --git a/arch/arm/mach-s3c64xx/setup-spi.c b/arch/arm/mach-s3c64xx/setup-spi.c
new file mode 100644
index 000000000000..d9592ad7a825
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-spi.c
@@ -0,0 +1,45 @@
1/* linux/arch/arm/mach-s3c64xx/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
19 .fifo_lvl_mask = 0x7f,
20 .rx_lvl_offset = 13,
21 .tx_st_done = 21,
22};
23
24int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
25{
26 s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3,
27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 return 0;
29}
30#endif
31
32#ifdef CONFIG_S3C64XX_DEV_SPI1
33struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
34 .fifo_lvl_mask = 0x7f,
35 .rx_lvl_offset = 13,
36 .tx_st_done = 21,
37};
38
39int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
40{
41 s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3,
42 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
43 return 0;
44}
45#endif
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 18690c5f99e6..c87f6108eeb1 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -36,6 +36,16 @@ config S5P64X0_SETUP_I2C1
36 help 36 help
37 Common setup code for i2c bus 1. 37 Common setup code for i2c bus 1.
38 38
39config S5P64X0_SETUP_SPI
40 bool
41 help
42 Common setup code for SPI GPIO configurations
43
44config S5P64X0_SETUP_SDHCI_GPIO
45 bool
46 help
47 Common setup code for SDHCI gpio.
48
39# machine support 49# machine support
40 50
41config MACH_SMDK6440 51config MACH_SMDK6440
@@ -45,13 +55,16 @@ config MACH_SMDK6440
45 select S3C_DEV_I2C1 55 select S3C_DEV_I2C1
46 select S3C_DEV_RTC 56 select S3C_DEV_RTC
47 select S3C_DEV_WDT 57 select S3C_DEV_WDT
48 select S3C64XX_DEV_SPI 58 select S3C_DEV_HSMMC
59 select S3C_DEV_HSMMC1
60 select S3C_DEV_HSMMC2
49 select SAMSUNG_DEV_ADC 61 select SAMSUNG_DEV_ADC
50 select SAMSUNG_DEV_BACKLIGHT 62 select SAMSUNG_DEV_BACKLIGHT
51 select SAMSUNG_DEV_PWM 63 select SAMSUNG_DEV_PWM
52 select SAMSUNG_DEV_TS 64 select SAMSUNG_DEV_TS
53 select S5P64X0_SETUP_FB_24BPP 65 select S5P64X0_SETUP_FB_24BPP
54 select S5P64X0_SETUP_I2C1 66 select S5P64X0_SETUP_I2C1
67 select S5P64X0_SETUP_SDHCI_GPIO
55 help 68 help
56 Machine support for the Samsung SMDK6440 69 Machine support for the Samsung SMDK6440
57 70
@@ -62,14 +75,28 @@ config MACH_SMDK6450
62 select S3C_DEV_I2C1 75 select S3C_DEV_I2C1
63 select S3C_DEV_RTC 76 select S3C_DEV_RTC
64 select S3C_DEV_WDT 77 select S3C_DEV_WDT
65 select S3C64XX_DEV_SPI 78 select S3C_DEV_HSMMC
79 select S3C_DEV_HSMMC1
80 select S3C_DEV_HSMMC2
66 select SAMSUNG_DEV_ADC 81 select SAMSUNG_DEV_ADC
67 select SAMSUNG_DEV_BACKLIGHT 82 select SAMSUNG_DEV_BACKLIGHT
68 select SAMSUNG_DEV_PWM 83 select SAMSUNG_DEV_PWM
69 select SAMSUNG_DEV_TS 84 select SAMSUNG_DEV_TS
70 select S5P64X0_SETUP_FB_24BPP 85 select S5P64X0_SETUP_FB_24BPP
71 select S5P64X0_SETUP_I2C1 86 select S5P64X0_SETUP_I2C1
87 select S5P64X0_SETUP_SDHCI_GPIO
72 help 88 help
73 Machine support for the Samsung SMDK6450 89 Machine support for the Samsung SMDK6450
74 90
91menu "Use 8-bit SDHCI bus width"
92
93config S5P64X0_SD_CH1_8BIT
94 bool "SDHCI Channel 1 (Slot 1)"
95 depends on MACH_SMDK6450 || MACH_SMDK6440
96 help
97 Support SDHCI Channel 1 8-bit bus.
98 If selected, Channel 2 is disabled.
99
100endmenu
101
75endif 102endif
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index d3f7409999f2..12bb951187a4 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -28,8 +28,9 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
28# device support 28# device support
29 29
30obj-y += dev-audio.o 30obj-y += dev-audio.o
31obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
32 31
33obj-y += setup-i2c0.o 32obj-y += setup-i2c0.o
34obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o 33obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
35obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o 34obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
35obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o
36obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index eb4ffe331e1a..ee1e8e7f5631 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -269,18 +269,6 @@ static struct clk init_clocks_off[] = {
269 .enable = s5p64x0_pclk_ctrl, 269 .enable = s5p64x0_pclk_ctrl,
270 .ctrlbit = (1 << 31), 270 .ctrlbit = (1 << 31),
271 }, { 271 }, {
272 .name = "sclk_spi_48",
273 .devname = "s3c64xx-spi.0",
274 .parent = &clk_48m,
275 .enable = s5p64x0_sclk_ctrl,
276 .ctrlbit = (1 << 22),
277 }, {
278 .name = "sclk_spi_48",
279 .devname = "s3c64xx-spi.1",
280 .parent = &clk_48m,
281 .enable = s5p64x0_sclk_ctrl,
282 .ctrlbit = (1 << 23),
283 }, {
284 .name = "mmc_48m", 272 .name = "mmc_48m",
285 .devname = "s3c-sdhci.0", 273 .devname = "s3c-sdhci.0",
286 .parent = &clk_48m, 274 .parent = &clk_48m,
@@ -392,65 +380,6 @@ static struct clksrc_sources clkset_audio = {
392static struct clksrc_clk clksrcs[] = { 380static struct clksrc_clk clksrcs[] = {
393 { 381 {
394 .clk = { 382 .clk = {
395 .name = "sclk_mmc",
396 .devname = "s3c-sdhci.0",
397 .ctrlbit = (1 << 24),
398 .enable = s5p64x0_sclk_ctrl,
399 },
400 .sources = &clkset_group1,
401 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
402 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
403 }, {
404 .clk = {
405 .name = "sclk_mmc",
406 .devname = "s3c-sdhci.1",
407 .ctrlbit = (1 << 25),
408 .enable = s5p64x0_sclk_ctrl,
409 },
410 .sources = &clkset_group1,
411 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
412 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
413 }, {
414 .clk = {
415 .name = "sclk_mmc",
416 .devname = "s3c-sdhci.2",
417 .ctrlbit = (1 << 26),
418 .enable = s5p64x0_sclk_ctrl,
419 },
420 .sources = &clkset_group1,
421 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
422 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
423 }, {
424 .clk = {
425 .name = "uclk1",
426 .ctrlbit = (1 << 5),
427 .enable = s5p64x0_sclk_ctrl,
428 },
429 .sources = &clkset_uart,
430 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
431 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
432 }, {
433 .clk = {
434 .name = "sclk_spi",
435 .devname = "s3c64xx-spi.0",
436 .ctrlbit = (1 << 20),
437 .enable = s5p64x0_sclk_ctrl,
438 },
439 .sources = &clkset_group1,
440 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
441 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
442 }, {
443 .clk = {
444 .name = "sclk_spi",
445 .devname = "s3c64xx-spi.1",
446 .ctrlbit = (1 << 21),
447 .enable = s5p64x0_sclk_ctrl,
448 },
449 .sources = &clkset_group1,
450 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
451 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
452 }, {
453 .clk = {
454 .name = "sclk_post", 383 .name = "sclk_post",
455 .ctrlbit = (1 << 10), 384 .ctrlbit = (1 << 10),
456 .enable = s5p64x0_sclk_ctrl, 385 .enable = s5p64x0_sclk_ctrl,
@@ -488,6 +417,77 @@ static struct clksrc_clk clksrcs[] = {
488 }, 417 },
489}; 418};
490 419
420static struct clksrc_clk clk_sclk_mmc0 = {
421 .clk = {
422 .name = "sclk_mmc",
423 .devname = "s3c-sdhci.0",
424 .ctrlbit = (1 << 24),
425 .enable = s5p64x0_sclk_ctrl,
426 },
427 .sources = &clkset_group1,
428 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
429 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
430};
431
432static struct clksrc_clk clk_sclk_mmc1 = {
433 .clk = {
434 .name = "sclk_mmc",
435 .devname = "s3c-sdhci.1",
436 .ctrlbit = (1 << 25),
437 .enable = s5p64x0_sclk_ctrl,
438 },
439 .sources = &clkset_group1,
440 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
441 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
442};
443
444static struct clksrc_clk clk_sclk_mmc2 = {
445 .clk = {
446 .name = "sclk_mmc",
447 .devname = "s3c-sdhci.2",
448 .ctrlbit = (1 << 26),
449 .enable = s5p64x0_sclk_ctrl,
450 },
451 .sources = &clkset_group1,
452 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
453 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
454};
455
456static struct clksrc_clk clk_sclk_uclk = {
457 .clk = {
458 .name = "uclk1",
459 .ctrlbit = (1 << 5),
460 .enable = s5p64x0_sclk_ctrl,
461 },
462 .sources = &clkset_uart,
463 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
464 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
465};
466
467static struct clksrc_clk clk_sclk_spi0 = {
468 .clk = {
469 .name = "sclk_spi",
470 .devname = "s3c64xx-spi.0",
471 .ctrlbit = (1 << 20),
472 .enable = s5p64x0_sclk_ctrl,
473 },
474 .sources = &clkset_group1,
475 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
476 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
477};
478
479static struct clksrc_clk clk_sclk_spi1 = {
480 .clk = {
481 .name = "sclk_spi",
482 .devname = "s3c64xx-spi.1",
483 .ctrlbit = (1 << 21),
484 .enable = s5p64x0_sclk_ctrl,
485 },
486 .sources = &clkset_group1,
487 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
488 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
489};
490
491/* Clock initialization code */ 491/* Clock initialization code */
492static struct clksrc_clk *sysclks[] = { 492static struct clksrc_clk *sysclks[] = {
493 &clk_mout_apll, 493 &clk_mout_apll,
@@ -506,6 +506,26 @@ static struct clk dummy_apb_pclk = {
506 .id = -1, 506 .id = -1,
507}; 507};
508 508
509static struct clksrc_clk *clksrc_cdev[] = {
510 &clk_sclk_uclk,
511 &clk_sclk_spi0,
512 &clk_sclk_spi1,
513 &clk_sclk_mmc0,
514 &clk_sclk_mmc1,
515 &clk_sclk_mmc2
516};
517
518static struct clk_lookup s5p6440_clk_lookup[] = {
519 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk),
520 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
521 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
522 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
523 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
524 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
525 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
526 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
527};
528
509void __init_or_cpufreq s5p6440_setup_clocks(void) 529void __init_or_cpufreq s5p6440_setup_clocks(void)
510{ 530{
511 struct clk *xtal_clk; 531 struct clk *xtal_clk;
@@ -584,9 +604,12 @@ void __init s5p6440_register_clocks(void)
584 604
585 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 605 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
586 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 606 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
607 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
608 s3c_register_clksrc(clksrc_cdev[ptr], 1);
587 609
588 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 610 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
589 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 611 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
612 clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
590 613
591 s3c24xx_register_clock(&dummy_apb_pclk); 614 s3c24xx_register_clock(&dummy_apb_pclk);
592 615
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index bb7ee912090b..dae6a13f43bb 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -414,65 +414,6 @@ static struct clksrc_clk clk_sclk_audio0 = {
414static struct clksrc_clk clksrcs[] = { 414static struct clksrc_clk clksrcs[] = {
415 { 415 {
416 .clk = { 416 .clk = {
417 .name = "sclk_mmc",
418 .devname = "s3c-sdhci.0",
419 .ctrlbit = (1 << 24),
420 .enable = s5p64x0_sclk_ctrl,
421 },
422 .sources = &clkset_group2,
423 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
424 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
425 }, {
426 .clk = {
427 .name = "sclk_mmc",
428 .devname = "s3c-sdhci.1",
429 .ctrlbit = (1 << 25),
430 .enable = s5p64x0_sclk_ctrl,
431 },
432 .sources = &clkset_group2,
433 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
434 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
435 }, {
436 .clk = {
437 .name = "sclk_mmc",
438 .devname = "s3c-sdhci.2",
439 .ctrlbit = (1 << 26),
440 .enable = s5p64x0_sclk_ctrl,
441 },
442 .sources = &clkset_group2,
443 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
444 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
445 }, {
446 .clk = {
447 .name = "uclk1",
448 .ctrlbit = (1 << 5),
449 .enable = s5p64x0_sclk_ctrl,
450 },
451 .sources = &clkset_uart,
452 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
453 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
454 }, {
455 .clk = {
456 .name = "sclk_spi",
457 .devname = "s3c64xx-spi.0",
458 .ctrlbit = (1 << 20),
459 .enable = s5p64x0_sclk_ctrl,
460 },
461 .sources = &clkset_group2,
462 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
463 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
464 }, {
465 .clk = {
466 .name = "sclk_spi",
467 .devname = "s3c64xx-spi.1",
468 .ctrlbit = (1 << 21),
469 .enable = s5p64x0_sclk_ctrl,
470 },
471 .sources = &clkset_group2,
472 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
473 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
474 }, {
475 .clk = {
476 .name = "sclk_fimc", 417 .name = "sclk_fimc",
477 .ctrlbit = (1 << 10), 418 .ctrlbit = (1 << 10),
478 .enable = s5p64x0_sclk_ctrl, 419 .enable = s5p64x0_sclk_ctrl,
@@ -537,6 +478,97 @@ static struct clksrc_clk clksrcs[] = {
537 }, 478 },
538}; 479};
539 480
481static struct clksrc_clk clk_sclk_mmc0 = {
482 .clk = {
483 .name = "sclk_mmc",
484 .devname = "s3c-sdhci.0",
485 .ctrlbit = (1 << 24),
486 .enable = s5p64x0_sclk_ctrl,
487 },
488 .sources = &clkset_group2,
489 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
490 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
491};
492
493static struct clksrc_clk clk_sclk_mmc1 = {
494 .clk = {
495 .name = "sclk_mmc",
496 .devname = "s3c-sdhci.1",
497 .ctrlbit = (1 << 25),
498 .enable = s5p64x0_sclk_ctrl,
499 },
500 .sources = &clkset_group2,
501 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
502 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
503};
504
505static struct clksrc_clk clk_sclk_mmc2 = {
506 .clk = {
507 .name = "sclk_mmc",
508 .devname = "s3c-sdhci.2",
509 .ctrlbit = (1 << 26),
510 .enable = s5p64x0_sclk_ctrl,
511 },
512 .sources = &clkset_group2,
513 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
514 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
515};
516
517static struct clksrc_clk clk_sclk_uclk = {
518 .clk = {
519 .name = "uclk1",
520 .ctrlbit = (1 << 5),
521 .enable = s5p64x0_sclk_ctrl,
522 },
523 .sources = &clkset_uart,
524 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
525 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
526};
527
528static struct clksrc_clk clk_sclk_spi0 = {
529 .clk = {
530 .name = "sclk_spi",
531 .devname = "s3c64xx-spi.0",
532 .ctrlbit = (1 << 20),
533 .enable = s5p64x0_sclk_ctrl,
534 },
535 .sources = &clkset_group2,
536 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
537 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
538};
539
540static struct clksrc_clk clk_sclk_spi1 = {
541 .clk = {
542 .name = "sclk_spi",
543 .devname = "s3c64xx-spi.1",
544 .ctrlbit = (1 << 21),
545 .enable = s5p64x0_sclk_ctrl,
546 },
547 .sources = &clkset_group2,
548 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
549 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
550};
551
552static struct clksrc_clk *clksrc_cdev[] = {
553 &clk_sclk_uclk,
554 &clk_sclk_spi0,
555 &clk_sclk_spi1,
556 &clk_sclk_mmc0,
557 &clk_sclk_mmc1,
558 &clk_sclk_mmc2,
559};
560
561static struct clk_lookup s5p6450_clk_lookup[] = {
562 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk),
563 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
564 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
565 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
566 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
567 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
568 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
569 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
570};
571
540/* Clock initialization code */ 572/* Clock initialization code */
541static struct clksrc_clk *sysclks[] = { 573static struct clksrc_clk *sysclks[] = {
542 &clk_mout_apll, 574 &clk_mout_apll,
@@ -635,9 +667,12 @@ void __init s5p6450_register_clocks(void)
635 667
636 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 668 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
637 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 669 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
670 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
671 s3c_register_clksrc(clksrc_cdev[ptr], 1);
638 672
639 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 673 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
640 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 674 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
675 clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
641 676
642 s3c24xx_register_clock(&dummy_apb_pclk); 677 s3c24xx_register_clock(&dummy_apb_pclk);
643 678
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 28d0b918cd4b..52b89a376447 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -40,6 +40,7 @@
40#include <plat/clock.h> 40#include <plat/clock.h>
41#include <plat/devs.h> 41#include <plat/devs.h>
42#include <plat/pm.h> 42#include <plat/pm.h>
43#include <plat/sdhci.h>
43#include <plat/adc-core.h> 44#include <plat/adc-core.h>
44#include <plat/fb-core.h> 45#include <plat/fb-core.h>
45#include <plat/gpio-cfg.h> 46#include <plat/gpio-cfg.h>
@@ -181,6 +182,10 @@ void __init s5p6440_map_io(void)
181 s3c_adc_setname("s3c64xx-adc"); 182 s3c_adc_setname("s3c64xx-adc");
182 s3c_fb_setname("s5p64x0-fb"); 183 s3c_fb_setname("s5p64x0-fb");
183 184
185 s5p64x0_default_sdhci0();
186 s5p64x0_default_sdhci1();
187 s5p6440_default_sdhci2();
188
184 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); 189 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
185 init_consistent_dma_size(SZ_8M); 190 init_consistent_dma_size(SZ_8M);
186} 191}
@@ -191,6 +196,10 @@ void __init s5p6450_map_io(void)
191 s3c_adc_setname("s3c64xx-adc"); 196 s3c_adc_setname("s3c64xx-adc");
192 s3c_fb_setname("s5p64x0-fb"); 197 s3c_fb_setname("s5p64x0-fb");
193 198
199 s5p64x0_default_sdhci0();
200 s5p64x0_default_sdhci1();
201 s5p6450_default_sdhci2();
202
194 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); 203 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
195 init_consistent_dma_size(SZ_8M); 204 init_consistent_dma_size(SZ_8M);
196} 205}
@@ -282,36 +291,7 @@ int __init s5p64x0_init(void)
282 return device_register(&s5p64x0_dev); 291 return device_register(&s5p64x0_dev);
283} 292}
284 293
285static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
286 [0] = {
287 .name = "pclk_low",
288 .divisor = 1,
289 .min_baud = 0,
290 .max_baud = 0,
291 },
292 [1] = {
293 .name = "uclk1",
294 .divisor = 1,
295 .min_baud = 0,
296 .max_baud = 0,
297 },
298};
299
300/* uart registration process */ 294/* uart registration process */
301
302void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
303{
304 struct s3c2410_uartcfg *tcfg = cfg;
305 u32 ucnt;
306
307 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
308 if (!tcfg->clocks) {
309 tcfg->clocks = s5p64x0_serial_clocks;
310 tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
311 }
312 }
313}
314
315void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) 295void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
316{ 296{
317 int uart; 297 int uart;
@@ -321,13 +301,11 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
321 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; 301 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
322 } 302 }
323 303
324 s5p64x0_common_init_uarts(cfg, no);
325 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); 304 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
326} 305}
327 306
328void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) 307void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
329{ 308{
330 s5p64x0_common_init_uarts(cfg, no);
331 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); 309 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
332} 310}
333 311
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
deleted file mode 100644
index 1fd9c79c7dbc..000000000000
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ /dev/null
@@ -1,224 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/dev-spi.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17
18#include <mach/dma.h>
19#include <mach/map.h>
20#include <mach/irqs.h>
21#include <mach/regs-clock.h>
22#include <mach/spi-clocks.h>
23
24#include <plat/cpu.h>
25#include <plat/s3c64xx-spi.h>
26#include <plat/gpio-cfg.h>
27
28static char *s5p64x0_spi_src_clks[] = {
29 [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
30 [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
31};
32
33/* SPI Controller platform_devices */
34
35/* Since we emulate multi-cs capability, we do not touch the CS.
36 * The emulated CS is toggled by board specific mechanism, as it can
37 * be either some immediate GPIO or some signal out of some other
38 * chip in between ... or some yet another way.
39 * We simply do not assume anything about CS.
40 */
41static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
42{
43 unsigned int base;
44
45 switch (pdev->id) {
46 case 0:
47 base = S5P6440_GPC(0);
48 break;
49
50 case 1:
51 base = S5P6440_GPC(4);
52 break;
53
54 default:
55 dev_err(&pdev->dev, "Invalid SPI Controller number!");
56 return -EINVAL;
57 }
58
59 s3c_gpio_cfgall_range(base, 3,
60 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
61
62 return 0;
63}
64
65static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
66{
67 unsigned int base;
68
69 switch (pdev->id) {
70 case 0:
71 base = S5P6450_GPC(0);
72 break;
73
74 case 1:
75 base = S5P6450_GPC(4);
76 break;
77
78 default:
79 dev_err(&pdev->dev, "Invalid SPI Controller number!");
80 return -EINVAL;
81 }
82
83 s3c_gpio_cfgall_range(base, 3,
84 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
85
86 return 0;
87}
88
89static struct resource s5p64x0_spi0_resource[] = {
90 [0] = {
91 .start = S5P64X0_PA_SPI0,
92 .end = S5P64X0_PA_SPI0 + 0x100 - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 [1] = {
96 .start = DMACH_SPI0_TX,
97 .end = DMACH_SPI0_TX,
98 .flags = IORESOURCE_DMA,
99 },
100 [2] = {
101 .start = DMACH_SPI0_RX,
102 .end = DMACH_SPI0_RX,
103 .flags = IORESOURCE_DMA,
104 },
105 [3] = {
106 .start = IRQ_SPI0,
107 .end = IRQ_SPI0,
108 .flags = IORESOURCE_IRQ,
109 },
110};
111
112static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
113 .cfg_gpio = s5p6440_spi_cfg_gpio,
114 .fifo_lvl_mask = 0x1ff,
115 .rx_lvl_offset = 15,
116 .tx_st_done = 25,
117};
118
119static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
120 .cfg_gpio = s5p6450_spi_cfg_gpio,
121 .fifo_lvl_mask = 0x1ff,
122 .rx_lvl_offset = 15,
123 .tx_st_done = 25,
124};
125
126static u64 spi_dmamask = DMA_BIT_MASK(32);
127
128struct platform_device s5p64x0_device_spi0 = {
129 .name = "s3c64xx-spi",
130 .id = 0,
131 .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
132 .resource = s5p64x0_spi0_resource,
133 .dev = {
134 .dma_mask = &spi_dmamask,
135 .coherent_dma_mask = DMA_BIT_MASK(32),
136 },
137};
138
139static struct resource s5p64x0_spi1_resource[] = {
140 [0] = {
141 .start = S5P64X0_PA_SPI1,
142 .end = S5P64X0_PA_SPI1 + 0x100 - 1,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = DMACH_SPI1_TX,
147 .end = DMACH_SPI1_TX,
148 .flags = IORESOURCE_DMA,
149 },
150 [2] = {
151 .start = DMACH_SPI1_RX,
152 .end = DMACH_SPI1_RX,
153 .flags = IORESOURCE_DMA,
154 },
155 [3] = {
156 .start = IRQ_SPI1,
157 .end = IRQ_SPI1,
158 .flags = IORESOURCE_IRQ,
159 },
160};
161
162static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
163 .cfg_gpio = s5p6440_spi_cfg_gpio,
164 .fifo_lvl_mask = 0x7f,
165 .rx_lvl_offset = 15,
166 .tx_st_done = 25,
167};
168
169static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
170 .cfg_gpio = s5p6450_spi_cfg_gpio,
171 .fifo_lvl_mask = 0x7f,
172 .rx_lvl_offset = 15,
173 .tx_st_done = 25,
174};
175
176struct platform_device s5p64x0_device_spi1 = {
177 .name = "s3c64xx-spi",
178 .id = 1,
179 .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
180 .resource = s5p64x0_spi1_resource,
181 .dev = {
182 .dma_mask = &spi_dmamask,
183 .coherent_dma_mask = DMA_BIT_MASK(32),
184 },
185};
186
187void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
188{
189 struct s3c64xx_spi_info *pd;
190
191 /* Reject invalid configuration */
192 if (!num_cs || src_clk_nr < 0
193 || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
194 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
195 return;
196 }
197
198 switch (cntrlr) {
199 case 0:
200 if (soc_is_s5p6450())
201 pd = &s5p6450_spi0_pdata;
202 else
203 pd = &s5p6440_spi0_pdata;
204
205 s5p64x0_device_spi0.dev.platform_data = pd;
206 break;
207 case 1:
208 if (soc_is_s5p6450())
209 pd = &s5p6450_spi1_pdata;
210 else
211 pd = &s5p6440_spi1_pdata;
212
213 s5p64x0_device_spi1.dev.platform_data = pd;
214 break;
215 default:
216 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
217 __func__, cntrlr);
218 return;
219 }
220
221 pd->num_cs = num_cs;
222 pd->src_clk_nr = src_clk_nr;
223 pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr];
224}
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index 442dd4ad12da..f820c0744405 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -38,176 +38,74 @@
38 38
39static u64 dma_dmamask = DMA_BIT_MASK(32); 39static u64 dma_dmamask = DMA_BIT_MASK(32);
40 40
41struct dma_pl330_peri s5p6440_pdma_peri[22] = { 41u8 s5p6440_pdma_peri[] = {
42 { 42 DMACH_UART0_RX,
43 .peri_id = (u8)DMACH_UART0_RX, 43 DMACH_UART0_TX,
44 .rqtype = DEVTOMEM, 44 DMACH_UART1_RX,
45 }, { 45 DMACH_UART1_TX,
46 .peri_id = (u8)DMACH_UART0_TX, 46 DMACH_UART2_RX,
47 .rqtype = MEMTODEV, 47 DMACH_UART2_TX,
48 }, { 48 DMACH_UART3_RX,
49 .peri_id = (u8)DMACH_UART1_RX, 49 DMACH_UART3_TX,
50 .rqtype = DEVTOMEM, 50 DMACH_MAX,
51 }, { 51 DMACH_MAX,
52 .peri_id = (u8)DMACH_UART1_TX, 52 DMACH_PCM0_TX,
53 .rqtype = MEMTODEV, 53 DMACH_PCM0_RX,
54 }, { 54 DMACH_I2S0_TX,
55 .peri_id = (u8)DMACH_UART2_RX, 55 DMACH_I2S0_RX,
56 .rqtype = DEVTOMEM, 56 DMACH_SPI0_TX,
57 }, { 57 DMACH_SPI0_RX,
58 .peri_id = (u8)DMACH_UART2_TX, 58 DMACH_MAX,
59 .rqtype = MEMTODEV, 59 DMACH_MAX,
60 }, { 60 DMACH_MAX,
61 .peri_id = (u8)DMACH_UART3_RX, 61 DMACH_MAX,
62 .rqtype = DEVTOMEM, 62 DMACH_SPI1_TX,
63 }, { 63 DMACH_SPI1_RX,
64 .peri_id = (u8)DMACH_UART3_TX,
65 .rqtype = MEMTODEV,
66 }, {
67 .peri_id = DMACH_MAX,
68 }, {
69 .peri_id = DMACH_MAX,
70 }, {
71 .peri_id = (u8)DMACH_PCM0_TX,
72 .rqtype = MEMTODEV,
73 }, {
74 .peri_id = (u8)DMACH_PCM0_RX,
75 .rqtype = DEVTOMEM,
76 }, {
77 .peri_id = (u8)DMACH_I2S0_TX,
78 .rqtype = MEMTODEV,
79 }, {
80 .peri_id = (u8)DMACH_I2S0_RX,
81 .rqtype = DEVTOMEM,
82 }, {
83 .peri_id = (u8)DMACH_SPI0_TX,
84 .rqtype = MEMTODEV,
85 }, {
86 .peri_id = (u8)DMACH_SPI0_RX,
87 .rqtype = DEVTOMEM,
88 }, {
89 .peri_id = (u8)DMACH_MAX,
90 }, {
91 .peri_id = (u8)DMACH_MAX,
92 }, {
93 .peri_id = (u8)DMACH_MAX,
94 }, {
95 .peri_id = (u8)DMACH_MAX,
96 }, {
97 .peri_id = (u8)DMACH_SPI1_TX,
98 .rqtype = MEMTODEV,
99 }, {
100 .peri_id = (u8)DMACH_SPI1_RX,
101 .rqtype = DEVTOMEM,
102 },
103}; 64};
104 65
105struct dma_pl330_platdata s5p6440_pdma_pdata = { 66struct dma_pl330_platdata s5p6440_pdma_pdata = {
106 .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), 67 .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
107 .peri = s5p6440_pdma_peri, 68 .peri_id = s5p6440_pdma_peri,
108}; 69};
109 70
110struct dma_pl330_peri s5p6450_pdma_peri[32] = { 71u8 s5p6450_pdma_peri[] = {
111 { 72 DMACH_UART0_RX,
112 .peri_id = (u8)DMACH_UART0_RX, 73 DMACH_UART0_TX,
113 .rqtype = DEVTOMEM, 74 DMACH_UART1_RX,
114 }, { 75 DMACH_UART1_TX,
115 .peri_id = (u8)DMACH_UART0_TX, 76 DMACH_UART2_RX,
116 .rqtype = MEMTODEV, 77 DMACH_UART2_TX,
117 }, { 78 DMACH_UART3_RX,
118 .peri_id = (u8)DMACH_UART1_RX, 79 DMACH_UART3_TX,
119 .rqtype = DEVTOMEM, 80 DMACH_UART4_RX,
120 }, { 81 DMACH_UART4_TX,
121 .peri_id = (u8)DMACH_UART1_TX, 82 DMACH_PCM0_TX,
122 .rqtype = MEMTODEV, 83 DMACH_PCM0_RX,
123 }, { 84 DMACH_I2S0_TX,
124 .peri_id = (u8)DMACH_UART2_RX, 85 DMACH_I2S0_RX,
125 .rqtype = DEVTOMEM, 86 DMACH_SPI0_TX,
126 }, { 87 DMACH_SPI0_RX,
127 .peri_id = (u8)DMACH_UART2_TX, 88 DMACH_PCM1_TX,
128 .rqtype = MEMTODEV, 89 DMACH_PCM1_RX,
129 }, { 90 DMACH_PCM2_TX,
130 .peri_id = (u8)DMACH_UART3_RX, 91 DMACH_PCM2_RX,
131 .rqtype = DEVTOMEM, 92 DMACH_SPI1_TX,
132 }, { 93 DMACH_SPI1_RX,
133 .peri_id = (u8)DMACH_UART3_TX, 94 DMACH_USI_TX,
134 .rqtype = MEMTODEV, 95 DMACH_USI_RX,
135 }, { 96 DMACH_MAX,
136 .peri_id = (u8)DMACH_UART4_RX, 97 DMACH_I2S1_TX,
137 .rqtype = DEVTOMEM, 98 DMACH_I2S1_RX,
138 }, { 99 DMACH_I2S2_TX,
139 .peri_id = (u8)DMACH_UART4_TX, 100 DMACH_I2S2_RX,
140 .rqtype = MEMTODEV, 101 DMACH_PWM,
141 }, { 102 DMACH_UART5_RX,
142 .peri_id = (u8)DMACH_PCM0_TX, 103 DMACH_UART5_TX,
143 .rqtype = MEMTODEV,
144 }, {
145 .peri_id = (u8)DMACH_PCM0_RX,
146 .rqtype = DEVTOMEM,
147 }, {
148 .peri_id = (u8)DMACH_I2S0_TX,
149 .rqtype = MEMTODEV,
150 }, {
151 .peri_id = (u8)DMACH_I2S0_RX,
152 .rqtype = DEVTOMEM,
153 }, {
154 .peri_id = (u8)DMACH_SPI0_TX,
155 .rqtype = MEMTODEV,
156 }, {
157 .peri_id = (u8)DMACH_SPI0_RX,
158 .rqtype = DEVTOMEM,
159 }, {
160 .peri_id = (u8)DMACH_PCM1_TX,
161 .rqtype = MEMTODEV,
162 }, {
163 .peri_id = (u8)DMACH_PCM1_RX,
164 .rqtype = DEVTOMEM,
165 }, {
166 .peri_id = (u8)DMACH_PCM2_TX,
167 .rqtype = MEMTODEV,
168 }, {
169 .peri_id = (u8)DMACH_PCM2_RX,
170 .rqtype = DEVTOMEM,
171 }, {
172 .peri_id = (u8)DMACH_SPI1_TX,
173 .rqtype = MEMTODEV,
174 }, {
175 .peri_id = (u8)DMACH_SPI1_RX,
176 .rqtype = DEVTOMEM,
177 }, {
178 .peri_id = (u8)DMACH_USI_TX,
179 .rqtype = MEMTODEV,
180 }, {
181 .peri_id = (u8)DMACH_USI_RX,
182 .rqtype = DEVTOMEM,
183 }, {
184 .peri_id = (u8)DMACH_MAX,
185 }, {
186 .peri_id = (u8)DMACH_I2S1_TX,
187 .rqtype = MEMTODEV,
188 }, {
189 .peri_id = (u8)DMACH_I2S1_RX,
190 .rqtype = DEVTOMEM,
191 }, {
192 .peri_id = (u8)DMACH_I2S2_TX,
193 .rqtype = MEMTODEV,
194 }, {
195 .peri_id = (u8)DMACH_I2S2_RX,
196 .rqtype = DEVTOMEM,
197 }, {
198 .peri_id = (u8)DMACH_PWM,
199 }, {
200 .peri_id = (u8)DMACH_UART5_RX,
201 .rqtype = DEVTOMEM,
202 }, {
203 .peri_id = (u8)DMACH_UART5_TX,
204 .rqtype = MEMTODEV,
205 },
206}; 104};
207 105
208struct dma_pl330_platdata s5p6450_pdma_pdata = { 106struct dma_pl330_platdata s5p6450_pdma_pdata = {
209 .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), 107 .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
210 .peri = s5p6450_pdma_peri, 108 .peri_id = s5p6450_pdma_peri,
211}; 109};
212 110
213struct amba_device s5p64x0_device_pdma = { 111struct amba_device s5p64x0_device_pdma = {
@@ -227,10 +125,15 @@ struct amba_device s5p64x0_device_pdma = {
227 125
228static int __init s5p64x0_dma_init(void) 126static int __init s5p64x0_dma_init(void)
229{ 127{
230 if (soc_is_s5p6450()) 128 if (soc_is_s5p6450()) {
129 dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
130 dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
231 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; 131 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
232 else 132 } else {
133 dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
134 dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
233 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; 135 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
136 }
234 137
235 amba_device_register(&s5p64x0_device_pdma, &iomem_resource); 138 amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
236 139
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 53982db9d259..5b845e849b30 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,6 +141,8 @@
141 141
142#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) 142#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x))
143 143
144#define IRQ_TIMER_BASE (11)
145
144/* Set the default NR_IRQS */ 146/* Set the default NR_IRQS */
145 147
146#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) 148#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index 4d3ac8a3709d..0c0175dbfa34 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -67,6 +67,8 @@
67#define S3C_PA_RTC S5P64X0_PA_RTC 67#define S3C_PA_RTC S5P64X0_PA_RTC
68#define S3C_PA_WDT S5P64X0_PA_WDT 68#define S3C_PA_WDT S5P64X0_PA_WDT
69#define S3C_PA_FB S5P64X0_PA_FB 69#define S3C_PA_FB S5P64X0_PA_FB
70#define S3C_PA_SPI0 S5P64X0_PA_SPI0
71#define S3C_PA_SPI1 S5P64X0_PA_SPI1
70 72
71#define S5P_PA_CHIPID S5P64X0_PA_CHIPID 73#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
72#define S5P_PA_SROMC S5P64X0_PA_SROMC 74#define S5P_PA_SROMC S5P64X0_PA_SROMC
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 34d98a1dae57..a40e325d62c8 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -24,6 +24,7 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/pwm_backlight.h> 25#include <linux/pwm_backlight.h>
26#include <linux/fb.h> 26#include <linux/fb.h>
27#include <linux/mmc/host.h>
27 28
28#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
29 30
@@ -52,6 +53,7 @@
52#include <plat/backlight.h> 53#include <plat/backlight.h>
53#include <plat/fb.h> 54#include <plat/fb.h>
54#include <plat/regs-fb.h> 55#include <plat/regs-fb.h>
56#include <plat/sdhci.h>
55 57
56#include "common.h" 58#include "common.h"
57 59
@@ -163,6 +165,25 @@ static struct platform_device *smdk6440_devices[] __initdata = {
163 &s5p6440_device_iis, 165 &s5p6440_device_iis,
164 &s3c_device_fb, 166 &s3c_device_fb,
165 &smdk6440_lcd_lte480wv, 167 &smdk6440_lcd_lte480wv,
168 &s3c_device_hsmmc0,
169 &s3c_device_hsmmc1,
170 &s3c_device_hsmmc2,
171};
172
173static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = {
174 .cd_type = S3C_SDHCI_CD_NONE,
175};
176
177static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = {
178 .cd_type = S3C_SDHCI_CD_INTERNAL,
179#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
180 .max_width = 8,
181 .host_caps = MMC_CAP_8_BIT_DATA,
182#endif
183};
184
185static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = {
186 .cd_type = S3C_SDHCI_CD_NONE,
166}; 187};
167 188
168static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { 189static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
@@ -236,6 +257,10 @@ static void __init smdk6440_machine_init(void)
236 s5p6440_set_lcd_interface(); 257 s5p6440_set_lcd_interface();
237 s3c_fb_set_platdata(&smdk6440_lcd_pdata); 258 s3c_fb_set_platdata(&smdk6440_lcd_pdata);
238 259
260 s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
261 s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
262 s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
263
239 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); 264 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
240} 265}
241 266
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 135cf5d84737..efb69e2f2afe 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -24,6 +24,7 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/pwm_backlight.h> 25#include <linux/pwm_backlight.h>
26#include <linux/fb.h> 26#include <linux/fb.h>
27#include <linux/mmc/host.h>
27 28
28#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
29 30
@@ -52,6 +53,7 @@
52#include <plat/backlight.h> 53#include <plat/backlight.h>
53#include <plat/fb.h> 54#include <plat/fb.h>
54#include <plat/regs-fb.h> 55#include <plat/regs-fb.h>
56#include <plat/sdhci.h>
55 57
56#include "common.h" 58#include "common.h"
57 59
@@ -181,10 +183,28 @@ static struct platform_device *smdk6450_devices[] __initdata = {
181 &s5p6450_device_iis0, 183 &s5p6450_device_iis0,
182 &s3c_device_fb, 184 &s3c_device_fb,
183 &smdk6450_lcd_lte480wv, 185 &smdk6450_lcd_lte480wv,
184 186 &s3c_device_hsmmc0,
187 &s3c_device_hsmmc1,
188 &s3c_device_hsmmc2,
185 /* s5p6450_device_spi0 will be added */ 189 /* s5p6450_device_spi0 will be added */
186}; 190};
187 191
192static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = {
193 .cd_type = S3C_SDHCI_CD_NONE,
194};
195
196static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = {
197 .cd_type = S3C_SDHCI_CD_NONE,
198#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
199 .max_width = 8,
200 .host_caps = MMC_CAP_8_BIT_DATA,
201#endif
202};
203
204static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = {
205 .cd_type = S3C_SDHCI_CD_NONE,
206};
207
188static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { 208static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
189 .flags = 0, 209 .flags = 0,
190 .slave_addr = 0x10, 210 .slave_addr = 0x10,
@@ -256,6 +276,10 @@ static void __init smdk6450_machine_init(void)
256 s5p6450_set_lcd_interface(); 276 s5p6450_set_lcd_interface();
257 s3c_fb_set_platdata(&smdk6450_lcd_pdata); 277 s3c_fb_set_platdata(&smdk6450_lcd_pdata);
258 278
279 s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata);
280 s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata);
281 s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
282
259 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); 283 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
260} 284}
261 285
diff --git a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
new file mode 100644
index 000000000000..8410af0d12bf
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
@@ -0,0 +1,104 @@
1/* linux/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P64X0 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <linux/gpio.h>
16
17#include <mach/regs-gpio.h>
18#include <mach/regs-clock.h>
19
20#include <plat/gpio-cfg.h>
21#include <plat/sdhci.h>
22#include <plat/cpu.h>
23
24void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
25{
26 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
27
28 /* Set all the necessary GPG pins to special-function 2 */
29 if (soc_is_s5p6450())
30 s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width,
31 S3C_GPIO_SFN(2));
32 else
33 s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width,
34 S3C_GPIO_SFN(2));
35
36 /* Set GPG[6] pin to special-function 2 - MMC0 CDn */
37 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
38 if (soc_is_s5p6450()) {
39 s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
40 s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2));
41 } else {
42 s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
43 s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2));
44 }
45 }
46}
47
48void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
49{
50 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
51
52 /* Set GPH[0:1] pins to special-function 2 - CLK and CMD */
53 if (soc_is_s5p6450())
54 s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2));
55 else
56 s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2));
57
58 switch (width) {
59 case 8:
60 /* Set data pins GPH[6:9] special-function 2 */
61 if (soc_is_s5p6450())
62 s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4,
63 S3C_GPIO_SFN(2));
64 else
65 s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4,
66 S3C_GPIO_SFN(2));
67 case 4:
68 /* set data pins GPH[2:5] special-function 2 */
69 if (soc_is_s5p6450())
70 s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4,
71 S3C_GPIO_SFN(2));
72 else
73 s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4,
74 S3C_GPIO_SFN(2));
75 default:
76 break;
77 }
78
79 /* Set GPG[6] pin to special-funtion 3 : MMC1 CDn */
80 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
81 if (soc_is_s5p6450()) {
82 s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
83 s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3));
84 } else {
85 s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
86 s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3));
87 }
88 }
89}
90
91void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
92{
93 /* Set GPC[4:5] pins to special-function 3 - CLK and CMD */
94 s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3));
95
96 /* Set data pins GPH[6:9] pins to special-function 3 */
97 s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3));
98}
99
100void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
101{
102 /* Set all the necessary GPG pins to special-function 3 */
103 s3c_gpio_cfgrange_nopull(S5P6450_GPG(7), 2 + width, S3C_GPIO_SFN(3));
104}
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c
new file mode 100644
index 000000000000..e9b841240352
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-spi.c
@@ -0,0 +1,55 @@
1/* linux/arch/arm/mach-s5p64x0/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14
15#include <plat/gpio-cfg.h>
16#include <plat/cpu.h>
17#include <plat/s3c64xx-spi.h>
18
19#ifdef CONFIG_S3C64XX_DEV_SPI0
20struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
21 .fifo_lvl_mask = 0x1ff,
22 .rx_lvl_offset = 15,
23 .tx_st_done = 25,
24};
25
26int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
27{
28 if (soc_is_s5p6450())
29 s3c_gpio_cfgall_range(S5P6450_GPC(0), 3,
30 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
31 else
32 s3c_gpio_cfgall_range(S5P6440_GPC(0), 3,
33 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
34 return 0;
35}
36#endif
37
38#ifdef CONFIG_S3C64XX_DEV_SPI1
39struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
40 .fifo_lvl_mask = 0x7f,
41 .rx_lvl_offset = 15,
42 .tx_st_done = 25,
43};
44
45int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
46{
47 if (soc_is_s5p6450())
48 s3c_gpio_cfgall_range(S5P6450_GPC(4), 3,
49 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
50 else
51 s3c_gpio_cfgall_range(S5P6440_GPC(4), 3,
52 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
53 return 0;
54}
55#endif
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index e538a4c67e9c..75a26eaf2633 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -45,6 +45,11 @@ config S5PC100_SETUP_SDHCI_GPIO
45 help 45 help
46 Common setup code for SDHCI gpio. 46 Common setup code for SDHCI gpio.
47 47
48config S5PC100_SETUP_SPI
49 bool
50 help
51 Common setup code for SPI GPIO configurations.
52
48config MACH_SMDKC100 53config MACH_SMDKC100
49 bool "SMDKC100" 54 bool "SMDKC100"
50 select CPU_S5PC100 55 select CPU_S5PC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index c3166c4d2ace..118c711f74e8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -22,12 +22,11 @@ obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o
22# device support 22# device support
23 23
24obj-y += dev-audio.o 24obj-y += dev-audio.o
25obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
26 25
27obj-y += setup-i2c0.o 26obj-y += setup-i2c0.o
28obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o 27obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
29obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o 28obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
30obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o 29obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
31obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o 30obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
32obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o
33obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 31obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
32obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index c4c74893f53c..247194dd366c 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -427,24 +427,6 @@ static struct clk init_clocks_off[] = {
427 .enable = s5pc100_d0_2_ctrl, 427 .enable = s5pc100_d0_2_ctrl,
428 .ctrlbit = (1 << 1), 428 .ctrlbit = (1 << 1),
429 }, { 429 }, {
430 .name = "hsmmc",
431 .devname = "s3c-sdhci.2",
432 .parent = &clk_div_d1_bus.clk,
433 .enable = s5pc100_d1_0_ctrl,
434 .ctrlbit = (1 << 7),
435 }, {
436 .name = "hsmmc",
437 .devname = "s3c-sdhci.1",
438 .parent = &clk_div_d1_bus.clk,
439 .enable = s5pc100_d1_0_ctrl,
440 .ctrlbit = (1 << 6),
441 }, {
442 .name = "hsmmc",
443 .devname = "s3c-sdhci.0",
444 .parent = &clk_div_d1_bus.clk,
445 .enable = s5pc100_d1_0_ctrl,
446 .ctrlbit = (1 << 5),
447 }, {
448 .name = "modemif", 430 .name = "modemif",
449 .parent = &clk_div_d1_bus.clk, 431 .parent = &clk_div_d1_bus.clk,
450 .enable = s5pc100_d1_0_ctrl, 432 .enable = s5pc100_d1_0_ctrl,
@@ -674,24 +656,6 @@ static struct clk init_clocks_off[] = {
674 .enable = s5pc100_d1_5_ctrl, 656 .enable = s5pc100_d1_5_ctrl,
675 .ctrlbit = (1 << 8), 657 .ctrlbit = (1 << 8),
676 }, { 658 }, {
677 .name = "spi_48m",
678 .devname = "s3c64xx-spi.0",
679 .parent = &clk_mout_48m.clk,
680 .enable = s5pc100_sclk0_ctrl,
681 .ctrlbit = (1 << 7),
682 }, {
683 .name = "spi_48m",
684 .devname = "s3c64xx-spi.1",
685 .parent = &clk_mout_48m.clk,
686 .enable = s5pc100_sclk0_ctrl,
687 .ctrlbit = (1 << 8),
688 }, {
689 .name = "spi_48m",
690 .devname = "s3c64xx-spi.2",
691 .parent = &clk_mout_48m.clk,
692 .enable = s5pc100_sclk0_ctrl,
693 .ctrlbit = (1 << 9),
694 }, {
695 .name = "mmc_48m", 659 .name = "mmc_48m",
696 .devname = "s3c-sdhci.0", 660 .devname = "s3c-sdhci.0",
697 .parent = &clk_mout_48m.clk, 661 .parent = &clk_mout_48m.clk,
@@ -712,6 +676,54 @@ static struct clk init_clocks_off[] = {
712 }, 676 },
713}; 677};
714 678
679static struct clk clk_hsmmc2 = {
680 .name = "hsmmc",
681 .devname = "s3c-sdhci.2",
682 .parent = &clk_div_d1_bus.clk,
683 .enable = s5pc100_d1_0_ctrl,
684 .ctrlbit = (1 << 7),
685};
686
687static struct clk clk_hsmmc1 = {
688 .name = "hsmmc",
689 .devname = "s3c-sdhci.1",
690 .parent = &clk_div_d1_bus.clk,
691 .enable = s5pc100_d1_0_ctrl,
692 .ctrlbit = (1 << 6),
693};
694
695static struct clk clk_hsmmc0 = {
696 .name = "hsmmc",
697 .devname = "s3c-sdhci.0",
698 .parent = &clk_div_d1_bus.clk,
699 .enable = s5pc100_d1_0_ctrl,
700 .ctrlbit = (1 << 5),
701};
702
703static struct clk clk_48m_spi0 = {
704 .name = "spi_48m",
705 .devname = "s3c64xx-spi.0",
706 .parent = &clk_mout_48m.clk,
707 .enable = s5pc100_sclk0_ctrl,
708 .ctrlbit = (1 << 7),
709};
710
711static struct clk clk_48m_spi1 = {
712 .name = "spi_48m",
713 .devname = "s3c64xx-spi.1",
714 .parent = &clk_mout_48m.clk,
715 .enable = s5pc100_sclk0_ctrl,
716 .ctrlbit = (1 << 8),
717};
718
719static struct clk clk_48m_spi2 = {
720 .name = "spi_48m",
721 .devname = "s3c64xx-spi.2",
722 .parent = &clk_mout_48m.clk,
723 .enable = s5pc100_sclk0_ctrl,
724 .ctrlbit = (1 << 9),
725};
726
715static struct clk clk_vclk54m = { 727static struct clk clk_vclk54m = {
716 .name = "vclk_54m", 728 .name = "vclk_54m",
717 .rate = 54000000, 729 .rate = 54000000,
@@ -930,49 +942,6 @@ static struct clksrc_clk clk_sclk_spdif = {
930static struct clksrc_clk clksrcs[] = { 942static struct clksrc_clk clksrcs[] = {
931 { 943 {
932 .clk = { 944 .clk = {
933 .name = "sclk_spi",
934 .devname = "s3c64xx-spi.0",
935 .ctrlbit = (1 << 4),
936 .enable = s5pc100_sclk0_ctrl,
937
938 },
939 .sources = &clk_src_group1,
940 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
941 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
942 }, {
943 .clk = {
944 .name = "sclk_spi",
945 .devname = "s3c64xx-spi.1",
946 .ctrlbit = (1 << 5),
947 .enable = s5pc100_sclk0_ctrl,
948
949 },
950 .sources = &clk_src_group1,
951 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
952 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
953 }, {
954 .clk = {
955 .name = "sclk_spi",
956 .devname = "s3c64xx-spi.2",
957 .ctrlbit = (1 << 6),
958 .enable = s5pc100_sclk0_ctrl,
959
960 },
961 .sources = &clk_src_group1,
962 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
963 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
964 }, {
965 .clk = {
966 .name = "uclk1",
967 .ctrlbit = (1 << 3),
968 .enable = s5pc100_sclk0_ctrl,
969
970 },
971 .sources = &clk_src_group2,
972 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
973 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
974 }, {
975 .clk = {
976 .name = "sclk_mixer", 945 .name = "sclk_mixer",
977 .ctrlbit = (1 << 6), 946 .ctrlbit = (1 << 6),
978 .enable = s5pc100_sclk0_ctrl, 947 .enable = s5pc100_sclk0_ctrl,
@@ -1025,39 +994,6 @@ static struct clksrc_clk clksrcs[] = {
1025 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, 994 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
1026 }, { 995 }, {
1027 .clk = { 996 .clk = {
1028 .name = "sclk_mmc",
1029 .devname = "s3c-sdhci.0",
1030 .ctrlbit = (1 << 12),
1031 .enable = s5pc100_sclk1_ctrl,
1032
1033 },
1034 .sources = &clk_src_mmc0,
1035 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 },
1036 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
1037 }, {
1038 .clk = {
1039 .name = "sclk_mmc",
1040 .devname = "s3c-sdhci.1",
1041 .ctrlbit = (1 << 13),
1042 .enable = s5pc100_sclk1_ctrl,
1043
1044 },
1045 .sources = &clk_src_mmc12,
1046 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 },
1047 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
1048 }, {
1049 .clk = {
1050 .name = "sclk_mmc",
1051 .devname = "s3c-sdhci.2",
1052 .ctrlbit = (1 << 14),
1053 .enable = s5pc100_sclk1_ctrl,
1054
1055 },
1056 .sources = &clk_src_mmc12,
1057 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
1058 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
1059 }, {
1060 .clk = {
1061 .name = "sclk_irda", 997 .name = "sclk_irda",
1062 .ctrlbit = (1 << 10), 998 .ctrlbit = (1 << 10),
1063 .enable = s5pc100_sclk0_ctrl, 999 .enable = s5pc100_sclk0_ctrl,
@@ -1099,6 +1035,89 @@ static struct clksrc_clk clksrcs[] = {
1099 }, 1035 },
1100}; 1036};
1101 1037
1038static struct clksrc_clk clk_sclk_uart = {
1039 .clk = {
1040 .name = "uclk1",
1041 .ctrlbit = (1 << 3),
1042 .enable = s5pc100_sclk0_ctrl,
1043 },
1044 .sources = &clk_src_group2,
1045 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
1046 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
1047};
1048
1049static struct clksrc_clk clk_sclk_mmc0 = {
1050 .clk = {
1051 .name = "sclk_mmc",
1052 .devname = "s3c-sdhci.0",
1053 .ctrlbit = (1 << 12),
1054 .enable = s5pc100_sclk1_ctrl,
1055 },
1056 .sources = &clk_src_mmc0,
1057 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 },
1058 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
1059};
1060
1061static struct clksrc_clk clk_sclk_mmc1 = {
1062 .clk = {
1063 .name = "sclk_mmc",
1064 .devname = "s3c-sdhci.1",
1065 .ctrlbit = (1 << 13),
1066 .enable = s5pc100_sclk1_ctrl,
1067 },
1068 .sources = &clk_src_mmc12,
1069 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 },
1070 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
1071};
1072
1073static struct clksrc_clk clk_sclk_mmc2 = {
1074 .clk = {
1075 .name = "sclk_mmc",
1076 .devname = "s3c-sdhci.2",
1077 .ctrlbit = (1 << 14),
1078 .enable = s5pc100_sclk1_ctrl,
1079 },
1080 .sources = &clk_src_mmc12,
1081 .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
1082 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
1083};
1084
1085static struct clksrc_clk clk_sclk_spi0 = {
1086 .clk = {
1087 .name = "sclk_spi",
1088 .devname = "s3c64xx-spi.0",
1089 .ctrlbit = (1 << 4),
1090 .enable = s5pc100_sclk0_ctrl,
1091 },
1092 .sources = &clk_src_group1,
1093 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
1094 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
1095};
1096
1097static struct clksrc_clk clk_sclk_spi1 = {
1098 .clk = {
1099 .name = "sclk_spi",
1100 .devname = "s3c64xx-spi.1",
1101 .ctrlbit = (1 << 5),
1102 .enable = s5pc100_sclk0_ctrl,
1103 },
1104 .sources = &clk_src_group1,
1105 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
1106 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
1107};
1108
1109static struct clksrc_clk clk_sclk_spi2 = {
1110 .clk = {
1111 .name = "sclk_spi",
1112 .devname = "s3c64xx-spi.2",
1113 .ctrlbit = (1 << 6),
1114 .enable = s5pc100_sclk0_ctrl,
1115 },
1116 .sources = &clk_src_group1,
1117 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
1118 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
1119};
1120
1102/* Clock initialisation code */ 1121/* Clock initialisation code */
1103static struct clksrc_clk *sysclks[] = { 1122static struct clksrc_clk *sysclks[] = {
1104 &clk_mout_apll, 1123 &clk_mout_apll,
@@ -1128,6 +1147,25 @@ static struct clksrc_clk *sysclks[] = {
1128 &clk_sclk_spdif, 1147 &clk_sclk_spdif,
1129}; 1148};
1130 1149
1150static struct clk *clk_cdev[] = {
1151 &clk_hsmmc0,
1152 &clk_hsmmc1,
1153 &clk_hsmmc2,
1154 &clk_48m_spi0,
1155 &clk_48m_spi1,
1156 &clk_48m_spi2,
1157};
1158
1159static struct clksrc_clk *clksrc_cdev[] = {
1160 &clk_sclk_uart,
1161 &clk_sclk_mmc0,
1162 &clk_sclk_mmc1,
1163 &clk_sclk_mmc2,
1164 &clk_sclk_spi0,
1165 &clk_sclk_spi1,
1166 &clk_sclk_spi2,
1167};
1168
1131void __init_or_cpufreq s5pc100_setup_clocks(void) 1169void __init_or_cpufreq s5pc100_setup_clocks(void)
1132{ 1170{
1133 unsigned long xtal; 1171 unsigned long xtal;
@@ -1267,6 +1305,24 @@ static struct clk *clks[] __initdata = {
1267 &clk_pcmcdclk1, 1305 &clk_pcmcdclk1,
1268}; 1306};
1269 1307
1308static struct clk_lookup s5pc100_clk_lookup[] = {
1309 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
1310 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uart.clk),
1311 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
1312 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
1313 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
1314 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
1315 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
1316 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
1317 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1318 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_48m_spi0),
1319 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_sclk_spi0.clk),
1320 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_48m_spi1),
1321 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
1322 CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk1", &clk_48m_spi2),
1323 CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
1324};
1325
1270void __init s5pc100_register_clocks(void) 1326void __init s5pc100_register_clocks(void)
1271{ 1327{
1272 int ptr; 1328 int ptr;
@@ -1278,9 +1334,16 @@ void __init s5pc100_register_clocks(void)
1278 1334
1279 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 1335 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
1280 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 1336 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1337 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
1338 s3c_register_clksrc(clksrc_cdev[ptr], 1);
1281 1339
1282 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1340 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1283 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1341 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1342 clkdev_add_table(s5pc100_clk_lookup, ARRAY_SIZE(s5pc100_clk_lookup));
1343
1344 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
1345 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1346 s3c_disable_clocks(clk_cdev[ptr], 1);
1284 1347
1285 s3c24xx_register_clock(&dummy_apb_pclk); 1348 s3c24xx_register_clock(&dummy_apb_pclk);
1286 1349
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
deleted file mode 100644
index e5d6c4dceb56..000000000000
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ /dev/null
@@ -1,227 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/spi-clocks.h>
18#include <mach/irqs.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22#include <plat/irqs.h>
23
24static char *spi_src_clks[] = {
25 [S5PC100_SPI_SRCCLK_PCLK] = "pclk",
26 [S5PC100_SPI_SRCCLK_48M] = "spi_48m",
27 [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
28};
29
30/* SPI Controller platform_devices */
31
32/* Since we emulate multi-cs capability, we do not touch the CS.
33 * The emulated CS is toggled by board specific mechanism, as it can
34 * be either some immediate GPIO or some signal out of some other
35 * chip in between ... or some yet another way.
36 * We simply do not assume anything about CS.
37 */
38static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
39{
40 switch (pdev->id) {
41 case 0:
42 s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
43 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
44 break;
45
46 case 1:
47 s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
48 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
49 break;
50
51 case 2:
52 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
53 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
54 s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
55 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
56 break;
57
58 default:
59 dev_err(&pdev->dev, "Invalid SPI Controller number!");
60 return -EINVAL;
61 }
62
63 return 0;
64}
65
66static struct resource s5pc100_spi0_resource[] = {
67 [0] = {
68 .start = S5PC100_PA_SPI0,
69 .end = S5PC100_PA_SPI0 + 0x100 - 1,
70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
73 .start = DMACH_SPI0_TX,
74 .end = DMACH_SPI0_TX,
75 .flags = IORESOURCE_DMA,
76 },
77 [2] = {
78 .start = DMACH_SPI0_RX,
79 .end = DMACH_SPI0_RX,
80 .flags = IORESOURCE_DMA,
81 },
82 [3] = {
83 .start = IRQ_SPI0,
84 .end = IRQ_SPI0,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
90 .cfg_gpio = s5pc100_spi_cfg_gpio,
91 .fifo_lvl_mask = 0x7f,
92 .rx_lvl_offset = 13,
93 .high_speed = 1,
94 .tx_st_done = 21,
95};
96
97static u64 spi_dmamask = DMA_BIT_MASK(32);
98
99struct platform_device s5pc100_device_spi0 = {
100 .name = "s3c64xx-spi",
101 .id = 0,
102 .num_resources = ARRAY_SIZE(s5pc100_spi0_resource),
103 .resource = s5pc100_spi0_resource,
104 .dev = {
105 .dma_mask = &spi_dmamask,
106 .coherent_dma_mask = DMA_BIT_MASK(32),
107 .platform_data = &s5pc100_spi0_pdata,
108 },
109};
110
111static struct resource s5pc100_spi1_resource[] = {
112 [0] = {
113 .start = S5PC100_PA_SPI1,
114 .end = S5PC100_PA_SPI1 + 0x100 - 1,
115 .flags = IORESOURCE_MEM,
116 },
117 [1] = {
118 .start = DMACH_SPI1_TX,
119 .end = DMACH_SPI1_TX,
120 .flags = IORESOURCE_DMA,
121 },
122 [2] = {
123 .start = DMACH_SPI1_RX,
124 .end = DMACH_SPI1_RX,
125 .flags = IORESOURCE_DMA,
126 },
127 [3] = {
128 .start = IRQ_SPI1,
129 .end = IRQ_SPI1,
130 .flags = IORESOURCE_IRQ,
131 },
132};
133
134static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
135 .cfg_gpio = s5pc100_spi_cfg_gpio,
136 .fifo_lvl_mask = 0x7f,
137 .rx_lvl_offset = 13,
138 .high_speed = 1,
139 .tx_st_done = 21,
140};
141
142struct platform_device s5pc100_device_spi1 = {
143 .name = "s3c64xx-spi",
144 .id = 1,
145 .num_resources = ARRAY_SIZE(s5pc100_spi1_resource),
146 .resource = s5pc100_spi1_resource,
147 .dev = {
148 .dma_mask = &spi_dmamask,
149 .coherent_dma_mask = DMA_BIT_MASK(32),
150 .platform_data = &s5pc100_spi1_pdata,
151 },
152};
153
154static struct resource s5pc100_spi2_resource[] = {
155 [0] = {
156 .start = S5PC100_PA_SPI2,
157 .end = S5PC100_PA_SPI2 + 0x100 - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 [1] = {
161 .start = DMACH_SPI2_TX,
162 .end = DMACH_SPI2_TX,
163 .flags = IORESOURCE_DMA,
164 },
165 [2] = {
166 .start = DMACH_SPI2_RX,
167 .end = DMACH_SPI2_RX,
168 .flags = IORESOURCE_DMA,
169 },
170 [3] = {
171 .start = IRQ_SPI2,
172 .end = IRQ_SPI2,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
178 .cfg_gpio = s5pc100_spi_cfg_gpio,
179 .fifo_lvl_mask = 0x7f,
180 .rx_lvl_offset = 13,
181 .high_speed = 1,
182 .tx_st_done = 21,
183};
184
185struct platform_device s5pc100_device_spi2 = {
186 .name = "s3c64xx-spi",
187 .id = 2,
188 .num_resources = ARRAY_SIZE(s5pc100_spi2_resource),
189 .resource = s5pc100_spi2_resource,
190 .dev = {
191 .dma_mask = &spi_dmamask,
192 .coherent_dma_mask = DMA_BIT_MASK(32),
193 .platform_data = &s5pc100_spi2_pdata,
194 },
195};
196
197void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
198{
199 struct s3c64xx_spi_info *pd;
200
201 /* Reject invalid configuration */
202 if (!num_cs || src_clk_nr < 0
203 || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) {
204 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
205 return;
206 }
207
208 switch (cntrlr) {
209 case 0:
210 pd = &s5pc100_spi0_pdata;
211 break;
212 case 1:
213 pd = &s5pc100_spi1_pdata;
214 break;
215 case 2:
216 pd = &s5pc100_spi2_pdata;
217 break;
218 default:
219 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
220 __func__, cntrlr);
221 return;
222 }
223
224 pd->num_cs = num_cs;
225 pd->src_clk_nr = src_clk_nr;
226 pd->src_clk_name = spi_src_clks[src_clk_nr];
227}
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index 065a087f5a8b..c841f4d313f2 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -35,100 +35,42 @@
35 35
36static u64 dma_dmamask = DMA_BIT_MASK(32); 36static u64 dma_dmamask = DMA_BIT_MASK(32);
37 37
38struct dma_pl330_peri pdma0_peri[30] = { 38u8 pdma0_peri[] = {
39 { 39 DMACH_UART0_RX,
40 .peri_id = (u8)DMACH_UART0_RX, 40 DMACH_UART0_TX,
41 .rqtype = DEVTOMEM, 41 DMACH_UART1_RX,
42 }, { 42 DMACH_UART1_TX,
43 .peri_id = (u8)DMACH_UART0_TX, 43 DMACH_UART2_RX,
44 .rqtype = MEMTODEV, 44 DMACH_UART2_TX,
45 }, { 45 DMACH_UART3_RX,
46 .peri_id = (u8)DMACH_UART1_RX, 46 DMACH_UART3_TX,
47 .rqtype = DEVTOMEM, 47 DMACH_IRDA,
48 }, { 48 DMACH_I2S0_RX,
49 .peri_id = (u8)DMACH_UART1_TX, 49 DMACH_I2S0_TX,
50 .rqtype = MEMTODEV, 50 DMACH_I2S0S_TX,
51 }, { 51 DMACH_I2S1_RX,
52 .peri_id = (u8)DMACH_UART2_RX, 52 DMACH_I2S1_TX,
53 .rqtype = DEVTOMEM, 53 DMACH_I2S2_RX,
54 }, { 54 DMACH_I2S2_TX,
55 .peri_id = (u8)DMACH_UART2_TX, 55 DMACH_SPI0_RX,
56 .rqtype = MEMTODEV, 56 DMACH_SPI0_TX,
57 }, { 57 DMACH_SPI1_RX,
58 .peri_id = (u8)DMACH_UART3_RX, 58 DMACH_SPI1_TX,
59 .rqtype = DEVTOMEM, 59 DMACH_SPI2_RX,
60 }, { 60 DMACH_SPI2_TX,
61 .peri_id = (u8)DMACH_UART3_TX, 61 DMACH_AC97_MICIN,
62 .rqtype = MEMTODEV, 62 DMACH_AC97_PCMIN,
63 }, { 63 DMACH_AC97_PCMOUT,
64 .peri_id = DMACH_IRDA, 64 DMACH_EXTERNAL,
65 }, { 65 DMACH_PWM,
66 .peri_id = (u8)DMACH_I2S0_RX, 66 DMACH_SPDIF,
67 .rqtype = DEVTOMEM, 67 DMACH_HSI_RX,
68 }, { 68 DMACH_HSI_TX,
69 .peri_id = (u8)DMACH_I2S0_TX,
70 .rqtype = MEMTODEV,
71 }, {
72 .peri_id = (u8)DMACH_I2S0S_TX,
73 .rqtype = MEMTODEV,
74 }, {
75 .peri_id = (u8)DMACH_I2S1_RX,
76 .rqtype = DEVTOMEM,
77 }, {
78 .peri_id = (u8)DMACH_I2S1_TX,
79 .rqtype = MEMTODEV,
80 }, {
81 .peri_id = (u8)DMACH_I2S2_RX,
82 .rqtype = DEVTOMEM,
83 }, {
84 .peri_id = (u8)DMACH_I2S2_TX,
85 .rqtype = MEMTODEV,
86 }, {
87 .peri_id = (u8)DMACH_SPI0_RX,
88 .rqtype = DEVTOMEM,
89 }, {
90 .peri_id = (u8)DMACH_SPI0_TX,
91 .rqtype = MEMTODEV,
92 }, {
93 .peri_id = (u8)DMACH_SPI1_RX,
94 .rqtype = DEVTOMEM,
95 }, {
96 .peri_id = (u8)DMACH_SPI1_TX,
97 .rqtype = MEMTODEV,
98 }, {
99 .peri_id = (u8)DMACH_SPI2_RX,
100 .rqtype = DEVTOMEM,
101 }, {
102 .peri_id = (u8)DMACH_SPI2_TX,
103 .rqtype = MEMTODEV,
104 }, {
105 .peri_id = (u8)DMACH_AC97_MICIN,
106 .rqtype = DEVTOMEM,
107 }, {
108 .peri_id = (u8)DMACH_AC97_PCMIN,
109 .rqtype = DEVTOMEM,
110 }, {
111 .peri_id = (u8)DMACH_AC97_PCMOUT,
112 .rqtype = MEMTODEV,
113 }, {
114 .peri_id = (u8)DMACH_EXTERNAL,
115 }, {
116 .peri_id = (u8)DMACH_PWM,
117 }, {
118 .peri_id = (u8)DMACH_SPDIF,
119 .rqtype = MEMTODEV,
120 }, {
121 .peri_id = (u8)DMACH_HSI_RX,
122 .rqtype = DEVTOMEM,
123 }, {
124 .peri_id = (u8)DMACH_HSI_TX,
125 .rqtype = MEMTODEV,
126 },
127}; 69};
128 70
129struct dma_pl330_platdata s5pc100_pdma0_pdata = { 71struct dma_pl330_platdata s5pc100_pdma0_pdata = {
130 .nr_valid_peri = ARRAY_SIZE(pdma0_peri), 72 .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
131 .peri = pdma0_peri, 73 .peri_id = pdma0_peri,
132}; 74};
133 75
134struct amba_device s5pc100_device_pdma0 = { 76struct amba_device s5pc100_device_pdma0 = {
@@ -147,98 +89,42 @@ struct amba_device s5pc100_device_pdma0 = {
147 .periphid = 0x00041330, 89 .periphid = 0x00041330,
148}; 90};
149 91
150struct dma_pl330_peri pdma1_peri[30] = { 92u8 pdma1_peri[] = {
151 { 93 DMACH_UART0_RX,
152 .peri_id = (u8)DMACH_UART0_RX, 94 DMACH_UART0_TX,
153 .rqtype = DEVTOMEM, 95 DMACH_UART1_RX,
154 }, { 96 DMACH_UART1_TX,
155 .peri_id = (u8)DMACH_UART0_TX, 97 DMACH_UART2_RX,
156 .rqtype = MEMTODEV, 98 DMACH_UART2_TX,
157 }, { 99 DMACH_UART3_RX,
158 .peri_id = (u8)DMACH_UART1_RX, 100 DMACH_UART3_TX,
159 .rqtype = DEVTOMEM, 101 DMACH_IRDA,
160 }, { 102 DMACH_I2S0_RX,
161 .peri_id = (u8)DMACH_UART1_TX, 103 DMACH_I2S0_TX,
162 .rqtype = MEMTODEV, 104 DMACH_I2S0S_TX,
163 }, { 105 DMACH_I2S1_RX,
164 .peri_id = (u8)DMACH_UART2_RX, 106 DMACH_I2S1_TX,
165 .rqtype = DEVTOMEM, 107 DMACH_I2S2_RX,
166 }, { 108 DMACH_I2S2_TX,
167 .peri_id = (u8)DMACH_UART2_TX, 109 DMACH_SPI0_RX,
168 .rqtype = MEMTODEV, 110 DMACH_SPI0_TX,
169 }, { 111 DMACH_SPI1_RX,
170 .peri_id = (u8)DMACH_UART3_RX, 112 DMACH_SPI1_TX,
171 .rqtype = DEVTOMEM, 113 DMACH_SPI2_RX,
172 }, { 114 DMACH_SPI2_TX,
173 .peri_id = (u8)DMACH_UART3_TX, 115 DMACH_PCM0_RX,
174 .rqtype = MEMTODEV, 116 DMACH_PCM0_TX,
175 }, { 117 DMACH_PCM1_RX,
176 .peri_id = DMACH_IRDA, 118 DMACH_PCM1_TX,
177 }, { 119 DMACH_MSM_REQ0,
178 .peri_id = (u8)DMACH_I2S0_RX, 120 DMACH_MSM_REQ1,
179 .rqtype = DEVTOMEM, 121 DMACH_MSM_REQ2,
180 }, { 122 DMACH_MSM_REQ3,
181 .peri_id = (u8)DMACH_I2S0_TX,
182 .rqtype = MEMTODEV,
183 }, {
184 .peri_id = (u8)DMACH_I2S0S_TX,
185 .rqtype = MEMTODEV,
186 }, {
187 .peri_id = (u8)DMACH_I2S1_RX,
188 .rqtype = DEVTOMEM,
189 }, {
190 .peri_id = (u8)DMACH_I2S1_TX,
191 .rqtype = MEMTODEV,
192 }, {
193 .peri_id = (u8)DMACH_I2S2_RX,
194 .rqtype = DEVTOMEM,
195 }, {
196 .peri_id = (u8)DMACH_I2S2_TX,
197 .rqtype = MEMTODEV,
198 }, {
199 .peri_id = (u8)DMACH_SPI0_RX,
200 .rqtype = DEVTOMEM,
201 }, {
202 .peri_id = (u8)DMACH_SPI0_TX,
203 .rqtype = MEMTODEV,
204 }, {
205 .peri_id = (u8)DMACH_SPI1_RX,
206 .rqtype = DEVTOMEM,
207 }, {
208 .peri_id = (u8)DMACH_SPI1_TX,
209 .rqtype = MEMTODEV,
210 }, {
211 .peri_id = (u8)DMACH_SPI2_RX,
212 .rqtype = DEVTOMEM,
213 }, {
214 .peri_id = (u8)DMACH_SPI2_TX,
215 .rqtype = MEMTODEV,
216 }, {
217 .peri_id = (u8)DMACH_PCM0_RX,
218 .rqtype = DEVTOMEM,
219 }, {
220 .peri_id = (u8)DMACH_PCM1_TX,
221 .rqtype = MEMTODEV,
222 }, {
223 .peri_id = (u8)DMACH_PCM1_RX,
224 .rqtype = DEVTOMEM,
225 }, {
226 .peri_id = (u8)DMACH_PCM1_TX,
227 .rqtype = MEMTODEV,
228 }, {
229 .peri_id = (u8)DMACH_MSM_REQ0,
230 }, {
231 .peri_id = (u8)DMACH_MSM_REQ1,
232 }, {
233 .peri_id = (u8)DMACH_MSM_REQ2,
234 }, {
235 .peri_id = (u8)DMACH_MSM_REQ3,
236 },
237}; 123};
238 124
239struct dma_pl330_platdata s5pc100_pdma1_pdata = { 125struct dma_pl330_platdata s5pc100_pdma1_pdata = {
240 .nr_valid_peri = ARRAY_SIZE(pdma1_peri), 126 .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
241 .peri = pdma1_peri, 127 .peri_id = pdma1_peri,
242}; 128};
243 129
244struct amba_device s5pc100_device_pdma1 = { 130struct amba_device s5pc100_device_pdma1 = {
@@ -259,7 +145,12 @@ struct amba_device s5pc100_device_pdma1 = {
259 145
260static int __init s5pc100_dma_init(void) 146static int __init s5pc100_dma_init(void)
261{ 147{
148 dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
149 dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
262 amba_device_register(&s5pc100_device_pdma0, &iomem_resource); 150 amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
151
152 dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
153 dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
263 amba_device_register(&s5pc100_device_pdma1, &iomem_resource); 154 amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
264 155
265 return 0; 156 return 0;
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index d2eb4757381f..2870f12c7926 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -97,6 +97,8 @@
97#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) 97#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
98#define IRQ_VIC_END S5P_IRQ_VIC2(31) 98#define IRQ_VIC_END S5P_IRQ_VIC2(31)
99 99
100#define IRQ_TIMER_BASE (11)
101
100#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) 102#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
101#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) 103#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
102 104
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index ccbe6b767f7d..54bc4f82e17a 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -100,6 +100,9 @@
100#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG 100#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
101#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY 101#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
102#define S3C_PA_WDT S5PC100_PA_WATCHDOG 102#define S3C_PA_WDT S5PC100_PA_WATCHDOG
103#define S3C_PA_SPI0 S5PC100_PA_SPI0
104#define S3C_PA_SPI1 S5PC100_PA_SPI1
105#define S3C_PA_SPI2 S5PC100_PA_SPI2
103 106
104#define S5P_PA_CHIPID S5PC100_PA_CHIPID 107#define S5P_PA_CHIPID S5PC100_PA_CHIPID
105#define S5P_PA_FIMC0 S5PC100_PA_FIMC0 108#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
deleted file mode 100644
index 6418c6e8a7b7..000000000000
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ /dev/null
@@ -1,23 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/setup-sdhci.c
2 *
3 * Copyright 2008 Samsung Electronics
4 *
5 * S5PC100 - Helper functions for settign up SDHCI device(s) (HSMMC)
6 *
7 * Based on mach-s3c6410/setup-sdhci.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/types.h>
15
16/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
17
18char *s5pc100_hsmmc_clksrcs[4] = {
19 [0] = "hsmmc", /* HCLK */
20 /* [1] = "hsmmc", - duplicate HCLK entry */
21 [2] = "sclk_mmc", /* mmc_bus */
22 /* [3] = "48m", - note not successfully used yet */
23};
diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c
new file mode 100644
index 000000000000..431a6f747caa
--- /dev/null
+++ b/arch/arm/mach-s5pc100/setup-spi.c
@@ -0,0 +1,65 @@
1/* linux/arch/arm/mach-s5pc100/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
19 .fifo_lvl_mask = 0x7f,
20 .rx_lvl_offset = 13,
21 .high_speed = 1,
22 .tx_st_done = 21,
23};
24
25int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
28 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
29 return 0;
30}
31#endif
32
33#ifdef CONFIG_S3C64XX_DEV_SPI1
34struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
35 .fifo_lvl_mask = 0x7f,
36 .rx_lvl_offset = 13,
37 .high_speed = 1,
38 .tx_st_done = 21,
39};
40
41int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
42{
43 s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
44 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
45 return 0;
46}
47#endif
48
49#ifdef CONFIG_S3C64XX_DEV_SPI2
50struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
51 .fifo_lvl_mask = 0x7f,
52 .rx_lvl_offset = 13,
53 .high_speed = 1,
54 .tx_st_done = 21,
55};
56
57int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
58{
59 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
60 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
61 s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
62 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
63 return 0;
64}
65#endif
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 646057ab2e4c..2cdc42e838b8 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -60,6 +60,11 @@ config S5PV210_SETUP_FIMC
60 help 60 help
61 Common setup code for the camera interfaces. 61 Common setup code for the camera interfaces.
62 62
63config S5PV210_SETUP_SPI
64 bool
65 help
66 Common setup code for SPI GPIO configurations.
67
63menu "S5PC110 Machines" 68menu "S5PC110 Machines"
64 69
65config MACH_AQUILA 70config MACH_AQUILA
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 4c59186de957..76a121dd52b4 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
29# device support 29# device support
30 30
31obj-y += dev-audio.o 31obj-y += dev-audio.o
32obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
33 32
34obj-y += setup-i2c0.o 33obj-y += setup-i2c0.o
35obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 34obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
@@ -38,5 +37,5 @@ obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
38obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 37obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
39obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o 38obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
40obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o 39obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
41obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
42obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 40obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
41obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 04c9b578e626..c78dfddd77fd 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -400,30 +400,6 @@ static struct clk init_clocks_off[] = {
400 .enable = s5pv210_clk_ip1_ctrl, 400 .enable = s5pv210_clk_ip1_ctrl,
401 .ctrlbit = (1<<25), 401 .ctrlbit = (1<<25),
402 }, { 402 }, {
403 .name = "hsmmc",
404 .devname = "s3c-sdhci.0",
405 .parent = &clk_hclk_psys.clk,
406 .enable = s5pv210_clk_ip2_ctrl,
407 .ctrlbit = (1<<16),
408 }, {
409 .name = "hsmmc",
410 .devname = "s3c-sdhci.1",
411 .parent = &clk_hclk_psys.clk,
412 .enable = s5pv210_clk_ip2_ctrl,
413 .ctrlbit = (1<<17),
414 }, {
415 .name = "hsmmc",
416 .devname = "s3c-sdhci.2",
417 .parent = &clk_hclk_psys.clk,
418 .enable = s5pv210_clk_ip2_ctrl,
419 .ctrlbit = (1<<18),
420 }, {
421 .name = "hsmmc",
422 .devname = "s3c-sdhci.3",
423 .parent = &clk_hclk_psys.clk,
424 .enable = s5pv210_clk_ip2_ctrl,
425 .ctrlbit = (1<<19),
426 }, {
427 .name = "systimer", 403 .name = "systimer",
428 .parent = &clk_pclk_psys.clk, 404 .parent = &clk_pclk_psys.clk,
429 .enable = s5pv210_clk_ip3_ctrl, 405 .enable = s5pv210_clk_ip3_ctrl,
@@ -560,6 +536,38 @@ static struct clk init_clocks[] = {
560 }, 536 },
561}; 537};
562 538
539static struct clk clk_hsmmc0 = {
540 .name = "hsmmc",
541 .devname = "s3c-sdhci.0",
542 .parent = &clk_hclk_psys.clk,
543 .enable = s5pv210_clk_ip2_ctrl,
544 .ctrlbit = (1<<16),
545};
546
547static struct clk clk_hsmmc1 = {
548 .name = "hsmmc",
549 .devname = "s3c-sdhci.1",
550 .parent = &clk_hclk_psys.clk,
551 .enable = s5pv210_clk_ip2_ctrl,
552 .ctrlbit = (1<<17),
553};
554
555static struct clk clk_hsmmc2 = {
556 .name = "hsmmc",
557 .devname = "s3c-sdhci.2",
558 .parent = &clk_hclk_psys.clk,
559 .enable = s5pv210_clk_ip2_ctrl,
560 .ctrlbit = (1<<18),
561};
562
563static struct clk clk_hsmmc3 = {
564 .name = "hsmmc",
565 .devname = "s3c-sdhci.3",
566 .parent = &clk_hclk_psys.clk,
567 .enable = s5pv210_clk_ip2_ctrl,
568 .ctrlbit = (1<<19),
569};
570
563static struct clk *clkset_uart_list[] = { 571static struct clk *clkset_uart_list[] = {
564 [6] = &clk_mout_mpll.clk, 572 [6] = &clk_mout_mpll.clk,
565 [7] = &clk_mout_epll.clk, 573 [7] = &clk_mout_epll.clk,
@@ -810,46 +818,6 @@ static struct clksrc_clk clksrcs[] = {
810 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, 818 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 },
811 }, { 819 }, {
812 .clk = { 820 .clk = {
813 .name = "uclk1",
814 .devname = "s5pv210-uart.0",
815 .enable = s5pv210_clk_mask0_ctrl,
816 .ctrlbit = (1 << 12),
817 },
818 .sources = &clkset_uart,
819 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
820 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
821 }, {
822 .clk = {
823 .name = "uclk1",
824 .devname = "s5pv210-uart.1",
825 .enable = s5pv210_clk_mask0_ctrl,
826 .ctrlbit = (1 << 13),
827 },
828 .sources = &clkset_uart,
829 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 },
830 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
831 }, {
832 .clk = {
833 .name = "uclk1",
834 .devname = "s5pv210-uart.2",
835 .enable = s5pv210_clk_mask0_ctrl,
836 .ctrlbit = (1 << 14),
837 },
838 .sources = &clkset_uart,
839 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 },
840 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
841 }, {
842 .clk = {
843 .name = "uclk1",
844 .devname = "s5pv210-uart.3",
845 .enable = s5pv210_clk_mask0_ctrl,
846 .ctrlbit = (1 << 15),
847 },
848 .sources = &clkset_uart,
849 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 },
850 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
851 }, {
852 .clk = {
853 .name = "sclk_fimc", 821 .name = "sclk_fimc",
854 .devname = "s5pv210-fimc.0", 822 .devname = "s5pv210-fimc.0",
855 .enable = s5pv210_clk_mask1_ctrl, 823 .enable = s5pv210_clk_mask1_ctrl,
@@ -907,46 +875,6 @@ static struct clksrc_clk clksrcs[] = {
907 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, 875 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 },
908 }, { 876 }, {
909 .clk = { 877 .clk = {
910 .name = "sclk_mmc",
911 .devname = "s3c-sdhci.0",
912 .enable = s5pv210_clk_mask0_ctrl,
913 .ctrlbit = (1 << 8),
914 },
915 .sources = &clkset_group2,
916 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
917 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
918 }, {
919 .clk = {
920 .name = "sclk_mmc",
921 .devname = "s3c-sdhci.1",
922 .enable = s5pv210_clk_mask0_ctrl,
923 .ctrlbit = (1 << 9),
924 },
925 .sources = &clkset_group2,
926 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
927 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
928 }, {
929 .clk = {
930 .name = "sclk_mmc",
931 .devname = "s3c-sdhci.2",
932 .enable = s5pv210_clk_mask0_ctrl,
933 .ctrlbit = (1 << 10),
934 },
935 .sources = &clkset_group2,
936 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
937 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
938 }, {
939 .clk = {
940 .name = "sclk_mmc",
941 .devname = "s3c-sdhci.3",
942 .enable = s5pv210_clk_mask0_ctrl,
943 .ctrlbit = (1 << 11),
944 },
945 .sources = &clkset_group2,
946 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
947 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
948 }, {
949 .clk = {
950 .name = "sclk_mfc", 878 .name = "sclk_mfc",
951 .devname = "s5p-mfc", 879 .devname = "s5p-mfc",
952 .enable = s5pv210_clk_ip0_ctrl, 880 .enable = s5pv210_clk_ip0_ctrl,
@@ -984,26 +912,6 @@ static struct clksrc_clk clksrcs[] = {
984 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, 912 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
985 }, { 913 }, {
986 .clk = { 914 .clk = {
987 .name = "sclk_spi",
988 .devname = "s3c64xx-spi.0",
989 .enable = s5pv210_clk_mask0_ctrl,
990 .ctrlbit = (1 << 16),
991 },
992 .sources = &clkset_group2,
993 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
994 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
995 }, {
996 .clk = {
997 .name = "sclk_spi",
998 .devname = "s3c64xx-spi.1",
999 .enable = s5pv210_clk_mask0_ctrl,
1000 .ctrlbit = (1 << 17),
1001 },
1002 .sources = &clkset_group2,
1003 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
1004 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
1005 }, {
1006 .clk = {
1007 .name = "sclk_pwi", 915 .name = "sclk_pwi",
1008 .enable = s5pv210_clk_mask0_ctrl, 916 .enable = s5pv210_clk_mask0_ctrl,
1009 .ctrlbit = (1 << 29), 917 .ctrlbit = (1 << 29),
@@ -1023,6 +931,147 @@ static struct clksrc_clk clksrcs[] = {
1023 }, 931 },
1024}; 932};
1025 933
934static struct clksrc_clk clk_sclk_uart0 = {
935 .clk = {
936 .name = "uclk1",
937 .devname = "s5pv210-uart.0",
938 .enable = s5pv210_clk_mask0_ctrl,
939 .ctrlbit = (1 << 12),
940 },
941 .sources = &clkset_uart,
942 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
943 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
944};
945
946static struct clksrc_clk clk_sclk_uart1 = {
947 .clk = {
948 .name = "uclk1",
949 .devname = "s5pv210-uart.1",
950 .enable = s5pv210_clk_mask0_ctrl,
951 .ctrlbit = (1 << 13),
952 },
953 .sources = &clkset_uart,
954 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 },
955 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
956};
957
958static struct clksrc_clk clk_sclk_uart2 = {
959 .clk = {
960 .name = "uclk1",
961 .devname = "s5pv210-uart.2",
962 .enable = s5pv210_clk_mask0_ctrl,
963 .ctrlbit = (1 << 14),
964 },
965 .sources = &clkset_uart,
966 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 },
967 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
968};
969
970static struct clksrc_clk clk_sclk_uart3 = {
971 .clk = {
972 .name = "uclk1",
973 .devname = "s5pv210-uart.3",
974 .enable = s5pv210_clk_mask0_ctrl,
975 .ctrlbit = (1 << 15),
976 },
977 .sources = &clkset_uart,
978 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 },
979 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
980};
981
982static struct clksrc_clk clk_sclk_mmc0 = {
983 .clk = {
984 .name = "sclk_mmc",
985 .devname = "s3c-sdhci.0",
986 .enable = s5pv210_clk_mask0_ctrl,
987 .ctrlbit = (1 << 8),
988 },
989 .sources = &clkset_group2,
990 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
991 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
992};
993
994static struct clksrc_clk clk_sclk_mmc1 = {
995 .clk = {
996 .name = "sclk_mmc",
997 .devname = "s3c-sdhci.1",
998 .enable = s5pv210_clk_mask0_ctrl,
999 .ctrlbit = (1 << 9),
1000 },
1001 .sources = &clkset_group2,
1002 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
1003 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
1004};
1005
1006static struct clksrc_clk clk_sclk_mmc2 = {
1007 .clk = {
1008 .name = "sclk_mmc",
1009 .devname = "s3c-sdhci.2",
1010 .enable = s5pv210_clk_mask0_ctrl,
1011 .ctrlbit = (1 << 10),
1012 },
1013 .sources = &clkset_group2,
1014 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
1015 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
1016};
1017
1018static struct clksrc_clk clk_sclk_mmc3 = {
1019 .clk = {
1020 .name = "sclk_mmc",
1021 .devname = "s3c-sdhci.3",
1022 .enable = s5pv210_clk_mask0_ctrl,
1023 .ctrlbit = (1 << 11),
1024 },
1025 .sources = &clkset_group2,
1026 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
1027 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
1028};
1029
1030static struct clksrc_clk clk_sclk_spi0 = {
1031 .clk = {
1032 .name = "sclk_spi",
1033 .devname = "s3c64xx-spi.0",
1034 .enable = s5pv210_clk_mask0_ctrl,
1035 .ctrlbit = (1 << 16),
1036 },
1037 .sources = &clkset_group2,
1038 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
1039 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
1040 };
1041
1042static struct clksrc_clk clk_sclk_spi1 = {
1043 .clk = {
1044 .name = "sclk_spi",
1045 .devname = "s3c64xx-spi.1",
1046 .enable = s5pv210_clk_mask0_ctrl,
1047 .ctrlbit = (1 << 17),
1048 },
1049 .sources = &clkset_group2,
1050 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
1051 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
1052 };
1053
1054
1055static struct clksrc_clk *clksrc_cdev[] = {
1056 &clk_sclk_uart0,
1057 &clk_sclk_uart1,
1058 &clk_sclk_uart2,
1059 &clk_sclk_uart3,
1060 &clk_sclk_mmc0,
1061 &clk_sclk_mmc1,
1062 &clk_sclk_mmc2,
1063 &clk_sclk_mmc3,
1064 &clk_sclk_spi0,
1065 &clk_sclk_spi1,
1066};
1067
1068static struct clk *clk_cdev[] = {
1069 &clk_hsmmc0,
1070 &clk_hsmmc1,
1071 &clk_hsmmc2,
1072 &clk_hsmmc3,
1073};
1074
1026/* Clock initialisation code */ 1075/* Clock initialisation code */
1027static struct clksrc_clk *sysclks[] = { 1076static struct clksrc_clk *sysclks[] = {
1028 &clk_mout_apll, 1077 &clk_mout_apll,
@@ -1262,6 +1311,25 @@ static struct clk *clks[] __initdata = {
1262 &clk_pcmcdclk2, 1311 &clk_pcmcdclk2,
1263}; 1312};
1264 1313
1314static struct clk_lookup s5pv210_clk_lookup[] = {
1315 CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
1316 CLKDEV_INIT("s5pv210-uart.0", "clk_uart_baud1", &clk_sclk_uart0.clk),
1317 CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk),
1318 CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk),
1319 CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk),
1320 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
1321 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
1322 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
1323 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.0", &clk_hsmmc3),
1324 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
1325 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
1326 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
1327 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
1328 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1329 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
1330 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
1331};
1332
1265void __init s5pv210_register_clocks(void) 1333void __init s5pv210_register_clocks(void)
1266{ 1334{
1267 int ptr; 1335 int ptr;
@@ -1274,11 +1342,19 @@ void __init s5pv210_register_clocks(void)
1274 for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) 1342 for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
1275 s3c_register_clksrc(sclk_tv[ptr], 1); 1343 s3c_register_clksrc(sclk_tv[ptr], 1);
1276 1344
1345 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
1346 s3c_register_clksrc(clksrc_cdev[ptr], 1);
1347
1277 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 1348 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
1278 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 1349 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1279 1350
1280 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1351 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1281 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1352 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1353 clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup));
1354
1355 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
1356 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1357 s3c_disable_clocks(clk_cdev[ptr], 1);
1282 1358
1283 s3c24xx_register_clock(&dummy_apb_pclk); 1359 s3c24xx_register_clock(&dummy_apb_pclk);
1284 s3c_pwmclk_init(); 1360 s3c_pwmclk_init();
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 0ec393305d7c..9c1bcdcc12c3 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -254,28 +254,9 @@ int __init s5pv210_init(void)
254 return device_register(&s5pv210_dev); 254 return device_register(&s5pv210_dev);
255} 255}
256 256
257static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
258 [0] = {
259 .name = "pclk",
260 .divisor = 1,
261 .min_baud = 0,
262 .max_baud = 0,
263 },
264};
265
266/* uart registration process */ 257/* uart registration process */
267 258
268void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no) 259void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
269{ 260{
270 struct s3c2410_uartcfg *tcfg = cfg;
271 u32 ucnt;
272
273 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
274 if (!tcfg->clocks) {
275 tcfg->clocks = s5pv210_serial_clocks;
276 tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
277 }
278 }
279
280 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); 261 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
281} 262}
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
deleted file mode 100644
index eaf9a7bff7a0..000000000000
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ /dev/null
@@ -1,175 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/irqs.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5PV210_SPI_SRCCLK_PCLK] = "pclk",
25 [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
37{
38 unsigned int base;
39
40 switch (pdev->id) {
41 case 0:
42 base = S5PV210_GPB(0);
43 break;
44
45 case 1:
46 base = S5PV210_GPB(4);
47 break;
48
49 default:
50 dev_err(&pdev->dev, "Invalid SPI Controller number!");
51 return -EINVAL;
52 }
53
54 s3c_gpio_cfgall_range(base, 3,
55 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
56
57 return 0;
58}
59
60static struct resource s5pv210_spi0_resource[] = {
61 [0] = {
62 .start = S5PV210_PA_SPI0,
63 .end = S5PV210_PA_SPI0 + 0x100 - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = DMACH_SPI0_TX,
68 .end = DMACH_SPI0_TX,
69 .flags = IORESOURCE_DMA,
70 },
71 [2] = {
72 .start = DMACH_SPI0_RX,
73 .end = DMACH_SPI0_RX,
74 .flags = IORESOURCE_DMA,
75 },
76 [3] = {
77 .start = IRQ_SPI0,
78 .end = IRQ_SPI0,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
84 .cfg_gpio = s5pv210_spi_cfg_gpio,
85 .fifo_lvl_mask = 0x1ff,
86 .rx_lvl_offset = 15,
87 .high_speed = 1,
88 .tx_st_done = 25,
89};
90
91static u64 spi_dmamask = DMA_BIT_MASK(32);
92
93struct platform_device s5pv210_device_spi0 = {
94 .name = "s3c64xx-spi",
95 .id = 0,
96 .num_resources = ARRAY_SIZE(s5pv210_spi0_resource),
97 .resource = s5pv210_spi0_resource,
98 .dev = {
99 .dma_mask = &spi_dmamask,
100 .coherent_dma_mask = DMA_BIT_MASK(32),
101 .platform_data = &s5pv210_spi0_pdata,
102 },
103};
104
105static struct resource s5pv210_spi1_resource[] = {
106 [0] = {
107 .start = S5PV210_PA_SPI1,
108 .end = S5PV210_PA_SPI1 + 0x100 - 1,
109 .flags = IORESOURCE_MEM,
110 },
111 [1] = {
112 .start = DMACH_SPI1_TX,
113 .end = DMACH_SPI1_TX,
114 .flags = IORESOURCE_DMA,
115 },
116 [2] = {
117 .start = DMACH_SPI1_RX,
118 .end = DMACH_SPI1_RX,
119 .flags = IORESOURCE_DMA,
120 },
121 [3] = {
122 .start = IRQ_SPI1,
123 .end = IRQ_SPI1,
124 .flags = IORESOURCE_IRQ,
125 },
126};
127
128static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
129 .cfg_gpio = s5pv210_spi_cfg_gpio,
130 .fifo_lvl_mask = 0x7f,
131 .rx_lvl_offset = 15,
132 .high_speed = 1,
133 .tx_st_done = 25,
134};
135
136struct platform_device s5pv210_device_spi1 = {
137 .name = "s3c64xx-spi",
138 .id = 1,
139 .num_resources = ARRAY_SIZE(s5pv210_spi1_resource),
140 .resource = s5pv210_spi1_resource,
141 .dev = {
142 .dma_mask = &spi_dmamask,
143 .coherent_dma_mask = DMA_BIT_MASK(32),
144 .platform_data = &s5pv210_spi1_pdata,
145 },
146};
147
148void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
149{
150 struct s3c64xx_spi_info *pd;
151
152 /* Reject invalid configuration */
153 if (!num_cs || src_clk_nr < 0
154 || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
155 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
156 return;
157 }
158
159 switch (cntrlr) {
160 case 0:
161 pd = &s5pv210_spi0_pdata;
162 break;
163 case 1:
164 pd = &s5pv210_spi1_pdata;
165 break;
166 default:
167 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
168 __func__, cntrlr);
169 return;
170 }
171
172 pd->num_cs = num_cs;
173 pd->src_clk_nr = src_clk_nr;
174 pd->src_clk_name = spi_src_clks[src_clk_nr];
175}
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 86b749c18b77..a6113e0267f2 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -35,90 +35,40 @@
35 35
36static u64 dma_dmamask = DMA_BIT_MASK(32); 36static u64 dma_dmamask = DMA_BIT_MASK(32);
37 37
38struct dma_pl330_peri pdma0_peri[28] = { 38u8 pdma0_peri[] = {
39 { 39 DMACH_UART0_RX,
40 .peri_id = (u8)DMACH_UART0_RX, 40 DMACH_UART0_TX,
41 .rqtype = DEVTOMEM, 41 DMACH_UART1_RX,
42 }, { 42 DMACH_UART1_TX,
43 .peri_id = (u8)DMACH_UART0_TX, 43 DMACH_UART2_RX,
44 .rqtype = MEMTODEV, 44 DMACH_UART2_TX,
45 }, { 45 DMACH_UART3_RX,
46 .peri_id = (u8)DMACH_UART1_RX, 46 DMACH_UART3_TX,
47 .rqtype = DEVTOMEM, 47 DMACH_MAX,
48 }, { 48 DMACH_I2S0_RX,
49 .peri_id = (u8)DMACH_UART1_TX, 49 DMACH_I2S0_TX,
50 .rqtype = MEMTODEV, 50 DMACH_I2S0S_TX,
51 }, { 51 DMACH_I2S1_RX,
52 .peri_id = (u8)DMACH_UART2_RX, 52 DMACH_I2S1_TX,
53 .rqtype = DEVTOMEM, 53 DMACH_MAX,
54 }, { 54 DMACH_MAX,
55 .peri_id = (u8)DMACH_UART2_TX, 55 DMACH_SPI0_RX,
56 .rqtype = MEMTODEV, 56 DMACH_SPI0_TX,
57 }, { 57 DMACH_SPI1_RX,
58 .peri_id = (u8)DMACH_UART3_RX, 58 DMACH_SPI1_TX,
59 .rqtype = DEVTOMEM, 59 DMACH_MAX,
60 }, { 60 DMACH_MAX,
61 .peri_id = (u8)DMACH_UART3_TX, 61 DMACH_AC97_MICIN,
62 .rqtype = MEMTODEV, 62 DMACH_AC97_PCMIN,
63 }, { 63 DMACH_AC97_PCMOUT,
64 .peri_id = DMACH_MAX, 64 DMACH_MAX,
65 }, { 65 DMACH_PWM,
66 .peri_id = (u8)DMACH_I2S0_RX, 66 DMACH_SPDIF,
67 .rqtype = DEVTOMEM,
68 }, {
69 .peri_id = (u8)DMACH_I2S0_TX,
70 .rqtype = MEMTODEV,
71 }, {
72 .peri_id = (u8)DMACH_I2S0S_TX,
73 .rqtype = MEMTODEV,
74 }, {
75 .peri_id = (u8)DMACH_I2S1_RX,
76 .rqtype = DEVTOMEM,
77 }, {
78 .peri_id = (u8)DMACH_I2S1_TX,
79 .rqtype = MEMTODEV,
80 }, {
81 .peri_id = (u8)DMACH_MAX,
82 }, {
83 .peri_id = (u8)DMACH_MAX,
84 }, {
85 .peri_id = (u8)DMACH_SPI0_RX,
86 .rqtype = DEVTOMEM,
87 }, {
88 .peri_id = (u8)DMACH_SPI0_TX,
89 .rqtype = MEMTODEV,
90 }, {
91 .peri_id = (u8)DMACH_SPI1_RX,
92 .rqtype = DEVTOMEM,
93 }, {
94 .peri_id = (u8)DMACH_SPI1_TX,
95 .rqtype = MEMTODEV,
96 }, {
97 .peri_id = (u8)DMACH_MAX,
98 }, {
99 .peri_id = (u8)DMACH_MAX,
100 }, {
101 .peri_id = (u8)DMACH_AC97_MICIN,
102 .rqtype = DEVTOMEM,
103 }, {
104 .peri_id = (u8)DMACH_AC97_PCMIN,
105 .rqtype = DEVTOMEM,
106 }, {
107 .peri_id = (u8)DMACH_AC97_PCMOUT,
108 .rqtype = MEMTODEV,
109 }, {
110 .peri_id = (u8)DMACH_MAX,
111 }, {
112 .peri_id = (u8)DMACH_PWM,
113 }, {
114 .peri_id = (u8)DMACH_SPDIF,
115 .rqtype = MEMTODEV,
116 },
117}; 67};
118 68
119struct dma_pl330_platdata s5pv210_pdma0_pdata = { 69struct dma_pl330_platdata s5pv210_pdma0_pdata = {
120 .nr_valid_peri = ARRAY_SIZE(pdma0_peri), 70 .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
121 .peri = pdma0_peri, 71 .peri_id = pdma0_peri,
122}; 72};
123 73
124struct amba_device s5pv210_device_pdma0 = { 74struct amba_device s5pv210_device_pdma0 = {
@@ -137,102 +87,44 @@ struct amba_device s5pv210_device_pdma0 = {
137 .periphid = 0x00041330, 87 .periphid = 0x00041330,
138}; 88};
139 89
140struct dma_pl330_peri pdma1_peri[32] = { 90u8 pdma1_peri[] = {
141 { 91 DMACH_UART0_RX,
142 .peri_id = (u8)DMACH_UART0_RX, 92 DMACH_UART0_TX,
143 .rqtype = DEVTOMEM, 93 DMACH_UART1_RX,
144 }, { 94 DMACH_UART1_TX,
145 .peri_id = (u8)DMACH_UART0_TX, 95 DMACH_UART2_RX,
146 .rqtype = MEMTODEV, 96 DMACH_UART2_TX,
147 }, { 97 DMACH_UART3_RX,
148 .peri_id = (u8)DMACH_UART1_RX, 98 DMACH_UART3_TX,
149 .rqtype = DEVTOMEM, 99 DMACH_MAX,
150 }, { 100 DMACH_I2S0_RX,
151 .peri_id = (u8)DMACH_UART1_TX, 101 DMACH_I2S0_TX,
152 .rqtype = MEMTODEV, 102 DMACH_I2S0S_TX,
153 }, { 103 DMACH_I2S1_RX,
154 .peri_id = (u8)DMACH_UART2_RX, 104 DMACH_I2S1_TX,
155 .rqtype = DEVTOMEM, 105 DMACH_I2S2_RX,
156 }, { 106 DMACH_I2S2_TX,
157 .peri_id = (u8)DMACH_UART2_TX, 107 DMACH_SPI0_RX,
158 .rqtype = MEMTODEV, 108 DMACH_SPI0_TX,
159 }, { 109 DMACH_SPI1_RX,
160 .peri_id = (u8)DMACH_UART3_RX, 110 DMACH_SPI1_TX,
161 .rqtype = DEVTOMEM, 111 DMACH_MAX,
162 }, { 112 DMACH_MAX,
163 .peri_id = (u8)DMACH_UART3_TX, 113 DMACH_PCM0_RX,
164 .rqtype = MEMTODEV, 114 DMACH_PCM0_TX,
165 }, { 115 DMACH_PCM1_RX,
166 .peri_id = DMACH_MAX, 116 DMACH_PCM1_TX,
167 }, { 117 DMACH_MSM_REQ0,
168 .peri_id = (u8)DMACH_I2S0_RX, 118 DMACH_MSM_REQ1,
169 .rqtype = DEVTOMEM, 119 DMACH_MSM_REQ2,
170 }, { 120 DMACH_MSM_REQ3,
171 .peri_id = (u8)DMACH_I2S0_TX, 121 DMACH_PCM2_RX,
172 .rqtype = MEMTODEV, 122 DMACH_PCM2_TX,
173 }, {
174 .peri_id = (u8)DMACH_I2S0S_TX,
175 .rqtype = MEMTODEV,
176 }, {
177 .peri_id = (u8)DMACH_I2S1_RX,
178 .rqtype = DEVTOMEM,
179 }, {
180 .peri_id = (u8)DMACH_I2S1_TX,
181 .rqtype = MEMTODEV,
182 }, {
183 .peri_id = (u8)DMACH_I2S2_RX,
184 .rqtype = DEVTOMEM,
185 }, {
186 .peri_id = (u8)DMACH_I2S2_TX,
187 .rqtype = MEMTODEV,
188 }, {
189 .peri_id = (u8)DMACH_SPI0_RX,
190 .rqtype = DEVTOMEM,
191 }, {
192 .peri_id = (u8)DMACH_SPI0_TX,
193 .rqtype = MEMTODEV,
194 }, {
195 .peri_id = (u8)DMACH_SPI1_RX,
196 .rqtype = DEVTOMEM,
197 }, {
198 .peri_id = (u8)DMACH_SPI1_TX,
199 .rqtype = MEMTODEV,
200 }, {
201 .peri_id = (u8)DMACH_MAX,
202 }, {
203 .peri_id = (u8)DMACH_MAX,
204 }, {
205 .peri_id = (u8)DMACH_PCM0_RX,
206 .rqtype = DEVTOMEM,
207 }, {
208 .peri_id = (u8)DMACH_PCM0_TX,
209 .rqtype = MEMTODEV,
210 }, {
211 .peri_id = (u8)DMACH_PCM1_RX,
212 .rqtype = DEVTOMEM,
213 }, {
214 .peri_id = (u8)DMACH_PCM1_TX,
215 .rqtype = MEMTODEV,
216 }, {
217 .peri_id = (u8)DMACH_MSM_REQ0,
218 }, {
219 .peri_id = (u8)DMACH_MSM_REQ1,
220 }, {
221 .peri_id = (u8)DMACH_MSM_REQ2,
222 }, {
223 .peri_id = (u8)DMACH_MSM_REQ3,
224 }, {
225 .peri_id = (u8)DMACH_PCM2_RX,
226 .rqtype = DEVTOMEM,
227 }, {
228 .peri_id = (u8)DMACH_PCM2_TX,
229 .rqtype = MEMTODEV,
230 },
231}; 123};
232 124
233struct dma_pl330_platdata s5pv210_pdma1_pdata = { 125struct dma_pl330_platdata s5pv210_pdma1_pdata = {
234 .nr_valid_peri = ARRAY_SIZE(pdma1_peri), 126 .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
235 .peri = pdma1_peri, 127 .peri_id = pdma1_peri,
236}; 128};
237 129
238struct amba_device s5pv210_device_pdma1 = { 130struct amba_device s5pv210_device_pdma1 = {
@@ -253,7 +145,12 @@ struct amba_device s5pv210_device_pdma1 = {
253 145
254static int __init s5pv210_dma_init(void) 146static int __init s5pv210_dma_init(void)
255{ 147{
148 dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
149 dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
256 amba_device_register(&s5pv210_device_pdma0, &iomem_resource); 150 amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
151
152 dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
153 dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
257 amba_device_register(&s5pv210_device_pdma1, &iomem_resource); 154 amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
258 155
259 return 0; 156 return 0;
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 5e0de3a31f3d..e777e010ed2e 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,6 +118,8 @@
118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) 118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
119#define IRQ_VIC_END S5P_IRQ_VIC3(31) 119#define IRQ_VIC_END S5P_IRQ_VIC3(31)
120 120
121#define IRQ_TIMER_BASE (11)
122
121#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) 123#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
122#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) 124#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
123 125
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 7ff609f1568b..89c34b8f73bf 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -109,6 +109,8 @@
109#define S3C_PA_RTC S5PV210_PA_RTC 109#define S3C_PA_RTC S5PV210_PA_RTC
110#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG 110#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG
111#define S3C_PA_WDT S5PV210_PA_WATCHDOG 111#define S3C_PA_WDT S5PV210_PA_WATCHDOG
112#define S3C_PA_SPI0 S5PV210_PA_SPI0
113#define S3C_PA_SPI1 S5PV210_PA_SPI1
112 114
113#define S5P_PA_CHIPID S5PV210_PA_CHIPID 115#define S5P_PA_CHIPID S5PV210_PA_CHIPID
114#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 116#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 6f7dfe993c12..5e734d025a6a 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -597,8 +597,7 @@ static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
597 597
598static void aquila_setup_sdhci(void) 598static void aquila_setup_sdhci(void)
599{ 599{
600 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); 600 gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
601 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
602 601
603 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); 602 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
604 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); 603 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 12c693717398..ff9152610439 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -229,8 +229,7 @@ static void __init goni_radio_init(void)
229 i2c1_devs[0].irq = gpio_to_irq(gpio); 229 i2c1_devs[0].irq = gpio_to_irq(gpio);
230 230
231 gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ 231 gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */
232 gpio_request(gpio, "FM_RST"); 232 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST");
233 gpio_direction_output(gpio, 1);
234} 233}
235 234
236/* TSP */ 235/* TSP */
@@ -266,8 +265,7 @@ static void __init goni_tsp_init(void)
266 int gpio; 265 int gpio;
267 266
268 gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ 267 gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */
269 gpio_request(gpio, "TSP_LDO_ON"); 268 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
270 gpio_direction_output(gpio, 1);
271 gpio_export(gpio, 0); 269 gpio_export(gpio, 0);
272 270
273 gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ 271 gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index b4021dd802a8..dff9ea7b5bba 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -155,15 +155,12 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
155{ 155{
156 if (power) { 156 if (power) {
157#if !defined(CONFIG_BACKLIGHT_PWM) 157#if !defined(CONFIG_BACKLIGHT_PWM)
158 gpio_request(S5PV210_GPD0(3), "GPD0"); 158 gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0");
159 gpio_direction_output(S5PV210_GPD0(3), 1);
160 gpio_free(S5PV210_GPD0(3)); 159 gpio_free(S5PV210_GPD0(3));
161#endif 160#endif
162 161
163 /* fire nRESET on power up */ 162 /* fire nRESET on power up */
164 gpio_request(S5PV210_GPH0(6), "GPH0"); 163 gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0");
165
166 gpio_direction_output(S5PV210_GPH0(6), 1);
167 164
168 gpio_set_value(S5PV210_GPH0(6), 0); 165 gpio_set_value(S5PV210_GPH0(6), 0);
169 mdelay(10); 166 mdelay(10);
@@ -174,8 +171,7 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
174 gpio_free(S5PV210_GPH0(6)); 171 gpio_free(S5PV210_GPH0(6));
175 } else { 172 } else {
176#if !defined(CONFIG_BACKLIGHT_PWM) 173#if !defined(CONFIG_BACKLIGHT_PWM)
177 gpio_request(S5PV210_GPD0(3), "GPD0"); 174 gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0");
178 gpio_direction_output(S5PV210_GPD0(3), 0);
179 gpio_free(S5PV210_GPD0(3)); 175 gpio_free(S5PV210_GPD0(3));
180#endif 176#endif
181 } 177 }
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
deleted file mode 100644
index 6b8ccc4d35fd..000000000000
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/setup-sdhci.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/types.h>
14
15/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
16
17char *s5pv210_hsmmc_clksrcs[4] = {
18 [0] = "hsmmc", /* HCLK */
19 /* [1] = "hsmmc", - duplicate HCLK entry */
20 [2] = "sclk_mmc", /* mmc_bus */
21 /* [3] = NULL, - reserved */
22};
diff --git a/arch/arm/mach-s5pv210/setup-spi.c b/arch/arm/mach-s5pv210/setup-spi.c
new file mode 100644
index 000000000000..f43c5048a37d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-spi.c
@@ -0,0 +1,51 @@
1/* linux/arch/arm/mach-s5pv210/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
19 .fifo_lvl_mask = 0x1ff,
20 .rx_lvl_offset = 15,
21 .high_speed = 1,
22 .tx_st_done = 25,
23};
24
25int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
28 s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
29 s3c_gpio_cfgall_range(S5PV210_GPB(2), 2,
30 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
31 return 0;
32}
33#endif
34
35#ifdef CONFIG_S3C64XX_DEV_SPI1
36struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
37 .fifo_lvl_mask = 0x7f,
38 .rx_lvl_offset = 15,
39 .high_speed = 1,
40 .tx_st_done = 25,
41};
42
43int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
44{
45 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
46 s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
47 s3c_gpio_cfgall_range(S5PV210_GPB(6), 2,
48 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
49 return 0;
50}
51#endif
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index dab3c6347a8f..d6df9f6c9f7e 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,17 +11,39 @@
11#include <linux/clk.h> 11#include <linux/clk.h>
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/mutex.h> 13#include <linux/mutex.h>
14#include <linux/io.h>
15#include <linux/clkdev.h>
14 16
15#include <mach/hardware.h> 17#include <mach/hardware.h>
16 18
17/* 19struct clkops {
18 * Very simple clock implementation - we only have one clock to deal with. 20 void (*enable)(struct clk *);
19 */ 21 void (*disable)(struct clk *);
22 unsigned long (*getrate)(struct clk *);
23};
24
20struct clk { 25struct clk {
26 const struct clkops *ops;
27 unsigned long rate;
21 unsigned int enabled; 28 unsigned int enabled;
22}; 29};
23 30
24static void clk_gpio27_enable(void) 31#define INIT_CLKREG(_clk, _devname, _conname) \
32 { \
33 .clk = _clk, \
34 .dev_id = _devname, \
35 .con_id = _conname, \
36 }
37
38#define DEFINE_CLK(_name, _ops, _rate) \
39struct clk clk_##_name = { \
40 .ops = _ops, \
41 .rate = _rate, \
42 }
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46static void clk_gpio27_enable(struct clk *clk)
25{ 47{
26 /* 48 /*
27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: 49 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -32,38 +54,22 @@ static void clk_gpio27_enable(void)
32 TUCR = TUCR_3_6864MHz; 54 TUCR = TUCR_3_6864MHz;
33} 55}
34 56
35static void clk_gpio27_disable(void) 57static void clk_gpio27_disable(struct clk *clk)
36{ 58{
37 TUCR = 0; 59 TUCR = 0;
38 GPDR &= ~GPIO_32_768kHz; 60 GPDR &= ~GPIO_32_768kHz;
39 GAFR &= ~GPIO_32_768kHz; 61 GAFR &= ~GPIO_32_768kHz;
40} 62}
41 63
42static struct clk clk_gpio27;
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46struct clk *clk_get(struct device *dev, const char *id)
47{
48 const char *devname = dev_name(dev);
49
50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
51}
52EXPORT_SYMBOL(clk_get);
53
54void clk_put(struct clk *clk)
55{
56}
57EXPORT_SYMBOL(clk_put);
58
59int clk_enable(struct clk *clk) 64int clk_enable(struct clk *clk)
60{ 65{
61 unsigned long flags; 66 unsigned long flags;
62 67
63 spin_lock_irqsave(&clocks_lock, flags); 68 spin_lock_irqsave(&clocks_lock, flags);
64 if (clk->enabled++ == 0) 69 if (clk->enabled++ == 0)
65 clk_gpio27_enable(); 70 clk->ops->enable(clk);
66 spin_unlock_irqrestore(&clocks_lock, flags); 71 spin_unlock_irqrestore(&clocks_lock, flags);
72
67 return 0; 73 return 0;
68} 74}
69EXPORT_SYMBOL(clk_enable); 75EXPORT_SYMBOL(clk_enable);
@@ -76,13 +82,48 @@ void clk_disable(struct clk *clk)
76 82
77 spin_lock_irqsave(&clocks_lock, flags); 83 spin_lock_irqsave(&clocks_lock, flags);
78 if (--clk->enabled == 0) 84 if (--clk->enabled == 0)
79 clk_gpio27_disable(); 85 clk->ops->disable(clk);
80 spin_unlock_irqrestore(&clocks_lock, flags); 86 spin_unlock_irqrestore(&clocks_lock, flags);
81} 87}
82EXPORT_SYMBOL(clk_disable); 88EXPORT_SYMBOL(clk_disable);
83 89
84unsigned long clk_get_rate(struct clk *clk) 90unsigned long clk_get_rate(struct clk *clk)
85{ 91{
86 return 3686400; 92 unsigned long rate;
93
94 rate = clk->rate;
95 if (clk->ops->getrate)
96 rate = clk->ops->getrate(clk);
97
98 return rate;
87} 99}
88EXPORT_SYMBOL(clk_get_rate); 100EXPORT_SYMBOL(clk_get_rate);
101
102const struct clkops clk_gpio27_ops = {
103 .enable = clk_gpio27_enable,
104 .disable = clk_gpio27_disable,
105};
106
107static void clk_dummy_enable(struct clk *clk) { }
108static void clk_dummy_disable(struct clk *clk) { }
109
110const struct clkops clk_dummy_ops = {
111 .enable = clk_dummy_enable,
112 .disable = clk_dummy_disable,
113};
114
115static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
116static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
117
118static struct clk_lookup sa11xx_clkregs[] = {
119 INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
120 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
121};
122
123static int __init sa11xx_clk_init(void)
124{
125 clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
126 return 0;
127}
128
129postcore_initcall(sa11xx_clk_init);
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index bb10ee2cb89f..480d2ea46b00 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -345,9 +345,29 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
345 sa11x0_register_device(&sa11x0ir_device, irda); 345 sa11x0_register_device(&sa11x0ir_device, irda);
346} 346}
347 347
348static struct resource sa11x0rtc_resources[] = {
349 [0] = {
350 .start = 0x90010000,
351 .end = 0x900100ff,
352 .flags = IORESOURCE_MEM,
353 },
354 [1] = {
355 .start = IRQ_RTC1Hz,
356 .end = IRQ_RTC1Hz,
357 .flags = IORESOURCE_IRQ,
358 },
359 [2] = {
360 .start = IRQ_RTCAlrm,
361 .end = IRQ_RTCAlrm,
362 .flags = IORESOURCE_IRQ,
363 },
364};
365
348static struct platform_device sa11x0rtc_device = { 366static struct platform_device sa11x0rtc_device = {
349 .name = "sa1100-rtc", 367 .name = "sa1100-rtc",
350 .id = -1, 368 .id = -1,
369 .resource = sa11x0rtc_resources,
370 .num_resources = ARRAY_SIZE(sa11x0rtc_resources),
351}; 371};
352 372
353static struct platform_device *sa11x0_devices[] __initdata = { 373static struct platform_device *sa11x0_devices[] __initdata = {
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 91aff7cb8284..373652d76b90 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -2,11 +2,8 @@ if ARCH_TEGRA
2 2
3comment "NVIDIA Tegra options" 3comment "NVIDIA Tegra options"
4 4
5choice
6 prompt "Select Tegra processor family for target system"
7
8config ARCH_TEGRA_2x_SOC 5config ARCH_TEGRA_2x_SOC
9 bool "Tegra 2 family" 6 bool "Enable support for Tegra20 family"
10 select CPU_V7 7 select CPU_V7
11 select ARM_GIC 8 select ARM_GIC
12 select ARCH_REQUIRE_GPIOLIB 9 select ARCH_REQUIRE_GPIOLIB
@@ -17,22 +14,36 @@ config ARCH_TEGRA_2x_SOC
17 Support for NVIDIA Tegra AP20 and T20 processors, based on the 14 Support for NVIDIA Tegra AP20 and T20 processors, based on the
18 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 15 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
19 16
20endchoice 17config ARCH_TEGRA_3x_SOC
18 bool "Enable support for Tegra30 family"
19 select CPU_V7
20 select ARM_GIC
21 select ARCH_REQUIRE_GPIOLIB
22 select USB_ARCH_HAS_EHCI if USB_SUPPORT
23 select USB_ULPI if USB_SUPPORT
24 select USB_ULPI_VIEWPORT if USB_SUPPORT
25 select USE_OF
26 help
27 Support for NVIDIA Tegra T30 processor family, based on the
28 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
21 29
22config TEGRA_PCI 30config TEGRA_PCI
23 bool "PCI Express support" 31 bool "PCI Express support"
32 depends on ARCH_TEGRA_2x_SOC
24 select PCI 33 select PCI
25 34
26comment "Tegra board type" 35comment "Tegra board type"
27 36
28config MACH_HARMONY 37config MACH_HARMONY
29 bool "Harmony board" 38 bool "Harmony board"
39 depends on ARCH_TEGRA_2x_SOC
30 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 40 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
31 help 41 help
32 Support for nVidia Harmony development platform 42 Support for nVidia Harmony development platform
33 43
34config MACH_KAEN 44config MACH_KAEN
35 bool "Kaen board" 45 bool "Kaen board"
46 depends on ARCH_TEGRA_2x_SOC
36 select MACH_SEABOARD 47 select MACH_SEABOARD
37 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 48 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
38 help 49 help
@@ -40,11 +51,13 @@ config MACH_KAEN
40 51
41config MACH_PAZ00 52config MACH_PAZ00
42 bool "Paz00 board" 53 bool "Paz00 board"
54 depends on ARCH_TEGRA_2x_SOC
43 help 55 help
44 Support for the Toshiba AC100/Dynabook AZ netbook 56 Support for the Toshiba AC100/Dynabook AZ netbook
45 57
46config MACH_SEABOARD 58config MACH_SEABOARD
47 bool "Seaboard board" 59 bool "Seaboard board"
60 depends on ARCH_TEGRA_2x_SOC
48 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC 61 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
49 help 62 help
50 Support for nVidia Seaboard development platform. It will 63 Support for nVidia Seaboard development platform. It will
@@ -52,25 +65,29 @@ config MACH_SEABOARD
52 have large similarities with the seaboard design. 65 have large similarities with the seaboard design.
53 66
54config MACH_TEGRA_DT 67config MACH_TEGRA_DT
55 bool "Generic Tegra board (FDT support)" 68 bool "Generic Tegra20 board (FDT support)"
69 depends on ARCH_TEGRA_2x_SOC
56 select USE_OF 70 select USE_OF
57 help 71 help
58 Support for generic nVidia Tegra boards using Flattened Device Tree 72 Support for generic NVIDIA Tegra20 boards using Flattened Device Tree
59 73
60config MACH_TRIMSLICE 74config MACH_TRIMSLICE
61 bool "TrimSlice board" 75 bool "TrimSlice board"
76 depends on ARCH_TEGRA_2x_SOC
62 select TEGRA_PCI 77 select TEGRA_PCI
63 help 78 help
64 Support for CompuLab TrimSlice platform 79 Support for CompuLab TrimSlice platform
65 80
66config MACH_WARIO 81config MACH_WARIO
67 bool "Wario board" 82 bool "Wario board"
83 depends on ARCH_TEGRA_2x_SOC
68 select MACH_SEABOARD 84 select MACH_SEABOARD
69 help 85 help
70 Support for the Wario version of Seaboard 86 Support for the Wario version of Seaboard
71 87
72config MACH_VENTANA 88config MACH_VENTANA
73 bool "Ventana board" 89 bool "Ventana board"
90 depends on ARCH_TEGRA_2x_SOC
74 select MACH_TEGRA_DT 91 select MACH_TEGRA_DT
75 help 92 help
76 Support for the nVidia Ventana development platform 93 Support for the nVidia Ventana development platform
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 91a07e187208..e120ff54f663 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,3 +1,4 @@
1obj-y += board-pinmux.o
1obj-y += common.o 2obj-y += common.o
2obj-y += devices.o 3obj-y += devices.o
3obj-y += io.o 4obj-y += io.o
@@ -5,12 +6,13 @@ obj-y += irq.o
5obj-y += clock.o 6obj-y += clock.o
6obj-y += timer.o 7obj-y += timer.o
7obj-y += pinmux.o 8obj-y += pinmux.o
8obj-y += powergate.o
9obj-y += fuse.o 9obj-y += fuse.o
10obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o 10obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o
11obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o 11obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o
12obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o 12obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
13obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o 13obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o
14obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o
15obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
14obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o 16obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o
15obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 17obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
16obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o 18obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o
@@ -18,20 +20,22 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
18obj-$(CONFIG_TEGRA_PCI) += pcie.o 20obj-$(CONFIG_TEGRA_PCI) += pcie.o
19obj-$(CONFIG_USB_SUPPORT) += usb_phy.o 21obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
20 22
21obj-${CONFIG_MACH_HARMONY} += board-harmony.o 23obj-$(CONFIG_MACH_HARMONY) += board-harmony.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 24obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o
23obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o 25obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o
24obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o 26obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o
25 27
26obj-${CONFIG_MACH_PAZ00} += board-paz00.o 28obj-$(CONFIG_MACH_PAZ00) += board-paz00.o
27obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o 29obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o
28 30
29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 31obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o
30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 32obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o
31 33
32obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o 34obj-$(CONFIG_MACH_TEGRA_DT) += board-dt-tegra20.o
33obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o 35obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o
34obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o 36obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o
37obj-$(CONFIG_MACH_TEGRA_DT) += board-paz00-pinmux.o
38obj-$(CONFIG_MACH_TEGRA_DT) += board-trimslice-pinmux.o
35 39
36obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 40obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o
37obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 41obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
index bd12c9fb81e8..9a82094092d7 100644
--- a/arch/arm/mach-tegra/Makefile.boot
+++ b/arch/arm/mach-tegra/Makefile.boot
@@ -3,5 +3,8 @@ params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
4 4
5dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb 5dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
6dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb
6dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb 7dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
8dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb
7dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb 9dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb
10dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index e417a8383dbb..7a95e0bc4aba 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -37,6 +37,7 @@
37#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
38#include <asm/mach/time.h> 38#include <asm/mach/time.h>
39#include <asm/setup.h> 39#include <asm/setup.h>
40#include <asm/hardware/gic.h>
40 41
41#include <mach/iomap.h> 42#include <mach/iomap.h>
42#include <mach/irqs.h> 43#include <mach/irqs.h>
@@ -47,10 +48,14 @@
47#include "devices.h" 48#include "devices.h"
48 49
49void harmony_pinmux_init(void); 50void harmony_pinmux_init(void);
51void paz00_pinmux_init(void);
50void seaboard_pinmux_init(void); 52void seaboard_pinmux_init(void);
53void trimslice_pinmux_init(void);
51void ventana_pinmux_init(void); 54void ventana_pinmux_init(void);
52 55
53struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { 56struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
57 OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
54 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), 59 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
55 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), 60 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), 61 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
@@ -58,16 +63,30 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
58 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), 63 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), 64 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
60 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), 65 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
61 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), 66 OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
62 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL), 67 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
63 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL), 68 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
64 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL), 69 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
70 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
71 &tegra_ehci1_device.dev.platform_data),
72 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
73 &tegra_ehci2_device.dev.platform_data),
74 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
75 &tegra_ehci3_device.dev.platform_data),
65 {} 76 {}
66}; 77};
67 78
68static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { 79static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
69 /* name parent rate enabled */ 80 /* name parent rate enabled */
70 { "uartd", "pll_p", 216000000, true }, 81 { "uartd", "pll_p", 216000000, true },
82 { "usbd", "clk_m", 12000000, false },
83 { "usb2", "clk_m", 12000000, false },
84 { "usb3", "clk_m", 12000000, false },
85 { "pll_a", "pll_p_out1", 56448000, true },
86 { "pll_a_out0", "pll_a", 11289600, true },
87 { "cdev1", NULL, 0, true },
88 { "i2s1", "pll_a_out0", 11289600, false},
89 { "i2s2", "pll_a_out0", 11289600, false},
71 { NULL, NULL, 0, 0}, 90 { NULL, NULL, 0, 0},
72}; 91};
73 92
@@ -76,39 +95,23 @@ static struct of_device_id tegra_dt_match_table[] __initdata = {
76 {} 95 {}
77}; 96};
78 97
79static struct of_device_id tegra_dt_gic_match[] __initdata = {
80 { .compatible = "nvidia,tegra20-gic", },
81 {}
82};
83
84static struct { 98static struct {
85 char *machine; 99 char *machine;
86 void (*init)(void); 100 void (*init)(void);
87} pinmux_configs[] = { 101} pinmux_configs[] = {
102 { "compulab,trimslice", trimslice_pinmux_init },
88 { "nvidia,harmony", harmony_pinmux_init }, 103 { "nvidia,harmony", harmony_pinmux_init },
104 { "compal,paz00", paz00_pinmux_init },
89 { "nvidia,seaboard", seaboard_pinmux_init }, 105 { "nvidia,seaboard", seaboard_pinmux_init },
90 { "nvidia,ventana", ventana_pinmux_init }, 106 { "nvidia,ventana", ventana_pinmux_init },
91}; 107};
92 108
93static void __init tegra_dt_init(void) 109static void __init tegra_dt_init(void)
94{ 110{
95 struct device_node *node;
96 int i; 111 int i;
97 112
98 node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
99 TEGRA_ARM_INT_DIST_BASE);
100 if (node)
101 irq_domain_add_simple(node, INT_GIC_BASE);
102
103 tegra_clk_init_from_table(tegra_dt_clk_init_table); 113 tegra_clk_init_from_table(tegra_dt_clk_init_table);
104 114
105 /*
106 * Finished with the static registrations now; fill in the missing
107 * devices
108 */
109 of_platform_populate(NULL, tegra_dt_match_table,
110 tegra20_auxdata_lookup, NULL);
111
112 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 115 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
113 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 116 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
114 pinmux_configs[i].init(); 117 pinmux_configs[i].init();
@@ -118,22 +121,31 @@ static void __init tegra_dt_init(void)
118 121
119 WARN(i == ARRAY_SIZE(pinmux_configs), 122 WARN(i == ARRAY_SIZE(pinmux_configs),
120 "Unknown platform! Pinmuxing not initialized\n"); 123 "Unknown platform! Pinmuxing not initialized\n");
124
125 /*
126 * Finished with the static registrations now; fill in the missing
127 * devices
128 */
129 of_platform_populate(NULL, tegra_dt_match_table,
130 tegra20_auxdata_lookup, NULL);
121} 131}
122 132
123static const char * tegra_dt_board_compat[] = { 133static const char *tegra20_dt_board_compat[] = {
134 "compulab,trimslice",
124 "nvidia,harmony", 135 "nvidia,harmony",
136 "compal,paz00",
125 "nvidia,seaboard", 137 "nvidia,seaboard",
126 "nvidia,ventana", 138 "nvidia,ventana",
127 NULL 139 NULL
128}; 140};
129 141
130DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)") 142DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
131 .map_io = tegra_map_common_io, 143 .map_io = tegra_map_common_io,
132 .init_early = tegra_init_early, 144 .init_early = tegra20_init_early,
133 .init_irq = tegra_init_irq, 145 .init_irq = tegra_dt_init_irq,
134 .handle_irq = gic_handle_irq, 146 .handle_irq = gic_handle_irq,
135 .timer = &tegra_timer, 147 .timer = &tegra_timer,
136 .init_machine = tegra_dt_init, 148 .init_machine = tegra_dt_init,
137 .restart = tegra_assert_system_reset, 149 .restart = tegra_assert_system_reset,
138 .dt_compat = tegra_dt_board_compat, 150 .dt_compat = tegra20_dt_board_compat,
139MACHINE_END 151MACHINE_END
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
new file mode 100644
index 000000000000..3c197e2440b7
--- /dev/null
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -0,0 +1,63 @@
1/*
2 * arch/arm/mach-tegra/board-dt-tegra30.c
3 *
4 * NVIDIA Tegra30 device tree board support
5 *
6 * Copyright (C) 2011 NVIDIA Corporation
7 *
8 * Derived from:
9 *
10 * arch/arm/mach-tegra/board-dt-tegra20.c
11 *
12 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
13 * Copyright (C) 2010 Google, Inc.
14 *
15 * This software is licensed under the terms of the GNU General Public
16 * License version 2, as published by the Free Software Foundation, and
17 * may be copied, distributed, and modified under those terms.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/of.h>
28#include <linux/of_address.h>
29#include <linux/of_fdt.h>
30#include <linux/of_irq.h>
31#include <linux/of_platform.h>
32
33#include <asm/mach/arch.h>
34#include <asm/hardware/gic.h>
35
36#include "board.h"
37
38static struct of_device_id tegra_dt_match_table[] __initdata = {
39 { .compatible = "simple-bus", },
40 {}
41};
42
43static void __init tegra30_dt_init(void)
44{
45 of_platform_populate(NULL, tegra_dt_match_table,
46 NULL, NULL);
47}
48
49static const char *tegra30_dt_board_compat[] = {
50 "nvidia,cardhu",
51 NULL
52};
53
54DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
55 .map_io = tegra_map_common_io,
56 .init_early = tegra30_init_early,
57 .init_irq = tegra_dt_init_irq,
58 .handle_irq = gic_handle_irq,
59 .timer = &tegra_timer,
60 .init_machine = tegra30_dt_init,
61 .restart = tegra_assert_system_reset,
62 .dt_compat = tegra30_dt_board_compat,
63MACHINE_END
diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c
index 6db7d699ef1c..33c4fedab840 100644
--- a/arch/arm/mach-tegra/board-harmony-pcie.c
+++ b/arch/arm/mach-tegra/board-harmony-pcie.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <mach/pinmux.h>
26#include "board.h" 25#include "board.h"
27#include "board-harmony.h" 26#include "board-harmony.h"
28 27
@@ -48,10 +47,6 @@ static int __init harmony_pcie_init(void)
48 47
49 regulator_enable(regulator); 48 regulator_enable(regulator);
50 49
51 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
52 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
53 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL);
54
55 err = tegra_pcie_init(true, true); 50 err = tegra_pcie_init(true, true);
56 if (err) 51 if (err)
57 goto err_pcie; 52 goto err_pcie;
@@ -59,10 +54,6 @@ static int __init harmony_pcie_init(void)
59 return 0; 54 return 0;
60 55
61err_pcie: 56err_pcie:
62 tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_TRISTATE);
63 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
64 tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
65
66 regulator_disable(regulator); 57 regulator_disable(regulator);
67 regulator_put(regulator); 58 regulator_put(regulator);
68err_reg: 59err_reg:
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c
index 7a4a26d5174c..465808c8ac0b 100644
--- a/arch/arm/mach-tegra/board-harmony-pinmux.c
+++ b/arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -19,10 +19,11 @@
19#include <linux/of.h> 19#include <linux/of.h>
20 20
21#include <mach/pinmux.h> 21#include <mach/pinmux.h>
22#include <mach/pinmux-tegra20.h>
22 23
23#include "gpio-names.h" 24#include "gpio-names.h"
24#include "board-harmony.h" 25#include "board-harmony.h"
25#include "devices.h" 26#include "board-pinmux.h"
26 27
27static struct tegra_pingroup_config harmony_pinmux[] = { 28static struct tegra_pingroup_config harmony_pinmux[] = {
28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -143,11 +144,6 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
144}; 145};
145 146
146static struct platform_device *pinmux_devices[] = {
147 &tegra_gpio_device,
148 &tegra_pinmux_device,
149};
150
151static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
152 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
153 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 149 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
@@ -161,13 +157,14 @@ static struct tegra_gpio_table gpio_table[] = {
161 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true }, 157 { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
162}; 158};
163 159
160static struct tegra_board_pinmux_conf conf = {
161 .pgs = harmony_pinmux,
162 .pg_count = ARRAY_SIZE(harmony_pinmux),
163 .gpios = gpio_table,
164 .gpio_count = ARRAY_SIZE(gpio_table),
165};
166
164void harmony_pinmux_init(void) 167void harmony_pinmux_init(void)
165{ 168{
166 if (!of_machine_is_compatible("nvidia,tegra20")) 169 tegra_board_pinmux_init(&conf, NULL);
167 platform_add_devices(pinmux_devices,
168 ARRAY_SIZE(pinmux_devices));
169
170 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
171
172 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
173} 170}
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 70ee674131f9..a0f9634f6727 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -186,7 +186,7 @@ MACHINE_START(HARMONY, "harmony")
186 .atag_offset = 0x100, 186 .atag_offset = 0x100,
187 .fixup = tegra_harmony_fixup, 187 .fixup = tegra_harmony_fixup,
188 .map_io = tegra_map_common_io, 188 .map_io = tegra_map_common_io,
189 .init_early = tegra_init_early, 189 .init_early = tegra20_init_early,
190 .init_irq = tegra_init_irq, 190 .init_irq = tegra_init_irq,
191 .handle_irq = gic_handle_irq, 191 .handle_irq = gic_handle_irq,
192 .timer = &tegra_timer, 192 .timer = &tegra_timer,
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index be30e215f4b7..c775572dcea4 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -19,10 +19,11 @@
19#include <linux/of.h> 19#include <linux/of.h>
20 20
21#include <mach/pinmux.h> 21#include <mach/pinmux.h>
22#include <mach/pinmux-tegra20.h>
22 23
23#include "gpio-names.h" 24#include "gpio-names.h"
24#include "board-paz00.h" 25#include "board-paz00.h"
25#include "devices.h" 26#include "board-pinmux.h"
26 27
27static struct tegra_pingroup_config paz00_pinmux[] = { 28static struct tegra_pingroup_config paz00_pinmux[] = {
28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -30,7 +31,7 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
30 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 32 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
32 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 33 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
33 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 34 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
34 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 35 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
35 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 36 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
36 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
@@ -143,11 +144,6 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
144}; 145};
145 146
146static struct platform_device *pinmux_devices[] = {
147 &tegra_gpio_device,
148 &tegra_pinmux_device,
149};
150
151static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
152 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, 148 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
153 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, 149 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
@@ -158,13 +154,14 @@ static struct tegra_gpio_table gpio_table[] = {
158 { .gpio = TEGRA_WIFI_LED, .enable = true }, 154 { .gpio = TEGRA_WIFI_LED, .enable = true },
159}; 155};
160 156
157static struct tegra_board_pinmux_conf conf = {
158 .pgs = paz00_pinmux,
159 .pg_count = ARRAY_SIZE(paz00_pinmux),
160 .gpios = gpio_table,
161 .gpio_count = ARRAY_SIZE(gpio_table),
162};
163
161void paz00_pinmux_init(void) 164void paz00_pinmux_init(void)
162{ 165{
163 if (!of_machine_is_compatible("nvidia,tegra20")) 166 tegra_board_pinmux_init(&conf, NULL);
164 platform_add_devices(pinmux_devices,
165 ARRAY_SIZE(pinmux_devices));
166
167 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
168
169 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
170} 167}
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 33d6205ad307..fcf4f377b1dc 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -23,8 +23,10 @@
23#include <linux/serial_8250.h> 23#include <linux/serial_8250.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/gpio_keys.h>
26#include <linux/pda_power.h> 27#include <linux/pda_power.h>
27#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/input.h>
28#include <linux/i2c.h> 30#include <linux/i2c.h>
29#include <linux/gpio.h> 31#include <linux/gpio.h>
30#include <linux/rfkill-gpio.h> 32#include <linux/rfkill-gpio.h>
@@ -115,12 +117,37 @@ static struct platform_device leds_gpio = {
115 }, 117 },
116}; 118};
117 119
120static struct gpio_keys_button paz00_gpio_keys_buttons[] = {
121 {
122 .code = KEY_POWER,
123 .gpio = TEGRA_GPIO_POWERKEY,
124 .active_low = 1,
125 .desc = "Power",
126 .type = EV_KEY,
127 .wakeup = 1,
128 },
129};
130
131static struct gpio_keys_platform_data paz00_gpio_keys = {
132 .buttons = paz00_gpio_keys_buttons,
133 .nbuttons = ARRAY_SIZE(paz00_gpio_keys_buttons),
134};
135
136static struct platform_device gpio_keys_device = {
137 .name = "gpio-keys",
138 .id = -1,
139 .dev = {
140 .platform_data = &paz00_gpio_keys,
141 },
142};
143
118static struct platform_device *paz00_devices[] __initdata = { 144static struct platform_device *paz00_devices[] __initdata = {
119 &debug_uart, 145 &debug_uart,
120 &tegra_sdhci_device4, 146 &tegra_sdhci_device4,
121 &tegra_sdhci_device1, 147 &tegra_sdhci_device1,
122 &wifi_rfkill_device, 148 &wifi_rfkill_device,
123 &leds_gpio, 149 &leds_gpio,
150 &gpio_keys_device,
124}; 151};
125 152
126static void paz00_i2c_init(void) 153static void paz00_i2c_init(void)
@@ -189,7 +216,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
189 .atag_offset = 0x100, 216 .atag_offset = 0x100,
190 .fixup = tegra_paz00_fixup, 217 .fixup = tegra_paz00_fixup,
191 .map_io = tegra_map_common_io, 218 .map_io = tegra_map_common_io,
192 .init_early = tegra_init_early, 219 .init_early = tegra20_init_early,
193 .init_irq = tegra_init_irq, 220 .init_irq = tegra_init_irq,
194 .handle_irq = gic_handle_irq, 221 .handle_irq = gic_handle_irq,
195 .timer = &tegra_timer, 222 .timer = &tegra_timer,
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index 8aff06eb58c3..ffa83f580db6 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -32,6 +32,9 @@
32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1 32#define TEGRA_WIFI_RST TEGRA_GPIO_PD1
33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0 33#define TEGRA_WIFI_LED TEGRA_GPIO_PD0
34 34
35/* WakeUp */
36#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PJ7
37
35void paz00_pinmux_init(void); 38void paz00_pinmux_init(void);
36 39
37#endif 40#endif
diff --git a/arch/arm/mach-tegra/board-pinmux.c b/arch/arm/mach-tegra/board-pinmux.c
new file mode 100644
index 000000000000..adc3efe979b3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.c
@@ -0,0 +1,104 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#include <linux/device.h>
16#include <linux/kernel.h>
17#include <linux/notifier.h>
18#include <linux/of.h>
19#include <linux/string.h>
20
21#include <mach/gpio-tegra.h>
22#include <mach/pinmux.h>
23
24#include "board-pinmux.h"
25#include "devices.h"
26
27struct tegra_board_pinmux_conf *confs[2];
28
29static void tegra_board_pinmux_setup_gpios(void)
30{
31 int i;
32
33 for (i = 0; i < ARRAY_SIZE(confs); i++) {
34 if (!confs[i])
35 continue;
36
37 tegra_gpio_config(confs[i]->gpios, confs[i]->gpio_count);
38 }
39}
40
41static void tegra_board_pinmux_setup_pinmux(void)
42{
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(confs); i++) {
46 if (!confs[i])
47 continue;
48
49 tegra_pinmux_config_table(confs[i]->pgs, confs[i]->pg_count);
50
51 if (confs[i]->drives)
52 tegra_drive_pinmux_config_table(confs[i]->drives,
53 confs[i]->drive_count);
54 }
55}
56
57static int tegra_board_pinmux_bus_notify(struct notifier_block *nb,
58 unsigned long event, void *vdev)
59{
60 static bool had_gpio;
61 static bool had_pinmux;
62
63 struct device *dev = vdev;
64 const char *devname;
65
66 if (event != BUS_NOTIFY_BOUND_DRIVER)
67 return NOTIFY_DONE;
68
69 devname = dev_name(dev);
70
71 if (!had_gpio && !strcmp(devname, GPIO_DEV)) {
72 tegra_board_pinmux_setup_gpios();
73 had_gpio = true;
74 } else if (!had_pinmux && !strcmp(devname, PINMUX_DEV)) {
75 tegra_board_pinmux_setup_pinmux();
76 had_pinmux = true;
77 }
78
79 if (had_gpio && had_pinmux)
80 return NOTIFY_STOP_MASK;
81 else
82 return NOTIFY_DONE;
83}
84
85static struct notifier_block nb = {
86 .notifier_call = tegra_board_pinmux_bus_notify,
87};
88
89static struct platform_device *devices[] = {
90 &tegra_gpio_device,
91 &tegra_pinmux_device,
92};
93
94void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
95 struct tegra_board_pinmux_conf *conf_b)
96{
97 confs[0] = conf_a;
98 confs[1] = conf_b;
99
100 bus_register_notifier(&platform_bus_type, &nb);
101
102 if (!of_machine_is_compatible("nvidia,tegra20"))
103 platform_add_devices(devices, ARRAY_SIZE(devices));
104}
diff --git a/arch/arm/mach-tegra/board-pinmux.h b/arch/arm/mach-tegra/board-pinmux.h
new file mode 100644
index 000000000000..4aac73546f54
--- /dev/null
+++ b/arch/arm/mach-tegra/board-pinmux.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#ifndef __MACH_TEGRA_BOARD_PINMUX_H
16#define __MACH_TEGRA_BOARD_PINMUX_H
17
18#define GPIO_DEV "tegra-gpio"
19#define PINMUX_DEV "tegra-pinmux"
20
21struct tegra_pingroup_config;
22struct tegra_gpio_table;
23
24struct tegra_board_pinmux_conf {
25 struct tegra_pingroup_config *pgs;
26 int pg_count;
27
28 struct tegra_drive_pingroup_config *drives;
29 int drive_count;
30
31 struct tegra_gpio_table *gpios;
32 int gpio_count;
33};
34
35void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,
36 struct tegra_board_pinmux_conf *conf_b);
37
38#endif
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
index b1c2972f62fe..55e7e43a14ad 100644
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -19,11 +19,11 @@
19#include <linux/of.h> 19#include <linux/of.h>
20 20
21#include <mach/pinmux.h> 21#include <mach/pinmux.h>
22#include <mach/pinmux-t2.h> 22#include <mach/pinmux-tegra20.h>
23 23
24#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
25#include "board-seaboard.h" 26#include "board-seaboard.h"
26#include "devices.h"
27 27
28#define DEFAULT_DRIVE(_name) \ 28#define DEFAULT_DRIVE(_name) \
29 { \ 29 { \
@@ -37,11 +37,11 @@
37 .slew_falling = TEGRA_SLEW_SLOWEST, \ 37 .slew_falling = TEGRA_SLEW_SLOWEST, \
38 } 38 }
39 39
40static __initdata struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = { 40static struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {
41 DEFAULT_DRIVE(SDIO1), 41 DEFAULT_DRIVE(SDIO1),
42}; 42};
43 43
44static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { 44static struct tegra_pingroup_config common_pinmux[] = {
45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 45 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 46 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 47 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -55,7 +55,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 55 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 56 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 57 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
58 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
59 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 58 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
60 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 59 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
61 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, 60 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
@@ -65,7 +64,6 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
65 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 64 {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
66 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 65 {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
67 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 66 {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
68 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
69 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 67 {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
70 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 68 {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
71 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 69 {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -108,13 +106,8 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
108 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
109 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_LM1, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
110 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 108 {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
112 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
114 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
118 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 111 {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
119 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
120 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 113 {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -122,25 +115,19 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
122 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 115 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
123 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 116 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 117 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
125 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
126 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 118 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
127 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 119 {TEGRA_PINGROUP_SDB, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 120 {TEGRA_PINGROUP_SDC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
129 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 121 {TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
130 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 122 {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
131 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 123 {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
132 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
133 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 124 {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 125 {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 126 {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
138 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 127 {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
139 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
140 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 128 {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
141 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 129 {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
142 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 130 {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
143 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
144 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 131 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
145 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 132 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
146 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 133 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -160,13 +147,24 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
160 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 147 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161}; 148};
162 149
163static __initdata struct tegra_pingroup_config ventana_pinmux[] = { 150static struct tegra_pingroup_config seaboard_pinmux[] = {
164 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 151 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
152 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
153 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
154 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
155 {TEGRA_PINGROUP_LSC1, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
156 {TEGRA_PINGROUP_LSCK, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
157 {TEGRA_PINGROUP_LSDA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
158 {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
159 {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
160 {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
161 {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
162 {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
163 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
164};
165
166static struct tegra_pingroup_config ventana_pinmux[] = {
165 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 167 {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
166 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
167 {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
168 {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
169 {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
170 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 168 {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
171 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 169 {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
172 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 170 {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -181,65 +179,59 @@ static __initdata struct tegra_pingroup_config ventana_pinmux[] = {
181 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 179 {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
182}; 180};
183 181
184static struct platform_device *pinmux_devices[] = {
185 &tegra_gpio_device,
186 &tegra_pinmux_device,
187};
188
189static struct tegra_gpio_table common_gpio_table[] = { 182static struct tegra_gpio_table common_gpio_table[] = {
190 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, 183 { .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
191 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, 184 { .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
192 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 185 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
186 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
187};
188
189static struct tegra_gpio_table seaboard_gpio_table[] = {
193 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 190 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
194 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 191 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
195 { .gpio = TEGRA_GPIO_HP_DET, .enable = true }, 192 { .gpio = TEGRA_GPIO_HP_DET, .enable = true },
196 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 193 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
197 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
198 { .gpio = TEGRA_GPIO_USB1, .enable = true }, 194 { .gpio = TEGRA_GPIO_USB1, .enable = true },
199}; 195};
200 196
201static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) 197static struct tegra_gpio_table ventana_gpio_table[] = {
202{ 198 /* hp_det */
203 int i, j; 199 { .gpio = TEGRA_GPIO_PW2, .enable = true },
204 struct tegra_pingroup_config *new_pingroup, *base_pingroup; 200 /* int_mic_en */
205 201 { .gpio = TEGRA_GPIO_PX0, .enable = true },
206 /* Update base seaboard pinmux table with secondary board 202 /* ext_mic_en */
207 * specific pinmux table table. 203 { .gpio = TEGRA_GPIO_PX1, .enable = true },
208 */ 204};
209 for (i = 0; i < size; i++) {
210 new_pingroup = &newtbl[i];
211 for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) {
212 base_pingroup = &seaboard_pinmux[j];
213 if (new_pingroup->pingroup == base_pingroup->pingroup) {
214 *base_pingroup = *new_pingroup;
215 break;
216 }
217 }
218 }
219}
220
221void __init seaboard_common_pinmux_init(void)
222{
223 if (!of_machine_is_compatible("nvidia,tegra20"))
224 platform_add_devices(pinmux_devices,
225 ARRAY_SIZE(pinmux_devices));
226 205
227 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 206static struct tegra_board_pinmux_conf common_conf = {
207 .pgs = common_pinmux,
208 .pg_count = ARRAY_SIZE(common_pinmux),
209 .gpios = common_gpio_table,
210 .gpio_count = ARRAY_SIZE(common_gpio_table),
211};
228 212
229 tegra_drive_pinmux_config_table(seaboard_drive_pinmux, 213static struct tegra_board_pinmux_conf seaboard_conf = {
230 ARRAY_SIZE(seaboard_drive_pinmux)); 214 .pgs = seaboard_pinmux,
215 .pg_count = ARRAY_SIZE(seaboard_pinmux),
216 .drives = seaboard_drive_pinmux,
217 .drive_count = ARRAY_SIZE(seaboard_drive_pinmux),
218 .gpios = seaboard_gpio_table,
219 .gpio_count = ARRAY_SIZE(seaboard_gpio_table),
220};
231 221
232 tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table)); 222static struct tegra_board_pinmux_conf ventana_conf = {
233} 223 .pgs = ventana_pinmux,
224 .pg_count = ARRAY_SIZE(ventana_pinmux),
225 .gpios = ventana_gpio_table,
226 .gpio_count = ARRAY_SIZE(ventana_gpio_table),
227};
234 228
235void __init seaboard_pinmux_init(void) 229void seaboard_pinmux_init(void)
236{ 230{
237 seaboard_common_pinmux_init(); 231 tegra_board_pinmux_init(&common_conf, &seaboard_conf);
238} 232}
239 233
240void __init ventana_pinmux_init(void) 234void ventana_pinmux_init(void)
241{ 235{
242 update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); 236 tegra_board_pinmux_init(&common_conf, &ventana_conf);
243 seaboard_common_pinmux_init();
244} 237}
245
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index c1599eb8e0cb..cfc74d46a09e 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -283,7 +283,7 @@ static void __init tegra_wario_init(void)
283MACHINE_START(SEABOARD, "seaboard") 283MACHINE_START(SEABOARD, "seaboard")
284 .atag_offset = 0x100, 284 .atag_offset = 0x100,
285 .map_io = tegra_map_common_io, 285 .map_io = tegra_map_common_io,
286 .init_early = tegra_init_early, 286 .init_early = tegra20_init_early,
287 .init_irq = tegra_init_irq, 287 .init_irq = tegra_init_irq,
288 .handle_irq = gic_handle_irq, 288 .handle_irq = gic_handle_irq,
289 .timer = &tegra_timer, 289 .timer = &tegra_timer,
@@ -294,7 +294,7 @@ MACHINE_END
294MACHINE_START(KAEN, "kaen") 294MACHINE_START(KAEN, "kaen")
295 .atag_offset = 0x100, 295 .atag_offset = 0x100,
296 .map_io = tegra_map_common_io, 296 .map_io = tegra_map_common_io,
297 .init_early = tegra_init_early, 297 .init_early = tegra20_init_early,
298 .init_irq = tegra_init_irq, 298 .init_irq = tegra_init_irq,
299 .handle_irq = gic_handle_irq, 299 .handle_irq = gic_handle_irq,
300 .timer = &tegra_timer, 300 .timer = &tegra_timer,
@@ -305,7 +305,7 @@ MACHINE_END
305MACHINE_START(WARIO, "wario") 305MACHINE_START(WARIO, "wario")
306 .atag_offset = 0x100, 306 .atag_offset = 0x100,
307 .map_io = tegra_map_common_io, 307 .map_io = tegra_map_common_io,
308 .init_early = tegra_init_early, 308 .init_early = tegra20_init_early,
309 .init_irq = tegra_init_irq, 309 .init_irq = tegra_init_irq,
310 .handle_irq = gic_handle_irq, 310 .handle_irq = gic_handle_irq,
311 .timer = &tegra_timer, 311 .timer = &tegra_timer,
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 7ab719d46da0..a21a2be57cb6 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -19,12 +19,13 @@
19#include <linux/of.h> 19#include <linux/of.h>
20 20
21#include <mach/pinmux.h> 21#include <mach/pinmux.h>
22#include <mach/pinmux-tegra20.h>
22 23
23#include "gpio-names.h" 24#include "gpio-names.h"
25#include "board-pinmux.h"
24#include "board-trimslice.h" 26#include "board-trimslice.h"
25#include "devices.h"
26 27
27static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { 28static struct tegra_pingroup_config trimslice_pinmux[] = {
28 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 29 {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
29 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 30 {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 31 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -105,7 +106,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
105 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 106 {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
106 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 107 {TEGRA_PINGROUP_OWC, TEGRA_MUX_RSVD2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
107 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 108 {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
108 {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 109 {TEGRA_PINGROUP_PTA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
109 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 110 {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
110 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 111 {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 112 {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
@@ -143,11 +144,6 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
143 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 144 {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
144}; 145};
145 146
146static struct platform_device *pinmux_devices[] = {
147 &tegra_gpio_device,
148 &tegra_pinmux_device,
149};
150
151static struct tegra_gpio_table gpio_table[] = { 147static struct tegra_gpio_table gpio_table[] = {
152 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ 148 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
153 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ 149 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
@@ -156,11 +152,14 @@ static struct tegra_gpio_table gpio_table[] = {
156 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */ 152 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
157}; 153};
158 154
159void __init trimslice_pinmux_init(void) 155static struct tegra_board_pinmux_conf conf = {
156 .pgs = trimslice_pinmux,
157 .pg_count = ARRAY_SIZE(trimslice_pinmux),
158 .gpios = gpio_table,
159 .gpio_count = ARRAY_SIZE(gpio_table),
160};
161
162void trimslice_pinmux_init(void)
160{ 163{
161 if (!of_machine_is_compatible("nvidia,tegra20")) 164 tegra_board_pinmux_init(&conf, NULL);
162 platform_add_devices(pinmux_devices,
163 ARRAY_SIZE(pinmux_devices));
164 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
165 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
166} 165}
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index c242314a1db5..cd52820a3e37 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -175,7 +175,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
175 .atag_offset = 0x100, 175 .atag_offset = 0x100,
176 .fixup = tegra_trimslice_fixup, 176 .fixup = tegra_trimslice_fixup,
177 .map_io = tegra_map_common_io, 177 .map_io = tegra_map_common_io,
178 .init_early = tegra_init_early, 178 .init_early = tegra20_init_early,
179 .init_irq = tegra_init_irq, 179 .init_irq = tegra_init_irq,
180 .handle_irq = gic_handle_irq, 180 .handle_irq = gic_handle_irq,
181 .timer = &tegra_timer, 181 .timer = &tegra_timer,
diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h
index 1d14df7eb7de..75d1543d77c0 100644
--- a/arch/arm/mach-tegra/board.h
+++ b/arch/arm/mach-tegra/board.h
@@ -25,10 +25,11 @@
25 25
26void tegra_assert_system_reset(char mode, const char *cmd); 26void tegra_assert_system_reset(char mode, const char *cmd);
27 27
28void __init tegra_init_early(void); 28void __init tegra20_init_early(void);
29void __init tegra30_init_early(void);
29void __init tegra_map_common_io(void); 30void __init tegra_map_common_io(void);
30void __init tegra_init_irq(void); 31void __init tegra_init_irq(void);
31void __init tegra_init_clock(void); 32void __init tegra_dt_init_irq(void);
32int __init tegra_pcie_init(bool init_port0, bool init_port1); 33int __init tegra_pcie_init(bool init_port0, bool init_port1);
33 34
34extern struct sys_timer tegra_timer; 35extern struct sys_timer tegra_timer;
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index f8d41ffc0ca9..8337068a4abe 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -387,35 +387,18 @@ EXPORT_SYMBOL(tegra_clk_init_from_table);
387 387
388void tegra_periph_reset_deassert(struct clk *c) 388void tegra_periph_reset_deassert(struct clk *c)
389{ 389{
390 tegra2_periph_reset_deassert(c); 390 BUG_ON(!c->ops->reset);
391 c->ops->reset(c, false);
391} 392}
392EXPORT_SYMBOL(tegra_periph_reset_deassert); 393EXPORT_SYMBOL(tegra_periph_reset_deassert);
393 394
394void tegra_periph_reset_assert(struct clk *c) 395void tegra_periph_reset_assert(struct clk *c)
395{ 396{
396 tegra2_periph_reset_assert(c); 397 BUG_ON(!c->ops->reset);
398 c->ops->reset(c, true);
397} 399}
398EXPORT_SYMBOL(tegra_periph_reset_assert); 400EXPORT_SYMBOL(tegra_periph_reset_assert);
399 401
400void __init tegra_init_clock(void)
401{
402 tegra2_init_clocks();
403}
404
405/*
406 * The SDMMC controllers have extra bits in the clock source register that
407 * adjust the delay between the clock and data to compenstate for delays
408 * on the PCB.
409 */
410void tegra_sdmmc_tap_delay(struct clk *c, int delay)
411{
412 unsigned long flags;
413
414 spin_lock_irqsave(&c->spinlock, flags);
415 tegra2_sdmmc_tap_delay(c, delay);
416 spin_unlock_irqrestore(&c->spinlock, flags);
417}
418
419#ifdef CONFIG_DEBUG_FS 402#ifdef CONFIG_DEBUG_FS
420 403
421static int __clk_lock_all_spinlocks(void) 404static int __clk_lock_all_spinlocks(void)
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 688316abc64e..5c44106616c5 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -146,15 +146,11 @@ struct tegra_clk_init_table {
146}; 146};
147 147
148void tegra2_init_clocks(void); 148void tegra2_init_clocks(void);
149void tegra2_periph_reset_deassert(struct clk *c);
150void tegra2_periph_reset_assert(struct clk *c);
151void clk_init(struct clk *clk); 149void clk_init(struct clk *clk);
152struct clk *tegra_get_clock_by_name(const char *name); 150struct clk *tegra_get_clock_by_name(const char *name);
153unsigned long clk_measure_input_freq(void);
154int clk_reparent(struct clk *c, struct clk *parent); 151int clk_reparent(struct clk *c, struct clk *parent);
155void tegra_clk_init_from_table(struct tegra_clk_init_table *table); 152void tegra_clk_init_from_table(struct tegra_clk_init_table *table);
156unsigned long clk_get_rate_locked(struct clk *c); 153unsigned long clk_get_rate_locked(struct clk *c);
157int clk_set_rate_locked(struct clk *c, unsigned long rate); 154int clk_set_rate_locked(struct clk *c, unsigned long rate);
158void tegra2_sdmmc_tap_delay(struct clk *c, int delay);
159 155
160#endif 156#endif
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 20f396d740fa..a2eb90169aed 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-tegra/board-harmony.c 2 * arch/arm/mach-tegra/common.c
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * 5 *
@@ -21,8 +21,10 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/of_irq.h>
24 25
25#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
27#include <asm/hardware/gic.h>
26 28
27#include <mach/iomap.h> 29#include <mach/iomap.h>
28#include <mach/system.h> 30#include <mach/system.h>
@@ -31,18 +33,31 @@
31#include "clock.h" 33#include "clock.h"
32#include "fuse.h" 34#include "fuse.h"
33 35
36#ifdef CONFIG_OF
37static const struct of_device_id tegra_dt_irq_match[] __initconst = {
38 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
39 { }
40};
41
42void __init tegra_dt_init_irq(void)
43{
44 tegra_init_irq();
45 of_irq_init(tegra_dt_irq_match);
46}
47#endif
48
34void tegra_assert_system_reset(char mode, const char *cmd) 49void tegra_assert_system_reset(char mode, const char *cmd)
35{ 50{
36 void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04); 51 void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
37 u32 reg; 52 u32 reg;
38 53
39 /* use *_related to avoid spinlock since caches are off */
40 reg = readl_relaxed(reset); 54 reg = readl_relaxed(reset);
41 reg |= 0x04; 55 reg |= 0x10;
42 writel_relaxed(reg, reset); 56 writel_relaxed(reg, reset);
43} 57}
44 58
45static __initdata struct tegra_clk_init_table common_clk_init_table[] = { 59#ifdef CONFIG_ARCH_TEGRA_2x_SOC
60static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
46 /* name parent rate enabled */ 61 /* name parent rate enabled */
47 { "clk_m", NULL, 0, true }, 62 { "clk_m", NULL, 0, true },
48 { "pll_p", "clk_m", 216000000, true }, 63 { "pll_p", "clk_m", 216000000, true },
@@ -58,24 +73,38 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
58 { "cpu", NULL, 0, true }, 73 { "cpu", NULL, 0, true },
59 { NULL, NULL, 0, 0}, 74 { NULL, NULL, 0, 0},
60}; 75};
76#endif
61 77
62static void __init tegra_init_cache(void) 78static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
63{ 79{
64#ifdef CONFIG_CACHE_L2X0 80#ifdef CONFIG_CACHE_L2X0
65 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; 81 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
82 u32 aux_ctrl, cache_type;
83
84 writel_relaxed(tag_latency, p + L2X0_TAG_LATENCY_CTRL);
85 writel_relaxed(data_latency, p + L2X0_DATA_LATENCY_CTRL);
66 86
67 writel_relaxed(0x331, p + L2X0_TAG_LATENCY_CTRL); 87 cache_type = readl(p + L2X0_CACHE_TYPE);
68 writel_relaxed(0x441, p + L2X0_DATA_LATENCY_CTRL); 88 aux_ctrl = (cache_type & 0x700) << (17-8);
89 aux_ctrl |= 0x6C000001;
69 90
70 l2x0_init(p, 0x6C080001, 0x8200c3fe); 91 l2x0_init(p, aux_ctrl, 0x8200c3fe);
71#endif 92#endif
72 93
73} 94}
74 95
75void __init tegra_init_early(void) 96#ifdef CONFIG_ARCH_TEGRA_2x_SOC
97void __init tegra20_init_early(void)
76{ 98{
77 tegra_init_fuse(); 99 tegra_init_fuse();
78 tegra_init_clock(); 100 tegra2_init_clocks();
79 tegra_clk_init_from_table(common_clk_init_table); 101 tegra_clk_init_from_table(tegra20_clk_init_table);
80 tegra_init_cache(); 102 tegra_init_cache(0x331, 0x441);
103}
104#endif
105#ifdef CONFIG_ARCH_TEGRA_3x_SOC
106void __init tegra30_init_early(void)
107{
108 tegra_init_cache(0x441, 0x551);
81} 109}
110#endif
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h
index c8baf8f80d23..fc3ecb66de08 100644
--- a/arch/arm/mach-tegra/include/mach/clk.h
+++ b/arch/arm/mach-tegra/include/mach/clk.h
@@ -26,6 +26,6 @@ void tegra_periph_reset_deassert(struct clk *c);
26void tegra_periph_reset_assert(struct clk *c); 26void tegra_periph_reset_assert(struct clk *c);
27 27
28unsigned long clk_get_rate_all_locked(struct clk *c); 28unsigned long clk_get_rate_all_locked(struct clk *c);
29void tegra_sdmmc_tap_delay(struct clk *c, int delay); 29void tegra2_sdmmc_tap_delay(struct clk *c, int delay);
30 30
31#endif 31#endif
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index ac11262149c7..e577cfe27e72 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -18,21 +18,3 @@
18 18
19 .macro arch_ret_to_user, tmp1, tmp2 19 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 20 .endm
21
22#if !defined(CONFIG_ARM_GIC)
23 /* legacy interrupt controller for AP16 */
24
25 .macro get_irqnr_preamble, base, tmp
26 @ enable imprecise aborts
27 cpsie a
28 @ EVP base at 0xf010f000
29 mov \base, #0xf0000000
30 orr \base, #0x00100000
31 orr \base, #0x0000f000
32 .endm
33
34 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
35 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
36 cmp \irqnr, #0x80
37 .endm
38#endif
diff --git a/arch/arm/mach-tegra/include/mach/irqs.h b/arch/arm/mach-tegra/include/mach/irqs.h
index 73265af4dda3..a2146cd6867d 100644
--- a/arch/arm/mach-tegra/include/mach/irqs.h
+++ b/arch/arm/mach-tegra/include/mach/irqs.h
@@ -25,7 +25,6 @@
25 25
26#define IRQ_LOCALTIMER 29 26#define IRQ_LOCALTIMER 29
27 27
28#ifdef CONFIG_ARCH_TEGRA_2x_SOC
29/* Primary Interrupt Controller */ 28/* Primary Interrupt Controller */
30#define INT_PRI_BASE (INT_GIC_BASE + 32) 29#define INT_PRI_BASE (INT_GIC_BASE + 32)
31#define INT_TMR1 (INT_PRI_BASE + 0) 30#define INT_TMR1 (INT_PRI_BASE + 0)
@@ -178,6 +177,5 @@
178#define NR_BOARD_IRQS 32 177#define NR_BOARD_IRQS 32
179 178
180#define NR_IRQS (INT_BOARD_BASE + NR_BOARD_IRQS) 179#define NR_IRQS (INT_BOARD_BASE + NR_BOARD_IRQS)
181#endif
182 180
183#endif 181#endif
diff --git a/arch/arm/mach-tegra/include/mach/pinmux-t2.h b/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h
index 4c2626347263..6a40c1dbab17 100644
--- a/arch/arm/mach-tegra/include/mach/pinmux-t2.h
+++ b/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-tegra/include/mach/pinmux-t2.h 2 * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * 5 *
@@ -14,8 +14,8 @@
14 * 14 *
15 */ 15 */
16 16
17#ifndef __MACH_TEGRA_PINMUX_T2_H 17#ifndef __MACH_TEGRA_PINMUX_TEGRA20_H
18#define __MACH_TEGRA_PINMUX_T2_H 18#define __MACH_TEGRA_PINMUX_TEGRA20_H
19 19
20enum tegra_pingroup { 20enum tegra_pingroup {
21 TEGRA_PINGROUP_ATA = 0, 21 TEGRA_PINGROUP_ATA = 0,
diff --git a/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h b/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h
new file mode 100644
index 000000000000..c1aee3eb2df1
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h
@@ -0,0 +1,320 @@
1/*
2 * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2010,2011 Nvidia, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#ifndef __MACH_TEGRA_PINMUX_TEGRA30_H
19#define __MACH_TEGRA_PINMUX_TEGRA30_H
20
21enum tegra_pingroup {
22 TEGRA_PINGROUP_ULPI_DATA0 = 0,
23 TEGRA_PINGROUP_ULPI_DATA1,
24 TEGRA_PINGROUP_ULPI_DATA2,
25 TEGRA_PINGROUP_ULPI_DATA3,
26 TEGRA_PINGROUP_ULPI_DATA4,
27 TEGRA_PINGROUP_ULPI_DATA5,
28 TEGRA_PINGROUP_ULPI_DATA6,
29 TEGRA_PINGROUP_ULPI_DATA7,
30 TEGRA_PINGROUP_ULPI_CLK,
31 TEGRA_PINGROUP_ULPI_DIR,
32 TEGRA_PINGROUP_ULPI_NXT,
33 TEGRA_PINGROUP_ULPI_STP,
34 TEGRA_PINGROUP_DAP3_FS,
35 TEGRA_PINGROUP_DAP3_DIN,
36 TEGRA_PINGROUP_DAP3_DOUT,
37 TEGRA_PINGROUP_DAP3_SCLK,
38 TEGRA_PINGROUP_GPIO_PV0,
39 TEGRA_PINGROUP_GPIO_PV1,
40 TEGRA_PINGROUP_SDMMC1_CLK,
41 TEGRA_PINGROUP_SDMMC1_CMD,
42 TEGRA_PINGROUP_SDMMC1_DAT3,
43 TEGRA_PINGROUP_SDMMC1_DAT2,
44 TEGRA_PINGROUP_SDMMC1_DAT1,
45 TEGRA_PINGROUP_SDMMC1_DAT0,
46 TEGRA_PINGROUP_GPIO_PV2,
47 TEGRA_PINGROUP_GPIO_PV3,
48 TEGRA_PINGROUP_CLK2_OUT,
49 TEGRA_PINGROUP_CLK2_REQ,
50 TEGRA_PINGROUP_LCD_PWR1,
51 TEGRA_PINGROUP_LCD_PWR2,
52 TEGRA_PINGROUP_LCD_SDIN,
53 TEGRA_PINGROUP_LCD_SDOUT,
54 TEGRA_PINGROUP_LCD_WR_N,
55 TEGRA_PINGROUP_LCD_CS0_N,
56 TEGRA_PINGROUP_LCD_DC0,
57 TEGRA_PINGROUP_LCD_SCK,
58 TEGRA_PINGROUP_LCD_PWR0,
59 TEGRA_PINGROUP_LCD_PCLK,
60 TEGRA_PINGROUP_LCD_DE,
61 TEGRA_PINGROUP_LCD_HSYNC,
62 TEGRA_PINGROUP_LCD_VSYNC,
63 TEGRA_PINGROUP_LCD_D0,
64 TEGRA_PINGROUP_LCD_D1,
65 TEGRA_PINGROUP_LCD_D2,
66 TEGRA_PINGROUP_LCD_D3,
67 TEGRA_PINGROUP_LCD_D4,
68 TEGRA_PINGROUP_LCD_D5,
69 TEGRA_PINGROUP_LCD_D6,
70 TEGRA_PINGROUP_LCD_D7,
71 TEGRA_PINGROUP_LCD_D8,
72 TEGRA_PINGROUP_LCD_D9,
73 TEGRA_PINGROUP_LCD_D10,
74 TEGRA_PINGROUP_LCD_D11,
75 TEGRA_PINGROUP_LCD_D12,
76 TEGRA_PINGROUP_LCD_D13,
77 TEGRA_PINGROUP_LCD_D14,
78 TEGRA_PINGROUP_LCD_D15,
79 TEGRA_PINGROUP_LCD_D16,
80 TEGRA_PINGROUP_LCD_D17,
81 TEGRA_PINGROUP_LCD_D18,
82 TEGRA_PINGROUP_LCD_D19,
83 TEGRA_PINGROUP_LCD_D20,
84 TEGRA_PINGROUP_LCD_D21,
85 TEGRA_PINGROUP_LCD_D22,
86 TEGRA_PINGROUP_LCD_D23,
87 TEGRA_PINGROUP_LCD_CS1_N,
88 TEGRA_PINGROUP_LCD_M1,
89 TEGRA_PINGROUP_LCD_DC1,
90 TEGRA_PINGROUP_HDMI_INT,
91 TEGRA_PINGROUP_DDC_SCL,
92 TEGRA_PINGROUP_DDC_SDA,
93 TEGRA_PINGROUP_CRT_HSYNC,
94 TEGRA_PINGROUP_CRT_VSYNC,
95 TEGRA_PINGROUP_VI_D0,
96 TEGRA_PINGROUP_VI_D1,
97 TEGRA_PINGROUP_VI_D2,
98 TEGRA_PINGROUP_VI_D3,
99 TEGRA_PINGROUP_VI_D4,
100 TEGRA_PINGROUP_VI_D5,
101 TEGRA_PINGROUP_VI_D6,
102 TEGRA_PINGROUP_VI_D7,
103 TEGRA_PINGROUP_VI_D8,
104 TEGRA_PINGROUP_VI_D9,
105 TEGRA_PINGROUP_VI_D10,
106 TEGRA_PINGROUP_VI_D11,
107 TEGRA_PINGROUP_VI_PCLK,
108 TEGRA_PINGROUP_VI_MCLK,
109 TEGRA_PINGROUP_VI_VSYNC,
110 TEGRA_PINGROUP_VI_HSYNC,
111 TEGRA_PINGROUP_UART2_RXD,
112 TEGRA_PINGROUP_UART2_TXD,
113 TEGRA_PINGROUP_UART2_RTS_N,
114 TEGRA_PINGROUP_UART2_CTS_N,
115 TEGRA_PINGROUP_UART3_TXD,
116 TEGRA_PINGROUP_UART3_RXD,
117 TEGRA_PINGROUP_UART3_CTS_N,
118 TEGRA_PINGROUP_UART3_RTS_N,
119 TEGRA_PINGROUP_GPIO_PU0,
120 TEGRA_PINGROUP_GPIO_PU1,
121 TEGRA_PINGROUP_GPIO_PU2,
122 TEGRA_PINGROUP_GPIO_PU3,
123 TEGRA_PINGROUP_GPIO_PU4,
124 TEGRA_PINGROUP_GPIO_PU5,
125 TEGRA_PINGROUP_GPIO_PU6,
126 TEGRA_PINGROUP_GEN1_I2C_SDA,
127 TEGRA_PINGROUP_GEN1_I2C_SCL,
128 TEGRA_PINGROUP_DAP4_FS,
129 TEGRA_PINGROUP_DAP4_DIN,
130 TEGRA_PINGROUP_DAP4_DOUT,
131 TEGRA_PINGROUP_DAP4_SCLK,
132 TEGRA_PINGROUP_CLK3_OUT,
133 TEGRA_PINGROUP_CLK3_REQ,
134 TEGRA_PINGROUP_GMI_WP_N,
135 TEGRA_PINGROUP_GMI_IORDY,
136 TEGRA_PINGROUP_GMI_WAIT,
137 TEGRA_PINGROUP_GMI_ADV_N,
138 TEGRA_PINGROUP_GMI_CLK,
139 TEGRA_PINGROUP_GMI_CS0_N,
140 TEGRA_PINGROUP_GMI_CS1_N,
141 TEGRA_PINGROUP_GMI_CS2_N,
142 TEGRA_PINGROUP_GMI_CS3_N,
143 TEGRA_PINGROUP_GMI_CS4_N,
144 TEGRA_PINGROUP_GMI_CS6_N,
145 TEGRA_PINGROUP_GMI_CS7_N,
146 TEGRA_PINGROUP_GMI_AD0,
147 TEGRA_PINGROUP_GMI_AD1,
148 TEGRA_PINGROUP_GMI_AD2,
149 TEGRA_PINGROUP_GMI_AD3,
150 TEGRA_PINGROUP_GMI_AD4,
151 TEGRA_PINGROUP_GMI_AD5,
152 TEGRA_PINGROUP_GMI_AD6,
153 TEGRA_PINGROUP_GMI_AD7,
154 TEGRA_PINGROUP_GMI_AD8,
155 TEGRA_PINGROUP_GMI_AD9,
156 TEGRA_PINGROUP_GMI_AD10,
157 TEGRA_PINGROUP_GMI_AD11,
158 TEGRA_PINGROUP_GMI_AD12,
159 TEGRA_PINGROUP_GMI_AD13,
160 TEGRA_PINGROUP_GMI_AD14,
161 TEGRA_PINGROUP_GMI_AD15,
162 TEGRA_PINGROUP_GMI_A16,
163 TEGRA_PINGROUP_GMI_A17,
164 TEGRA_PINGROUP_GMI_A18,
165 TEGRA_PINGROUP_GMI_A19,
166 TEGRA_PINGROUP_GMI_WR_N,
167 TEGRA_PINGROUP_GMI_OE_N,
168 TEGRA_PINGROUP_GMI_DQS,
169 TEGRA_PINGROUP_GMI_RST_N,
170 TEGRA_PINGROUP_GEN2_I2C_SCL,
171 TEGRA_PINGROUP_GEN2_I2C_SDA,
172 TEGRA_PINGROUP_SDMMC4_CLK,
173 TEGRA_PINGROUP_SDMMC4_CMD,
174 TEGRA_PINGROUP_SDMMC4_DAT0,
175 TEGRA_PINGROUP_SDMMC4_DAT1,
176 TEGRA_PINGROUP_SDMMC4_DAT2,
177 TEGRA_PINGROUP_SDMMC4_DAT3,
178 TEGRA_PINGROUP_SDMMC4_DAT4,
179 TEGRA_PINGROUP_SDMMC4_DAT5,
180 TEGRA_PINGROUP_SDMMC4_DAT6,
181 TEGRA_PINGROUP_SDMMC4_DAT7,
182 TEGRA_PINGROUP_SDMMC4_RST_N,
183 TEGRA_PINGROUP_CAM_MCLK,
184 TEGRA_PINGROUP_GPIO_PCC1,
185 TEGRA_PINGROUP_GPIO_PBB0,
186 TEGRA_PINGROUP_CAM_I2C_SCL,
187 TEGRA_PINGROUP_CAM_I2C_SDA,
188 TEGRA_PINGROUP_GPIO_PBB3,
189 TEGRA_PINGROUP_GPIO_PBB4,
190 TEGRA_PINGROUP_GPIO_PBB5,
191 TEGRA_PINGROUP_GPIO_PBB6,
192 TEGRA_PINGROUP_GPIO_PBB7,
193 TEGRA_PINGROUP_GPIO_PCC2,
194 TEGRA_PINGROUP_JTAG_RTCK,
195 TEGRA_PINGROUP_PWR_I2C_SCL,
196 TEGRA_PINGROUP_PWR_I2C_SDA,
197 TEGRA_PINGROUP_KB_ROW0,
198 TEGRA_PINGROUP_KB_ROW1,
199 TEGRA_PINGROUP_KB_ROW2,
200 TEGRA_PINGROUP_KB_ROW3,
201 TEGRA_PINGROUP_KB_ROW4,
202 TEGRA_PINGROUP_KB_ROW5,
203 TEGRA_PINGROUP_KB_ROW6,
204 TEGRA_PINGROUP_KB_ROW7,
205 TEGRA_PINGROUP_KB_ROW8,
206 TEGRA_PINGROUP_KB_ROW9,
207 TEGRA_PINGROUP_KB_ROW10,
208 TEGRA_PINGROUP_KB_ROW11,
209 TEGRA_PINGROUP_KB_ROW12,
210 TEGRA_PINGROUP_KB_ROW13,
211 TEGRA_PINGROUP_KB_ROW14,
212 TEGRA_PINGROUP_KB_ROW15,
213 TEGRA_PINGROUP_KB_COL0,
214 TEGRA_PINGROUP_KB_COL1,
215 TEGRA_PINGROUP_KB_COL2,
216 TEGRA_PINGROUP_KB_COL3,
217 TEGRA_PINGROUP_KB_COL4,
218 TEGRA_PINGROUP_KB_COL5,
219 TEGRA_PINGROUP_KB_COL6,
220 TEGRA_PINGROUP_KB_COL7,
221 TEGRA_PINGROUP_CLK_32K_OUT,
222 TEGRA_PINGROUP_SYS_CLK_REQ,
223 TEGRA_PINGROUP_CORE_PWR_REQ,
224 TEGRA_PINGROUP_CPU_PWR_REQ,
225 TEGRA_PINGROUP_PWR_INT_N,
226 TEGRA_PINGROUP_CLK_32K_IN,
227 TEGRA_PINGROUP_OWR,
228 TEGRA_PINGROUP_DAP1_FS,
229 TEGRA_PINGROUP_DAP1_DIN,
230 TEGRA_PINGROUP_DAP1_DOUT,
231 TEGRA_PINGROUP_DAP1_SCLK,
232 TEGRA_PINGROUP_CLK1_REQ,
233 TEGRA_PINGROUP_CLK1_OUT,
234 TEGRA_PINGROUP_SPDIF_IN,
235 TEGRA_PINGROUP_SPDIF_OUT,
236 TEGRA_PINGROUP_DAP2_FS,
237 TEGRA_PINGROUP_DAP2_DIN,
238 TEGRA_PINGROUP_DAP2_DOUT,
239 TEGRA_PINGROUP_DAP2_SCLK,
240 TEGRA_PINGROUP_SPI2_MOSI,
241 TEGRA_PINGROUP_SPI2_MISO,
242 TEGRA_PINGROUP_SPI2_CS0_N,
243 TEGRA_PINGROUP_SPI2_SCK,
244 TEGRA_PINGROUP_SPI1_MOSI,
245 TEGRA_PINGROUP_SPI1_SCK,
246 TEGRA_PINGROUP_SPI1_CS0_N,
247 TEGRA_PINGROUP_SPI1_MISO,
248 TEGRA_PINGROUP_SPI2_CS1_N,
249 TEGRA_PINGROUP_SPI2_CS2_N,
250 TEGRA_PINGROUP_SDMMC3_CLK,
251 TEGRA_PINGROUP_SDMMC3_CMD,
252 TEGRA_PINGROUP_SDMMC3_DAT0,
253 TEGRA_PINGROUP_SDMMC3_DAT1,
254 TEGRA_PINGROUP_SDMMC3_DAT2,
255 TEGRA_PINGROUP_SDMMC3_DAT3,
256 TEGRA_PINGROUP_SDMMC3_DAT4,
257 TEGRA_PINGROUP_SDMMC3_DAT5,
258 TEGRA_PINGROUP_SDMMC3_DAT6,
259 TEGRA_PINGROUP_SDMMC3_DAT7,
260 TEGRA_PINGROUP_PEX_L0_PRSNT_N,
261 TEGRA_PINGROUP_PEX_L0_RST_N,
262 TEGRA_PINGROUP_PEX_L0_CLKREQ_N,
263 TEGRA_PINGROUP_PEX_WAKE_N,
264 TEGRA_PINGROUP_PEX_L1_PRSNT_N,
265 TEGRA_PINGROUP_PEX_L1_RST_N,
266 TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
267 TEGRA_PINGROUP_PEX_L2_PRSNT_N,
268 TEGRA_PINGROUP_PEX_L2_RST_N,
269 TEGRA_PINGROUP_PEX_L2_CLKREQ_N,
270 TEGRA_PINGROUP_HDMI_CEC,
271 TEGRA_MAX_PINGROUP,
272};
273
274enum tegra_drive_pingroup {
275 TEGRA_DRIVE_PINGROUP_AO1 = 0,
276 TEGRA_DRIVE_PINGROUP_AO2,
277 TEGRA_DRIVE_PINGROUP_AT1,
278 TEGRA_DRIVE_PINGROUP_AT2,
279 TEGRA_DRIVE_PINGROUP_AT3,
280 TEGRA_DRIVE_PINGROUP_AT4,
281 TEGRA_DRIVE_PINGROUP_AT5,
282 TEGRA_DRIVE_PINGROUP_CDEV1,
283 TEGRA_DRIVE_PINGROUP_CDEV2,
284 TEGRA_DRIVE_PINGROUP_CSUS,
285 TEGRA_DRIVE_PINGROUP_DAP1,
286 TEGRA_DRIVE_PINGROUP_DAP2,
287 TEGRA_DRIVE_PINGROUP_DAP3,
288 TEGRA_DRIVE_PINGROUP_DAP4,
289 TEGRA_DRIVE_PINGROUP_DBG,
290 TEGRA_DRIVE_PINGROUP_LCD1,
291 TEGRA_DRIVE_PINGROUP_LCD2,
292 TEGRA_DRIVE_PINGROUP_SDIO2,
293 TEGRA_DRIVE_PINGROUP_SDIO3,
294 TEGRA_DRIVE_PINGROUP_SPI,
295 TEGRA_DRIVE_PINGROUP_UAA,
296 TEGRA_DRIVE_PINGROUP_UAB,
297 TEGRA_DRIVE_PINGROUP_UART2,
298 TEGRA_DRIVE_PINGROUP_UART3,
299 TEGRA_DRIVE_PINGROUP_VI1,
300 TEGRA_DRIVE_PINGROUP_SDIO1,
301 TEGRA_DRIVE_PINGROUP_CRT,
302 TEGRA_DRIVE_PINGROUP_DDC,
303 TEGRA_DRIVE_PINGROUP_GMA,
304 TEGRA_DRIVE_PINGROUP_GMB,
305 TEGRA_DRIVE_PINGROUP_GMC,
306 TEGRA_DRIVE_PINGROUP_GMD,
307 TEGRA_DRIVE_PINGROUP_GME,
308 TEGRA_DRIVE_PINGROUP_GMF,
309 TEGRA_DRIVE_PINGROUP_GMG,
310 TEGRA_DRIVE_PINGROUP_GMH,
311 TEGRA_DRIVE_PINGROUP_OWR,
312 TEGRA_DRIVE_PINGROUP_UAD,
313 TEGRA_DRIVE_PINGROUP_GPV,
314 TEGRA_DRIVE_PINGROUP_DEV3,
315 TEGRA_DRIVE_PINGROUP_CEC,
316 TEGRA_MAX_DRIVE_PINGROUP,
317};
318
319#endif
320
diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h
index bb7dfdb61205..055f1792c8ff 100644
--- a/arch/arm/mach-tegra/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/include/mach/pinmux.h
@@ -2,6 +2,7 @@
2 * linux/arch/arm/mach-tegra/include/mach/pinmux.h 2 * linux/arch/arm/mach-tegra/include/mach/pinmux.h
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2010,2011 Nvidia, Inc.
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 8 * License version 2, as published by the Free Software Foundation, and
@@ -17,18 +18,13 @@
17#ifndef __MACH_TEGRA_PINMUX_H 18#ifndef __MACH_TEGRA_PINMUX_H
18#define __MACH_TEGRA_PINMUX_H 19#define __MACH_TEGRA_PINMUX_H
19 20
20#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
21#include "pinmux-t2.h"
22#else
23#error "Undefined Tegra architecture"
24#endif
25
26enum tegra_mux_func { 21enum tegra_mux_func {
27 TEGRA_MUX_RSVD = 0x8000, 22 TEGRA_MUX_RSVD = 0x8000,
28 TEGRA_MUX_RSVD1 = 0x8000, 23 TEGRA_MUX_RSVD1 = 0x8000,
29 TEGRA_MUX_RSVD2 = 0x8001, 24 TEGRA_MUX_RSVD2 = 0x8001,
30 TEGRA_MUX_RSVD3 = 0x8002, 25 TEGRA_MUX_RSVD3 = 0x8002,
31 TEGRA_MUX_RSVD4 = 0x8003, 26 TEGRA_MUX_RSVD4 = 0x8003,
27 TEGRA_MUX_INVALID = 0x4000,
32 TEGRA_MUX_NONE = -1, 28 TEGRA_MUX_NONE = -1,
33 TEGRA_MUX_AHB_CLK, 29 TEGRA_MUX_AHB_CLK,
34 TEGRA_MUX_APB_CLK, 30 TEGRA_MUX_APB_CLK,
@@ -90,6 +86,49 @@ enum tegra_mux_func {
90 TEGRA_MUX_VI, 86 TEGRA_MUX_VI,
91 TEGRA_MUX_VI_SENSOR_CLK, 87 TEGRA_MUX_VI_SENSOR_CLK,
92 TEGRA_MUX_XIO, 88 TEGRA_MUX_XIO,
89 TEGRA_MUX_BLINK,
90 TEGRA_MUX_CEC,
91 TEGRA_MUX_CLK12,
92 TEGRA_MUX_DAP,
93 TEGRA_MUX_DAPSDMMC2,
94 TEGRA_MUX_DDR,
95 TEGRA_MUX_DEV3,
96 TEGRA_MUX_DTV,
97 TEGRA_MUX_VI_ALT1,
98 TEGRA_MUX_VI_ALT2,
99 TEGRA_MUX_VI_ALT3,
100 TEGRA_MUX_EMC_DLL,
101 TEGRA_MUX_EXTPERIPH1,
102 TEGRA_MUX_EXTPERIPH2,
103 TEGRA_MUX_EXTPERIPH3,
104 TEGRA_MUX_GMI_ALT,
105 TEGRA_MUX_HDA,
106 TEGRA_MUX_HSI,
107 TEGRA_MUX_I2C4,
108 TEGRA_MUX_I2C5,
109 TEGRA_MUX_I2CPWR,
110 TEGRA_MUX_I2S0,
111 TEGRA_MUX_I2S1,
112 TEGRA_MUX_I2S2,
113 TEGRA_MUX_I2S3,
114 TEGRA_MUX_I2S4,
115 TEGRA_MUX_NAND_ALT,
116 TEGRA_MUX_POPSDIO4,
117 TEGRA_MUX_POPSDMMC4,
118 TEGRA_MUX_PWM0,
119 TEGRA_MUX_PWM1,
120 TEGRA_MUX_PWM2,
121 TEGRA_MUX_PWM3,
122 TEGRA_MUX_SATA,
123 TEGRA_MUX_SPI5,
124 TEGRA_MUX_SPI6,
125 TEGRA_MUX_SYSCLK,
126 TEGRA_MUX_VGP1,
127 TEGRA_MUX_VGP2,
128 TEGRA_MUX_VGP3,
129 TEGRA_MUX_VGP4,
130 TEGRA_MUX_VGP5,
131 TEGRA_MUX_VGP6,
93 TEGRA_MUX_SAFE, 132 TEGRA_MUX_SAFE,
94 TEGRA_MAX_MUX, 133 TEGRA_MAX_MUX,
95}; 134};
@@ -105,6 +144,11 @@ enum tegra_tristate {
105 TEGRA_TRI_TRISTATE = 1, 144 TEGRA_TRI_TRISTATE = 1,
106}; 145};
107 146
147enum tegra_pin_io {
148 TEGRA_PIN_OUTPUT = 0,
149 TEGRA_PIN_INPUT = 1,
150};
151
108enum tegra_vddio { 152enum tegra_vddio {
109 TEGRA_VDDIO_BB = 0, 153 TEGRA_VDDIO_BB = 0,
110 TEGRA_VDDIO_LCD, 154 TEGRA_VDDIO_LCD,
@@ -115,10 +159,16 @@ enum tegra_vddio {
115 TEGRA_VDDIO_SYS, 159 TEGRA_VDDIO_SYS,
116 TEGRA_VDDIO_AUDIO, 160 TEGRA_VDDIO_AUDIO,
117 TEGRA_VDDIO_SD, 161 TEGRA_VDDIO_SD,
162 TEGRA_VDDIO_CAM,
163 TEGRA_VDDIO_GMI,
164 TEGRA_VDDIO_PEXCTL,
165 TEGRA_VDDIO_SDMMC1,
166 TEGRA_VDDIO_SDMMC3,
167 TEGRA_VDDIO_SDMMC4,
118}; 168};
119 169
120struct tegra_pingroup_config { 170struct tegra_pingroup_config {
121 enum tegra_pingroup pingroup; 171 int pingroup;
122 enum tegra_mux_func func; 172 enum tegra_mux_func func;
123 enum tegra_pullupdown pupd; 173 enum tegra_pullupdown pupd;
124 enum tegra_tristate tristate; 174 enum tegra_tristate tristate;
@@ -187,7 +237,7 @@ enum tegra_schmitt {
187}; 237};
188 238
189struct tegra_drive_pingroup_config { 239struct tegra_drive_pingroup_config {
190 enum tegra_drive_pingroup pingroup; 240 int pingroup;
191 enum tegra_hsm hsm; 241 enum tegra_hsm hsm;
192 enum tegra_schmitt schmitt; 242 enum tegra_schmitt schmitt;
193 enum tegra_drive drive; 243 enum tegra_drive drive;
@@ -208,6 +258,7 @@ struct tegra_pingroup_desc {
208 int funcs[4]; 258 int funcs[4];
209 int func_safe; 259 int func_safe;
210 int vddio; 260 int vddio;
261 enum tegra_pin_io io_default;
211 s16 tri_bank; /* Register bank the tri_reg exists within */ 262 s16 tri_bank; /* Register bank the tri_reg exists within */
212 s16 mux_bank; /* Register bank the mux_reg exists within */ 263 s16 mux_bank; /* Register bank the mux_reg exists within */
213 s16 pupd_bank; /* Register bank the pupd_reg exists within */ 264 s16 pupd_bank; /* Register bank the pupd_reg exists within */
@@ -217,15 +268,23 @@ struct tegra_pingroup_desc {
217 s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ 268 s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */
218 s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */ 269 s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */
219 s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */ 270 s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */
271 s8 lock_bit; /* offset of the LOCK bit into mux register bit */
272 s8 od_bit; /* offset of the OD bit into mux register bit */
273 s8 ioreset_bit; /* offset of the IO_RESET bit into mux register bit */
220}; 274};
221 275
222extern const struct tegra_pingroup_desc tegra_soc_pingroups[]; 276typedef void (*pinmux_init) (const struct tegra_pingroup_desc **pg,
223extern const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[]; 277 int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,
278 int *pgdrive_max);
224 279
225int tegra_pinmux_set_tristate(enum tegra_pingroup pg, 280void tegra20_pinmux_init(const struct tegra_pingroup_desc **pg, int *pg_max,
226 enum tegra_tristate tristate); 281 const struct tegra_drive_pingroup_desc **pgdrive, int *pgdrive_max);
227int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, 282
228 enum tegra_pullupdown pupd); 283void tegra30_pinmux_init(const struct tegra_pingroup_desc **pg, int *pg_max,
284 const struct tegra_drive_pingroup_desc **pgdrive, int *pgdrive_max);
285
286int tegra_pinmux_set_tristate(int pg, enum tegra_tristate tristate);
287int tegra_pinmux_set_pullupdown(int pg, enum tegra_pullupdown pupd);
229 288
230void tegra_pinmux_config_table(const struct tegra_pingroup_config *config, 289void tegra_pinmux_config_table(const struct tegra_pingroup_config *config,
231 int len); 290 int len);
@@ -241,4 +300,3 @@ void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *conf
241void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config, 300void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config,
242 int len, enum tegra_pullupdown pupd); 301 int len, enum tegra_pullupdown pupd);
243#endif 302#endif
244
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 4956c3cea731..4e1afcd54fae 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -21,6 +21,7 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/of.h>
24 25
25#include <asm/hardware/gic.h> 26#include <asm/hardware/gic.h>
26 27
@@ -28,10 +29,6 @@
28 29
29#include "board.h" 30#include "board.h"
30 31
31#define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE)
32#define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE)
33#define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ)
34
35#define ICTLR_CPU_IEP_VFIQ 0x08 32#define ICTLR_CPU_IEP_VFIQ 0x08
36#define ICTLR_CPU_IEP_FIR 0x14 33#define ICTLR_CPU_IEP_FIR 0x14
37#define ICTLR_CPU_IEP_FIR_SET 0x18 34#define ICTLR_CPU_IEP_FIR_SET 0x18
@@ -129,6 +126,11 @@ void __init tegra_init_irq(void)
129 gic_arch_extn.irq_unmask = tegra_unmask; 126 gic_arch_extn.irq_unmask = tegra_unmask;
130 gic_arch_extn.irq_retrigger = tegra_retrigger; 127 gic_arch_extn.irq_retrigger = tegra_retrigger;
131 128
132 gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 129 /*
133 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 130 * Check if there is a devicetree present, since the GIC will be
131 * initialized elsewhere under DT.
132 */
133 if (!of_have_populated_dt())
134 gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
135 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
134} 136}
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 97ef3e55dfdf..ec63c6b2b6b5 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -37,7 +37,6 @@
37#include <asm/sizes.h> 37#include <asm/sizes.h>
38#include <asm/mach/pci.h> 38#include <asm/mach/pci.h>
39 39
40#include <mach/pinmux.h>
41#include <mach/iomap.h> 40#include <mach/iomap.h>
42#include <mach/clk.h> 41#include <mach/clk.h>
43#include <mach/powergate.h> 42#include <mach/powergate.h>
diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-tegra20-tables.c
index a0dc2bc28ed3..734add1280b7 100644
--- a/arch/arm/mach-tegra/pinmux-t2-tables.c
+++ b/arch/arm/mach-tegra/pinmux-tegra20-tables.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-tegra/pinmux-t2-tables.c 2 * linux/arch/arm/mach-tegra/pinmux-tegra20-tables.c
3 * 3 *
4 * Common pinmux configurations for Tegra 2 SoCs 4 * Common pinmux configurations for Tegra20 SoCs
5 * 5 *
6 * Copyright (C) 2010 NVIDIA Corporation 6 * Copyright (C) 2010 NVIDIA Corporation
7 * 7 *
@@ -29,6 +29,7 @@
29 29
30#include <mach/iomap.h> 30#include <mach/iomap.h>
31#include <mach/pinmux.h> 31#include <mach/pinmux.h>
32#include <mach/pinmux-tegra20.h>
32#include <mach/suspend.h> 33#include <mach/suspend.h>
33 34
34#define TRISTATE_REG_A 0x14 35#define TRISTATE_REG_A 0x14
@@ -43,7 +44,7 @@
43 .reg = ((r) - PINGROUP_REG_A) \ 44 .reg = ((r) - PINGROUP_REG_A) \
44 } 45 }
45 46
46const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { 47static const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = {
47 DRIVE_PINGROUP(AO1, 0x868), 48 DRIVE_PINGROUP(AO1, 0x868),
48 DRIVE_PINGROUP(AO2, 0x86c), 49 DRIVE_PINGROUP(AO2, 0x86c),
49 DRIVE_PINGROUP(AT1, 0x870), 50 DRIVE_PINGROUP(AT1, 0x870),
@@ -105,9 +106,13 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
105 .pupd_bank = 2, \ 106 .pupd_bank = 2, \
106 .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \ 107 .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \
107 .pupd_bit = pupd_b, \ 108 .pupd_bit = pupd_b, \
109 .lock_bit = -1, \
110 .od_bit = -1, \
111 .ioreset_bit = -1, \
112 .io_default = -1, \
108 } 113 }
109 114
110const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { 115static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
111 PINGROUP(ATA, NAND, IDE, NAND, GMI, RSVD, IDE, 0x14, 0, 0x80, 24, 0xA0, 0), 116 PINGROUP(ATA, NAND, IDE, NAND, GMI, RSVD, IDE, 0x14, 0, 0x80, 24, 0xA0, 0),
112 PINGROUP(ATB, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 1, 0x80, 16, 0xA0, 2), 117 PINGROUP(ATB, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 1, 0x80, 16, 0xA0, 2),
113 PINGROUP(ATC, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 2, 0x80, 22, 0xA0, 4), 118 PINGROUP(ATC, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 2, 0x80, 22, 0xA0, 4),
@@ -226,3 +231,14 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
226 PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), 231 PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30),
227 PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), 232 PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28),
228}; 233};
234
235void __devinit tegra20_pinmux_init(const struct tegra_pingroup_desc **pg,
236 int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,
237 int *pgdrive_max)
238{
239 *pg = tegra_soc_pingroups;
240 *pg_max = TEGRA_MAX_PINGROUP;
241 *pgdrive = tegra_soc_drive_pingroups;
242 *pgdrive_max = TEGRA_MAX_DRIVE_PINGROUP;
243}
244
diff --git a/arch/arm/mach-tegra/pinmux-tegra30-tables.c b/arch/arm/mach-tegra/pinmux-tegra30-tables.c
new file mode 100644
index 000000000000..14fc0e4c1c44
--- /dev/null
+++ b/arch/arm/mach-tegra/pinmux-tegra30-tables.c
@@ -0,0 +1,376 @@
1/*
2 * linux/arch/arm/mach-tegra/pinmux-tegra30-tables.c
3 *
4 * Common pinmux configurations for Tegra30 SoCs
5 *
6 * Copyright (C) 2010,2011 NVIDIA Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 */
21
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/spinlock.h>
25#include <linux/io.h>
26#include <linux/init.h>
27#include <linux/string.h>
28
29#include <mach/iomap.h>
30#include <mach/pinmux.h>
31#include <mach/pinmux-tegra30.h>
32#include <mach/suspend.h>
33
34#define PINGROUP_REG_A 0x868
35#define MUXCTL_REG_A 0x3000
36
37#define DRIVE_PINGROUP(pg_name, r) \
38 [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \
39 .name = #pg_name, \
40 .reg_bank = 0, \
41 .reg = ((r) - PINGROUP_REG_A) \
42 }
43
44static const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = {
45 DRIVE_PINGROUP(AO1, 0x868),
46 DRIVE_PINGROUP(AO2, 0x86c),
47 DRIVE_PINGROUP(AT1, 0x870),
48 DRIVE_PINGROUP(AT2, 0x874),
49 DRIVE_PINGROUP(AT3, 0x878),
50 DRIVE_PINGROUP(AT4, 0x87c),
51 DRIVE_PINGROUP(AT5, 0x880),
52 DRIVE_PINGROUP(CDEV1, 0x884),
53 DRIVE_PINGROUP(CDEV2, 0x888),
54 DRIVE_PINGROUP(CSUS, 0x88c),
55 DRIVE_PINGROUP(DAP1, 0x890),
56 DRIVE_PINGROUP(DAP2, 0x894),
57 DRIVE_PINGROUP(DAP3, 0x898),
58 DRIVE_PINGROUP(DAP4, 0x89c),
59 DRIVE_PINGROUP(DBG, 0x8a0),
60 DRIVE_PINGROUP(LCD1, 0x8a4),
61 DRIVE_PINGROUP(LCD2, 0x8a8),
62 DRIVE_PINGROUP(SDIO2, 0x8ac),
63 DRIVE_PINGROUP(SDIO3, 0x8b0),
64 DRIVE_PINGROUP(SPI, 0x8b4),
65 DRIVE_PINGROUP(UAA, 0x8b8),
66 DRIVE_PINGROUP(UAB, 0x8bc),
67 DRIVE_PINGROUP(UART2, 0x8c0),
68 DRIVE_PINGROUP(UART3, 0x8c4),
69 DRIVE_PINGROUP(VI1, 0x8c8),
70 DRIVE_PINGROUP(SDIO1, 0x8ec),
71 DRIVE_PINGROUP(CRT, 0x8f8),
72 DRIVE_PINGROUP(DDC, 0x8fc),
73 DRIVE_PINGROUP(GMA, 0x900),
74 DRIVE_PINGROUP(GMB, 0x904),
75 DRIVE_PINGROUP(GMC, 0x908),
76 DRIVE_PINGROUP(GMD, 0x90c),
77 DRIVE_PINGROUP(GME, 0x910),
78 DRIVE_PINGROUP(GMF, 0x914),
79 DRIVE_PINGROUP(GMG, 0x918),
80 DRIVE_PINGROUP(GMH, 0x91c),
81 DRIVE_PINGROUP(OWR, 0x920),
82 DRIVE_PINGROUP(UAD, 0x924),
83 DRIVE_PINGROUP(GPV, 0x928),
84 DRIVE_PINGROUP(DEV3, 0x92c),
85 DRIVE_PINGROUP(CEC, 0x938),
86};
87
88#define PINGROUP(pg_name, vdd, f0, f1, f2, f3, fs, iod, reg) \
89 [TEGRA_PINGROUP_ ## pg_name] = { \
90 .name = #pg_name, \
91 .vddio = TEGRA_VDDIO_ ## vdd, \
92 .funcs = { \
93 TEGRA_MUX_ ## f0, \
94 TEGRA_MUX_ ## f1, \
95 TEGRA_MUX_ ## f2, \
96 TEGRA_MUX_ ## f3, \
97 }, \
98 .func_safe = TEGRA_MUX_ ## fs, \
99 .tri_bank = 1, \
100 .tri_reg = ((reg) - MUXCTL_REG_A), \
101 .tri_bit = 4, \
102 .mux_bank = 1, \
103 .mux_reg = ((reg) - MUXCTL_REG_A), \
104 .mux_bit = 0, \
105 .pupd_bank = 1, \
106 .pupd_reg = ((reg) - MUXCTL_REG_A), \
107 .pupd_bit = 2, \
108 .io_default = TEGRA_PIN_ ## iod, \
109 .od_bit = 6, \
110 .lock_bit = 7, \
111 .ioreset_bit = 8, \
112 }
113
114static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
115 /* NAME VDD f0 f1 f2 f3 fSafe io reg */
116 PINGROUP(ULPI_DATA0, BB, SPI3, HSI, UARTA, ULPI, RSVD, INPUT, 0x3000),
117 PINGROUP(ULPI_DATA1, BB, SPI3, HSI, UARTA, ULPI, RSVD, INPUT, 0x3004),
118 PINGROUP(ULPI_DATA2, BB, SPI3, HSI, UARTA, ULPI, RSVD, INPUT, 0x3008),
119 PINGROUP(ULPI_DATA3, BB, SPI3, HSI, UARTA, ULPI, RSVD, INPUT, 0x300c),
120 PINGROUP(ULPI_DATA4, BB, SPI2, HSI, UARTA, ULPI, RSVD, INPUT, 0x3010),
121 PINGROUP(ULPI_DATA5, BB, SPI2, HSI, UARTA, ULPI, RSVD, INPUT, 0x3014),
122 PINGROUP(ULPI_DATA6, BB, SPI2, HSI, UARTA, ULPI, RSVD, INPUT, 0x3018),
123 PINGROUP(ULPI_DATA7, BB, SPI2, HSI, UARTA, ULPI, RSVD, INPUT, 0x301c),
124 PINGROUP(ULPI_CLK, BB, SPI1, RSVD, UARTD, ULPI, RSVD, INPUT, 0x3020),
125 PINGROUP(ULPI_DIR, BB, SPI1, RSVD, UARTD, ULPI, RSVD, INPUT, 0x3024),
126 PINGROUP(ULPI_NXT, BB, SPI1, RSVD, UARTD, ULPI, RSVD, INPUT, 0x3028),
127 PINGROUP(ULPI_STP, BB, SPI1, RSVD, UARTD, ULPI, RSVD, INPUT, 0x302c),
128 PINGROUP(DAP3_FS, BB, I2S2, RSVD1, DISPLAYA, DISPLAYB, RSVD, INPUT, 0x3030),
129 PINGROUP(DAP3_DIN, BB, I2S2, RSVD1, DISPLAYA, DISPLAYB, RSVD, INPUT, 0x3034),
130 PINGROUP(DAP3_DOUT, BB, I2S2, RSVD1, DISPLAYA, DISPLAYB, RSVD, INPUT, 0x3038),
131 PINGROUP(DAP3_SCLK, BB, I2S2, RSVD1, DISPLAYA, DISPLAYB, RSVD, INPUT, 0x303c),
132 PINGROUP(GPIO_PV0, BB, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3040),
133 PINGROUP(GPIO_PV1, BB, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3044),
134 PINGROUP(SDMMC1_CLK, SDMMC1, SDIO1, RSVD1, RSVD2, INVALID, RSVD, INPUT, 0x3048),
135 PINGROUP(SDMMC1_CMD, SDMMC1, SDIO1, RSVD1, RSVD2, INVALID, RSVD, INPUT, 0x304c),
136 PINGROUP(SDMMC1_DAT3, SDMMC1, SDIO1, RSVD1, UARTE, INVALID, RSVD, INPUT, 0x3050),
137 PINGROUP(SDMMC1_DAT2, SDMMC1, SDIO1, RSVD1, UARTE, INVALID, RSVD, INPUT, 0x3054),
138 PINGROUP(SDMMC1_DAT1, SDMMC1, SDIO1, RSVD1, UARTE, INVALID, RSVD, INPUT, 0x3058),
139 PINGROUP(SDMMC1_DAT0, SDMMC1, SDIO1, RSVD1, UARTE, INVALID, RSVD, INPUT, 0x305c),
140 PINGROUP(GPIO_PV2, SDMMC1, OWR, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3060),
141 PINGROUP(GPIO_PV3, SDMMC1, INVALID, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3064),
142 PINGROUP(CLK2_OUT, SDMMC1, EXTPERIPH2, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3068),
143 PINGROUP(CLK2_REQ, SDMMC1, DAP, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x306c),
144 PINGROUP(LCD_PWR1, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x3070),
145 PINGROUP(LCD_PWR2, LCD, DISPLAYA, DISPLAYB, SPI5, INVALID, RSVD, OUTPUT, 0x3074),
146 PINGROUP(LCD_SDIN, LCD, DISPLAYA, DISPLAYB, SPI5, RSVD, RSVD, OUTPUT, 0x3078),
147 PINGROUP(LCD_SDOUT, LCD, DISPLAYA, DISPLAYB, SPI5, INVALID, RSVD, OUTPUT, 0x307c),
148 PINGROUP(LCD_WR_N, LCD, DISPLAYA, DISPLAYB, SPI5, INVALID, RSVD, OUTPUT, 0x3080),
149 PINGROUP(LCD_CS0_N, LCD, DISPLAYA, DISPLAYB, SPI5, RSVD, RSVD, OUTPUT, 0x3084),
150 PINGROUP(LCD_DC0, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x3088),
151 PINGROUP(LCD_SCK, LCD, DISPLAYA, DISPLAYB, SPI5, INVALID, RSVD, OUTPUT, 0x308c),
152 PINGROUP(LCD_PWR0, LCD, DISPLAYA, DISPLAYB, SPI5, INVALID, RSVD, OUTPUT, 0x3090),
153 PINGROUP(LCD_PCLK, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x3094),
154 PINGROUP(LCD_DE, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x3098),
155 PINGROUP(LCD_HSYNC, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x309c),
156 PINGROUP(LCD_VSYNC, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30a0),
157 PINGROUP(LCD_D0, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30a4),
158 PINGROUP(LCD_D1, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30a8),
159 PINGROUP(LCD_D2, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30ac),
160 PINGROUP(LCD_D3, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30b0),
161 PINGROUP(LCD_D4, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30b4),
162 PINGROUP(LCD_D5, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30b8),
163 PINGROUP(LCD_D6, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30bc),
164 PINGROUP(LCD_D7, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30c0),
165 PINGROUP(LCD_D8, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30c4),
166 PINGROUP(LCD_D9, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30c8),
167 PINGROUP(LCD_D10, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30cc),
168 PINGROUP(LCD_D11, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30d0),
169 PINGROUP(LCD_D12, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30d4),
170 PINGROUP(LCD_D13, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30d8),
171 PINGROUP(LCD_D14, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30dc),
172 PINGROUP(LCD_D15, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30e0),
173 PINGROUP(LCD_D16, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30e4),
174 PINGROUP(LCD_D17, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30e8),
175 PINGROUP(LCD_D18, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30ec),
176 PINGROUP(LCD_D19, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30f0),
177 PINGROUP(LCD_D20, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30f4),
178 PINGROUP(LCD_D21, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30f8),
179 PINGROUP(LCD_D22, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x30fc),
180 PINGROUP(LCD_D23, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x3100),
181 PINGROUP(LCD_CS1_N, LCD, DISPLAYA, DISPLAYB, SPI5, RSVD2, RSVD, OUTPUT, 0x3104),
182 PINGROUP(LCD_M1, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x3108),
183 PINGROUP(LCD_DC1, LCD, DISPLAYA, DISPLAYB, RSVD1, RSVD2, RSVD, OUTPUT, 0x310c),
184 PINGROUP(HDMI_INT, LCD, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3110),
185 PINGROUP(DDC_SCL, LCD, I2C4, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3114),
186 PINGROUP(DDC_SDA, LCD, I2C4, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3118),
187 PINGROUP(CRT_HSYNC, LCD, CRT, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x311c),
188 PINGROUP(CRT_VSYNC, LCD, CRT, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3120),
189 PINGROUP(VI_D0, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3124),
190 PINGROUP(VI_D1, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3128),
191 PINGROUP(VI_D2, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x312c),
192 PINGROUP(VI_D3, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3130),
193 PINGROUP(VI_D4, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3134),
194 PINGROUP(VI_D5, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3138),
195 PINGROUP(VI_D6, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x313c),
196 PINGROUP(VI_D7, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3140),
197 PINGROUP(VI_D8, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3144),
198 PINGROUP(VI_D9, VI, INVALID, SDIO2, VI, RSVD1, RSVD, INPUT, 0x3148),
199 PINGROUP(VI_D10, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x314c),
200 PINGROUP(VI_D11, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3150),
201 PINGROUP(VI_PCLK, VI, RSVD1, SDIO2, VI, RSVD2, RSVD, INPUT, 0x3154),
202 PINGROUP(VI_MCLK, VI, VI, INVALID, INVALID, INVALID, RSVD, INPUT, 0x3158),
203 PINGROUP(VI_VSYNC, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x315c),
204 PINGROUP(VI_HSYNC, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3160),
205 PINGROUP(UART2_RXD, UART, IRDA, SPDIF, UARTA, SPI4, RSVD, INPUT, 0x3164),
206 PINGROUP(UART2_TXD, UART, IRDA, SPDIF, UARTA, SPI4, RSVD, INPUT, 0x3168),
207 PINGROUP(UART2_RTS_N, UART, UARTA, UARTB, GMI, SPI4, RSVD, INPUT, 0x316c),
208 PINGROUP(UART2_CTS_N, UART, UARTA, UARTB, GMI, SPI4, RSVD, INPUT, 0x3170),
209 PINGROUP(UART3_TXD, UART, UARTC, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x3174),
210 PINGROUP(UART3_RXD, UART, UARTC, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x3178),
211 PINGROUP(UART3_CTS_N, UART, UARTC, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x317c),
212 PINGROUP(UART3_RTS_N, UART, UARTC, PWM0, GMI, RSVD2, RSVD, INPUT, 0x3180),
213 PINGROUP(GPIO_PU0, UART, OWR, UARTA, GMI, RSVD1, RSVD, INPUT, 0x3184),
214 PINGROUP(GPIO_PU1, UART, RSVD1, UARTA, GMI, RSVD2, RSVD, INPUT, 0x3188),
215 PINGROUP(GPIO_PU2, UART, RSVD1, UARTA, GMI, RSVD2, RSVD, INPUT, 0x318c),
216 PINGROUP(GPIO_PU3, UART, PWM0, UARTA, GMI, RSVD1, RSVD, INPUT, 0x3190),
217 PINGROUP(GPIO_PU4, UART, PWM1, UARTA, GMI, RSVD1, RSVD, INPUT, 0x3194),
218 PINGROUP(GPIO_PU5, UART, PWM2, UARTA, GMI, RSVD1, RSVD, INPUT, 0x3198),
219 PINGROUP(GPIO_PU6, UART, PWM3, UARTA, GMI, RSVD1, RSVD, INPUT, 0x319c),
220 PINGROUP(GEN1_I2C_SDA, UART, I2C, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x31a0),
221 PINGROUP(GEN1_I2C_SCL, UART, I2C, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x31a4),
222 PINGROUP(DAP4_FS, UART, I2S3, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x31a8),
223 PINGROUP(DAP4_DIN, UART, I2S3, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x31ac),
224 PINGROUP(DAP4_DOUT, UART, I2S3, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x31b0),
225 PINGROUP(DAP4_SCLK, UART, I2S3, RSVD1, GMI, RSVD2, RSVD, INPUT, 0x31b4),
226 PINGROUP(CLK3_OUT, UART, EXTPERIPH3, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x31b8),
227 PINGROUP(CLK3_REQ, UART, DEV3, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x31bc),
228 PINGROUP(GMI_WP_N, GMI, RSVD1, NAND, GMI, GMI_ALT, RSVD, INPUT, 0x31c0),
229 PINGROUP(GMI_IORDY, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31c4),
230 PINGROUP(GMI_WAIT, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31c8),
231 PINGROUP(GMI_ADV_N, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31cc),
232 PINGROUP(GMI_CLK, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31d0),
233 PINGROUP(GMI_CS0_N, GMI, RSVD1, NAND, GMI, INVALID, RSVD, INPUT, 0x31d4),
234 PINGROUP(GMI_CS1_N, GMI, RSVD1, NAND, GMI, DTV, RSVD, INPUT, 0x31d8),
235 PINGROUP(GMI_CS2_N, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31dc),
236 PINGROUP(GMI_CS3_N, GMI, RSVD1, NAND, GMI, GMI_ALT, RSVD, INPUT, 0x31e0),
237 PINGROUP(GMI_CS4_N, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31e4),
238 PINGROUP(GMI_CS6_N, GMI, NAND, NAND_ALT, GMI, SATA, RSVD, INPUT, 0x31e8),
239 PINGROUP(GMI_CS7_N, GMI, NAND, NAND_ALT, GMI, GMI_ALT, RSVD, INPUT, 0x31ec),
240 PINGROUP(GMI_AD0, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31f0),
241 PINGROUP(GMI_AD1, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31f4),
242 PINGROUP(GMI_AD2, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31f8),
243 PINGROUP(GMI_AD3, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x31fc),
244 PINGROUP(GMI_AD4, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3200),
245 PINGROUP(GMI_AD5, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3204),
246 PINGROUP(GMI_AD6, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3208),
247 PINGROUP(GMI_AD7, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x320c),
248 PINGROUP(GMI_AD8, GMI, PWM0, NAND, GMI, RSVD2, RSVD, INPUT, 0x3210),
249 PINGROUP(GMI_AD9, GMI, PWM1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3214),
250 PINGROUP(GMI_AD10, GMI, PWM2, NAND, GMI, RSVD2, RSVD, INPUT, 0x3218),
251 PINGROUP(GMI_AD11, GMI, PWM3, NAND, GMI, RSVD2, RSVD, INPUT, 0x321c),
252 PINGROUP(GMI_AD12, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3220),
253 PINGROUP(GMI_AD13, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3224),
254 PINGROUP(GMI_AD14, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x3228),
255 PINGROUP(GMI_AD15, GMI, RSVD1, NAND, GMI, RSVD2, RSVD, INPUT, 0x322c),
256 PINGROUP(GMI_A16, GMI, UARTD, SPI4, GMI, GMI_ALT, RSVD, INPUT, 0x3230),
257 PINGROUP(GMI_A17, GMI, UARTD, SPI4, GMI, INVALID, RSVD, INPUT, 0x3234),
258 PINGROUP(GMI_A18, GMI, UARTD, SPI4, GMI, INVALID, RSVD, INPUT, 0x3238),
259 PINGROUP(GMI_A19, GMI, UARTD, SPI4, GMI, RSVD3, RSVD, INPUT, 0x323c),
260 PINGROUP(GMI_WR_N, GMI, RSVD1, NAND, GMI, RSVD3, RSVD, INPUT, 0x3240),
261 PINGROUP(GMI_OE_N, GMI, RSVD1, NAND, GMI, RSVD3, RSVD, INPUT, 0x3244),
262 PINGROUP(GMI_DQS, GMI, RSVD1, NAND, GMI, RSVD3, RSVD, INPUT, 0x3248),
263 PINGROUP(GMI_RST_N, GMI, NAND, NAND_ALT, GMI, RSVD3, RSVD, INPUT, 0x324c),
264 PINGROUP(GEN2_I2C_SCL, GMI, I2C2, INVALID, GMI, RSVD3, RSVD, INPUT, 0x3250),
265 PINGROUP(GEN2_I2C_SDA, GMI, I2C2, INVALID, GMI, RSVD3, RSVD, INPUT, 0x3254),
266 PINGROUP(SDMMC4_CLK, SDMMC4, INVALID, NAND, GMI, SDIO4, RSVD, INPUT, 0x3258),
267 PINGROUP(SDMMC4_CMD, SDMMC4, I2C3, NAND, GMI, SDIO4, RSVD, INPUT, 0x325c),
268 PINGROUP(SDMMC4_DAT0, SDMMC4, UARTE, SPI3, GMI, SDIO4, RSVD, INPUT, 0x3260),
269 PINGROUP(SDMMC4_DAT1, SDMMC4, UARTE, SPI3, GMI, SDIO4, RSVD, INPUT, 0x3264),
270 PINGROUP(SDMMC4_DAT2, SDMMC4, UARTE, SPI3, GMI, SDIO4, RSVD, INPUT, 0x3268),
271 PINGROUP(SDMMC4_DAT3, SDMMC4, UARTE, SPI3, GMI, SDIO4, RSVD, INPUT, 0x326c),
272 PINGROUP(SDMMC4_DAT4, SDMMC4, I2C3, I2S4, GMI, SDIO4, RSVD, INPUT, 0x3270),
273 PINGROUP(SDMMC4_DAT5, SDMMC4, VGP3, I2S4, GMI, SDIO4, RSVD, INPUT, 0x3274),
274 PINGROUP(SDMMC4_DAT6, SDMMC4, VGP4, I2S4, GMI, SDIO4, RSVD, INPUT, 0x3278),
275 PINGROUP(SDMMC4_DAT7, SDMMC4, VGP5, I2S4, GMI, SDIO4, RSVD, INPUT, 0x327c),
276 PINGROUP(SDMMC4_RST_N, SDMMC4, VGP6, RSVD1, RSVD2, POPSDMMC4, RSVD, INPUT, 0x3280),
277 PINGROUP(CAM_MCLK, CAM, VI, INVALID, VI_ALT2, POPSDMMC4, RSVD, INPUT, 0x3284),
278 PINGROUP(GPIO_PCC1, CAM, I2S4, RSVD1, RSVD2, POPSDMMC4, RSVD, INPUT, 0x3288),
279 PINGROUP(GPIO_PBB0, CAM, I2S4, RSVD1, RSVD2, POPSDMMC4, RSVD, INPUT, 0x328c),
280 PINGROUP(CAM_I2C_SCL, CAM, INVALID, I2C3, RSVD2, POPSDMMC4, RSVD, INPUT, 0x3290),
281 PINGROUP(CAM_I2C_SDA, CAM, INVALID, I2C3, RSVD2, POPSDMMC4, RSVD, INPUT, 0x3294),
282 PINGROUP(GPIO_PBB3, CAM, VGP3, DISPLAYA, DISPLAYB, POPSDMMC4, RSVD, INPUT, 0x3298),
283 PINGROUP(GPIO_PBB4, CAM, VGP4, DISPLAYA, DISPLAYB, POPSDMMC4, RSVD, INPUT, 0x329c),
284 PINGROUP(GPIO_PBB5, CAM, VGP5, DISPLAYA, DISPLAYB, POPSDMMC4, RSVD, INPUT, 0x32a0),
285 PINGROUP(GPIO_PBB6, CAM, VGP6, DISPLAYA, DISPLAYB, POPSDMMC4, RSVD, INPUT, 0x32a4),
286 PINGROUP(GPIO_PBB7, CAM, I2S4, RSVD1, RSVD2, POPSDMMC4, RSVD, INPUT, 0x32a8),
287 PINGROUP(GPIO_PCC2, CAM, I2S4, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x32ac),
288 PINGROUP(JTAG_RTCK, SYS, RTCK, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x32b0),
289 PINGROUP(PWR_I2C_SCL, SYS, I2CPWR, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x32b4),
290 PINGROUP(PWR_I2C_SDA, SYS, I2CPWR, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x32b8),
291 PINGROUP(KB_ROW0, SYS, KBC, INVALID, RSVD2, RSVD3, RSVD, INPUT, 0x32bc),
292 PINGROUP(KB_ROW1, SYS, KBC, INVALID, RSVD2, RSVD3, RSVD, INPUT, 0x32c0),
293 PINGROUP(KB_ROW2, SYS, KBC, INVALID, RSVD2, RSVD3, RSVD, INPUT, 0x32c4),
294 PINGROUP(KB_ROW3, SYS, KBC, INVALID, RSVD2, INVALID, RSVD, INPUT, 0x32c8),
295 PINGROUP(KB_ROW4, SYS, KBC, INVALID, TRACE, RSVD3, RSVD, INPUT, 0x32cc),
296 PINGROUP(KB_ROW5, SYS, KBC, INVALID, TRACE, OWR, RSVD, INPUT, 0x32d0),
297 PINGROUP(KB_ROW6, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32d4),
298 PINGROUP(KB_ROW7, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32d8),
299 PINGROUP(KB_ROW8, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32dc),
300 PINGROUP(KB_ROW9, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32e0),
301 PINGROUP(KB_ROW10, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32e4),
302 PINGROUP(KB_ROW11, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32e8),
303 PINGROUP(KB_ROW12, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32ec),
304 PINGROUP(KB_ROW13, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32f0),
305 PINGROUP(KB_ROW14, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32f4),
306 PINGROUP(KB_ROW15, SYS, KBC, INVALID, SDIO2, INVALID, RSVD, INPUT, 0x32f8),
307 PINGROUP(KB_COL0, SYS, KBC, INVALID, TRACE, INVALID, RSVD, INPUT, 0x32fc),
308 PINGROUP(KB_COL1, SYS, KBC, INVALID, TRACE, INVALID, RSVD, INPUT, 0x3300),
309 PINGROUP(KB_COL2, SYS, KBC, INVALID, TRACE, RSVD, RSVD, INPUT, 0x3304),
310 PINGROUP(KB_COL3, SYS, KBC, INVALID, TRACE, RSVD, RSVD, INPUT, 0x3308),
311 PINGROUP(KB_COL4, SYS, KBC, INVALID, TRACE, RSVD, RSVD, INPUT, 0x330c),
312 PINGROUP(KB_COL5, SYS, KBC, INVALID, TRACE, RSVD, RSVD, INPUT, 0x3310),
313 PINGROUP(KB_COL6, SYS, KBC, INVALID, TRACE, INVALID, RSVD, INPUT, 0x3314),
314 PINGROUP(KB_COL7, SYS, KBC, INVALID, TRACE, INVALID, RSVD, INPUT, 0x3318),
315 PINGROUP(CLK_32K_OUT, SYS, BLINK, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x331c),
316 PINGROUP(SYS_CLK_REQ, SYS, SYSCLK, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x3320),
317 PINGROUP(CORE_PWR_REQ, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3324),
318 PINGROUP(CPU_PWR_REQ, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3328),
319 PINGROUP(PWR_INT_N, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x332c),
320 PINGROUP(CLK_32K_IN, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3330),
321 PINGROUP(OWR, SYS, OWR, RSVD, RSVD, RSVD, RSVD, INPUT, 0x3334),
322 PINGROUP(DAP1_FS, AUDIO, I2S0, HDA, GMI, SDIO2, RSVD, INPUT, 0x3338),
323 PINGROUP(DAP1_DIN, AUDIO, I2S0, HDA, GMI, SDIO2, RSVD, INPUT, 0x333c),
324 PINGROUP(DAP1_DOUT, AUDIO, I2S0, HDA, GMI, SDIO2, RSVD, INPUT, 0x3340),
325 PINGROUP(DAP1_SCLK, AUDIO, I2S0, HDA, GMI, SDIO2, RSVD, INPUT, 0x3344),
326 PINGROUP(CLK1_REQ, AUDIO, DAP, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x3348),
327 PINGROUP(CLK1_OUT, AUDIO, EXTPERIPH1, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x334c),
328 PINGROUP(SPDIF_IN, AUDIO, SPDIF, HDA, INVALID, DAPSDMMC2, RSVD, INPUT, 0x3350),
329 PINGROUP(SPDIF_OUT, AUDIO, SPDIF, RSVD1, INVALID, DAPSDMMC2, RSVD, INPUT, 0x3354),
330 PINGROUP(DAP2_FS, AUDIO, I2S1, HDA, RSVD2, GMI, RSVD, INPUT, 0x3358),
331 PINGROUP(DAP2_DIN, AUDIO, I2S1, HDA, RSVD2, GMI, RSVD, INPUT, 0x335c),
332 PINGROUP(DAP2_DOUT, AUDIO, I2S1, HDA, RSVD2, GMI, RSVD, INPUT, 0x3360),
333 PINGROUP(DAP2_SCLK, AUDIO, I2S1, HDA, RSVD2, GMI, RSVD, INPUT, 0x3364),
334 PINGROUP(SPI2_MOSI, AUDIO, SPI6, SPI2, INVALID, GMI, RSVD, INPUT, 0x3368),
335 PINGROUP(SPI2_MISO, AUDIO, SPI6, SPI2, INVALID, GMI, RSVD, INPUT, 0x336c),
336 PINGROUP(SPI2_CS0_N, AUDIO, SPI6, SPI2, INVALID, GMI, RSVD, INPUT, 0x3370),
337 PINGROUP(SPI2_SCK, AUDIO, SPI6, SPI2, INVALID, GMI, RSVD, INPUT, 0x3374),
338 PINGROUP(SPI1_MOSI, AUDIO, SPI2, SPI1, INVALID, GMI, RSVD, INPUT, 0x3378),
339 PINGROUP(SPI1_SCK, AUDIO, SPI2, SPI1, INVALID, GMI, RSVD, INPUT, 0x337c),
340 PINGROUP(SPI1_CS0_N, AUDIO, SPI2, SPI1, INVALID, GMI, RSVD, INPUT, 0x3380),
341 PINGROUP(SPI1_MISO, AUDIO, INVALID, SPI1, INVALID, RSVD3, RSVD, INPUT, 0x3384),
342 PINGROUP(SPI2_CS1_N, AUDIO, INVALID, SPI2, INVALID, INVALID, RSVD, INPUT, 0x3388),
343 PINGROUP(SPI2_CS2_N, AUDIO, INVALID, SPI2, INVALID, INVALID, RSVD, INPUT, 0x338c),
344 PINGROUP(SDMMC3_CLK, SDMMC3, UARTA, PWM2, SDIO3, INVALID, RSVD, INPUT, 0x3390),
345 PINGROUP(SDMMC3_CMD, SDMMC3, UARTA, PWM3, SDIO3, INVALID, RSVD, INPUT, 0x3394),
346 PINGROUP(SDMMC3_DAT0, SDMMC3, RSVD, RSVD1, SDIO3, INVALID, RSVD, INPUT, 0x3398),
347 PINGROUP(SDMMC3_DAT1, SDMMC3, RSVD, RSVD1, SDIO3, INVALID, RSVD, INPUT, 0x339c),
348 PINGROUP(SDMMC3_DAT2, SDMMC3, RSVD, PWM1, SDIO3, INVALID, RSVD, INPUT, 0x33a0),
349 PINGROUP(SDMMC3_DAT3, SDMMC3, RSVD, PWM0, SDIO3, INVALID, RSVD, INPUT, 0x33a4),
350 PINGROUP(SDMMC3_DAT4, SDMMC3, PWM1, INVALID, SDIO3, INVALID, RSVD, INPUT, 0x33a8),
351 PINGROUP(SDMMC3_DAT5, SDMMC3, PWM0, INVALID, SDIO3, INVALID, RSVD, INPUT, 0x33ac),
352 PINGROUP(SDMMC3_DAT6, SDMMC3, SPDIF, INVALID, SDIO3, INVALID, RSVD, INPUT, 0x33b0),
353 PINGROUP(SDMMC3_DAT7, SDMMC3, SPDIF, INVALID, SDIO3, INVALID, RSVD, INPUT, 0x33b4),
354 PINGROUP(PEX_L0_PRSNT_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33b8),
355 PINGROUP(PEX_L0_RST_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33bc),
356 PINGROUP(PEX_L0_CLKREQ_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33c0),
357 PINGROUP(PEX_WAKE_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33c4),
358 PINGROUP(PEX_L1_PRSNT_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33c8),
359 PINGROUP(PEX_L1_RST_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33cc),
360 PINGROUP(PEX_L1_CLKREQ_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33d0),
361 PINGROUP(PEX_L2_PRSNT_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33d4),
362 PINGROUP(PEX_L2_RST_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33d8),
363 PINGROUP(PEX_L2_CLKREQ_N, PEXCTL, PCIE, HDA, RSVD2, RSVD3, RSVD, INPUT, 0x33dc),
364 PINGROUP(HDMI_CEC, SYS, CEC, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x33e0),
365};
366
367void __devinit tegra30_pinmux_init(const struct tegra_pingroup_desc **pg,
368 int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,
369 int *pgdrive_max)
370{
371 *pg = tegra_soc_pingroups;
372 *pg_max = TEGRA_MAX_PINGROUP;
373 *pgdrive = tegra_soc_drive_pingroups;
374 *pgdrive_max = TEGRA_MAX_DRIVE_PINGROUP;
375}
376
diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c
index 1d201650d7a4..ac35d2b76850 100644
--- a/arch/arm/mach-tegra/pinmux.c
+++ b/arch/arm/mach-tegra/pinmux.c
@@ -21,6 +21,7 @@
21#include <linux/spinlock.h> 21#include <linux/spinlock.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/of_device.h>
24 25
25#include <mach/iomap.h> 26#include <mach/iomap.h>
26#include <mach/pinmux.h> 27#include <mach/pinmux.h>
@@ -33,8 +34,10 @@
33#define SLWR(reg) (((reg) >> 28) & 0x3) 34#define SLWR(reg) (((reg) >> 28) & 0x3)
34#define SLWF(reg) (((reg) >> 30) & 0x3) 35#define SLWF(reg) (((reg) >> 30) & 0x3)
35 36
36static const struct tegra_pingroup_desc *const pingroups = tegra_soc_pingroups; 37static const struct tegra_pingroup_desc *pingroups;
37static const struct tegra_drive_pingroup_desc *const drive_pingroups = tegra_soc_drive_pingroups; 38static const struct tegra_drive_pingroup_desc *drive_pingroups;
39static int pingroup_max;
40static int drive_max;
38 41
39static char *tegra_mux_names[TEGRA_MAX_MUX] = { 42static char *tegra_mux_names[TEGRA_MAX_MUX] = {
40 [TEGRA_MUX_AHB_CLK] = "AHB_CLK", 43 [TEGRA_MUX_AHB_CLK] = "AHB_CLK",
@@ -97,6 +100,49 @@ static char *tegra_mux_names[TEGRA_MAX_MUX] = {
97 [TEGRA_MUX_VI] = "VI", 100 [TEGRA_MUX_VI] = "VI",
98 [TEGRA_MUX_VI_SENSOR_CLK] = "VI_SENSOR_CLK", 101 [TEGRA_MUX_VI_SENSOR_CLK] = "VI_SENSOR_CLK",
99 [TEGRA_MUX_XIO] = "XIO", 102 [TEGRA_MUX_XIO] = "XIO",
103 [TEGRA_MUX_BLINK] = "BLINK",
104 [TEGRA_MUX_CEC] = "CEC",
105 [TEGRA_MUX_CLK12] = "CLK12",
106 [TEGRA_MUX_DAP] = "DAP",
107 [TEGRA_MUX_DAPSDMMC2] = "DAPSDMMC2",
108 [TEGRA_MUX_DDR] = "DDR",
109 [TEGRA_MUX_DEV3] = "DEV3",
110 [TEGRA_MUX_DTV] = "DTV",
111 [TEGRA_MUX_VI_ALT1] = "VI_ALT1",
112 [TEGRA_MUX_VI_ALT2] = "VI_ALT2",
113 [TEGRA_MUX_VI_ALT3] = "VI_ALT3",
114 [TEGRA_MUX_EMC_DLL] = "EMC_DLL",
115 [TEGRA_MUX_EXTPERIPH1] = "EXTPERIPH1",
116 [TEGRA_MUX_EXTPERIPH2] = "EXTPERIPH2",
117 [TEGRA_MUX_EXTPERIPH3] = "EXTPERIPH3",
118 [TEGRA_MUX_GMI_ALT] = "GMI_ALT",
119 [TEGRA_MUX_HDA] = "HDA",
120 [TEGRA_MUX_HSI] = "HSI",
121 [TEGRA_MUX_I2C4] = "I2C4",
122 [TEGRA_MUX_I2C5] = "I2C5",
123 [TEGRA_MUX_I2CPWR] = "I2CPWR",
124 [TEGRA_MUX_I2S0] = "I2S0",
125 [TEGRA_MUX_I2S1] = "I2S1",
126 [TEGRA_MUX_I2S2] = "I2S2",
127 [TEGRA_MUX_I2S3] = "I2S3",
128 [TEGRA_MUX_I2S4] = "I2S4",
129 [TEGRA_MUX_NAND_ALT] = "NAND_ALT",
130 [TEGRA_MUX_POPSDIO4] = "POPSDIO4",
131 [TEGRA_MUX_POPSDMMC4] = "POPSDMMC4",
132 [TEGRA_MUX_PWM0] = "PWM0",
133 [TEGRA_MUX_PWM1] = "PWM2",
134 [TEGRA_MUX_PWM2] = "PWM2",
135 [TEGRA_MUX_PWM3] = "PWM3",
136 [TEGRA_MUX_SATA] = "SATA",
137 [TEGRA_MUX_SPI5] = "SPI5",
138 [TEGRA_MUX_SPI6] = "SPI6",
139 [TEGRA_MUX_SYSCLK] = "SYSCLK",
140 [TEGRA_MUX_VGP1] = "VGP1",
141 [TEGRA_MUX_VGP2] = "VGP2",
142 [TEGRA_MUX_VGP3] = "VGP3",
143 [TEGRA_MUX_VGP4] = "VGP4",
144 [TEGRA_MUX_VGP5] = "VGP5",
145 [TEGRA_MUX_VGP6] = "VGP6",
100 [TEGRA_MUX_SAFE] = "<safe>", 146 [TEGRA_MUX_SAFE] = "<safe>",
101}; 147};
102 148
@@ -116,9 +162,9 @@ static const char *tegra_slew_names[TEGRA_MAX_SLEW] = {
116 162
117static DEFINE_SPINLOCK(mux_lock); 163static DEFINE_SPINLOCK(mux_lock);
118 164
119static const char *pingroup_name(enum tegra_pingroup pg) 165static const char *pingroup_name(int pg)
120{ 166{
121 if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) 167 if (pg < 0 || pg >= pingroup_max)
122 return "<UNKNOWN>"; 168 return "<UNKNOWN>";
123 169
124 return pingroups[pg].name; 170 return pingroups[pg].name;
@@ -189,10 +235,10 @@ static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config)
189 int i; 235 int i;
190 unsigned long reg; 236 unsigned long reg;
191 unsigned long flags; 237 unsigned long flags;
192 enum tegra_pingroup pg = config->pingroup; 238 int pg = config->pingroup;
193 enum tegra_mux_func func = config->func; 239 enum tegra_mux_func func = config->func;
194 240
195 if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) 241 if (pg < 0 || pg >= pingroup_max)
196 return -ERANGE; 242 return -ERANGE;
197 243
198 if (pingroups[pg].mux_reg < 0) 244 if (pingroups[pg].mux_reg < 0)
@@ -230,13 +276,12 @@ static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config)
230 return 0; 276 return 0;
231} 277}
232 278
233int tegra_pinmux_set_tristate(enum tegra_pingroup pg, 279int tegra_pinmux_set_tristate(int pg, enum tegra_tristate tristate)
234 enum tegra_tristate tristate)
235{ 280{
236 unsigned long reg; 281 unsigned long reg;
237 unsigned long flags; 282 unsigned long flags;
238 283
239 if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) 284 if (pg < 0 || pg >= pingroup_max)
240 return -ERANGE; 285 return -ERANGE;
241 286
242 if (pingroups[pg].tri_reg < 0) 287 if (pingroups[pg].tri_reg < 0)
@@ -255,13 +300,12 @@ int tegra_pinmux_set_tristate(enum tegra_pingroup pg,
255 return 0; 300 return 0;
256} 301}
257 302
258int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, 303int tegra_pinmux_set_pullupdown(int pg, enum tegra_pullupdown pupd)
259 enum tegra_pullupdown pupd)
260{ 304{
261 unsigned long reg; 305 unsigned long reg;
262 unsigned long flags; 306 unsigned long flags;
263 307
264 if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) 308 if (pg < 0 || pg >= pingroup_max)
265 return -ERANGE; 309 return -ERANGE;
266 310
267 if (pingroups[pg].pupd_reg < 0) 311 if (pingroups[pg].pupd_reg < 0)
@@ -287,7 +331,7 @@ int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg,
287 331
288static void tegra_pinmux_config_pingroup(const struct tegra_pingroup_config *config) 332static void tegra_pinmux_config_pingroup(const struct tegra_pingroup_config *config)
289{ 333{
290 enum tegra_pingroup pingroup = config->pingroup; 334 int pingroup = config->pingroup;
291 enum tegra_mux_func func = config->func; 335 enum tegra_mux_func func = config->func;
292 enum tegra_pullupdown pupd = config->pupd; 336 enum tegra_pullupdown pupd = config->pupd;
293 enum tegra_tristate tristate = config->tristate; 337 enum tegra_tristate tristate = config->tristate;
@@ -323,9 +367,9 @@ void tegra_pinmux_config_table(const struct tegra_pingroup_config *config, int l
323 tegra_pinmux_config_pingroup(&config[i]); 367 tegra_pinmux_config_pingroup(&config[i]);
324} 368}
325 369
326static const char *drive_pinmux_name(enum tegra_drive_pingroup pg) 370static const char *drive_pinmux_name(int pg)
327{ 371{
328 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 372 if (pg < 0 || pg >= drive_max)
329 return "<UNKNOWN>"; 373 return "<UNKNOWN>";
330 374
331 return drive_pingroups[pg].name; 375 return drive_pingroups[pg].name;
@@ -352,12 +396,11 @@ static const char *slew_name(unsigned long val)
352 return tegra_slew_names[val]; 396 return tegra_slew_names[val];
353} 397}
354 398
355static int tegra_drive_pinmux_set_hsm(enum tegra_drive_pingroup pg, 399static int tegra_drive_pinmux_set_hsm(int pg, enum tegra_hsm hsm)
356 enum tegra_hsm hsm)
357{ 400{
358 unsigned long flags; 401 unsigned long flags;
359 u32 reg; 402 u32 reg;
360 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 403 if (pg < 0 || pg >= drive_max)
361 return -ERANGE; 404 return -ERANGE;
362 405
363 if (hsm != TEGRA_HSM_ENABLE && hsm != TEGRA_HSM_DISABLE) 406 if (hsm != TEGRA_HSM_ENABLE && hsm != TEGRA_HSM_DISABLE)
@@ -377,12 +420,11 @@ static int tegra_drive_pinmux_set_hsm(enum tegra_drive_pingroup pg,
377 return 0; 420 return 0;
378} 421}
379 422
380static int tegra_drive_pinmux_set_schmitt(enum tegra_drive_pingroup pg, 423static int tegra_drive_pinmux_set_schmitt(int pg, enum tegra_schmitt schmitt)
381 enum tegra_schmitt schmitt)
382{ 424{
383 unsigned long flags; 425 unsigned long flags;
384 u32 reg; 426 u32 reg;
385 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 427 if (pg < 0 || pg >= drive_max)
386 return -ERANGE; 428 return -ERANGE;
387 429
388 if (schmitt != TEGRA_SCHMITT_ENABLE && schmitt != TEGRA_SCHMITT_DISABLE) 430 if (schmitt != TEGRA_SCHMITT_ENABLE && schmitt != TEGRA_SCHMITT_DISABLE)
@@ -402,12 +444,11 @@ static int tegra_drive_pinmux_set_schmitt(enum tegra_drive_pingroup pg,
402 return 0; 444 return 0;
403} 445}
404 446
405static int tegra_drive_pinmux_set_drive(enum tegra_drive_pingroup pg, 447static int tegra_drive_pinmux_set_drive(int pg, enum tegra_drive drive)
406 enum tegra_drive drive)
407{ 448{
408 unsigned long flags; 449 unsigned long flags;
409 u32 reg; 450 u32 reg;
410 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 451 if (pg < 0 || pg >= drive_max)
411 return -ERANGE; 452 return -ERANGE;
412 453
413 if (drive < 0 || drive >= TEGRA_MAX_DRIVE) 454 if (drive < 0 || drive >= TEGRA_MAX_DRIVE)
@@ -425,12 +466,12 @@ static int tegra_drive_pinmux_set_drive(enum tegra_drive_pingroup pg,
425 return 0; 466 return 0;
426} 467}
427 468
428static int tegra_drive_pinmux_set_pull_down(enum tegra_drive_pingroup pg, 469static int tegra_drive_pinmux_set_pull_down(int pg,
429 enum tegra_pull_strength pull_down) 470 enum tegra_pull_strength pull_down)
430{ 471{
431 unsigned long flags; 472 unsigned long flags;
432 u32 reg; 473 u32 reg;
433 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 474 if (pg < 0 || pg >= drive_max)
434 return -ERANGE; 475 return -ERANGE;
435 476
436 if (pull_down < 0 || pull_down >= TEGRA_MAX_PULL) 477 if (pull_down < 0 || pull_down >= TEGRA_MAX_PULL)
@@ -448,12 +489,12 @@ static int tegra_drive_pinmux_set_pull_down(enum tegra_drive_pingroup pg,
448 return 0; 489 return 0;
449} 490}
450 491
451static int tegra_drive_pinmux_set_pull_up(enum tegra_drive_pingroup pg, 492static int tegra_drive_pinmux_set_pull_up(int pg,
452 enum tegra_pull_strength pull_up) 493 enum tegra_pull_strength pull_up)
453{ 494{
454 unsigned long flags; 495 unsigned long flags;
455 u32 reg; 496 u32 reg;
456 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 497 if (pg < 0 || pg >= drive_max)
457 return -ERANGE; 498 return -ERANGE;
458 499
459 if (pull_up < 0 || pull_up >= TEGRA_MAX_PULL) 500 if (pull_up < 0 || pull_up >= TEGRA_MAX_PULL)
@@ -471,12 +512,12 @@ static int tegra_drive_pinmux_set_pull_up(enum tegra_drive_pingroup pg,
471 return 0; 512 return 0;
472} 513}
473 514
474static int tegra_drive_pinmux_set_slew_rising(enum tegra_drive_pingroup pg, 515static int tegra_drive_pinmux_set_slew_rising(int pg,
475 enum tegra_slew slew_rising) 516 enum tegra_slew slew_rising)
476{ 517{
477 unsigned long flags; 518 unsigned long flags;
478 u32 reg; 519 u32 reg;
479 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 520 if (pg < 0 || pg >= drive_max)
480 return -ERANGE; 521 return -ERANGE;
481 522
482 if (slew_rising < 0 || slew_rising >= TEGRA_MAX_SLEW) 523 if (slew_rising < 0 || slew_rising >= TEGRA_MAX_SLEW)
@@ -494,12 +535,12 @@ static int tegra_drive_pinmux_set_slew_rising(enum tegra_drive_pingroup pg,
494 return 0; 535 return 0;
495} 536}
496 537
497static int tegra_drive_pinmux_set_slew_falling(enum tegra_drive_pingroup pg, 538static int tegra_drive_pinmux_set_slew_falling(int pg,
498 enum tegra_slew slew_falling) 539 enum tegra_slew slew_falling)
499{ 540{
500 unsigned long flags; 541 unsigned long flags;
501 u32 reg; 542 u32 reg;
502 if (pg < 0 || pg >= TEGRA_MAX_DRIVE_PINGROUP) 543 if (pg < 0 || pg >= drive_max)
503 return -ERANGE; 544 return -ERANGE;
504 545
505 if (slew_falling < 0 || slew_falling >= TEGRA_MAX_SLEW) 546 if (slew_falling < 0 || slew_falling >= TEGRA_MAX_SLEW)
@@ -517,7 +558,7 @@ static int tegra_drive_pinmux_set_slew_falling(enum tegra_drive_pingroup pg,
517 return 0; 558 return 0;
518} 559}
519 560
520static void tegra_drive_pinmux_config_pingroup(enum tegra_drive_pingroup pingroup, 561static void tegra_drive_pinmux_config_pingroup(int pingroup,
521 enum tegra_hsm hsm, 562 enum tegra_hsm hsm,
522 enum tegra_schmitt schmitt, 563 enum tegra_schmitt schmitt,
523 enum tegra_drive drive, 564 enum tegra_drive drive,
@@ -596,7 +637,7 @@ void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *conf
596 for (i = 0; i < len; i++) { 637 for (i = 0; i < len; i++) {
597 int err; 638 int err;
598 c = config[i]; 639 c = config[i];
599 if (c.pingroup < 0 || c.pingroup >= TEGRA_MAX_PINGROUP) { 640 if (c.pingroup < 0 || c.pingroup >= pingroup_max) {
600 WARN_ON(1); 641 WARN_ON(1);
601 continue; 642 continue;
602 } 643 }
@@ -617,7 +658,7 @@ void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config
617 for (i = 0; i < len; i++) { 658 for (i = 0; i < len; i++) {
618 int err; 659 int err;
619 if (config[i].pingroup < 0 || 660 if (config[i].pingroup < 0 ||
620 config[i].pingroup >= TEGRA_MAX_PINGROUP) { 661 config[i].pingroup >= pingroup_max) {
621 WARN_ON(1); 662 WARN_ON(1);
622 continue; 663 continue;
623 } 664 }
@@ -635,7 +676,7 @@ void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *conf
635{ 676{
636 int i; 677 int i;
637 int err; 678 int err;
638 enum tegra_pingroup pingroup; 679 int pingroup;
639 680
640 for (i = 0; i < len; i++) { 681 for (i = 0; i < len; i++) {
641 pingroup = config[i].pingroup; 682 pingroup = config[i].pingroup;
@@ -654,7 +695,7 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
654{ 695{
655 int i; 696 int i;
656 int err; 697 int err;
657 enum tegra_pingroup pingroup; 698 int pingroup;
658 699
659 for (i = 0; i < len; i++) { 700 for (i = 0; i < len; i++) {
660 pingroup = config[i].pingroup; 701 pingroup = config[i].pingroup;
@@ -668,11 +709,36 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co
668 } 709 }
669} 710}
670 711
712static struct of_device_id tegra_pinmux_of_match[] __devinitdata = {
713#ifdef CONFIG_ARCH_TEGRA_2x_SOC
714 { .compatible = "nvidia,tegra20-pinmux", tegra20_pinmux_init },
715#endif
716#ifdef CONFIG_ARCH_TEGRA_3x_SOC
717 { .compatible = "nvidia,tegra30-pinmux", tegra30_pinmux_init },
718#endif
719 { },
720};
721
671static int __devinit tegra_pinmux_probe(struct platform_device *pdev) 722static int __devinit tegra_pinmux_probe(struct platform_device *pdev)
672{ 723{
673 struct resource *res; 724 struct resource *res;
674 int i; 725 int i;
675 int config_bad = 0; 726 int config_bad = 0;
727 const struct of_device_id *match;
728
729 match = of_match_device(tegra_pinmux_of_match, &pdev->dev);
730
731 if (match)
732 ((pinmux_init)(match->data))(&pingroups, &pingroup_max,
733 &drive_pingroups, &drive_max);
734#ifdef CONFIG_ARCH_TEGRA_2x_SOC
735 else
736 /* no device tree available, so we must be on tegra20 */
737 tegra20_pinmux_init(&pingroups, &pingroup_max,
738 &drive_pingroups, &drive_max);
739#else
740 pr_warn("non Tegra20 platform requires pinmux devicetree node\n");
741#endif
676 742
677 for (i = 0; ; i++) { 743 for (i = 0; ; i++) {
678 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 744 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
@@ -681,7 +747,7 @@ static int __devinit tegra_pinmux_probe(struct platform_device *pdev)
681 } 747 }
682 nbanks = i; 748 nbanks = i;
683 749
684 for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { 750 for (i = 0; i < pingroup_max; i++) {
685 if (pingroups[i].tri_bank >= nbanks) { 751 if (pingroups[i].tri_bank >= nbanks) {
686 dev_err(&pdev->dev, "pingroup %d: bad tri_bank\n", i); 752 dev_err(&pdev->dev, "pingroup %d: bad tri_bank\n", i);
687 config_bad = 1; 753 config_bad = 1;
@@ -698,7 +764,7 @@ static int __devinit tegra_pinmux_probe(struct platform_device *pdev)
698 } 764 }
699 } 765 }
700 766
701 for (i = 0; i < TEGRA_MAX_DRIVE_PINGROUP; i++) { 767 for (i = 0; i < drive_max; i++) {
702 if (drive_pingroups[i].reg_bank >= nbanks) { 768 if (drive_pingroups[i].reg_bank >= nbanks) {
703 dev_err(&pdev->dev, 769 dev_err(&pdev->dev,
704 "drive pingroup %d: bad reg_bank\n", i); 770 "drive pingroup %d: bad reg_bank\n", i);
@@ -741,11 +807,6 @@ static int __devinit tegra_pinmux_probe(struct platform_device *pdev)
741 return 0; 807 return 0;
742} 808}
743 809
744static struct of_device_id tegra_pinmux_of_match[] __devinitdata = {
745 { .compatible = "nvidia,tegra20-pinmux", },
746 { },
747};
748
749static struct platform_driver tegra_pinmux_driver = { 810static struct platform_driver tegra_pinmux_driver = {
750 .driver = { 811 .driver = {
751 .name = "tegra-pinmux", 812 .name = "tegra-pinmux",
@@ -779,7 +840,7 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused)
779 int i; 840 int i;
780 int len; 841 int len;
781 842
782 for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { 843 for (i = 0; i < pingroup_max; i++) {
783 unsigned long reg; 844 unsigned long reg;
784 unsigned long tri; 845 unsigned long tri;
785 unsigned long mux; 846 unsigned long mux;
@@ -850,7 +911,7 @@ static int dbg_drive_pinmux_show(struct seq_file *s, void *unused)
850 int i; 911 int i;
851 int len; 912 int len;
852 913
853 for (i = 0; i < TEGRA_MAX_DRIVE_PINGROUP; i++) { 914 for (i = 0; i < drive_max; i++) {
854 u32 reg; 915 u32 reg;
855 916
856 seq_printf(s, "\t{TEGRA_DRIVE_PINGROUP_%s", 917 seq_printf(s, "\t{TEGRA_DRIVE_PINGROUP_%s",
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 371869d8ea01..ff9e6b6c0460 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -174,7 +174,7 @@ static int tegra_periph_clk_enable_refcount[3 * 32];
174#define pmc_readl(reg) \ 174#define pmc_readl(reg) \
175 __raw_readl(reg_pmc_base + (reg)) 175 __raw_readl(reg_pmc_base + (reg))
176 176
177unsigned long clk_measure_input_freq(void) 177static unsigned long clk_measure_input_freq(void)
178{ 178{
179 u32 clock_autodetect; 179 u32 clock_autodetect;
180 clk_writel(OSC_FREQ_DET_TRIG | 1, OSC_FREQ_DET); 180 clk_writel(OSC_FREQ_DET_TRIG | 1, OSC_FREQ_DET);
@@ -278,18 +278,6 @@ static struct clk_ops tegra_clk_m_ops = {
278 .disable = tegra2_clk_m_disable, 278 .disable = tegra2_clk_m_disable,
279}; 279};
280 280
281void tegra2_periph_reset_assert(struct clk *c)
282{
283 BUG_ON(!c->ops->reset);
284 c->ops->reset(c, true);
285}
286
287void tegra2_periph_reset_deassert(struct clk *c)
288{
289 BUG_ON(!c->ops->reset);
290 c->ops->reset(c, false);
291}
292
293/* super clock functions */ 281/* super clock functions */
294/* "super clocks" on tegra have two-stage muxes and a clock skipping 282/* "super clocks" on tegra have two-stage muxes and a clock skipping
295 * super divider. We will ignore the clock skipping divider, since we 283 * super divider. We will ignore the clock skipping divider, since we
@@ -1132,6 +1120,9 @@ static struct clk_ops tegra_periph_clk_ops = {
1132void tegra2_sdmmc_tap_delay(struct clk *c, int delay) 1120void tegra2_sdmmc_tap_delay(struct clk *c, int delay)
1133{ 1121{
1134 u32 reg; 1122 u32 reg;
1123 unsigned long flags;
1124
1125 spin_lock_irqsave(&c->spinlock, flags);
1135 1126
1136 delay = clamp(delay, 0, 15); 1127 delay = clamp(delay, 0, 15);
1137 reg = clk_readl(c->reg); 1128 reg = clk_readl(c->reg);
@@ -1139,6 +1130,8 @@ void tegra2_sdmmc_tap_delay(struct clk *c, int delay)
1139 reg |= SDMMC_CLK_INT_FB_SEL; 1130 reg |= SDMMC_CLK_INT_FB_SEL;
1140 reg |= delay << SDMMC_CLK_INT_FB_DLY_SHIFT; 1131 reg |= delay << SDMMC_CLK_INT_FB_DLY_SHIFT;
1141 clk_writel(reg, c->reg); 1132 clk_writel(reg, c->reg);
1133
1134 spin_unlock_irqrestore(&c->spinlock, flags);
1142} 1135}
1143 1136
1144/* External memory controller clock ops */ 1137/* External memory controller clock ops */
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 732c724008b1..1d1acda4f3e0 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -165,20 +165,28 @@ static struct irqaction tegra_timer_irq = {
165static void __init tegra_init_timer(void) 165static void __init tegra_init_timer(void)
166{ 166{
167 struct clk *clk; 167 struct clk *clk;
168 unsigned long rate = clk_measure_input_freq(); 168 unsigned long rate;
169 int ret; 169 int ret;
170 170
171 clk = clk_get_sys("timer", NULL); 171 clk = clk_get_sys("timer", NULL);
172 BUG_ON(IS_ERR(clk)); 172 if (IS_ERR(clk)) {
173 clk_enable(clk); 173 pr_warn("Unable to get timer clock."
174 " Assuming 12Mhz input clock.\n");
175 rate = 12000000;
176 } else {
177 clk_enable(clk);
178 rate = clk_get_rate(clk);
179 }
174 180
175 /* 181 /*
176 * rtc registers are used by read_persistent_clock, keep the rtc clock 182 * rtc registers are used by read_persistent_clock, keep the rtc clock
177 * enabled 183 * enabled
178 */ 184 */
179 clk = clk_get_sys("rtc-tegra", NULL); 185 clk = clk_get_sys("rtc-tegra", NULL);
180 BUG_ON(IS_ERR(clk)); 186 if (IS_ERR(clk))
181 clk_enable(clk); 187 pr_warn("Unable to get rtc-tegra clock\n");
188 else
189 clk_enable(clk);
182 190
183#ifdef CONFIG_HAVE_ARM_TWD 191#ifdef CONFIG_HAVE_ARM_TWD
184 twd_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x600); 192 twd_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x600);
diff --git a/arch/arm/mach-u300/include/mach/memory.h b/arch/arm/mach-u300/include/mach/memory.h
deleted file mode 100644
index c808f347a081..000000000000
--- a/arch/arm/mach-u300/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 *
3 * arch/arm/mach-u300/include/mach/memory.h
4 *
5 *
6 * Copyright (C) 2007-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Memory virtual/physical mapping constants.
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
11 */
12
13#ifndef __MACH_MEMORY_H
14#define __MACH_MEMORY_H
15
16#define PLAT_PHYS_OFFSET UL(0x48000000)
17#define BOOT_PARAMS_OFFSET 0x100
18
19#endif
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index def45bda2932..f30c69d91d99 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -47,7 +47,7 @@ static void __init u300_init_machine(void)
47 47
48MACHINE_START(U300, MACH_U300_STRING) 48MACHINE_START(U300, MACH_U300_STRING)
49 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ 49 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
50 .atag_offset = BOOT_PARAMS_OFFSET, 50 .atag_offset = 0x100,
51 .map_io = u300_map_io, 51 .map_io = u300_map_io,
52 .init_irq = u300_init_irq, 52 .init_irq = u300_init_irq,
53 .handle_irq = vic_handle_irq, 53 .handle_irq = vic_handle_irq,
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 6826faeecc68..23be34b3bb6e 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -22,6 +22,12 @@
22#include "ste-dma40-db8500.h" 22#include "ste-dma40-db8500.h"
23 23
24/* 24/*
25 * v2 has a new version of this block that need to be forced, the number found
26 * in hardware is incorrect
27 */
28#define U8500_SDI_V2_PERIPHID 0x10480180
29
30/*
25 * SDI 0 (MicroSD slot) 31 * SDI 0 (MicroSD slot)
26 */ 32 */
27 33
@@ -117,10 +123,7 @@ static void sdi0_configure(void)
117 gpio_direction_output(sdi0_en, 1); 123 gpio_direction_output(sdi0_en, 1);
118 124
119 /* Add the device, force v2 to subrevision 1 */ 125 /* Add the device, force v2 to subrevision 1 */
120 if (cpu_is_u8500v2()) 126 db8500_add_sdi0(&mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
121 db8500_add_sdi0(&mop500_sdi0_data, 0x10480180);
122 else
123 db8500_add_sdi0(&mop500_sdi0_data, 0);
124} 127}
125 128
126void mop500_sdi_tc35892_init(void) 129void mop500_sdi_tc35892_init(void)
@@ -132,6 +135,42 @@ void mop500_sdi_tc35892_init(void)
132} 135}
133 136
134/* 137/*
138 * SDI1 (SDIO WLAN)
139 */
140#ifdef CONFIG_STE_DMA40
141static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
142 .mode = STEDMA40_MODE_LOGICAL,
143 .dir = STEDMA40_PERIPH_TO_MEM,
144 .src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
145 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
146 .src_info.data_width = STEDMA40_WORD_WIDTH,
147 .dst_info.data_width = STEDMA40_WORD_WIDTH,
148};
149
150static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
151 .mode = STEDMA40_MODE_LOGICAL,
152 .dir = STEDMA40_MEM_TO_PERIPH,
153 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
154 .dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
155 .src_info.data_width = STEDMA40_WORD_WIDTH,
156 .dst_info.data_width = STEDMA40_WORD_WIDTH,
157};
158#endif
159
160static struct mmci_platform_data mop500_sdi1_data = {
161 .ocr_mask = MMC_VDD_29_30,
162 .f_max = 50000000,
163 .capabilities = MMC_CAP_4_BIT_DATA,
164 .gpio_cd = -1,
165 .gpio_wp = -1,
166#ifdef CONFIG_STE_DMA40
167 .dma_filter = stedma40_filter,
168 .dma_rx_param = &sdi1_dma_cfg_rx,
169 .dma_tx_param = &sdi1_dma_cfg_tx,
170#endif
171};
172
173/*
135 * SDI 2 (POP eMMC, not on DB8500ed) 174 * SDI 2 (POP eMMC, not on DB8500ed)
136 */ 175 */
137 176
@@ -158,7 +197,8 @@ static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
158static struct mmci_platform_data mop500_sdi2_data = { 197static struct mmci_platform_data mop500_sdi2_data = {
159 .ocr_mask = MMC_VDD_165_195, 198 .ocr_mask = MMC_VDD_165_195,
160 .f_max = 50000000, 199 .f_max = 50000000,
161 .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 200 .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
201 MMC_CAP_MMC_HIGHSPEED,
162 .gpio_cd = -1, 202 .gpio_cd = -1,
163 .gpio_wp = -1, 203 .gpio_wp = -1,
164#ifdef CONFIG_STE_DMA40 204#ifdef CONFIG_STE_DMA40
@@ -208,20 +248,10 @@ static struct mmci_platform_data mop500_sdi4_data = {
208 248
209void __init mop500_sdi_init(void) 249void __init mop500_sdi_init(void)
210{ 250{
211 u32 periphid = 0; 251 /* PoP:ed eMMC */
212 252 db8500_add_sdi2(&mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
213 /* v2 has a new version of this block that need to be forced */
214 if (cpu_is_u8500v2())
215 periphid = 0x10480180;
216 /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */
217 if (!cpu_is_u8500v10())
218 mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
219
220 db8500_add_sdi2(&mop500_sdi2_data, periphid);
221
222 /* On-board eMMC */ 253 /* On-board eMMC */
223 db8500_add_sdi4(&mop500_sdi4_data, periphid); 254 db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
224
225 /* 255 /*
226 * On boards with the TC35892 GPIO expander, sdi0 will finally 256 * On boards with the TC35892 GPIO expander, sdi0 will finally
227 * be added when the TC35892 initializes and calls 257 * be added when the TC35892 initializes and calls
@@ -231,13 +261,9 @@ void __init mop500_sdi_init(void)
231 261
232void __init snowball_sdi_init(void) 262void __init snowball_sdi_init(void)
233{ 263{
234 u32 periphid = 0x10480180;
235
236 mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
237
238 /* On-board eMMC */ 264 /* On-board eMMC */
239 db8500_add_sdi4(&mop500_sdi4_data, periphid); 265 db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
240 266 /* External Micro SD slot */
241 mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO; 267 mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
242 mop500_sdi0_data.cd_invert = true; 268 mop500_sdi0_data.cd_invert = true;
243 sdi0_en = SNOWBALL_SDMMC_EN_GPIO; 269 sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
@@ -247,17 +273,15 @@ void __init snowball_sdi_init(void)
247 273
248void __init hrefv60_sdi_init(void) 274void __init hrefv60_sdi_init(void)
249{ 275{
250 u32 periphid = 0x10480180; 276 /* PoP:ed eMMC */
251 277 db8500_add_sdi2(&mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
252 mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
253
254 db8500_add_sdi2(&mop500_sdi2_data, periphid);
255
256 /* On-board eMMC */ 278 /* On-board eMMC */
257 db8500_add_sdi4(&mop500_sdi4_data, periphid); 279 db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
258 280 /* External Micro SD slot */
259 mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; 281 mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
260 sdi0_en = HREFV60_SDMMC_EN_GPIO; 282 sdi0_en = HREFV60_SDMMC_EN_GPIO;
261 sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO; 283 sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
262 sdi0_configure(); 284 sdi0_configure();
285 /* WLAN SDIO channel */
286 db8500_add_sdi1(&mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
263} 287}
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index de1f5f8f7330..9361a5290177 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -673,7 +673,7 @@ static void __init hrefv60_init_machine(void)
673 ARRAY_SIZE(mop500_platform_devs)); 673 ARRAY_SIZE(mop500_platform_devs));
674 674
675 mop500_i2c_init(); 675 mop500_i2c_init();
676 mop500_sdi_init(); 676 hrefv60_sdi_init();
677 mop500_spi_init(); 677 mop500_spi_init();
678 mop500_uart_init(); 678 mop500_uart_init();
679 679
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index de18a2a23e6e..f926d3db6207 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -7,40 +7,77 @@
7#ifndef __BOARD_MOP500_H 7#ifndef __BOARD_MOP500_H
8#define __BOARD_MOP500_H 8#define __BOARD_MOP500_H
9 9
10/* snowball GPIO for MMC card */ 10/* Snowball specific GPIO assignments, this board has no GPIO expander */
11#define SNOWBALL_SDMMC_EN_GPIO 217 11#define SNOWBALL_ACCEL_INT1_GPIO 163
12#define SNOWBALL_SDMMC_1V8_3V_GPIO 228 12#define SNOWBALL_ACCEL_INT2_GPIO 164
13#define SNOWBALL_SDMMC_CD_GPIO 218 13#define SNOWBALL_MAGNET_DRDY_GPIO 165
14#define SNOWBALL_SDMMC_EN_GPIO 217
15#define SNOWBALL_SDMMC_1V8_3V_GPIO 228
16#define SNOWBALL_SDMMC_CD_GPIO 218
14 17
15/* HREFv60-specific GPIO assignments, this board has no GPIO expander */ 18/* HREFv60-specific GPIO assignments, this board has no GPIO expander */
16#define HREFV60_TOUCH_RST_GPIO 143
17#define HREFV60_PROX_SENSE_GPIO 217
18#define HREFV60_HAL_SW_GPIO 145
19#define HREFV60_SDMMC_EN_GPIO 169
20#define HREFV60_SDMMC_1V8_3V_GPIO 5 19#define HREFV60_SDMMC_1V8_3V_GPIO 5
21#define HREFV60_SDMMC_CD_GPIO 95 20#define HREFV60_CAMERA_FLASH_ENABLE 21
22#define HREFV60_ACCEL_INT1_GPIO 82
23#define HREFV60_ACCEL_INT2_GPIO 83
24#define HREFV60_MAGNET_DRDY_GPIO 32 21#define HREFV60_MAGNET_DRDY_GPIO 32
25#define HREFV60_DISP1_RST_GPIO 65 22#define HREFV60_DISP1_RST_GPIO 65
26#define HREFV60_DISP2_RST_GPIO 66 23#define HREFV60_DISP2_RST_GPIO 66
24#define HREFV60_ACCEL_INT1_GPIO 82
25#define HREFV60_ACCEL_INT2_GPIO 83
26#define HREFV60_SDMMC_CD_GPIO 95
27#define HREFV60_XSHUTDOWN_SECONDARY_SENSOR 140
28#define HREFV60_TOUCH_RST_GPIO 143
29#define HREFV60_HAL_SW_GPIO 145
30#define HREFV60_SDMMC_EN_GPIO 169
31#define HREFV60_MMIO_XENON_CHARGE 170
32#define HREFV60_PROX_SENSE_GPIO 217
33
34/* MOP500 generic GPIOs */
35#define CAMERA_FLASH_INT_PIN 7
36#define CYPRESS_TOUCH_INT_PIN 84
37#define XSHUTDOWN_PRIMARY_SENSOR 141
38#define XSHUTDOWN_SECONDARY_SENSOR 142
39#define CYPRESS_TOUCH_RST_GPIO 143
40#define MOP500_HDMI_RST_GPIO 196
41#define CYPRESS_SLAVE_SELECT_GPIO 216
27 42
28/* GPIOs on the TC35892 expander */ 43/* GPIOs on the TC35892 expander */
29#define MOP500_EGPIO(x) (NOMADIK_NR_GPIO + (x)) 44#define MOP500_EGPIO(x) (NOMADIK_NR_GPIO + (x))
45#define GPIO_MAGNET_DRDY MOP500_EGPIO(1)
30#define GPIO_SDMMC_CD MOP500_EGPIO(3) 46#define GPIO_SDMMC_CD MOP500_EGPIO(3)
47#define GPIO_CAMERA_FLASH_ENABLE MOP500_EGPIO(4)
48#define GPIO_MMIO_XENON_CHARGE MOP500_EGPIO(5)
31#define GPIO_PROX_SENSOR MOP500_EGPIO(7) 49#define GPIO_PROX_SENSOR MOP500_EGPIO(7)
50#define GPIO_HAL_SENSOR MOP500_EGPIO(8)
51#define GPIO_ACCEL_INT1 MOP500_EGPIO(10)
52#define GPIO_ACCEL_INT2 MOP500_EGPIO(11)
32#define GPIO_BU21013_CS MOP500_EGPIO(13) 53#define GPIO_BU21013_CS MOP500_EGPIO(13)
54#define MOP500_DISP2_RST_GPIO MOP500_EGPIO(14)
55#define MOP500_DISP1_RST_GPIO MOP500_EGPIO(15)
33#define GPIO_SDMMC_EN MOP500_EGPIO(17) 56#define GPIO_SDMMC_EN MOP500_EGPIO(17)
34#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18) 57#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18)
35#define MOP500_EGPIO_END MOP500_EGPIO(24) 58#define MOP500_EGPIO_END MOP500_EGPIO(24)
36 59
37/* GPIOs on the AB8500 mixed-signals circuit */ 60/*
38#define MOP500_AB8500_GPIO(x) (MOP500_EGPIO_END + (x)) 61 * GPIOs on the AB8500 mixed-signals circuit
62 * Notice that we subtract 1 from the number passed into the macro, this is
63 * because the AB8500 GPIO pins are enumbered starting from 1, so the value in
64 * parens matches the GPIO pin number in the data sheet.
65 */
66#define MOP500_AB8500_GPIO(x) (MOP500_EGPIO_END + (x) - 1)
67/*Snowball AB8500 GPIO */
68#define SNOWBALL_VSMPS2_1V8_GPIO MOP500_AB8500_PIN_GPIO(1) /* SYSCLKREQ2/GPIO1 */
69#define SNOWBALL_PM_GPIO1_GPIO MOP500_AB8500_PIN_GPIO(2) /* SYSCLKREQ3/GPIO2 */
70#define SNOWBALL_WLAN_CLK_REQ_GPIO MOP500_AB8500_PIN_GPIO(3) /* SYSCLKREQ4/GPIO3 */
71#define SNOWBALL_PM_GPIO4_GPIO MOP500_AB8500_PIN_GPIO(4) /* SYSCLKREQ6/GPIO4 */
72#define SNOWBALL_EN_3V6_GPIO MOP500_AB8500_PIN_GPIO(16) /* PWMOUT3/GPIO16 */
73#define SNOWBALL_PME_ETH_GPIO MOP500_AB8500_PIN_GPIO(24) /* SYSCLKREQ7/GPIO24 */
74#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */
39 75
40struct i2c_board_info; 76struct i2c_board_info;
41 77
42extern void mop500_sdi_init(void); 78extern void mop500_sdi_init(void);
43extern void snowball_sdi_init(void); 79extern void snowball_sdi_init(void);
80extern void hrefv60_sdi_init(void);
44extern void mop500_sdi_tc35892_init(void); 81extern void mop500_sdi_tc35892_init(void);
45void __init mop500_u8500uib_init(void); 82void __init mop500_u8500uib_init(void);
46void __init mop500_stuib_init(void); 83void __init mop500_stuib_init(void);
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index e832664d1bd9..737907537004 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -239,23 +239,6 @@ static void clk_prcmu_disable(struct clk *clk)
239 writel(1 << clk->prcmu_cg_bit, cg_clr_reg); 239 writel(1 << clk->prcmu_cg_bit, cg_clr_reg);
240} 240}
241 241
242/* ED doesn't have the combined set/clr registers */
243static void clk_prcmu_ed_enable(struct clk *clk)
244{
245 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
246 + clk->prcmu_cg_mgt;
247
248 writel(readl(addr) | PRCM_MGT_ENABLE, addr);
249}
250
251static void clk_prcmu_ed_disable(struct clk *clk)
252{
253 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
254 + clk->prcmu_cg_mgt;
255
256 writel(readl(addr) & ~PRCM_MGT_ENABLE, addr);
257}
258
259static struct clkops clk_prcmu_ops = { 242static struct clkops clk_prcmu_ops = {
260 .enable = clk_prcmu_enable, 243 .enable = clk_prcmu_enable,
261 .disable = clk_prcmu_disable, 244 .disable = clk_prcmu_disable,
@@ -267,7 +250,6 @@ static unsigned int clkrst_base[] = {
267 [3] = U8500_CLKRST3_BASE, 250 [3] = U8500_CLKRST3_BASE,
268 [5] = U8500_CLKRST5_BASE, 251 [5] = U8500_CLKRST5_BASE,
269 [6] = U8500_CLKRST6_BASE, 252 [6] = U8500_CLKRST6_BASE,
270 [7] = U8500_CLKRST7_BASE_ED,
271}; 253};
272 254
273static void clk_prcc_enable(struct clk *clk) 255static void clk_prcc_enable(struct clk *clk)
@@ -321,7 +303,6 @@ static DEFINE_PRCMU_CLK(per2clk, 0x0, 12, PER2CLK);
321static DEFINE_PRCMU_CLK(per3clk, 0x0, 13, PER3CLK); 303static DEFINE_PRCMU_CLK(per3clk, 0x0, 13, PER3CLK);
322static DEFINE_PRCMU_CLK(per5clk, 0x0, 14, PER5CLK); 304static DEFINE_PRCMU_CLK(per5clk, 0x0, 14, PER5CLK);
323static DEFINE_PRCMU_CLK_RATE(per6clk, 0x0, 15, PER6CLK, 133330000); 305static DEFINE_PRCMU_CLK_RATE(per6clk, 0x0, 15, PER6CLK, 133330000);
324static DEFINE_PRCMU_CLK_RATE(per7clk, 0x0, 16, PER7CLK, 100000000);
325static DEFINE_PRCMU_CLK(lcdclk, 0x0, 17, LCDCLK); 306static DEFINE_PRCMU_CLK(lcdclk, 0x0, 17, LCDCLK);
326static DEFINE_PRCMU_CLK(bmlclk, 0x0, 18, BMLCLK); 307static DEFINE_PRCMU_CLK(bmlclk, 0x0, 18, BMLCLK);
327static DEFINE_PRCMU_CLK(hsitxclk, 0x0, 19, HSITXCLK); 308static DEFINE_PRCMU_CLK(hsitxclk, 0x0, 19, HSITXCLK);
@@ -351,44 +332,28 @@ static DEFINE_PRCMU_CLK(uiccclk, 0x4, 1, UICCCLK); /* v1 */
351static DEFINE_PRCC_CLK(1, i2c4, 10, 9, &clk_i2cclk); 332static DEFINE_PRCC_CLK(1, i2c4, 10, 9, &clk_i2cclk);
352static DEFINE_PRCC_CLK(1, gpio0, 9, -1, NULL); 333static DEFINE_PRCC_CLK(1, gpio0, 9, -1, NULL);
353static DEFINE_PRCC_CLK(1, slimbus0, 8, 8, &clk_slimclk); 334static DEFINE_PRCC_CLK(1, slimbus0, 8, 8, &clk_slimclk);
354static DEFINE_PRCC_CLK(1, spi3_ed, 7, 7, NULL); 335static DEFINE_PRCC_CLK(1, spi3, 7, -1, NULL);
355static DEFINE_PRCC_CLK(1, spi3_v1, 7, -1, NULL);
356static DEFINE_PRCC_CLK(1, i2c2, 6, 6, &clk_i2cclk); 336static DEFINE_PRCC_CLK(1, i2c2, 6, 6, &clk_i2cclk);
357static DEFINE_PRCC_CLK(1, sdi0, 5, 5, &clk_sdmmcclk); 337static DEFINE_PRCC_CLK(1, sdi0, 5, 5, &clk_sdmmcclk);
358static DEFINE_PRCC_CLK(1, msp1_ed, 4, 4, &clk_msp02clk); 338static DEFINE_PRCC_CLK(1, msp1, 4, 4, &clk_msp1clk);
359static DEFINE_PRCC_CLK(1, msp1_v1, 4, 4, &clk_msp1clk);
360static DEFINE_PRCC_CLK(1, msp0, 3, 3, &clk_msp02clk); 339static DEFINE_PRCC_CLK(1, msp0, 3, 3, &clk_msp02clk);
361static DEFINE_PRCC_CLK(1, i2c1, 2, 2, &clk_i2cclk); 340static DEFINE_PRCC_CLK(1, i2c1, 2, 2, &clk_i2cclk);
362static DEFINE_PRCC_CLK(1, uart1, 1, 1, &clk_uartclk); 341static DEFINE_PRCC_CLK(1, uart1, 1, 1, &clk_uartclk);
363static DEFINE_PRCC_CLK(1, uart0, 0, 0, &clk_uartclk); 342static DEFINE_PRCC_CLK(1, uart0, 0, 0, &clk_uartclk);
364 343
365/* Peripheral Cluster #2 */ 344/* Peripheral Cluster #2 */
366 345static DEFINE_PRCC_CLK(2, gpio1, 11, -1, NULL);
367static DEFINE_PRCC_CLK(2, gpio1_ed, 12, -1, NULL); 346static DEFINE_PRCC_CLK(2, ssitx, 10, 7, NULL);
368static DEFINE_PRCC_CLK(2, ssitx_ed, 11, -1, NULL); 347static DEFINE_PRCC_CLK(2, ssirx, 9, 6, NULL);
369static DEFINE_PRCC_CLK(2, ssirx_ed, 10, -1, NULL); 348static DEFINE_PRCC_CLK(2, spi0, 8, -1, NULL);
370static DEFINE_PRCC_CLK(2, spi0_ed, 9, -1, NULL); 349static DEFINE_PRCC_CLK(2, sdi3, 7, 5, &clk_sdmmcclk);
371static DEFINE_PRCC_CLK(2, sdi3_ed, 8, 6, &clk_sdmmcclk); 350static DEFINE_PRCC_CLK(2, sdi1, 6, 4, &clk_sdmmcclk);
372static DEFINE_PRCC_CLK(2, sdi1_ed, 7, 5, &clk_sdmmcclk); 351static DEFINE_PRCC_CLK(2, msp2, 5, 3, &clk_msp02clk);
373static DEFINE_PRCC_CLK(2, msp2_ed, 6, 4, &clk_msp02clk); 352static DEFINE_PRCC_CLK(2, sdi4, 4, 2, &clk_sdmmcclk);
374static DEFINE_PRCC_CLK(2, sdi4_ed, 4, 2, &clk_sdmmcclk); 353static DEFINE_PRCC_CLK(2, pwl, 3, 1, NULL);
375static DEFINE_PRCC_CLK(2, pwl_ed, 3, 1, NULL); 354static DEFINE_PRCC_CLK(2, spi1, 2, -1, NULL);
376static DEFINE_PRCC_CLK(2, spi1_ed, 2, -1, NULL); 355static DEFINE_PRCC_CLK(2, spi2, 1, -1, NULL);
377static DEFINE_PRCC_CLK(2, spi2_ed, 1, -1, NULL); 356static DEFINE_PRCC_CLK(2, i2c3, 0, 0, &clk_i2cclk);
378static DEFINE_PRCC_CLK(2, i2c3_ed, 0, 0, &clk_i2cclk);
379
380static DEFINE_PRCC_CLK(2, gpio1_v1, 11, -1, NULL);
381static DEFINE_PRCC_CLK(2, ssitx_v1, 10, 7, NULL);
382static DEFINE_PRCC_CLK(2, ssirx_v1, 9, 6, NULL);
383static DEFINE_PRCC_CLK(2, spi0_v1, 8, -1, NULL);
384static DEFINE_PRCC_CLK(2, sdi3_v1, 7, 5, &clk_sdmmcclk);
385static DEFINE_PRCC_CLK(2, sdi1_v1, 6, 4, &clk_sdmmcclk);
386static DEFINE_PRCC_CLK(2, msp2_v1, 5, 3, &clk_msp02clk);
387static DEFINE_PRCC_CLK(2, sdi4_v1, 4, 2, &clk_sdmmcclk);
388static DEFINE_PRCC_CLK(2, pwl_v1, 3, 1, NULL);
389static DEFINE_PRCC_CLK(2, spi1_v1, 2, -1, NULL);
390static DEFINE_PRCC_CLK(2, spi2_v1, 1, -1, NULL);
391static DEFINE_PRCC_CLK(2, i2c3_v1, 0, 0, &clk_i2cclk);
392 357
393/* Peripheral Cluster #3 */ 358/* Peripheral Cluster #3 */
394static DEFINE_PRCC_CLK(3, gpio2, 8, -1, NULL); 359static DEFINE_PRCC_CLK(3, gpio2, 8, -1, NULL);
@@ -397,49 +362,34 @@ static DEFINE_PRCC_CLK(3, uart2, 6, 6, &clk_uartclk);
397static DEFINE_PRCC_CLK(3, ske, 5, 5, &clk_32khz); 362static DEFINE_PRCC_CLK(3, ske, 5, 5, &clk_32khz);
398static DEFINE_PRCC_CLK(3, sdi2, 4, 4, &clk_sdmmcclk); 363static DEFINE_PRCC_CLK(3, sdi2, 4, 4, &clk_sdmmcclk);
399static DEFINE_PRCC_CLK(3, i2c0, 3, 3, &clk_i2cclk); 364static DEFINE_PRCC_CLK(3, i2c0, 3, 3, &clk_i2cclk);
400static DEFINE_PRCC_CLK(3, ssp1_ed, 2, 2, &clk_i2cclk); 365static DEFINE_PRCC_CLK(3, ssp1, 2, 2, &clk_sspclk);
401static DEFINE_PRCC_CLK(3, ssp0_ed, 1, 1, &clk_i2cclk); 366static DEFINE_PRCC_CLK(3, ssp0, 1, 1, &clk_sspclk);
402static DEFINE_PRCC_CLK(3, ssp1_v1, 2, 2, &clk_sspclk);
403static DEFINE_PRCC_CLK(3, ssp0_v1, 1, 1, &clk_sspclk);
404static DEFINE_PRCC_CLK(3, fsmc, 0, -1, NULL); 367static DEFINE_PRCC_CLK(3, fsmc, 0, -1, NULL);
405 368
406/* Peripheral Cluster #4 is in the always on domain */ 369/* Peripheral Cluster #4 is in the always on domain */
407 370
408/* Peripheral Cluster #5 */ 371/* Peripheral Cluster #5 */
409static DEFINE_PRCC_CLK(5, gpio3, 1, -1, NULL); 372static DEFINE_PRCC_CLK(5, gpio3, 1, -1, NULL);
410static DEFINE_PRCC_CLK(5, usb_ed, 0, 0, &clk_i2cclk); 373static DEFINE_PRCC_CLK(5, usb, 0, 0, NULL);
411static DEFINE_PRCC_CLK(5, usb_v1, 0, 0, NULL);
412 374
413/* Peripheral Cluster #6 */ 375/* Peripheral Cluster #6 */
414 376
415/* MTU ID in data */ 377/* MTU ID in data */
416static DEFINE_PRCC_CLK_CUSTOM(6, mtu1_v1, 8, -1, NULL, clk_mtu_get_rate, 1); 378static DEFINE_PRCC_CLK_CUSTOM(6, mtu1, 8, -1, NULL, clk_mtu_get_rate, 1);
417static DEFINE_PRCC_CLK_CUSTOM(6, mtu0_v1, 7, -1, NULL, clk_mtu_get_rate, 0); 379static DEFINE_PRCC_CLK_CUSTOM(6, mtu0, 7, -1, NULL, clk_mtu_get_rate, 0);
418static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL); 380static DEFINE_PRCC_CLK(6, cfgreg, 6, 6, NULL);
419static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL);
420static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL); 381static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL);
421static DEFINE_PRCC_CLK(6, unipro_v1, 4, 1, &clk_uniproclk); 382static DEFINE_PRCC_CLK(6, unipro, 4, 1, &clk_uniproclk);
422static DEFINE_PRCC_CLK(6, cryp1_ed, 4, -1, NULL);
423static DEFINE_PRCC_CLK(6, pka, 3, -1, NULL); 383static DEFINE_PRCC_CLK(6, pka, 3, -1, NULL);
424static DEFINE_PRCC_CLK(6, hash0, 2, -1, NULL); 384static DEFINE_PRCC_CLK(6, hash0, 2, -1, NULL);
425static DEFINE_PRCC_CLK(6, cryp0, 1, -1, NULL); 385static DEFINE_PRCC_CLK(6, cryp0, 1, -1, NULL);
426static DEFINE_PRCC_CLK(6, rng_ed, 0, 0, &clk_i2cclk); 386static DEFINE_PRCC_CLK(6, rng, 0, 0, &clk_rngclk);
427static DEFINE_PRCC_CLK(6, rng_v1, 0, 0, &clk_rngclk);
428
429/* Peripheral Cluster #7 */
430
431static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL);
432/* MTU ID in data */
433static DEFINE_PRCC_CLK_CUSTOM(7, mtu1_ed, 3, -1, NULL, clk_mtu_get_rate, 1);
434static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
435static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
436static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
437 387
438static struct clk clk_dummy_apb_pclk = { 388static struct clk clk_dummy_apb_pclk = {
439 .name = "apb_pclk", 389 .name = "apb_pclk",
440}; 390};
441 391
442static struct clk_lookup u8500_common_clks[] = { 392static struct clk_lookup u8500_clks[] = {
443 CLK(dummy_apb_pclk, NULL, "apb_pclk"), 393 CLK(dummy_apb_pclk, NULL, "apb_pclk"),
444 394
445 /* Peripheral Cluster #1 */ 395 /* Peripheral Cluster #1 */
@@ -494,83 +444,41 @@ static struct clk_lookup u8500_common_clks[] = {
494 CLK(dmaclk, "dma40.0", NULL), 444 CLK(dmaclk, "dma40.0", NULL),
495 CLK(b2r2clk, "b2r2", NULL), 445 CLK(b2r2clk, "b2r2", NULL),
496 CLK(tvclk, "tv", NULL), 446 CLK(tvclk, "tv", NULL),
497};
498 447
499static struct clk_lookup u8500_ed_clks[] = {
500 /* Peripheral Cluster #1 */
501 CLK(spi3_ed, "spi3", NULL),
502 CLK(msp1_ed, "msp1", NULL),
503
504 /* Peripheral Cluster #2 */
505 CLK(gpio1_ed, "gpio.6", NULL),
506 CLK(gpio1_ed, "gpio.7", NULL),
507 CLK(ssitx_ed, "ssitx", NULL),
508 CLK(ssirx_ed, "ssirx", NULL),
509 CLK(spi0_ed, "spi0", NULL),
510 CLK(sdi3_ed, "sdi3", NULL),
511 CLK(sdi1_ed, "sdi1", NULL),
512 CLK(msp2_ed, "msp2", NULL),
513 CLK(sdi4_ed, "sdi4", NULL),
514 CLK(pwl_ed, "pwl", NULL),
515 CLK(spi1_ed, "spi1", NULL),
516 CLK(spi2_ed, "spi2", NULL),
517 CLK(i2c3_ed, "nmk-i2c.3", NULL),
518
519 /* Peripheral Cluster #3 */
520 CLK(ssp1_ed, "ssp1", NULL),
521 CLK(ssp0_ed, "ssp0", NULL),
522
523 /* Peripheral Cluster #5 */
524 CLK(usb_ed, "musb-ux500.0", "usb"),
525
526 /* Peripheral Cluster #6 */
527 CLK(dmc_ed, "dmc", NULL),
528 CLK(cryp1_ed, "cryp1", NULL),
529 CLK(rng_ed, "rng", NULL),
530
531 /* Peripheral Cluster #7 */
532 CLK(tzpc0_ed, "tzpc0", NULL),
533 CLK(mtu1_ed, "mtu1", NULL),
534 CLK(mtu0_ed, "mtu0", NULL),
535 CLK(wdg_ed, "wdg", NULL),
536 CLK(cfgreg_ed, "cfgreg", NULL),
537};
538
539static struct clk_lookup u8500_v1_clks[] = {
540 /* Peripheral Cluster #1 */ 448 /* Peripheral Cluster #1 */
541 CLK(i2c4, "nmk-i2c.4", NULL), 449 CLK(i2c4, "nmk-i2c.4", NULL),
542 CLK(spi3_v1, "spi3", NULL), 450 CLK(spi3, "spi3", NULL),
543 CLK(msp1_v1, "msp1", NULL), 451 CLK(msp1, "msp1", NULL),
544 452
545 /* Peripheral Cluster #2 */ 453 /* Peripheral Cluster #2 */
546 CLK(gpio1_v1, "gpio.6", NULL), 454 CLK(gpio1, "gpio.6", NULL),
547 CLK(gpio1_v1, "gpio.7", NULL), 455 CLK(gpio1, "gpio.7", NULL),
548 CLK(ssitx_v1, "ssitx", NULL), 456 CLK(ssitx, "ssitx", NULL),
549 CLK(ssirx_v1, "ssirx", NULL), 457 CLK(ssirx, "ssirx", NULL),
550 CLK(spi0_v1, "spi0", NULL), 458 CLK(spi0, "spi0", NULL),
551 CLK(sdi3_v1, "sdi3", NULL), 459 CLK(sdi3, "sdi3", NULL),
552 CLK(sdi1_v1, "sdi1", NULL), 460 CLK(sdi1, "sdi1", NULL),
553 CLK(msp2_v1, "msp2", NULL), 461 CLK(msp2, "msp2", NULL),
554 CLK(sdi4_v1, "sdi4", NULL), 462 CLK(sdi4, "sdi4", NULL),
555 CLK(pwl_v1, "pwl", NULL), 463 CLK(pwl, "pwl", NULL),
556 CLK(spi1_v1, "spi1", NULL), 464 CLK(spi1, "spi1", NULL),
557 CLK(spi2_v1, "spi2", NULL), 465 CLK(spi2, "spi2", NULL),
558 CLK(i2c3_v1, "nmk-i2c.3", NULL), 466 CLK(i2c3, "nmk-i2c.3", NULL),
559 467
560 /* Peripheral Cluster #3 */ 468 /* Peripheral Cluster #3 */
561 CLK(ssp1_v1, "ssp1", NULL), 469 CLK(ssp1, "ssp1", NULL),
562 CLK(ssp0_v1, "ssp0", NULL), 470 CLK(ssp0, "ssp0", NULL),
563 471
564 /* Peripheral Cluster #5 */ 472 /* Peripheral Cluster #5 */
565 CLK(usb_v1, "musb-ux500.0", "usb"), 473 CLK(usb, "musb-ux500.0", "usb"),
566 474
567 /* Peripheral Cluster #6 */ 475 /* Peripheral Cluster #6 */
568 CLK(mtu1_v1, "mtu1", NULL), 476 CLK(mtu1, "mtu1", NULL),
569 CLK(mtu0_v1, "mtu0", NULL), 477 CLK(mtu0, "mtu0", NULL),
570 CLK(cfgreg_v1, "cfgreg", NULL), 478 CLK(cfgreg, "cfgreg", NULL),
571 CLK(hash1, "hash1", NULL), 479 CLK(hash1, "hash1", NULL),
572 CLK(unipro_v1, "unipro", NULL), 480 CLK(unipro, "unipro", NULL),
573 CLK(rng_v1, "rng", NULL), 481 CLK(rng, "rng", NULL),
574 482
575 /* PRCMU level clock gating */ 483 /* PRCMU level clock gating */
576 484
@@ -743,7 +651,7 @@ err_out:
743late_initcall(clk_debugfs_init); 651late_initcall(clk_debugfs_init);
744#endif /* defined(CONFIG_DEBUG_FS) */ 652#endif /* defined(CONFIG_DEBUG_FS) */
745 653
746unsigned long clk_smp_twd_rate = 400000000; 654unsigned long clk_smp_twd_rate = 500000000;
747 655
748unsigned long clk_smp_twd_get_rate(struct clk *clk) 656unsigned long clk_smp_twd_get_rate(struct clk *clk)
749{ 657{
@@ -769,7 +677,7 @@ static int clk_twd_cpufreq_transition(struct notifier_block *nb,
769 677
770 if (state == CPUFREQ_PRECHANGE) { 678 if (state == CPUFREQ_PRECHANGE) {
771 /* Save frequency in simple Hz */ 679 /* Save frequency in simple Hz */
772 clk_smp_twd_rate = f->new * 1000; 680 clk_smp_twd_rate = (f->new * 1000) / 2;
773 } 681 }
774 682
775 return NOTIFY_OK; 683 return NOTIFY_OK;
@@ -790,11 +698,7 @@ late_initcall(clk_init_smp_twd_cpufreq);
790 698
791int __init clk_init(void) 699int __init clk_init(void)
792{ 700{
793 if (cpu_is_u8500ed()) { 701 if (cpu_is_u5500()) {
794 clk_prcmu_ops.enable = clk_prcmu_ed_enable;
795 clk_prcmu_ops.disable = clk_prcmu_ed_disable;
796 clk_per6clk.rate = 100000000;
797 } else if (cpu_is_u5500()) {
798 /* Clock tree for U5500 not implemented yet */ 702 /* Clock tree for U5500 not implemented yet */
799 clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; 703 clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;
800 clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; 704 clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;
@@ -802,20 +706,11 @@ int __init clk_init(void)
802 clk_sdmmcclk.rate = 99900000; 706 clk_sdmmcclk.rate = 99900000;
803 } 707 }
804 708
805 clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); 709 clkdev_add_table(u8500_clks, ARRAY_SIZE(u8500_clks));
806 if (cpu_is_u8500ed())
807 clkdev_add_table(u8500_ed_clks, ARRAY_SIZE(u8500_ed_clks));
808 else
809 clkdev_add_table(u8500_v1_clks, ARRAY_SIZE(u8500_v1_clks));
810
811 clkdev_add(&clk_smp_twd_lookup); 710 clkdev_add(&clk_smp_twd_lookup);
812 711
813#ifdef CONFIG_DEBUG_FS 712#ifdef CONFIG_DEBUG_FS
814 clk_debugfs_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); 713 clk_debugfs_add_table(u8500_clks, ARRAY_SIZE(u8500_clks));
815 if (cpu_is_u8500ed())
816 clk_debugfs_add_table(u8500_ed_clks, ARRAY_SIZE(u8500_ed_clks));
817 else
818 clk_debugfs_add_table(u8500_v1_clks, ARRAY_SIZE(u8500_v1_clks));
819#endif 714#endif
820 return 0; 715 return 0;
821} 716}
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 5323286b265e..18aa5c05c69e 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -46,26 +46,6 @@ static struct map_desc u5500_io_desc[] __initdata = {
46 __IO_DEV_DESC(U5500_PRCMU_TCDM_BASE, SZ_4K), 46 __IO_DEV_DESC(U5500_PRCMU_TCDM_BASE, SZ_4K),
47}; 47};
48 48
49static struct resource db5500_pmu_resources[] = {
50 [0] = {
51 .start = IRQ_DB5500_PMU0,
52 .end = IRQ_DB5500_PMU0,
53 .flags = IORESOURCE_IRQ,
54 },
55 [1] = {
56 .start = IRQ_DB5500_PMU1,
57 .end = IRQ_DB5500_PMU1,
58 .flags = IORESOURCE_IRQ,
59 },
60};
61
62static struct platform_device db5500_pmu_device = {
63 .name = "arm-pmu",
64 .id = ARM_PMU_DEVICE_CPU,
65 .num_resources = ARRAY_SIZE(db5500_pmu_resources),
66 .resource = db5500_pmu_resources,
67};
68
69static struct resource mbox0_resources[] = { 49static struct resource mbox0_resources[] = {
70 { 50 {
71 .name = "mbox_peer", 51 .name = "mbox_peer",
@@ -151,7 +131,6 @@ static struct platform_device mbox2_device = {
151}; 131};
152 132
153static struct platform_device *db5500_platform_devs[] __initdata = { 133static struct platform_device *db5500_platform_devs[] __initdata = {
154 &db5500_pmu_device,
155 &mbox0_device, 134 &mbox0_device,
156 &mbox1_device, 135 &mbox1_device,
157 &mbox2_device, 136 &mbox2_device,
@@ -192,6 +171,25 @@ void __init u5500_map_io(void)
192 _PRCMU_BASE = __io_address(U5500_PRCMU_BASE); 171 _PRCMU_BASE = __io_address(U5500_PRCMU_BASE);
193} 172}
194 173
174static void __init db5500_pmu_init(void)
175{
176 struct resource res[] = {
177 [0] = {
178 .start = IRQ_DB5500_PMU0,
179 .end = IRQ_DB5500_PMU0,
180 .flags = IORESOURCE_IRQ,
181 },
182 [1] = {
183 .start = IRQ_DB5500_PMU1,
184 .end = IRQ_DB5500_PMU1,
185 .flags = IORESOURCE_IRQ,
186 },
187 };
188
189 platform_device_register_simple("arm-pmu", ARM_PMU_DEVICE_CPU,
190 res, ARRAY_SIZE(res));
191}
192
195static int usb_db5500_rx_dma_cfg[] = { 193static int usb_db5500_rx_dma_cfg[] = {
196 DB5500_DMA_DEV4_USB_OTG_IEP_1_9, 194 DB5500_DMA_DEV4_USB_OTG_IEP_1_9,
197 DB5500_DMA_DEV5_USB_OTG_IEP_2_10, 195 DB5500_DMA_DEV5_USB_OTG_IEP_2_10,
@@ -217,6 +215,7 @@ static int usb_db5500_tx_dma_cfg[] = {
217void __init u5500_init_devices(void) 215void __init u5500_init_devices(void)
218{ 216{
219 db5500_add_gpios(); 217 db5500_add_gpios();
218 db5500_pmu_init();
220 db5500_dma_init(); 219 db5500_dma_init();
221 db5500_add_rtc(); 220 db5500_add_rtc();
222 db5500_add_usb(usb_db5500_rx_dma_cfg, usb_db5500_tx_dma_cfg); 221 db5500_add_usb(usb_db5500_rx_dma_cfg, usb_db5500_tx_dma_cfg);
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 7f2729c05db3..7176ee7491ab 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2008-2009 ST-Ericsson 2 * Copyright (C) 2008-2009 ST-Ericsson SA
3 * 3 *
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5 * 5 *
@@ -53,19 +53,6 @@ static struct map_desc u8500_io_desc[] __initdata = {
53 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 53 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
54 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 54 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
55 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 55 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
56};
57
58static struct map_desc u8500_ed_io_desc[] __initdata = {
59 __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
60 __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
61};
62
63static struct map_desc u8500_v1_io_desc[] __initdata = {
64 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
65 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE_V1, SZ_4K),
66};
67
68static struct map_desc u8500_v2_io_desc[] __initdata = {
69 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 56 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
70}; 57};
71 58
@@ -80,13 +67,6 @@ void __init u8500_map_io(void)
80 67
81 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 68 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
82 69
83 if (cpu_is_u8500ed())
84 iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc));
85 else if (cpu_is_u8500v1())
86 iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc));
87 else if (cpu_is_u8500v2())
88 iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc));
89
90 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); 70 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
91} 71}
92 72
@@ -155,12 +135,9 @@ static resource_size_t __initdata db8500_gpio_base[] = {
155static void __init db8500_add_gpios(void) 135static void __init db8500_add_gpios(void)
156{ 136{
157 struct nmk_gpio_platform_data pdata = { 137 struct nmk_gpio_platform_data pdata = {
158 /* No custom data yet */ 138 .supports_sleepmode = true,
159 }; 139 };
160 140
161 if (cpu_is_u8500v2())
162 pdata.supports_sleepmode = true;
163
164 dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base), 141 dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base),
165 IRQ_DB8500_GPIO0, &pdata); 142 IRQ_DB8500_GPIO0, &pdata);
166} 143}
@@ -192,9 +169,6 @@ static int usb_db8500_tx_dma_cfg[] = {
192 */ 169 */
193void __init u8500_init_devices(void) 170void __init u8500_init_devices(void)
194{ 171{
195 if (cpu_is_u8500ed())
196 dma40_u8500ed_fixup();
197
198 db8500_add_rtc(); 172 db8500_add_rtc();
199 db8500_add_gpios(); 173 db8500_add_gpios();
200 db8500_add_usb(usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 174 db8500_add_usb(usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 73b17404b194..a7c6cdc9b11e 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -166,16 +166,6 @@ struct platform_device u8500_dma40_device = {
166 .resource = dma40_resources 166 .resource = dma40_resources
167}; 167};
168 168
169void dma40_u8500ed_fixup(void)
170{
171 dma40_plat_data.memcpy = NULL;
172 dma40_plat_data.memcpy_len = 0;
173 dma40_resources[0].start = U8500_DMA_BASE_ED;
174 dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
175 dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED;
176 dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1;
177}
178
179struct resource keypad_resources[] = { 169struct resource keypad_resources[] = {
180 [0] = { 170 [0] = {
181 .start = U8500_SKE_BASE, 171 .start = U8500_SKE_BASE,
diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c
index d35122ebc67b..15a0f63b2e2b 100644
--- a/arch/arm/mach-ux500/id.c
+++ b/arch/arm/mach-ux500/id.c
@@ -65,6 +65,7 @@ static unsigned int partnumber(unsigned int asicid)
65 * DB8500v1 0x411fc091 0x9001FFF4 0x008500A0 65 * DB8500v1 0x411fc091 0x9001FFF4 0x008500A0
66 * DB8500v1.1 0x411fc091 0x9001FFF4 0x008500A1 66 * DB8500v1.1 0x411fc091 0x9001FFF4 0x008500A1
67 * DB8500v2 0x412fc091 0x9001DBF4 0x008500B0 67 * DB8500v2 0x412fc091 0x9001DBF4 0x008500B0
68 * DB8520v2.2 0x412fc091 0x9001DBF4 0x008500B2
68 * DB5500v1 0x412fc091 0x9001FFF4 0x005500A0 69 * DB5500v1 0x412fc091 0x9001FFF4 0x005500A0
69 */ 70 */
70 71
@@ -80,9 +81,10 @@ void __init ux500_map_io(void)
80 addr = 0x9001FFF4; 81 addr = 0x9001FFF4;
81 break; 82 break;
82 83
83 case 0x412fc091: /* DB8500v2 / DB5500v1 */ 84 case 0x412fc091: /* DB8520 / DB8500v2 / DB5500v1 */
84 asicid = ux500_read_asicid(0x9001DBF4); 85 asicid = ux500_read_asicid(0x9001DBF4);
85 if (partnumber(asicid) == 0x8500) 86 if (partnumber(asicid) == 0x8500 ||
87 partnumber(asicid) == 0x8520)
86 /* DB8500v2 */ 88 /* DB8500v2 */
87 break; 89 break;
88 90
diff --git a/arch/arm/mach-ux500/include/mach/db5500-regs.h b/arch/arm/mach-ux500/include/mach/db5500-regs.h
index 994b5fe6f85a..8e714bcb099f 100644
--- a/arch/arm/mach-ux500/include/mach/db5500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db5500-regs.h
@@ -65,8 +65,11 @@
65#define U5500_PRCMU_TIMER_4_BASE (U5500_PER4_BASE + 0x07450) 65#define U5500_PRCMU_TIMER_4_BASE (U5500_PER4_BASE + 0x07450)
66#define U5500_MSP1_BASE (U5500_PER4_BASE + 0x9000) 66#define U5500_MSP1_BASE (U5500_PER4_BASE + 0x9000)
67#define U5500_GPIO2_BASE (U5500_PER4_BASE + 0xA000) 67#define U5500_GPIO2_BASE (U5500_PER4_BASE + 0xA000)
68#define U5500_MTIMER_BASE (U5500_PER4_BASE + 0xC000)
68#define U5500_CDETECT_BASE (U5500_PER4_BASE + 0xF000) 69#define U5500_CDETECT_BASE (U5500_PER4_BASE + 0xF000)
69#define U5500_PRCMU_TCDM_BASE (U5500_PER4_BASE + 0x18000) 70#define U5500_PRCMU_TCDM_BASE (U5500_PER4_BASE + 0x18000)
71#define U5500_PRCMU_TCPM_BASE (U5500_PER4_BASE + 0x10000)
72#define U5500_TPIU_BASE (U5500_PER4_BASE + 0x50000)
70 73
71#define U5500_SPI0_BASE (U5500_PER5_BASE + 0x0000) 74#define U5500_SPI0_BASE (U5500_PER5_BASE + 0x0000)
72#define U5500_SPI1_BASE (U5500_PER5_BASE + 0x1000) 75#define U5500_SPI1_BASE (U5500_PER5_BASE + 0x1000)
@@ -125,6 +128,7 @@
125#define U5500_ACCCON_BASE (0xBFFF1000) 128#define U5500_ACCCON_BASE (0xBFFF1000)
126#define U5500_ACCCON_CPUVEC_RESET_ADDR_OFFSET (0x00000020) 129#define U5500_ACCCON_CPUVEC_RESET_ADDR_OFFSET (0x00000020)
127#define U5500_ACCCON_ACC_CPU_CTRL_OFFSET (0x000000BC) 130#define U5500_ACCCON_ACC_CPU_CTRL_OFFSET (0x000000BC)
131#define U5500_INTCON_MBOX1_INT_RESET_ADDR (0xBFFD31A4)
128 132
129#define U5500_ESRAM_BASE 0x40000000 133#define U5500_ESRAM_BASE 0x40000000
130#define U5500_ESRAM_DMA_LCPA_OFFSET 0x10000 134#define U5500_ESRAM_DMA_LCPA_OFFSET 0x10000
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 751b0e6938d4..80e10f50282e 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -22,7 +22,9 @@
22#define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 22#define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000
23 23
24#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET) 24#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET)
25#define U8500_DMA_LCPA_BASE_ED (U8500_ESRAM_BANK4 + 0x4000) 25
26/* This address fulfills the 256k alignment requirement of the lcla base */
27#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4
26 28
27#define U8500_PER3_BASE 0x80000000 29#define U8500_PER3_BASE 0x80000000
28#define U8500_STM_BASE 0x80100000 30#define U8500_STM_BASE 0x80100000
@@ -40,15 +42,14 @@
40#define U8500_ASIC_ID_BASE 0x9001D000 42#define U8500_ASIC_ID_BASE 0x9001D000
41 43
42#define U8500_PER6_BASE 0xa03c0000 44#define U8500_PER6_BASE 0xa03c0000
45#define U8500_PER7_BASE 0xa03d0000
43#define U8500_PER5_BASE 0xa03e0000 46#define U8500_PER5_BASE 0xa03e0000
44#define U8500_PER7_BASE_ED 0xa03d0000
45 47
46#define U8500_SVA_BASE 0xa0100000 48#define U8500_SVA_BASE 0xa0100000
47#define U8500_SIA_BASE 0xa0200000 49#define U8500_SIA_BASE 0xa0200000
48 50
49#define U8500_SGA_BASE 0xa0300000 51#define U8500_SGA_BASE 0xa0300000
50#define U8500_MCDE_BASE 0xa0350000 52#define U8500_MCDE_BASE 0xa0350000
51#define U8500_DMA_BASE_ED 0xa0362000
52#define U8500_DMA_BASE 0x801C0000 /* v1 */ 53#define U8500_DMA_BASE 0x801C0000 /* v1 */
53 54
54#define U8500_SBAG_BASE 0xa0390000 55#define U8500_SBAG_BASE 0xa0390000
@@ -66,13 +67,6 @@
66#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) 67#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000)
67#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) 68#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
68 69
69/* per7 base addresses */
70#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000)
71#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000)
72#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000)
73#define U8500_TZPC0_BASE_ED (U8500_PER7_BASE_ED + 0xc000)
74#define U8500_CLKRST7_BASE_ED (U8500_PER7_BASE_ED + 0xf000)
75
76#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) 70#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
77#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) 71#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
78 72
@@ -102,12 +96,10 @@
102#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000) 96#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000)
103#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000) 97#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
104#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) 98#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
105#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338)
106#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)
107#define U8500_PRCMU_TCDM_BASE_V1 (U8500_PER4_BASE + 0x0f000)
108#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) 99#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
109#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000) 100#define U8500_PRCMU_TCPM_BASE (U8500_PER4_BASE + 0x60000)
110 101#define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338)
102#define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)
111 103
112/* per3 base addresses */ 104/* per3 base addresses */
113#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) 105#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h
index 020b6369a30a..5f6cb71fc62d 100644
--- a/arch/arm/mach-ux500/include/mach/devices.h
+++ b/arch/arm/mach-ux500/include/mach/devices.h
@@ -18,6 +18,4 @@ extern struct amba_device ux500_pl031_device;
18extern struct platform_device u8500_dma40_device; 18extern struct platform_device u8500_dma40_device;
19extern struct platform_device ux500_ske_keypad_device; 19extern struct platform_device ux500_ske_keypad_device;
20 20
21void dma40_u8500ed_fixup(void);
22
23#endif 21#endif
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 470ac52663d6..b6ba26a1367d 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -10,20 +10,21 @@
10#ifndef __MACH_HARDWARE_H 10#ifndef __MACH_HARDWARE_H
11#define __MACH_HARDWARE_H 11#define __MACH_HARDWARE_H
12 12
13/* macros to get at IO space when running virtually 13/*
14 * Macros to get at IO space when running virtually
14 * We dont map all the peripherals, let ioremap do 15 * We dont map all the peripherals, let ioremap do
15 * this for us. We map only very basic peripherals here. 16 * this for us. We map only very basic peripherals here.
16 */ 17 */
17#define U8500_IO_VIRTUAL 0xf0000000 18#define U8500_IO_VIRTUAL 0xf0000000
18#define U8500_IO_PHYSICAL 0xa0000000 19#define U8500_IO_PHYSICAL 0xa0000000
19 20
20/* this macro is used in assembly, so no cast */ 21/* This macro is used in assembly, so no cast */
21#define IO_ADDRESS(x) \ 22#define IO_ADDRESS(x) \
22 (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL) 23 (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
23 24
24/* typesafe io address */ 25/* typesafe io address */
25#define __io_address(n) __io(IO_ADDRESS(n)) 26#define __io_address(n) __io(IO_ADDRESS(n))
26/* used by some plat-nomadik code */ 27/* Used by some plat-nomadik code */
27#define io_p2v(n) __io_address(n) 28#define io_p2v(n) __io_address(n)
28 29
29#include <mach/db8500-regs.h> 30#include <mach/db8500-regs.h>
@@ -36,6 +37,5 @@ extern void __iomem *_PRCMU_BASE;
36 37
37#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) 38#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
38 39
39#endif 40#endif /* __ASSEMBLY__ */
40
41#endif /* __MACH_HARDWARE_H */ 41#endif /* __MACH_HARDWARE_H */
diff --git a/arch/arm/mach-ux500/include/mach/id.h b/arch/arm/mach-ux500/include/mach/id.h
index 02b541a37ee5..833d6a6edc9b 100644
--- a/arch/arm/mach-ux500/include/mach/id.h
+++ b/arch/arm/mach-ux500/include/mach/id.h
@@ -47,6 +47,30 @@ static inline bool __attribute_const__ cpu_is_u5500(void)
47} 47}
48 48
49/* 49/*
50 * 5500 revisions
51 */
52
53static inline bool __attribute_const__ cpu_is_u5500v1(void)
54{
55 return cpu_is_u5500() && (dbx500_revision() & 0xf0) == 0xA0;
56}
57
58static inline bool __attribute_const__ cpu_is_u5500v2(void)
59{
60 return (dbx500_id.revision & 0xf0) == 0xB0;
61}
62
63static inline bool __attribute_const__ cpu_is_u5500v20(void)
64{
65 return cpu_is_u5500() && ((dbx500_revision() & 0xf0) == 0xB0);
66}
67
68static inline bool __attribute_const__ cpu_is_u5500v21(void)
69{
70 return cpu_is_u5500() && (dbx500_revision() == 0xB1);
71}
72
73/*
50 * 8500 revisions 74 * 8500 revisions
51 */ 75 */
52 76
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83cca9bcfc97..1bf0df81bdc6 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -131,6 +131,12 @@ extern void imx53_evk_common_init(void);
131extern void imx53_qsb_common_init(void); 131extern void imx53_qsb_common_init(void);
132extern void imx53_smd_common_init(void); 132extern void imx53_smd_common_init(void);
133extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 133extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
134extern void imx6q_pm_init(void);
135extern void imx6q_clock_map_io(void); 134extern void imx6q_clock_map_io(void);
135
136#ifdef CONFIG_PM
137extern void imx6q_pm_init(void);
138#else
139static inline void imx6q_pm_init(void) {}
140#endif
141
136#endif 142#endif
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index bf64e1e594ed..f0726d48df22 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -265,16 +265,20 @@
265#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL) 265#define MX25_PAD_CSI_D2__CSI_D2 IOMUX_PAD(0x318, 0x120, 0x10, 0, 0, NO_PAD_CTRL)
266#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL) 266#define MX25_PAD_CSI_D2__UART5_RXD_MUX IOMUX_PAD(0x318, 0x120, 0x11, 0x578, 1, NO_PAD_CTRL)
267#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL) 267#define MX25_PAD_CSI_D2__GPIO_1_27 IOMUX_PAD(0x318, 0x120, 0x15, 0, 0, NO_PAD_CTRL)
268#define MX25_PAD_CSI_D2__CSPI3_MOSI IOMUX_PAD(0x318, 0x120, 0x17, 0, 0, NO_PAD_CTRL)
268 269
269#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL) 270#define MX25_PAD_CSI_D3__CSI_D3 IOMUX_PAD(0x31c, 0x124, 0x10, 0, 0, NO_PAD_CTRL)
270#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL) 271#define MX25_PAD_CSI_D3__GPIO_1_28 IOMUX_PAD(0x31c, 0x124, 0x15, 0, 0, NO_PAD_CTRL)
272#define MX25_PAD_CSI_D3__CSPI3_MISO IOMUX_PAD(0x31c, 0x124, 0x17, 0x4b4, 1, NO_PAD_CTRL)
271 273
272#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL) 274#define MX25_PAD_CSI_D4__CSI_D4 IOMUX_PAD(0x320, 0x128, 0x10, 0, 0, NO_PAD_CTRL)
273#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL) 275#define MX25_PAD_CSI_D4__UART5_RTS IOMUX_PAD(0x320, 0x128, 0x11, 0x574, 1, NO_PAD_CTRL)
274#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL) 276#define MX25_PAD_CSI_D4__GPIO_1_29 IOMUX_PAD(0x320, 0x128, 0x15, 0, 0, NO_PAD_CTRL)
277#define MX25_PAD_CSI_D4__CSPI3_SCLK IOMUX_PAD(0x320, 0x128, 0x17, 0, 0, NO_PAD_CTRL)
275 278
276#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL) 279#define MX25_PAD_CSI_D5__CSI_D5 IOMUX_PAD(0x324, 0x12c, 0x10, 0, 0, NO_PAD_CTRL)
277#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL) 280#define MX25_PAD_CSI_D5__GPIO_1_30 IOMUX_PAD(0x324, 0x12c, 0x15, 0, 0, NO_PAD_CTRL)
281#define MX25_PAD_CSI_D5__CSPI3_RDY IOMUX_PAD(0x324, 0x12c, 0x17, 0, 0, NO_PAD_CTRL)
278 282
279#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL) 283#define MX25_PAD_CSI_D6__CSI_D6 IOMUX_PAD(0x328, 0x130, 0x10, 0, 0, NO_PAD_CTRL)
280#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL) 284#define MX25_PAD_CSI_D6__GPIO_1_31 IOMUX_PAD(0x328, 0x130, 0x15, 0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index a4d36d601d55..d78298366a91 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -168,7 +168,7 @@ struct cpu_op {
168 u32 cpu_rate; 168 u32 cpu_rate;
169}; 169};
170 170
171int tzic_enable_wake(int is_idle); 171int tzic_enable_wake(void);
172 172
173extern struct cpu_op *(*get_cpu_op)(int *op); 173extern struct cpu_op *(*get_cpu_op)(int *op);
174#endif 174#endif
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index a3c164c7ba82..98308ec1f321 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -73,7 +73,28 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
73#define tzic_set_irq_fiq NULL 73#define tzic_set_irq_fiq NULL
74#endif 74#endif
75 75
76static unsigned int *wakeup_intr[4]; 76#ifdef CONFIG_PM
77static void tzic_irq_suspend(struct irq_data *d)
78{
79 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
80 int idx = gc->irq_base >> 5;
81
82 __raw_writel(gc->wake_active, tzic_base + TZIC_WAKEUP0(idx));
83}
84
85static void tzic_irq_resume(struct irq_data *d)
86{
87 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
88 int idx = gc->irq_base >> 5;
89
90 __raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(idx)),
91 tzic_base + TZIC_WAKEUP0(idx));
92}
93
94#else
95#define tzic_irq_suspend NULL
96#define tzic_irq_resume NULL
97#endif
77 98
78static struct mxc_extra_irq tzic_extra_irq = { 99static struct mxc_extra_irq tzic_extra_irq = {
79#ifdef CONFIG_FIQ 100#ifdef CONFIG_FIQ
@@ -91,12 +112,13 @@ static __init void tzic_init_gc(unsigned int irq_start)
91 handle_level_irq); 112 handle_level_irq);
92 gc->private = &tzic_extra_irq; 113 gc->private = &tzic_extra_irq;
93 gc->wake_enabled = IRQ_MSK(32); 114 gc->wake_enabled = IRQ_MSK(32);
94 wakeup_intr[idx] = &gc->wake_active;
95 115
96 ct = gc->chip_types; 116 ct = gc->chip_types;
97 ct->chip.irq_mask = irq_gc_mask_disable_reg; 117 ct->chip.irq_mask = irq_gc_mask_disable_reg;
98 ct->chip.irq_unmask = irq_gc_unmask_enable_reg; 118 ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
99 ct->chip.irq_set_wake = irq_gc_set_wake; 119 ct->chip.irq_set_wake = irq_gc_set_wake;
120 ct->chip.irq_suspend = tzic_irq_suspend;
121 ct->chip.irq_resume = tzic_irq_resume;
100 ct->regs.disable = TZIC_ENCLEAR0(idx); 122 ct->regs.disable = TZIC_ENCLEAR0(idx);
101 ct->regs.enable = TZIC_ENSET0(idx); 123 ct->regs.enable = TZIC_ENSET0(idx);
102 124
@@ -167,23 +189,19 @@ void __init tzic_init_irq(void __iomem *irqbase)
167/** 189/**
168 * tzic_enable_wake() - enable wakeup interrupt 190 * tzic_enable_wake() - enable wakeup interrupt
169 * 191 *
170 * @param is_idle 1 if called in idle loop (ENSET0 register);
171 * 0 to be used when called from low power entry
172 * @return 0 if successful; non-zero otherwise 192 * @return 0 if successful; non-zero otherwise
173 */ 193 */
174int tzic_enable_wake(int is_idle) 194int tzic_enable_wake(void)
175{ 195{
176 unsigned int i, v; 196 unsigned int i;
177 197
178 __raw_writel(1, tzic_base + TZIC_DSMINT); 198 __raw_writel(1, tzic_base + TZIC_DSMINT);
179 if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0)) 199 if (unlikely(__raw_readl(tzic_base + TZIC_DSMINT) == 0))
180 return -EAGAIN; 200 return -EAGAIN;
181 201
182 for (i = 0; i < 4; i++) { 202 for (i = 0; i < 4; i++)
183 v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : 203 __raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(i)),
184 *wakeup_intr[i]; 204 tzic_base + TZIC_WAKEUP0(i));
185 __raw_writel(v, tzic_base + TZIC_WAKEUP0(i));
186 }
187 205
188 return 0; 206 return 0;
189} 207}
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 3df04d944e4d..9a584614e7e6 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
19 19
20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
21 21
22obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
23obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 22obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
24obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 23obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
25obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o 24obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 2ee6341fffdb..06383b51e655 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -22,6 +22,8 @@
22#include <plat/vram.h> 22#include <plat/vram.h>
23#include <plat/dsp.h> 23#include <plat/dsp.h>
24 24
25#include <plat/omap-secure.h>
26
25 27
26#define NO_LENGTH_CHECK 0xffffffff 28#define NO_LENGTH_CHECK 0xffffffff
27 29
@@ -66,6 +68,7 @@ void __init omap_reserve(void)
66 omapfb_reserve_sdram_memblock(); 68 omapfb_reserve_sdram_memblock();
67 omap_vram_reserve_sdram_memblock(); 69 omap_vram_reserve_sdram_memblock();
68 omap_dsp_reserve_sdram_memblock(); 70 omap_dsp_reserve_sdram_memblock();
71 omap_secure_ram_reserve_memblock();
69} 72}
70 73
71void __init omap_init_consistent_dma_size(void) 74void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c22217c2ee5f..002fb4d96bbc 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1034,6 +1034,18 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0) 1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
1035 offset = p->dma_read(CSAC, lch); 1035 offset = p->dma_read(CSAC, lch);
1036 1036
1037 if (!cpu_is_omap15xx()) {
1038 /*
1039 * CDAC == 0 indicates that the DMA transfer on the channel has
1040 * not been started (no data has been transferred so far).
1041 * Return the programmed source start address in this case.
1042 */
1043 if (likely(p->dma_read(CDAC, lch)))
1044 offset = p->dma_read(CSAC, lch);
1045 else
1046 offset = p->dma_read(CSSA, lch);
1047 }
1048
1037 if (cpu_class_is_omap1()) 1049 if (cpu_class_is_omap1())
1038 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); 1050 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
1039 1051
@@ -1062,8 +1074,16 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1062 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is 1074 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
1063 * read before the DMA controller finished disabling the channel. 1075 * read before the DMA controller finished disabling the channel.
1064 */ 1076 */
1065 if (!cpu_is_omap15xx() && offset == 0) 1077 if (!cpu_is_omap15xx() && offset == 0) {
1066 offset = p->dma_read(CDAC, lch); 1078 offset = p->dma_read(CDAC, lch);
1079 /*
1080 * CDAC == 0 indicates that the DMA transfer on the channel has
1081 * not been started (no data has been transferred so far).
1082 * Return the programmed destination start address in this case.
1083 */
1084 if (unlikely(!offset))
1085 offset = p->dma_read(CDSA, lch);
1086 }
1067 1087
1068 if (cpu_class_is_omap1()) 1088 if (cpu_class_is_omap1())
1069 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); 1089 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h
new file mode 100644
index 000000000000..06c19bb7bca6
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/am33xx.h
@@ -0,0 +1,25 @@
1/*
2 * This file contains the address info for various AM33XX modules.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ASM_ARCH_AM33XX_H
17#define __ASM_ARCH_AM33XX_H
18
19#define L4_SLOW_AM33XX_BASE 0x48000000
20
21#define AM33XX_SCM_BASE 0x44E10000
22#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
23#define AM33XX_PRCM_BASE 0x44E00000
24
25#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 387a9638991b..b299b8d201c8 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -40,6 +40,7 @@ struct omap_clk {
40#define CK_443X (1 << 11) 40#define CK_443X (1 << 11)
41#define CK_TI816X (1 << 12) 41#define CK_TI816X (1 << 12)
42#define CK_446X (1 << 13) 42#define CK_446X (1 << 13)
43#define CK_1710 (1 << 15) /* 1710 extra for rate selection */
43 44
44 45
45#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) 46#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index eb73ab40e955..240a7b9fd946 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -59,6 +59,8 @@ struct clkops {
59#define RATE_IN_4430 (1 << 5) 59#define RATE_IN_4430 (1 << 5)
60#define RATE_IN_TI816X (1 << 6) 60#define RATE_IN_TI816X (1 << 6)
61#define RATE_IN_4460 (1 << 7) 61#define RATE_IN_4460 (1 << 7)
62#define RATE_IN_AM33XX (1 << 8)
63#define RATE_IN_TI814X (1 << 9)
62 64
63#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 65#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
64#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) 66#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
@@ -84,7 +86,7 @@ struct clkops {
84struct clksel_rate { 86struct clksel_rate {
85 u32 val; 87 u32 val;
86 u8 div; 88 u8 div;
87 u8 flags; 89 u16 flags;
88}; 90};
89 91
90/** 92/**
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 408a12f79205..6b51086fce18 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -69,6 +69,7 @@ unsigned int omap_rev(void);
69 * cpu_is_omap343x(): True for OMAP3430 69 * cpu_is_omap343x(): True for OMAP3430
70 * cpu_is_omap443x(): True for OMAP4430 70 * cpu_is_omap443x(): True for OMAP4430
71 * cpu_is_omap446x(): True for OMAP4460 71 * cpu_is_omap446x(): True for OMAP4460
72 * cpu_is_omap447x(): True for OMAP4470
72 */ 73 */
73#define GET_OMAP_CLASS (omap_rev() & 0xff) 74#define GET_OMAP_CLASS (omap_rev() & 0xff)
74 75
@@ -78,6 +79,22 @@ static inline int is_omap ##class (void) \
78 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 79 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
79} 80}
80 81
82#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
83
84#define IS_AM_CLASS(class, id) \
85static inline int is_am ##class (void) \
86{ \
87 return (GET_AM_CLASS == (id)) ? 1 : 0; \
88}
89
90#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
91
92#define IS_TI_CLASS(class, id) \
93static inline int is_ti ##class (void) \
94{ \
95 return (GET_TI_CLASS == (id)) ? 1 : 0; \
96}
97
81#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) 98#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
82 99
83#define IS_OMAP_SUBCLASS(subclass, id) \ 100#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -92,12 +109,21 @@ static inline int is_ti ##subclass (void) \
92 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ 109 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
93} 110}
94 111
112#define IS_AM_SUBCLASS(subclass, id) \
113static inline int is_am ##subclass (void) \
114{ \
115 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
116}
117
95IS_OMAP_CLASS(7xx, 0x07) 118IS_OMAP_CLASS(7xx, 0x07)
96IS_OMAP_CLASS(15xx, 0x15) 119IS_OMAP_CLASS(15xx, 0x15)
97IS_OMAP_CLASS(16xx, 0x16) 120IS_OMAP_CLASS(16xx, 0x16)
98IS_OMAP_CLASS(24xx, 0x24) 121IS_OMAP_CLASS(24xx, 0x24)
99IS_OMAP_CLASS(34xx, 0x34) 122IS_OMAP_CLASS(34xx, 0x34)
100IS_OMAP_CLASS(44xx, 0x44) 123IS_OMAP_CLASS(44xx, 0x44)
124IS_AM_CLASS(33xx, 0x33)
125
126IS_TI_CLASS(81xx, 0x81)
101 127
102IS_OMAP_SUBCLASS(242x, 0x242) 128IS_OMAP_SUBCLASS(242x, 0x242)
103IS_OMAP_SUBCLASS(243x, 0x243) 129IS_OMAP_SUBCLASS(243x, 0x243)
@@ -105,8 +131,11 @@ IS_OMAP_SUBCLASS(343x, 0x343)
105IS_OMAP_SUBCLASS(363x, 0x363) 131IS_OMAP_SUBCLASS(363x, 0x363)
106IS_OMAP_SUBCLASS(443x, 0x443) 132IS_OMAP_SUBCLASS(443x, 0x443)
107IS_OMAP_SUBCLASS(446x, 0x446) 133IS_OMAP_SUBCLASS(446x, 0x446)
134IS_OMAP_SUBCLASS(447x, 0x447)
108 135
109IS_TI_SUBCLASS(816x, 0x816) 136IS_TI_SUBCLASS(816x, 0x816)
137IS_TI_SUBCLASS(814x, 0x814)
138IS_AM_SUBCLASS(335x, 0x335)
110 139
111#define cpu_is_omap7xx() 0 140#define cpu_is_omap7xx() 0
112#define cpu_is_omap15xx() 0 141#define cpu_is_omap15xx() 0
@@ -116,10 +145,15 @@ IS_TI_SUBCLASS(816x, 0x816)
116#define cpu_is_omap243x() 0 145#define cpu_is_omap243x() 0
117#define cpu_is_omap34xx() 0 146#define cpu_is_omap34xx() 0
118#define cpu_is_omap343x() 0 147#define cpu_is_omap343x() 0
148#define cpu_is_ti81xx() 0
119#define cpu_is_ti816x() 0 149#define cpu_is_ti816x() 0
150#define cpu_is_ti814x() 0
151#define cpu_is_am33xx() 0
152#define cpu_is_am335x() 0
120#define cpu_is_omap44xx() 0 153#define cpu_is_omap44xx() 0
121#define cpu_is_omap443x() 0 154#define cpu_is_omap443x() 0
122#define cpu_is_omap446x() 0 155#define cpu_is_omap446x() 0
156#define cpu_is_omap447x() 0
123 157
124#if defined(MULTI_OMAP1) 158#if defined(MULTI_OMAP1)
125# if defined(CONFIG_ARCH_OMAP730) 159# if defined(CONFIG_ARCH_OMAP730)
@@ -322,7 +356,11 @@ IS_OMAP_TYPE(3517, 0x3517)
322# undef cpu_is_omap3530 356# undef cpu_is_omap3530
323# undef cpu_is_omap3505 357# undef cpu_is_omap3505
324# undef cpu_is_omap3517 358# undef cpu_is_omap3517
359# undef cpu_is_ti81xx
325# undef cpu_is_ti816x 360# undef cpu_is_ti816x
361# undef cpu_is_ti814x
362# undef cpu_is_am33xx
363# undef cpu_is_am335x
326# define cpu_is_omap3430() is_omap3430() 364# define cpu_is_omap3430() is_omap3430()
327# define cpu_is_omap3503() (cpu_is_omap3430() && \ 365# define cpu_is_omap3503() (cpu_is_omap3430() && \
328 (!omap3_has_iva()) && \ 366 (!omap3_has_iva()) && \
@@ -339,16 +377,22 @@ IS_OMAP_TYPE(3517, 0x3517)
339 !omap3_has_sgx()) 377 !omap3_has_sgx())
340# undef cpu_is_omap3630 378# undef cpu_is_omap3630
341# define cpu_is_omap3630() is_omap363x() 379# define cpu_is_omap3630() is_omap363x()
380# define cpu_is_ti81xx() is_ti81xx()
342# define cpu_is_ti816x() is_ti816x() 381# define cpu_is_ti816x() is_ti816x()
382# define cpu_is_ti814x() is_ti814x()
383# define cpu_is_am33xx() is_am33xx()
384# define cpu_is_am335x() is_am335x()
343#endif 385#endif
344 386
345# if defined(CONFIG_ARCH_OMAP4) 387# if defined(CONFIG_ARCH_OMAP4)
346# undef cpu_is_omap44xx 388# undef cpu_is_omap44xx
347# undef cpu_is_omap443x 389# undef cpu_is_omap443x
348# undef cpu_is_omap446x 390# undef cpu_is_omap446x
391# undef cpu_is_omap447x
349# define cpu_is_omap44xx() is_omap44xx() 392# define cpu_is_omap44xx() is_omap44xx()
350# define cpu_is_omap443x() is_omap443x() 393# define cpu_is_omap443x() is_omap443x()
351# define cpu_is_omap446x() is_omap446x() 394# define cpu_is_omap446x() is_omap446x()
395# define cpu_is_omap447x() is_omap447x()
352# endif 396# endif
353 397
354/* Macros to detect if we have OMAP1 or OMAP2 */ 398/* Macros to detect if we have OMAP1 or OMAP2 */
@@ -386,15 +430,27 @@ IS_OMAP_TYPE(3517, 0x3517)
386#define TI8168_REV_ES1_0 TI816X_CLASS 430#define TI8168_REV_ES1_0 TI816X_CLASS
387#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) 431#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
388 432
433#define TI814X_CLASS 0x81400034
434#define TI8148_REV_ES1_0 TI814X_CLASS
435#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
436#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
437
438#define AM335X_CLASS 0x33500034
439#define AM335X_REV_ES1_0 AM335X_CLASS
440
389#define OMAP443X_CLASS 0x44300044 441#define OMAP443X_CLASS 0x44300044
390#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) 442#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
391#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) 443#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
392#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) 444#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
393#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) 445#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
446#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
394 447
395#define OMAP446X_CLASS 0x44600044 448#define OMAP446X_CLASS 0x44600044
396#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) 449#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
397 450
451#define OMAP447X_CLASS 0x44700044
452#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
453
398void omap2_check_revision(void); 454void omap2_check_revision(void);
399 455
400/* 456/*
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e87efe1499b8..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -286,6 +286,7 @@
286#include <plat/omap24xx.h> 286#include <plat/omap24xx.h>
287#include <plat/omap34xx.h> 287#include <plat/omap34xx.h>
288#include <plat/omap44xx.h> 288#include <plat/omap44xx.h>
289#include <plat/ti816x.h> 289#include <plat/ti81xx.h>
290#include <plat/am33xx.h>
290 291
291#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 292#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 1234944a4da0..0696bae1818b 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -73,6 +73,9 @@
73#define OMAP4_L3_IO_OFFSET 0xb4000000 73#define OMAP4_L3_IO_OFFSET 0xb4000000
74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */ 74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
75 75
76#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
77#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
78
76#define OMAP4_L3_PER_IO_OFFSET 0xb1100000 79#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
77#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) 80#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
78 81
@@ -154,6 +157,15 @@
154#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ 157#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
155 158
156/* 159/*
160 * ----------------------------------------------------------------------------
161 * AM33XX specific IO mapping
162 * ----------------------------------------------------------------------------
163 */
164#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
165#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
166#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
167
168/*
157 * Need to look at the Size 4M for L4. 169 * Need to look at the Size 4M for L4.
158 * VPOM3430 was not working for Int controller 170 * VPOM3430 was not working for Int controller
159 */ 171 */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index ebda7382c65b..2efd6454bce0 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -357,7 +357,7 @@
357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70 358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
359#define INT_35XX_USBOTG_IRQ 71 359#define INT_35XX_USBOTG_IRQ 71
360#define INT_35XX_UART4 84 360#define INT_35XX_UART4_IRQ 84
361#define INT_35XX_CCDC_VD0_IRQ 88 361#define INT_35XX_CCDC_VD0_IRQ 88
362#define INT_35XX_CCDC_VD1_IRQ 92 362#define INT_35XX_CCDC_VD1_IRQ 92
363#define INT_35XX_CCDC_VD2_IRQ 93 363#define INT_35XX_CCDC_VD2_IRQ 93
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 94cf70afb236..f75946c3293d 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -96,6 +96,7 @@ struct omap_mmc_platform_data {
96 */ 96 */
97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */ 97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */
98 u32 caps; /* Used for the MMC driver on 2430 and later */ 98 u32 caps; /* Used for the MMC driver on 2430 and later */
99 u32 pm_caps; /* PM capabilities of the mmc */
99 100
100 /* 101 /*
101 * nomux means "standard" muxing is wrong on this board, and 102 * nomux means "standard" muxing is wrong on this board, and
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
new file mode 100644
index 000000000000..64f9d1c7f1bb
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/omap-secure.h
@@ -0,0 +1,13 @@
1#ifndef __OMAP_SECURE_H__
2#define __OMAP_SECURE_H__
3
4#include <linux/types.h>
5
6#ifdef CONFIG_ARCH_OMAP2PLUS
7extern int omap_secure_ram_reserve_memblock(void);
8#else
9static inline void omap_secure_ram_reserve_memblock(void)
10{ }
11#endif
12
13#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 2682043f5a5b..9ff444469f3d 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -19,6 +19,7 @@
19 19
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/pm_qos.h>
22 23
23#include <plat/mux.h> 24#include <plat/mux.h>
24 25
@@ -33,6 +34,8 @@
33 34
34#define OMAP_MODE13X_SPEED 230400 35#define OMAP_MODE13X_SPEED 230400
35 36
37#define OMAP_UART_SCR_TX_EMPTY 0x08
38
36/* WER = 0x7F 39/* WER = 0x7F
37 * Enable module level wakeup in WER reg 40 * Enable module level wakeup in WER reg
38 */ 41 */
@@ -51,18 +54,27 @@
51 54
52#define OMAP_UART_DMA_CH_FREE -1 55#define OMAP_UART_DMA_CH_FREE -1
53 56
54#define RX_TIMEOUT (3 * HZ)
55#define OMAP_MAX_HSUART_PORTS 4 57#define OMAP_MAX_HSUART_PORTS 4
56 58
57#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 59#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
58 60
61#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
62#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
63
59struct omap_uart_port_info { 64struct omap_uart_port_info {
60 bool dma_enabled; /* To specify DMA Mode */ 65 bool dma_enabled; /* To specify DMA Mode */
61 unsigned int uartclk; /* UART clock rate */ 66 unsigned int uartclk; /* UART clock rate */
62 void __iomem *membase; /* ioremap cookie or NULL */
63 resource_size_t mapbase; /* resource base */
64 unsigned long irqflags; /* request_irq flags */
65 upf_t flags; /* UPF_* flags */ 67 upf_t flags; /* UPF_* flags */
68 u32 errata;
69 unsigned int dma_rx_buf_size;
70 unsigned int dma_rx_timeout;
71 unsigned int autosuspend_timeout;
72 unsigned int dma_rx_poll_rate;
73
74 int (*get_context_loss_count)(struct device *);
75 void (*set_forceidle)(struct platform_device *);
76 void (*set_noidle)(struct platform_device *);
77 void (*enable_wakeup)(struct platform_device *, bool);
66}; 78};
67 79
68struct uart_omap_dma { 80struct uart_omap_dma {
@@ -86,8 +98,9 @@ struct uart_omap_dma {
86 spinlock_t rx_lock; 98 spinlock_t rx_lock;
87 /* timer to poll activity on rx dma */ 99 /* timer to poll activity on rx dma */
88 struct timer_list rx_timer; 100 struct timer_list rx_timer;
89 int rx_buf_size; 101 unsigned int rx_buf_size;
90 int rx_timeout; 102 unsigned int rx_poll_rate;
103 unsigned int rx_timeout;
91}; 104};
92 105
93struct uart_omap_port { 106struct uart_omap_port {
@@ -100,6 +113,10 @@ struct uart_omap_port {
100 unsigned char mcr; 113 unsigned char mcr;
101 unsigned char fcr; 114 unsigned char fcr;
102 unsigned char efr; 115 unsigned char efr;
116 unsigned char dll;
117 unsigned char dlh;
118 unsigned char mdr1;
119 unsigned char scr;
103 120
104 int use_dma; 121 int use_dma;
105 /* 122 /*
@@ -111,6 +128,14 @@ struct uart_omap_port {
111 unsigned char msr_saved_flags; 128 unsigned char msr_saved_flags;
112 char name[20]; 129 char name[20];
113 unsigned long port_activity; 130 unsigned long port_activity;
131 u32 context_loss_cnt;
132 u32 errata;
133 u8 wakeups_enabled;
134
135 struct pm_qos_request pm_qos_request;
136 u32 latency;
137 u32 calc_latency;
138 struct work_struct qos_work;
114}; 139};
115 140
116#endif /* __OMAP_SERIAL_H__ */ 141#endif /* __OMAP_SERIAL_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index b9e85886b9d6..0d818acf3917 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -35,6 +35,8 @@
35#define L4_EMU_34XX_BASE 0x54000000 35#define L4_EMU_34XX_BASE 0x54000000
36#define L3_34XX_BASE 0x68000000 36#define L3_34XX_BASE 0x68000000
37 37
38#define L4_WK_AM33XX_BASE 0x44C00000
39
38#define OMAP3430_32KSYNCT_BASE 0x48320000 40#define OMAP3430_32KSYNCT_BASE 0x48320000
39#define OMAP3430_CM_BASE 0x48004800 41#define OMAP3430_CM_BASE 0x48004800
40#define OMAP3430_PRM_BASE 0x48306800 42#define OMAP3430_PRM_BASE 0x48306800
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index ea2b8a6306e7..c0d478e55c84 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -45,6 +45,7 @@
45#define OMAP44XX_WKUPGEN_BASE 0x48281000 45#define OMAP44XX_WKUPGEN_BASE 0x48281000
46#define OMAP44XX_MCPDM_BASE 0x40132000 46#define OMAP44XX_MCPDM_BASE 0x40132000
47#define OMAP44XX_MCPDM_L3_BASE 0x49032000 47#define OMAP44XX_MCPDM_L3_BASE 0x49032000
48#define OMAP44XX_SAR_RAM_BASE 0x4a326000
48 49
49#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) 50#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
50#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000) 51#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 8b372ede17c1..647010109afa 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -97,6 +97,7 @@ struct omap_hwmod_mux_info {
97 struct omap_device_pad *pads; 97 struct omap_device_pad *pads;
98 int nr_pads_dynamic; 98 int nr_pads_dynamic;
99 struct omap_device_pad **pads_dynamic; 99 struct omap_device_pad **pads_dynamic;
100 int *irqs;
100 bool enabled; 101 bool enabled;
101}; 102};
102 103
@@ -416,10 +417,13 @@ struct omap_hwmod_omap4_prcm {
416 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module 417 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
417 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP 418 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
418 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached 419 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
420 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
421 * causes the first call to _enable() to only update the pinmux
419 */ 422 */
420#define _HWMOD_NO_MPU_PORT (1 << 0) 423#define _HWMOD_NO_MPU_PORT (1 << 0)
421#define _HWMOD_WAKEUP_ENABLED (1 << 1) 424#define _HWMOD_WAKEUP_ENABLED (1 << 1)
422#define _HWMOD_SYSCONFIG_LOADED (1 << 2) 425#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
426#define _HWMOD_SKIP_ENABLE (1 << 3)
423 427
424/* 428/*
425 * omap_hwmod._state definitions 429 * omap_hwmod._state definitions
@@ -604,6 +608,8 @@ int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
604 608
605int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); 609int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
606 610
611int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
612
607/* 613/*
608 * Chip variant-specific hwmod init routines - XXX should be converted 614 * Chip variant-specific hwmod init routines - XXX should be converted
609 * to use initcalls once the initial boot ordering is straightened out 615 * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index ac44bde5d36d..198d1e6a4a6c 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -44,6 +44,7 @@
44#define OMAP3_UART2_BASE OMAP2_UART2_BASE 44#define OMAP3_UART2_BASE OMAP2_UART2_BASE
45#define OMAP3_UART3_BASE 0x49020000 45#define OMAP3_UART3_BASE 0x49020000
46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
47#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
47 48
48/* OMAP4 serial ports */ 49/* OMAP4 serial ports */
49#define OMAP4_UART1_BASE OMAP2_UART1_BASE 50#define OMAP4_UART1_BASE OMAP2_UART1_BASE
@@ -51,10 +52,10 @@
51#define OMAP4_UART3_BASE 0x48020000 52#define OMAP4_UART3_BASE 0x48020000
52#define OMAP4_UART4_BASE 0x4806e000 53#define OMAP4_UART4_BASE 0x4806e000
53 54
54/* TI816X serial ports */ 55/* TI81XX serial ports */
55#define TI816X_UART1_BASE 0x48020000 56#define TI81XX_UART1_BASE 0x48020000
56#define TI816X_UART2_BASE 0x48022000 57#define TI81XX_UART2_BASE 0x48022000
57#define TI816X_UART3_BASE 0x48024000 58#define TI81XX_UART3_BASE 0x48024000
58 59
59/* AM3505/3517 UART4 */ 60/* AM3505/3517 UART4 */
60#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ 61#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
@@ -89,9 +90,9 @@
89#define OMAP4UART2 OMAP2UART2 90#define OMAP4UART2 OMAP2UART2
90#define OMAP4UART3 43 91#define OMAP4UART3 43
91#define OMAP4UART4 44 92#define OMAP4UART4 44
92#define TI816XUART1 81 93#define TI81XXUART1 81
93#define TI816XUART2 82 94#define TI81XXUART2 82
94#define TI816XUART3 83 95#define TI81XXUART3 83
95#define ZOOM_UART 95 /* Only on zoom2/3 */ 96#define ZOOM_UART 95 /* Only on zoom2/3 */
96 97
97/* This is only used by 8250.c for omap1510 */ 98/* This is only used by 8250.c for omap1510 */
@@ -106,15 +107,13 @@
106#ifndef __ASSEMBLER__ 107#ifndef __ASSEMBLER__
107 108
108struct omap_board_data; 109struct omap_board_data;
110struct omap_uart_port_info;
109 111
110extern void omap_serial_init(void); 112extern void omap_serial_init(void);
111extern void omap_serial_init_port(struct omap_board_data *bdata);
112extern int omap_uart_can_sleep(void); 113extern int omap_uart_can_sleep(void);
113extern void omap_uart_check_wakeup(void); 114extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
114extern void omap_uart_prepare_suspend(void); 115extern void omap_serial_init_port(struct omap_board_data *bdata,
115extern void omap_uart_prepare_idle(int num); 116 struct omap_uart_port_info *platform_data);
116extern void omap_uart_resume_idle(int num);
117extern void omap_uart_enable_irqs(int enable);
118#endif 117#endif
119 118
120#endif 119#endif
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index f500fc34d065..75aa1b2bef51 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -95,6 +95,10 @@ static inline void omap_push_sram_idle(void) {}
95 */ 95 */
96#define OMAP2_SRAM_PA 0x40200000 96#define OMAP2_SRAM_PA 0x40200000
97#define OMAP3_SRAM_PA 0x40200000 97#define OMAP3_SRAM_PA 0x40200000
98#ifdef CONFIG_OMAP4_ERRATA_I688
99#define OMAP4_SRAM_PA 0x40304000
100#define OMAP4_SRAM_VA 0xfe404000
101#else
98#define OMAP4_SRAM_PA 0x40300000 102#define OMAP4_SRAM_PA 0x40300000
99 103#endif
100#endif 104#endif
diff --git a/arch/arm/plat-omap/include/plat/ti816x.h b/arch/arm/plat-omap/include/plat/ti81xx.h
index 50510f5dda1e..8f9843f78422 100644
--- a/arch/arm/plat-omap/include/plat/ti816x.h
+++ b/arch/arm/plat-omap/include/plat/ti81xx.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * This file contains the address data for various TI816X modules. 2 * This file contains the address data for various TI81XX modules.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -13,15 +13,15 @@
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 15
16#ifndef __ASM_ARCH_TI816X_H 16#ifndef __ASM_ARCH_TI81XX_H
17#define __ASM_ARCH_TI816X_H 17#define __ASM_ARCH_TI81XX_H
18 18
19#define L4_SLOW_TI816X_BASE 0x48000000 19#define L4_SLOW_TI81XX_BASE 0x48000000
20 20
21#define TI816X_SCM_BASE 0x48140000 21#define TI81XX_SCM_BASE 0x48140000
22#define TI816X_CTRL_BASE TI816X_SCM_BASE 22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
23#define TI816X_PRCM_BASE 0x48180000 23#define TI81XX_PRCM_BASE 0x48180000
24 24
25#define TI816X_ARM_INTC_BASE 0x48200000 25#define TI81XX_ARM_INTC_BASE 0x48200000
26 26
27#endif /* __ASM_ARCH_TI816X_H */ 27#endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 2f472e989ec6..6ee90495ca4c 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -99,9 +99,9 @@ static inline void flush(void)
99#define DEBUG_LL_ZOOM(mach) \ 99#define DEBUG_LL_ZOOM(mach) \
100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) 100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
101 101
102#define DEBUG_LL_TI816X(p, mach) \ 102#define DEBUG_LL_TI81XX(p, mach) \
103 _DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \ 103 _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
104 TI816XUART##p) 104 TI81XXUART##p)
105 105
106static inline void __arch_decomp_setup(unsigned long arch_id) 106static inline void __arch_decomp_setup(unsigned long arch_id)
107{ 107{
@@ -177,7 +177,10 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
177 DEBUG_LL_ZOOM(omap_zoom3); 177 DEBUG_LL_ZOOM(omap_zoom3);
178 178
179 /* TI8168 base boards using UART3 */ 179 /* TI8168 base boards using UART3 */
180 DEBUG_LL_TI816X(3, ti8168evm); 180 DEBUG_LL_TI81XX(3, ti8168evm);
181
182 /* TI8148 base boards using UART1 */
183 DEBUG_LL_TI81XX(1, ti8148evm);
181 184
182 } while (0); 185 } while (0);
183} 186}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c939775c..dc864b580da0 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -100,9 +100,6 @@ extern void usb_musb_init(struct omap_musb_board_data *board_data);
100 100
101extern void usbhs_init(const struct usbhs_omap_board_data *pdata); 101extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
102 102
103extern int omap_usbhs_enable(struct device *dev);
104extern void omap_usbhs_disable(struct device *dev);
105
106extern int omap4430_phy_power(struct device *dev, int ID, int on); 103extern int omap4430_phy_power(struct device *dev, int ID, int on);
107extern int omap4430_phy_set_clk(struct device *dev, int on); 104extern int omap4430_phy_set_clk(struct device *dev, int on);
108extern int omap4430_phy_init(struct device *dev); 105extern int omap4430_phy_init(struct device *dev);
@@ -114,6 +111,7 @@ extern void am35x_musb_reset(void);
114extern void am35x_musb_phy_power(u8 on); 111extern void am35x_musb_phy_power(u8 on);
115extern void am35x_musb_clear_irq(void); 112extern void am35x_musb_clear_irq(void);
116extern void am35x_set_mode(u8 musb_mode); 113extern void am35x_set_mode(u8 musb_mode);
114extern void ti81xx_musb_phy_power(u8 on);
117 115
118/* 116/*
119 * FIXME correct answer depends on hmc_mode, 117 * FIXME correct answer depends on hmc_mode,
@@ -273,6 +271,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
273#define CONF2_OTGPWRDN (1 << 2) 271#define CONF2_OTGPWRDN (1 << 2)
274#define CONF2_DATPOL (1 << 1) 272#define CONF2_DATPOL (1 << 1)
275 273
274/* TI81XX specific definitions */
275#define USBCTRL0 0x620
276#define USBSTAT0 0x624
277
278/* TI816X PHY controls bits */
279#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
280#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
281
282/* TI814X PHY controls bits */
283#define USBPHY_CM_PWRDN (1 << 0)
284#define USBPHY_OTG_PWRDN (1 << 1)
285#define USBPHY_CHGDET_DIS (1 << 2)
286#define USBPHY_CHGDET_RSTRT (1 << 3)
287#define USBPHY_SRCONDM (1 << 4)
288#define USBPHY_SINKONDP (1 << 5)
289#define USBPHY_CHGISINK_EN (1 << 6)
290#define USBPHY_CHGVSRC_EN (1 << 7)
291#define USBPHY_DMPULLUP (1 << 8)
292#define USBPHY_DPPULLUP (1 << 9)
293#define USBPHY_CDET_EXTCTL (1 << 10)
294#define USBPHY_GPIO_MODE (1 << 12)
295#define USBPHY_DPOPBUFCTL (1 << 13)
296#define USBPHY_DMOPBUFCTL (1 << 14)
297#define USBPHY_DPINPUT (1 << 15)
298#define USBPHY_DMINPUT (1 << 16)
299#define USBPHY_DPGPIO_PD (1 << 17)
300#define USBPHY_DMGPIO_PD (1 << 18)
301#define USBPHY_OTGVDET_EN (1 << 19)
302#define USBPHY_OTGSESSEND_EN (1 << 20)
303#define USBPHY_DATA_POLARITY (1 << 23)
304
276#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) 305#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
277u32 omap1_usb0_init(unsigned nwires, unsigned is_device); 306u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
278u32 omap1_usb1_init(unsigned nwires); 307u32 omap1_usb1_init(unsigned nwires);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 8b28664d1c62..4243bdcc87bc 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -40,7 +40,11 @@
40#define OMAP1_SRAM_PA 0x20000000 40#define OMAP1_SRAM_PA 0x20000000
41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) 41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
42#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) 42#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
43#ifdef CONFIG_OMAP4_ERRATA_I688
44#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
45#else
43#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) 46#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
47#endif
44 48
45#if defined(CONFIG_ARCH_OMAP2PLUS) 49#if defined(CONFIG_ARCH_OMAP2PLUS)
46#define SRAM_BOOTLOADER_SZ 0x00 50#define SRAM_BOOTLOADER_SZ 0x00
@@ -141,11 +145,9 @@ static void __init omap_detect_sram(void)
141 omap_sram_size = 0x32000; /* 200K */ 145 omap_sram_size = 0x32000; /* 200K */
142 else if (cpu_is_omap15xx()) 146 else if (cpu_is_omap15xx())
143 omap_sram_size = 0x30000; /* 192K */ 147 omap_sram_size = 0x30000; /* 192K */
144 else if (cpu_is_omap1610() || cpu_is_omap1621() || 148 else if (cpu_is_omap1610() || cpu_is_omap1611() ||
145 cpu_is_omap1710()) 149 cpu_is_omap1621() || cpu_is_omap1710())
146 omap_sram_size = 0x4000; /* 16K */ 150 omap_sram_size = 0x4000; /* 16K */
147 else if (cpu_is_omap1611())
148 omap_sram_size = SZ_256K;
149 else { 151 else {
150 pr_err("Could not detect SRAM size\n"); 152 pr_err("Could not detect SRAM size\n");
151 omap_sram_size = 0x4000; 153 omap_sram_size = 0x4000;
@@ -163,6 +165,10 @@ static void __init omap_map_sram(void)
163 if (omap_sram_size == 0) 165 if (omap_sram_size == 0)
164 return; 166 return;
165 167
168#ifdef CONFIG_OMAP4_ERRATA_I688
169 omap_sram_start += PAGE_SIZE;
170 omap_sram_size -= SZ_16K;
171#endif
166 if (cpu_is_omap34xx()) { 172 if (cpu_is_omap34xx()) {
167 /* 173 /*
168 * SRAM must be marked as non-cached on OMAP3 since the 174 * SRAM must be marked as non-cached on OMAP3 since the
@@ -224,6 +230,9 @@ static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
224void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) 230void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
225{ 231{
226 BUG_ON(!_omap_sram_reprogram_clock); 232 BUG_ON(!_omap_sram_reprogram_clock);
233 /* On 730, bit 13 must always be 1 */
234 if (cpu_is_omap7xx())
235 ckctl |= 0x2000;
227 _omap_sram_reprogram_clock(dpllctl, ckctl); 236 _omap_sram_reprogram_clock(dpllctl, ckctl);
228} 237}
229 238
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index 95a5fc53b6db..c20ce0f5ce33 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := irq.o pcie.o time.o common.o mpp.o 5obj-y := irq.o pcie.o time.o common.o mpp.o addr-map.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
new file mode 100644
index 000000000000..367ca89ac403
--- /dev/null
+++ b/arch/arm/plat-orion/addr-map.c
@@ -0,0 +1,174 @@
1/*
2 * arch/arm/plat-orion/addr-map.c
3 *
4 * Address map functions for Marvell Orion based SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/mbus.h>
15#include <linux/io.h>
16#include <plat/addr-map.h>
17
18struct mbus_dram_target_info orion_mbus_dram_info;
19
20const struct mbus_dram_target_info *mv_mbus_dram_info(void)
21{
22 return &orion_mbus_dram_info;
23}
24EXPORT_SYMBOL_GPL(mv_mbus_dram_info);
25
26/*
27 * DDR target is the same on all Orion platforms.
28 */
29#define TARGET_DDR 0
30
31/*
32 * Helpers to get DDR bank info
33 */
34#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
35#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
36
37/*
38 * CPU Address Decode Windows registers
39 */
40#define WIN_CTRL_OFF 0x0000
41#define WIN_BASE_OFF 0x0004
42#define WIN_REMAP_LO_OFF 0x0008
43#define WIN_REMAP_HI_OFF 0x000c
44
45/*
46 * Default implementation
47 */
48static void __init __iomem *
49orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
50{
51 return (void __iomem *)(cfg->bridge_virt_base + (win << 4));
52}
53
54/*
55 * Default implementation
56 */
57static int __init orion_cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
58 const int win)
59{
60 if (win < cfg->remappable_wins)
61 return 1;
62
63 return 0;
64}
65
66void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
67 const int win, const u32 base,
68 const u32 size, const u8 target,
69 const u8 attr, const int remap)
70{
71 void __iomem *addr = cfg->win_cfg_base(cfg, win);
72 u32 ctrl, base_high, remap_addr;
73
74 if (win >= cfg->num_wins) {
75 printk(KERN_ERR "setup_cpu_win: trying to allocate window "
76 "%d when only %d allowed\n", win, cfg->num_wins);
77 }
78
79 base_high = base & 0xffff0000;
80 ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
81
82 writel(base_high, addr + WIN_BASE_OFF);
83 writel(ctrl, addr + WIN_CTRL_OFF);
84 if (cfg->cpu_win_can_remap(cfg, win)) {
85 if (remap < 0)
86 remap_addr = base;
87 else
88 remap_addr = remap;
89 writel(remap_addr & 0xffff0000, addr + WIN_REMAP_LO_OFF);
90 writel(0, addr + WIN_REMAP_HI_OFF);
91 }
92}
93
94/*
95 * Configure a number of windows.
96 */
97static void __init orion_setup_cpu_wins(const struct orion_addr_map_cfg * cfg,
98 const struct orion_addr_map_info *info)
99{
100 while (info->win != -1) {
101 orion_setup_cpu_win(cfg, info->win, info->base, info->size,
102 info->target, info->attr, info->remap);
103 info++;
104 }
105}
106
107static void __init orion_disable_wins(const struct orion_addr_map_cfg * cfg)
108{
109 void __iomem *addr;
110 int i;
111
112 for (i = 0; i < cfg->num_wins; i++) {
113 addr = cfg->win_cfg_base(cfg, i);
114
115 writel(0, addr + WIN_BASE_OFF);
116 writel(0, addr + WIN_CTRL_OFF);
117 if (cfg->cpu_win_can_remap(cfg, i)) {
118 writel(0, addr + WIN_REMAP_LO_OFF);
119 writel(0, addr + WIN_REMAP_HI_OFF);
120 }
121 }
122}
123
124/*
125 * Disable, clear and configure windows.
126 */
127void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
128 const struct orion_addr_map_info *info)
129{
130 if (!cfg->cpu_win_can_remap)
131 cfg->cpu_win_can_remap = orion_cpu_win_can_remap;
132
133 if (!cfg->win_cfg_base)
134 cfg->win_cfg_base = orion_win_cfg_base;
135
136 orion_disable_wins(cfg);
137
138 if (info)
139 orion_setup_cpu_wins(cfg, info);
140}
141
142/*
143 * Setup MBUS dram target info.
144 */
145void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
146 const u32 ddr_window_cpu_base)
147{
148 void __iomem *addr;
149 int i;
150 int cs;
151
152 orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
153
154 addr = (void __iomem *)ddr_window_cpu_base;
155
156 for (i = 0, cs = 0; i < 4; i++) {
157 u32 base = readl(addr + DDR_BASE_CS_OFF(i));
158 u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
159
160 /*
161 * Chip select enabled?
162 */
163 if (size & 1) {
164 struct mbus_dram_window *w;
165
166 w = &orion_mbus_dram_info.cs[cs++];
167 w->cs_index = i;
168 w->mbus_attr = 0xf & ~(1 << i);
169 w->base = base & 0xffff0000;
170 w->size = (size | 0x0000ffff) + 1;
171 }
172 }
173 orion_mbus_dram_info.num_cs = cs;
174}
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 9e5451b3c8e3..e5a2fde29b19 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -13,7 +13,6 @@
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/serial_8250.h> 15#include <linux/serial_8250.h>
16#include <linux/mbus.h>
17#include <linux/ata_platform.h> 16#include <linux/ata_platform.h>
18#include <linux/mv643xx_eth.h> 17#include <linux/mv643xx_eth.h>
19#include <linux/mv643xx_i2c.h> 18#include <linux/mv643xx_i2c.h>
@@ -203,13 +202,12 @@ void __init orion_rtc_init(unsigned long mapbase,
203 ****************************************************************************/ 202 ****************************************************************************/
204static __init void ge_complete( 203static __init void ge_complete(
205 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, 204 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
206 struct mbus_dram_target_info *mbus_dram_info, int tclk, 205 int tclk,
207 struct resource *orion_ge_resource, unsigned long irq, 206 struct resource *orion_ge_resource, unsigned long irq,
208 struct platform_device *orion_ge_shared, 207 struct platform_device *orion_ge_shared,
209 struct mv643xx_eth_platform_data *eth_data, 208 struct mv643xx_eth_platform_data *eth_data,
210 struct platform_device *orion_ge) 209 struct platform_device *orion_ge)
211{ 210{
212 orion_ge_shared_data->dram = mbus_dram_info;
213 orion_ge_shared_data->t_clk = tclk; 211 orion_ge_shared_data->t_clk = tclk;
214 orion_ge_resource->start = irq; 212 orion_ge_resource->start = irq;
215 orion_ge_resource->end = irq; 213 orion_ge_resource->end = irq;
@@ -259,7 +257,6 @@ static struct platform_device orion_ge00 = {
259}; 257};
260 258
261void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 259void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
262 struct mbus_dram_target_info *mbus_dram_info,
263 unsigned long mapbase, 260 unsigned long mapbase,
264 unsigned long irq, 261 unsigned long irq,
265 unsigned long irq_err, 262 unsigned long irq_err,
@@ -267,7 +264,7 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
267{ 264{
268 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, 265 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
269 mapbase + 0x2000, SZ_16K - 1, irq_err); 266 mapbase + 0x2000, SZ_16K - 1, irq_err);
270 ge_complete(&orion_ge00_shared_data, mbus_dram_info, tclk, 267 ge_complete(&orion_ge00_shared_data, tclk,
271 orion_ge00_resources, irq, &orion_ge00_shared, 268 orion_ge00_resources, irq, &orion_ge00_shared,
272 eth_data, &orion_ge00); 269 eth_data, &orion_ge00);
273} 270}
@@ -313,7 +310,6 @@ static struct platform_device orion_ge01 = {
313}; 310};
314 311
315void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 312void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
316 struct mbus_dram_target_info *mbus_dram_info,
317 unsigned long mapbase, 313 unsigned long mapbase,
318 unsigned long irq, 314 unsigned long irq,
319 unsigned long irq_err, 315 unsigned long irq_err,
@@ -321,7 +317,7 @@ void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
321{ 317{
322 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, 318 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
323 mapbase + 0x2000, SZ_16K - 1, irq_err); 319 mapbase + 0x2000, SZ_16K - 1, irq_err);
324 ge_complete(&orion_ge01_shared_data, mbus_dram_info, tclk, 320 ge_complete(&orion_ge01_shared_data, tclk,
325 orion_ge01_resources, irq, &orion_ge01_shared, 321 orion_ge01_resources, irq, &orion_ge01_shared,
326 eth_data, &orion_ge01); 322 eth_data, &orion_ge01);
327} 323}
@@ -367,7 +363,6 @@ static struct platform_device orion_ge10 = {
367}; 363};
368 364
369void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, 365void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
370 struct mbus_dram_target_info *mbus_dram_info,
371 unsigned long mapbase, 366 unsigned long mapbase,
372 unsigned long irq, 367 unsigned long irq,
373 unsigned long irq_err, 368 unsigned long irq_err,
@@ -375,7 +370,7 @@ void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
375{ 370{
376 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, 371 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
377 mapbase + 0x2000, SZ_16K - 1, irq_err); 372 mapbase + 0x2000, SZ_16K - 1, irq_err);
378 ge_complete(&orion_ge10_shared_data, mbus_dram_info, tclk, 373 ge_complete(&orion_ge10_shared_data, tclk,
379 orion_ge10_resources, irq, &orion_ge10_shared, 374 orion_ge10_resources, irq, &orion_ge10_shared,
380 eth_data, &orion_ge10); 375 eth_data, &orion_ge10);
381} 376}
@@ -421,7 +416,6 @@ static struct platform_device orion_ge11 = {
421}; 416};
422 417
423void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, 418void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
424 struct mbus_dram_target_info *mbus_dram_info,
425 unsigned long mapbase, 419 unsigned long mapbase,
426 unsigned long irq, 420 unsigned long irq,
427 unsigned long irq_err, 421 unsigned long irq_err,
@@ -429,7 +423,7 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
429{ 423{
430 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, 424 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
431 mapbase + 0x2000, SZ_16K - 1, irq_err); 425 mapbase + 0x2000, SZ_16K - 1, irq_err);
432 ge_complete(&orion_ge11_shared_data, mbus_dram_info, tclk, 426 ge_complete(&orion_ge11_shared_data, tclk,
433 orion_ge11_resources, irq, &orion_ge11_shared, 427 orion_ge11_resources, irq, &orion_ge11_shared,
434 eth_data, &orion_ge11); 428 eth_data, &orion_ge11);
435} 429}
@@ -592,8 +586,6 @@ void __init orion_wdt_init(unsigned long tclk)
592/***************************************************************************** 586/*****************************************************************************
593 * XOR 587 * XOR
594 ****************************************************************************/ 588 ****************************************************************************/
595static struct mv_xor_platform_shared_data orion_xor_shared_data;
596
597static u64 orion_xor_dmamask = DMA_BIT_MASK(32); 589static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
598 590
599void __init orion_xor_init_channels( 591void __init orion_xor_init_channels(
@@ -632,9 +624,6 @@ static struct resource orion_xor0_shared_resources[] = {
632static struct platform_device orion_xor0_shared = { 624static struct platform_device orion_xor0_shared = {
633 .name = MV_XOR_SHARED_NAME, 625 .name = MV_XOR_SHARED_NAME,
634 .id = 0, 626 .id = 0,
635 .dev = {
636 .platform_data = &orion_xor_shared_data,
637 },
638 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), 627 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
639 .resource = orion_xor0_shared_resources, 628 .resource = orion_xor0_shared_resources,
640}; 629};
@@ -687,14 +676,11 @@ static struct platform_device orion_xor01_channel = {
687 }, 676 },
688}; 677};
689 678
690void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info, 679void __init orion_xor0_init(unsigned long mapbase_low,
691 unsigned long mapbase_low,
692 unsigned long mapbase_high, 680 unsigned long mapbase_high,
693 unsigned long irq_0, 681 unsigned long irq_0,
694 unsigned long irq_1) 682 unsigned long irq_1)
695{ 683{
696 orion_xor_shared_data.dram = mbus_dram_info;
697
698 orion_xor0_shared_resources[0].start = mapbase_low; 684 orion_xor0_shared_resources[0].start = mapbase_low;
699 orion_xor0_shared_resources[0].end = mapbase_low + 0xff; 685 orion_xor0_shared_resources[0].end = mapbase_low + 0xff;
700 orion_xor0_shared_resources[1].start = mapbase_high; 686 orion_xor0_shared_resources[1].start = mapbase_high;
@@ -727,9 +713,6 @@ static struct resource orion_xor1_shared_resources[] = {
727static struct platform_device orion_xor1_shared = { 713static struct platform_device orion_xor1_shared = {
728 .name = MV_XOR_SHARED_NAME, 714 .name = MV_XOR_SHARED_NAME,
729 .id = 1, 715 .id = 1,
730 .dev = {
731 .platform_data = &orion_xor_shared_data,
732 },
733 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), 716 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
734 .resource = orion_xor1_shared_resources, 717 .resource = orion_xor1_shared_resources,
735}; 718};
@@ -828,11 +811,9 @@ static struct platform_device orion_ehci = {
828 }, 811 },
829}; 812};
830 813
831void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info, 814void __init orion_ehci_init(unsigned long mapbase,
832 unsigned long mapbase,
833 unsigned long irq) 815 unsigned long irq)
834{ 816{
835 orion_ehci_data.dram = mbus_dram_info;
836 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, 817 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
837 irq); 818 irq);
838 819
@@ -854,11 +835,9 @@ static struct platform_device orion_ehci_1 = {
854 }, 835 },
855}; 836};
856 837
857void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info, 838void __init orion_ehci_1_init(unsigned long mapbase,
858 unsigned long mapbase,
859 unsigned long irq) 839 unsigned long irq)
860{ 840{
861 orion_ehci_data.dram = mbus_dram_info;
862 fill_resources(&orion_ehci_1, orion_ehci_1_resources, 841 fill_resources(&orion_ehci_1, orion_ehci_1_resources,
863 mapbase, SZ_4K - 1, irq); 842 mapbase, SZ_4K - 1, irq);
864 843
@@ -880,11 +859,9 @@ static struct platform_device orion_ehci_2 = {
880 }, 859 },
881}; 860};
882 861
883void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info, 862void __init orion_ehci_2_init(unsigned long mapbase,
884 unsigned long mapbase,
885 unsigned long irq) 863 unsigned long irq)
886{ 864{
887 orion_ehci_data.dram = mbus_dram_info;
888 fill_resources(&orion_ehci_2, orion_ehci_2_resources, 865 fill_resources(&orion_ehci_2, orion_ehci_2_resources,
889 mapbase, SZ_4K - 1, irq); 866 mapbase, SZ_4K - 1, irq);
890 867
@@ -911,11 +888,9 @@ static struct platform_device orion_sata = {
911}; 888};
912 889
913void __init orion_sata_init(struct mv_sata_platform_data *sata_data, 890void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
914 struct mbus_dram_target_info *mbus_dram_info,
915 unsigned long mapbase, 891 unsigned long mapbase,
916 unsigned long irq) 892 unsigned long irq)
917{ 893{
918 sata_data->dram = mbus_dram_info;
919 orion_sata.dev.platform_data = sata_data; 894 orion_sata.dev.platform_data = sata_data;
920 fill_resources(&orion_sata, orion_sata_resources, 895 fill_resources(&orion_sata, orion_sata_resources,
921 mapbase, 0x5000 - 1, irq); 896 mapbase, 0x5000 - 1, irq);
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
new file mode 100644
index 000000000000..fd556f77562c
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -0,0 +1,53 @@
1/*
2 * arch/arm/plat-orion/include/plat/addr-map.h
3 *
4 * Marvell Orion SoC address map handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_ADDR_MAP_H
12#define __PLAT_ADDR_MAP_H
13
14extern struct mbus_dram_target_info orion_mbus_dram_info;
15
16struct orion_addr_map_cfg {
17 const int num_wins; /* Total number of windows */
18 const int remappable_wins;
19 const u32 bridge_virt_base;
20
21 /* If NULL, the default cpu_win_can_remap will be used, using
22 the value in remappable_wins */
23 int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg,
24 const int win);
25 /* If NULL, the default win_cfg_base will be used, using the
26 value in bridge_virt_base */
27 void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg,
28 const int win);
29};
30
31/*
32 * Information needed to setup one address mapping.
33 */
34struct orion_addr_map_info {
35 const int win;
36 const u32 base;
37 const u32 size;
38 const u8 target;
39 const u8 attr;
40 const int remap;
41};
42
43void __init orion_config_wins(struct orion_addr_map_cfg *cfg,
44 const struct orion_addr_map_info *info);
45
46void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
47 const int win, const u32 base,
48 const u32 size, const u8 target,
49 const u8 attr, const int remap);
50
51void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
52 const u32 ddr_window_cpu_base);
53#endif
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h
index 9cf1f781329b..885f8abd927b 100644
--- a/arch/arm/plat-orion/include/plat/audio.h
+++ b/arch/arm/plat-orion/include/plat/audio.h
@@ -1,11 +1,8 @@
1#ifndef __PLAT_AUDIO_H 1#ifndef __PLAT_AUDIO_H
2#define __PLAT_AUDIO_H 2#define __PLAT_AUDIO_H
3 3
4#include <linux/mbus.h>
5
6struct kirkwood_asoc_platform_data { 4struct kirkwood_asoc_platform_data {
7 u32 tclk; 5 u32 tclk;
8 struct mbus_dram_target_info *dram;
9 int burst; 6 int burst;
10}; 7};
11#endif 8#endif
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index a63c357e2ab1..0fe08d77e835 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -37,28 +37,24 @@ void __init orion_rtc_init(unsigned long mapbase,
37 unsigned long irq); 37 unsigned long irq);
38 38
39void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 39void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
40 struct mbus_dram_target_info *mbus_dram_info,
41 unsigned long mapbase, 40 unsigned long mapbase,
42 unsigned long irq, 41 unsigned long irq,
43 unsigned long irq_err, 42 unsigned long irq_err,
44 int tclk); 43 int tclk);
45 44
46void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 45void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
47 struct mbus_dram_target_info *mbus_dram_info,
48 unsigned long mapbase, 46 unsigned long mapbase,
49 unsigned long irq, 47 unsigned long irq,
50 unsigned long irq_err, 48 unsigned long irq_err,
51 int tclk); 49 int tclk);
52 50
53void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, 51void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
54 struct mbus_dram_target_info *mbus_dram_info,
55 unsigned long mapbase, 52 unsigned long mapbase,
56 unsigned long irq, 53 unsigned long irq,
57 unsigned long irq_err, 54 unsigned long irq_err,
58 int tclk); 55 int tclk);
59 56
60void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, 57void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
61 struct mbus_dram_target_info *mbus_dram_info,
62 unsigned long mapbase, 58 unsigned long mapbase,
63 unsigned long irq, 59 unsigned long irq,
64 unsigned long irq_err, 60 unsigned long irq_err,
@@ -82,8 +78,7 @@ void __init orion_spi_1_init(unsigned long mapbase,
82 78
83void __init orion_wdt_init(unsigned long tclk); 79void __init orion_wdt_init(unsigned long tclk);
84 80
85void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info, 81void __init orion_xor0_init(unsigned long mapbase_low,
86 unsigned long mapbase_low,
87 unsigned long mapbase_high, 82 unsigned long mapbase_high,
88 unsigned long irq_0, 83 unsigned long irq_0,
89 unsigned long irq_1); 84 unsigned long irq_1);
@@ -93,20 +88,16 @@ void __init orion_xor1_init(unsigned long mapbase_low,
93 unsigned long irq_0, 88 unsigned long irq_0,
94 unsigned long irq_1); 89 unsigned long irq_1);
95 90
96void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info, 91void __init orion_ehci_init(unsigned long mapbase,
97 unsigned long mapbase,
98 unsigned long irq); 92 unsigned long irq);
99 93
100void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info, 94void __init orion_ehci_1_init(unsigned long mapbase,
101 unsigned long mapbase,
102 unsigned long irq); 95 unsigned long irq);
103 96
104void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info, 97void __init orion_ehci_2_init(unsigned long mapbase,
105 unsigned long mapbase,
106 unsigned long irq); 98 unsigned long irq);
107 99
108void __init orion_sata_init(struct mv_sata_platform_data *sata_data, 100void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
109 struct mbus_dram_target_info *mbus_dram_info,
110 unsigned long mapbase, 101 unsigned long mapbase,
111 unsigned long irq); 102 unsigned long irq);
112 103
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
index 4ec668e77460..6fc78e430420 100644
--- a/arch/arm/plat-orion/include/plat/ehci-orion.h
+++ b/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -19,7 +19,6 @@ enum orion_ehci_phy_ver {
19}; 19};
20 20
21struct orion_ehci_data { 21struct orion_ehci_data {
22 struct mbus_dram_target_info *dram;
23 enum orion_ehci_phy_ver phy_version; 22 enum orion_ehci_phy_ver phy_version;
24}; 23};
25 24
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h
index bd5f3bdb4ae3..2ba1f7d76eef 100644
--- a/arch/arm/plat-orion/include/plat/mv_xor.h
+++ b/arch/arm/plat-orion/include/plat/mv_xor.h
@@ -13,12 +13,6 @@
13#define MV_XOR_SHARED_NAME "mv_xor_shared" 13#define MV_XOR_SHARED_NAME "mv_xor_shared"
14#define MV_XOR_NAME "mv_xor" 14#define MV_XOR_NAME "mv_xor"
15 15
16struct mbus_dram_target_info;
17
18struct mv_xor_platform_shared_data {
19 struct mbus_dram_target_info *dram;
20};
21
22struct mv_xor_platform_data { 16struct mv_xor_platform_data {
23 struct platform_device *shared; 17 struct platform_device *shared;
24 int hw_id; 18 int hw_id;
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h
index 14ca88676002..1190efedcb94 100644
--- a/arch/arm/plat-orion/include/plat/mvsdio.h
+++ b/arch/arm/plat-orion/include/plat/mvsdio.h
@@ -12,7 +12,6 @@
12#include <linux/mbus.h> 12#include <linux/mbus.h>
13 13
14struct mvsdio_platform_data { 14struct mvsdio_platform_data {
15 struct mbus_dram_target_info *dram;
16 unsigned int clock; 15 unsigned int clock;
17 int gpio_card_detect; 16 int gpio_card_detect;
18 int gpio_write_protect; 17 int gpio_write_protect;
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index cc99163e73fd..fe5b9e862747 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -20,8 +20,7 @@ int orion_pcie_x4_mode(void __iomem *base);
20int orion_pcie_get_local_bus_nr(void __iomem *base); 20int orion_pcie_get_local_bus_nr(void __iomem *base);
21void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); 21void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
22void orion_pcie_reset(void __iomem *base); 22void orion_pcie_reset(void __iomem *base);
23void orion_pcie_setup(void __iomem *base, 23void orion_pcie_setup(void __iomem *base);
24 struct mbus_dram_target_info *dram);
25int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, 24int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
26 u32 devfn, int where, int size, u32 *val); 25 u32 devfn, int where, int size, u32 *val);
27int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, 26int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index af2d733c50b5..86dbb5bdb172 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -13,6 +13,7 @@
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/mach/pci.h> 14#include <asm/mach/pci.h>
15#include <plat/pcie.h> 15#include <plat/pcie.h>
16#include <plat/addr-map.h>
16#include <linux/delay.h> 17#include <linux/delay.h>
17 18
18/* 19/*
@@ -175,8 +176,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
175 writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1)); 176 writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
176} 177}
177 178
178void __init orion_pcie_setup(void __iomem *base, 179void __init orion_pcie_setup(void __iomem *base)
179 struct mbus_dram_target_info *dram)
180{ 180{
181 u16 cmd; 181 u16 cmd;
182 u32 mask; 182 u32 mask;
@@ -184,7 +184,7 @@ void __init orion_pcie_setup(void __iomem *base,
184 /* 184 /*
185 * Point PCIe unit MBUS decode windows to DRAM space. 185 * Point PCIe unit MBUS decode windows to DRAM space.
186 */ 186 */
187 orion_pcie_setup_wins(base, dram); 187 orion_pcie_setup_wins(base, &orion_mbus_dram_info);
188 188
189 /* 189 /*
190 * Master + slave enable. 190 * Master + slave enable.
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
deleted file mode 100644
index b6390beff323..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef __PLAT_PXA_GPIO_H
2#define __PLAT_PXA_GPIO_H
3
4struct irq_data;
5
6/*
7 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
8 * one set of registers. The register offsets are organized below:
9 *
10 * GPLR GPDR GPSR GPCR GRER GFER GEDR
11 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
12 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
13 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
14 *
15 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
16 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
17 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
18 *
19 * NOTE:
20 * BANK 3 is only available on PXA27x and later processors.
21 * BANK 4 and 5 are only available on PXA935
22 */
23
24#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
25
26#define GPLR_OFFSET 0x00
27#define GPDR_OFFSET 0x0C
28#define GPSR_OFFSET 0x18
29#define GPCR_OFFSET 0x24
30#define GRER_OFFSET 0x30
31#define GFER_OFFSET 0x3C
32#define GEDR_OFFSET 0x48
33
34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
35 * Those cases currently cause holes in the GPIO number space, the
36 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
37 */
38extern int pxa_last_gpio;
39
40typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
41
42extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
43
44#endif /* __PLAT_PXA_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
deleted file mode 100644
index 258f77210b02..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __PLAT_GPIO_H
2#define __PLAT_GPIO_H
3
4#define __ARM_GPIOLIB_COMPLEX
5
6/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
7#include <mach/gpio-pxa.h>
8
9static inline int gpio_get_value(unsigned gpio)
10{
11 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
12 return GPLR(gpio) & GPIO_bit(gpio);
13 else
14 return __gpio_get_value(gpio);
15}
16
17static inline void gpio_set_value(unsigned gpio, int value)
18{
19 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
20 if (value)
21 GPSR(gpio) = GPIO_bit(gpio);
22 else
23 GPCR(gpio) = GPIO_bit(gpio);
24 } else
25 __gpio_set_value(gpio, value);
26}
27
28#define gpio_cansleep __gpio_cansleep
29
30#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 53754bcf15a7..9fe35348e03b 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1437,11 +1437,10 @@ int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel)
1437 size_t map_sz = sizeof(*nmap) * sel->map_size; 1437 size_t map_sz = sizeof(*nmap) * sel->map_size;
1438 int ptr; 1438 int ptr;
1439 1439
1440 nmap = kmalloc(map_sz, GFP_KERNEL); 1440 nmap = kmemdup(sel->map, map_sz, GFP_KERNEL);
1441 if (nmap == NULL) 1441 if (nmap == NULL)
1442 return -ENOMEM; 1442 return -ENOMEM;
1443 1443
1444 memcpy(nmap, sel->map, map_sz);
1445 memcpy(&dma_sel, sel, sizeof(*sel)); 1444 memcpy(&dma_sel, sel, sizeof(*sel));
1446 1445
1447 dma_sel.map = nmap; 1446 dma_sel.map = nmap;
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 5a21b15b2a97..95e68190d593 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -297,13 +297,6 @@ static struct clksrc_clk clk_usb_bus_host = {
297 297
298static struct clksrc_clk clksrc_clks[] = { 298static struct clksrc_clk clksrc_clks[] = {
299 { 299 {
300 /* ART baud-rate clock sourced from esysclk via a divisor */
301 .clk = {
302 .name = "uartclk",
303 .parent = &clk_esysclk.clk,
304 },
305 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
306 }, {
307 /* camera interface bus-clock, divided down from esysclk */ 300 /* camera interface bus-clock, divided down from esysclk */
308 .clk = { 301 .clk = {
309 .name = "camif-upll", /* same as 2440 name */ 302 .name = "camif-upll", /* same as 2440 name */
@@ -323,6 +316,15 @@ static struct clksrc_clk clksrc_clks[] = {
323 }, 316 },
324}; 317};
325 318
319static struct clksrc_clk clk_esys_uart = {
320 /* ART baud-rate clock sourced from esysclk via a divisor */
321 .clk = {
322 .name = "uartclk",
323 .parent = &clk_esysclk.clk,
324 },
325 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
326};
327
326static struct clk clk_i2s_ext = { 328static struct clk clk_i2s_ext = {
327 .name = "i2s-ext", 329 .name = "i2s-ext",
328}; 330};
@@ -425,12 +427,6 @@ static struct clk init_clocks[] = {
425 .enable = s3c2443_clkcon_enable_h, 427 .enable = s3c2443_clkcon_enable_h,
426 .ctrlbit = S3C2443_HCLKCON_DMA5, 428 .ctrlbit = S3C2443_HCLKCON_DMA5,
427 }, { 429 }, {
428 .name = "hsmmc",
429 .devname = "s3c-sdhci.1",
430 .parent = &clk_h,
431 .enable = s3c2443_clkcon_enable_h,
432 .ctrlbit = S3C2443_HCLKCON_HSMMC,
433 }, {
434 .name = "gpio", 430 .name = "gpio",
435 .parent = &clk_p, 431 .parent = &clk_p,
436 .enable = s3c2443_clkcon_enable_p, 432 .enable = s3c2443_clkcon_enable_p,
@@ -512,6 +508,14 @@ static struct clk init_clocks[] = {
512 } 508 }
513}; 509};
514 510
511static struct clk hsmmc1_clk = {
512 .name = "hsmmc",
513 .devname = "s3c-sdhci.1",
514 .parent = &clk_h,
515 .enable = s3c2443_clkcon_enable_h,
516 .ctrlbit = S3C2443_HCLKCON_HSMMC,
517};
518
515static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) 519static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
516{ 520{
517 clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK; 521 clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK;
@@ -577,6 +581,7 @@ static struct clk *clks[] __initdata = {
577 &clk_epll, 581 &clk_epll,
578 &clk_usb_bus, 582 &clk_usb_bus,
579 &clk_armdiv, 583 &clk_armdiv,
584 &hsmmc1_clk,
580}; 585};
581 586
582static struct clksrc_clk *clksrcs[] __initdata = { 587static struct clksrc_clk *clksrcs[] __initdata = {
@@ -589,6 +594,13 @@ static struct clksrc_clk *clksrcs[] __initdata = {
589 &clk_arm, 594 &clk_arm,
590}; 595};
591 596
597static struct clk_lookup s3c2443_clk_lookup[] = {
598 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
599 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
600 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk),
601 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk),
602};
603
592void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, 604void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
593 unsigned int *divs, int nr_divs, 605 unsigned int *divs, int nr_divs,
594 int divmask) 606 int divmask)
@@ -618,6 +630,7 @@ void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
618 /* See s3c2443/etc notes on disabling clocks at init time */ 630 /* See s3c2443/etc notes on disabling clocks at init time */
619 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 631 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
620 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 632 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
633 clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
621 634
622 s3c2443_common_setup_clocks(get_mpll); 635 s3c2443_common_setup_clocks(get_mpll);
623} 636}
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 313eb26cfa62..6a2abe67c8b2 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -88,12 +88,20 @@ config S5P_GPIO_DRVSTR
88 88
89config SAMSUNG_GPIO_EXTRA 89config SAMSUNG_GPIO_EXTRA
90 int "Number of additional GPIO pins" 90 int "Number of additional GPIO pins"
91 default 128 if SAMSUNG_GPIO_EXTRA128
92 default 64 if SAMSUNG_GPIO_EXTRA64
91 default 0 93 default 0
92 help 94 help
93 Use additional GPIO space in addition to the GPIO's the SOC 95 Use additional GPIO space in addition to the GPIO's the SOC
94 provides. This allows expanding the GPIO space for use with 96 provides. This allows expanding the GPIO space for use with
95 GPIO expanders. 97 GPIO expanders.
96 98
99config SAMSUNG_GPIO_EXTRA64
100 bool
101
102config SAMSUNG_GPIO_EXTRA128
103 bool
104
97config S3C_GPIO_SPACE 105config S3C_GPIO_SPACE
98 int "Space between gpio banks" 106 int "Space between gpio banks"
99 default 0 107 default 0
@@ -226,11 +234,23 @@ config SAMSUNG_DEV_IDE
226 help 234 help
227 Compile in platform device definitions for IDE 235 Compile in platform device definitions for IDE
228 236
229config S3C64XX_DEV_SPI 237config S3C64XX_DEV_SPI0
238 bool
239 help
240 Compile in platform device definitions for S3C64XX's type
241 SPI controller 0
242
243config S3C64XX_DEV_SPI1
244 bool
245 help
246 Compile in platform device definitions for S3C64XX's type
247 SPI controller 1
248
249config S3C64XX_DEV_SPI2
230 bool 250 bool
231 help 251 help
232 Compile in platform device definitions for S3C64XX's type 252 Compile in platform device definitions for S3C64XX's type
233 SPI controllers. 253 SPI controller 2
234 254
235config SAMSUNG_DEV_TS 255config SAMSUNG_DEV_TS
236 bool 256 bool
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 4ca8b571f971..32a6e394db24 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -29,6 +29,7 @@
29#include <linux/mtd/partitions.h> 29#include <linux/mtd/partitions.h>
30#include <linux/mmc/host.h> 30#include <linux/mmc/host.h>
31#include <linux/ioport.h> 31#include <linux/ioport.h>
32#include <linux/platform_data/s3c-hsudc.h>
32 33
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/pmu.h> 35#include <asm/pmu.h>
@@ -61,6 +62,7 @@
61#include <plat/regs-iic.h> 62#include <plat/regs-iic.h>
62#include <plat/regs-serial.h> 63#include <plat/regs-serial.h>
63#include <plat/regs-spi.h> 64#include <plat/regs-spi.h>
65#include <plat/s3c64xx-spi.h>
64 66
65static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); 67static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
66 68
@@ -1461,3 +1463,129 @@ struct platform_device s3c_device_wdt = {
1461 .resource = s3c_wdt_resource, 1463 .resource = s3c_wdt_resource,
1462}; 1464};
1463#endif /* CONFIG_S3C_DEV_WDT */ 1465#endif /* CONFIG_S3C_DEV_WDT */
1466
1467#ifdef CONFIG_S3C64XX_DEV_SPI0
1468static struct resource s3c64xx_spi0_resource[] = {
1469 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1470 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1471 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1472 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1473};
1474
1475struct platform_device s3c64xx_device_spi0 = {
1476 .name = "s3c64xx-spi",
1477 .id = 0,
1478 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1479 .resource = s3c64xx_spi0_resource,
1480 .dev = {
1481 .dma_mask = &samsung_device_dma_mask,
1482 .coherent_dma_mask = DMA_BIT_MASK(32),
1483 },
1484};
1485
1486void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1487 int src_clk_nr, int num_cs)
1488{
1489 if (!pd) {
1490 pr_err("%s:Need to pass platform data\n", __func__);
1491 return;
1492 }
1493
1494 /* Reject invalid configuration */
1495 if (!num_cs || src_clk_nr < 0) {
1496 pr_err("%s: Invalid SPI configuration\n", __func__);
1497 return;
1498 }
1499
1500 pd->num_cs = num_cs;
1501 pd->src_clk_nr = src_clk_nr;
1502 if (!pd->cfg_gpio)
1503 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1504
1505 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1506}
1507#endif /* CONFIG_S3C64XX_DEV_SPI0 */
1508
1509#ifdef CONFIG_S3C64XX_DEV_SPI1
1510static struct resource s3c64xx_spi1_resource[] = {
1511 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1512 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1513 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1514 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1515};
1516
1517struct platform_device s3c64xx_device_spi1 = {
1518 .name = "s3c64xx-spi",
1519 .id = 1,
1520 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1521 .resource = s3c64xx_spi1_resource,
1522 .dev = {
1523 .dma_mask = &samsung_device_dma_mask,
1524 .coherent_dma_mask = DMA_BIT_MASK(32),
1525 },
1526};
1527
1528void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1529 int src_clk_nr, int num_cs)
1530{
1531 if (!pd) {
1532 pr_err("%s:Need to pass platform data\n", __func__);
1533 return;
1534 }
1535
1536 /* Reject invalid configuration */
1537 if (!num_cs || src_clk_nr < 0) {
1538 pr_err("%s: Invalid SPI configuration\n", __func__);
1539 return;
1540 }
1541
1542 pd->num_cs = num_cs;
1543 pd->src_clk_nr = src_clk_nr;
1544 if (!pd->cfg_gpio)
1545 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1546
1547 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1548}
1549#endif /* CONFIG_S3C64XX_DEV_SPI1 */
1550
1551#ifdef CONFIG_S3C64XX_DEV_SPI2
1552static struct resource s3c64xx_spi2_resource[] = {
1553 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1554 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1555 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1556 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1557};
1558
1559struct platform_device s3c64xx_device_spi2 = {
1560 .name = "s3c64xx-spi",
1561 .id = 2,
1562 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1563 .resource = s3c64xx_spi2_resource,
1564 .dev = {
1565 .dma_mask = &samsung_device_dma_mask,
1566 .coherent_dma_mask = DMA_BIT_MASK(32),
1567 },
1568};
1569
1570void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1571 int src_clk_nr, int num_cs)
1572{
1573 if (!pd) {
1574 pr_err("%s:Need to pass platform data\n", __func__);
1575 return;
1576 }
1577
1578 /* Reject invalid configuration */
1579 if (!num_cs || src_clk_nr < 0) {
1580 pr_err("%s: Invalid SPI configuration\n", __func__);
1581 return;
1582 }
1583
1584 pd->num_cs = num_cs;
1585 pd->src_clk_nr = src_clk_nr;
1586 if (!pd->cfg_gpio)
1587 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1588
1589 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1590}
1591#endif /* CONFIG_S3C64XX_DEV_SPI2 */
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 93a994a5dd8f..2cded872f22b 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -18,23 +18,24 @@
18 18
19#include <mach/dma.h> 19#include <mach/dma.h>
20 20
21static inline bool pl330_filter(struct dma_chan *chan, void *param)
22{
23 struct dma_pl330_peri *peri = chan->private;
24 return peri->peri_id == (unsigned)param;
25}
26
27static unsigned samsung_dmadev_request(enum dma_ch dma_ch, 21static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
28 struct samsung_dma_info *info) 22 struct samsung_dma_info *info)
29{ 23{
30 struct dma_chan *chan; 24 struct dma_chan *chan;
31 dma_cap_mask_t mask; 25 dma_cap_mask_t mask;
32 struct dma_slave_config slave_config; 26 struct dma_slave_config slave_config;
27 void *filter_param;
33 28
34 dma_cap_zero(mask); 29 dma_cap_zero(mask);
35 dma_cap_set(info->cap, mask); 30 dma_cap_set(info->cap, mask);
36 31
37 chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch); 32 /*
33 * If a dma channel property of a device node from device tree is
34 * specified, use that as the fliter parameter.
35 */
36 filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop :
37 (void *)dma_ch;
38 chan = dma_request_channel(mask, pl330_filter, filter_param);
38 39
39 if (info->direction == DMA_FROM_DEVICE) { 40 if (info->direction == DMA_FROM_DEVICE) {
40 memset(&slave_config, 0, sizeof(struct dma_slave_config)); 41 memset(&slave_config, 0, sizeof(struct dma_slave_config));
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index ab633c9c2aec..4214ea0ff8fe 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -39,6 +39,7 @@ extern struct platform_device s3c64xx_device_pcm0;
39extern struct platform_device s3c64xx_device_pcm1; 39extern struct platform_device s3c64xx_device_pcm1;
40extern struct platform_device s3c64xx_device_spi0; 40extern struct platform_device s3c64xx_device_spi0;
41extern struct platform_device s3c64xx_device_spi1; 41extern struct platform_device s3c64xx_device_spi1;
42extern struct platform_device s3c64xx_device_spi2;
42 43
43extern struct platform_device s3c_device_adc; 44extern struct platform_device s3c_device_adc;
44extern struct platform_device s3c_device_cfcon; 45extern struct platform_device s3c_device_cfcon;
@@ -98,8 +99,6 @@ extern struct platform_device s5p6450_device_iis1;
98extern struct platform_device s5p6450_device_iis2; 99extern struct platform_device s5p6450_device_iis2;
99extern struct platform_device s5p6450_device_pcm0; 100extern struct platform_device s5p6450_device_pcm0;
100 101
101extern struct platform_device s5p64x0_device_spi0;
102extern struct platform_device s5p64x0_device_spi1;
103 102
104extern struct platform_device s5pc100_device_ac97; 103extern struct platform_device s5pc100_device_ac97;
105extern struct platform_device s5pc100_device_iis0; 104extern struct platform_device s5pc100_device_iis0;
@@ -108,9 +107,6 @@ extern struct platform_device s5pc100_device_iis2;
108extern struct platform_device s5pc100_device_pcm0; 107extern struct platform_device s5pc100_device_pcm0;
109extern struct platform_device s5pc100_device_pcm1; 108extern struct platform_device s5pc100_device_pcm1;
110extern struct platform_device s5pc100_device_spdif; 109extern struct platform_device s5pc100_device_spdif;
111extern struct platform_device s5pc100_device_spi0;
112extern struct platform_device s5pc100_device_spi1;
113extern struct platform_device s5pc100_device_spi2;
114 110
115extern struct platform_device s5pv210_device_ac97; 111extern struct platform_device s5pv210_device_ac97;
116extern struct platform_device s5pv210_device_iis0; 112extern struct platform_device s5pv210_device_iis0;
@@ -120,8 +116,6 @@ extern struct platform_device s5pv210_device_pcm0;
120extern struct platform_device s5pv210_device_pcm1; 116extern struct platform_device s5pv210_device_pcm1;
121extern struct platform_device s5pv210_device_pcm2; 117extern struct platform_device s5pv210_device_pcm2;
122extern struct platform_device s5pv210_device_spdif; 118extern struct platform_device s5pv210_device_spdif;
123extern struct platform_device s5pv210_device_spi0;
124extern struct platform_device s5pv210_device_spi1;
125 119
126extern struct platform_device exynos4_device_ac97; 120extern struct platform_device exynos4_device_ac97;
127extern struct platform_device exynos4_device_ahci; 121extern struct platform_device exynos4_device_ahci;
@@ -129,6 +123,7 @@ extern struct platform_device exynos4_device_dwmci;
129extern struct platform_device exynos4_device_i2s0; 123extern struct platform_device exynos4_device_i2s0;
130extern struct platform_device exynos4_device_i2s1; 124extern struct platform_device exynos4_device_i2s1;
131extern struct platform_device exynos4_device_i2s2; 125extern struct platform_device exynos4_device_i2s2;
126extern struct platform_device exynos4_device_ohci;
132extern struct platform_device exynos4_device_pcm0; 127extern struct platform_device exynos4_device_pcm0;
133extern struct platform_device exynos4_device_pcm1; 128extern struct platform_device exynos4_device_pcm1;
134extern struct platform_device exynos4_device_pcm2; 129extern struct platform_device exynos4_device_pcm2;
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 4c1a363526cf..22eafc310bd7 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -31,6 +31,7 @@ struct samsung_dma_info {
31 enum dma_slave_buswidth width; 31 enum dma_slave_buswidth width;
32 dma_addr_t fifo; 32 dma_addr_t fifo;
33 struct s3c2410_dma_client *client; 33 struct s3c2410_dma_client *client;
34 struct property *dt_dmach_prop;
34}; 35};
35 36
36struct samsung_dma_ops { 37struct samsung_dma_ops {
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index 2e55e5958674..c5eaad529de5 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -21,7 +21,8 @@
21 * use these just as IDs. 21 * use these just as IDs.
22 */ 22 */
23enum dma_ch { 23enum dma_ch {
24 DMACH_UART0_RX, 24 DMACH_DT_PROP = -1,
25 DMACH_UART0_RX = 0,
25 DMACH_UART0_TX, 26 DMACH_UART0_TX,
26 DMACH_UART1_RX, 27 DMACH_UART1_RX,
27 DMACH_UART1_TX, 28 DMACH_UART1_TX,
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index 08d1a7ef97b7..df46b776976a 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,13 +44,14 @@
44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) 44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) 45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
46 46
47#define S5P_TIMER_IRQ(x) (11 + (x)) 47#define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x))
48 48
49#define IRQ_TIMER0 S5P_TIMER_IRQ(0) 49#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
50#define IRQ_TIMER1 S5P_TIMER_IRQ(1) 50#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
51#define IRQ_TIMER2 S5P_TIMER_IRQ(2) 51#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
52#define IRQ_TIMER3 S5P_TIMER_IRQ(3) 52#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
53#define IRQ_TIMER4 S5P_TIMER_IRQ(4) 53#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
54#define IRQ_TIMER_COUNT (5)
54 55
55#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ 56#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
56 : ((x) - 16 + S5P_EINT_BASE2)) 57 : ((x) - 16 + S5P_EINT_BASE2))
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 720734847027..29c26a818842 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -71,6 +71,7 @@
71#define S3C2410_LCON_IRM (1<<6) 71#define S3C2410_LCON_IRM (1<<6)
72 72
73#define S3C2440_UCON_CLKMASK (3<<10) 73#define S3C2440_UCON_CLKMASK (3<<10)
74#define S3C2440_UCON_CLKSHIFT (10)
74#define S3C2440_UCON_PCLK (0<<10) 75#define S3C2440_UCON_PCLK (0<<10)
75#define S3C2440_UCON_UCLK (1<<10) 76#define S3C2440_UCON_UCLK (1<<10)
76#define S3C2440_UCON_PCLK2 (2<<10) 77#define S3C2440_UCON_PCLK2 (2<<10)
@@ -78,6 +79,7 @@
78#define S3C2443_UCON_EPLL (3<<10) 79#define S3C2443_UCON_EPLL (3<<10)
79 80
80#define S3C6400_UCON_CLKMASK (3<<10) 81#define S3C6400_UCON_CLKMASK (3<<10)
82#define S3C6400_UCON_CLKSHIFT (10)
81#define S3C6400_UCON_PCLK (0<<10) 83#define S3C6400_UCON_PCLK (0<<10)
82#define S3C6400_UCON_PCLK2 (2<<10) 84#define S3C6400_UCON_PCLK2 (2<<10)
83#define S3C6400_UCON_UCLK0 (1<<10) 85#define S3C6400_UCON_UCLK0 (1<<10)
@@ -90,11 +92,14 @@
90#define S3C2440_UCON_DIVSHIFT (12) 92#define S3C2440_UCON_DIVSHIFT (12)
91 93
92#define S3C2412_UCON_CLKMASK (3<<10) 94#define S3C2412_UCON_CLKMASK (3<<10)
95#define S3C2412_UCON_CLKSHIFT (10)
93#define S3C2412_UCON_UCLK (1<<10) 96#define S3C2412_UCON_UCLK (1<<10)
94#define S3C2412_UCON_USYSCLK (3<<10) 97#define S3C2412_UCON_USYSCLK (3<<10)
95#define S3C2412_UCON_PCLK (0<<10) 98#define S3C2412_UCON_PCLK (0<<10)
96#define S3C2412_UCON_PCLK2 (2<<10) 99#define S3C2412_UCON_PCLK2 (2<<10)
97 100
101#define S3C2410_UCON_CLKMASK (1 << 10)
102#define S3C2410_UCON_CLKSHIFT (10)
98#define S3C2410_UCON_UCLK (1<<10) 103#define S3C2410_UCON_UCLK (1<<10)
99#define S3C2410_UCON_SBREAK (1<<4) 104#define S3C2410_UCON_SBREAK (1<<4)
100 105
@@ -193,6 +198,7 @@
193 198
194/* Following are specific to S5PV210 */ 199/* Following are specific to S5PV210 */
195#define S5PV210_UCON_CLKMASK (1<<10) 200#define S5PV210_UCON_CLKMASK (1<<10)
201#define S5PV210_UCON_CLKSHIFT (10)
196#define S5PV210_UCON_PCLK (0<<10) 202#define S5PV210_UCON_PCLK (0<<10)
197#define S5PV210_UCON_UCLK (1<<10) 203#define S5PV210_UCON_UCLK (1<<10)
198 204
@@ -221,29 +227,24 @@
221#define S5PV210_UFSTAT_RXMASK (255<<0) 227#define S5PV210_UFSTAT_RXMASK (255<<0)
222#define S5PV210_UFSTAT_RXSHIFT (0) 228#define S5PV210_UFSTAT_RXSHIFT (0)
223 229
224#define NO_NEED_CHECK_CLKSRC 1 230#define S3C2410_UCON_CLKSEL0 (1 << 0)
231#define S3C2410_UCON_CLKSEL1 (1 << 1)
232#define S3C2410_UCON_CLKSEL2 (1 << 2)
233#define S3C2410_UCON_CLKSEL3 (1 << 3)
225 234
226#ifndef __ASSEMBLY__ 235/* Default values for s5pv210 UCON and UFCON uart registers */
236#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
237 S3C2410_UCON_RXILEVEL | \
238 S3C2410_UCON_TXIRQMODE | \
239 S3C2410_UCON_RXIRQMODE | \
240 S3C2410_UCON_RXFIFO_TOI | \
241 S3C2443_UCON_RXERR_IRQEN)
227 242
228/* struct s3c24xx_uart_clksrc 243#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
229 * 244 S5PV210_UFCON_TXTRIG4 | \
230 * this structure defines a named clock source that can be used for the 245 S5PV210_UFCON_RXTRIG4)
231 * uart, so that the best clock can be selected for the requested baud
232 * rate.
233 *
234 * min_baud and max_baud define the range of baud-rates this clock is
235 * acceptable for, if they are both zero, it is assumed any baud rate that
236 * can be generated from this clock will be used.
237 *
238 * divisor gives the divisor from the clock to the one seen by the uart
239*/
240 246
241struct s3c24xx_uart_clksrc { 247#ifndef __ASSEMBLY__
242 const char *name;
243 unsigned int divisor;
244 unsigned int min_baud;
245 unsigned int max_baud;
246};
247 248
248/* configuration structure for per-machine configurations for the 249/* configuration structure for per-machine configurations for the
249 * serial port 250 * serial port
@@ -257,15 +258,13 @@ struct s3c2410_uartcfg {
257 unsigned char unused; 258 unsigned char unused;
258 unsigned short flags; 259 unsigned short flags;
259 upf_t uart_flags; /* default uart flags */ 260 upf_t uart_flags; /* default uart flags */
261 unsigned int clk_sel;
260 262
261 unsigned int has_fracval; 263 unsigned int has_fracval;
262 264
263 unsigned long ucon; /* value of ucon for port */ 265 unsigned long ucon; /* value of ucon for port */
264 unsigned long ulcon; /* value of ulcon for port */ 266 unsigned long ulcon; /* value of ulcon for port */
265 unsigned long ufcon; /* value of ufcon for port */ 267 unsigned long ufcon; /* value of ufcon for port */
266
267 struct s3c24xx_uart_clksrc *clocks;
268 unsigned int clocks_size;
269}; 268};
270 269
271/* s3c24xx_uart_devs 270/* s3c24xx_uart_devs
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index 4c16fa3621bb..aea68b60ef98 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo {
31/** 31/**
32 * struct s3c64xx_spi_info - SPI Controller defining structure 32 * struct s3c64xx_spi_info - SPI Controller defining structure
33 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. 33 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
34 * @src_clk_name: Platform name of the corresponding clock.
35 * @clk_from_cmu: If the SPI clock/prescalar control block is present 34 * @clk_from_cmu: If the SPI clock/prescalar control block is present
36 * by the platform's clock-management-unit and not in SPI controller. 35 * by the platform's clock-management-unit and not in SPI controller.
37 * @num_cs: Number of CS this controller emulates. 36 * @num_cs: Number of CS this controller emulates.
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo {
43 */ 42 */
44struct s3c64xx_spi_info { 43struct s3c64xx_spi_info {
45 int src_clk_nr; 44 int src_clk_nr;
46 char *src_clk_name;
47 bool clk_from_cmu; 45 bool clk_from_cmu;
48 46
49 int num_cs; 47 int num_cs;
@@ -58,18 +56,28 @@ struct s3c64xx_spi_info {
58}; 56};
59 57
60/** 58/**
61 * s3c64xx_spi_set_info - SPI Controller configure callback by the board 59 * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
62 * initialization code. 60 * initialization code.
63 * @cntrlr: SPI controller number the configuration is for. 61 * @pd: SPI platform data to set.
64 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. 62 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
65 * @num_cs: Number of elements in the 'cs' array. 63 * @num_cs: Number of elements in the 'cs' array.
66 * 64 *
67 * Call this from machine init code for each SPI Controller that 65 * Call this from machine init code for each SPI Controller that
68 * has some chips attached to it. 66 * has some chips attached to it.
69 */ 67 */
70extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 68extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
71extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 69 int src_clk_nr, int num_cs);
72extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 70extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
73extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 71 int src_clk_nr, int num_cs);
72extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
73 int src_clk_nr, int num_cs);
74 74
75/* defined by architecture to configure gpio */
76extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev);
77extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev);
78extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev);
79
80extern struct s3c64xx_spi_info s3c64xx_spi0_pdata;
81extern struct s3c64xx_spi_info s3c64xx_spi1_pdata;
82extern struct s3c64xx_spi_info s3c64xx_spi2_pdata;
75#endif /* __S3C64XX_PLAT_SPI_H */ 83#endif /* __S3C64XX_PLAT_SPI_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index e7b3c752e919..656dc00d30ed 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata {
66 enum cd_types cd_type; 66 enum cd_types cd_type;
67 enum clk_types clk_type; 67 enum clk_types clk_type;
68 68
69 char **clocks; /* set of clock sources */
70
71 int ext_cd_gpio; 69 int ext_cd_gpio;
72 bool ext_cd_gpio_invert; 70 bool ext_cd_gpio_invert;
73 int (*ext_cd_init)(void (*notify_func)(struct platform_device *, 71 int (*ext_cd_init)(void (*notify_func)(struct platform_device *,
@@ -125,16 +123,17 @@ extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
125extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 123extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
126extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); 124extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
127extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); 125extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
126extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
127extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
128extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
129extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
128 130
129/* S3C2416 SDHCI setup */ 131/* S3C2416 SDHCI setup */
130 132
131#ifdef CONFIG_S3C2416_SETUP_SDHCI 133#ifdef CONFIG_S3C2416_SETUP_SDHCI
132extern char *s3c2416_hsmmc_clksrcs[4];
133
134static inline void s3c2416_default_sdhci0(void) 134static inline void s3c2416_default_sdhci0(void)
135{ 135{
136#ifdef CONFIG_S3C_DEV_HSMMC 136#ifdef CONFIG_S3C_DEV_HSMMC
137 s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
138 s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; 137 s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
139#endif /* CONFIG_S3C_DEV_HSMMC */ 138#endif /* CONFIG_S3C_DEV_HSMMC */
140} 139}
@@ -142,7 +141,6 @@ static inline void s3c2416_default_sdhci0(void)
142static inline void s3c2416_default_sdhci1(void) 141static inline void s3c2416_default_sdhci1(void)
143{ 142{
144#ifdef CONFIG_S3C_DEV_HSMMC1 143#ifdef CONFIG_S3C_DEV_HSMMC1
145 s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
146 s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; 144 s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
147#endif /* CONFIG_S3C_DEV_HSMMC1 */ 145#endif /* CONFIG_S3C_DEV_HSMMC1 */
148} 146}
@@ -152,15 +150,13 @@ static inline void s3c2416_default_sdhci0(void) { }
152static inline void s3c2416_default_sdhci1(void) { } 150static inline void s3c2416_default_sdhci1(void) { }
153 151
154#endif /* CONFIG_S3C2416_SETUP_SDHCI */ 152#endif /* CONFIG_S3C2416_SETUP_SDHCI */
153
155/* S3C64XX SDHCI setup */ 154/* S3C64XX SDHCI setup */
156 155
157#ifdef CONFIG_S3C64XX_SETUP_SDHCI 156#ifdef CONFIG_S3C64XX_SETUP_SDHCI
158extern char *s3c64xx_hsmmc_clksrcs[4];
159
160static inline void s3c6400_default_sdhci0(void) 157static inline void s3c6400_default_sdhci0(void)
161{ 158{
162#ifdef CONFIG_S3C_DEV_HSMMC 159#ifdef CONFIG_S3C_DEV_HSMMC
163 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
164 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 160 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
165#endif 161#endif
166} 162}
@@ -168,7 +164,6 @@ static inline void s3c6400_default_sdhci0(void)
168static inline void s3c6400_default_sdhci1(void) 164static inline void s3c6400_default_sdhci1(void)
169{ 165{
170#ifdef CONFIG_S3C_DEV_HSMMC1 166#ifdef CONFIG_S3C_DEV_HSMMC1
171 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
172 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 167 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
173#endif 168#endif
174} 169}
@@ -176,7 +171,6 @@ static inline void s3c6400_default_sdhci1(void)
176static inline void s3c6400_default_sdhci2(void) 171static inline void s3c6400_default_sdhci2(void)
177{ 172{
178#ifdef CONFIG_S3C_DEV_HSMMC2 173#ifdef CONFIG_S3C_DEV_HSMMC2
179 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
180 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 174 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
181#endif 175#endif
182} 176}
@@ -184,7 +178,6 @@ static inline void s3c6400_default_sdhci2(void)
184static inline void s3c6410_default_sdhci0(void) 178static inline void s3c6410_default_sdhci0(void)
185{ 179{
186#ifdef CONFIG_S3C_DEV_HSMMC 180#ifdef CONFIG_S3C_DEV_HSMMC
187 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
188 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 181 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
189#endif 182#endif
190} 183}
@@ -192,7 +185,6 @@ static inline void s3c6410_default_sdhci0(void)
192static inline void s3c6410_default_sdhci1(void) 185static inline void s3c6410_default_sdhci1(void)
193{ 186{
194#ifdef CONFIG_S3C_DEV_HSMMC1 187#ifdef CONFIG_S3C_DEV_HSMMC1
195 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
196 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 188 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
197#endif 189#endif
198} 190}
@@ -200,7 +192,6 @@ static inline void s3c6410_default_sdhci1(void)
200static inline void s3c6410_default_sdhci2(void) 192static inline void s3c6410_default_sdhci2(void)
201{ 193{
202#ifdef CONFIG_S3C_DEV_HSMMC2 194#ifdef CONFIG_S3C_DEV_HSMMC2
203 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
204 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 195 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
205#endif 196#endif
206} 197}
@@ -215,15 +206,51 @@ static inline void s3c6400_default_sdhci2(void) { }
215 206
216#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ 207#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
217 208
209/* S5P64X0 SDHCI setup */
210
211#ifdef CONFIG_S5P64X0_SETUP_SDHCI
212static inline void s5p64x0_default_sdhci0(void)
213{
214#ifdef CONFIG_S3C_DEV_HSMMC
215 s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio;
216#endif
217}
218
219static inline void s5p64x0_default_sdhci1(void)
220{
221#ifdef CONFIG_S3C_DEV_HSMMC1
222 s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio;
223#endif
224}
225
226static inline void s5p6440_default_sdhci2(void)
227{
228#ifdef CONFIG_S3C_DEV_HSMMC2
229 s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio;
230#endif
231}
232
233static inline void s5p6450_default_sdhci2(void)
234{
235#ifdef CONFIG_S3C_DEV_HSMMC2
236 s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio;
237#endif
238}
239
240#else
241static inline void s5p64x0_default_sdhci0(void) { }
242static inline void s5p64x0_default_sdhci1(void) { }
243static inline void s5p6440_default_sdhci2(void) { }
244static inline void s5p6450_default_sdhci2(void) { }
245
246#endif /* CONFIG_S5P64X0_SETUP_SDHCI */
247
218/* S5PC100 SDHCI setup */ 248/* S5PC100 SDHCI setup */
219 249
220#ifdef CONFIG_S5PC100_SETUP_SDHCI 250#ifdef CONFIG_S5PC100_SETUP_SDHCI
221extern char *s5pc100_hsmmc_clksrcs[4];
222
223static inline void s5pc100_default_sdhci0(void) 251static inline void s5pc100_default_sdhci0(void)
224{ 252{
225#ifdef CONFIG_S3C_DEV_HSMMC 253#ifdef CONFIG_S3C_DEV_HSMMC
226 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
227 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; 254 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
228#endif 255#endif
229} 256}
@@ -231,7 +258,6 @@ static inline void s5pc100_default_sdhci0(void)
231static inline void s5pc100_default_sdhci1(void) 258static inline void s5pc100_default_sdhci1(void)
232{ 259{
233#ifdef CONFIG_S3C_DEV_HSMMC1 260#ifdef CONFIG_S3C_DEV_HSMMC1
234 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
235 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; 261 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
236#endif 262#endif
237} 263}
@@ -239,7 +265,6 @@ static inline void s5pc100_default_sdhci1(void)
239static inline void s5pc100_default_sdhci2(void) 265static inline void s5pc100_default_sdhci2(void)
240{ 266{
241#ifdef CONFIG_S3C_DEV_HSMMC2 267#ifdef CONFIG_S3C_DEV_HSMMC2
242 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
243 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; 268 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
244#endif 269#endif
245} 270}
@@ -254,12 +279,9 @@ static inline void s5pc100_default_sdhci2(void) { }
254/* S5PV210 SDHCI setup */ 279/* S5PV210 SDHCI setup */
255 280
256#ifdef CONFIG_S5PV210_SETUP_SDHCI 281#ifdef CONFIG_S5PV210_SETUP_SDHCI
257extern char *s5pv210_hsmmc_clksrcs[4];
258
259static inline void s5pv210_default_sdhci0(void) 282static inline void s5pv210_default_sdhci0(void)
260{ 283{
261#ifdef CONFIG_S3C_DEV_HSMMC 284#ifdef CONFIG_S3C_DEV_HSMMC
262 s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
263 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; 285 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
264#endif 286#endif
265} 287}
@@ -267,7 +289,6 @@ static inline void s5pv210_default_sdhci0(void)
267static inline void s5pv210_default_sdhci1(void) 289static inline void s5pv210_default_sdhci1(void)
268{ 290{
269#ifdef CONFIG_S3C_DEV_HSMMC1 291#ifdef CONFIG_S3C_DEV_HSMMC1
270 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
271 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; 292 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
272#endif 293#endif
273} 294}
@@ -275,7 +296,6 @@ static inline void s5pv210_default_sdhci1(void)
275static inline void s5pv210_default_sdhci2(void) 296static inline void s5pv210_default_sdhci2(void)
276{ 297{
277#ifdef CONFIG_S3C_DEV_HSMMC2 298#ifdef CONFIG_S3C_DEV_HSMMC2
278 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
279 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; 299 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
280#endif 300#endif
281} 301}
@@ -283,7 +303,6 @@ static inline void s5pv210_default_sdhci2(void)
283static inline void s5pv210_default_sdhci3(void) 303static inline void s5pv210_default_sdhci3(void)
284{ 304{
285#ifdef CONFIG_S3C_DEV_HSMMC3 305#ifdef CONFIG_S3C_DEV_HSMMC3
286 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
287 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; 306 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
288#endif 307#endif
289} 308}
@@ -298,12 +317,9 @@ static inline void s5pv210_default_sdhci3(void) { }
298 317
299/* EXYNOS4 SDHCI setup */ 318/* EXYNOS4 SDHCI setup */
300#ifdef CONFIG_EXYNOS4_SETUP_SDHCI 319#ifdef CONFIG_EXYNOS4_SETUP_SDHCI
301extern char *exynos4_hsmmc_clksrcs[4];
302
303static inline void exynos4_default_sdhci0(void) 320static inline void exynos4_default_sdhci0(void)
304{ 321{
305#ifdef CONFIG_S3C_DEV_HSMMC 322#ifdef CONFIG_S3C_DEV_HSMMC
306 s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs;
307 s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; 323 s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
308#endif 324#endif
309} 325}
@@ -311,7 +327,6 @@ static inline void exynos4_default_sdhci0(void)
311static inline void exynos4_default_sdhci1(void) 327static inline void exynos4_default_sdhci1(void)
312{ 328{
313#ifdef CONFIG_S3C_DEV_HSMMC1 329#ifdef CONFIG_S3C_DEV_HSMMC1
314 s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs;
315 s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; 330 s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
316#endif 331#endif
317} 332}
@@ -319,7 +334,6 @@ static inline void exynos4_default_sdhci1(void)
319static inline void exynos4_default_sdhci2(void) 334static inline void exynos4_default_sdhci2(void)
320{ 335{
321#ifdef CONFIG_S3C_DEV_HSMMC2 336#ifdef CONFIG_S3C_DEV_HSMMC2
322 s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs;
323 s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; 337 s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
324#endif 338#endif
325} 339}
@@ -327,7 +341,6 @@ static inline void exynos4_default_sdhci2(void)
327static inline void exynos4_default_sdhci3(void) 341static inline void exynos4_default_sdhci3(void)
328{ 342{
329#ifdef CONFIG_S3C_DEV_HSMMC3 343#ifdef CONFIG_S3C_DEV_HSMMC3
330 s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs;
331 s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; 344 s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
332#endif 345#endif
333} 346}
diff --git a/arch/arm/plat-samsung/include/plat/udc.h b/arch/arm/plat-samsung/include/plat/udc.h
index 8c22d586befb..de8e2288a509 100644
--- a/arch/arm/plat-samsung/include/plat/udc.h
+++ b/arch/arm/plat-samsung/include/plat/udc.h
@@ -37,20 +37,7 @@ struct s3c2410_udc_mach_info {
37 37
38extern void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *); 38extern void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *);
39 39
40/** 40struct s3c24xx_hsudc_platdata;
41 * s3c24xx_hsudc_platdata - Platform data for USB High-Speed gadget controller.
42 * @epnum: Number of endpoints to be instantiated by the controller driver.
43 * @gpio_init: Platform specific USB related GPIO initialization.
44 * @gpio_uninit: Platform specific USB releted GPIO uninitialzation.
45 *
46 * Representation of platform data for the S3C24XX USB 2.0 High Speed gadget
47 * controllers.
48 */
49struct s3c24xx_hsudc_platdata {
50 unsigned int epnum;
51 void (*gpio_init)(void);
52 void (*gpio_uninit)(void);
53};
54 41
55extern void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd); 42extern void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd);
56 43
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index 1f17bde52cd4..7c756fb189f7 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -109,7 +109,7 @@ struct eth_addr {
109 u8 addr[6]; 109 u8 addr[6];
110}; 110};
111static struct eth_addr __initdata hw_addr[2]; 111static struct eth_addr __initdata hw_addr[2];
112static struct eth_platform_data __initdata eth_data[2]; 112static struct macb_platform_data __initdata eth_data[2];
113 113
114static struct spi_board_info spi0_board_info[] __initdata = { 114static struct spi_board_info spi0_board_info[] __initdata = {
115 { 115 {
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 4643ff5107c9..c56ddac85d61 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -105,7 +105,7 @@ struct eth_addr {
105}; 105};
106 106
107static struct eth_addr __initdata hw_addr[2]; 107static struct eth_addr __initdata hw_addr[2];
108static struct eth_platform_data __initdata eth_data[2] = { 108static struct macb_platform_data __initdata eth_data[2] = {
109 { 109 {
110 /* 110 /*
111 * The MDIO pullups on STK1000 are a bit too weak for 111 * The MDIO pullups on STK1000 are a bit too weak for
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index 86fab77a5a00..27bd6fbe21cb 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -50,7 +50,7 @@ struct eth_addr {
50 u8 addr[6]; 50 u8 addr[6];
51}; 51};
52static struct eth_addr __initdata hw_addr[1]; 52static struct eth_addr __initdata hw_addr[1];
53static struct eth_platform_data __initdata eth_data[1] = { 53static struct macb_platform_data __initdata eth_data[1] = {
54 { 54 {
55 .phy_mask = ~(1U << 1), 55 .phy_mask = ~(1U << 1),
56 }, 56 },
diff --git a/arch/avr32/boards/hammerhead/setup.c b/arch/avr32/boards/hammerhead/setup.c
index da14fbdd4e8e..9d1efd1cd425 100644
--- a/arch/avr32/boards/hammerhead/setup.c
+++ b/arch/avr32/boards/hammerhead/setup.c
@@ -102,7 +102,7 @@ struct eth_addr {
102}; 102};
103 103
104static struct eth_addr __initdata hw_addr[1]; 104static struct eth_addr __initdata hw_addr[1];
105static struct eth_platform_data __initdata eth_data[1]; 105static struct macb_platform_data __initdata eth_data[1];
106 106
107/* 107/*
108 * The next two functions should go away as the boot loader is 108 * The next two functions should go away as the boot loader is
diff --git a/arch/avr32/boards/merisc/setup.c b/arch/avr32/boards/merisc/setup.c
index e61bc948f959..ed137e335796 100644
--- a/arch/avr32/boards/merisc/setup.c
+++ b/arch/avr32/boards/merisc/setup.c
@@ -52,7 +52,7 @@ struct eth_addr {
52}; 52};
53 53
54static struct eth_addr __initdata hw_addr[2]; 54static struct eth_addr __initdata hw_addr[2];
55static struct eth_platform_data __initdata eth_data[2]; 55static struct macb_platform_data __initdata eth_data[2];
56 56
57static int ads7846_get_pendown_state_PB26(void) 57static int ads7846_get_pendown_state_PB26(void)
58{ 58{
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c
index c4da5cba2dbf..05358aa5ef7d 100644
--- a/arch/avr32/boards/mimc200/setup.c
+++ b/arch/avr32/boards/mimc200/setup.c
@@ -86,7 +86,7 @@ struct eth_addr {
86 u8 addr[6]; 86 u8 addr[6];
87}; 87};
88static struct eth_addr __initdata hw_addr[2]; 88static struct eth_addr __initdata hw_addr[2];
89static struct eth_platform_data __initdata eth_data[2]; 89static struct macb_platform_data __initdata eth_data[2];
90 90
91static struct spi_eeprom eeprom_25lc010 = { 91static struct spi_eeprom eeprom_25lc010 = {
92 .name = "25lc010", 92 .name = "25lc010",
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 7fbf0dcb9afe..402a7bb72669 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1067,7 +1067,7 @@ void __init at32_setup_serial_console(unsigned int usart_id)
1067 * -------------------------------------------------------------------- */ 1067 * -------------------------------------------------------------------- */
1068 1068
1069#ifdef CONFIG_CPU_AT32AP7000 1069#ifdef CONFIG_CPU_AT32AP7000
1070static struct eth_platform_data macb0_data; 1070static struct macb_platform_data macb0_data;
1071static struct resource macb0_resource[] = { 1071static struct resource macb0_resource[] = {
1072 PBMEM(0xfff01800), 1072 PBMEM(0xfff01800),
1073 IRQ(25), 1073 IRQ(25),
@@ -1076,7 +1076,7 @@ DEFINE_DEV_DATA(macb, 0);
1076DEV_CLK(hclk, macb0, hsb, 8); 1076DEV_CLK(hclk, macb0, hsb, 8);
1077DEV_CLK(pclk, macb0, pbb, 6); 1077DEV_CLK(pclk, macb0, pbb, 6);
1078 1078
1079static struct eth_platform_data macb1_data; 1079static struct macb_platform_data macb1_data;
1080static struct resource macb1_resource[] = { 1080static struct resource macb1_resource[] = {
1081 PBMEM(0xfff01c00), 1081 PBMEM(0xfff01c00),
1082 IRQ(26), 1082 IRQ(26),
@@ -1086,7 +1086,7 @@ DEV_CLK(hclk, macb1, hsb, 9);
1086DEV_CLK(pclk, macb1, pbb, 7); 1086DEV_CLK(pclk, macb1, pbb, 7);
1087 1087
1088struct platform_device *__init 1088struct platform_device *__init
1089at32_add_device_eth(unsigned int id, struct eth_platform_data *data) 1089at32_add_device_eth(unsigned int id, struct macb_platform_data *data)
1090{ 1090{
1091 struct platform_device *pdev; 1091 struct platform_device *pdev;
1092 u32 pin_mask; 1092 u32 pin_mask;
@@ -1163,7 +1163,7 @@ at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
1163 return NULL; 1163 return NULL;
1164 } 1164 }
1165 1165
1166 memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); 1166 memcpy(pdev->dev.platform_data, data, sizeof(struct macb_platform_data));
1167 platform_device_register(pdev); 1167 platform_device_register(pdev);
1168 1168
1169 return pdev; 1169 return pdev;
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index 5d7ffca7d69f..67b111ce332d 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -6,6 +6,7 @@
6 6
7#include <linux/types.h> 7#include <linux/types.h>
8#include <linux/serial.h> 8#include <linux/serial.h>
9#include <linux/platform_data/macb.h>
9 10
10#define GPIO_PIN_NONE (-1) 11#define GPIO_PIN_NONE (-1)
11 12
@@ -42,12 +43,8 @@ struct atmel_uart_data {
42void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); 43void at32_map_usart(unsigned int hw_id, unsigned int line, int flags);
43struct platform_device *at32_add_device_usart(unsigned int id); 44struct platform_device *at32_add_device_usart(unsigned int id);
44 45
45struct eth_platform_data {
46 u32 phy_mask;
47 u8 is_rmii;
48};
49struct platform_device * 46struct platform_device *
50at32_add_device_eth(unsigned int id, struct eth_platform_data *data); 47at32_add_device_eth(unsigned int id, struct macb_platform_data *data);
51 48
52struct spi_board_info; 49struct spi_board_info;
53struct platform_device * 50struct platform_device *
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index c7b5afeecaf2..3fea3689527e 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -441,6 +441,9 @@ static void __init fixup_port_irq(int index,
441 return; 441 return;
442 442
443 port->irq = virq; 443 port->irq = virq;
444
445 if (of_device_is_compatible(np, "fsl,ns16550"))
446 port->handle_irq = fsl8250_handle_irq;
444} 447}
445 448
446static void __init fixup_port_pio(int index, 449static void __init fixup_port_pio(int index,
diff --git a/arch/s390/Kbuild b/arch/s390/Kbuild
index ae4b01060edd..9858476fa0fe 100644
--- a/arch/s390/Kbuild
+++ b/arch/s390/Kbuild
@@ -1,6 +1,7 @@
1obj-y += kernel/ 1obj-y += kernel/
2obj-y += mm/ 2obj-y += mm/
3obj-y += crypto/ 3obj-$(CONFIG_KVM) += kvm/
4obj-y += appldata/ 4obj-$(CONFIG_CRYPTO_HW) += crypto/
5obj-y += hypfs/ 5obj-$(CONFIG_S390_HYPFS_FS) += hypfs/
6obj-y += kvm/ 6obj-$(CONFIG_APPLDATA_BASE) += appldata/
7obj-$(CONFIG_MATHEMU) += math-emu/
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 28d183c42751..d1727584230a 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -193,18 +193,13 @@ config HOTPLUG_CPU
193 Say N if you want to disable CPU hotplug. 193 Say N if you want to disable CPU hotplug.
194 194
195config SCHED_MC 195config SCHED_MC
196 def_bool y 196 def_bool n
197 prompt "Multi-core scheduler support"
198 depends on SMP
199 help
200 Multi-core scheduler support improves the CPU scheduler's decision
201 making when dealing with multi-core CPU chips at a cost of slightly
202 increased overhead in some places.
203 197
204config SCHED_BOOK 198config SCHED_BOOK
205 def_bool y 199 def_bool y
206 prompt "Book scheduler support" 200 prompt "Book scheduler support"
207 depends on SMP && SCHED_MC 201 depends on SMP
202 select SCHED_MC
208 help 203 help
209 Book scheduler support improves the CPU scheduler's decision making 204 Book scheduler support improves the CPU scheduler's decision making
210 when dealing with machines that have several books. 205 when dealing with machines that have several books.
diff --git a/arch/s390/Makefile b/arch/s390/Makefile
index 27a0b5df5ead..e9f353341693 100644
--- a/arch/s390/Makefile
+++ b/arch/s390/Makefile
@@ -99,7 +99,6 @@ core-y += arch/s390/
99 99
100libs-y += arch/s390/lib/ 100libs-y += arch/s390/lib/
101drivers-y += drivers/s390/ 101drivers-y += drivers/s390/
102drivers-$(CONFIG_MATHEMU) += arch/s390/math-emu/
103 102
104# must be linked after kernel 103# must be linked after kernel
105drivers-$(CONFIG_OPROFILE) += arch/s390/oprofile/ 104drivers-$(CONFIG_OPROFILE) += arch/s390/oprofile/
diff --git a/arch/s390/boot/Makefile b/arch/s390/boot/Makefile
index 635d677d3281..f2737a005afc 100644
--- a/arch/s390/boot/Makefile
+++ b/arch/s390/boot/Makefile
@@ -23,4 +23,4 @@ $(obj)/compressed/vmlinux: FORCE
23 23
24install: $(CONFIGURE) $(obj)/image 24install: $(CONFIGURE) $(obj)/image
25 sh -x $(srctree)/$(obj)/install.sh $(KERNELRELEASE) $(obj)/image \ 25 sh -x $(srctree)/$(obj)/install.sh $(KERNELRELEASE) $(obj)/image \
26 System.map Kerntypes "$(INSTALL_PATH)" 26 System.map "$(INSTALL_PATH)"
diff --git a/arch/s390/include/asm/kdebug.h b/arch/s390/include/asm/kdebug.h
index 40db27cd6e60..5c1abd47612a 100644
--- a/arch/s390/include/asm/kdebug.h
+++ b/arch/s390/include/asm/kdebug.h
@@ -22,6 +22,6 @@ enum die_val {
22 DIE_NMI_IPI, 22 DIE_NMI_IPI,
23}; 23};
24 24
25extern void die(const char *, struct pt_regs *, long); 25extern void die(struct pt_regs *, const char *);
26 26
27#endif 27#endif
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 9e13c7d56cc1..707f2306725b 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -97,47 +97,52 @@ struct _lowcore {
97 __u32 gpregs_save_area[16]; /* 0x0180 */ 97 __u32 gpregs_save_area[16]; /* 0x0180 */
98 __u32 cregs_save_area[16]; /* 0x01c0 */ 98 __u32 cregs_save_area[16]; /* 0x01c0 */
99 99
100 /* Save areas. */
101 __u32 save_area_sync[8]; /* 0x0200 */
102 __u32 save_area_async[8]; /* 0x0220 */
103 __u32 save_area_restart[1]; /* 0x0240 */
104 __u8 pad_0x0244[0x0248-0x0244]; /* 0x0244 */
105
100 /* Return psws. */ 106 /* Return psws. */
101 __u32 save_area[16]; /* 0x0200 */ 107 psw_t return_psw; /* 0x0248 */
102 psw_t return_psw; /* 0x0240 */ 108 psw_t return_mcck_psw; /* 0x0250 */
103 psw_t return_mcck_psw; /* 0x0248 */
104 109
105 /* CPU time accounting values */ 110 /* CPU time accounting values */
106 __u64 sync_enter_timer; /* 0x0250 */ 111 __u64 sync_enter_timer; /* 0x0258 */
107 __u64 async_enter_timer; /* 0x0258 */ 112 __u64 async_enter_timer; /* 0x0260 */
108 __u64 mcck_enter_timer; /* 0x0260 */ 113 __u64 mcck_enter_timer; /* 0x0268 */
109 __u64 exit_timer; /* 0x0268 */ 114 __u64 exit_timer; /* 0x0270 */
110 __u64 user_timer; /* 0x0270 */ 115 __u64 user_timer; /* 0x0278 */
111 __u64 system_timer; /* 0x0278 */ 116 __u64 system_timer; /* 0x0280 */
112 __u64 steal_timer; /* 0x0280 */ 117 __u64 steal_timer; /* 0x0288 */
113 __u64 last_update_timer; /* 0x0288 */ 118 __u64 last_update_timer; /* 0x0290 */
114 __u64 last_update_clock; /* 0x0290 */ 119 __u64 last_update_clock; /* 0x0298 */
115 120
116 /* Current process. */ 121 /* Current process. */
117 __u32 current_task; /* 0x0298 */ 122 __u32 current_task; /* 0x02a0 */
118 __u32 thread_info; /* 0x029c */ 123 __u32 thread_info; /* 0x02a4 */
119 __u32 kernel_stack; /* 0x02a0 */ 124 __u32 kernel_stack; /* 0x02a8 */
120 125
121 /* Interrupt and panic stack. */ 126 /* Interrupt and panic stack. */
122 __u32 async_stack; /* 0x02a4 */ 127 __u32 async_stack; /* 0x02ac */
123 __u32 panic_stack; /* 0x02a8 */ 128 __u32 panic_stack; /* 0x02b0 */
124 129
125 /* Address space pointer. */ 130 /* Address space pointer. */
126 __u32 kernel_asce; /* 0x02ac */ 131 __u32 kernel_asce; /* 0x02b4 */
127 __u32 user_asce; /* 0x02b0 */ 132 __u32 user_asce; /* 0x02b8 */
128 __u32 current_pid; /* 0x02b4 */ 133 __u32 current_pid; /* 0x02bc */
129 134
130 /* SMP info area */ 135 /* SMP info area */
131 __u32 cpu_nr; /* 0x02b8 */ 136 __u32 cpu_nr; /* 0x02c0 */
132 __u32 softirq_pending; /* 0x02bc */ 137 __u32 softirq_pending; /* 0x02c4 */
133 __u32 percpu_offset; /* 0x02c0 */ 138 __u32 percpu_offset; /* 0x02c8 */
134 __u32 ext_call_fast; /* 0x02c4 */ 139 __u32 ext_call_fast; /* 0x02cc */
135 __u64 int_clock; /* 0x02c8 */ 140 __u64 int_clock; /* 0x02d0 */
136 __u64 mcck_clock; /* 0x02d0 */ 141 __u64 mcck_clock; /* 0x02d8 */
137 __u64 clock_comparator; /* 0x02d8 */ 142 __u64 clock_comparator; /* 0x02e0 */
138 __u32 machine_flags; /* 0x02e0 */ 143 __u32 machine_flags; /* 0x02e8 */
139 __u32 ftrace_func; /* 0x02e4 */ 144 __u32 ftrace_func; /* 0x02ec */
140 __u8 pad_0x02e8[0x0300-0x02e8]; /* 0x02e8 */ 145 __u8 pad_0x02f8[0x0300-0x02f0]; /* 0x02f0 */
141 146
142 /* Interrupt response block */ 147 /* Interrupt response block */
143 __u8 irb[64]; /* 0x0300 */ 148 __u8 irb[64]; /* 0x0300 */
@@ -229,57 +234,62 @@ struct _lowcore {
229 psw_t mcck_new_psw; /* 0x01e0 */ 234 psw_t mcck_new_psw; /* 0x01e0 */
230 psw_t io_new_psw; /* 0x01f0 */ 235 psw_t io_new_psw; /* 0x01f0 */
231 236
232 /* Entry/exit save area & return psws. */ 237 /* Save areas. */
233 __u64 save_area[16]; /* 0x0200 */ 238 __u64 save_area_sync[8]; /* 0x0200 */
234 psw_t return_psw; /* 0x0280 */ 239 __u64 save_area_async[8]; /* 0x0240 */
235 psw_t return_mcck_psw; /* 0x0290 */ 240 __u64 save_area_restart[1]; /* 0x0280 */
241 __u8 pad_0x0288[0x0290-0x0288]; /* 0x0288 */
242
243 /* Return psws. */
244 psw_t return_psw; /* 0x0290 */
245 psw_t return_mcck_psw; /* 0x02a0 */
236 246
237 /* CPU accounting and timing values. */ 247 /* CPU accounting and timing values. */
238 __u64 sync_enter_timer; /* 0x02a0 */ 248 __u64 sync_enter_timer; /* 0x02b0 */
239 __u64 async_enter_timer; /* 0x02a8 */ 249 __u64 async_enter_timer; /* 0x02b8 */
240 __u64 mcck_enter_timer; /* 0x02b0 */ 250 __u64 mcck_enter_timer; /* 0x02c0 */
241 __u64 exit_timer; /* 0x02b8 */ 251 __u64 exit_timer; /* 0x02c8 */
242 __u64 user_timer; /* 0x02c0 */ 252 __u64 user_timer; /* 0x02d0 */
243 __u64 system_timer; /* 0x02c8 */ 253 __u64 system_timer; /* 0x02d8 */
244 __u64 steal_timer; /* 0x02d0 */ 254 __u64 steal_timer; /* 0x02e0 */
245 __u64 last_update_timer; /* 0x02d8 */ 255 __u64 last_update_timer; /* 0x02e8 */
246 __u64 last_update_clock; /* 0x02e0 */ 256 __u64 last_update_clock; /* 0x02f0 */
247 257
248 /* Current process. */ 258 /* Current process. */
249 __u64 current_task; /* 0x02e8 */ 259 __u64 current_task; /* 0x02f8 */
250 __u64 thread_info; /* 0x02f0 */ 260 __u64 thread_info; /* 0x0300 */
251 __u64 kernel_stack; /* 0x02f8 */ 261 __u64 kernel_stack; /* 0x0308 */
252 262
253 /* Interrupt and panic stack. */ 263 /* Interrupt and panic stack. */
254 __u64 async_stack; /* 0x0300 */ 264 __u64 async_stack; /* 0x0310 */
255 __u64 panic_stack; /* 0x0308 */ 265 __u64 panic_stack; /* 0x0318 */
256 266
257 /* Address space pointer. */ 267 /* Address space pointer. */
258 __u64 kernel_asce; /* 0x0310 */ 268 __u64 kernel_asce; /* 0x0320 */
259 __u64 user_asce; /* 0x0318 */ 269 __u64 user_asce; /* 0x0328 */
260 __u64 current_pid; /* 0x0320 */ 270 __u64 current_pid; /* 0x0330 */
261 271
262 /* SMP info area */ 272 /* SMP info area */
263 __u32 cpu_nr; /* 0x0328 */ 273 __u32 cpu_nr; /* 0x0338 */
264 __u32 softirq_pending; /* 0x032c */ 274 __u32 softirq_pending; /* 0x033c */
265 __u64 percpu_offset; /* 0x0330 */ 275 __u64 percpu_offset; /* 0x0340 */
266 __u64 ext_call_fast; /* 0x0338 */ 276 __u64 ext_call_fast; /* 0x0348 */
267 __u64 int_clock; /* 0x0340 */ 277 __u64 int_clock; /* 0x0350 */
268 __u64 mcck_clock; /* 0x0348 */ 278 __u64 mcck_clock; /* 0x0358 */
269 __u64 clock_comparator; /* 0x0350 */ 279 __u64 clock_comparator; /* 0x0360 */
270 __u64 vdso_per_cpu_data; /* 0x0358 */ 280 __u64 vdso_per_cpu_data; /* 0x0368 */
271 __u64 machine_flags; /* 0x0360 */ 281 __u64 machine_flags; /* 0x0370 */
272 __u64 ftrace_func; /* 0x0368 */ 282 __u64 ftrace_func; /* 0x0378 */
273 __u64 gmap; /* 0x0370 */ 283 __u64 gmap; /* 0x0380 */
274 __u64 cmf_hpp; /* 0x0378 */ 284 __u8 pad_0x0388[0x0400-0x0388]; /* 0x0388 */
275 285
276 /* Interrupt response block. */ 286 /* Interrupt response block. */
277 __u8 irb[64]; /* 0x0380 */ 287 __u8 irb[64]; /* 0x0400 */
278 288
279 /* Per cpu primary space access list */ 289 /* Per cpu primary space access list */
280 __u32 paste[16]; /* 0x03c0 */ 290 __u32 paste[16]; /* 0x0440 */
281 291
282 __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */ 292 __u8 pad_0x0480[0x0e00-0x0480]; /* 0x0480 */
283 293
284 /* 294 /*
285 * 0xe00 contains the address of the IPL Parameter Information 295 * 0xe00 contains the address of the IPL Parameter Information
diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h
index 5325c89a5843..0fbd1899c7b0 100644
--- a/arch/s390/include/asm/percpu.h
+++ b/arch/s390/include/asm/percpu.h
@@ -19,7 +19,7 @@
19#define ARCH_NEEDS_WEAK_PER_CPU 19#define ARCH_NEEDS_WEAK_PER_CPU
20#endif 20#endif
21 21
22#define arch_irqsafe_cpu_to_op(pcp, val, op) \ 22#define arch_this_cpu_to_op(pcp, val, op) \
23do { \ 23do { \
24 typedef typeof(pcp) pcp_op_T__; \ 24 typedef typeof(pcp) pcp_op_T__; \
25 pcp_op_T__ old__, new__, prev__; \ 25 pcp_op_T__ old__, new__, prev__; \
@@ -41,27 +41,27 @@ do { \
41 preempt_enable(); \ 41 preempt_enable(); \
42} while (0) 42} while (0)
43 43
44#define irqsafe_cpu_add_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +) 44#define this_cpu_add_1(pcp, val) arch_this_cpu_to_op(pcp, val, +)
45#define irqsafe_cpu_add_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +) 45#define this_cpu_add_2(pcp, val) arch_this_cpu_to_op(pcp, val, +)
46#define irqsafe_cpu_add_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +) 46#define this_cpu_add_4(pcp, val) arch_this_cpu_to_op(pcp, val, +)
47#define irqsafe_cpu_add_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +) 47#define this_cpu_add_8(pcp, val) arch_this_cpu_to_op(pcp, val, +)
48 48
49#define irqsafe_cpu_and_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &) 49#define this_cpu_and_1(pcp, val) arch_this_cpu_to_op(pcp, val, &)
50#define irqsafe_cpu_and_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &) 50#define this_cpu_and_2(pcp, val) arch_this_cpu_to_op(pcp, val, &)
51#define irqsafe_cpu_and_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &) 51#define this_cpu_and_4(pcp, val) arch_this_cpu_to_op(pcp, val, &)
52#define irqsafe_cpu_and_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &) 52#define this_cpu_and_8(pcp, val) arch_this_cpu_to_op(pcp, val, &)
53 53
54#define irqsafe_cpu_or_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |) 54#define this_cpu_or_1(pcp, val) arch_this_cpu_to_op(pcp, val, |)
55#define irqsafe_cpu_or_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |) 55#define this_cpu_or_2(pcp, val) arch_this_cpu_to_op(pcp, val, |)
56#define irqsafe_cpu_or_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |) 56#define this_cpu_or_4(pcp, val) arch_this_cpu_to_op(pcp, val, |)
57#define irqsafe_cpu_or_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |) 57#define this_cpu_or_8(pcp, val) arch_this_cpu_to_op(pcp, val, |)
58 58
59#define irqsafe_cpu_xor_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^) 59#define this_cpu_xor_1(pcp, val) arch_this_cpu_to_op(pcp, val, ^)
60#define irqsafe_cpu_xor_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^) 60#define this_cpu_xor_2(pcp, val) arch_this_cpu_to_op(pcp, val, ^)
61#define irqsafe_cpu_xor_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^) 61#define this_cpu_xor_4(pcp, val) arch_this_cpu_to_op(pcp, val, ^)
62#define irqsafe_cpu_xor_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^) 62#define this_cpu_xor_8(pcp, val) arch_this_cpu_to_op(pcp, val, ^)
63 63
64#define arch_irqsafe_cpu_cmpxchg(pcp, oval, nval) \ 64#define arch_this_cpu_cmpxchg(pcp, oval, nval) \
65({ \ 65({ \
66 typedef typeof(pcp) pcp_op_T__; \ 66 typedef typeof(pcp) pcp_op_T__; \
67 pcp_op_T__ ret__; \ 67 pcp_op_T__ ret__; \
@@ -79,10 +79,10 @@ do { \
79 ret__; \ 79 ret__; \
80}) 80})
81 81
82#define irqsafe_cpu_cmpxchg_1(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval) 82#define this_cpu_cmpxchg_1(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval)
83#define irqsafe_cpu_cmpxchg_2(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval) 83#define this_cpu_cmpxchg_2(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval)
84#define irqsafe_cpu_cmpxchg_4(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval) 84#define this_cpu_cmpxchg_4(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval)
85#define irqsafe_cpu_cmpxchg_8(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval) 85#define this_cpu_cmpxchg_8(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval)
86 86
87#include <asm-generic/percpu.h> 87#include <asm-generic/percpu.h>
88 88
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 4f289ff0b7fe..011358c1b18e 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -128,28 +128,11 @@ static inline int is_zero_pfn(unsigned long pfn)
128 * effect, this also makes sure that 64 bit module code cannot be used 128 * effect, this also makes sure that 64 bit module code cannot be used
129 * as system call address. 129 * as system call address.
130 */ 130 */
131
132extern unsigned long VMALLOC_START; 131extern unsigned long VMALLOC_START;
132extern unsigned long VMALLOC_END;
133extern struct page *vmemmap;
133 134
134#ifndef __s390x__ 135#define VMEM_MAX_PHYS ((unsigned long) vmemmap)
135#define VMALLOC_SIZE (96UL << 20)
136#define VMALLOC_END 0x7e000000UL
137#define VMEM_MAP_END 0x80000000UL
138#else /* __s390x__ */
139#define VMALLOC_SIZE (128UL << 30)
140#define VMALLOC_END 0x3e000000000UL
141#define VMEM_MAP_END 0x40000000000UL
142#endif /* __s390x__ */
143
144/*
145 * VMEM_MAX_PHYS is the highest physical address that can be added to the 1:1
146 * mapping. This needs to be calculated at compile time since the size of the
147 * VMEM_MAP is static but the size of struct page can change.
148 */
149#define VMEM_MAX_PAGES ((VMEM_MAP_END - VMALLOC_END) / sizeof(struct page))
150#define VMEM_MAX_PFN min(VMALLOC_START >> PAGE_SHIFT, VMEM_MAX_PAGES)
151#define VMEM_MAX_PHYS ((VMEM_MAX_PFN << PAGE_SHIFT) & ~((16 << 20) - 1))
152#define vmemmap ((struct page *) VMALLOC_END)
153 136
154/* 137/*
155 * A 31 bit pagetable entry of S390 has following format: 138 * A 31 bit pagetable entry of S390 has following format:
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 5f33d37d032c..27272f6a14c2 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -80,8 +80,6 @@ struct thread_struct {
80 unsigned int acrs[NUM_ACRS]; 80 unsigned int acrs[NUM_ACRS];
81 unsigned long ksp; /* kernel stack pointer */ 81 unsigned long ksp; /* kernel stack pointer */
82 mm_segment_t mm_segment; 82 mm_segment_t mm_segment;
83 unsigned long prot_addr; /* address of protection-excep. */
84 unsigned int trap_no;
85 unsigned long gmap_addr; /* address of last gmap fault. */ 83 unsigned long gmap_addr; /* address of last gmap fault. */
86 struct per_regs per_user; /* User specified PER registers */ 84 struct per_regs per_user; /* User specified PER registers */
87 struct per_event per_event; /* Cause of the last PER trap */ 85 struct per_event per_event; /* Cause of the last PER trap */
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index a65846340d51..56da355678f4 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -324,7 +324,8 @@ struct pt_regs
324 psw_t psw; 324 psw_t psw;
325 unsigned long gprs[NUM_GPRS]; 325 unsigned long gprs[NUM_GPRS];
326 unsigned long orig_gpr2; 326 unsigned long orig_gpr2;
327 unsigned int svc_code; 327 unsigned int int_code;
328 unsigned long int_parm_long;
328}; 329};
329 330
330/* 331/*
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index e63d13dd3bf5..d75c8e78f7e3 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -352,7 +352,7 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
352 * @no_output_qs: number of output queues 352 * @no_output_qs: number of output queues
353 * @input_handler: handler to be called for input queues 353 * @input_handler: handler to be called for input queues
354 * @output_handler: handler to be called for output queues 354 * @output_handler: handler to be called for output queues
355 * @queue_start_poll: polling handlers (one per input queue or NULL) 355 * @queue_start_poll_array: polling handlers (one per input queue or NULL)
356 * @int_parm: interruption parameter 356 * @int_parm: interruption parameter
357 * @input_sbal_addr_array: address of no_input_qs * 128 pointers 357 * @input_sbal_addr_array: address of no_input_qs * 128 pointers
358 * @output_sbal_addr_array: address of no_output_qs * 128 pointers 358 * @output_sbal_addr_array: address of no_output_qs * 128 pointers
@@ -372,7 +372,8 @@ struct qdio_initialize {
372 unsigned int no_output_qs; 372 unsigned int no_output_qs;
373 qdio_handler_t *input_handler; 373 qdio_handler_t *input_handler;
374 qdio_handler_t *output_handler; 374 qdio_handler_t *output_handler;
375 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 375 void (**queue_start_poll_array) (struct ccw_device *, int,
376 unsigned long);
376 int scan_threshold; 377 int scan_threshold;
377 unsigned long int_parm; 378 unsigned long int_parm;
378 void **input_sbal_addr_array; 379 void **input_sbal_addr_array;
diff --git a/arch/s390/include/asm/sigp.h b/arch/s390/include/asm/sigp.h
index e3bffd4e2d66..7040b8567cd0 100644
--- a/arch/s390/include/asm/sigp.h
+++ b/arch/s390/include/asm/sigp.h
@@ -56,6 +56,7 @@ enum {
56 ec_schedule = 0, 56 ec_schedule = 0,
57 ec_call_function, 57 ec_call_function,
58 ec_call_function_single, 58 ec_call_function_single,
59 ec_stop_cpu,
59}; 60};
60 61
61/* 62/*
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index ab47a69fdf07..c32e9123b40c 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -23,7 +23,6 @@ extern void __cpu_die (unsigned int cpu);
23extern int __cpu_up (unsigned int cpu); 23extern int __cpu_up (unsigned int cpu);
24 24
25extern struct mutex smp_cpu_state_mutex; 25extern struct mutex smp_cpu_state_mutex;
26extern int smp_cpu_polarization[];
27 26
28extern void arch_send_call_function_single_ipi(int cpu); 27extern void arch_send_call_function_single_ipi(int cpu);
29extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); 28extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
diff --git a/arch/s390/include/asm/sparsemem.h b/arch/s390/include/asm/sparsemem.h
index 545d219e6a2d..0fb34027d3f6 100644
--- a/arch/s390/include/asm/sparsemem.h
+++ b/arch/s390/include/asm/sparsemem.h
@@ -4,8 +4,8 @@
4#ifdef CONFIG_64BIT 4#ifdef CONFIG_64BIT
5 5
6#define SECTION_SIZE_BITS 28 6#define SECTION_SIZE_BITS 28
7#define MAX_PHYSADDR_BITS 42 7#define MAX_PHYSADDR_BITS 46
8#define MAX_PHYSMEM_BITS 42 8#define MAX_PHYSMEM_BITS 46
9 9
10#else 10#else
11 11
diff --git a/arch/s390/include/asm/syscall.h b/arch/s390/include/asm/syscall.h
index b239ff53b189..fb214dd9b7e0 100644
--- a/arch/s390/include/asm/syscall.h
+++ b/arch/s390/include/asm/syscall.h
@@ -27,7 +27,7 @@ static inline long syscall_get_nr(struct task_struct *task,
27 struct pt_regs *regs) 27 struct pt_regs *regs)
28{ 28{
29 return test_tsk_thread_flag(task, TIF_SYSCALL) ? 29 return test_tsk_thread_flag(task, TIF_SYSCALL) ?
30 (regs->svc_code & 0xffff) : -1; 30 (regs->int_code & 0xffff) : -1;
31} 31}
32 32
33static inline void syscall_rollback(struct task_struct *task, 33static inline void syscall_rollback(struct task_struct *task,
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index ef573c1d71a7..d73cc6b60000 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -20,8 +20,6 @@
20 20
21struct task_struct; 21struct task_struct;
22 22
23extern int sysctl_userprocess_debug;
24
25extern struct task_struct *__switch_to(void *, void *); 23extern struct task_struct *__switch_to(void *, void *);
26extern void update_per_regs(struct task_struct *task); 24extern void update_per_regs(struct task_struct *task);
27 25
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index 005d77d8ae2a..0837de80c351 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -4,6 +4,10 @@
4#include <linux/cpumask.h> 4#include <linux/cpumask.h>
5#include <asm/sysinfo.h> 5#include <asm/sysinfo.h>
6 6
7struct cpu;
8
9#ifdef CONFIG_SCHED_BOOK
10
7extern unsigned char cpu_core_id[NR_CPUS]; 11extern unsigned char cpu_core_id[NR_CPUS];
8extern cpumask_t cpu_core_map[NR_CPUS]; 12extern cpumask_t cpu_core_map[NR_CPUS];
9 13
@@ -16,8 +20,6 @@ static inline const struct cpumask *cpu_coregroup_mask(int cpu)
16#define topology_core_cpumask(cpu) (&cpu_core_map[cpu]) 20#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
17#define mc_capable() (1) 21#define mc_capable() (1)
18 22
19#ifdef CONFIG_SCHED_BOOK
20
21extern unsigned char cpu_book_id[NR_CPUS]; 23extern unsigned char cpu_book_id[NR_CPUS];
22extern cpumask_t cpu_book_map[NR_CPUS]; 24extern cpumask_t cpu_book_map[NR_CPUS];
23 25
@@ -29,19 +31,45 @@ static inline const struct cpumask *cpu_book_mask(int cpu)
29#define topology_book_id(cpu) (cpu_book_id[cpu]) 31#define topology_book_id(cpu) (cpu_book_id[cpu])
30#define topology_book_cpumask(cpu) (&cpu_book_map[cpu]) 32#define topology_book_cpumask(cpu) (&cpu_book_map[cpu])
31 33
32#endif /* CONFIG_SCHED_BOOK */ 34int topology_cpu_init(struct cpu *);
33
34int topology_set_cpu_management(int fc); 35int topology_set_cpu_management(int fc);
35void topology_schedule_update(void); 36void topology_schedule_update(void);
36void store_topology(struct sysinfo_15_1_x *info); 37void store_topology(struct sysinfo_15_1_x *info);
38void topology_expect_change(void);
39
40#else /* CONFIG_SCHED_BOOK */
41
42static inline void topology_schedule_update(void) { }
43static inline int topology_cpu_init(struct cpu *cpu) { return 0; }
44static inline void topology_expect_change(void) { }
37 45
38#define POLARIZATION_UNKNWN (-1) 46#endif /* CONFIG_SCHED_BOOK */
47
48#define POLARIZATION_UNKNOWN (-1)
39#define POLARIZATION_HRZ (0) 49#define POLARIZATION_HRZ (0)
40#define POLARIZATION_VL (1) 50#define POLARIZATION_VL (1)
41#define POLARIZATION_VM (2) 51#define POLARIZATION_VM (2)
42#define POLARIZATION_VH (3) 52#define POLARIZATION_VH (3)
43 53
44#ifdef CONFIG_SMP 54extern int cpu_polarization[];
55
56static inline void cpu_set_polarization(int cpu, int val)
57{
58#ifdef CONFIG_SCHED_BOOK
59 cpu_polarization[cpu] = val;
60#endif
61}
62
63static inline int cpu_read_polarization(int cpu)
64{
65#ifdef CONFIG_SCHED_BOOK
66 return cpu_polarization[cpu];
67#else
68 return POLARIZATION_HRZ;
69#endif
70}
71
72#ifdef CONFIG_SCHED_BOOK
45void s390_init_cpu_topology(void); 73void s390_init_cpu_topology(void);
46#else 74#else
47static inline void s390_init_cpu_topology(void) 75static inline void s390_init_cpu_topology(void)
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 58de4c91c333..8a8008fe7b8f 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -398,6 +398,7 @@
398#define __ARCH_WANT_SYS_SIGNAL 398#define __ARCH_WANT_SYS_SIGNAL
399#define __ARCH_WANT_SYS_UTIME 399#define __ARCH_WANT_SYS_UTIME
400#define __ARCH_WANT_SYS_SOCKETCALL 400#define __ARCH_WANT_SYS_SOCKETCALL
401#define __ARCH_WANT_SYS_IPC
401#define __ARCH_WANT_SYS_FADVISE64 402#define __ARCH_WANT_SYS_FADVISE64
402#define __ARCH_WANT_SYS_GETPGRP 403#define __ARCH_WANT_SYS_GETPGRP
403#define __ARCH_WANT_SYS_LLSEEK 404#define __ARCH_WANT_SYS_LLSEEK
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index dd4f07640919..7d9ec924e7e7 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -32,7 +32,8 @@ extra-y += head.o init_task.o vmlinux.lds
32extra-y += $(if $(CONFIG_64BIT),head64.o,head31.o) 32extra-y += $(if $(CONFIG_64BIT),head64.o,head31.o)
33 33
34obj-$(CONFIG_MODULES) += s390_ksyms.o module.o 34obj-$(CONFIG_MODULES) += s390_ksyms.o module.o
35obj-$(CONFIG_SMP) += smp.o topology.o 35obj-$(CONFIG_SMP) += smp.o
36obj-$(CONFIG_SCHED_BOOK) += topology.o
36obj-$(CONFIG_SMP) += $(if $(CONFIG_64BIT),switch_cpu64.o, \ 37obj-$(CONFIG_SMP) += $(if $(CONFIG_64BIT),switch_cpu64.o, \
37 switch_cpu.o) 38 switch_cpu.o)
38obj-$(CONFIG_HIBERNATION) += suspend.o swsusp_asm64.o 39obj-$(CONFIG_HIBERNATION) += suspend.o swsusp_asm64.o
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 751318765e2e..6e6a72e66d60 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -45,7 +45,8 @@ int main(void)
45 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw)); 45 DEFINE(__PT_PSW, offsetof(struct pt_regs, psw));
46 DEFINE(__PT_GPRS, offsetof(struct pt_regs, gprs)); 46 DEFINE(__PT_GPRS, offsetof(struct pt_regs, gprs));
47 DEFINE(__PT_ORIG_GPR2, offsetof(struct pt_regs, orig_gpr2)); 47 DEFINE(__PT_ORIG_GPR2, offsetof(struct pt_regs, orig_gpr2));
48 DEFINE(__PT_SVC_CODE, offsetof(struct pt_regs, svc_code)); 48 DEFINE(__PT_INT_CODE, offsetof(struct pt_regs, int_code));
49 DEFINE(__PT_INT_PARM_LONG, offsetof(struct pt_regs, int_parm_long));
49 DEFINE(__PT_SIZE, sizeof(struct pt_regs)); 50 DEFINE(__PT_SIZE, sizeof(struct pt_regs));
50 BLANK(); 51 BLANK();
51 DEFINE(__SF_BACKCHAIN, offsetof(struct stack_frame, back_chain)); 52 DEFINE(__SF_BACKCHAIN, offsetof(struct stack_frame, back_chain));
@@ -108,7 +109,9 @@ int main(void)
108 DEFINE(__LC_PGM_NEW_PSW, offsetof(struct _lowcore, program_new_psw)); 109 DEFINE(__LC_PGM_NEW_PSW, offsetof(struct _lowcore, program_new_psw));
109 DEFINE(__LC_MCK_NEW_PSW, offsetof(struct _lowcore, mcck_new_psw)); 110 DEFINE(__LC_MCK_NEW_PSW, offsetof(struct _lowcore, mcck_new_psw));
110 DEFINE(__LC_IO_NEW_PSW, offsetof(struct _lowcore, io_new_psw)); 111 DEFINE(__LC_IO_NEW_PSW, offsetof(struct _lowcore, io_new_psw));
111 DEFINE(__LC_SAVE_AREA, offsetof(struct _lowcore, save_area)); 112 DEFINE(__LC_SAVE_AREA_SYNC, offsetof(struct _lowcore, save_area_sync));
113 DEFINE(__LC_SAVE_AREA_ASYNC, offsetof(struct _lowcore, save_area_async));
114 DEFINE(__LC_SAVE_AREA_RESTART, offsetof(struct _lowcore, save_area_restart));
112 DEFINE(__LC_RETURN_PSW, offsetof(struct _lowcore, return_psw)); 115 DEFINE(__LC_RETURN_PSW, offsetof(struct _lowcore, return_psw));
113 DEFINE(__LC_RETURN_MCCK_PSW, offsetof(struct _lowcore, return_mcck_psw)); 116 DEFINE(__LC_RETURN_MCCK_PSW, offsetof(struct _lowcore, return_mcck_psw));
114 DEFINE(__LC_SYNC_ENTER_TIMER, offsetof(struct _lowcore, sync_enter_timer)); 117 DEFINE(__LC_SYNC_ENTER_TIMER, offsetof(struct _lowcore, sync_enter_timer));
@@ -150,7 +153,6 @@ int main(void)
150 DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr)); 153 DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr));
151 DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); 154 DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data));
152 DEFINE(__LC_GMAP, offsetof(struct _lowcore, gmap)); 155 DEFINE(__LC_GMAP, offsetof(struct _lowcore, gmap));
153 DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp));
154 DEFINE(__GMAP_ASCE, offsetof(struct gmap, asce)); 156 DEFINE(__GMAP_ASCE, offsetof(struct gmap, asce));
155#endif /* CONFIG_32BIT */ 157#endif /* CONFIG_32BIT */
156 return 0; 158 return 0;
diff --git a/arch/s390/kernel/base.S b/arch/s390/kernel/base.S
index f8828d38fa6e..3aa4d00aaf50 100644
--- a/arch/s390/kernel/base.S
+++ b/arch/s390/kernel/base.S
@@ -33,7 +33,7 @@ s390_base_mcck_handler_fn:
33 .previous 33 .previous
34 34
35ENTRY(s390_base_ext_handler) 35ENTRY(s390_base_ext_handler)
36 stmg %r0,%r15,__LC_SAVE_AREA 36 stmg %r0,%r15,__LC_SAVE_AREA_ASYNC
37 basr %r13,0 37 basr %r13,0
380: aghi %r15,-STACK_FRAME_OVERHEAD 380: aghi %r15,-STACK_FRAME_OVERHEAD
39 larl %r1,s390_base_ext_handler_fn 39 larl %r1,s390_base_ext_handler_fn
@@ -41,7 +41,7 @@ ENTRY(s390_base_ext_handler)
41 ltgr %r1,%r1 41 ltgr %r1,%r1
42 jz 1f 42 jz 1f
43 basr %r14,%r1 43 basr %r14,%r1
441: lmg %r0,%r15,__LC_SAVE_AREA 441: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC
45 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit 45 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
46 lpswe __LC_EXT_OLD_PSW 46 lpswe __LC_EXT_OLD_PSW
47 47
@@ -53,7 +53,7 @@ s390_base_ext_handler_fn:
53 .previous 53 .previous
54 54
55ENTRY(s390_base_pgm_handler) 55ENTRY(s390_base_pgm_handler)
56 stmg %r0,%r15,__LC_SAVE_AREA 56 stmg %r0,%r15,__LC_SAVE_AREA_SYNC
57 basr %r13,0 57 basr %r13,0
580: aghi %r15,-STACK_FRAME_OVERHEAD 580: aghi %r15,-STACK_FRAME_OVERHEAD
59 larl %r1,s390_base_pgm_handler_fn 59 larl %r1,s390_base_pgm_handler_fn
@@ -61,7 +61,7 @@ ENTRY(s390_base_pgm_handler)
61 ltgr %r1,%r1 61 ltgr %r1,%r1
62 jz 1f 62 jz 1f
63 basr %r14,%r1 63 basr %r14,%r1
64 lmg %r0,%r15,__LC_SAVE_AREA 64 lmg %r0,%r15,__LC_SAVE_AREA_SYNC
65 lpswe __LC_PGM_OLD_PSW 65 lpswe __LC_PGM_OLD_PSW
661: lpswe disabled_wait_psw-0b(%r13) 661: lpswe disabled_wait_psw-0b(%r13)
67 67
@@ -142,7 +142,7 @@ s390_base_mcck_handler_fn:
142 .previous 142 .previous
143 143
144ENTRY(s390_base_ext_handler) 144ENTRY(s390_base_ext_handler)
145 stm %r0,%r15,__LC_SAVE_AREA 145 stm %r0,%r15,__LC_SAVE_AREA_ASYNC
146 basr %r13,0 146 basr %r13,0
1470: ahi %r15,-STACK_FRAME_OVERHEAD 1470: ahi %r15,-STACK_FRAME_OVERHEAD
148 l %r1,2f-0b(%r13) 148 l %r1,2f-0b(%r13)
@@ -150,7 +150,7 @@ ENTRY(s390_base_ext_handler)
150 ltr %r1,%r1 150 ltr %r1,%r1
151 jz 1f 151 jz 1f
152 basr %r14,%r1 152 basr %r14,%r1
1531: lm %r0,%r15,__LC_SAVE_AREA 1531: lm %r0,%r15,__LC_SAVE_AREA_ASYNC
154 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit 154 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
155 lpsw __LC_EXT_OLD_PSW 155 lpsw __LC_EXT_OLD_PSW
156 156
@@ -164,7 +164,7 @@ s390_base_ext_handler_fn:
164 .previous 164 .previous
165 165
166ENTRY(s390_base_pgm_handler) 166ENTRY(s390_base_pgm_handler)
167 stm %r0,%r15,__LC_SAVE_AREA 167 stm %r0,%r15,__LC_SAVE_AREA_SYNC
168 basr %r13,0 168 basr %r13,0
1690: ahi %r15,-STACK_FRAME_OVERHEAD 1690: ahi %r15,-STACK_FRAME_OVERHEAD
170 l %r1,2f-0b(%r13) 170 l %r1,2f-0b(%r13)
@@ -172,7 +172,7 @@ ENTRY(s390_base_pgm_handler)
172 ltr %r1,%r1 172 ltr %r1,%r1
173 jz 1f 173 jz 1f
174 basr %r14,%r1 174 basr %r14,%r1
175 lm %r0,%r15,__LC_SAVE_AREA 175 lm %r0,%r15,__LC_SAVE_AREA_SYNC
176 lpsw __LC_PGM_OLD_PSW 176 lpsw __LC_PGM_OLD_PSW
177 177
1781: lpsw disabled_wait_psw-0b(%r13) 1781: lpsw disabled_wait_psw-0b(%r13)
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 84a982898448..ab64bdbab2ae 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -278,9 +278,6 @@ asmlinkage long sys32_ipc(u32 call, int first, int second, int third, u32 ptr)
278{ 278{
279 if (call >> 16) /* hack for backward compatibility */ 279 if (call >> 16) /* hack for backward compatibility */
280 return -EINVAL; 280 return -EINVAL;
281
282 call &= 0xffff;
283
284 switch (call) { 281 switch (call) {
285 case SEMTIMEDOP: 282 case SEMTIMEDOP:
286 return compat_sys_semtimedop(first, compat_ptr(ptr), 283 return compat_sys_semtimedop(first, compat_ptr(ptr),
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index 4f68c81d3ffa..6fe78c2f95d9 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -501,8 +501,12 @@ static int setup_frame32(int sig, struct k_sigaction *ka,
501 501
502 /* We forgot to include these in the sigcontext. 502 /* We forgot to include these in the sigcontext.
503 To avoid breaking binary compatibility, they are passed as args. */ 503 To avoid breaking binary compatibility, they are passed as args. */
504 regs->gprs[4] = current->thread.trap_no; 504 if (sig == SIGSEGV || sig == SIGBUS || sig == SIGILL ||
505 regs->gprs[5] = current->thread.prot_addr; 505 sig == SIGTRAP || sig == SIGFPE) {
506 /* set extra registers only for synchronous signals */
507 regs->gprs[4] = regs->int_code & 127;
508 regs->gprs[5] = regs->int_parm_long;
509 }
506 510
507 /* Place signal number on stack to allow backtrace from handler. */ 511 /* Place signal number on stack to allow backtrace from handler. */
508 if (__put_user(regs->gprs[2], (int __force __user *) &frame->signo)) 512 if (__put_user(regs->gprs[2], (int __force __user *) &frame->signo))
@@ -544,9 +548,9 @@ static int setup_rt_frame32(int sig, struct k_sigaction *ka, siginfo_t *info,
544 /* Set up to return from userspace. If provided, use a stub 548 /* Set up to return from userspace. If provided, use a stub
545 already in userspace. */ 549 already in userspace. */
546 if (ka->sa.sa_flags & SA_RESTORER) { 550 if (ka->sa.sa_flags & SA_RESTORER) {
547 regs->gprs[14] = (__u64) ka->sa.sa_restorer; 551 regs->gprs[14] = (__u64) ka->sa.sa_restorer | PSW32_ADDR_AMODE;
548 } else { 552 } else {
549 regs->gprs[14] = (__u64) frame->retcode; 553 regs->gprs[14] = (__u64) frame->retcode | PSW32_ADDR_AMODE;
550 err |= __put_user(S390_SYSCALL_OPCODE | __NR_rt_sigreturn, 554 err |= __put_user(S390_SYSCALL_OPCODE | __NR_rt_sigreturn,
551 (u16 __force __user *)(frame->retcode)); 555 (u16 __force __user *)(frame->retcode));
552 } 556 }
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
index 45df6d456aa1..e2f847599c8e 100644
--- a/arch/s390/kernel/dis.c
+++ b/arch/s390/kernel/dis.c
@@ -1578,10 +1578,15 @@ void show_code(struct pt_regs *regs)
1578 ptr += sprintf(ptr, "%s Code:", mode); 1578 ptr += sprintf(ptr, "%s Code:", mode);
1579 hops = 0; 1579 hops = 0;
1580 while (start < end && hops < 8) { 1580 while (start < end && hops < 8) {
1581 *ptr++ = (start == 32) ? '>' : ' '; 1581 opsize = insn_length(code[start]);
1582 if (start + opsize == 32)
1583 *ptr++ = '#';
1584 else if (start == 32)
1585 *ptr++ = '>';
1586 else
1587 *ptr++ = ' ';
1582 addr = regs->psw.addr + start - 32; 1588 addr = regs->psw.addr + start - 32;
1583 ptr += sprintf(ptr, ONELONG, addr); 1589 ptr += sprintf(ptr, ONELONG, addr);
1584 opsize = insn_length(code[start]);
1585 if (start + opsize >= end) 1590 if (start + opsize >= end)
1586 break; 1591 break;
1587 for (i = 0; i < opsize; i++) 1592 for (i = 0; i < opsize; i++)
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index c9ffe0025197..52098d6dfaa7 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -434,18 +434,22 @@ static void __init append_to_cmdline(size_t (*ipl_data)(char *, size_t))
434 } 434 }
435} 435}
436 436
437static void __init setup_boot_command_line(void) 437static inline int has_ebcdic_char(const char *str)
438{ 438{
439 int i; 439 int i;
440 440
441 /* convert arch command line to ascii */ 441 for (i = 0; str[i]; i++)
442 for (i = 0; i < ARCH_COMMAND_LINE_SIZE; i++) 442 if (str[i] & 0x80)
443 if (COMMAND_LINE[i] & 0x80) 443 return 1;
444 break; 444 return 0;
445 if (i < ARCH_COMMAND_LINE_SIZE) 445}
446 EBCASC(COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
447 COMMAND_LINE[ARCH_COMMAND_LINE_SIZE-1] = 0;
448 446
447static void __init setup_boot_command_line(void)
448{
449 COMMAND_LINE[ARCH_COMMAND_LINE_SIZE - 1] = 0;
450 /* convert arch command line to ascii if necessary */
451 if (has_ebcdic_char(COMMAND_LINE))
452 EBCASC(COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
449 /* copy arch command line */ 453 /* copy arch command line */
450 strlcpy(boot_command_line, strstrip(COMMAND_LINE), 454 strlcpy(boot_command_line, strstrip(COMMAND_LINE),
451 ARCH_COMMAND_LINE_SIZE); 455 ARCH_COMMAND_LINE_SIZE);
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index b13157057e02..3705700ed374 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -19,32 +19,22 @@
19#include <asm/unistd.h> 19#include <asm/unistd.h>
20#include <asm/page.h> 20#include <asm/page.h>
21 21
22/* 22__PT_R0 = __PT_GPRS
23 * Stack layout for the system_call stack entry. 23__PT_R1 = __PT_GPRS + 4
24 * The first few entries are identical to the user_regs_struct. 24__PT_R2 = __PT_GPRS + 8
25 */ 25__PT_R3 = __PT_GPRS + 12
26SP_PTREGS = STACK_FRAME_OVERHEAD 26__PT_R4 = __PT_GPRS + 16
27SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS 27__PT_R5 = __PT_GPRS + 20
28SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW 28__PT_R6 = __PT_GPRS + 24
29SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS 29__PT_R7 = __PT_GPRS + 28
30SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 30__PT_R8 = __PT_GPRS + 32
31SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 31__PT_R9 = __PT_GPRS + 36
32SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 32__PT_R10 = __PT_GPRS + 40
33SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 33__PT_R11 = __PT_GPRS + 44
34SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 34__PT_R12 = __PT_GPRS + 48
35SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 35__PT_R13 = __PT_GPRS + 524
36SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 36__PT_R14 = __PT_GPRS + 56
37SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 37__PT_R15 = __PT_GPRS + 60
38SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
39SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
40SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
41SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
42SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
43SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
44SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
45SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46SP_SVC_CODE = STACK_FRAME_OVERHEAD + __PT_SVC_CODE
47SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
48 38
49_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 39_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
50 _TIF_MCCK_PENDING | _TIF_PER_TRAP ) 40 _TIF_MCCK_PENDING | _TIF_PER_TRAP )
@@ -58,133 +48,91 @@ STACK_SIZE = 1 << STACK_SHIFT
58 48
59#define BASED(name) name-system_call(%r13) 49#define BASED(name) name-system_call(%r13)
60 50
61#ifdef CONFIG_TRACE_IRQFLAGS
62 .macro TRACE_IRQS_ON 51 .macro TRACE_IRQS_ON
52#ifdef CONFIG_TRACE_IRQFLAGS
63 basr %r2,%r0 53 basr %r2,%r0
64 l %r1,BASED(.Ltrace_irq_on_caller) 54 l %r1,BASED(.Lhardirqs_on)
65 basr %r14,%r1 55 basr %r14,%r1 # call trace_hardirqs_on_caller
56#endif
66 .endm 57 .endm
67 58
68 .macro TRACE_IRQS_OFF 59 .macro TRACE_IRQS_OFF
60#ifdef CONFIG_TRACE_IRQFLAGS
69 basr %r2,%r0 61 basr %r2,%r0
70 l %r1,BASED(.Ltrace_irq_off_caller) 62 l %r1,BASED(.Lhardirqs_off)
71 basr %r14,%r1 63 basr %r14,%r1 # call trace_hardirqs_off_caller
72 .endm
73#else
74#define TRACE_IRQS_ON
75#define TRACE_IRQS_OFF
76#endif 64#endif
65 .endm
77 66
78#ifdef CONFIG_LOCKDEP
79 .macro LOCKDEP_SYS_EXIT 67 .macro LOCKDEP_SYS_EXIT
80 tm SP_PSW+1(%r15),0x01 # returning to user ? 68#ifdef CONFIG_LOCKDEP
81 jz 0f 69 tm __PT_PSW+1(%r11),0x01 # returning to user ?
70 jz .+10
82 l %r1,BASED(.Llockdep_sys_exit) 71 l %r1,BASED(.Llockdep_sys_exit)
83 basr %r14,%r1 72 basr %r14,%r1 # call lockdep_sys_exit
840:
85 .endm
86#else
87#define LOCKDEP_SYS_EXIT
88#endif 73#endif
89
90/*
91 * Register usage in interrupt handlers:
92 * R9 - pointer to current task structure
93 * R13 - pointer to literal pool
94 * R14 - return register for function calls
95 * R15 - kernel stack pointer
96 */
97
98 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
99 lm %r10,%r11,\lc_from
100 sl %r10,\lc_to
101 sl %r11,\lc_to+4
102 bc 3,BASED(0f)
103 sl %r10,BASED(.Lc_1)
1040: al %r10,\lc_sum
105 al %r11,\lc_sum+4
106 bc 12,BASED(1f)
107 al %r10,BASED(.Lc_1)
1081: stm %r10,%r11,\lc_sum
109 .endm
110
111 .macro SAVE_ALL_SVC psworg,savearea
112 stm %r12,%r15,\savearea
113 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
114 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
115 s %r15,BASED(.Lc_spsize) # make room for registers & psw
116 .endm
117
118 .macro SAVE_ALL_BASE savearea
119 stm %r12,%r15,\savearea
120 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
121 .endm 74 .endm
122 75
123 .macro SAVE_ALL_PGM psworg,savearea 76 .macro CHECK_STACK stacksize,savearea
124 tm \psworg+1,0x01 # test problem state bit
125#ifdef CONFIG_CHECK_STACK 77#ifdef CONFIG_CHECK_STACK
126 bnz BASED(1f) 78 tml %r15,\stacksize - CONFIG_STACK_GUARD
127 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 79 la %r14,\savearea
128 bnz BASED(2f) 80 jz stack_overflow
129 la %r12,\psworg
130 b BASED(stack_overflow)
131#else
132 bz BASED(2f)
133#endif 81#endif
1341: l %r15,__LC_KERNEL_STACK # problem state -> load ksp
1352: s %r15,BASED(.Lc_spsize) # make room for registers & psw
136 .endm 82 .endm
137 83
138 .macro SAVE_ALL_ASYNC psworg,savearea 84 .macro SWITCH_ASYNC savearea,stack,shift
139 stm %r12,%r15,\savearea 85 tmh %r8,0x0001 # interrupting from user ?
140 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 86 jnz 1f
141 la %r12,\psworg 87 lr %r14,%r9
142 tm \psworg+1,0x01 # test problem state bit 88 sl %r14,BASED(.Lcritical_start)
143 bnz BASED(1f) # from user -> load async stack 89 cl %r14,BASED(.Lcritical_length)
144 clc \psworg+4(4),BASED(.Lcritical_end) 90 jhe 0f
145 bhe BASED(0f) 91 la %r11,\savearea # inside critical section, do cleanup
146 clc \psworg+4(4),BASED(.Lcritical_start) 92 bras %r14,cleanup_critical
147 bl BASED(0f) 93 tmh %r8,0x0001 # retest problem state after cleanup
148 l %r14,BASED(.Lcleanup_critical) 94 jnz 1f
149 basr %r14,%r14 950: l %r14,\stack # are we already on the target stack?
150 tm 1(%r12),0x01 # retest problem state after cleanup
151 bnz BASED(1f)
1520: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
153 slr %r14,%r15 96 slr %r14,%r15
154 sra %r14,STACK_SHIFT 97 sra %r14,\shift
155#ifdef CONFIG_CHECK_STACK 98 jnz 1f
156 bnz BASED(1f) 99 CHECK_STACK 1<<\shift,\savearea
157 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 100 j 2f
158 bnz BASED(2f) 1011: l %r15,\stack # load target stack
159 b BASED(stack_overflow) 1022: ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
160#else 103 la %r11,STACK_FRAME_OVERHEAD(%r15)
161 bz BASED(2f)
162#endif
1631: l %r15,__LC_ASYNC_STACK
1642: s %r15,BASED(.Lc_spsize) # make room for registers & psw
165 .endm 104 .endm
166 105
167 .macro CREATE_STACK_FRAME savearea 106 .macro ADD64 high,low,timer
168 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) 107 al \high,\timer
169 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 108 al \low,\timer+4
170 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack 109 brc 12,.+8
171 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 110 ahi \high,1
172 .endm 111 .endm
173 112
174 .macro RESTORE_ALL psworg,sync 113 .macro SUB64 high,low,timer
175 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore 114 sl \high,\timer
176 .if !\sync 115 sl \low,\timer+4
177 ni \psworg+1,0xfd # clear wait state bit 116 brc 3,.+8
178 .endif 117 ahi \high,-1
179 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 118 .endm
180 stpt __LC_EXIT_TIMER 119
181 lpsw \psworg # back to caller 120 .macro UPDATE_VTIME high,low,enter_timer
121 lm \high,\low,__LC_EXIT_TIMER
122 SUB64 \high,\low,\enter_timer
123 ADD64 \high,\low,__LC_USER_TIMER
124 stm \high,\low,__LC_USER_TIMER
125 lm \high,\low,__LC_LAST_UPDATE_TIMER
126 SUB64 \high,\low,__LC_EXIT_TIMER
127 ADD64 \high,\low,__LC_SYSTEM_TIMER
128 stm \high,\low,__LC_SYSTEM_TIMER
129 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
182 .endm 130 .endm
183 131
184 .macro REENABLE_IRQS 132 .macro REENABLE_IRQS
185 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15) 133 st %r8,__LC_RETURN_PSW
186 ni __SF_EMPTY(%r15),0xbf 134 ni __LC_RETURN_PSW,0xbf
187 ssm __SF_EMPTY(%r15) 135 ssm __LC_RETURN_PSW
188 .endm 136 .endm
189 137
190 .section .kprobes.text, "ax" 138 .section .kprobes.text, "ax"
@@ -197,14 +145,13 @@ STACK_SIZE = 1 << STACK_SHIFT
197 * gpr2 = prev 145 * gpr2 = prev
198 */ 146 */
199ENTRY(__switch_to) 147ENTRY(__switch_to)
200 basr %r1,0 148 l %r4,__THREAD_info(%r2) # get thread_info of prev
2010: l %r4,__THREAD_info(%r2) # get thread_info of prev
202 l %r5,__THREAD_info(%r3) # get thread_info of next 149 l %r5,__THREAD_info(%r3) # get thread_info of next
203 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? 150 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
204 bz 1f-0b(%r1) 151 jz 0f
205 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev 152 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
206 oi __TI_flags+3(%r5),_TIF_MCCK_PENDING # set it in next 153 oi __TI_flags+3(%r5),_TIF_MCCK_PENDING # set it in next
2071: stm %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 1540: stm %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
208 st %r15,__THREAD_ksp(%r2) # store kernel stack of prev 155 st %r15,__THREAD_ksp(%r2) # store kernel stack of prev
209 l %r15,__THREAD_ksp(%r3) # load kernel stack of next 156 l %r15,__THREAD_ksp(%r3) # load kernel stack of next
210 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 157 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
@@ -224,48 +171,55 @@ __critical_start:
224 171
225ENTRY(system_call) 172ENTRY(system_call)
226 stpt __LC_SYNC_ENTER_TIMER 173 stpt __LC_SYNC_ENTER_TIMER
227sysc_saveall: 174sysc_stm:
228 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 175 stm %r8,%r15,__LC_SAVE_AREA_SYNC
229 CREATE_STACK_FRAME __LC_SAVE_AREA 176 l %r12,__LC_THREAD_INFO
230 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct 177 l %r13,__LC_SVC_NEW_PSW+4
231 mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW 178sysc_per:
232 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC 179 l %r15,__LC_KERNEL_STACK
233 oi __TI_flags+3(%r12),_TIF_SYSCALL 180 ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
181 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
234sysc_vtime: 182sysc_vtime:
235 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 183 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
236sysc_stime: 184 stm %r0,%r7,__PT_R0(%r11)
237 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 185 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_SYNC
238sysc_update: 186 mvc __PT_PSW(8,%r11),__LC_SVC_OLD_PSW
239 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 187 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
240sysc_do_svc: 188sysc_do_svc:
241 xr %r7,%r7 189 oi __TI_flags+3(%r12),_TIF_SYSCALL
242 icm %r7,3,SP_SVC_CODE+2(%r15)# load svc number and test for svc 0 190 lh %r8,__PT_INT_CODE+2(%r11)
243 bnz BASED(sysc_nr_ok) # svc number > 0 191 sla %r8,2 # shift and test for svc0
192 jnz sysc_nr_ok
244 # svc 0: system call number in %r1 193 # svc 0: system call number in %r1
245 cl %r1,BASED(.Lnr_syscalls) 194 cl %r1,BASED(.Lnr_syscalls)
246 bnl BASED(sysc_nr_ok) 195 jnl sysc_nr_ok
247 sth %r1,SP_SVC_CODE+2(%r15) 196 sth %r1,__PT_INT_CODE+2(%r11)
248 lr %r7,%r1 # copy svc number to %r7 197 lr %r8,%r1
198 sla %r8,2
249sysc_nr_ok: 199sysc_nr_ok:
250 sll %r7,2 # svc number *4 200 l %r10,BASED(.Lsys_call_table) # 31 bit system call table
251 l %r10,BASED(.Lsysc_table) 201 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
202 st %r2,__PT_ORIG_GPR2(%r11)
203 st %r7,STACK_FRAME_OVERHEAD(%r15)
204 l %r9,0(%r8,%r10) # get system call addr.
252 tm __TI_flags+2(%r12),_TIF_TRACE >> 8 205 tm __TI_flags+2(%r12),_TIF_TRACE >> 8
253 mvc SP_ARGS(4,%r15),SP_R7(%r15) 206 jnz sysc_tracesys
254 l %r8,0(%r7,%r10) # get system call addr. 207 basr %r14,%r9 # call sys_xxxx
255 bnz BASED(sysc_tracesys) 208 st %r2,__PT_R2(%r11) # store return value
256 basr %r14,%r8 # call sys_xxxx
257 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
258 209
259sysc_return: 210sysc_return:
260 LOCKDEP_SYS_EXIT 211 LOCKDEP_SYS_EXIT
261sysc_tif: 212sysc_tif:
262 tm SP_PSW+1(%r15),0x01 # returning to user ? 213 tm __PT_PSW+1(%r11),0x01 # returning to user ?
263 bno BASED(sysc_restore) 214 jno sysc_restore
264 tm __TI_flags+3(%r12),_TIF_WORK_SVC 215 tm __TI_flags+3(%r12),_TIF_WORK_SVC
265 bnz BASED(sysc_work) # there is work to do (signals etc.) 216 jnz sysc_work # check for work
266 ni __TI_flags+3(%r12),255-_TIF_SYSCALL 217 ni __TI_flags+3(%r12),255-_TIF_SYSCALL
267sysc_restore: 218sysc_restore:
268 RESTORE_ALL __LC_RETURN_PSW,1 219 mvc __LC_RETURN_PSW(8),__PT_PSW(%r11)
220 stpt __LC_EXIT_TIMER
221 lm %r0,%r15,__PT_R0(%r11)
222 lpsw __LC_RETURN_PSW
269sysc_done: 223sysc_done:
270 224
271# 225#
@@ -273,16 +227,16 @@ sysc_done:
273# 227#
274sysc_work: 228sysc_work:
275 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING 229 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
276 bo BASED(sysc_mcck_pending) 230 jo sysc_mcck_pending
277 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED 231 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
278 bo BASED(sysc_reschedule) 232 jo sysc_reschedule
279 tm __TI_flags+3(%r12),_TIF_SIGPENDING 233 tm __TI_flags+3(%r12),_TIF_SIGPENDING
280 bo BASED(sysc_sigpending) 234 jo sysc_sigpending
281 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME 235 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
282 bo BASED(sysc_notify_resume) 236 jo sysc_notify_resume
283 tm __TI_flags+3(%r12),_TIF_PER_TRAP 237 tm __TI_flags+3(%r12),_TIF_PER_TRAP
284 bo BASED(sysc_singlestep) 238 jo sysc_singlestep
285 b BASED(sysc_return) # beware of critical section cleanup 239 j sysc_return # beware of critical section cleanup
286 240
287# 241#
288# _TIF_NEED_RESCHED is set, call schedule 242# _TIF_NEED_RESCHED is set, call schedule
@@ -290,13 +244,13 @@ sysc_work:
290sysc_reschedule: 244sysc_reschedule:
291 l %r1,BASED(.Lschedule) 245 l %r1,BASED(.Lschedule)
292 la %r14,BASED(sysc_return) 246 la %r14,BASED(sysc_return)
293 br %r1 # call scheduler 247 br %r1 # call schedule
294 248
295# 249#
296# _TIF_MCCK_PENDING is set, call handler 250# _TIF_MCCK_PENDING is set, call handler
297# 251#
298sysc_mcck_pending: 252sysc_mcck_pending:
299 l %r1,BASED(.Ls390_handle_mcck) 253 l %r1,BASED(.Lhandle_mcck)
300 la %r14,BASED(sysc_return) 254 la %r14,BASED(sysc_return)
301 br %r1 # TIF bit will be cleared by handler 255 br %r1 # TIF bit will be cleared by handler
302 256
@@ -305,23 +259,24 @@ sysc_mcck_pending:
305# 259#
306sysc_sigpending: 260sysc_sigpending:
307 ni __TI_flags+3(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP 261 ni __TI_flags+3(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
308 la %r2,SP_PTREGS(%r15) # load pt_regs 262 lr %r2,%r11 # pass pointer to pt_regs
309 l %r1,BASED(.Ldo_signal) 263 l %r1,BASED(.Ldo_signal)
310 basr %r14,%r1 # call do_signal 264 basr %r14,%r1 # call do_signal
311 tm __TI_flags+3(%r12),_TIF_SYSCALL 265 tm __TI_flags+3(%r12),_TIF_SYSCALL
312 bno BASED(sysc_return) 266 jno sysc_return
313 lm %r2,%r6,SP_R2(%r15) # load svc arguments 267 lm %r2,%r7,__PT_R2(%r11) # load svc arguments
314 xr %r7,%r7 # svc 0 returns -ENOSYS 268 xr %r8,%r8 # svc 0 returns -ENOSYS
315 clc SP_SVC_CODE+2(2,%r15),BASED(.Lnr_syscalls+2) 269 clc __PT_INT_CODE+2(2,%r11),BASED(.Lnr_syscalls+2)
316 bnl BASED(sysc_nr_ok) # invalid svc number -> do svc 0 270 jnl sysc_nr_ok # invalid svc number -> do svc 0
317 icm %r7,3,SP_SVC_CODE+2(%r15)# load new svc number 271 lh %r8,__PT_INT_CODE+2(%r11) # load new svc number
318 b BASED(sysc_nr_ok) # restart svc 272 sla %r8,2
273 j sysc_nr_ok # restart svc
319 274
320# 275#
321# _TIF_NOTIFY_RESUME is set, call do_notify_resume 276# _TIF_NOTIFY_RESUME is set, call do_notify_resume
322# 277#
323sysc_notify_resume: 278sysc_notify_resume:
324 la %r2,SP_PTREGS(%r15) # load pt_regs 279 lr %r2,%r11 # pass pointer to pt_regs
325 l %r1,BASED(.Ldo_notify_resume) 280 l %r1,BASED(.Ldo_notify_resume)
326 la %r14,BASED(sysc_return) 281 la %r14,BASED(sysc_return)
327 br %r1 # call do_notify_resume 282 br %r1 # call do_notify_resume
@@ -331,56 +286,57 @@ sysc_notify_resume:
331# 286#
332sysc_singlestep: 287sysc_singlestep:
333 ni __TI_flags+3(%r12),255-(_TIF_SYSCALL | _TIF_PER_TRAP) 288 ni __TI_flags+3(%r12),255-(_TIF_SYSCALL | _TIF_PER_TRAP)
334 la %r2,SP_PTREGS(%r15) # address of register-save area 289 lr %r2,%r11 # pass pointer to pt_regs
335 l %r1,BASED(.Lhandle_per) # load adr. of per handler 290 l %r1,BASED(.Ldo_per_trap)
336 la %r14,BASED(sysc_return) # load adr. of system return 291 la %r14,BASED(sysc_return)
337 br %r1 # branch to do_per_trap 292 br %r1 # call do_per_trap
338 293
339# 294#
340# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 295# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
341# and after the system call 296# and after the system call
342# 297#
343sysc_tracesys: 298sysc_tracesys:
344 l %r1,BASED(.Ltrace_entry) 299 l %r1,BASED(.Ltrace_enter)
345 la %r2,SP_PTREGS(%r15) # load pt_regs 300 lr %r2,%r11 # pass pointer to pt_regs
346 la %r3,0 301 la %r3,0
347 xr %r0,%r0 302 xr %r0,%r0
348 icm %r0,3,SP_SVC_CODE(%r15) 303 icm %r0,3,__PT_INT_CODE+2(%r11)
349 st %r0,SP_R2(%r15) 304 st %r0,__PT_R2(%r11)
350 basr %r14,%r1 305 basr %r14,%r1 # call do_syscall_trace_enter
351 cl %r2,BASED(.Lnr_syscalls) 306 cl %r2,BASED(.Lnr_syscalls)
352 bnl BASED(sysc_tracenogo) 307 jnl sysc_tracenogo
353 lr %r7,%r2 308 lr %r8,%r2
354 sll %r7,2 # svc number *4 309 sll %r8,2
355 l %r8,0(%r7,%r10) 310 l %r9,0(%r8,%r10)
356sysc_tracego: 311sysc_tracego:
357 lm %r3,%r6,SP_R3(%r15) 312 lm %r3,%r7,__PT_R3(%r11)
358 mvc SP_ARGS(4,%r15),SP_R7(%r15) 313 st %r7,STACK_FRAME_OVERHEAD(%r15)
359 l %r2,SP_ORIG_R2(%r15) 314 l %r2,__PT_ORIG_GPR2(%r11)
360 basr %r14,%r8 # call sys_xxx 315 basr %r14,%r9 # call sys_xxx
361 st %r2,SP_R2(%r15) # store return value 316 st %r2,__PT_R2(%r11) # store return value
362sysc_tracenogo: 317sysc_tracenogo:
363 tm __TI_flags+2(%r12),_TIF_TRACE >> 8 318 tm __TI_flags+2(%r12),_TIF_TRACE >> 8
364 bz BASED(sysc_return) 319 jz sysc_return
365 l %r1,BASED(.Ltrace_exit) 320 l %r1,BASED(.Ltrace_exit)
366 la %r2,SP_PTREGS(%r15) # load pt_regs 321 lr %r2,%r11 # pass pointer to pt_regs
367 la %r14,BASED(sysc_return) 322 la %r14,BASED(sysc_return)
368 br %r1 323 br %r1 # call do_syscall_trace_exit
369 324
370# 325#
371# a new process exits the kernel with ret_from_fork 326# a new process exits the kernel with ret_from_fork
372# 327#
373ENTRY(ret_from_fork) 328ENTRY(ret_from_fork)
329 la %r11,STACK_FRAME_OVERHEAD(%r15)
330 l %r12,__LC_THREAD_INFO
374 l %r13,__LC_SVC_NEW_PSW+4 331 l %r13,__LC_SVC_NEW_PSW+4
375 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct 332 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
376 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 333 jo 0f
377 bo BASED(0f) 334 st %r15,__PT_R15(%r11) # store stack pointer for new kthread
378 st %r15,SP_R15(%r15) # store stack pointer for new kthread 3350: l %r1,BASED(.Lschedule_tail)
3790: l %r1,BASED(.Lschedtail) 336 basr %r14,%r1 # call schedule_tail
380 basr %r14,%r1
381 TRACE_IRQS_ON 337 TRACE_IRQS_ON
382 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 338 ssm __LC_SVC_NEW_PSW # reenable interrupts
383 b BASED(sysc_tracenogo) 339 j sysc_tracenogo
384 340
385# 341#
386# kernel_execve function needs to deal with pt_regs that is not 342# kernel_execve function needs to deal with pt_regs that is not
@@ -390,153 +346,98 @@ ENTRY(kernel_execve)
390 stm %r12,%r15,48(%r15) 346 stm %r12,%r15,48(%r15)
391 lr %r14,%r15 347 lr %r14,%r15
392 l %r13,__LC_SVC_NEW_PSW+4 348 l %r13,__LC_SVC_NEW_PSW+4
393 s %r15,BASED(.Lc_spsize) 349 ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
394 st %r14,__SF_BACKCHAIN(%r15) 350 st %r14,__SF_BACKCHAIN(%r15)
395 la %r12,SP_PTREGS(%r15) 351 la %r12,STACK_FRAME_OVERHEAD(%r15)
396 xc 0(__PT_SIZE,%r12),0(%r12) 352 xc 0(__PT_SIZE,%r12),0(%r12)
397 l %r1,BASED(.Ldo_execve) 353 l %r1,BASED(.Ldo_execve)
398 lr %r5,%r12 354 lr %r5,%r12
399 basr %r14,%r1 355 basr %r14,%r1 # call do_execve
400 ltr %r2,%r2 356 ltr %r2,%r2
401 be BASED(0f) 357 je 0f
402 a %r15,BASED(.Lc_spsize) 358 ahi %r15,(STACK_FRAME_OVERHEAD + __PT_SIZE)
403 lm %r12,%r15,48(%r15) 359 lm %r12,%r15,48(%r15)
404 br %r14 360 br %r14
405 # execve succeeded. 361 # execve succeeded.
4060: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 3620: ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
407 l %r15,__LC_KERNEL_STACK # load ksp 363 l %r15,__LC_KERNEL_STACK # load ksp
408 s %r15,BASED(.Lc_spsize) # make room for registers & psw 364 ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
409 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 365 la %r11,STACK_FRAME_OVERHEAD(%r15)
366 mvc 0(__PT_SIZE,%r11),0(%r12) # copy pt_regs
410 l %r12,__LC_THREAD_INFO 367 l %r12,__LC_THREAD_INFO
411 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) 368 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
412 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 369 ssm __LC_SVC_NEW_PSW # reenable interrupts
413 l %r1,BASED(.Lexecve_tail) 370 l %r1,BASED(.Lexecve_tail)
414 basr %r14,%r1 371 basr %r14,%r1 # call execve_tail
415 b BASED(sysc_return) 372 j sysc_return
416 373
417/* 374/*
418 * Program check handler routine 375 * Program check handler routine
419 */ 376 */
420 377
421ENTRY(pgm_check_handler) 378ENTRY(pgm_check_handler)
422/*
423 * First we need to check for a special case:
424 * Single stepping an instruction that disables the PER event mask will
425 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
426 * For a single stepped SVC the program check handler gets control after
427 * the SVC new PSW has been loaded. But we want to execute the SVC first and
428 * then handle the PER event. Therefore we update the SVC old PSW to point
429 * to the pgm_check_handler and branch to the SVC handler after we checked
430 * if we have to load the kernel stack register.
431 * For every other possible cause for PER event without the PER mask set
432 * we just ignore the PER event (FIXME: is there anything we have to do
433 * for LPSW?).
434 */
435 stpt __LC_SYNC_ENTER_TIMER 379 stpt __LC_SYNC_ENTER_TIMER
436 SAVE_ALL_BASE __LC_SAVE_AREA 380 stm %r8,%r15,__LC_SAVE_AREA_SYNC
437 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 381 l %r12,__LC_THREAD_INFO
438 bnz BASED(pgm_per) # got per exception -> special case 382 l %r13,__LC_SVC_NEW_PSW+4
439 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA 383 lm %r8,%r9,__LC_PGM_OLD_PSW
440 CREATE_STACK_FRAME __LC_SAVE_AREA 384 tmh %r8,0x0001 # test problem state bit
441 mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW 385 jnz 1f # -> fault in user space
442 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct 386 tmh %r8,0x4000 # PER bit set in old PSW ?
443 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 387 jnz 0f # -> enabled, can't be a double fault
444 bz BASED(pgm_no_vtime) 388 tm __LC_PGM_ILC+3,0x80 # check for per exception
445 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 389 jnz pgm_svcper # -> single stepped svc
446 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 3900: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
447 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 391 j 2f
448pgm_no_vtime: 3921: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
449 l %r3,__LC_PGM_ILC # load program interruption code 393 l %r15,__LC_KERNEL_STACK
450 l %r4,__LC_TRANS_EXC_CODE 3942: ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
451 REENABLE_IRQS 395 la %r11,STACK_FRAME_OVERHEAD(%r15)
452 la %r8,0x7f 396 stm %r0,%r7,__PT_R0(%r11)
453 nr %r8,%r3 397 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_SYNC
454 sll %r8,2 398 stm %r8,%r9,__PT_PSW(%r11)
455 l %r1,BASED(.Ljump_table) 399 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
456 l %r1,0(%r8,%r1) # load address of handler routine 400 mvc __PT_INT_PARM_LONG(4,%r11),__LC_TRANS_EXC_CODE
457 la %r2,SP_PTREGS(%r15) # address of register-save area 401 tm __LC_PGM_ILC+3,0x80 # check for per exception
458 basr %r14,%r1 # branch to interrupt-handler 402 jz 0f
459pgm_exit:
460 b BASED(sysc_return)
461
462#
463# handle per exception
464#
465pgm_per:
466 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
467 bnz BASED(pgm_per_std) # ok, normal per event from user space
468# ok its one of the special cases, now we need to find out which one
469 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
470 be BASED(pgm_svcper)
471# no interesting special case, ignore PER event
472 lm %r12,%r15,__LC_SAVE_AREA
473 lpsw 0x28
474
475#
476# Normal per exception
477#
478pgm_per_std:
479 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
480 CREATE_STACK_FRAME __LC_SAVE_AREA
481 mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW
482 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
483 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
484 bz BASED(pgm_no_vtime2)
485 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
486 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
487 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
488pgm_no_vtime2:
489 l %r1,__TI_task(%r12) 403 l %r1,__TI_task(%r12)
490 tm SP_PSW+1(%r15),0x01 # kernel per event ? 404 tmh %r8,0x0001 # kernel per event ?
491 bz BASED(kernel_per) 405 jz pgm_kprobe
492 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE 406 oi __TI_flags+3(%r12),_TIF_PER_TRAP
493 mvc __THREAD_per_address(4,%r1),__LC_PER_ADDRESS 407 mvc __THREAD_per_address(4,%r1),__LC_PER_ADDRESS
408 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
494 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID 409 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
495 oi __TI_flags+3(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP 4100: REENABLE_IRQS
496 l %r3,__LC_PGM_ILC # load program interruption code 411 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
497 l %r4,__LC_TRANS_EXC_CODE
498 REENABLE_IRQS
499 la %r8,0x7f
500 nr %r8,%r3 # clear per-event-bit and ilc
501 be BASED(pgm_exit2) # only per or per+check ?
502 sll %r8,2
503 l %r1,BASED(.Ljump_table) 412 l %r1,BASED(.Ljump_table)
504 l %r1,0(%r8,%r1) # load address of handler routine 413 la %r10,0x7f
505 la %r2,SP_PTREGS(%r15) # address of register-save area 414 n %r10,__PT_INT_CODE(%r11)
415 je sysc_return
416 sll %r10,2
417 l %r1,0(%r10,%r1) # load address of handler routine
418 lr %r2,%r11 # pass pointer to pt_regs
506 basr %r14,%r1 # branch to interrupt-handler 419 basr %r14,%r1 # branch to interrupt-handler
507pgm_exit2: 420 j sysc_return
508 b BASED(sysc_return)
509 421
510# 422#
511# it was a single stepped SVC that is causing all the trouble 423# PER event in supervisor state, must be kprobes
512# 424#
513pgm_svcper: 425pgm_kprobe:
514 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA 426 REENABLE_IRQS
515 CREATE_STACK_FRAME __LC_SAVE_AREA 427 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
516 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct 428 l %r1,BASED(.Ldo_per_trap)
517 mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW 429 lr %r2,%r11 # pass pointer to pt_regs
518 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC 430 basr %r14,%r1 # call do_per_trap
519 oi __TI_flags+3(%r12),(_TIF_SYSCALL | _TIF_PER_TRAP) 431 j sysc_return
520 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
521 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
522 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
523 l %r8,__TI_task(%r12)
524 mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE
525 mvc __THREAD_per_address(4,%r8),__LC_PER_ADDRESS
526 mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID
527 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
528 lm %r2,%r6,SP_R2(%r15) # load svc arguments
529 b BASED(sysc_do_svc)
530 432
531# 433#
532# per was called from kernel, must be kprobes 434# single stepped system call
533# 435#
534kernel_per: 436pgm_svcper:
535 REENABLE_IRQS 437 oi __TI_flags+3(%r12),_TIF_PER_TRAP
536 la %r2,SP_PTREGS(%r15) # address of register-save area 438 mvc __LC_RETURN_PSW(4),__LC_SVC_NEW_PSW
537 l %r1,BASED(.Lhandle_per) # load adr. of per handler 439 mvc __LC_RETURN_PSW+4(4),BASED(.Lsysc_per)
538 basr %r14,%r1 # branch to do_single_step 440 lpsw __LC_RETURN_PSW # branch to sysc_per and enable irqs
539 b BASED(pgm_exit)
540 441
541/* 442/*
542 * IO interrupt handler routine 443 * IO interrupt handler routine
@@ -545,28 +446,35 @@ kernel_per:
545ENTRY(io_int_handler) 446ENTRY(io_int_handler)
546 stck __LC_INT_CLOCK 447 stck __LC_INT_CLOCK
547 stpt __LC_ASYNC_ENTER_TIMER 448 stpt __LC_ASYNC_ENTER_TIMER
548 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 449 stm %r8,%r15,__LC_SAVE_AREA_ASYNC
549 CREATE_STACK_FRAME __LC_SAVE_AREA+16 450 l %r12,__LC_THREAD_INFO
550 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 451 l %r13,__LC_SVC_NEW_PSW+4
551 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct 452 lm %r8,%r9,__LC_IO_OLD_PSW
552 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 453 tmh %r8,0x0001 # interrupting from user ?
553 bz BASED(io_no_vtime) 454 jz io_skip
554 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 455 UPDATE_VTIME %r14,%r15,__LC_ASYNC_ENTER_TIMER
555 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 456io_skip:
556 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 457 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT
557io_no_vtime: 458 stm %r0,%r7,__PT_R0(%r11)
459 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_ASYNC
460 stm %r8,%r9,__PT_PSW(%r11)
558 TRACE_IRQS_OFF 461 TRACE_IRQS_OFF
559 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 462 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
560 la %r2,SP_PTREGS(%r15) # address of register-save area 463 l %r1,BASED(.Ldo_IRQ)
561 basr %r14,%r1 # branch to standard irq handler 464 lr %r2,%r11 # pass pointer to pt_regs
465 basr %r14,%r1 # call do_IRQ
562io_return: 466io_return:
563 LOCKDEP_SYS_EXIT 467 LOCKDEP_SYS_EXIT
564 TRACE_IRQS_ON 468 TRACE_IRQS_ON
565io_tif: 469io_tif:
566 tm __TI_flags+3(%r12),_TIF_WORK_INT 470 tm __TI_flags+3(%r12),_TIF_WORK_INT
567 bnz BASED(io_work) # there is work to do (signals etc.) 471 jnz io_work # there is work to do (signals etc.)
568io_restore: 472io_restore:
569 RESTORE_ALL __LC_RETURN_PSW,0 473 mvc __LC_RETURN_PSW(8),__PT_PSW(%r11)
474 ni __LC_RETURN_PSW+1,0xfd # clean wait state bit
475 stpt __LC_EXIT_TIMER
476 lm %r0,%r15,__PT_R0(%r11)
477 lpsw __LC_RETURN_PSW
570io_done: 478io_done:
571 479
572# 480#
@@ -577,28 +485,29 @@ io_done:
577# Before any work can be done, a switch to the kernel stack is required. 485# Before any work can be done, a switch to the kernel stack is required.
578# 486#
579io_work: 487io_work:
580 tm SP_PSW+1(%r15),0x01 # returning to user ? 488 tm __PT_PSW+1(%r11),0x01 # returning to user ?
581 bo BASED(io_work_user) # yes -> do resched & signal 489 jo io_work_user # yes -> do resched & signal
582#ifdef CONFIG_PREEMPT 490#ifdef CONFIG_PREEMPT
583 # check for preemptive scheduling 491 # check for preemptive scheduling
584 icm %r0,15,__TI_precount(%r12) 492 icm %r0,15,__TI_precount(%r12)
585 bnz BASED(io_restore) # preemption disabled 493 jnz io_restore # preemption disabled
586 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED 494 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
587 bno BASED(io_restore) 495 jno io_restore
588 # switch to kernel stack 496 # switch to kernel stack
589 l %r1,SP_R15(%r15) 497 l %r1,__PT_R15(%r11)
590 s %r1,BASED(.Lc_spsize) 498 ahi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
591 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 499 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
592 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 500 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1)
501 la %r11,STACK_FRAME_OVERHEAD(%r1)
593 lr %r15,%r1 502 lr %r15,%r1
594 # TRACE_IRQS_ON already done at io_return, call 503 # TRACE_IRQS_ON already done at io_return, call
595 # TRACE_IRQS_OFF to keep things symmetrical 504 # TRACE_IRQS_OFF to keep things symmetrical
596 TRACE_IRQS_OFF 505 TRACE_IRQS_OFF
597 l %r1,BASED(.Lpreempt_schedule_irq) 506 l %r1,BASED(.Lpreempt_irq)
598 basr %r14,%r1 # call preempt_schedule_irq 507 basr %r14,%r1 # call preempt_schedule_irq
599 b BASED(io_return) 508 j io_return
600#else 509#else
601 b BASED(io_restore) 510 j io_restore
602#endif 511#endif
603 512
604# 513#
@@ -606,9 +515,10 @@ io_work:
606# 515#
607io_work_user: 516io_work_user:
608 l %r1,__LC_KERNEL_STACK 517 l %r1,__LC_KERNEL_STACK
609 s %r1,BASED(.Lc_spsize) 518 ahi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
610 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 519 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
611 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 520 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1)
521 la %r11,STACK_FRAME_OVERHEAD(%r1)
612 lr %r15,%r1 522 lr %r15,%r1
613 523
614# 524#
@@ -618,24 +528,24 @@ io_work_user:
618# 528#
619io_work_tif: 529io_work_tif:
620 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING 530 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
621 bo BASED(io_mcck_pending) 531 jo io_mcck_pending
622 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED 532 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
623 bo BASED(io_reschedule) 533 jo io_reschedule
624 tm __TI_flags+3(%r12),_TIF_SIGPENDING 534 tm __TI_flags+3(%r12),_TIF_SIGPENDING
625 bo BASED(io_sigpending) 535 jo io_sigpending
626 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME 536 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
627 bo BASED(io_notify_resume) 537 jo io_notify_resume
628 b BASED(io_return) # beware of critical section cleanup 538 j io_return # beware of critical section cleanup
629 539
630# 540#
631# _TIF_MCCK_PENDING is set, call handler 541# _TIF_MCCK_PENDING is set, call handler
632# 542#
633io_mcck_pending: 543io_mcck_pending:
634 # TRACE_IRQS_ON already done at io_return 544 # TRACE_IRQS_ON already done at io_return
635 l %r1,BASED(.Ls390_handle_mcck) 545 l %r1,BASED(.Lhandle_mcck)
636 basr %r14,%r1 # TIF bit will be cleared by handler 546 basr %r14,%r1 # TIF bit will be cleared by handler
637 TRACE_IRQS_OFF 547 TRACE_IRQS_OFF
638 b BASED(io_return) 548 j io_return
639 549
640# 550#
641# _TIF_NEED_RESCHED is set, call schedule 551# _TIF_NEED_RESCHED is set, call schedule
@@ -643,37 +553,37 @@ io_mcck_pending:
643io_reschedule: 553io_reschedule:
644 # TRACE_IRQS_ON already done at io_return 554 # TRACE_IRQS_ON already done at io_return
645 l %r1,BASED(.Lschedule) 555 l %r1,BASED(.Lschedule)
646 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 556 ssm __LC_SVC_NEW_PSW # reenable interrupts
647 basr %r14,%r1 # call scheduler 557 basr %r14,%r1 # call scheduler
648 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 558 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
649 TRACE_IRQS_OFF 559 TRACE_IRQS_OFF
650 b BASED(io_return) 560 j io_return
651 561
652# 562#
653# _TIF_SIGPENDING is set, call do_signal 563# _TIF_SIGPENDING is set, call do_signal
654# 564#
655io_sigpending: 565io_sigpending:
656 # TRACE_IRQS_ON already done at io_return 566 # TRACE_IRQS_ON already done at io_return
657 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
658 la %r2,SP_PTREGS(%r15) # load pt_regs
659 l %r1,BASED(.Ldo_signal) 567 l %r1,BASED(.Ldo_signal)
568 ssm __LC_SVC_NEW_PSW # reenable interrupts
569 lr %r2,%r11 # pass pointer to pt_regs
660 basr %r14,%r1 # call do_signal 570 basr %r14,%r1 # call do_signal
661 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 571 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
662 TRACE_IRQS_OFF 572 TRACE_IRQS_OFF
663 b BASED(io_return) 573 j io_return
664 574
665# 575#
666# _TIF_SIGPENDING is set, call do_signal 576# _TIF_SIGPENDING is set, call do_signal
667# 577#
668io_notify_resume: 578io_notify_resume:
669 # TRACE_IRQS_ON already done at io_return 579 # TRACE_IRQS_ON already done at io_return
670 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
671 la %r2,SP_PTREGS(%r15) # load pt_regs
672 l %r1,BASED(.Ldo_notify_resume) 580 l %r1,BASED(.Ldo_notify_resume)
673 basr %r14,%r1 # call do_signal 581 ssm __LC_SVC_NEW_PSW # reenable interrupts
674 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 582 lr %r2,%r11 # pass pointer to pt_regs
583 basr %r14,%r1 # call do_notify_resume
584 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
675 TRACE_IRQS_OFF 585 TRACE_IRQS_OFF
676 b BASED(io_return) 586 j io_return
677 587
678/* 588/*
679 * External interrupt handler routine 589 * External interrupt handler routine
@@ -682,23 +592,25 @@ io_notify_resume:
682ENTRY(ext_int_handler) 592ENTRY(ext_int_handler)
683 stck __LC_INT_CLOCK 593 stck __LC_INT_CLOCK
684 stpt __LC_ASYNC_ENTER_TIMER 594 stpt __LC_ASYNC_ENTER_TIMER
685 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 595 stm %r8,%r15,__LC_SAVE_AREA_ASYNC
686 CREATE_STACK_FRAME __LC_SAVE_AREA+16 596 l %r12,__LC_THREAD_INFO
687 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 597 l %r13,__LC_SVC_NEW_PSW+4
688 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct 598 lm %r8,%r9,__LC_EXT_OLD_PSW
689 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 599 tmh %r8,0x0001 # interrupting from user ?
690 bz BASED(ext_no_vtime) 600 jz ext_skip
691 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 601 UPDATE_VTIME %r14,%r15,__LC_ASYNC_ENTER_TIMER
692 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 602ext_skip:
693 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 603 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT
694ext_no_vtime: 604 stm %r0,%r7,__PT_R0(%r11)
605 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_ASYNC
606 stm %r8,%r9,__PT_PSW(%r11)
695 TRACE_IRQS_OFF 607 TRACE_IRQS_OFF
696 la %r2,SP_PTREGS(%r15) # address of register-save area 608 lr %r2,%r11 # pass pointer to pt_regs
697 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code 609 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
698 l %r4,__LC_EXT_PARAMS # get external parameters 610 l %r4,__LC_EXT_PARAMS # get external parameters
699 l %r1,BASED(.Ldo_extint) 611 l %r1,BASED(.Ldo_extint)
700 basr %r14,%r1 612 basr %r14,%r1 # call do_extint
701 b BASED(io_return) 613 j io_return
702 614
703__critical_end: 615__critical_end:
704 616
@@ -710,82 +622,74 @@ ENTRY(mcck_int_handler)
710 stck __LC_MCCK_CLOCK 622 stck __LC_MCCK_CLOCK
711 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer 623 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
712 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs 624 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
713 SAVE_ALL_BASE __LC_SAVE_AREA+32 625 l %r12,__LC_THREAD_INFO
714 la %r12,__LC_MCK_OLD_PSW 626 l %r13,__LC_SVC_NEW_PSW+4
627 lm %r8,%r9,__LC_MCK_OLD_PSW
715 tm __LC_MCCK_CODE,0x80 # system damage? 628 tm __LC_MCCK_CODE,0x80 # system damage?
716 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid 629 jo mcck_panic # yes -> rest of mcck code invalid
717 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA 630 la %r14,__LC_CPU_TIMER_SAVE_AREA
631 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
718 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 632 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
719 bo BASED(1f) 633 jo 3f
720 la %r14,__LC_SYNC_ENTER_TIMER 634 la %r14,__LC_SYNC_ENTER_TIMER
721 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 635 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
722 bl BASED(0f) 636 jl 0f
723 la %r14,__LC_ASYNC_ENTER_TIMER 637 la %r14,__LC_ASYNC_ENTER_TIMER
7240: clc 0(8,%r14),__LC_EXIT_TIMER 6380: clc 0(8,%r14),__LC_EXIT_TIMER
725 bl BASED(0f) 639 jl 1f
726 la %r14,__LC_EXIT_TIMER 640 la %r14,__LC_EXIT_TIMER
7270: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 6411: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
728 bl BASED(0f) 642 jl 2f
729 la %r14,__LC_LAST_UPDATE_TIMER 643 la %r14,__LC_LAST_UPDATE_TIMER
7300: spt 0(%r14) 6442: spt 0(%r14)
731 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 645 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
7321: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 6463: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
733 bno BASED(mcck_int_main) # no -> skip cleanup critical 647 jno mcck_panic # no -> skip cleanup critical
734 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 648 tm %r8,0x0001 # interrupting from user ?
735 bnz BASED(mcck_int_main) # from user -> load async stack 649 jz mcck_skip
736 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) 650 UPDATE_VTIME %r14,%r15,__LC_MCCK_ENTER_TIMER
737 bhe BASED(mcck_int_main) 651mcck_skip:
738 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) 652 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+32,__LC_PANIC_STACK,PAGE_SHIFT
739 bl BASED(mcck_int_main) 653 mvc __PT_R0(64,%r11),__LC_GPREGS_SAVE_AREA
740 l %r14,BASED(.Lcleanup_critical) 654 stm %r8,%r9,__PT_PSW(%r11)
741 basr %r14,%r14 655 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
742mcck_int_main: 656 l %r1,BASED(.Ldo_machine_check)
743 l %r14,__LC_PANIC_STACK # are we already on the panic stack? 657 lr %r2,%r11 # pass pointer to pt_regs
744 slr %r14,%r15 658 basr %r14,%r1 # call s390_do_machine_check
745 sra %r14,PAGE_SHIFT 659 tm __PT_PSW+1(%r11),0x01 # returning to user ?
746 be BASED(0f) 660 jno mcck_return
747 l %r15,__LC_PANIC_STACK # load panic stack
7480: s %r15,BASED(.Lc_spsize) # make room for registers & psw
749 CREATE_STACK_FRAME __LC_SAVE_AREA+32
750 mvc SP_PSW(8,%r15),0(%r12)
751 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
752 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
753 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
754 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
755 bz BASED(mcck_no_vtime)
756 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
757 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
758 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
759mcck_no_vtime:
760 la %r2,SP_PTREGS(%r15) # load pt_regs
761 l %r1,BASED(.Ls390_mcck)
762 basr %r14,%r1 # call machine check handler
763 tm SP_PSW+1(%r15),0x01 # returning to user ?
764 bno BASED(mcck_return)
765 l %r1,__LC_KERNEL_STACK # switch to kernel stack 661 l %r1,__LC_KERNEL_STACK # switch to kernel stack
766 s %r1,BASED(.Lc_spsize) 662 ahi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
767 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 663 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
768 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 664 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1)
665 la %r11,STACK_FRAME_OVERHEAD(%r15)
769 lr %r15,%r1 666 lr %r15,%r1
770 stosm __SF_EMPTY(%r15),0x04 # turn dat on 667 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
771 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING 668 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
772 bno BASED(mcck_return) 669 jno mcck_return
773 TRACE_IRQS_OFF 670 TRACE_IRQS_OFF
774 l %r1,BASED(.Ls390_handle_mcck) 671 l %r1,BASED(.Lhandle_mcck)
775 basr %r14,%r1 # call machine check handler 672 basr %r14,%r1 # call s390_handle_mcck
776 TRACE_IRQS_ON 673 TRACE_IRQS_ON
777mcck_return: 674mcck_return:
778 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 675 mvc __LC_RETURN_MCCK_PSW(8),__PT_PSW(%r11) # move return PSW
779 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 676 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
780 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 677 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
781 bno BASED(0f) 678 jno 0f
782 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 679 lm %r0,%r15,__PT_R0(%r11)
783 stpt __LC_EXIT_TIMER 680 stpt __LC_EXIT_TIMER
784 lpsw __LC_RETURN_MCCK_PSW # back to caller 681 lpsw __LC_RETURN_MCCK_PSW
7850: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 6820: lm %r0,%r15,__PT_R0(%r11)
786 lpsw __LC_RETURN_MCCK_PSW # back to caller 683 lpsw __LC_RETURN_MCCK_PSW
787 684
788 RESTORE_ALL __LC_RETURN_MCCK_PSW,0 685mcck_panic:
686 l %r14,__LC_PANIC_STACK
687 slr %r14,%r15
688 sra %r14,PAGE_SHIFT
689 jz 0f
690 l %r15,__LC_PANIC_STACK
6910: ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
692 j mcck_skip
789 693
790/* 694/*
791 * Restart interruption handler, kick starter for additional CPUs 695 * Restart interruption handler, kick starter for additional CPUs
@@ -799,18 +703,18 @@ restart_base:
799 stck __LC_LAST_UPDATE_CLOCK 703 stck __LC_LAST_UPDATE_CLOCK
800 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) 704 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
801 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) 705 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
802 l %r15,__LC_SAVE_AREA+60 # load ksp 706 l %r15,__LC_GPREGS_SAVE_AREA+60 # load ksp
803 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs 707 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
804 lam %a0,%a15,__LC_AREGS_SAVE_AREA 708 lam %a0,%a15,__LC_AREGS_SAVE_AREA
805 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone 709 lm %r6,%r15,__SF_GPRS(%r15)# load registers from clone
806 l %r1,__LC_THREAD_INFO 710 l %r1,__LC_THREAD_INFO
807 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) 711 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
808 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) 712 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
809 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER 713 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
810 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 714 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
811 basr %r14,0 715 basr %r14,0
812 l %r14,restart_addr-.(%r14) 716 l %r14,restart_addr-.(%r14)
813 basr %r14,%r14 # branch to start_secondary 717 basr %r14,%r14 # call start_secondary
814restart_addr: 718restart_addr:
815 .long start_secondary 719 .long start_secondary
816 .align 8 720 .align 8
@@ -835,19 +739,19 @@ restart_go:
835# PSW restart interrupt handler 739# PSW restart interrupt handler
836# 740#
837ENTRY(psw_restart_int_handler) 741ENTRY(psw_restart_int_handler)
838 st %r15,__LC_SAVE_AREA+48(%r0) # save r15 742 st %r15,__LC_SAVE_AREA_RESTART
839 basr %r15,0 743 basr %r15,0
8400: l %r15,.Lrestart_stack-0b(%r15) # load restart stack 7440: l %r15,.Lrestart_stack-0b(%r15) # load restart stack
841 l %r15,0(%r15) 745 l %r15,0(%r15)
842 ahi %r15,-SP_SIZE # make room for pt_regs 746 ahi %r15,-__PT_SIZE # create pt_regs on stack
843 stm %r0,%r14,SP_R0(%r15) # store gprs %r0-%r14 to stack 747 stm %r0,%r14,__PT_R0(%r15)
844 mvc SP_R15(4,%r15),__LC_SAVE_AREA+48(%r0)# store saved %r15 to stack 748 mvc __PT_R15(4,%r15),__LC_SAVE_AREA_RESTART
845 mvc SP_PSW(8,%r15),__LC_RST_OLD_PSW(%r0) # store restart old psw 749 mvc __PT_PSW(8,%r15),__LC_RST_OLD_PSW # store restart old psw
846 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0 750 ahi %r15,-STACK_FRAME_OVERHEAD
751 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
847 basr %r14,0 752 basr %r14,0
8481: l %r14,.Ldo_restart-1b(%r14) 7531: l %r14,.Ldo_restart-1b(%r14)
849 basr %r14,%r14 754 basr %r14,%r14
850
851 basr %r14,0 # load disabled wait PSW if 755 basr %r14,0 # load disabled wait PSW if
8522: lpsw restart_psw_crash-2b(%r14) # do_restart returns 7562: lpsw restart_psw_crash-2b(%r14) # do_restart returns
853 .align 4 757 .align 4
@@ -869,215 +773,174 @@ restart_psw_crash:
869 */ 773 */
870stack_overflow: 774stack_overflow:
871 l %r15,__LC_PANIC_STACK # change to panic stack 775 l %r15,__LC_PANIC_STACK # change to panic stack
872 sl %r15,BASED(.Lc_spsize) 776 ahi %r15,-__PT_SIZE # create pt_regs
873 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 777 stm %r0,%r7,__PT_R0(%r15)
874 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 778 stm %r8,%r9,__PT_PSW(%r15)
875 la %r1,__LC_SAVE_AREA 779 mvc __PT_R8(32,%r11),0(%r14)
876 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? 780 lr %r15,%r11
877 be BASED(0f) 781 ahi %r15,-STACK_FRAME_OVERHEAD
878 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? 782 l %r1,BASED(1f)
879 be BASED(0f) 783 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
880 la %r1,__LC_SAVE_AREA+16 784 lr %r2,%r11 # pass pointer to pt_regs
8810: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack 785 br %r1 # branch to kernel_stack_overflow
882 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
883 l %r1,BASED(1f) # branch to kernel_stack_overflow
884 la %r2,SP_PTREGS(%r15) # load pt_regs
885 br %r1
8861: .long kernel_stack_overflow 7861: .long kernel_stack_overflow
887#endif 787#endif
888 788
889cleanup_table_system_call: 789cleanup_table:
890 .long system_call + 0x80000000, sysc_do_svc + 0x80000000 790 .long system_call + 0x80000000
891cleanup_table_sysc_tif: 791 .long sysc_do_svc + 0x80000000
892 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000 792 .long sysc_tif + 0x80000000
893cleanup_table_sysc_restore: 793 .long sysc_restore + 0x80000000
894 .long sysc_restore + 0x80000000, sysc_done + 0x80000000 794 .long sysc_done + 0x80000000
895cleanup_table_io_tif: 795 .long io_tif + 0x80000000
896 .long io_tif + 0x80000000, io_restore + 0x80000000 796 .long io_restore + 0x80000000
897cleanup_table_io_restore: 797 .long io_done + 0x80000000
898 .long io_restore + 0x80000000, io_done + 0x80000000
899 798
900cleanup_critical: 799cleanup_critical:
901 clc 4(4,%r12),BASED(cleanup_table_system_call) 800 cl %r9,BASED(cleanup_table) # system_call
902 bl BASED(0f) 801 jl 0f
903 clc 4(4,%r12),BASED(cleanup_table_system_call+4) 802 cl %r9,BASED(cleanup_table+4) # sysc_do_svc
904 bl BASED(cleanup_system_call) 803 jl cleanup_system_call
9050: 804 cl %r9,BASED(cleanup_table+8) # sysc_tif
906 clc 4(4,%r12),BASED(cleanup_table_sysc_tif) 805 jl 0f
907 bl BASED(0f) 806 cl %r9,BASED(cleanup_table+12) # sysc_restore
908 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4) 807 jl cleanup_sysc_tif
909 bl BASED(cleanup_sysc_tif) 808 cl %r9,BASED(cleanup_table+16) # sysc_done
9100: 809 jl cleanup_sysc_restore
911 clc 4(4,%r12),BASED(cleanup_table_sysc_restore) 810 cl %r9,BASED(cleanup_table+20) # io_tif
912 bl BASED(0f) 811 jl 0f
913 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4) 812 cl %r9,BASED(cleanup_table+24) # io_restore
914 bl BASED(cleanup_sysc_restore) 813 jl cleanup_io_tif
9150: 814 cl %r9,BASED(cleanup_table+28) # io_done
916 clc 4(4,%r12),BASED(cleanup_table_io_tif) 815 jl cleanup_io_restore
917 bl BASED(0f) 8160: br %r14
918 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
919 bl BASED(cleanup_io_tif)
9200:
921 clc 4(4,%r12),BASED(cleanup_table_io_restore)
922 bl BASED(0f)
923 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
924 bl BASED(cleanup_io_restore)
9250:
926 br %r14
927 817
928cleanup_system_call: 818cleanup_system_call:
929 mvc __LC_RETURN_PSW(8),0(%r12) 819 # check if stpt has been executed
930 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 820 cl %r9,BASED(cleanup_system_call_insn)
931 bh BASED(0f) 821 jh 0f
932 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
933 c %r12,BASED(.Lmck_old_psw)
934 be BASED(0f)
935 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 822 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9360: c %r12,BASED(.Lmck_old_psw) 823 chi %r11,__LC_SAVE_AREA_ASYNC
937 la %r12,__LC_SAVE_AREA+32 824 je 0f
938 be BASED(0f) 825 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
939 la %r12,__LC_SAVE_AREA+16 8260: # check if stm has been executed
9400: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) 827 cl %r9,BASED(cleanup_system_call_insn+4)
941 bhe BASED(cleanup_vtime) 828 jh 0f
942 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 829 mvc __LC_SAVE_AREA_SYNC(32),0(%r11)
943 bh BASED(0f) 8300: # set up saved registers r12, and r13
944 mvc __LC_SAVE_AREA(16),0(%r12) 831 st %r12,16(%r11) # r12 thread-info pointer
9450: st %r13,4(%r12) 832 st %r13,20(%r11) # r13 literal-pool pointer
946 l %r15,__LC_KERNEL_STACK # problem state -> load ksp 833 # check if the user time calculation has been done
947 s %r15,BASED(.Lc_spsize) # make room for registers & psw 834 cl %r9,BASED(cleanup_system_call_insn+8)
948 st %r15,12(%r12) 835 jh 0f
949 CREATE_STACK_FRAME __LC_SAVE_AREA 836 l %r10,__LC_EXIT_TIMER
950 mvc 0(4,%r12),__LC_THREAD_INFO 837 l %r15,__LC_EXIT_TIMER+4
951 l %r12,__LC_THREAD_INFO 838 SUB64 %r10,%r15,__LC_SYNC_ENTER_TIMER
952 mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW 839 ADD64 %r10,%r15,__LC_USER_TIMER
953 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC 840 st %r10,__LC_USER_TIMER
954 oi __TI_flags+3(%r12),_TIF_SYSCALL 841 st %r15,__LC_USER_TIMER+4
955cleanup_vtime: 8420: # check if the system time calculation has been done
956 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) 843 cl %r9,BASED(cleanup_system_call_insn+12)
957 bhe BASED(cleanup_stime) 844 jh 0f
958 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 845 l %r10,__LC_LAST_UPDATE_TIMER
959cleanup_stime: 846 l %r15,__LC_LAST_UPDATE_TIMER+4
960 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) 847 SUB64 %r10,%r15,__LC_EXIT_TIMER
961 bh BASED(cleanup_update) 848 ADD64 %r10,%r15,__LC_SYSTEM_TIMER
962 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 849 st %r10,__LC_SYSTEM_TIMER
963cleanup_update: 850 st %r15,__LC_SYSTEM_TIMER+4
8510: # update accounting time stamp
964 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 852 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
965 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) 853 # set up saved register 11
966 la %r12,__LC_RETURN_PSW 854 l %r15,__LC_KERNEL_STACK
855 ahi %r15,-__PT_SIZE
856 st %r15,12(%r11) # r11 pt_regs pointer
857 # fill pt_regs
858 mvc __PT_R8(32,%r15),__LC_SAVE_AREA_SYNC
859 stm %r0,%r7,__PT_R0(%r15)
860 mvc __PT_PSW(8,%r15),__LC_SVC_OLD_PSW
861 mvc __PT_INT_CODE(4,%r15),__LC_SVC_ILC
862 # setup saved register 15
863 ahi %r15,-STACK_FRAME_OVERHEAD
864 st %r15,28(%r11) # r15 stack pointer
865 # set new psw address and exit
866 l %r9,BASED(cleanup_table+4) # sysc_do_svc + 0x80000000
967 br %r14 867 br %r14
968cleanup_system_call_insn: 868cleanup_system_call_insn:
969 .long sysc_saveall + 0x80000000
970 .long system_call + 0x80000000 869 .long system_call + 0x80000000
971 .long sysc_vtime + 0x80000000 870 .long sysc_stm + 0x80000000
972 .long sysc_stime + 0x80000000 871 .long sysc_vtime + 0x80000000 + 36
973 .long sysc_update + 0x80000000 872 .long sysc_vtime + 0x80000000 + 76
974 873
975cleanup_sysc_tif: 874cleanup_sysc_tif:
976 mvc __LC_RETURN_PSW(4),0(%r12) 875 l %r9,BASED(cleanup_table+8) # sysc_tif + 0x80000000
977 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
978 la %r12,__LC_RETURN_PSW
979 br %r14 876 br %r14
980 877
981cleanup_sysc_restore: 878cleanup_sysc_restore:
982 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn) 879 cl %r9,BASED(cleanup_sysc_restore_insn)
983 be BASED(2f) 880 jhe 0f
984 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 881 l %r9,12(%r11) # get saved pointer to pt_regs
985 c %r12,BASED(.Lmck_old_psw) 882 mvc __LC_RETURN_PSW(8),__PT_PSW(%r9)
986 be BASED(0f) 883 mvc 0(32,%r11),__PT_R8(%r9)
987 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 884 lm %r0,%r7,__PT_R0(%r9)
9880: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4) 8850: lm %r8,%r9,__LC_RETURN_PSW
989 be BASED(2f)
990 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
991 c %r12,BASED(.Lmck_old_psw)
992 la %r12,__LC_SAVE_AREA+32
993 be BASED(1f)
994 la %r12,__LC_SAVE_AREA+16
9951: mvc 0(16,%r12),SP_R12(%r15)
996 lm %r0,%r11,SP_R0(%r15)
997 l %r15,SP_R15(%r15)
9982: la %r12,__LC_RETURN_PSW
999 br %r14 886 br %r14
1000cleanup_sysc_restore_insn: 887cleanup_sysc_restore_insn:
1001 .long sysc_done - 4 + 0x80000000 888 .long sysc_done - 4 + 0x80000000
1002 .long sysc_done - 8 + 0x80000000
1003 889
1004cleanup_io_tif: 890cleanup_io_tif:
1005 mvc __LC_RETURN_PSW(4),0(%r12) 891 l %r9,BASED(cleanup_table+20) # io_tif + 0x80000000
1006 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1007 la %r12,__LC_RETURN_PSW
1008 br %r14 892 br %r14
1009 893
1010cleanup_io_restore: 894cleanup_io_restore:
1011 clc 4(4,%r12),BASED(cleanup_io_restore_insn) 895 cl %r9,BASED(cleanup_io_restore_insn)
1012 be BASED(1f) 896 jhe 0f
1013 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 897 l %r9,12(%r11) # get saved r11 pointer to pt_regs
1014 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4) 898 mvc __LC_RETURN_PSW(8),__PT_PSW(%r9)
1015 be BASED(1f) 899 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
1016 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 900 mvc 0(32,%r11),__PT_R8(%r9)
1017 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 901 lm %r0,%r7,__PT_R0(%r9)
1018 lm %r0,%r11,SP_R0(%r15) 9020: lm %r8,%r9,__LC_RETURN_PSW
1019 l %r15,SP_R15(%r15)
10201: la %r12,__LC_RETURN_PSW
1021 br %r14 903 br %r14
1022cleanup_io_restore_insn: 904cleanup_io_restore_insn:
1023 .long io_done - 4 + 0x80000000 905 .long io_done - 4 + 0x80000000
1024 .long io_done - 8 + 0x80000000
1025 906
1026/* 907/*
1027 * Integer constants 908 * Integer constants
1028 */ 909 */
1029 .align 4 910 .align 4
1030.Lc_spsize: .long SP_SIZE 911.Lnr_syscalls: .long NR_syscalls
1031.Lc_overhead: .long STACK_FRAME_OVERHEAD
1032.Lnr_syscalls: .long NR_syscalls
1033.L0x018: .short 0x018
1034.L0x020: .short 0x020
1035.L0x028: .short 0x028
1036.L0x030: .short 0x030
1037.L0x038: .short 0x038
1038.Lc_1: .long 1
1039 912
1040/* 913/*
1041 * Symbol constants 914 * Symbol constants
1042 */ 915 */
1043.Ls390_mcck: .long s390_do_machine_check 916.Ldo_machine_check: .long s390_do_machine_check
1044.Ls390_handle_mcck: 917.Lhandle_mcck: .long s390_handle_mcck
1045 .long s390_handle_mcck 918.Ldo_IRQ: .long do_IRQ
1046.Lmck_old_psw: .long __LC_MCK_OLD_PSW 919.Ldo_extint: .long do_extint
1047.Ldo_IRQ: .long do_IRQ 920.Ldo_signal: .long do_signal
1048.Ldo_extint: .long do_extint 921.Ldo_notify_resume: .long do_notify_resume
1049.Ldo_signal: .long do_signal 922.Ldo_per_trap: .long do_per_trap
1050.Ldo_notify_resume: 923.Ldo_execve: .long do_execve
1051 .long do_notify_resume 924.Lexecve_tail: .long execve_tail
1052.Lhandle_per: .long do_per_trap 925.Ljump_table: .long pgm_check_table
1053.Ldo_execve: .long do_execve 926.Lschedule: .long schedule
1054.Lexecve_tail: .long execve_tail
1055.Ljump_table: .long pgm_check_table
1056.Lschedule: .long schedule
1057#ifdef CONFIG_PREEMPT 927#ifdef CONFIG_PREEMPT
1058.Lpreempt_schedule_irq: 928.Lpreempt_irq: .long preempt_schedule_irq
1059 .long preempt_schedule_irq
1060#endif 929#endif
1061.Ltrace_entry: .long do_syscall_trace_enter 930.Ltrace_enter: .long do_syscall_trace_enter
1062.Ltrace_exit: .long do_syscall_trace_exit 931.Ltrace_exit: .long do_syscall_trace_exit
1063.Lschedtail: .long schedule_tail 932.Lschedule_tail: .long schedule_tail
1064.Lsysc_table: .long sys_call_table 933.Lsys_call_table: .long sys_call_table
934.Lsysc_per: .long sysc_per + 0x80000000
1065#ifdef CONFIG_TRACE_IRQFLAGS 935#ifdef CONFIG_TRACE_IRQFLAGS
1066.Ltrace_irq_on_caller: 936.Lhardirqs_on: .long trace_hardirqs_on_caller
1067 .long trace_hardirqs_on_caller 937.Lhardirqs_off: .long trace_hardirqs_off_caller
1068.Ltrace_irq_off_caller:
1069 .long trace_hardirqs_off_caller
1070#endif 938#endif
1071#ifdef CONFIG_LOCKDEP 939#ifdef CONFIG_LOCKDEP
1072.Llockdep_sys_exit: 940.Llockdep_sys_exit: .long lockdep_sys_exit
1073 .long lockdep_sys_exit
1074#endif 941#endif
1075.Lcritical_start: 942.Lcritical_start: .long __critical_start + 0x80000000
1076 .long __critical_start + 0x80000000 943.Lcritical_length: .long __critical_end - __critical_start
1077.Lcritical_end:
1078 .long __critical_end + 0x80000000
1079.Lcleanup_critical:
1080 .long cleanup_critical
1081 944
1082 .section .rodata, "a" 945 .section .rodata, "a"
1083#define SYSCALL(esa,esame,emu) .long esa 946#define SYSCALL(esa,esame,emu) .long esa
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index ef8fb1d6e8d7..bf538aaf407d 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -6,15 +6,15 @@
6#include <asm/ptrace.h> 6#include <asm/ptrace.h>
7 7
8 8
9extern void (*pgm_check_table[128])(struct pt_regs *, long, unsigned long); 9extern void (*pgm_check_table[128])(struct pt_regs *);
10extern void *restart_stack; 10extern void *restart_stack;
11 11
12asmlinkage long do_syscall_trace_enter(struct pt_regs *regs); 12asmlinkage long do_syscall_trace_enter(struct pt_regs *regs);
13asmlinkage void do_syscall_trace_exit(struct pt_regs *regs); 13asmlinkage void do_syscall_trace_exit(struct pt_regs *regs);
14 14
15void do_protection_exception(struct pt_regs *, long, unsigned long); 15void do_protection_exception(struct pt_regs *regs);
16void do_dat_exception(struct pt_regs *, long, unsigned long); 16void do_dat_exception(struct pt_regs *regs);
17void do_asce_exception(struct pt_regs *, long, unsigned long); 17void do_asce_exception(struct pt_regs *regs);
18 18
19void do_per_trap(struct pt_regs *regs); 19void do_per_trap(struct pt_regs *regs);
20void syscall_trace(struct pt_regs *regs, int entryexit); 20void syscall_trace(struct pt_regs *regs, int entryexit);
@@ -28,7 +28,7 @@ void do_extint(struct pt_regs *regs, unsigned int, unsigned int, unsigned long);
28void do_restart(void); 28void do_restart(void);
29int __cpuinit start_secondary(void *cpuvoid); 29int __cpuinit start_secondary(void *cpuvoid);
30void __init startup_init(void); 30void __init startup_init(void);
31void die(const char * str, struct pt_regs * regs, long err); 31void die(struct pt_regs *regs, const char *str);
32 32
33void __init time_init(void); 33void __init time_init(void);
34 34
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 83a93747e2fd..412a7b8783d7 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -19,32 +19,22 @@
19#include <asm/unistd.h> 19#include <asm/unistd.h>
20#include <asm/page.h> 20#include <asm/page.h>
21 21
22/* 22__PT_R0 = __PT_GPRS
23 * Stack layout for the system_call stack entry. 23__PT_R1 = __PT_GPRS + 8
24 * The first few entries are identical to the user_regs_struct. 24__PT_R2 = __PT_GPRS + 16
25 */ 25__PT_R3 = __PT_GPRS + 24
26SP_PTREGS = STACK_FRAME_OVERHEAD 26__PT_R4 = __PT_GPRS + 32
27SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS 27__PT_R5 = __PT_GPRS + 40
28SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW 28__PT_R6 = __PT_GPRS + 48
29SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS 29__PT_R7 = __PT_GPRS + 56
30SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 30__PT_R8 = __PT_GPRS + 64
31SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 31__PT_R9 = __PT_GPRS + 72
32SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 32__PT_R10 = __PT_GPRS + 80
33SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 33__PT_R11 = __PT_GPRS + 88
34SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 34__PT_R12 = __PT_GPRS + 96
35SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 35__PT_R13 = __PT_GPRS + 104
36SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 36__PT_R14 = __PT_GPRS + 112
37SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 37__PT_R15 = __PT_GPRS + 120
38SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
39SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
40SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
41SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
42SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
43SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
44SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
45SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46SP_SVC_CODE = STACK_FRAME_OVERHEAD + __PT_SVC_CODE
47SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
48 38
49STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER 39STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
50STACK_SIZE = 1 << STACK_SHIFT 40STACK_SIZE = 1 << STACK_SHIFT
@@ -59,154 +49,103 @@ _TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
59 49
60#define BASED(name) name-system_call(%r13) 50#define BASED(name) name-system_call(%r13)
61 51
62 .macro SPP newpp
63#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
64 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
65 jz .+8
66 .insn s,0xb2800000,\newpp
67#endif
68 .endm
69
70 .macro HANDLE_SIE_INTERCEPT
71#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
72 tm __TI_flags+6(%r12),_TIF_SIE>>8
73 jz 0f
74 SPP __LC_CMF_HPP # set host id
75 clc SP_PSW+8(8,%r15),BASED(.Lsie_loop)
76 jl 0f
77 clc SP_PSW+8(8,%r15),BASED(.Lsie_done)
78 jhe 0f
79 mvc SP_PSW+8(8,%r15),BASED(.Lsie_loop)
800:
81#endif
82 .endm
83
84#ifdef CONFIG_TRACE_IRQFLAGS
85 .macro TRACE_IRQS_ON 52 .macro TRACE_IRQS_ON
53#ifdef CONFIG_TRACE_IRQFLAGS
86 basr %r2,%r0 54 basr %r2,%r0
87 brasl %r14,trace_hardirqs_on_caller 55 brasl %r14,trace_hardirqs_on_caller
56#endif
88 .endm 57 .endm
89 58
90 .macro TRACE_IRQS_OFF 59 .macro TRACE_IRQS_OFF
60#ifdef CONFIG_TRACE_IRQFLAGS
91 basr %r2,%r0 61 basr %r2,%r0
92 brasl %r14,trace_hardirqs_off_caller 62 brasl %r14,trace_hardirqs_off_caller
93 .endm
94#else
95#define TRACE_IRQS_ON
96#define TRACE_IRQS_OFF
97#endif 63#endif
64 .endm
98 65
99#ifdef CONFIG_LOCKDEP
100 .macro LOCKDEP_SYS_EXIT 66 .macro LOCKDEP_SYS_EXIT
101 tm SP_PSW+1(%r15),0x01 # returning to user ? 67#ifdef CONFIG_LOCKDEP
102 jz 0f 68 tm __PT_PSW+1(%r11),0x01 # returning to user ?
69 jz .+10
103 brasl %r14,lockdep_sys_exit 70 brasl %r14,lockdep_sys_exit
1040:
105 .endm
106#else
107#define LOCKDEP_SYS_EXIT
108#endif 71#endif
109
110 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
111 lg %r10,\lc_from
112 slg %r10,\lc_to
113 alg %r10,\lc_sum
114 stg %r10,\lc_sum
115 .endm 72 .endm
116 73
117/* 74 .macro SPP newpp
118 * Register usage in interrupt handlers: 75#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
119 * R9 - pointer to current task structure 76 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
120 * R13 - pointer to literal pool 77 jz .+8
121 * R14 - return register for function calls 78 .insn s,0xb2800000,\newpp
122 * R15 - kernel stack pointer 79#endif
123 */ 80 .endm
124 81
125 .macro SAVE_ALL_SVC psworg,savearea 82 .macro HANDLE_SIE_INTERCEPT scratch
126 stmg %r11,%r15,\savearea 83#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
127 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp 84 tm __TI_flags+6(%r12),_TIF_SIE>>8
128 aghi %r15,-SP_SIZE # make room for registers & psw 85 jz .+42
129 lg %r11,__LC_LAST_BREAK 86 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
87 jz .+8
88 .insn s,0xb2800000,BASED(.Lhost_id) # set host id
89 lgr \scratch,%r9
90 slg \scratch,BASED(.Lsie_loop)
91 clg \scratch,BASED(.Lsie_length)
92 jhe .+10
93 lg %r9,BASED(.Lsie_loop)
94#endif
130 .endm 95 .endm
131 96
132 .macro SAVE_ALL_PGM psworg,savearea 97 .macro CHECK_STACK stacksize,savearea
133 stmg %r11,%r15,\savearea
134 tm \psworg+1,0x01 # test problem state bit
135#ifdef CONFIG_CHECK_STACK 98#ifdef CONFIG_CHECK_STACK
136 jnz 1f 99 tml %r15,\stacksize - CONFIG_STACK_GUARD
137 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 100 lghi %r14,\savearea
138 jnz 2f 101 jz stack_overflow
139 la %r12,\psworg
140 j stack_overflow
141#else
142 jz 2f
143#endif 102#endif
1441: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
1452: aghi %r15,-SP_SIZE # make room for registers & psw
146 larl %r13,system_call
147 lg %r11,__LC_LAST_BREAK
148 .endm 103 .endm
149 104
150 .macro SAVE_ALL_ASYNC psworg,savearea 105 .macro SWITCH_ASYNC savearea,stack,shift
151 stmg %r11,%r15,\savearea 106 tmhh %r8,0x0001 # interrupting from user ?
152 larl %r13,system_call 107 jnz 1f
153 lg %r11,__LC_LAST_BREAK 108 lgr %r14,%r9
154 la %r12,\psworg 109 slg %r14,BASED(.Lcritical_start)
155 tm \psworg+1,0x01 # test problem state bit 110 clg %r14,BASED(.Lcritical_length)
156 jnz 1f # from user -> load kernel stack
157 clc \psworg+8(8),BASED(.Lcritical_end)
158 jhe 0f 111 jhe 0f
159 clc \psworg+8(8),BASED(.Lcritical_start) 112 lghi %r11,\savearea # inside critical section, do cleanup
160 jl 0f
161 brasl %r14,cleanup_critical 113 brasl %r14,cleanup_critical
162 tm 1(%r12),0x01 # retest problem state after cleanup 114 tmhh %r8,0x0001 # retest problem state after cleanup
163 jnz 1f 115 jnz 1f
1640: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? 1160: lg %r14,\stack # are we already on the target stack?
165 slgr %r14,%r15 117 slgr %r14,%r15
166 srag %r14,%r14,STACK_SHIFT 118 srag %r14,%r14,\shift
167#ifdef CONFIG_CHECK_STACK
168 jnz 1f 119 jnz 1f
169 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 120 CHECK_STACK 1<<\shift,\savearea
170 jnz 2f 121 j 2f
171 j stack_overflow 1221: lg %r15,\stack # load target stack
172#else 1232: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
173 jz 2f 124 la %r11,STACK_FRAME_OVERHEAD(%r15)
174#endif
1751: lg %r15,__LC_ASYNC_STACK # load async stack
1762: aghi %r15,-SP_SIZE # make room for registers & psw
177 .endm
178
179 .macro CREATE_STACK_FRAME savearea
180 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
181 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
182 mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
183 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
184 .endm 125 .endm
185 126
186 .macro RESTORE_ALL psworg,sync 127 .macro UPDATE_VTIME scratch,enter_timer
187 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore 128 lg \scratch,__LC_EXIT_TIMER
188 .if !\sync 129 slg \scratch,\enter_timer
189 ni \psworg+1,0xfd # clear wait state bit 130 alg \scratch,__LC_USER_TIMER
190 .endif 131 stg \scratch,__LC_USER_TIMER
191 lg %r14,__LC_VDSO_PER_CPU 132 lg \scratch,__LC_LAST_UPDATE_TIMER
192 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user 133 slg \scratch,__LC_EXIT_TIMER
193 stpt __LC_EXIT_TIMER 134 alg \scratch,__LC_SYSTEM_TIMER
194 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 135 stg \scratch,__LC_SYSTEM_TIMER
195 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user 136 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
196 lpswe \psworg # back to caller
197 .endm 137 .endm
198 138
199 .macro LAST_BREAK 139 .macro LAST_BREAK scratch
200 srag %r10,%r11,23 140 srag \scratch,%r10,23
201 jz 0f 141 jz .+10
202 stg %r11,__TI_last_break(%r12) 142 stg %r10,__TI_last_break(%r12)
2030:
204 .endm 143 .endm
205 144
206 .macro REENABLE_IRQS 145 .macro REENABLE_IRQS
207 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15) 146 stg %r8,__LC_RETURN_PSW
208 ni __SF_EMPTY(%r15),0xbf 147 ni __LC_RETURN_PSW,0xbf
209 ssm __SF_EMPTY(%r15) 148 ssm __LC_RETURN_PSW
210 .endm 149 .endm
211 150
212 .section .kprobes.text, "ax" 151 .section .kprobes.text, "ax"
@@ -245,55 +184,66 @@ __critical_start:
245 184
246ENTRY(system_call) 185ENTRY(system_call)
247 stpt __LC_SYNC_ENTER_TIMER 186 stpt __LC_SYNC_ENTER_TIMER
248sysc_saveall: 187sysc_stmg:
249 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 188 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
250 CREATE_STACK_FRAME __LC_SAVE_AREA 189 lg %r10,__LC_LAST_BREAK
251 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct 190 lg %r12,__LC_THREAD_INFO
252 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW 191 larl %r13,system_call
253 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC 192sysc_per:
254 oi __TI_flags+7(%r12),_TIF_SYSCALL 193 lg %r15,__LC_KERNEL_STACK
194 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
195 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
255sysc_vtime: 196sysc_vtime:
256 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 197 UPDATE_VTIME %r13,__LC_SYNC_ENTER_TIMER
257sysc_stime: 198 LAST_BREAK %r13
258 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 199 stmg %r0,%r7,__PT_R0(%r11)
259sysc_update: 200 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
260 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 201 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
261 LAST_BREAK 202 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
262sysc_do_svc: 203sysc_do_svc:
263 llgh %r7,SP_SVC_CODE+2(%r15) 204 oi __TI_flags+7(%r12),_TIF_SYSCALL
264 slag %r7,%r7,2 # shift and test for svc 0 205 llgh %r8,__PT_INT_CODE+2(%r11)
206 slag %r8,%r8,2 # shift and test for svc 0
265 jnz sysc_nr_ok 207 jnz sysc_nr_ok
266 # svc 0: system call number in %r1 208 # svc 0: system call number in %r1
267 llgfr %r1,%r1 # clear high word in r1 209 llgfr %r1,%r1 # clear high word in r1
268 cghi %r1,NR_syscalls 210 cghi %r1,NR_syscalls
269 jnl sysc_nr_ok 211 jnl sysc_nr_ok
270 sth %r1,SP_SVC_CODE+2(%r15) 212 sth %r1,__PT_INT_CODE+2(%r11)
271 slag %r7,%r1,2 # shift and test for svc 0 213 slag %r8,%r1,2
272sysc_nr_ok: 214sysc_nr_ok:
273 larl %r10,sys_call_table 215 larl %r10,sys_call_table # 64 bit system call table
274#ifdef CONFIG_COMPAT 216#ifdef CONFIG_COMPAT
275 tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ? 217 tm __TI_flags+5(%r12),(_TIF_31BIT>>16)
276 jno sysc_noemu 218 jno sysc_noemu
277 larl %r10,sys_call_table_emu # use 31 bit emulation system calls 219 larl %r10,sys_call_table_emu # 31 bit system call table
278sysc_noemu: 220sysc_noemu:
279#endif 221#endif
222 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
223 stg %r2,__PT_ORIG_GPR2(%r11)
224 stg %r7,STACK_FRAME_OVERHEAD(%r15)
225 lgf %r9,0(%r8,%r10) # get system call add.
280 tm __TI_flags+6(%r12),_TIF_TRACE >> 8 226 tm __TI_flags+6(%r12),_TIF_TRACE >> 8
281 mvc SP_ARGS(8,%r15),SP_R7(%r15)
282 lgf %r8,0(%r7,%r10) # load address of system call routine
283 jnz sysc_tracesys 227 jnz sysc_tracesys
284 basr %r14,%r8 # call sys_xxxx 228 basr %r14,%r9 # call sys_xxxx
285 stg %r2,SP_R2(%r15) # store return value (change R2 on stack) 229 stg %r2,__PT_R2(%r11) # store return value
286 230
287sysc_return: 231sysc_return:
288 LOCKDEP_SYS_EXIT 232 LOCKDEP_SYS_EXIT
289sysc_tif: 233sysc_tif:
290 tm SP_PSW+1(%r15),0x01 # returning to user ? 234 tm __PT_PSW+1(%r11),0x01 # returning to user ?
291 jno sysc_restore 235 jno sysc_restore
292 tm __TI_flags+7(%r12),_TIF_WORK_SVC 236 tm __TI_flags+7(%r12),_TIF_WORK_SVC
293 jnz sysc_work # there is work to do (signals etc.) 237 jnz sysc_work # check for work
294 ni __TI_flags+7(%r12),255-_TIF_SYSCALL 238 ni __TI_flags+7(%r12),255-_TIF_SYSCALL
295sysc_restore: 239sysc_restore:
296 RESTORE_ALL __LC_RETURN_PSW,1 240 lg %r14,__LC_VDSO_PER_CPU
241 lmg %r0,%r10,__PT_R0(%r11)
242 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
243 stpt __LC_EXIT_TIMER
244 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
245 lmg %r11,%r15,__PT_R11(%r11)
246 lpswe __LC_RETURN_PSW
297sysc_done: 247sysc_done:
298 248
299# 249#
@@ -317,7 +267,7 @@ sysc_work:
317# 267#
318sysc_reschedule: 268sysc_reschedule:
319 larl %r14,sysc_return 269 larl %r14,sysc_return
320 jg schedule # return point is sysc_return 270 jg schedule
321 271
322# 272#
323# _TIF_MCCK_PENDING is set, call handler 273# _TIF_MCCK_PENDING is set, call handler
@@ -331,33 +281,33 @@ sysc_mcck_pending:
331# 281#
332sysc_sigpending: 282sysc_sigpending:
333 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP 283 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
334 la %r2,SP_PTREGS(%r15) # load pt_regs 284 lgr %r2,%r11 # pass pointer to pt_regs
335 brasl %r14,do_signal # call do_signal 285 brasl %r14,do_signal
336 tm __TI_flags+7(%r12),_TIF_SYSCALL 286 tm __TI_flags+7(%r12),_TIF_SYSCALL
337 jno sysc_return 287 jno sysc_return
338 lmg %r2,%r6,SP_R2(%r15) # load svc arguments 288 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
339 lghi %r7,0 # svc 0 returns -ENOSYS 289 lghi %r8,0 # svc 0 returns -ENOSYS
340 lh %r1,SP_SVC_CODE+2(%r15) # load new svc number 290 lh %r1,__PT_INT_CODE+2(%r11) # load new svc number
341 cghi %r1,NR_syscalls 291 cghi %r1,NR_syscalls
342 jnl sysc_nr_ok # invalid svc number -> do svc 0 292 jnl sysc_nr_ok # invalid svc number -> do svc 0
343 slag %r7,%r1,2 293 slag %r8,%r1,2
344 j sysc_nr_ok # restart svc 294 j sysc_nr_ok # restart svc
345 295
346# 296#
347# _TIF_NOTIFY_RESUME is set, call do_notify_resume 297# _TIF_NOTIFY_RESUME is set, call do_notify_resume
348# 298#
349sysc_notify_resume: 299sysc_notify_resume:
350 la %r2,SP_PTREGS(%r15) # load pt_regs 300 lgr %r2,%r11 # pass pointer to pt_regs
351 larl %r14,sysc_return 301 larl %r14,sysc_return
352 jg do_notify_resume # call do_notify_resume 302 jg do_notify_resume
353 303
354# 304#
355# _TIF_PER_TRAP is set, call do_per_trap 305# _TIF_PER_TRAP is set, call do_per_trap
356# 306#
357sysc_singlestep: 307sysc_singlestep:
358 ni __TI_flags+7(%r12),255-(_TIF_SYSCALL | _TIF_PER_TRAP) 308 ni __TI_flags+7(%r12),255-(_TIF_SYSCALL | _TIF_PER_TRAP)
359 la %r2,SP_PTREGS(%r15) # address of register-save area 309 lgr %r2,%r11 # pass pointer to pt_regs
360 larl %r14,sysc_return # load adr. of system return 310 larl %r14,sysc_return
361 jg do_per_trap 311 jg do_per_trap
362 312
363# 313#
@@ -365,41 +315,41 @@ sysc_singlestep:
365# and after the system call 315# and after the system call
366# 316#
367sysc_tracesys: 317sysc_tracesys:
368 la %r2,SP_PTREGS(%r15) # load pt_regs 318 lgr %r2,%r11 # pass pointer to pt_regs
369 la %r3,0 319 la %r3,0
370 llgh %r0,SP_SVC_CODE+2(%r15) 320 llgh %r0,__PT_INT_CODE+2(%r11)
371 stg %r0,SP_R2(%r15) 321 stg %r0,__PT_R2(%r11)
372 brasl %r14,do_syscall_trace_enter 322 brasl %r14,do_syscall_trace_enter
373 lghi %r0,NR_syscalls 323 lghi %r0,NR_syscalls
374 clgr %r0,%r2 324 clgr %r0,%r2
375 jnh sysc_tracenogo 325 jnh sysc_tracenogo
376 sllg %r7,%r2,2 # svc number *4 326 sllg %r8,%r2,2
377 lgf %r8,0(%r7,%r10) 327 lgf %r9,0(%r8,%r10)
378sysc_tracego: 328sysc_tracego:
379 lmg %r3,%r6,SP_R3(%r15) 329 lmg %r3,%r7,__PT_R3(%r11)
380 mvc SP_ARGS(8,%r15),SP_R7(%r15) 330 stg %r7,STACK_FRAME_OVERHEAD(%r15)
381 lg %r2,SP_ORIG_R2(%r15) 331 lg %r2,__PT_ORIG_GPR2(%r11)
382 basr %r14,%r8 # call sys_xxx 332 basr %r14,%r9 # call sys_xxx
383 stg %r2,SP_R2(%r15) # store return value 333 stg %r2,__PT_R2(%r11) # store return value
384sysc_tracenogo: 334sysc_tracenogo:
385 tm __TI_flags+6(%r12),_TIF_TRACE >> 8 335 tm __TI_flags+6(%r12),_TIF_TRACE >> 8
386 jz sysc_return 336 jz sysc_return
387 la %r2,SP_PTREGS(%r15) # load pt_regs 337 lgr %r2,%r11 # pass pointer to pt_regs
388 larl %r14,sysc_return # return point is sysc_return 338 larl %r14,sysc_return
389 jg do_syscall_trace_exit 339 jg do_syscall_trace_exit
390 340
391# 341#
392# a new process exits the kernel with ret_from_fork 342# a new process exits the kernel with ret_from_fork
393# 343#
394ENTRY(ret_from_fork) 344ENTRY(ret_from_fork)
395 lg %r13,__LC_SVC_NEW_PSW+8 345 la %r11,STACK_FRAME_OVERHEAD(%r15)
396 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct 346 lg %r12,__LC_THREAD_INFO
397 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 347 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
398 jo 0f 348 jo 0f
399 stg %r15,SP_R15(%r15) # store stack pointer for new kthread 349 stg %r15,__PT_R15(%r11) # store stack pointer for new kthread
4000: brasl %r14,schedule_tail 3500: brasl %r14,schedule_tail
401 TRACE_IRQS_ON 351 TRACE_IRQS_ON
402 stosm 24(%r15),0x03 # reenable interrupts 352 ssm __LC_SVC_NEW_PSW # reenable interrupts
403 j sysc_tracenogo 353 j sysc_tracenogo
404 354
405# 355#
@@ -409,26 +359,26 @@ ENTRY(ret_from_fork)
409ENTRY(kernel_execve) 359ENTRY(kernel_execve)
410 stmg %r12,%r15,96(%r15) 360 stmg %r12,%r15,96(%r15)
411 lgr %r14,%r15 361 lgr %r14,%r15
412 aghi %r15,-SP_SIZE 362 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
413 stg %r14,__SF_BACKCHAIN(%r15) 363 stg %r14,__SF_BACKCHAIN(%r15)
414 la %r12,SP_PTREGS(%r15) 364 la %r12,STACK_FRAME_OVERHEAD(%r15)
415 xc 0(__PT_SIZE,%r12),0(%r12) 365 xc 0(__PT_SIZE,%r12),0(%r12)
416 lgr %r5,%r12 366 lgr %r5,%r12
417 brasl %r14,do_execve 367 brasl %r14,do_execve
418 ltgfr %r2,%r2 368 ltgfr %r2,%r2
419 je 0f 369 je 0f
420 aghi %r15,SP_SIZE 370 aghi %r15,(STACK_FRAME_OVERHEAD + __PT_SIZE)
421 lmg %r12,%r15,96(%r15) 371 lmg %r12,%r15,96(%r15)
422 br %r14 372 br %r14
423 # execve succeeded. 373 # execve succeeded.
4240: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts 3740: ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
425 lg %r15,__LC_KERNEL_STACK # load ksp 375 lg %r15,__LC_KERNEL_STACK # load ksp
426 aghi %r15,-SP_SIZE # make room for registers & psw 376 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
427 lg %r13,__LC_SVC_NEW_PSW+8 377 la %r11,STACK_FRAME_OVERHEAD(%r15)
428 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs 378 mvc 0(__PT_SIZE,%r11),0(%r12) # copy pt_regs
429 lg %r12,__LC_THREAD_INFO 379 lg %r12,__LC_THREAD_INFO
430 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 380 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
431 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 381 ssm __LC_SVC_NEW_PSW # reenable interrupts
432 brasl %r14,execve_tail 382 brasl %r14,execve_tail
433 j sysc_return 383 j sysc_return
434 384
@@ -437,127 +387,72 @@ ENTRY(kernel_execve)
437 */ 387 */
438 388
439ENTRY(pgm_check_handler) 389ENTRY(pgm_check_handler)
440/*
441 * First we need to check for a special case:
442 * Single stepping an instruction that disables the PER event mask will
443 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
444 * For a single stepped SVC the program check handler gets control after
445 * the SVC new PSW has been loaded. But we want to execute the SVC first and
446 * then handle the PER event. Therefore we update the SVC old PSW to point
447 * to the pgm_check_handler and branch to the SVC handler after we checked
448 * if we have to load the kernel stack register.
449 * For every other possible cause for PER event without the PER mask set
450 * we just ignore the PER event (FIXME: is there anything we have to do
451 * for LPSW?).
452 */
453 stpt __LC_SYNC_ENTER_TIMER 390 stpt __LC_SYNC_ENTER_TIMER
454 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 391 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
455 jnz pgm_per # got per exception -> special case 392 lg %r10,__LC_LAST_BREAK
456 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA 393 lg %r12,__LC_THREAD_INFO
457 CREATE_STACK_FRAME __LC_SAVE_AREA 394 larl %r13,system_call
458 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW 395 lmg %r8,%r9,__LC_PGM_OLD_PSW
459 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct 396 HANDLE_SIE_INTERCEPT %r14
460 HANDLE_SIE_INTERCEPT 397 tmhh %r8,0x0001 # test problem state bit
461 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 398 jnz 1f # -> fault in user space
462 jz pgm_no_vtime 399 tmhh %r8,0x4000 # PER bit set in old PSW ?
463 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 400 jnz 0f # -> enabled, can't be a double fault
464 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 401 tm __LC_PGM_ILC+3,0x80 # check for per exception
465 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 402 jnz pgm_svcper # -> single stepped svc
466 LAST_BREAK 4030: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
467pgm_no_vtime: 404 j 2f
468 stg %r11,SP_ARGS(%r15) 4051: UPDATE_VTIME %r14,__LC_SYNC_ENTER_TIMER
469 lgf %r3,__LC_PGM_ILC # load program interruption code 406 LAST_BREAK %r14
470 lg %r4,__LC_TRANS_EXC_CODE 407 lg %r15,__LC_KERNEL_STACK
471 REENABLE_IRQS 4082: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
472 lghi %r8,0x7f 409 la %r11,STACK_FRAME_OVERHEAD(%r15)
473 ngr %r8,%r3 410 stmg %r0,%r7,__PT_R0(%r11)
474 sll %r8,3 411 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
475 larl %r1,pgm_check_table 412 stmg %r8,%r9,__PT_PSW(%r11)
476 lg %r1,0(%r8,%r1) # load address of handler routine 413 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
477 la %r2,SP_PTREGS(%r15) # address of register-save area 414 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
478 basr %r14,%r1 # branch to interrupt-handler 415 stg %r10,__PT_ARGS(%r11)
479pgm_exit: 416 tm __LC_PGM_ILC+3,0x80 # check for per exception
480 j sysc_return 417 jz 0f
481
482#
483# handle per exception
484#
485pgm_per:
486 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
487 jnz pgm_per_std # ok, normal per event from user space
488# ok its one of the special cases, now we need to find out which one
489 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
490 je pgm_svcper
491# no interesting special case, ignore PER event
492 lpswe __LC_PGM_OLD_PSW
493
494#
495# Normal per exception
496#
497pgm_per_std:
498 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
499 CREATE_STACK_FRAME __LC_SAVE_AREA
500 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
501 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
502 HANDLE_SIE_INTERCEPT
503 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
504 jz pgm_no_vtime2
505 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
506 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
507 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
508 LAST_BREAK
509pgm_no_vtime2:
510 lg %r1,__TI_task(%r12) 418 lg %r1,__TI_task(%r12)
511 tm SP_PSW+1(%r15),0x01 # kernel per event ? 419 tmhh %r8,0x0001 # kernel per event ?
512 jz kernel_per 420 jz pgm_kprobe
513 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE 421 oi __TI_flags+7(%r12),_TIF_PER_TRAP
514 mvc __THREAD_per_address(8,%r1),__LC_PER_ADDRESS 422 mvc __THREAD_per_address(8,%r1),__LC_PER_ADDRESS
423 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
515 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID 424 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
516 oi __TI_flags+7(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP 4250: REENABLE_IRQS
517 lgf %r3,__LC_PGM_ILC # load program interruption code 426 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
518 lg %r4,__LC_TRANS_EXC_CODE
519 REENABLE_IRQS
520 lghi %r8,0x7f
521 ngr %r8,%r3 # clear per-event-bit and ilc
522 je pgm_exit2
523 sll %r8,3
524 larl %r1,pgm_check_table 427 larl %r1,pgm_check_table
525 lg %r1,0(%r8,%r1) # load address of handler routine 428 llgh %r10,__PT_INT_CODE+2(%r11)
526 la %r2,SP_PTREGS(%r15) # address of register-save area 429 nill %r10,0x007f
430 sll %r10,3
431 je sysc_return
432 lg %r1,0(%r10,%r1) # load address of handler routine
433 lgr %r2,%r11 # pass pointer to pt_regs
527 basr %r14,%r1 # branch to interrupt-handler 434 basr %r14,%r1 # branch to interrupt-handler
528pgm_exit2:
529 j sysc_return 435 j sysc_return
530 436
531# 437#
532# it was a single stepped SVC that is causing all the trouble 438# PER event in supervisor state, must be kprobes
533# 439#
534pgm_svcper: 440pgm_kprobe:
535 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA 441 REENABLE_IRQS
536 CREATE_STACK_FRAME __LC_SAVE_AREA 442 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
537 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct 443 lgr %r2,%r11 # pass pointer to pt_regs
538 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW 444 brasl %r14,do_per_trap
539 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC 445 j sysc_return
540 oi __TI_flags+7(%r12),(_TIF_SYSCALL | _TIF_PER_TRAP)
541 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
542 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
543 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
544 LAST_BREAK
545 lg %r8,__TI_task(%r12)
546 mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE
547 mvc __THREAD_per_address(8,%r8),__LC_PER_ADDRESS
548 mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID
549 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
550 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
551 j sysc_do_svc
552 446
553# 447#
554# per was called from kernel, must be kprobes 448# single stepped system call
555# 449#
556kernel_per: 450pgm_svcper:
557 REENABLE_IRQS 451 oi __TI_flags+7(%r12),_TIF_PER_TRAP
558 la %r2,SP_PTREGS(%r15) # address of register-save area 452 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
559 brasl %r14,do_per_trap 453 larl %r14,sysc_per
560 j pgm_exit 454 stg %r14,__LC_RETURN_PSW+8
455 lpswe __LC_RETURN_PSW # branch to sysc_per and enable irqs
561 456
562/* 457/*
563 * IO interrupt handler routine 458 * IO interrupt handler routine
@@ -565,21 +460,25 @@ kernel_per:
565ENTRY(io_int_handler) 460ENTRY(io_int_handler)
566 stck __LC_INT_CLOCK 461 stck __LC_INT_CLOCK
567 stpt __LC_ASYNC_ENTER_TIMER 462 stpt __LC_ASYNC_ENTER_TIMER
568 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40 463 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
569 CREATE_STACK_FRAME __LC_SAVE_AREA+40 464 lg %r10,__LC_LAST_BREAK
570 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack 465 lg %r12,__LC_THREAD_INFO
571 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct 466 larl %r13,system_call
572 HANDLE_SIE_INTERCEPT 467 lmg %r8,%r9,__LC_IO_OLD_PSW
573 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 468 HANDLE_SIE_INTERCEPT %r14
574 jz io_no_vtime 469 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT
575 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 470 tmhh %r8,0x0001 # interrupting from user?
576 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 471 jz io_skip
577 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 472 UPDATE_VTIME %r14,__LC_ASYNC_ENTER_TIMER
578 LAST_BREAK 473 LAST_BREAK %r14
579io_no_vtime: 474io_skip:
475 stmg %r0,%r7,__PT_R0(%r11)
476 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
477 stmg %r8,%r9,__PT_PSW(%r11)
580 TRACE_IRQS_OFF 478 TRACE_IRQS_OFF
581 la %r2,SP_PTREGS(%r15) # address of register-save area 479 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
582 brasl %r14,do_IRQ # call standard irq handler 480 lgr %r2,%r11 # pass pointer to pt_regs
481 brasl %r14,do_IRQ
583io_return: 482io_return:
584 LOCKDEP_SYS_EXIT 483 LOCKDEP_SYS_EXIT
585 TRACE_IRQS_ON 484 TRACE_IRQS_ON
@@ -587,7 +486,14 @@ io_tif:
587 tm __TI_flags+7(%r12),_TIF_WORK_INT 486 tm __TI_flags+7(%r12),_TIF_WORK_INT
588 jnz io_work # there is work to do (signals etc.) 487 jnz io_work # there is work to do (signals etc.)
589io_restore: 488io_restore:
590 RESTORE_ALL __LC_RETURN_PSW,0 489 lg %r14,__LC_VDSO_PER_CPU
490 lmg %r0,%r10,__PT_R0(%r11)
491 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
492 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
493 stpt __LC_EXIT_TIMER
494 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
495 lmg %r11,%r15,__PT_R11(%r11)
496 lpswe __LC_RETURN_PSW
591io_done: 497io_done:
592 498
593# 499#
@@ -600,7 +506,7 @@ io_done:
600# Before any work can be done, a switch to the kernel stack is required. 506# Before any work can be done, a switch to the kernel stack is required.
601# 507#
602io_work: 508io_work:
603 tm SP_PSW+1(%r15),0x01 # returning to user ? 509 tm __PT_PSW+1(%r11),0x01 # returning to user ?
604 jo io_work_user # yes -> do resched & signal 510 jo io_work_user # yes -> do resched & signal
605#ifdef CONFIG_PREEMPT 511#ifdef CONFIG_PREEMPT
606 # check for preemptive scheduling 512 # check for preemptive scheduling
@@ -609,10 +515,11 @@ io_work:
609 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED 515 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
610 jno io_restore 516 jno io_restore
611 # switch to kernel stack 517 # switch to kernel stack
612 lg %r1,SP_R15(%r15) 518 lg %r1,__PT_R15(%r11)
613 aghi %r1,-SP_SIZE 519 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
614 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 520 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
615 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 521 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
522 la %r11,STACK_FRAME_OVERHEAD(%r1)
616 lgr %r15,%r1 523 lgr %r15,%r1
617 # TRACE_IRQS_ON already done at io_return, call 524 # TRACE_IRQS_ON already done at io_return, call
618 # TRACE_IRQS_OFF to keep things symmetrical 525 # TRACE_IRQS_OFF to keep things symmetrical
@@ -628,9 +535,10 @@ io_work:
628# 535#
629io_work_user: 536io_work_user:
630 lg %r1,__LC_KERNEL_STACK 537 lg %r1,__LC_KERNEL_STACK
631 aghi %r1,-SP_SIZE 538 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
632 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 539 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
633 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 540 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
541 la %r11,STACK_FRAME_OVERHEAD(%r1)
634 lgr %r15,%r1 542 lgr %r15,%r1
635 543
636# 544#
@@ -663,9 +571,9 @@ io_mcck_pending:
663# 571#
664io_reschedule: 572io_reschedule:
665 # TRACE_IRQS_ON already done at io_return 573 # TRACE_IRQS_ON already done at io_return
666 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 574 ssm __LC_SVC_NEW_PSW # reenable interrupts
667 brasl %r14,schedule # call scheduler 575 brasl %r14,schedule # call scheduler
668 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 576 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
669 TRACE_IRQS_OFF 577 TRACE_IRQS_OFF
670 j io_return 578 j io_return
671 579
@@ -674,10 +582,10 @@ io_reschedule:
674# 582#
675io_sigpending: 583io_sigpending:
676 # TRACE_IRQS_ON already done at io_return 584 # TRACE_IRQS_ON already done at io_return
677 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 585 ssm __LC_SVC_NEW_PSW # reenable interrupts
678 la %r2,SP_PTREGS(%r15) # load pt_regs 586 lgr %r2,%r11 # pass pointer to pt_regs
679 brasl %r14,do_signal # call do_signal 587 brasl %r14,do_signal
680 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 588 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
681 TRACE_IRQS_OFF 589 TRACE_IRQS_OFF
682 j io_return 590 j io_return
683 591
@@ -686,10 +594,10 @@ io_sigpending:
686# 594#
687io_notify_resume: 595io_notify_resume:
688 # TRACE_IRQS_ON already done at io_return 596 # TRACE_IRQS_ON already done at io_return
689 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 597 ssm __LC_SVC_NEW_PSW # reenable interrupts
690 la %r2,SP_PTREGS(%r15) # load pt_regs 598 lgr %r2,%r11 # pass pointer to pt_regs
691 brasl %r14,do_notify_resume # call do_notify_resume 599 brasl %r14,do_notify_resume
692 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 600 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
693 TRACE_IRQS_OFF 601 TRACE_IRQS_OFF
694 j io_return 602 j io_return
695 603
@@ -699,21 +607,24 @@ io_notify_resume:
699ENTRY(ext_int_handler) 607ENTRY(ext_int_handler)
700 stck __LC_INT_CLOCK 608 stck __LC_INT_CLOCK
701 stpt __LC_ASYNC_ENTER_TIMER 609 stpt __LC_ASYNC_ENTER_TIMER
702 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40 610 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
703 CREATE_STACK_FRAME __LC_SAVE_AREA+40 611 lg %r10,__LC_LAST_BREAK
704 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack 612 lg %r12,__LC_THREAD_INFO
705 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct 613 larl %r13,system_call
706 HANDLE_SIE_INTERCEPT 614 lmg %r8,%r9,__LC_EXT_OLD_PSW
707 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 615 HANDLE_SIE_INTERCEPT %r14
708 jz ext_no_vtime 616 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT
709 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 617 tmhh %r8,0x0001 # interrupting from user ?
710 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 618 jz ext_skip
711 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 619 UPDATE_VTIME %r14,__LC_ASYNC_ENTER_TIMER
712 LAST_BREAK 620 LAST_BREAK %r14
713ext_no_vtime: 621ext_skip:
622 stmg %r0,%r7,__PT_R0(%r11)
623 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
624 stmg %r8,%r9,__PT_PSW(%r11)
714 TRACE_IRQS_OFF 625 TRACE_IRQS_OFF
715 lghi %r1,4096 626 lghi %r1,4096
716 la %r2,SP_PTREGS(%r15) # address of register-save area 627 lgr %r2,%r11 # pass pointer to pt_regs
717 llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code 628 llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
718 llgf %r4,__LC_EXT_PARAMS # get external parameter 629 llgf %r4,__LC_EXT_PARAMS # get external parameter
719 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter 630 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter
@@ -730,81 +641,77 @@ ENTRY(mcck_int_handler)
730 la %r1,4095 # revalidate r1 641 la %r1,4095 # revalidate r1
731 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 642 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
732 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 643 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
733 stmg %r11,%r15,__LC_SAVE_AREA+80 644 lg %r10,__LC_LAST_BREAK
645 lg %r12,__LC_THREAD_INFO
734 larl %r13,system_call 646 larl %r13,system_call
735 lg %r11,__LC_LAST_BREAK 647 lmg %r8,%r9,__LC_MCK_OLD_PSW
736 la %r12,__LC_MCK_OLD_PSW 648 HANDLE_SIE_INTERCEPT %r14
737 tm __LC_MCCK_CODE,0x80 # system damage? 649 tm __LC_MCCK_CODE,0x80 # system damage?
738 jo mcck_int_main # yes -> rest of mcck code invalid 650 jo mcck_panic # yes -> rest of mcck code invalid
739 la %r14,4095 651 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
740 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) 652 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
741 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 653 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
742 jo 1f 654 jo 3f
743 la %r14,__LC_SYNC_ENTER_TIMER 655 la %r14,__LC_SYNC_ENTER_TIMER
744 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 656 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
745 jl 0f 657 jl 0f
746 la %r14,__LC_ASYNC_ENTER_TIMER 658 la %r14,__LC_ASYNC_ENTER_TIMER
7470: clc 0(8,%r14),__LC_EXIT_TIMER 6590: clc 0(8,%r14),__LC_EXIT_TIMER
748 jl 0f 660 jl 1f
749 la %r14,__LC_EXIT_TIMER 661 la %r14,__LC_EXIT_TIMER
7500: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 6621: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
751 jl 0f 663 jl 2f
752 la %r14,__LC_LAST_UPDATE_TIMER 664 la %r14,__LC_LAST_UPDATE_TIMER
7530: spt 0(%r14) 6652: spt 0(%r14)
754 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 666 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
7551: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 6673: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
756 jno mcck_int_main # no -> skip cleanup critical 668 jno mcck_panic # no -> skip cleanup critical
757 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 669 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_PANIC_STACK,PAGE_SHIFT
758 jnz mcck_int_main # from user -> load kernel stack 670 tm %r8,0x0001 # interrupting from user ?
759 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) 671 jz mcck_skip
760 jhe mcck_int_main 672 UPDATE_VTIME %r14,__LC_MCCK_ENTER_TIMER
761 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) 673 LAST_BREAK %r14
762 jl mcck_int_main 674mcck_skip:
763 brasl %r14,cleanup_critical 675 lghi %r14,__LC_GPREGS_SAVE_AREA
764mcck_int_main: 676 mvc __PT_R0(128,%r11),0(%r14)
765 lg %r14,__LC_PANIC_STACK # are we already on the panic stack? 677 stmg %r8,%r9,__PT_PSW(%r11)
766 slgr %r14,%r15 678 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
767 srag %r14,%r14,PAGE_SHIFT 679 lgr %r2,%r11 # pass pointer to pt_regs
768 jz 0f
769 lg %r15,__LC_PANIC_STACK # load panic stack
7700: aghi %r15,-SP_SIZE # make room for registers & psw
771 CREATE_STACK_FRAME __LC_SAVE_AREA+80
772 mvc SP_PSW(16,%r15),0(%r12)
773 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
774 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
775 jno mcck_no_vtime # no -> no timer update
776 HANDLE_SIE_INTERCEPT
777 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
778 jz mcck_no_vtime
779 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
780 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
781 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
782 LAST_BREAK
783mcck_no_vtime:
784 la %r2,SP_PTREGS(%r15) # load pt_regs
785 brasl %r14,s390_do_machine_check 680 brasl %r14,s390_do_machine_check
786 tm SP_PSW+1(%r15),0x01 # returning to user ? 681 tm __PT_PSW+1(%r11),0x01 # returning to user ?
787 jno mcck_return 682 jno mcck_return
788 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 683 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
789 aghi %r1,-SP_SIZE 684 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
790 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 685 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
791 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain 686 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
687 la %r11,STACK_FRAME_OVERHEAD(%r1)
792 lgr %r15,%r1 688 lgr %r15,%r1
793 stosm __SF_EMPTY(%r15),0x04 # turn dat on 689 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
794 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING 690 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
795 jno mcck_return 691 jno mcck_return
796 TRACE_IRQS_OFF 692 TRACE_IRQS_OFF
797 brasl %r14,s390_handle_mcck 693 brasl %r14,s390_handle_mcck
798 TRACE_IRQS_ON 694 TRACE_IRQS_ON
799mcck_return: 695mcck_return:
800 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW 696 lg %r14,__LC_VDSO_PER_CPU
697 lmg %r0,%r10,__PT_R0(%r11)
698 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
801 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 699 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
802 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
803 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 700 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
804 jno 0f 701 jno 0f
805 stpt __LC_EXIT_TIMER 702 stpt __LC_EXIT_TIMER
8060: lpswe __LC_RETURN_MCCK_PSW # back to caller 703 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
807mcck_done: 7040: lmg %r11,%r15,__PT_R11(%r11)
705 lpswe __LC_RETURN_MCCK_PSW
706
707mcck_panic:
708 lg %r14,__LC_PANIC_STACK
709 slgr %r14,%r15
710 srag %r14,%r14,PAGE_SHIFT
711 jz 0f
712 lg %r15,__LC_PANIC_STACK
7130: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
714 j mcck_skip
808 715
809/* 716/*
810 * Restart interruption handler, kick starter for additional CPUs 717 * Restart interruption handler, kick starter for additional CPUs
@@ -818,17 +725,18 @@ restart_base:
818 stck __LC_LAST_UPDATE_CLOCK 725 stck __LC_LAST_UPDATE_CLOCK
819 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) 726 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
820 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) 727 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
821 lg %r15,__LC_SAVE_AREA+120 # load ksp 728 lghi %r10,__LC_GPREGS_SAVE_AREA
729 lg %r15,120(%r10) # load ksp
822 lghi %r10,__LC_CREGS_SAVE_AREA 730 lghi %r10,__LC_CREGS_SAVE_AREA
823 lctlg %c0,%c15,0(%r10) # get new ctl regs 731 lctlg %c0,%c15,0(%r10) # get new ctl regs
824 lghi %r10,__LC_AREGS_SAVE_AREA 732 lghi %r10,__LC_AREGS_SAVE_AREA
825 lam %a0,%a15,0(%r10) 733 lam %a0,%a15,0(%r10)
826 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone 734 lmg %r6,%r15,__SF_GPRS(%r15)# load registers from clone
827 lg %r1,__LC_THREAD_INFO 735 lg %r1,__LC_THREAD_INFO
828 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) 736 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
829 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) 737 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
830 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER 738 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
831 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 739 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
832 brasl %r14,start_secondary 740 brasl %r14,start_secondary
833 .align 8 741 .align 8
834restart_vtime: 742restart_vtime:
@@ -852,16 +760,16 @@ restart_go:
852# PSW restart interrupt handler 760# PSW restart interrupt handler
853# 761#
854ENTRY(psw_restart_int_handler) 762ENTRY(psw_restart_int_handler)
855 stg %r15,__LC_SAVE_AREA+120(%r0) # save r15 763 stg %r15,__LC_SAVE_AREA_RESTART
856 larl %r15,restart_stack # load restart stack 764 larl %r15,restart_stack # load restart stack
857 lg %r15,0(%r15) 765 lg %r15,0(%r15)
858 aghi %r15,-SP_SIZE # make room for pt_regs 766 aghi %r15,-__PT_SIZE # create pt_regs on stack
859 stmg %r0,%r14,SP_R0(%r15) # store gprs %r0-%r14 to stack 767 stmg %r0,%r14,__PT_R0(%r15)
860 mvc SP_R15(8,%r15),__LC_SAVE_AREA+120(%r0)# store saved %r15 to stack 768 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
861 mvc SP_PSW(16,%r15),__LC_RST_OLD_PSW(%r0)# store restart old psw 769 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
862 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0 770 aghi %r15,-STACK_FRAME_OVERHEAD
771 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
863 brasl %r14,do_restart 772 brasl %r14,do_restart
864
865 larl %r14,restart_psw_crash # load disabled wait PSW if 773 larl %r14,restart_psw_crash # load disabled wait PSW if
866 lpswe 0(%r14) # do_restart returns 774 lpswe 0(%r14) # do_restart returns
867 .align 8 775 .align 8
@@ -877,172 +785,153 @@ restart_psw_crash:
877 * Setup a pt_regs so that show_trace can provide a good call trace. 785 * Setup a pt_regs so that show_trace can provide a good call trace.
878 */ 786 */
879stack_overflow: 787stack_overflow:
880 lg %r15,__LC_PANIC_STACK # change to panic stack 788 lg %r11,__LC_PANIC_STACK # change to panic stack
881 aghi %r15,-SP_SIZE 789 aghi %r11,-__PT_SIZE # create pt_regs
882 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack 790 stmg %r0,%r7,__PT_R0(%r11)
883 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack 791 stmg %r8,%r9,__PT_PSW(%r11)
884 la %r1,__LC_SAVE_AREA 792 mvc __PT_R8(64,%r11),0(%r14)
885 chi %r12,__LC_SVC_OLD_PSW 793 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
886 je 0f 794 lgr %r15,%r11
887 chi %r12,__LC_PGM_OLD_PSW 795 aghi %r15,-STACK_FRAME_OVERHEAD
888 je 0f 796 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
889 la %r1,__LC_SAVE_AREA+40 797 lgr %r2,%r11 # pass pointer to pt_regs
8900: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
891 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
892 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
893 la %r2,SP_PTREGS(%r15) # load pt_regs
894 jg kernel_stack_overflow 798 jg kernel_stack_overflow
895#endif 799#endif
896 800
897cleanup_table_system_call: 801 .align 8
898 .quad system_call, sysc_do_svc 802cleanup_table:
899cleanup_table_sysc_tif: 803 .quad system_call
900 .quad sysc_tif, sysc_restore 804 .quad sysc_do_svc
901cleanup_table_sysc_restore: 805 .quad sysc_tif
902 .quad sysc_restore, sysc_done 806 .quad sysc_restore
903cleanup_table_io_tif: 807 .quad sysc_done
904 .quad io_tif, io_restore 808 .quad io_tif
905cleanup_table_io_restore: 809 .quad io_restore
906 .quad io_restore, io_done 810 .quad io_done
907 811
908cleanup_critical: 812cleanup_critical:
909 clc 8(8,%r12),BASED(cleanup_table_system_call) 813 clg %r9,BASED(cleanup_table) # system_call
910 jl 0f 814 jl 0f
911 clc 8(8,%r12),BASED(cleanup_table_system_call+8) 815 clg %r9,BASED(cleanup_table+8) # sysc_do_svc
912 jl cleanup_system_call 816 jl cleanup_system_call
9130: 817 clg %r9,BASED(cleanup_table+16) # sysc_tif
914 clc 8(8,%r12),BASED(cleanup_table_sysc_tif)
915 jl 0f 818 jl 0f
916 clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8) 819 clg %r9,BASED(cleanup_table+24) # sysc_restore
917 jl cleanup_sysc_tif 820 jl cleanup_sysc_tif
9180: 821 clg %r9,BASED(cleanup_table+32) # sysc_done
919 clc 8(8,%r12),BASED(cleanup_table_sysc_restore)
920 jl 0f
921 clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8)
922 jl cleanup_sysc_restore 822 jl cleanup_sysc_restore
9230: 823 clg %r9,BASED(cleanup_table+40) # io_tif
924 clc 8(8,%r12),BASED(cleanup_table_io_tif)
925 jl 0f 824 jl 0f
926 clc 8(8,%r12),BASED(cleanup_table_io_tif+8) 825 clg %r9,BASED(cleanup_table+48) # io_restore
927 jl cleanup_io_tif 826 jl cleanup_io_tif
9280: 827 clg %r9,BASED(cleanup_table+56) # io_done
929 clc 8(8,%r12),BASED(cleanup_table_io_restore)
930 jl 0f
931 clc 8(8,%r12),BASED(cleanup_table_io_restore+8)
932 jl cleanup_io_restore 828 jl cleanup_io_restore
9330: 8290: br %r14
934 br %r14 830
935 831
936cleanup_system_call: 832cleanup_system_call:
937 mvc __LC_RETURN_PSW(16),0(%r12) 833 # check if stpt has been executed
938 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) 834 clg %r9,BASED(cleanup_system_call_insn)
939 jh 0f 835 jh 0f
940 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
941 cghi %r12,__LC_MCK_OLD_PSW
942 je 0f
943 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 836 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9440: cghi %r12,__LC_MCK_OLD_PSW 837 cghi %r11,__LC_SAVE_AREA_ASYNC
945 la %r12,__LC_SAVE_AREA+80
946 je 0f 838 je 0f
947 la %r12,__LC_SAVE_AREA+40 839 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
9480: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) 8400: # check if stmg has been executed
949 jhe cleanup_vtime 841 clg %r9,BASED(cleanup_system_call_insn+8)
950 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
951 jh 0f 842 jh 0f
952 mvc __LC_SAVE_AREA(40),0(%r12) 843 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
9530: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp 8440: # check if base register setup + TIF bit load has been done
954 aghi %r15,-SP_SIZE # make room for registers & psw 845 clg %r9,BASED(cleanup_system_call_insn+16)
955 stg %r15,32(%r12) 846 jhe 0f
956 stg %r11,0(%r12) 847 # set up saved registers r10 and r12
957 CREATE_STACK_FRAME __LC_SAVE_AREA 848 stg %r10,16(%r11) # r10 last break
958 mvc 8(8,%r12),__LC_THREAD_INFO 849 stg %r12,32(%r11) # r12 thread-info pointer
959 lg %r12,__LC_THREAD_INFO 8500: # check if the user time update has been done
960 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW 851 clg %r9,BASED(cleanup_system_call_insn+24)
961 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC 852 jh 0f
962 oi __TI_flags+7(%r12),_TIF_SYSCALL 853 lg %r15,__LC_EXIT_TIMER
963cleanup_vtime: 854 slg %r15,__LC_SYNC_ENTER_TIMER
964 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) 855 alg %r15,__LC_USER_TIMER
965 jhe cleanup_stime 856 stg %r15,__LC_USER_TIMER
966 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 8570: # check if the system time update has been done
967cleanup_stime: 858 clg %r9,BASED(cleanup_system_call_insn+32)
968 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) 859 jh 0f
969 jh cleanup_update 860 lg %r15,__LC_LAST_UPDATE_TIMER
970 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 861 slg %r15,__LC_EXIT_TIMER
971cleanup_update: 862 alg %r15,__LC_SYSTEM_TIMER
863 stg %r15,__LC_SYSTEM_TIMER
8640: # update accounting time stamp
972 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 865 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
973 srag %r12,%r11,23 866 # do LAST_BREAK
974 lg %r12,__LC_THREAD_INFO 867 lg %r9,16(%r11)
868 srag %r9,%r9,23
975 jz 0f 869 jz 0f
976 stg %r11,__TI_last_break(%r12) 870 mvc __TI_last_break(8,%r12),16(%r11)
9770: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) 8710: # set up saved register r11
978 la %r12,__LC_RETURN_PSW 872 lg %r15,__LC_KERNEL_STACK
873 aghi %r15,-__PT_SIZE
874 stg %r15,24(%r11) # r11 pt_regs pointer
875 # fill pt_regs
876 mvc __PT_R8(64,%r15),__LC_SAVE_AREA_SYNC
877 stmg %r0,%r7,__PT_R0(%r15)
878 mvc __PT_PSW(16,%r15),__LC_SVC_OLD_PSW
879 mvc __PT_INT_CODE(4,%r15),__LC_SVC_ILC
880 # setup saved register r15
881 aghi %r15,-STACK_FRAME_OVERHEAD
882 stg %r15,56(%r11) # r15 stack pointer
883 # set new psw address and exit
884 larl %r9,sysc_do_svc
979 br %r14 885 br %r14
980cleanup_system_call_insn: 886cleanup_system_call_insn:
981 .quad sysc_saveall
982 .quad system_call 887 .quad system_call
983 .quad sysc_vtime 888 .quad sysc_stmg
984 .quad sysc_stime 889 .quad sysc_per
985 .quad sysc_update 890 .quad sysc_vtime+18
891 .quad sysc_vtime+42
986 892
987cleanup_sysc_tif: 893cleanup_sysc_tif:
988 mvc __LC_RETURN_PSW(8),0(%r12) 894 larl %r9,sysc_tif
989 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif)
990 la %r12,__LC_RETURN_PSW
991 br %r14 895 br %r14
992 896
993cleanup_sysc_restore: 897cleanup_sysc_restore:
994 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn) 898 clg %r9,BASED(cleanup_sysc_restore_insn)
995 je 2f
996 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8)
997 jhe 0f
998 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
999 cghi %r12,__LC_MCK_OLD_PSW
1000 je 0f 899 je 0f
1001 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 900 lg %r9,24(%r11) # get saved pointer to pt_regs
10020: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 901 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1003 cghi %r12,__LC_MCK_OLD_PSW 902 mvc 0(64,%r11),__PT_R8(%r9)
1004 la %r12,__LC_SAVE_AREA+80 903 lmg %r0,%r7,__PT_R0(%r9)
1005 je 1f 9040: lmg %r8,%r9,__LC_RETURN_PSW
1006 la %r12,__LC_SAVE_AREA+40
10071: mvc 0(40,%r12),SP_R11(%r15)
1008 lmg %r0,%r10,SP_R0(%r15)
1009 lg %r15,SP_R15(%r15)
10102: la %r12,__LC_RETURN_PSW
1011 br %r14 905 br %r14
1012cleanup_sysc_restore_insn: 906cleanup_sysc_restore_insn:
1013 .quad sysc_done - 4 907 .quad sysc_done - 4
1014 .quad sysc_done - 16
1015 908
1016cleanup_io_tif: 909cleanup_io_tif:
1017 mvc __LC_RETURN_PSW(8),0(%r12) 910 larl %r9,io_tif
1018 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif)
1019 la %r12,__LC_RETURN_PSW
1020 br %r14 911 br %r14
1021 912
1022cleanup_io_restore: 913cleanup_io_restore:
1023 clc 8(8,%r12),BASED(cleanup_io_restore_insn) 914 clg %r9,BASED(cleanup_io_restore_insn)
1024 je 1f 915 je 0f
1025 clc 8(8,%r12),BASED(cleanup_io_restore_insn+8) 916 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1026 jhe 0f 917 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1027 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 918 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
10280: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 919 mvc 0(64,%r11),__PT_R8(%r9)
1029 mvc __LC_SAVE_AREA+80(40),SP_R11(%r15) 920 lmg %r0,%r7,__PT_R0(%r9)
1030 lmg %r0,%r10,SP_R0(%r15) 9210: lmg %r8,%r9,__LC_RETURN_PSW
1031 lg %r15,SP_R15(%r15)
10321: la %r12,__LC_RETURN_PSW
1033 br %r14 922 br %r14
1034cleanup_io_restore_insn: 923cleanup_io_restore_insn:
1035 .quad io_done - 4 924 .quad io_done - 4
1036 .quad io_done - 16
1037 925
1038/* 926/*
1039 * Integer constants 927 * Integer constants
1040 */ 928 */
1041 .align 4 929 .align 8
1042.Lcritical_start: 930.Lcritical_start:
1043 .quad __critical_start 931 .quad __critical_start
1044.Lcritical_end: 932.Lcritical_length:
1045 .quad __critical_end 933 .quad __critical_end - __critical_start
934
1046 935
1047#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) 936#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
1048/* 937/*
@@ -1054,6 +943,7 @@ ENTRY(sie64a)
1054 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 943 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
1055 stg %r2,__SF_EMPTY(%r15) # save control block pointer 944 stg %r2,__SF_EMPTY(%r15) # save control block pointer
1056 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 945 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
946 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # host id == 0
1057 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 947 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
1058 lg %r14,__LC_THREAD_INFO # pointer thread_info struct 948 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1059 oi __TI_flags+6(%r14),_TIF_SIE>>8 949 oi __TI_flags+6(%r14),_TIF_SIE>>8
@@ -1070,7 +960,7 @@ sie_gmap:
1070 SPP __SF_EMPTY(%r15) # set guest id 960 SPP __SF_EMPTY(%r15) # set guest id
1071 sie 0(%r14) 961 sie 0(%r14)
1072sie_done: 962sie_done:
1073 SPP __LC_CMF_HPP # set host id 963 SPP __SF_EMPTY+16(%r15) # set host id
1074 lg %r14,__LC_THREAD_INFO # pointer thread_info struct 964 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1075sie_exit: 965sie_exit:
1076 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 966 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
@@ -1093,8 +983,10 @@ sie_fault:
1093 .align 8 983 .align 8
1094.Lsie_loop: 984.Lsie_loop:
1095 .quad sie_loop 985 .quad sie_loop
1096.Lsie_done: 986.Lsie_length:
1097 .quad sie_done 987 .quad sie_done - sie_loop
988.Lhost_id:
989 .quad 0
1098 990
1099 .section __ex_table,"a" 991 .section __ex_table,"a"
1100 .quad sie_loop,sie_fault 992 .quad sie_loop,sie_fault
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 900068d2bf92..c27a0727f930 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -329,8 +329,8 @@ iplstart:
329# 329#
330# reset files in VM reader 330# reset files in VM reader
331# 331#
332 stidp __LC_SAVE_AREA # store cpuid 332 stidp __LC_SAVE_AREA_SYNC # store cpuid
333 tm __LC_SAVE_AREA,0xff # running VM ? 333 tm __LC_SAVE_AREA_SYNC,0xff# running VM ?
334 bno .Lnoreset 334 bno .Lnoreset
335 la %r2,.Lreset 335 la %r2,.Lreset
336 lhi %r3,26 336 lhi %r3,26
diff --git a/arch/s390/kernel/machine_kexec.c b/arch/s390/kernel/machine_kexec.c
index 3cd0f25ab015..47b168fb29c4 100644
--- a/arch/s390/kernel/machine_kexec.c
+++ b/arch/s390/kernel/machine_kexec.c
@@ -208,6 +208,7 @@ void machine_kexec_cleanup(struct kimage *image)
208void arch_crash_save_vmcoreinfo(void) 208void arch_crash_save_vmcoreinfo(void)
209{ 209{
210 VMCOREINFO_SYMBOL(lowcore_ptr); 210 VMCOREINFO_SYMBOL(lowcore_ptr);
211 VMCOREINFO_SYMBOL(high_memory);
211 VMCOREINFO_LENGTH(lowcore_ptr, NR_CPUS); 212 VMCOREINFO_LENGTH(lowcore_ptr, NR_CPUS);
212} 213}
213 214
diff --git a/arch/s390/kernel/mem_detect.c b/arch/s390/kernel/mem_detect.c
index 19b4568f4cee..22d502e885ed 100644
--- a/arch/s390/kernel/mem_detect.c
+++ b/arch/s390/kernel/mem_detect.c
@@ -64,70 +64,82 @@ void detect_memory_layout(struct mem_chunk chunk[])
64EXPORT_SYMBOL(detect_memory_layout); 64EXPORT_SYMBOL(detect_memory_layout);
65 65
66/* 66/*
67 * Move memory chunks array from index "from" to index "to"
68 */
69static void mem_chunk_move(struct mem_chunk chunk[], int to, int from)
70{
71 int cnt = MEMORY_CHUNKS - to;
72
73 memmove(&chunk[to], &chunk[from], cnt * sizeof(struct mem_chunk));
74}
75
76/*
77 * Initialize memory chunk
78 */
79static void mem_chunk_init(struct mem_chunk *chunk, unsigned long addr,
80 unsigned long size, int type)
81{
82 chunk->type = type;
83 chunk->addr = addr;
84 chunk->size = size;
85}
86
87/*
67 * Create memory hole with given address, size, and type 88 * Create memory hole with given address, size, and type
68 */ 89 */
69void create_mem_hole(struct mem_chunk chunks[], unsigned long addr, 90void create_mem_hole(struct mem_chunk chunk[], unsigned long addr,
70 unsigned long size, int type) 91 unsigned long size, int type)
71{ 92{
72 unsigned long start, end, new_size; 93 unsigned long lh_start, lh_end, lh_size, ch_start, ch_end, ch_size;
73 int i; 94 int i, ch_type;
74 95
75 for (i = 0; i < MEMORY_CHUNKS; i++) { 96 for (i = 0; i < MEMORY_CHUNKS; i++) {
76 if (chunks[i].size == 0) 97 if (chunk[i].size == 0)
77 continue;
78 if (addr + size < chunks[i].addr)
79 continue;
80 if (addr >= chunks[i].addr + chunks[i].size)
81 continue; 98 continue;
82 start = max(addr, chunks[i].addr); 99
83 end = min(addr + size, chunks[i].addr + chunks[i].size); 100 /* Define chunk properties */
84 new_size = end - start; 101 ch_start = chunk[i].addr;
85 if (new_size == 0) 102 ch_size = chunk[i].size;
86 continue; 103 ch_end = ch_start + ch_size - 1;
87 if (start == chunks[i].addr && 104 ch_type = chunk[i].type;
88 end == chunks[i].addr + chunks[i].size) { 105
89 /* Remove chunk */ 106 /* Is memory chunk hit by memory hole? */
90 chunks[i].type = type; 107 if (addr + size <= ch_start)
91 } else if (start == chunks[i].addr) { 108 continue; /* No: memory hole in front of chunk */
92 /* Make chunk smaller at start */ 109 if (addr > ch_end)
93 if (i >= MEMORY_CHUNKS - 1) 110 continue; /* No: memory hole after chunk */
94 panic("Unable to create memory hole"); 111
95 memmove(&chunks[i + 1], &chunks[i], 112 /* Yes: Define local hole properties */
96 sizeof(struct mem_chunk) * 113 lh_start = max(addr, chunk[i].addr);
97 (MEMORY_CHUNKS - (i + 1))); 114 lh_end = min(addr + size - 1, ch_end);
98 chunks[i + 1].addr = chunks[i].addr + new_size; 115 lh_size = lh_end - lh_start + 1;
99 chunks[i + 1].size = chunks[i].size - new_size; 116
100 chunks[i].size = new_size; 117 if (lh_start == ch_start && lh_end == ch_end) {
101 chunks[i].type = type; 118 /* Hole covers complete memory chunk */
102 i += 1; 119 mem_chunk_init(&chunk[i], lh_start, lh_size, type);
103 } else if (end == chunks[i].addr + chunks[i].size) { 120 } else if (lh_end == ch_end) {
104 /* Make chunk smaller at end */ 121 /* Hole starts in memory chunk and convers chunk end */
105 if (i >= MEMORY_CHUNKS - 1) 122 mem_chunk_move(chunk, i + 1, i);
106 panic("Unable to create memory hole"); 123 mem_chunk_init(&chunk[i], ch_start, ch_size - lh_size,
107 memmove(&chunks[i + 1], &chunks[i], 124 ch_type);
108 sizeof(struct mem_chunk) * 125 mem_chunk_init(&chunk[i + 1], lh_start, lh_size, type);
109 (MEMORY_CHUNKS - (i + 1)));
110 chunks[i + 1].addr = start;
111 chunks[i + 1].size = new_size;
112 chunks[i + 1].type = type;
113 chunks[i].size -= new_size;
114 i += 1; 126 i += 1;
127 } else if (lh_start == ch_start) {
128 /* Hole ends in memory chunk */
129 mem_chunk_move(chunk, i + 1, i);
130 mem_chunk_init(&chunk[i], lh_start, lh_size, type);
131 mem_chunk_init(&chunk[i + 1], lh_end + 1,
132 ch_size - lh_size, ch_type);
133 break;
115 } else { 134 } else {
116 /* Create memory hole */ 135 /* Hole splits memory chunk */
117 if (i >= MEMORY_CHUNKS - 2) 136 mem_chunk_move(chunk, i + 2, i);
118 panic("Unable to create memory hole"); 137 mem_chunk_init(&chunk[i], ch_start,
119 memmove(&chunks[i + 2], &chunks[i], 138 lh_start - ch_start, ch_type);
120 sizeof(struct mem_chunk) * 139 mem_chunk_init(&chunk[i + 1], lh_start, lh_size, type);
121 (MEMORY_CHUNKS - (i + 2))); 140 mem_chunk_init(&chunk[i + 2], lh_end + 1,
122 chunks[i + 1].addr = addr; 141 ch_end - lh_end, ch_type);
123 chunks[i + 1].size = size; 142 break;
124 chunks[i + 1].type = type;
125 chunks[i + 2].addr = addr + size;
126 chunks[i + 2].size =
127 chunks[i].addr + chunks[i].size - (addr + size);
128 chunks[i + 2].type = chunks[i].type;
129 chunks[i].size = addr - chunks[i].addr;
130 i += 2;
131 } 143 }
132 } 144 }
133} 145}
diff --git a/arch/s390/kernel/reipl64.S b/arch/s390/kernel/reipl64.S
index 732a793ec53a..36b32658fb24 100644
--- a/arch/s390/kernel/reipl64.S
+++ b/arch/s390/kernel/reipl64.S
@@ -17,11 +17,11 @@
17# 17#
18ENTRY(store_status) 18ENTRY(store_status)
19 /* Save register one and load save area base */ 19 /* Save register one and load save area base */
20 stg %r1,__LC_SAVE_AREA+120(%r0) 20 stg %r1,__LC_SAVE_AREA_RESTART
21 lghi %r1,SAVE_AREA_BASE 21 lghi %r1,SAVE_AREA_BASE
22 /* General purpose registers */ 22 /* General purpose registers */
23 stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1) 23 stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
24 lg %r2,__LC_SAVE_AREA+120(%r0) 24 lg %r2,__LC_SAVE_AREA_RESTART
25 stg %r2,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE+8(%r1) 25 stg %r2,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE+8(%r1)
26 /* Control registers */ 26 /* Control registers */
27 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-SAVE_AREA_BASE(%r1) 27 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index f11d1b037c50..354de0763eff 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -95,6 +95,15 @@ struct mem_chunk __initdata memory_chunk[MEMORY_CHUNKS];
95int __initdata memory_end_set; 95int __initdata memory_end_set;
96unsigned long __initdata memory_end; 96unsigned long __initdata memory_end;
97 97
98unsigned long VMALLOC_START;
99EXPORT_SYMBOL(VMALLOC_START);
100
101unsigned long VMALLOC_END;
102EXPORT_SYMBOL(VMALLOC_END);
103
104struct page *vmemmap;
105EXPORT_SYMBOL(vmemmap);
106
98/* An array with a pointer to the lowcore of every CPU. */ 107/* An array with a pointer to the lowcore of every CPU. */
99struct _lowcore *lowcore_ptr[NR_CPUS]; 108struct _lowcore *lowcore_ptr[NR_CPUS];
100EXPORT_SYMBOL(lowcore_ptr); 109EXPORT_SYMBOL(lowcore_ptr);
@@ -278,6 +287,15 @@ static int __init early_parse_mem(char *p)
278} 287}
279early_param("mem", early_parse_mem); 288early_param("mem", early_parse_mem);
280 289
290static int __init parse_vmalloc(char *arg)
291{
292 if (!arg)
293 return -EINVAL;
294 VMALLOC_END = (memparse(arg, &arg) + PAGE_SIZE - 1) & PAGE_MASK;
295 return 0;
296}
297early_param("vmalloc", parse_vmalloc);
298
281unsigned int user_mode = HOME_SPACE_MODE; 299unsigned int user_mode = HOME_SPACE_MODE;
282EXPORT_SYMBOL_GPL(user_mode); 300EXPORT_SYMBOL_GPL(user_mode);
283 301
@@ -383,7 +401,6 @@ setup_lowcore(void)
383 __ctl_set_bit(14, 29); 401 __ctl_set_bit(14, 29);
384 } 402 }
385#else 403#else
386 lc->cmf_hpp = -1ULL;
387 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; 404 lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
388#endif 405#endif
389 lc->sync_enter_timer = S390_lowcore.sync_enter_timer; 406 lc->sync_enter_timer = S390_lowcore.sync_enter_timer;
@@ -479,8 +496,7 @@ EXPORT_SYMBOL_GPL(real_memory_size);
479 496
480static void __init setup_memory_end(void) 497static void __init setup_memory_end(void)
481{ 498{
482 unsigned long memory_size; 499 unsigned long vmax, vmalloc_size, tmp;
483 unsigned long max_mem;
484 int i; 500 int i;
485 501
486 502
@@ -490,12 +506,9 @@ static void __init setup_memory_end(void)
490 memory_end_set = 1; 506 memory_end_set = 1;
491 } 507 }
492#endif 508#endif
493 memory_size = 0; 509 real_memory_size = 0;
494 memory_end &= PAGE_MASK; 510 memory_end &= PAGE_MASK;
495 511
496 max_mem = memory_end ? min(VMEM_MAX_PHYS, memory_end) : VMEM_MAX_PHYS;
497 memory_end = min(max_mem, memory_end);
498
499 /* 512 /*
500 * Make sure all chunks are MAX_ORDER aligned so we don't need the 513 * Make sure all chunks are MAX_ORDER aligned so we don't need the
501 * extra checks that HOLES_IN_ZONE would require. 514 * extra checks that HOLES_IN_ZONE would require.
@@ -515,23 +528,48 @@ static void __init setup_memory_end(void)
515 chunk->addr = start; 528 chunk->addr = start;
516 chunk->size = end - start; 529 chunk->size = end - start;
517 } 530 }
531 real_memory_size = max(real_memory_size,
532 chunk->addr + chunk->size);
518 } 533 }
519 534
535 /* Choose kernel address space layout: 2, 3, or 4 levels. */
536#ifdef CONFIG_64BIT
537 vmalloc_size = VMALLOC_END ?: 128UL << 30;
538 tmp = (memory_end ?: real_memory_size) / PAGE_SIZE;
539 tmp = tmp * (sizeof(struct page) + PAGE_SIZE) + vmalloc_size;
540 if (tmp <= (1UL << 42))
541 vmax = 1UL << 42; /* 3-level kernel page table */
542 else
543 vmax = 1UL << 53; /* 4-level kernel page table */
544#else
545 vmalloc_size = VMALLOC_END ?: 96UL << 20;
546 vmax = 1UL << 31; /* 2-level kernel page table */
547#endif
548 /* vmalloc area is at the end of the kernel address space. */
549 VMALLOC_END = vmax;
550 VMALLOC_START = vmax - vmalloc_size;
551
552 /* Split remaining virtual space between 1:1 mapping & vmemmap array */
553 tmp = VMALLOC_START / (PAGE_SIZE + sizeof(struct page));
554 tmp = VMALLOC_START - tmp * sizeof(struct page);
555 tmp &= ~((vmax >> 11) - 1); /* align to page table level */
556 tmp = min(tmp, 1UL << MAX_PHYSMEM_BITS);
557 vmemmap = (struct page *) tmp;
558
559 /* Take care that memory_end is set and <= vmemmap */
560 memory_end = min(memory_end ?: real_memory_size, tmp);
561
562 /* Fixup memory chunk array to fit into 0..memory_end */
520 for (i = 0; i < MEMORY_CHUNKS; i++) { 563 for (i = 0; i < MEMORY_CHUNKS; i++) {
521 struct mem_chunk *chunk = &memory_chunk[i]; 564 struct mem_chunk *chunk = &memory_chunk[i];
522 565
523 real_memory_size = max(real_memory_size, 566 if (chunk->addr >= memory_end) {
524 chunk->addr + chunk->size);
525 if (chunk->addr >= max_mem) {
526 memset(chunk, 0, sizeof(*chunk)); 567 memset(chunk, 0, sizeof(*chunk));
527 continue; 568 continue;
528 } 569 }
529 if (chunk->addr + chunk->size > max_mem) 570 if (chunk->addr + chunk->size > memory_end)
530 chunk->size = max_mem - chunk->addr; 571 chunk->size = memory_end - chunk->addr;
531 memory_size = max(memory_size, chunk->addr + chunk->size);
532 } 572 }
533 if (!memory_end)
534 memory_end = memory_size;
535} 573}
536 574
537void *restart_stack __attribute__((__section__(".data"))); 575void *restart_stack __attribute__((__section__(".data")));
@@ -655,7 +693,6 @@ static int __init verify_crash_base(unsigned long crash_base,
655static void __init reserve_kdump_bootmem(unsigned long addr, unsigned long size, 693static void __init reserve_kdump_bootmem(unsigned long addr, unsigned long size,
656 int type) 694 int type)
657{ 695{
658
659 create_mem_hole(memory_chunk, addr, size, type); 696 create_mem_hole(memory_chunk, addr, size, type);
660} 697}
661 698
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 7f6f9f354545..a8ba840294ff 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -302,9 +302,13 @@ static int setup_frame(int sig, struct k_sigaction *ka,
302 302
303 /* We forgot to include these in the sigcontext. 303 /* We forgot to include these in the sigcontext.
304 To avoid breaking binary compatibility, they are passed as args. */ 304 To avoid breaking binary compatibility, they are passed as args. */
305 regs->gprs[4] = current->thread.trap_no; 305 if (sig == SIGSEGV || sig == SIGBUS || sig == SIGILL ||
306 regs->gprs[5] = current->thread.prot_addr; 306 sig == SIGTRAP || sig == SIGFPE) {
307 regs->gprs[6] = task_thread_info(current)->last_break; 307 /* set extra registers only for synchronous signals */
308 regs->gprs[4] = regs->int_code & 127;
309 regs->gprs[5] = regs->int_parm_long;
310 regs->gprs[6] = task_thread_info(current)->last_break;
311 }
308 312
309 /* Place signal number on stack to allow backtrace from handler. */ 313 /* Place signal number on stack to allow backtrace from handler. */
310 if (__put_user(regs->gprs[2], (int __user *) &frame->signo)) 314 if (__put_user(regs->gprs[2], (int __user *) &frame->signo))
@@ -434,13 +438,13 @@ void do_signal(struct pt_regs *regs)
434 * call information. 438 * call information.
435 */ 439 */
436 current_thread_info()->system_call = 440 current_thread_info()->system_call =
437 test_thread_flag(TIF_SYSCALL) ? regs->svc_code : 0; 441 test_thread_flag(TIF_SYSCALL) ? regs->int_code : 0;
438 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 442 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
439 443
440 if (signr > 0) { 444 if (signr > 0) {
441 /* Whee! Actually deliver the signal. */ 445 /* Whee! Actually deliver the signal. */
442 if (current_thread_info()->system_call) { 446 if (current_thread_info()->system_call) {
443 regs->svc_code = current_thread_info()->system_call; 447 regs->int_code = current_thread_info()->system_call;
444 /* Check for system call restarting. */ 448 /* Check for system call restarting. */
445 switch (regs->gprs[2]) { 449 switch (regs->gprs[2]) {
446 case -ERESTART_RESTARTBLOCK: 450 case -ERESTART_RESTARTBLOCK:
@@ -457,7 +461,7 @@ void do_signal(struct pt_regs *regs)
457 regs->gprs[2] = regs->orig_gpr2; 461 regs->gprs[2] = regs->orig_gpr2;
458 regs->psw.addr = 462 regs->psw.addr =
459 __rewind_psw(regs->psw, 463 __rewind_psw(regs->psw,
460 regs->svc_code >> 16); 464 regs->int_code >> 16);
461 break; 465 break;
462 } 466 }
463 } 467 }
@@ -488,11 +492,11 @@ void do_signal(struct pt_regs *regs)
488 /* No handlers present - check for system call restart */ 492 /* No handlers present - check for system call restart */
489 clear_thread_flag(TIF_SYSCALL); 493 clear_thread_flag(TIF_SYSCALL);
490 if (current_thread_info()->system_call) { 494 if (current_thread_info()->system_call) {
491 regs->svc_code = current_thread_info()->system_call; 495 regs->int_code = current_thread_info()->system_call;
492 switch (regs->gprs[2]) { 496 switch (regs->gprs[2]) {
493 case -ERESTART_RESTARTBLOCK: 497 case -ERESTART_RESTARTBLOCK:
494 /* Restart with sys_restart_syscall */ 498 /* Restart with sys_restart_syscall */
495 regs->svc_code = __NR_restart_syscall; 499 regs->int_code = __NR_restart_syscall;
496 /* fallthrough */ 500 /* fallthrough */
497 case -ERESTARTNOHAND: 501 case -ERESTARTNOHAND:
498 case -ERESTARTSYS: 502 case -ERESTARTSYS:
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 66cca03c0282..2398ce6b15ae 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -69,9 +69,7 @@ enum s390_cpu_state {
69}; 69};
70 70
71DEFINE_MUTEX(smp_cpu_state_mutex); 71DEFINE_MUTEX(smp_cpu_state_mutex);
72int smp_cpu_polarization[NR_CPUS];
73static int smp_cpu_state[NR_CPUS]; 72static int smp_cpu_state[NR_CPUS];
74static int cpu_management;
75 73
76static DEFINE_PER_CPU(struct cpu, cpu_devices); 74static DEFINE_PER_CPU(struct cpu, cpu_devices);
77 75
@@ -149,29 +147,59 @@ void smp_switch_to_ipl_cpu(void (*func)(void *), void *data)
149 sp -= sizeof(struct pt_regs); 147 sp -= sizeof(struct pt_regs);
150 regs = (struct pt_regs *) sp; 148 regs = (struct pt_regs *) sp;
151 memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs)); 149 memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs));
152 regs->psw = lc->psw_save_area; 150 regs->psw = current_lc->psw_save_area;
153 sp -= STACK_FRAME_OVERHEAD; 151 sp -= STACK_FRAME_OVERHEAD;
154 sf = (struct stack_frame *) sp; 152 sf = (struct stack_frame *) sp;
155 sf->back_chain = regs->gprs[15]; 153 sf->back_chain = 0;
156 smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]); 154 smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]);
157} 155}
158 156
157static void smp_stop_cpu(void)
158{
159 while (sigp(smp_processor_id(), sigp_stop) == sigp_busy)
160 cpu_relax();
161}
162
159void smp_send_stop(void) 163void smp_send_stop(void)
160{ 164{
161 int cpu, rc; 165 cpumask_t cpumask;
166 int cpu;
167 u64 end;
162 168
163 /* Disable all interrupts/machine checks */ 169 /* Disable all interrupts/machine checks */
164 __load_psw_mask(psw_kernel_bits | PSW_MASK_DAT); 170 __load_psw_mask(psw_kernel_bits | PSW_MASK_DAT);
165 trace_hardirqs_off(); 171 trace_hardirqs_off();
166 172
167 /* stop all processors */ 173 cpumask_copy(&cpumask, cpu_online_mask);
168 for_each_online_cpu(cpu) { 174 cpumask_clear_cpu(smp_processor_id(), &cpumask);
169 if (cpu == smp_processor_id()) 175
170 continue; 176 if (oops_in_progress) {
171 do { 177 /*
172 rc = sigp(cpu, sigp_stop); 178 * Give the other cpus the opportunity to complete
173 } while (rc == sigp_busy); 179 * outstanding interrupts before stopping them.
180 */
181 end = get_clock() + (1000000UL << 12);
182 for_each_cpu(cpu, &cpumask) {
183 set_bit(ec_stop_cpu, (unsigned long *)
184 &lowcore_ptr[cpu]->ext_call_fast);
185 while (sigp(cpu, sigp_emergency_signal) == sigp_busy &&
186 get_clock() < end)
187 cpu_relax();
188 }
189 while (get_clock() < end) {
190 for_each_cpu(cpu, &cpumask)
191 if (cpu_stopped(cpu))
192 cpumask_clear_cpu(cpu, &cpumask);
193 if (cpumask_empty(&cpumask))
194 break;
195 cpu_relax();
196 }
197 }
174 198
199 /* stop all processors */
200 for_each_cpu(cpu, &cpumask) {
201 while (sigp(cpu, sigp_stop) == sigp_busy)
202 cpu_relax();
175 while (!cpu_stopped(cpu)) 203 while (!cpu_stopped(cpu))
176 cpu_relax(); 204 cpu_relax();
177 } 205 }
@@ -187,7 +215,7 @@ static void do_ext_call_interrupt(unsigned int ext_int_code,
187{ 215{
188 unsigned long bits; 216 unsigned long bits;
189 217
190 if (ext_int_code == 0x1202) 218 if ((ext_int_code & 0xffff) == 0x1202)
191 kstat_cpu(smp_processor_id()).irqs[EXTINT_EXC]++; 219 kstat_cpu(smp_processor_id()).irqs[EXTINT_EXC]++;
192 else 220 else
193 kstat_cpu(smp_processor_id()).irqs[EXTINT_EMS]++; 221 kstat_cpu(smp_processor_id()).irqs[EXTINT_EMS]++;
@@ -196,6 +224,9 @@ static void do_ext_call_interrupt(unsigned int ext_int_code,
196 */ 224 */
197 bits = xchg(&S390_lowcore.ext_call_fast, 0); 225 bits = xchg(&S390_lowcore.ext_call_fast, 0);
198 226
227 if (test_bit(ec_stop_cpu, &bits))
228 smp_stop_cpu();
229
199 if (test_bit(ec_schedule, &bits)) 230 if (test_bit(ec_schedule, &bits))
200 scheduler_ipi(); 231 scheduler_ipi();
201 232
@@ -204,6 +235,7 @@ static void do_ext_call_interrupt(unsigned int ext_int_code,
204 235
205 if (test_bit(ec_call_function_single, &bits)) 236 if (test_bit(ec_call_function_single, &bits))
206 generic_smp_call_function_single_interrupt(); 237 generic_smp_call_function_single_interrupt();
238
207} 239}
208 240
209/* 241/*
@@ -369,7 +401,7 @@ static int smp_rescan_cpus_sigp(cpumask_t avail)
369 if (cpu_known(cpu_id)) 401 if (cpu_known(cpu_id))
370 continue; 402 continue;
371 __cpu_logical_map[logical_cpu] = cpu_id; 403 __cpu_logical_map[logical_cpu] = cpu_id;
372 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; 404 cpu_set_polarization(logical_cpu, POLARIZATION_UNKNOWN);
373 if (!cpu_stopped(logical_cpu)) 405 if (!cpu_stopped(logical_cpu))
374 continue; 406 continue;
375 set_cpu_present(logical_cpu, true); 407 set_cpu_present(logical_cpu, true);
@@ -403,7 +435,7 @@ static int smp_rescan_cpus_sclp(cpumask_t avail)
403 if (cpu_known(cpu_id)) 435 if (cpu_known(cpu_id))
404 continue; 436 continue;
405 __cpu_logical_map[logical_cpu] = cpu_id; 437 __cpu_logical_map[logical_cpu] = cpu_id;
406 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN; 438 cpu_set_polarization(logical_cpu, POLARIZATION_UNKNOWN);
407 set_cpu_present(logical_cpu, true); 439 set_cpu_present(logical_cpu, true);
408 if (cpu >= info->configured) 440 if (cpu >= info->configured)
409 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; 441 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
@@ -656,7 +688,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
656 - sizeof(struct stack_frame)); 688 - sizeof(struct stack_frame));
657 memset(sf, 0, sizeof(struct stack_frame)); 689 memset(sf, 0, sizeof(struct stack_frame));
658 sf->gprs[9] = (unsigned long) sf; 690 sf->gprs[9] = (unsigned long) sf;
659 cpu_lowcore->save_area[15] = (unsigned long) sf; 691 cpu_lowcore->gpregs_save_area[15] = (unsigned long) sf;
660 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15); 692 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
661 atomic_inc(&init_mm.context.attach_count); 693 atomic_inc(&init_mm.context.attach_count);
662 asm volatile( 694 asm volatile(
@@ -806,7 +838,7 @@ void __init smp_prepare_boot_cpu(void)
806 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 838 S390_lowcore.percpu_offset = __per_cpu_offset[0];
807 current_set[0] = current; 839 current_set[0] = current;
808 smp_cpu_state[0] = CPU_STATE_CONFIGURED; 840 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
809 smp_cpu_polarization[0] = POLARIZATION_UNKNWN; 841 cpu_set_polarization(0, POLARIZATION_UNKNOWN);
810} 842}
811 843
812void __init smp_cpus_done(unsigned int max_cpus) 844void __init smp_cpus_done(unsigned int max_cpus)
@@ -868,7 +900,8 @@ static ssize_t cpu_configure_store(struct device *dev,
868 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); 900 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
869 if (!rc) { 901 if (!rc) {
870 smp_cpu_state[cpu] = CPU_STATE_STANDBY; 902 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
871 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; 903 cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
904 topology_expect_change();
872 } 905 }
873 } 906 }
874 break; 907 break;
@@ -877,7 +910,8 @@ static ssize_t cpu_configure_store(struct device *dev,
877 rc = sclp_cpu_configure(__cpu_logical_map[cpu]); 910 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
878 if (!rc) { 911 if (!rc) {
879 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; 912 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
880 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; 913 cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
914 topology_expect_change();
881 } 915 }
882 } 916 }
883 break; 917 break;
@@ -892,35 +926,6 @@ out:
892static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 926static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
893#endif /* CONFIG_HOTPLUG_CPU */ 927#endif /* CONFIG_HOTPLUG_CPU */
894 928
895static ssize_t cpu_polarization_show(struct device *dev,
896 struct device_attribute *attr, char *buf)
897{
898 int cpu = dev->id;
899 ssize_t count;
900
901 mutex_lock(&smp_cpu_state_mutex);
902 switch (smp_cpu_polarization[cpu]) {
903 case POLARIZATION_HRZ:
904 count = sprintf(buf, "horizontal\n");
905 break;
906 case POLARIZATION_VL:
907 count = sprintf(buf, "vertical:low\n");
908 break;
909 case POLARIZATION_VM:
910 count = sprintf(buf, "vertical:medium\n");
911 break;
912 case POLARIZATION_VH:
913 count = sprintf(buf, "vertical:high\n");
914 break;
915 default:
916 count = sprintf(buf, "unknown\n");
917 break;
918 }
919 mutex_unlock(&smp_cpu_state_mutex);
920 return count;
921}
922static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL);
923
924static ssize_t show_cpu_address(struct device *dev, 929static ssize_t show_cpu_address(struct device *dev,
925 struct device_attribute *attr, char *buf) 930 struct device_attribute *attr, char *buf)
926{ 931{
@@ -928,13 +933,11 @@ static ssize_t show_cpu_address(struct device *dev,
928} 933}
929static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 934static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
930 935
931
932static struct attribute *cpu_common_attrs[] = { 936static struct attribute *cpu_common_attrs[] = {
933#ifdef CONFIG_HOTPLUG_CPU 937#ifdef CONFIG_HOTPLUG_CPU
934 &dev_attr_configure.attr, 938 &dev_attr_configure.attr,
935#endif 939#endif
936 &dev_attr_address.attr, 940 &dev_attr_address.attr,
937 &dev_attr_polarization.attr,
938 NULL, 941 NULL,
939}; 942};
940 943
@@ -1055,11 +1058,20 @@ static int __devinit smp_add_present_cpu(int cpu)
1055 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1058 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1056 if (rc) 1059 if (rc)
1057 goto out_cpu; 1060 goto out_cpu;
1058 if (!cpu_online(cpu)) 1061 if (cpu_online(cpu)) {
1059 goto out; 1062 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1060 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1063 if (rc)
1061 if (!rc) 1064 goto out_online;
1062 return 0; 1065 }
1066 rc = topology_cpu_init(c);
1067 if (rc)
1068 goto out_topology;
1069 return 0;
1070
1071out_topology:
1072 if (cpu_online(cpu))
1073 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1074out_online:
1063 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1075 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1064out_cpu: 1076out_cpu:
1065#ifdef CONFIG_HOTPLUG_CPU 1077#ifdef CONFIG_HOTPLUG_CPU
@@ -1111,61 +1123,16 @@ static ssize_t __ref rescan_store(struct device *dev,
1111static DEVICE_ATTR(rescan, 0200, NULL, rescan_store); 1123static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
1112#endif /* CONFIG_HOTPLUG_CPU */ 1124#endif /* CONFIG_HOTPLUG_CPU */
1113 1125
1114static ssize_t dispatching_show(struct device *dev, 1126static int __init s390_smp_init(void)
1115 struct device_attribute *attr,
1116 char *buf)
1117{
1118 ssize_t count;
1119
1120 mutex_lock(&smp_cpu_state_mutex);
1121 count = sprintf(buf, "%d\n", cpu_management);
1122 mutex_unlock(&smp_cpu_state_mutex);
1123 return count;
1124}
1125
1126static ssize_t dispatching_store(struct device *dev,
1127 struct device_attribute *attr,
1128 const char *buf,
1129 size_t count)
1130{
1131 int val, rc;
1132 char delim;
1133
1134 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1135 return -EINVAL;
1136 if (val != 0 && val != 1)
1137 return -EINVAL;
1138 rc = 0;
1139 get_online_cpus();
1140 mutex_lock(&smp_cpu_state_mutex);
1141 if (cpu_management == val)
1142 goto out;
1143 rc = topology_set_cpu_management(val);
1144 if (!rc)
1145 cpu_management = val;
1146out:
1147 mutex_unlock(&smp_cpu_state_mutex);
1148 put_online_cpus();
1149 return rc ? rc : count;
1150}
1151static DEVICE_ATTR(dispatching, 0644, dispatching_show,
1152 dispatching_store);
1153
1154static int __init topology_init(void)
1155{ 1127{
1156 int cpu; 1128 int cpu, rc;
1157 int rc;
1158 1129
1159 register_cpu_notifier(&smp_cpu_nb); 1130 register_cpu_notifier(&smp_cpu_nb);
1160
1161#ifdef CONFIG_HOTPLUG_CPU 1131#ifdef CONFIG_HOTPLUG_CPU
1162 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1132 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1163 if (rc) 1133 if (rc)
1164 return rc; 1134 return rc;
1165#endif 1135#endif
1166 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching);
1167 if (rc)
1168 return rc;
1169 for_each_present_cpu(cpu) { 1136 for_each_present_cpu(cpu) {
1170 rc = smp_add_present_cpu(cpu); 1137 rc = smp_add_present_cpu(cpu);
1171 if (rc) 1138 if (rc)
@@ -1173,4 +1140,4 @@ static int __init topology_init(void)
1173 } 1140 }
1174 return 0; 1141 return 0;
1175} 1142}
1176subsys_initcall(topology_init); 1143subsys_initcall(s390_smp_init);
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index 476081440df9..78ea1948ff51 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -60,74 +60,22 @@ out:
60} 60}
61 61
62/* 62/*
63 * sys_ipc() is the de-multiplexer for the SysV IPC calls.. 63 * sys_ipc() is the de-multiplexer for the SysV IPC calls.
64 *
65 * This is really horribly ugly.
66 */ 64 */
67SYSCALL_DEFINE5(s390_ipc, uint, call, int, first, unsigned long, second, 65SYSCALL_DEFINE5(s390_ipc, uint, call, int, first, unsigned long, second,
68 unsigned long, third, void __user *, ptr) 66 unsigned long, third, void __user *, ptr)
69{ 67{
70 struct ipc_kludge tmp; 68 if (call >> 16)
71 int ret; 69 return -EINVAL;
72 70 /* The s390 sys_ipc variant has only five parameters instead of six
73 switch (call) { 71 * like the generic variant. The only difference is the handling of
74 case SEMOP: 72 * the SEMTIMEDOP subcall where on s390 the third parameter is used
75 return sys_semtimedop(first, (struct sembuf __user *)ptr, 73 * as a pointer to a struct timespec where the generic variant uses
76 (unsigned)second, NULL); 74 * the fifth parameter.
77 case SEMTIMEDOP: 75 * Therefore we can call the generic variant by simply passing the
78 return sys_semtimedop(first, (struct sembuf __user *)ptr, 76 * third parameter also as fifth parameter.
79 (unsigned)second, 77 */
80 (const struct timespec __user *) third); 78 return sys_ipc(call, first, second, third, ptr, third);
81 case SEMGET:
82 return sys_semget(first, (int)second, third);
83 case SEMCTL: {
84 union semun fourth;
85 if (!ptr)
86 return -EINVAL;
87 if (get_user(fourth.__pad, (void __user * __user *) ptr))
88 return -EFAULT;
89 return sys_semctl(first, (int)second, third, fourth);
90 }
91 case MSGSND:
92 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
93 (size_t)second, third);
94 break;
95 case MSGRCV:
96 if (!ptr)
97 return -EINVAL;
98 if (copy_from_user (&tmp, (struct ipc_kludge __user *) ptr,
99 sizeof (struct ipc_kludge)))
100 return -EFAULT;
101 return sys_msgrcv (first, tmp.msgp,
102 (size_t)second, tmp.msgtyp, third);
103 case MSGGET:
104 return sys_msgget((key_t)first, (int)second);
105 case MSGCTL:
106 return sys_msgctl(first, (int)second,
107 (struct msqid_ds __user *)ptr);
108
109 case SHMAT: {
110 ulong raddr;
111 ret = do_shmat(first, (char __user *)ptr,
112 (int)second, &raddr);
113 if (ret)
114 return ret;
115 return put_user (raddr, (ulong __user *) third);
116 break;
117 }
118 case SHMDT:
119 return sys_shmdt ((char __user *)ptr);
120 case SHMGET:
121 return sys_shmget(first, (size_t)second, third);
122 case SHMCTL:
123 return sys_shmctl(first, (int)second,
124 (struct shmid_ds __user *) ptr);
125 default:
126 return -ENOSYS;
127
128 }
129
130 return -EINVAL;
131} 79}
132 80
133#ifdef CONFIG_64BIT 81#ifdef CONFIG_64BIT
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 6e0e29b29a7b..7370a41948ca 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -1,22 +1,22 @@
1/* 1/*
2 * Copyright IBM Corp. 2007 2 * Copyright IBM Corp. 2007,2011
3 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> 3 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
4 */ 4 */
5 5
6#define KMSG_COMPONENT "cpu" 6#define KMSG_COMPONENT "cpu"
7#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 7#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
8 8
9#include <linux/kernel.h> 9#include <linux/workqueue.h>
10#include <linux/mm.h>
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/bootmem.h> 10#include <linux/bootmem.h>
11#include <linux/cpuset.h>
12#include <linux/device.h>
13#include <linux/kernel.h>
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <linux/workqueue.h> 15#include <linux/init.h>
16#include <linux/delay.h>
16#include <linux/cpu.h> 17#include <linux/cpu.h>
17#include <linux/smp.h> 18#include <linux/smp.h>
18#include <linux/cpuset.h> 19#include <linux/mm.h>
19#include <asm/delay.h>
20 20
21#define PTF_HORIZONTAL (0UL) 21#define PTF_HORIZONTAL (0UL)
22#define PTF_VERTICAL (1UL) 22#define PTF_VERTICAL (1UL)
@@ -31,7 +31,6 @@ struct mask_info {
31static int topology_enabled = 1; 31static int topology_enabled = 1;
32static void topology_work_fn(struct work_struct *work); 32static void topology_work_fn(struct work_struct *work);
33static struct sysinfo_15_1_x *tl_info; 33static struct sysinfo_15_1_x *tl_info;
34static struct timer_list topology_timer;
35static void set_topology_timer(void); 34static void set_topology_timer(void);
36static DECLARE_WORK(topology_work, topology_work_fn); 35static DECLARE_WORK(topology_work, topology_work_fn);
37/* topology_lock protects the core linked list */ 36/* topology_lock protects the core linked list */
@@ -41,11 +40,12 @@ static struct mask_info core_info;
41cpumask_t cpu_core_map[NR_CPUS]; 40cpumask_t cpu_core_map[NR_CPUS];
42unsigned char cpu_core_id[NR_CPUS]; 41unsigned char cpu_core_id[NR_CPUS];
43 42
44#ifdef CONFIG_SCHED_BOOK
45static struct mask_info book_info; 43static struct mask_info book_info;
46cpumask_t cpu_book_map[NR_CPUS]; 44cpumask_t cpu_book_map[NR_CPUS];
47unsigned char cpu_book_id[NR_CPUS]; 45unsigned char cpu_book_id[NR_CPUS];
48#endif 46
47/* smp_cpu_state_mutex must be held when accessing this array */
48int cpu_polarization[NR_CPUS];
49 49
50static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) 50static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu)
51{ 51{
@@ -71,7 +71,7 @@ static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu)
71static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu, 71static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
72 struct mask_info *book, 72 struct mask_info *book,
73 struct mask_info *core, 73 struct mask_info *core,
74 int z10) 74 int one_core_per_cpu)
75{ 75{
76 unsigned int cpu; 76 unsigned int cpu;
77 77
@@ -85,18 +85,16 @@ static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
85 for_each_present_cpu(lcpu) { 85 for_each_present_cpu(lcpu) {
86 if (cpu_logical_map(lcpu) != rcpu) 86 if (cpu_logical_map(lcpu) != rcpu)
87 continue; 87 continue;
88#ifdef CONFIG_SCHED_BOOK
89 cpumask_set_cpu(lcpu, &book->mask); 88 cpumask_set_cpu(lcpu, &book->mask);
90 cpu_book_id[lcpu] = book->id; 89 cpu_book_id[lcpu] = book->id;
91#endif
92 cpumask_set_cpu(lcpu, &core->mask); 90 cpumask_set_cpu(lcpu, &core->mask);
93 if (z10) { 91 if (one_core_per_cpu) {
94 cpu_core_id[lcpu] = rcpu; 92 cpu_core_id[lcpu] = rcpu;
95 core = core->next; 93 core = core->next;
96 } else { 94 } else {
97 cpu_core_id[lcpu] = core->id; 95 cpu_core_id[lcpu] = core->id;
98 } 96 }
99 smp_cpu_polarization[lcpu] = tl_cpu->pp; 97 cpu_set_polarization(lcpu, tl_cpu->pp);
100 } 98 }
101 } 99 }
102 return core; 100 return core;
@@ -111,13 +109,11 @@ static void clear_masks(void)
111 cpumask_clear(&info->mask); 109 cpumask_clear(&info->mask);
112 info = info->next; 110 info = info->next;
113 } 111 }
114#ifdef CONFIG_SCHED_BOOK
115 info = &book_info; 112 info = &book_info;
116 while (info) { 113 while (info) {
117 cpumask_clear(&info->mask); 114 cpumask_clear(&info->mask);
118 info = info->next; 115 info = info->next;
119 } 116 }
120#endif
121} 117}
122 118
123static union topology_entry *next_tle(union topology_entry *tle) 119static union topology_entry *next_tle(union topology_entry *tle)
@@ -127,66 +123,75 @@ static union topology_entry *next_tle(union topology_entry *tle)
127 return (union topology_entry *)((struct topology_container *)tle + 1); 123 return (union topology_entry *)((struct topology_container *)tle + 1);
128} 124}
129 125
130static void tl_to_cores(struct sysinfo_15_1_x *info) 126static void __tl_to_cores_generic(struct sysinfo_15_1_x *info)
131{ 127{
132#ifdef CONFIG_SCHED_BOOK
133 struct mask_info *book = &book_info;
134 struct cpuid cpu_id;
135#else
136 struct mask_info *book = NULL;
137#endif
138 struct mask_info *core = &core_info; 128 struct mask_info *core = &core_info;
129 struct mask_info *book = &book_info;
139 union topology_entry *tle, *end; 130 union topology_entry *tle, *end;
140 int z10 = 0;
141 131
142#ifdef CONFIG_SCHED_BOOK
143 get_cpu_id(&cpu_id);
144 z10 = cpu_id.machine == 0x2097 || cpu_id.machine == 0x2098;
145#endif
146 spin_lock_irq(&topology_lock);
147 clear_masks();
148 tle = info->tle; 132 tle = info->tle;
149 end = (union topology_entry *)((unsigned long)info + info->length); 133 end = (union topology_entry *)((unsigned long)info + info->length);
150 while (tle < end) { 134 while (tle < end) {
151#ifdef CONFIG_SCHED_BOOK
152 if (z10) {
153 switch (tle->nl) {
154 case 1:
155 book = book->next;
156 book->id = tle->container.id;
157 break;
158 case 0:
159 core = add_cpus_to_mask(&tle->cpu, book, core, z10);
160 break;
161 default:
162 clear_masks();
163 goto out;
164 }
165 tle = next_tle(tle);
166 continue;
167 }
168#endif
169 switch (tle->nl) { 135 switch (tle->nl) {
170#ifdef CONFIG_SCHED_BOOK
171 case 2: 136 case 2:
172 book = book->next; 137 book = book->next;
173 book->id = tle->container.id; 138 book->id = tle->container.id;
174 break; 139 break;
175#endif
176 case 1: 140 case 1:
177 core = core->next; 141 core = core->next;
178 core->id = tle->container.id; 142 core->id = tle->container.id;
179 break; 143 break;
180 case 0: 144 case 0:
181 add_cpus_to_mask(&tle->cpu, book, core, z10); 145 add_cpus_to_mask(&tle->cpu, book, core, 0);
182 break; 146 break;
183 default: 147 default:
184 clear_masks(); 148 clear_masks();
185 goto out; 149 return;
186 } 150 }
187 tle = next_tle(tle); 151 tle = next_tle(tle);
188 } 152 }
189out: 153}
154
155static void __tl_to_cores_z10(struct sysinfo_15_1_x *info)
156{
157 struct mask_info *core = &core_info;
158 struct mask_info *book = &book_info;
159 union topology_entry *tle, *end;
160
161 tle = info->tle;
162 end = (union topology_entry *)((unsigned long)info + info->length);
163 while (tle < end) {
164 switch (tle->nl) {
165 case 1:
166 book = book->next;
167 book->id = tle->container.id;
168 break;
169 case 0:
170 core = add_cpus_to_mask(&tle->cpu, book, core, 1);
171 break;
172 default:
173 clear_masks();
174 return;
175 }
176 tle = next_tle(tle);
177 }
178}
179
180static void tl_to_cores(struct sysinfo_15_1_x *info)
181{
182 struct cpuid cpu_id;
183
184 get_cpu_id(&cpu_id);
185 spin_lock_irq(&topology_lock);
186 clear_masks();
187 switch (cpu_id.machine) {
188 case 0x2097:
189 case 0x2098:
190 __tl_to_cores_z10(info);
191 break;
192 default:
193 __tl_to_cores_generic(info);
194 }
190 spin_unlock_irq(&topology_lock); 195 spin_unlock_irq(&topology_lock);
191} 196}
192 197
@@ -196,7 +201,7 @@ static void topology_update_polarization_simple(void)
196 201
197 mutex_lock(&smp_cpu_state_mutex); 202 mutex_lock(&smp_cpu_state_mutex);
198 for_each_possible_cpu(cpu) 203 for_each_possible_cpu(cpu)
199 smp_cpu_polarization[cpu] = POLARIZATION_HRZ; 204 cpu_set_polarization(cpu, POLARIZATION_HRZ);
200 mutex_unlock(&smp_cpu_state_mutex); 205 mutex_unlock(&smp_cpu_state_mutex);
201} 206}
202 207
@@ -215,8 +220,7 @@ static int ptf(unsigned long fc)
215 220
216int topology_set_cpu_management(int fc) 221int topology_set_cpu_management(int fc)
217{ 222{
218 int cpu; 223 int cpu, rc;
219 int rc;
220 224
221 if (!MACHINE_HAS_TOPOLOGY) 225 if (!MACHINE_HAS_TOPOLOGY)
222 return -EOPNOTSUPP; 226 return -EOPNOTSUPP;
@@ -227,7 +231,7 @@ int topology_set_cpu_management(int fc)
227 if (rc) 231 if (rc)
228 return -EBUSY; 232 return -EBUSY;
229 for_each_possible_cpu(cpu) 233 for_each_possible_cpu(cpu)
230 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; 234 cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
231 return rc; 235 return rc;
232} 236}
233 237
@@ -239,22 +243,18 @@ static void update_cpu_core_map(void)
239 spin_lock_irqsave(&topology_lock, flags); 243 spin_lock_irqsave(&topology_lock, flags);
240 for_each_possible_cpu(cpu) { 244 for_each_possible_cpu(cpu) {
241 cpu_core_map[cpu] = cpu_group_map(&core_info, cpu); 245 cpu_core_map[cpu] = cpu_group_map(&core_info, cpu);
242#ifdef CONFIG_SCHED_BOOK
243 cpu_book_map[cpu] = cpu_group_map(&book_info, cpu); 246 cpu_book_map[cpu] = cpu_group_map(&book_info, cpu);
244#endif
245 } 247 }
246 spin_unlock_irqrestore(&topology_lock, flags); 248 spin_unlock_irqrestore(&topology_lock, flags);
247} 249}
248 250
249void store_topology(struct sysinfo_15_1_x *info) 251void store_topology(struct sysinfo_15_1_x *info)
250{ 252{
251#ifdef CONFIG_SCHED_BOOK
252 int rc; 253 int rc;
253 254
254 rc = stsi(info, 15, 1, 3); 255 rc = stsi(info, 15, 1, 3);
255 if (rc != -ENOSYS) 256 if (rc != -ENOSYS)
256 return; 257 return;
257#endif
258 stsi(info, 15, 1, 2); 258 stsi(info, 15, 1, 2);
259} 259}
260 260
@@ -296,12 +296,30 @@ static void topology_timer_fn(unsigned long ignored)
296 set_topology_timer(); 296 set_topology_timer();
297} 297}
298 298
299static struct timer_list topology_timer =
300 TIMER_DEFERRED_INITIALIZER(topology_timer_fn, 0, 0);
301
302static atomic_t topology_poll = ATOMIC_INIT(0);
303
299static void set_topology_timer(void) 304static void set_topology_timer(void)
300{ 305{
301 topology_timer.function = topology_timer_fn; 306 if (atomic_add_unless(&topology_poll, -1, 0))
302 topology_timer.data = 0; 307 mod_timer(&topology_timer, jiffies + HZ / 10);
303 topology_timer.expires = jiffies + 60 * HZ; 308 else
304 add_timer(&topology_timer); 309 mod_timer(&topology_timer, jiffies + HZ * 60);
310}
311
312void topology_expect_change(void)
313{
314 if (!MACHINE_HAS_TOPOLOGY)
315 return;
316 /* This is racy, but it doesn't matter since it is just a heuristic.
317 * Worst case is that we poll in a higher frequency for a bit longer.
318 */
319 if (atomic_read(&topology_poll) > 60)
320 return;
321 atomic_add(60, &topology_poll);
322 set_topology_timer();
305} 323}
306 324
307static int __init early_parse_topology(char *p) 325static int __init early_parse_topology(char *p)
@@ -313,23 +331,6 @@ static int __init early_parse_topology(char *p)
313} 331}
314early_param("topology", early_parse_topology); 332early_param("topology", early_parse_topology);
315 333
316static int __init init_topology_update(void)
317{
318 int rc;
319
320 rc = 0;
321 if (!MACHINE_HAS_TOPOLOGY) {
322 topology_update_polarization_simple();
323 goto out;
324 }
325 init_timer_deferrable(&topology_timer);
326 set_topology_timer();
327out:
328 update_cpu_core_map();
329 return rc;
330}
331__initcall(init_topology_update);
332
333static void __init alloc_masks(struct sysinfo_15_1_x *info, 334static void __init alloc_masks(struct sysinfo_15_1_x *info,
334 struct mask_info *mask, int offset) 335 struct mask_info *mask, int offset)
335{ 336{
@@ -357,10 +358,108 @@ void __init s390_init_cpu_topology(void)
357 store_topology(info); 358 store_topology(info);
358 pr_info("The CPU configuration topology of the machine is:"); 359 pr_info("The CPU configuration topology of the machine is:");
359 for (i = 0; i < TOPOLOGY_NR_MAG; i++) 360 for (i = 0; i < TOPOLOGY_NR_MAG; i++)
360 printk(" %d", info->mag[i]); 361 printk(KERN_CONT " %d", info->mag[i]);
361 printk(" / %d\n", info->mnest); 362 printk(KERN_CONT " / %d\n", info->mnest);
362 alloc_masks(info, &core_info, 1); 363 alloc_masks(info, &core_info, 1);
363#ifdef CONFIG_SCHED_BOOK
364 alloc_masks(info, &book_info, 2); 364 alloc_masks(info, &book_info, 2);
365#endif
366} 365}
366
367static int cpu_management;
368
369static ssize_t dispatching_show(struct device *dev,
370 struct device_attribute *attr,
371 char *buf)
372{
373 ssize_t count;
374
375 mutex_lock(&smp_cpu_state_mutex);
376 count = sprintf(buf, "%d\n", cpu_management);
377 mutex_unlock(&smp_cpu_state_mutex);
378 return count;
379}
380
381static ssize_t dispatching_store(struct device *dev,
382 struct device_attribute *attr,
383 const char *buf,
384 size_t count)
385{
386 int val, rc;
387 char delim;
388
389 if (sscanf(buf, "%d %c", &val, &delim) != 1)
390 return -EINVAL;
391 if (val != 0 && val != 1)
392 return -EINVAL;
393 rc = 0;
394 get_online_cpus();
395 mutex_lock(&smp_cpu_state_mutex);
396 if (cpu_management == val)
397 goto out;
398 rc = topology_set_cpu_management(val);
399 if (rc)
400 goto out;
401 cpu_management = val;
402 topology_expect_change();
403out:
404 mutex_unlock(&smp_cpu_state_mutex);
405 put_online_cpus();
406 return rc ? rc : count;
407}
408static DEVICE_ATTR(dispatching, 0644, dispatching_show,
409 dispatching_store);
410
411static ssize_t cpu_polarization_show(struct device *dev,
412 struct device_attribute *attr, char *buf)
413{
414 int cpu = dev->id;
415 ssize_t count;
416
417 mutex_lock(&smp_cpu_state_mutex);
418 switch (cpu_read_polarization(cpu)) {
419 case POLARIZATION_HRZ:
420 count = sprintf(buf, "horizontal\n");
421 break;
422 case POLARIZATION_VL:
423 count = sprintf(buf, "vertical:low\n");
424 break;
425 case POLARIZATION_VM:
426 count = sprintf(buf, "vertical:medium\n");
427 break;
428 case POLARIZATION_VH:
429 count = sprintf(buf, "vertical:high\n");
430 break;
431 default:
432 count = sprintf(buf, "unknown\n");
433 break;
434 }
435 mutex_unlock(&smp_cpu_state_mutex);
436 return count;
437}
438static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL);
439
440static struct attribute *topology_cpu_attrs[] = {
441 &dev_attr_polarization.attr,
442 NULL,
443};
444
445static struct attribute_group topology_cpu_attr_group = {
446 .attrs = topology_cpu_attrs,
447};
448
449int topology_cpu_init(struct cpu *cpu)
450{
451 return sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group);
452}
453
454static int __init topology_init(void)
455{
456 if (!MACHINE_HAS_TOPOLOGY) {
457 topology_update_polarization_simple();
458 goto out;
459 }
460 set_topology_timer();
461out:
462 update_cpu_core_map();
463 return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching);
464}
465device_initcall(topology_init);
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index a9807dd86276..5ce3750b181f 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -43,9 +43,9 @@
43#include <asm/debug.h> 43#include <asm/debug.h>
44#include "entry.h" 44#include "entry.h"
45 45
46void (*pgm_check_table[128])(struct pt_regs *, long, unsigned long); 46void (*pgm_check_table[128])(struct pt_regs *regs);
47 47
48int show_unhandled_signals; 48int show_unhandled_signals = 1;
49 49
50#define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; }) 50#define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
51 51
@@ -234,7 +234,7 @@ void show_regs(struct pt_regs *regs)
234 234
235static DEFINE_SPINLOCK(die_lock); 235static DEFINE_SPINLOCK(die_lock);
236 236
237void die(const char * str, struct pt_regs * regs, long err) 237void die(struct pt_regs *regs, const char *str)
238{ 238{
239 static int die_counter; 239 static int die_counter;
240 240
@@ -243,7 +243,7 @@ void die(const char * str, struct pt_regs * regs, long err)
243 console_verbose(); 243 console_verbose();
244 spin_lock_irq(&die_lock); 244 spin_lock_irq(&die_lock);
245 bust_spinlocks(1); 245 bust_spinlocks(1);
246 printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter); 246 printk("%s: %04x [#%d] ", str, regs->int_code & 0xffff, ++die_counter);
247#ifdef CONFIG_PREEMPT 247#ifdef CONFIG_PREEMPT
248 printk("PREEMPT "); 248 printk("PREEMPT ");
249#endif 249#endif
@@ -254,7 +254,7 @@ void die(const char * str, struct pt_regs * regs, long err)
254 printk("DEBUG_PAGEALLOC"); 254 printk("DEBUG_PAGEALLOC");
255#endif 255#endif
256 printk("\n"); 256 printk("\n");
257 notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV); 257 notify_die(DIE_OOPS, str, regs, 0, regs->int_code & 0xffff, SIGSEGV);
258 show_regs(regs); 258 show_regs(regs);
259 bust_spinlocks(0); 259 bust_spinlocks(0);
260 add_taint(TAINT_DIE); 260 add_taint(TAINT_DIE);
@@ -267,8 +267,7 @@ void die(const char * str, struct pt_regs * regs, long err)
267 do_exit(SIGSEGV); 267 do_exit(SIGSEGV);
268} 268}
269 269
270static void inline report_user_fault(struct pt_regs *regs, long int_code, 270static inline void report_user_fault(struct pt_regs *regs, int signr)
271 int signr)
272{ 271{
273 if ((task_pid_nr(current) > 1) && !show_unhandled_signals) 272 if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
274 return; 273 return;
@@ -276,7 +275,7 @@ static void inline report_user_fault(struct pt_regs *regs, long int_code,
276 return; 275 return;
277 if (!printk_ratelimit()) 276 if (!printk_ratelimit())
278 return; 277 return;
279 printk("User process fault: interruption code 0x%lX ", int_code); 278 printk("User process fault: interruption code 0x%X ", regs->int_code);
280 print_vma_addr("in ", regs->psw.addr & PSW_ADDR_INSN); 279 print_vma_addr("in ", regs->psw.addr & PSW_ADDR_INSN);
281 printk("\n"); 280 printk("\n");
282 show_regs(regs); 281 show_regs(regs);
@@ -287,19 +286,28 @@ int is_valid_bugaddr(unsigned long addr)
287 return 1; 286 return 1;
288} 287}
289 288
290static inline void __kprobes do_trap(long pgm_int_code, int signr, char *str, 289static inline void __user *get_psw_address(struct pt_regs *regs)
291 struct pt_regs *regs, siginfo_t *info)
292{ 290{
293 if (notify_die(DIE_TRAP, str, regs, pgm_int_code, 291 return (void __user *)
294 pgm_int_code, signr) == NOTIFY_STOP) 292 ((regs->psw.addr - (regs->int_code >> 16)) & PSW_ADDR_INSN);
293}
294
295static void __kprobes do_trap(struct pt_regs *regs,
296 int si_signo, int si_code, char *str)
297{
298 siginfo_t info;
299
300 if (notify_die(DIE_TRAP, str, regs, 0,
301 regs->int_code, si_signo) == NOTIFY_STOP)
295 return; 302 return;
296 303
297 if (regs->psw.mask & PSW_MASK_PSTATE) { 304 if (regs->psw.mask & PSW_MASK_PSTATE) {
298 struct task_struct *tsk = current; 305 info.si_signo = si_signo;
299 306 info.si_errno = 0;
300 tsk->thread.trap_no = pgm_int_code & 0xffff; 307 info.si_code = si_code;
301 force_sig_info(signr, info, tsk); 308 info.si_addr = get_psw_address(regs);
302 report_user_fault(regs, pgm_int_code, signr); 309 force_sig_info(si_signo, &info, current);
310 report_user_fault(regs, si_signo);
303 } else { 311 } else {
304 const struct exception_table_entry *fixup; 312 const struct exception_table_entry *fixup;
305 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN); 313 fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
@@ -311,18 +319,11 @@ static inline void __kprobes do_trap(long pgm_int_code, int signr, char *str,
311 btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs); 319 btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
312 if (btt == BUG_TRAP_TYPE_WARN) 320 if (btt == BUG_TRAP_TYPE_WARN)
313 return; 321 return;
314 die(str, regs, pgm_int_code); 322 die(regs, str);
315 } 323 }
316 } 324 }
317} 325}
318 326
319static inline void __user *get_psw_address(struct pt_regs *regs,
320 long pgm_int_code)
321{
322 return (void __user *)
323 ((regs->psw.addr - (pgm_int_code >> 16)) & PSW_ADDR_INSN);
324}
325
326void __kprobes do_per_trap(struct pt_regs *regs) 327void __kprobes do_per_trap(struct pt_regs *regs)
327{ 328{
328 siginfo_t info; 329 siginfo_t info;
@@ -339,26 +340,19 @@ void __kprobes do_per_trap(struct pt_regs *regs)
339 force_sig_info(SIGTRAP, &info, current); 340 force_sig_info(SIGTRAP, &info, current);
340} 341}
341 342
342static void default_trap_handler(struct pt_regs *regs, long pgm_int_code, 343static void default_trap_handler(struct pt_regs *regs)
343 unsigned long trans_exc_code)
344{ 344{
345 if (regs->psw.mask & PSW_MASK_PSTATE) { 345 if (regs->psw.mask & PSW_MASK_PSTATE) {
346 report_user_fault(regs, pgm_int_code, SIGSEGV); 346 report_user_fault(regs, SIGSEGV);
347 do_exit(SIGSEGV); 347 do_exit(SIGSEGV);
348 } else 348 } else
349 die("Unknown program exception", regs, pgm_int_code); 349 die(regs, "Unknown program exception");
350} 350}
351 351
352#define DO_ERROR_INFO(name, signr, sicode, str) \ 352#define DO_ERROR_INFO(name, signr, sicode, str) \
353static void name(struct pt_regs *regs, long pgm_int_code, \ 353static void name(struct pt_regs *regs) \
354 unsigned long trans_exc_code) \
355{ \ 354{ \
356 siginfo_t info; \ 355 do_trap(regs, signr, sicode, str); \
357 info.si_signo = signr; \
358 info.si_errno = 0; \
359 info.si_code = sicode; \
360 info.si_addr = get_psw_address(regs, pgm_int_code); \
361 do_trap(pgm_int_code, signr, str, regs, &info); \
362} 356}
363 357
364DO_ERROR_INFO(addressing_exception, SIGILL, ILL_ILLADR, 358DO_ERROR_INFO(addressing_exception, SIGILL, ILL_ILLADR,
@@ -388,42 +382,34 @@ DO_ERROR_INFO(special_op_exception, SIGILL, ILL_ILLOPN,
388DO_ERROR_INFO(translation_exception, SIGILL, ILL_ILLOPN, 382DO_ERROR_INFO(translation_exception, SIGILL, ILL_ILLOPN,
389 "translation exception") 383 "translation exception")
390 384
391static inline void do_fp_trap(struct pt_regs *regs, void __user *location, 385static inline void do_fp_trap(struct pt_regs *regs, int fpc)
392 int fpc, long pgm_int_code)
393{ 386{
394 siginfo_t si; 387 int si_code = 0;
395
396 si.si_signo = SIGFPE;
397 si.si_errno = 0;
398 si.si_addr = location;
399 si.si_code = 0;
400 /* FPC[2] is Data Exception Code */ 388 /* FPC[2] is Data Exception Code */
401 if ((fpc & 0x00000300) == 0) { 389 if ((fpc & 0x00000300) == 0) {
402 /* bits 6 and 7 of DXC are 0 iff IEEE exception */ 390 /* bits 6 and 7 of DXC are 0 iff IEEE exception */
403 if (fpc & 0x8000) /* invalid fp operation */ 391 if (fpc & 0x8000) /* invalid fp operation */
404 si.si_code = FPE_FLTINV; 392 si_code = FPE_FLTINV;
405 else if (fpc & 0x4000) /* div by 0 */ 393 else if (fpc & 0x4000) /* div by 0 */
406 si.si_code = FPE_FLTDIV; 394 si_code = FPE_FLTDIV;
407 else if (fpc & 0x2000) /* overflow */ 395 else if (fpc & 0x2000) /* overflow */
408 si.si_code = FPE_FLTOVF; 396 si_code = FPE_FLTOVF;
409 else if (fpc & 0x1000) /* underflow */ 397 else if (fpc & 0x1000) /* underflow */
410 si.si_code = FPE_FLTUND; 398 si_code = FPE_FLTUND;
411 else if (fpc & 0x0800) /* inexact */ 399 else if (fpc & 0x0800) /* inexact */
412 si.si_code = FPE_FLTRES; 400 si_code = FPE_FLTRES;
413 } 401 }
414 do_trap(pgm_int_code, SIGFPE, 402 do_trap(regs, SIGFPE, si_code, "floating point exception");
415 "floating point exception", regs, &si);
416} 403}
417 404
418static void __kprobes illegal_op(struct pt_regs *regs, long pgm_int_code, 405static void __kprobes illegal_op(struct pt_regs *regs)
419 unsigned long trans_exc_code)
420{ 406{
421 siginfo_t info; 407 siginfo_t info;
422 __u8 opcode[6]; 408 __u8 opcode[6];
423 __u16 __user *location; 409 __u16 __user *location;
424 int signal = 0; 410 int signal = 0;
425 411
426 location = get_psw_address(regs, pgm_int_code); 412 location = get_psw_address(regs);
427 413
428 if (regs->psw.mask & PSW_MASK_PSTATE) { 414 if (regs->psw.mask & PSW_MASK_PSTATE) {
429 if (get_user(*((__u16 *) opcode), (__u16 __user *) location)) 415 if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
@@ -467,44 +453,31 @@ static void __kprobes illegal_op(struct pt_regs *regs, long pgm_int_code,
467 * If we get an illegal op in kernel mode, send it through the 453 * If we get an illegal op in kernel mode, send it through the
468 * kprobes notifier. If kprobes doesn't pick it up, SIGILL 454 * kprobes notifier. If kprobes doesn't pick it up, SIGILL
469 */ 455 */
470 if (notify_die(DIE_BPT, "bpt", regs, pgm_int_code, 456 if (notify_die(DIE_BPT, "bpt", regs, 0,
471 3, SIGTRAP) != NOTIFY_STOP) 457 3, SIGTRAP) != NOTIFY_STOP)
472 signal = SIGILL; 458 signal = SIGILL;
473 } 459 }
474 460
475#ifdef CONFIG_MATHEMU 461#ifdef CONFIG_MATHEMU
476 if (signal == SIGFPE) 462 if (signal == SIGFPE)
477 do_fp_trap(regs, location, 463 do_fp_trap(regs, current->thread.fp_regs.fpc);
478 current->thread.fp_regs.fpc, pgm_int_code); 464 else if (signal == SIGSEGV)
479 else if (signal == SIGSEGV) { 465 do_trap(regs, signal, SEGV_MAPERR, "user address fault");
480 info.si_signo = signal; 466 else
481 info.si_errno = 0;
482 info.si_code = SEGV_MAPERR;
483 info.si_addr = (void __user *) location;
484 do_trap(pgm_int_code, signal,
485 "user address fault", regs, &info);
486 } else
487#endif 467#endif
488 if (signal) { 468 if (signal)
489 info.si_signo = signal; 469 do_trap(regs, signal, ILL_ILLOPC, "illegal operation");
490 info.si_errno = 0;
491 info.si_code = ILL_ILLOPC;
492 info.si_addr = (void __user *) location;
493 do_trap(pgm_int_code, signal,
494 "illegal operation", regs, &info);
495 }
496} 470}
497 471
498 472
499#ifdef CONFIG_MATHEMU 473#ifdef CONFIG_MATHEMU
500void specification_exception(struct pt_regs *regs, long pgm_int_code, 474void specification_exception(struct pt_regs *regs)
501 unsigned long trans_exc_code)
502{ 475{
503 __u8 opcode[6]; 476 __u8 opcode[6];
504 __u16 __user *location = NULL; 477 __u16 __user *location = NULL;
505 int signal = 0; 478 int signal = 0;
506 479
507 location = (__u16 __user *) get_psw_address(regs, pgm_int_code); 480 location = (__u16 __user *) get_psw_address(regs);
508 481
509 if (regs->psw.mask & PSW_MASK_PSTATE) { 482 if (regs->psw.mask & PSW_MASK_PSTATE) {
510 get_user(*((__u16 *) opcode), location); 483 get_user(*((__u16 *) opcode), location);
@@ -539,30 +512,21 @@ void specification_exception(struct pt_regs *regs, long pgm_int_code,
539 signal = SIGILL; 512 signal = SIGILL;
540 513
541 if (signal == SIGFPE) 514 if (signal == SIGFPE)
542 do_fp_trap(regs, location, 515 do_fp_trap(regs, current->thread.fp_regs.fpc);
543 current->thread.fp_regs.fpc, pgm_int_code); 516 else if (signal)
544 else if (signal) { 517 do_trap(regs, signal, ILL_ILLOPN, "specification exception");
545 siginfo_t info;
546 info.si_signo = signal;
547 info.si_errno = 0;
548 info.si_code = ILL_ILLOPN;
549 info.si_addr = location;
550 do_trap(pgm_int_code, signal,
551 "specification exception", regs, &info);
552 }
553} 518}
554#else 519#else
555DO_ERROR_INFO(specification_exception, SIGILL, ILL_ILLOPN, 520DO_ERROR_INFO(specification_exception, SIGILL, ILL_ILLOPN,
556 "specification exception"); 521 "specification exception");
557#endif 522#endif
558 523
559static void data_exception(struct pt_regs *regs, long pgm_int_code, 524static void data_exception(struct pt_regs *regs)
560 unsigned long trans_exc_code)
561{ 525{
562 __u16 __user *location; 526 __u16 __user *location;
563 int signal = 0; 527 int signal = 0;
564 528
565 location = get_psw_address(regs, pgm_int_code); 529 location = get_psw_address(regs);
566 530
567 if (MACHINE_HAS_IEEE) 531 if (MACHINE_HAS_IEEE)
568 asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc)); 532 asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
@@ -627,32 +591,18 @@ static void data_exception(struct pt_regs *regs, long pgm_int_code,
627 else 591 else
628 signal = SIGILL; 592 signal = SIGILL;
629 if (signal == SIGFPE) 593 if (signal == SIGFPE)
630 do_fp_trap(regs, location, 594 do_fp_trap(regs, current->thread.fp_regs.fpc);
631 current->thread.fp_regs.fpc, pgm_int_code); 595 else if (signal)
632 else if (signal) { 596 do_trap(regs, signal, ILL_ILLOPN, "data exception");
633 siginfo_t info;
634 info.si_signo = signal;
635 info.si_errno = 0;
636 info.si_code = ILL_ILLOPN;
637 info.si_addr = location;
638 do_trap(pgm_int_code, signal, "data exception", regs, &info);
639 }
640} 597}
641 598
642static void space_switch_exception(struct pt_regs *regs, long pgm_int_code, 599static void space_switch_exception(struct pt_regs *regs)
643 unsigned long trans_exc_code)
644{ 600{
645 siginfo_t info;
646
647 /* Set user psw back to home space mode. */ 601 /* Set user psw back to home space mode. */
648 if (regs->psw.mask & PSW_MASK_PSTATE) 602 if (regs->psw.mask & PSW_MASK_PSTATE)
649 regs->psw.mask |= PSW_ASC_HOME; 603 regs->psw.mask |= PSW_ASC_HOME;
650 /* Send SIGILL. */ 604 /* Send SIGILL. */
651 info.si_signo = SIGILL; 605 do_trap(regs, SIGILL, ILL_PRVOPC, "space switch event");
652 info.si_errno = 0;
653 info.si_code = ILL_PRVOPC;
654 info.si_addr = get_psw_address(regs, pgm_int_code);
655 do_trap(pgm_int_code, SIGILL, "space switch event", regs, &info);
656} 606}
657 607
658void __kprobes kernel_stack_overflow(struct pt_regs * regs) 608void __kprobes kernel_stack_overflow(struct pt_regs * regs)
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index a9a301866b3c..354dd39073ef 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -125,8 +125,7 @@ static inline int user_space_fault(unsigned long trans_exc_code)
125 return trans_exc_code != 3; 125 return trans_exc_code != 3;
126} 126}
127 127
128static inline void report_user_fault(struct pt_regs *regs, long int_code, 128static inline void report_user_fault(struct pt_regs *regs, long signr)
129 int signr, unsigned long address)
130{ 129{
131 if ((task_pid_nr(current) > 1) && !show_unhandled_signals) 130 if ((task_pid_nr(current) > 1) && !show_unhandled_signals)
132 return; 131 return;
@@ -134,10 +133,12 @@ static inline void report_user_fault(struct pt_regs *regs, long int_code,
134 return; 133 return;
135 if (!printk_ratelimit()) 134 if (!printk_ratelimit())
136 return; 135 return;
137 printk("User process fault: interruption code 0x%lX ", int_code); 136 printk(KERN_ALERT "User process fault: interruption code 0x%X ",
137 regs->int_code);
138 print_vma_addr(KERN_CONT "in ", regs->psw.addr & PSW_ADDR_INSN); 138 print_vma_addr(KERN_CONT "in ", regs->psw.addr & PSW_ADDR_INSN);
139 printk("\n"); 139 printk(KERN_CONT "\n");
140 printk("failing address: %lX\n", address); 140 printk(KERN_ALERT "failing address: %lX\n",
141 regs->int_parm_long & __FAIL_ADDR_MASK);
141 show_regs(regs); 142 show_regs(regs);
142} 143}
143 144
@@ -145,24 +146,18 @@ static inline void report_user_fault(struct pt_regs *regs, long int_code,
145 * Send SIGSEGV to task. This is an external routine 146 * Send SIGSEGV to task. This is an external routine
146 * to keep the stack usage of do_page_fault small. 147 * to keep the stack usage of do_page_fault small.
147 */ 148 */
148static noinline void do_sigsegv(struct pt_regs *regs, long int_code, 149static noinline void do_sigsegv(struct pt_regs *regs, int si_code)
149 int si_code, unsigned long trans_exc_code)
150{ 150{
151 struct siginfo si; 151 struct siginfo si;
152 unsigned long address;
153 152
154 address = trans_exc_code & __FAIL_ADDR_MASK; 153 report_user_fault(regs, SIGSEGV);
155 current->thread.prot_addr = address;
156 current->thread.trap_no = int_code;
157 report_user_fault(regs, int_code, SIGSEGV, address);
158 si.si_signo = SIGSEGV; 154 si.si_signo = SIGSEGV;
159 si.si_code = si_code; 155 si.si_code = si_code;
160 si.si_addr = (void __user *) address; 156 si.si_addr = (void __user *)(regs->int_parm_long & __FAIL_ADDR_MASK);
161 force_sig_info(SIGSEGV, &si, current); 157 force_sig_info(SIGSEGV, &si, current);
162} 158}
163 159
164static noinline void do_no_context(struct pt_regs *regs, long int_code, 160static noinline void do_no_context(struct pt_regs *regs)
165 unsigned long trans_exc_code)
166{ 161{
167 const struct exception_table_entry *fixup; 162 const struct exception_table_entry *fixup;
168 unsigned long address; 163 unsigned long address;
@@ -178,55 +173,48 @@ static noinline void do_no_context(struct pt_regs *regs, long int_code,
178 * Oops. The kernel tried to access some bad page. We'll have to 173 * Oops. The kernel tried to access some bad page. We'll have to
179 * terminate things with extreme prejudice. 174 * terminate things with extreme prejudice.
180 */ 175 */
181 address = trans_exc_code & __FAIL_ADDR_MASK; 176 address = regs->int_parm_long & __FAIL_ADDR_MASK;
182 if (!user_space_fault(trans_exc_code)) 177 if (!user_space_fault(regs->int_parm_long))
183 printk(KERN_ALERT "Unable to handle kernel pointer dereference" 178 printk(KERN_ALERT "Unable to handle kernel pointer dereference"
184 " at virtual kernel address %p\n", (void *)address); 179 " at virtual kernel address %p\n", (void *)address);
185 else 180 else
186 printk(KERN_ALERT "Unable to handle kernel paging request" 181 printk(KERN_ALERT "Unable to handle kernel paging request"
187 " at virtual user address %p\n", (void *)address); 182 " at virtual user address %p\n", (void *)address);
188 183
189 die("Oops", regs, int_code); 184 die(regs, "Oops");
190 do_exit(SIGKILL); 185 do_exit(SIGKILL);
191} 186}
192 187
193static noinline void do_low_address(struct pt_regs *regs, long int_code, 188static noinline void do_low_address(struct pt_regs *regs)
194 unsigned long trans_exc_code)
195{ 189{
196 /* Low-address protection hit in kernel mode means 190 /* Low-address protection hit in kernel mode means
197 NULL pointer write access in kernel mode. */ 191 NULL pointer write access in kernel mode. */
198 if (regs->psw.mask & PSW_MASK_PSTATE) { 192 if (regs->psw.mask & PSW_MASK_PSTATE) {
199 /* Low-address protection hit in user mode 'cannot happen'. */ 193 /* Low-address protection hit in user mode 'cannot happen'. */
200 die ("Low-address protection", regs, int_code); 194 die (regs, "Low-address protection");
201 do_exit(SIGKILL); 195 do_exit(SIGKILL);
202 } 196 }
203 197
204 do_no_context(regs, int_code, trans_exc_code); 198 do_no_context(regs);
205} 199}
206 200
207static noinline void do_sigbus(struct pt_regs *regs, long int_code, 201static noinline void do_sigbus(struct pt_regs *regs)
208 unsigned long trans_exc_code)
209{ 202{
210 struct task_struct *tsk = current; 203 struct task_struct *tsk = current;
211 unsigned long address;
212 struct siginfo si; 204 struct siginfo si;
213 205
214 /* 206 /*
215 * Send a sigbus, regardless of whether we were in kernel 207 * Send a sigbus, regardless of whether we were in kernel
216 * or user mode. 208 * or user mode.
217 */ 209 */
218 address = trans_exc_code & __FAIL_ADDR_MASK;
219 tsk->thread.prot_addr = address;
220 tsk->thread.trap_no = int_code;
221 si.si_signo = SIGBUS; 210 si.si_signo = SIGBUS;
222 si.si_errno = 0; 211 si.si_errno = 0;
223 si.si_code = BUS_ADRERR; 212 si.si_code = BUS_ADRERR;
224 si.si_addr = (void __user *) address; 213 si.si_addr = (void __user *)(regs->int_parm_long & __FAIL_ADDR_MASK);
225 force_sig_info(SIGBUS, &si, tsk); 214 force_sig_info(SIGBUS, &si, tsk);
226} 215}
227 216
228static noinline void do_fault_error(struct pt_regs *regs, long int_code, 217static noinline void do_fault_error(struct pt_regs *regs, int fault)
229 unsigned long trans_exc_code, int fault)
230{ 218{
231 int si_code; 219 int si_code;
232 220
@@ -238,24 +226,24 @@ static noinline void do_fault_error(struct pt_regs *regs, long int_code,
238 /* User mode accesses just cause a SIGSEGV */ 226 /* User mode accesses just cause a SIGSEGV */
239 si_code = (fault == VM_FAULT_BADMAP) ? 227 si_code = (fault == VM_FAULT_BADMAP) ?
240 SEGV_MAPERR : SEGV_ACCERR; 228 SEGV_MAPERR : SEGV_ACCERR;
241 do_sigsegv(regs, int_code, si_code, trans_exc_code); 229 do_sigsegv(regs, si_code);
242 return; 230 return;
243 } 231 }
244 case VM_FAULT_BADCONTEXT: 232 case VM_FAULT_BADCONTEXT:
245 do_no_context(regs, int_code, trans_exc_code); 233 do_no_context(regs);
246 break; 234 break;
247 default: /* fault & VM_FAULT_ERROR */ 235 default: /* fault & VM_FAULT_ERROR */
248 if (fault & VM_FAULT_OOM) { 236 if (fault & VM_FAULT_OOM) {
249 if (!(regs->psw.mask & PSW_MASK_PSTATE)) 237 if (!(regs->psw.mask & PSW_MASK_PSTATE))
250 do_no_context(regs, int_code, trans_exc_code); 238 do_no_context(regs);
251 else 239 else
252 pagefault_out_of_memory(); 240 pagefault_out_of_memory();
253 } else if (fault & VM_FAULT_SIGBUS) { 241 } else if (fault & VM_FAULT_SIGBUS) {
254 /* Kernel mode? Handle exceptions or die */ 242 /* Kernel mode? Handle exceptions or die */
255 if (!(regs->psw.mask & PSW_MASK_PSTATE)) 243 if (!(regs->psw.mask & PSW_MASK_PSTATE))
256 do_no_context(regs, int_code, trans_exc_code); 244 do_no_context(regs);
257 else 245 else
258 do_sigbus(regs, int_code, trans_exc_code); 246 do_sigbus(regs);
259 } else 247 } else
260 BUG(); 248 BUG();
261 break; 249 break;
@@ -273,12 +261,12 @@ static noinline void do_fault_error(struct pt_regs *regs, long int_code,
273 * 11 Page translation -> Not present (nullification) 261 * 11 Page translation -> Not present (nullification)
274 * 3b Region third trans. -> Not present (nullification) 262 * 3b Region third trans. -> Not present (nullification)
275 */ 263 */
276static inline int do_exception(struct pt_regs *regs, int access, 264static inline int do_exception(struct pt_regs *regs, int access)
277 unsigned long trans_exc_code)
278{ 265{
279 struct task_struct *tsk; 266 struct task_struct *tsk;
280 struct mm_struct *mm; 267 struct mm_struct *mm;
281 struct vm_area_struct *vma; 268 struct vm_area_struct *vma;
269 unsigned long trans_exc_code;
282 unsigned long address; 270 unsigned long address;
283 unsigned int flags; 271 unsigned int flags;
284 int fault; 272 int fault;
@@ -288,6 +276,7 @@ static inline int do_exception(struct pt_regs *regs, int access,
288 276
289 tsk = current; 277 tsk = current;
290 mm = tsk->mm; 278 mm = tsk->mm;
279 trans_exc_code = regs->int_parm_long;
291 280
292 /* 281 /*
293 * Verify that the fault happened in user space, that 282 * Verify that the fault happened in user space, that
@@ -387,45 +376,46 @@ out:
387 return fault; 376 return fault;
388} 377}
389 378
390void __kprobes do_protection_exception(struct pt_regs *regs, long pgm_int_code, 379void __kprobes do_protection_exception(struct pt_regs *regs)
391 unsigned long trans_exc_code)
392{ 380{
381 unsigned long trans_exc_code;
393 int fault; 382 int fault;
394 383
384 trans_exc_code = regs->int_parm_long;
395 /* Protection exception is suppressing, decrement psw address. */ 385 /* Protection exception is suppressing, decrement psw address. */
396 regs->psw.addr = __rewind_psw(regs->psw, pgm_int_code >> 16); 386 regs->psw.addr = __rewind_psw(regs->psw, regs->int_code >> 16);
397 /* 387 /*
398 * Check for low-address protection. This needs to be treated 388 * Check for low-address protection. This needs to be treated
399 * as a special case because the translation exception code 389 * as a special case because the translation exception code
400 * field is not guaranteed to contain valid data in this case. 390 * field is not guaranteed to contain valid data in this case.
401 */ 391 */
402 if (unlikely(!(trans_exc_code & 4))) { 392 if (unlikely(!(trans_exc_code & 4))) {
403 do_low_address(regs, pgm_int_code, trans_exc_code); 393 do_low_address(regs);
404 return; 394 return;
405 } 395 }
406 fault = do_exception(regs, VM_WRITE, trans_exc_code); 396 fault = do_exception(regs, VM_WRITE);
407 if (unlikely(fault)) 397 if (unlikely(fault))
408 do_fault_error(regs, 4, trans_exc_code, fault); 398 do_fault_error(regs, fault);
409} 399}
410 400
411void __kprobes do_dat_exception(struct pt_regs *regs, long pgm_int_code, 401void __kprobes do_dat_exception(struct pt_regs *regs)
412 unsigned long trans_exc_code)
413{ 402{
414 int access, fault; 403 int access, fault;
415 404
416 access = VM_READ | VM_EXEC | VM_WRITE; 405 access = VM_READ | VM_EXEC | VM_WRITE;
417 fault = do_exception(regs, access, trans_exc_code); 406 fault = do_exception(regs, access);
418 if (unlikely(fault)) 407 if (unlikely(fault))
419 do_fault_error(regs, pgm_int_code & 255, trans_exc_code, fault); 408 do_fault_error(regs, fault);
420} 409}
421 410
422#ifdef CONFIG_64BIT 411#ifdef CONFIG_64BIT
423void __kprobes do_asce_exception(struct pt_regs *regs, long pgm_int_code, 412void __kprobes do_asce_exception(struct pt_regs *regs)
424 unsigned long trans_exc_code)
425{ 413{
426 struct mm_struct *mm = current->mm; 414 struct mm_struct *mm = current->mm;
427 struct vm_area_struct *vma; 415 struct vm_area_struct *vma;
416 unsigned long trans_exc_code;
428 417
418 trans_exc_code = regs->int_parm_long;
429 if (unlikely(!user_space_fault(trans_exc_code) || in_atomic() || !mm)) 419 if (unlikely(!user_space_fault(trans_exc_code) || in_atomic() || !mm))
430 goto no_context; 420 goto no_context;
431 421
@@ -440,12 +430,12 @@ void __kprobes do_asce_exception(struct pt_regs *regs, long pgm_int_code,
440 430
441 /* User mode accesses just cause a SIGSEGV */ 431 /* User mode accesses just cause a SIGSEGV */
442 if (regs->psw.mask & PSW_MASK_PSTATE) { 432 if (regs->psw.mask & PSW_MASK_PSTATE) {
443 do_sigsegv(regs, pgm_int_code, SEGV_MAPERR, trans_exc_code); 433 do_sigsegv(regs, SEGV_MAPERR);
444 return; 434 return;
445 } 435 }
446 436
447no_context: 437no_context:
448 do_no_context(regs, pgm_int_code, trans_exc_code); 438 do_no_context(regs);
449} 439}
450#endif 440#endif
451 441
@@ -459,14 +449,15 @@ int __handle_fault(unsigned long uaddr, unsigned long pgm_int_code, int write)
459 regs.psw.mask |= PSW_MASK_IO | PSW_MASK_EXT; 449 regs.psw.mask |= PSW_MASK_IO | PSW_MASK_EXT;
460 regs.psw.addr = (unsigned long) __builtin_return_address(0); 450 regs.psw.addr = (unsigned long) __builtin_return_address(0);
461 regs.psw.addr |= PSW_ADDR_AMODE; 451 regs.psw.addr |= PSW_ADDR_AMODE;
462 uaddr &= PAGE_MASK; 452 regs.int_code = pgm_int_code;
453 regs.int_parm_long = (uaddr & PAGE_MASK) | 2;
463 access = write ? VM_WRITE : VM_READ; 454 access = write ? VM_WRITE : VM_READ;
464 fault = do_exception(&regs, access, uaddr | 2); 455 fault = do_exception(&regs, access);
465 if (unlikely(fault)) { 456 if (unlikely(fault)) {
466 if (fault & VM_FAULT_OOM) 457 if (fault & VM_FAULT_OOM)
467 return -EFAULT; 458 return -EFAULT;
468 else if (fault & VM_FAULT_SIGBUS) 459 else if (fault & VM_FAULT_SIGBUS)
469 do_sigbus(&regs, pgm_int_code, uaddr); 460 do_sigbus(&regs);
470 } 461 }
471 return fault ? -EFAULT : 0; 462 return fault ? -EFAULT : 0;
472} 463}
@@ -509,7 +500,7 @@ int pfault_init(void)
509 .reserved = __PF_RES_FIELD }; 500 .reserved = __PF_RES_FIELD };
510 int rc; 501 int rc;
511 502
512 if (!MACHINE_IS_VM || pfault_disable) 503 if (pfault_disable)
513 return -1; 504 return -1;
514 asm volatile( 505 asm volatile(
515 " diag %1,%0,0x258\n" 506 " diag %1,%0,0x258\n"
@@ -530,7 +521,7 @@ void pfault_fini(void)
530 .refversn = 2, 521 .refversn = 2,
531 }; 522 };
532 523
533 if (!MACHINE_IS_VM || pfault_disable) 524 if (pfault_disable)
534 return; 525 return;
535 asm volatile( 526 asm volatile(
536 " diag %0,0,0x258\n" 527 " diag %0,0,0x258\n"
@@ -643,8 +634,6 @@ static int __init pfault_irq_init(void)
643{ 634{
644 int rc; 635 int rc;
645 636
646 if (!MACHINE_IS_VM)
647 return 0;
648 rc = register_external_interrupt(0x2603, pfault_interrupt); 637 rc = register_external_interrupt(0x2603, pfault_interrupt);
649 if (rc) 638 if (rc)
650 goto out_extint; 639 goto out_extint;
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index d4b9fb4d0042..5d633019d8f3 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -93,18 +93,22 @@ static unsigned long setup_zero_pages(void)
93void __init paging_init(void) 93void __init paging_init(void)
94{ 94{
95 unsigned long max_zone_pfns[MAX_NR_ZONES]; 95 unsigned long max_zone_pfns[MAX_NR_ZONES];
96 unsigned long pgd_type; 96 unsigned long pgd_type, asce_bits;
97 97
98 init_mm.pgd = swapper_pg_dir; 98 init_mm.pgd = swapper_pg_dir;
99 S390_lowcore.kernel_asce = __pa(init_mm.pgd) & PAGE_MASK;
100#ifdef CONFIG_64BIT 99#ifdef CONFIG_64BIT
101 /* A three level page table (4TB) is enough for the kernel space. */ 100 if (VMALLOC_END > (1UL << 42)) {
102 S390_lowcore.kernel_asce |= _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH; 101 asce_bits = _ASCE_TYPE_REGION2 | _ASCE_TABLE_LENGTH;
103 pgd_type = _REGION3_ENTRY_EMPTY; 102 pgd_type = _REGION2_ENTRY_EMPTY;
103 } else {
104 asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
105 pgd_type = _REGION3_ENTRY_EMPTY;
106 }
104#else 107#else
105 S390_lowcore.kernel_asce |= _ASCE_TABLE_LENGTH; 108 asce_bits = _ASCE_TABLE_LENGTH;
106 pgd_type = _SEGMENT_ENTRY_EMPTY; 109 pgd_type = _SEGMENT_ENTRY_EMPTY;
107#endif 110#endif
111 S390_lowcore.kernel_asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
108 clear_table((unsigned long *) init_mm.pgd, pgd_type, 112 clear_table((unsigned long *) init_mm.pgd, pgd_type,
109 sizeof(unsigned long)*2048); 113 sizeof(unsigned long)*2048);
110 vmem_map_init(); 114 vmem_map_init();
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 301c84d3b542..9a4d02f64f16 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -33,17 +33,6 @@
33#define FRAG_MASK 0x03 33#define FRAG_MASK 0x03
34#endif 34#endif
35 35
36unsigned long VMALLOC_START = VMALLOC_END - VMALLOC_SIZE;
37EXPORT_SYMBOL(VMALLOC_START);
38
39static int __init parse_vmalloc(char *arg)
40{
41 if (!arg)
42 return -EINVAL;
43 VMALLOC_START = (VMALLOC_END - memparse(arg, &arg)) & PAGE_MASK;
44 return 0;
45}
46early_param("vmalloc", parse_vmalloc);
47 36
48unsigned long *crst_table_alloc(struct mm_struct *mm) 37unsigned long *crst_table_alloc(struct mm_struct *mm)
49{ 38{
@@ -267,7 +256,10 @@ static int gmap_alloc_table(struct gmap *gmap,
267 struct page *page; 256 struct page *page;
268 unsigned long *new; 257 unsigned long *new;
269 258
259 /* since we dont free the gmap table until gmap_free we can unlock */
260 spin_unlock(&gmap->mm->page_table_lock);
270 page = alloc_pages(GFP_KERNEL, ALLOC_ORDER); 261 page = alloc_pages(GFP_KERNEL, ALLOC_ORDER);
262 spin_lock(&gmap->mm->page_table_lock);
271 if (!page) 263 if (!page)
272 return -ENOMEM; 264 return -ENOMEM;
273 new = (unsigned long *) page_to_phys(page); 265 new = (unsigned long *) page_to_phys(page);
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 70ae9d81870e..868ea08dff0b 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -31,6 +31,7 @@ config SPARC
31 31
32config SPARC32 32config SPARC32
33 def_bool !64BIT 33 def_bool !64BIT
34 select GENERIC_ATOMIC64
34 35
35config SPARC64 36config SPARC64
36 def_bool 64BIT 37 def_bool 64BIT
@@ -383,9 +384,7 @@ config SCHED_MC
383 making when dealing with multi-core CPU chips at a cost of slightly 384 making when dealing with multi-core CPU chips at a cost of slightly
384 increased overhead in some places. If unsure say N here. 385 increased overhead in some places. If unsure say N here.
385 386
386if SPARC64
387source "kernel/Kconfig.preempt" 387source "kernel/Kconfig.preempt"
388endif
389 388
390config CMDLINE_BOOL 389config CMDLINE_BOOL
391 bool "Default bootloader kernel arguments" 390 bool "Default bootloader kernel arguments"
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index 5c3c8b69884d..9dd0a769fa18 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -13,7 +13,7 @@
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15 15
16#ifdef __KERNEL__ 16#include <asm-generic/atomic64.h>
17 17
18#include <asm/system.h> 18#include <asm/system.h>
19 19
@@ -52,112 +52,10 @@ extern void atomic_set(atomic_t *, int);
52#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) 52#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
53#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) 53#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
54 54
55
56/* This is the old 24-bit implementation. It's still used internally
57 * by some sparc-specific code, notably the semaphore implementation.
58 */
59typedef struct { volatile int counter; } atomic24_t;
60
61#ifndef CONFIG_SMP
62
63#define ATOMIC24_INIT(i) { (i) }
64#define atomic24_read(v) ((v)->counter)
65#define atomic24_set(v, i) (((v)->counter) = i)
66
67#else
68/* We do the bulk of the actual work out of line in two common
69 * routines in assembler, see arch/sparc/lib/atomic.S for the
70 * "fun" details.
71 *
72 * For SMP the trick is you embed the spin lock byte within
73 * the word, use the low byte so signedness is easily retained
74 * via a quick arithmetic shift. It looks like this:
75 *
76 * ----------------------------------------
77 * | signed 24-bit counter value | lock | atomic_t
78 * ----------------------------------------
79 * 31 8 7 0
80 */
81
82#define ATOMIC24_INIT(i) { ((i) << 8) }
83
84static inline int atomic24_read(const atomic24_t *v)
85{
86 int ret = v->counter;
87
88 while(ret & 0xff)
89 ret = v->counter;
90
91 return ret >> 8;
92}
93
94#define atomic24_set(v, i) (((v)->counter) = ((i) << 8))
95#endif
96
97static inline int __atomic24_add(int i, atomic24_t *v)
98{
99 register volatile int *ptr asm("g1");
100 register int increment asm("g2");
101 register int tmp1 asm("g3");
102 register int tmp2 asm("g4");
103 register int tmp3 asm("g7");
104
105 ptr = &v->counter;
106 increment = i;
107
108 __asm__ __volatile__(
109 "mov %%o7, %%g4\n\t"
110 "call ___atomic24_add\n\t"
111 " add %%o7, 8, %%o7\n"
112 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
113 : "0" (increment), "r" (ptr)
114 : "memory", "cc");
115
116 return increment;
117}
118
119static inline int __atomic24_sub(int i, atomic24_t *v)
120{
121 register volatile int *ptr asm("g1");
122 register int increment asm("g2");
123 register int tmp1 asm("g3");
124 register int tmp2 asm("g4");
125 register int tmp3 asm("g7");
126
127 ptr = &v->counter;
128 increment = i;
129
130 __asm__ __volatile__(
131 "mov %%o7, %%g4\n\t"
132 "call ___atomic24_sub\n\t"
133 " add %%o7, 8, %%o7\n"
134 : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
135 : "0" (increment), "r" (ptr)
136 : "memory", "cc");
137
138 return increment;
139}
140
141#define atomic24_add(i, v) ((void)__atomic24_add((i), (v)))
142#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v)))
143
144#define atomic24_dec_return(v) __atomic24_sub(1, (v))
145#define atomic24_inc_return(v) __atomic24_add(1, (v))
146
147#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0)
148#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0)
149
150#define atomic24_inc(v) ((void)__atomic24_add(1, (v)))
151#define atomic24_dec(v) ((void)__atomic24_sub(1, (v)))
152
153#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0)
154
155/* Atomic operations are already serializing */ 55/* Atomic operations are already serializing */
156#define smp_mb__before_atomic_dec() barrier() 56#define smp_mb__before_atomic_dec() barrier()
157#define smp_mb__after_atomic_dec() barrier() 57#define smp_mb__after_atomic_dec() barrier()
158#define smp_mb__before_atomic_inc() barrier() 58#define smp_mb__before_atomic_inc() barrier()
159#define smp_mb__after_atomic_inc() barrier() 59#define smp_mb__after_atomic_inc() barrier()
160 60
161#endif /* !(__KERNEL__) */
162
163#endif /* !(__ARCH_SPARC_ATOMIC__) */ 61#endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h
index 156707b0f18d..bb5c2ac4055d 100644
--- a/arch/sparc/include/asm/page_32.h
+++ b/arch/sparc/include/asm/page_32.h
@@ -8,14 +8,10 @@
8#ifndef _SPARC_PAGE_H 8#ifndef _SPARC_PAGE_H
9#define _SPARC_PAGE_H 9#define _SPARC_PAGE_H
10 10
11#define PAGE_SHIFT 12 11#include <linux/const.h>
12 12
13#ifndef __ASSEMBLY__ 13#define PAGE_SHIFT 12
14/* I have my suspicions... -DaveM */ 14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
15#define PAGE_SIZE (1UL << PAGE_SHIFT)
16#else
17#define PAGE_SIZE (1 << PAGE_SHIFT)
18#endif
19#define PAGE_MASK (~(PAGE_SIZE-1)) 15#define PAGE_MASK (~(PAGE_SIZE-1))
20 16
21#include <asm/btfixup.h> 17#include <asm/btfixup.h>
diff --git a/arch/sparc/include/asm/pgtsun4.h b/arch/sparc/include/asm/pgtsun4.h
deleted file mode 100644
index 5a0d661fb82e..000000000000
--- a/arch/sparc/include/asm/pgtsun4.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * pgtsun4.h: Sun4 specific pgtable.h defines and code.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7#ifndef _SPARC_PGTSUN4C_H
8#define _SPARC_PGTSUN4C_H
9
10#include <asm/contregs.h>
11
12/* PMD_SHIFT determines the size of the area a second-level page table can map */
13#define SUN4C_PMD_SHIFT 23
14
15/* PGDIR_SHIFT determines what a third-level page table entry can map */
16#define SUN4C_PGDIR_SHIFT 23
17#define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT)
18#define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1))
19#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
20
21/* To represent how the sun4c mmu really lays things out. */
22#define SUN4C_REAL_PGDIR_SHIFT 18
23#define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT)
24#define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1))
25#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
26
27/* 19 bit PFN on sun4 */
28#define SUN4C_PFN_MASK 0x7ffff
29
30/* Don't increase these unless the structures in sun4c.c are fixed */
31#define SUN4C_MAX_SEGMAPS 256
32#define SUN4C_MAX_CONTEXTS 16
33
34/*
35 * To be efficient, and not have to worry about allocating such
36 * a huge pgd, we make the kernel sun4c tables each hold 1024
37 * entries and the pgd similarly just like the i386 tables.
38 */
39#define SUN4C_PTRS_PER_PTE 1024
40#define SUN4C_PTRS_PER_PMD 1
41#define SUN4C_PTRS_PER_PGD 1024
42
43/*
44 * Sparc SUN4C pte fields.
45 */
46#define _SUN4C_PAGE_VALID 0x80000000
47#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */
48#define _SUN4C_PAGE_DIRTY 0x40000000
49#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */
50#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */
51#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */
52#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */
53#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */
54#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */
55#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */
56#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */
57#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */
58#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */
59
60#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\
61 _SUN4C_PAGE_ACCESSED)
62#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\
63 _SUN4C_PAGE_MODIFIED)
64
65#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED)
66
67#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT)
68#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\
69 _SUN4C_PAGE_WRITE)
70#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
71#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
72#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\
73 _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV)
74
75/* SUN4C swap entry encoding
76 *
77 * We use 5 bits for the type and 19 for the offset. This gives us
78 * 32 swapfiles of 4GB each. Encoding looks like:
79 *
80 * RRRRRRRRooooooooooooooooooottttt
81 * fedcba9876543210fedcba9876543210
82 *
83 * The top 8 bits are reserved for protection and status bits, especially
84 * FILE and PRESENT.
85 */
86#define SUN4C_SWP_TYPE_MASK 0x1f
87#define SUN4C_SWP_OFF_MASK 0x7ffff
88#define SUN4C_SWP_OFF_SHIFT 5
89
90#ifndef __ASSEMBLY__
91
92static inline unsigned long sun4c_get_synchronous_error(void)
93{
94 unsigned long sync_err;
95
96 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
97 "=r" (sync_err) :
98 "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
99 return sync_err;
100}
101
102static inline unsigned long sun4c_get_synchronous_address(void)
103{
104 unsigned long sync_addr;
105
106 __asm__ __volatile__("lda [%1] %2, %0\n\t" :
107 "=r" (sync_addr) :
108 "r" (AC_SYNC_VA), "i" (ASI_CONTROL));
109 return sync_addr;
110}
111
112/* SUN4 pte, segmap, and context manipulation */
113static inline unsigned long sun4c_get_segmap(unsigned long addr)
114{
115 register unsigned long entry;
116
117 __asm__ __volatile__("\n\tlduha [%1] %2, %0\n\t" :
118 "=r" (entry) :
119 "r" (addr), "i" (ASI_SEGMAP));
120 return entry;
121}
122
123static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry)
124{
125 __asm__ __volatile__("\n\tstha %1, [%0] %2; nop; nop; nop;\n\t" : :
126 "r" (addr), "r" (entry),
127 "i" (ASI_SEGMAP)
128 : "memory");
129}
130
131static inline unsigned long sun4c_get_pte(unsigned long addr)
132{
133 register unsigned long entry;
134
135 __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" :
136 "=r" (entry) :
137 "r" (addr), "i" (ASI_PTE));
138 return entry;
139}
140
141static inline void sun4c_put_pte(unsigned long addr, unsigned long entry)
142{
143 __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : :
144 "r" (addr),
145 "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)
146 : "memory");
147}
148
149static inline int sun4c_get_context(void)
150{
151 register int ctx;
152
153 __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
154 "=r" (ctx) :
155 "r" (AC_CONTEXT), "i" (ASI_CONTROL));
156
157 return ctx;
158}
159
160static inline int sun4c_set_context(int ctx)
161{
162 __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : :
163 "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)
164 : "memory");
165
166 return ctx;
167}
168
169#endif /* !(__ASSEMBLY__) */
170
171#endif /* !(_SPARC_PGTSUN4_H) */
diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h
index 5cc5888ad5a3..c2a1080cdd3b 100644
--- a/arch/sparc/include/asm/thread_info_32.h
+++ b/arch/sparc/include/asm/thread_info_32.h
@@ -95,7 +95,7 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
95 * Observe the order of get_free_pages() in alloc_thread_info_node(). 95 * Observe the order of get_free_pages() in alloc_thread_info_node().
96 * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. 96 * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste.
97 */ 97 */
98#define THREAD_SIZE 8192 98#define THREAD_SIZE (2 * PAGE_SIZE)
99 99
100/* 100/*
101 * Offsets in thread_info structure, used in assembly code 101 * Offsets in thread_info structure, used in assembly code
diff --git a/arch/sparc/lib/atomic_32.S b/arch/sparc/lib/atomic_32.S
index 178cbb8ae1b9..eb6c7359cbd1 100644
--- a/arch/sparc/lib/atomic_32.S
+++ b/arch/sparc/lib/atomic_32.S
@@ -40,60 +40,5 @@ ___xchg32_sun4md:
40 mov %g4, %o7 40 mov %g4, %o7
41#endif 41#endif
42 42
43 /* Read asm-sparc/atomic.h carefully to understand how this works for SMP.
44 * Really, some things here for SMP are overly clever, go read the header.
45 */
46 .globl ___atomic24_add
47___atomic24_add:
48 rd %psr, %g3 ! Keep the code small, old way was stupid
49 nop; nop; nop; ! Let the bits set
50 or %g3, PSR_PIL, %g7 ! Disable interrupts
51 wr %g7, 0x0, %psr ! Set %psr
52 nop; nop; nop; ! Let the bits set
53#ifdef CONFIG_SMP
541: ldstub [%g1 + 3], %g7 ! Spin on the byte lock for SMP.
55 orcc %g7, 0x0, %g0 ! Did we get it?
56 bne 1b ! Nope...
57 ld [%g1], %g7 ! Load locked atomic24_t
58 sra %g7, 8, %g7 ! Get signed 24-bit integer
59 add %g7, %g2, %g2 ! Add in argument
60 sll %g2, 8, %g7 ! Transpose back to atomic24_t
61 st %g7, [%g1] ! Clever: This releases the lock as well.
62#else
63 ld [%g1], %g7 ! Load locked atomic24_t
64 add %g7, %g2, %g2 ! Add in argument
65 st %g2, [%g1] ! Store it back
66#endif
67 wr %g3, 0x0, %psr ! Restore original PSR_PIL
68 nop; nop; nop; ! Let the bits set
69 jmpl %o7, %g0 ! NOTE: not + 8, see callers in atomic.h
70 mov %g4, %o7 ! Restore %o7
71
72 .globl ___atomic24_sub
73___atomic24_sub:
74 rd %psr, %g3 ! Keep the code small, old way was stupid
75 nop; nop; nop; ! Let the bits set
76 or %g3, PSR_PIL, %g7 ! Disable interrupts
77 wr %g7, 0x0, %psr ! Set %psr
78 nop; nop; nop; ! Let the bits set
79#ifdef CONFIG_SMP
801: ldstub [%g1 + 3], %g7 ! Spin on the byte lock for SMP.
81 orcc %g7, 0x0, %g0 ! Did we get it?
82 bne 1b ! Nope...
83 ld [%g1], %g7 ! Load locked atomic24_t
84 sra %g7, 8, %g7 ! Get signed 24-bit integer
85 sub %g7, %g2, %g2 ! Subtract argument
86 sll %g2, 8, %g7 ! Transpose back to atomic24_t
87 st %g7, [%g1] ! Clever: This releases the lock as well
88#else
89 ld [%g1], %g7 ! Load locked atomic24_t
90 sub %g7, %g2, %g2 ! Subtract argument
91 st %g2, [%g1] ! Store it back
92#endif
93 wr %g3, 0x0, %psr ! Restore original PSR_PIL
94 nop; nop; nop; ! Let the bits set
95 jmpl %o7, %g0 ! NOTE: not + 8, see callers in atomic.h
96 mov %g4, %o7 ! Restore %o7
97
98 .globl __atomic_end 43 .globl __atomic_end
99__atomic_end: 44__atomic_end:
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c
index 1b30bb3bfdb1..f73c2240fe60 100644
--- a/arch/sparc/lib/ksyms.c
+++ b/arch/sparc/lib/ksyms.c
@@ -62,8 +62,6 @@ extern void ___rw_read_enter(void);
62extern void ___rw_read_try(void); 62extern void ___rw_read_try(void);
63extern void ___rw_read_exit(void); 63extern void ___rw_read_exit(void);
64extern void ___rw_write_enter(void); 64extern void ___rw_write_enter(void);
65extern void ___atomic24_add(void);
66extern void ___atomic24_sub(void);
67 65
68/* Alias functions whose names begin with "." and export the aliases. 66/* Alias functions whose names begin with "." and export the aliases.
69 * The module references will be fixed up by module_frob_arch_sections. 67 * The module references will be fixed up by module_frob_arch_sections.
@@ -97,10 +95,6 @@ EXPORT_SYMBOL(___rw_read_exit);
97EXPORT_SYMBOL(___rw_write_enter); 95EXPORT_SYMBOL(___rw_write_enter);
98#endif 96#endif
99 97
100/* Atomic operations. */
101EXPORT_SYMBOL(___atomic24_add);
102EXPORT_SYMBOL(___atomic24_sub);
103
104EXPORT_SYMBOL(__ashrdi3); 98EXPORT_SYMBOL(__ashrdi3);
105EXPORT_SYMBOL(__ashldi3); 99EXPORT_SYMBOL(__ashldi3);
106EXPORT_SYMBOL(__lshrdi3); 100EXPORT_SYMBOL(__lshrdi3);
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 93f79094c224..0a0a95460434 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -67,7 +67,7 @@ extern struct console early_mrst_console;
67extern void mrst_early_console_init(void); 67extern void mrst_early_console_init(void);
68 68
69extern struct console early_hsu_console; 69extern struct console early_hsu_console;
70extern void hsu_early_console_init(void); 70extern void hsu_early_console_init(const char *);
71 71
72extern void intel_scu_devices_create(void); 72extern void intel_scu_devices_create(void);
73extern void intel_scu_devices_destroy(void); 73extern void intel_scu_devices_destroy(void);
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 529bf07e8067..7a11910a63c4 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -414,22 +414,6 @@ do { \
414#define this_cpu_xchg_2(pcp, nval) percpu_xchg_op(pcp, nval) 414#define this_cpu_xchg_2(pcp, nval) percpu_xchg_op(pcp, nval)
415#define this_cpu_xchg_4(pcp, nval) percpu_xchg_op(pcp, nval) 415#define this_cpu_xchg_4(pcp, nval) percpu_xchg_op(pcp, nval)
416 416
417#define irqsafe_cpu_add_1(pcp, val) percpu_add_op((pcp), val)
418#define irqsafe_cpu_add_2(pcp, val) percpu_add_op((pcp), val)
419#define irqsafe_cpu_add_4(pcp, val) percpu_add_op((pcp), val)
420#define irqsafe_cpu_and_1(pcp, val) percpu_to_op("and", (pcp), val)
421#define irqsafe_cpu_and_2(pcp, val) percpu_to_op("and", (pcp), val)
422#define irqsafe_cpu_and_4(pcp, val) percpu_to_op("and", (pcp), val)
423#define irqsafe_cpu_or_1(pcp, val) percpu_to_op("or", (pcp), val)
424#define irqsafe_cpu_or_2(pcp, val) percpu_to_op("or", (pcp), val)
425#define irqsafe_cpu_or_4(pcp, val) percpu_to_op("or", (pcp), val)
426#define irqsafe_cpu_xor_1(pcp, val) percpu_to_op("xor", (pcp), val)
427#define irqsafe_cpu_xor_2(pcp, val) percpu_to_op("xor", (pcp), val)
428#define irqsafe_cpu_xor_4(pcp, val) percpu_to_op("xor", (pcp), val)
429#define irqsafe_cpu_xchg_1(pcp, nval) percpu_xchg_op(pcp, nval)
430#define irqsafe_cpu_xchg_2(pcp, nval) percpu_xchg_op(pcp, nval)
431#define irqsafe_cpu_xchg_4(pcp, nval) percpu_xchg_op(pcp, nval)
432
433#ifndef CONFIG_M386 417#ifndef CONFIG_M386
434#define __this_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val) 418#define __this_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val)
435#define __this_cpu_add_return_2(pcp, val) percpu_add_return_op(pcp, val) 419#define __this_cpu_add_return_2(pcp, val) percpu_add_return_op(pcp, val)
@@ -445,9 +429,6 @@ do { \
445#define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval) 429#define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
446#define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval) 430#define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
447 431
448#define irqsafe_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
449#define irqsafe_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
450#define irqsafe_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
451#endif /* !CONFIG_M386 */ 432#endif /* !CONFIG_M386 */
452 433
453#ifdef CONFIG_X86_CMPXCHG64 434#ifdef CONFIG_X86_CMPXCHG64
@@ -464,7 +445,6 @@ do { \
464 445
465#define __this_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double 446#define __this_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
466#define this_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double 447#define this_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
467#define irqsafe_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
468#endif /* CONFIG_X86_CMPXCHG64 */ 448#endif /* CONFIG_X86_CMPXCHG64 */
469 449
470/* 450/*
@@ -492,13 +472,6 @@ do { \
492#define this_cpu_xchg_8(pcp, nval) percpu_xchg_op(pcp, nval) 472#define this_cpu_xchg_8(pcp, nval) percpu_xchg_op(pcp, nval)
493#define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval) 473#define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
494 474
495#define irqsafe_cpu_add_8(pcp, val) percpu_add_op((pcp), val)
496#define irqsafe_cpu_and_8(pcp, val) percpu_to_op("and", (pcp), val)
497#define irqsafe_cpu_or_8(pcp, val) percpu_to_op("or", (pcp), val)
498#define irqsafe_cpu_xor_8(pcp, val) percpu_to_op("xor", (pcp), val)
499#define irqsafe_cpu_xchg_8(pcp, nval) percpu_xchg_op(pcp, nval)
500#define irqsafe_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
501
502/* 475/*
503 * Pretty complex macro to generate cmpxchg16 instruction. The instruction 476 * Pretty complex macro to generate cmpxchg16 instruction. The instruction
504 * is not supported on early AMD64 processors so we must be able to emulate 477 * is not supported on early AMD64 processors so we must be able to emulate
@@ -521,7 +494,6 @@ do { \
521 494
522#define __this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double 495#define __this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
523#define this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double 496#define this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
524#define irqsafe_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
525 497
526#endif 498#endif
527 499
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index cd28a350f7f9..9d42a52d2331 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -247,7 +247,7 @@ static int __init setup_early_printk(char *buf)
247 } 247 }
248 248
249 if (!strncmp(buf, "hsu", 3)) { 249 if (!strncmp(buf, "hsu", 3)) {
250 hsu_early_console_init(); 250 hsu_early_console_init(buf + 3);
251 early_console_register(&early_hsu_console, keep); 251 early_console_register(&early_hsu_console, keep);
252 } 252 }
253#endif 253#endif
diff --git a/arch/x86/platform/mrst/early_printk_mrst.c b/arch/x86/platform/mrst/early_printk_mrst.c
index 25bfdbb5b130..3c6e328483c7 100644
--- a/arch/x86/platform/mrst/early_printk_mrst.c
+++ b/arch/x86/platform/mrst/early_printk_mrst.c
@@ -245,16 +245,24 @@ struct console early_mrst_console = {
245 * Following is the early console based on Medfield HSU (High 245 * Following is the early console based on Medfield HSU (High
246 * Speed UART) device. 246 * Speed UART) device.
247 */ 247 */
248#define HSU_PORT2_PADDR 0xffa28180 248#define HSU_PORT_BASE 0xffa28080
249 249
250static void __iomem *phsu; 250static void __iomem *phsu;
251 251
252void hsu_early_console_init(void) 252void hsu_early_console_init(const char *s)
253{ 253{
254 unsigned long paddr, port = 0;
254 u8 lcr; 255 u8 lcr;
255 256
256 phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE, 257 /*
257 HSU_PORT2_PADDR); 258 * Select the early HSU console port if specified by user in the
259 * kernel command line.
260 */
261 if (*s && !kstrtoul(s, 10, &port))
262 port = clamp_val(port, 0, 2);
263
264 paddr = HSU_PORT_BASE + port * 0x80;
265 phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE, paddr);
258 266
259 /* Disable FIFO */ 267 /* Disable FIFO */
260 writeb(0x0, phsu + UART_FCR); 268 writeb(0x0, phsu + UART_FCR);
diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c
index 8f630cec906e..b8c143d68ee0 100644
--- a/block/blk-cgroup.c
+++ b/block/blk-cgroup.c
@@ -30,8 +30,10 @@ EXPORT_SYMBOL_GPL(blkio_root_cgroup);
30 30
31static struct cgroup_subsys_state *blkiocg_create(struct cgroup_subsys *, 31static struct cgroup_subsys_state *blkiocg_create(struct cgroup_subsys *,
32 struct cgroup *); 32 struct cgroup *);
33static int blkiocg_can_attach_task(struct cgroup *, struct task_struct *); 33static int blkiocg_can_attach(struct cgroup_subsys *, struct cgroup *,
34static void blkiocg_attach_task(struct cgroup *, struct task_struct *); 34 struct cgroup_taskset *);
35static void blkiocg_attach(struct cgroup_subsys *, struct cgroup *,
36 struct cgroup_taskset *);
35static void blkiocg_destroy(struct cgroup_subsys *, struct cgroup *); 37static void blkiocg_destroy(struct cgroup_subsys *, struct cgroup *);
36static int blkiocg_populate(struct cgroup_subsys *, struct cgroup *); 38static int blkiocg_populate(struct cgroup_subsys *, struct cgroup *);
37 39
@@ -44,8 +46,8 @@ static int blkiocg_populate(struct cgroup_subsys *, struct cgroup *);
44struct cgroup_subsys blkio_subsys = { 46struct cgroup_subsys blkio_subsys = {
45 .name = "blkio", 47 .name = "blkio",
46 .create = blkiocg_create, 48 .create = blkiocg_create,
47 .can_attach_task = blkiocg_can_attach_task, 49 .can_attach = blkiocg_can_attach,
48 .attach_task = blkiocg_attach_task, 50 .attach = blkiocg_attach,
49 .destroy = blkiocg_destroy, 51 .destroy = blkiocg_destroy,
50 .populate = blkiocg_populate, 52 .populate = blkiocg_populate,
51#ifdef CONFIG_BLK_CGROUP 53#ifdef CONFIG_BLK_CGROUP
@@ -1626,30 +1628,39 @@ done:
1626 * of the main cic data structures. For now we allow a task to change 1628 * of the main cic data structures. For now we allow a task to change
1627 * its cgroup only if it's the only owner of its ioc. 1629 * its cgroup only if it's the only owner of its ioc.
1628 */ 1630 */
1629static int blkiocg_can_attach_task(struct cgroup *cgrp, struct task_struct *tsk) 1631static int blkiocg_can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
1632 struct cgroup_taskset *tset)
1630{ 1633{
1634 struct task_struct *task;
1631 struct io_context *ioc; 1635 struct io_context *ioc;
1632 int ret = 0; 1636 int ret = 0;
1633 1637
1634 /* task_lock() is needed to avoid races with exit_io_context() */ 1638 /* task_lock() is needed to avoid races with exit_io_context() */
1635 task_lock(tsk); 1639 cgroup_taskset_for_each(task, cgrp, tset) {
1636 ioc = tsk->io_context; 1640 task_lock(task);
1637 if (ioc && atomic_read(&ioc->nr_tasks) > 1) 1641 ioc = task->io_context;
1638 ret = -EINVAL; 1642 if (ioc && atomic_read(&ioc->nr_tasks) > 1)
1639 task_unlock(tsk); 1643 ret = -EINVAL;
1640 1644 task_unlock(task);
1645 if (ret)
1646 break;
1647 }
1641 return ret; 1648 return ret;
1642} 1649}
1643 1650
1644static void blkiocg_attach_task(struct cgroup *cgrp, struct task_struct *tsk) 1651static void blkiocg_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
1652 struct cgroup_taskset *tset)
1645{ 1653{
1654 struct task_struct *task;
1646 struct io_context *ioc; 1655 struct io_context *ioc;
1647 1656
1648 task_lock(tsk); 1657 cgroup_taskset_for_each(task, cgrp, tset) {
1649 ioc = tsk->io_context; 1658 task_lock(task);
1650 if (ioc) 1659 ioc = task->io_context;
1651 ioc->cgroup_changed = 1; 1660 if (ioc)
1652 task_unlock(tsk); 1661 ioc->cgroup_changed = 1;
1662 task_unlock(task);
1663 }
1653} 1664}
1654 1665
1655void blkio_policy_register(struct blkio_policy_type *blkiop) 1666void blkio_policy_register(struct blkio_policy_type *blkiop)
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index a76f24a8e5db..5249e6d918a3 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -360,7 +360,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
360 ap->flags |= ATA_FLAG_SLAVE_POSS; 360 ap->flags |= ATA_FLAG_SLAVE_POSS;
361 ap->pio_mask = ATA_PIO4; 361 ap->pio_mask = ATA_PIO4;
362 362
363 if (!irq) { 363 if (!gpio_is_valid(irq)) {
364 ap->flags |= ATA_FLAG_PIO_POLLING; 364 ap->flags |= ATA_FLAG_PIO_POLLING;
365 ata_port_desc(ap, "no IRQ, using PIO polling"); 365 ata_port_desc(ap, "no IRQ, using PIO polling");
366 } 366 }
@@ -414,8 +414,8 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
414 414
415 host->private_data = info; 415 host->private_data = info;
416 416
417 ret = ata_host_activate(host, irq ? gpio_to_irq(irq) : 0, 417 return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
418 irq ? ata_sff_interrupt : NULL, 418 gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
419 irq_flags, &pata_at91_sht); 419 irq_flags, &pata_at91_sht);
420 420
421 if (!ret) 421 if (!ret)
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 0b8b8b488ee8..38950ea8398a 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -3988,7 +3988,7 @@ static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev)
3988} 3988}
3989 3989
3990static void mv_conf_mbus_windows(struct mv_host_priv *hpriv, 3990static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
3991 struct mbus_dram_target_info *dram) 3991 const struct mbus_dram_target_info *dram)
3992{ 3992{
3993 int i; 3993 int i;
3994 3994
@@ -3998,7 +3998,7 @@ static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
3998 } 3998 }
3999 3999
4000 for (i = 0; i < dram->num_cs; i++) { 4000 for (i = 0; i < dram->num_cs; i++) {
4001 struct mbus_dram_window *cs = dram->cs + i; 4001 const struct mbus_dram_window *cs = dram->cs + i;
4002 4002
4003 writel(((cs->size - 1) & 0xffff0000) | 4003 writel(((cs->size - 1) & 0xffff0000) |
4004 (cs->mbus_attr << 8) | 4004 (cs->mbus_attr << 8) |
@@ -4019,6 +4019,7 @@ static void mv_conf_mbus_windows(struct mv_host_priv *hpriv,
4019static int mv_platform_probe(struct platform_device *pdev) 4019static int mv_platform_probe(struct platform_device *pdev)
4020{ 4020{
4021 const struct mv_sata_platform_data *mv_platform_data; 4021 const struct mv_sata_platform_data *mv_platform_data;
4022 const struct mbus_dram_target_info *dram;
4022 const struct ata_port_info *ppi[] = 4023 const struct ata_port_info *ppi[] =
4023 { &mv_port_info[chip_soc], NULL }; 4024 { &mv_port_info[chip_soc], NULL };
4024 struct ata_host *host; 4025 struct ata_host *host;
@@ -4072,8 +4073,9 @@ static int mv_platform_probe(struct platform_device *pdev)
4072 /* 4073 /*
4073 * (Re-)program MBUS remapping windows if we are asked to. 4074 * (Re-)program MBUS remapping windows if we are asked to.
4074 */ 4075 */
4075 if (mv_platform_data->dram != NULL) 4076 dram = mv_mbus_dram_info();
4076 mv_conf_mbus_windows(hpriv, mv_platform_data->dram); 4077 if (dram)
4078 mv_conf_mbus_windows(hpriv, dram);
4077 4079
4078 rc = mv_create_dma_pools(hpriv, &pdev->dev); 4080 rc = mv_create_dma_pools(hpriv, &pdev->dev);
4079 if (rc) 4081 if (rc)
@@ -4141,17 +4143,18 @@ static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
4141static int mv_platform_resume(struct platform_device *pdev) 4143static int mv_platform_resume(struct platform_device *pdev)
4142{ 4144{
4143 struct ata_host *host = platform_get_drvdata(pdev); 4145 struct ata_host *host = platform_get_drvdata(pdev);
4146 const struct mbus_dram_target_info *dram;
4144 int ret; 4147 int ret;
4145 4148
4146 if (host) { 4149 if (host) {
4147 struct mv_host_priv *hpriv = host->private_data; 4150 struct mv_host_priv *hpriv = host->private_data;
4148 const struct mv_sata_platform_data *mv_platform_data = \ 4151
4149 pdev->dev.platform_data;
4150 /* 4152 /*
4151 * (Re-)program MBUS remapping windows if we are asked to. 4153 * (Re-)program MBUS remapping windows if we are asked to.
4152 */ 4154 */
4153 if (mv_platform_data->dram != NULL) 4155 dram = mv_mbus_dram_info();
4154 mv_conf_mbus_windows(hpriv, mv_platform_data->dram); 4156 if (dram)
4157 mv_conf_mbus_windows(hpriv, dram);
4155 4158
4156 /* initialize adapter */ 4159 /* initialize adapter */
4157 ret = mv_init_host(host); 4160 ret = mv_init_host(host);
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 35309274ad68..9b3cd08cd0ed 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -3,5 +3,8 @@ config CLKDEV_LOOKUP
3 bool 3 bool
4 select HAVE_CLK 4 select HAVE_CLK
5 5
6config HAVE_CLK_PREPARE
7 bool
8
6config HAVE_MACH_CLKDEV 9config HAVE_MACH_CLKDEV
7 bool 10 bool
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 9a353c2216d0..e779b434af45 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1250,7 +1250,7 @@ static int __devinit mv_xor_probe(struct platform_device *pdev)
1250 1250
1251static void 1251static void
1252mv_xor_conf_mbus_windows(struct mv_xor_shared_private *msp, 1252mv_xor_conf_mbus_windows(struct mv_xor_shared_private *msp,
1253 struct mbus_dram_target_info *dram) 1253 const struct mbus_dram_target_info *dram)
1254{ 1254{
1255 void __iomem *base = msp->xor_base; 1255 void __iomem *base = msp->xor_base;
1256 u32 win_enable = 0; 1256 u32 win_enable = 0;
@@ -1264,7 +1264,7 @@ mv_xor_conf_mbus_windows(struct mv_xor_shared_private *msp,
1264 } 1264 }
1265 1265
1266 for (i = 0; i < dram->num_cs; i++) { 1266 for (i = 0; i < dram->num_cs; i++) {
1267 struct mbus_dram_window *cs = dram->cs + i; 1267 const struct mbus_dram_window *cs = dram->cs + i;
1268 1268
1269 writel((cs->base & 0xffff0000) | 1269 writel((cs->base & 0xffff0000) |
1270 (cs->mbus_attr << 8) | 1270 (cs->mbus_attr << 8) |
@@ -1290,7 +1290,7 @@ static struct platform_driver mv_xor_driver = {
1290 1290
1291static int mv_xor_shared_probe(struct platform_device *pdev) 1291static int mv_xor_shared_probe(struct platform_device *pdev)
1292{ 1292{
1293 struct mv_xor_platform_shared_data *msd = pdev->dev.platform_data; 1293 const struct mbus_dram_target_info *dram;
1294 struct mv_xor_shared_private *msp; 1294 struct mv_xor_shared_private *msp;
1295 struct resource *res; 1295 struct resource *res;
1296 1296
@@ -1323,8 +1323,9 @@ static int mv_xor_shared_probe(struct platform_device *pdev)
1323 /* 1323 /*
1324 * (Re-)program MBUS remapping windows if we are asked to. 1324 * (Re-)program MBUS remapping windows if we are asked to.
1325 */ 1325 */
1326 if (msd != NULL && msd->dram != NULL) 1326 dram = mv_mbus_dram_info();
1327 mv_xor_conf_mbus_windows(msp, msd->dram); 1327 if (dram)
1328 mv_xor_conf_mbus_windows(msp, dram);
1328 1329
1329 return 0; 1330 return 0;
1330} 1331}
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index b4588bdd98bb..fc903c0ed234 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -334,7 +334,7 @@ static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
334 goto err_irq; 334 goto err_irq;
335 } 335 }
336 336
337 ret = clk_enable(mxs_dma->clk); 337 ret = clk_prepare_enable(mxs_dma->clk);
338 if (ret) 338 if (ret)
339 goto err_clk; 339 goto err_clk;
340 340
@@ -372,7 +372,7 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan)
372 dma_free_coherent(mxs_dma->dma_device.dev, PAGE_SIZE, 372 dma_free_coherent(mxs_dma->dma_device.dev, PAGE_SIZE,
373 mxs_chan->ccw, mxs_chan->ccw_phys); 373 mxs_chan->ccw, mxs_chan->ccw_phys);
374 374
375 clk_disable(mxs_dma->clk); 375 clk_disable_unprepare(mxs_dma->clk);
376} 376}
377 377
378static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( 378static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg(
@@ -578,7 +578,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)
578{ 578{
579 int ret; 579 int ret;
580 580
581 ret = clk_enable(mxs_dma->clk); 581 ret = clk_prepare_enable(mxs_dma->clk);
582 if (ret) 582 if (ret)
583 goto err_out; 583 goto err_out;
584 584
@@ -604,7 +604,7 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)
604 writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS, 604 writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS,
605 mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR); 605 mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR);
606 606
607 clk_disable(mxs_dma->clk); 607 clk_disable_unprepare(mxs_dma->clk);
608 608
609 return 0; 609 return 0;
610 610
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 2d8d1b041d95..09adcfcd953e 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -19,6 +19,7 @@
19#include <linux/amba/pl330.h> 19#include <linux/amba/pl330.h>
20#include <linux/pm_runtime.h> 20#include <linux/pm_runtime.h>
21#include <linux/scatterlist.h> 21#include <linux/scatterlist.h>
22#include <linux/of.h>
22 23
23#define NR_DEFAULT_DESC 16 24#define NR_DEFAULT_DESC 16
24 25
@@ -116,6 +117,9 @@ struct dma_pl330_desc {
116 struct dma_pl330_chan *pchan; 117 struct dma_pl330_chan *pchan;
117}; 118};
118 119
120/* forward declaration */
121static struct amba_driver pl330_driver;
122
119static inline struct dma_pl330_chan * 123static inline struct dma_pl330_chan *
120to_pchan(struct dma_chan *ch) 124to_pchan(struct dma_chan *ch)
121{ 125{
@@ -267,6 +271,32 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err)
267 tasklet_schedule(&pch->task); 271 tasklet_schedule(&pch->task);
268} 272}
269 273
274bool pl330_filter(struct dma_chan *chan, void *param)
275{
276 u8 *peri_id;
277
278 if (chan->device->dev->driver != &pl330_driver.drv)
279 return false;
280
281#ifdef CONFIG_OF
282 if (chan->device->dev->of_node) {
283 const __be32 *prop_value;
284 phandle phandle;
285 struct device_node *node;
286
287 prop_value = ((struct property *)param)->value;
288 phandle = be32_to_cpup(prop_value++);
289 node = of_find_node_by_phandle(phandle);
290 return ((chan->private == node) &&
291 (chan->chan_id == be32_to_cpup(prop_value)));
292 }
293#endif
294
295 peri_id = chan->private;
296 return *peri_id == (unsigned)param;
297}
298EXPORT_SYMBOL(pl330_filter);
299
270static int pl330_alloc_chan_resources(struct dma_chan *chan) 300static int pl330_alloc_chan_resources(struct dma_chan *chan)
271{ 301{
272 struct dma_pl330_chan *pch = to_pchan(chan); 302 struct dma_pl330_chan *pch = to_pchan(chan);
@@ -497,7 +527,7 @@ pluck_desc(struct dma_pl330_dmac *pdmac)
497static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) 527static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
498{ 528{
499 struct dma_pl330_dmac *pdmac = pch->dmac; 529 struct dma_pl330_dmac *pdmac = pch->dmac;
500 struct dma_pl330_peri *peri = pch->chan.private; 530 u8 *peri_id = pch->chan.private;
501 struct dma_pl330_desc *desc; 531 struct dma_pl330_desc *desc;
502 532
503 /* Pluck one desc from the pool of DMAC */ 533 /* Pluck one desc from the pool of DMAC */
@@ -522,13 +552,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
522 desc->txd.cookie = 0; 552 desc->txd.cookie = 0;
523 async_tx_ack(&desc->txd); 553 async_tx_ack(&desc->txd);
524 554
525 if (peri) { 555 desc->req.peri = peri_id ? pch->chan.chan_id : 0;
526 desc->req.rqtype = peri->rqtype;
527 desc->req.peri = pch->chan.chan_id;
528 } else {
529 desc->req.rqtype = MEMTOMEM;
530 desc->req.peri = 0;
531 }
532 556
533 dma_async_tx_descriptor_init(&desc->txd, &pch->chan); 557 dma_async_tx_descriptor_init(&desc->txd, &pch->chan);
534 558
@@ -615,12 +639,14 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
615 case DMA_TO_DEVICE: 639 case DMA_TO_DEVICE:
616 desc->rqcfg.src_inc = 1; 640 desc->rqcfg.src_inc = 1;
617 desc->rqcfg.dst_inc = 0; 641 desc->rqcfg.dst_inc = 0;
642 desc->req.rqtype = MEMTODEV;
618 src = dma_addr; 643 src = dma_addr;
619 dst = pch->fifo_addr; 644 dst = pch->fifo_addr;
620 break; 645 break;
621 case DMA_FROM_DEVICE: 646 case DMA_FROM_DEVICE:
622 desc->rqcfg.src_inc = 0; 647 desc->rqcfg.src_inc = 0;
623 desc->rqcfg.dst_inc = 1; 648 desc->rqcfg.dst_inc = 1;
649 desc->req.rqtype = DEVTOMEM;
624 src = pch->fifo_addr; 650 src = pch->fifo_addr;
625 dst = dma_addr; 651 dst = dma_addr;
626 break; 652 break;
@@ -646,16 +672,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
646{ 672{
647 struct dma_pl330_desc *desc; 673 struct dma_pl330_desc *desc;
648 struct dma_pl330_chan *pch = to_pchan(chan); 674 struct dma_pl330_chan *pch = to_pchan(chan);
649 struct dma_pl330_peri *peri = chan->private;
650 struct pl330_info *pi; 675 struct pl330_info *pi;
651 int burst; 676 int burst;
652 677
653 if (unlikely(!pch || !len)) 678 if (unlikely(!pch || !len))
654 return NULL; 679 return NULL;
655 680
656 if (peri && peri->rqtype != MEMTOMEM)
657 return NULL;
658
659 pi = &pch->dmac->pif; 681 pi = &pch->dmac->pif;
660 682
661 desc = __pl330_prep_dma_memcpy(pch, dst, src, len); 683 desc = __pl330_prep_dma_memcpy(pch, dst, src, len);
@@ -664,6 +686,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
664 686
665 desc->rqcfg.src_inc = 1; 687 desc->rqcfg.src_inc = 1;
666 desc->rqcfg.dst_inc = 1; 688 desc->rqcfg.dst_inc = 1;
689 desc->req.rqtype = MEMTOMEM;
667 690
668 /* Select max possible burst size */ 691 /* Select max possible burst size */
669 burst = pi->pcfg.data_bus_width / 8; 692 burst = pi->pcfg.data_bus_width / 8;
@@ -692,25 +715,14 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
692{ 715{
693 struct dma_pl330_desc *first, *desc = NULL; 716 struct dma_pl330_desc *first, *desc = NULL;
694 struct dma_pl330_chan *pch = to_pchan(chan); 717 struct dma_pl330_chan *pch = to_pchan(chan);
695 struct dma_pl330_peri *peri = chan->private;
696 struct scatterlist *sg; 718 struct scatterlist *sg;
697 unsigned long flags; 719 unsigned long flags;
698 int i; 720 int i;
699 dma_addr_t addr; 721 dma_addr_t addr;
700 722
701 if (unlikely(!pch || !sgl || !sg_len || !peri)) 723 if (unlikely(!pch || !sgl || !sg_len))
702 return NULL; 724 return NULL;
703 725
704 /* Make sure the direction is consistent */
705 if ((direction == DMA_TO_DEVICE &&
706 peri->rqtype != MEMTODEV) ||
707 (direction == DMA_FROM_DEVICE &&
708 peri->rqtype != DEVTOMEM)) {
709 dev_err(pch->dmac->pif.dev, "%s:%d Invalid Direction\n",
710 __func__, __LINE__);
711 return NULL;
712 }
713
714 addr = pch->fifo_addr; 726 addr = pch->fifo_addr;
715 727
716 first = NULL; 728 first = NULL;
@@ -750,11 +762,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
750 if (direction == DMA_TO_DEVICE) { 762 if (direction == DMA_TO_DEVICE) {
751 desc->rqcfg.src_inc = 1; 763 desc->rqcfg.src_inc = 1;
752 desc->rqcfg.dst_inc = 0; 764 desc->rqcfg.dst_inc = 0;
765 desc->req.rqtype = MEMTODEV;
753 fill_px(&desc->px, 766 fill_px(&desc->px,
754 addr, sg_dma_address(sg), sg_dma_len(sg)); 767 addr, sg_dma_address(sg), sg_dma_len(sg));
755 } else { 768 } else {
756 desc->rqcfg.src_inc = 0; 769 desc->rqcfg.src_inc = 0;
757 desc->rqcfg.dst_inc = 1; 770 desc->rqcfg.dst_inc = 1;
771 desc->req.rqtype = DEVTOMEM;
758 fill_px(&desc->px, 772 fill_px(&desc->px,
759 sg_dma_address(sg), addr, sg_dma_len(sg)); 773 sg_dma_address(sg), addr, sg_dma_len(sg));
760 } 774 }
@@ -856,32 +870,16 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
856 INIT_LIST_HEAD(&pd->channels); 870 INIT_LIST_HEAD(&pd->channels);
857 871
858 /* Initialize channel parameters */ 872 /* Initialize channel parameters */
859 num_chan = max(pdat ? pdat->nr_valid_peri : 0, (u8)pi->pcfg.num_chan); 873 num_chan = max(pdat ? pdat->nr_valid_peri : (u8)pi->pcfg.num_peri,
874 (u8)pi->pcfg.num_chan);
860 pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL); 875 pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL);
861 876
862 for (i = 0; i < num_chan; i++) { 877 for (i = 0; i < num_chan; i++) {
863 pch = &pdmac->peripherals[i]; 878 pch = &pdmac->peripherals[i];
864 if (pdat) { 879 if (!adev->dev.of_node)
865 struct dma_pl330_peri *peri = &pdat->peri[i]; 880 pch->chan.private = pdat ? &pdat->peri_id[i] : NULL;
866 881 else
867 switch (peri->rqtype) { 882 pch->chan.private = adev->dev.of_node;
868 case MEMTOMEM:
869 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
870 break;
871 case MEMTODEV:
872 case DEVTOMEM:
873 dma_cap_set(DMA_SLAVE, pd->cap_mask);
874 dma_cap_set(DMA_CYCLIC, pd->cap_mask);
875 break;
876 default:
877 dev_err(&adev->dev, "DEVTODEV Not Supported\n");
878 continue;
879 }
880 pch->chan.private = peri;
881 } else {
882 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
883 pch->chan.private = NULL;
884 }
885 883
886 INIT_LIST_HEAD(&pch->work_list); 884 INIT_LIST_HEAD(&pch->work_list);
887 spin_lock_init(&pch->lock); 885 spin_lock_init(&pch->lock);
@@ -894,6 +892,15 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
894 } 892 }
895 893
896 pd->dev = &adev->dev; 894 pd->dev = &adev->dev;
895 if (pdat) {
896 pd->cap_mask = pdat->cap_mask;
897 } else {
898 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
899 if (pi->pcfg.num_peri) {
900 dma_cap_set(DMA_SLAVE, pd->cap_mask);
901 dma_cap_set(DMA_CYCLIC, pd->cap_mask);
902 }
903 }
897 904
898 pd->device_alloc_chan_resources = pl330_alloc_chan_resources; 905 pd->device_alloc_chan_resources = pl330_alloc_chan_resources;
899 pd->device_free_chan_resources = pl330_free_chan_resources; 906 pd->device_free_chan_resources = pl330_free_chan_resources;
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 5099681cf503..e3380137b05b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -141,6 +141,12 @@ config GPIO_PL061
141 help 141 help
142 Say yes here to support the PrimeCell PL061 GPIO device 142 Say yes here to support the PrimeCell PL061 GPIO device
143 143
144config GPIO_PXA
145 bool "PXA GPIO support"
146 depends on ARCH_PXA || ARCH_MMP
147 help
148 Say yes here to support the PXA GPIO device
149
144config GPIO_XILINX 150config GPIO_XILINX
145 bool "Xilinx GPIO support" 151 bool "Xilinx GPIO support"
146 depends on PPC_OF || MICROBLAZE 152 depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4e018d6a7639..8ef9e9abe970 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o
40obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o 40obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o
41obj-$(CONFIG_GPIO_PCH) += gpio-pch.o 41obj-$(CONFIG_GPIO_PCH) += gpio-pch.o
42obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o 42obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
43obj-$(CONFIG_PLAT_PXA) += gpio-pxa.o 43obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
44obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o 44obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
45obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o 45obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o
46obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o 46obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index ee137712f9db..b2d3ee1d183a 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -11,14 +11,46 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/clk.h>
15#include <linux/err.h>
14#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/gpio-pxa.h>
15#include <linux/init.h> 18#include <linux/init.h>
16#include <linux/irq.h> 19#include <linux/irq.h>
17#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/platform_device.h>
18#include <linux/syscore_ops.h> 22#include <linux/syscore_ops.h>
19#include <linux/slab.h> 23#include <linux/slab.h>
20 24
21#include <mach/gpio-pxa.h> 25/*
26 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
27 * one set of registers. The register offsets are organized below:
28 *
29 * GPLR GPDR GPSR GPCR GRER GFER GEDR
30 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
31 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
32 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
33 *
34 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
35 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
36 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
37 *
38 * NOTE:
39 * BANK 3 is only available on PXA27x and later processors.
40 * BANK 4 and 5 are only available on PXA935
41 */
42
43#define GPLR_OFFSET 0x00
44#define GPDR_OFFSET 0x0C
45#define GPSR_OFFSET 0x18
46#define GPCR_OFFSET 0x24
47#define GRER_OFFSET 0x30
48#define GFER_OFFSET 0x3C
49#define GEDR_OFFSET 0x48
50#define GAFR_OFFSET 0x54
51#define ED_MASK_OFFSET 0x9C /* GPIO edge detection for AP side */
52
53#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
22 54
23int pxa_last_gpio; 55int pxa_last_gpio;
24 56
@@ -39,8 +71,20 @@ struct pxa_gpio_chip {
39#endif 71#endif
40}; 72};
41 73
74enum {
75 PXA25X_GPIO = 0,
76 PXA26X_GPIO,
77 PXA27X_GPIO,
78 PXA3XX_GPIO,
79 PXA93X_GPIO,
80 MMP_GPIO = 0x10,
81 MMP2_GPIO,
82};
83
42static DEFINE_SPINLOCK(gpio_lock); 84static DEFINE_SPINLOCK(gpio_lock);
43static struct pxa_gpio_chip *pxa_gpio_chips; 85static struct pxa_gpio_chip *pxa_gpio_chips;
86static int gpio_type;
87static void __iomem *gpio_reg_base;
44 88
45#define for_each_gpio_chip(i, c) \ 89#define for_each_gpio_chip(i, c) \
46 for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) 90 for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
@@ -55,6 +99,122 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
55 return &pxa_gpio_chips[gpio_to_bank(gpio)]; 99 return &pxa_gpio_chips[gpio_to_bank(gpio)];
56} 100}
57 101
102static inline int gpio_is_pxa_type(int type)
103{
104 return (type & MMP_GPIO) == 0;
105}
106
107static inline int gpio_is_mmp_type(int type)
108{
109 return (type & MMP_GPIO) != 0;
110}
111
112/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
113 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
114 */
115static inline int __gpio_is_inverted(int gpio)
116{
117 if ((gpio_type == PXA26X_GPIO) && (gpio > 85))
118 return 1;
119 return 0;
120}
121
122/*
123 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
124 * function of a GPIO, and GPDRx cannot be altered once configured. It
125 * is attributed as "occupied" here (I know this terminology isn't
126 * accurate, you are welcome to propose a better one :-)
127 */
128static inline int __gpio_is_occupied(unsigned gpio)
129{
130 struct pxa_gpio_chip *pxachip;
131 void __iomem *base;
132 unsigned long gafr = 0, gpdr = 0;
133 int ret, af = 0, dir = 0;
134
135 pxachip = gpio_to_pxachip(gpio);
136 base = gpio_chip_base(&pxachip->chip);
137 gpdr = readl_relaxed(base + GPDR_OFFSET);
138
139 switch (gpio_type) {
140 case PXA25X_GPIO:
141 case PXA26X_GPIO:
142 case PXA27X_GPIO:
143 gafr = readl_relaxed(base + GAFR_OFFSET);
144 af = (gafr >> ((gpio & 0xf) * 2)) & 0x3;
145 dir = gpdr & GPIO_bit(gpio);
146
147 if (__gpio_is_inverted(gpio))
148 ret = (af != 1) || (dir == 0);
149 else
150 ret = (af != 0) || (dir != 0);
151 break;
152 default:
153 ret = gpdr & GPIO_bit(gpio);
154 break;
155 }
156 return ret;
157}
158
159#ifdef CONFIG_ARCH_PXA
160static inline int __pxa_gpio_to_irq(int gpio)
161{
162 if (gpio_is_pxa_type(gpio_type))
163 return PXA_GPIO_TO_IRQ(gpio);
164 return -1;
165}
166
167static inline int __pxa_irq_to_gpio(int irq)
168{
169 if (gpio_is_pxa_type(gpio_type))
170 return irq - PXA_GPIO_TO_IRQ(0);
171 return -1;
172}
173#else
174static inline int __pxa_gpio_to_irq(int gpio) { return -1; }
175static inline int __pxa_irq_to_gpio(int irq) { return -1; }
176#endif
177
178#ifdef CONFIG_ARCH_MMP
179static inline int __mmp_gpio_to_irq(int gpio)
180{
181 if (gpio_is_mmp_type(gpio_type))
182 return MMP_GPIO_TO_IRQ(gpio);
183 return -1;
184}
185
186static inline int __mmp_irq_to_gpio(int irq)
187{
188 if (gpio_is_mmp_type(gpio_type))
189 return irq - MMP_GPIO_TO_IRQ(0);
190 return -1;
191}
192#else
193static inline int __mmp_gpio_to_irq(int gpio) { return -1; }
194static inline int __mmp_irq_to_gpio(int irq) { return -1; }
195#endif
196
197static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
198{
199 int gpio, ret;
200
201 gpio = chip->base + offset;
202 ret = __pxa_gpio_to_irq(gpio);
203 if (ret >= 0)
204 return ret;
205 return __mmp_gpio_to_irq(gpio);
206}
207
208int pxa_irq_to_gpio(int irq)
209{
210 int ret;
211
212 ret = __pxa_irq_to_gpio(irq);
213 if (ret >= 0)
214 return ret;
215 return __mmp_irq_to_gpio(irq);
216}
217
58static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 218static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
59{ 219{
60 void __iomem *base = gpio_chip_base(chip); 220 void __iomem *base = gpio_chip_base(chip);
@@ -63,12 +223,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
63 223
64 spin_lock_irqsave(&gpio_lock, flags); 224 spin_lock_irqsave(&gpio_lock, flags);
65 225
66 value = __raw_readl(base + GPDR_OFFSET); 226 value = readl_relaxed(base + GPDR_OFFSET);
67 if (__gpio_is_inverted(chip->base + offset)) 227 if (__gpio_is_inverted(chip->base + offset))
68 value |= mask; 228 value |= mask;
69 else 229 else
70 value &= ~mask; 230 value &= ~mask;
71 __raw_writel(value, base + GPDR_OFFSET); 231 writel_relaxed(value, base + GPDR_OFFSET);
72 232
73 spin_unlock_irqrestore(&gpio_lock, flags); 233 spin_unlock_irqrestore(&gpio_lock, flags);
74 return 0; 234 return 0;
@@ -81,16 +241,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
81 uint32_t tmp, mask = 1 << offset; 241 uint32_t tmp, mask = 1 << offset;
82 unsigned long flags; 242 unsigned long flags;
83 243
84 __raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); 244 writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
85 245
86 spin_lock_irqsave(&gpio_lock, flags); 246 spin_lock_irqsave(&gpio_lock, flags);
87 247
88 tmp = __raw_readl(base + GPDR_OFFSET); 248 tmp = readl_relaxed(base + GPDR_OFFSET);
89 if (__gpio_is_inverted(chip->base + offset)) 249 if (__gpio_is_inverted(chip->base + offset))
90 tmp &= ~mask; 250 tmp &= ~mask;
91 else 251 else
92 tmp |= mask; 252 tmp |= mask;
93 __raw_writel(tmp, base + GPDR_OFFSET); 253 writel_relaxed(tmp, base + GPDR_OFFSET);
94 254
95 spin_unlock_irqrestore(&gpio_lock, flags); 255 spin_unlock_irqrestore(&gpio_lock, flags);
96 return 0; 256 return 0;
@@ -98,16 +258,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
98 258
99static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) 259static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset)
100{ 260{
101 return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset); 261 return readl_relaxed(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset);
102} 262}
103 263
104static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 264static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
105{ 265{
106 __raw_writel(1 << offset, gpio_chip_base(chip) + 266 writel_relaxed(1 << offset, gpio_chip_base(chip) +
107 (value ? GPSR_OFFSET : GPCR_OFFSET)); 267 (value ? GPSR_OFFSET : GPCR_OFFSET));
108} 268}
109 269
110static int __init pxa_init_gpio_chip(int gpio_end) 270static int __devinit pxa_init_gpio_chip(int gpio_end)
111{ 271{
112 int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; 272 int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
113 struct pxa_gpio_chip *chips; 273 struct pxa_gpio_chip *chips;
@@ -122,7 +282,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
122 struct gpio_chip *c = &chips[i].chip; 282 struct gpio_chip *c = &chips[i].chip;
123 283
124 sprintf(chips[i].label, "gpio-%d", i); 284 sprintf(chips[i].label, "gpio-%d", i);
125 chips[i].regbase = GPIO_BANK(i); 285 chips[i].regbase = gpio_reg_base + BANK_OFF(i);
126 286
127 c->base = gpio; 287 c->base = gpio;
128 c->label = chips[i].label; 288 c->label = chips[i].label;
@@ -131,6 +291,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
131 c->direction_output = pxa_gpio_direction_output; 291 c->direction_output = pxa_gpio_direction_output;
132 c->get = pxa_gpio_get; 292 c->get = pxa_gpio_get;
133 c->set = pxa_gpio_set; 293 c->set = pxa_gpio_set;
294 c->to_irq = pxa_gpio_to_irq;
134 295
135 /* number of GPIOs on last bank may be less than 32 */ 296 /* number of GPIOs on last bank may be less than 32 */
136 c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32; 297 c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@@ -147,18 +308,18 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
147{ 308{
148 uint32_t grer, gfer; 309 uint32_t grer, gfer;
149 310
150 grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask; 311 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask;
151 gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask; 312 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask;
152 grer |= c->irq_edge_rise & c->irq_mask; 313 grer |= c->irq_edge_rise & c->irq_mask;
153 gfer |= c->irq_edge_fall & c->irq_mask; 314 gfer |= c->irq_edge_fall & c->irq_mask;
154 __raw_writel(grer, c->regbase + GRER_OFFSET); 315 writel_relaxed(grer, c->regbase + GRER_OFFSET);
155 __raw_writel(gfer, c->regbase + GFER_OFFSET); 316 writel_relaxed(gfer, c->regbase + GFER_OFFSET);
156} 317}
157 318
158static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) 319static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
159{ 320{
160 struct pxa_gpio_chip *c; 321 struct pxa_gpio_chip *c;
161 int gpio = irq_to_gpio(d->irq); 322 int gpio = pxa_irq_to_gpio(d->irq);
162 unsigned long gpdr, mask = GPIO_bit(gpio); 323 unsigned long gpdr, mask = GPIO_bit(gpio);
163 324
164 c = gpio_to_pxachip(gpio); 325 c = gpio_to_pxachip(gpio);
@@ -176,12 +337,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
176 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; 337 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
177 } 338 }
178 339
179 gpdr = __raw_readl(c->regbase + GPDR_OFFSET); 340 gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
180 341
181 if (__gpio_is_inverted(gpio)) 342 if (__gpio_is_inverted(gpio))
182 __raw_writel(gpdr | mask, c->regbase + GPDR_OFFSET); 343 writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET);
183 else 344 else
184 __raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET); 345 writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET);
185 346
186 if (type & IRQ_TYPE_EDGE_RISING) 347 if (type & IRQ_TYPE_EDGE_RISING)
187 c->irq_edge_rise |= mask; 348 c->irq_edge_rise |= mask;
@@ -212,9 +373,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
212 for_each_gpio_chip(gpio, c) { 373 for_each_gpio_chip(gpio, c) {
213 gpio_base = c->chip.base; 374 gpio_base = c->chip.base;
214 375
215 gedr = __raw_readl(c->regbase + GEDR_OFFSET); 376 gedr = readl_relaxed(c->regbase + GEDR_OFFSET);
216 gedr = gedr & c->irq_mask; 377 gedr = gedr & c->irq_mask;
217 __raw_writel(gedr, c->regbase + GEDR_OFFSET); 378 writel_relaxed(gedr, c->regbase + GEDR_OFFSET);
218 379
219 n = find_first_bit(&gedr, BITS_PER_LONG); 380 n = find_first_bit(&gedr, BITS_PER_LONG);
220 while (n < BITS_PER_LONG) { 381 while (n < BITS_PER_LONG) {
@@ -229,29 +390,29 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
229 390
230static void pxa_ack_muxed_gpio(struct irq_data *d) 391static void pxa_ack_muxed_gpio(struct irq_data *d)
231{ 392{
232 int gpio = irq_to_gpio(d->irq); 393 int gpio = pxa_irq_to_gpio(d->irq);
233 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); 394 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
234 395
235 __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); 396 writel_relaxed(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
236} 397}
237 398
238static void pxa_mask_muxed_gpio(struct irq_data *d) 399static void pxa_mask_muxed_gpio(struct irq_data *d)
239{ 400{
240 int gpio = irq_to_gpio(d->irq); 401 int gpio = pxa_irq_to_gpio(d->irq);
241 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); 402 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
242 uint32_t grer, gfer; 403 uint32_t grer, gfer;
243 404
244 c->irq_mask &= ~GPIO_bit(gpio); 405 c->irq_mask &= ~GPIO_bit(gpio);
245 406
246 grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio); 407 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio);
247 gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio); 408 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio);
248 __raw_writel(grer, c->regbase + GRER_OFFSET); 409 writel_relaxed(grer, c->regbase + GRER_OFFSET);
249 __raw_writel(gfer, c->regbase + GFER_OFFSET); 410 writel_relaxed(gfer, c->regbase + GFER_OFFSET);
250} 411}
251 412
252static void pxa_unmask_muxed_gpio(struct irq_data *d) 413static void pxa_unmask_muxed_gpio(struct irq_data *d)
253{ 414{
254 int gpio = irq_to_gpio(d->irq); 415 int gpio = pxa_irq_to_gpio(d->irq);
255 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); 416 struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
256 417
257 c->irq_mask |= GPIO_bit(gpio); 418 c->irq_mask |= GPIO_bit(gpio);
@@ -266,34 +427,143 @@ static struct irq_chip pxa_muxed_gpio_chip = {
266 .irq_set_type = pxa_gpio_irq_type, 427 .irq_set_type = pxa_gpio_irq_type,
267}; 428};
268 429
269void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) 430static int pxa_gpio_nums(void)
270{ 431{
271 struct pxa_gpio_chip *c; 432 int count = 0;
272 int gpio, irq; 433
434#ifdef CONFIG_ARCH_PXA
435 if (cpu_is_pxa25x()) {
436#ifdef CONFIG_CPU_PXA26x
437 count = 89;
438 gpio_type = PXA26X_GPIO;
439#elif defined(CONFIG_PXA25x)
440 count = 84;
441 gpio_type = PXA26X_GPIO;
442#endif /* CONFIG_CPU_PXA26x */
443 } else if (cpu_is_pxa27x()) {
444 count = 120;
445 gpio_type = PXA27X_GPIO;
446 } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
447 count = 191;
448 gpio_type = PXA93X_GPIO;
449 } else if (cpu_is_pxa3xx()) {
450 count = 127;
451 gpio_type = PXA3XX_GPIO;
452 }
453#endif /* CONFIG_ARCH_PXA */
454
455#ifdef CONFIG_ARCH_MMP
456 if (cpu_is_pxa168() || cpu_is_pxa910()) {
457 count = 127;
458 gpio_type = MMP_GPIO;
459 } else if (cpu_is_mmp2()) {
460 count = 191;
461 gpio_type = MMP2_GPIO;
462 }
463#endif /* CONFIG_ARCH_MMP */
464 return count;
465}
273 466
274 pxa_last_gpio = end; 467static int __devinit pxa_gpio_probe(struct platform_device *pdev)
468{
469 struct pxa_gpio_chip *c;
470 struct resource *res;
471 struct clk *clk;
472 int gpio, irq, ret;
473 int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
474
475 pxa_last_gpio = pxa_gpio_nums();
476 if (!pxa_last_gpio)
477 return -EINVAL;
478
479 irq0 = platform_get_irq_byname(pdev, "gpio0");
480 irq1 = platform_get_irq_byname(pdev, "gpio1");
481 irq_mux = platform_get_irq_byname(pdev, "gpio_mux");
482 if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0)
483 || (irq_mux <= 0))
484 return -EINVAL;
485 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
486 if (!res)
487 return -EINVAL;
488 gpio_reg_base = ioremap(res->start, resource_size(res));
489 if (!gpio_reg_base)
490 return -EINVAL;
491
492 if (irq0 > 0)
493 gpio_offset = 2;
494
495 clk = clk_get(&pdev->dev, NULL);
496 if (IS_ERR(clk)) {
497 dev_err(&pdev->dev, "Error %ld to get gpio clock\n",
498 PTR_ERR(clk));
499 iounmap(gpio_reg_base);
500 return PTR_ERR(clk);
501 }
502 ret = clk_prepare(clk);
503 if (ret) {
504 clk_put(clk);
505 iounmap(gpio_reg_base);
506 return ret;
507 }
508 ret = clk_enable(clk);
509 if (ret) {
510 clk_unprepare(clk);
511 clk_put(clk);
512 iounmap(gpio_reg_base);
513 return ret;
514 }
275 515
276 /* Initialize GPIO chips */ 516 /* Initialize GPIO chips */
277 pxa_init_gpio_chip(end); 517 pxa_init_gpio_chip(pxa_last_gpio);
278 518
279 /* clear all GPIO edge detects */ 519 /* clear all GPIO edge detects */
280 for_each_gpio_chip(gpio, c) { 520 for_each_gpio_chip(gpio, c) {
281 __raw_writel(0, c->regbase + GFER_OFFSET); 521 writel_relaxed(0, c->regbase + GFER_OFFSET);
282 __raw_writel(0, c->regbase + GRER_OFFSET); 522 writel_relaxed(0, c->regbase + GRER_OFFSET);
283 __raw_writel(~0,c->regbase + GEDR_OFFSET); 523 writel_relaxed(~0,c->regbase + GEDR_OFFSET);
524 /* unmask GPIO edge detect for AP side */
525 if (gpio_is_mmp_type(gpio_type))
526 writel_relaxed(~0, c->regbase + ED_MASK_OFFSET);
284 } 527 }
285 528
286 for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { 529#ifdef CONFIG_ARCH_PXA
530 irq = gpio_to_irq(0);
531 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
532 handle_edge_irq);
533 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
534 irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);
535
536 irq = gpio_to_irq(1);
537 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
538 handle_edge_irq);
539 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
540 irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
541#endif
542
543 for (irq = gpio_to_irq(gpio_offset);
544 irq <= gpio_to_irq(pxa_last_gpio); irq++) {
287 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, 545 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
288 handle_edge_irq); 546 handle_edge_irq);
289 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 547 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
290 } 548 }
291 549
292 /* Install handler for GPIO>=2 edge detect interrupts */ 550 irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);
293 irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler); 551 return 0;
294 pxa_muxed_gpio_chip.irq_set_wake = fn;
295} 552}
296 553
554static struct platform_driver pxa_gpio_driver = {
555 .probe = pxa_gpio_probe,
556 .driver = {
557 .name = "pxa-gpio",
558 },
559};
560
561static int __init pxa_gpio_init(void)
562{
563 return platform_driver_register(&pxa_gpio_driver);
564}
565postcore_initcall(pxa_gpio_init);
566
297#ifdef CONFIG_PM 567#ifdef CONFIG_PM
298static int pxa_gpio_suspend(void) 568static int pxa_gpio_suspend(void)
299{ 569{
@@ -301,13 +571,13 @@ static int pxa_gpio_suspend(void)
301 int gpio; 571 int gpio;
302 572
303 for_each_gpio_chip(gpio, c) { 573 for_each_gpio_chip(gpio, c) {
304 c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET); 574 c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET);
305 c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET); 575 c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET);
306 c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET); 576 c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET);
307 c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET); 577 c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET);
308 578
309 /* Clear GPIO transition detect bits */ 579 /* Clear GPIO transition detect bits */
310 __raw_writel(0xffffffff, c->regbase + GEDR_OFFSET); 580 writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET);
311 } 581 }
312 return 0; 582 return 0;
313} 583}
@@ -319,12 +589,12 @@ static void pxa_gpio_resume(void)
319 589
320 for_each_gpio_chip(gpio, c) { 590 for_each_gpio_chip(gpio, c) {
321 /* restore level with set/clear */ 591 /* restore level with set/clear */
322 __raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET); 592 writel_relaxed( c->saved_gplr, c->regbase + GPSR_OFFSET);
323 __raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET); 593 writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET);
324 594
325 __raw_writel(c->saved_grer, c->regbase + GRER_OFFSET); 595 writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET);
326 __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET); 596 writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET);
327 __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET); 597 writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET);
328 } 598 }
329} 599}
330#else 600#else
@@ -336,3 +606,10 @@ struct syscore_ops pxa_gpio_syscore_ops = {
336 .suspend = pxa_gpio_suspend, 606 .suspend = pxa_gpio_suspend,
337 .resume = pxa_gpio_resume, 607 .resume = pxa_gpio_resume,
338}; 608};
609
610static int __init pxa_gpio_sysinit(void)
611{
612 register_syscore_ops(&pxa_gpio_syscore_ops);
613 return 0;
614}
615postcore_initcall(pxa_gpio_sysinit);
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index ab098ba9f1dd..a7661773c052 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -24,6 +24,9 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/of.h>
28#include <linux/slab.h>
29#include <linux/of_address.h>
27 30
28#include <asm/irq.h> 31#include <asm/irq.h>
29 32
@@ -2383,6 +2386,63 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
2383#endif 2386#endif
2384}; 2387};
2385 2388
2389#if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF)
2390static int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np,
2391 const void *gpio_spec, u32 *flags)
2392{
2393 const __be32 *gpio = gpio_spec;
2394 const u32 n = be32_to_cpup(gpio);
2395 unsigned int pin = gc->base + be32_to_cpu(gpio[0]);
2396
2397 if (WARN_ON(gc->of_gpio_n_cells < 4))
2398 return -EINVAL;
2399
2400 if (n > gc->ngpio)
2401 return -EINVAL;
2402
2403 if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1]))))
2404 pr_warn("gpio_xlate: failed to set pin function\n");
2405 if (s3c_gpio_setpull(pin, be32_to_cpu(gpio[2])))
2406 pr_warn("gpio_xlate: failed to set pin pull up/down\n");
2407 if (s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3])))
2408 pr_warn("gpio_xlate: failed to set pin drive strength\n");
2409
2410 return n;
2411}
2412
2413static const struct of_device_id exynos4_gpio_dt_match[] __initdata = {
2414 { .compatible = "samsung,exynos4-gpio", },
2415 {}
2416};
2417
2418static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
2419 u64 base, u64 offset)
2420{
2421 struct gpio_chip *gc = &chip->chip;
2422 u64 address;
2423
2424 if (!of_have_populated_dt())
2425 return;
2426
2427 address = chip->base ? base + ((u32)chip->base & 0xfff) : base + offset;
2428 gc->of_node = of_find_matching_node_by_address(NULL,
2429 exynos4_gpio_dt_match, address);
2430 if (!gc->of_node) {
2431 pr_info("gpio: device tree node not found for gpio controller"
2432 " with base address %08llx\n", address);
2433 return;
2434 }
2435 gc->of_gpio_n_cells = 4;
2436 gc->of_xlate = exynos4_gpio_xlate;
2437}
2438#elif defined(CONFIG_ARCH_EXYNOS4)
2439static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
2440 u64 base, u64 offset)
2441{
2442 return;
2443}
2444#endif /* defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) */
2445
2386/* TODO: cleanup soc_is_* */ 2446/* TODO: cleanup soc_is_* */
2387static __init int samsung_gpiolib_init(void) 2447static __init int samsung_gpiolib_init(void)
2388{ 2448{
@@ -2464,6 +2524,10 @@ static __init int samsung_gpiolib_init(void)
2464 chip->config = &exynos4_gpio_cfg; 2524 chip->config = &exynos4_gpio_cfg;
2465 chip->group = group++; 2525 chip->group = group++;
2466 } 2526 }
2527#ifdef CONFIG_CPU_EXYNOS4210
2528 exynos4_gpiolib_attach_ofnode(chip,
2529 EXYNOS4_PA_GPIO1, i * 0x20);
2530#endif
2467 } 2531 }
2468 samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1); 2532 samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1);
2469 2533
@@ -2476,6 +2540,10 @@ static __init int samsung_gpiolib_init(void)
2476 chip->config = &exynos4_gpio_cfg; 2540 chip->config = &exynos4_gpio_cfg;
2477 chip->group = group++; 2541 chip->group = group++;
2478 } 2542 }
2543#ifdef CONFIG_CPU_EXYNOS4210
2544 exynos4_gpiolib_attach_ofnode(chip,
2545 EXYNOS4_PA_GPIO2, i * 0x20);
2546#endif
2479 } 2547 }
2480 samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2); 2548 samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2);
2481 2549
@@ -2488,6 +2556,10 @@ static __init int samsung_gpiolib_init(void)
2488 chip->config = &exynos4_gpio_cfg; 2556 chip->config = &exynos4_gpio_cfg;
2489 chip->group = group++; 2557 chip->group = group++;
2490 } 2558 }
2559#ifdef CONFIG_CPU_EXYNOS4210
2560 exynos4_gpiolib_attach_ofnode(chip,
2561 EXYNOS4_PA_GPIO3, i * 0x20);
2562#endif
2491 } 2563 }
2492 samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3); 2564 samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3);
2493 2565
diff --git a/drivers/hv/hv_kvp.c b/drivers/hv/hv_kvp.c
index 89f52440fcf4..0e8343f585bb 100644
--- a/drivers/hv/hv_kvp.c
+++ b/drivers/hv/hv_kvp.c
@@ -212,11 +212,13 @@ kvp_respond_to_host(char *key, char *value, int error)
212 * The windows host expects the key/value pair to be encoded 212 * The windows host expects the key/value pair to be encoded
213 * in utf16. 213 * in utf16.
214 */ 214 */
215 keylen = utf8s_to_utf16s(key_name, strlen(key_name), 215 keylen = utf8s_to_utf16s(key_name, strlen(key_name), UTF16_HOST_ENDIAN,
216 (wchar_t *)kvp_data->data.key); 216 (wchar_t *) kvp_data->data.key,
217 HV_KVP_EXCHANGE_MAX_KEY_SIZE / 2);
217 kvp_data->data.key_size = 2*(keylen + 1); /* utf16 encoding */ 218 kvp_data->data.key_size = 2*(keylen + 1); /* utf16 encoding */
218 valuelen = utf8s_to_utf16s(value, strlen(value), 219 valuelen = utf8s_to_utf16s(value, strlen(value), UTF16_HOST_ENDIAN,
219 (wchar_t *)kvp_data->data.value); 220 (wchar_t *) kvp_data->data.value,
221 HV_KVP_EXCHANGE_MAX_VALUE_SIZE / 2);
220 kvp_data->data.value_size = 2*(valuelen + 1); /* utf16 encoding */ 222 kvp_data->data.value_size = 2*(valuelen + 1); /* utf16 encoding */
221 223
222 kvp_data->data.value_type = REG_SZ; /* all our values are strings */ 224 kvp_data->data.value_type = REG_SZ; /* all our values are strings */
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 46b6500c5478..6381604696d3 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -558,7 +558,7 @@ static const struct i2c_algorithm tegra_i2c_algo = {
558 .functionality = tegra_i2c_func, 558 .functionality = tegra_i2c_func,
559}; 559};
560 560
561static int tegra_i2c_probe(struct platform_device *pdev) 561static int __devinit tegra_i2c_probe(struct platform_device *pdev)
562{ 562{
563 struct tegra_i2c_dev *i2c_dev; 563 struct tegra_i2c_dev *i2c_dev;
564 struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data; 564 struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data;
@@ -636,7 +636,10 @@ static int tegra_i2c_probe(struct platform_device *pdev)
636 i2c_dev->bus_clk_rate = be32_to_cpup(prop); 636 i2c_dev->bus_clk_rate = be32_to_cpup(prop);
637 } 637 }
638 638
639 if (pdev->id == 3) 639 if (pdev->dev.of_node)
640 i2c_dev->is_dvc = of_device_is_compatible(pdev->dev.of_node,
641 "nvidia,tegra20-i2c-dvc");
642 else if (pdev->id == 3)
640 i2c_dev->is_dvc = 1; 643 i2c_dev->is_dvc = 1;
641 init_completion(&i2c_dev->msg_complete); 644 init_completion(&i2c_dev->msg_complete);
642 645
@@ -690,7 +693,7 @@ err_iounmap:
690 return ret; 693 return ret;
691} 694}
692 695
693static int tegra_i2c_remove(struct platform_device *pdev) 696static int __devexit tegra_i2c_remove(struct platform_device *pdev)
694{ 697{
695 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); 698 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
696 i2c_del_adapter(&i2c_dev->adapter); 699 i2c_del_adapter(&i2c_dev->adapter);
@@ -742,6 +745,7 @@ static int tegra_i2c_resume(struct platform_device *pdev)
742/* Match table for of_platform binding */ 745/* Match table for of_platform binding */
743static const struct of_device_id tegra_i2c_of_match[] __devinitconst = { 746static const struct of_device_id tegra_i2c_of_match[] __devinitconst = {
744 { .compatible = "nvidia,tegra20-i2c", }, 747 { .compatible = "nvidia,tegra20-i2c", },
748 { .compatible = "nvidia,tegra20-i2c-dvc", },
745 {}, 749 {},
746}; 750};
747MODULE_DEVICE_TABLE(of, tegra_i2c_of_match); 751MODULE_DEVICE_TABLE(of, tegra_i2c_of_match);
diff --git a/drivers/ide/at91_ide.c b/drivers/ide/at91_ide.c
index 6dede8f366c5..41d415529479 100644
--- a/drivers/ide/at91_ide.c
+++ b/drivers/ide/at91_ide.c
@@ -314,7 +314,7 @@ static int __init at91_ide_probe(struct platform_device *pdev)
314 apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0); 314 apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
315 315
316 /* with GPIO interrupt we have to do quirks in handler */ 316 /* with GPIO interrupt we have to do quirks in handler */
317 if (board->irq_pin >= PIN_BASE) 317 if (gpio_is_valid(board->irq_pin))
318 host->irq_handler = at91_irq_handler; 318 host->irq_handler = at91_irq_handler;
319 319
320 host->ports[0]->select_data = board->chipselect; 320 host->ports[0]->select_data = board->chipselect;
diff --git a/drivers/input/keyboard/samsung-keypad.c b/drivers/input/keyboard/samsung-keypad.c
index f689f49e3109..8a0060cd3982 100644
--- a/drivers/input/keyboard/samsung-keypad.c
+++ b/drivers/input/keyboard/samsung-keypad.c
@@ -21,6 +21,8 @@
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/of.h>
25#include <linux/of_gpio.h>
24#include <linux/sched.h> 26#include <linux/sched.h>
25#include <plat/keypad.h> 27#include <plat/keypad.h>
26 28
@@ -68,31 +70,26 @@ struct samsung_keypad {
68 wait_queue_head_t wait; 70 wait_queue_head_t wait;
69 bool stopped; 71 bool stopped;
70 int irq; 72 int irq;
73 enum samsung_keypad_type type;
71 unsigned int row_shift; 74 unsigned int row_shift;
72 unsigned int rows; 75 unsigned int rows;
73 unsigned int cols; 76 unsigned int cols;
74 unsigned int row_state[SAMSUNG_MAX_COLS]; 77 unsigned int row_state[SAMSUNG_MAX_COLS];
78#ifdef CONFIG_OF
79 int row_gpios[SAMSUNG_MAX_ROWS];
80 int col_gpios[SAMSUNG_MAX_COLS];
81#endif
75 unsigned short keycodes[]; 82 unsigned short keycodes[];
76}; 83};
77 84
78static int samsung_keypad_is_s5pv210(struct device *dev)
79{
80 struct platform_device *pdev = to_platform_device(dev);
81 enum samsung_keypad_type type =
82 platform_get_device_id(pdev)->driver_data;
83
84 return type == KEYPAD_TYPE_S5PV210;
85}
86
87static void samsung_keypad_scan(struct samsung_keypad *keypad, 85static void samsung_keypad_scan(struct samsung_keypad *keypad,
88 unsigned int *row_state) 86 unsigned int *row_state)
89{ 87{
90 struct device *dev = keypad->input_dev->dev.parent;
91 unsigned int col; 88 unsigned int col;
92 unsigned int val; 89 unsigned int val;
93 90
94 for (col = 0; col < keypad->cols; col++) { 91 for (col = 0; col < keypad->cols; col++) {
95 if (samsung_keypad_is_s5pv210(dev)) { 92 if (keypad->type == KEYPAD_TYPE_S5PV210) {
96 val = S5PV210_KEYIFCOLEN_MASK; 93 val = S5PV210_KEYIFCOLEN_MASK;
97 val &= ~(1 << col) << 8; 94 val &= ~(1 << col) << 8;
98 } else { 95 } else {
@@ -235,6 +232,126 @@ static void samsung_keypad_close(struct input_dev *input_dev)
235 samsung_keypad_stop(keypad); 232 samsung_keypad_stop(keypad);
236} 233}
237 234
235#ifdef CONFIG_OF
236static struct samsung_keypad_platdata *samsung_keypad_parse_dt(
237 struct device *dev)
238{
239 struct samsung_keypad_platdata *pdata;
240 struct matrix_keymap_data *keymap_data;
241 uint32_t *keymap, num_rows = 0, num_cols = 0;
242 struct device_node *np = dev->of_node, *key_np;
243 unsigned int key_count = 0;
244
245 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
246 if (!pdata) {
247 dev_err(dev, "could not allocate memory for platform data\n");
248 return NULL;
249 }
250
251 of_property_read_u32(np, "samsung,keypad-num-rows", &num_rows);
252 of_property_read_u32(np, "samsung,keypad-num-columns", &num_cols);
253 if (!num_rows || !num_cols) {
254 dev_err(dev, "number of keypad rows/columns not specified\n");
255 return NULL;
256 }
257 pdata->rows = num_rows;
258 pdata->cols = num_cols;
259
260 keymap_data = devm_kzalloc(dev, sizeof(*keymap_data), GFP_KERNEL);
261 if (!keymap_data) {
262 dev_err(dev, "could not allocate memory for keymap data\n");
263 return NULL;
264 }
265 pdata->keymap_data = keymap_data;
266
267 for_each_child_of_node(np, key_np)
268 key_count++;
269
270 keymap_data->keymap_size = key_count;
271 keymap = devm_kzalloc(dev, sizeof(uint32_t) * key_count, GFP_KERNEL);
272 if (!keymap) {
273 dev_err(dev, "could not allocate memory for keymap\n");
274 return NULL;
275 }
276 keymap_data->keymap = keymap;
277
278 for_each_child_of_node(np, key_np) {
279 u32 row, col, key_code;
280 of_property_read_u32(key_np, "keypad,row", &row);
281 of_property_read_u32(key_np, "keypad,column", &col);
282 of_property_read_u32(key_np, "linux,code", &key_code);
283 *keymap++ = KEY(row, col, key_code);
284 }
285
286 if (of_get_property(np, "linux,input-no-autorepeat", NULL))
287 pdata->no_autorepeat = true;
288 if (of_get_property(np, "linux,input-wakeup", NULL))
289 pdata->wakeup = true;
290
291 return pdata;
292}
293
294static void samsung_keypad_parse_dt_gpio(struct device *dev,
295 struct samsung_keypad *keypad)
296{
297 struct device_node *np = dev->of_node;
298 int gpio, ret, row, col;
299
300 for (row = 0; row < keypad->rows; row++) {
301 gpio = of_get_named_gpio(np, "row-gpios", row);
302 keypad->row_gpios[row] = gpio;
303 if (!gpio_is_valid(gpio)) {
304 dev_err(dev, "keypad row[%d]: invalid gpio %d\n",
305 row, gpio);
306 continue;
307 }
308
309 ret = gpio_request(gpio, "keypad-row");
310 if (ret)
311 dev_err(dev, "keypad row[%d] gpio request failed\n",
312 row);
313 }
314
315 for (col = 0; col < keypad->cols; col++) {
316 gpio = of_get_named_gpio(np, "col-gpios", col);
317 keypad->col_gpios[col] = gpio;
318 if (!gpio_is_valid(gpio)) {
319 dev_err(dev, "keypad column[%d]: invalid gpio %d\n",
320 col, gpio);
321 continue;
322 }
323
324 ret = gpio_request(gpio, "keypad-col");
325 if (ret)
326 dev_err(dev, "keypad column[%d] gpio request failed\n",
327 col);
328 }
329}
330
331static void samsung_keypad_dt_gpio_free(struct samsung_keypad *keypad)
332{
333 int cnt;
334
335 for (cnt = 0; cnt < keypad->rows; cnt++)
336 if (gpio_is_valid(keypad->row_gpios[cnt]))
337 gpio_free(keypad->row_gpios[cnt]);
338
339 for (cnt = 0; cnt < keypad->cols; cnt++)
340 if (gpio_is_valid(keypad->col_gpios[cnt]))
341 gpio_free(keypad->col_gpios[cnt]);
342}
343#else
344static
345struct samsung_keypad_platdata *samsung_keypad_parse_dt(struct device *dev)
346{
347 return NULL;
348}
349
350static void samsung_keypad_dt_gpio_free(struct samsung_keypad *keypad)
351{
352}
353#endif
354
238static int __devinit samsung_keypad_probe(struct platform_device *pdev) 355static int __devinit samsung_keypad_probe(struct platform_device *pdev)
239{ 356{
240 const struct samsung_keypad_platdata *pdata; 357 const struct samsung_keypad_platdata *pdata;
@@ -246,7 +363,10 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)
246 unsigned int keymap_size; 363 unsigned int keymap_size;
247 int error; 364 int error;
248 365
249 pdata = pdev->dev.platform_data; 366 if (pdev->dev.of_node)
367 pdata = samsung_keypad_parse_dt(&pdev->dev);
368 else
369 pdata = pdev->dev.platform_data;
250 if (!pdata) { 370 if (!pdata) {
251 dev_err(&pdev->dev, "no platform data defined\n"); 371 dev_err(&pdev->dev, "no platform data defined\n");
252 return -EINVAL; 372 return -EINVAL;
@@ -303,6 +423,16 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)
303 keypad->cols = pdata->cols; 423 keypad->cols = pdata->cols;
304 init_waitqueue_head(&keypad->wait); 424 init_waitqueue_head(&keypad->wait);
305 425
426 if (pdev->dev.of_node) {
427#ifdef CONFIG_OF
428 samsung_keypad_parse_dt_gpio(&pdev->dev, keypad);
429 keypad->type = of_device_is_compatible(pdev->dev.of_node,
430 "samsung,s5pv210-keypad");
431#endif
432 } else {
433 keypad->type = platform_get_device_id(pdev)->driver_data;
434 }
435
306 input_dev->name = pdev->name; 436 input_dev->name = pdev->name;
307 input_dev->id.bustype = BUS_HOST; 437 input_dev->id.bustype = BUS_HOST;
308 input_dev->dev.parent = &pdev->dev; 438 input_dev->dev.parent = &pdev->dev;
@@ -343,12 +473,19 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)
343 473
344 device_init_wakeup(&pdev->dev, pdata->wakeup); 474 device_init_wakeup(&pdev->dev, pdata->wakeup);
345 platform_set_drvdata(pdev, keypad); 475 platform_set_drvdata(pdev, keypad);
476
477 if (pdev->dev.of_node) {
478 devm_kfree(&pdev->dev, (void *)pdata->keymap_data->keymap);
479 devm_kfree(&pdev->dev, (void *)pdata->keymap_data);
480 devm_kfree(&pdev->dev, (void *)pdata);
481 }
346 return 0; 482 return 0;
347 483
348err_free_irq: 484err_free_irq:
349 free_irq(keypad->irq, keypad); 485 free_irq(keypad->irq, keypad);
350err_put_clk: 486err_put_clk:
351 clk_put(keypad->clk); 487 clk_put(keypad->clk);
488 samsung_keypad_dt_gpio_free(keypad);
352err_unmap_base: 489err_unmap_base:
353 iounmap(keypad->base); 490 iounmap(keypad->base);
354err_free_mem: 491err_free_mem:
@@ -374,6 +511,7 @@ static int __devexit samsung_keypad_remove(struct platform_device *pdev)
374 free_irq(keypad->irq, keypad); 511 free_irq(keypad->irq, keypad);
375 512
376 clk_put(keypad->clk); 513 clk_put(keypad->clk);
514 samsung_keypad_dt_gpio_free(keypad);
377 515
378 iounmap(keypad->base); 516 iounmap(keypad->base);
379 kfree(keypad); 517 kfree(keypad);
@@ -447,6 +585,17 @@ static const struct dev_pm_ops samsung_keypad_pm_ops = {
447}; 585};
448#endif 586#endif
449 587
588#ifdef CONFIG_OF
589static const struct of_device_id samsung_keypad_dt_match[] = {
590 { .compatible = "samsung,s3c6410-keypad" },
591 { .compatible = "samsung,s5pv210-keypad" },
592 {},
593};
594MODULE_DEVICE_TABLE(of, samsung_keypad_dt_match);
595#else
596#define samsung_keypad_dt_match NULL
597#endif
598
450static struct platform_device_id samsung_keypad_driver_ids[] = { 599static struct platform_device_id samsung_keypad_driver_ids[] = {
451 { 600 {
452 .name = "samsung-keypad", 601 .name = "samsung-keypad",
@@ -465,6 +614,7 @@ static struct platform_driver samsung_keypad_driver = {
465 .driver = { 614 .driver = {
466 .name = "samsung-keypad", 615 .name = "samsung-keypad",
467 .owner = THIS_MODULE, 616 .owner = THIS_MODULE,
617 .of_match_table = samsung_keypad_dt_match,
468#ifdef CONFIG_PM 618#ifdef CONFIG_PM
469 .pm = &samsung_keypad_pm_ops, 619 .pm = &samsung_keypad_pm_ops,
470#endif 620#endif
diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c b/drivers/input/touchscreen/zylonite-wm97xx.c
index f6328c0cded6..0a707bbbbea6 100644
--- a/drivers/input/touchscreen/zylonite-wm97xx.c
+++ b/drivers/input/touchscreen/zylonite-wm97xx.c
@@ -22,6 +22,7 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/gpio.h>
25#include <linux/irq.h> 26#include <linux/irq.h>
26#include <linux/interrupt.h> 27#include <linux/interrupt.h>
27#include <linux/io.h> 28#include <linux/io.h>
@@ -192,8 +193,8 @@ static int zylonite_wm97xx_probe(struct platform_device *pdev)
192 else 193 else
193 gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26); 194 gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26);
194 195
195 wm->pen_irq = IRQ_GPIO(gpio_touch_irq); 196 wm->pen_irq = gpio_to_irq(gpio_touch_irq);
196 irq_set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH); 197 irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH);
197 198
198 wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, 199 wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
199 WM97XX_GPIO_POL_HIGH, 200 WM97XX_GPIO_POL_HIGH,
diff --git a/drivers/media/video/davinci/vpif.h b/drivers/media/video/davinci/vpif.h
index 10550bd93b06..25036cb11bea 100644
--- a/drivers/media/video/davinci/vpif.h
+++ b/drivers/media/video/davinci/vpif.h
@@ -20,6 +20,7 @@
20#include <linux/videodev2.h> 20#include <linux/videodev2.h>
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/dm646x.h> 22#include <mach/dm646x.h>
23#include <media/davinci/vpif_types.h>
23 24
24/* Maximum channel allowed */ 25/* Maximum channel allowed */
25#define VPIF_NUM_CHANNELS (4) 26#define VPIF_NUM_CHANNELS (4)
diff --git a/drivers/media/video/davinci/vpif_capture.h b/drivers/media/video/davinci/vpif_capture.h
index 064550f5ce4a..a693d4ebda55 100644
--- a/drivers/media/video/davinci/vpif_capture.h
+++ b/drivers/media/video/davinci/vpif_capture.h
@@ -27,7 +27,7 @@
27#include <media/v4l2-device.h> 27#include <media/v4l2-device.h>
28#include <media/videobuf-core.h> 28#include <media/videobuf-core.h>
29#include <media/videobuf-dma-contig.h> 29#include <media/videobuf-dma-contig.h>
30#include <mach/dm646x.h> 30#include <media/davinci/vpif_types.h>
31 31
32#include "vpif.h" 32#include "vpif.h"
33 33
diff --git a/drivers/media/video/davinci/vpif_display.h b/drivers/media/video/davinci/vpif_display.h
index 5d1936dafed2..56879d1a0684 100644
--- a/drivers/media/video/davinci/vpif_display.h
+++ b/drivers/media/video/davinci/vpif_display.h
@@ -22,6 +22,7 @@
22#include <media/v4l2-device.h> 22#include <media/v4l2-device.h>
23#include <media/videobuf-core.h> 23#include <media/videobuf-core.h>
24#include <media/videobuf-dma-contig.h> 24#include <media/videobuf-dma-contig.h>
25#include <media/davinci/vpif_types.h>
25 26
26#include "vpif.h" 27#include "vpif.h"
27 28
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index a25ab9c6b5af..af8e0efedbe4 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -2102,14 +2102,11 @@ static struct irq_chip prcmu_irq_chip = {
2102void __init db8500_prcmu_early_init(void) 2102void __init db8500_prcmu_early_init(void)
2103{ 2103{
2104 unsigned int i; 2104 unsigned int i;
2105 2105 if (cpu_is_u8500v2()) {
2106 if (cpu_is_u8500v1()) {
2107 tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE_V1);
2108 } else if (cpu_is_u8500v2()) {
2109 void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K); 2106 void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K);
2110 2107
2111 if (tcpm_base != NULL) { 2108 if (tcpm_base != NULL) {
2112 int version; 2109 u32 version;
2113 version = readl(tcpm_base + PRCMU_FW_VERSION_OFFSET); 2110 version = readl(tcpm_base + PRCMU_FW_VERSION_OFFSET);
2114 prcmu_version.project_number = version & 0xFF; 2111 prcmu_version.project_number = version & 0xFF;
2115 prcmu_version.api_version = (version >> 8) & 0xFF; 2112 prcmu_version.api_version = (version >> 8) & 0xFF;
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 86e14583a082..3f565ef3e149 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -27,8 +27,9 @@
27#include <linux/spinlock.h> 27#include <linux/spinlock.h>
28#include <linux/gpio.h> 28#include <linux/gpio.h>
29#include <plat/usb.h> 29#include <plat/usb.h>
30#include <linux/pm_runtime.h>
30 31
31#define USBHS_DRIVER_NAME "usbhs-omap" 32#define USBHS_DRIVER_NAME "usbhs_omap"
32#define OMAP_EHCI_DEVICE "ehci-omap" 33#define OMAP_EHCI_DEVICE "ehci-omap"
33#define OMAP_OHCI_DEVICE "ohci-omap3" 34#define OMAP_OHCI_DEVICE "ohci-omap3"
34 35
@@ -147,9 +148,6 @@
147 148
148 149
149struct usbhs_hcd_omap { 150struct usbhs_hcd_omap {
150 struct clk *usbhost_ick;
151 struct clk *usbhost_hs_fck;
152 struct clk *usbhost_fs_fck;
153 struct clk *xclk60mhsp1_ck; 151 struct clk *xclk60mhsp1_ck;
154 struct clk *xclk60mhsp2_ck; 152 struct clk *xclk60mhsp2_ck;
155 struct clk *utmi_p1_fck; 153 struct clk *utmi_p1_fck;
@@ -159,8 +157,7 @@ struct usbhs_hcd_omap {
159 struct clk *usbhost_p2_fck; 157 struct clk *usbhost_p2_fck;
160 struct clk *usbtll_p2_fck; 158 struct clk *usbtll_p2_fck;
161 struct clk *init_60m_fclk; 159 struct clk *init_60m_fclk;
162 struct clk *usbtll_fck; 160 struct clk *ehci_logic_fck;
163 struct clk *usbtll_ick;
164 161
165 void __iomem *uhh_base; 162 void __iomem *uhh_base;
166 void __iomem *tll_base; 163 void __iomem *tll_base;
@@ -169,7 +166,6 @@ struct usbhs_hcd_omap {
169 166
170 u32 usbhs_rev; 167 u32 usbhs_rev;
171 spinlock_t lock; 168 spinlock_t lock;
172 int count;
173}; 169};
174/*-------------------------------------------------------------------------*/ 170/*-------------------------------------------------------------------------*/
175 171
@@ -319,269 +315,6 @@ err_end:
319 return ret; 315 return ret;
320} 316}
321 317
322/**
323 * usbhs_omap_probe - initialize TI-based HCDs
324 *
325 * Allocates basic resources for this USB host controller.
326 */
327static int __devinit usbhs_omap_probe(struct platform_device *pdev)
328{
329 struct device *dev = &pdev->dev;
330 struct usbhs_omap_platform_data *pdata = dev->platform_data;
331 struct usbhs_hcd_omap *omap;
332 struct resource *res;
333 int ret = 0;
334 int i;
335
336 if (!pdata) {
337 dev_err(dev, "Missing platform data\n");
338 ret = -ENOMEM;
339 goto end_probe;
340 }
341
342 omap = kzalloc(sizeof(*omap), GFP_KERNEL);
343 if (!omap) {
344 dev_err(dev, "Memory allocation failed\n");
345 ret = -ENOMEM;
346 goto end_probe;
347 }
348
349 spin_lock_init(&omap->lock);
350
351 for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
352 omap->platdata.port_mode[i] = pdata->port_mode[i];
353
354 omap->platdata.ehci_data = pdata->ehci_data;
355 omap->platdata.ohci_data = pdata->ohci_data;
356
357 omap->usbhost_ick = clk_get(dev, "usbhost_ick");
358 if (IS_ERR(omap->usbhost_ick)) {
359 ret = PTR_ERR(omap->usbhost_ick);
360 dev_err(dev, "usbhost_ick failed error:%d\n", ret);
361 goto err_end;
362 }
363
364 omap->usbhost_hs_fck = clk_get(dev, "hs_fck");
365 if (IS_ERR(omap->usbhost_hs_fck)) {
366 ret = PTR_ERR(omap->usbhost_hs_fck);
367 dev_err(dev, "usbhost_hs_fck failed error:%d\n", ret);
368 goto err_usbhost_ick;
369 }
370
371 omap->usbhost_fs_fck = clk_get(dev, "fs_fck");
372 if (IS_ERR(omap->usbhost_fs_fck)) {
373 ret = PTR_ERR(omap->usbhost_fs_fck);
374 dev_err(dev, "usbhost_fs_fck failed error:%d\n", ret);
375 goto err_usbhost_hs_fck;
376 }
377
378 omap->usbtll_fck = clk_get(dev, "usbtll_fck");
379 if (IS_ERR(omap->usbtll_fck)) {
380 ret = PTR_ERR(omap->usbtll_fck);
381 dev_err(dev, "usbtll_fck failed error:%d\n", ret);
382 goto err_usbhost_fs_fck;
383 }
384
385 omap->usbtll_ick = clk_get(dev, "usbtll_ick");
386 if (IS_ERR(omap->usbtll_ick)) {
387 ret = PTR_ERR(omap->usbtll_ick);
388 dev_err(dev, "usbtll_ick failed error:%d\n", ret);
389 goto err_usbtll_fck;
390 }
391
392 omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
393 if (IS_ERR(omap->utmi_p1_fck)) {
394 ret = PTR_ERR(omap->utmi_p1_fck);
395 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
396 goto err_usbtll_ick;
397 }
398
399 omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
400 if (IS_ERR(omap->xclk60mhsp1_ck)) {
401 ret = PTR_ERR(omap->xclk60mhsp1_ck);
402 dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
403 goto err_utmi_p1_fck;
404 }
405
406 omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk");
407 if (IS_ERR(omap->utmi_p2_fck)) {
408 ret = PTR_ERR(omap->utmi_p2_fck);
409 dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
410 goto err_xclk60mhsp1_ck;
411 }
412
413 omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
414 if (IS_ERR(omap->xclk60mhsp2_ck)) {
415 ret = PTR_ERR(omap->xclk60mhsp2_ck);
416 dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
417 goto err_utmi_p2_fck;
418 }
419
420 omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk");
421 if (IS_ERR(omap->usbhost_p1_fck)) {
422 ret = PTR_ERR(omap->usbhost_p1_fck);
423 dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret);
424 goto err_xclk60mhsp2_ck;
425 }
426
427 omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
428 if (IS_ERR(omap->usbtll_p1_fck)) {
429 ret = PTR_ERR(omap->usbtll_p1_fck);
430 dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
431 goto err_usbhost_p1_fck;
432 }
433
434 omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
435 if (IS_ERR(omap->usbhost_p2_fck)) {
436 ret = PTR_ERR(omap->usbhost_p2_fck);
437 dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
438 goto err_usbtll_p1_fck;
439 }
440
441 omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
442 if (IS_ERR(omap->usbtll_p2_fck)) {
443 ret = PTR_ERR(omap->usbtll_p2_fck);
444 dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
445 goto err_usbhost_p2_fck;
446 }
447
448 omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
449 if (IS_ERR(omap->init_60m_fclk)) {
450 ret = PTR_ERR(omap->init_60m_fclk);
451 dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
452 goto err_usbtll_p2_fck;
453 }
454
455 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh");
456 if (!res) {
457 dev_err(dev, "UHH EHCI get resource failed\n");
458 ret = -ENODEV;
459 goto err_init_60m_fclk;
460 }
461
462 omap->uhh_base = ioremap(res->start, resource_size(res));
463 if (!omap->uhh_base) {
464 dev_err(dev, "UHH ioremap failed\n");
465 ret = -ENOMEM;
466 goto err_init_60m_fclk;
467 }
468
469 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll");
470 if (!res) {
471 dev_err(dev, "UHH EHCI get resource failed\n");
472 ret = -ENODEV;
473 goto err_tll;
474 }
475
476 omap->tll_base = ioremap(res->start, resource_size(res));
477 if (!omap->tll_base) {
478 dev_err(dev, "TLL ioremap failed\n");
479 ret = -ENOMEM;
480 goto err_tll;
481 }
482
483 platform_set_drvdata(pdev, omap);
484
485 ret = omap_usbhs_alloc_children(pdev);
486 if (ret) {
487 dev_err(dev, "omap_usbhs_alloc_children failed\n");
488 goto err_alloc;
489 }
490
491 goto end_probe;
492
493err_alloc:
494 iounmap(omap->tll_base);
495
496err_tll:
497 iounmap(omap->uhh_base);
498
499err_init_60m_fclk:
500 clk_put(omap->init_60m_fclk);
501
502err_usbtll_p2_fck:
503 clk_put(omap->usbtll_p2_fck);
504
505err_usbhost_p2_fck:
506 clk_put(omap->usbhost_p2_fck);
507
508err_usbtll_p1_fck:
509 clk_put(omap->usbtll_p1_fck);
510
511err_usbhost_p1_fck:
512 clk_put(omap->usbhost_p1_fck);
513
514err_xclk60mhsp2_ck:
515 clk_put(omap->xclk60mhsp2_ck);
516
517err_utmi_p2_fck:
518 clk_put(omap->utmi_p2_fck);
519
520err_xclk60mhsp1_ck:
521 clk_put(omap->xclk60mhsp1_ck);
522
523err_utmi_p1_fck:
524 clk_put(omap->utmi_p1_fck);
525
526err_usbtll_ick:
527 clk_put(omap->usbtll_ick);
528
529err_usbtll_fck:
530 clk_put(omap->usbtll_fck);
531
532err_usbhost_fs_fck:
533 clk_put(omap->usbhost_fs_fck);
534
535err_usbhost_hs_fck:
536 clk_put(omap->usbhost_hs_fck);
537
538err_usbhost_ick:
539 clk_put(omap->usbhost_ick);
540
541err_end:
542 kfree(omap);
543
544end_probe:
545 return ret;
546}
547
548/**
549 * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
550 * @pdev: USB Host Controller being removed
551 *
552 * Reverses the effect of usbhs_omap_probe().
553 */
554static int __devexit usbhs_omap_remove(struct platform_device *pdev)
555{
556 struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
557
558 if (omap->count != 0) {
559 dev_err(&pdev->dev,
560 "Either EHCI or OHCI is still using usbhs core\n");
561 return -EBUSY;
562 }
563
564 iounmap(omap->tll_base);
565 iounmap(omap->uhh_base);
566 clk_put(omap->init_60m_fclk);
567 clk_put(omap->usbtll_p2_fck);
568 clk_put(omap->usbhost_p2_fck);
569 clk_put(omap->usbtll_p1_fck);
570 clk_put(omap->usbhost_p1_fck);
571 clk_put(omap->xclk60mhsp2_ck);
572 clk_put(omap->utmi_p2_fck);
573 clk_put(omap->xclk60mhsp1_ck);
574 clk_put(omap->utmi_p1_fck);
575 clk_put(omap->usbtll_ick);
576 clk_put(omap->usbtll_fck);
577 clk_put(omap->usbhost_fs_fck);
578 clk_put(omap->usbhost_hs_fck);
579 clk_put(omap->usbhost_ick);
580 kfree(omap);
581
582 return 0;
583}
584
585static bool is_ohci_port(enum usbhs_omap_port_mode pmode) 318static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
586{ 319{
587 switch (pmode) { 320 switch (pmode) {
@@ -689,30 +422,85 @@ static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count)
689 } 422 }
690} 423}
691 424
692static int usbhs_enable(struct device *dev) 425static int usbhs_runtime_resume(struct device *dev)
693{ 426{
694 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 427 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
695 struct usbhs_omap_platform_data *pdata = &omap->platdata; 428 struct usbhs_omap_platform_data *pdata = &omap->platdata;
696 unsigned long flags = 0; 429 unsigned long flags;
697 int ret = 0; 430
698 unsigned long timeout; 431 dev_dbg(dev, "usbhs_runtime_resume\n");
699 unsigned reg;
700 432
701 dev_dbg(dev, "starting TI HSUSB Controller\n");
702 if (!pdata) { 433 if (!pdata) {
703 dev_dbg(dev, "missing platform_data\n"); 434 dev_dbg(dev, "missing platform_data\n");
704 return -ENODEV; 435 return -ENODEV;
705 } 436 }
706 437
707 spin_lock_irqsave(&omap->lock, flags); 438 spin_lock_irqsave(&omap->lock, flags);
708 if (omap->count > 0)
709 goto end_count;
710 439
711 clk_enable(omap->usbhost_ick); 440 if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
712 clk_enable(omap->usbhost_hs_fck); 441 clk_enable(omap->ehci_logic_fck);
713 clk_enable(omap->usbhost_fs_fck); 442
714 clk_enable(omap->usbtll_fck); 443 if (is_ehci_tll_mode(pdata->port_mode[0])) {
715 clk_enable(omap->usbtll_ick); 444 clk_enable(omap->usbhost_p1_fck);
445 clk_enable(omap->usbtll_p1_fck);
446 }
447 if (is_ehci_tll_mode(pdata->port_mode[1])) {
448 clk_enable(omap->usbhost_p2_fck);
449 clk_enable(omap->usbtll_p2_fck);
450 }
451 clk_enable(omap->utmi_p1_fck);
452 clk_enable(omap->utmi_p2_fck);
453
454 spin_unlock_irqrestore(&omap->lock, flags);
455
456 return 0;
457}
458
459static int usbhs_runtime_suspend(struct device *dev)
460{
461 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
462 struct usbhs_omap_platform_data *pdata = &omap->platdata;
463 unsigned long flags;
464
465 dev_dbg(dev, "usbhs_runtime_suspend\n");
466
467 if (!pdata) {
468 dev_dbg(dev, "missing platform_data\n");
469 return -ENODEV;
470 }
471
472 spin_lock_irqsave(&omap->lock, flags);
473
474 if (is_ehci_tll_mode(pdata->port_mode[0])) {
475 clk_disable(omap->usbhost_p1_fck);
476 clk_disable(omap->usbtll_p1_fck);
477 }
478 if (is_ehci_tll_mode(pdata->port_mode[1])) {
479 clk_disable(omap->usbhost_p2_fck);
480 clk_disable(omap->usbtll_p2_fck);
481 }
482 clk_disable(omap->utmi_p2_fck);
483 clk_disable(omap->utmi_p1_fck);
484
485 if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
486 clk_disable(omap->ehci_logic_fck);
487
488 spin_unlock_irqrestore(&omap->lock, flags);
489
490 return 0;
491}
492
493static void omap_usbhs_init(struct device *dev)
494{
495 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
496 struct usbhs_omap_platform_data *pdata = &omap->platdata;
497 unsigned long flags;
498 unsigned reg;
499
500 dev_dbg(dev, "starting TI HSUSB Controller\n");
501
502 pm_runtime_get_sync(dev);
503 spin_lock_irqsave(&omap->lock, flags);
716 504
717 if (pdata->ehci_data->phy_reset) { 505 if (pdata->ehci_data->phy_reset) {
718 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) { 506 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) {
@@ -736,50 +524,6 @@ static int usbhs_enable(struct device *dev)
736 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); 524 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
737 dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); 525 dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev);
738 526
739 /* perform TLL soft reset, and wait until reset is complete */
740 usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
741 OMAP_USBTLL_SYSCONFIG_SOFTRESET);
742
743 /* Wait for TLL reset to complete */
744 timeout = jiffies + msecs_to_jiffies(1000);
745 while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS)
746 & OMAP_USBTLL_SYSSTATUS_RESETDONE)) {
747 cpu_relax();
748
749 if (time_after(jiffies, timeout)) {
750 dev_dbg(dev, "operation timed out\n");
751 ret = -EINVAL;
752 goto err_tll;
753 }
754 }
755
756 dev_dbg(dev, "TLL RESET DONE\n");
757
758 /* (1<<3) = no idle mode only for initial debugging */
759 usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG,
760 OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
761 OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
762 OMAP_USBTLL_SYSCONFIG_AUTOIDLE);
763
764 /* Put UHH in NoIdle/NoStandby mode */
765 reg = usbhs_read(omap->uhh_base, OMAP_UHH_SYSCONFIG);
766 if (is_omap_usbhs_rev1(omap)) {
767 reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP
768 | OMAP_UHH_SYSCONFIG_SIDLEMODE
769 | OMAP_UHH_SYSCONFIG_CACTIVITY
770 | OMAP_UHH_SYSCONFIG_MIDLEMODE);
771 reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE;
772
773
774 } else if (is_omap_usbhs_rev2(omap)) {
775 reg &= ~OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR;
776 reg |= OMAP4_UHH_SYSCONFIG_NOIDLE;
777 reg &= ~OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR;
778 reg |= OMAP4_UHH_SYSCONFIG_NOSTDBY;
779 }
780
781 usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
782
783 reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); 527 reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
784 /* setup ULPI bypass and burst configurations */ 528 /* setup ULPI bypass and burst configurations */
785 reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN 529 reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
@@ -825,49 +569,6 @@ static int usbhs_enable(struct device *dev)
825 reg &= ~OMAP4_P1_MODE_CLEAR; 569 reg &= ~OMAP4_P1_MODE_CLEAR;
826 reg &= ~OMAP4_P2_MODE_CLEAR; 570 reg &= ~OMAP4_P2_MODE_CLEAR;
827 571
828 if (is_ehci_phy_mode(pdata->port_mode[0])) {
829 ret = clk_set_parent(omap->utmi_p1_fck,
830 omap->xclk60mhsp1_ck);
831 if (ret != 0) {
832 dev_err(dev, "xclk60mhsp1_ck set parent"
833 "failed error:%d\n", ret);
834 goto err_tll;
835 }
836 } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
837 ret = clk_set_parent(omap->utmi_p1_fck,
838 omap->init_60m_fclk);
839 if (ret != 0) {
840 dev_err(dev, "init_60m_fclk set parent"
841 "failed error:%d\n", ret);
842 goto err_tll;
843 }
844 clk_enable(omap->usbhost_p1_fck);
845 clk_enable(omap->usbtll_p1_fck);
846 }
847
848 if (is_ehci_phy_mode(pdata->port_mode[1])) {
849 ret = clk_set_parent(omap->utmi_p2_fck,
850 omap->xclk60mhsp2_ck);
851 if (ret != 0) {
852 dev_err(dev, "xclk60mhsp1_ck set parent"
853 "failed error:%d\n", ret);
854 goto err_tll;
855 }
856 } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
857 ret = clk_set_parent(omap->utmi_p2_fck,
858 omap->init_60m_fclk);
859 if (ret != 0) {
860 dev_err(dev, "init_60m_fclk set parent"
861 "failed error:%d\n", ret);
862 goto err_tll;
863 }
864 clk_enable(omap->usbhost_p2_fck);
865 clk_enable(omap->usbtll_p2_fck);
866 }
867
868 clk_enable(omap->utmi_p1_fck);
869 clk_enable(omap->utmi_p2_fck);
870
871 if (is_ehci_tll_mode(pdata->port_mode[0]) || 572 if (is_ehci_tll_mode(pdata->port_mode[0]) ||
872 (is_ohci_port(pdata->port_mode[0]))) 573 (is_ohci_port(pdata->port_mode[0])))
873 reg |= OMAP4_P1_MODE_TLL; 574 reg |= OMAP4_P1_MODE_TLL;
@@ -913,12 +614,15 @@ static int usbhs_enable(struct device *dev)
913 (pdata->ehci_data->reset_gpio_port[1], 1); 614 (pdata->ehci_data->reset_gpio_port[1], 1);
914 } 615 }
915 616
916end_count:
917 omap->count++;
918 spin_unlock_irqrestore(&omap->lock, flags); 617 spin_unlock_irqrestore(&omap->lock, flags);
919 return 0; 618 pm_runtime_put_sync(dev);
619}
620
621static void omap_usbhs_deinit(struct device *dev)
622{
623 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
624 struct usbhs_omap_platform_data *pdata = &omap->platdata;
920 625
921err_tll:
922 if (pdata->ehci_data->phy_reset) { 626 if (pdata->ehci_data->phy_reset) {
923 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 627 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0]))
924 gpio_free(pdata->ehci_data->reset_gpio_port[0]); 628 gpio_free(pdata->ehci_data->reset_gpio_port[0]);
@@ -926,123 +630,272 @@ err_tll:
926 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) 630 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1]))
927 gpio_free(pdata->ehci_data->reset_gpio_port[1]); 631 gpio_free(pdata->ehci_data->reset_gpio_port[1]);
928 } 632 }
929
930 clk_disable(omap->usbtll_ick);
931 clk_disable(omap->usbtll_fck);
932 clk_disable(omap->usbhost_fs_fck);
933 clk_disable(omap->usbhost_hs_fck);
934 clk_disable(omap->usbhost_ick);
935 spin_unlock_irqrestore(&omap->lock, flags);
936 return ret;
937} 633}
938 634
939static void usbhs_disable(struct device *dev) 635
636/**
637 * usbhs_omap_probe - initialize TI-based HCDs
638 *
639 * Allocates basic resources for this USB host controller.
640 */
641static int __devinit usbhs_omap_probe(struct platform_device *pdev)
940{ 642{
941 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 643 struct device *dev = &pdev->dev;
942 struct usbhs_omap_platform_data *pdata = &omap->platdata; 644 struct usbhs_omap_platform_data *pdata = dev->platform_data;
943 unsigned long flags = 0; 645 struct usbhs_hcd_omap *omap;
944 unsigned long timeout; 646 struct resource *res;
647 int ret = 0;
648 int i;
945 649
946 dev_dbg(dev, "stopping TI HSUSB Controller\n"); 650 if (!pdata) {
651 dev_err(dev, "Missing platform data\n");
652 ret = -ENOMEM;
653 goto end_probe;
654 }
947 655
948 spin_lock_irqsave(&omap->lock, flags); 656 omap = kzalloc(sizeof(*omap), GFP_KERNEL);
657 if (!omap) {
658 dev_err(dev, "Memory allocation failed\n");
659 ret = -ENOMEM;
660 goto end_probe;
661 }
949 662
950 if (omap->count == 0) 663 spin_lock_init(&omap->lock);
951 goto end_disble;
952 664
953 omap->count--; 665 for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
666 omap->platdata.port_mode[i] = pdata->port_mode[i];
667
668 omap->platdata.ehci_data = pdata->ehci_data;
669 omap->platdata.ohci_data = pdata->ohci_data;
954 670
955 if (omap->count != 0) 671 pm_runtime_enable(dev);
956 goto end_disble;
957 672
958 /* Reset OMAP modules for insmod/rmmod to work */
959 usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG,
960 is_omap_usbhs_rev2(omap) ?
961 OMAP4_UHH_SYSCONFIG_SOFTRESET :
962 OMAP_UHH_SYSCONFIG_SOFTRESET);
963 673
964 timeout = jiffies + msecs_to_jiffies(100); 674 for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
965 while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS) 675 if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
966 & (1 << 0))) { 676 is_ehci_hsic_mode(i)) {
967 cpu_relax(); 677 omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck");
678 if (IS_ERR(omap->ehci_logic_fck)) {
679 ret = PTR_ERR(omap->ehci_logic_fck);
680 dev_warn(dev, "ehci_logic_fck failed:%d\n",
681 ret);
682 }
683 break;
684 }
968 685
969 if (time_after(jiffies, timeout)) 686 omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
970 dev_dbg(dev, "operation timed out\n"); 687 if (IS_ERR(omap->utmi_p1_fck)) {
688 ret = PTR_ERR(omap->utmi_p1_fck);
689 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
690 goto err_end;
971 } 691 }
972 692
973 while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS) 693 omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
974 & (1 << 1))) { 694 if (IS_ERR(omap->xclk60mhsp1_ck)) {
975 cpu_relax(); 695 ret = PTR_ERR(omap->xclk60mhsp1_ck);
696 dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
697 goto err_utmi_p1_fck;
698 }
976 699
977 if (time_after(jiffies, timeout)) 700 omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk");
978 dev_dbg(dev, "operation timed out\n"); 701 if (IS_ERR(omap->utmi_p2_fck)) {
702 ret = PTR_ERR(omap->utmi_p2_fck);
703 dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
704 goto err_xclk60mhsp1_ck;
979 } 705 }
980 706
981 while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS) 707 omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
982 & (1 << 2))) { 708 if (IS_ERR(omap->xclk60mhsp2_ck)) {
983 cpu_relax(); 709 ret = PTR_ERR(omap->xclk60mhsp2_ck);
710 dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
711 goto err_utmi_p2_fck;
712 }
984 713
985 if (time_after(jiffies, timeout)) 714 omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk");
986 dev_dbg(dev, "operation timed out\n"); 715 if (IS_ERR(omap->usbhost_p1_fck)) {
716 ret = PTR_ERR(omap->usbhost_p1_fck);
717 dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret);
718 goto err_xclk60mhsp2_ck;
987 } 719 }
988 720
989 usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, (1 << 1)); 721 omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
722 if (IS_ERR(omap->usbtll_p1_fck)) {
723 ret = PTR_ERR(omap->usbtll_p1_fck);
724 dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
725 goto err_usbhost_p1_fck;
726 }
990 727
991 while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS) 728 omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
992 & (1 << 0))) { 729 if (IS_ERR(omap->usbhost_p2_fck)) {
993 cpu_relax(); 730 ret = PTR_ERR(omap->usbhost_p2_fck);
731 dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
732 goto err_usbtll_p1_fck;
733 }
994 734
995 if (time_after(jiffies, timeout)) 735 omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
996 dev_dbg(dev, "operation timed out\n"); 736 if (IS_ERR(omap->usbtll_p2_fck)) {
737 ret = PTR_ERR(omap->usbtll_p2_fck);
738 dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
739 goto err_usbhost_p2_fck;
997 } 740 }
998 741
999 if (is_omap_usbhs_rev2(omap)) { 742 omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
1000 if (is_ehci_tll_mode(pdata->port_mode[0])) 743 if (IS_ERR(omap->init_60m_fclk)) {
1001 clk_disable(omap->usbtll_p1_fck); 744 ret = PTR_ERR(omap->init_60m_fclk);
1002 if (is_ehci_tll_mode(pdata->port_mode[1])) 745 dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
1003 clk_disable(omap->usbtll_p2_fck); 746 goto err_usbtll_p2_fck;
1004 clk_disable(omap->utmi_p2_fck);
1005 clk_disable(omap->utmi_p1_fck);
1006 } 747 }
1007 748
1008 clk_disable(omap->usbtll_ick); 749 if (is_ehci_phy_mode(pdata->port_mode[0])) {
1009 clk_disable(omap->usbtll_fck); 750 /* for OMAP3 , the clk set paretn fails */
1010 clk_disable(omap->usbhost_fs_fck); 751 ret = clk_set_parent(omap->utmi_p1_fck,
1011 clk_disable(omap->usbhost_hs_fck); 752 omap->xclk60mhsp1_ck);
1012 clk_disable(omap->usbhost_ick); 753 if (ret != 0)
754 dev_err(dev, "xclk60mhsp1_ck set parent"
755 "failed error:%d\n", ret);
756 } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
757 ret = clk_set_parent(omap->utmi_p1_fck,
758 omap->init_60m_fclk);
759 if (ret != 0)
760 dev_err(dev, "init_60m_fclk set parent"
761 "failed error:%d\n", ret);
762 }
1013 763
1014 /* The gpio_free migh sleep; so unlock the spinlock */ 764 if (is_ehci_phy_mode(pdata->port_mode[1])) {
1015 spin_unlock_irqrestore(&omap->lock, flags); 765 ret = clk_set_parent(omap->utmi_p2_fck,
766 omap->xclk60mhsp2_ck);
767 if (ret != 0)
768 dev_err(dev, "xclk60mhsp2_ck set parent"
769 "failed error:%d\n", ret);
770 } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
771 ret = clk_set_parent(omap->utmi_p2_fck,
772 omap->init_60m_fclk);
773 if (ret != 0)
774 dev_err(dev, "init_60m_fclk set parent"
775 "failed error:%d\n", ret);
776 }
1016 777
1017 if (pdata->ehci_data->phy_reset) { 778 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh");
1018 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 779 if (!res) {
1019 gpio_free(pdata->ehci_data->reset_gpio_port[0]); 780 dev_err(dev, "UHH EHCI get resource failed\n");
781 ret = -ENODEV;
782 goto err_init_60m_fclk;
783 }
1020 784
1021 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) 785 omap->uhh_base = ioremap(res->start, resource_size(res));
1022 gpio_free(pdata->ehci_data->reset_gpio_port[1]); 786 if (!omap->uhh_base) {
787 dev_err(dev, "UHH ioremap failed\n");
788 ret = -ENOMEM;
789 goto err_init_60m_fclk;
1023 } 790 }
1024 return;
1025 791
1026end_disble: 792 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll");
1027 spin_unlock_irqrestore(&omap->lock, flags); 793 if (!res) {
1028} 794 dev_err(dev, "UHH EHCI get resource failed\n");
795 ret = -ENODEV;
796 goto err_tll;
797 }
1029 798
1030int omap_usbhs_enable(struct device *dev) 799 omap->tll_base = ioremap(res->start, resource_size(res));
1031{ 800 if (!omap->tll_base) {
1032 return usbhs_enable(dev->parent); 801 dev_err(dev, "TLL ioremap failed\n");
802 ret = -ENOMEM;
803 goto err_tll;
804 }
805
806 platform_set_drvdata(pdev, omap);
807
808 ret = omap_usbhs_alloc_children(pdev);
809 if (ret) {
810 dev_err(dev, "omap_usbhs_alloc_children failed\n");
811 goto err_alloc;
812 }
813
814 omap_usbhs_init(dev);
815
816 goto end_probe;
817
818err_alloc:
819 iounmap(omap->tll_base);
820
821err_tll:
822 iounmap(omap->uhh_base);
823
824err_init_60m_fclk:
825 clk_put(omap->init_60m_fclk);
826
827err_usbtll_p2_fck:
828 clk_put(omap->usbtll_p2_fck);
829
830err_usbhost_p2_fck:
831 clk_put(omap->usbhost_p2_fck);
832
833err_usbtll_p1_fck:
834 clk_put(omap->usbtll_p1_fck);
835
836err_usbhost_p1_fck:
837 clk_put(omap->usbhost_p1_fck);
838
839err_xclk60mhsp2_ck:
840 clk_put(omap->xclk60mhsp2_ck);
841
842err_utmi_p2_fck:
843 clk_put(omap->utmi_p2_fck);
844
845err_xclk60mhsp1_ck:
846 clk_put(omap->xclk60mhsp1_ck);
847
848err_utmi_p1_fck:
849 clk_put(omap->utmi_p1_fck);
850
851err_end:
852 clk_put(omap->ehci_logic_fck);
853 pm_runtime_disable(dev);
854 kfree(omap);
855
856end_probe:
857 return ret;
1033} 858}
1034EXPORT_SYMBOL_GPL(omap_usbhs_enable);
1035 859
1036void omap_usbhs_disable(struct device *dev) 860/**
861 * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
862 * @pdev: USB Host Controller being removed
863 *
864 * Reverses the effect of usbhs_omap_probe().
865 */
866static int __devexit usbhs_omap_remove(struct platform_device *pdev)
1037{ 867{
1038 usbhs_disable(dev->parent); 868 struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
869
870 omap_usbhs_deinit(&pdev->dev);
871 iounmap(omap->tll_base);
872 iounmap(omap->uhh_base);
873 clk_put(omap->init_60m_fclk);
874 clk_put(omap->usbtll_p2_fck);
875 clk_put(omap->usbhost_p2_fck);
876 clk_put(omap->usbtll_p1_fck);
877 clk_put(omap->usbhost_p1_fck);
878 clk_put(omap->xclk60mhsp2_ck);
879 clk_put(omap->utmi_p2_fck);
880 clk_put(omap->xclk60mhsp1_ck);
881 clk_put(omap->utmi_p1_fck);
882 clk_put(omap->ehci_logic_fck);
883 pm_runtime_disable(&pdev->dev);
884 kfree(omap);
885
886 return 0;
1039} 887}
1040EXPORT_SYMBOL_GPL(omap_usbhs_disable); 888
889static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
890 .runtime_suspend = usbhs_runtime_suspend,
891 .runtime_resume = usbhs_runtime_resume,
892};
1041 893
1042static struct platform_driver usbhs_omap_driver = { 894static struct platform_driver usbhs_omap_driver = {
1043 .driver = { 895 .driver = {
1044 .name = (char *)usbhs_driver_name, 896 .name = (char *)usbhs_driver_name,
1045 .owner = THIS_MODULE, 897 .owner = THIS_MODULE,
898 .pm = &usbhsomap_dev_pm_ops,
1046 }, 899 },
1047 .remove = __exit_p(usbhs_omap_remove), 900 .remove = __exit_p(usbhs_omap_remove),
1048}; 901};
diff --git a/drivers/misc/ad525x_dpot-i2c.c b/drivers/misc/ad525x_dpot-i2c.c
index a39e0555df63..83adab69bfd4 100644
--- a/drivers/misc/ad525x_dpot-i2c.c
+++ b/drivers/misc/ad525x_dpot-i2c.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Driver for the Analog Devices digital potentiometers (I2C bus) 2 * Driver for the Analog Devices digital potentiometers (I2C bus)
3 * 3 *
4 * Copyright (C) 2010 Michael Hennerich, Analog Devices Inc. 4 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
5 * 5 *
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
@@ -11,7 +11,6 @@
11 11
12#include "ad525x_dpot.h" 12#include "ad525x_dpot.h"
13 13
14/* ------------------------------------------------------------------------- */
15/* I2C bus functions */ 14/* I2C bus functions */
16static int write_d8(void *client, u8 val) 15static int write_d8(void *client, u8 val)
17{ 16{
@@ -60,18 +59,13 @@ static int __devinit ad_dpot_i2c_probe(struct i2c_client *client,
60 .bops = &bops, 59 .bops = &bops,
61 }; 60 };
62 61
63 struct ad_dpot_id dpot_id = {
64 .name = (char *) &id->name,
65 .devid = id->driver_data,
66 };
67
68 if (!i2c_check_functionality(client->adapter, 62 if (!i2c_check_functionality(client->adapter,
69 I2C_FUNC_SMBUS_WORD_DATA)) { 63 I2C_FUNC_SMBUS_WORD_DATA)) {
70 dev_err(&client->dev, "SMBUS Word Data not Supported\n"); 64 dev_err(&client->dev, "SMBUS Word Data not Supported\n");
71 return -EIO; 65 return -EIO;
72 } 66 }
73 67
74 return ad_dpot_probe(&client->dev, &bdata, &dpot_id); 68 return ad_dpot_probe(&client->dev, &bdata, id->driver_data, id->name);
75} 69}
76 70
77static int __devexit ad_dpot_i2c_remove(struct i2c_client *client) 71static int __devexit ad_dpot_i2c_remove(struct i2c_client *client)
diff --git a/drivers/misc/ad525x_dpot-spi.c b/drivers/misc/ad525x_dpot-spi.c
index 7f9a55afe05d..822749e41fea 100644
--- a/drivers/misc/ad525x_dpot-spi.c
+++ b/drivers/misc/ad525x_dpot-spi.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Driver for the Analog Devices digital potentiometers (SPI bus) 2 * Driver for the Analog Devices digital potentiometers (SPI bus)
3 * 3 *
4 * Copyright (C) 2010 Michael Hennerich, Analog Devices Inc. 4 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
5 * 5 *
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
@@ -11,40 +11,6 @@
11 11
12#include "ad525x_dpot.h" 12#include "ad525x_dpot.h"
13 13
14static const struct ad_dpot_id ad_dpot_spi_devlist[] = {
15 {.name = "ad5160", .devid = AD5160_ID},
16 {.name = "ad5161", .devid = AD5161_ID},
17 {.name = "ad5162", .devid = AD5162_ID},
18 {.name = "ad5165", .devid = AD5165_ID},
19 {.name = "ad5200", .devid = AD5200_ID},
20 {.name = "ad5201", .devid = AD5201_ID},
21 {.name = "ad5203", .devid = AD5203_ID},
22 {.name = "ad5204", .devid = AD5204_ID},
23 {.name = "ad5206", .devid = AD5206_ID},
24 {.name = "ad5207", .devid = AD5207_ID},
25 {.name = "ad5231", .devid = AD5231_ID},
26 {.name = "ad5232", .devid = AD5232_ID},
27 {.name = "ad5233", .devid = AD5233_ID},
28 {.name = "ad5235", .devid = AD5235_ID},
29 {.name = "ad5260", .devid = AD5260_ID},
30 {.name = "ad5262", .devid = AD5262_ID},
31 {.name = "ad5263", .devid = AD5263_ID},
32 {.name = "ad5290", .devid = AD5290_ID},
33 {.name = "ad5291", .devid = AD5291_ID},
34 {.name = "ad5292", .devid = AD5292_ID},
35 {.name = "ad5293", .devid = AD5293_ID},
36 {.name = "ad7376", .devid = AD7376_ID},
37 {.name = "ad8400", .devid = AD8400_ID},
38 {.name = "ad8402", .devid = AD8402_ID},
39 {.name = "ad8403", .devid = AD8403_ID},
40 {.name = "adn2850", .devid = ADN2850_ID},
41 {.name = "ad5270", .devid = AD5270_ID},
42 {.name = "ad5271", .devid = AD5271_ID},
43 {}
44};
45
46/* ------------------------------------------------------------------------- */
47
48/* SPI bus functions */ 14/* SPI bus functions */
49static int write8(void *client, u8 val) 15static int write8(void *client, u8 val)
50{ 16{
@@ -109,36 +75,16 @@ static const struct ad_dpot_bus_ops bops = {
109 .write_r8d8 = write16, 75 .write_r8d8 = write16,
110 .write_r8d16 = write24, 76 .write_r8d16 = write24,
111}; 77};
112
113static const struct ad_dpot_id *dpot_match_id(const struct ad_dpot_id *id,
114 char *name)
115{
116 while (id->name && id->name[0]) {
117 if (strcmp(name, id->name) == 0)
118 return id;
119 id++;
120 }
121 return NULL;
122}
123
124static int __devinit ad_dpot_spi_probe(struct spi_device *spi) 78static int __devinit ad_dpot_spi_probe(struct spi_device *spi)
125{ 79{
126 char *name = spi->dev.platform_data;
127 const struct ad_dpot_id *dpot_id;
128
129 struct ad_dpot_bus_data bdata = { 80 struct ad_dpot_bus_data bdata = {
130 .client = spi, 81 .client = spi,
131 .bops = &bops, 82 .bops = &bops,
132 }; 83 };
133 84
134 dpot_id = dpot_match_id(ad_dpot_spi_devlist, name); 85 return ad_dpot_probe(&spi->dev, &bdata,
135 86 spi_get_device_id(spi)->driver_data,
136 if (dpot_id == NULL) { 87 spi_get_device_id(spi)->name);
137 dev_err(&spi->dev, "%s not in supported device list", name);
138 return -ENODEV;
139 }
140
141 return ad_dpot_probe(&spi->dev, &bdata, dpot_id);
142} 88}
143 89
144static int __devexit ad_dpot_spi_remove(struct spi_device *spi) 90static int __devexit ad_dpot_spi_remove(struct spi_device *spi)
@@ -146,14 +92,47 @@ static int __devexit ad_dpot_spi_remove(struct spi_device *spi)
146 return ad_dpot_remove(&spi->dev); 92 return ad_dpot_remove(&spi->dev);
147} 93}
148 94
95static const struct spi_device_id ad_dpot_spi_id[] = {
96 {"ad5160", AD5160_ID},
97 {"ad5161", AD5161_ID},
98 {"ad5162", AD5162_ID},
99 {"ad5165", AD5165_ID},
100 {"ad5200", AD5200_ID},
101 {"ad5201", AD5201_ID},
102 {"ad5203", AD5203_ID},
103 {"ad5204", AD5204_ID},
104 {"ad5206", AD5206_ID},
105 {"ad5207", AD5207_ID},
106 {"ad5231", AD5231_ID},
107 {"ad5232", AD5232_ID},
108 {"ad5233", AD5233_ID},
109 {"ad5235", AD5235_ID},
110 {"ad5260", AD5260_ID},
111 {"ad5262", AD5262_ID},
112 {"ad5263", AD5263_ID},
113 {"ad5290", AD5290_ID},
114 {"ad5291", AD5291_ID},
115 {"ad5292", AD5292_ID},
116 {"ad5293", AD5293_ID},
117 {"ad7376", AD7376_ID},
118 {"ad8400", AD8400_ID},
119 {"ad8402", AD8402_ID},
120 {"ad8403", AD8403_ID},
121 {"adn2850", ADN2850_ID},
122 {"ad5270", AD5270_ID},
123 {"ad5271", AD5271_ID},
124 {}
125};
126MODULE_DEVICE_TABLE(spi, ad_dpot_spi_id);
127
149static struct spi_driver ad_dpot_spi_driver = { 128static struct spi_driver ad_dpot_spi_driver = {
150 .driver = { 129 .driver = {
151 .name = "ad_dpot", 130 .name = "ad_dpot",
152 .bus = &spi_bus_type,
153 .owner = THIS_MODULE, 131 .owner = THIS_MODULE,
154 }, 132 },
155 .probe = ad_dpot_spi_probe, 133 .probe = ad_dpot_spi_probe,
156 .remove = __devexit_p(ad_dpot_spi_remove), 134 .remove = __devexit_p(ad_dpot_spi_remove),
135 .id_table = ad_dpot_spi_id,
157}; 136};
158 137
159static int __init ad_dpot_spi_init(void) 138static int __init ad_dpot_spi_init(void)
diff --git a/drivers/misc/ad525x_dpot.c b/drivers/misc/ad525x_dpot.c
index 7cb911028d09..1d1d42615915 100644
--- a/drivers/misc/ad525x_dpot.c
+++ b/drivers/misc/ad525x_dpot.c
@@ -64,7 +64,7 @@
64 * Author: Chris Verges <chrisv@cyberswitching.com> 64 * Author: Chris Verges <chrisv@cyberswitching.com>
65 * 65 *
66 * derived from ad5252.c 66 * derived from ad5252.c
67 * Copyright (c) 2006 Michael Hennerich <hennerich@blackfin.uclinux.org> 67 * Copyright (c) 2006-2011 Michael Hennerich <hennerich@blackfin.uclinux.org>
68 * 68 *
69 * Licensed under the GPL-2 or later. 69 * Licensed under the GPL-2 or later.
70 */ 70 */
@@ -76,8 +76,6 @@
76#include <linux/delay.h> 76#include <linux/delay.h>
77#include <linux/slab.h> 77#include <linux/slab.h>
78 78
79#define DRIVER_VERSION "0.2"
80
81#include "ad525x_dpot.h" 79#include "ad525x_dpot.h"
82 80
83/* 81/*
@@ -687,8 +685,9 @@ inline void ad_dpot_remove_files(struct device *dev,
687 } 685 }
688} 686}
689 687
690__devinit int ad_dpot_probe(struct device *dev, 688int __devinit ad_dpot_probe(struct device *dev,
691 struct ad_dpot_bus_data *bdata, const struct ad_dpot_id *id) 689 struct ad_dpot_bus_data *bdata, unsigned long devid,
690 const char *name)
692{ 691{
693 692
694 struct dpot_data *data; 693 struct dpot_data *data;
@@ -704,13 +703,13 @@ __devinit int ad_dpot_probe(struct device *dev,
704 mutex_init(&data->update_lock); 703 mutex_init(&data->update_lock);
705 704
706 data->bdata = *bdata; 705 data->bdata = *bdata;
707 data->devid = id->devid; 706 data->devid = devid;
708 707
709 data->max_pos = 1 << DPOT_MAX_POS(data->devid); 708 data->max_pos = 1 << DPOT_MAX_POS(devid);
710 data->rdac_mask = data->max_pos - 1; 709 data->rdac_mask = data->max_pos - 1;
711 data->feat = DPOT_FEAT(data->devid); 710 data->feat = DPOT_FEAT(devid);
712 data->uid = DPOT_UID(data->devid); 711 data->uid = DPOT_UID(devid);
713 data->wipers = DPOT_WIPERS(data->devid); 712 data->wipers = DPOT_WIPERS(devid);
714 713
715 for (i = DPOT_RDAC0; i < MAX_RDACS; i++) 714 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
716 if (data->wipers & (1 << i)) { 715 if (data->wipers & (1 << i)) {
@@ -731,7 +730,7 @@ __devinit int ad_dpot_probe(struct device *dev,
731 } 730 }
732 731
733 dev_info(dev, "%s %d-Position Digital Potentiometer registered\n", 732 dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
734 id->name, data->max_pos); 733 name, data->max_pos);
735 734
736 return 0; 735 return 0;
737 736
@@ -745,7 +744,7 @@ exit_free:
745 dev_set_drvdata(dev, NULL); 744 dev_set_drvdata(dev, NULL);
746exit: 745exit:
747 dev_err(dev, "failed to create client for %s ID 0x%lX\n", 746 dev_err(dev, "failed to create client for %s ID 0x%lX\n",
748 id->name, id->devid); 747 name, devid);
749 return err; 748 return err;
750} 749}
751EXPORT_SYMBOL(ad_dpot_probe); 750EXPORT_SYMBOL(ad_dpot_probe);
@@ -770,4 +769,3 @@ MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
770 "Michael Hennerich <hennerich@blackfin.uclinux.org>"); 769 "Michael Hennerich <hennerich@blackfin.uclinux.org>");
771MODULE_DESCRIPTION("Digital potentiometer driver"); 770MODULE_DESCRIPTION("Digital potentiometer driver");
772MODULE_LICENSE("GPL"); 771MODULE_LICENSE("GPL");
773MODULE_VERSION(DRIVER_VERSION);
diff --git a/drivers/misc/ad525x_dpot.h b/drivers/misc/ad525x_dpot.h
index 82b2cb77ae19..6bd1eba23bc0 100644
--- a/drivers/misc/ad525x_dpot.h
+++ b/drivers/misc/ad525x_dpot.h
@@ -208,12 +208,8 @@ struct ad_dpot_bus_data {
208 const struct ad_dpot_bus_ops *bops; 208 const struct ad_dpot_bus_ops *bops;
209}; 209};
210 210
211struct ad_dpot_id { 211int ad_dpot_probe(struct device *dev, struct ad_dpot_bus_data *bdata,
212 char *name; 212 unsigned long devid, const char *name);
213 unsigned long devid;
214};
215
216int ad_dpot_probe(struct device *dev, struct ad_dpot_bus_data *bdata, const struct ad_dpot_id *id);
217int ad_dpot_remove(struct device *dev); 213int ad_dpot_remove(struct device *dev);
218 214
219#endif 215#endif
diff --git a/drivers/misc/bmp085.c b/drivers/misc/bmp085.c
index 5f898cb706a6..b29a2be24591 100644
--- a/drivers/misc/bmp085.c
+++ b/drivers/misc/bmp085.c
@@ -216,7 +216,7 @@ static s32 bmp085_get_temperature(struct bmp085_data *data, int *temperature)
216 *temperature = (x1+x2+8) >> 4; 216 *temperature = (x1+x2+8) >> 4;
217 217
218exit: 218exit:
219 return status;; 219 return status;
220} 220}
221 221
222/* 222/*
diff --git a/drivers/misc/isl29020.c b/drivers/misc/isl29020.c
index 307aada5fffe..3d6cce663bea 100644
--- a/drivers/misc/isl29020.c
+++ b/drivers/misc/isl29020.c
@@ -158,7 +158,7 @@ static int als_set_default_config(struct i2c_client *client)
158 dev_err(&client->dev, "default write failed."); 158 dev_err(&client->dev, "default write failed.");
159 return retval; 159 return retval;
160 } 160 }
161 return 0;; 161 return 0;
162} 162}
163 163
164static int isl29020_probe(struct i2c_client *client, 164static int isl29020_probe(struct i2c_client *client,
diff --git a/drivers/misc/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c
index ba168a7d54d4..2b62232c2c6a 100644
--- a/drivers/misc/ti-st/st_core.c
+++ b/drivers/misc/ti-st/st_core.c
@@ -137,6 +137,8 @@ void st_send_frame(unsigned char chnl_id, struct st_data_s *st_gdata)
137 * st_reg_complete - 137 * st_reg_complete -
138 * to call registration complete callbacks 138 * to call registration complete callbacks
139 * of all protocol stack drivers 139 * of all protocol stack drivers
140 * This function is being called with spin lock held, protocol drivers are
141 * only expected to complete their waits and do nothing more than that.
140 */ 142 */
141void st_reg_complete(struct st_data_s *st_gdata, char err) 143void st_reg_complete(struct st_data_s *st_gdata, char err)
142{ 144{
@@ -538,11 +540,12 @@ long st_register(struct st_proto_s *new_proto)
538 set_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state); 540 set_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state);
539 st_recv = st_kim_recv; 541 st_recv = st_kim_recv;
540 542
543 /* enable the ST LL - to set default chip state */
544 st_ll_enable(st_gdata);
545
541 /* release lock previously held - re-locked below */ 546 /* release lock previously held - re-locked below */
542 spin_unlock_irqrestore(&st_gdata->lock, flags); 547 spin_unlock_irqrestore(&st_gdata->lock, flags);
543 548
544 /* enable the ST LL - to set default chip state */
545 st_ll_enable(st_gdata);
546 /* this may take a while to complete 549 /* this may take a while to complete
547 * since it involves BT fw download 550 * since it involves BT fw download
548 */ 551 */
@@ -553,10 +556,13 @@ long st_register(struct st_proto_s *new_proto)
553 (test_bit(ST_REG_PENDING, &st_gdata->st_state))) { 556 (test_bit(ST_REG_PENDING, &st_gdata->st_state))) {
554 pr_err(" KIM failure complete callback "); 557 pr_err(" KIM failure complete callback ");
555 st_reg_complete(st_gdata, err); 558 st_reg_complete(st_gdata, err);
559 clear_bit(ST_REG_PENDING, &st_gdata->st_state);
556 } 560 }
557 return -EINVAL; 561 return -EINVAL;
558 } 562 }
559 563
564 spin_lock_irqsave(&st_gdata->lock, flags);
565
560 clear_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state); 566 clear_bit(ST_REG_IN_PROGRESS, &st_gdata->st_state);
561 st_recv = st_int_recv; 567 st_recv = st_int_recv;
562 568
@@ -576,10 +582,10 @@ long st_register(struct st_proto_s *new_proto)
576 if (st_gdata->is_registered[new_proto->chnl_id] == true) { 582 if (st_gdata->is_registered[new_proto->chnl_id] == true) {
577 pr_err(" proto %d already registered ", 583 pr_err(" proto %d already registered ",
578 new_proto->chnl_id); 584 new_proto->chnl_id);
585 spin_unlock_irqrestore(&st_gdata->lock, flags);
579 return -EALREADY; 586 return -EALREADY;
580 } 587 }
581 588
582 spin_lock_irqsave(&st_gdata->lock, flags);
583 add_channel_to_table(st_gdata, new_proto); 589 add_channel_to_table(st_gdata, new_proto);
584 st_gdata->protos_registered++; 590 st_gdata->protos_registered++;
585 new_proto->write = st_write; 591 new_proto->write = st_write;
@@ -619,7 +625,7 @@ long st_unregister(struct st_proto_s *proto)
619 625
620 spin_lock_irqsave(&st_gdata->lock, flags); 626 spin_lock_irqsave(&st_gdata->lock, flags);
621 627
622 if (st_gdata->list[proto->chnl_id] == NULL) { 628 if (st_gdata->is_registered[proto->chnl_id] == false) {
623 pr_err(" chnl_id %d not registered", proto->chnl_id); 629 pr_err(" chnl_id %d not registered", proto->chnl_id);
624 spin_unlock_irqrestore(&st_gdata->lock, flags); 630 spin_unlock_irqrestore(&st_gdata->lock, flags);
625 return -EPROTONOSUPPORT; 631 return -EPROTONOSUPPORT;
@@ -629,6 +635,10 @@ long st_unregister(struct st_proto_s *proto)
629 remove_channel_from_table(st_gdata, proto); 635 remove_channel_from_table(st_gdata, proto);
630 spin_unlock_irqrestore(&st_gdata->lock, flags); 636 spin_unlock_irqrestore(&st_gdata->lock, flags);
631 637
638 /* paranoid check */
639 if (st_gdata->protos_registered < ST_EMPTY)
640 st_gdata->protos_registered = ST_EMPTY;
641
632 if ((st_gdata->protos_registered == ST_EMPTY) && 642 if ((st_gdata->protos_registered == ST_EMPTY) &&
633 (!test_bit(ST_REG_PENDING, &st_gdata->st_state))) { 643 (!test_bit(ST_REG_PENDING, &st_gdata->st_state))) {
634 pr_info(" all chnl_ids unregistered "); 644 pr_info(" all chnl_ids unregistered ");
diff --git a/drivers/misc/ti-st/st_kim.c b/drivers/misc/ti-st/st_kim.c
index 43ef8d162f2d..a7a861ceee2d 100644
--- a/drivers/misc/ti-st/st_kim.c
+++ b/drivers/misc/ti-st/st_kim.c
@@ -469,37 +469,21 @@ long st_kim_start(void *kim_data)
469 /* wait for ldisc to be installed */ 469 /* wait for ldisc to be installed */
470 err = wait_for_completion_timeout(&kim_gdata->ldisc_installed, 470 err = wait_for_completion_timeout(&kim_gdata->ldisc_installed,
471 msecs_to_jiffies(LDISC_TIME)); 471 msecs_to_jiffies(LDISC_TIME));
472 if (!err) { /* timeout */ 472 if (!err) {
473 pr_err("line disc installation timed out "); 473 /* ldisc installation timeout,
474 kim_gdata->ldisc_install = 0; 474 * flush uart, power cycle BT_EN */
475 pr_info("ldisc_install = 0"); 475 pr_err("ldisc installation timeout");
476 sysfs_notify(&kim_gdata->kim_pdev->dev.kobj, 476 err = st_kim_stop(kim_gdata);
477 NULL, "install");
478 /* the following wait is never going to be completed,
479 * since the ldisc was never installed, hence serving
480 * as a mdelay of LDISC_TIME msecs */
481 err = wait_for_completion_timeout
482 (&kim_gdata->ldisc_installed,
483 msecs_to_jiffies(LDISC_TIME));
484 err = -ETIMEDOUT;
485 continue; 477 continue;
486 } else { 478 } else {
487 /* ldisc installed now */ 479 /* ldisc installed now */
488 pr_info(" line discipline installed "); 480 pr_info("line discipline installed");
489 err = download_firmware(kim_gdata); 481 err = download_firmware(kim_gdata);
490 if (err != 0) { 482 if (err != 0) {
483 /* ldisc installed but fw download failed,
484 * flush uart & power cycle BT_EN */
491 pr_err("download firmware failed"); 485 pr_err("download firmware failed");
492 kim_gdata->ldisc_install = 0; 486 err = st_kim_stop(kim_gdata);
493 pr_info("ldisc_install = 0");
494 sysfs_notify(&kim_gdata->kim_pdev->dev.kobj,
495 NULL, "install");
496 /* this wait might be completed, though in the
497 * tty_close() since the ldisc is already
498 * installed */
499 err = wait_for_completion_timeout
500 (&kim_gdata->ldisc_installed,
501 msecs_to_jiffies(LDISC_TIME));
502 err = -EINVAL;
503 continue; 487 continue;
504 } else { /* on success don't retry */ 488 } else { /* on success don't retry */
505 break; 489 break;
@@ -510,8 +494,14 @@ long st_kim_start(void *kim_data)
510} 494}
511 495
512/** 496/**
513 * st_kim_stop - called from ST Core, on the last un-registration 497 * st_kim_stop - stop communication with chip.
514 * toggle low the chip enable gpio 498 * This can be called from ST Core/KIM, on the-
499 * (a) last un-register when chip need not be powered there-after,
500 * (b) upon failure to either install ldisc or download firmware.
501 * The function is responsible to (a) notify UIM about un-installation,
502 * (b) flush UART if the ldisc was installed.
503 * (c) reset BT_EN - pull down nshutdown at the end.
504 * (d) invoke platform's chip disabling routine.
515 */ 505 */
516long st_kim_stop(void *kim_data) 506long st_kim_stop(void *kim_data)
517{ 507{
@@ -519,12 +509,16 @@ long st_kim_stop(void *kim_data)
519 struct kim_data_s *kim_gdata = (struct kim_data_s *)kim_data; 509 struct kim_data_s *kim_gdata = (struct kim_data_s *)kim_data;
520 struct ti_st_plat_data *pdata = 510 struct ti_st_plat_data *pdata =
521 kim_gdata->kim_pdev->dev.platform_data; 511 kim_gdata->kim_pdev->dev.platform_data;
512 struct tty_struct *tty = kim_gdata->core_data->tty;
522 513
523 INIT_COMPLETION(kim_gdata->ldisc_installed); 514 INIT_COMPLETION(kim_gdata->ldisc_installed);
524 515
525 /* Flush any pending characters in the driver and discipline. */ 516 if (tty) { /* can be called before ldisc is installed */
526 tty_ldisc_flush(kim_gdata->core_data->tty); 517 /* Flush any pending characters in the driver and discipline. */
527 tty_driver_flush_buffer(kim_gdata->core_data->tty); 518 tty_ldisc_flush(tty);
519 tty_driver_flush_buffer(tty);
520 tty->ops->flush_buffer(tty);
521 }
528 522
529 /* send uninstall notification to UIM */ 523 /* send uninstall notification to UIM */
530 pr_info("ldisc_install = 0"); 524 pr_info("ldisc_install = 0");
@@ -579,6 +573,28 @@ static ssize_t show_install(struct device *dev,
579 return sprintf(buf, "%d\n", kim_data->ldisc_install); 573 return sprintf(buf, "%d\n", kim_data->ldisc_install);
580} 574}
581 575
576#ifdef DEBUG
577static ssize_t store_dev_name(struct device *dev,
578 struct device_attribute *attr, const char *buf, size_t count)
579{
580 struct kim_data_s *kim_data = dev_get_drvdata(dev);
581 pr_debug("storing dev name >%s<", buf);
582 strncpy(kim_data->dev_name, buf, count);
583 pr_debug("stored dev name >%s<", kim_data->dev_name);
584 return count;
585}
586
587static ssize_t store_baud_rate(struct device *dev,
588 struct device_attribute *attr, const char *buf, size_t count)
589{
590 struct kim_data_s *kim_data = dev_get_drvdata(dev);
591 pr_debug("storing baud rate >%s<", buf);
592 sscanf(buf, "%ld", &kim_data->baud_rate);
593 pr_debug("stored baud rate >%ld<", kim_data->baud_rate);
594 return count;
595}
596#endif /* if DEBUG */
597
582static ssize_t show_dev_name(struct device *dev, 598static ssize_t show_dev_name(struct device *dev,
583 struct device_attribute *attr, char *buf) 599 struct device_attribute *attr, char *buf)
584{ 600{
@@ -605,10 +621,18 @@ static struct kobj_attribute ldisc_install =
605__ATTR(install, 0444, (void *)show_install, NULL); 621__ATTR(install, 0444, (void *)show_install, NULL);
606 622
607static struct kobj_attribute uart_dev_name = 623static struct kobj_attribute uart_dev_name =
624#ifdef DEBUG /* TODO: move this to debug-fs if possible */
625__ATTR(dev_name, 0644, (void *)show_dev_name, (void *)store_dev_name);
626#else
608__ATTR(dev_name, 0444, (void *)show_dev_name, NULL); 627__ATTR(dev_name, 0444, (void *)show_dev_name, NULL);
628#endif
609 629
610static struct kobj_attribute uart_baud_rate = 630static struct kobj_attribute uart_baud_rate =
631#ifdef DEBUG /* TODO: move to debugfs */
632__ATTR(baud_rate, 0644, (void *)show_baud_rate, (void *)store_baud_rate);
633#else
611__ATTR(baud_rate, 0444, (void *)show_baud_rate, NULL); 634__ATTR(baud_rate, 0444, (void *)show_baud_rate, NULL);
635#endif
612 636
613static struct kobj_attribute uart_flow_cntrl = 637static struct kobj_attribute uart_flow_cntrl =
614__ATTR(flow_cntrl, 0444, (void *)show_flow_cntrl, NULL); 638__ATTR(flow_cntrl, 0444, (void *)show_flow_cntrl, NULL);
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index a8b4d2aa18e5..f437c3e6f3aa 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -741,7 +741,7 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
741 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); 741 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
742 742
743 /* maybe switch power to the card */ 743 /* maybe switch power to the card */
744 if (host->board->vcc_pin) { 744 if (gpio_is_valid(host->board->vcc_pin)) {
745 switch (ios->power_mode) { 745 switch (ios->power_mode) {
746 case MMC_POWER_OFF: 746 case MMC_POWER_OFF:
747 gpio_set_value(host->board->vcc_pin, 0); 747 gpio_set_value(host->board->vcc_pin, 0);
@@ -897,7 +897,7 @@ static int at91_mci_get_ro(struct mmc_host *mmc)
897{ 897{
898 struct at91mci_host *host = mmc_priv(mmc); 898 struct at91mci_host *host = mmc_priv(mmc);
899 899
900 if (host->board->wp_pin) 900 if (gpio_is_valid(host->board->wp_pin))
901 return !!gpio_get_value(host->board->wp_pin); 901 return !!gpio_get_value(host->board->wp_pin);
902 /* 902 /*
903 * Board doesn't support read only detection; let the mmc core 903 * Board doesn't support read only detection; let the mmc core
@@ -991,21 +991,21 @@ static int __init at91_mci_probe(struct platform_device *pdev)
991 * Reserve GPIOs ... board init code makes sure these pins are set 991 * Reserve GPIOs ... board init code makes sure these pins are set
992 * up as GPIOs with the right direction (input, except for vcc) 992 * up as GPIOs with the right direction (input, except for vcc)
993 */ 993 */
994 if (host->board->det_pin) { 994 if (gpio_is_valid(host->board->det_pin)) {
995 ret = gpio_request(host->board->det_pin, "mmc_detect"); 995 ret = gpio_request(host->board->det_pin, "mmc_detect");
996 if (ret < 0) { 996 if (ret < 0) {
997 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n"); 997 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
998 goto fail4b; 998 goto fail4b;
999 } 999 }
1000 } 1000 }
1001 if (host->board->wp_pin) { 1001 if (gpio_is_valid(host->board->wp_pin)) {
1002 ret = gpio_request(host->board->wp_pin, "mmc_wp"); 1002 ret = gpio_request(host->board->wp_pin, "mmc_wp");
1003 if (ret < 0) { 1003 if (ret < 0) {
1004 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n"); 1004 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
1005 goto fail4; 1005 goto fail4;
1006 } 1006 }
1007 } 1007 }
1008 if (host->board->vcc_pin) { 1008 if (gpio_is_valid(host->board->vcc_pin)) {
1009 ret = gpio_request(host->board->vcc_pin, "mmc_vcc"); 1009 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
1010 if (ret < 0) { 1010 if (ret < 0) {
1011 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n"); 1011 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
@@ -1057,7 +1057,7 @@ static int __init at91_mci_probe(struct platform_device *pdev)
1057 /* 1057 /*
1058 * Add host to MMC layer 1058 * Add host to MMC layer
1059 */ 1059 */
1060 if (host->board->det_pin) { 1060 if (gpio_is_valid(host->board->det_pin)) {
1061 host->present = !gpio_get_value(host->board->det_pin); 1061 host->present = !gpio_get_value(host->board->det_pin);
1062 } 1062 }
1063 else 1063 else
@@ -1068,7 +1068,7 @@ static int __init at91_mci_probe(struct platform_device *pdev)
1068 /* 1068 /*
1069 * monitor card insertion/removal if we can 1069 * monitor card insertion/removal if we can
1070 */ 1070 */
1071 if (host->board->det_pin) { 1071 if (gpio_is_valid(host->board->det_pin)) {
1072 ret = request_irq(gpio_to_irq(host->board->det_pin), 1072 ret = request_irq(gpio_to_irq(host->board->det_pin),
1073 at91_mmc_det_irq, 0, mmc_hostname(mmc), host); 1073 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
1074 if (ret) 1074 if (ret)
@@ -1087,13 +1087,13 @@ fail0:
1087fail1: 1087fail1:
1088 clk_put(host->mci_clk); 1088 clk_put(host->mci_clk);
1089fail2: 1089fail2:
1090 if (host->board->vcc_pin) 1090 if (gpio_is_valid(host->board->vcc_pin))
1091 gpio_free(host->board->vcc_pin); 1091 gpio_free(host->board->vcc_pin);
1092fail3: 1092fail3:
1093 if (host->board->wp_pin) 1093 if (gpio_is_valid(host->board->wp_pin))
1094 gpio_free(host->board->wp_pin); 1094 gpio_free(host->board->wp_pin);
1095fail4: 1095fail4:
1096 if (host->board->det_pin) 1096 if (gpio_is_valid(host->board->det_pin))
1097 gpio_free(host->board->det_pin); 1097 gpio_free(host->board->det_pin);
1098fail4b: 1098fail4b:
1099 if (host->buffer) 1099 if (host->buffer)
@@ -1125,7 +1125,7 @@ static int __exit at91_mci_remove(struct platform_device *pdev)
1125 dma_free_coherent(&pdev->dev, MCI_BUFSIZE, 1125 dma_free_coherent(&pdev->dev, MCI_BUFSIZE,
1126 host->buffer, host->physical_address); 1126 host->buffer, host->physical_address);
1127 1127
1128 if (host->board->det_pin) { 1128 if (gpio_is_valid(host->board->det_pin)) {
1129 if (device_can_wakeup(&pdev->dev)) 1129 if (device_can_wakeup(&pdev->dev))
1130 free_irq(gpio_to_irq(host->board->det_pin), host); 1130 free_irq(gpio_to_irq(host->board->det_pin), host);
1131 device_init_wakeup(&pdev->dev, 0); 1131 device_init_wakeup(&pdev->dev, 0);
@@ -1140,9 +1140,9 @@ static int __exit at91_mci_remove(struct platform_device *pdev)
1140 clk_disable(host->mci_clk); /* Disable the peripheral clock */ 1140 clk_disable(host->mci_clk); /* Disable the peripheral clock */
1141 clk_put(host->mci_clk); 1141 clk_put(host->mci_clk);
1142 1142
1143 if (host->board->vcc_pin) 1143 if (gpio_is_valid(host->board->vcc_pin))
1144 gpio_free(host->board->vcc_pin); 1144 gpio_free(host->board->vcc_pin);
1145 if (host->board->wp_pin) 1145 if (gpio_is_valid(host->board->wp_pin))
1146 gpio_free(host->board->wp_pin); 1146 gpio_free(host->board->wp_pin);
1147 1147
1148 iounmap(host->baseaddr); 1148 iounmap(host->baseaddr);
@@ -1163,7 +1163,7 @@ static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1163 struct at91mci_host *host = mmc_priv(mmc); 1163 struct at91mci_host *host = mmc_priv(mmc);
1164 int ret = 0; 1164 int ret = 0;
1165 1165
1166 if (host->board->det_pin && device_may_wakeup(&pdev->dev)) 1166 if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev))
1167 enable_irq_wake(host->board->det_pin); 1167 enable_irq_wake(host->board->det_pin);
1168 1168
1169 if (mmc) 1169 if (mmc)
@@ -1178,7 +1178,7 @@ static int at91_mci_resume(struct platform_device *pdev)
1178 struct at91mci_host *host = mmc_priv(mmc); 1178 struct at91mci_host *host = mmc_priv(mmc);
1179 int ret = 0; 1179 int ret = 0;
1180 1180
1181 if (host->board->det_pin && device_may_wakeup(&pdev->dev)) 1181 if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev))
1182 disable_irq_wake(host->board->det_pin); 1182 disable_irq_wake(host->board->det_pin);
1183 1183
1184 if (mmc) 1184 if (mmc)
diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c
index 211a4959c293..eeb8cd125b0c 100644
--- a/drivers/mmc/host/mvsdio.c
+++ b/drivers/mmc/host/mvsdio.c
@@ -679,8 +679,9 @@ static const struct mmc_host_ops mvsd_ops = {
679 .enable_sdio_irq = mvsd_enable_sdio_irq, 679 .enable_sdio_irq = mvsd_enable_sdio_irq,
680}; 680};
681 681
682static void __init mv_conf_mbus_windows(struct mvsd_host *host, 682static void __init
683 struct mbus_dram_target_info *dram) 683mv_conf_mbus_windows(struct mvsd_host *host,
684 const struct mbus_dram_target_info *dram)
684{ 685{
685 void __iomem *iobase = host->base; 686 void __iomem *iobase = host->base;
686 int i; 687 int i;
@@ -691,7 +692,7 @@ static void __init mv_conf_mbus_windows(struct mvsd_host *host,
691 } 692 }
692 693
693 for (i = 0; i < dram->num_cs; i++) { 694 for (i = 0; i < dram->num_cs; i++) {
694 struct mbus_dram_window *cs = dram->cs + i; 695 const struct mbus_dram_window *cs = dram->cs + i;
695 writel(((cs->size - 1) & 0xffff0000) | 696 writel(((cs->size - 1) & 0xffff0000) |
696 (cs->mbus_attr << 8) | 697 (cs->mbus_attr << 8) |
697 (dram->mbus_dram_target_id << 4) | 1, 698 (dram->mbus_dram_target_id << 4) | 1,
@@ -705,6 +706,7 @@ static int __init mvsd_probe(struct platform_device *pdev)
705 struct mmc_host *mmc = NULL; 706 struct mmc_host *mmc = NULL;
706 struct mvsd_host *host = NULL; 707 struct mvsd_host *host = NULL;
707 const struct mvsdio_platform_data *mvsd_data; 708 const struct mvsdio_platform_data *mvsd_data;
709 const struct mbus_dram_target_info *dram;
708 struct resource *r; 710 struct resource *r;
709 int ret, irq; 711 int ret, irq;
710 712
@@ -755,8 +757,9 @@ static int __init mvsd_probe(struct platform_device *pdev)
755 } 757 }
756 758
757 /* (Re-)program MBUS remapping windows if we are asked to. */ 759 /* (Re-)program MBUS remapping windows if we are asked to. */
758 if (mvsd_data->dram != NULL) 760 dram = mv_mbus_dram_info();
759 mv_conf_mbus_windows(host, mvsd_data->dram); 761 if (dram)
762 mv_conf_mbus_windows(host, dram);
760 763
761 mvsd_power_down(host); 764 mvsd_power_down(host);
762 765
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index 99b449d26a4d..973011f9a298 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -713,7 +713,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
713 ret = PTR_ERR(host->clk); 713 ret = PTR_ERR(host->clk);
714 goto out_iounmap; 714 goto out_iounmap;
715 } 715 }
716 clk_enable(host->clk); 716 clk_prepare_enable(host->clk);
717 717
718 mxs_mmc_reset(host); 718 mxs_mmc_reset(host);
719 719
@@ -772,7 +772,7 @@ out_free_dma:
772 if (host->dmach) 772 if (host->dmach)
773 dma_release_channel(host->dmach); 773 dma_release_channel(host->dmach);
774out_clk_put: 774out_clk_put:
775 clk_disable(host->clk); 775 clk_disable_unprepare(host->clk);
776 clk_put(host->clk); 776 clk_put(host->clk);
777out_iounmap: 777out_iounmap:
778 iounmap(host->base); 778 iounmap(host->base);
@@ -798,7 +798,7 @@ static int mxs_mmc_remove(struct platform_device *pdev)
798 if (host->dmach) 798 if (host->dmach)
799 dma_release_channel(host->dmach); 799 dma_release_channel(host->dmach);
800 800
801 clk_disable(host->clk); 801 clk_disable_unprepare(host->clk);
802 clk_put(host->clk); 802 clk_put(host->clk);
803 803
804 iounmap(host->base); 804 iounmap(host->base);
@@ -819,7 +819,7 @@ static int mxs_mmc_suspend(struct device *dev)
819 819
820 ret = mmc_suspend_host(mmc); 820 ret = mmc_suspend_host(mmc);
821 821
822 clk_disable(host->clk); 822 clk_disable_unprepare(host->clk);
823 823
824 return ret; 824 return ret;
825} 825}
@@ -830,7 +830,7 @@ static int mxs_mmc_resume(struct device *dev)
830 struct mxs_mmc_host *host = mmc_priv(mmc); 830 struct mxs_mmc_host *host = mmc_priv(mmc);
831 int ret = 0; 831 int ret = 0;
832 832
833 clk_enable(host->clk); 833 clk_prepare_enable(host->clk);
834 834
835 ret = mmc_resume_host(mmc); 835 ret = mmc_resume_host(mmc);
836 836
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index d5fe43d53c51..d1fb561e089d 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1991,6 +1991,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
1991 if (mmc_slot(host).nonremovable) 1991 if (mmc_slot(host).nonremovable)
1992 mmc->caps |= MMC_CAP_NONREMOVABLE; 1992 mmc->caps |= MMC_CAP_NONREMOVABLE;
1993 1993
1994 mmc->pm_caps = mmc_slot(host).pm_caps;
1995
1994 omap_hsmmc_conf_bus_power(host); 1996 omap_hsmmc_conf_bus_power(host);
1995 1997
1996 /* Select DMA lines */ 1998 /* Select DMA lines */
@@ -2179,13 +2181,7 @@ static int omap_hsmmc_suspend(struct device *dev)
2179 cancel_work_sync(&host->mmc_carddetect_work); 2181 cancel_work_sync(&host->mmc_carddetect_work);
2180 ret = mmc_suspend_host(host->mmc); 2182 ret = mmc_suspend_host(host->mmc);
2181 2183
2182 if (ret == 0) { 2184 if (ret) {
2183 omap_hsmmc_disable_irq(host);
2184 OMAP_HSMMC_WRITE(host->base, HCTL,
2185 OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP);
2186 if (host->got_dbclk)
2187 clk_disable(host->dbclk);
2188 } else {
2189 host->suspended = 0; 2185 host->suspended = 0;
2190 if (host->pdata->resume) { 2186 if (host->pdata->resume) {
2191 ret = host->pdata->resume(&pdev->dev, 2187 ret = host->pdata->resume(&pdev->dev,
@@ -2194,9 +2190,20 @@ static int omap_hsmmc_suspend(struct device *dev)
2194 dev_dbg(mmc_dev(host->mmc), 2190 dev_dbg(mmc_dev(host->mmc),
2195 "Unmask interrupt failed\n"); 2191 "Unmask interrupt failed\n");
2196 } 2192 }
2193 goto err;
2197 } 2194 }
2198 pm_runtime_put_sync(host->dev); 2195
2196 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) {
2197 omap_hsmmc_disable_irq(host);
2198 OMAP_HSMMC_WRITE(host->base, HCTL,
2199 OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP);
2200 }
2201 if (host->got_dbclk)
2202 clk_disable(host->dbclk);
2203
2199 } 2204 }
2205err:
2206 pm_runtime_put_sync(host->dev);
2200 return ret; 2207 return ret;
2201} 2208}
2202 2209
@@ -2216,7 +2223,8 @@ static int omap_hsmmc_resume(struct device *dev)
2216 if (host->got_dbclk) 2223 if (host->got_dbclk)
2217 clk_enable(host->dbclk); 2224 clk_enable(host->dbclk);
2218 2225
2219 omap_hsmmc_conf_bus_power(host); 2226 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER))
2227 omap_hsmmc_conf_bus_power(host);
2220 2228
2221 if (host->pdata->resume) { 2229 if (host->pdata->resume) {
2222 ret = host->pdata->resume(&pdev->dev, host->slot_id); 2230 ret = host->pdata->resume(&pdev->dev, host->slot_id);
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 0d33ff0d67fb..9a20d1f55bb7 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -435,14 +435,11 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
435 435
436 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { 436 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
437 struct clk *clk; 437 struct clk *clk;
438 char *name = pdata->clocks[ptr]; 438 char name[14];
439
440 if (name == NULL)
441 continue;
442 439
440 snprintf(name, 14, "mmc_busclk.%d", ptr);
443 clk = clk_get(dev, name); 441 clk = clk_get(dev, name);
444 if (IS_ERR(clk)) { 442 if (IS_ERR(clk)) {
445 dev_err(dev, "failed to get clock %s\n", name);
446 continue; 443 continue;
447 } 444 }
448 445
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 23e5d77c39fc..4dd056e2e16a 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -113,7 +113,7 @@ static int cpu_has_dma(void)
113 */ 113 */
114static void atmel_nand_enable(struct atmel_nand_host *host) 114static void atmel_nand_enable(struct atmel_nand_host *host)
115{ 115{
116 if (host->board->enable_pin) 116 if (gpio_is_valid(host->board->enable_pin))
117 gpio_set_value(host->board->enable_pin, 0); 117 gpio_set_value(host->board->enable_pin, 0);
118} 118}
119 119
@@ -122,7 +122,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
122 */ 122 */
123static void atmel_nand_disable(struct atmel_nand_host *host) 123static void atmel_nand_disable(struct atmel_nand_host *host)
124{ 124{
125 if (host->board->enable_pin) 125 if (gpio_is_valid(host->board->enable_pin))
126 gpio_set_value(host->board->enable_pin, 1); 126 gpio_set_value(host->board->enable_pin, 1);
127} 127}
128 128
@@ -492,7 +492,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
492 nand_chip->IO_ADDR_W = host->io_base; 492 nand_chip->IO_ADDR_W = host->io_base;
493 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl; 493 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
494 494
495 if (host->board->rdy_pin) 495 if (gpio_is_valid(host->board->rdy_pin))
496 nand_chip->dev_ready = atmel_nand_device_ready; 496 nand_chip->dev_ready = atmel_nand_device_ready;
497 497
498 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); 498 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@@ -530,7 +530,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
530 platform_set_drvdata(pdev, host); 530 platform_set_drvdata(pdev, host);
531 atmel_nand_enable(host); 531 atmel_nand_enable(host);
532 532
533 if (host->board->det_pin) { 533 if (gpio_is_valid(host->board->det_pin)) {
534 if (gpio_get_value(host->board->det_pin)) { 534 if (gpio_get_value(host->board->det_pin)) {
535 printk(KERN_INFO "No SmartMedia card inserted.\n"); 535 printk(KERN_INFO "No SmartMedia card inserted.\n");
536 res = -ENXIO; 536 res = -ENXIO;
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index de4db7604a3f..2a56fc6f399a 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -126,7 +126,7 @@ int gpmi_init(struct gpmi_nand_data *this)
126 struct resources *r = &this->resources; 126 struct resources *r = &this->resources;
127 int ret; 127 int ret;
128 128
129 ret = clk_enable(r->clock); 129 ret = clk_prepare_enable(r->clock);
130 if (ret) 130 if (ret)
131 goto err_out; 131 goto err_out;
132 ret = gpmi_reset_block(r->gpmi_regs, false); 132 ret = gpmi_reset_block(r->gpmi_regs, false);
@@ -146,7 +146,7 @@ int gpmi_init(struct gpmi_nand_data *this)
146 /* Select BCH ECC. */ 146 /* Select BCH ECC. */
147 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET); 147 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET);
148 148
149 clk_disable(r->clock); 149 clk_disable_unprepare(r->clock);
150 return 0; 150 return 0;
151err_out: 151err_out:
152 return ret; 152 return ret;
@@ -202,7 +202,7 @@ int bch_set_geometry(struct gpmi_nand_data *this)
202 ecc_strength = bch_geo->ecc_strength >> 1; 202 ecc_strength = bch_geo->ecc_strength >> 1;
203 page_size = bch_geo->page_size; 203 page_size = bch_geo->page_size;
204 204
205 ret = clk_enable(r->clock); 205 ret = clk_prepare_enable(r->clock);
206 if (ret) 206 if (ret)
207 goto err_out; 207 goto err_out;
208 208
@@ -229,7 +229,7 @@ int bch_set_geometry(struct gpmi_nand_data *this)
229 writel(BM_BCH_CTRL_COMPLETE_IRQ_EN, 229 writel(BM_BCH_CTRL_COMPLETE_IRQ_EN,
230 r->bch_regs + HW_BCH_CTRL_SET); 230 r->bch_regs + HW_BCH_CTRL_SET);
231 231
232 clk_disable(r->clock); 232 clk_disable_unprepare(r->clock);
233 return 0; 233 return 0;
234err_out: 234err_out:
235 return ret; 235 return ret;
@@ -704,7 +704,7 @@ void gpmi_begin(struct gpmi_nand_data *this)
704 int ret; 704 int ret;
705 705
706 /* Enable the clock. */ 706 /* Enable the clock. */
707 ret = clk_enable(r->clock); 707 ret = clk_prepare_enable(r->clock);
708 if (ret) { 708 if (ret) {
709 pr_err("We failed in enable the clk\n"); 709 pr_err("We failed in enable the clk\n");
710 goto err_out; 710 goto err_out;
@@ -773,7 +773,7 @@ err_out:
773void gpmi_end(struct gpmi_nand_data *this) 773void gpmi_end(struct gpmi_nand_data *this)
774{ 774{
775 struct resources *r = &this->resources; 775 struct resources *r = &this->resources;
776 clk_disable(r->clock); 776 clk_disable_unprepare(r->clock);
777} 777}
778 778
779/* Clears a BCH interrupt. */ 779/* Clears a BCH interrupt. */
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 9845afb37cc8..b98285446a5a 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -342,4 +342,6 @@ config VMXNET3
342 To compile this driver as a module, choose M here: the 342 To compile this driver as a module, choose M here: the
343 module will be called vmxnet3. 343 module will be called vmxnet3.
344 344
345source "drivers/net/hyperv/Kconfig"
346
345endif # NETDEVICES 347endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 1988881853ab..a6b8ce11a22f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -68,3 +68,5 @@ obj-$(CONFIG_USB_USBNET) += usb/
68obj-$(CONFIG_USB_ZD1201) += usb/ 68obj-$(CONFIG_USB_ZD1201) += usb/
69obj-$(CONFIG_USB_IPHETH) += usb/ 69obj-$(CONFIG_USB_IPHETH) += usb/
70obj-$(CONFIG_USB_CDC_PHONET) += usb/ 70obj-$(CONFIG_USB_CDC_PHONET) += usb/
71
72obj-$(CONFIG_HYPERV_NET) += hyperv/
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 165a4c798025..7fd8089946fb 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -802,7 +802,7 @@ static int flexcan_open(struct net_device *dev)
802 struct flexcan_priv *priv = netdev_priv(dev); 802 struct flexcan_priv *priv = netdev_priv(dev);
803 int err; 803 int err;
804 804
805 clk_enable(priv->clk); 805 clk_prepare_enable(priv->clk);
806 806
807 err = open_candev(dev); 807 err = open_candev(dev);
808 if (err) 808 if (err)
@@ -824,7 +824,7 @@ static int flexcan_open(struct net_device *dev)
824 out_close: 824 out_close:
825 close_candev(dev); 825 close_candev(dev);
826 out: 826 out:
827 clk_disable(priv->clk); 827 clk_disable_unprepare(priv->clk);
828 828
829 return err; 829 return err;
830} 830}
@@ -838,7 +838,7 @@ static int flexcan_close(struct net_device *dev)
838 flexcan_chip_stop(dev); 838 flexcan_chip_stop(dev);
839 839
840 free_irq(dev->irq, dev); 840 free_irq(dev->irq, dev);
841 clk_disable(priv->clk); 841 clk_disable_unprepare(priv->clk);
842 842
843 close_candev(dev); 843 close_candev(dev);
844 844
@@ -877,7 +877,7 @@ static int __devinit register_flexcandev(struct net_device *dev)
877 struct flexcan_regs __iomem *regs = priv->base; 877 struct flexcan_regs __iomem *regs = priv->base;
878 u32 reg, err; 878 u32 reg, err;
879 879
880 clk_enable(priv->clk); 880 clk_prepare_enable(priv->clk);
881 881
882 /* select "bus clock", chip must be disabled */ 882 /* select "bus clock", chip must be disabled */
883 flexcan_chip_disable(priv); 883 flexcan_chip_disable(priv);
@@ -911,7 +911,7 @@ static int __devinit register_flexcandev(struct net_device *dev)
911 out: 911 out:
912 /* disable core and turn off clocks */ 912 /* disable core and turn off clocks */
913 flexcan_chip_disable(priv); 913 flexcan_chip_disable(priv);
914 clk_disable(priv->clk); 914 clk_disable_unprepare(priv->clk);
915 915
916 return err; 916 return err;
917} 917}
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index cd6d69a6a7d2..08d5f0388877 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
10obj-$(CONFIG_NET_VENDOR_AMD) += amd/ 10obj-$(CONFIG_NET_VENDOR_AMD) += amd/
11obj-$(CONFIG_NET_VENDOR_APPLE) += apple/ 11obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
12obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/ 12obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
13obj-$(CONFIG_NET_ATMEL) += cadence/ 13obj-$(CONFIG_NET_CADENCE) += cadence/
14obj-$(CONFIG_NET_BFIN) += adi/ 14obj-$(CONFIG_NET_BFIN) += adi/
15obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/ 15obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/
16obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/ 16obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index a11a8ad94226..d44331eb07fe 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -1469,7 +1469,7 @@ static int bcm_enet_set_pauseparam(struct net_device *dev,
1469 return 0; 1469 return 0;
1470} 1470}
1471 1471
1472static struct ethtool_ops bcm_enet_ethtool_ops = { 1472static const struct ethtool_ops bcm_enet_ethtool_ops = {
1473 .get_strings = bcm_enet_get_strings, 1473 .get_strings = bcm_enet_get_strings,
1474 .get_sset_count = bcm_enet_get_sset_count, 1474 .get_sset_count = bcm_enet_get_sset_count,
1475 .get_ethtool_stats = bcm_enet_get_ethtool_stats, 1475 .get_ethtool_stats = bcm_enet_get_ethtool_stats,
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig
index b48378a41e49..db931916da08 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -5,8 +5,8 @@
5config HAVE_NET_MACB 5config HAVE_NET_MACB
6 bool 6 bool
7 7
8config NET_ATMEL 8config NET_CADENCE
9 bool "Atmel devices" 9 bool "Cadence devices"
10 default y 10 default y
11 depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200) 11 depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200)
12 ---help--- 12 ---help---
@@ -21,7 +21,7 @@ config NET_ATMEL
21 the remaining Atmel network card questions. If you say Y, you will be 21 the remaining Atmel network card questions. If you say Y, you will be
22 asked for your specific card in the following questions. 22 asked for your specific card in the following questions.
23 23
24if NET_ATMEL 24if NET_CADENCE
25 25
26config ARM_AT91_ETHER 26config ARM_AT91_ETHER
27 tristate "AT91RM9200 Ethernet support" 27 tristate "AT91RM9200 Ethernet support"
@@ -33,14 +33,16 @@ config ARM_AT91_ETHER
33 ethernet support, then you should always answer Y to this. 33 ethernet support, then you should always answer Y to this.
34 34
35config MACB 35config MACB
36 tristate "Atmel MACB support" 36 tristate "Cadence MACB/GEM support"
37 depends on HAVE_NET_MACB 37 depends on HAVE_NET_MACB
38 select PHYLIB 38 select PHYLIB
39 ---help--- 39 ---help---
40 The Atmel MACB ethernet interface is found on many AT32 and AT91 40 The Cadence MACB ethernet interface is found on many Atmel AT32 and
41 parts. Say Y to include support for the MACB chip. 41 AT91 parts. This driver also supports the Cadence GEM (Gigabit
42 Ethernet MAC found in some ARM SoC devices). Note: the Gigabit mode
43 is not yet supported. Say Y to include support for the MACB/GEM chip.
42 44
43 To compile this driver as a module, choose M here: the module 45 To compile this driver as a module, choose M here: the module
44 will be called macb. 46 will be called macb.
45 47
46endif # NET_ATMEL 48endif # NET_CADENCE
diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c
index 56624d303487..1a5b6efa0120 100644
--- a/drivers/net/ethernet/cadence/at91_ether.c
+++ b/drivers/net/ethernet/cadence/at91_ether.c
@@ -26,6 +26,7 @@
26#include <linux/skbuff.h> 26#include <linux/skbuff.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/ethtool.h> 28#include <linux/ethtool.h>
29#include <linux/platform_data/macb.h>
29#include <linux/platform_device.h> 30#include <linux/platform_device.h>
30#include <linux/clk.h> 31#include <linux/clk.h>
31#include <linux/gfp.h> 32#include <linux/gfp.h>
@@ -255,8 +256,7 @@ static void enable_phyirq(struct net_device *dev)
255 unsigned int dsintr, irq_number; 256 unsigned int dsintr, irq_number;
256 int status; 257 int status;
257 258
258 irq_number = lp->board_data.phy_irq_pin; 259 if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
259 if (!irq_number) {
260 /* 260 /*
261 * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L), 261 * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L),
262 * or board does not have it connected. 262 * or board does not have it connected.
@@ -265,6 +265,7 @@ static void enable_phyirq(struct net_device *dev)
265 return; 265 return;
266 } 266 }
267 267
268 irq_number = lp->board_data.phy_irq_pin;
268 status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); 269 status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev);
269 if (status) { 270 if (status) {
270 printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); 271 printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status);
@@ -319,8 +320,7 @@ static void disable_phyirq(struct net_device *dev)
319 unsigned int dsintr; 320 unsigned int dsintr;
320 unsigned int irq_number; 321 unsigned int irq_number;
321 322
322 irq_number = lp->board_data.phy_irq_pin; 323 if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
323 if (!irq_number) {
324 del_timer_sync(&lp->check_timer); 324 del_timer_sync(&lp->check_timer);
325 return; 325 return;
326 } 326 }
@@ -365,6 +365,7 @@ static void disable_phyirq(struct net_device *dev)
365 disable_mdi(); 365 disable_mdi();
366 spin_unlock_irq(&lp->lock); 366 spin_unlock_irq(&lp->lock);
367 367
368 irq_number = lp->board_data.phy_irq_pin;
368 free_irq(irq_number, dev); /* Free interrupt handler */ 369 free_irq(irq_number, dev); /* Free interrupt handler */
369} 370}
370 371
@@ -984,7 +985,7 @@ static const struct net_device_ops at91ether_netdev_ops = {
984static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address, 985static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address,
985 struct platform_device *pdev, struct clk *ether_clk) 986 struct platform_device *pdev, struct clk *ether_clk)
986{ 987{
987 struct at91_eth_data *board_data = pdev->dev.platform_data; 988 struct macb_platform_data *board_data = pdev->dev.platform_data;
988 struct net_device *dev; 989 struct net_device *dev;
989 struct at91_private *lp; 990 struct at91_private *lp;
990 unsigned int val; 991 unsigned int val;
@@ -1077,7 +1078,7 @@ static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_add
1077 netif_carrier_off(dev); /* will be enabled in open() */ 1078 netif_carrier_off(dev); /* will be enabled in open() */
1078 1079
1079 /* If board has no PHY IRQ, use a timer to poll the PHY */ 1080 /* If board has no PHY IRQ, use a timer to poll the PHY */
1080 if (!lp->board_data.phy_irq_pin) { 1081 if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
1081 init_timer(&lp->check_timer); 1082 init_timer(&lp->check_timer);
1082 lp->check_timer.data = (unsigned long)dev; 1083 lp->check_timer.data = (unsigned long)dev;
1083 lp->check_timer.function = at91ether_check_link; 1084 lp->check_timer.function = at91ether_check_link;
@@ -1169,7 +1170,8 @@ static int __devexit at91ether_remove(struct platform_device *pdev)
1169 struct net_device *dev = platform_get_drvdata(pdev); 1170 struct net_device *dev = platform_get_drvdata(pdev);
1170 struct at91_private *lp = netdev_priv(dev); 1171 struct at91_private *lp = netdev_priv(dev);
1171 1172
1172 if (lp->board_data.phy_irq_pin >= 32) 1173 if (gpio_is_valid(lp->board_data.phy_irq_pin) &&
1174 lp->board_data.phy_irq_pin >= 32)
1173 gpio_free(lp->board_data.phy_irq_pin); 1175 gpio_free(lp->board_data.phy_irq_pin);
1174 1176
1175 unregister_netdev(dev); 1177 unregister_netdev(dev);
@@ -1188,11 +1190,12 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
1188{ 1190{
1189 struct net_device *net_dev = platform_get_drvdata(pdev); 1191 struct net_device *net_dev = platform_get_drvdata(pdev);
1190 struct at91_private *lp = netdev_priv(net_dev); 1192 struct at91_private *lp = netdev_priv(net_dev);
1191 int phy_irq = lp->board_data.phy_irq_pin;
1192 1193
1193 if (netif_running(net_dev)) { 1194 if (netif_running(net_dev)) {
1194 if (phy_irq) 1195 if (gpio_is_valid(lp->board_data.phy_irq_pin)) {
1196 int phy_irq = lp->board_data.phy_irq_pin;
1195 disable_irq(phy_irq); 1197 disable_irq(phy_irq);
1198 }
1196 1199
1197 netif_stop_queue(net_dev); 1200 netif_stop_queue(net_dev);
1198 netif_device_detach(net_dev); 1201 netif_device_detach(net_dev);
@@ -1206,7 +1209,6 @@ static int at91ether_resume(struct platform_device *pdev)
1206{ 1209{
1207 struct net_device *net_dev = platform_get_drvdata(pdev); 1210 struct net_device *net_dev = platform_get_drvdata(pdev);
1208 struct at91_private *lp = netdev_priv(net_dev); 1211 struct at91_private *lp = netdev_priv(net_dev);
1209 int phy_irq = lp->board_data.phy_irq_pin;
1210 1212
1211 if (netif_running(net_dev)) { 1213 if (netif_running(net_dev)) {
1212 clk_enable(lp->ether_clk); 1214 clk_enable(lp->ether_clk);
@@ -1214,8 +1216,10 @@ static int at91ether_resume(struct platform_device *pdev)
1214 netif_device_attach(net_dev); 1216 netif_device_attach(net_dev);
1215 netif_start_queue(net_dev); 1217 netif_start_queue(net_dev);
1216 1218
1217 if (phy_irq) 1219 if (gpio_is_valid(lp->board_data.phy_irq_pin)) {
1220 int phy_irq = lp->board_data.phy_irq_pin;
1218 enable_irq(phy_irq); 1221 enable_irq(phy_irq);
1222 }
1219 } 1223 }
1220 return 0; 1224 return 0;
1221} 1225}
diff --git a/drivers/net/ethernet/cadence/at91_ether.h b/drivers/net/ethernet/cadence/at91_ether.h
index 353f4dab62be..3725fbb0defe 100644
--- a/drivers/net/ethernet/cadence/at91_ether.h
+++ b/drivers/net/ethernet/cadence/at91_ether.h
@@ -85,7 +85,9 @@ struct recv_desc_bufs
85struct at91_private 85struct at91_private
86{ 86{
87 struct mii_if_info mii; /* ethtool support */ 87 struct mii_if_info mii; /* ethtool support */
88 struct at91_eth_data board_data; /* board-specific configuration */ 88 struct macb_platform_data board_data; /* board-specific
89 * configuration (shared with
90 * macb for common data */
89 struct clk *ether_clk; /* clock */ 91 struct clk *ether_clk; /* clock */
90 92
91 /* PHY */ 93 /* PHY */
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index a437b46e5490..f3d5c65d99cf 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Atmel MACB Ethernet Controller driver 2 * Cadence MACB/GEM Ethernet Controller driver
3 * 3 *
4 * Copyright (C) 2004-2006 Atmel Corporation 4 * Copyright (C) 2004-2006 Atmel Corporation
5 * 5 *
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11#include <linux/clk.h> 12#include <linux/clk.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/moduleparam.h> 14#include <linux/moduleparam.h>
@@ -19,11 +20,12 @@
19#include <linux/netdevice.h> 20#include <linux/netdevice.h>
20#include <linux/etherdevice.h> 21#include <linux/etherdevice.h>
21#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/platform_data/macb.h>
22#include <linux/platform_device.h> 24#include <linux/platform_device.h>
23#include <linux/phy.h> 25#include <linux/phy.h>
24 26#include <linux/of.h>
25#include <mach/board.h> 27#include <linux/of_device.h>
26#include <mach/cpu.h> 28#include <linux/of_net.h>
27 29
28#include "macb.h" 30#include "macb.h"
29 31
@@ -60,9 +62,9 @@ static void __macb_set_hwaddr(struct macb *bp)
60 u16 top; 62 u16 top;
61 63
62 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); 64 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
63 macb_writel(bp, SA1B, bottom); 65 macb_or_gem_writel(bp, SA1B, bottom);
64 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); 66 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
65 macb_writel(bp, SA1T, top); 67 macb_or_gem_writel(bp, SA1T, top);
66} 68}
67 69
68static void __init macb_get_hwaddr(struct macb *bp) 70static void __init macb_get_hwaddr(struct macb *bp)
@@ -71,8 +73,8 @@ static void __init macb_get_hwaddr(struct macb *bp)
71 u16 top; 73 u16 top;
72 u8 addr[6]; 74 u8 addr[6];
73 75
74 bottom = macb_readl(bp, SA1B); 76 bottom = macb_or_gem_readl(bp, SA1B);
75 top = macb_readl(bp, SA1T); 77 top = macb_or_gem_readl(bp, SA1T);
76 78
77 addr[0] = bottom & 0xff; 79 addr[0] = bottom & 0xff;
78 addr[1] = (bottom >> 8) & 0xff; 80 addr[1] = (bottom >> 8) & 0xff;
@@ -84,7 +86,7 @@ static void __init macb_get_hwaddr(struct macb *bp)
84 if (is_valid_ether_addr(addr)) { 86 if (is_valid_ether_addr(addr)) {
85 memcpy(bp->dev->dev_addr, addr, sizeof(addr)); 87 memcpy(bp->dev->dev_addr, addr, sizeof(addr));
86 } else { 88 } else {
87 dev_info(&bp->pdev->dev, "invalid hw address, using random\n"); 89 netdev_info(bp->dev, "invalid hw address, using random\n");
88 random_ether_addr(bp->dev->dev_addr); 90 random_ether_addr(bp->dev->dev_addr);
89 } 91 }
90} 92}
@@ -178,11 +180,12 @@ static void macb_handle_link_change(struct net_device *dev)
178 180
179 if (status_change) { 181 if (status_change) {
180 if (phydev->link) 182 if (phydev->link)
181 printk(KERN_INFO "%s: link up (%d/%s)\n", 183 netdev_info(dev, "link up (%d/%s)\n",
182 dev->name, phydev->speed, 184 phydev->speed,
183 DUPLEX_FULL == phydev->duplex ? "Full":"Half"); 185 phydev->duplex == DUPLEX_FULL ?
186 "Full" : "Half");
184 else 187 else
185 printk(KERN_INFO "%s: link down\n", dev->name); 188 netdev_info(dev, "link down\n");
186 } 189 }
187} 190}
188 191
@@ -191,25 +194,21 @@ static int macb_mii_probe(struct net_device *dev)
191{ 194{
192 struct macb *bp = netdev_priv(dev); 195 struct macb *bp = netdev_priv(dev);
193 struct phy_device *phydev; 196 struct phy_device *phydev;
194 struct eth_platform_data *pdata;
195 int ret; 197 int ret;
196 198
197 phydev = phy_find_first(bp->mii_bus); 199 phydev = phy_find_first(bp->mii_bus);
198 if (!phydev) { 200 if (!phydev) {
199 printk (KERN_ERR "%s: no PHY found\n", dev->name); 201 netdev_err(dev, "no PHY found\n");
200 return -1; 202 return -1;
201 } 203 }
202 204
203 pdata = bp->pdev->dev.platform_data;
204 /* TODO : add pin_irq */ 205 /* TODO : add pin_irq */
205 206
206 /* attach the mac to the phy */ 207 /* attach the mac to the phy */
207 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0, 208 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0,
208 pdata && pdata->is_rmii ? 209 bp->phy_interface);
209 PHY_INTERFACE_MODE_RMII :
210 PHY_INTERFACE_MODE_MII);
211 if (ret) { 210 if (ret) {
212 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); 211 netdev_err(dev, "Could not attach to PHY\n");
213 return ret; 212 return ret;
214 } 213 }
215 214
@@ -228,7 +227,7 @@ static int macb_mii_probe(struct net_device *dev)
228 227
229static int macb_mii_init(struct macb *bp) 228static int macb_mii_init(struct macb *bp)
230{ 229{
231 struct eth_platform_data *pdata; 230 struct macb_platform_data *pdata;
232 int err = -ENXIO, i; 231 int err = -ENXIO, i;
233 232
234 /* Enable management port */ 233 /* Enable management port */
@@ -285,8 +284,8 @@ err_out:
285static void macb_update_stats(struct macb *bp) 284static void macb_update_stats(struct macb *bp)
286{ 285{
287 u32 __iomem *reg = bp->regs + MACB_PFR; 286 u32 __iomem *reg = bp->regs + MACB_PFR;
288 u32 *p = &bp->hw_stats.rx_pause_frames; 287 u32 *p = &bp->hw_stats.macb.rx_pause_frames;
289 u32 *end = &bp->hw_stats.tx_pause_frames + 1; 288 u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1;
290 289
291 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); 290 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
292 291
@@ -303,14 +302,13 @@ static void macb_tx(struct macb *bp)
303 status = macb_readl(bp, TSR); 302 status = macb_readl(bp, TSR);
304 macb_writel(bp, TSR, status); 303 macb_writel(bp, TSR, status);
305 304
306 dev_dbg(&bp->pdev->dev, "macb_tx status = %02lx\n", 305 netdev_dbg(bp->dev, "macb_tx status = %02lx\n", (unsigned long)status);
307 (unsigned long)status);
308 306
309 if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { 307 if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) {
310 int i; 308 int i;
311 printk(KERN_ERR "%s: TX %s, resetting buffers\n", 309 netdev_err(bp->dev, "TX %s, resetting buffers\n",
312 bp->dev->name, status & MACB_BIT(UND) ? 310 status & MACB_BIT(UND) ?
313 "underrun" : "retry limit exceeded"); 311 "underrun" : "retry limit exceeded");
314 312
315 /* Transfer ongoing, disable transmitter, to avoid confusion */ 313 /* Transfer ongoing, disable transmitter, to avoid confusion */
316 if (status & MACB_BIT(TGO)) 314 if (status & MACB_BIT(TGO))
@@ -369,8 +367,8 @@ static void macb_tx(struct macb *bp)
369 if (!(bufstat & MACB_BIT(TX_USED))) 367 if (!(bufstat & MACB_BIT(TX_USED)))
370 break; 368 break;
371 369
372 dev_dbg(&bp->pdev->dev, "skb %u (data %p) TX complete\n", 370 netdev_dbg(bp->dev, "skb %u (data %p) TX complete\n",
373 tail, skb->data); 371 tail, skb->data);
374 dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, 372 dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len,
375 DMA_TO_DEVICE); 373 DMA_TO_DEVICE);
376 bp->stats.tx_packets++; 374 bp->stats.tx_packets++;
@@ -395,8 +393,8 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
395 393
396 len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl); 394 len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl);
397 395
398 dev_dbg(&bp->pdev->dev, "macb_rx_frame frags %u - %u (len %u)\n", 396 netdev_dbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n",
399 first_frag, last_frag, len); 397 first_frag, last_frag, len);
400 398
401 skb = dev_alloc_skb(len + RX_OFFSET); 399 skb = dev_alloc_skb(len + RX_OFFSET);
402 if (!skb) { 400 if (!skb) {
@@ -437,8 +435,8 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
437 435
438 bp->stats.rx_packets++; 436 bp->stats.rx_packets++;
439 bp->stats.rx_bytes += len; 437 bp->stats.rx_bytes += len;
440 dev_dbg(&bp->pdev->dev, "received skb of length %u, csum: %08x\n", 438 netdev_dbg(bp->dev, "received skb of length %u, csum: %08x\n",
441 skb->len, skb->csum); 439 skb->len, skb->csum);
442 netif_receive_skb(skb); 440 netif_receive_skb(skb);
443 441
444 return 0; 442 return 0;
@@ -515,8 +513,8 @@ static int macb_poll(struct napi_struct *napi, int budget)
515 513
516 work_done = 0; 514 work_done = 0;
517 515
518 dev_dbg(&bp->pdev->dev, "poll: status = %08lx, budget = %d\n", 516 netdev_dbg(bp->dev, "poll: status = %08lx, budget = %d\n",
519 (unsigned long)status, budget); 517 (unsigned long)status, budget);
520 518
521 work_done = macb_rx(bp, budget); 519 work_done = macb_rx(bp, budget);
522 if (work_done < budget) { 520 if (work_done < budget) {
@@ -565,8 +563,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
565 macb_writel(bp, IDR, MACB_RX_INT_FLAGS); 563 macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
566 564
567 if (napi_schedule_prep(&bp->napi)) { 565 if (napi_schedule_prep(&bp->napi)) {
568 dev_dbg(&bp->pdev->dev, 566 netdev_dbg(bp->dev, "scheduling RX softirq\n");
569 "scheduling RX softirq\n");
570 __napi_schedule(&bp->napi); 567 __napi_schedule(&bp->napi);
571 } 568 }
572 } 569 }
@@ -582,16 +579,19 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
582 579
583 if (status & MACB_BIT(ISR_ROVR)) { 580 if (status & MACB_BIT(ISR_ROVR)) {
584 /* We missed at least one packet */ 581 /* We missed at least one packet */
585 bp->hw_stats.rx_overruns++; 582 if (macb_is_gem(bp))
583 bp->hw_stats.gem.rx_overruns++;
584 else
585 bp->hw_stats.macb.rx_overruns++;
586 } 586 }
587 587
588 if (status & MACB_BIT(HRESP)) { 588 if (status & MACB_BIT(HRESP)) {
589 /* 589 /*
590 * TODO: Reset the hardware, and maybe move the printk 590 * TODO: Reset the hardware, and maybe move the
591 * to a lower-priority context as well (work queue?) 591 * netdev_err to a lower-priority context as well
592 * (work queue?)
592 */ 593 */
593 printk(KERN_ERR "%s: DMA bus error: HRESP not OK\n", 594 netdev_err(dev, "DMA bus error: HRESP not OK\n");
594 dev->name);
595 } 595 }
596 596
597 status = macb_readl(bp, ISR); 597 status = macb_readl(bp, ISR);
@@ -626,16 +626,12 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
626 unsigned long flags; 626 unsigned long flags;
627 627
628#ifdef DEBUG 628#ifdef DEBUG
629 int i; 629 netdev_dbg(bp->dev,
630 dev_dbg(&bp->pdev->dev, 630 "start_xmit: len %u head %p data %p tail %p end %p\n",
631 "start_xmit: len %u head %p data %p tail %p end %p\n", 631 skb->len, skb->head, skb->data,
632 skb->len, skb->head, skb->data, 632 skb_tail_pointer(skb), skb_end_pointer(skb));
633 skb_tail_pointer(skb), skb_end_pointer(skb)); 633 print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_OFFSET, 16, 1,
634 dev_dbg(&bp->pdev->dev, 634 skb->data, 16, true);
635 "data:");
636 for (i = 0; i < 16; i++)
637 printk(" %02x", (unsigned int)skb->data[i]);
638 printk("\n");
639#endif 635#endif
640 636
641 len = skb->len; 637 len = skb->len;
@@ -645,21 +641,20 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
645 if (TX_BUFFS_AVAIL(bp) < 1) { 641 if (TX_BUFFS_AVAIL(bp) < 1) {
646 netif_stop_queue(dev); 642 netif_stop_queue(dev);
647 spin_unlock_irqrestore(&bp->lock, flags); 643 spin_unlock_irqrestore(&bp->lock, flags);
648 dev_err(&bp->pdev->dev, 644 netdev_err(bp->dev, "BUG! Tx Ring full when queue awake!\n");
649 "BUG! Tx Ring full when queue awake!\n"); 645 netdev_dbg(bp->dev, "tx_head = %u, tx_tail = %u\n",
650 dev_dbg(&bp->pdev->dev, "tx_head = %u, tx_tail = %u\n", 646 bp->tx_head, bp->tx_tail);
651 bp->tx_head, bp->tx_tail);
652 return NETDEV_TX_BUSY; 647 return NETDEV_TX_BUSY;
653 } 648 }
654 649
655 entry = bp->tx_head; 650 entry = bp->tx_head;
656 dev_dbg(&bp->pdev->dev, "Allocated ring entry %u\n", entry); 651 netdev_dbg(bp->dev, "Allocated ring entry %u\n", entry);
657 mapping = dma_map_single(&bp->pdev->dev, skb->data, 652 mapping = dma_map_single(&bp->pdev->dev, skb->data,
658 len, DMA_TO_DEVICE); 653 len, DMA_TO_DEVICE);
659 bp->tx_skb[entry].skb = skb; 654 bp->tx_skb[entry].skb = skb;
660 bp->tx_skb[entry].mapping = mapping; 655 bp->tx_skb[entry].mapping = mapping;
661 dev_dbg(&bp->pdev->dev, "Mapped skb data %p to DMA addr %08lx\n", 656 netdev_dbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n",
662 skb->data, (unsigned long)mapping); 657 skb->data, (unsigned long)mapping);
663 658
664 ctrl = MACB_BF(TX_FRMLEN, len); 659 ctrl = MACB_BF(TX_FRMLEN, len);
665 ctrl |= MACB_BIT(TX_LAST); 660 ctrl |= MACB_BIT(TX_LAST);
@@ -723,27 +718,27 @@ static int macb_alloc_consistent(struct macb *bp)
723 &bp->rx_ring_dma, GFP_KERNEL); 718 &bp->rx_ring_dma, GFP_KERNEL);
724 if (!bp->rx_ring) 719 if (!bp->rx_ring)
725 goto out_err; 720 goto out_err;
726 dev_dbg(&bp->pdev->dev, 721 netdev_dbg(bp->dev,
727 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n", 722 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
728 size, (unsigned long)bp->rx_ring_dma, bp->rx_ring); 723 size, (unsigned long)bp->rx_ring_dma, bp->rx_ring);
729 724
730 size = TX_RING_BYTES; 725 size = TX_RING_BYTES;
731 bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, 726 bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
732 &bp->tx_ring_dma, GFP_KERNEL); 727 &bp->tx_ring_dma, GFP_KERNEL);
733 if (!bp->tx_ring) 728 if (!bp->tx_ring)
734 goto out_err; 729 goto out_err;
735 dev_dbg(&bp->pdev->dev, 730 netdev_dbg(bp->dev,
736 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n", 731 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
737 size, (unsigned long)bp->tx_ring_dma, bp->tx_ring); 732 size, (unsigned long)bp->tx_ring_dma, bp->tx_ring);
738 733
739 size = RX_RING_SIZE * RX_BUFFER_SIZE; 734 size = RX_RING_SIZE * RX_BUFFER_SIZE;
740 bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, 735 bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size,
741 &bp->rx_buffers_dma, GFP_KERNEL); 736 &bp->rx_buffers_dma, GFP_KERNEL);
742 if (!bp->rx_buffers) 737 if (!bp->rx_buffers)
743 goto out_err; 738 goto out_err;
744 dev_dbg(&bp->pdev->dev, 739 netdev_dbg(bp->dev,
745 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", 740 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
746 size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); 741 size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
747 742
748 return 0; 743 return 0;
749 744
@@ -797,6 +792,84 @@ static void macb_reset_hw(struct macb *bp)
797 macb_readl(bp, ISR); 792 macb_readl(bp, ISR);
798} 793}
799 794
795static u32 gem_mdc_clk_div(struct macb *bp)
796{
797 u32 config;
798 unsigned long pclk_hz = clk_get_rate(bp->pclk);
799
800 if (pclk_hz <= 20000000)
801 config = GEM_BF(CLK, GEM_CLK_DIV8);
802 else if (pclk_hz <= 40000000)
803 config = GEM_BF(CLK, GEM_CLK_DIV16);
804 else if (pclk_hz <= 80000000)
805 config = GEM_BF(CLK, GEM_CLK_DIV32);
806 else if (pclk_hz <= 120000000)
807 config = GEM_BF(CLK, GEM_CLK_DIV48);
808 else if (pclk_hz <= 160000000)
809 config = GEM_BF(CLK, GEM_CLK_DIV64);
810 else
811 config = GEM_BF(CLK, GEM_CLK_DIV96);
812
813 return config;
814}
815
816static u32 macb_mdc_clk_div(struct macb *bp)
817{
818 u32 config;
819 unsigned long pclk_hz;
820
821 if (macb_is_gem(bp))
822 return gem_mdc_clk_div(bp);
823
824 pclk_hz = clk_get_rate(bp->pclk);
825 if (pclk_hz <= 20000000)
826 config = MACB_BF(CLK, MACB_CLK_DIV8);
827 else if (pclk_hz <= 40000000)
828 config = MACB_BF(CLK, MACB_CLK_DIV16);
829 else if (pclk_hz <= 80000000)
830 config = MACB_BF(CLK, MACB_CLK_DIV32);
831 else
832 config = MACB_BF(CLK, MACB_CLK_DIV64);
833
834 return config;
835}
836
837/*
838 * Get the DMA bus width field of the network configuration register that we
839 * should program. We find the width from decoding the design configuration
840 * register to find the maximum supported data bus width.
841 */
842static u32 macb_dbw(struct macb *bp)
843{
844 if (!macb_is_gem(bp))
845 return 0;
846
847 switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) {
848 case 4:
849 return GEM_BF(DBW, GEM_DBW128);
850 case 2:
851 return GEM_BF(DBW, GEM_DBW64);
852 case 1:
853 default:
854 return GEM_BF(DBW, GEM_DBW32);
855 }
856}
857
858/*
859 * Configure the receive DMA engine to use the correct receive buffer size.
860 * This is a configurable parameter for GEM.
861 */
862static void macb_configure_dma(struct macb *bp)
863{
864 u32 dmacfg;
865
866 if (macb_is_gem(bp)) {
867 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
868 dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);
869 gem_writel(bp, DMACFG, dmacfg);
870 }
871}
872
800static void macb_init_hw(struct macb *bp) 873static void macb_init_hw(struct macb *bp)
801{ 874{
802 u32 config; 875 u32 config;
@@ -804,7 +877,7 @@ static void macb_init_hw(struct macb *bp)
804 macb_reset_hw(bp); 877 macb_reset_hw(bp);
805 __macb_set_hwaddr(bp); 878 __macb_set_hwaddr(bp);
806 879
807 config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L); 880 config = macb_mdc_clk_div(bp);
808 config |= MACB_BIT(PAE); /* PAuse Enable */ 881 config |= MACB_BIT(PAE); /* PAuse Enable */
809 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ 882 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
810 config |= MACB_BIT(BIG); /* Receive oversized frames */ 883 config |= MACB_BIT(BIG); /* Receive oversized frames */
@@ -812,8 +885,11 @@ static void macb_init_hw(struct macb *bp)
812 config |= MACB_BIT(CAF); /* Copy All Frames */ 885 config |= MACB_BIT(CAF); /* Copy All Frames */
813 if (!(bp->dev->flags & IFF_BROADCAST)) 886 if (!(bp->dev->flags & IFF_BROADCAST))
814 config |= MACB_BIT(NBC); /* No BroadCast */ 887 config |= MACB_BIT(NBC); /* No BroadCast */
888 config |= macb_dbw(bp);
815 macb_writel(bp, NCFGR, config); 889 macb_writel(bp, NCFGR, config);
816 890
891 macb_configure_dma(bp);
892
817 /* Initialize TX and RX buffers */ 893 /* Initialize TX and RX buffers */
818 macb_writel(bp, RBQP, bp->rx_ring_dma); 894 macb_writel(bp, RBQP, bp->rx_ring_dma);
819 macb_writel(bp, TBQP, bp->tx_ring_dma); 895 macb_writel(bp, TBQP, bp->tx_ring_dma);
@@ -909,8 +985,8 @@ static void macb_sethashtable(struct net_device *dev)
909 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); 985 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
910 } 986 }
911 987
912 macb_writel(bp, HRB, mc_filter[0]); 988 macb_or_gem_writel(bp, HRB, mc_filter[0]);
913 macb_writel(bp, HRT, mc_filter[1]); 989 macb_or_gem_writel(bp, HRT, mc_filter[1]);
914} 990}
915 991
916/* 992/*
@@ -932,8 +1008,8 @@ static void macb_set_rx_mode(struct net_device *dev)
932 1008
933 if (dev->flags & IFF_ALLMULTI) { 1009 if (dev->flags & IFF_ALLMULTI) {
934 /* Enable all multicast mode */ 1010 /* Enable all multicast mode */
935 macb_writel(bp, HRB, -1); 1011 macb_or_gem_writel(bp, HRB, -1);
936 macb_writel(bp, HRT, -1); 1012 macb_or_gem_writel(bp, HRT, -1);
937 cfg |= MACB_BIT(NCFGR_MTI); 1013 cfg |= MACB_BIT(NCFGR_MTI);
938 } else if (!netdev_mc_empty(dev)) { 1014 } else if (!netdev_mc_empty(dev)) {
939 /* Enable specific multicasts */ 1015 /* Enable specific multicasts */
@@ -941,8 +1017,8 @@ static void macb_set_rx_mode(struct net_device *dev)
941 cfg |= MACB_BIT(NCFGR_MTI); 1017 cfg |= MACB_BIT(NCFGR_MTI);
942 } else if (dev->flags & (~IFF_ALLMULTI)) { 1018 } else if (dev->flags & (~IFF_ALLMULTI)) {
943 /* Disable all multicast mode */ 1019 /* Disable all multicast mode */
944 macb_writel(bp, HRB, 0); 1020 macb_or_gem_writel(bp, HRB, 0);
945 macb_writel(bp, HRT, 0); 1021 macb_or_gem_writel(bp, HRT, 0);
946 cfg &= ~MACB_BIT(NCFGR_MTI); 1022 cfg &= ~MACB_BIT(NCFGR_MTI);
947 } 1023 }
948 1024
@@ -954,7 +1030,7 @@ static int macb_open(struct net_device *dev)
954 struct macb *bp = netdev_priv(dev); 1030 struct macb *bp = netdev_priv(dev);
955 int err; 1031 int err;
956 1032
957 dev_dbg(&bp->pdev->dev, "open\n"); 1033 netdev_dbg(bp->dev, "open\n");
958 1034
959 /* if the phy is not yet register, retry later*/ 1035 /* if the phy is not yet register, retry later*/
960 if (!bp->phy_dev) 1036 if (!bp->phy_dev)
@@ -965,9 +1041,8 @@ static int macb_open(struct net_device *dev)
965 1041
966 err = macb_alloc_consistent(bp); 1042 err = macb_alloc_consistent(bp);
967 if (err) { 1043 if (err) {
968 printk(KERN_ERR 1044 netdev_err(dev, "Unable to allocate DMA memory (error %d)\n",
969 "%s: Unable to allocate DMA memory (error %d)\n", 1045 err);
970 dev->name, err);
971 return err; 1046 return err;
972 } 1047 }
973 1048
@@ -1005,11 +1080,62 @@ static int macb_close(struct net_device *dev)
1005 return 0; 1080 return 0;
1006} 1081}
1007 1082
1083static void gem_update_stats(struct macb *bp)
1084{
1085 u32 __iomem *reg = bp->regs + GEM_OTX;
1086 u32 *p = &bp->hw_stats.gem.tx_octets_31_0;
1087 u32 *end = &bp->hw_stats.gem.rx_udp_checksum_errors + 1;
1088
1089 for (; p < end; p++, reg++)
1090 *p += __raw_readl(reg);
1091}
1092
1093static struct net_device_stats *gem_get_stats(struct macb *bp)
1094{
1095 struct gem_stats *hwstat = &bp->hw_stats.gem;
1096 struct net_device_stats *nstat = &bp->stats;
1097
1098 gem_update_stats(bp);
1099
1100 nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors +
1101 hwstat->rx_alignment_errors +
1102 hwstat->rx_resource_errors +
1103 hwstat->rx_overruns +
1104 hwstat->rx_oversize_frames +
1105 hwstat->rx_jabbers +
1106 hwstat->rx_undersized_frames +
1107 hwstat->rx_length_field_frame_errors);
1108 nstat->tx_errors = (hwstat->tx_late_collisions +
1109 hwstat->tx_excessive_collisions +
1110 hwstat->tx_underrun +
1111 hwstat->tx_carrier_sense_errors);
1112 nstat->multicast = hwstat->rx_multicast_frames;
1113 nstat->collisions = (hwstat->tx_single_collision_frames +
1114 hwstat->tx_multiple_collision_frames +
1115 hwstat->tx_excessive_collisions);
1116 nstat->rx_length_errors = (hwstat->rx_oversize_frames +
1117 hwstat->rx_jabbers +
1118 hwstat->rx_undersized_frames +
1119 hwstat->rx_length_field_frame_errors);
1120 nstat->rx_over_errors = hwstat->rx_resource_errors;
1121 nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors;
1122 nstat->rx_frame_errors = hwstat->rx_alignment_errors;
1123 nstat->rx_fifo_errors = hwstat->rx_overruns;
1124 nstat->tx_aborted_errors = hwstat->tx_excessive_collisions;
1125 nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors;
1126 nstat->tx_fifo_errors = hwstat->tx_underrun;
1127
1128 return nstat;
1129}
1130
1008static struct net_device_stats *macb_get_stats(struct net_device *dev) 1131static struct net_device_stats *macb_get_stats(struct net_device *dev)
1009{ 1132{
1010 struct macb *bp = netdev_priv(dev); 1133 struct macb *bp = netdev_priv(dev);
1011 struct net_device_stats *nstat = &bp->stats; 1134 struct net_device_stats *nstat = &bp->stats;
1012 struct macb_stats *hwstat = &bp->hw_stats; 1135 struct macb_stats *hwstat = &bp->hw_stats.macb;
1136
1137 if (macb_is_gem(bp))
1138 return gem_get_stats(bp);
1013 1139
1014 /* read stats from hardware */ 1140 /* read stats from hardware */
1015 macb_update_stats(bp); 1141 macb_update_stats(bp);
@@ -1117,14 +1243,59 @@ static const struct net_device_ops macb_netdev_ops = {
1117#endif 1243#endif
1118}; 1244};
1119 1245
1246#if defined(CONFIG_OF)
1247static const struct of_device_id macb_dt_ids[] = {
1248 { .compatible = "cdns,at32ap7000-macb" },
1249 { .compatible = "cdns,at91sam9260-macb" },
1250 { .compatible = "cdns,macb" },
1251 { .compatible = "cdns,pc302-gem" },
1252 { .compatible = "cdns,gem" },
1253 { /* sentinel */ }
1254};
1255
1256MODULE_DEVICE_TABLE(of, macb_dt_ids);
1257
1258static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1259{
1260 struct device_node *np = pdev->dev.of_node;
1261
1262 if (np)
1263 return of_get_phy_mode(np);
1264
1265 return -ENODEV;
1266}
1267
1268static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1269{
1270 struct device_node *np = bp->pdev->dev.of_node;
1271 if (np) {
1272 const char *mac = of_get_mac_address(np);
1273 if (mac) {
1274 memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
1275 return 0;
1276 }
1277 }
1278
1279 return -ENODEV;
1280}
1281#else
1282static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1283{
1284 return -ENODEV;
1285}
1286static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1287{
1288 return -ENODEV;
1289}
1290#endif
1291
1120static int __init macb_probe(struct platform_device *pdev) 1292static int __init macb_probe(struct platform_device *pdev)
1121{ 1293{
1122 struct eth_platform_data *pdata; 1294 struct macb_platform_data *pdata;
1123 struct resource *regs; 1295 struct resource *regs;
1124 struct net_device *dev; 1296 struct net_device *dev;
1125 struct macb *bp; 1297 struct macb *bp;
1126 struct phy_device *phydev; 1298 struct phy_device *phydev;
1127 unsigned long pclk_hz;
1128 u32 config; 1299 u32 config;
1129 int err = -ENXIO; 1300 int err = -ENXIO;
1130 1301
@@ -1152,28 +1323,19 @@ static int __init macb_probe(struct platform_device *pdev)
1152 1323
1153 spin_lock_init(&bp->lock); 1324 spin_lock_init(&bp->lock);
1154 1325
1155#if defined(CONFIG_ARCH_AT91) 1326 bp->pclk = clk_get(&pdev->dev, "pclk");
1156 bp->pclk = clk_get(&pdev->dev, "macb_clk");
1157 if (IS_ERR(bp->pclk)) { 1327 if (IS_ERR(bp->pclk)) {
1158 dev_err(&pdev->dev, "failed to get macb_clk\n"); 1328 dev_err(&pdev->dev, "failed to get macb_clk\n");
1159 goto err_out_free_dev; 1329 goto err_out_free_dev;
1160 } 1330 }
1161 clk_enable(bp->pclk); 1331 clk_enable(bp->pclk);
1162#else 1332
1163 bp->pclk = clk_get(&pdev->dev, "pclk");
1164 if (IS_ERR(bp->pclk)) {
1165 dev_err(&pdev->dev, "failed to get pclk\n");
1166 goto err_out_free_dev;
1167 }
1168 bp->hclk = clk_get(&pdev->dev, "hclk"); 1333 bp->hclk = clk_get(&pdev->dev, "hclk");
1169 if (IS_ERR(bp->hclk)) { 1334 if (IS_ERR(bp->hclk)) {
1170 dev_err(&pdev->dev, "failed to get hclk\n"); 1335 dev_err(&pdev->dev, "failed to get hclk\n");
1171 goto err_out_put_pclk; 1336 goto err_out_put_pclk;
1172 } 1337 }
1173
1174 clk_enable(bp->pclk);
1175 clk_enable(bp->hclk); 1338 clk_enable(bp->hclk);
1176#endif
1177 1339
1178 bp->regs = ioremap(regs->start, resource_size(regs)); 1340 bp->regs = ioremap(regs->start, resource_size(regs));
1179 if (!bp->regs) { 1341 if (!bp->regs) {
@@ -1185,9 +1347,8 @@ static int __init macb_probe(struct platform_device *pdev)
1185 dev->irq = platform_get_irq(pdev, 0); 1347 dev->irq = platform_get_irq(pdev, 0);
1186 err = request_irq(dev->irq, macb_interrupt, 0, dev->name, dev); 1348 err = request_irq(dev->irq, macb_interrupt, 0, dev->name, dev);
1187 if (err) { 1349 if (err) {
1188 printk(KERN_ERR 1350 dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n",
1189 "%s: Unable to request IRQ %d (error %d)\n", 1351 dev->irq, err);
1190 dev->name, dev->irq, err);
1191 goto err_out_iounmap; 1352 goto err_out_iounmap;
1192 } 1353 }
1193 1354
@@ -1198,31 +1359,37 @@ static int __init macb_probe(struct platform_device *pdev)
1198 dev->base_addr = regs->start; 1359 dev->base_addr = regs->start;
1199 1360
1200 /* Set MII management clock divider */ 1361 /* Set MII management clock divider */
1201 pclk_hz = clk_get_rate(bp->pclk); 1362 config = macb_mdc_clk_div(bp);
1202 if (pclk_hz <= 20000000) 1363 config |= macb_dbw(bp);
1203 config = MACB_BF(CLK, MACB_CLK_DIV8);
1204 else if (pclk_hz <= 40000000)
1205 config = MACB_BF(CLK, MACB_CLK_DIV16);
1206 else if (pclk_hz <= 80000000)
1207 config = MACB_BF(CLK, MACB_CLK_DIV32);
1208 else
1209 config = MACB_BF(CLK, MACB_CLK_DIV64);
1210 macb_writel(bp, NCFGR, config); 1364 macb_writel(bp, NCFGR, config);
1211 1365
1212 macb_get_hwaddr(bp); 1366 err = macb_get_hwaddr_dt(bp);
1213 pdata = pdev->dev.platform_data; 1367 if (err < 0)
1368 macb_get_hwaddr(bp);
1369
1370 err = macb_get_phy_mode_dt(pdev);
1371 if (err < 0) {
1372 pdata = pdev->dev.platform_data;
1373 if (pdata && pdata->is_rmii)
1374 bp->phy_interface = PHY_INTERFACE_MODE_RMII;
1375 else
1376 bp->phy_interface = PHY_INTERFACE_MODE_MII;
1377 } else {
1378 bp->phy_interface = err;
1379 }
1214 1380
1215 if (pdata && pdata->is_rmii) 1381 if (bp->phy_interface == PHY_INTERFACE_MODE_RMII)
1216#if defined(CONFIG_ARCH_AT91) 1382#if defined(CONFIG_ARCH_AT91)
1217 macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) ); 1383 macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) |
1384 MACB_BIT(CLKEN)));
1218#else 1385#else
1219 macb_writel(bp, USRIO, 0); 1386 macb_or_gem_writel(bp, USRIO, 0);
1220#endif 1387#endif
1221 else 1388 else
1222#if defined(CONFIG_ARCH_AT91) 1389#if defined(CONFIG_ARCH_AT91)
1223 macb_writel(bp, USRIO, MACB_BIT(CLKEN)); 1390 macb_or_gem_writel(bp, USRIO, MACB_BIT(CLKEN));
1224#else 1391#else
1225 macb_writel(bp, USRIO, MACB_BIT(MII)); 1392 macb_or_gem_writel(bp, USRIO, MACB_BIT(MII));
1226#endif 1393#endif
1227 1394
1228 bp->tx_pending = DEF_TX_RING_PENDING; 1395 bp->tx_pending = DEF_TX_RING_PENDING;
@@ -1239,13 +1406,13 @@ static int __init macb_probe(struct platform_device *pdev)
1239 1406
1240 platform_set_drvdata(pdev, dev); 1407 platform_set_drvdata(pdev, dev);
1241 1408
1242 printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d (%pM)\n", 1409 netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n",
1243 dev->name, dev->base_addr, dev->irq, dev->dev_addr); 1410 macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr,
1411 dev->irq, dev->dev_addr);
1244 1412
1245 phydev = bp->phy_dev; 1413 phydev = bp->phy_dev;
1246 printk(KERN_INFO "%s: attached PHY driver [%s] " 1414 netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1247 "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name, 1415 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1248 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1249 1416
1250 return 0; 1417 return 0;
1251 1418
@@ -1256,14 +1423,10 @@ err_out_free_irq:
1256err_out_iounmap: 1423err_out_iounmap:
1257 iounmap(bp->regs); 1424 iounmap(bp->regs);
1258err_out_disable_clocks: 1425err_out_disable_clocks:
1259#ifndef CONFIG_ARCH_AT91
1260 clk_disable(bp->hclk); 1426 clk_disable(bp->hclk);
1261 clk_put(bp->hclk); 1427 clk_put(bp->hclk);
1262#endif
1263 clk_disable(bp->pclk); 1428 clk_disable(bp->pclk);
1264#ifndef CONFIG_ARCH_AT91
1265err_out_put_pclk: 1429err_out_put_pclk:
1266#endif
1267 clk_put(bp->pclk); 1430 clk_put(bp->pclk);
1268err_out_free_dev: 1431err_out_free_dev:
1269 free_netdev(dev); 1432 free_netdev(dev);
@@ -1289,10 +1452,8 @@ static int __exit macb_remove(struct platform_device *pdev)
1289 unregister_netdev(dev); 1452 unregister_netdev(dev);
1290 free_irq(dev->irq, dev); 1453 free_irq(dev->irq, dev);
1291 iounmap(bp->regs); 1454 iounmap(bp->regs);
1292#ifndef CONFIG_ARCH_AT91
1293 clk_disable(bp->hclk); 1455 clk_disable(bp->hclk);
1294 clk_put(bp->hclk); 1456 clk_put(bp->hclk);
1295#endif
1296 clk_disable(bp->pclk); 1457 clk_disable(bp->pclk);
1297 clk_put(bp->pclk); 1458 clk_put(bp->pclk);
1298 free_netdev(dev); 1459 free_netdev(dev);
@@ -1310,9 +1471,7 @@ static int macb_suspend(struct platform_device *pdev, pm_message_t state)
1310 1471
1311 netif_device_detach(netdev); 1472 netif_device_detach(netdev);
1312 1473
1313#ifndef CONFIG_ARCH_AT91
1314 clk_disable(bp->hclk); 1474 clk_disable(bp->hclk);
1315#endif
1316 clk_disable(bp->pclk); 1475 clk_disable(bp->pclk);
1317 1476
1318 return 0; 1477 return 0;
@@ -1324,9 +1483,7 @@ static int macb_resume(struct platform_device *pdev)
1324 struct macb *bp = netdev_priv(netdev); 1483 struct macb *bp = netdev_priv(netdev);
1325 1484
1326 clk_enable(bp->pclk); 1485 clk_enable(bp->pclk);
1327#ifndef CONFIG_ARCH_AT91
1328 clk_enable(bp->hclk); 1486 clk_enable(bp->hclk);
1329#endif
1330 1487
1331 netif_device_attach(netdev); 1488 netif_device_attach(netdev);
1332 1489
@@ -1344,6 +1501,7 @@ static struct platform_driver macb_driver = {
1344 .driver = { 1501 .driver = {
1345 .name = "macb", 1502 .name = "macb",
1346 .owner = THIS_MODULE, 1503 .owner = THIS_MODULE,
1504 .of_match_table = of_match_ptr(macb_dt_ids),
1347 }, 1505 },
1348}; 1506};
1349 1507
@@ -1361,6 +1519,6 @@ module_init(macb_init);
1361module_exit(macb_exit); 1519module_exit(macb_exit);
1362 1520
1363MODULE_LICENSE("GPL"); 1521MODULE_LICENSE("GPL");
1364MODULE_DESCRIPTION("Atmel MACB Ethernet driver"); 1522MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver");
1365MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 1523MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1366MODULE_ALIAS("platform:macb"); 1524MODULE_ALIAS("platform:macb");
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index d3212f6db703..335e288f5314 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -59,6 +59,24 @@
59#define MACB_TPQ 0x00bc 59#define MACB_TPQ 0x00bc
60#define MACB_USRIO 0x00c0 60#define MACB_USRIO 0x00c0
61#define MACB_WOL 0x00c4 61#define MACB_WOL 0x00c4
62#define MACB_MID 0x00fc
63
64/* GEM register offsets. */
65#define GEM_NCFGR 0x0004
66#define GEM_USRIO 0x000c
67#define GEM_DMACFG 0x0010
68#define GEM_HRB 0x0080
69#define GEM_HRT 0x0084
70#define GEM_SA1B 0x0088
71#define GEM_SA1T 0x008C
72#define GEM_OTX 0x0100
73#define GEM_DCFG1 0x0280
74#define GEM_DCFG2 0x0284
75#define GEM_DCFG3 0x0288
76#define GEM_DCFG4 0x028c
77#define GEM_DCFG5 0x0290
78#define GEM_DCFG6 0x0294
79#define GEM_DCFG7 0x0298
62 80
63/* Bitfields in NCR */ 81/* Bitfields in NCR */
64#define MACB_LB_OFFSET 0 82#define MACB_LB_OFFSET 0
@@ -126,6 +144,21 @@
126#define MACB_IRXFCS_OFFSET 19 144#define MACB_IRXFCS_OFFSET 19
127#define MACB_IRXFCS_SIZE 1 145#define MACB_IRXFCS_SIZE 1
128 146
147/* GEM specific NCFGR bitfields. */
148#define GEM_CLK_OFFSET 18
149#define GEM_CLK_SIZE 3
150#define GEM_DBW_OFFSET 21
151#define GEM_DBW_SIZE 2
152
153/* Constants for data bus width. */
154#define GEM_DBW32 0
155#define GEM_DBW64 1
156#define GEM_DBW128 2
157
158/* Bitfields in DMACFG. */
159#define GEM_RXBS_OFFSET 16
160#define GEM_RXBS_SIZE 8
161
129/* Bitfields in NSR */ 162/* Bitfields in NSR */
130#define MACB_NSR_LINK_OFFSET 0 163#define MACB_NSR_LINK_OFFSET 0
131#define MACB_NSR_LINK_SIZE 1 164#define MACB_NSR_LINK_SIZE 1
@@ -228,12 +261,30 @@
228#define MACB_WOL_MTI_OFFSET 19 261#define MACB_WOL_MTI_OFFSET 19
229#define MACB_WOL_MTI_SIZE 1 262#define MACB_WOL_MTI_SIZE 1
230 263
264/* Bitfields in MID */
265#define MACB_IDNUM_OFFSET 16
266#define MACB_IDNUM_SIZE 16
267#define MACB_REV_OFFSET 0
268#define MACB_REV_SIZE 16
269
270/* Bitfields in DCFG1. */
271#define GEM_DBWDEF_OFFSET 25
272#define GEM_DBWDEF_SIZE 3
273
231/* Constants for CLK */ 274/* Constants for CLK */
232#define MACB_CLK_DIV8 0 275#define MACB_CLK_DIV8 0
233#define MACB_CLK_DIV16 1 276#define MACB_CLK_DIV16 1
234#define MACB_CLK_DIV32 2 277#define MACB_CLK_DIV32 2
235#define MACB_CLK_DIV64 3 278#define MACB_CLK_DIV64 3
236 279
280/* GEM specific constants for CLK. */
281#define GEM_CLK_DIV8 0
282#define GEM_CLK_DIV16 1
283#define GEM_CLK_DIV32 2
284#define GEM_CLK_DIV48 3
285#define GEM_CLK_DIV64 4
286#define GEM_CLK_DIV96 5
287
237/* Constants for MAN register */ 288/* Constants for MAN register */
238#define MACB_MAN_SOF 1 289#define MACB_MAN_SOF 1
239#define MACB_MAN_WRITE 1 290#define MACB_MAN_WRITE 1
@@ -254,11 +305,52 @@
254 << MACB_##name##_OFFSET)) \ 305 << MACB_##name##_OFFSET)) \
255 | MACB_BF(name,value)) 306 | MACB_BF(name,value))
256 307
308#define GEM_BIT(name) \
309 (1 << GEM_##name##_OFFSET)
310#define GEM_BF(name, value) \
311 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
312 << GEM_##name##_OFFSET)
313#define GEM_BFEXT(name, value)\
314 (((value) >> GEM_##name##_OFFSET) \
315 & ((1 << GEM_##name##_SIZE) - 1))
316#define GEM_BFINS(name, value, old) \
317 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
318 << GEM_##name##_OFFSET)) \
319 | GEM_BF(name, value))
320
257/* Register access macros */ 321/* Register access macros */
258#define macb_readl(port,reg) \ 322#define macb_readl(port,reg) \
259 __raw_readl((port)->regs + MACB_##reg) 323 __raw_readl((port)->regs + MACB_##reg)
260#define macb_writel(port,reg,value) \ 324#define macb_writel(port,reg,value) \
261 __raw_writel((value), (port)->regs + MACB_##reg) 325 __raw_writel((value), (port)->regs + MACB_##reg)
326#define gem_readl(port, reg) \
327 __raw_readl((port)->regs + GEM_##reg)
328#define gem_writel(port, reg, value) \
329 __raw_writel((value), (port)->regs + GEM_##reg)
330
331/*
332 * Conditional GEM/MACB macros. These perform the operation to the correct
333 * register dependent on whether the device is a GEM or a MACB. For registers
334 * and bitfields that are common across both devices, use macb_{read,write}l
335 * to avoid the cost of the conditional.
336 */
337#define macb_or_gem_writel(__bp, __reg, __value) \
338 ({ \
339 if (macb_is_gem((__bp))) \
340 gem_writel((__bp), __reg, __value); \
341 else \
342 macb_writel((__bp), __reg, __value); \
343 })
344
345#define macb_or_gem_readl(__bp, __reg) \
346 ({ \
347 u32 __v; \
348 if (macb_is_gem((__bp))) \
349 __v = gem_readl((__bp), __reg); \
350 else \
351 __v = macb_readl((__bp), __reg); \
352 __v; \
353 })
262 354
263struct dma_desc { 355struct dma_desc {
264 u32 addr; 356 u32 addr;
@@ -358,6 +450,54 @@ struct macb_stats {
358 u32 tx_pause_frames; 450 u32 tx_pause_frames;
359}; 451};
360 452
453struct gem_stats {
454 u32 tx_octets_31_0;
455 u32 tx_octets_47_32;
456 u32 tx_frames;
457 u32 tx_broadcast_frames;
458 u32 tx_multicast_frames;
459 u32 tx_pause_frames;
460 u32 tx_64_byte_frames;
461 u32 tx_65_127_byte_frames;
462 u32 tx_128_255_byte_frames;
463 u32 tx_256_511_byte_frames;
464 u32 tx_512_1023_byte_frames;
465 u32 tx_1024_1518_byte_frames;
466 u32 tx_greater_than_1518_byte_frames;
467 u32 tx_underrun;
468 u32 tx_single_collision_frames;
469 u32 tx_multiple_collision_frames;
470 u32 tx_excessive_collisions;
471 u32 tx_late_collisions;
472 u32 tx_deferred_frames;
473 u32 tx_carrier_sense_errors;
474 u32 rx_octets_31_0;
475 u32 rx_octets_47_32;
476 u32 rx_frames;
477 u32 rx_broadcast_frames;
478 u32 rx_multicast_frames;
479 u32 rx_pause_frames;
480 u32 rx_64_byte_frames;
481 u32 rx_65_127_byte_frames;
482 u32 rx_128_255_byte_frames;
483 u32 rx_256_511_byte_frames;
484 u32 rx_512_1023_byte_frames;
485 u32 rx_1024_1518_byte_frames;
486 u32 rx_greater_than_1518_byte_frames;
487 u32 rx_undersized_frames;
488 u32 rx_oversize_frames;
489 u32 rx_jabbers;
490 u32 rx_frame_check_sequence_errors;
491 u32 rx_length_field_frame_errors;
492 u32 rx_symbol_errors;
493 u32 rx_alignment_errors;
494 u32 rx_resource_errors;
495 u32 rx_overruns;
496 u32 rx_ip_header_checksum_errors;
497 u32 rx_tcp_checksum_errors;
498 u32 rx_udp_checksum_errors;
499};
500
361struct macb { 501struct macb {
362 void __iomem *regs; 502 void __iomem *regs;
363 503
@@ -376,7 +516,10 @@ struct macb {
376 struct net_device *dev; 516 struct net_device *dev;
377 struct napi_struct napi; 517 struct napi_struct napi;
378 struct net_device_stats stats; 518 struct net_device_stats stats;
379 struct macb_stats hw_stats; 519 union {
520 struct macb_stats macb;
521 struct gem_stats gem;
522 } hw_stats;
380 523
381 dma_addr_t rx_ring_dma; 524 dma_addr_t rx_ring_dma;
382 dma_addr_t tx_ring_dma; 525 dma_addr_t tx_ring_dma;
@@ -389,6 +532,13 @@ struct macb {
389 unsigned int link; 532 unsigned int link;
390 unsigned int speed; 533 unsigned int speed;
391 unsigned int duplex; 534 unsigned int duplex;
535
536 phy_interface_t phy_interface;
392}; 537};
393 538
539static inline bool macb_is_gem(struct macb *bp)
540{
541 return MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2;
542}
543
394#endif /* _MACB_H */ 544#endif /* _MACB_H */
diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c
index 6c46753aeb43..a6bcdb5cd2be 100644
--- a/drivers/net/ethernet/emulex/benet/be_main.c
+++ b/drivers/net/ethernet/emulex/benet/be_main.c
@@ -3080,7 +3080,7 @@ fw_exit:
3080 return status; 3080 return status;
3081} 3081}
3082 3082
3083static struct net_device_ops be_netdev_ops = { 3083static const struct net_device_ops be_netdev_ops = {
3084 .ndo_open = be_open, 3084 .ndo_open = be_open,
3085 .ndo_stop = be_close, 3085 .ndo_stop = be_close,
3086 .ndo_start_xmit = be_xmit, 3086 .ndo_start_xmit = be_xmit,
diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c
index 20c2e3f3e18a..ddcbbb34d1b9 100644
--- a/drivers/net/ethernet/freescale/fec.c
+++ b/drivers/net/ethernet/freescale/fec.c
@@ -1610,7 +1610,7 @@ fec_probe(struct platform_device *pdev)
1610 ret = PTR_ERR(fep->clk); 1610 ret = PTR_ERR(fep->clk);
1611 goto failed_clk; 1611 goto failed_clk;
1612 } 1612 }
1613 clk_enable(fep->clk); 1613 clk_prepare_enable(fep->clk);
1614 1614
1615 ret = fec_enet_init(ndev); 1615 ret = fec_enet_init(ndev);
1616 if (ret) 1616 if (ret)
@@ -1633,7 +1633,7 @@ failed_register:
1633 fec_enet_mii_remove(fep); 1633 fec_enet_mii_remove(fep);
1634failed_mii_init: 1634failed_mii_init:
1635failed_init: 1635failed_init:
1636 clk_disable(fep->clk); 1636 clk_disable_unprepare(fep->clk);
1637 clk_put(fep->clk); 1637 clk_put(fep->clk);
1638failed_clk: 1638failed_clk:
1639 for (i = 0; i < FEC_IRQ_NUM; i++) { 1639 for (i = 0; i < FEC_IRQ_NUM; i++) {
@@ -1666,7 +1666,7 @@ fec_drv_remove(struct platform_device *pdev)
1666 if (irq > 0) 1666 if (irq > 0)
1667 free_irq(irq, ndev); 1667 free_irq(irq, ndev);
1668 } 1668 }
1669 clk_disable(fep->clk); 1669 clk_disable_unprepare(fep->clk);
1670 clk_put(fep->clk); 1670 clk_put(fep->clk);
1671 iounmap(fep->hwp); 1671 iounmap(fep->hwp);
1672 free_netdev(ndev); 1672 free_netdev(ndev);
@@ -1691,7 +1691,7 @@ fec_suspend(struct device *dev)
1691 fec_stop(ndev); 1691 fec_stop(ndev);
1692 netif_device_detach(ndev); 1692 netif_device_detach(ndev);
1693 } 1693 }
1694 clk_disable(fep->clk); 1694 clk_disable_unprepare(fep->clk);
1695 1695
1696 return 0; 1696 return 0;
1697} 1697}
@@ -1702,7 +1702,7 @@ fec_resume(struct device *dev)
1702 struct net_device *ndev = dev_get_drvdata(dev); 1702 struct net_device *ndev = dev_get_drvdata(dev);
1703 struct fec_enet_private *fep = netdev_priv(ndev); 1703 struct fec_enet_private *fep = netdev_priv(ndev);
1704 1704
1705 clk_enable(fep->clk); 1705 clk_prepare_enable(fep->clk);
1706 if (netif_running(ndev)) { 1706 if (netif_running(ndev)) {
1707 fec_restart(ndev, fep->full_duplex); 1707 fec_restart(ndev, fep->full_duplex);
1708 netif_device_attach(ndev); 1708 netif_device_attach(ndev);
diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
index e87847e32ddb..80aab4e5d695 100644
--- a/drivers/net/ethernet/marvell/mv643xx_eth.c
+++ b/drivers/net/ethernet/marvell/mv643xx_eth.c
@@ -2511,7 +2511,7 @@ static void mv643xx_eth_netpoll(struct net_device *dev)
2511/* platform glue ************************************************************/ 2511/* platform glue ************************************************************/
2512static void 2512static void
2513mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp, 2513mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp,
2514 struct mbus_dram_target_info *dram) 2514 const struct mbus_dram_target_info *dram)
2515{ 2515{
2516 void __iomem *base = msp->base; 2516 void __iomem *base = msp->base;
2517 u32 win_enable; 2517 u32 win_enable;
@@ -2529,7 +2529,7 @@ mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp,
2529 win_protect = 0; 2529 win_protect = 0;
2530 2530
2531 for (i = 0; i < dram->num_cs; i++) { 2531 for (i = 0; i < dram->num_cs; i++) {
2532 struct mbus_dram_window *cs = dram->cs + i; 2532 const struct mbus_dram_window *cs = dram->cs + i;
2533 2533
2534 writel((cs->base & 0xffff0000) | 2534 writel((cs->base & 0xffff0000) |
2535 (cs->mbus_attr << 8) | 2535 (cs->mbus_attr << 8) |
@@ -2579,6 +2579,7 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev)
2579 static int mv643xx_eth_version_printed; 2579 static int mv643xx_eth_version_printed;
2580 struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data; 2580 struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
2581 struct mv643xx_eth_shared_private *msp; 2581 struct mv643xx_eth_shared_private *msp;
2582 const struct mbus_dram_target_info *dram;
2582 struct resource *res; 2583 struct resource *res;
2583 int ret; 2584 int ret;
2584 2585
@@ -2643,8 +2644,9 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev)
2643 /* 2644 /*
2644 * (Re-)program MBUS remapping windows if we are asked to. 2645 * (Re-)program MBUS remapping windows if we are asked to.
2645 */ 2646 */
2646 if (pd != NULL && pd->dram != NULL) 2647 dram = mv_mbus_dram_info();
2647 mv643xx_eth_conf_mbus_windows(msp, pd->dram); 2648 if (dram)
2649 mv643xx_eth_conf_mbus_windows(msp, dram);
2648 2650
2649 /* 2651 /*
2650 * Detect hardware parameters. 2652 * Detect hardware parameters.
diff --git a/drivers/net/ethernet/rdc/r6040.c b/drivers/net/ethernet/rdc/r6040.c
index 87aa43935070..cb0eca807852 100644
--- a/drivers/net/ethernet/rdc/r6040.c
+++ b/drivers/net/ethernet/rdc/r6040.c
@@ -1160,7 +1160,7 @@ static int __devinit r6040_init_one(struct pci_dev *pdev,
1160 lp->dev = dev; 1160 lp->dev = dev;
1161 1161
1162 /* Init RDC private data */ 1162 /* Init RDC private data */
1163 lp->mcr0 = MCR0_XMTEN | MCR0; 1163 lp->mcr0 = MCR0_XMTEN | MCR0_RCVEN;
1164 1164
1165 /* The RDC-specific entries in the device structure. */ 1165 /* The RDC-specific entries in the device structure. */
1166 dev->netdev_ops = &r6040_netdev_ops; 1166 dev->netdev_ops = &r6040_netdev_ops;
diff --git a/drivers/net/ethernet/realtek/8139cp.c b/drivers/net/ethernet/realtek/8139cp.c
index cc6b391479ca..abc79076f867 100644
--- a/drivers/net/ethernet/realtek/8139cp.c
+++ b/drivers/net/ethernet/realtek/8139cp.c
@@ -563,6 +563,7 @@ rx_next:
563 if (cpr16(IntrStatus) & cp_rx_intr_mask) 563 if (cpr16(IntrStatus) & cp_rx_intr_mask)
564 goto rx_status_loop; 564 goto rx_status_loop;
565 565
566 napi_gro_flush(napi);
566 spin_lock_irqsave(&cp->lock, flags); 567 spin_lock_irqsave(&cp->lock, flags);
567 __napi_complete(napi); 568 __napi_complete(napi);
568 cpw16_f(IntrMask, cp_intr_mask); 569 cpw16_f(IntrMask, cp_intr_mask);
diff --git a/drivers/net/ethernet/smsc/smsc911x.h b/drivers/net/ethernet/smsc/smsc911x.h
index 938ecf290813..9ad5e5d39a03 100644
--- a/drivers/net/ethernet/smsc/smsc911x.h
+++ b/drivers/net/ethernet/smsc/smsc911x.h
@@ -401,8 +401,6 @@
401#include <asm/smsc911x.h> 401#include <asm/smsc911x.h>
402#endif 402#endif
403 403
404#ifdef CONFIG_SMSC_PHY
405#include <linux/smscphy.h> 404#include <linux/smscphy.h>
406#endif
407 405
408#endif /* __SMSC911X_H__ */ 406#endif /* __SMSC911X_H__ */
diff --git a/drivers/net/ethernet/tile/tilepro.c b/drivers/net/ethernet/tile/tilepro.c
index 6b75063988ec..d9951afb9269 100644
--- a/drivers/net/ethernet/tile/tilepro.c
+++ b/drivers/net/ethernet/tile/tilepro.c
@@ -2260,8 +2260,7 @@ static int tile_net_get_mac(struct net_device *dev)
2260 return 0; 2260 return 0;
2261} 2261}
2262 2262
2263 2263static const struct net_device_ops tile_net_ops = {
2264static struct net_device_ops tile_net_ops = {
2265 .ndo_open = tile_net_open, 2264 .ndo_open = tile_net_open,
2266 .ndo_stop = tile_net_stop, 2265 .ndo_stop = tile_net_stop,
2267 .ndo_start_xmit = tile_net_tx, 2266 .ndo_start_xmit = tile_net_tx,
diff --git a/drivers/net/hyperv/Kconfig b/drivers/net/hyperv/Kconfig
new file mode 100644
index 000000000000..936968d23559
--- /dev/null
+++ b/drivers/net/hyperv/Kconfig
@@ -0,0 +1,5 @@
1config HYPERV_NET
2 tristate "Microsoft Hyper-V virtual network driver"
3 depends on HYPERV
4 help
5 Select this option to enable the Hyper-V virtual network driver.
diff --git a/drivers/net/hyperv/Makefile b/drivers/net/hyperv/Makefile
new file mode 100644
index 000000000000..c8a66827100c
--- /dev/null
+++ b/drivers/net/hyperv/Makefile
@@ -0,0 +1,3 @@
1obj-$(CONFIG_HYPERV_NET) += hv_netvsc.o
2
3hv_netvsc-y := netvsc_drv.o netvsc.o rndis_filter.o
diff --git a/drivers/staging/hv/hyperv_net.h b/drivers/net/hyperv/hyperv_net.h
index ac1ec8405124..dec5836ae075 100644
--- a/drivers/staging/hv/hyperv_net.h
+++ b/drivers/net/hyperv/hyperv_net.h
@@ -39,9 +39,6 @@ struct xferpage_packet {
39 u32 count; 39 u32 count;
40}; 40};
41 41
42/* The number of pages which are enough to cover jumbo frame buffer. */
43#define NETVSC_PACKET_MAXPAGE 4
44
45/* 42/*
46 * Represent netvsc packet which contains 1 RNDIS and 1 ethernet frame 43 * Represent netvsc packet which contains 1 RNDIS and 1 ethernet frame
47 * within the RNDIS 44 * within the RNDIS
@@ -77,8 +74,9 @@ struct hv_netvsc_packet {
77 74
78 u32 total_data_buflen; 75 u32 total_data_buflen;
79 /* Points to the send/receive buffer where the ethernet frame is */ 76 /* Points to the send/receive buffer where the ethernet frame is */
77 void *data;
80 u32 page_buf_cnt; 78 u32 page_buf_cnt;
81 struct hv_page_buffer page_buf[NETVSC_PACKET_MAXPAGE]; 79 struct hv_page_buffer page_buf[0];
82}; 80};
83 81
84struct netvsc_device_info { 82struct netvsc_device_info {
@@ -87,6 +85,27 @@ struct netvsc_device_info {
87 int ring_size; 85 int ring_size;
88}; 86};
89 87
88enum rndis_device_state {
89 RNDIS_DEV_UNINITIALIZED = 0,
90 RNDIS_DEV_INITIALIZING,
91 RNDIS_DEV_INITIALIZED,
92 RNDIS_DEV_DATAINITIALIZED,
93};
94
95struct rndis_device {
96 struct netvsc_device *net_dev;
97
98 enum rndis_device_state state;
99 bool link_state;
100 atomic_t new_req_id;
101
102 spinlock_t request_lock;
103 struct list_head req_list;
104
105 unsigned char hw_mac_adr[ETH_ALEN];
106};
107
108
90/* Interface */ 109/* Interface */
91int netvsc_device_add(struct hv_device *device, void *additional_info); 110int netvsc_device_add(struct hv_device *device, void *additional_info);
92int netvsc_device_remove(struct hv_device *device); 111int netvsc_device_remove(struct hv_device *device);
@@ -109,11 +128,13 @@ int rndis_filter_receive(struct hv_device *dev,
109int rndis_filter_send(struct hv_device *dev, 128int rndis_filter_send(struct hv_device *dev,
110 struct hv_netvsc_packet *pkt); 129 struct hv_netvsc_packet *pkt);
111 130
131int rndis_filter_set_packet_filter(struct rndis_device *dev, u32 new_filter);
132
133
112#define NVSP_INVALID_PROTOCOL_VERSION ((u32)0xFFFFFFFF) 134#define NVSP_INVALID_PROTOCOL_VERSION ((u32)0xFFFFFFFF)
113 135
114#define NVSP_PROTOCOL_VERSION_1 2 136#define NVSP_PROTOCOL_VERSION_1 2
115#define NVSP_MIN_PROTOCOL_VERSION NVSP_PROTOCOL_VERSION_1 137#define NVSP_PROTOCOL_VERSION_2 0x30002
116#define NVSP_MAX_PROTOCOL_VERSION NVSP_PROTOCOL_VERSION_1
117 138
118enum { 139enum {
119 NVSP_MSG_TYPE_NONE = 0, 140 NVSP_MSG_TYPE_NONE = 0,
@@ -138,11 +159,36 @@ enum {
138 NVSP_MSG1_TYPE_SEND_RNDIS_PKT, 159 NVSP_MSG1_TYPE_SEND_RNDIS_PKT,
139 NVSP_MSG1_TYPE_SEND_RNDIS_PKT_COMPLETE, 160 NVSP_MSG1_TYPE_SEND_RNDIS_PKT_COMPLETE,
140 161
141 /* 162 /* Version 2 messages */
142 * This should be set to the number of messages for the version with 163 NVSP_MSG2_TYPE_SEND_CHIMNEY_DELEGATED_BUF,
143 * the maximum number of messages. 164 NVSP_MSG2_TYPE_SEND_CHIMNEY_DELEGATED_BUF_COMP,
144 */ 165 NVSP_MSG2_TYPE_REVOKE_CHIMNEY_DELEGATED_BUF,
145 NVSP_NUM_MSG_PER_VERSION = 9, 166
167 NVSP_MSG2_TYPE_RESUME_CHIMNEY_RX_INDICATION,
168
169 NVSP_MSG2_TYPE_TERMINATE_CHIMNEY,
170 NVSP_MSG2_TYPE_TERMINATE_CHIMNEY_COMP,
171
172 NVSP_MSG2_TYPE_INDICATE_CHIMNEY_EVENT,
173
174 NVSP_MSG2_TYPE_SEND_CHIMNEY_PKT,
175 NVSP_MSG2_TYPE_SEND_CHIMNEY_PKT_COMP,
176
177 NVSP_MSG2_TYPE_POST_CHIMNEY_RECV_REQ,
178 NVSP_MSG2_TYPE_POST_CHIMNEY_RECV_REQ_COMP,
179
180 NVSP_MSG2_TYPE_ALLOC_RXBUF,
181 NVSP_MSG2_TYPE_ALLOC_RXBUF_COMP,
182
183 NVSP_MSG2_TYPE_FREE_RXBUF,
184
185 NVSP_MSG2_TYPE_SEND_VMQ_RNDIS_PKT,
186 NVSP_MSG2_TYPE_SEND_VMQ_RNDIS_PKT_COMP,
187
188 NVSP_MSG2_TYPE_SEND_NDIS_CONFIG,
189
190 NVSP_MSG2_TYPE_ALLOC_CHIMNEY_HANDLE,
191 NVSP_MSG2_TYPE_ALLOC_CHIMNEY_HANDLE_COMP,
146}; 192};
147 193
148enum { 194enum {
@@ -153,6 +199,7 @@ enum {
153 NVSP_STAT_PROTOCOL_TOO_OLD, 199 NVSP_STAT_PROTOCOL_TOO_OLD,
154 NVSP_STAT_INVALID_RNDIS_PKT, 200 NVSP_STAT_INVALID_RNDIS_PKT,
155 NVSP_STAT_BUSY, 201 NVSP_STAT_BUSY,
202 NVSP_STAT_PROTOCOL_UNSUPPORTED,
156 NVSP_STAT_MAX, 203 NVSP_STAT_MAX,
157}; 204};
158 205
@@ -337,9 +384,69 @@ union nvsp_1_message_uber {
337 send_rndis_pkt_complete; 384 send_rndis_pkt_complete;
338} __packed; 385} __packed;
339 386
387
388/*
389 * Network VSP protocol version 2 messages:
390 */
391struct nvsp_2_vsc_capability {
392 union {
393 u64 data;
394 struct {
395 u64 vmq:1;
396 u64 chimney:1;
397 u64 sriov:1;
398 u64 ieee8021q:1;
399 u64 correlation_id:1;
400 };
401 };
402} __packed;
403
404struct nvsp_2_send_ndis_config {
405 u32 mtu;
406 u32 reserved;
407 struct nvsp_2_vsc_capability capability;
408} __packed;
409
410/* Allocate receive buffer */
411struct nvsp_2_alloc_rxbuf {
412 /* Allocation ID to match the allocation request and response */
413 u32 alloc_id;
414
415 /* Length of the VM shared memory receive buffer that needs to
416 * be allocated
417 */
418 u32 len;
419} __packed;
420
421/* Allocate receive buffer complete */
422struct nvsp_2_alloc_rxbuf_comp {
423 /* The NDIS_STATUS code for buffer allocation */
424 u32 status;
425
426 u32 alloc_id;
427
428 /* GPADL handle for the allocated receive buffer */
429 u32 gpadl_handle;
430
431 /* Receive buffer ID */
432 u64 recv_buf_id;
433} __packed;
434
435struct nvsp_2_free_rxbuf {
436 u64 recv_buf_id;
437} __packed;
438
439union nvsp_2_message_uber {
440 struct nvsp_2_send_ndis_config send_ndis_config;
441 struct nvsp_2_alloc_rxbuf alloc_rxbuf;
442 struct nvsp_2_alloc_rxbuf_comp alloc_rxbuf_comp;
443 struct nvsp_2_free_rxbuf free_rxbuf;
444} __packed;
445
340union nvsp_all_messages { 446union nvsp_all_messages {
341 union nvsp_message_init_uber init_msg; 447 union nvsp_message_init_uber init_msg;
342 union nvsp_1_message_uber v1_msg; 448 union nvsp_1_message_uber v1_msg;
449 union nvsp_2_message_uber v2_msg;
343} __packed; 450} __packed;
344 451
345/* ALL Messages */ 452/* ALL Messages */
@@ -349,12 +456,9 @@ struct nvsp_message {
349} __packed; 456} __packed;
350 457
351 458
459#define NETVSC_MTU 65536
352 460
353 461#define NETVSC_RECEIVE_BUFFER_SIZE (1024*1024*2) /* 2MB */
354/* #define NVSC_MIN_PROTOCOL_VERSION 1 */
355/* #define NVSC_MAX_PROTOCOL_VERSION 1 */
356
357#define NETVSC_RECEIVE_BUFFER_SIZE (1024*1024) /* 1MB */
358 462
359#define NETVSC_RECEIVE_BUFFER_ID 0xcafe 463#define NETVSC_RECEIVE_BUFFER_ID 0xcafe
360 464
@@ -369,7 +473,10 @@ struct nvsp_message {
369struct netvsc_device { 473struct netvsc_device {
370 struct hv_device *dev; 474 struct hv_device *dev;
371 475
476 u32 nvsp_version;
477
372 atomic_t num_outstanding_sends; 478 atomic_t num_outstanding_sends;
479 bool start_remove;
373 bool destroy; 480 bool destroy;
374 /* 481 /*
375 * List of free preallocated hv_netvsc_packet to represent receive 482 * List of free preallocated hv_netvsc_packet to represent receive
diff --git a/drivers/staging/hv/netvsc.c b/drivers/net/hyperv/netvsc.c
index b902579c7fe6..8965b45ce5a5 100644
--- a/drivers/staging/hv/netvsc.c
+++ b/drivers/net/hyperv/netvsc.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <linux/netdevice.h> 30#include <linux/netdevice.h>
31#include <linux/if_ether.h>
31 32
32#include "hyperv_net.h" 33#include "hyperv_net.h"
33 34
@@ -41,7 +42,7 @@ static struct netvsc_device *alloc_net_device(struct hv_device *device)
41 if (!net_device) 42 if (!net_device)
42 return NULL; 43 return NULL;
43 44
44 45 net_device->start_remove = false;
45 net_device->destroy = false; 46 net_device->destroy = false;
46 net_device->dev = device; 47 net_device->dev = device;
47 net_device->ndev = ndev; 48 net_device->ndev = ndev;
@@ -230,19 +231,16 @@ static int netvsc_init_recv_buf(struct hv_device *device)
230 net_device->recv_section_cnt = init_packet->msg. 231 net_device->recv_section_cnt = init_packet->msg.
231 v1_msg.send_recv_buf_complete.num_sections; 232 v1_msg.send_recv_buf_complete.num_sections;
232 233
233 net_device->recv_section = kmalloc(net_device->recv_section_cnt 234 net_device->recv_section = kmemdup(
234 * sizeof(struct nvsp_1_receive_buffer_section), GFP_KERNEL); 235 init_packet->msg.v1_msg.send_recv_buf_complete.sections,
236 net_device->recv_section_cnt *
237 sizeof(struct nvsp_1_receive_buffer_section),
238 GFP_KERNEL);
235 if (net_device->recv_section == NULL) { 239 if (net_device->recv_section == NULL) {
236 ret = -EINVAL; 240 ret = -EINVAL;
237 goto cleanup; 241 goto cleanup;
238 } 242 }
239 243
240 memcpy(net_device->recv_section,
241 init_packet->msg.v1_msg.
242 send_recv_buf_complete.sections,
243 net_device->recv_section_cnt *
244 sizeof(struct nvsp_1_receive_buffer_section));
245
246 /* 244 /*
247 * For 1st release, there should only be 1 section that represents the 245 * For 1st release, there should only be 1 section that represents the
248 * entire receive buffer 246 * entire receive buffer
@@ -263,27 +261,18 @@ exit:
263} 261}
264 262
265 263
266static int netvsc_connect_vsp(struct hv_device *device) 264/* Negotiate NVSP protocol version */
265static int negotiate_nvsp_ver(struct hv_device *device,
266 struct netvsc_device *net_device,
267 struct nvsp_message *init_packet,
268 u32 nvsp_ver)
267{ 269{
268 int ret, t; 270 int ret, t;
269 struct netvsc_device *net_device;
270 struct nvsp_message *init_packet;
271 int ndis_version;
272 struct net_device *ndev;
273
274 net_device = get_outbound_net_device(device);
275 if (!net_device)
276 return -ENODEV;
277 ndev = net_device->ndev;
278
279 init_packet = &net_device->channel_init_pkt;
280 271
281 memset(init_packet, 0, sizeof(struct nvsp_message)); 272 memset(init_packet, 0, sizeof(struct nvsp_message));
282 init_packet->hdr.msg_type = NVSP_MSG_TYPE_INIT; 273 init_packet->hdr.msg_type = NVSP_MSG_TYPE_INIT;
283 init_packet->msg.init_msg.init.min_protocol_ver = 274 init_packet->msg.init_msg.init.min_protocol_ver = nvsp_ver;
284 NVSP_MIN_PROTOCOL_VERSION; 275 init_packet->msg.init_msg.init.max_protocol_ver = nvsp_ver;
285 init_packet->msg.init_msg.init.max_protocol_ver =
286 NVSP_MAX_PROTOCOL_VERSION;
287 276
288 /* Send the init request */ 277 /* Send the init request */
289 ret = vmbus_sendpacket(device->channel, init_packet, 278 ret = vmbus_sendpacket(device->channel, init_packet,
@@ -293,26 +282,62 @@ static int netvsc_connect_vsp(struct hv_device *device)
293 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); 282 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
294 283
295 if (ret != 0) 284 if (ret != 0)
296 goto cleanup; 285 return ret;
297 286
298 t = wait_for_completion_timeout(&net_device->channel_init_wait, 5*HZ); 287 t = wait_for_completion_timeout(&net_device->channel_init_wait, 5*HZ);
299 288
300 if (t == 0) { 289 if (t == 0)
301 ret = -ETIMEDOUT; 290 return -ETIMEDOUT;
302 goto cleanup;
303 }
304 291
305 if (init_packet->msg.init_msg.init_complete.status != 292 if (init_packet->msg.init_msg.init_complete.status !=
306 NVSP_STAT_SUCCESS) { 293 NVSP_STAT_SUCCESS)
307 ret = -EINVAL; 294 return -EINVAL;
308 goto cleanup;
309 }
310 295
311 if (init_packet->msg.init_msg.init_complete. 296 if (nvsp_ver != NVSP_PROTOCOL_VERSION_2)
312 negotiated_protocol_ver != NVSP_PROTOCOL_VERSION_1) { 297 return 0;
298
299 /* NVSPv2 only: Send NDIS config */
300 memset(init_packet, 0, sizeof(struct nvsp_message));
301 init_packet->hdr.msg_type = NVSP_MSG2_TYPE_SEND_NDIS_CONFIG;
302 init_packet->msg.v2_msg.send_ndis_config.mtu = net_device->ndev->mtu;
303
304 ret = vmbus_sendpacket(device->channel, init_packet,
305 sizeof(struct nvsp_message),
306 (unsigned long)init_packet,
307 VM_PKT_DATA_INBAND, 0);
308
309 return ret;
310}
311
312static int netvsc_connect_vsp(struct hv_device *device)
313{
314 int ret;
315 struct netvsc_device *net_device;
316 struct nvsp_message *init_packet;
317 int ndis_version;
318 struct net_device *ndev;
319
320 net_device = get_outbound_net_device(device);
321 if (!net_device)
322 return -ENODEV;
323 ndev = net_device->ndev;
324
325 init_packet = &net_device->channel_init_pkt;
326
327 /* Negotiate the latest NVSP protocol supported */
328 if (negotiate_nvsp_ver(device, net_device, init_packet,
329 NVSP_PROTOCOL_VERSION_2) == 0) {
330 net_device->nvsp_version = NVSP_PROTOCOL_VERSION_2;
331 } else if (negotiate_nvsp_ver(device, net_device, init_packet,
332 NVSP_PROTOCOL_VERSION_1) == 0) {
333 net_device->nvsp_version = NVSP_PROTOCOL_VERSION_1;
334 } else {
313 ret = -EPROTO; 335 ret = -EPROTO;
314 goto cleanup; 336 goto cleanup;
315 } 337 }
338
339 pr_debug("Negotiated NVSP version:%x\n", net_device->nvsp_version);
340
316 /* Send the ndis version */ 341 /* Send the ndis version */
317 memset(init_packet, 0, sizeof(struct nvsp_message)); 342 memset(init_packet, 0, sizeof(struct nvsp_message));
318 343
@@ -438,6 +463,9 @@ static void netvsc_send_completion(struct hv_device *device,
438 nvsc_packet->completion.send.send_completion_ctx); 463 nvsc_packet->completion.send.send_completion_ctx);
439 464
440 atomic_dec(&net_device->num_outstanding_sends); 465 atomic_dec(&net_device->num_outstanding_sends);
466
467 if (netif_queue_stopped(ndev) && !net_device->start_remove)
468 netif_wake_queue(ndev);
441 } else { 469 } else {
442 netdev_err(ndev, "Unknown send completion packet type- " 470 netdev_err(ndev, "Unknown send completion packet type- "
443 "%d received!!\n", nvsp_packet->hdr.msg_type); 471 "%d received!!\n", nvsp_packet->hdr.msg_type);
@@ -488,11 +516,16 @@ int netvsc_send(struct hv_device *device,
488 516
489 } 517 }
490 518
491 if (ret != 0) 519 if (ret == 0) {
520 atomic_inc(&net_device->num_outstanding_sends);
521 } else if (ret == -EAGAIN) {
522 netif_stop_queue(ndev);
523 if (atomic_read(&net_device->num_outstanding_sends) < 1)
524 netif_wake_queue(ndev);
525 } else {
492 netdev_err(ndev, "Unable to send packet %p ret %d\n", 526 netdev_err(ndev, "Unable to send packet %p ret %d\n",
493 packet, ret); 527 packet, ret);
494 else 528 }
495 atomic_inc(&net_device->num_outstanding_sends);
496 529
497 return ret; 530 return ret;
498} 531}
@@ -598,12 +631,10 @@ static void netvsc_receive(struct hv_device *device,
598 struct vmtransfer_page_packet_header *vmxferpage_packet; 631 struct vmtransfer_page_packet_header *vmxferpage_packet;
599 struct nvsp_message *nvsp_packet; 632 struct nvsp_message *nvsp_packet;
600 struct hv_netvsc_packet *netvsc_packet = NULL; 633 struct hv_netvsc_packet *netvsc_packet = NULL;
601 unsigned long start;
602 unsigned long end, end_virtual;
603 /* struct netvsc_driver *netvscDriver; */ 634 /* struct netvsc_driver *netvscDriver; */
604 struct xferpage_packet *xferpage_packet = NULL; 635 struct xferpage_packet *xferpage_packet = NULL;
605 int i, j; 636 int i;
606 int count = 0, bytes_remain = 0; 637 int count = 0;
607 unsigned long flags; 638 unsigned long flags;
608 struct net_device *ndev; 639 struct net_device *ndev;
609 640
@@ -712,53 +743,10 @@ static void netvsc_receive(struct hv_device *device,
712 netvsc_packet->completion.recv.recv_completion_tid = 743 netvsc_packet->completion.recv.recv_completion_tid =
713 vmxferpage_packet->d.trans_id; 744 vmxferpage_packet->d.trans_id;
714 745
746 netvsc_packet->data = (void *)((unsigned long)net_device->
747 recv_buf + vmxferpage_packet->ranges[i].byte_offset);
715 netvsc_packet->total_data_buflen = 748 netvsc_packet->total_data_buflen =
716 vmxferpage_packet->ranges[i].byte_count; 749 vmxferpage_packet->ranges[i].byte_count;
717 netvsc_packet->page_buf_cnt = 1;
718
719 netvsc_packet->page_buf[0].len =
720 vmxferpage_packet->ranges[i].byte_count;
721
722 start = virt_to_phys((void *)((unsigned long)net_device->
723 recv_buf + vmxferpage_packet->ranges[i].byte_offset));
724
725 netvsc_packet->page_buf[0].pfn = start >> PAGE_SHIFT;
726 end_virtual = (unsigned long)net_device->recv_buf
727 + vmxferpage_packet->ranges[i].byte_offset
728 + vmxferpage_packet->ranges[i].byte_count - 1;
729 end = virt_to_phys((void *)end_virtual);
730
731 /* Calculate the page relative offset */
732 netvsc_packet->page_buf[0].offset =
733 vmxferpage_packet->ranges[i].byte_offset &
734 (PAGE_SIZE - 1);
735 if ((end >> PAGE_SHIFT) != (start >> PAGE_SHIFT)) {
736 /* Handle frame across multiple pages: */
737 netvsc_packet->page_buf[0].len =
738 (netvsc_packet->page_buf[0].pfn <<
739 PAGE_SHIFT)
740 + PAGE_SIZE - start;
741 bytes_remain = netvsc_packet->total_data_buflen -
742 netvsc_packet->page_buf[0].len;
743 for (j = 1; j < NETVSC_PACKET_MAXPAGE; j++) {
744 netvsc_packet->page_buf[j].offset = 0;
745 if (bytes_remain <= PAGE_SIZE) {
746 netvsc_packet->page_buf[j].len =
747 bytes_remain;
748 bytes_remain = 0;
749 } else {
750 netvsc_packet->page_buf[j].len =
751 PAGE_SIZE;
752 bytes_remain -= PAGE_SIZE;
753 }
754 netvsc_packet->page_buf[j].pfn =
755 virt_to_phys((void *)(end_virtual -
756 bytes_remain)) >> PAGE_SHIFT;
757 netvsc_packet->page_buf_cnt++;
758 if (bytes_remain == 0)
759 break;
760 }
761 }
762 750
763 /* Pass it to the upper layer */ 751 /* Pass it to the upper layer */
764 rndis_filter_receive(device, netvsc_packet); 752 rndis_filter_receive(device, netvsc_packet);
diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c
index 93b0e91cbf98..462d05f05e84 100644
--- a/drivers/staging/hv/netvsc_drv.c
+++ b/drivers/net/hyperv/netvsc_drv.c
@@ -43,24 +43,59 @@
43struct net_device_context { 43struct net_device_context {
44 /* point back to our device context */ 44 /* point back to our device context */
45 struct hv_device *device_ctx; 45 struct hv_device *device_ctx;
46 atomic_t avail;
47 struct delayed_work dwork; 46 struct delayed_work dwork;
48}; 47};
49 48
50 49
51#define PACKET_PAGES_LOWATER 8
52/* Need this many pages to handle worst case fragmented packet */
53#define PACKET_PAGES_HIWATER (MAX_SKB_FRAGS + 2)
54
55static int ring_size = 128; 50static int ring_size = 128;
56module_param(ring_size, int, S_IRUGO); 51module_param(ring_size, int, S_IRUGO);
57MODULE_PARM_DESC(ring_size, "Ring buffer size (# of pages)"); 52MODULE_PARM_DESC(ring_size, "Ring buffer size (# of pages)");
58 53
59/* no-op so the netdev core doesn't return -EINVAL when modifying the the 54struct set_multicast_work {
60 * multicast address list in SIOCADDMULTI. hv is setup to get all multicast 55 struct work_struct work;
61 * when it calls RndisFilterOnOpen() */ 56 struct net_device *net;
57};
58
59static void do_set_multicast(struct work_struct *w)
60{
61 struct set_multicast_work *swk =
62 container_of(w, struct set_multicast_work, work);
63 struct net_device *net = swk->net;
64
65 struct net_device_context *ndevctx = netdev_priv(net);
66 struct netvsc_device *nvdev;
67 struct rndis_device *rdev;
68
69 nvdev = hv_get_drvdata(ndevctx->device_ctx);
70 if (nvdev == NULL)
71 return;
72
73 rdev = nvdev->extension;
74 if (rdev == NULL)
75 return;
76
77 if (net->flags & IFF_PROMISC)
78 rndis_filter_set_packet_filter(rdev,
79 NDIS_PACKET_TYPE_PROMISCUOUS);
80 else
81 rndis_filter_set_packet_filter(rdev,
82 NDIS_PACKET_TYPE_BROADCAST |
83 NDIS_PACKET_TYPE_ALL_MULTICAST |
84 NDIS_PACKET_TYPE_DIRECTED);
85
86 kfree(w);
87}
88
62static void netvsc_set_multicast_list(struct net_device *net) 89static void netvsc_set_multicast_list(struct net_device *net)
63{ 90{
91 struct set_multicast_work *swk =
92 kmalloc(sizeof(struct set_multicast_work), GFP_ATOMIC);
93 if (swk == NULL)
94 return;
95
96 swk->net = net;
97 INIT_WORK(&swk->work, do_set_multicast);
98 schedule_work(&swk->work);
64} 99}
65 100
66static int netvsc_open(struct net_device *net) 101static int netvsc_open(struct net_device *net)
@@ -104,18 +139,8 @@ static void netvsc_xmit_completion(void *context)
104 139
105 kfree(packet); 140 kfree(packet);
106 141
107 if (skb) { 142 if (skb)
108 struct net_device *net = skb->dev;
109 struct net_device_context *net_device_ctx = netdev_priv(net);
110 unsigned int num_pages = skb_shinfo(skb)->nr_frags + 2;
111
112 dev_kfree_skb_any(skb); 143 dev_kfree_skb_any(skb);
113
114 atomic_add(num_pages, &net_device_ctx->avail);
115 if (atomic_read(&net_device_ctx->avail) >=
116 PACKET_PAGES_HIWATER)
117 netif_wake_queue(net);
118 }
119} 144}
120 145
121static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net) 146static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
@@ -123,12 +148,12 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
123 struct net_device_context *net_device_ctx = netdev_priv(net); 148 struct net_device_context *net_device_ctx = netdev_priv(net);
124 struct hv_netvsc_packet *packet; 149 struct hv_netvsc_packet *packet;
125 int ret; 150 int ret;
126 unsigned int i, num_pages; 151 unsigned int i, num_pages, npg_data;
127 152
128 /* Add 1 for skb->data and additional one for RNDIS */ 153 /* Add multipage for skb->data and additional one for RNDIS */
129 num_pages = skb_shinfo(skb)->nr_frags + 1 + 1; 154 npg_data = (((unsigned long)skb->data + skb_headlen(skb) - 1)
130 if (num_pages > atomic_read(&net_device_ctx->avail)) 155 >> PAGE_SHIFT) - ((unsigned long)skb->data >> PAGE_SHIFT) + 1;
131 return NETDEV_TX_BUSY; 156 num_pages = skb_shinfo(skb)->nr_frags + npg_data + 1;
132 157
133 /* Allocate a netvsc packet based on # of frags. */ 158 /* Allocate a netvsc packet based on # of frags. */
134 packet = kzalloc(sizeof(struct hv_netvsc_packet) + 159 packet = kzalloc(sizeof(struct hv_netvsc_packet) +
@@ -151,21 +176,36 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
151 packet->page_buf_cnt = num_pages; 176 packet->page_buf_cnt = num_pages;
152 177
153 /* Initialize it from the skb */ 178 /* Initialize it from the skb */
154 packet->total_data_buflen = skb->len; 179 packet->total_data_buflen = skb->len;
155 180
156 /* Start filling in the page buffers starting after RNDIS buffer. */ 181 /* Start filling in the page buffers starting after RNDIS buffer. */
157 packet->page_buf[1].pfn = virt_to_phys(skb->data) >> PAGE_SHIFT; 182 packet->page_buf[1].pfn = virt_to_phys(skb->data) >> PAGE_SHIFT;
158 packet->page_buf[1].offset 183 packet->page_buf[1].offset
159 = (unsigned long)skb->data & (PAGE_SIZE - 1); 184 = (unsigned long)skb->data & (PAGE_SIZE - 1);
160 packet->page_buf[1].len = skb_headlen(skb); 185 if (npg_data == 1)
186 packet->page_buf[1].len = skb_headlen(skb);
187 else
188 packet->page_buf[1].len = PAGE_SIZE
189 - packet->page_buf[1].offset;
190
191 for (i = 2; i <= npg_data; i++) {
192 packet->page_buf[i].pfn = virt_to_phys(skb->data
193 + PAGE_SIZE * (i-1)) >> PAGE_SHIFT;
194 packet->page_buf[i].offset = 0;
195 packet->page_buf[i].len = PAGE_SIZE;
196 }
197 if (npg_data > 1)
198 packet->page_buf[npg_data].len = (((unsigned long)skb->data
199 + skb_headlen(skb) - 1) & (PAGE_SIZE - 1)) + 1;
161 200
162 /* Additional fragments are after SKB data */ 201 /* Additional fragments are after SKB data */
163 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 202 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
164 const skb_frag_t *f = &skb_shinfo(skb)->frags[i]; 203 const skb_frag_t *f = &skb_shinfo(skb)->frags[i];
165 204
166 packet->page_buf[i+2].pfn = page_to_pfn(skb_frag_page(f)); 205 packet->page_buf[i+npg_data+1].pfn =
167 packet->page_buf[i+2].offset = f->page_offset; 206 page_to_pfn(skb_frag_page(f));
168 packet->page_buf[i+2].len = skb_frag_size(f); 207 packet->page_buf[i+npg_data+1].offset = f->page_offset;
208 packet->page_buf[i+npg_data+1].len = skb_frag_size(f);
169 } 209 }
170 210
171 /* Set the completion routine */ 211 /* Set the completion routine */
@@ -178,10 +218,6 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
178 if (ret == 0) { 218 if (ret == 0) {
179 net->stats.tx_bytes += skb->len; 219 net->stats.tx_bytes += skb->len;
180 net->stats.tx_packets++; 220 net->stats.tx_packets++;
181
182 atomic_sub(num_pages, &net_device_ctx->avail);
183 if (atomic_read(&net_device_ctx->avail) < PACKET_PAGES_LOWATER)
184 netif_stop_queue(net);
185 } else { 221 } else {
186 /* we are shutting down or bus overloaded, just drop packet */ 222 /* we are shutting down or bus overloaded, just drop packet */
187 net->stats.tx_dropped++; 223 net->stats.tx_dropped++;
@@ -232,9 +268,6 @@ int netvsc_recv_callback(struct hv_device *device_obj,
232{ 268{
233 struct net_device *net = dev_get_drvdata(&device_obj->device); 269 struct net_device *net = dev_get_drvdata(&device_obj->device);
234 struct sk_buff *skb; 270 struct sk_buff *skb;
235 void *data;
236 int i;
237 unsigned long flags;
238 struct netvsc_device *net_device; 271 struct netvsc_device *net_device;
239 272
240 net_device = hv_get_drvdata(device_obj); 273 net_device = hv_get_drvdata(device_obj);
@@ -253,27 +286,12 @@ int netvsc_recv_callback(struct hv_device *device_obj,
253 return 0; 286 return 0;
254 } 287 }
255 288
256 /* for kmap_atomic */
257 local_irq_save(flags);
258
259 /* 289 /*
260 * Copy to skb. This copy is needed here since the memory pointed by 290 * Copy to skb. This copy is needed here since the memory pointed by
261 * hv_netvsc_packet cannot be deallocated 291 * hv_netvsc_packet cannot be deallocated
262 */ 292 */
263 for (i = 0; i < packet->page_buf_cnt; i++) { 293 memcpy(skb_put(skb, packet->total_data_buflen), packet->data,
264 data = kmap_atomic(pfn_to_page(packet->page_buf[i].pfn), 294 packet->total_data_buflen);
265 KM_IRQ1);
266 data = (void *)(unsigned long)data +
267 packet->page_buf[i].offset;
268
269 memcpy(skb_put(skb, packet->page_buf[i].len), data,
270 packet->page_buf[i].len);
271
272 kunmap_atomic((void *)((unsigned long)data -
273 packet->page_buf[i].offset), KM_IRQ1);
274 }
275
276 local_irq_restore(flags);
277 295
278 skb->protocol = eth_type_trans(skb, net); 296 skb->protocol = eth_type_trans(skb, net);
279 skb->ip_summed = CHECKSUM_NONE; 297 skb->ip_summed = CHECKSUM_NONE;
@@ -299,6 +317,39 @@ static void netvsc_get_drvinfo(struct net_device *net,
299 strcpy(info->fw_version, "N/A"); 317 strcpy(info->fw_version, "N/A");
300} 318}
301 319
320static int netvsc_change_mtu(struct net_device *ndev, int mtu)
321{
322 struct net_device_context *ndevctx = netdev_priv(ndev);
323 struct hv_device *hdev = ndevctx->device_ctx;
324 struct netvsc_device *nvdev = hv_get_drvdata(hdev);
325 struct netvsc_device_info device_info;
326 int limit = ETH_DATA_LEN;
327
328 if (nvdev == NULL || nvdev->destroy)
329 return -ENODEV;
330
331 if (nvdev->nvsp_version == NVSP_PROTOCOL_VERSION_2)
332 limit = NETVSC_MTU;
333
334 if (mtu < 68 || mtu > limit)
335 return -EINVAL;
336
337 nvdev->start_remove = true;
338 cancel_delayed_work_sync(&ndevctx->dwork);
339 netif_stop_queue(ndev);
340 rndis_filter_device_remove(hdev);
341
342 ndev->mtu = mtu;
343
344 ndevctx->device_ctx = hdev;
345 hv_set_drvdata(hdev, ndev);
346 device_info.ring_size = ring_size;
347 rndis_filter_device_add(hdev, &device_info);
348 netif_wake_queue(ndev);
349
350 return 0;
351}
352
302static const struct ethtool_ops ethtool_ops = { 353static const struct ethtool_ops ethtool_ops = {
303 .get_drvinfo = netvsc_get_drvinfo, 354 .get_drvinfo = netvsc_get_drvinfo,
304 .get_link = ethtool_op_get_link, 355 .get_link = ethtool_op_get_link,
@@ -309,7 +360,7 @@ static const struct net_device_ops device_ops = {
309 .ndo_stop = netvsc_close, 360 .ndo_stop = netvsc_close,
310 .ndo_start_xmit = netvsc_start_xmit, 361 .ndo_start_xmit = netvsc_start_xmit,
311 .ndo_set_rx_mode = netvsc_set_multicast_list, 362 .ndo_set_rx_mode = netvsc_set_multicast_list,
312 .ndo_change_mtu = eth_change_mtu, 363 .ndo_change_mtu = netvsc_change_mtu,
313 .ndo_validate_addr = eth_validate_addr, 364 .ndo_validate_addr = eth_validate_addr,
314 .ndo_set_mac_address = eth_mac_addr, 365 .ndo_set_mac_address = eth_mac_addr,
315}; 366};
@@ -351,7 +402,6 @@ static int netvsc_probe(struct hv_device *dev,
351 402
352 net_device_ctx = netdev_priv(net); 403 net_device_ctx = netdev_priv(net);
353 net_device_ctx->device_ctx = dev; 404 net_device_ctx->device_ctx = dev;
354 atomic_set(&net_device_ctx->avail, ring_size);
355 hv_set_drvdata(dev, net); 405 hv_set_drvdata(dev, net);
356 INIT_DELAYED_WORK(&net_device_ctx->dwork, netvsc_send_garp); 406 INIT_DELAYED_WORK(&net_device_ctx->dwork, netvsc_send_garp);
357 407
@@ -403,6 +453,8 @@ static int netvsc_remove(struct hv_device *dev)
403 return 0; 453 return 0;
404 } 454 }
405 455
456 net_device->start_remove = true;
457
406 ndev_ctx = netdev_priv(net); 458 ndev_ctx = netdev_priv(net);
407 cancel_delayed_work_sync(&ndev_ctx->dwork); 459 cancel_delayed_work_sync(&ndev_ctx->dwork);
408 460
diff --git a/drivers/staging/hv/rndis_filter.c b/drivers/net/hyperv/rndis_filter.c
index bafccb360041..da181f9a49d1 100644
--- a/drivers/staging/hv/rndis_filter.c
+++ b/drivers/net/hyperv/rndis_filter.c
@@ -30,26 +30,6 @@
30#include "hyperv_net.h" 30#include "hyperv_net.h"
31 31
32 32
33enum rndis_device_state {
34 RNDIS_DEV_UNINITIALIZED = 0,
35 RNDIS_DEV_INITIALIZING,
36 RNDIS_DEV_INITIALIZED,
37 RNDIS_DEV_DATAINITIALIZED,
38};
39
40struct rndis_device {
41 struct netvsc_device *net_dev;
42
43 enum rndis_device_state state;
44 bool link_state;
45 atomic_t new_req_id;
46
47 spinlock_t request_lock;
48 struct list_head req_list;
49
50 unsigned char hw_mac_adr[ETH_ALEN];
51};
52
53struct rndis_request { 33struct rndis_request {
54 struct list_head list_ent; 34 struct list_head list_ent;
55 struct completion wait_event; 35 struct completion wait_event;
@@ -329,7 +309,6 @@ static void rndis_filter_receive_data(struct rndis_device *dev,
329{ 309{
330 struct rndis_packet *rndis_pkt; 310 struct rndis_packet *rndis_pkt;
331 u32 data_offset; 311 u32 data_offset;
332 int i;
333 312
334 rndis_pkt = &msg->msg.pkt; 313 rndis_pkt = &msg->msg.pkt;
335 314
@@ -342,17 +321,7 @@ static void rndis_filter_receive_data(struct rndis_device *dev,
342 data_offset = RNDIS_HEADER_SIZE + rndis_pkt->data_offset; 321 data_offset = RNDIS_HEADER_SIZE + rndis_pkt->data_offset;
343 322
344 pkt->total_data_buflen -= data_offset; 323 pkt->total_data_buflen -= data_offset;
345 pkt->page_buf[0].offset += data_offset; 324 pkt->data = (void *)((unsigned long)pkt->data + data_offset);
346 pkt->page_buf[0].len -= data_offset;
347
348 /* Drop the 0th page, if rndis data go beyond page boundary */
349 if (pkt->page_buf[0].offset >= PAGE_SIZE) {
350 pkt->page_buf[1].offset = pkt->page_buf[0].offset - PAGE_SIZE;
351 pkt->page_buf[1].len -= pkt->page_buf[1].offset;
352 pkt->page_buf_cnt--;
353 for (i = 0; i < pkt->page_buf_cnt; i++)
354 pkt->page_buf[i] = pkt->page_buf[i+1];
355 }
356 325
357 pkt->is_data_pkt = true; 326 pkt->is_data_pkt = true;
358 327
@@ -387,11 +356,7 @@ int rndis_filter_receive(struct hv_device *dev,
387 return -ENODEV; 356 return -ENODEV;
388 } 357 }
389 358
390 rndis_hdr = (struct rndis_message *)kmap_atomic( 359 rndis_hdr = pkt->data;
391 pfn_to_page(pkt->page_buf[0].pfn), KM_IRQ0);
392
393 rndis_hdr = (void *)((unsigned long)rndis_hdr +
394 pkt->page_buf[0].offset);
395 360
396 /* Make sure we got a valid rndis message */ 361 /* Make sure we got a valid rndis message */
397 if ((rndis_hdr->ndis_msg_type != REMOTE_NDIS_PACKET_MSG) && 362 if ((rndis_hdr->ndis_msg_type != REMOTE_NDIS_PACKET_MSG) &&
@@ -407,8 +372,6 @@ int rndis_filter_receive(struct hv_device *dev,
407 sizeof(struct rndis_message) : 372 sizeof(struct rndis_message) :
408 rndis_hdr->msg_len); 373 rndis_hdr->msg_len);
409 374
410 kunmap_atomic(rndis_hdr - pkt->page_buf[0].offset, KM_IRQ0);
411
412 dump_rndis_message(dev, &rndis_msg); 375 dump_rndis_message(dev, &rndis_msg);
413 376
414 switch (rndis_msg.ndis_msg_type) { 377 switch (rndis_msg.ndis_msg_type) {
@@ -522,8 +485,7 @@ static int rndis_filter_query_device_link_status(struct rndis_device *dev)
522 return ret; 485 return ret;
523} 486}
524 487
525static int rndis_filter_set_packet_filter(struct rndis_device *dev, 488int rndis_filter_set_packet_filter(struct rndis_device *dev, u32 new_filter)
526 u32 new_filter)
527{ 489{
528 struct rndis_request *request; 490 struct rndis_request *request;
529 struct rndis_set_request *set; 491 struct rndis_set_request *set;
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c
index 1ff7163bc348..d0937c4634c9 100644
--- a/drivers/net/usb/asix.c
+++ b/drivers/net/usb/asix.c
@@ -376,7 +376,7 @@ static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
376 376
377 skb_pull(skb, (size + 1) & 0xfffe); 377 skb_pull(skb, (size + 1) & 0xfffe);
378 378
379 if (skb->len == 0) 379 if (skb->len < sizeof(header))
380 break; 380 break;
381 381
382 head = (u8 *) skb->data; 382 head = (u8 *) skb->data;
@@ -1152,7 +1152,7 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1152 return 0; 1152 return 0;
1153} 1153}
1154 1154
1155static struct ethtool_ops ax88178_ethtool_ops = { 1155static const struct ethtool_ops ax88178_ethtool_ops = {
1156 .get_drvinfo = asix_get_drvinfo, 1156 .get_drvinfo = asix_get_drvinfo,
1157 .get_link = asix_get_link, 1157 .get_link = asix_get_link,
1158 .get_msglevel = usbnet_get_msglevel, 1158 .get_msglevel = usbnet_get_msglevel,
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
index cb8e595c5021..3a539a9cac54 100644
--- a/drivers/net/usb/cdc_ncm.c
+++ b/drivers/net/usb/cdc_ncm.c
@@ -138,7 +138,7 @@ struct cdc_ncm_ctx {
138static void cdc_ncm_tx_timeout(unsigned long arg); 138static void cdc_ncm_tx_timeout(unsigned long arg);
139static const struct driver_info cdc_ncm_info; 139static const struct driver_info cdc_ncm_info;
140static struct usb_driver cdc_ncm_driver; 140static struct usb_driver cdc_ncm_driver;
141static struct ethtool_ops cdc_ncm_ethtool_ops; 141static const struct ethtool_ops cdc_ncm_ethtool_ops;
142 142
143static const struct usb_device_id cdc_devs[] = { 143static const struct usb_device_id cdc_devs[] = {
144 { USB_INTERFACE_INFO(USB_CLASS_COMM, 144 { USB_INTERFACE_INFO(USB_CLASS_COMM,
@@ -1220,7 +1220,7 @@ static struct usb_driver cdc_ncm_driver = {
1220 .supports_autosuspend = 1, 1220 .supports_autosuspend = 1,
1221}; 1221};
1222 1222
1223static struct ethtool_ops cdc_ncm_ethtool_ops = { 1223static const struct ethtool_ops cdc_ncm_ethtool_ops = {
1224 .get_drvinfo = cdc_ncm_get_drvinfo, 1224 .get_drvinfo = cdc_ncm_get_drvinfo,
1225 .get_link = usbnet_get_link, 1225 .get_link = usbnet_get_link,
1226 .get_msglevel = usbnet_get_msglevel, 1226 .get_msglevel = usbnet_get_msglevel,
diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c
index 08a4df238796..e84662db51cc 100644
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -420,7 +420,7 @@ static u32 ipheth_ethtool_op_get_link(struct net_device *net)
420 return netif_carrier_ok(dev->net); 420 return netif_carrier_ok(dev->net);
421} 421}
422 422
423static struct ethtool_ops ops = { 423static const struct ethtool_ops ops = {
424 .get_link = ipheth_ethtool_op_get_link 424 .get_link = ipheth_ethtool_op_get_link
425}; 425};
426 426
diff --git a/drivers/net/usb/sierra_net.c b/drivers/net/usb/sierra_net.c
index e45dfdcb8718..b59cf20c7817 100644
--- a/drivers/net/usb/sierra_net.c
+++ b/drivers/net/usb/sierra_net.c
@@ -618,7 +618,7 @@ static u32 sierra_net_get_link(struct net_device *net)
618 return sierra_net_get_private(dev)->link_up && netif_running(net); 618 return sierra_net_get_private(dev)->link_up && netif_running(net);
619} 619}
620 620
621static struct ethtool_ops sierra_net_ethtool_ops = { 621static const struct ethtool_ops sierra_net_ethtool_ops = {
622 .get_drvinfo = sierra_net_get_drvinfo, 622 .get_drvinfo = sierra_net_get_drvinfo,
623 .get_link = sierra_net_get_link, 623 .get_link = sierra_net_get_link,
624 .get_msglevel = usbnet_get_msglevel, 624 .get_msglevel = usbnet_get_msglevel,
diff --git a/drivers/parport/parport_ax88796.c b/drivers/parport/parport_ax88796.c
index 844f6137970a..7c5d86696eed 100644
--- a/drivers/parport/parport_ax88796.c
+++ b/drivers/parport/parport_ax88796.c
@@ -420,18 +420,7 @@ static struct platform_driver axdrv = {
420 .resume = parport_ax88796_resume, 420 .resume = parport_ax88796_resume,
421}; 421};
422 422
423static int __init parport_ax88796_init(void) 423module_platform_driver(axdrv);
424{
425 return platform_driver_register(&axdrv);
426}
427
428static void __exit parport_ax88796_exit(void)
429{
430 platform_driver_unregister(&axdrv);
431}
432
433module_init(parport_ax88796_init)
434module_exit(parport_ax88796_exit)
435 424
436MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 425MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
437MODULE_DESCRIPTION("AX88796 Parport parallel port driver"); 426MODULE_DESCRIPTION("AX88796 Parport parallel port driver");
diff --git a/drivers/parport/parport_sunbpp.c b/drivers/parport/parport_sunbpp.c
index 910c5a26e347..9390a534a2b2 100644
--- a/drivers/parport/parport_sunbpp.c
+++ b/drivers/parport/parport_sunbpp.c
@@ -391,21 +391,10 @@ static struct platform_driver bpp_sbus_driver = {
391 .remove = __devexit_p(bpp_remove), 391 .remove = __devexit_p(bpp_remove),
392}; 392};
393 393
394static int __init parport_sunbpp_init(void) 394module_platform_driver(bpp_sbus_driver);
395{
396 return platform_driver_register(&bpp_sbus_driver);
397}
398
399static void __exit parport_sunbpp_exit(void)
400{
401 platform_driver_unregister(&bpp_sbus_driver);
402}
403 395
404MODULE_AUTHOR("Derrick J Brashear"); 396MODULE_AUTHOR("Derrick J Brashear");
405MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port"); 397MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port");
406MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port"); 398MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port");
407MODULE_VERSION("2.0"); 399MODULE_VERSION("2.0");
408MODULE_LICENSE("GPL"); 400MODULE_LICENSE("GPL");
409
410module_init(parport_sunbpp_init)
411module_exit(parport_sunbpp_exit)
diff --git a/drivers/pcmcia/pxa2xx_cm_x255.c b/drivers/pcmcia/pxa2xx_cm_x255.c
index 0b4f946cf13a..31ab6ddf52c9 100644
--- a/drivers/pcmcia/pxa2xx_cm_x255.c
+++ b/drivers/pcmcia/pxa2xx_cm_x255.c
@@ -16,8 +16,6 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/export.h> 17#include <linux/export.h>
18 18
19#include <asm/mach-types.h>
20
21#include "soc_common.h" 19#include "soc_common.h"
22 20
23#define GPIO_PCMCIA_SKTSEL (54) 21#define GPIO_PCMCIA_SKTSEL (54)
@@ -27,15 +25,15 @@
27#define GPIO_PCMCIA_S1_RDYINT (8) 25#define GPIO_PCMCIA_S1_RDYINT (8)
28#define GPIO_PCMCIA_RESET (9) 26#define GPIO_PCMCIA_RESET (9)
29 27
30#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) 28#define PCMCIA_S0_CD_VALID gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID)
31#define PCMCIA_S1_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S1_CD_VALID) 29#define PCMCIA_S1_CD_VALID gpio_to_irq(GPIO_PCMCIA_S1_CD_VALID)
32#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) 30#define PCMCIA_S0_RDYINT gpio_to_irq(GPIO_PCMCIA_S0_RDYINT)
33#define PCMCIA_S1_RDYINT IRQ_GPIO(GPIO_PCMCIA_S1_RDYINT) 31#define PCMCIA_S1_RDYINT gpio_to_irq(GPIO_PCMCIA_S1_RDYINT)
34 32
35 33
36static struct pcmcia_irqs irqs[] = { 34static struct pcmcia_irqs irqs[] = {
37 { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, 35 { .sock = 0, .str = "PCMCIA0 CD" },
38 { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" }, 36 { .sock = 1, .str = "PCMCIA1 CD" },
39}; 37};
40 38
41static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 39static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -46,6 +44,8 @@ static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
46 gpio_direction_output(GPIO_PCMCIA_RESET, 0); 44 gpio_direction_output(GPIO_PCMCIA_RESET, 0);
47 45
48 skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT; 46 skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT;
47 irqs[0].irq = PCMCIA_S0_CD_VALID;
48 irqs[1].irq = PCMCIA_S1_CD_VALID;
49 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); 49 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
50 if (!ret) 50 if (!ret)
51 gpio_free(GPIO_PCMCIA_RESET); 51 gpio_free(GPIO_PCMCIA_RESET);
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c
index 923f315926ef..3dc7621a0767 100644
--- a/drivers/pcmcia/pxa2xx_cm_x270.c
+++ b/drivers/pcmcia/pxa2xx_cm_x270.c
@@ -16,20 +16,18 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/export.h> 17#include <linux/export.h>
18 18
19#include <asm/mach-types.h>
20
21#include "soc_common.h" 19#include "soc_common.h"
22 20
23#define GPIO_PCMCIA_S0_CD_VALID (84) 21#define GPIO_PCMCIA_S0_CD_VALID (84)
24#define GPIO_PCMCIA_S0_RDYINT (82) 22#define GPIO_PCMCIA_S0_RDYINT (82)
25#define GPIO_PCMCIA_RESET (53) 23#define GPIO_PCMCIA_RESET (53)
26 24
27#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) 25#define PCMCIA_S0_CD_VALID gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID)
28#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) 26#define PCMCIA_S0_RDYINT gpio_to_irq(GPIO_PCMCIA_S0_RDYINT)
29 27
30 28
31static struct pcmcia_irqs irqs[] = { 29static struct pcmcia_irqs irqs[] = {
32 { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, 30 { .sock = 0, .str = "PCMCIA0 CD" },
33}; 31};
34 32
35static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 33static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
@@ -40,6 +38,7 @@ static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
40 gpio_direction_output(GPIO_PCMCIA_RESET, 0); 38 gpio_direction_output(GPIO_PCMCIA_RESET, 0);
41 39
42 skt->socket.pci_irq = PCMCIA_S0_RDYINT; 40 skt->socket.pci_irq = PCMCIA_S0_RDYINT;
41 irqs[0].irq = PCMCIA_S0_CD_VALID;
43 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); 42 ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
44 if (!ret) 43 if (!ret)
45 gpio_free(GPIO_PCMCIA_RESET); 44 gpio_free(GPIO_PCMCIA_RESET);
diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c
index 8bfbd4dca131..17cd2ce7428f 100644
--- a/drivers/pcmcia/pxa2xx_e740.c
+++ b/drivers/pcmcia/pxa2xx_e740.c
@@ -26,20 +26,23 @@
26static struct pcmcia_irqs cd_irqs[] = { 26static struct pcmcia_irqs cd_irqs[] = {
27 { 27 {
28 .sock = 0, 28 .sock = 0,
29 .irq = IRQ_GPIO(GPIO_E740_PCMCIA_CD0),
30 .str = "CF card detect" 29 .str = "CF card detect"
31 }, 30 },
32 { 31 {
33 .sock = 1, 32 .sock = 1,
34 .irq = IRQ_GPIO(GPIO_E740_PCMCIA_CD1),
35 .str = "Wifi switch" 33 .str = "Wifi switch"
36 }, 34 },
37}; 35};
38 36
39static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 37static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
40{ 38{
41 skt->socket.pci_irq = skt->nr == 0 ? IRQ_GPIO(GPIO_E740_PCMCIA_RDY0) : 39 if (skt->nr == 0)
42 IRQ_GPIO(GPIO_E740_PCMCIA_RDY1); 40 skt->socket.pci_irq = gpio_to_irq(GPIO_E740_PCMCIA_RDY0);
41 else
42 skt->socket.pci_irq = gpio_to_irq(GPIO_E740_PCMCIA_RDY1);
43
44 cd_irqs[0].irq = gpio_to_irq(GPIO_E740_PCMCIA_CD0);
45 cd_irqs[1].irq = gpio_to_irq(GPIO_E740_PCMCIA_CD1);
43 46
44 return soc_pcmcia_request_irqs(skt, &cd_irqs[skt->nr], 1); 47 return soc_pcmcia_request_irqs(skt, &cd_irqs[skt->nr], 1);
45} 48}
diff --git a/drivers/pcmcia/pxa2xx_palmld.c b/drivers/pcmcia/pxa2xx_palmld.c
index d589ad1dcd4c..6a8e011a8c13 100644
--- a/drivers/pcmcia/pxa2xx_palmld.c
+++ b/drivers/pcmcia/pxa2xx_palmld.c
@@ -33,7 +33,7 @@ static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
33 ret = gpio_request_array(palmld_pcmcia_gpios, 33 ret = gpio_request_array(palmld_pcmcia_gpios,
34 ARRAY_SIZE(palmld_pcmcia_gpios)); 34 ARRAY_SIZE(palmld_pcmcia_gpios));
35 35
36 skt->socket.pci_irq = IRQ_GPIO(GPIO_NR_PALMLD_PCMCIA_READY); 36 skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMLD_PCMCIA_READY);
37 37
38 return ret; 38 return ret;
39} 39}
diff --git a/drivers/pcmcia/pxa2xx_palmtc.c b/drivers/pcmcia/pxa2xx_palmtc.c
index 9c6a04b2f71b..9e38de769ba3 100644
--- a/drivers/pcmcia/pxa2xx_palmtc.c
+++ b/drivers/pcmcia/pxa2xx_palmtc.c
@@ -37,7 +37,7 @@ static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
37 ret = gpio_request_array(palmtc_pcmcia_gpios, 37 ret = gpio_request_array(palmtc_pcmcia_gpios,
38 ARRAY_SIZE(palmtc_pcmcia_gpios)); 38 ARRAY_SIZE(palmtc_pcmcia_gpios));
39 39
40 skt->socket.pci_irq = IRQ_GPIO(GPIO_NR_PALMTC_PCMCIA_READY); 40 skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMTC_PCMCIA_READY);
41 41
42 return ret; 42 return ret;
43} 43}
diff --git a/drivers/pcmcia/pxa2xx_stargate2.c b/drivers/pcmcia/pxa2xx_stargate2.c
index 939622251dfb..6c2366b74a35 100644
--- a/drivers/pcmcia/pxa2xx_stargate2.c
+++ b/drivers/pcmcia/pxa2xx_stargate2.c
@@ -34,7 +34,7 @@
34#define SG2_S0_GPIO_READY 81 34#define SG2_S0_GPIO_READY 81
35 35
36static struct pcmcia_irqs irqs[] = { 36static struct pcmcia_irqs irqs[] = {
37 { 0, IRQ_GPIO(SG2_S0_GPIO_DETECT), "PCMCIA0 CD" }, 37 {.sock = 0, .str = "PCMCIA0 CD" },
38}; 38};
39 39
40static struct gpio sg2_pcmcia_gpios[] = { 40static struct gpio sg2_pcmcia_gpios[] = {
@@ -44,7 +44,9 @@ static struct gpio sg2_pcmcia_gpios[] = {
44 44
45static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt) 45static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
46{ 46{
47 skt->socket.pci_irq = IRQ_GPIO(SG2_S0_GPIO_READY); 47 skt->socket.pci_irq = gpio_to_irq(SG2_S0_GPIO_READY);
48 irqs[0].irq = gpio_to_irq(SG2_S0_GPIO_DETECT);
49
48 return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); 50 return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
49} 51}
50 52
diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c
index 57ddb969d888..7c33f898135a 100644
--- a/drivers/pcmcia/pxa2xx_trizeps4.c
+++ b/drivers/pcmcia/pxa2xx_trizeps4.c
@@ -30,7 +30,7 @@
30extern void board_pcmcia_power(int power); 30extern void board_pcmcia_power(int power);
31 31
32static struct pcmcia_irqs irqs[] = { 32static struct pcmcia_irqs irqs[] = {
33 { 0, IRQ_GPIO(GPIO_PCD), "cs0_cd" } 33 { .sock = 0, .str = "cs0_cd" }
34 /* on other baseboards we can have more inputs */ 34 /* on other baseboards we can have more inputs */
35}; 35};
36 36
@@ -53,7 +53,8 @@ static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
53 gpio_free(GPIO_PRDY); 53 gpio_free(GPIO_PRDY);
54 return -EINVAL; 54 return -EINVAL;
55 } 55 }
56 skt->socket.pci_irq = IRQ_GPIO(GPIO_PRDY); 56 skt->socket.pci_irq = gpio_to_irq(GPIO_PRDY);
57 irqs[0].irq = gpio_to_irq(GPIO_PCD);
57 break; 58 break;
58 default: 59 default:
59 break; 60 break;
diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c
index 66ab92cf3105..61b17d235dbe 100644
--- a/drivers/pcmcia/pxa2xx_vpac270.c
+++ b/drivers/pcmcia/pxa2xx_vpac270.c
@@ -38,12 +38,10 @@ static struct gpio vpac270_cf_gpios[] = {
38static struct pcmcia_irqs cd_irqs[] = { 38static struct pcmcia_irqs cd_irqs[] = {
39 { 39 {
40 .sock = 0, 40 .sock = 0,
41 .irq = IRQ_GPIO(GPIO84_VPAC270_PCMCIA_CD),
42 .str = "PCMCIA CD" 41 .str = "PCMCIA CD"
43 }, 42 },
44 { 43 {
45 .sock = 1, 44 .sock = 1,
46 .irq = IRQ_GPIO(GPIO17_VPAC270_CF_CD),
47 .str = "CF CD" 45 .str = "CF CD"
48 }, 46 },
49}; 47};
@@ -57,6 +55,7 @@ static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
57 ARRAY_SIZE(vpac270_pcmcia_gpios)); 55 ARRAY_SIZE(vpac270_pcmcia_gpios));
58 56
59 skt->socket.pci_irq = gpio_to_irq(GPIO35_VPAC270_PCMCIA_RDY); 57 skt->socket.pci_irq = gpio_to_irq(GPIO35_VPAC270_PCMCIA_RDY);
58 cd_irqs[0].irq = gpio_to_irq(GPIO84_VPAC270_PCMCIA_CD);
60 59
61 if (!ret) 60 if (!ret)
62 ret = soc_pcmcia_request_irqs(skt, &cd_irqs[0], 1); 61 ret = soc_pcmcia_request_irqs(skt, &cd_irqs[0], 1);
@@ -65,6 +64,7 @@ static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
65 ARRAY_SIZE(vpac270_cf_gpios)); 64 ARRAY_SIZE(vpac270_cf_gpios));
66 65
67 skt->socket.pci_irq = gpio_to_irq(GPIO12_VPAC270_CF_RDY); 66 skt->socket.pci_irq = gpio_to_irq(GPIO12_VPAC270_CF_RDY);
67 cd_irqs[1].irq = gpio_to_irq(GPIO17_VPAC270_CF_CD);
68 68
69 if (!ret) 69 if (!ret)
70 ret = soc_pcmcia_request_irqs(skt, &cd_irqs[1], 1); 70 ret = soc_pcmcia_request_irqs(skt, &cd_irqs[1], 1);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 53eb4e55b289..877cf6fdcf24 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -774,7 +774,7 @@ config RTC_DRV_EP93XX
774 774
775config RTC_DRV_SA1100 775config RTC_DRV_SA1100
776 tristate "SA11x0/PXA2xx" 776 tristate "SA11x0/PXA2xx"
777 depends on ARCH_SA1100 || ARCH_PXA 777 depends on ARCH_SA1100 || ARCH_PXA || ARCH_MMP
778 help 778 help
779 If you say Y here you will get access to the real time clock 779 If you say Y here you will get access to the real time clock
780 built into your SA11x0 or PXA2xx CPU. 780 built into your SA11x0 or PXA2xx CPU.
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index e39b77a4609a..dc474bc6522d 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -32,11 +32,17 @@
32 32
33#include <mach/at91_rtc.h> 33#include <mach/at91_rtc.h>
34 34
35#define at91_rtc_read(field) \
36 __raw_readl(at91_rtc_regs + field)
37#define at91_rtc_write(field, val) \
38 __raw_writel((val), at91_rtc_regs + field)
35 39
36#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ 40#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */
37 41
38static DECLARE_COMPLETION(at91_rtc_updated); 42static DECLARE_COMPLETION(at91_rtc_updated);
39static unsigned int at91_alarm_year = AT91_RTC_EPOCH; 43static unsigned int at91_alarm_year = AT91_RTC_EPOCH;
44static void __iomem *at91_rtc_regs;
45static int irq;
40 46
41/* 47/*
42 * Decode time/date into rtc_time structure 48 * Decode time/date into rtc_time structure
@@ -48,10 +54,10 @@ static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
48 54
49 /* must read twice in case it changes */ 55 /* must read twice in case it changes */
50 do { 56 do {
51 time = at91_sys_read(timereg); 57 time = at91_rtc_read(timereg);
52 date = at91_sys_read(calreg); 58 date = at91_rtc_read(calreg);
53 } while ((time != at91_sys_read(timereg)) || 59 } while ((time != at91_rtc_read(timereg)) ||
54 (date != at91_sys_read(calreg))); 60 (date != at91_rtc_read(calreg)));
55 61
56 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); 62 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0);
57 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); 63 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8);
@@ -98,19 +104,19 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
98 tm->tm_hour, tm->tm_min, tm->tm_sec); 104 tm->tm_hour, tm->tm_min, tm->tm_sec);
99 105
100 /* Stop Time/Calendar from counting */ 106 /* Stop Time/Calendar from counting */
101 cr = at91_sys_read(AT91_RTC_CR); 107 cr = at91_rtc_read(AT91_RTC_CR);
102 at91_sys_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); 108 at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);
103 109
104 at91_sys_write(AT91_RTC_IER, AT91_RTC_ACKUPD); 110 at91_rtc_write(AT91_RTC_IER, AT91_RTC_ACKUPD);
105 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ 111 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */
106 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); 112 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD);
107 113
108 at91_sys_write(AT91_RTC_TIMR, 114 at91_rtc_write(AT91_RTC_TIMR,
109 bin2bcd(tm->tm_sec) << 0 115 bin2bcd(tm->tm_sec) << 0
110 | bin2bcd(tm->tm_min) << 8 116 | bin2bcd(tm->tm_min) << 8
111 | bin2bcd(tm->tm_hour) << 16); 117 | bin2bcd(tm->tm_hour) << 16);
112 118
113 at91_sys_write(AT91_RTC_CALR, 119 at91_rtc_write(AT91_RTC_CALR,
114 bin2bcd((tm->tm_year + 1900) / 100) /* century */ 120 bin2bcd((tm->tm_year + 1900) / 100) /* century */
115 | bin2bcd(tm->tm_year % 100) << 8 /* year */ 121 | bin2bcd(tm->tm_year % 100) << 8 /* year */
116 | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ 122 | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */
@@ -118,8 +124,8 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
118 | bin2bcd(tm->tm_mday) << 24); 124 | bin2bcd(tm->tm_mday) << 24);
119 125
120 /* Restart Time/Calendar */ 126 /* Restart Time/Calendar */
121 cr = at91_sys_read(AT91_RTC_CR); 127 cr = at91_rtc_read(AT91_RTC_CR);
122 at91_sys_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); 128 at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
123 129
124 return 0; 130 return 0;
125} 131}
@@ -135,7 +141,7 @@ static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
135 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); 141 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
136 tm->tm_year = at91_alarm_year - 1900; 142 tm->tm_year = at91_alarm_year - 1900;
137 143
138 alrm->enabled = (at91_sys_read(AT91_RTC_IMR) & AT91_RTC_ALARM) 144 alrm->enabled = (at91_rtc_read(AT91_RTC_IMR) & AT91_RTC_ALARM)
139 ? 1 : 0; 145 ? 1 : 0;
140 146
141 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 147 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
@@ -160,20 +166,20 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
160 tm.tm_min = alrm->time.tm_min; 166 tm.tm_min = alrm->time.tm_min;
161 tm.tm_sec = alrm->time.tm_sec; 167 tm.tm_sec = alrm->time.tm_sec;
162 168
163 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); 169 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM);
164 at91_sys_write(AT91_RTC_TIMALR, 170 at91_rtc_write(AT91_RTC_TIMALR,
165 bin2bcd(tm.tm_sec) << 0 171 bin2bcd(tm.tm_sec) << 0
166 | bin2bcd(tm.tm_min) << 8 172 | bin2bcd(tm.tm_min) << 8
167 | bin2bcd(tm.tm_hour) << 16 173 | bin2bcd(tm.tm_hour) << 16
168 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); 174 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
169 at91_sys_write(AT91_RTC_CALALR, 175 at91_rtc_write(AT91_RTC_CALALR,
170 bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ 176 bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */
171 | bin2bcd(tm.tm_mday) << 24 177 | bin2bcd(tm.tm_mday) << 24
172 | AT91_RTC_DATEEN | AT91_RTC_MTHEN); 178 | AT91_RTC_DATEEN | AT91_RTC_MTHEN);
173 179
174 if (alrm->enabled) { 180 if (alrm->enabled) {
175 at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 181 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
176 at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); 182 at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM);
177 } 183 }
178 184
179 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 185 pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
@@ -188,10 +194,10 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
188 pr_debug("%s(): cmd=%08x\n", __func__, enabled); 194 pr_debug("%s(): cmd=%08x\n", __func__, enabled);
189 195
190 if (enabled) { 196 if (enabled) {
191 at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 197 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
192 at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); 198 at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM);
193 } else 199 } else
194 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); 200 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM);
195 201
196 return 0; 202 return 0;
197} 203}
@@ -200,7 +206,7 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
200 */ 206 */
201static int at91_rtc_proc(struct device *dev, struct seq_file *seq) 207static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
202{ 208{
203 unsigned long imr = at91_sys_read(AT91_RTC_IMR); 209 unsigned long imr = at91_rtc_read(AT91_RTC_IMR);
204 210
205 seq_printf(seq, "update_IRQ\t: %s\n", 211 seq_printf(seq, "update_IRQ\t: %s\n",
206 (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); 212 (imr & AT91_RTC_ACKUPD) ? "yes" : "no");
@@ -220,7 +226,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
220 unsigned int rtsr; 226 unsigned int rtsr;
221 unsigned long events = 0; 227 unsigned long events = 0;
222 228
223 rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR); 229 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read(AT91_RTC_IMR);
224 if (rtsr) { /* this interrupt is shared! Is it ours? */ 230 if (rtsr) { /* this interrupt is shared! Is it ours? */
225 if (rtsr & AT91_RTC_ALARM) 231 if (rtsr & AT91_RTC_ALARM)
226 events |= (RTC_AF | RTC_IRQF); 232 events |= (RTC_AF | RTC_IRQF);
@@ -229,7 +235,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
229 if (rtsr & AT91_RTC_ACKUPD) 235 if (rtsr & AT91_RTC_ACKUPD)
230 complete(&at91_rtc_updated); 236 complete(&at91_rtc_updated);
231 237
232 at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ 238 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
233 239
234 rtc_update_irq(rtc, 1, events); 240 rtc_update_irq(rtc, 1, events);
235 241
@@ -256,22 +262,41 @@ static const struct rtc_class_ops at91_rtc_ops = {
256static int __init at91_rtc_probe(struct platform_device *pdev) 262static int __init at91_rtc_probe(struct platform_device *pdev)
257{ 263{
258 struct rtc_device *rtc; 264 struct rtc_device *rtc;
259 int ret; 265 struct resource *regs;
266 int ret = 0;
260 267
261 at91_sys_write(AT91_RTC_CR, 0); 268 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
262 at91_sys_write(AT91_RTC_MR, 0); /* 24 hour mode */ 269 if (!regs) {
270 dev_err(&pdev->dev, "no mmio resource defined\n");
271 return -ENXIO;
272 }
273
274 irq = platform_get_irq(pdev, 0);
275 if (irq < 0) {
276 dev_err(&pdev->dev, "no irq resource defined\n");
277 return -ENXIO;
278 }
279
280 at91_rtc_regs = ioremap(regs->start, resource_size(regs));
281 if (!at91_rtc_regs) {
282 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
283 return -ENOMEM;
284 }
285
286 at91_rtc_write(AT91_RTC_CR, 0);
287 at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */
263 288
264 /* Disable all interrupts */ 289 /* Disable all interrupts */
265 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | 290 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
266 AT91_RTC_SECEV | AT91_RTC_TIMEV | 291 AT91_RTC_SECEV | AT91_RTC_TIMEV |
267 AT91_RTC_CALEV); 292 AT91_RTC_CALEV);
268 293
269 ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt, 294 ret = request_irq(irq, at91_rtc_interrupt,
270 IRQF_SHARED, 295 IRQF_SHARED,
271 "at91_rtc", pdev); 296 "at91_rtc", pdev);
272 if (ret) { 297 if (ret) {
273 printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", 298 printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n",
274 AT91_ID_SYS); 299 irq);
275 return ret; 300 return ret;
276 } 301 }
277 302
@@ -284,7 +309,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
284 rtc = rtc_device_register(pdev->name, &pdev->dev, 309 rtc = rtc_device_register(pdev->name, &pdev->dev,
285 &at91_rtc_ops, THIS_MODULE); 310 &at91_rtc_ops, THIS_MODULE);
286 if (IS_ERR(rtc)) { 311 if (IS_ERR(rtc)) {
287 free_irq(AT91_ID_SYS, pdev); 312 free_irq(irq, pdev);
288 return PTR_ERR(rtc); 313 return PTR_ERR(rtc);
289 } 314 }
290 platform_set_drvdata(pdev, rtc); 315 platform_set_drvdata(pdev, rtc);
@@ -301,10 +326,10 @@ static int __exit at91_rtc_remove(struct platform_device *pdev)
301 struct rtc_device *rtc = platform_get_drvdata(pdev); 326 struct rtc_device *rtc = platform_get_drvdata(pdev);
302 327
303 /* Disable all interrupts */ 328 /* Disable all interrupts */
304 at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | 329 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
305 AT91_RTC_SECEV | AT91_RTC_TIMEV | 330 AT91_RTC_SECEV | AT91_RTC_TIMEV |
306 AT91_RTC_CALEV); 331 AT91_RTC_CALEV);
307 free_irq(AT91_ID_SYS, pdev); 332 free_irq(irq, pdev);
308 333
309 rtc_device_unregister(rtc); 334 rtc_device_unregister(rtc);
310 platform_set_drvdata(pdev, NULL); 335 platform_set_drvdata(pdev, NULL);
@@ -323,13 +348,13 @@ static int at91_rtc_suspend(struct device *dev)
323 /* this IRQ is shared with DBGU and other hardware which isn't 348 /* this IRQ is shared with DBGU and other hardware which isn't
324 * necessarily doing PM like we are... 349 * necessarily doing PM like we are...
325 */ 350 */
326 at91_rtc_imr = at91_sys_read(AT91_RTC_IMR) 351 at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR)
327 & (AT91_RTC_ALARM|AT91_RTC_SECEV); 352 & (AT91_RTC_ALARM|AT91_RTC_SECEV);
328 if (at91_rtc_imr) { 353 if (at91_rtc_imr) {
329 if (device_may_wakeup(dev)) 354 if (device_may_wakeup(dev))
330 enable_irq_wake(AT91_ID_SYS); 355 enable_irq_wake(irq);
331 else 356 else
332 at91_sys_write(AT91_RTC_IDR, at91_rtc_imr); 357 at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr);
333 } 358 }
334 return 0; 359 return 0;
335} 360}
@@ -338,9 +363,9 @@ static int at91_rtc_resume(struct device *dev)
338{ 363{
339 if (at91_rtc_imr) { 364 if (at91_rtc_imr) {
340 if (device_may_wakeup(dev)) 365 if (device_may_wakeup(dev))
341 disable_irq_wake(AT91_ID_SYS); 366 disable_irq_wake(irq);
342 else 367 else
343 at91_sys_write(AT91_RTC_IER, at91_rtc_imr); 368 at91_rtc_write(AT91_RTC_IER, at91_rtc_imr);
344 } 369 }
345 return 0; 370 return 0;
346} 371}
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 5b979d9cc332..175067a17c46 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -25,6 +25,7 @@
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/log2.h> 26#include <linux/log2.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/of.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
@@ -507,7 +508,13 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
507 goto err_nortc; 508 goto err_nortc;
508 } 509 }
509 510
510 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; 511#ifdef CONFIG_OF
512 if (pdev->dev.of_node)
513 s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
514 "samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
515 else
516#endif
517 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
511 518
512 /* Check RTC Time */ 519 /* Check RTC Time */
513 520
@@ -629,6 +636,17 @@ static int s3c_rtc_resume(struct platform_device *pdev)
629#define s3c_rtc_resume NULL 636#define s3c_rtc_resume NULL
630#endif 637#endif
631 638
639#ifdef CONFIG_OF
640static const struct of_device_id s3c_rtc_dt_match[] = {
641 { .compatible = "samsung,s3c2410-rtc" },
642 { .compatible = "samsung,s3c6410-rtc" },
643 {},
644};
645MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
646#else
647#define s3c_rtc_dt_match NULL
648#endif
649
632static struct platform_device_id s3c_rtc_driver_ids[] = { 650static struct platform_device_id s3c_rtc_driver_ids[] = {
633 { 651 {
634 .name = "s3c2410-rtc", 652 .name = "s3c2410-rtc",
@@ -651,6 +669,7 @@ static struct platform_driver s3c_rtc_driver = {
651 .driver = { 669 .driver = {
652 .name = "s3c-rtc", 670 .name = "s3c-rtc",
653 .owner = THIS_MODULE, 671 .owner = THIS_MODULE,
672 .of_match_table = s3c_rtc_dt_match,
654 }, 673 },
655}; 674};
656 675
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c
index 0b40bb88a884..fc1ffe97fca1 100644
--- a/drivers/rtc/rtc-sa1100.c
+++ b/drivers/rtc/rtc-sa1100.c
@@ -27,35 +27,42 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/fs.h> 28#include <linux/fs.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/string.h>
31#include <linux/pm.h> 30#include <linux/pm.h>
32#include <linux/bitops.h> 31#include <linux/slab.h>
32#include <linux/clk.h>
33#include <linux/io.h>
33 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/irq.h> 36#include <asm/irq.h>
36 37
37#ifdef CONFIG_ARCH_PXA
38#include <mach/regs-rtc.h>
39#include <mach/regs-ost.h>
40#endif
41
42#define RTC_DEF_DIVIDER (32768 - 1) 38#define RTC_DEF_DIVIDER (32768 - 1)
43#define RTC_DEF_TRIM 0 39#define RTC_DEF_TRIM 0
44 40#define RTC_FREQ 1024
45static const unsigned long RTC_FREQ = 1024; 41
46static struct rtc_time rtc_alarm; 42#define RCNR 0x00 /* RTC Count Register */
47static DEFINE_SPINLOCK(sa1100_rtc_lock); 43#define RTAR 0x04 /* RTC Alarm Register */
48 44#define RTSR 0x08 /* RTC Status Register */
49static inline int rtc_periodic_alarm(struct rtc_time *tm) 45#define RTTR 0x0c /* RTC Timer Trim Register */
50{ 46
51 return (tm->tm_year == -1) || 47#define RTSR_HZE (1 << 3) /* HZ interrupt enable */
52 ((unsigned)tm->tm_mon >= 12) || 48#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
53 ((unsigned)(tm->tm_mday - 1) >= 31) || 49#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
54 ((unsigned)tm->tm_hour > 23) || 50#define RTSR_AL (1 << 0) /* RTC alarm detected */
55 ((unsigned)tm->tm_min > 59) || 51
56 ((unsigned)tm->tm_sec > 59); 52#define rtc_readl(sa1100_rtc, reg) \
57} 53 readl_relaxed((sa1100_rtc)->base + (reg))
58 54#define rtc_writel(sa1100_rtc, reg, value) \
55 writel_relaxed((value), (sa1100_rtc)->base + (reg))
56
57struct sa1100_rtc {
58 struct resource *ress;
59 void __iomem *base;
60 struct clk *clk;
61 int irq_1Hz;
62 int irq_Alrm;
63 struct rtc_device *rtc;
64 spinlock_t lock; /* Protects this structure */
65};
59/* 66/*
60 * Calculate the next alarm time given the requested alarm time mask 67 * Calculate the next alarm time given the requested alarm time mask
61 * and the current time. 68 * and the current time.
@@ -83,46 +90,26 @@ static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
83 } 90 }
84} 91}
85 92
86static int rtc_update_alarm(struct rtc_time *alrm)
87{
88 struct rtc_time alarm_tm, now_tm;
89 unsigned long now, time;
90 int ret;
91
92 do {
93 now = RCNR;
94 rtc_time_to_tm(now, &now_tm);
95 rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
96 ret = rtc_tm_to_time(&alarm_tm, &time);
97 if (ret != 0)
98 break;
99
100 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
101 RTAR = time;
102 } while (now != RCNR);
103
104 return ret;
105}
106
107static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) 93static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
108{ 94{
109 struct platform_device *pdev = to_platform_device(dev_id); 95 struct platform_device *pdev = to_platform_device(dev_id);
110 struct rtc_device *rtc = platform_get_drvdata(pdev); 96 struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
111 unsigned int rtsr; 97 unsigned int rtsr;
112 unsigned long events = 0; 98 unsigned long events = 0;
113 99
114 spin_lock(&sa1100_rtc_lock); 100 spin_lock(&sa1100_rtc->lock);
115 101
116 rtsr = RTSR;
117 /* clear interrupt sources */ 102 /* clear interrupt sources */
118 RTSR = 0; 103 rtsr = rtc_readl(sa1100_rtc, RTSR);
104 rtc_writel(sa1100_rtc, RTSR, 0);
105
119 /* Fix for a nasty initialization problem the in SA11xx RTSR register. 106 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
120 * See also the comments in sa1100_rtc_probe(). */ 107 * See also the comments in sa1100_rtc_probe(). */
121 if (rtsr & (RTSR_ALE | RTSR_HZE)) { 108 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
122 /* This is the original code, before there was the if test 109 /* This is the original code, before there was the if test
123 * above. This code does not clear interrupts that were not 110 * above. This code does not clear interrupts that were not
124 * enabled. */ 111 * enabled. */
125 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); 112 rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ) & (rtsr >> 2));
126 } else { 113 } else {
127 /* For some reason, it is possible to enter this routine 114 /* For some reason, it is possible to enter this routine
128 * without interruptions enabled, it has been tested with 115 * without interruptions enabled, it has been tested with
@@ -131,13 +118,13 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
131 * This situation leads to an infinite "loop" of interrupt 118 * This situation leads to an infinite "loop" of interrupt
132 * routine calling and as a result the processor seems to 119 * routine calling and as a result the processor seems to
133 * lock on its first call to open(). */ 120 * lock on its first call to open(). */
134 RTSR = RTSR_AL | RTSR_HZ; 121 rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
135 } 122 }
136 123
137 /* clear alarm interrupt if it has occurred */ 124 /* clear alarm interrupt if it has occurred */
138 if (rtsr & RTSR_AL) 125 if (rtsr & RTSR_AL)
139 rtsr &= ~RTSR_ALE; 126 rtsr &= ~RTSR_ALE;
140 RTSR = rtsr & (RTSR_ALE | RTSR_HZE); 127 rtc_writel(sa1100_rtc, RTSR, rtsr & (RTSR_ALE | RTSR_HZE));
141 128
142 /* update irq data & counter */ 129 /* update irq data & counter */
143 if (rtsr & RTSR_AL) 130 if (rtsr & RTSR_AL)
@@ -145,91 +132,100 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
145 if (rtsr & RTSR_HZ) 132 if (rtsr & RTSR_HZ)
146 events |= RTC_UF | RTC_IRQF; 133 events |= RTC_UF | RTC_IRQF;
147 134
148 rtc_update_irq(rtc, 1, events); 135 rtc_update_irq(sa1100_rtc->rtc, 1, events);
149 136
150 if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm)) 137 spin_unlock(&sa1100_rtc->lock);
151 rtc_update_alarm(&rtc_alarm);
152
153 spin_unlock(&sa1100_rtc_lock);
154 138
155 return IRQ_HANDLED; 139 return IRQ_HANDLED;
156} 140}
157 141
158static int sa1100_rtc_open(struct device *dev) 142static int sa1100_rtc_open(struct device *dev)
159{ 143{
144 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
160 int ret; 145 int ret;
161 struct platform_device *plat_dev = to_platform_device(dev);
162 struct rtc_device *rtc = platform_get_drvdata(plat_dev);
163 146
164 ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED, 147 ret = request_irq(sa1100_rtc->irq_1Hz, sa1100_rtc_interrupt,
165 "rtc 1Hz", dev); 148 IRQF_DISABLED, "rtc 1Hz", dev);
166 if (ret) { 149 if (ret) {
167 dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz); 150 dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_1Hz);
168 goto fail_ui; 151 goto fail_ui;
169 } 152 }
170 ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED, 153 ret = request_irq(sa1100_rtc->irq_Alrm, sa1100_rtc_interrupt,
171 "rtc Alrm", dev); 154 IRQF_DISABLED, "rtc Alrm", dev);
172 if (ret) { 155 if (ret) {
173 dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm); 156 dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_Alrm);
174 goto fail_ai; 157 goto fail_ai;
175 } 158 }
176 rtc->max_user_freq = RTC_FREQ; 159 sa1100_rtc->rtc->max_user_freq = RTC_FREQ;
177 rtc_irq_set_freq(rtc, NULL, RTC_FREQ); 160 rtc_irq_set_freq(sa1100_rtc->rtc, NULL, RTC_FREQ);
178 161
179 return 0; 162 return 0;
180 163
181 fail_ai: 164 fail_ai:
182 free_irq(IRQ_RTC1Hz, dev); 165 free_irq(sa1100_rtc->irq_1Hz, dev);
183 fail_ui: 166 fail_ui:
184 return ret; 167 return ret;
185} 168}
186 169
187static void sa1100_rtc_release(struct device *dev) 170static void sa1100_rtc_release(struct device *dev)
188{ 171{
189 spin_lock_irq(&sa1100_rtc_lock); 172 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
190 RTSR = 0; 173
191 OIER &= ~OIER_E1; 174 spin_lock_irq(&sa1100_rtc->lock);
192 OSSR = OSSR_M1; 175 rtc_writel(sa1100_rtc, RTSR, 0);
193 spin_unlock_irq(&sa1100_rtc_lock); 176 spin_unlock_irq(&sa1100_rtc->lock);
194 177
195 free_irq(IRQ_RTCAlrm, dev); 178 free_irq(sa1100_rtc->irq_Alrm, dev);
196 free_irq(IRQ_RTC1Hz, dev); 179 free_irq(sa1100_rtc->irq_1Hz, dev);
197} 180}
198 181
199static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 182static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
200{ 183{
201 spin_lock_irq(&sa1100_rtc_lock); 184 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
185 unsigned int rtsr;
186
187 spin_lock_irq(&sa1100_rtc->lock);
188
189 rtsr = rtc_readl(sa1100_rtc, RTSR);
202 if (enabled) 190 if (enabled)
203 RTSR |= RTSR_ALE; 191 rtsr |= RTSR_ALE;
204 else 192 else
205 RTSR &= ~RTSR_ALE; 193 rtsr &= ~RTSR_ALE;
206 spin_unlock_irq(&sa1100_rtc_lock); 194 rtc_writel(sa1100_rtc, RTSR, rtsr);
195
196 spin_unlock_irq(&sa1100_rtc->lock);
207 return 0; 197 return 0;
208} 198}
209 199
210static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) 200static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
211{ 201{
212 rtc_time_to_tm(RCNR, tm); 202 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
203
204 rtc_time_to_tm(rtc_readl(sa1100_rtc, RCNR), tm);
213 return 0; 205 return 0;
214} 206}
215 207
216static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) 208static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
217{ 209{
210 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
218 unsigned long time; 211 unsigned long time;
219 int ret; 212 int ret;
220 213
221 ret = rtc_tm_to_time(tm, &time); 214 ret = rtc_tm_to_time(tm, &time);
222 if (ret == 0) 215 if (ret == 0)
223 RCNR = time; 216 rtc_writel(sa1100_rtc, RCNR, time);
224 return ret; 217 return ret;
225} 218}
226 219
227static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 220static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
228{ 221{
229 u32 rtsr; 222 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
223 unsigned long time;
224 unsigned int rtsr;
230 225
231 memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time)); 226 time = rtc_readl(sa1100_rtc, RCNR);
232 rtsr = RTSR; 227 rtc_time_to_tm(time, &alrm->time);
228 rtsr = rtc_readl(sa1100_rtc, RTSR);
233 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; 229 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
234 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; 230 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
235 return 0; 231 return 0;
@@ -237,26 +233,39 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
237 233
238static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 234static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
239{ 235{
240 int ret; 236 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
237 struct rtc_time now_tm, alarm_tm;
238 unsigned long time, alarm;
239 unsigned int rtsr;
241 240
242 spin_lock_irq(&sa1100_rtc_lock); 241 spin_lock_irq(&sa1100_rtc->lock);
243 ret = rtc_update_alarm(&alrm->time);
244 if (ret == 0) {
245 if (alrm->enabled)
246 RTSR |= RTSR_ALE;
247 else
248 RTSR &= ~RTSR_ALE;
249 }
250 spin_unlock_irq(&sa1100_rtc_lock);
251 242
252 return ret; 243 time = rtc_readl(sa1100_rtc, RCNR);
244 rtc_time_to_tm(time, &now_tm);
245 rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
246 rtc_tm_to_time(&alarm_tm, &alarm);
247 rtc_writel(sa1100_rtc, RTAR, alarm);
248
249 rtsr = rtc_readl(sa1100_rtc, RTSR);
250 if (alrm->enabled)
251 rtsr |= RTSR_ALE;
252 else
253 rtsr &= ~RTSR_ALE;
254 rtc_writel(sa1100_rtc, RTSR, rtsr);
255
256 spin_unlock_irq(&sa1100_rtc->lock);
257
258 return 0;
253} 259}
254 260
255static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) 261static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
256{ 262{
257 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR); 263 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
258 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
259 264
265 seq_printf(seq, "trim/divider\t\t: 0x%08x\n",
266 rtc_readl(sa1100_rtc, RTTR));
267 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n",
268 rtc_readl(sa1100_rtc, RTSR));
260 return 0; 269 return 0;
261} 270}
262 271
@@ -273,7 +282,51 @@ static const struct rtc_class_ops sa1100_rtc_ops = {
273 282
274static int sa1100_rtc_probe(struct platform_device *pdev) 283static int sa1100_rtc_probe(struct platform_device *pdev)
275{ 284{
276 struct rtc_device *rtc; 285 struct sa1100_rtc *sa1100_rtc;
286 unsigned int rttr;
287 int ret;
288
289 sa1100_rtc = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
290 if (!sa1100_rtc)
291 return -ENOMEM;
292
293 spin_lock_init(&sa1100_rtc->lock);
294 platform_set_drvdata(pdev, sa1100_rtc);
295
296 ret = -ENXIO;
297 sa1100_rtc->ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
298 if (!sa1100_rtc->ress) {
299 dev_err(&pdev->dev, "No I/O memory resource defined\n");
300 goto err_ress;
301 }
302
303 sa1100_rtc->irq_1Hz = platform_get_irq(pdev, 0);
304 if (sa1100_rtc->irq_1Hz < 0) {
305 dev_err(&pdev->dev, "No 1Hz IRQ resource defined\n");
306 goto err_ress;
307 }
308 sa1100_rtc->irq_Alrm = platform_get_irq(pdev, 1);
309 if (sa1100_rtc->irq_Alrm < 0) {
310 dev_err(&pdev->dev, "No alarm IRQ resource defined\n");
311 goto err_ress;
312 }
313
314 ret = -ENOMEM;
315 sa1100_rtc->base = ioremap(sa1100_rtc->ress->start,
316 resource_size(sa1100_rtc->ress));
317 if (!sa1100_rtc->base) {
318 dev_err(&pdev->dev, "Unable to map pxa RTC I/O memory\n");
319 goto err_map;
320 }
321
322 sa1100_rtc->clk = clk_get(&pdev->dev, NULL);
323 if (IS_ERR(sa1100_rtc->clk)) {
324 dev_err(&pdev->dev, "failed to find rtc clock source\n");
325 ret = PTR_ERR(sa1100_rtc->clk);
326 goto err_clk;
327 }
328 clk_prepare(sa1100_rtc->clk);
329 clk_enable(sa1100_rtc->clk);
277 330
278 /* 331 /*
279 * According to the manual we should be able to let RTTR be zero 332 * According to the manual we should be able to let RTTR be zero
@@ -282,24 +335,24 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
282 * If the clock divider is uninitialized then reset it to the 335 * If the clock divider is uninitialized then reset it to the
283 * default value to get the 1Hz clock. 336 * default value to get the 1Hz clock.
284 */ 337 */
285 if (RTTR == 0) { 338 if (rtc_readl(sa1100_rtc, RTTR) == 0) {
286 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); 339 rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
287 dev_warn(&pdev->dev, "warning: " 340 rtc_writel(sa1100_rtc, RTTR, rttr);
288 "initializing default clock divider/trim value\n"); 341 dev_warn(&pdev->dev, "warning: initializing default clock"
342 " divider/trim value\n");
289 /* The current RTC value probably doesn't make sense either */ 343 /* The current RTC value probably doesn't make sense either */
290 RCNR = 0; 344 rtc_writel(sa1100_rtc, RCNR, 0);
291 } 345 }
292 346
293 device_init_wakeup(&pdev->dev, 1); 347 device_init_wakeup(&pdev->dev, 1);
294 348
295 rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, 349 sa1100_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
296 THIS_MODULE); 350 &sa1100_rtc_ops, THIS_MODULE);
297 351 if (IS_ERR(sa1100_rtc->rtc)) {
298 if (IS_ERR(rtc)) 352 dev_err(&pdev->dev, "Failed to register RTC device -> %d\n",
299 return PTR_ERR(rtc); 353 ret);
300 354 goto err_rtc_reg;
301 platform_set_drvdata(pdev, rtc); 355 }
302
303 /* Fix for a nasty initialization problem the in SA11xx RTSR register. 356 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
304 * See also the comments in sa1100_rtc_interrupt(). 357 * See also the comments in sa1100_rtc_interrupt().
305 * 358 *
@@ -322,33 +375,46 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
322 * 375 *
323 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to 376 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
324 * the corresponding bits in RTSR. */ 377 * the corresponding bits in RTSR. */
325 RTSR = RTSR_AL | RTSR_HZ; 378 rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
326 379
327 return 0; 380 return 0;
381
382err_rtc_reg:
383err_clk:
384 iounmap(sa1100_rtc->base);
385err_ress:
386err_map:
387 kfree(sa1100_rtc);
388 return ret;
328} 389}
329 390
330static int sa1100_rtc_remove(struct platform_device *pdev) 391static int sa1100_rtc_remove(struct platform_device *pdev)
331{ 392{
332 struct rtc_device *rtc = platform_get_drvdata(pdev); 393 struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
333
334 if (rtc)
335 rtc_device_unregister(rtc);
336 394
395 rtc_device_unregister(sa1100_rtc->rtc);
396 clk_disable(sa1100_rtc->clk);
397 clk_unprepare(sa1100_rtc->clk);
398 iounmap(sa1100_rtc->base);
337 return 0; 399 return 0;
338} 400}
339 401
340#ifdef CONFIG_PM 402#ifdef CONFIG_PM
341static int sa1100_rtc_suspend(struct device *dev) 403static int sa1100_rtc_suspend(struct device *dev)
342{ 404{
405 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
406
343 if (device_may_wakeup(dev)) 407 if (device_may_wakeup(dev))
344 enable_irq_wake(IRQ_RTCAlrm); 408 enable_irq_wake(sa1100_rtc->irq_Alrm);
345 return 0; 409 return 0;
346} 410}
347 411
348static int sa1100_rtc_resume(struct device *dev) 412static int sa1100_rtc_resume(struct device *dev)
349{ 413{
414 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
415
350 if (device_may_wakeup(dev)) 416 if (device_may_wakeup(dev))
351 disable_irq_wake(IRQ_RTCAlrm); 417 disable_irq_wake(sa1100_rtc->irq_Alrm);
352 return 0; 418 return 0;
353} 419}
354 420
diff --git a/drivers/s390/block/dasd_3990_erp.c b/drivers/s390/block/dasd_3990_erp.c
index 87a0cf160fe5..0326571e7ffa 100644
--- a/drivers/s390/block/dasd_3990_erp.c
+++ b/drivers/s390/block/dasd_3990_erp.c
@@ -1718,7 +1718,7 @@ dasd_3990_erp_action_1B_32(struct dasd_ccw_req * default_erp, char *sense)
1718 erp->startdev = device; 1718 erp->startdev = device;
1719 erp->memdev = device; 1719 erp->memdev = device;
1720 erp->magic = default_erp->magic; 1720 erp->magic = default_erp->magic;
1721 erp->expires = 0; 1721 erp->expires = default_erp->expires;
1722 erp->retries = 256; 1722 erp->retries = 256;
1723 erp->buildclk = get_clock(); 1723 erp->buildclk = get_clock();
1724 erp->status = DASD_CQR_FILLED; 1724 erp->status = DASD_CQR_FILLED;
@@ -2363,7 +2363,7 @@ static struct dasd_ccw_req *dasd_3990_erp_add_erp(struct dasd_ccw_req *cqr)
2363 erp->memdev = device; 2363 erp->memdev = device;
2364 erp->block = cqr->block; 2364 erp->block = cqr->block;
2365 erp->magic = cqr->magic; 2365 erp->magic = cqr->magic;
2366 erp->expires = 0; 2366 erp->expires = cqr->expires;
2367 erp->retries = 256; 2367 erp->retries = 256;
2368 erp->buildclk = get_clock(); 2368 erp->buildclk = get_clock();
2369 erp->status = DASD_CQR_FILLED; 2369 erp->status = DASD_CQR_FILLED;
diff --git a/drivers/s390/block/dasd_alias.c b/drivers/s390/block/dasd_alias.c
index c388eda1e2b1..553b3c5abb0a 100644
--- a/drivers/s390/block/dasd_alias.c
+++ b/drivers/s390/block/dasd_alias.c
@@ -705,6 +705,16 @@ struct dasd_device *dasd_alias_get_start_dev(struct dasd_device *base_device)
705 if (lcu->pav == NO_PAV || 705 if (lcu->pav == NO_PAV ||
706 lcu->flags & (NEED_UAC_UPDATE | UPDATE_PENDING)) 706 lcu->flags & (NEED_UAC_UPDATE | UPDATE_PENDING))
707 return NULL; 707 return NULL;
708 if (unlikely(!(private->features.feature[8] & 0x01))) {
709 /*
710 * PAV enabled but prefix not, very unlikely
711 * seems to be a lost pathgroup
712 * use base device to do IO
713 */
714 DBF_DEV_EVENT(DBF_ERR, base_device, "%s",
715 "Prefix not enabled with PAV enabled\n");
716 return NULL;
717 }
708 718
709 spin_lock_irqsave(&lcu->lock, flags); 719 spin_lock_irqsave(&lcu->lock, flags);
710 alias_device = group->next; 720 alias_device = group->next;
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 6ab29680586a..bbcd5e9206ee 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -752,24 +752,13 @@ dasd_eckd_cdl_reclen(int recid)
752 return sizes_trk0[recid]; 752 return sizes_trk0[recid];
753 return LABEL_SIZE; 753 return LABEL_SIZE;
754} 754}
755 755/* create unique id from private structure. */
756/* 756static void create_uid(struct dasd_eckd_private *private)
757 * Generate device unique id that specifies the physical device.
758 */
759static int dasd_eckd_generate_uid(struct dasd_device *device)
760{ 757{
761 struct dasd_eckd_private *private;
762 struct dasd_uid *uid;
763 int count; 758 int count;
764 unsigned long flags; 759 struct dasd_uid *uid;
765 760
766 private = (struct dasd_eckd_private *) device->private;
767 if (!private)
768 return -ENODEV;
769 if (!private->ned || !private->gneq)
770 return -ENODEV;
771 uid = &private->uid; 761 uid = &private->uid;
772 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
773 memset(uid, 0, sizeof(struct dasd_uid)); 762 memset(uid, 0, sizeof(struct dasd_uid));
774 memcpy(uid->vendor, private->ned->HDA_manufacturer, 763 memcpy(uid->vendor, private->ned->HDA_manufacturer,
775 sizeof(uid->vendor) - 1); 764 sizeof(uid->vendor) - 1);
@@ -792,6 +781,23 @@ static int dasd_eckd_generate_uid(struct dasd_device *device)
792 private->vdsneq->uit[count]); 781 private->vdsneq->uit[count]);
793 } 782 }
794 } 783 }
784}
785
786/*
787 * Generate device unique id that specifies the physical device.
788 */
789static int dasd_eckd_generate_uid(struct dasd_device *device)
790{
791 struct dasd_eckd_private *private;
792 unsigned long flags;
793
794 private = (struct dasd_eckd_private *) device->private;
795 if (!private)
796 return -ENODEV;
797 if (!private->ned || !private->gneq)
798 return -ENODEV;
799 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
800 create_uid(private);
795 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags); 801 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
796 return 0; 802 return 0;
797} 803}
@@ -811,6 +817,21 @@ static int dasd_eckd_get_uid(struct dasd_device *device, struct dasd_uid *uid)
811 return -EINVAL; 817 return -EINVAL;
812} 818}
813 819
820/*
821 * compare device UID with data of a given dasd_eckd_private structure
822 * return 0 for match
823 */
824static int dasd_eckd_compare_path_uid(struct dasd_device *device,
825 struct dasd_eckd_private *private)
826{
827 struct dasd_uid device_uid;
828
829 create_uid(private);
830 dasd_eckd_get_uid(device, &device_uid);
831
832 return memcmp(&device_uid, &private->uid, sizeof(struct dasd_uid));
833}
834
814static void dasd_eckd_fill_rcd_cqr(struct dasd_device *device, 835static void dasd_eckd_fill_rcd_cqr(struct dasd_device *device,
815 struct dasd_ccw_req *cqr, 836 struct dasd_ccw_req *cqr,
816 __u8 *rcd_buffer, 837 __u8 *rcd_buffer,
@@ -1005,59 +1026,120 @@ static int dasd_eckd_read_conf(struct dasd_device *device)
1005 int conf_len, conf_data_saved; 1026 int conf_len, conf_data_saved;
1006 int rc; 1027 int rc;
1007 __u8 lpm, opm; 1028 __u8 lpm, opm;
1008 struct dasd_eckd_private *private; 1029 struct dasd_eckd_private *private, path_private;
1009 struct dasd_path *path_data; 1030 struct dasd_path *path_data;
1031 struct dasd_uid *uid;
1032 char print_path_uid[60], print_device_uid[60];
1010 1033
1011 private = (struct dasd_eckd_private *) device->private; 1034 private = (struct dasd_eckd_private *) device->private;
1012 path_data = &device->path_data; 1035 path_data = &device->path_data;
1013 opm = ccw_device_get_path_mask(device->cdev); 1036 opm = ccw_device_get_path_mask(device->cdev);
1014 lpm = 0x80;
1015 conf_data_saved = 0; 1037 conf_data_saved = 0;
1016 /* get configuration data per operational path */ 1038 /* get configuration data per operational path */
1017 for (lpm = 0x80; lpm; lpm>>= 1) { 1039 for (lpm = 0x80; lpm; lpm>>= 1) {
1018 if (lpm & opm) { 1040 if (!(lpm & opm))
1019 rc = dasd_eckd_read_conf_lpm(device, &conf_data, 1041 continue;
1020 &conf_len, lpm); 1042 rc = dasd_eckd_read_conf_lpm(device, &conf_data,
1021 if (rc && rc != -EOPNOTSUPP) { /* -EOPNOTSUPP is ok */ 1043 &conf_len, lpm);
1022 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, 1044 if (rc && rc != -EOPNOTSUPP) { /* -EOPNOTSUPP is ok */
1023 "Read configuration data returned " 1045 DBF_EVENT_DEVID(DBF_WARNING, device->cdev,
1024 "error %d", rc); 1046 "Read configuration data returned "
1025 return rc; 1047 "error %d", rc);
1026 } 1048 return rc;
1027 if (conf_data == NULL) { 1049 }
1028 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s", 1050 if (conf_data == NULL) {
1029 "No configuration data " 1051 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s",
1030 "retrieved"); 1052 "No configuration data "
1031 /* no further analysis possible */ 1053 "retrieved");
1032 path_data->opm |= lpm; 1054 /* no further analysis possible */
1033 continue; /* no error */ 1055 path_data->opm |= lpm;
1056 continue; /* no error */
1057 }
1058 /* save first valid configuration data */
1059 if (!conf_data_saved) {
1060 kfree(private->conf_data);
1061 private->conf_data = conf_data;
1062 private->conf_len = conf_len;
1063 if (dasd_eckd_identify_conf_parts(private)) {
1064 private->conf_data = NULL;
1065 private->conf_len = 0;
1066 kfree(conf_data);
1067 continue;
1034 } 1068 }
1035 /* save first valid configuration data */ 1069 /*
1036 if (!conf_data_saved) { 1070 * build device UID that other path data
1037 kfree(private->conf_data); 1071 * can be compared to it
1038 private->conf_data = conf_data; 1072 */
1039 private->conf_len = conf_len; 1073 dasd_eckd_generate_uid(device);
1040 if (dasd_eckd_identify_conf_parts(private)) { 1074 conf_data_saved++;
1041 private->conf_data = NULL; 1075 } else {
1042 private->conf_len = 0; 1076 path_private.conf_data = conf_data;
1043 kfree(conf_data); 1077 path_private.conf_len = DASD_ECKD_RCD_DATA_SIZE;
1044 continue; 1078 if (dasd_eckd_identify_conf_parts(
1045 } 1079 &path_private)) {
1046 conf_data_saved++; 1080 path_private.conf_data = NULL;
1081 path_private.conf_len = 0;
1082 kfree(conf_data);
1083 continue;
1047 } 1084 }
1048 switch (dasd_eckd_path_access(conf_data, conf_len)) { 1085
1049 case 0x02: 1086 if (dasd_eckd_compare_path_uid(
1050 path_data->npm |= lpm; 1087 device, &path_private)) {
1051 break; 1088 uid = &path_private.uid;
1052 case 0x03: 1089 if (strlen(uid->vduit) > 0)
1053 path_data->ppm |= lpm; 1090 snprintf(print_path_uid,
1054 break; 1091 sizeof(print_path_uid),
1092 "%s.%s.%04x.%02x.%s",
1093 uid->vendor, uid->serial,
1094 uid->ssid, uid->real_unit_addr,
1095 uid->vduit);
1096 else
1097 snprintf(print_path_uid,
1098 sizeof(print_path_uid),
1099 "%s.%s.%04x.%02x",
1100 uid->vendor, uid->serial,
1101 uid->ssid,
1102 uid->real_unit_addr);
1103 uid = &private->uid;
1104 if (strlen(uid->vduit) > 0)
1105 snprintf(print_device_uid,
1106 sizeof(print_device_uid),
1107 "%s.%s.%04x.%02x.%s",
1108 uid->vendor, uid->serial,
1109 uid->ssid, uid->real_unit_addr,
1110 uid->vduit);
1111 else
1112 snprintf(print_device_uid,
1113 sizeof(print_device_uid),
1114 "%s.%s.%04x.%02x",
1115 uid->vendor, uid->serial,
1116 uid->ssid,
1117 uid->real_unit_addr);
1118 dev_err(&device->cdev->dev,
1119 "Not all channel paths lead to "
1120 "the same device, path %02X leads to "
1121 "device %s instead of %s\n", lpm,
1122 print_path_uid, print_device_uid);
1123 return -EINVAL;
1055 } 1124 }
1056 path_data->opm |= lpm; 1125
1057 if (conf_data != private->conf_data) 1126 path_private.conf_data = NULL;
1058 kfree(conf_data); 1127 path_private.conf_len = 0;
1059 } 1128 }
1129 switch (dasd_eckd_path_access(conf_data, conf_len)) {
1130 case 0x02:
1131 path_data->npm |= lpm;
1132 break;
1133 case 0x03:
1134 path_data->ppm |= lpm;
1135 break;
1136 }
1137 path_data->opm |= lpm;
1138
1139 if (conf_data != private->conf_data)
1140 kfree(conf_data);
1060 } 1141 }
1142
1061 return 0; 1143 return 0;
1062} 1144}
1063 1145
@@ -1090,12 +1172,61 @@ static int verify_fcx_max_data(struct dasd_device *device, __u8 lpm)
1090 return 0; 1172 return 0;
1091} 1173}
1092 1174
1175static int rebuild_device_uid(struct dasd_device *device,
1176 struct path_verification_work_data *data)
1177{
1178 struct dasd_eckd_private *private;
1179 struct dasd_path *path_data;
1180 __u8 lpm, opm;
1181 int rc;
1182
1183 rc = -ENODEV;
1184 private = (struct dasd_eckd_private *) device->private;
1185 path_data = &device->path_data;
1186 opm = device->path_data.opm;
1187
1188 for (lpm = 0x80; lpm; lpm >>= 1) {
1189 if (!(lpm & opm))
1190 continue;
1191 memset(&data->rcd_buffer, 0, sizeof(data->rcd_buffer));
1192 memset(&data->cqr, 0, sizeof(data->cqr));
1193 data->cqr.cpaddr = &data->ccw;
1194 rc = dasd_eckd_read_conf_immediately(device, &data->cqr,
1195 data->rcd_buffer,
1196 lpm);
1197
1198 if (rc) {
1199 if (rc == -EOPNOTSUPP) /* -EOPNOTSUPP is ok */
1200 continue;
1201 DBF_EVENT_DEVID(DBF_WARNING, device->cdev,
1202 "Read configuration data "
1203 "returned error %d", rc);
1204 break;
1205 }
1206 memcpy(private->conf_data, data->rcd_buffer,
1207 DASD_ECKD_RCD_DATA_SIZE);
1208 if (dasd_eckd_identify_conf_parts(private)) {
1209 rc = -ENODEV;
1210 } else /* first valid path is enough */
1211 break;
1212 }
1213
1214 if (!rc)
1215 rc = dasd_eckd_generate_uid(device);
1216
1217 return rc;
1218}
1219
1093static void do_path_verification_work(struct work_struct *work) 1220static void do_path_verification_work(struct work_struct *work)
1094{ 1221{
1095 struct path_verification_work_data *data; 1222 struct path_verification_work_data *data;
1096 struct dasd_device *device; 1223 struct dasd_device *device;
1224 struct dasd_eckd_private path_private;
1225 struct dasd_uid *uid;
1226 __u8 path_rcd_buf[DASD_ECKD_RCD_DATA_SIZE];
1097 __u8 lpm, opm, npm, ppm, epm; 1227 __u8 lpm, opm, npm, ppm, epm;
1098 unsigned long flags; 1228 unsigned long flags;
1229 char print_uid[60];
1099 int rc; 1230 int rc;
1100 1231
1101 data = container_of(work, struct path_verification_work_data, worker); 1232 data = container_of(work, struct path_verification_work_data, worker);
@@ -1112,64 +1243,129 @@ static void do_path_verification_work(struct work_struct *work)
1112 ppm = 0; 1243 ppm = 0;
1113 epm = 0; 1244 epm = 0;
1114 for (lpm = 0x80; lpm; lpm >>= 1) { 1245 for (lpm = 0x80; lpm; lpm >>= 1) {
1115 if (lpm & data->tbvpm) { 1246 if (!(lpm & data->tbvpm))
1116 memset(data->rcd_buffer, 0, sizeof(data->rcd_buffer)); 1247 continue;
1117 memset(&data->cqr, 0, sizeof(data->cqr)); 1248 memset(&data->rcd_buffer, 0, sizeof(data->rcd_buffer));
1118 data->cqr.cpaddr = &data->ccw; 1249 memset(&data->cqr, 0, sizeof(data->cqr));
1119 rc = dasd_eckd_read_conf_immediately(device, &data->cqr, 1250 data->cqr.cpaddr = &data->ccw;
1120 data->rcd_buffer, 1251 rc = dasd_eckd_read_conf_immediately(device, &data->cqr,
1121 lpm); 1252 data->rcd_buffer,
1122 if (!rc) { 1253 lpm);
1123 switch (dasd_eckd_path_access(data->rcd_buffer, 1254 if (!rc) {
1124 DASD_ECKD_RCD_DATA_SIZE)) { 1255 switch (dasd_eckd_path_access(data->rcd_buffer,
1125 case 0x02: 1256 DASD_ECKD_RCD_DATA_SIZE)
1126 npm |= lpm; 1257 ) {
1127 break; 1258 case 0x02:
1128 case 0x03: 1259 npm |= lpm;
1129 ppm |= lpm; 1260 break;
1130 break; 1261 case 0x03:
1131 } 1262 ppm |= lpm;
1132 opm |= lpm; 1263 break;
1133 } else if (rc == -EOPNOTSUPP) { 1264 }
1134 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s", 1265 opm |= lpm;
1135 "path verification: No configuration " 1266 } else if (rc == -EOPNOTSUPP) {
1136 "data retrieved"); 1267 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s",
1137 opm |= lpm; 1268 "path verification: No configuration "
1138 } else if (rc == -EAGAIN) { 1269 "data retrieved");
1139 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s", 1270 opm |= lpm;
1271 } else if (rc == -EAGAIN) {
1272 DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s",
1140 "path verification: device is stopped," 1273 "path verification: device is stopped,"
1141 " try again later"); 1274 " try again later");
1142 epm |= lpm; 1275 epm |= lpm;
1143 } else { 1276 } else {
1144 dev_warn(&device->cdev->dev, 1277 dev_warn(&device->cdev->dev,
1145 "Reading device feature codes failed " 1278 "Reading device feature codes failed "
1146 "(rc=%d) for new path %x\n", rc, lpm); 1279 "(rc=%d) for new path %x\n", rc, lpm);
1147 continue; 1280 continue;
1148 } 1281 }
1149 if (verify_fcx_max_data(device, lpm)) { 1282 if (verify_fcx_max_data(device, lpm)) {
1283 opm &= ~lpm;
1284 npm &= ~lpm;
1285 ppm &= ~lpm;
1286 continue;
1287 }
1288
1289 /*
1290 * save conf_data for comparison after
1291 * rebuild_device_uid may have changed
1292 * the original data
1293 */
1294 memcpy(&path_rcd_buf, data->rcd_buffer,
1295 DASD_ECKD_RCD_DATA_SIZE);
1296 path_private.conf_data = (void *) &path_rcd_buf;
1297 path_private.conf_len = DASD_ECKD_RCD_DATA_SIZE;
1298 if (dasd_eckd_identify_conf_parts(&path_private)) {
1299 path_private.conf_data = NULL;
1300 path_private.conf_len = 0;
1301 continue;
1302 }
1303
1304 /*
1305 * compare path UID with device UID only if at least
1306 * one valid path is left
1307 * in other case the device UID may have changed and
1308 * the first working path UID will be used as device UID
1309 */
1310 if (device->path_data.opm &&
1311 dasd_eckd_compare_path_uid(device, &path_private)) {
1312 /*
1313 * the comparison was not successful
1314 * rebuild the device UID with at least one
1315 * known path in case a z/VM hyperswap command
1316 * has changed the device
1317 *
1318 * after this compare again
1319 *
1320 * if either the rebuild or the recompare fails
1321 * the path can not be used
1322 */
1323 if (rebuild_device_uid(device, data) ||
1324 dasd_eckd_compare_path_uid(
1325 device, &path_private)) {
1326 uid = &path_private.uid;
1327 if (strlen(uid->vduit) > 0)
1328 snprintf(print_uid, sizeof(print_uid),
1329 "%s.%s.%04x.%02x.%s",
1330 uid->vendor, uid->serial,
1331 uid->ssid, uid->real_unit_addr,
1332 uid->vduit);
1333 else
1334 snprintf(print_uid, sizeof(print_uid),
1335 "%s.%s.%04x.%02x",
1336 uid->vendor, uid->serial,
1337 uid->ssid,
1338 uid->real_unit_addr);
1339 dev_err(&device->cdev->dev,
1340 "The newly added channel path %02X "
1341 "will not be used because it leads "
1342 "to a different device %s\n",
1343 lpm, print_uid);
1150 opm &= ~lpm; 1344 opm &= ~lpm;
1151 npm &= ~lpm; 1345 npm &= ~lpm;
1152 ppm &= ~lpm; 1346 ppm &= ~lpm;
1347 continue;
1153 } 1348 }
1154 } 1349 }
1350
1351 /*
1352 * There is a small chance that a path is lost again between
1353 * above path verification and the following modification of
1354 * the device opm mask. We could avoid that race here by using
1355 * yet another path mask, but we rather deal with this unlikely
1356 * situation in dasd_start_IO.
1357 */
1358 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
1359 if (!device->path_data.opm && opm) {
1360 device->path_data.opm = opm;
1361 dasd_generic_path_operational(device);
1362 } else
1363 device->path_data.opm |= opm;
1364 device->path_data.npm |= npm;
1365 device->path_data.ppm |= ppm;
1366 device->path_data.tbvpm |= epm;
1367 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
1155 } 1368 }
1156 /*
1157 * There is a small chance that a path is lost again between
1158 * above path verification and the following modification of
1159 * the device opm mask. We could avoid that race here by using
1160 * yet another path mask, but we rather deal with this unlikely
1161 * situation in dasd_start_IO.
1162 */
1163 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
1164 if (!device->path_data.opm && opm) {
1165 device->path_data.opm = opm;
1166 dasd_generic_path_operational(device);
1167 } else
1168 device->path_data.opm |= opm;
1169 device->path_data.npm |= npm;
1170 device->path_data.ppm |= ppm;
1171 device->path_data.tbvpm |= epm;
1172 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
1173 1369
1174 dasd_put_device(device); 1370 dasd_put_device(device);
1175 if (data->isglobal) 1371 if (data->isglobal)
@@ -1441,11 +1637,6 @@ dasd_eckd_check_characteristics(struct dasd_device *device)
1441 device->default_expires = value; 1637 device->default_expires = value;
1442 } 1638 }
1443 1639
1444 /* Generate device unique id */
1445 rc = dasd_eckd_generate_uid(device);
1446 if (rc)
1447 goto out_err1;
1448
1449 dasd_eckd_get_uid(device, &temp_uid); 1640 dasd_eckd_get_uid(device, &temp_uid);
1450 if (temp_uid.type == UA_BASE_DEVICE) { 1641 if (temp_uid.type == UA_BASE_DEVICE) {
1451 block = dasd_alloc_block(); 1642 block = dasd_alloc_block();
@@ -2206,7 +2397,7 @@ static struct dasd_ccw_req *dasd_eckd_build_cp_cmd_single(
2206 sizeof(struct PFX_eckd_data)); 2397 sizeof(struct PFX_eckd_data));
2207 } else { 2398 } else {
2208 if (define_extent(ccw++, cqr->data, first_trk, 2399 if (define_extent(ccw++, cqr->data, first_trk,
2209 last_trk, cmd, startdev) == -EAGAIN) { 2400 last_trk, cmd, basedev) == -EAGAIN) {
2210 /* Clock not in sync and XRC is enabled. 2401 /* Clock not in sync and XRC is enabled.
2211 * Try again later. 2402 * Try again later.
2212 */ 2403 */
diff --git a/drivers/s390/char/tape_class.h b/drivers/s390/char/tape_class.h
index 9e32780c317f..ba2092f741d5 100644
--- a/drivers/s390/char/tape_class.h
+++ b/drivers/s390/char/tape_class.h
@@ -14,7 +14,6 @@
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/fs.h> 15#include <linux/fs.h>
16#include <linux/major.h> 16#include <linux/major.h>
17#include <linux/kobj_map.h>
18#include <linux/cdev.h> 17#include <linux/cdev.h>
19 18
20#include <linux/device.h> 19#include <linux/device.h>
diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c
index 2acc01f90a6a..452989a7ec13 100644
--- a/drivers/s390/cio/qdio_setup.c
+++ b/drivers/s390/cio/qdio_setup.c
@@ -22,12 +22,9 @@
22static struct kmem_cache *qdio_q_cache; 22static struct kmem_cache *qdio_q_cache;
23static struct kmem_cache *qdio_aob_cache; 23static struct kmem_cache *qdio_aob_cache;
24 24
25struct qaob *qdio_allocate_aob() 25struct qaob *qdio_allocate_aob(void)
26{ 26{
27 struct qaob *aob; 27 return kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
28
29 aob = kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
30 return aob;
31} 28}
32EXPORT_SYMBOL_GPL(qdio_allocate_aob); 29EXPORT_SYMBOL_GPL(qdio_allocate_aob);
33 30
@@ -180,7 +177,8 @@ static void setup_queues(struct qdio_irq *irq_ptr,
180 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i); 177 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
181 178
182 q->is_input_q = 1; 179 q->is_input_q = 1;
183 q->u.in.queue_start_poll = qdio_init->queue_start_poll[i]; 180 q->u.in.queue_start_poll = qdio_init->queue_start_poll_array ?
181 qdio_init->queue_start_poll_array[i] : NULL;
184 182
185 setup_storage_lists(q, irq_ptr, input_sbal_array, i); 183 setup_storage_lists(q, irq_ptr, input_sbal_array, i);
186 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 184 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
diff --git a/drivers/s390/crypto/zcrypt_pcixcc.c b/drivers/s390/crypto/zcrypt_pcixcc.c
index dd4737808e06..077b7d109fde 100644
--- a/drivers/s390/crypto/zcrypt_pcixcc.c
+++ b/drivers/s390/crypto/zcrypt_pcixcc.c
@@ -56,11 +56,6 @@
56#define PCIXCC_MAX_ICA_RESPONSE_SIZE 0x77c /* max size type86 v2 reply */ 56#define PCIXCC_MAX_ICA_RESPONSE_SIZE 0x77c /* max size type86 v2 reply */
57 57
58#define PCIXCC_MAX_XCRB_MESSAGE_SIZE (12*1024) 58#define PCIXCC_MAX_XCRB_MESSAGE_SIZE (12*1024)
59#define PCIXCC_MAX_XCRB_RESPONSE_SIZE PCIXCC_MAX_XCRB_MESSAGE_SIZE
60#define PCIXCC_MAX_XCRB_DATA_SIZE (11*1024)
61#define PCIXCC_MAX_XCRB_REPLY_SIZE (5*1024)
62
63#define PCIXCC_MAX_RESPONSE_SIZE PCIXCC_MAX_XCRB_RESPONSE_SIZE
64 59
65#define PCIXCC_CLEANUP_TIME (15*HZ) 60#define PCIXCC_CLEANUP_TIME (15*HZ)
66 61
@@ -265,7 +260,7 @@ static int ICACRT_msg_to_type6CRT_msgX(struct zcrypt_device *zdev,
265 * @ap_msg: pointer to AP message 260 * @ap_msg: pointer to AP message
266 * @xcRB: pointer to user input data 261 * @xcRB: pointer to user input data
267 * 262 *
268 * Returns 0 on success or -EFAULT. 263 * Returns 0 on success or -EFAULT, -EINVAL.
269 */ 264 */
270struct type86_fmt2_msg { 265struct type86_fmt2_msg {
271 struct type86_hdr hdr; 266 struct type86_hdr hdr;
@@ -295,19 +290,12 @@ static int XCRB_msg_to_type6CPRB_msgX(struct zcrypt_device *zdev,
295 CEIL4(xcRB->request_control_blk_length) + 290 CEIL4(xcRB->request_control_blk_length) +
296 xcRB->request_data_length; 291 xcRB->request_data_length;
297 if (ap_msg->length > PCIXCC_MAX_XCRB_MESSAGE_SIZE) 292 if (ap_msg->length > PCIXCC_MAX_XCRB_MESSAGE_SIZE)
298 return -EFAULT; 293 return -EINVAL;
299 if (CEIL4(xcRB->reply_control_blk_length) > PCIXCC_MAX_XCRB_REPLY_SIZE) 294 replylen = sizeof(struct type86_fmt2_msg) +
300 return -EFAULT; 295 CEIL4(xcRB->reply_control_blk_length) +
301 if (CEIL4(xcRB->reply_data_length) > PCIXCC_MAX_XCRB_DATA_SIZE) 296 xcRB->reply_data_length;
302 return -EFAULT; 297 if (replylen > PCIXCC_MAX_XCRB_MESSAGE_SIZE)
303 replylen = CEIL4(xcRB->reply_control_blk_length) + 298 return -EINVAL;
304 CEIL4(xcRB->reply_data_length) +
305 sizeof(struct type86_fmt2_msg);
306 if (replylen > PCIXCC_MAX_XCRB_RESPONSE_SIZE) {
307 xcRB->reply_control_blk_length = PCIXCC_MAX_XCRB_RESPONSE_SIZE -
308 (sizeof(struct type86_fmt2_msg) +
309 CEIL4(xcRB->reply_data_length));
310 }
311 299
312 /* prepare type6 header */ 300 /* prepare type6 header */
313 msg->hdr = static_type6_hdrX; 301 msg->hdr = static_type6_hdrX;
@@ -326,7 +314,7 @@ static int XCRB_msg_to_type6CPRB_msgX(struct zcrypt_device *zdev,
326 return -EFAULT; 314 return -EFAULT;
327 if (msg->cprbx.cprb_len + sizeof(msg->hdr.function_code) > 315 if (msg->cprbx.cprb_len + sizeof(msg->hdr.function_code) >
328 xcRB->request_control_blk_length) 316 xcRB->request_control_blk_length)
329 return -EFAULT; 317 return -EINVAL;
330 function_code = ((unsigned char *)&msg->cprbx) + msg->cprbx.cprb_len; 318 function_code = ((unsigned char *)&msg->cprbx) + msg->cprbx.cprb_len;
331 memcpy(msg->hdr.function_code, function_code, sizeof(msg->hdr.function_code)); 319 memcpy(msg->hdr.function_code, function_code, sizeof(msg->hdr.function_code));
332 320
@@ -678,7 +666,7 @@ static void zcrypt_pcixcc_receive(struct ap_device *ap_dev,
678 break; 666 break;
679 case PCIXCC_RESPONSE_TYPE_XCRB: 667 case PCIXCC_RESPONSE_TYPE_XCRB:
680 length = t86r->fmt2.offset2 + t86r->fmt2.count2; 668 length = t86r->fmt2.offset2 + t86r->fmt2.count2;
681 length = min(PCIXCC_MAX_XCRB_RESPONSE_SIZE, length); 669 length = min(PCIXCC_MAX_XCRB_MESSAGE_SIZE, length);
682 memcpy(msg->message, reply->message, length); 670 memcpy(msg->message, reply->message, length);
683 break; 671 break;
684 default: 672 default:
@@ -1043,7 +1031,7 @@ static int zcrypt_pcixcc_probe(struct ap_device *ap_dev)
1043 struct zcrypt_device *zdev; 1031 struct zcrypt_device *zdev;
1044 int rc = 0; 1032 int rc = 0;
1045 1033
1046 zdev = zcrypt_device_alloc(PCIXCC_MAX_RESPONSE_SIZE); 1034 zdev = zcrypt_device_alloc(PCIXCC_MAX_XCRB_MESSAGE_SIZE);
1047 if (!zdev) 1035 if (!zdev)
1048 return -ENOMEM; 1036 return -ENOMEM;
1049 zdev->ap_dev = ap_dev; 1037 zdev->ap_dev = ap_dev;
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c
index 4fae1dc19951..9c3f38da4c01 100644
--- a/drivers/s390/net/qeth_core_main.c
+++ b/drivers/s390/net/qeth_core_main.c
@@ -4552,7 +4552,7 @@ static int qeth_qdio_establish(struct qeth_card *card)
4552 init_data.no_output_qs = card->qdio.no_out_queues; 4552 init_data.no_output_qs = card->qdio.no_out_queues;
4553 init_data.input_handler = card->discipline.input_handler; 4553 init_data.input_handler = card->discipline.input_handler;
4554 init_data.output_handler = card->discipline.output_handler; 4554 init_data.output_handler = card->discipline.output_handler;
4555 init_data.queue_start_poll = queue_start_poll; 4555 init_data.queue_start_poll_array = queue_start_poll;
4556 init_data.int_parm = (unsigned long) card; 4556 init_data.int_parm = (unsigned long) card;
4557 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4557 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4558 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4558 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
diff --git a/drivers/scsi/aacraid/commctrl.c b/drivers/scsi/aacraid/commctrl.c
index 8a0b33033177..0bd38da4ada0 100644
--- a/drivers/scsi/aacraid/commctrl.c
+++ b/drivers/scsi/aacraid/commctrl.c
@@ -650,6 +650,7 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
650 AAC_OPT_NEW_COMM) ? 650 AAC_OPT_NEW_COMM) ?
651 (dev->scsi_host_ptr->max_sectors << 9) : 651 (dev->scsi_host_ptr->max_sectors << 9) :
652 65536)) { 652 65536)) {
653 kfree(usg);
653 rcode = -EINVAL; 654 rcode = -EINVAL;
654 goto cleanup; 655 goto cleanup;
655 } 656 }
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 019a7163572f..dcf7e1006426 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
971 struct s3c64xx_spi_info *sci; 971 struct s3c64xx_spi_info *sci;
972 struct spi_master *master; 972 struct spi_master *master;
973 int ret; 973 int ret;
974 char clk_name[16];
974 975
975 if (pdev->id < 0) { 976 if (pdev->id < 0) {
976 dev_err(&pdev->dev, 977 dev_err(&pdev->dev,
@@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
984 } 985 }
985 986
986 sci = pdev->dev.platform_data; 987 sci = pdev->dev.platform_data;
987 if (!sci->src_clk_name) {
988 dev_err(&pdev->dev,
989 "Board init must call s3c64xx_spi_set_info()\n");
990 return -EINVAL;
991 }
992 988
993 /* Check for availability of necessary resource */ 989 /* Check for availability of necessary resource */
994 990
@@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
1073 goto err4; 1069 goto err4;
1074 } 1070 }
1075 1071
1076 sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name); 1072 sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
1073 sdd->src_clk = clk_get(&pdev->dev, clk_name);
1077 if (IS_ERR(sdd->src_clk)) { 1074 if (IS_ERR(sdd->src_clk)) {
1078 dev_err(&pdev->dev, 1075 dev_err(&pdev->dev,
1079 "Unable to acquire clock '%s'\n", sci->src_clk_name); 1076 "Unable to acquire clock '%s'\n", clk_name);
1080 ret = PTR_ERR(sdd->src_clk); 1077 ret = PTR_ERR(sdd->src_clk);
1081 goto err5; 1078 goto err5;
1082 } 1079 }
1083 1080
1084 if (clk_enable(sdd->src_clk)) { 1081 if (clk_enable(sdd->src_clk)) {
1085 dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", 1082 dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
1086 sci->src_clk_name);
1087 ret = -EBUSY; 1083 ret = -EBUSY;
1088 goto err6; 1084 goto err6;
1089 } 1085 }
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 25cdff36a78a..21e2f4b87f14 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -72,8 +72,6 @@ source "drivers/staging/octeon/Kconfig"
72 72
73source "drivers/staging/serqt_usb2/Kconfig" 73source "drivers/staging/serqt_usb2/Kconfig"
74 74
75source "drivers/staging/spectra/Kconfig"
76
77source "drivers/staging/quatech_usb2/Kconfig" 75source "drivers/staging/quatech_usb2/Kconfig"
78 76
79source "drivers/staging/vt6655/Kconfig" 77source "drivers/staging/vt6655/Kconfig"
@@ -116,8 +114,6 @@ source "drivers/staging/bcm/Kconfig"
116 114
117source "drivers/staging/ft1000/Kconfig" 115source "drivers/staging/ft1000/Kconfig"
118 116
119source "drivers/staging/intel_sst/Kconfig"
120
121source "drivers/staging/speakup/Kconfig" 117source "drivers/staging/speakup/Kconfig"
122 118
123source "drivers/staging/cptm1217/Kconfig" 119source "drivers/staging/cptm1217/Kconfig"
@@ -132,4 +128,8 @@ source "drivers/staging/nvec/Kconfig"
132 128
133source "drivers/staging/media/Kconfig" 129source "drivers/staging/media/Kconfig"
134 130
131source "drivers/staging/omapdrm/Kconfig"
132
133source "drivers/staging/android/Kconfig"
134
135endif # STAGING 135endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index a25f3f26c7ff..7c5808d7212d 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -21,7 +21,6 @@ obj-$(CONFIG_RTL8192E) += rtl8192e/
21obj-$(CONFIG_R8712U) += rtl8712/ 21obj-$(CONFIG_R8712U) += rtl8712/
22obj-$(CONFIG_RTS_PSTOR) += rts_pstor/ 22obj-$(CONFIG_RTS_PSTOR) += rts_pstor/
23obj-$(CONFIG_RTS5139) += rts5139/ 23obj-$(CONFIG_RTS5139) += rts5139/
24obj-$(CONFIG_SPECTRA) += spectra/
25obj-$(CONFIG_TRANZPORT) += frontier/ 24obj-$(CONFIG_TRANZPORT) += frontier/
26obj-$(CONFIG_POHMELFS) += pohmelfs/ 25obj-$(CONFIG_POHMELFS) += pohmelfs/
27obj-$(CONFIG_IDE_PHISON) += phison/ 26obj-$(CONFIG_IDE_PHISON) += phison/
@@ -50,10 +49,11 @@ obj-$(CONFIG_SBE_2T3E3) += sbe-2t3e3/
50obj-$(CONFIG_USB_ENESTORAGE) += keucr/ 49obj-$(CONFIG_USB_ENESTORAGE) += keucr/
51obj-$(CONFIG_BCM_WIMAX) += bcm/ 50obj-$(CONFIG_BCM_WIMAX) += bcm/
52obj-$(CONFIG_FT1000) += ft1000/ 51obj-$(CONFIG_FT1000) += ft1000/
53obj-$(CONFIG_SND_INTEL_SST) += intel_sst/
54obj-$(CONFIG_SPEAKUP) += speakup/ 52obj-$(CONFIG_SPEAKUP) += speakup/
55obj-$(CONFIG_TOUCHSCREEN_CLEARPAD_TM1217) += cptm1217/ 53obj-$(CONFIG_TOUCHSCREEN_CLEARPAD_TM1217) += cptm1217/
56obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += ste_rmi4/ 54obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += ste_rmi4/
57obj-$(CONFIG_DRM_PSB) += gma500/ 55obj-$(CONFIG_DRM_PSB) += gma500/
58obj-$(CONFIG_INTEL_MEI) += mei/ 56obj-$(CONFIG_INTEL_MEI) += mei/
59obj-$(CONFIG_MFD_NVEC) += nvec/ 57obj-$(CONFIG_MFD_NVEC) += nvec/
58obj-$(CONFIG_DRM_OMAP) += omapdrm/
59obj-$(CONFIG_ANDROID) += android/
diff --git a/drivers/staging/android/Kconfig b/drivers/staging/android/Kconfig
new file mode 100644
index 000000000000..becf711117ef
--- /dev/null
+++ b/drivers/staging/android/Kconfig
@@ -0,0 +1,110 @@
1menu "Android"
2
3config ANDROID
4 bool "Android Drivers"
5 default N
6 ---help---
7 Enable support for various drivers needed on the Android platform
8
9if ANDROID
10
11config ANDROID_BINDER_IPC
12 bool "Android Binder IPC Driver"
13 default n
14
15config ASHMEM
16 bool "Enable the Anonymous Shared Memory Subsystem"
17 default n
18 depends on SHMEM || TINY_SHMEM
19 help
20 The ashmem subsystem is a new shared memory allocator, similar to
21 POSIX SHM but with different behavior and sporting a simpler
22 file-based API.
23
24config ANDROID_LOGGER
25 tristate "Android log driver"
26 default n
27
28config ANDROID_RAM_CONSOLE
29 bool "Android RAM buffer console"
30 default n
31
32config ANDROID_RAM_CONSOLE_ENABLE_VERBOSE
33 bool "Enable verbose console messages on Android RAM console"
34 default y
35 depends on ANDROID_RAM_CONSOLE
36
37menuconfig ANDROID_RAM_CONSOLE_ERROR_CORRECTION
38 bool "Android RAM Console Enable error correction"
39 default n
40 depends on ANDROID_RAM_CONSOLE
41 depends on !ANDROID_RAM_CONSOLE_EARLY_INIT
42 select REED_SOLOMON
43 select REED_SOLOMON_ENC8
44 select REED_SOLOMON_DEC8
45
46if ANDROID_RAM_CONSOLE_ERROR_CORRECTION
47
48config ANDROID_RAM_CONSOLE_ERROR_CORRECTION_DATA_SIZE
49 int "Android RAM Console Data data size"
50 default 128
51 help
52 Must be a power of 2.
53
54config ANDROID_RAM_CONSOLE_ERROR_CORRECTION_ECC_SIZE
55 int "Android RAM Console ECC size"
56 default 16
57
58config ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE
59 int "Android RAM Console Symbol size"
60 default 8
61
62config ANDROID_RAM_CONSOLE_ERROR_CORRECTION_POLYNOMIAL
63 hex "Android RAM Console Polynomial"
64 default 0x19 if (ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE = 4)
65 default 0x29 if (ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE = 5)
66 default 0x61 if (ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE = 6)
67 default 0x89 if (ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE = 7)
68 default 0x11d if (ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE = 8)
69
70endif # ANDROID_RAM_CONSOLE_ERROR_CORRECTION
71
72config ANDROID_RAM_CONSOLE_EARLY_INIT
73 bool "Start Android RAM console early"
74 default n
75 depends on ANDROID_RAM_CONSOLE
76
77config ANDROID_RAM_CONSOLE_EARLY_ADDR
78 hex "Android RAM console virtual address"
79 default 0
80 depends on ANDROID_RAM_CONSOLE_EARLY_INIT
81
82config ANDROID_RAM_CONSOLE_EARLY_SIZE
83 hex "Android RAM console buffer size"
84 default 0
85 depends on ANDROID_RAM_CONSOLE_EARLY_INIT
86
87config ANDROID_TIMED_OUTPUT
88 bool "Timed output class driver"
89 default y
90
91config ANDROID_TIMED_GPIO
92 tristate "Android timed gpio driver"
93 depends on GENERIC_GPIO && ANDROID_TIMED_OUTPUT
94 default n
95
96config ANDROID_LOW_MEMORY_KILLER
97 bool "Android Low Memory Killer"
98 default N
99 ---help---
100 Register processes to be killed when memory is low
101
102config ANDROID_PMEM
103 bool "Android pmem allocator"
104 depends on ARM
105
106source "drivers/staging/android/switch/Kconfig"
107
108endif # if ANDROID
109
110endmenu
diff --git a/drivers/staging/android/Makefile b/drivers/staging/android/Makefile
new file mode 100644
index 000000000000..eaed1ff64f0f
--- /dev/null
+++ b/drivers/staging/android/Makefile
@@ -0,0 +1,9 @@
1obj-$(CONFIG_ANDROID_BINDER_IPC) += binder.o
2obj-$(CONFIG_ASHMEM) += ashmem.o
3obj-$(CONFIG_ANDROID_LOGGER) += logger.o
4obj-$(CONFIG_ANDROID_RAM_CONSOLE) += ram_console.o
5obj-$(CONFIG_ANDROID_TIMED_OUTPUT) += timed_output.o
6obj-$(CONFIG_ANDROID_TIMED_GPIO) += timed_gpio.o
7obj-$(CONFIG_ANDROID_LOW_MEMORY_KILLER) += lowmemorykiller.o
8obj-$(CONFIG_ANDROID_PMEM) += pmem.o
9obj-$(CONFIG_ANDROID_SWITCH) += switch/
diff --git a/drivers/staging/android/TODO b/drivers/staging/android/TODO
new file mode 100644
index 000000000000..e59c5be4be2b
--- /dev/null
+++ b/drivers/staging/android/TODO
@@ -0,0 +1,10 @@
1TODO:
2 - checkpatch.pl cleanups
3 - sparse fixes
4 - rename files to be not so "generic"
5 - make sure things build as modules properly
6 - add proper arch dependancies as needed
7 - audit userspace interfaces to make sure they are sane
8
9Please send patches to Greg Kroah-Hartman <greg@kroah.com> and Cc:
10Brian Swetland <swetland@google.com>
diff --git a/drivers/staging/android/android_pmem.h b/drivers/staging/android/android_pmem.h
new file mode 100644
index 000000000000..f633621f5be3
--- /dev/null
+++ b/drivers/staging/android/android_pmem.h
@@ -0,0 +1,93 @@
1/* include/linux/android_pmem.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef _ANDROID_PMEM_H_
17#define _ANDROID_PMEM_H_
18
19#define PMEM_IOCTL_MAGIC 'p'
20#define PMEM_GET_PHYS _IOW(PMEM_IOCTL_MAGIC, 1, unsigned int)
21#define PMEM_MAP _IOW(PMEM_IOCTL_MAGIC, 2, unsigned int)
22#define PMEM_GET_SIZE _IOW(PMEM_IOCTL_MAGIC, 3, unsigned int)
23#define PMEM_UNMAP _IOW(PMEM_IOCTL_MAGIC, 4, unsigned int)
24/* This ioctl will allocate pmem space, backing the file, it will fail
25 * if the file already has an allocation, pass it the len as the argument
26 * to the ioctl */
27#define PMEM_ALLOCATE _IOW(PMEM_IOCTL_MAGIC, 5, unsigned int)
28/* This will connect a one pmem file to another, pass the file that is already
29 * backed in memory as the argument to the ioctl
30 */
31#define PMEM_CONNECT _IOW(PMEM_IOCTL_MAGIC, 6, unsigned int)
32/* Returns the total size of the pmem region it is sent to as a pmem_region
33 * struct (with offset set to 0).
34 */
35#define PMEM_GET_TOTAL_SIZE _IOW(PMEM_IOCTL_MAGIC, 7, unsigned int)
36#define PMEM_CACHE_FLUSH _IOW(PMEM_IOCTL_MAGIC, 8, unsigned int)
37
38struct android_pmem_platform_data
39{
40 const char* name;
41 /* starting physical address of memory region */
42 unsigned long start;
43 /* size of memory region */
44 unsigned long size;
45 /* set to indicate the region should not be managed with an allocator */
46 unsigned no_allocator;
47 /* set to indicate maps of this region should be cached, if a mix of
48 * cached and uncached is desired, set this and open the device with
49 * O_SYNC to get an uncached region */
50 unsigned cached;
51 /* The MSM7k has bits to enable a write buffer in the bus controller*/
52 unsigned buffered;
53};
54
55struct pmem_region {
56 unsigned long offset;
57 unsigned long len;
58};
59
60#ifdef CONFIG_ANDROID_PMEM
61int is_pmem_file(struct file *file);
62int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart,
63 unsigned long *end, struct file **filp);
64int get_pmem_user_addr(struct file *file, unsigned long *start,
65 unsigned long *end);
66void put_pmem_file(struct file* file);
67void flush_pmem_file(struct file *file, unsigned long start, unsigned long len);
68int pmem_setup(struct android_pmem_platform_data *pdata,
69 long (*ioctl)(struct file *, unsigned int, unsigned long),
70 int (*release)(struct inode *, struct file *));
71int pmem_remap(struct pmem_region *region, struct file *file,
72 unsigned operation);
73
74#else
75static inline int is_pmem_file(struct file *file) { return 0; }
76static inline int get_pmem_file(int fd, unsigned long *start,
77 unsigned long *vstart, unsigned long *end,
78 struct file **filp) { return -ENOSYS; }
79static inline int get_pmem_user_addr(struct file *file, unsigned long *start,
80 unsigned long *end) { return -ENOSYS; }
81static inline void put_pmem_file(struct file* file) { return; }
82static inline void flush_pmem_file(struct file *file, unsigned long start,
83 unsigned long len) { return; }
84static inline int pmem_setup(struct android_pmem_platform_data *pdata,
85 long (*ioctl)(struct file *, unsigned int, unsigned long),
86 int (*release)(struct inode *, struct file *)) { return -ENOSYS; }
87
88static inline int pmem_remap(struct pmem_region *region, struct file *file,
89 unsigned operation) { return -ENOSYS; }
90#endif
91
92#endif //_ANDROID_PPP_H_
93
diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c
new file mode 100644
index 000000000000..99052bfd3a2d
--- /dev/null
+++ b/drivers/staging/android/ashmem.c
@@ -0,0 +1,752 @@
1/* mm/ashmem.c
2**
3** Anonymous Shared Memory Subsystem, ashmem
4**
5** Copyright (C) 2008 Google, Inc.
6**
7** Robert Love <rlove@google.com>
8**
9** This software is licensed under the terms of the GNU General Public
10** License version 2, as published by the Free Software Foundation, and
11** may be copied, distributed, and modified under those terms.
12**
13** This program is distributed in the hope that it will be useful,
14** but WITHOUT ANY WARRANTY; without even the implied warranty of
15** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16** GNU General Public License for more details.
17*/
18
19#include <linux/module.h>
20#include <linux/file.h>
21#include <linux/fs.h>
22#include <linux/miscdevice.h>
23#include <linux/security.h>
24#include <linux/mm.h>
25#include <linux/mman.h>
26#include <linux/uaccess.h>
27#include <linux/personality.h>
28#include <linux/bitops.h>
29#include <linux/mutex.h>
30#include <linux/shmem_fs.h>
31#include "ashmem.h"
32
33#define ASHMEM_NAME_PREFIX "dev/ashmem/"
34#define ASHMEM_NAME_PREFIX_LEN (sizeof(ASHMEM_NAME_PREFIX) - 1)
35#define ASHMEM_FULL_NAME_LEN (ASHMEM_NAME_LEN + ASHMEM_NAME_PREFIX_LEN)
36
37/*
38 * ashmem_area - anonymous shared memory area
39 * Lifecycle: From our parent file's open() until its release()
40 * Locking: Protected by `ashmem_mutex'
41 * Big Note: Mappings do NOT pin this structure; it dies on close()
42 */
43struct ashmem_area {
44 char name[ASHMEM_FULL_NAME_LEN]; /* optional name in /proc/pid/maps */
45 struct list_head unpinned_list; /* list of all ashmem areas */
46 struct file *file; /* the shmem-based backing file */
47 size_t size; /* size of the mapping, in bytes */
48 unsigned long prot_mask; /* allowed prot bits, as vm_flags */
49};
50
51/*
52 * ashmem_range - represents an interval of unpinned (evictable) pages
53 * Lifecycle: From unpin to pin
54 * Locking: Protected by `ashmem_mutex'
55 */
56struct ashmem_range {
57 struct list_head lru; /* entry in LRU list */
58 struct list_head unpinned; /* entry in its area's unpinned list */
59 struct ashmem_area *asma; /* associated area */
60 size_t pgstart; /* starting page, inclusive */
61 size_t pgend; /* ending page, inclusive */
62 unsigned int purged; /* ASHMEM_NOT or ASHMEM_WAS_PURGED */
63};
64
65/* LRU list of unpinned pages, protected by ashmem_mutex */
66static LIST_HEAD(ashmem_lru_list);
67
68/* Count of pages on our LRU list, protected by ashmem_mutex */
69static unsigned long lru_count;
70
71/*
72 * ashmem_mutex - protects the list of and each individual ashmem_area
73 *
74 * Lock Ordering: ashmex_mutex -> i_mutex -> i_alloc_sem
75 */
76static DEFINE_MUTEX(ashmem_mutex);
77
78static struct kmem_cache *ashmem_area_cachep __read_mostly;
79static struct kmem_cache *ashmem_range_cachep __read_mostly;
80
81#define range_size(range) \
82 ((range)->pgend - (range)->pgstart + 1)
83
84#define range_on_lru(range) \
85 ((range)->purged == ASHMEM_NOT_PURGED)
86
87#define page_range_subsumes_range(range, start, end) \
88 (((range)->pgstart >= (start)) && ((range)->pgend <= (end)))
89
90#define page_range_subsumed_by_range(range, start, end) \
91 (((range)->pgstart <= (start)) && ((range)->pgend >= (end)))
92
93#define page_in_range(range, page) \
94 (((range)->pgstart <= (page)) && ((range)->pgend >= (page)))
95
96#define page_range_in_range(range, start, end) \
97 (page_in_range(range, start) || page_in_range(range, end) || \
98 page_range_subsumes_range(range, start, end))
99
100#define range_before_page(range, page) \
101 ((range)->pgend < (page))
102
103#define PROT_MASK (PROT_EXEC | PROT_READ | PROT_WRITE)
104
105static inline void lru_add(struct ashmem_range *range)
106{
107 list_add_tail(&range->lru, &ashmem_lru_list);
108 lru_count += range_size(range);
109}
110
111static inline void lru_del(struct ashmem_range *range)
112{
113 list_del(&range->lru);
114 lru_count -= range_size(range);
115}
116
117/*
118 * range_alloc - allocate and initialize a new ashmem_range structure
119 *
120 * 'asma' - associated ashmem_area
121 * 'prev_range' - the previous ashmem_range in the sorted asma->unpinned list
122 * 'purged' - initial purge value (ASMEM_NOT_PURGED or ASHMEM_WAS_PURGED)
123 * 'start' - starting page, inclusive
124 * 'end' - ending page, inclusive
125 *
126 * Caller must hold ashmem_mutex.
127 */
128static int range_alloc(struct ashmem_area *asma,
129 struct ashmem_range *prev_range, unsigned int purged,
130 size_t start, size_t end)
131{
132 struct ashmem_range *range;
133
134 range = kmem_cache_zalloc(ashmem_range_cachep, GFP_KERNEL);
135 if (unlikely(!range))
136 return -ENOMEM;
137
138 range->asma = asma;
139 range->pgstart = start;
140 range->pgend = end;
141 range->purged = purged;
142
143 list_add_tail(&range->unpinned, &prev_range->unpinned);
144
145 if (range_on_lru(range))
146 lru_add(range);
147
148 return 0;
149}
150
151static void range_del(struct ashmem_range *range)
152{
153 list_del(&range->unpinned);
154 if (range_on_lru(range))
155 lru_del(range);
156 kmem_cache_free(ashmem_range_cachep, range);
157}
158
159/*
160 * range_shrink - shrinks a range
161 *
162 * Caller must hold ashmem_mutex.
163 */
164static inline void range_shrink(struct ashmem_range *range,
165 size_t start, size_t end)
166{
167 size_t pre = range_size(range);
168
169 range->pgstart = start;
170 range->pgend = end;
171
172 if (range_on_lru(range))
173 lru_count -= pre - range_size(range);
174}
175
176static int ashmem_open(struct inode *inode, struct file *file)
177{
178 struct ashmem_area *asma;
179 int ret;
180
181 ret = generic_file_open(inode, file);
182 if (unlikely(ret))
183 return ret;
184
185 asma = kmem_cache_zalloc(ashmem_area_cachep, GFP_KERNEL);
186 if (unlikely(!asma))
187 return -ENOMEM;
188
189 INIT_LIST_HEAD(&asma->unpinned_list);
190 memcpy(asma->name, ASHMEM_NAME_PREFIX, ASHMEM_NAME_PREFIX_LEN);
191 asma->prot_mask = PROT_MASK;
192 file->private_data = asma;
193
194 return 0;
195}
196
197static int ashmem_release(struct inode *ignored, struct file *file)
198{
199 struct ashmem_area *asma = file->private_data;
200 struct ashmem_range *range, *next;
201
202 mutex_lock(&ashmem_mutex);
203 list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned)
204 range_del(range);
205 mutex_unlock(&ashmem_mutex);
206
207 if (asma->file)
208 fput(asma->file);
209 kmem_cache_free(ashmem_area_cachep, asma);
210
211 return 0;
212}
213
214static ssize_t ashmem_read(struct file *file, char __user *buf,
215 size_t len, loff_t *pos)
216{
217 struct ashmem_area *asma = file->private_data;
218 int ret = 0;
219
220 mutex_lock(&ashmem_mutex);
221
222 /* If size is not set, or set to 0, always return EOF. */
223 if (asma->size == 0)
224 goto out;
225
226 if (!asma->file) {
227 ret = -EBADF;
228 goto out;
229 }
230
231 ret = asma->file->f_op->read(asma->file, buf, len, pos);
232 if (ret < 0)
233 goto out;
234
235 /** Update backing file pos, since f_ops->read() doesn't */
236 asma->file->f_pos = *pos;
237
238out:
239 mutex_unlock(&ashmem_mutex);
240 return ret;
241}
242
243static loff_t ashmem_llseek(struct file *file, loff_t offset, int origin)
244{
245 struct ashmem_area *asma = file->private_data;
246 int ret;
247
248 mutex_lock(&ashmem_mutex);
249
250 if (asma->size == 0) {
251 ret = -EINVAL;
252 goto out;
253 }
254
255 if (!asma->file) {
256 ret = -EBADF;
257 goto out;
258 }
259
260 ret = asma->file->f_op->llseek(asma->file, offset, origin);
261 if (ret < 0)
262 goto out;
263
264 /** Copy f_pos from backing file, since f_ops->llseek() sets it */
265 file->f_pos = asma->file->f_pos;
266
267out:
268 mutex_unlock(&ashmem_mutex);
269 return ret;
270}
271
272static inline unsigned long calc_vm_may_flags(unsigned long prot)
273{
274 return _calc_vm_trans(prot, PROT_READ, VM_MAYREAD) |
275 _calc_vm_trans(prot, PROT_WRITE, VM_MAYWRITE) |
276 _calc_vm_trans(prot, PROT_EXEC, VM_MAYEXEC);
277}
278
279static int ashmem_mmap(struct file *file, struct vm_area_struct *vma)
280{
281 struct ashmem_area *asma = file->private_data;
282 int ret = 0;
283
284 mutex_lock(&ashmem_mutex);
285
286 /* user needs to SET_SIZE before mapping */
287 if (unlikely(!asma->size)) {
288 ret = -EINVAL;
289 goto out;
290 }
291
292 /* requested protection bits must match our allowed protection mask */
293 if (unlikely((vma->vm_flags & ~calc_vm_prot_bits(asma->prot_mask)) &
294 calc_vm_prot_bits(PROT_MASK))) {
295 ret = -EPERM;
296 goto out;
297 }
298 vma->vm_flags &= ~calc_vm_may_flags(~asma->prot_mask);
299
300 if (!asma->file) {
301 char *name = ASHMEM_NAME_DEF;
302 struct file *vmfile;
303
304 if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0')
305 name = asma->name;
306
307 /* ... and allocate the backing shmem file */
308 vmfile = shmem_file_setup(name, asma->size, vma->vm_flags);
309 if (unlikely(IS_ERR(vmfile))) {
310 ret = PTR_ERR(vmfile);
311 goto out;
312 }
313 asma->file = vmfile;
314 }
315 get_file(asma->file);
316
317 /*
318 * XXX - Reworked to use shmem_zero_setup() instead of
319 * shmem_set_file while we're in staging. -jstultz
320 */
321 if (vma->vm_flags & VM_SHARED) {
322 ret = shmem_zero_setup(vma);
323 if (ret) {
324 fput(asma->file);
325 goto out;
326 }
327 }
328
329 if (vma->vm_file)
330 fput(vma->vm_file);
331 vma->vm_file = asma->file;
332 vma->vm_flags |= VM_CAN_NONLINEAR;
333
334out:
335 mutex_unlock(&ashmem_mutex);
336 return ret;
337}
338
339/*
340 * ashmem_shrink - our cache shrinker, called from mm/vmscan.c :: shrink_slab
341 *
342 * 'nr_to_scan' is the number of objects (pages) to prune, or 0 to query how
343 * many objects (pages) we have in total.
344 *
345 * 'gfp_mask' is the mask of the allocation that got us into this mess.
346 *
347 * Return value is the number of objects (pages) remaining, or -1 if we cannot
348 * proceed without risk of deadlock (due to gfp_mask).
349 *
350 * We approximate LRU via least-recently-unpinned, jettisoning unpinned partial
351 * chunks of ashmem regions LRU-wise one-at-a-time until we hit 'nr_to_scan'
352 * pages freed.
353 */
354static int ashmem_shrink(struct shrinker *s, struct shrink_control *sc)
355{
356 struct ashmem_range *range, *next;
357
358 /* We might recurse into filesystem code, so bail out if necessary */
359 if (sc->nr_to_scan && !(sc->gfp_mask & __GFP_FS))
360 return -1;
361 if (!sc->nr_to_scan)
362 return lru_count;
363
364 mutex_lock(&ashmem_mutex);
365 list_for_each_entry_safe(range, next, &ashmem_lru_list, lru) {
366 struct inode *inode = range->asma->file->f_dentry->d_inode;
367 loff_t start = range->pgstart * PAGE_SIZE;
368 loff_t end = (range->pgend + 1) * PAGE_SIZE - 1;
369
370 vmtruncate_range(inode, start, end);
371 range->purged = ASHMEM_WAS_PURGED;
372 lru_del(range);
373
374 sc->nr_to_scan -= range_size(range);
375 if (sc->nr_to_scan <= 0)
376 break;
377 }
378 mutex_unlock(&ashmem_mutex);
379
380 return lru_count;
381}
382
383static struct shrinker ashmem_shrinker = {
384 .shrink = ashmem_shrink,
385 .seeks = DEFAULT_SEEKS * 4,
386};
387
388static int set_prot_mask(struct ashmem_area *asma, unsigned long prot)
389{
390 int ret = 0;
391
392 mutex_lock(&ashmem_mutex);
393
394 /* the user can only remove, not add, protection bits */
395 if (unlikely((asma->prot_mask & prot) != prot)) {
396 ret = -EINVAL;
397 goto out;
398 }
399
400 /* does the application expect PROT_READ to imply PROT_EXEC? */
401 if ((prot & PROT_READ) && (current->personality & READ_IMPLIES_EXEC))
402 prot |= PROT_EXEC;
403
404 asma->prot_mask = prot;
405
406out:
407 mutex_unlock(&ashmem_mutex);
408 return ret;
409}
410
411static int set_name(struct ashmem_area *asma, void __user *name)
412{
413 int ret = 0;
414
415 mutex_lock(&ashmem_mutex);
416
417 /* cannot change an existing mapping's name */
418 if (unlikely(asma->file)) {
419 ret = -EINVAL;
420 goto out;
421 }
422
423 if (unlikely(copy_from_user(asma->name + ASHMEM_NAME_PREFIX_LEN,
424 name, ASHMEM_NAME_LEN)))
425 ret = -EFAULT;
426 asma->name[ASHMEM_FULL_NAME_LEN-1] = '\0';
427
428out:
429 mutex_unlock(&ashmem_mutex);
430
431 return ret;
432}
433
434static int get_name(struct ashmem_area *asma, void __user *name)
435{
436 int ret = 0;
437
438 mutex_lock(&ashmem_mutex);
439 if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0') {
440 size_t len;
441
442 /*
443 * Copying only `len', instead of ASHMEM_NAME_LEN, bytes
444 * prevents us from revealing one user's stack to another.
445 */
446 len = strlen(asma->name + ASHMEM_NAME_PREFIX_LEN) + 1;
447 if (unlikely(copy_to_user(name,
448 asma->name + ASHMEM_NAME_PREFIX_LEN, len)))
449 ret = -EFAULT;
450 } else {
451 if (unlikely(copy_to_user(name, ASHMEM_NAME_DEF,
452 sizeof(ASHMEM_NAME_DEF))))
453 ret = -EFAULT;
454 }
455 mutex_unlock(&ashmem_mutex);
456
457 return ret;
458}
459
460/*
461 * ashmem_pin - pin the given ashmem region, returning whether it was
462 * previously purged (ASHMEM_WAS_PURGED) or not (ASHMEM_NOT_PURGED).
463 *
464 * Caller must hold ashmem_mutex.
465 */
466static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend)
467{
468 struct ashmem_range *range, *next;
469 int ret = ASHMEM_NOT_PURGED;
470
471 list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned) {
472 /* moved past last applicable page; we can short circuit */
473 if (range_before_page(range, pgstart))
474 break;
475
476 /*
477 * The user can ask us to pin pages that span multiple ranges,
478 * or to pin pages that aren't even unpinned, so this is messy.
479 *
480 * Four cases:
481 * 1. The requested range subsumes an existing range, so we
482 * just remove the entire matching range.
483 * 2. The requested range overlaps the start of an existing
484 * range, so we just update that range.
485 * 3. The requested range overlaps the end of an existing
486 * range, so we just update that range.
487 * 4. The requested range punches a hole in an existing range,
488 * so we have to update one side of the range and then
489 * create a new range for the other side.
490 */
491 if (page_range_in_range(range, pgstart, pgend)) {
492 ret |= range->purged;
493
494 /* Case #1: Easy. Just nuke the whole thing. */
495 if (page_range_subsumes_range(range, pgstart, pgend)) {
496 range_del(range);
497 continue;
498 }
499
500 /* Case #2: We overlap from the start, so adjust it */
501 if (range->pgstart >= pgstart) {
502 range_shrink(range, pgend + 1, range->pgend);
503 continue;
504 }
505
506 /* Case #3: We overlap from the rear, so adjust it */
507 if (range->pgend <= pgend) {
508 range_shrink(range, range->pgstart, pgstart-1);
509 continue;
510 }
511
512 /*
513 * Case #4: We eat a chunk out of the middle. A bit
514 * more complicated, we allocate a new range for the
515 * second half and adjust the first chunk's endpoint.
516 */
517 range_alloc(asma, range, range->purged,
518 pgend + 1, range->pgend);
519 range_shrink(range, range->pgstart, pgstart - 1);
520 break;
521 }
522 }
523
524 return ret;
525}
526
527/*
528 * ashmem_unpin - unpin the given range of pages. Returns zero on success.
529 *
530 * Caller must hold ashmem_mutex.
531 */
532static int ashmem_unpin(struct ashmem_area *asma, size_t pgstart, size_t pgend)
533{
534 struct ashmem_range *range, *next;
535 unsigned int purged = ASHMEM_NOT_PURGED;
536
537restart:
538 list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned) {
539 /* short circuit: this is our insertion point */
540 if (range_before_page(range, pgstart))
541 break;
542
543 /*
544 * The user can ask us to unpin pages that are already entirely
545 * or partially pinned. We handle those two cases here.
546 */
547 if (page_range_subsumed_by_range(range, pgstart, pgend))
548 return 0;
549 if (page_range_in_range(range, pgstart, pgend)) {
550 pgstart = min_t(size_t, range->pgstart, pgstart),
551 pgend = max_t(size_t, range->pgend, pgend);
552 purged |= range->purged;
553 range_del(range);
554 goto restart;
555 }
556 }
557
558 return range_alloc(asma, range, purged, pgstart, pgend);
559}
560
561/*
562 * ashmem_get_pin_status - Returns ASHMEM_IS_UNPINNED if _any_ pages in the
563 * given interval are unpinned and ASHMEM_IS_PINNED otherwise.
564 *
565 * Caller must hold ashmem_mutex.
566 */
567static int ashmem_get_pin_status(struct ashmem_area *asma, size_t pgstart,
568 size_t pgend)
569{
570 struct ashmem_range *range;
571 int ret = ASHMEM_IS_PINNED;
572
573 list_for_each_entry(range, &asma->unpinned_list, unpinned) {
574 if (range_before_page(range, pgstart))
575 break;
576 if (page_range_in_range(range, pgstart, pgend)) {
577 ret = ASHMEM_IS_UNPINNED;
578 break;
579 }
580 }
581
582 return ret;
583}
584
585static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
586 void __user *p)
587{
588 struct ashmem_pin pin;
589 size_t pgstart, pgend;
590 int ret = -EINVAL;
591
592 if (unlikely(!asma->file))
593 return -EINVAL;
594
595 if (unlikely(copy_from_user(&pin, p, sizeof(pin))))
596 return -EFAULT;
597
598 /* per custom, you can pass zero for len to mean "everything onward" */
599 if (!pin.len)
600 pin.len = PAGE_ALIGN(asma->size) - pin.offset;
601
602 if (unlikely((pin.offset | pin.len) & ~PAGE_MASK))
603 return -EINVAL;
604
605 if (unlikely(((__u32) -1) - pin.offset < pin.len))
606 return -EINVAL;
607
608 if (unlikely(PAGE_ALIGN(asma->size) < pin.offset + pin.len))
609 return -EINVAL;
610
611 pgstart = pin.offset / PAGE_SIZE;
612 pgend = pgstart + (pin.len / PAGE_SIZE) - 1;
613
614 mutex_lock(&ashmem_mutex);
615
616 switch (cmd) {
617 case ASHMEM_PIN:
618 ret = ashmem_pin(asma, pgstart, pgend);
619 break;
620 case ASHMEM_UNPIN:
621 ret = ashmem_unpin(asma, pgstart, pgend);
622 break;
623 case ASHMEM_GET_PIN_STATUS:
624 ret = ashmem_get_pin_status(asma, pgstart, pgend);
625 break;
626 }
627
628 mutex_unlock(&ashmem_mutex);
629
630 return ret;
631}
632
633static long ashmem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
634{
635 struct ashmem_area *asma = file->private_data;
636 long ret = -ENOTTY;
637
638 switch (cmd) {
639 case ASHMEM_SET_NAME:
640 ret = set_name(asma, (void __user *) arg);
641 break;
642 case ASHMEM_GET_NAME:
643 ret = get_name(asma, (void __user *) arg);
644 break;
645 case ASHMEM_SET_SIZE:
646 ret = -EINVAL;
647 if (!asma->file) {
648 ret = 0;
649 asma->size = (size_t) arg;
650 }
651 break;
652 case ASHMEM_GET_SIZE:
653 ret = asma->size;
654 break;
655 case ASHMEM_SET_PROT_MASK:
656 ret = set_prot_mask(asma, arg);
657 break;
658 case ASHMEM_GET_PROT_MASK:
659 ret = asma->prot_mask;
660 break;
661 case ASHMEM_PIN:
662 case ASHMEM_UNPIN:
663 case ASHMEM_GET_PIN_STATUS:
664 ret = ashmem_pin_unpin(asma, cmd, (void __user *) arg);
665 break;
666 case ASHMEM_PURGE_ALL_CACHES:
667 ret = -EPERM;
668 if (capable(CAP_SYS_ADMIN)) {
669 struct shrink_control sc = {
670 .gfp_mask = GFP_KERNEL,
671 .nr_to_scan = 0,
672 };
673 ret = ashmem_shrink(&ashmem_shrinker, &sc);
674 sc.nr_to_scan = ret;
675 ashmem_shrink(&ashmem_shrinker, &sc);
676 }
677 break;
678 }
679
680 return ret;
681}
682
683static struct file_operations ashmem_fops = {
684 .owner = THIS_MODULE,
685 .open = ashmem_open,
686 .release = ashmem_release,
687 .read = ashmem_read,
688 .llseek = ashmem_llseek,
689 .mmap = ashmem_mmap,
690 .unlocked_ioctl = ashmem_ioctl,
691 .compat_ioctl = ashmem_ioctl,
692};
693
694static struct miscdevice ashmem_misc = {
695 .minor = MISC_DYNAMIC_MINOR,
696 .name = "ashmem",
697 .fops = &ashmem_fops,
698};
699
700static int __init ashmem_init(void)
701{
702 int ret;
703
704 ashmem_area_cachep = kmem_cache_create("ashmem_area_cache",
705 sizeof(struct ashmem_area),
706 0, 0, NULL);
707 if (unlikely(!ashmem_area_cachep)) {
708 printk(KERN_ERR "ashmem: failed to create slab cache\n");
709 return -ENOMEM;
710 }
711
712 ashmem_range_cachep = kmem_cache_create("ashmem_range_cache",
713 sizeof(struct ashmem_range),
714 0, 0, NULL);
715 if (unlikely(!ashmem_range_cachep)) {
716 printk(KERN_ERR "ashmem: failed to create slab cache\n");
717 return -ENOMEM;
718 }
719
720 ret = misc_register(&ashmem_misc);
721 if (unlikely(ret)) {
722 printk(KERN_ERR "ashmem: failed to register misc device!\n");
723 return ret;
724 }
725
726 register_shrinker(&ashmem_shrinker);
727
728 printk(KERN_INFO "ashmem: initialized\n");
729
730 return 0;
731}
732
733static void __exit ashmem_exit(void)
734{
735 int ret;
736
737 unregister_shrinker(&ashmem_shrinker);
738
739 ret = misc_deregister(&ashmem_misc);
740 if (unlikely(ret))
741 printk(KERN_ERR "ashmem: failed to unregister misc device!\n");
742
743 kmem_cache_destroy(ashmem_range_cachep);
744 kmem_cache_destroy(ashmem_area_cachep);
745
746 printk(KERN_INFO "ashmem: unloaded\n");
747}
748
749module_init(ashmem_init);
750module_exit(ashmem_exit);
751
752MODULE_LICENSE("GPL");
diff --git a/drivers/staging/android/ashmem.h b/drivers/staging/android/ashmem.h
new file mode 100644
index 000000000000..1976b10ef93e
--- /dev/null
+++ b/drivers/staging/android/ashmem.h
@@ -0,0 +1,48 @@
1/*
2 * include/linux/ashmem.h
3 *
4 * Copyright 2008 Google Inc.
5 * Author: Robert Love
6 *
7 * This file is dual licensed. It may be redistributed and/or modified
8 * under the terms of the Apache 2.0 License OR version 2 of the GNU
9 * General Public License.
10 */
11
12#ifndef _LINUX_ASHMEM_H
13#define _LINUX_ASHMEM_H
14
15#include <linux/limits.h>
16#include <linux/ioctl.h>
17
18#define ASHMEM_NAME_LEN 256
19
20#define ASHMEM_NAME_DEF "dev/ashmem"
21
22/* Return values from ASHMEM_PIN: Was the mapping purged while unpinned? */
23#define ASHMEM_NOT_PURGED 0
24#define ASHMEM_WAS_PURGED 1
25
26/* Return values from ASHMEM_GET_PIN_STATUS: Is the mapping pinned? */
27#define ASHMEM_IS_UNPINNED 0
28#define ASHMEM_IS_PINNED 1
29
30struct ashmem_pin {
31 __u32 offset; /* offset into region, in bytes, page-aligned */
32 __u32 len; /* length forward from offset, in bytes, page-aligned */
33};
34
35#define __ASHMEMIOC 0x77
36
37#define ASHMEM_SET_NAME _IOW(__ASHMEMIOC, 1, char[ASHMEM_NAME_LEN])
38#define ASHMEM_GET_NAME _IOR(__ASHMEMIOC, 2, char[ASHMEM_NAME_LEN])
39#define ASHMEM_SET_SIZE _IOW(__ASHMEMIOC, 3, size_t)
40#define ASHMEM_GET_SIZE _IO(__ASHMEMIOC, 4)
41#define ASHMEM_SET_PROT_MASK _IOW(__ASHMEMIOC, 5, unsigned long)
42#define ASHMEM_GET_PROT_MASK _IO(__ASHMEMIOC, 6)
43#define ASHMEM_PIN _IOW(__ASHMEMIOC, 7, struct ashmem_pin)
44#define ASHMEM_UNPIN _IOW(__ASHMEMIOC, 8, struct ashmem_pin)
45#define ASHMEM_GET_PIN_STATUS _IO(__ASHMEMIOC, 9)
46#define ASHMEM_PURGE_ALL_CACHES _IO(__ASHMEMIOC, 10)
47
48#endif /* _LINUX_ASHMEM_H */
diff --git a/drivers/staging/android/binder.c b/drivers/staging/android/binder.c
new file mode 100644
index 000000000000..7491801a661c
--- /dev/null
+++ b/drivers/staging/android/binder.c
@@ -0,0 +1,3600 @@
1/* binder.c
2 *
3 * Android IPC Subsystem
4 *
5 * Copyright (C) 2007-2008 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <asm/cacheflush.h>
19#include <linux/fdtable.h>
20#include <linux/file.h>
21#include <linux/fs.h>
22#include <linux/list.h>
23#include <linux/miscdevice.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/mutex.h>
27#include <linux/nsproxy.h>
28#include <linux/poll.h>
29#include <linux/debugfs.h>
30#include <linux/rbtree.h>
31#include <linux/sched.h>
32#include <linux/seq_file.h>
33#include <linux/uaccess.h>
34#include <linux/vmalloc.h>
35#include <linux/slab.h>
36
37#include "binder.h"
38
39static DEFINE_MUTEX(binder_lock);
40static DEFINE_MUTEX(binder_deferred_lock);
41
42static HLIST_HEAD(binder_procs);
43static HLIST_HEAD(binder_deferred_list);
44static HLIST_HEAD(binder_dead_nodes);
45
46static struct dentry *binder_debugfs_dir_entry_root;
47static struct dentry *binder_debugfs_dir_entry_proc;
48static struct binder_node *binder_context_mgr_node;
49static uid_t binder_context_mgr_uid = -1;
50static int binder_last_id;
51static struct workqueue_struct *binder_deferred_workqueue;
52
53#define BINDER_DEBUG_ENTRY(name) \
54static int binder_##name##_open(struct inode *inode, struct file *file) \
55{ \
56 return single_open(file, binder_##name##_show, inode->i_private); \
57} \
58\
59static const struct file_operations binder_##name##_fops = { \
60 .owner = THIS_MODULE, \
61 .open = binder_##name##_open, \
62 .read = seq_read, \
63 .llseek = seq_lseek, \
64 .release = single_release, \
65}
66
67static int binder_proc_show(struct seq_file *m, void *unused);
68BINDER_DEBUG_ENTRY(proc);
69
70/* This is only defined in include/asm-arm/sizes.h */
71#ifndef SZ_1K
72#define SZ_1K 0x400
73#endif
74
75#ifndef SZ_4M
76#define SZ_4M 0x400000
77#endif
78
79#define FORBIDDEN_MMAP_FLAGS (VM_WRITE)
80
81#define BINDER_SMALL_BUF_SIZE (PAGE_SIZE * 64)
82
83enum {
84 BINDER_DEBUG_USER_ERROR = 1U << 0,
85 BINDER_DEBUG_FAILED_TRANSACTION = 1U << 1,
86 BINDER_DEBUG_DEAD_TRANSACTION = 1U << 2,
87 BINDER_DEBUG_OPEN_CLOSE = 1U << 3,
88 BINDER_DEBUG_DEAD_BINDER = 1U << 4,
89 BINDER_DEBUG_DEATH_NOTIFICATION = 1U << 5,
90 BINDER_DEBUG_READ_WRITE = 1U << 6,
91 BINDER_DEBUG_USER_REFS = 1U << 7,
92 BINDER_DEBUG_THREADS = 1U << 8,
93 BINDER_DEBUG_TRANSACTION = 1U << 9,
94 BINDER_DEBUG_TRANSACTION_COMPLETE = 1U << 10,
95 BINDER_DEBUG_FREE_BUFFER = 1U << 11,
96 BINDER_DEBUG_INTERNAL_REFS = 1U << 12,
97 BINDER_DEBUG_BUFFER_ALLOC = 1U << 13,
98 BINDER_DEBUG_PRIORITY_CAP = 1U << 14,
99 BINDER_DEBUG_BUFFER_ALLOC_ASYNC = 1U << 15,
100};
101static uint32_t binder_debug_mask = BINDER_DEBUG_USER_ERROR |
102 BINDER_DEBUG_FAILED_TRANSACTION | BINDER_DEBUG_DEAD_TRANSACTION;
103module_param_named(debug_mask, binder_debug_mask, uint, S_IWUSR | S_IRUGO);
104
105static int binder_debug_no_lock;
106module_param_named(proc_no_lock, binder_debug_no_lock, bool, S_IWUSR | S_IRUGO);
107
108static DECLARE_WAIT_QUEUE_HEAD(binder_user_error_wait);
109static int binder_stop_on_user_error;
110
111static int binder_set_stop_on_user_error(const char *val,
112 struct kernel_param *kp)
113{
114 int ret;
115 ret = param_set_int(val, kp);
116 if (binder_stop_on_user_error < 2)
117 wake_up(&binder_user_error_wait);
118 return ret;
119}
120module_param_call(stop_on_user_error, binder_set_stop_on_user_error,
121 param_get_int, &binder_stop_on_user_error, S_IWUSR | S_IRUGO);
122
123#define binder_debug(mask, x...) \
124 do { \
125 if (binder_debug_mask & mask) \
126 printk(KERN_INFO x); \
127 } while (0)
128
129#define binder_user_error(x...) \
130 do { \
131 if (binder_debug_mask & BINDER_DEBUG_USER_ERROR) \
132 printk(KERN_INFO x); \
133 if (binder_stop_on_user_error) \
134 binder_stop_on_user_error = 2; \
135 } while (0)
136
137enum binder_stat_types {
138 BINDER_STAT_PROC,
139 BINDER_STAT_THREAD,
140 BINDER_STAT_NODE,
141 BINDER_STAT_REF,
142 BINDER_STAT_DEATH,
143 BINDER_STAT_TRANSACTION,
144 BINDER_STAT_TRANSACTION_COMPLETE,
145 BINDER_STAT_COUNT
146};
147
148struct binder_stats {
149 int br[_IOC_NR(BR_FAILED_REPLY) + 1];
150 int bc[_IOC_NR(BC_DEAD_BINDER_DONE) + 1];
151 int obj_created[BINDER_STAT_COUNT];
152 int obj_deleted[BINDER_STAT_COUNT];
153};
154
155static struct binder_stats binder_stats;
156
157static inline void binder_stats_deleted(enum binder_stat_types type)
158{
159 binder_stats.obj_deleted[type]++;
160}
161
162static inline void binder_stats_created(enum binder_stat_types type)
163{
164 binder_stats.obj_created[type]++;
165}
166
167struct binder_transaction_log_entry {
168 int debug_id;
169 int call_type;
170 int from_proc;
171 int from_thread;
172 int target_handle;
173 int to_proc;
174 int to_thread;
175 int to_node;
176 int data_size;
177 int offsets_size;
178};
179struct binder_transaction_log {
180 int next;
181 int full;
182 struct binder_transaction_log_entry entry[32];
183};
184static struct binder_transaction_log binder_transaction_log;
185static struct binder_transaction_log binder_transaction_log_failed;
186
187static struct binder_transaction_log_entry *binder_transaction_log_add(
188 struct binder_transaction_log *log)
189{
190 struct binder_transaction_log_entry *e;
191 e = &log->entry[log->next];
192 memset(e, 0, sizeof(*e));
193 log->next++;
194 if (log->next == ARRAY_SIZE(log->entry)) {
195 log->next = 0;
196 log->full = 1;
197 }
198 return e;
199}
200
201struct binder_work {
202 struct list_head entry;
203 enum {
204 BINDER_WORK_TRANSACTION = 1,
205 BINDER_WORK_TRANSACTION_COMPLETE,
206 BINDER_WORK_NODE,
207 BINDER_WORK_DEAD_BINDER,
208 BINDER_WORK_DEAD_BINDER_AND_CLEAR,
209 BINDER_WORK_CLEAR_DEATH_NOTIFICATION,
210 } type;
211};
212
213struct binder_node {
214 int debug_id;
215 struct binder_work work;
216 union {
217 struct rb_node rb_node;
218 struct hlist_node dead_node;
219 };
220 struct binder_proc *proc;
221 struct hlist_head refs;
222 int internal_strong_refs;
223 int local_weak_refs;
224 int local_strong_refs;
225 void __user *ptr;
226 void __user *cookie;
227 unsigned has_strong_ref:1;
228 unsigned pending_strong_ref:1;
229 unsigned has_weak_ref:1;
230 unsigned pending_weak_ref:1;
231 unsigned has_async_transaction:1;
232 unsigned accept_fds:1;
233 unsigned min_priority:8;
234 struct list_head async_todo;
235};
236
237struct binder_ref_death {
238 struct binder_work work;
239 void __user *cookie;
240};
241
242struct binder_ref {
243 /* Lookups needed: */
244 /* node + proc => ref (transaction) */
245 /* desc + proc => ref (transaction, inc/dec ref) */
246 /* node => refs + procs (proc exit) */
247 int debug_id;
248 struct rb_node rb_node_desc;
249 struct rb_node rb_node_node;
250 struct hlist_node node_entry;
251 struct binder_proc *proc;
252 struct binder_node *node;
253 uint32_t desc;
254 int strong;
255 int weak;
256 struct binder_ref_death *death;
257};
258
259struct binder_buffer {
260 struct list_head entry; /* free and allocated entries by addesss */
261 struct rb_node rb_node; /* free entry by size or allocated entry */
262 /* by address */
263 unsigned free:1;
264 unsigned allow_user_free:1;
265 unsigned async_transaction:1;
266 unsigned debug_id:29;
267
268 struct binder_transaction *transaction;
269
270 struct binder_node *target_node;
271 size_t data_size;
272 size_t offsets_size;
273 uint8_t data[0];
274};
275
276enum binder_deferred_state {
277 BINDER_DEFERRED_PUT_FILES = 0x01,
278 BINDER_DEFERRED_FLUSH = 0x02,
279 BINDER_DEFERRED_RELEASE = 0x04,
280};
281
282struct binder_proc {
283 struct hlist_node proc_node;
284 struct rb_root threads;
285 struct rb_root nodes;
286 struct rb_root refs_by_desc;
287 struct rb_root refs_by_node;
288 int pid;
289 struct vm_area_struct *vma;
290 struct task_struct *tsk;
291 struct files_struct *files;
292 struct hlist_node deferred_work_node;
293 int deferred_work;
294 void *buffer;
295 ptrdiff_t user_buffer_offset;
296
297 struct list_head buffers;
298 struct rb_root free_buffers;
299 struct rb_root allocated_buffers;
300 size_t free_async_space;
301
302 struct page **pages;
303 size_t buffer_size;
304 uint32_t buffer_free;
305 struct list_head todo;
306 wait_queue_head_t wait;
307 struct binder_stats stats;
308 struct list_head delivered_death;
309 int max_threads;
310 int requested_threads;
311 int requested_threads_started;
312 int ready_threads;
313 long default_priority;
314 struct dentry *debugfs_entry;
315};
316
317enum {
318 BINDER_LOOPER_STATE_REGISTERED = 0x01,
319 BINDER_LOOPER_STATE_ENTERED = 0x02,
320 BINDER_LOOPER_STATE_EXITED = 0x04,
321 BINDER_LOOPER_STATE_INVALID = 0x08,
322 BINDER_LOOPER_STATE_WAITING = 0x10,
323 BINDER_LOOPER_STATE_NEED_RETURN = 0x20
324};
325
326struct binder_thread {
327 struct binder_proc *proc;
328 struct rb_node rb_node;
329 int pid;
330 int looper;
331 struct binder_transaction *transaction_stack;
332 struct list_head todo;
333 uint32_t return_error; /* Write failed, return error code in read buf */
334 uint32_t return_error2; /* Write failed, return error code in read */
335 /* buffer. Used when sending a reply to a dead process that */
336 /* we are also waiting on */
337 wait_queue_head_t wait;
338 struct binder_stats stats;
339};
340
341struct binder_transaction {
342 int debug_id;
343 struct binder_work work;
344 struct binder_thread *from;
345 struct binder_transaction *from_parent;
346 struct binder_proc *to_proc;
347 struct binder_thread *to_thread;
348 struct binder_transaction *to_parent;
349 unsigned need_reply:1;
350 /* unsigned is_dead:1; */ /* not used at the moment */
351
352 struct binder_buffer *buffer;
353 unsigned int code;
354 unsigned int flags;
355 long priority;
356 long saved_priority;
357 uid_t sender_euid;
358};
359
360static void
361binder_defer_work(struct binder_proc *proc, enum binder_deferred_state defer);
362
363/*
364 * copied from get_unused_fd_flags
365 */
366int task_get_unused_fd_flags(struct binder_proc *proc, int flags)
367{
368 struct files_struct *files = proc->files;
369 int fd, error;
370 struct fdtable *fdt;
371 unsigned long rlim_cur;
372 unsigned long irqs;
373
374 if (files == NULL)
375 return -ESRCH;
376
377 error = -EMFILE;
378 spin_lock(&files->file_lock);
379
380repeat:
381 fdt = files_fdtable(files);
382 fd = find_next_zero_bit(fdt->open_fds->fds_bits, fdt->max_fds,
383 files->next_fd);
384
385 /*
386 * N.B. For clone tasks sharing a files structure, this test
387 * will limit the total number of files that can be opened.
388 */
389 rlim_cur = 0;
390 if (lock_task_sighand(proc->tsk, &irqs)) {
391 rlim_cur = proc->tsk->signal->rlim[RLIMIT_NOFILE].rlim_cur;
392 unlock_task_sighand(proc->tsk, &irqs);
393 }
394 if (fd >= rlim_cur)
395 goto out;
396
397 /* Do we need to expand the fd array or fd set? */
398 error = expand_files(files, fd);
399 if (error < 0)
400 goto out;
401
402 if (error) {
403 /*
404 * If we needed to expand the fs array we
405 * might have blocked - try again.
406 */
407 error = -EMFILE;
408 goto repeat;
409 }
410
411 FD_SET(fd, fdt->open_fds);
412 if (flags & O_CLOEXEC)
413 FD_SET(fd, fdt->close_on_exec);
414 else
415 FD_CLR(fd, fdt->close_on_exec);
416 files->next_fd = fd + 1;
417#if 1
418 /* Sanity check */
419 if (fdt->fd[fd] != NULL) {
420 printk(KERN_WARNING "get_unused_fd: slot %d not NULL!\n", fd);
421 fdt->fd[fd] = NULL;
422 }
423#endif
424 error = fd;
425
426out:
427 spin_unlock(&files->file_lock);
428 return error;
429}
430
431/*
432 * copied from fd_install
433 */
434static void task_fd_install(
435 struct binder_proc *proc, unsigned int fd, struct file *file)
436{
437 struct files_struct *files = proc->files;
438 struct fdtable *fdt;
439
440 if (files == NULL)
441 return;
442
443 spin_lock(&files->file_lock);
444 fdt = files_fdtable(files);
445 BUG_ON(fdt->fd[fd] != NULL);
446 rcu_assign_pointer(fdt->fd[fd], file);
447 spin_unlock(&files->file_lock);
448}
449
450/*
451 * copied from __put_unused_fd in open.c
452 */
453static void __put_unused_fd(struct files_struct *files, unsigned int fd)
454{
455 struct fdtable *fdt = files_fdtable(files);
456 __FD_CLR(fd, fdt->open_fds);
457 if (fd < files->next_fd)
458 files->next_fd = fd;
459}
460
461/*
462 * copied from sys_close
463 */
464static long task_close_fd(struct binder_proc *proc, unsigned int fd)
465{
466 struct file *filp;
467 struct files_struct *files = proc->files;
468 struct fdtable *fdt;
469 int retval;
470
471 if (files == NULL)
472 return -ESRCH;
473
474 spin_lock(&files->file_lock);
475 fdt = files_fdtable(files);
476 if (fd >= fdt->max_fds)
477 goto out_unlock;
478 filp = fdt->fd[fd];
479 if (!filp)
480 goto out_unlock;
481 rcu_assign_pointer(fdt->fd[fd], NULL);
482 FD_CLR(fd, fdt->close_on_exec);
483 __put_unused_fd(files, fd);
484 spin_unlock(&files->file_lock);
485 retval = filp_close(filp, files);
486
487 /* can't restart close syscall because file table entry was cleared */
488 if (unlikely(retval == -ERESTARTSYS ||
489 retval == -ERESTARTNOINTR ||
490 retval == -ERESTARTNOHAND ||
491 retval == -ERESTART_RESTARTBLOCK))
492 retval = -EINTR;
493
494 return retval;
495
496out_unlock:
497 spin_unlock(&files->file_lock);
498 return -EBADF;
499}
500
501static void binder_set_nice(long nice)
502{
503 long min_nice;
504 if (can_nice(current, nice)) {
505 set_user_nice(current, nice);
506 return;
507 }
508 min_nice = 20 - current->signal->rlim[RLIMIT_NICE].rlim_cur;
509 binder_debug(BINDER_DEBUG_PRIORITY_CAP,
510 "binder: %d: nice value %ld not allowed use "
511 "%ld instead\n", current->pid, nice, min_nice);
512 set_user_nice(current, min_nice);
513 if (min_nice < 20)
514 return;
515 binder_user_error("binder: %d RLIMIT_NICE not set\n", current->pid);
516}
517
518static size_t binder_buffer_size(struct binder_proc *proc,
519 struct binder_buffer *buffer)
520{
521 if (list_is_last(&buffer->entry, &proc->buffers))
522 return proc->buffer + proc->buffer_size - (void *)buffer->data;
523 else
524 return (size_t)list_entry(buffer->entry.next,
525 struct binder_buffer, entry) - (size_t)buffer->data;
526}
527
528static void binder_insert_free_buffer(struct binder_proc *proc,
529 struct binder_buffer *new_buffer)
530{
531 struct rb_node **p = &proc->free_buffers.rb_node;
532 struct rb_node *parent = NULL;
533 struct binder_buffer *buffer;
534 size_t buffer_size;
535 size_t new_buffer_size;
536
537 BUG_ON(!new_buffer->free);
538
539 new_buffer_size = binder_buffer_size(proc, new_buffer);
540
541 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
542 "binder: %d: add free buffer, size %zd, "
543 "at %p\n", proc->pid, new_buffer_size, new_buffer);
544
545 while (*p) {
546 parent = *p;
547 buffer = rb_entry(parent, struct binder_buffer, rb_node);
548 BUG_ON(!buffer->free);
549
550 buffer_size = binder_buffer_size(proc, buffer);
551
552 if (new_buffer_size < buffer_size)
553 p = &parent->rb_left;
554 else
555 p = &parent->rb_right;
556 }
557 rb_link_node(&new_buffer->rb_node, parent, p);
558 rb_insert_color(&new_buffer->rb_node, &proc->free_buffers);
559}
560
561static void binder_insert_allocated_buffer(struct binder_proc *proc,
562 struct binder_buffer *new_buffer)
563{
564 struct rb_node **p = &proc->allocated_buffers.rb_node;
565 struct rb_node *parent = NULL;
566 struct binder_buffer *buffer;
567
568 BUG_ON(new_buffer->free);
569
570 while (*p) {
571 parent = *p;
572 buffer = rb_entry(parent, struct binder_buffer, rb_node);
573 BUG_ON(buffer->free);
574
575 if (new_buffer < buffer)
576 p = &parent->rb_left;
577 else if (new_buffer > buffer)
578 p = &parent->rb_right;
579 else
580 BUG();
581 }
582 rb_link_node(&new_buffer->rb_node, parent, p);
583 rb_insert_color(&new_buffer->rb_node, &proc->allocated_buffers);
584}
585
586static struct binder_buffer *binder_buffer_lookup(struct binder_proc *proc,
587 void __user *user_ptr)
588{
589 struct rb_node *n = proc->allocated_buffers.rb_node;
590 struct binder_buffer *buffer;
591 struct binder_buffer *kern_ptr;
592
593 kern_ptr = user_ptr - proc->user_buffer_offset
594 - offsetof(struct binder_buffer, data);
595
596 while (n) {
597 buffer = rb_entry(n, struct binder_buffer, rb_node);
598 BUG_ON(buffer->free);
599
600 if (kern_ptr < buffer)
601 n = n->rb_left;
602 else if (kern_ptr > buffer)
603 n = n->rb_right;
604 else
605 return buffer;
606 }
607 return NULL;
608}
609
610static int binder_update_page_range(struct binder_proc *proc, int allocate,
611 void *start, void *end,
612 struct vm_area_struct *vma)
613{
614 void *page_addr;
615 unsigned long user_page_addr;
616 struct vm_struct tmp_area;
617 struct page **page;
618 struct mm_struct *mm;
619
620 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
621 "binder: %d: %s pages %p-%p\n", proc->pid,
622 allocate ? "allocate" : "free", start, end);
623
624 if (end <= start)
625 return 0;
626
627 if (vma)
628 mm = NULL;
629 else
630 mm = get_task_mm(proc->tsk);
631
632 if (mm) {
633 down_write(&mm->mmap_sem);
634 vma = proc->vma;
635 }
636
637 if (allocate == 0)
638 goto free_range;
639
640 if (vma == NULL) {
641 printk(KERN_ERR "binder: %d: binder_alloc_buf failed to "
642 "map pages in userspace, no vma\n", proc->pid);
643 goto err_no_vma;
644 }
645
646 for (page_addr = start; page_addr < end; page_addr += PAGE_SIZE) {
647 int ret;
648 struct page **page_array_ptr;
649 page = &proc->pages[(page_addr - proc->buffer) / PAGE_SIZE];
650
651 BUG_ON(*page);
652 *page = alloc_page(GFP_KERNEL | __GFP_ZERO);
653 if (*page == NULL) {
654 printk(KERN_ERR "binder: %d: binder_alloc_buf failed "
655 "for page at %p\n", proc->pid, page_addr);
656 goto err_alloc_page_failed;
657 }
658 tmp_area.addr = page_addr;
659 tmp_area.size = PAGE_SIZE + PAGE_SIZE /* guard page? */;
660 page_array_ptr = page;
661 ret = map_vm_area(&tmp_area, PAGE_KERNEL, &page_array_ptr);
662 if (ret) {
663 printk(KERN_ERR "binder: %d: binder_alloc_buf failed "
664 "to map page at %p in kernel\n",
665 proc->pid, page_addr);
666 goto err_map_kernel_failed;
667 }
668 user_page_addr =
669 (uintptr_t)page_addr + proc->user_buffer_offset;
670 ret = vm_insert_page(vma, user_page_addr, page[0]);
671 if (ret) {
672 printk(KERN_ERR "binder: %d: binder_alloc_buf failed "
673 "to map page at %lx in userspace\n",
674 proc->pid, user_page_addr);
675 goto err_vm_insert_page_failed;
676 }
677 /* vm_insert_page does not seem to increment the refcount */
678 }
679 if (mm) {
680 up_write(&mm->mmap_sem);
681 mmput(mm);
682 }
683 return 0;
684
685free_range:
686 for (page_addr = end - PAGE_SIZE; page_addr >= start;
687 page_addr -= PAGE_SIZE) {
688 page = &proc->pages[(page_addr - proc->buffer) / PAGE_SIZE];
689 if (vma)
690 zap_page_range(vma, (uintptr_t)page_addr +
691 proc->user_buffer_offset, PAGE_SIZE, NULL);
692err_vm_insert_page_failed:
693 unmap_kernel_range((unsigned long)page_addr, PAGE_SIZE);
694err_map_kernel_failed:
695 __free_page(*page);
696 *page = NULL;
697err_alloc_page_failed:
698 ;
699 }
700err_no_vma:
701 if (mm) {
702 up_write(&mm->mmap_sem);
703 mmput(mm);
704 }
705 return -ENOMEM;
706}
707
708static struct binder_buffer *binder_alloc_buf(struct binder_proc *proc,
709 size_t data_size,
710 size_t offsets_size, int is_async)
711{
712 struct rb_node *n = proc->free_buffers.rb_node;
713 struct binder_buffer *buffer;
714 size_t buffer_size;
715 struct rb_node *best_fit = NULL;
716 void *has_page_addr;
717 void *end_page_addr;
718 size_t size;
719
720 if (proc->vma == NULL) {
721 printk(KERN_ERR "binder: %d: binder_alloc_buf, no vma\n",
722 proc->pid);
723 return NULL;
724 }
725
726 size = ALIGN(data_size, sizeof(void *)) +
727 ALIGN(offsets_size, sizeof(void *));
728
729 if (size < data_size || size < offsets_size) {
730 binder_user_error("binder: %d: got transaction with invalid "
731 "size %zd-%zd\n", proc->pid, data_size, offsets_size);
732 return NULL;
733 }
734
735 if (is_async &&
736 proc->free_async_space < size + sizeof(struct binder_buffer)) {
737 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
738 "binder: %d: binder_alloc_buf size %zd"
739 "failed, no async space left\n", proc->pid, size);
740 return NULL;
741 }
742
743 while (n) {
744 buffer = rb_entry(n, struct binder_buffer, rb_node);
745 BUG_ON(!buffer->free);
746 buffer_size = binder_buffer_size(proc, buffer);
747
748 if (size < buffer_size) {
749 best_fit = n;
750 n = n->rb_left;
751 } else if (size > buffer_size)
752 n = n->rb_right;
753 else {
754 best_fit = n;
755 break;
756 }
757 }
758 if (best_fit == NULL) {
759 printk(KERN_ERR "binder: %d: binder_alloc_buf size %zd failed, "
760 "no address space\n", proc->pid, size);
761 return NULL;
762 }
763 if (n == NULL) {
764 buffer = rb_entry(best_fit, struct binder_buffer, rb_node);
765 buffer_size = binder_buffer_size(proc, buffer);
766 }
767
768 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
769 "binder: %d: binder_alloc_buf size %zd got buff"
770 "er %p size %zd\n", proc->pid, size, buffer, buffer_size);
771
772 has_page_addr =
773 (void *)(((uintptr_t)buffer->data + buffer_size) & PAGE_MASK);
774 if (n == NULL) {
775 if (size + sizeof(struct binder_buffer) + 4 >= buffer_size)
776 buffer_size = size; /* no room for other buffers */
777 else
778 buffer_size = size + sizeof(struct binder_buffer);
779 }
780 end_page_addr =
781 (void *)PAGE_ALIGN((uintptr_t)buffer->data + buffer_size);
782 if (end_page_addr > has_page_addr)
783 end_page_addr = has_page_addr;
784 if (binder_update_page_range(proc, 1,
785 (void *)PAGE_ALIGN((uintptr_t)buffer->data), end_page_addr, NULL))
786 return NULL;
787
788 rb_erase(best_fit, &proc->free_buffers);
789 buffer->free = 0;
790 binder_insert_allocated_buffer(proc, buffer);
791 if (buffer_size != size) {
792 struct binder_buffer *new_buffer = (void *)buffer->data + size;
793 list_add(&new_buffer->entry, &buffer->entry);
794 new_buffer->free = 1;
795 binder_insert_free_buffer(proc, new_buffer);
796 }
797 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
798 "binder: %d: binder_alloc_buf size %zd got "
799 "%p\n", proc->pid, size, buffer);
800 buffer->data_size = data_size;
801 buffer->offsets_size = offsets_size;
802 buffer->async_transaction = is_async;
803 if (is_async) {
804 proc->free_async_space -= size + sizeof(struct binder_buffer);
805 binder_debug(BINDER_DEBUG_BUFFER_ALLOC_ASYNC,
806 "binder: %d: binder_alloc_buf size %zd "
807 "async free %zd\n", proc->pid, size,
808 proc->free_async_space);
809 }
810
811 return buffer;
812}
813
814static void *buffer_start_page(struct binder_buffer *buffer)
815{
816 return (void *)((uintptr_t)buffer & PAGE_MASK);
817}
818
819static void *buffer_end_page(struct binder_buffer *buffer)
820{
821 return (void *)(((uintptr_t)(buffer + 1) - 1) & PAGE_MASK);
822}
823
824static void binder_delete_free_buffer(struct binder_proc *proc,
825 struct binder_buffer *buffer)
826{
827 struct binder_buffer *prev, *next = NULL;
828 int free_page_end = 1;
829 int free_page_start = 1;
830
831 BUG_ON(proc->buffers.next == &buffer->entry);
832 prev = list_entry(buffer->entry.prev, struct binder_buffer, entry);
833 BUG_ON(!prev->free);
834 if (buffer_end_page(prev) == buffer_start_page(buffer)) {
835 free_page_start = 0;
836 if (buffer_end_page(prev) == buffer_end_page(buffer))
837 free_page_end = 0;
838 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
839 "binder: %d: merge free, buffer %p "
840 "share page with %p\n", proc->pid, buffer, prev);
841 }
842
843 if (!list_is_last(&buffer->entry, &proc->buffers)) {
844 next = list_entry(buffer->entry.next,
845 struct binder_buffer, entry);
846 if (buffer_start_page(next) == buffer_end_page(buffer)) {
847 free_page_end = 0;
848 if (buffer_start_page(next) ==
849 buffer_start_page(buffer))
850 free_page_start = 0;
851 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
852 "binder: %d: merge free, buffer"
853 " %p share page with %p\n", proc->pid,
854 buffer, prev);
855 }
856 }
857 list_del(&buffer->entry);
858 if (free_page_start || free_page_end) {
859 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
860 "binder: %d: merge free, buffer %p do "
861 "not share page%s%s with with %p or %p\n",
862 proc->pid, buffer, free_page_start ? "" : " end",
863 free_page_end ? "" : " start", prev, next);
864 binder_update_page_range(proc, 0, free_page_start ?
865 buffer_start_page(buffer) : buffer_end_page(buffer),
866 (free_page_end ? buffer_end_page(buffer) :
867 buffer_start_page(buffer)) + PAGE_SIZE, NULL);
868 }
869}
870
871static void binder_free_buf(struct binder_proc *proc,
872 struct binder_buffer *buffer)
873{
874 size_t size, buffer_size;
875
876 buffer_size = binder_buffer_size(proc, buffer);
877
878 size = ALIGN(buffer->data_size, sizeof(void *)) +
879 ALIGN(buffer->offsets_size, sizeof(void *));
880
881 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
882 "binder: %d: binder_free_buf %p size %zd buffer"
883 "_size %zd\n", proc->pid, buffer, size, buffer_size);
884
885 BUG_ON(buffer->free);
886 BUG_ON(size > buffer_size);
887 BUG_ON(buffer->transaction != NULL);
888 BUG_ON((void *)buffer < proc->buffer);
889 BUG_ON((void *)buffer > proc->buffer + proc->buffer_size);
890
891 if (buffer->async_transaction) {
892 proc->free_async_space += size + sizeof(struct binder_buffer);
893
894 binder_debug(BINDER_DEBUG_BUFFER_ALLOC_ASYNC,
895 "binder: %d: binder_free_buf size %zd "
896 "async free %zd\n", proc->pid, size,
897 proc->free_async_space);
898 }
899
900 binder_update_page_range(proc, 0,
901 (void *)PAGE_ALIGN((uintptr_t)buffer->data),
902 (void *)(((uintptr_t)buffer->data + buffer_size) & PAGE_MASK),
903 NULL);
904 rb_erase(&buffer->rb_node, &proc->allocated_buffers);
905 buffer->free = 1;
906 if (!list_is_last(&buffer->entry, &proc->buffers)) {
907 struct binder_buffer *next = list_entry(buffer->entry.next,
908 struct binder_buffer, entry);
909 if (next->free) {
910 rb_erase(&next->rb_node, &proc->free_buffers);
911 binder_delete_free_buffer(proc, next);
912 }
913 }
914 if (proc->buffers.next != &buffer->entry) {
915 struct binder_buffer *prev = list_entry(buffer->entry.prev,
916 struct binder_buffer, entry);
917 if (prev->free) {
918 binder_delete_free_buffer(proc, buffer);
919 rb_erase(&prev->rb_node, &proc->free_buffers);
920 buffer = prev;
921 }
922 }
923 binder_insert_free_buffer(proc, buffer);
924}
925
926static struct binder_node *binder_get_node(struct binder_proc *proc,
927 void __user *ptr)
928{
929 struct rb_node *n = proc->nodes.rb_node;
930 struct binder_node *node;
931
932 while (n) {
933 node = rb_entry(n, struct binder_node, rb_node);
934
935 if (ptr < node->ptr)
936 n = n->rb_left;
937 else if (ptr > node->ptr)
938 n = n->rb_right;
939 else
940 return node;
941 }
942 return NULL;
943}
944
945static struct binder_node *binder_new_node(struct binder_proc *proc,
946 void __user *ptr,
947 void __user *cookie)
948{
949 struct rb_node **p = &proc->nodes.rb_node;
950 struct rb_node *parent = NULL;
951 struct binder_node *node;
952
953 while (*p) {
954 parent = *p;
955 node = rb_entry(parent, struct binder_node, rb_node);
956
957 if (ptr < node->ptr)
958 p = &(*p)->rb_left;
959 else if (ptr > node->ptr)
960 p = &(*p)->rb_right;
961 else
962 return NULL;
963 }
964
965 node = kzalloc(sizeof(*node), GFP_KERNEL);
966 if (node == NULL)
967 return NULL;
968 binder_stats_created(BINDER_STAT_NODE);
969 rb_link_node(&node->rb_node, parent, p);
970 rb_insert_color(&node->rb_node, &proc->nodes);
971 node->debug_id = ++binder_last_id;
972 node->proc = proc;
973 node->ptr = ptr;
974 node->cookie = cookie;
975 node->work.type = BINDER_WORK_NODE;
976 INIT_LIST_HEAD(&node->work.entry);
977 INIT_LIST_HEAD(&node->async_todo);
978 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
979 "binder: %d:%d node %d u%p c%p created\n",
980 proc->pid, current->pid, node->debug_id,
981 node->ptr, node->cookie);
982 return node;
983}
984
985static int binder_inc_node(struct binder_node *node, int strong, int internal,
986 struct list_head *target_list)
987{
988 if (strong) {
989 if (internal) {
990 if (target_list == NULL &&
991 node->internal_strong_refs == 0 &&
992 !(node == binder_context_mgr_node &&
993 node->has_strong_ref)) {
994 printk(KERN_ERR "binder: invalid inc strong "
995 "node for %d\n", node->debug_id);
996 return -EINVAL;
997 }
998 node->internal_strong_refs++;
999 } else
1000 node->local_strong_refs++;
1001 if (!node->has_strong_ref && target_list) {
1002 list_del_init(&node->work.entry);
1003 list_add_tail(&node->work.entry, target_list);
1004 }
1005 } else {
1006 if (!internal)
1007 node->local_weak_refs++;
1008 if (!node->has_weak_ref && list_empty(&node->work.entry)) {
1009 if (target_list == NULL) {
1010 printk(KERN_ERR "binder: invalid inc weak node "
1011 "for %d\n", node->debug_id);
1012 return -EINVAL;
1013 }
1014 list_add_tail(&node->work.entry, target_list);
1015 }
1016 }
1017 return 0;
1018}
1019
1020static int binder_dec_node(struct binder_node *node, int strong, int internal)
1021{
1022 if (strong) {
1023 if (internal)
1024 node->internal_strong_refs--;
1025 else
1026 node->local_strong_refs--;
1027 if (node->local_strong_refs || node->internal_strong_refs)
1028 return 0;
1029 } else {
1030 if (!internal)
1031 node->local_weak_refs--;
1032 if (node->local_weak_refs || !hlist_empty(&node->refs))
1033 return 0;
1034 }
1035 if (node->proc && (node->has_strong_ref || node->has_weak_ref)) {
1036 if (list_empty(&node->work.entry)) {
1037 list_add_tail(&node->work.entry, &node->proc->todo);
1038 wake_up_interruptible(&node->proc->wait);
1039 }
1040 } else {
1041 if (hlist_empty(&node->refs) && !node->local_strong_refs &&
1042 !node->local_weak_refs) {
1043 list_del_init(&node->work.entry);
1044 if (node->proc) {
1045 rb_erase(&node->rb_node, &node->proc->nodes);
1046 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1047 "binder: refless node %d deleted\n",
1048 node->debug_id);
1049 } else {
1050 hlist_del(&node->dead_node);
1051 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1052 "binder: dead node %d deleted\n",
1053 node->debug_id);
1054 }
1055 kfree(node);
1056 binder_stats_deleted(BINDER_STAT_NODE);
1057 }
1058 }
1059
1060 return 0;
1061}
1062
1063
1064static struct binder_ref *binder_get_ref(struct binder_proc *proc,
1065 uint32_t desc)
1066{
1067 struct rb_node *n = proc->refs_by_desc.rb_node;
1068 struct binder_ref *ref;
1069
1070 while (n) {
1071 ref = rb_entry(n, struct binder_ref, rb_node_desc);
1072
1073 if (desc < ref->desc)
1074 n = n->rb_left;
1075 else if (desc > ref->desc)
1076 n = n->rb_right;
1077 else
1078 return ref;
1079 }
1080 return NULL;
1081}
1082
1083static struct binder_ref *binder_get_ref_for_node(struct binder_proc *proc,
1084 struct binder_node *node)
1085{
1086 struct rb_node *n;
1087 struct rb_node **p = &proc->refs_by_node.rb_node;
1088 struct rb_node *parent = NULL;
1089 struct binder_ref *ref, *new_ref;
1090
1091 while (*p) {
1092 parent = *p;
1093 ref = rb_entry(parent, struct binder_ref, rb_node_node);
1094
1095 if (node < ref->node)
1096 p = &(*p)->rb_left;
1097 else if (node > ref->node)
1098 p = &(*p)->rb_right;
1099 else
1100 return ref;
1101 }
1102 new_ref = kzalloc(sizeof(*ref), GFP_KERNEL);
1103 if (new_ref == NULL)
1104 return NULL;
1105 binder_stats_created(BINDER_STAT_REF);
1106 new_ref->debug_id = ++binder_last_id;
1107 new_ref->proc = proc;
1108 new_ref->node = node;
1109 rb_link_node(&new_ref->rb_node_node, parent, p);
1110 rb_insert_color(&new_ref->rb_node_node, &proc->refs_by_node);
1111
1112 new_ref->desc = (node == binder_context_mgr_node) ? 0 : 1;
1113 for (n = rb_first(&proc->refs_by_desc); n != NULL; n = rb_next(n)) {
1114 ref = rb_entry(n, struct binder_ref, rb_node_desc);
1115 if (ref->desc > new_ref->desc)
1116 break;
1117 new_ref->desc = ref->desc + 1;
1118 }
1119
1120 p = &proc->refs_by_desc.rb_node;
1121 while (*p) {
1122 parent = *p;
1123 ref = rb_entry(parent, struct binder_ref, rb_node_desc);
1124
1125 if (new_ref->desc < ref->desc)
1126 p = &(*p)->rb_left;
1127 else if (new_ref->desc > ref->desc)
1128 p = &(*p)->rb_right;
1129 else
1130 BUG();
1131 }
1132 rb_link_node(&new_ref->rb_node_desc, parent, p);
1133 rb_insert_color(&new_ref->rb_node_desc, &proc->refs_by_desc);
1134 if (node) {
1135 hlist_add_head(&new_ref->node_entry, &node->refs);
1136
1137 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1138 "binder: %d new ref %d desc %d for "
1139 "node %d\n", proc->pid, new_ref->debug_id,
1140 new_ref->desc, node->debug_id);
1141 } else {
1142 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1143 "binder: %d new ref %d desc %d for "
1144 "dead node\n", proc->pid, new_ref->debug_id,
1145 new_ref->desc);
1146 }
1147 return new_ref;
1148}
1149
1150static void binder_delete_ref(struct binder_ref *ref)
1151{
1152 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
1153 "binder: %d delete ref %d desc %d for "
1154 "node %d\n", ref->proc->pid, ref->debug_id,
1155 ref->desc, ref->node->debug_id);
1156
1157 rb_erase(&ref->rb_node_desc, &ref->proc->refs_by_desc);
1158 rb_erase(&ref->rb_node_node, &ref->proc->refs_by_node);
1159 if (ref->strong)
1160 binder_dec_node(ref->node, 1, 1);
1161 hlist_del(&ref->node_entry);
1162 binder_dec_node(ref->node, 0, 1);
1163 if (ref->death) {
1164 binder_debug(BINDER_DEBUG_DEAD_BINDER,
1165 "binder: %d delete ref %d desc %d "
1166 "has death notification\n", ref->proc->pid,
1167 ref->debug_id, ref->desc);
1168 list_del(&ref->death->work.entry);
1169 kfree(ref->death);
1170 binder_stats_deleted(BINDER_STAT_DEATH);
1171 }
1172 kfree(ref);
1173 binder_stats_deleted(BINDER_STAT_REF);
1174}
1175
1176static int binder_inc_ref(struct binder_ref *ref, int strong,
1177 struct list_head *target_list)
1178{
1179 int ret;
1180 if (strong) {
1181 if (ref->strong == 0) {
1182 ret = binder_inc_node(ref->node, 1, 1, target_list);
1183 if (ret)
1184 return ret;
1185 }
1186 ref->strong++;
1187 } else {
1188 if (ref->weak == 0) {
1189 ret = binder_inc_node(ref->node, 0, 1, target_list);
1190 if (ret)
1191 return ret;
1192 }
1193 ref->weak++;
1194 }
1195 return 0;
1196}
1197
1198
1199static int binder_dec_ref(struct binder_ref *ref, int strong)
1200{
1201 if (strong) {
1202 if (ref->strong == 0) {
1203 binder_user_error("binder: %d invalid dec strong, "
1204 "ref %d desc %d s %d w %d\n",
1205 ref->proc->pid, ref->debug_id,
1206 ref->desc, ref->strong, ref->weak);
1207 return -EINVAL;
1208 }
1209 ref->strong--;
1210 if (ref->strong == 0) {
1211 int ret;
1212 ret = binder_dec_node(ref->node, strong, 1);
1213 if (ret)
1214 return ret;
1215 }
1216 } else {
1217 if (ref->weak == 0) {
1218 binder_user_error("binder: %d invalid dec weak, "
1219 "ref %d desc %d s %d w %d\n",
1220 ref->proc->pid, ref->debug_id,
1221 ref->desc, ref->strong, ref->weak);
1222 return -EINVAL;
1223 }
1224 ref->weak--;
1225 }
1226 if (ref->strong == 0 && ref->weak == 0)
1227 binder_delete_ref(ref);
1228 return 0;
1229}
1230
1231static void binder_pop_transaction(struct binder_thread *target_thread,
1232 struct binder_transaction *t)
1233{
1234 if (target_thread) {
1235 BUG_ON(target_thread->transaction_stack != t);
1236 BUG_ON(target_thread->transaction_stack->from != target_thread);
1237 target_thread->transaction_stack =
1238 target_thread->transaction_stack->from_parent;
1239 t->from = NULL;
1240 }
1241 t->need_reply = 0;
1242 if (t->buffer)
1243 t->buffer->transaction = NULL;
1244 kfree(t);
1245 binder_stats_deleted(BINDER_STAT_TRANSACTION);
1246}
1247
1248static void binder_send_failed_reply(struct binder_transaction *t,
1249 uint32_t error_code)
1250{
1251 struct binder_thread *target_thread;
1252 BUG_ON(t->flags & TF_ONE_WAY);
1253 while (1) {
1254 target_thread = t->from;
1255 if (target_thread) {
1256 if (target_thread->return_error != BR_OK &&
1257 target_thread->return_error2 == BR_OK) {
1258 target_thread->return_error2 =
1259 target_thread->return_error;
1260 target_thread->return_error = BR_OK;
1261 }
1262 if (target_thread->return_error == BR_OK) {
1263 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1264 "binder: send failed reply for "
1265 "transaction %d to %d:%d\n",
1266 t->debug_id, target_thread->proc->pid,
1267 target_thread->pid);
1268
1269 binder_pop_transaction(target_thread, t);
1270 target_thread->return_error = error_code;
1271 wake_up_interruptible(&target_thread->wait);
1272 } else {
1273 printk(KERN_ERR "binder: reply failed, target "
1274 "thread, %d:%d, has error code %d "
1275 "already\n", target_thread->proc->pid,
1276 target_thread->pid,
1277 target_thread->return_error);
1278 }
1279 return;
1280 } else {
1281 struct binder_transaction *next = t->from_parent;
1282
1283 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1284 "binder: send failed reply "
1285 "for transaction %d, target dead\n",
1286 t->debug_id);
1287
1288 binder_pop_transaction(target_thread, t);
1289 if (next == NULL) {
1290 binder_debug(BINDER_DEBUG_DEAD_BINDER,
1291 "binder: reply failed,"
1292 " no target thread at root\n");
1293 return;
1294 }
1295 t = next;
1296 binder_debug(BINDER_DEBUG_DEAD_BINDER,
1297 "binder: reply failed, no target "
1298 "thread -- retry %d\n", t->debug_id);
1299 }
1300 }
1301}
1302
1303static void binder_transaction_buffer_release(struct binder_proc *proc,
1304 struct binder_buffer *buffer,
1305 size_t *failed_at)
1306{
1307 size_t *offp, *off_end;
1308 int debug_id = buffer->debug_id;
1309
1310 binder_debug(BINDER_DEBUG_TRANSACTION,
1311 "binder: %d buffer release %d, size %zd-%zd, failed at %p\n",
1312 proc->pid, buffer->debug_id,
1313 buffer->data_size, buffer->offsets_size, failed_at);
1314
1315 if (buffer->target_node)
1316 binder_dec_node(buffer->target_node, 1, 0);
1317
1318 offp = (size_t *)(buffer->data + ALIGN(buffer->data_size, sizeof(void *)));
1319 if (failed_at)
1320 off_end = failed_at;
1321 else
1322 off_end = (void *)offp + buffer->offsets_size;
1323 for (; offp < off_end; offp++) {
1324 struct flat_binder_object *fp;
1325 if (*offp > buffer->data_size - sizeof(*fp) ||
1326 buffer->data_size < sizeof(*fp) ||
1327 !IS_ALIGNED(*offp, sizeof(void *))) {
1328 printk(KERN_ERR "binder: transaction release %d bad"
1329 "offset %zd, size %zd\n", debug_id,
1330 *offp, buffer->data_size);
1331 continue;
1332 }
1333 fp = (struct flat_binder_object *)(buffer->data + *offp);
1334 switch (fp->type) {
1335 case BINDER_TYPE_BINDER:
1336 case BINDER_TYPE_WEAK_BINDER: {
1337 struct binder_node *node = binder_get_node(proc, fp->binder);
1338 if (node == NULL) {
1339 printk(KERN_ERR "binder: transaction release %d"
1340 " bad node %p\n", debug_id, fp->binder);
1341 break;
1342 }
1343 binder_debug(BINDER_DEBUG_TRANSACTION,
1344 " node %d u%p\n",
1345 node->debug_id, node->ptr);
1346 binder_dec_node(node, fp->type == BINDER_TYPE_BINDER, 0);
1347 } break;
1348 case BINDER_TYPE_HANDLE:
1349 case BINDER_TYPE_WEAK_HANDLE: {
1350 struct binder_ref *ref = binder_get_ref(proc, fp->handle);
1351 if (ref == NULL) {
1352 printk(KERN_ERR "binder: transaction release %d"
1353 " bad handle %ld\n", debug_id,
1354 fp->handle);
1355 break;
1356 }
1357 binder_debug(BINDER_DEBUG_TRANSACTION,
1358 " ref %d desc %d (node %d)\n",
1359 ref->debug_id, ref->desc, ref->node->debug_id);
1360 binder_dec_ref(ref, fp->type == BINDER_TYPE_HANDLE);
1361 } break;
1362
1363 case BINDER_TYPE_FD:
1364 binder_debug(BINDER_DEBUG_TRANSACTION,
1365 " fd %ld\n", fp->handle);
1366 if (failed_at)
1367 task_close_fd(proc, fp->handle);
1368 break;
1369
1370 default:
1371 printk(KERN_ERR "binder: transaction release %d bad "
1372 "object type %lx\n", debug_id, fp->type);
1373 break;
1374 }
1375 }
1376}
1377
1378static void binder_transaction(struct binder_proc *proc,
1379 struct binder_thread *thread,
1380 struct binder_transaction_data *tr, int reply)
1381{
1382 struct binder_transaction *t;
1383 struct binder_work *tcomplete;
1384 size_t *offp, *off_end;
1385 struct binder_proc *target_proc;
1386 struct binder_thread *target_thread = NULL;
1387 struct binder_node *target_node = NULL;
1388 struct list_head *target_list;
1389 wait_queue_head_t *target_wait;
1390 struct binder_transaction *in_reply_to = NULL;
1391 struct binder_transaction_log_entry *e;
1392 uint32_t return_error;
1393
1394 e = binder_transaction_log_add(&binder_transaction_log);
1395 e->call_type = reply ? 2 : !!(tr->flags & TF_ONE_WAY);
1396 e->from_proc = proc->pid;
1397 e->from_thread = thread->pid;
1398 e->target_handle = tr->target.handle;
1399 e->data_size = tr->data_size;
1400 e->offsets_size = tr->offsets_size;
1401
1402 if (reply) {
1403 in_reply_to = thread->transaction_stack;
1404 if (in_reply_to == NULL) {
1405 binder_user_error("binder: %d:%d got reply transaction "
1406 "with no transaction stack\n",
1407 proc->pid, thread->pid);
1408 return_error = BR_FAILED_REPLY;
1409 goto err_empty_call_stack;
1410 }
1411 binder_set_nice(in_reply_to->saved_priority);
1412 if (in_reply_to->to_thread != thread) {
1413 binder_user_error("binder: %d:%d got reply transaction "
1414 "with bad transaction stack,"
1415 " transaction %d has target %d:%d\n",
1416 proc->pid, thread->pid, in_reply_to->debug_id,
1417 in_reply_to->to_proc ?
1418 in_reply_to->to_proc->pid : 0,
1419 in_reply_to->to_thread ?
1420 in_reply_to->to_thread->pid : 0);
1421 return_error = BR_FAILED_REPLY;
1422 in_reply_to = NULL;
1423 goto err_bad_call_stack;
1424 }
1425 thread->transaction_stack = in_reply_to->to_parent;
1426 target_thread = in_reply_to->from;
1427 if (target_thread == NULL) {
1428 return_error = BR_DEAD_REPLY;
1429 goto err_dead_binder;
1430 }
1431 if (target_thread->transaction_stack != in_reply_to) {
1432 binder_user_error("binder: %d:%d got reply transaction "
1433 "with bad target transaction stack %d, "
1434 "expected %d\n",
1435 proc->pid, thread->pid,
1436 target_thread->transaction_stack ?
1437 target_thread->transaction_stack->debug_id : 0,
1438 in_reply_to->debug_id);
1439 return_error = BR_FAILED_REPLY;
1440 in_reply_to = NULL;
1441 target_thread = NULL;
1442 goto err_dead_binder;
1443 }
1444 target_proc = target_thread->proc;
1445 } else {
1446 if (tr->target.handle) {
1447 struct binder_ref *ref;
1448 ref = binder_get_ref(proc, tr->target.handle);
1449 if (ref == NULL) {
1450 binder_user_error("binder: %d:%d got "
1451 "transaction to invalid handle\n",
1452 proc->pid, thread->pid);
1453 return_error = BR_FAILED_REPLY;
1454 goto err_invalid_target_handle;
1455 }
1456 target_node = ref->node;
1457 } else {
1458 target_node = binder_context_mgr_node;
1459 if (target_node == NULL) {
1460 return_error = BR_DEAD_REPLY;
1461 goto err_no_context_mgr_node;
1462 }
1463 }
1464 e->to_node = target_node->debug_id;
1465 target_proc = target_node->proc;
1466 if (target_proc == NULL) {
1467 return_error = BR_DEAD_REPLY;
1468 goto err_dead_binder;
1469 }
1470 if (!(tr->flags & TF_ONE_WAY) && thread->transaction_stack) {
1471 struct binder_transaction *tmp;
1472 tmp = thread->transaction_stack;
1473 if (tmp->to_thread != thread) {
1474 binder_user_error("binder: %d:%d got new "
1475 "transaction with bad transaction stack"
1476 ", transaction %d has target %d:%d\n",
1477 proc->pid, thread->pid, tmp->debug_id,
1478 tmp->to_proc ? tmp->to_proc->pid : 0,
1479 tmp->to_thread ?
1480 tmp->to_thread->pid : 0);
1481 return_error = BR_FAILED_REPLY;
1482 goto err_bad_call_stack;
1483 }
1484 while (tmp) {
1485 if (tmp->from && tmp->from->proc == target_proc)
1486 target_thread = tmp->from;
1487 tmp = tmp->from_parent;
1488 }
1489 }
1490 }
1491 if (target_thread) {
1492 e->to_thread = target_thread->pid;
1493 target_list = &target_thread->todo;
1494 target_wait = &target_thread->wait;
1495 } else {
1496 target_list = &target_proc->todo;
1497 target_wait = &target_proc->wait;
1498 }
1499 e->to_proc = target_proc->pid;
1500
1501 /* TODO: reuse incoming transaction for reply */
1502 t = kzalloc(sizeof(*t), GFP_KERNEL);
1503 if (t == NULL) {
1504 return_error = BR_FAILED_REPLY;
1505 goto err_alloc_t_failed;
1506 }
1507 binder_stats_created(BINDER_STAT_TRANSACTION);
1508
1509 tcomplete = kzalloc(sizeof(*tcomplete), GFP_KERNEL);
1510 if (tcomplete == NULL) {
1511 return_error = BR_FAILED_REPLY;
1512 goto err_alloc_tcomplete_failed;
1513 }
1514 binder_stats_created(BINDER_STAT_TRANSACTION_COMPLETE);
1515
1516 t->debug_id = ++binder_last_id;
1517 e->debug_id = t->debug_id;
1518
1519 if (reply)
1520 binder_debug(BINDER_DEBUG_TRANSACTION,
1521 "binder: %d:%d BC_REPLY %d -> %d:%d, "
1522 "data %p-%p size %zd-%zd\n",
1523 proc->pid, thread->pid, t->debug_id,
1524 target_proc->pid, target_thread->pid,
1525 tr->data.ptr.buffer, tr->data.ptr.offsets,
1526 tr->data_size, tr->offsets_size);
1527 else
1528 binder_debug(BINDER_DEBUG_TRANSACTION,
1529 "binder: %d:%d BC_TRANSACTION %d -> "
1530 "%d - node %d, data %p-%p size %zd-%zd\n",
1531 proc->pid, thread->pid, t->debug_id,
1532 target_proc->pid, target_node->debug_id,
1533 tr->data.ptr.buffer, tr->data.ptr.offsets,
1534 tr->data_size, tr->offsets_size);
1535
1536 if (!reply && !(tr->flags & TF_ONE_WAY))
1537 t->from = thread;
1538 else
1539 t->from = NULL;
1540 t->sender_euid = proc->tsk->cred->euid;
1541 t->to_proc = target_proc;
1542 t->to_thread = target_thread;
1543 t->code = tr->code;
1544 t->flags = tr->flags;
1545 t->priority = task_nice(current);
1546 t->buffer = binder_alloc_buf(target_proc, tr->data_size,
1547 tr->offsets_size, !reply && (t->flags & TF_ONE_WAY));
1548 if (t->buffer == NULL) {
1549 return_error = BR_FAILED_REPLY;
1550 goto err_binder_alloc_buf_failed;
1551 }
1552 t->buffer->allow_user_free = 0;
1553 t->buffer->debug_id = t->debug_id;
1554 t->buffer->transaction = t;
1555 t->buffer->target_node = target_node;
1556 if (target_node)
1557 binder_inc_node(target_node, 1, 0, NULL);
1558
1559 offp = (size_t *)(t->buffer->data + ALIGN(tr->data_size, sizeof(void *)));
1560
1561 if (copy_from_user(t->buffer->data, tr->data.ptr.buffer, tr->data_size)) {
1562 binder_user_error("binder: %d:%d got transaction with invalid "
1563 "data ptr\n", proc->pid, thread->pid);
1564 return_error = BR_FAILED_REPLY;
1565 goto err_copy_data_failed;
1566 }
1567 if (copy_from_user(offp, tr->data.ptr.offsets, tr->offsets_size)) {
1568 binder_user_error("binder: %d:%d got transaction with invalid "
1569 "offsets ptr\n", proc->pid, thread->pid);
1570 return_error = BR_FAILED_REPLY;
1571 goto err_copy_data_failed;
1572 }
1573 if (!IS_ALIGNED(tr->offsets_size, sizeof(size_t))) {
1574 binder_user_error("binder: %d:%d got transaction with "
1575 "invalid offsets size, %zd\n",
1576 proc->pid, thread->pid, tr->offsets_size);
1577 return_error = BR_FAILED_REPLY;
1578 goto err_bad_offset;
1579 }
1580 off_end = (void *)offp + tr->offsets_size;
1581 for (; offp < off_end; offp++) {
1582 struct flat_binder_object *fp;
1583 if (*offp > t->buffer->data_size - sizeof(*fp) ||
1584 t->buffer->data_size < sizeof(*fp) ||
1585 !IS_ALIGNED(*offp, sizeof(void *))) {
1586 binder_user_error("binder: %d:%d got transaction with "
1587 "invalid offset, %zd\n",
1588 proc->pid, thread->pid, *offp);
1589 return_error = BR_FAILED_REPLY;
1590 goto err_bad_offset;
1591 }
1592 fp = (struct flat_binder_object *)(t->buffer->data + *offp);
1593 switch (fp->type) {
1594 case BINDER_TYPE_BINDER:
1595 case BINDER_TYPE_WEAK_BINDER: {
1596 struct binder_ref *ref;
1597 struct binder_node *node = binder_get_node(proc, fp->binder);
1598 if (node == NULL) {
1599 node = binder_new_node(proc, fp->binder, fp->cookie);
1600 if (node == NULL) {
1601 return_error = BR_FAILED_REPLY;
1602 goto err_binder_new_node_failed;
1603 }
1604 node->min_priority = fp->flags & FLAT_BINDER_FLAG_PRIORITY_MASK;
1605 node->accept_fds = !!(fp->flags & FLAT_BINDER_FLAG_ACCEPTS_FDS);
1606 }
1607 if (fp->cookie != node->cookie) {
1608 binder_user_error("binder: %d:%d sending u%p "
1609 "node %d, cookie mismatch %p != %p\n",
1610 proc->pid, thread->pid,
1611 fp->binder, node->debug_id,
1612 fp->cookie, node->cookie);
1613 goto err_binder_get_ref_for_node_failed;
1614 }
1615 ref = binder_get_ref_for_node(target_proc, node);
1616 if (ref == NULL) {
1617 return_error = BR_FAILED_REPLY;
1618 goto err_binder_get_ref_for_node_failed;
1619 }
1620 if (fp->type == BINDER_TYPE_BINDER)
1621 fp->type = BINDER_TYPE_HANDLE;
1622 else
1623 fp->type = BINDER_TYPE_WEAK_HANDLE;
1624 fp->handle = ref->desc;
1625 binder_inc_ref(ref, fp->type == BINDER_TYPE_HANDLE,
1626 &thread->todo);
1627
1628 binder_debug(BINDER_DEBUG_TRANSACTION,
1629 " node %d u%p -> ref %d desc %d\n",
1630 node->debug_id, node->ptr, ref->debug_id,
1631 ref->desc);
1632 } break;
1633 case BINDER_TYPE_HANDLE:
1634 case BINDER_TYPE_WEAK_HANDLE: {
1635 struct binder_ref *ref = binder_get_ref(proc, fp->handle);
1636 if (ref == NULL) {
1637 binder_user_error("binder: %d:%d got "
1638 "transaction with invalid "
1639 "handle, %ld\n", proc->pid,
1640 thread->pid, fp->handle);
1641 return_error = BR_FAILED_REPLY;
1642 goto err_binder_get_ref_failed;
1643 }
1644 if (ref->node->proc == target_proc) {
1645 if (fp->type == BINDER_TYPE_HANDLE)
1646 fp->type = BINDER_TYPE_BINDER;
1647 else
1648 fp->type = BINDER_TYPE_WEAK_BINDER;
1649 fp->binder = ref->node->ptr;
1650 fp->cookie = ref->node->cookie;
1651 binder_inc_node(ref->node, fp->type == BINDER_TYPE_BINDER, 0, NULL);
1652 binder_debug(BINDER_DEBUG_TRANSACTION,
1653 " ref %d desc %d -> node %d u%p\n",
1654 ref->debug_id, ref->desc, ref->node->debug_id,
1655 ref->node->ptr);
1656 } else {
1657 struct binder_ref *new_ref;
1658 new_ref = binder_get_ref_for_node(target_proc, ref->node);
1659 if (new_ref == NULL) {
1660 return_error = BR_FAILED_REPLY;
1661 goto err_binder_get_ref_for_node_failed;
1662 }
1663 fp->handle = new_ref->desc;
1664 binder_inc_ref(new_ref, fp->type == BINDER_TYPE_HANDLE, NULL);
1665 binder_debug(BINDER_DEBUG_TRANSACTION,
1666 " ref %d desc %d -> ref %d desc %d (node %d)\n",
1667 ref->debug_id, ref->desc, new_ref->debug_id,
1668 new_ref->desc, ref->node->debug_id);
1669 }
1670 } break;
1671
1672 case BINDER_TYPE_FD: {
1673 int target_fd;
1674 struct file *file;
1675
1676 if (reply) {
1677 if (!(in_reply_to->flags & TF_ACCEPT_FDS)) {
1678 binder_user_error("binder: %d:%d got reply with fd, %ld, but target does not allow fds\n",
1679 proc->pid, thread->pid, fp->handle);
1680 return_error = BR_FAILED_REPLY;
1681 goto err_fd_not_allowed;
1682 }
1683 } else if (!target_node->accept_fds) {
1684 binder_user_error("binder: %d:%d got transaction with fd, %ld, but target does not allow fds\n",
1685 proc->pid, thread->pid, fp->handle);
1686 return_error = BR_FAILED_REPLY;
1687 goto err_fd_not_allowed;
1688 }
1689
1690 file = fget(fp->handle);
1691 if (file == NULL) {
1692 binder_user_error("binder: %d:%d got transaction with invalid fd, %ld\n",
1693 proc->pid, thread->pid, fp->handle);
1694 return_error = BR_FAILED_REPLY;
1695 goto err_fget_failed;
1696 }
1697 target_fd = task_get_unused_fd_flags(target_proc, O_CLOEXEC);
1698 if (target_fd < 0) {
1699 fput(file);
1700 return_error = BR_FAILED_REPLY;
1701 goto err_get_unused_fd_failed;
1702 }
1703 task_fd_install(target_proc, target_fd, file);
1704 binder_debug(BINDER_DEBUG_TRANSACTION,
1705 " fd %ld -> %d\n", fp->handle, target_fd);
1706 /* TODO: fput? */
1707 fp->handle = target_fd;
1708 } break;
1709
1710 default:
1711 binder_user_error("binder: %d:%d got transactio"
1712 "n with invalid object type, %lx\n",
1713 proc->pid, thread->pid, fp->type);
1714 return_error = BR_FAILED_REPLY;
1715 goto err_bad_object_type;
1716 }
1717 }
1718 if (reply) {
1719 BUG_ON(t->buffer->async_transaction != 0);
1720 binder_pop_transaction(target_thread, in_reply_to);
1721 } else if (!(t->flags & TF_ONE_WAY)) {
1722 BUG_ON(t->buffer->async_transaction != 0);
1723 t->need_reply = 1;
1724 t->from_parent = thread->transaction_stack;
1725 thread->transaction_stack = t;
1726 } else {
1727 BUG_ON(target_node == NULL);
1728 BUG_ON(t->buffer->async_transaction != 1);
1729 if (target_node->has_async_transaction) {
1730 target_list = &target_node->async_todo;
1731 target_wait = NULL;
1732 } else
1733 target_node->has_async_transaction = 1;
1734 }
1735 t->work.type = BINDER_WORK_TRANSACTION;
1736 list_add_tail(&t->work.entry, target_list);
1737 tcomplete->type = BINDER_WORK_TRANSACTION_COMPLETE;
1738 list_add_tail(&tcomplete->entry, &thread->todo);
1739 if (target_wait)
1740 wake_up_interruptible(target_wait);
1741 return;
1742
1743err_get_unused_fd_failed:
1744err_fget_failed:
1745err_fd_not_allowed:
1746err_binder_get_ref_for_node_failed:
1747err_binder_get_ref_failed:
1748err_binder_new_node_failed:
1749err_bad_object_type:
1750err_bad_offset:
1751err_copy_data_failed:
1752 binder_transaction_buffer_release(target_proc, t->buffer, offp);
1753 t->buffer->transaction = NULL;
1754 binder_free_buf(target_proc, t->buffer);
1755err_binder_alloc_buf_failed:
1756 kfree(tcomplete);
1757 binder_stats_deleted(BINDER_STAT_TRANSACTION_COMPLETE);
1758err_alloc_tcomplete_failed:
1759 kfree(t);
1760 binder_stats_deleted(BINDER_STAT_TRANSACTION);
1761err_alloc_t_failed:
1762err_bad_call_stack:
1763err_empty_call_stack:
1764err_dead_binder:
1765err_invalid_target_handle:
1766err_no_context_mgr_node:
1767 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
1768 "binder: %d:%d transaction failed %d, size %zd-%zd\n",
1769 proc->pid, thread->pid, return_error,
1770 tr->data_size, tr->offsets_size);
1771
1772 {
1773 struct binder_transaction_log_entry *fe;
1774 fe = binder_transaction_log_add(&binder_transaction_log_failed);
1775 *fe = *e;
1776 }
1777
1778 BUG_ON(thread->return_error != BR_OK);
1779 if (in_reply_to) {
1780 thread->return_error = BR_TRANSACTION_COMPLETE;
1781 binder_send_failed_reply(in_reply_to, return_error);
1782 } else
1783 thread->return_error = return_error;
1784}
1785
1786int binder_thread_write(struct binder_proc *proc, struct binder_thread *thread,
1787 void __user *buffer, int size, signed long *consumed)
1788{
1789 uint32_t cmd;
1790 void __user *ptr = buffer + *consumed;
1791 void __user *end = buffer + size;
1792
1793 while (ptr < end && thread->return_error == BR_OK) {
1794 if (get_user(cmd, (uint32_t __user *)ptr))
1795 return -EFAULT;
1796 ptr += sizeof(uint32_t);
1797 if (_IOC_NR(cmd) < ARRAY_SIZE(binder_stats.bc)) {
1798 binder_stats.bc[_IOC_NR(cmd)]++;
1799 proc->stats.bc[_IOC_NR(cmd)]++;
1800 thread->stats.bc[_IOC_NR(cmd)]++;
1801 }
1802 switch (cmd) {
1803 case BC_INCREFS:
1804 case BC_ACQUIRE:
1805 case BC_RELEASE:
1806 case BC_DECREFS: {
1807 uint32_t target;
1808 struct binder_ref *ref;
1809 const char *debug_string;
1810
1811 if (get_user(target, (uint32_t __user *)ptr))
1812 return -EFAULT;
1813 ptr += sizeof(uint32_t);
1814 if (target == 0 && binder_context_mgr_node &&
1815 (cmd == BC_INCREFS || cmd == BC_ACQUIRE)) {
1816 ref = binder_get_ref_for_node(proc,
1817 binder_context_mgr_node);
1818 if (ref->desc != target) {
1819 binder_user_error("binder: %d:"
1820 "%d tried to acquire "
1821 "reference to desc 0, "
1822 "got %d instead\n",
1823 proc->pid, thread->pid,
1824 ref->desc);
1825 }
1826 } else
1827 ref = binder_get_ref(proc, target);
1828 if (ref == NULL) {
1829 binder_user_error("binder: %d:%d refcou"
1830 "nt change on invalid ref %d\n",
1831 proc->pid, thread->pid, target);
1832 break;
1833 }
1834 switch (cmd) {
1835 case BC_INCREFS:
1836 debug_string = "IncRefs";
1837 binder_inc_ref(ref, 0, NULL);
1838 break;
1839 case BC_ACQUIRE:
1840 debug_string = "Acquire";
1841 binder_inc_ref(ref, 1, NULL);
1842 break;
1843 case BC_RELEASE:
1844 debug_string = "Release";
1845 binder_dec_ref(ref, 1);
1846 break;
1847 case BC_DECREFS:
1848 default:
1849 debug_string = "DecRefs";
1850 binder_dec_ref(ref, 0);
1851 break;
1852 }
1853 binder_debug(BINDER_DEBUG_USER_REFS,
1854 "binder: %d:%d %s ref %d desc %d s %d w %d for node %d\n",
1855 proc->pid, thread->pid, debug_string, ref->debug_id,
1856 ref->desc, ref->strong, ref->weak, ref->node->debug_id);
1857 break;
1858 }
1859 case BC_INCREFS_DONE:
1860 case BC_ACQUIRE_DONE: {
1861 void __user *node_ptr;
1862 void *cookie;
1863 struct binder_node *node;
1864
1865 if (get_user(node_ptr, (void * __user *)ptr))
1866 return -EFAULT;
1867 ptr += sizeof(void *);
1868 if (get_user(cookie, (void * __user *)ptr))
1869 return -EFAULT;
1870 ptr += sizeof(void *);
1871 node = binder_get_node(proc, node_ptr);
1872 if (node == NULL) {
1873 binder_user_error("binder: %d:%d "
1874 "%s u%p no match\n",
1875 proc->pid, thread->pid,
1876 cmd == BC_INCREFS_DONE ?
1877 "BC_INCREFS_DONE" :
1878 "BC_ACQUIRE_DONE",
1879 node_ptr);
1880 break;
1881 }
1882 if (cookie != node->cookie) {
1883 binder_user_error("binder: %d:%d %s u%p node %d"
1884 " cookie mismatch %p != %p\n",
1885 proc->pid, thread->pid,
1886 cmd == BC_INCREFS_DONE ?
1887 "BC_INCREFS_DONE" : "BC_ACQUIRE_DONE",
1888 node_ptr, node->debug_id,
1889 cookie, node->cookie);
1890 break;
1891 }
1892 if (cmd == BC_ACQUIRE_DONE) {
1893 if (node->pending_strong_ref == 0) {
1894 binder_user_error("binder: %d:%d "
1895 "BC_ACQUIRE_DONE node %d has "
1896 "no pending acquire request\n",
1897 proc->pid, thread->pid,
1898 node->debug_id);
1899 break;
1900 }
1901 node->pending_strong_ref = 0;
1902 } else {
1903 if (node->pending_weak_ref == 0) {
1904 binder_user_error("binder: %d:%d "
1905 "BC_INCREFS_DONE node %d has "
1906 "no pending increfs request\n",
1907 proc->pid, thread->pid,
1908 node->debug_id);
1909 break;
1910 }
1911 node->pending_weak_ref = 0;
1912 }
1913 binder_dec_node(node, cmd == BC_ACQUIRE_DONE, 0);
1914 binder_debug(BINDER_DEBUG_USER_REFS,
1915 "binder: %d:%d %s node %d ls %d lw %d\n",
1916 proc->pid, thread->pid,
1917 cmd == BC_INCREFS_DONE ? "BC_INCREFS_DONE" : "BC_ACQUIRE_DONE",
1918 node->debug_id, node->local_strong_refs, node->local_weak_refs);
1919 break;
1920 }
1921 case BC_ATTEMPT_ACQUIRE:
1922 printk(KERN_ERR "binder: BC_ATTEMPT_ACQUIRE not supported\n");
1923 return -EINVAL;
1924 case BC_ACQUIRE_RESULT:
1925 printk(KERN_ERR "binder: BC_ACQUIRE_RESULT not supported\n");
1926 return -EINVAL;
1927
1928 case BC_FREE_BUFFER: {
1929 void __user *data_ptr;
1930 struct binder_buffer *buffer;
1931
1932 if (get_user(data_ptr, (void * __user *)ptr))
1933 return -EFAULT;
1934 ptr += sizeof(void *);
1935
1936 buffer = binder_buffer_lookup(proc, data_ptr);
1937 if (buffer == NULL) {
1938 binder_user_error("binder: %d:%d "
1939 "BC_FREE_BUFFER u%p no match\n",
1940 proc->pid, thread->pid, data_ptr);
1941 break;
1942 }
1943 if (!buffer->allow_user_free) {
1944 binder_user_error("binder: %d:%d "
1945 "BC_FREE_BUFFER u%p matched "
1946 "unreturned buffer\n",
1947 proc->pid, thread->pid, data_ptr);
1948 break;
1949 }
1950 binder_debug(BINDER_DEBUG_FREE_BUFFER,
1951 "binder: %d:%d BC_FREE_BUFFER u%p found buffer %d for %s transaction\n",
1952 proc->pid, thread->pid, data_ptr, buffer->debug_id,
1953 buffer->transaction ? "active" : "finished");
1954
1955 if (buffer->transaction) {
1956 buffer->transaction->buffer = NULL;
1957 buffer->transaction = NULL;
1958 }
1959 if (buffer->async_transaction && buffer->target_node) {
1960 BUG_ON(!buffer->target_node->has_async_transaction);
1961 if (list_empty(&buffer->target_node->async_todo))
1962 buffer->target_node->has_async_transaction = 0;
1963 else
1964 list_move_tail(buffer->target_node->async_todo.next, &thread->todo);
1965 }
1966 binder_transaction_buffer_release(proc, buffer, NULL);
1967 binder_free_buf(proc, buffer);
1968 break;
1969 }
1970
1971 case BC_TRANSACTION:
1972 case BC_REPLY: {
1973 struct binder_transaction_data tr;
1974
1975 if (copy_from_user(&tr, ptr, sizeof(tr)))
1976 return -EFAULT;
1977 ptr += sizeof(tr);
1978 binder_transaction(proc, thread, &tr, cmd == BC_REPLY);
1979 break;
1980 }
1981
1982 case BC_REGISTER_LOOPER:
1983 binder_debug(BINDER_DEBUG_THREADS,
1984 "binder: %d:%d BC_REGISTER_LOOPER\n",
1985 proc->pid, thread->pid);
1986 if (thread->looper & BINDER_LOOPER_STATE_ENTERED) {
1987 thread->looper |= BINDER_LOOPER_STATE_INVALID;
1988 binder_user_error("binder: %d:%d ERROR:"
1989 " BC_REGISTER_LOOPER called "
1990 "after BC_ENTER_LOOPER\n",
1991 proc->pid, thread->pid);
1992 } else if (proc->requested_threads == 0) {
1993 thread->looper |= BINDER_LOOPER_STATE_INVALID;
1994 binder_user_error("binder: %d:%d ERROR:"
1995 " BC_REGISTER_LOOPER called "
1996 "without request\n",
1997 proc->pid, thread->pid);
1998 } else {
1999 proc->requested_threads--;
2000 proc->requested_threads_started++;
2001 }
2002 thread->looper |= BINDER_LOOPER_STATE_REGISTERED;
2003 break;
2004 case BC_ENTER_LOOPER:
2005 binder_debug(BINDER_DEBUG_THREADS,
2006 "binder: %d:%d BC_ENTER_LOOPER\n",
2007 proc->pid, thread->pid);
2008 if (thread->looper & BINDER_LOOPER_STATE_REGISTERED) {
2009 thread->looper |= BINDER_LOOPER_STATE_INVALID;
2010 binder_user_error("binder: %d:%d ERROR:"
2011 " BC_ENTER_LOOPER called after "
2012 "BC_REGISTER_LOOPER\n",
2013 proc->pid, thread->pid);
2014 }
2015 thread->looper |= BINDER_LOOPER_STATE_ENTERED;
2016 break;
2017 case BC_EXIT_LOOPER:
2018 binder_debug(BINDER_DEBUG_THREADS,
2019 "binder: %d:%d BC_EXIT_LOOPER\n",
2020 proc->pid, thread->pid);
2021 thread->looper |= BINDER_LOOPER_STATE_EXITED;
2022 break;
2023
2024 case BC_REQUEST_DEATH_NOTIFICATION:
2025 case BC_CLEAR_DEATH_NOTIFICATION: {
2026 uint32_t target;
2027 void __user *cookie;
2028 struct binder_ref *ref;
2029 struct binder_ref_death *death;
2030
2031 if (get_user(target, (uint32_t __user *)ptr))
2032 return -EFAULT;
2033 ptr += sizeof(uint32_t);
2034 if (get_user(cookie, (void __user * __user *)ptr))
2035 return -EFAULT;
2036 ptr += sizeof(void *);
2037 ref = binder_get_ref(proc, target);
2038 if (ref == NULL) {
2039 binder_user_error("binder: %d:%d %s "
2040 "invalid ref %d\n",
2041 proc->pid, thread->pid,
2042 cmd == BC_REQUEST_DEATH_NOTIFICATION ?
2043 "BC_REQUEST_DEATH_NOTIFICATION" :
2044 "BC_CLEAR_DEATH_NOTIFICATION",
2045 target);
2046 break;
2047 }
2048
2049 binder_debug(BINDER_DEBUG_DEATH_NOTIFICATION,
2050 "binder: %d:%d %s %p ref %d desc %d s %d w %d for node %d\n",
2051 proc->pid, thread->pid,
2052 cmd == BC_REQUEST_DEATH_NOTIFICATION ?
2053 "BC_REQUEST_DEATH_NOTIFICATION" :
2054 "BC_CLEAR_DEATH_NOTIFICATION",
2055 cookie, ref->debug_id, ref->desc,
2056 ref->strong, ref->weak, ref->node->debug_id);
2057
2058 if (cmd == BC_REQUEST_DEATH_NOTIFICATION) {
2059 if (ref->death) {
2060 binder_user_error("binder: %d:%"
2061 "d BC_REQUEST_DEATH_NOTI"
2062 "FICATION death notific"
2063 "ation already set\n",
2064 proc->pid, thread->pid);
2065 break;
2066 }
2067 death = kzalloc(sizeof(*death), GFP_KERNEL);
2068 if (death == NULL) {
2069 thread->return_error = BR_ERROR;
2070 binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
2071 "binder: %d:%d "
2072 "BC_REQUEST_DEATH_NOTIFICATION failed\n",
2073 proc->pid, thread->pid);
2074 break;
2075 }
2076 binder_stats_created(BINDER_STAT_DEATH);
2077 INIT_LIST_HEAD(&death->work.entry);
2078 death->cookie = cookie;
2079 ref->death = death;
2080 if (ref->node->proc == NULL) {
2081 ref->death->work.type = BINDER_WORK_DEAD_BINDER;
2082 if (thread->looper & (BINDER_LOOPER_STATE_REGISTERED | BINDER_LOOPER_STATE_ENTERED)) {
2083 list_add_tail(&ref->death->work.entry, &thread->todo);
2084 } else {
2085 list_add_tail(&ref->death->work.entry, &proc->todo);
2086 wake_up_interruptible(&proc->wait);
2087 }
2088 }
2089 } else {
2090 if (ref->death == NULL) {
2091 binder_user_error("binder: %d:%"
2092 "d BC_CLEAR_DEATH_NOTIFI"
2093 "CATION death notificat"
2094 "ion not active\n",
2095 proc->pid, thread->pid);
2096 break;
2097 }
2098 death = ref->death;
2099 if (death->cookie != cookie) {
2100 binder_user_error("binder: %d:%"
2101 "d BC_CLEAR_DEATH_NOTIFI"
2102 "CATION death notificat"
2103 "ion cookie mismatch "
2104 "%p != %p\n",
2105 proc->pid, thread->pid,
2106 death->cookie, cookie);
2107 break;
2108 }
2109 ref->death = NULL;
2110 if (list_empty(&death->work.entry)) {
2111 death->work.type = BINDER_WORK_CLEAR_DEATH_NOTIFICATION;
2112 if (thread->looper & (BINDER_LOOPER_STATE_REGISTERED | BINDER_LOOPER_STATE_ENTERED)) {
2113 list_add_tail(&death->work.entry, &thread->todo);
2114 } else {
2115 list_add_tail(&death->work.entry, &proc->todo);
2116 wake_up_interruptible(&proc->wait);
2117 }
2118 } else {
2119 BUG_ON(death->work.type != BINDER_WORK_DEAD_BINDER);
2120 death->work.type = BINDER_WORK_DEAD_BINDER_AND_CLEAR;
2121 }
2122 }
2123 } break;
2124 case BC_DEAD_BINDER_DONE: {
2125 struct binder_work *w;
2126 void __user *cookie;
2127 struct binder_ref_death *death = NULL;
2128 if (get_user(cookie, (void __user * __user *)ptr))
2129 return -EFAULT;
2130
2131 ptr += sizeof(void *);
2132 list_for_each_entry(w, &proc->delivered_death, entry) {
2133 struct binder_ref_death *tmp_death = container_of(w, struct binder_ref_death, work);
2134 if (tmp_death->cookie == cookie) {
2135 death = tmp_death;
2136 break;
2137 }
2138 }
2139 binder_debug(BINDER_DEBUG_DEAD_BINDER,
2140 "binder: %d:%d BC_DEAD_BINDER_DONE %p found %p\n",
2141 proc->pid, thread->pid, cookie, death);
2142 if (death == NULL) {
2143 binder_user_error("binder: %d:%d BC_DEAD"
2144 "_BINDER_DONE %p not found\n",
2145 proc->pid, thread->pid, cookie);
2146 break;
2147 }
2148
2149 list_del_init(&death->work.entry);
2150 if (death->work.type == BINDER_WORK_DEAD_BINDER_AND_CLEAR) {
2151 death->work.type = BINDER_WORK_CLEAR_DEATH_NOTIFICATION;
2152 if (thread->looper & (BINDER_LOOPER_STATE_REGISTERED | BINDER_LOOPER_STATE_ENTERED)) {
2153 list_add_tail(&death->work.entry, &thread->todo);
2154 } else {
2155 list_add_tail(&death->work.entry, &proc->todo);
2156 wake_up_interruptible(&proc->wait);
2157 }
2158 }
2159 } break;
2160
2161 default:
2162 printk(KERN_ERR "binder: %d:%d unknown command %d\n",
2163 proc->pid, thread->pid, cmd);
2164 return -EINVAL;
2165 }
2166 *consumed = ptr - buffer;
2167 }
2168 return 0;
2169}
2170
2171void binder_stat_br(struct binder_proc *proc, struct binder_thread *thread,
2172 uint32_t cmd)
2173{
2174 if (_IOC_NR(cmd) < ARRAY_SIZE(binder_stats.br)) {
2175 binder_stats.br[_IOC_NR(cmd)]++;
2176 proc->stats.br[_IOC_NR(cmd)]++;
2177 thread->stats.br[_IOC_NR(cmd)]++;
2178 }
2179}
2180
2181static int binder_has_proc_work(struct binder_proc *proc,
2182 struct binder_thread *thread)
2183{
2184 return !list_empty(&proc->todo) ||
2185 (thread->looper & BINDER_LOOPER_STATE_NEED_RETURN);
2186}
2187
2188static int binder_has_thread_work(struct binder_thread *thread)
2189{
2190 return !list_empty(&thread->todo) || thread->return_error != BR_OK ||
2191 (thread->looper & BINDER_LOOPER_STATE_NEED_RETURN);
2192}
2193
2194static int binder_thread_read(struct binder_proc *proc,
2195 struct binder_thread *thread,
2196 void __user *buffer, int size,
2197 signed long *consumed, int non_block)
2198{
2199 void __user *ptr = buffer + *consumed;
2200 void __user *end = buffer + size;
2201
2202 int ret = 0;
2203 int wait_for_proc_work;
2204
2205 if (*consumed == 0) {
2206 if (put_user(BR_NOOP, (uint32_t __user *)ptr))
2207 return -EFAULT;
2208 ptr += sizeof(uint32_t);
2209 }
2210
2211retry:
2212 wait_for_proc_work = thread->transaction_stack == NULL &&
2213 list_empty(&thread->todo);
2214
2215 if (thread->return_error != BR_OK && ptr < end) {
2216 if (thread->return_error2 != BR_OK) {
2217 if (put_user(thread->return_error2, (uint32_t __user *)ptr))
2218 return -EFAULT;
2219 ptr += sizeof(uint32_t);
2220 if (ptr == end)
2221 goto done;
2222 thread->return_error2 = BR_OK;
2223 }
2224 if (put_user(thread->return_error, (uint32_t __user *)ptr))
2225 return -EFAULT;
2226 ptr += sizeof(uint32_t);
2227 thread->return_error = BR_OK;
2228 goto done;
2229 }
2230
2231
2232 thread->looper |= BINDER_LOOPER_STATE_WAITING;
2233 if (wait_for_proc_work)
2234 proc->ready_threads++;
2235 mutex_unlock(&binder_lock);
2236 if (wait_for_proc_work) {
2237 if (!(thread->looper & (BINDER_LOOPER_STATE_REGISTERED |
2238 BINDER_LOOPER_STATE_ENTERED))) {
2239 binder_user_error("binder: %d:%d ERROR: Thread waiting "
2240 "for process work before calling BC_REGISTER_"
2241 "LOOPER or BC_ENTER_LOOPER (state %x)\n",
2242 proc->pid, thread->pid, thread->looper);
2243 wait_event_interruptible(binder_user_error_wait,
2244 binder_stop_on_user_error < 2);
2245 }
2246 binder_set_nice(proc->default_priority);
2247 if (non_block) {
2248 if (!binder_has_proc_work(proc, thread))
2249 ret = -EAGAIN;
2250 } else
2251 ret = wait_event_interruptible_exclusive(proc->wait, binder_has_proc_work(proc, thread));
2252 } else {
2253 if (non_block) {
2254 if (!binder_has_thread_work(thread))
2255 ret = -EAGAIN;
2256 } else
2257 ret = wait_event_interruptible(thread->wait, binder_has_thread_work(thread));
2258 }
2259 mutex_lock(&binder_lock);
2260 if (wait_for_proc_work)
2261 proc->ready_threads--;
2262 thread->looper &= ~BINDER_LOOPER_STATE_WAITING;
2263
2264 if (ret)
2265 return ret;
2266
2267 while (1) {
2268 uint32_t cmd;
2269 struct binder_transaction_data tr;
2270 struct binder_work *w;
2271 struct binder_transaction *t = NULL;
2272
2273 if (!list_empty(&thread->todo))
2274 w = list_first_entry(&thread->todo, struct binder_work, entry);
2275 else if (!list_empty(&proc->todo) && wait_for_proc_work)
2276 w = list_first_entry(&proc->todo, struct binder_work, entry);
2277 else {
2278 if (ptr - buffer == 4 && !(thread->looper & BINDER_LOOPER_STATE_NEED_RETURN)) /* no data added */
2279 goto retry;
2280 break;
2281 }
2282
2283 if (end - ptr < sizeof(tr) + 4)
2284 break;
2285
2286 switch (w->type) {
2287 case BINDER_WORK_TRANSACTION: {
2288 t = container_of(w, struct binder_transaction, work);
2289 } break;
2290 case BINDER_WORK_TRANSACTION_COMPLETE: {
2291 cmd = BR_TRANSACTION_COMPLETE;
2292 if (put_user(cmd, (uint32_t __user *)ptr))
2293 return -EFAULT;
2294 ptr += sizeof(uint32_t);
2295
2296 binder_stat_br(proc, thread, cmd);
2297 binder_debug(BINDER_DEBUG_TRANSACTION_COMPLETE,
2298 "binder: %d:%d BR_TRANSACTION_COMPLETE\n",
2299 proc->pid, thread->pid);
2300
2301 list_del(&w->entry);
2302 kfree(w);
2303 binder_stats_deleted(BINDER_STAT_TRANSACTION_COMPLETE);
2304 } break;
2305 case BINDER_WORK_NODE: {
2306 struct binder_node *node = container_of(w, struct binder_node, work);
2307 uint32_t cmd = BR_NOOP;
2308 const char *cmd_name;
2309 int strong = node->internal_strong_refs || node->local_strong_refs;
2310 int weak = !hlist_empty(&node->refs) || node->local_weak_refs || strong;
2311 if (weak && !node->has_weak_ref) {
2312 cmd = BR_INCREFS;
2313 cmd_name = "BR_INCREFS";
2314 node->has_weak_ref = 1;
2315 node->pending_weak_ref = 1;
2316 node->local_weak_refs++;
2317 } else if (strong && !node->has_strong_ref) {
2318 cmd = BR_ACQUIRE;
2319 cmd_name = "BR_ACQUIRE";
2320 node->has_strong_ref = 1;
2321 node->pending_strong_ref = 1;
2322 node->local_strong_refs++;
2323 } else if (!strong && node->has_strong_ref) {
2324 cmd = BR_RELEASE;
2325 cmd_name = "BR_RELEASE";
2326 node->has_strong_ref = 0;
2327 } else if (!weak && node->has_weak_ref) {
2328 cmd = BR_DECREFS;
2329 cmd_name = "BR_DECREFS";
2330 node->has_weak_ref = 0;
2331 }
2332 if (cmd != BR_NOOP) {
2333 if (put_user(cmd, (uint32_t __user *)ptr))
2334 return -EFAULT;
2335 ptr += sizeof(uint32_t);
2336 if (put_user(node->ptr, (void * __user *)ptr))
2337 return -EFAULT;
2338 ptr += sizeof(void *);
2339 if (put_user(node->cookie, (void * __user *)ptr))
2340 return -EFAULT;
2341 ptr += sizeof(void *);
2342
2343 binder_stat_br(proc, thread, cmd);
2344 binder_debug(BINDER_DEBUG_USER_REFS,
2345 "binder: %d:%d %s %d u%p c%p\n",
2346 proc->pid, thread->pid, cmd_name, node->debug_id, node->ptr, node->cookie);
2347 } else {
2348 list_del_init(&w->entry);
2349 if (!weak && !strong) {
2350 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
2351 "binder: %d:%d node %d u%p c%p deleted\n",
2352 proc->pid, thread->pid, node->debug_id,
2353 node->ptr, node->cookie);
2354 rb_erase(&node->rb_node, &proc->nodes);
2355 kfree(node);
2356 binder_stats_deleted(BINDER_STAT_NODE);
2357 } else {
2358 binder_debug(BINDER_DEBUG_INTERNAL_REFS,
2359 "binder: %d:%d node %d u%p c%p state unchanged\n",
2360 proc->pid, thread->pid, node->debug_id, node->ptr,
2361 node->cookie);
2362 }
2363 }
2364 } break;
2365 case BINDER_WORK_DEAD_BINDER:
2366 case BINDER_WORK_DEAD_BINDER_AND_CLEAR:
2367 case BINDER_WORK_CLEAR_DEATH_NOTIFICATION: {
2368 struct binder_ref_death *death;
2369 uint32_t cmd;
2370
2371 death = container_of(w, struct binder_ref_death, work);
2372 if (w->type == BINDER_WORK_CLEAR_DEATH_NOTIFICATION)
2373 cmd = BR_CLEAR_DEATH_NOTIFICATION_DONE;
2374 else
2375 cmd = BR_DEAD_BINDER;
2376 if (put_user(cmd, (uint32_t __user *)ptr))
2377 return -EFAULT;
2378 ptr += sizeof(uint32_t);
2379 if (put_user(death->cookie, (void * __user *)ptr))
2380 return -EFAULT;
2381 ptr += sizeof(void *);
2382 binder_debug(BINDER_DEBUG_DEATH_NOTIFICATION,
2383 "binder: %d:%d %s %p\n",
2384 proc->pid, thread->pid,
2385 cmd == BR_DEAD_BINDER ?
2386 "BR_DEAD_BINDER" :
2387 "BR_CLEAR_DEATH_NOTIFICATION_DONE",
2388 death->cookie);
2389
2390 if (w->type == BINDER_WORK_CLEAR_DEATH_NOTIFICATION) {
2391 list_del(&w->entry);
2392 kfree(death);
2393 binder_stats_deleted(BINDER_STAT_DEATH);
2394 } else
2395 list_move(&w->entry, &proc->delivered_death);
2396 if (cmd == BR_DEAD_BINDER)
2397 goto done; /* DEAD_BINDER notifications can cause transactions */
2398 } break;
2399 }
2400
2401 if (!t)
2402 continue;
2403
2404 BUG_ON(t->buffer == NULL);
2405 if (t->buffer->target_node) {
2406 struct binder_node *target_node = t->buffer->target_node;
2407 tr.target.ptr = target_node->ptr;
2408 tr.cookie = target_node->cookie;
2409 t->saved_priority = task_nice(current);
2410 if (t->priority < target_node->min_priority &&
2411 !(t->flags & TF_ONE_WAY))
2412 binder_set_nice(t->priority);
2413 else if (!(t->flags & TF_ONE_WAY) ||
2414 t->saved_priority > target_node->min_priority)
2415 binder_set_nice(target_node->min_priority);
2416 cmd = BR_TRANSACTION;
2417 } else {
2418 tr.target.ptr = NULL;
2419 tr.cookie = NULL;
2420 cmd = BR_REPLY;
2421 }
2422 tr.code = t->code;
2423 tr.flags = t->flags;
2424 tr.sender_euid = t->sender_euid;
2425
2426 if (t->from) {
2427 struct task_struct *sender = t->from->proc->tsk;
2428 tr.sender_pid = task_tgid_nr_ns(sender,
2429 current->nsproxy->pid_ns);
2430 } else {
2431 tr.sender_pid = 0;
2432 }
2433
2434 tr.data_size = t->buffer->data_size;
2435 tr.offsets_size = t->buffer->offsets_size;
2436 tr.data.ptr.buffer = (void *)t->buffer->data +
2437 proc->user_buffer_offset;
2438 tr.data.ptr.offsets = tr.data.ptr.buffer +
2439 ALIGN(t->buffer->data_size,
2440 sizeof(void *));
2441
2442 if (put_user(cmd, (uint32_t __user *)ptr))
2443 return -EFAULT;
2444 ptr += sizeof(uint32_t);
2445 if (copy_to_user(ptr, &tr, sizeof(tr)))
2446 return -EFAULT;
2447 ptr += sizeof(tr);
2448
2449 binder_stat_br(proc, thread, cmd);
2450 binder_debug(BINDER_DEBUG_TRANSACTION,
2451 "binder: %d:%d %s %d %d:%d, cmd %d"
2452 "size %zd-%zd ptr %p-%p\n",
2453 proc->pid, thread->pid,
2454 (cmd == BR_TRANSACTION) ? "BR_TRANSACTION" :
2455 "BR_REPLY",
2456 t->debug_id, t->from ? t->from->proc->pid : 0,
2457 t->from ? t->from->pid : 0, cmd,
2458 t->buffer->data_size, t->buffer->offsets_size,
2459 tr.data.ptr.buffer, tr.data.ptr.offsets);
2460
2461 list_del(&t->work.entry);
2462 t->buffer->allow_user_free = 1;
2463 if (cmd == BR_TRANSACTION && !(t->flags & TF_ONE_WAY)) {
2464 t->to_parent = thread->transaction_stack;
2465 t->to_thread = thread;
2466 thread->transaction_stack = t;
2467 } else {
2468 t->buffer->transaction = NULL;
2469 kfree(t);
2470 binder_stats_deleted(BINDER_STAT_TRANSACTION);
2471 }
2472 break;
2473 }
2474
2475done:
2476
2477 *consumed = ptr - buffer;
2478 if (proc->requested_threads + proc->ready_threads == 0 &&
2479 proc->requested_threads_started < proc->max_threads &&
2480 (thread->looper & (BINDER_LOOPER_STATE_REGISTERED |
2481 BINDER_LOOPER_STATE_ENTERED)) /* the user-space code fails to */
2482 /*spawn a new thread if we leave this out */) {
2483 proc->requested_threads++;
2484 binder_debug(BINDER_DEBUG_THREADS,
2485 "binder: %d:%d BR_SPAWN_LOOPER\n",
2486 proc->pid, thread->pid);
2487 if (put_user(BR_SPAWN_LOOPER, (uint32_t __user *)buffer))
2488 return -EFAULT;
2489 }
2490 return 0;
2491}
2492
2493static void binder_release_work(struct list_head *list)
2494{
2495 struct binder_work *w;
2496 while (!list_empty(list)) {
2497 w = list_first_entry(list, struct binder_work, entry);
2498 list_del_init(&w->entry);
2499 switch (w->type) {
2500 case BINDER_WORK_TRANSACTION: {
2501 struct binder_transaction *t;
2502
2503 t = container_of(w, struct binder_transaction, work);
2504 if (t->buffer->target_node && !(t->flags & TF_ONE_WAY))
2505 binder_send_failed_reply(t, BR_DEAD_REPLY);
2506 } break;
2507 case BINDER_WORK_TRANSACTION_COMPLETE: {
2508 kfree(w);
2509 binder_stats_deleted(BINDER_STAT_TRANSACTION_COMPLETE);
2510 } break;
2511 default:
2512 break;
2513 }
2514 }
2515
2516}
2517
2518static struct binder_thread *binder_get_thread(struct binder_proc *proc)
2519{
2520 struct binder_thread *thread = NULL;
2521 struct rb_node *parent = NULL;
2522 struct rb_node **p = &proc->threads.rb_node;
2523
2524 while (*p) {
2525 parent = *p;
2526 thread = rb_entry(parent, struct binder_thread, rb_node);
2527
2528 if (current->pid < thread->pid)
2529 p = &(*p)->rb_left;
2530 else if (current->pid > thread->pid)
2531 p = &(*p)->rb_right;
2532 else
2533 break;
2534 }
2535 if (*p == NULL) {
2536 thread = kzalloc(sizeof(*thread), GFP_KERNEL);
2537 if (thread == NULL)
2538 return NULL;
2539 binder_stats_created(BINDER_STAT_THREAD);
2540 thread->proc = proc;
2541 thread->pid = current->pid;
2542 init_waitqueue_head(&thread->wait);
2543 INIT_LIST_HEAD(&thread->todo);
2544 rb_link_node(&thread->rb_node, parent, p);
2545 rb_insert_color(&thread->rb_node, &proc->threads);
2546 thread->looper |= BINDER_LOOPER_STATE_NEED_RETURN;
2547 thread->return_error = BR_OK;
2548 thread->return_error2 = BR_OK;
2549 }
2550 return thread;
2551}
2552
2553static int binder_free_thread(struct binder_proc *proc,
2554 struct binder_thread *thread)
2555{
2556 struct binder_transaction *t;
2557 struct binder_transaction *send_reply = NULL;
2558 int active_transactions = 0;
2559
2560 rb_erase(&thread->rb_node, &proc->threads);
2561 t = thread->transaction_stack;
2562 if (t && t->to_thread == thread)
2563 send_reply = t;
2564 while (t) {
2565 active_transactions++;
2566 binder_debug(BINDER_DEBUG_DEAD_TRANSACTION,
2567 "binder: release %d:%d transaction %d "
2568 "%s, still active\n", proc->pid, thread->pid,
2569 t->debug_id,
2570 (t->to_thread == thread) ? "in" : "out");
2571
2572 if (t->to_thread == thread) {
2573 t->to_proc = NULL;
2574 t->to_thread = NULL;
2575 if (t->buffer) {
2576 t->buffer->transaction = NULL;
2577 t->buffer = NULL;
2578 }
2579 t = t->to_parent;
2580 } else if (t->from == thread) {
2581 t->from = NULL;
2582 t = t->from_parent;
2583 } else
2584 BUG();
2585 }
2586 if (send_reply)
2587 binder_send_failed_reply(send_reply, BR_DEAD_REPLY);
2588 binder_release_work(&thread->todo);
2589 kfree(thread);
2590 binder_stats_deleted(BINDER_STAT_THREAD);
2591 return active_transactions;
2592}
2593
2594static unsigned int binder_poll(struct file *filp,
2595 struct poll_table_struct *wait)
2596{
2597 struct binder_proc *proc = filp->private_data;
2598 struct binder_thread *thread = NULL;
2599 int wait_for_proc_work;
2600
2601 mutex_lock(&binder_lock);
2602 thread = binder_get_thread(proc);
2603
2604 wait_for_proc_work = thread->transaction_stack == NULL &&
2605 list_empty(&thread->todo) && thread->return_error == BR_OK;
2606 mutex_unlock(&binder_lock);
2607
2608 if (wait_for_proc_work) {
2609 if (binder_has_proc_work(proc, thread))
2610 return POLLIN;
2611 poll_wait(filp, &proc->wait, wait);
2612 if (binder_has_proc_work(proc, thread))
2613 return POLLIN;
2614 } else {
2615 if (binder_has_thread_work(thread))
2616 return POLLIN;
2617 poll_wait(filp, &thread->wait, wait);
2618 if (binder_has_thread_work(thread))
2619 return POLLIN;
2620 }
2621 return 0;
2622}
2623
2624static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
2625{
2626 int ret;
2627 struct binder_proc *proc = filp->private_data;
2628 struct binder_thread *thread;
2629 unsigned int size = _IOC_SIZE(cmd);
2630 void __user *ubuf = (void __user *)arg;
2631
2632 /*printk(KERN_INFO "binder_ioctl: %d:%d %x %lx\n", proc->pid, current->pid, cmd, arg);*/
2633
2634 ret = wait_event_interruptible(binder_user_error_wait, binder_stop_on_user_error < 2);
2635 if (ret)
2636 return ret;
2637
2638 mutex_lock(&binder_lock);
2639 thread = binder_get_thread(proc);
2640 if (thread == NULL) {
2641 ret = -ENOMEM;
2642 goto err;
2643 }
2644
2645 switch (cmd) {
2646 case BINDER_WRITE_READ: {
2647 struct binder_write_read bwr;
2648 if (size != sizeof(struct binder_write_read)) {
2649 ret = -EINVAL;
2650 goto err;
2651 }
2652 if (copy_from_user(&bwr, ubuf, sizeof(bwr))) {
2653 ret = -EFAULT;
2654 goto err;
2655 }
2656 binder_debug(BINDER_DEBUG_READ_WRITE,
2657 "binder: %d:%d write %ld at %08lx, read %ld at %08lx\n",
2658 proc->pid, thread->pid, bwr.write_size, bwr.write_buffer,
2659 bwr.read_size, bwr.read_buffer);
2660
2661 if (bwr.write_size > 0) {
2662 ret = binder_thread_write(proc, thread, (void __user *)bwr.write_buffer, bwr.write_size, &bwr.write_consumed);
2663 if (ret < 0) {
2664 bwr.read_consumed = 0;
2665 if (copy_to_user(ubuf, &bwr, sizeof(bwr)))
2666 ret = -EFAULT;
2667 goto err;
2668 }
2669 }
2670 if (bwr.read_size > 0) {
2671 ret = binder_thread_read(proc, thread, (void __user *)bwr.read_buffer, bwr.read_size, &bwr.read_consumed, filp->f_flags & O_NONBLOCK);
2672 if (!list_empty(&proc->todo))
2673 wake_up_interruptible(&proc->wait);
2674 if (ret < 0) {
2675 if (copy_to_user(ubuf, &bwr, sizeof(bwr)))
2676 ret = -EFAULT;
2677 goto err;
2678 }
2679 }
2680 binder_debug(BINDER_DEBUG_READ_WRITE,
2681 "binder: %d:%d wrote %ld of %ld, read return %ld of %ld\n",
2682 proc->pid, thread->pid, bwr.write_consumed, bwr.write_size,
2683 bwr.read_consumed, bwr.read_size);
2684 if (copy_to_user(ubuf, &bwr, sizeof(bwr))) {
2685 ret = -EFAULT;
2686 goto err;
2687 }
2688 break;
2689 }
2690 case BINDER_SET_MAX_THREADS:
2691 if (copy_from_user(&proc->max_threads, ubuf, sizeof(proc->max_threads))) {
2692 ret = -EINVAL;
2693 goto err;
2694 }
2695 break;
2696 case BINDER_SET_CONTEXT_MGR:
2697 if (binder_context_mgr_node != NULL) {
2698 printk(KERN_ERR "binder: BINDER_SET_CONTEXT_MGR already set\n");
2699 ret = -EBUSY;
2700 goto err;
2701 }
2702 if (binder_context_mgr_uid != -1) {
2703 if (binder_context_mgr_uid != current->cred->euid) {
2704 printk(KERN_ERR "binder: BINDER_SET_"
2705 "CONTEXT_MGR bad uid %d != %d\n",
2706 current->cred->euid,
2707 binder_context_mgr_uid);
2708 ret = -EPERM;
2709 goto err;
2710 }
2711 } else
2712 binder_context_mgr_uid = current->cred->euid;
2713 binder_context_mgr_node = binder_new_node(proc, NULL, NULL);
2714 if (binder_context_mgr_node == NULL) {
2715 ret = -ENOMEM;
2716 goto err;
2717 }
2718 binder_context_mgr_node->local_weak_refs++;
2719 binder_context_mgr_node->local_strong_refs++;
2720 binder_context_mgr_node->has_strong_ref = 1;
2721 binder_context_mgr_node->has_weak_ref = 1;
2722 break;
2723 case BINDER_THREAD_EXIT:
2724 binder_debug(BINDER_DEBUG_THREADS, "binder: %d:%d exit\n",
2725 proc->pid, thread->pid);
2726 binder_free_thread(proc, thread);
2727 thread = NULL;
2728 break;
2729 case BINDER_VERSION:
2730 if (size != sizeof(struct binder_version)) {
2731 ret = -EINVAL;
2732 goto err;
2733 }
2734 if (put_user(BINDER_CURRENT_PROTOCOL_VERSION, &((struct binder_version *)ubuf)->protocol_version)) {
2735 ret = -EINVAL;
2736 goto err;
2737 }
2738 break;
2739 default:
2740 ret = -EINVAL;
2741 goto err;
2742 }
2743 ret = 0;
2744err:
2745 if (thread)
2746 thread->looper &= ~BINDER_LOOPER_STATE_NEED_RETURN;
2747 mutex_unlock(&binder_lock);
2748 wait_event_interruptible(binder_user_error_wait, binder_stop_on_user_error < 2);
2749 if (ret && ret != -ERESTARTSYS)
2750 printk(KERN_INFO "binder: %d:%d ioctl %x %lx returned %d\n", proc->pid, current->pid, cmd, arg, ret);
2751 return ret;
2752}
2753
2754static void binder_vma_open(struct vm_area_struct *vma)
2755{
2756 struct binder_proc *proc = vma->vm_private_data;
2757 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
2758 "binder: %d open vm area %lx-%lx (%ld K) vma %lx pagep %lx\n",
2759 proc->pid, vma->vm_start, vma->vm_end,
2760 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags,
2761 (unsigned long)pgprot_val(vma->vm_page_prot));
2762 dump_stack();
2763}
2764
2765static void binder_vma_close(struct vm_area_struct *vma)
2766{
2767 struct binder_proc *proc = vma->vm_private_data;
2768 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
2769 "binder: %d close vm area %lx-%lx (%ld K) vma %lx pagep %lx\n",
2770 proc->pid, vma->vm_start, vma->vm_end,
2771 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags,
2772 (unsigned long)pgprot_val(vma->vm_page_prot));
2773 proc->vma = NULL;
2774 binder_defer_work(proc, BINDER_DEFERRED_PUT_FILES);
2775}
2776
2777static struct vm_operations_struct binder_vm_ops = {
2778 .open = binder_vma_open,
2779 .close = binder_vma_close,
2780};
2781
2782static int binder_mmap(struct file *filp, struct vm_area_struct *vma)
2783{
2784 int ret;
2785 struct vm_struct *area;
2786 struct binder_proc *proc = filp->private_data;
2787 const char *failure_string;
2788 struct binder_buffer *buffer;
2789
2790 if ((vma->vm_end - vma->vm_start) > SZ_4M)
2791 vma->vm_end = vma->vm_start + SZ_4M;
2792
2793 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
2794 "binder_mmap: %d %lx-%lx (%ld K) vma %lx pagep %lx\n",
2795 proc->pid, vma->vm_start, vma->vm_end,
2796 (vma->vm_end - vma->vm_start) / SZ_1K, vma->vm_flags,
2797 (unsigned long)pgprot_val(vma->vm_page_prot));
2798
2799 if (vma->vm_flags & FORBIDDEN_MMAP_FLAGS) {
2800 ret = -EPERM;
2801 failure_string = "bad vm_flags";
2802 goto err_bad_arg;
2803 }
2804 vma->vm_flags = (vma->vm_flags | VM_DONTCOPY) & ~VM_MAYWRITE;
2805
2806 if (proc->buffer) {
2807 ret = -EBUSY;
2808 failure_string = "already mapped";
2809 goto err_already_mapped;
2810 }
2811
2812 area = get_vm_area(vma->vm_end - vma->vm_start, VM_IOREMAP);
2813 if (area == NULL) {
2814 ret = -ENOMEM;
2815 failure_string = "get_vm_area";
2816 goto err_get_vm_area_failed;
2817 }
2818 proc->buffer = area->addr;
2819 proc->user_buffer_offset = vma->vm_start - (uintptr_t)proc->buffer;
2820
2821#ifdef CONFIG_CPU_CACHE_VIPT
2822 if (cache_is_vipt_aliasing()) {
2823 while (CACHE_COLOUR((vma->vm_start ^ (uint32_t)proc->buffer))) {
2824 printk(KERN_INFO "binder_mmap: %d %lx-%lx maps %p bad alignment\n", proc->pid, vma->vm_start, vma->vm_end, proc->buffer);
2825 vma->vm_start += PAGE_SIZE;
2826 }
2827 }
2828#endif
2829 proc->pages = kzalloc(sizeof(proc->pages[0]) * ((vma->vm_end - vma->vm_start) / PAGE_SIZE), GFP_KERNEL);
2830 if (proc->pages == NULL) {
2831 ret = -ENOMEM;
2832 failure_string = "alloc page array";
2833 goto err_alloc_pages_failed;
2834 }
2835 proc->buffer_size = vma->vm_end - vma->vm_start;
2836
2837 vma->vm_ops = &binder_vm_ops;
2838 vma->vm_private_data = proc;
2839
2840 if (binder_update_page_range(proc, 1, proc->buffer, proc->buffer + PAGE_SIZE, vma)) {
2841 ret = -ENOMEM;
2842 failure_string = "alloc small buf";
2843 goto err_alloc_small_buf_failed;
2844 }
2845 buffer = proc->buffer;
2846 INIT_LIST_HEAD(&proc->buffers);
2847 list_add(&buffer->entry, &proc->buffers);
2848 buffer->free = 1;
2849 binder_insert_free_buffer(proc, buffer);
2850 proc->free_async_space = proc->buffer_size / 2;
2851 barrier();
2852 proc->files = get_files_struct(current);
2853 proc->vma = vma;
2854
2855 /*printk(KERN_INFO "binder_mmap: %d %lx-%lx maps %p\n",
2856 proc->pid, vma->vm_start, vma->vm_end, proc->buffer);*/
2857 return 0;
2858
2859err_alloc_small_buf_failed:
2860 kfree(proc->pages);
2861 proc->pages = NULL;
2862err_alloc_pages_failed:
2863 vfree(proc->buffer);
2864 proc->buffer = NULL;
2865err_get_vm_area_failed:
2866err_already_mapped:
2867err_bad_arg:
2868 printk(KERN_ERR "binder_mmap: %d %lx-%lx %s failed %d\n",
2869 proc->pid, vma->vm_start, vma->vm_end, failure_string, ret);
2870 return ret;
2871}
2872
2873static int binder_open(struct inode *nodp, struct file *filp)
2874{
2875 struct binder_proc *proc;
2876
2877 binder_debug(BINDER_DEBUG_OPEN_CLOSE, "binder_open: %d:%d\n",
2878 current->group_leader->pid, current->pid);
2879
2880 proc = kzalloc(sizeof(*proc), GFP_KERNEL);
2881 if (proc == NULL)
2882 return -ENOMEM;
2883 get_task_struct(current);
2884 proc->tsk = current;
2885 INIT_LIST_HEAD(&proc->todo);
2886 init_waitqueue_head(&proc->wait);
2887 proc->default_priority = task_nice(current);
2888 mutex_lock(&binder_lock);
2889 binder_stats_created(BINDER_STAT_PROC);
2890 hlist_add_head(&proc->proc_node, &binder_procs);
2891 proc->pid = current->group_leader->pid;
2892 INIT_LIST_HEAD(&proc->delivered_death);
2893 filp->private_data = proc;
2894 mutex_unlock(&binder_lock);
2895
2896 if (binder_debugfs_dir_entry_proc) {
2897 char strbuf[11];
2898 snprintf(strbuf, sizeof(strbuf), "%u", proc->pid);
2899 proc->debugfs_entry = debugfs_create_file(strbuf, S_IRUGO,
2900 binder_debugfs_dir_entry_proc, proc, &binder_proc_fops);
2901 }
2902
2903 return 0;
2904}
2905
2906static int binder_flush(struct file *filp, fl_owner_t id)
2907{
2908 struct binder_proc *proc = filp->private_data;
2909
2910 binder_defer_work(proc, BINDER_DEFERRED_FLUSH);
2911
2912 return 0;
2913}
2914
2915static void binder_deferred_flush(struct binder_proc *proc)
2916{
2917 struct rb_node *n;
2918 int wake_count = 0;
2919 for (n = rb_first(&proc->threads); n != NULL; n = rb_next(n)) {
2920 struct binder_thread *thread = rb_entry(n, struct binder_thread, rb_node);
2921 thread->looper |= BINDER_LOOPER_STATE_NEED_RETURN;
2922 if (thread->looper & BINDER_LOOPER_STATE_WAITING) {
2923 wake_up_interruptible(&thread->wait);
2924 wake_count++;
2925 }
2926 }
2927 wake_up_interruptible_all(&proc->wait);
2928
2929 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
2930 "binder_flush: %d woke %d threads\n", proc->pid,
2931 wake_count);
2932}
2933
2934static int binder_release(struct inode *nodp, struct file *filp)
2935{
2936 struct binder_proc *proc = filp->private_data;
2937 debugfs_remove(proc->debugfs_entry);
2938 binder_defer_work(proc, BINDER_DEFERRED_RELEASE);
2939
2940 return 0;
2941}
2942
2943static void binder_deferred_release(struct binder_proc *proc)
2944{
2945 struct hlist_node *pos;
2946 struct binder_transaction *t;
2947 struct rb_node *n;
2948 int threads, nodes, incoming_refs, outgoing_refs, buffers, active_transactions, page_count;
2949
2950 BUG_ON(proc->vma);
2951 BUG_ON(proc->files);
2952
2953 hlist_del(&proc->proc_node);
2954 if (binder_context_mgr_node && binder_context_mgr_node->proc == proc) {
2955 binder_debug(BINDER_DEBUG_DEAD_BINDER,
2956 "binder_release: %d context_mgr_node gone\n",
2957 proc->pid);
2958 binder_context_mgr_node = NULL;
2959 }
2960
2961 threads = 0;
2962 active_transactions = 0;
2963 while ((n = rb_first(&proc->threads))) {
2964 struct binder_thread *thread = rb_entry(n, struct binder_thread, rb_node);
2965 threads++;
2966 active_transactions += binder_free_thread(proc, thread);
2967 }
2968 nodes = 0;
2969 incoming_refs = 0;
2970 while ((n = rb_first(&proc->nodes))) {
2971 struct binder_node *node = rb_entry(n, struct binder_node, rb_node);
2972
2973 nodes++;
2974 rb_erase(&node->rb_node, &proc->nodes);
2975 list_del_init(&node->work.entry);
2976 if (hlist_empty(&node->refs)) {
2977 kfree(node);
2978 binder_stats_deleted(BINDER_STAT_NODE);
2979 } else {
2980 struct binder_ref *ref;
2981 int death = 0;
2982
2983 node->proc = NULL;
2984 node->local_strong_refs = 0;
2985 node->local_weak_refs = 0;
2986 hlist_add_head(&node->dead_node, &binder_dead_nodes);
2987
2988 hlist_for_each_entry(ref, pos, &node->refs, node_entry) {
2989 incoming_refs++;
2990 if (ref->death) {
2991 death++;
2992 if (list_empty(&ref->death->work.entry)) {
2993 ref->death->work.type = BINDER_WORK_DEAD_BINDER;
2994 list_add_tail(&ref->death->work.entry, &ref->proc->todo);
2995 wake_up_interruptible(&ref->proc->wait);
2996 } else
2997 BUG();
2998 }
2999 }
3000 binder_debug(BINDER_DEBUG_DEAD_BINDER,
3001 "binder: node %d now dead, "
3002 "refs %d, death %d\n", node->debug_id,
3003 incoming_refs, death);
3004 }
3005 }
3006 outgoing_refs = 0;
3007 while ((n = rb_first(&proc->refs_by_desc))) {
3008 struct binder_ref *ref = rb_entry(n, struct binder_ref,
3009 rb_node_desc);
3010 outgoing_refs++;
3011 binder_delete_ref(ref);
3012 }
3013 binder_release_work(&proc->todo);
3014 buffers = 0;
3015
3016 while ((n = rb_first(&proc->allocated_buffers))) {
3017 struct binder_buffer *buffer = rb_entry(n, struct binder_buffer,
3018 rb_node);
3019 t = buffer->transaction;
3020 if (t) {
3021 t->buffer = NULL;
3022 buffer->transaction = NULL;
3023 printk(KERN_ERR "binder: release proc %d, "
3024 "transaction %d, not freed\n",
3025 proc->pid, t->debug_id);
3026 /*BUG();*/
3027 }
3028 binder_free_buf(proc, buffer);
3029 buffers++;
3030 }
3031
3032 binder_stats_deleted(BINDER_STAT_PROC);
3033
3034 page_count = 0;
3035 if (proc->pages) {
3036 int i;
3037 for (i = 0; i < proc->buffer_size / PAGE_SIZE; i++) {
3038 if (proc->pages[i]) {
3039 void *page_addr = proc->buffer + i * PAGE_SIZE;
3040 binder_debug(BINDER_DEBUG_BUFFER_ALLOC,
3041 "binder_release: %d: "
3042 "page %d at %p not freed\n",
3043 proc->pid, i,
3044 page_addr);
3045 unmap_kernel_range((unsigned long)page_addr,
3046 PAGE_SIZE);
3047 __free_page(proc->pages[i]);
3048 page_count++;
3049 }
3050 }
3051 kfree(proc->pages);
3052 vfree(proc->buffer);
3053 }
3054
3055 put_task_struct(proc->tsk);
3056
3057 binder_debug(BINDER_DEBUG_OPEN_CLOSE,
3058 "binder_release: %d threads %d, nodes %d (ref %d), "
3059 "refs %d, active transactions %d, buffers %d, "
3060 "pages %d\n",
3061 proc->pid, threads, nodes, incoming_refs, outgoing_refs,
3062 active_transactions, buffers, page_count);
3063
3064 kfree(proc);
3065}
3066
3067static void binder_deferred_func(struct work_struct *work)
3068{
3069 struct binder_proc *proc;
3070 struct files_struct *files;
3071
3072 int defer;
3073 do {
3074 mutex_lock(&binder_lock);
3075 mutex_lock(&binder_deferred_lock);
3076 if (!hlist_empty(&binder_deferred_list)) {
3077 proc = hlist_entry(binder_deferred_list.first,
3078 struct binder_proc, deferred_work_node);
3079 hlist_del_init(&proc->deferred_work_node);
3080 defer = proc->deferred_work;
3081 proc->deferred_work = 0;
3082 } else {
3083 proc = NULL;
3084 defer = 0;
3085 }
3086 mutex_unlock(&binder_deferred_lock);
3087
3088 files = NULL;
3089 if (defer & BINDER_DEFERRED_PUT_FILES) {
3090 files = proc->files;
3091 if (files)
3092 proc->files = NULL;
3093 }
3094
3095 if (defer & BINDER_DEFERRED_FLUSH)
3096 binder_deferred_flush(proc);
3097
3098 if (defer & BINDER_DEFERRED_RELEASE)
3099 binder_deferred_release(proc); /* frees proc */
3100
3101 mutex_unlock(&binder_lock);
3102 if (files)
3103 put_files_struct(files);
3104 } while (proc);
3105}
3106static DECLARE_WORK(binder_deferred_work, binder_deferred_func);
3107
3108static void
3109binder_defer_work(struct binder_proc *proc, enum binder_deferred_state defer)
3110{
3111 mutex_lock(&binder_deferred_lock);
3112 proc->deferred_work |= defer;
3113 if (hlist_unhashed(&proc->deferred_work_node)) {
3114 hlist_add_head(&proc->deferred_work_node,
3115 &binder_deferred_list);
3116 queue_work(binder_deferred_workqueue, &binder_deferred_work);
3117 }
3118 mutex_unlock(&binder_deferred_lock);
3119}
3120
3121static void print_binder_transaction(struct seq_file *m, const char *prefix,
3122 struct binder_transaction *t)
3123{
3124 seq_printf(m,
3125 "%s %d: %p from %d:%d to %d:%d code %x flags %x pri %ld r%d",
3126 prefix, t->debug_id, t,
3127 t->from ? t->from->proc->pid : 0,
3128 t->from ? t->from->pid : 0,
3129 t->to_proc ? t->to_proc->pid : 0,
3130 t->to_thread ? t->to_thread->pid : 0,
3131 t->code, t->flags, t->priority, t->need_reply);
3132 if (t->buffer == NULL) {
3133 seq_puts(m, " buffer free\n");
3134 return;
3135 }
3136 if (t->buffer->target_node)
3137 seq_printf(m, " node %d",
3138 t->buffer->target_node->debug_id);
3139 seq_printf(m, " size %zd:%zd data %p\n",
3140 t->buffer->data_size, t->buffer->offsets_size,
3141 t->buffer->data);
3142}
3143
3144static void print_binder_buffer(struct seq_file *m, const char *prefix,
3145 struct binder_buffer *buffer)
3146{
3147 seq_printf(m, "%s %d: %p size %zd:%zd %s\n",
3148 prefix, buffer->debug_id, buffer->data,
3149 buffer->data_size, buffer->offsets_size,
3150 buffer->transaction ? "active" : "delivered");
3151}
3152
3153static void print_binder_work(struct seq_file *m, const char *prefix,
3154 const char *transaction_prefix,
3155 struct binder_work *w)
3156{
3157 struct binder_node *node;
3158 struct binder_transaction *t;
3159
3160 switch (w->type) {
3161 case BINDER_WORK_TRANSACTION:
3162 t = container_of(w, struct binder_transaction, work);
3163 print_binder_transaction(m, transaction_prefix, t);
3164 break;
3165 case BINDER_WORK_TRANSACTION_COMPLETE:
3166 seq_printf(m, "%stransaction complete\n", prefix);
3167 break;
3168 case BINDER_WORK_NODE:
3169 node = container_of(w, struct binder_node, work);
3170 seq_printf(m, "%snode work %d: u%p c%p\n",
3171 prefix, node->debug_id, node->ptr, node->cookie);
3172 break;
3173 case BINDER_WORK_DEAD_BINDER:
3174 seq_printf(m, "%shas dead binder\n", prefix);
3175 break;
3176 case BINDER_WORK_DEAD_BINDER_AND_CLEAR:
3177 seq_printf(m, "%shas cleared dead binder\n", prefix);
3178 break;
3179 case BINDER_WORK_CLEAR_DEATH_NOTIFICATION:
3180 seq_printf(m, "%shas cleared death notification\n", prefix);
3181 break;
3182 default:
3183 seq_printf(m, "%sunknown work: type %d\n", prefix, w->type);
3184 break;
3185 }
3186}
3187
3188static void print_binder_thread(struct seq_file *m,
3189 struct binder_thread *thread,
3190 int print_always)
3191{
3192 struct binder_transaction *t;
3193 struct binder_work *w;
3194 size_t start_pos = m->count;
3195 size_t header_pos;
3196
3197 seq_printf(m, " thread %d: l %02x\n", thread->pid, thread->looper);
3198 header_pos = m->count;
3199 t = thread->transaction_stack;
3200 while (t) {
3201 if (t->from == thread) {
3202 print_binder_transaction(m,
3203 " outgoing transaction", t);
3204 t = t->from_parent;
3205 } else if (t->to_thread == thread) {
3206 print_binder_transaction(m,
3207 " incoming transaction", t);
3208 t = t->to_parent;
3209 } else {
3210 print_binder_transaction(m, " bad transaction", t);
3211 t = NULL;
3212 }
3213 }
3214 list_for_each_entry(w, &thread->todo, entry) {
3215 print_binder_work(m, " ", " pending transaction", w);
3216 }
3217 if (!print_always && m->count == header_pos)
3218 m->count = start_pos;
3219}
3220
3221static void print_binder_node(struct seq_file *m, struct binder_node *node)
3222{
3223 struct binder_ref *ref;
3224 struct hlist_node *pos;
3225 struct binder_work *w;
3226 int count;
3227
3228 count = 0;
3229 hlist_for_each_entry(ref, pos, &node->refs, node_entry)
3230 count++;
3231
3232 seq_printf(m, " node %d: u%p c%p hs %d hw %d ls %d lw %d is %d iw %d",
3233 node->debug_id, node->ptr, node->cookie,
3234 node->has_strong_ref, node->has_weak_ref,
3235 node->local_strong_refs, node->local_weak_refs,
3236 node->internal_strong_refs, count);
3237 if (count) {
3238 seq_puts(m, " proc");
3239 hlist_for_each_entry(ref, pos, &node->refs, node_entry)
3240 seq_printf(m, " %d", ref->proc->pid);
3241 }
3242 seq_puts(m, "\n");
3243 list_for_each_entry(w, &node->async_todo, entry)
3244 print_binder_work(m, " ",
3245 " pending async transaction", w);
3246}
3247
3248static void print_binder_ref(struct seq_file *m, struct binder_ref *ref)
3249{
3250 seq_printf(m, " ref %d: desc %d %snode %d s %d w %d d %p\n",
3251 ref->debug_id, ref->desc, ref->node->proc ? "" : "dead ",
3252 ref->node->debug_id, ref->strong, ref->weak, ref->death);
3253}
3254
3255static void print_binder_proc(struct seq_file *m,
3256 struct binder_proc *proc, int print_all)
3257{
3258 struct binder_work *w;
3259 struct rb_node *n;
3260 size_t start_pos = m->count;
3261 size_t header_pos;
3262
3263 seq_printf(m, "proc %d\n", proc->pid);
3264 header_pos = m->count;
3265
3266 for (n = rb_first(&proc->threads); n != NULL; n = rb_next(n))
3267 print_binder_thread(m, rb_entry(n, struct binder_thread,
3268 rb_node), print_all);
3269 for (n = rb_first(&proc->nodes); n != NULL; n = rb_next(n)) {
3270 struct binder_node *node = rb_entry(n, struct binder_node,
3271 rb_node);
3272 if (print_all || node->has_async_transaction)
3273 print_binder_node(m, node);
3274 }
3275 if (print_all) {
3276 for (n = rb_first(&proc->refs_by_desc);
3277 n != NULL;
3278 n = rb_next(n))
3279 print_binder_ref(m, rb_entry(n, struct binder_ref,
3280 rb_node_desc));
3281 }
3282 for (n = rb_first(&proc->allocated_buffers); n != NULL; n = rb_next(n))
3283 print_binder_buffer(m, " buffer",
3284 rb_entry(n, struct binder_buffer, rb_node));
3285 list_for_each_entry(w, &proc->todo, entry)
3286 print_binder_work(m, " ", " pending transaction", w);
3287 list_for_each_entry(w, &proc->delivered_death, entry) {
3288 seq_puts(m, " has delivered dead binder\n");
3289 break;
3290 }
3291 if (!print_all && m->count == header_pos)
3292 m->count = start_pos;
3293}
3294
3295static const char *binder_return_strings[] = {
3296 "BR_ERROR",
3297 "BR_OK",
3298 "BR_TRANSACTION",
3299 "BR_REPLY",
3300 "BR_ACQUIRE_RESULT",
3301 "BR_DEAD_REPLY",
3302 "BR_TRANSACTION_COMPLETE",
3303 "BR_INCREFS",
3304 "BR_ACQUIRE",
3305 "BR_RELEASE",
3306 "BR_DECREFS",
3307 "BR_ATTEMPT_ACQUIRE",
3308 "BR_NOOP",
3309 "BR_SPAWN_LOOPER",
3310 "BR_FINISHED",
3311 "BR_DEAD_BINDER",
3312 "BR_CLEAR_DEATH_NOTIFICATION_DONE",
3313 "BR_FAILED_REPLY"
3314};
3315
3316static const char *binder_command_strings[] = {
3317 "BC_TRANSACTION",
3318 "BC_REPLY",
3319 "BC_ACQUIRE_RESULT",
3320 "BC_FREE_BUFFER",
3321 "BC_INCREFS",
3322 "BC_ACQUIRE",
3323 "BC_RELEASE",
3324 "BC_DECREFS",
3325 "BC_INCREFS_DONE",
3326 "BC_ACQUIRE_DONE",
3327 "BC_ATTEMPT_ACQUIRE",
3328 "BC_REGISTER_LOOPER",
3329 "BC_ENTER_LOOPER",
3330 "BC_EXIT_LOOPER",
3331 "BC_REQUEST_DEATH_NOTIFICATION",
3332 "BC_CLEAR_DEATH_NOTIFICATION",
3333 "BC_DEAD_BINDER_DONE"
3334};
3335
3336static const char *binder_objstat_strings[] = {
3337 "proc",
3338 "thread",
3339 "node",
3340 "ref",
3341 "death",
3342 "transaction",
3343 "transaction_complete"
3344};
3345
3346static void print_binder_stats(struct seq_file *m, const char *prefix,
3347 struct binder_stats *stats)
3348{
3349 int i;
3350
3351 BUILD_BUG_ON(ARRAY_SIZE(stats->bc) !=
3352 ARRAY_SIZE(binder_command_strings));
3353 for (i = 0; i < ARRAY_SIZE(stats->bc); i++) {
3354 if (stats->bc[i])
3355 seq_printf(m, "%s%s: %d\n", prefix,
3356 binder_command_strings[i], stats->bc[i]);
3357 }
3358
3359 BUILD_BUG_ON(ARRAY_SIZE(stats->br) !=
3360 ARRAY_SIZE(binder_return_strings));
3361 for (i = 0; i < ARRAY_SIZE(stats->br); i++) {
3362 if (stats->br[i])
3363 seq_printf(m, "%s%s: %d\n", prefix,
3364 binder_return_strings[i], stats->br[i]);
3365 }
3366
3367 BUILD_BUG_ON(ARRAY_SIZE(stats->obj_created) !=
3368 ARRAY_SIZE(binder_objstat_strings));
3369 BUILD_BUG_ON(ARRAY_SIZE(stats->obj_created) !=
3370 ARRAY_SIZE(stats->obj_deleted));
3371 for (i = 0; i < ARRAY_SIZE(stats->obj_created); i++) {
3372 if (stats->obj_created[i] || stats->obj_deleted[i])
3373 seq_printf(m, "%s%s: active %d total %d\n", prefix,
3374 binder_objstat_strings[i],
3375 stats->obj_created[i] - stats->obj_deleted[i],
3376 stats->obj_created[i]);
3377 }
3378}
3379
3380static void print_binder_proc_stats(struct seq_file *m,
3381 struct binder_proc *proc)
3382{
3383 struct binder_work *w;
3384 struct rb_node *n;
3385 int count, strong, weak;
3386
3387 seq_printf(m, "proc %d\n", proc->pid);
3388 count = 0;
3389 for (n = rb_first(&proc->threads); n != NULL; n = rb_next(n))
3390 count++;
3391 seq_printf(m, " threads: %d\n", count);
3392 seq_printf(m, " requested threads: %d+%d/%d\n"
3393 " ready threads %d\n"
3394 " free async space %zd\n", proc->requested_threads,
3395 proc->requested_threads_started, proc->max_threads,
3396 proc->ready_threads, proc->free_async_space);
3397 count = 0;
3398 for (n = rb_first(&proc->nodes); n != NULL; n = rb_next(n))
3399 count++;
3400 seq_printf(m, " nodes: %d\n", count);
3401 count = 0;
3402 strong = 0;
3403 weak = 0;
3404 for (n = rb_first(&proc->refs_by_desc); n != NULL; n = rb_next(n)) {
3405 struct binder_ref *ref = rb_entry(n, struct binder_ref,
3406 rb_node_desc);
3407 count++;
3408 strong += ref->strong;
3409 weak += ref->weak;
3410 }
3411 seq_printf(m, " refs: %d s %d w %d\n", count, strong, weak);
3412
3413 count = 0;
3414 for (n = rb_first(&proc->allocated_buffers); n != NULL; n = rb_next(n))
3415 count++;
3416 seq_printf(m, " buffers: %d\n", count);
3417
3418 count = 0;
3419 list_for_each_entry(w, &proc->todo, entry) {
3420 switch (w->type) {
3421 case BINDER_WORK_TRANSACTION:
3422 count++;
3423 break;
3424 default:
3425 break;
3426 }
3427 }
3428 seq_printf(m, " pending transactions: %d\n", count);
3429
3430 print_binder_stats(m, " ", &proc->stats);
3431}
3432
3433
3434static int binder_state_show(struct seq_file *m, void *unused)
3435{
3436 struct binder_proc *proc;
3437 struct hlist_node *pos;
3438 struct binder_node *node;
3439 int do_lock = !binder_debug_no_lock;
3440
3441 if (do_lock)
3442 mutex_lock(&binder_lock);
3443
3444 seq_puts(m, "binder state:\n");
3445
3446 if (!hlist_empty(&binder_dead_nodes))
3447 seq_puts(m, "dead nodes:\n");
3448 hlist_for_each_entry(node, pos, &binder_dead_nodes, dead_node)
3449 print_binder_node(m, node);
3450
3451 hlist_for_each_entry(proc, pos, &binder_procs, proc_node)
3452 print_binder_proc(m, proc, 1);
3453 if (do_lock)
3454 mutex_unlock(&binder_lock);
3455 return 0;
3456}
3457
3458static int binder_stats_show(struct seq_file *m, void *unused)
3459{
3460 struct binder_proc *proc;
3461 struct hlist_node *pos;
3462 int do_lock = !binder_debug_no_lock;
3463
3464 if (do_lock)
3465 mutex_lock(&binder_lock);
3466
3467 seq_puts(m, "binder stats:\n");
3468
3469 print_binder_stats(m, "", &binder_stats);
3470
3471 hlist_for_each_entry(proc, pos, &binder_procs, proc_node)
3472 print_binder_proc_stats(m, proc);
3473 if (do_lock)
3474 mutex_unlock(&binder_lock);
3475 return 0;
3476}
3477
3478static int binder_transactions_show(struct seq_file *m, void *unused)
3479{
3480 struct binder_proc *proc;
3481 struct hlist_node *pos;
3482 int do_lock = !binder_debug_no_lock;
3483
3484 if (do_lock)
3485 mutex_lock(&binder_lock);
3486
3487 seq_puts(m, "binder transactions:\n");
3488 hlist_for_each_entry(proc, pos, &binder_procs, proc_node)
3489 print_binder_proc(m, proc, 0);
3490 if (do_lock)
3491 mutex_unlock(&binder_lock);
3492 return 0;
3493}
3494
3495static int binder_proc_show(struct seq_file *m, void *unused)
3496{
3497 struct binder_proc *proc = m->private;
3498 int do_lock = !binder_debug_no_lock;
3499
3500 if (do_lock)
3501 mutex_lock(&binder_lock);
3502 seq_puts(m, "binder proc state:\n");
3503 print_binder_proc(m, proc, 1);
3504 if (do_lock)
3505 mutex_unlock(&binder_lock);
3506 return 0;
3507}
3508
3509static void print_binder_transaction_log_entry(struct seq_file *m,
3510 struct binder_transaction_log_entry *e)
3511{
3512 seq_printf(m,
3513 "%d: %s from %d:%d to %d:%d node %d handle %d size %d:%d\n",
3514 e->debug_id, (e->call_type == 2) ? "reply" :
3515 ((e->call_type == 1) ? "async" : "call "), e->from_proc,
3516 e->from_thread, e->to_proc, e->to_thread, e->to_node,
3517 e->target_handle, e->data_size, e->offsets_size);
3518}
3519
3520static int binder_transaction_log_show(struct seq_file *m, void *unused)
3521{
3522 struct binder_transaction_log *log = m->private;
3523 int i;
3524
3525 if (log->full) {
3526 for (i = log->next; i < ARRAY_SIZE(log->entry); i++)
3527 print_binder_transaction_log_entry(m, &log->entry[i]);
3528 }
3529 for (i = 0; i < log->next; i++)
3530 print_binder_transaction_log_entry(m, &log->entry[i]);
3531 return 0;
3532}
3533
3534static const struct file_operations binder_fops = {
3535 .owner = THIS_MODULE,
3536 .poll = binder_poll,
3537 .unlocked_ioctl = binder_ioctl,
3538 .mmap = binder_mmap,
3539 .open = binder_open,
3540 .flush = binder_flush,
3541 .release = binder_release,
3542};
3543
3544static struct miscdevice binder_miscdev = {
3545 .minor = MISC_DYNAMIC_MINOR,
3546 .name = "binder",
3547 .fops = &binder_fops
3548};
3549
3550BINDER_DEBUG_ENTRY(state);
3551BINDER_DEBUG_ENTRY(stats);
3552BINDER_DEBUG_ENTRY(transactions);
3553BINDER_DEBUG_ENTRY(transaction_log);
3554
3555static int __init binder_init(void)
3556{
3557 int ret;
3558
3559 binder_deferred_workqueue = create_singlethread_workqueue("binder");
3560 if (!binder_deferred_workqueue)
3561 return -ENOMEM;
3562
3563 binder_debugfs_dir_entry_root = debugfs_create_dir("binder", NULL);
3564 if (binder_debugfs_dir_entry_root)
3565 binder_debugfs_dir_entry_proc = debugfs_create_dir("proc",
3566 binder_debugfs_dir_entry_root);
3567 ret = misc_register(&binder_miscdev);
3568 if (binder_debugfs_dir_entry_root) {
3569 debugfs_create_file("state",
3570 S_IRUGO,
3571 binder_debugfs_dir_entry_root,
3572 NULL,
3573 &binder_state_fops);
3574 debugfs_create_file("stats",
3575 S_IRUGO,
3576 binder_debugfs_dir_entry_root,
3577 NULL,
3578 &binder_stats_fops);
3579 debugfs_create_file("transactions",
3580 S_IRUGO,
3581 binder_debugfs_dir_entry_root,
3582 NULL,
3583 &binder_transactions_fops);
3584 debugfs_create_file("transaction_log",
3585 S_IRUGO,
3586 binder_debugfs_dir_entry_root,
3587 &binder_transaction_log,
3588 &binder_transaction_log_fops);
3589 debugfs_create_file("failed_transaction_log",
3590 S_IRUGO,
3591 binder_debugfs_dir_entry_root,
3592 &binder_transaction_log_failed,
3593 &binder_transaction_log_fops);
3594 }
3595 return ret;
3596}
3597
3598device_initcall(binder_init);
3599
3600MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/android/binder.h b/drivers/staging/android/binder.h
new file mode 100644
index 000000000000..25ab6f2759e9
--- /dev/null
+++ b/drivers/staging/android/binder.h
@@ -0,0 +1,330 @@
1/*
2 * Copyright (C) 2008 Google, Inc.
3 *
4 * Based on, but no longer compatible with, the original
5 * OpenBinder.org binder driver interface, which is:
6 *
7 * Copyright (c) 2005 Palmsource, Inc.
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#ifndef _LINUX_BINDER_H
21#define _LINUX_BINDER_H
22
23#include <linux/ioctl.h>
24
25#define B_PACK_CHARS(c1, c2, c3, c4) \
26 ((((c1)<<24)) | (((c2)<<16)) | (((c3)<<8)) | (c4))
27#define B_TYPE_LARGE 0x85
28
29enum {
30 BINDER_TYPE_BINDER = B_PACK_CHARS('s', 'b', '*', B_TYPE_LARGE),
31 BINDER_TYPE_WEAK_BINDER = B_PACK_CHARS('w', 'b', '*', B_TYPE_LARGE),
32 BINDER_TYPE_HANDLE = B_PACK_CHARS('s', 'h', '*', B_TYPE_LARGE),
33 BINDER_TYPE_WEAK_HANDLE = B_PACK_CHARS('w', 'h', '*', B_TYPE_LARGE),
34 BINDER_TYPE_FD = B_PACK_CHARS('f', 'd', '*', B_TYPE_LARGE),
35};
36
37enum {
38 FLAT_BINDER_FLAG_PRIORITY_MASK = 0xff,
39 FLAT_BINDER_FLAG_ACCEPTS_FDS = 0x100,
40};
41
42/*
43 * This is the flattened representation of a Binder object for transfer
44 * between processes. The 'offsets' supplied as part of a binder transaction
45 * contains offsets into the data where these structures occur. The Binder
46 * driver takes care of re-writing the structure type and data as it moves
47 * between processes.
48 */
49struct flat_binder_object {
50 /* 8 bytes for large_flat_header. */
51 unsigned long type;
52 unsigned long flags;
53
54 /* 8 bytes of data. */
55 union {
56 void *binder; /* local object */
57 signed long handle; /* remote object */
58 };
59
60 /* extra data associated with local object */
61 void *cookie;
62};
63
64/*
65 * On 64-bit platforms where user code may run in 32-bits the driver must
66 * translate the buffer (and local binder) addresses apropriately.
67 */
68
69struct binder_write_read {
70 signed long write_size; /* bytes to write */
71 signed long write_consumed; /* bytes consumed by driver */
72 unsigned long write_buffer;
73 signed long read_size; /* bytes to read */
74 signed long read_consumed; /* bytes consumed by driver */
75 unsigned long read_buffer;
76};
77
78/* Use with BINDER_VERSION, driver fills in fields. */
79struct binder_version {
80 /* driver protocol version -- increment with incompatible change */
81 signed long protocol_version;
82};
83
84/* This is the current protocol version. */
85#define BINDER_CURRENT_PROTOCOL_VERSION 7
86
87#define BINDER_WRITE_READ _IOWR('b', 1, struct binder_write_read)
88#define BINDER_SET_IDLE_TIMEOUT _IOW('b', 3, int64_t)
89#define BINDER_SET_MAX_THREADS _IOW('b', 5, size_t)
90#define BINDER_SET_IDLE_PRIORITY _IOW('b', 6, int)
91#define BINDER_SET_CONTEXT_MGR _IOW('b', 7, int)
92#define BINDER_THREAD_EXIT _IOW('b', 8, int)
93#define BINDER_VERSION _IOWR('b', 9, struct binder_version)
94
95/*
96 * NOTE: Two special error codes you should check for when calling
97 * in to the driver are:
98 *
99 * EINTR -- The operation has been interupted. This should be
100 * handled by retrying the ioctl() until a different error code
101 * is returned.
102 *
103 * ECONNREFUSED -- The driver is no longer accepting operations
104 * from your process. That is, the process is being destroyed.
105 * You should handle this by exiting from your process. Note
106 * that once this error code is returned, all further calls to
107 * the driver from any thread will return this same code.
108 */
109
110enum transaction_flags {
111 TF_ONE_WAY = 0x01, /* this is a one-way call: async, no return */
112 TF_ROOT_OBJECT = 0x04, /* contents are the component's root object */
113 TF_STATUS_CODE = 0x08, /* contents are a 32-bit status code */
114 TF_ACCEPT_FDS = 0x10, /* allow replies with file descriptors */
115};
116
117struct binder_transaction_data {
118 /* The first two are only used for bcTRANSACTION and brTRANSACTION,
119 * identifying the target and contents of the transaction.
120 */
121 union {
122 size_t handle; /* target descriptor of command transaction */
123 void *ptr; /* target descriptor of return transaction */
124 } target;
125 void *cookie; /* target object cookie */
126 unsigned int code; /* transaction command */
127
128 /* General information about the transaction. */
129 unsigned int flags;
130 pid_t sender_pid;
131 uid_t sender_euid;
132 size_t data_size; /* number of bytes of data */
133 size_t offsets_size; /* number of bytes of offsets */
134
135 /* If this transaction is inline, the data immediately
136 * follows here; otherwise, it ends with a pointer to
137 * the data buffer.
138 */
139 union {
140 struct {
141 /* transaction data */
142 const void *buffer;
143 /* offsets from buffer to flat_binder_object structs */
144 const void *offsets;
145 } ptr;
146 uint8_t buf[8];
147 } data;
148};
149
150struct binder_ptr_cookie {
151 void *ptr;
152 void *cookie;
153};
154
155struct binder_pri_desc {
156 int priority;
157 int desc;
158};
159
160struct binder_pri_ptr_cookie {
161 int priority;
162 void *ptr;
163 void *cookie;
164};
165
166enum BinderDriverReturnProtocol {
167 BR_ERROR = _IOR('r', 0, int),
168 /*
169 * int: error code
170 */
171
172 BR_OK = _IO('r', 1),
173 /* No parameters! */
174
175 BR_TRANSACTION = _IOR('r', 2, struct binder_transaction_data),
176 BR_REPLY = _IOR('r', 3, struct binder_transaction_data),
177 /*
178 * binder_transaction_data: the received command.
179 */
180
181 BR_ACQUIRE_RESULT = _IOR('r', 4, int),
182 /*
183 * not currently supported
184 * int: 0 if the last bcATTEMPT_ACQUIRE was not successful.
185 * Else the remote object has acquired a primary reference.
186 */
187
188 BR_DEAD_REPLY = _IO('r', 5),
189 /*
190 * The target of the last transaction (either a bcTRANSACTION or
191 * a bcATTEMPT_ACQUIRE) is no longer with us. No parameters.
192 */
193
194 BR_TRANSACTION_COMPLETE = _IO('r', 6),
195 /*
196 * No parameters... always refers to the last transaction requested
197 * (including replies). Note that this will be sent even for
198 * asynchronous transactions.
199 */
200
201 BR_INCREFS = _IOR('r', 7, struct binder_ptr_cookie),
202 BR_ACQUIRE = _IOR('r', 8, struct binder_ptr_cookie),
203 BR_RELEASE = _IOR('r', 9, struct binder_ptr_cookie),
204 BR_DECREFS = _IOR('r', 10, struct binder_ptr_cookie),
205 /*
206 * void *: ptr to binder
207 * void *: cookie for binder
208 */
209
210 BR_ATTEMPT_ACQUIRE = _IOR('r', 11, struct binder_pri_ptr_cookie),
211 /*
212 * not currently supported
213 * int: priority
214 * void *: ptr to binder
215 * void *: cookie for binder
216 */
217
218 BR_NOOP = _IO('r', 12),
219 /*
220 * No parameters. Do nothing and examine the next command. It exists
221 * primarily so that we can replace it with a BR_SPAWN_LOOPER command.
222 */
223
224 BR_SPAWN_LOOPER = _IO('r', 13),
225 /*
226 * No parameters. The driver has determined that a process has no
227 * threads waiting to service incomming transactions. When a process
228 * receives this command, it must spawn a new service thread and
229 * register it via bcENTER_LOOPER.
230 */
231
232 BR_FINISHED = _IO('r', 14),
233 /*
234 * not currently supported
235 * stop threadpool thread
236 */
237
238 BR_DEAD_BINDER = _IOR('r', 15, void *),
239 /*
240 * void *: cookie
241 */
242 BR_CLEAR_DEATH_NOTIFICATION_DONE = _IOR('r', 16, void *),
243 /*
244 * void *: cookie
245 */
246
247 BR_FAILED_REPLY = _IO('r', 17),
248 /*
249 * The the last transaction (either a bcTRANSACTION or
250 * a bcATTEMPT_ACQUIRE) failed (e.g. out of memory). No parameters.
251 */
252};
253
254enum BinderDriverCommandProtocol {
255 BC_TRANSACTION = _IOW('c', 0, struct binder_transaction_data),
256 BC_REPLY = _IOW('c', 1, struct binder_transaction_data),
257 /*
258 * binder_transaction_data: the sent command.
259 */
260
261 BC_ACQUIRE_RESULT = _IOW('c', 2, int),
262 /*
263 * not currently supported
264 * int: 0 if the last BR_ATTEMPT_ACQUIRE was not successful.
265 * Else you have acquired a primary reference on the object.
266 */
267
268 BC_FREE_BUFFER = _IOW('c', 3, int),
269 /*
270 * void *: ptr to transaction data received on a read
271 */
272
273 BC_INCREFS = _IOW('c', 4, int),
274 BC_ACQUIRE = _IOW('c', 5, int),
275 BC_RELEASE = _IOW('c', 6, int),
276 BC_DECREFS = _IOW('c', 7, int),
277 /*
278 * int: descriptor
279 */
280
281 BC_INCREFS_DONE = _IOW('c', 8, struct binder_ptr_cookie),
282 BC_ACQUIRE_DONE = _IOW('c', 9, struct binder_ptr_cookie),
283 /*
284 * void *: ptr to binder
285 * void *: cookie for binder
286 */
287
288 BC_ATTEMPT_ACQUIRE = _IOW('c', 10, struct binder_pri_desc),
289 /*
290 * not currently supported
291 * int: priority
292 * int: descriptor
293 */
294
295 BC_REGISTER_LOOPER = _IO('c', 11),
296 /*
297 * No parameters.
298 * Register a spawned looper thread with the device.
299 */
300
301 BC_ENTER_LOOPER = _IO('c', 12),
302 BC_EXIT_LOOPER = _IO('c', 13),
303 /*
304 * No parameters.
305 * These two commands are sent as an application-level thread
306 * enters and exits the binder loop, respectively. They are
307 * used so the binder can have an accurate count of the number
308 * of looping threads it has available.
309 */
310
311 BC_REQUEST_DEATH_NOTIFICATION = _IOW('c', 14, struct binder_ptr_cookie),
312 /*
313 * void *: ptr to binder
314 * void *: cookie
315 */
316
317 BC_CLEAR_DEATH_NOTIFICATION = _IOW('c', 15, struct binder_ptr_cookie),
318 /*
319 * void *: ptr to binder
320 * void *: cookie
321 */
322
323 BC_DEAD_BINDER_DONE = _IOW('c', 16, void *),
324 /*
325 * void *: cookie
326 */
327};
328
329#endif /* _LINUX_BINDER_H */
330
diff --git a/drivers/staging/android/logger.c b/drivers/staging/android/logger.c
new file mode 100644
index 000000000000..ffc2d043dd8e
--- /dev/null
+++ b/drivers/staging/android/logger.c
@@ -0,0 +1,616 @@
1/*
2 * drivers/misc/logger.c
3 *
4 * A Logging Subsystem
5 *
6 * Copyright (C) 2007-2008 Google, Inc.
7 *
8 * Robert Love <rlove@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20#include <linux/sched.h>
21#include <linux/module.h>
22#include <linux/fs.h>
23#include <linux/miscdevice.h>
24#include <linux/uaccess.h>
25#include <linux/poll.h>
26#include <linux/slab.h>
27#include <linux/time.h>
28#include "logger.h"
29
30#include <asm/ioctls.h>
31
32/*
33 * struct logger_log - represents a specific log, such as 'main' or 'radio'
34 *
35 * This structure lives from module insertion until module removal, so it does
36 * not need additional reference counting. The structure is protected by the
37 * mutex 'mutex'.
38 */
39struct logger_log {
40 unsigned char *buffer;/* the ring buffer itself */
41 struct miscdevice misc; /* misc device representing the log */
42 wait_queue_head_t wq; /* wait queue for readers */
43 struct list_head readers; /* this log's readers */
44 struct mutex mutex; /* mutex protecting buffer */
45 size_t w_off; /* current write head offset */
46 size_t head; /* new readers start here */
47 size_t size; /* size of the log */
48};
49
50/*
51 * struct logger_reader - a logging device open for reading
52 *
53 * This object lives from open to release, so we don't need additional
54 * reference counting. The structure is protected by log->mutex.
55 */
56struct logger_reader {
57 struct logger_log *log; /* associated log */
58 struct list_head list; /* entry in logger_log's list */
59 size_t r_off; /* current read head offset */
60};
61
62/* logger_offset - returns index 'n' into the log via (optimized) modulus */
63#define logger_offset(n) ((n) & (log->size - 1))
64
65/*
66 * file_get_log - Given a file structure, return the associated log
67 *
68 * This isn't aesthetic. We have several goals:
69 *
70 * 1) Need to quickly obtain the associated log during an I/O operation
71 * 2) Readers need to maintain state (logger_reader)
72 * 3) Writers need to be very fast (open() should be a near no-op)
73 *
74 * In the reader case, we can trivially go file->logger_reader->logger_log.
75 * For a writer, we don't want to maintain a logger_reader, so we just go
76 * file->logger_log. Thus what file->private_data points at depends on whether
77 * or not the file was opened for reading. This function hides that dirtiness.
78 */
79static inline struct logger_log *file_get_log(struct file *file)
80{
81 if (file->f_mode & FMODE_READ) {
82 struct logger_reader *reader = file->private_data;
83 return reader->log;
84 } else
85 return file->private_data;
86}
87
88/*
89 * get_entry_len - Grabs the length of the payload of the next entry starting
90 * from 'off'.
91 *
92 * Caller needs to hold log->mutex.
93 */
94static __u32 get_entry_len(struct logger_log *log, size_t off)
95{
96 __u16 val;
97
98 switch (log->size - off) {
99 case 1:
100 memcpy(&val, log->buffer + off, 1);
101 memcpy(((char *) &val) + 1, log->buffer, 1);
102 break;
103 default:
104 memcpy(&val, log->buffer + off, 2);
105 }
106
107 return sizeof(struct logger_entry) + val;
108}
109
110/*
111 * do_read_log_to_user - reads exactly 'count' bytes from 'log' into the
112 * user-space buffer 'buf'. Returns 'count' on success.
113 *
114 * Caller must hold log->mutex.
115 */
116static ssize_t do_read_log_to_user(struct logger_log *log,
117 struct logger_reader *reader,
118 char __user *buf,
119 size_t count)
120{
121 size_t len;
122
123 /*
124 * We read from the log in two disjoint operations. First, we read from
125 * the current read head offset up to 'count' bytes or to the end of
126 * the log, whichever comes first.
127 */
128 len = min(count, log->size - reader->r_off);
129 if (copy_to_user(buf, log->buffer + reader->r_off, len))
130 return -EFAULT;
131
132 /*
133 * Second, we read any remaining bytes, starting back at the head of
134 * the log.
135 */
136 if (count != len)
137 if (copy_to_user(buf + len, log->buffer, count - len))
138 return -EFAULT;
139
140 reader->r_off = logger_offset(reader->r_off + count);
141
142 return count;
143}
144
145/*
146 * logger_read - our log's read() method
147 *
148 * Behavior:
149 *
150 * - O_NONBLOCK works
151 * - If there are no log entries to read, blocks until log is written to
152 * - Atomically reads exactly one log entry
153 *
154 * Optimal read size is LOGGER_ENTRY_MAX_LEN. Will set errno to EINVAL if read
155 * buffer is insufficient to hold next entry.
156 */
157static ssize_t logger_read(struct file *file, char __user *buf,
158 size_t count, loff_t *pos)
159{
160 struct logger_reader *reader = file->private_data;
161 struct logger_log *log = reader->log;
162 ssize_t ret;
163 DEFINE_WAIT(wait);
164
165start:
166 while (1) {
167 prepare_to_wait(&log->wq, &wait, TASK_INTERRUPTIBLE);
168
169 mutex_lock(&log->mutex);
170 ret = (log->w_off == reader->r_off);
171 mutex_unlock(&log->mutex);
172 if (!ret)
173 break;
174
175 if (file->f_flags & O_NONBLOCK) {
176 ret = -EAGAIN;
177 break;
178 }
179
180 if (signal_pending(current)) {
181 ret = -EINTR;
182 break;
183 }
184
185 schedule();
186 }
187
188 finish_wait(&log->wq, &wait);
189 if (ret)
190 return ret;
191
192 mutex_lock(&log->mutex);
193
194 /* is there still something to read or did we race? */
195 if (unlikely(log->w_off == reader->r_off)) {
196 mutex_unlock(&log->mutex);
197 goto start;
198 }
199
200 /* get the size of the next entry */
201 ret = get_entry_len(log, reader->r_off);
202 if (count < ret) {
203 ret = -EINVAL;
204 goto out;
205 }
206
207 /* get exactly one entry from the log */
208 ret = do_read_log_to_user(log, reader, buf, ret);
209
210out:
211 mutex_unlock(&log->mutex);
212
213 return ret;
214}
215
216/*
217 * get_next_entry - return the offset of the first valid entry at least 'len'
218 * bytes after 'off'.
219 *
220 * Caller must hold log->mutex.
221 */
222static size_t get_next_entry(struct logger_log *log, size_t off, size_t len)
223{
224 size_t count = 0;
225
226 do {
227 size_t nr = get_entry_len(log, off);
228 off = logger_offset(off + nr);
229 count += nr;
230 } while (count < len);
231
232 return off;
233}
234
235/*
236 * clock_interval - is a < c < b in mod-space? Put another way, does the line
237 * from a to b cross c?
238 */
239static inline int clock_interval(size_t a, size_t b, size_t c)
240{
241 if (b < a) {
242 if (a < c || b >= c)
243 return 1;
244 } else {
245 if (a < c && b >= c)
246 return 1;
247 }
248
249 return 0;
250}
251
252/*
253 * fix_up_readers - walk the list of all readers and "fix up" any who were
254 * lapped by the writer; also do the same for the default "start head".
255 * We do this by "pulling forward" the readers and start head to the first
256 * entry after the new write head.
257 *
258 * The caller needs to hold log->mutex.
259 */
260static void fix_up_readers(struct logger_log *log, size_t len)
261{
262 size_t old = log->w_off;
263 size_t new = logger_offset(old + len);
264 struct logger_reader *reader;
265
266 if (clock_interval(old, new, log->head))
267 log->head = get_next_entry(log, log->head, len);
268
269 list_for_each_entry(reader, &log->readers, list)
270 if (clock_interval(old, new, reader->r_off))
271 reader->r_off = get_next_entry(log, reader->r_off, len);
272}
273
274/*
275 * do_write_log - writes 'len' bytes from 'buf' to 'log'
276 *
277 * The caller needs to hold log->mutex.
278 */
279static void do_write_log(struct logger_log *log, const void *buf, size_t count)
280{
281 size_t len;
282
283 len = min(count, log->size - log->w_off);
284 memcpy(log->buffer + log->w_off, buf, len);
285
286 if (count != len)
287 memcpy(log->buffer, buf + len, count - len);
288
289 log->w_off = logger_offset(log->w_off + count);
290
291}
292
293/*
294 * do_write_log_user - writes 'len' bytes from the user-space buffer 'buf' to
295 * the log 'log'
296 *
297 * The caller needs to hold log->mutex.
298 *
299 * Returns 'count' on success, negative error code on failure.
300 */
301static ssize_t do_write_log_from_user(struct logger_log *log,
302 const void __user *buf, size_t count)
303{
304 size_t len;
305
306 len = min(count, log->size - log->w_off);
307 if (len && copy_from_user(log->buffer + log->w_off, buf, len))
308 return -EFAULT;
309
310 if (count != len)
311 if (copy_from_user(log->buffer, buf + len, count - len))
312 return -EFAULT;
313
314 log->w_off = logger_offset(log->w_off + count);
315
316 return count;
317}
318
319/*
320 * logger_aio_write - our write method, implementing support for write(),
321 * writev(), and aio_write(). Writes are our fast path, and we try to optimize
322 * them above all else.
323 */
324ssize_t logger_aio_write(struct kiocb *iocb, const struct iovec *iov,
325 unsigned long nr_segs, loff_t ppos)
326{
327 struct logger_log *log = file_get_log(iocb->ki_filp);
328 size_t orig = log->w_off;
329 struct logger_entry header;
330 struct timespec now;
331 ssize_t ret = 0;
332
333 now = current_kernel_time();
334
335 header.pid = current->tgid;
336 header.tid = current->pid;
337 header.sec = now.tv_sec;
338 header.nsec = now.tv_nsec;
339 header.len = min_t(size_t, iocb->ki_left, LOGGER_ENTRY_MAX_PAYLOAD);
340
341 /* null writes succeed, return zero */
342 if (unlikely(!header.len))
343 return 0;
344
345 mutex_lock(&log->mutex);
346
347 /*
348 * Fix up any readers, pulling them forward to the first readable
349 * entry after (what will be) the new write offset. We do this now
350 * because if we partially fail, we can end up with clobbered log
351 * entries that encroach on readable buffer.
352 */
353 fix_up_readers(log, sizeof(struct logger_entry) + header.len);
354
355 do_write_log(log, &header, sizeof(struct logger_entry));
356
357 while (nr_segs-- > 0) {
358 size_t len;
359 ssize_t nr;
360
361 /* figure out how much of this vector we can keep */
362 len = min_t(size_t, iov->iov_len, header.len - ret);
363
364 /* write out this segment's payload */
365 nr = do_write_log_from_user(log, iov->iov_base, len);
366 if (unlikely(nr < 0)) {
367 log->w_off = orig;
368 mutex_unlock(&log->mutex);
369 return nr;
370 }
371
372 iov++;
373 ret += nr;
374 }
375
376 mutex_unlock(&log->mutex);
377
378 /* wake up any blocked readers */
379 wake_up_interruptible(&log->wq);
380
381 return ret;
382}
383
384static struct logger_log *get_log_from_minor(int);
385
386/*
387 * logger_open - the log's open() file operation
388 *
389 * Note how near a no-op this is in the write-only case. Keep it that way!
390 */
391static int logger_open(struct inode *inode, struct file *file)
392{
393 struct logger_log *log;
394 int ret;
395
396 ret = nonseekable_open(inode, file);
397 if (ret)
398 return ret;
399
400 log = get_log_from_minor(MINOR(inode->i_rdev));
401 if (!log)
402 return -ENODEV;
403
404 if (file->f_mode & FMODE_READ) {
405 struct logger_reader *reader;
406
407 reader = kmalloc(sizeof(struct logger_reader), GFP_KERNEL);
408 if (!reader)
409 return -ENOMEM;
410
411 reader->log = log;
412 INIT_LIST_HEAD(&reader->list);
413
414 mutex_lock(&log->mutex);
415 reader->r_off = log->head;
416 list_add_tail(&reader->list, &log->readers);
417 mutex_unlock(&log->mutex);
418
419 file->private_data = reader;
420 } else
421 file->private_data = log;
422
423 return 0;
424}
425
426/*
427 * logger_release - the log's release file operation
428 *
429 * Note this is a total no-op in the write-only case. Keep it that way!
430 */
431static int logger_release(struct inode *ignored, struct file *file)
432{
433 if (file->f_mode & FMODE_READ) {
434 struct logger_reader *reader = file->private_data;
435 list_del(&reader->list);
436 kfree(reader);
437 }
438
439 return 0;
440}
441
442/*
443 * logger_poll - the log's poll file operation, for poll/select/epoll
444 *
445 * Note we always return POLLOUT, because you can always write() to the log.
446 * Note also that, strictly speaking, a return value of POLLIN does not
447 * guarantee that the log is readable without blocking, as there is a small
448 * chance that the writer can lap the reader in the interim between poll()
449 * returning and the read() request.
450 */
451static unsigned int logger_poll(struct file *file, poll_table *wait)
452{
453 struct logger_reader *reader;
454 struct logger_log *log;
455 unsigned int ret = POLLOUT | POLLWRNORM;
456
457 if (!(file->f_mode & FMODE_READ))
458 return ret;
459
460 reader = file->private_data;
461 log = reader->log;
462
463 poll_wait(file, &log->wq, wait);
464
465 mutex_lock(&log->mutex);
466 if (log->w_off != reader->r_off)
467 ret |= POLLIN | POLLRDNORM;
468 mutex_unlock(&log->mutex);
469
470 return ret;
471}
472
473static long logger_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
474{
475 struct logger_log *log = file_get_log(file);
476 struct logger_reader *reader;
477 long ret = -ENOTTY;
478
479 mutex_lock(&log->mutex);
480
481 switch (cmd) {
482 case LOGGER_GET_LOG_BUF_SIZE:
483 ret = log->size;
484 break;
485 case LOGGER_GET_LOG_LEN:
486 if (!(file->f_mode & FMODE_READ)) {
487 ret = -EBADF;
488 break;
489 }
490 reader = file->private_data;
491 if (log->w_off >= reader->r_off)
492 ret = log->w_off - reader->r_off;
493 else
494 ret = (log->size - reader->r_off) + log->w_off;
495 break;
496 case LOGGER_GET_NEXT_ENTRY_LEN:
497 if (!(file->f_mode & FMODE_READ)) {
498 ret = -EBADF;
499 break;
500 }
501 reader = file->private_data;
502 if (log->w_off != reader->r_off)
503 ret = get_entry_len(log, reader->r_off);
504 else
505 ret = 0;
506 break;
507 case LOGGER_FLUSH_LOG:
508 if (!(file->f_mode & FMODE_WRITE)) {
509 ret = -EBADF;
510 break;
511 }
512 list_for_each_entry(reader, &log->readers, list)
513 reader->r_off = log->w_off;
514 log->head = log->w_off;
515 ret = 0;
516 break;
517 }
518
519 mutex_unlock(&log->mutex);
520
521 return ret;
522}
523
524static const struct file_operations logger_fops = {
525 .owner = THIS_MODULE,
526 .read = logger_read,
527 .aio_write = logger_aio_write,
528 .poll = logger_poll,
529 .unlocked_ioctl = logger_ioctl,
530 .compat_ioctl = logger_ioctl,
531 .open = logger_open,
532 .release = logger_release,
533};
534
535/*
536 * Defines a log structure with name 'NAME' and a size of 'SIZE' bytes, which
537 * must be a power of two, greater than LOGGER_ENTRY_MAX_LEN, and less than
538 * LONG_MAX minus LOGGER_ENTRY_MAX_LEN.
539 */
540#define DEFINE_LOGGER_DEVICE(VAR, NAME, SIZE) \
541static unsigned char _buf_ ## VAR[SIZE]; \
542static struct logger_log VAR = { \
543 .buffer = _buf_ ## VAR, \
544 .misc = { \
545 .minor = MISC_DYNAMIC_MINOR, \
546 .name = NAME, \
547 .fops = &logger_fops, \
548 .parent = NULL, \
549 }, \
550 .wq = __WAIT_QUEUE_HEAD_INITIALIZER(VAR .wq), \
551 .readers = LIST_HEAD_INIT(VAR .readers), \
552 .mutex = __MUTEX_INITIALIZER(VAR .mutex), \
553 .w_off = 0, \
554 .head = 0, \
555 .size = SIZE, \
556};
557
558DEFINE_LOGGER_DEVICE(log_main, LOGGER_LOG_MAIN, 256*1024)
559DEFINE_LOGGER_DEVICE(log_events, LOGGER_LOG_EVENTS, 256*1024)
560DEFINE_LOGGER_DEVICE(log_radio, LOGGER_LOG_RADIO, 256*1024)
561DEFINE_LOGGER_DEVICE(log_system, LOGGER_LOG_SYSTEM, 256*1024)
562
563static struct logger_log *get_log_from_minor(int minor)
564{
565 if (log_main.misc.minor == minor)
566 return &log_main;
567 if (log_events.misc.minor == minor)
568 return &log_events;
569 if (log_radio.misc.minor == minor)
570 return &log_radio;
571 if (log_system.misc.minor == minor)
572 return &log_system;
573 return NULL;
574}
575
576static int __init init_log(struct logger_log *log)
577{
578 int ret;
579
580 ret = misc_register(&log->misc);
581 if (unlikely(ret)) {
582 printk(KERN_ERR "logger: failed to register misc "
583 "device for log '%s'!\n", log->misc.name);
584 return ret;
585 }
586
587 printk(KERN_INFO "logger: created %luK log '%s'\n",
588 (unsigned long) log->size >> 10, log->misc.name);
589
590 return 0;
591}
592
593static int __init logger_init(void)
594{
595 int ret;
596
597 ret = init_log(&log_main);
598 if (unlikely(ret))
599 goto out;
600
601 ret = init_log(&log_events);
602 if (unlikely(ret))
603 goto out;
604
605 ret = init_log(&log_radio);
606 if (unlikely(ret))
607 goto out;
608
609 ret = init_log(&log_system);
610 if (unlikely(ret))
611 goto out;
612
613out:
614 return ret;
615}
616device_initcall(logger_init);
diff --git a/drivers/staging/android/logger.h b/drivers/staging/android/logger.h
new file mode 100644
index 000000000000..2cb06e9d8f98
--- /dev/null
+++ b/drivers/staging/android/logger.h
@@ -0,0 +1,49 @@
1/* include/linux/logger.h
2 *
3 * Copyright (C) 2007-2008 Google, Inc.
4 * Author: Robert Love <rlove@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef _LINUX_LOGGER_H
18#define _LINUX_LOGGER_H
19
20#include <linux/types.h>
21#include <linux/ioctl.h>
22
23struct logger_entry {
24 __u16 len; /* length of the payload */
25 __u16 __pad; /* no matter what, we get 2 bytes of padding */
26 __s32 pid; /* generating process's pid */
27 __s32 tid; /* generating process's tid */
28 __s32 sec; /* seconds since Epoch */
29 __s32 nsec; /* nanoseconds */
30 char msg[0]; /* the entry's payload */
31};
32
33#define LOGGER_LOG_RADIO "log_radio" /* radio-related messages */
34#define LOGGER_LOG_EVENTS "log_events" /* system/hardware events */
35#define LOGGER_LOG_SYSTEM "log_system" /* system/framework messages */
36#define LOGGER_LOG_MAIN "log_main" /* everything else */
37
38#define LOGGER_ENTRY_MAX_LEN (4*1024)
39#define LOGGER_ENTRY_MAX_PAYLOAD \
40 (LOGGER_ENTRY_MAX_LEN - sizeof(struct logger_entry))
41
42#define __LOGGERIO 0xAE
43
44#define LOGGER_GET_LOG_BUF_SIZE _IO(__LOGGERIO, 1) /* size of log */
45#define LOGGER_GET_LOG_LEN _IO(__LOGGERIO, 2) /* used log len */
46#define LOGGER_GET_NEXT_ENTRY_LEN _IO(__LOGGERIO, 3) /* next entry len */
47#define LOGGER_FLUSH_LOG _IO(__LOGGERIO, 4) /* flush log */
48
49#endif /* _LINUX_LOGGER_H */
diff --git a/drivers/staging/android/lowmemorykiller.c b/drivers/staging/android/lowmemorykiller.c
new file mode 100644
index 000000000000..2d8d2b796101
--- /dev/null
+++ b/drivers/staging/android/lowmemorykiller.c
@@ -0,0 +1,219 @@
1/* drivers/misc/lowmemorykiller.c
2 *
3 * The lowmemorykiller driver lets user-space specify a set of memory thresholds
4 * where processes with a range of oom_adj values will get killed. Specify the
5 * minimum oom_adj values in /sys/module/lowmemorykiller/parameters/adj and the
6 * number of free pages in /sys/module/lowmemorykiller/parameters/minfree. Both
7 * files take a comma separated list of numbers in ascending order.
8 *
9 * For example, write "0,8" to /sys/module/lowmemorykiller/parameters/adj and
10 * "1024,4096" to /sys/module/lowmemorykiller/parameters/minfree to kill
11 * processes with a oom_adj value of 8 or higher when the free memory drops
12 * below 4096 pages and kill processes with a oom_adj value of 0 or higher
13 * when the free memory drops below 1024 pages.
14 *
15 * The driver considers memory used for caches to be free, but if a large
16 * percentage of the cached memory is locked this can be very inaccurate
17 * and processes may not get killed until the normal oom killer is triggered.
18 *
19 * Copyright (C) 2007-2008 Google, Inc.
20 *
21 * This software is licensed under the terms of the GNU General Public
22 * License version 2, as published by the Free Software Foundation, and
23 * may be copied, distributed, and modified under those terms.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 */
31
32#include <linux/module.h>
33#include <linux/kernel.h>
34#include <linux/mm.h>
35#include <linux/oom.h>
36#include <linux/sched.h>
37#include <linux/profile.h>
38#include <linux/notifier.h>
39
40static uint32_t lowmem_debug_level = 2;
41static int lowmem_adj[6] = {
42 0,
43 1,
44 6,
45 12,
46};
47static int lowmem_adj_size = 4;
48static size_t lowmem_minfree[6] = {
49 3 * 512, /* 6MB */
50 2 * 1024, /* 8MB */
51 4 * 1024, /* 16MB */
52 16 * 1024, /* 64MB */
53};
54static int lowmem_minfree_size = 4;
55
56static struct task_struct *lowmem_deathpending;
57
58#define lowmem_print(level, x...) \
59 do { \
60 if (lowmem_debug_level >= (level)) \
61 printk(x); \
62 } while (0)
63
64static int
65task_notify_func(struct notifier_block *self, unsigned long val, void *data);
66
67static struct notifier_block task_nb = {
68 .notifier_call = task_notify_func,
69};
70
71static int
72task_notify_func(struct notifier_block *self, unsigned long val, void *data)
73{
74 struct task_struct *task = data;
75 if (task == lowmem_deathpending) {
76 lowmem_deathpending = NULL;
77 task_handoff_unregister(&task_nb);
78 }
79 return NOTIFY_OK;
80}
81
82static int lowmem_shrink(struct shrinker *s, struct shrink_control *sc)
83{
84 struct task_struct *p;
85 struct task_struct *selected = NULL;
86 int rem = 0;
87 int tasksize;
88 int i;
89 int min_adj = OOM_ADJUST_MAX + 1;
90 int selected_tasksize = 0;
91 int selected_oom_adj;
92 int array_size = ARRAY_SIZE(lowmem_adj);
93 int other_free = global_page_state(NR_FREE_PAGES);
94 int other_file = global_page_state(NR_FILE_PAGES) -
95 global_page_state(NR_SHMEM);
96
97 /*
98 * If we already have a death outstanding, then
99 * bail out right away; indicating to vmscan
100 * that we have nothing further to offer on
101 * this pass.
102 *
103 * Note: Currently you need CONFIG_PROFILING
104 * for this to work correctly.
105 */
106 if (lowmem_deathpending)
107 return 0;
108
109 if (lowmem_adj_size < array_size)
110 array_size = lowmem_adj_size;
111 if (lowmem_minfree_size < array_size)
112 array_size = lowmem_minfree_size;
113 for (i = 0; i < array_size; i++) {
114 if (other_free < lowmem_minfree[i] &&
115 other_file < lowmem_minfree[i]) {
116 min_adj = lowmem_adj[i];
117 break;
118 }
119 }
120 if (sc->nr_to_scan > 0)
121 lowmem_print(3, "lowmem_shrink %lu, %x, ofree %d %d, ma %d\n",
122 sc->nr_to_scan, sc->gfp_mask, other_free,
123 other_file, min_adj);
124 rem = global_page_state(NR_ACTIVE_ANON) +
125 global_page_state(NR_ACTIVE_FILE) +
126 global_page_state(NR_INACTIVE_ANON) +
127 global_page_state(NR_INACTIVE_FILE);
128 if (sc->nr_to_scan <= 0 || min_adj == OOM_ADJUST_MAX + 1) {
129 lowmem_print(5, "lowmem_shrink %lu, %x, return %d\n",
130 sc->nr_to_scan, sc->gfp_mask, rem);
131 return rem;
132 }
133 selected_oom_adj = min_adj;
134
135 read_lock(&tasklist_lock);
136 for_each_process(p) {
137 struct mm_struct *mm;
138 struct signal_struct *sig;
139 int oom_adj;
140
141 task_lock(p);
142 mm = p->mm;
143 sig = p->signal;
144 if (!mm || !sig) {
145 task_unlock(p);
146 continue;
147 }
148 oom_adj = sig->oom_adj;
149 if (oom_adj < min_adj) {
150 task_unlock(p);
151 continue;
152 }
153 tasksize = get_mm_rss(mm);
154 task_unlock(p);
155 if (tasksize <= 0)
156 continue;
157 if (selected) {
158 if (oom_adj < selected_oom_adj)
159 continue;
160 if (oom_adj == selected_oom_adj &&
161 tasksize <= selected_tasksize)
162 continue;
163 }
164 selected = p;
165 selected_tasksize = tasksize;
166 selected_oom_adj = oom_adj;
167 lowmem_print(2, "select %d (%s), adj %d, size %d, to kill\n",
168 p->pid, p->comm, oom_adj, tasksize);
169 }
170 if (selected) {
171 lowmem_print(1, "send sigkill to %d (%s), adj %d, size %d\n",
172 selected->pid, selected->comm,
173 selected_oom_adj, selected_tasksize);
174 /*
175 * If CONFIG_PROFILING is off, then task_handoff_register()
176 * is a nop. In that case we don't want to stall the killer
177 * by setting lowmem_deathpending.
178 */
179#ifdef CONFIG_PROFILING
180 lowmem_deathpending = selected;
181 task_handoff_register(&task_nb);
182#endif
183 force_sig(SIGKILL, selected);
184 rem -= selected_tasksize;
185 }
186 lowmem_print(4, "lowmem_shrink %lu, %x, return %d\n",
187 sc->nr_to_scan, sc->gfp_mask, rem);
188 read_unlock(&tasklist_lock);
189 return rem;
190}
191
192static struct shrinker lowmem_shrinker = {
193 .shrink = lowmem_shrink,
194 .seeks = DEFAULT_SEEKS * 16
195};
196
197static int __init lowmem_init(void)
198{
199 register_shrinker(&lowmem_shrinker);
200 return 0;
201}
202
203static void __exit lowmem_exit(void)
204{
205 unregister_shrinker(&lowmem_shrinker);
206}
207
208module_param_named(cost, lowmem_shrinker.seeks, int, S_IRUGO | S_IWUSR);
209module_param_array_named(adj, lowmem_adj, int, &lowmem_adj_size,
210 S_IRUGO | S_IWUSR);
211module_param_array_named(minfree, lowmem_minfree, uint, &lowmem_minfree_size,
212 S_IRUGO | S_IWUSR);
213module_param_named(debug_level, lowmem_debug_level, uint, S_IRUGO | S_IWUSR);
214
215module_init(lowmem_init);
216module_exit(lowmem_exit);
217
218MODULE_LICENSE("GPL");
219
diff --git a/drivers/staging/android/pmem.c b/drivers/staging/android/pmem.c
new file mode 100644
index 000000000000..7d97032c6508
--- /dev/null
+++ b/drivers/staging/android/pmem.c
@@ -0,0 +1,1345 @@
1/* pmem.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/miscdevice.h>
17#include <linux/platform_device.h>
18#include <linux/fs.h>
19#include <linux/file.h>
20#include <linux/mm.h>
21#include <linux/list.h>
22#include <linux/mutex.h>
23#include <linux/debugfs.h>
24#include <linux/mempolicy.h>
25#include <linux/sched.h>
26#include <asm/io.h>
27#include <asm/uaccess.h>
28#include <asm/cacheflush.h>
29#include "android_pmem.h"
30
31#define PMEM_MAX_DEVICES 10
32#define PMEM_MAX_ORDER 128
33#define PMEM_MIN_ALLOC PAGE_SIZE
34
35#define PMEM_DEBUG 1
36
37/* indicates that a refernce to this file has been taken via get_pmem_file,
38 * the file should not be released until put_pmem_file is called */
39#define PMEM_FLAGS_BUSY 0x1
40/* indicates that this is a suballocation of a larger master range */
41#define PMEM_FLAGS_CONNECTED 0x1 << 1
42/* indicates this is a master and not a sub allocation and that it is mmaped */
43#define PMEM_FLAGS_MASTERMAP 0x1 << 2
44/* submap and unsubmap flags indicate:
45 * 00: subregion has never been mmaped
46 * 10: subregion has been mmaped, reference to the mm was taken
47 * 11: subretion has ben released, refernece to the mm still held
48 * 01: subretion has been released, reference to the mm has been released
49 */
50#define PMEM_FLAGS_SUBMAP 0x1 << 3
51#define PMEM_FLAGS_UNSUBMAP 0x1 << 4
52
53
54struct pmem_data {
55 /* in alloc mode: an index into the bitmap
56 * in no_alloc mode: the size of the allocation */
57 int index;
58 /* see flags above for descriptions */
59 unsigned int flags;
60 /* protects this data field, if the mm_mmap sem will be held at the
61 * same time as this sem, the mm sem must be taken first (as this is
62 * the order for vma_open and vma_close ops */
63 struct rw_semaphore sem;
64 /* info about the mmaping process */
65 struct vm_area_struct *vma;
66 /* task struct of the mapping process */
67 struct task_struct *task;
68 /* process id of teh mapping process */
69 pid_t pid;
70 /* file descriptor of the master */
71 int master_fd;
72 /* file struct of the master */
73 struct file *master_file;
74 /* a list of currently available regions if this is a suballocation */
75 struct list_head region_list;
76 /* a linked list of data so we can access them for debugging */
77 struct list_head list;
78#if PMEM_DEBUG
79 int ref;
80#endif
81};
82
83struct pmem_bits {
84 unsigned allocated:1; /* 1 if allocated, 0 if free */
85 unsigned order:7; /* size of the region in pmem space */
86};
87
88struct pmem_region_node {
89 struct pmem_region region;
90 struct list_head list;
91};
92
93#define PMEM_DEBUG_MSGS 0
94#if PMEM_DEBUG_MSGS
95#define DLOG(fmt,args...) \
96 do { printk(KERN_INFO "[%s:%s:%d] "fmt, __FILE__, __func__, __LINE__, \
97 ##args); } \
98 while (0)
99#else
100#define DLOG(x...) do {} while (0)
101#endif
102
103struct pmem_info {
104 struct miscdevice dev;
105 /* physical start address of the remaped pmem space */
106 unsigned long base;
107 /* vitual start address of the remaped pmem space */
108 unsigned char __iomem *vbase;
109 /* total size of the pmem space */
110 unsigned long size;
111 /* number of entries in the pmem space */
112 unsigned long num_entries;
113 /* pfn of the garbage page in memory */
114 unsigned long garbage_pfn;
115 /* index of the garbage page in the pmem space */
116 int garbage_index;
117 /* the bitmap for the region indicating which entries are allocated
118 * and which are free */
119 struct pmem_bits *bitmap;
120 /* indicates the region should not be managed with an allocator */
121 unsigned no_allocator;
122 /* indicates maps of this region should be cached, if a mix of
123 * cached and uncached is desired, set this and open the device with
124 * O_SYNC to get an uncached region */
125 unsigned cached;
126 unsigned buffered;
127 /* in no_allocator mode the first mapper gets the whole space and sets
128 * this flag */
129 unsigned allocated;
130 /* for debugging, creates a list of pmem file structs, the
131 * data_list_lock should be taken before pmem_data->sem if both are
132 * needed */
133 struct mutex data_list_lock;
134 struct list_head data_list;
135 /* pmem_sem protects the bitmap array
136 * a write lock should be held when modifying entries in bitmap
137 * a read lock should be held when reading data from bits or
138 * dereferencing a pointer into bitmap
139 *
140 * pmem_data->sem protects the pmem data of a particular file
141 * Many of the function that require the pmem_data->sem have a non-
142 * locking version for when the caller is already holding that sem.
143 *
144 * IF YOU TAKE BOTH LOCKS TAKE THEM IN THIS ORDER:
145 * down(pmem_data->sem) => down(bitmap_sem)
146 */
147 struct rw_semaphore bitmap_sem;
148
149 long (*ioctl)(struct file *, unsigned int, unsigned long);
150 int (*release)(struct inode *, struct file *);
151};
152
153static struct pmem_info pmem[PMEM_MAX_DEVICES];
154static int id_count;
155
156#define PMEM_IS_FREE(id, index) !(pmem[id].bitmap[index].allocated)
157#define PMEM_ORDER(id, index) pmem[id].bitmap[index].order
158#define PMEM_BUDDY_INDEX(id, index) (index ^ (1 << PMEM_ORDER(id, index)))
159#define PMEM_NEXT_INDEX(id, index) (index + (1 << PMEM_ORDER(id, index)))
160#define PMEM_OFFSET(index) (index * PMEM_MIN_ALLOC)
161#define PMEM_START_ADDR(id, index) (PMEM_OFFSET(index) + pmem[id].base)
162#define PMEM_LEN(id, index) ((1 << PMEM_ORDER(id, index)) * PMEM_MIN_ALLOC)
163#define PMEM_END_ADDR(id, index) (PMEM_START_ADDR(id, index) + \
164 PMEM_LEN(id, index))
165#define PMEM_START_VADDR(id, index) (PMEM_OFFSET(id, index) + pmem[id].vbase)
166#define PMEM_END_VADDR(id, index) (PMEM_START_VADDR(id, index) + \
167 PMEM_LEN(id, index))
168#define PMEM_REVOKED(data) (data->flags & PMEM_FLAGS_REVOKED)
169#define PMEM_IS_PAGE_ALIGNED(addr) (!((addr) & (~PAGE_MASK)))
170#define PMEM_IS_SUBMAP(data) ((data->flags & PMEM_FLAGS_SUBMAP) && \
171 (!(data->flags & PMEM_FLAGS_UNSUBMAP)))
172
173static int pmem_release(struct inode *, struct file *);
174static int pmem_mmap(struct file *, struct vm_area_struct *);
175static int pmem_open(struct inode *, struct file *);
176static long pmem_ioctl(struct file *, unsigned int, unsigned long);
177
178struct file_operations pmem_fops = {
179 .release = pmem_release,
180 .mmap = pmem_mmap,
181 .open = pmem_open,
182 .unlocked_ioctl = pmem_ioctl,
183};
184
185static int get_id(struct file *file)
186{
187 return MINOR(file->f_dentry->d_inode->i_rdev);
188}
189
190int is_pmem_file(struct file *file)
191{
192 int id;
193
194 if (unlikely(!file || !file->f_dentry || !file->f_dentry->d_inode))
195 return 0;
196 id = get_id(file);
197 if (unlikely(id >= PMEM_MAX_DEVICES))
198 return 0;
199 if (unlikely(file->f_dentry->d_inode->i_rdev !=
200 MKDEV(MISC_MAJOR, pmem[id].dev.minor)))
201 return 0;
202 return 1;
203}
204
205static int has_allocation(struct file *file)
206{
207 struct pmem_data *data;
208 /* check is_pmem_file first if not accessed via pmem_file_ops */
209
210 if (unlikely(!file->private_data))
211 return 0;
212 data = (struct pmem_data *)file->private_data;
213 if (unlikely(data->index < 0))
214 return 0;
215 return 1;
216}
217
218static int is_master_owner(struct file *file)
219{
220 struct file *master_file;
221 struct pmem_data *data;
222 int put_needed, ret = 0;
223
224 if (!is_pmem_file(file) || !has_allocation(file))
225 return 0;
226 data = (struct pmem_data *)file->private_data;
227 if (PMEM_FLAGS_MASTERMAP & data->flags)
228 return 1;
229 master_file = fget_light(data->master_fd, &put_needed);
230 if (master_file && data->master_file == master_file)
231 ret = 1;
232 fput_light(master_file, put_needed);
233 return ret;
234}
235
236static int pmem_free(int id, int index)
237{
238 /* caller should hold the write lock on pmem_sem! */
239 int buddy, curr = index;
240 DLOG("index %d\n", index);
241
242 if (pmem[id].no_allocator) {
243 pmem[id].allocated = 0;
244 return 0;
245 }
246 /* clean up the bitmap, merging any buddies */
247 pmem[id].bitmap[curr].allocated = 0;
248 /* find a slots buddy Buddy# = Slot# ^ (1 << order)
249 * if the buddy is also free merge them
250 * repeat until the buddy is not free or end of the bitmap is reached
251 */
252 do {
253 buddy = PMEM_BUDDY_INDEX(id, curr);
254 if (PMEM_IS_FREE(id, buddy) &&
255 PMEM_ORDER(id, buddy) == PMEM_ORDER(id, curr)) {
256 PMEM_ORDER(id, buddy)++;
257 PMEM_ORDER(id, curr)++;
258 curr = min(buddy, curr);
259 } else {
260 break;
261 }
262 } while (curr < pmem[id].num_entries);
263
264 return 0;
265}
266
267static void pmem_revoke(struct file *file, struct pmem_data *data);
268
269static int pmem_release(struct inode *inode, struct file *file)
270{
271 struct pmem_data *data = (struct pmem_data *)file->private_data;
272 struct pmem_region_node *region_node;
273 struct list_head *elt, *elt2;
274 int id = get_id(file), ret = 0;
275
276
277 mutex_lock(&pmem[id].data_list_lock);
278 /* if this file is a master, revoke all the memory in the connected
279 * files */
280 if (PMEM_FLAGS_MASTERMAP & data->flags) {
281 struct pmem_data *sub_data;
282 list_for_each(elt, &pmem[id].data_list) {
283 sub_data = list_entry(elt, struct pmem_data, list);
284 down_read(&sub_data->sem);
285 if (PMEM_IS_SUBMAP(sub_data) &&
286 file == sub_data->master_file) {
287 up_read(&sub_data->sem);
288 pmem_revoke(file, sub_data);
289 } else
290 up_read(&sub_data->sem);
291 }
292 }
293 list_del(&data->list);
294 mutex_unlock(&pmem[id].data_list_lock);
295
296
297 down_write(&data->sem);
298
299 /* if its not a conencted file and it has an allocation, free it */
300 if (!(PMEM_FLAGS_CONNECTED & data->flags) && has_allocation(file)) {
301 down_write(&pmem[id].bitmap_sem);
302 ret = pmem_free(id, data->index);
303 up_write(&pmem[id].bitmap_sem);
304 }
305
306 /* if this file is a submap (mapped, connected file), downref the
307 * task struct */
308 if (PMEM_FLAGS_SUBMAP & data->flags)
309 if (data->task) {
310 put_task_struct(data->task);
311 data->task = NULL;
312 }
313
314 file->private_data = NULL;
315
316 list_for_each_safe(elt, elt2, &data->region_list) {
317 region_node = list_entry(elt, struct pmem_region_node, list);
318 list_del(elt);
319 kfree(region_node);
320 }
321 BUG_ON(!list_empty(&data->region_list));
322
323 up_write(&data->sem);
324 kfree(data);
325 if (pmem[id].release)
326 ret = pmem[id].release(inode, file);
327
328 return ret;
329}
330
331static int pmem_open(struct inode *inode, struct file *file)
332{
333 struct pmem_data *data;
334 int id = get_id(file);
335 int ret = 0;
336
337 DLOG("current %u file %p(%d)\n", current->pid, file, file_count(file));
338 /* setup file->private_data to indicate its unmapped */
339 /* you can only open a pmem device one time */
340 if (file->private_data != NULL)
341 return -1;
342 data = kmalloc(sizeof(struct pmem_data), GFP_KERNEL);
343 if (!data) {
344 printk("pmem: unable to allocate memory for pmem metadata.");
345 return -1;
346 }
347 data->flags = 0;
348 data->index = -1;
349 data->task = NULL;
350 data->vma = NULL;
351 data->pid = 0;
352 data->master_file = NULL;
353#if PMEM_DEBUG
354 data->ref = 0;
355#endif
356 INIT_LIST_HEAD(&data->region_list);
357 init_rwsem(&data->sem);
358
359 file->private_data = data;
360 INIT_LIST_HEAD(&data->list);
361
362 mutex_lock(&pmem[id].data_list_lock);
363 list_add(&data->list, &pmem[id].data_list);
364 mutex_unlock(&pmem[id].data_list_lock);
365 return ret;
366}
367
368static unsigned long pmem_order(unsigned long len)
369{
370 int i;
371
372 len = (len + PMEM_MIN_ALLOC - 1)/PMEM_MIN_ALLOC;
373 len--;
374 for (i = 0; i < sizeof(len)*8; i++)
375 if (len >> i == 0)
376 break;
377 return i;
378}
379
380static int pmem_allocate(int id, unsigned long len)
381{
382 /* caller should hold the write lock on pmem_sem! */
383 /* return the corresponding pdata[] entry */
384 int curr = 0;
385 int end = pmem[id].num_entries;
386 int best_fit = -1;
387 unsigned long order = pmem_order(len);
388
389 if (pmem[id].no_allocator) {
390 DLOG("no allocator");
391 if ((len > pmem[id].size) || pmem[id].allocated)
392 return -1;
393 pmem[id].allocated = 1;
394 return len;
395 }
396
397 if (order > PMEM_MAX_ORDER)
398 return -1;
399 DLOG("order %lx\n", order);
400
401 /* look through the bitmap:
402 * if you find a free slot of the correct order use it
403 * otherwise, use the best fit (smallest with size > order) slot
404 */
405 while (curr < end) {
406 if (PMEM_IS_FREE(id, curr)) {
407 if (PMEM_ORDER(id, curr) == (unsigned char)order) {
408 /* set the not free bit and clear others */
409 best_fit = curr;
410 break;
411 }
412 if (PMEM_ORDER(id, curr) > (unsigned char)order &&
413 (best_fit < 0 ||
414 PMEM_ORDER(id, curr) < PMEM_ORDER(id, best_fit)))
415 best_fit = curr;
416 }
417 curr = PMEM_NEXT_INDEX(id, curr);
418 }
419
420 /* if best_fit < 0, there are no suitable slots,
421 * return an error
422 */
423 if (best_fit < 0) {
424 printk("pmem: no space left to allocate!\n");
425 return -1;
426 }
427
428 /* now partition the best fit:
429 * split the slot into 2 buddies of order - 1
430 * repeat until the slot is of the correct order
431 */
432 while (PMEM_ORDER(id, best_fit) > (unsigned char)order) {
433 int buddy;
434 PMEM_ORDER(id, best_fit) -= 1;
435 buddy = PMEM_BUDDY_INDEX(id, best_fit);
436 PMEM_ORDER(id, buddy) = PMEM_ORDER(id, best_fit);
437 }
438 pmem[id].bitmap[best_fit].allocated = 1;
439 return best_fit;
440}
441
442static pgprot_t pmem_access_prot(struct file *file, pgprot_t vma_prot)
443{
444 int id = get_id(file);
445#ifdef pgprot_noncached
446 if (pmem[id].cached == 0 || file->f_flags & O_SYNC)
447 return pgprot_noncached(vma_prot);
448#endif
449#ifdef pgprot_ext_buffered
450 else if (pmem[id].buffered)
451 return pgprot_ext_buffered(vma_prot);
452#endif
453 return vma_prot;
454}
455
456static unsigned long pmem_start_addr(int id, struct pmem_data *data)
457{
458 if (pmem[id].no_allocator)
459 return PMEM_START_ADDR(id, 0);
460 else
461 return PMEM_START_ADDR(id, data->index);
462
463}
464
465static void *pmem_start_vaddr(int id, struct pmem_data *data)
466{
467 return pmem_start_addr(id, data) - pmem[id].base + pmem[id].vbase;
468}
469
470static unsigned long pmem_len(int id, struct pmem_data *data)
471{
472 if (pmem[id].no_allocator)
473 return data->index;
474 else
475 return PMEM_LEN(id, data->index);
476}
477
478static int pmem_map_garbage(int id, struct vm_area_struct *vma,
479 struct pmem_data *data, unsigned long offset,
480 unsigned long len)
481{
482 int i, garbage_pages = len >> PAGE_SHIFT;
483
484 vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP | VM_SHARED | VM_WRITE;
485 for (i = 0; i < garbage_pages; i++) {
486 if (vm_insert_pfn(vma, vma->vm_start + offset + (i * PAGE_SIZE),
487 pmem[id].garbage_pfn))
488 return -EAGAIN;
489 }
490 return 0;
491}
492
493static int pmem_unmap_pfn_range(int id, struct vm_area_struct *vma,
494 struct pmem_data *data, unsigned long offset,
495 unsigned long len)
496{
497 int garbage_pages;
498 DLOG("unmap offset %lx len %lx\n", offset, len);
499
500 BUG_ON(!PMEM_IS_PAGE_ALIGNED(len));
501
502 garbage_pages = len >> PAGE_SHIFT;
503 zap_page_range(vma, vma->vm_start + offset, len, NULL);
504 pmem_map_garbage(id, vma, data, offset, len);
505 return 0;
506}
507
508static int pmem_map_pfn_range(int id, struct vm_area_struct *vma,
509 struct pmem_data *data, unsigned long offset,
510 unsigned long len)
511{
512 DLOG("map offset %lx len %lx\n", offset, len);
513 BUG_ON(!PMEM_IS_PAGE_ALIGNED(vma->vm_start));
514 BUG_ON(!PMEM_IS_PAGE_ALIGNED(vma->vm_end));
515 BUG_ON(!PMEM_IS_PAGE_ALIGNED(len));
516 BUG_ON(!PMEM_IS_PAGE_ALIGNED(offset));
517
518 if (io_remap_pfn_range(vma, vma->vm_start + offset,
519 (pmem_start_addr(id, data) + offset) >> PAGE_SHIFT,
520 len, vma->vm_page_prot)) {
521 return -EAGAIN;
522 }
523 return 0;
524}
525
526static int pmem_remap_pfn_range(int id, struct vm_area_struct *vma,
527 struct pmem_data *data, unsigned long offset,
528 unsigned long len)
529{
530 /* hold the mm semp for the vma you are modifying when you call this */
531 BUG_ON(!vma);
532 zap_page_range(vma, vma->vm_start + offset, len, NULL);
533 return pmem_map_pfn_range(id, vma, data, offset, len);
534}
535
536static void pmem_vma_open(struct vm_area_struct *vma)
537{
538 struct file *file = vma->vm_file;
539 struct pmem_data *data = file->private_data;
540 int id = get_id(file);
541 /* this should never be called as we don't support copying pmem
542 * ranges via fork */
543 BUG_ON(!has_allocation(file));
544 down_write(&data->sem);
545 /* remap the garbage pages, forkers don't get access to the data */
546 pmem_unmap_pfn_range(id, vma, data, 0, vma->vm_start - vma->vm_end);
547 up_write(&data->sem);
548}
549
550static void pmem_vma_close(struct vm_area_struct *vma)
551{
552 struct file *file = vma->vm_file;
553 struct pmem_data *data = file->private_data;
554
555 DLOG("current %u ppid %u file %p count %d\n", current->pid,
556 current->parent->pid, file, file_count(file));
557 if (unlikely(!is_pmem_file(file) || !has_allocation(file))) {
558 printk(KERN_WARNING "pmem: something is very wrong, you are "
559 "closing a vm backing an allocation that doesn't "
560 "exist!\n");
561 return;
562 }
563 down_write(&data->sem);
564 if (data->vma == vma) {
565 data->vma = NULL;
566 if ((data->flags & PMEM_FLAGS_CONNECTED) &&
567 (data->flags & PMEM_FLAGS_SUBMAP))
568 data->flags |= PMEM_FLAGS_UNSUBMAP;
569 }
570 /* the kernel is going to free this vma now anyway */
571 up_write(&data->sem);
572}
573
574static struct vm_operations_struct vm_ops = {
575 .open = pmem_vma_open,
576 .close = pmem_vma_close,
577};
578
579static int pmem_mmap(struct file *file, struct vm_area_struct *vma)
580{
581 struct pmem_data *data;
582 int index;
583 unsigned long vma_size = vma->vm_end - vma->vm_start;
584 int ret = 0, id = get_id(file);
585
586 if (vma->vm_pgoff || !PMEM_IS_PAGE_ALIGNED(vma_size)) {
587#if PMEM_DEBUG
588 printk(KERN_ERR "pmem: mmaps must be at offset zero, aligned"
589 " and a multiple of pages_size.\n");
590#endif
591 return -EINVAL;
592 }
593
594 data = (struct pmem_data *)file->private_data;
595 down_write(&data->sem);
596 /* check this file isn't already mmaped, for submaps check this file
597 * has never been mmaped */
598 if ((data->flags & PMEM_FLAGS_SUBMAP) ||
599 (data->flags & PMEM_FLAGS_UNSUBMAP)) {
600#if PMEM_DEBUG
601 printk(KERN_ERR "pmem: you can only mmap a pmem file once, "
602 "this file is already mmaped. %x\n", data->flags);
603#endif
604 ret = -EINVAL;
605 goto error;
606 }
607 /* if file->private_data == unalloced, alloc*/
608 if (data && data->index == -1) {
609 down_write(&pmem[id].bitmap_sem);
610 index = pmem_allocate(id, vma->vm_end - vma->vm_start);
611 up_write(&pmem[id].bitmap_sem);
612 data->index = index;
613 }
614 /* either no space was available or an error occured */
615 if (!has_allocation(file)) {
616 ret = -EINVAL;
617 printk("pmem: could not find allocation for map.\n");
618 goto error;
619 }
620
621 if (pmem_len(id, data) < vma_size) {
622#if PMEM_DEBUG
623 printk(KERN_WARNING "pmem: mmap size [%lu] does not match"
624 "size of backing region [%lu].\n", vma_size,
625 pmem_len(id, data));
626#endif
627 ret = -EINVAL;
628 goto error;
629 }
630
631 vma->vm_pgoff = pmem_start_addr(id, data) >> PAGE_SHIFT;
632 vma->vm_page_prot = pmem_access_prot(file, vma->vm_page_prot);
633
634 if (data->flags & PMEM_FLAGS_CONNECTED) {
635 struct pmem_region_node *region_node;
636 struct list_head *elt;
637 if (pmem_map_garbage(id, vma, data, 0, vma_size)) {
638 printk("pmem: mmap failed in kernel!\n");
639 ret = -EAGAIN;
640 goto error;
641 }
642 list_for_each(elt, &data->region_list) {
643 region_node = list_entry(elt, struct pmem_region_node,
644 list);
645 DLOG("remapping file: %p %lx %lx\n", file,
646 region_node->region.offset,
647 region_node->region.len);
648 if (pmem_remap_pfn_range(id, vma, data,
649 region_node->region.offset,
650 region_node->region.len)) {
651 ret = -EAGAIN;
652 goto error;
653 }
654 }
655 data->flags |= PMEM_FLAGS_SUBMAP;
656 get_task_struct(current->group_leader);
657 data->task = current->group_leader;
658 data->vma = vma;
659#if PMEM_DEBUG
660 data->pid = current->pid;
661#endif
662 DLOG("submmapped file %p vma %p pid %u\n", file, vma,
663 current->pid);
664 } else {
665 if (pmem_map_pfn_range(id, vma, data, 0, vma_size)) {
666 printk(KERN_INFO "pmem: mmap failed in kernel!\n");
667 ret = -EAGAIN;
668 goto error;
669 }
670 data->flags |= PMEM_FLAGS_MASTERMAP;
671 data->pid = current->pid;
672 }
673 vma->vm_ops = &vm_ops;
674error:
675 up_write(&data->sem);
676 return ret;
677}
678
679/* the following are the api for accessing pmem regions by other drivers
680 * from inside the kernel */
681int get_pmem_user_addr(struct file *file, unsigned long *start,
682 unsigned long *len)
683{
684 struct pmem_data *data;
685 if (!is_pmem_file(file) || !has_allocation(file)) {
686#if PMEM_DEBUG
687 printk(KERN_INFO "pmem: requested pmem data from invalid"
688 "file.\n");
689#endif
690 return -1;
691 }
692 data = (struct pmem_data *)file->private_data;
693 down_read(&data->sem);
694 if (data->vma) {
695 *start = data->vma->vm_start;
696 *len = data->vma->vm_end - data->vma->vm_start;
697 } else {
698 *start = 0;
699 *len = 0;
700 }
701 up_read(&data->sem);
702 return 0;
703}
704
705int get_pmem_addr(struct file *file, unsigned long *start,
706 unsigned long *vstart, unsigned long *len)
707{
708 struct pmem_data *data;
709 int id;
710
711 if (!is_pmem_file(file) || !has_allocation(file)) {
712 return -1;
713 }
714
715 data = (struct pmem_data *)file->private_data;
716 if (data->index == -1) {
717#if PMEM_DEBUG
718 printk(KERN_INFO "pmem: requested pmem data from file with no "
719 "allocation.\n");
720 return -1;
721#endif
722 }
723 id = get_id(file);
724
725 down_read(&data->sem);
726 *start = pmem_start_addr(id, data);
727 *len = pmem_len(id, data);
728 *vstart = (unsigned long)pmem_start_vaddr(id, data);
729 up_read(&data->sem);
730#if PMEM_DEBUG
731 down_write(&data->sem);
732 data->ref++;
733 up_write(&data->sem);
734#endif
735 return 0;
736}
737
738int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart,
739 unsigned long *len, struct file **filp)
740{
741 struct file *file;
742
743 file = fget(fd);
744 if (unlikely(file == NULL)) {
745 printk(KERN_INFO "pmem: requested data from file descriptor "
746 "that doesn't exist.");
747 return -1;
748 }
749
750 if (get_pmem_addr(file, start, vstart, len))
751 goto end;
752
753 if (filp)
754 *filp = file;
755 return 0;
756end:
757 fput(file);
758 return -1;
759}
760
761void put_pmem_file(struct file *file)
762{
763 struct pmem_data *data;
764 int id;
765
766 if (!is_pmem_file(file))
767 return;
768 id = get_id(file);
769 data = (struct pmem_data *)file->private_data;
770#if PMEM_DEBUG
771 down_write(&data->sem);
772 if (data->ref == 0) {
773 printk("pmem: pmem_put > pmem_get %s (pid %d)\n",
774 pmem[id].dev.name, data->pid);
775 BUG();
776 }
777 data->ref--;
778 up_write(&data->sem);
779#endif
780 fput(file);
781}
782
783void flush_pmem_file(struct file *file, unsigned long offset, unsigned long len)
784{
785 struct pmem_data *data;
786 int id;
787 void *vaddr;
788 struct pmem_region_node *region_node;
789 struct list_head *elt;
790 void *flush_start, *flush_end;
791
792 if (!is_pmem_file(file) || !has_allocation(file)) {
793 return;
794 }
795
796 id = get_id(file);
797 data = (struct pmem_data *)file->private_data;
798 if (!pmem[id].cached || file->f_flags & O_SYNC)
799 return;
800
801 down_read(&data->sem);
802 vaddr = pmem_start_vaddr(id, data);
803 /* if this isn't a submmapped file, flush the whole thing */
804 if (unlikely(!(data->flags & PMEM_FLAGS_CONNECTED))) {
805 dmac_flush_range(vaddr, vaddr + pmem_len(id, data));
806 goto end;
807 }
808 /* otherwise, flush the region of the file we are drawing */
809 list_for_each(elt, &data->region_list) {
810 region_node = list_entry(elt, struct pmem_region_node, list);
811 if ((offset >= region_node->region.offset) &&
812 ((offset + len) <= (region_node->region.offset +
813 region_node->region.len))) {
814 flush_start = vaddr + region_node->region.offset;
815 flush_end = flush_start + region_node->region.len;
816 dmac_flush_range(flush_start, flush_end);
817 break;
818 }
819 }
820end:
821 up_read(&data->sem);
822}
823
824static int pmem_connect(unsigned long connect, struct file *file)
825{
826 struct pmem_data *data = (struct pmem_data *)file->private_data;
827 struct pmem_data *src_data;
828 struct file *src_file;
829 int ret = 0, put_needed;
830
831 down_write(&data->sem);
832 /* retrieve the src file and check it is a pmem file with an alloc */
833 src_file = fget_light(connect, &put_needed);
834 DLOG("connect %p to %p\n", file, src_file);
835 if (!src_file) {
836 printk("pmem: src file not found!\n");
837 ret = -EINVAL;
838 goto err_no_file;
839 }
840 if (unlikely(!is_pmem_file(src_file) || !has_allocation(src_file))) {
841 printk(KERN_INFO "pmem: src file is not a pmem file or has no "
842 "alloc!\n");
843 ret = -EINVAL;
844 goto err_bad_file;
845 }
846 src_data = (struct pmem_data *)src_file->private_data;
847
848 if (has_allocation(file) && (data->index != src_data->index)) {
849 printk("pmem: file is already mapped but doesn't match this"
850 " src_file!\n");
851 ret = -EINVAL;
852 goto err_bad_file;
853 }
854 data->index = src_data->index;
855 data->flags |= PMEM_FLAGS_CONNECTED;
856 data->master_fd = connect;
857 data->master_file = src_file;
858
859err_bad_file:
860 fput_light(src_file, put_needed);
861err_no_file:
862 up_write(&data->sem);
863 return ret;
864}
865
866static void pmem_unlock_data_and_mm(struct pmem_data *data,
867 struct mm_struct *mm)
868{
869 up_write(&data->sem);
870 if (mm != NULL) {
871 up_write(&mm->mmap_sem);
872 mmput(mm);
873 }
874}
875
876static int pmem_lock_data_and_mm(struct file *file, struct pmem_data *data,
877 struct mm_struct **locked_mm)
878{
879 int ret = 0;
880 struct mm_struct *mm = NULL;
881 *locked_mm = NULL;
882lock_mm:
883 down_read(&data->sem);
884 if (PMEM_IS_SUBMAP(data)) {
885 mm = get_task_mm(data->task);
886 if (!mm) {
887#if PMEM_DEBUG
888 printk("pmem: can't remap task is gone!\n");
889#endif
890 up_read(&data->sem);
891 return -1;
892 }
893 }
894 up_read(&data->sem);
895
896 if (mm)
897 down_write(&mm->mmap_sem);
898
899 down_write(&data->sem);
900 /* check that the file didn't get mmaped before we could take the
901 * data sem, this should be safe b/c you can only submap each file
902 * once */
903 if (PMEM_IS_SUBMAP(data) && !mm) {
904 pmem_unlock_data_and_mm(data, mm);
905 up_write(&data->sem);
906 goto lock_mm;
907 }
908 /* now check that vma.mm is still there, it could have been
909 * deleted by vma_close before we could get the data->sem */
910 if ((data->flags & PMEM_FLAGS_UNSUBMAP) && (mm != NULL)) {
911 /* might as well release this */
912 if (data->flags & PMEM_FLAGS_SUBMAP) {
913 put_task_struct(data->task);
914 data->task = NULL;
915 /* lower the submap flag to show the mm is gone */
916 data->flags &= ~(PMEM_FLAGS_SUBMAP);
917 }
918 pmem_unlock_data_and_mm(data, mm);
919 return -1;
920 }
921 *locked_mm = mm;
922 return ret;
923}
924
925int pmem_remap(struct pmem_region *region, struct file *file,
926 unsigned operation)
927{
928 int ret;
929 struct pmem_region_node *region_node;
930 struct mm_struct *mm = NULL;
931 struct list_head *elt, *elt2;
932 int id = get_id(file);
933 struct pmem_data *data = (struct pmem_data *)file->private_data;
934
935 /* pmem region must be aligned on a page boundry */
936 if (unlikely(!PMEM_IS_PAGE_ALIGNED(region->offset) ||
937 !PMEM_IS_PAGE_ALIGNED(region->len))) {
938#if PMEM_DEBUG
939 printk("pmem: request for unaligned pmem suballocation "
940 "%lx %lx\n", region->offset, region->len);
941#endif
942 return -EINVAL;
943 }
944
945 /* if userspace requests a region of len 0, there's nothing to do */
946 if (region->len == 0)
947 return 0;
948
949 /* lock the mm and data */
950 ret = pmem_lock_data_and_mm(file, data, &mm);
951 if (ret)
952 return 0;
953
954 /* only the owner of the master file can remap the client fds
955 * that back in it */
956 if (!is_master_owner(file)) {
957#if PMEM_DEBUG
958 printk("pmem: remap requested from non-master process\n");
959#endif
960 ret = -EINVAL;
961 goto err;
962 }
963
964 /* check that the requested range is within the src allocation */
965 if (unlikely((region->offset > pmem_len(id, data)) ||
966 (region->len > pmem_len(id, data)) ||
967 (region->offset + region->len > pmem_len(id, data)))) {
968#if PMEM_DEBUG
969 printk(KERN_INFO "pmem: suballoc doesn't fit in src_file!\n");
970#endif
971 ret = -EINVAL;
972 goto err;
973 }
974
975 if (operation == PMEM_MAP) {
976 region_node = kmalloc(sizeof(struct pmem_region_node),
977 GFP_KERNEL);
978 if (!region_node) {
979 ret = -ENOMEM;
980#if PMEM_DEBUG
981 printk(KERN_INFO "No space to allocate metadata!");
982#endif
983 goto err;
984 }
985 region_node->region = *region;
986 list_add(&region_node->list, &data->region_list);
987 } else if (operation == PMEM_UNMAP) {
988 int found = 0;
989 list_for_each_safe(elt, elt2, &data->region_list) {
990 region_node = list_entry(elt, struct pmem_region_node,
991 list);
992 if (region->len == 0 ||
993 (region_node->region.offset == region->offset &&
994 region_node->region.len == region->len)) {
995 list_del(elt);
996 kfree(region_node);
997 found = 1;
998 }
999 }
1000 if (!found) {
1001#if PMEM_DEBUG
1002 printk("pmem: Unmap region does not map any mapped "
1003 "region!");
1004#endif
1005 ret = -EINVAL;
1006 goto err;
1007 }
1008 }
1009
1010 if (data->vma && PMEM_IS_SUBMAP(data)) {
1011 if (operation == PMEM_MAP)
1012 ret = pmem_remap_pfn_range(id, data->vma, data,
1013 region->offset, region->len);
1014 else if (operation == PMEM_UNMAP)
1015 ret = pmem_unmap_pfn_range(id, data->vma, data,
1016 region->offset, region->len);
1017 }
1018
1019err:
1020 pmem_unlock_data_and_mm(data, mm);
1021 return ret;
1022}
1023
1024static void pmem_revoke(struct file *file, struct pmem_data *data)
1025{
1026 struct pmem_region_node *region_node;
1027 struct list_head *elt, *elt2;
1028 struct mm_struct *mm = NULL;
1029 int id = get_id(file);
1030 int ret = 0;
1031
1032 data->master_file = NULL;
1033 ret = pmem_lock_data_and_mm(file, data, &mm);
1034 /* if lock_data_and_mm fails either the task that mapped the fd, or
1035 * the vma that mapped it have already gone away, nothing more
1036 * needs to be done */
1037 if (ret)
1038 return;
1039 /* unmap everything */
1040 /* delete the regions and region list nothing is mapped any more */
1041 if (data->vma)
1042 list_for_each_safe(elt, elt2, &data->region_list) {
1043 region_node = list_entry(elt, struct pmem_region_node,
1044 list);
1045 pmem_unmap_pfn_range(id, data->vma, data,
1046 region_node->region.offset,
1047 region_node->region.len);
1048 list_del(elt);
1049 kfree(region_node);
1050 }
1051 /* delete the master file */
1052 pmem_unlock_data_and_mm(data, mm);
1053}
1054
1055static void pmem_get_size(struct pmem_region *region, struct file *file)
1056{
1057 struct pmem_data *data = (struct pmem_data *)file->private_data;
1058 int id = get_id(file);
1059
1060 if (!has_allocation(file)) {
1061 region->offset = 0;
1062 region->len = 0;
1063 return;
1064 } else {
1065 region->offset = pmem_start_addr(id, data);
1066 region->len = pmem_len(id, data);
1067 }
1068 DLOG("offset %lx len %lx\n", region->offset, region->len);
1069}
1070
1071
1072static long pmem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1073{
1074 struct pmem_data *data;
1075 int id = get_id(file);
1076
1077 switch (cmd) {
1078 case PMEM_GET_PHYS:
1079 {
1080 struct pmem_region region;
1081 DLOG("get_phys\n");
1082 if (!has_allocation(file)) {
1083 region.offset = 0;
1084 region.len = 0;
1085 } else {
1086 data = (struct pmem_data *)file->private_data;
1087 region.offset = pmem_start_addr(id, data);
1088 region.len = pmem_len(id, data);
1089 }
1090 printk(KERN_INFO "pmem: request for physical address of pmem region "
1091 "from process %d.\n", current->pid);
1092 if (copy_to_user((void __user *)arg, &region,
1093 sizeof(struct pmem_region)))
1094 return -EFAULT;
1095 break;
1096 }
1097 case PMEM_MAP:
1098 {
1099 struct pmem_region region;
1100 if (copy_from_user(&region, (void __user *)arg,
1101 sizeof(struct pmem_region)))
1102 return -EFAULT;
1103 data = (struct pmem_data *)file->private_data;
1104 return pmem_remap(&region, file, PMEM_MAP);
1105 }
1106 break;
1107 case PMEM_UNMAP:
1108 {
1109 struct pmem_region region;
1110 if (copy_from_user(&region, (void __user *)arg,
1111 sizeof(struct pmem_region)))
1112 return -EFAULT;
1113 data = (struct pmem_data *)file->private_data;
1114 return pmem_remap(&region, file, PMEM_UNMAP);
1115 break;
1116 }
1117 case PMEM_GET_SIZE:
1118 {
1119 struct pmem_region region;
1120 DLOG("get_size\n");
1121 pmem_get_size(&region, file);
1122 if (copy_to_user((void __user *)arg, &region,
1123 sizeof(struct pmem_region)))
1124 return -EFAULT;
1125 break;
1126 }
1127 case PMEM_GET_TOTAL_SIZE:
1128 {
1129 struct pmem_region region;
1130 DLOG("get total size\n");
1131 region.offset = 0;
1132 get_id(file);
1133 region.len = pmem[id].size;
1134 if (copy_to_user((void __user *)arg, &region,
1135 sizeof(struct pmem_region)))
1136 return -EFAULT;
1137 break;
1138 }
1139 case PMEM_ALLOCATE:
1140 {
1141 if (has_allocation(file))
1142 return -EINVAL;
1143 data = (struct pmem_data *)file->private_data;
1144 data->index = pmem_allocate(id, arg);
1145 break;
1146 }
1147 case PMEM_CONNECT:
1148 DLOG("connect\n");
1149 return pmem_connect(arg, file);
1150 break;
1151 case PMEM_CACHE_FLUSH:
1152 {
1153 struct pmem_region region;
1154 DLOG("flush\n");
1155 if (copy_from_user(&region, (void __user *)arg,
1156 sizeof(struct pmem_region)))
1157 return -EFAULT;
1158 flush_pmem_file(file, region.offset, region.len);
1159 break;
1160 }
1161 default:
1162 if (pmem[id].ioctl)
1163 return pmem[id].ioctl(file, cmd, arg);
1164 return -EINVAL;
1165 }
1166 return 0;
1167}
1168
1169#if PMEM_DEBUG
1170static ssize_t debug_open(struct inode *inode, struct file *file)
1171{
1172 file->private_data = inode->i_private;
1173 return 0;
1174}
1175
1176static ssize_t debug_read(struct file *file, char __user *buf, size_t count,
1177 loff_t *ppos)
1178{
1179 struct list_head *elt, *elt2;
1180 struct pmem_data *data;
1181 struct pmem_region_node *region_node;
1182 int id = (int)file->private_data;
1183 const int debug_bufmax = 4096;
1184 static char buffer[4096];
1185 int n = 0;
1186
1187 DLOG("debug open\n");
1188 n = scnprintf(buffer, debug_bufmax,
1189 "pid #: mapped regions (offset, len) (offset,len)...\n");
1190
1191 mutex_lock(&pmem[id].data_list_lock);
1192 list_for_each(elt, &pmem[id].data_list) {
1193 data = list_entry(elt, struct pmem_data, list);
1194 down_read(&data->sem);
1195 n += scnprintf(buffer + n, debug_bufmax - n, "pid %u:",
1196 data->pid);
1197 list_for_each(elt2, &data->region_list) {
1198 region_node = list_entry(elt2, struct pmem_region_node,
1199 list);
1200 n += scnprintf(buffer + n, debug_bufmax - n,
1201 "(%lx,%lx) ",
1202 region_node->region.offset,
1203 region_node->region.len);
1204 }
1205 n += scnprintf(buffer + n, debug_bufmax - n, "\n");
1206 up_read(&data->sem);
1207 }
1208 mutex_unlock(&pmem[id].data_list_lock);
1209
1210 n++;
1211 buffer[n] = 0;
1212 return simple_read_from_buffer(buf, count, ppos, buffer, n);
1213}
1214
1215static struct file_operations debug_fops = {
1216 .read = debug_read,
1217 .open = debug_open,
1218};
1219#endif
1220
1221#if 0
1222static struct miscdevice pmem_dev = {
1223 .name = "pmem",
1224 .fops = &pmem_fops,
1225};
1226#endif
1227
1228int pmem_setup(struct android_pmem_platform_data *pdata,
1229 long (*ioctl)(struct file *, unsigned int, unsigned long),
1230 int (*release)(struct inode *, struct file *))
1231{
1232 int err = 0;
1233 int i, index = 0;
1234 int id = id_count;
1235 id_count++;
1236
1237 pmem[id].no_allocator = pdata->no_allocator;
1238 pmem[id].cached = pdata->cached;
1239 pmem[id].buffered = pdata->buffered;
1240 pmem[id].base = pdata->start;
1241 pmem[id].size = pdata->size;
1242 pmem[id].ioctl = ioctl;
1243 pmem[id].release = release;
1244 init_rwsem(&pmem[id].bitmap_sem);
1245 mutex_init(&pmem[id].data_list_lock);
1246 INIT_LIST_HEAD(&pmem[id].data_list);
1247 pmem[id].dev.name = pdata->name;
1248 pmem[id].dev.minor = id;
1249 pmem[id].dev.fops = &pmem_fops;
1250 printk(KERN_INFO "%s: %d init\n", pdata->name, pdata->cached);
1251
1252 err = misc_register(&pmem[id].dev);
1253 if (err) {
1254 printk(KERN_ALERT "Unable to register pmem driver!\n");
1255 goto err_cant_register_device;
1256 }
1257 pmem[id].num_entries = pmem[id].size / PMEM_MIN_ALLOC;
1258
1259 pmem[id].bitmap = kmalloc(pmem[id].num_entries *
1260 sizeof(struct pmem_bits), GFP_KERNEL);
1261 if (!pmem[id].bitmap)
1262 goto err_no_mem_for_metadata;
1263
1264 memset(pmem[id].bitmap, 0, sizeof(struct pmem_bits) *
1265 pmem[id].num_entries);
1266
1267 for (i = sizeof(pmem[id].num_entries) * 8 - 1; i >= 0; i--) {
1268 if ((pmem[id].num_entries) & 1<<i) {
1269 PMEM_ORDER(id, index) = i;
1270 index = PMEM_NEXT_INDEX(id, index);
1271 }
1272 }
1273
1274 if (pmem[id].cached)
1275 pmem[id].vbase = ioremap_cached(pmem[id].base,
1276 pmem[id].size);
1277#ifdef ioremap_ext_buffered
1278 else if (pmem[id].buffered)
1279 pmem[id].vbase = ioremap_ext_buffered(pmem[id].base,
1280 pmem[id].size);
1281#endif
1282 else
1283 pmem[id].vbase = ioremap(pmem[id].base, pmem[id].size);
1284
1285 if (pmem[id].vbase == 0)
1286 goto error_cant_remap;
1287
1288 pmem[id].garbage_pfn = page_to_pfn(alloc_page(GFP_KERNEL));
1289 if (pmem[id].no_allocator)
1290 pmem[id].allocated = 0;
1291
1292#if PMEM_DEBUG
1293 debugfs_create_file(pdata->name, S_IFREG | S_IRUGO, NULL, (void *)id,
1294 &debug_fops);
1295#endif
1296 return 0;
1297error_cant_remap:
1298 kfree(pmem[id].bitmap);
1299err_no_mem_for_metadata:
1300 misc_deregister(&pmem[id].dev);
1301err_cant_register_device:
1302 return -1;
1303}
1304
1305static int pmem_probe(struct platform_device *pdev)
1306{
1307 struct android_pmem_platform_data *pdata;
1308
1309 if (!pdev || !pdev->dev.platform_data) {
1310 printk(KERN_ALERT "Unable to probe pmem!\n");
1311 return -1;
1312 }
1313 pdata = pdev->dev.platform_data;
1314 return pmem_setup(pdata, NULL, NULL);
1315}
1316
1317
1318static int pmem_remove(struct platform_device *pdev)
1319{
1320 int id = pdev->id;
1321 __free_page(pfn_to_page(pmem[id].garbage_pfn));
1322 misc_deregister(&pmem[id].dev);
1323 return 0;
1324}
1325
1326static struct platform_driver pmem_driver = {
1327 .probe = pmem_probe,
1328 .remove = pmem_remove,
1329 .driver = { .name = "android_pmem" }
1330};
1331
1332
1333static int __init pmem_init(void)
1334{
1335 return platform_driver_register(&pmem_driver);
1336}
1337
1338static void __exit pmem_exit(void)
1339{
1340 platform_driver_unregister(&pmem_driver);
1341}
1342
1343module_init(pmem_init);
1344module_exit(pmem_exit);
1345
diff --git a/drivers/staging/android/ram_console.c b/drivers/staging/android/ram_console.c
new file mode 100644
index 000000000000..6d4d67924f22
--- /dev/null
+++ b/drivers/staging/android/ram_console.c
@@ -0,0 +1,443 @@
1/* drivers/android/ram_console.c
2 *
3 * Copyright (C) 2007-2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/console.h>
17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/proc_fs.h>
21#include <linux/string.h>
22#include <linux/uaccess.h>
23#include <linux/io.h>
24#include "ram_console.h"
25
26#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
27#include <linux/rslib.h>
28#endif
29
30struct ram_console_buffer {
31 uint32_t sig;
32 uint32_t start;
33 uint32_t size;
34 uint8_t data[0];
35};
36
37#define RAM_CONSOLE_SIG (0x43474244) /* DBGC */
38
39#ifdef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
40static char __initdata
41 ram_console_old_log_init_buffer[CONFIG_ANDROID_RAM_CONSOLE_EARLY_SIZE];
42#endif
43static char *ram_console_old_log;
44static size_t ram_console_old_log_size;
45
46static struct ram_console_buffer *ram_console_buffer;
47static size_t ram_console_buffer_size;
48#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
49static char *ram_console_par_buffer;
50static struct rs_control *ram_console_rs_decoder;
51static int ram_console_corrected_bytes;
52static int ram_console_bad_blocks;
53#define ECC_BLOCK_SIZE CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_DATA_SIZE
54#define ECC_SIZE CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_ECC_SIZE
55#define ECC_SYMSIZE CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE
56#define ECC_POLY CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_POLYNOMIAL
57#endif
58
59#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
60static void ram_console_encode_rs8(uint8_t *data, size_t len, uint8_t *ecc)
61{
62 int i;
63 uint16_t par[ECC_SIZE];
64 /* Initialize the parity buffer */
65 memset(par, 0, sizeof(par));
66 encode_rs8(ram_console_rs_decoder, data, len, par, 0);
67 for (i = 0; i < ECC_SIZE; i++)
68 ecc[i] = par[i];
69}
70
71static int ram_console_decode_rs8(void *data, size_t len, uint8_t *ecc)
72{
73 int i;
74 uint16_t par[ECC_SIZE];
75 for (i = 0; i < ECC_SIZE; i++)
76 par[i] = ecc[i];
77 return decode_rs8(ram_console_rs_decoder, data, par, len,
78 NULL, 0, NULL, 0, NULL);
79}
80#endif
81
82static void ram_console_update(const char *s, unsigned int count)
83{
84 struct ram_console_buffer *buffer = ram_console_buffer;
85#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
86 uint8_t *buffer_end = buffer->data + ram_console_buffer_size;
87 uint8_t *block;
88 uint8_t *par;
89 int size = ECC_BLOCK_SIZE;
90#endif
91 memcpy(buffer->data + buffer->start, s, count);
92#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
93 block = buffer->data + (buffer->start & ~(ECC_BLOCK_SIZE - 1));
94 par = ram_console_par_buffer +
95 (buffer->start / ECC_BLOCK_SIZE) * ECC_SIZE;
96 do {
97 if (block + ECC_BLOCK_SIZE > buffer_end)
98 size = buffer_end - block;
99 ram_console_encode_rs8(block, size, par);
100 block += ECC_BLOCK_SIZE;
101 par += ECC_SIZE;
102 } while (block < buffer->data + buffer->start + count);
103#endif
104}
105
106static void ram_console_update_header(void)
107{
108#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
109 struct ram_console_buffer *buffer = ram_console_buffer;
110 uint8_t *par;
111 par = ram_console_par_buffer +
112 DIV_ROUND_UP(ram_console_buffer_size, ECC_BLOCK_SIZE) * ECC_SIZE;
113 ram_console_encode_rs8((uint8_t *)buffer, sizeof(*buffer), par);
114#endif
115}
116
117static void
118ram_console_write(struct console *console, const char *s, unsigned int count)
119{
120 int rem;
121 struct ram_console_buffer *buffer = ram_console_buffer;
122
123 if (count > ram_console_buffer_size) {
124 s += count - ram_console_buffer_size;
125 count = ram_console_buffer_size;
126 }
127 rem = ram_console_buffer_size - buffer->start;
128 if (rem < count) {
129 ram_console_update(s, rem);
130 s += rem;
131 count -= rem;
132 buffer->start = 0;
133 buffer->size = ram_console_buffer_size;
134 }
135 ram_console_update(s, count);
136
137 buffer->start += count;
138 if (buffer->size < ram_console_buffer_size)
139 buffer->size += count;
140 ram_console_update_header();
141}
142
143static struct console ram_console = {
144 .name = "ram",
145 .write = ram_console_write,
146 .flags = CON_PRINTBUFFER | CON_ENABLED,
147 .index = -1,
148};
149
150void ram_console_enable_console(int enabled)
151{
152 if (enabled)
153 ram_console.flags |= CON_ENABLED;
154 else
155 ram_console.flags &= ~CON_ENABLED;
156}
157
158static void __init
159ram_console_save_old(struct ram_console_buffer *buffer, const char *bootinfo,
160 char *dest)
161{
162 size_t old_log_size = buffer->size;
163 size_t bootinfo_size = 0;
164 size_t total_size = old_log_size;
165 char *ptr;
166 const char *bootinfo_label = "Boot info:\n";
167
168#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
169 uint8_t *block;
170 uint8_t *par;
171 char strbuf[80];
172 int strbuf_len = 0;
173
174 block = buffer->data;
175 par = ram_console_par_buffer;
176 while (block < buffer->data + buffer->size) {
177 int numerr;
178 int size = ECC_BLOCK_SIZE;
179 if (block + size > buffer->data + ram_console_buffer_size)
180 size = buffer->data + ram_console_buffer_size - block;
181 numerr = ram_console_decode_rs8(block, size, par);
182 if (numerr > 0) {
183#if 0
184 printk(KERN_INFO "ram_console: error in block %p, %d\n",
185 block, numerr);
186#endif
187 ram_console_corrected_bytes += numerr;
188 } else if (numerr < 0) {
189#if 0
190 printk(KERN_INFO "ram_console: uncorrectable error in "
191 "block %p\n", block);
192#endif
193 ram_console_bad_blocks++;
194 }
195 block += ECC_BLOCK_SIZE;
196 par += ECC_SIZE;
197 }
198 if (ram_console_corrected_bytes || ram_console_bad_blocks)
199 strbuf_len = snprintf(strbuf, sizeof(strbuf),
200 "\n%d Corrected bytes, %d unrecoverable blocks\n",
201 ram_console_corrected_bytes, ram_console_bad_blocks);
202 else
203 strbuf_len = snprintf(strbuf, sizeof(strbuf),
204 "\nNo errors detected\n");
205 if (strbuf_len >= sizeof(strbuf))
206 strbuf_len = sizeof(strbuf) - 1;
207 total_size += strbuf_len;
208#endif
209
210 if (bootinfo)
211 bootinfo_size = strlen(bootinfo) + strlen(bootinfo_label);
212 total_size += bootinfo_size;
213
214 if (dest == NULL) {
215 dest = kmalloc(total_size, GFP_KERNEL);
216 if (dest == NULL) {
217 printk(KERN_ERR
218 "ram_console: failed to allocate buffer\n");
219 return;
220 }
221 }
222
223 ram_console_old_log = dest;
224 ram_console_old_log_size = total_size;
225 memcpy(ram_console_old_log,
226 &buffer->data[buffer->start], buffer->size - buffer->start);
227 memcpy(ram_console_old_log + buffer->size - buffer->start,
228 &buffer->data[0], buffer->start);
229 ptr = ram_console_old_log + old_log_size;
230#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
231 memcpy(ptr, strbuf, strbuf_len);
232 ptr += strbuf_len;
233#endif
234 if (bootinfo) {
235 memcpy(ptr, bootinfo_label, strlen(bootinfo_label));
236 ptr += strlen(bootinfo_label);
237 memcpy(ptr, bootinfo, bootinfo_size);
238 ptr += bootinfo_size;
239 }
240}
241
242static int __init ram_console_init(struct ram_console_buffer *buffer,
243 size_t buffer_size, const char *bootinfo,
244 char *old_buf)
245{
246#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
247 int numerr;
248 uint8_t *par;
249#endif
250 ram_console_buffer = buffer;
251 ram_console_buffer_size =
252 buffer_size - sizeof(struct ram_console_buffer);
253
254 if (ram_console_buffer_size > buffer_size) {
255 pr_err("ram_console: buffer %p, invalid size %zu, "
256 "datasize %zu\n", buffer, buffer_size,
257 ram_console_buffer_size);
258 return 0;
259 }
260
261#ifdef CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION
262 ram_console_buffer_size -= (DIV_ROUND_UP(ram_console_buffer_size,
263 ECC_BLOCK_SIZE) + 1) * ECC_SIZE;
264
265 if (ram_console_buffer_size > buffer_size) {
266 pr_err("ram_console: buffer %p, invalid size %zu, "
267 "non-ecc datasize %zu\n",
268 buffer, buffer_size, ram_console_buffer_size);
269 return 0;
270 }
271
272 ram_console_par_buffer = buffer->data + ram_console_buffer_size;
273
274
275 /* first consecutive root is 0
276 * primitive element to generate roots = 1
277 */
278 ram_console_rs_decoder = init_rs(ECC_SYMSIZE, ECC_POLY, 0, 1, ECC_SIZE);
279 if (ram_console_rs_decoder == NULL) {
280 printk(KERN_INFO "ram_console: init_rs failed\n");
281 return 0;
282 }
283
284 ram_console_corrected_bytes = 0;
285 ram_console_bad_blocks = 0;
286
287 par = ram_console_par_buffer +
288 DIV_ROUND_UP(ram_console_buffer_size, ECC_BLOCK_SIZE) * ECC_SIZE;
289
290 numerr = ram_console_decode_rs8(buffer, sizeof(*buffer), par);
291 if (numerr > 0) {
292 printk(KERN_INFO "ram_console: error in header, %d\n", numerr);
293 ram_console_corrected_bytes += numerr;
294 } else if (numerr < 0) {
295 printk(KERN_INFO
296 "ram_console: uncorrectable error in header\n");
297 ram_console_bad_blocks++;
298 }
299#endif
300
301 if (buffer->sig == RAM_CONSOLE_SIG) {
302 if (buffer->size > ram_console_buffer_size
303 || buffer->start > buffer->size)
304 printk(KERN_INFO "ram_console: found existing invalid "
305 "buffer, size %d, start %d\n",
306 buffer->size, buffer->start);
307 else {
308 printk(KERN_INFO "ram_console: found existing buffer, "
309 "size %d, start %d\n",
310 buffer->size, buffer->start);
311 ram_console_save_old(buffer, bootinfo, old_buf);
312 }
313 } else {
314 printk(KERN_INFO "ram_console: no valid data in buffer "
315 "(sig = 0x%08x)\n", buffer->sig);
316 }
317
318 buffer->sig = RAM_CONSOLE_SIG;
319 buffer->start = 0;
320 buffer->size = 0;
321
322 register_console(&ram_console);
323#ifdef CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE
324 console_verbose();
325#endif
326 return 0;
327}
328
329#ifdef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
330static int __init ram_console_early_init(void)
331{
332 return ram_console_init((struct ram_console_buffer *)
333 CONFIG_ANDROID_RAM_CONSOLE_EARLY_ADDR,
334 CONFIG_ANDROID_RAM_CONSOLE_EARLY_SIZE,
335 NULL,
336 ram_console_old_log_init_buffer);
337}
338#else
339static int ram_console_driver_probe(struct platform_device *pdev)
340{
341 struct resource *res = pdev->resource;
342 size_t start;
343 size_t buffer_size;
344 void *buffer;
345 const char *bootinfo = NULL;
346 struct ram_console_platform_data *pdata = pdev->dev.platform_data;
347
348 if (res == NULL || pdev->num_resources != 1 ||
349 !(res->flags & IORESOURCE_MEM)) {
350 printk(KERN_ERR "ram_console: invalid resource, %p %d flags "
351 "%lx\n", res, pdev->num_resources, res ? res->flags : 0);
352 return -ENXIO;
353 }
354 buffer_size = res->end - res->start + 1;
355 start = res->start;
356 printk(KERN_INFO "ram_console: got buffer at %zx, size %zx\n",
357 start, buffer_size);
358 buffer = ioremap(res->start, buffer_size);
359 if (buffer == NULL) {
360 printk(KERN_ERR "ram_console: failed to map memory\n");
361 return -ENOMEM;
362 }
363
364 if (pdata)
365 bootinfo = pdata->bootinfo;
366
367 return ram_console_init(buffer, buffer_size, bootinfo, NULL/* allocate */);
368}
369
370static struct platform_driver ram_console_driver = {
371 .probe = ram_console_driver_probe,
372 .driver = {
373 .name = "ram_console",
374 },
375};
376
377static int __init ram_console_module_init(void)
378{
379 int err;
380 err = platform_driver_register(&ram_console_driver);
381 return err;
382}
383#endif
384
385static ssize_t ram_console_read_old(struct file *file, char __user *buf,
386 size_t len, loff_t *offset)
387{
388 loff_t pos = *offset;
389 ssize_t count;
390
391 if (pos >= ram_console_old_log_size)
392 return 0;
393
394 count = min(len, (size_t)(ram_console_old_log_size - pos));
395 if (copy_to_user(buf, ram_console_old_log + pos, count))
396 return -EFAULT;
397
398 *offset += count;
399 return count;
400}
401
402static const struct file_operations ram_console_file_ops = {
403 .owner = THIS_MODULE,
404 .read = ram_console_read_old,
405};
406
407static int __init ram_console_late_init(void)
408{
409 struct proc_dir_entry *entry;
410
411 if (ram_console_old_log == NULL)
412 return 0;
413#ifdef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
414 ram_console_old_log = kmalloc(ram_console_old_log_size, GFP_KERNEL);
415 if (ram_console_old_log == NULL) {
416 printk(KERN_ERR
417 "ram_console: failed to allocate buffer for old log\n");
418 ram_console_old_log_size = 0;
419 return 0;
420 }
421 memcpy(ram_console_old_log,
422 ram_console_old_log_init_buffer, ram_console_old_log_size);
423#endif
424 entry = create_proc_entry("last_kmsg", S_IFREG | S_IRUGO, NULL);
425 if (!entry) {
426 printk(KERN_ERR "ram_console: failed to create proc entry\n");
427 kfree(ram_console_old_log);
428 ram_console_old_log = NULL;
429 return 0;
430 }
431
432 entry->proc_fops = &ram_console_file_ops;
433 entry->size = ram_console_old_log_size;
434 return 0;
435}
436
437#ifdef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
438console_initcall(ram_console_early_init);
439#else
440postcore_initcall(ram_console_module_init);
441#endif
442late_initcall(ram_console_late_init);
443
diff --git a/drivers/staging/android/ram_console.h b/drivers/staging/android/ram_console.h
new file mode 100644
index 000000000000..9f1125c11066
--- /dev/null
+++ b/drivers/staging/android/ram_console.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2010 Google, Inc.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#ifndef _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_
16#define _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_
17
18struct ram_console_platform_data {
19 const char *bootinfo;
20};
21
22#endif /* _INCLUDE_LINUX_PLATFORM_DATA_RAM_CONSOLE_H_ */
diff --git a/drivers/staging/android/switch/Kconfig b/drivers/staging/android/switch/Kconfig
new file mode 100644
index 000000000000..36846f62f4bc
--- /dev/null
+++ b/drivers/staging/android/switch/Kconfig
@@ -0,0 +1,11 @@
1menuconfig ANDROID_SWITCH
2 tristate "Android Switch class support"
3 help
4 Say Y here to enable Android switch class support. This allows
5 monitoring switches by userspace via sysfs and uevent.
6
7config ANDROID_SWITCH_GPIO
8 tristate "Android GPIO Switch support"
9 depends on GENERIC_GPIO && ANDROID_SWITCH
10 help
11 Say Y here to enable GPIO based switch support.
diff --git a/drivers/staging/android/switch/Makefile b/drivers/staging/android/switch/Makefile
new file mode 100644
index 000000000000..d76bfdcedfaf
--- /dev/null
+++ b/drivers/staging/android/switch/Makefile
@@ -0,0 +1,4 @@
1# Android Switch Class Driver
2obj-$(CONFIG_ANDROID_SWITCH) += switch_class.o
3obj-$(CONFIG_ANDROID_SWITCH_GPIO) += switch_gpio.o
4
diff --git a/drivers/staging/android/switch/switch.h b/drivers/staging/android/switch/switch.h
new file mode 100644
index 000000000000..4fcb3109875a
--- /dev/null
+++ b/drivers/staging/android/switch/switch.h
@@ -0,0 +1,53 @@
1/*
2 * Switch class driver
3 *
4 * Copyright (C) 2008 Google, Inc.
5 * Author: Mike Lockwood <lockwood@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16*/
17
18#ifndef __LINUX_SWITCH_H__
19#define __LINUX_SWITCH_H__
20
21struct switch_dev {
22 const char *name;
23 struct device *dev;
24 int index;
25 int state;
26
27 ssize_t (*print_name)(struct switch_dev *sdev, char *buf);
28 ssize_t (*print_state)(struct switch_dev *sdev, char *buf);
29};
30
31struct gpio_switch_platform_data {
32 const char *name;
33 unsigned gpio;
34
35 /* if NULL, switch_dev.name will be printed */
36 const char *name_on;
37 const char *name_off;
38 /* if NULL, "0" or "1" will be printed */
39 const char *state_on;
40 const char *state_off;
41};
42
43extern int switch_dev_register(struct switch_dev *sdev);
44extern void switch_dev_unregister(struct switch_dev *sdev);
45
46static inline int switch_get_state(struct switch_dev *sdev)
47{
48 return sdev->state;
49}
50
51extern void switch_set_state(struct switch_dev *sdev, int state);
52
53#endif /* __LINUX_SWITCH_H__ */
diff --git a/drivers/staging/android/switch/switch_class.c b/drivers/staging/android/switch/switch_class.c
new file mode 100644
index 000000000000..74680446fc66
--- /dev/null
+++ b/drivers/staging/android/switch/switch_class.c
@@ -0,0 +1,174 @@
1/*
2 * switch_class.c
3 *
4 * Copyright (C) 2008 Google, Inc.
5 * Author: Mike Lockwood <lockwood@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16*/
17
18#include <linux/module.h>
19#include <linux/types.h>
20#include <linux/init.h>
21#include <linux/device.h>
22#include <linux/fs.h>
23#include <linux/err.h>
24#include "switch.h"
25
26struct class *switch_class;
27static atomic_t device_count;
28
29static ssize_t state_show(struct device *dev, struct device_attribute *attr,
30 char *buf)
31{
32 struct switch_dev *sdev = (struct switch_dev *)
33 dev_get_drvdata(dev);
34
35 if (sdev->print_state) {
36 int ret = sdev->print_state(sdev, buf);
37 if (ret >= 0)
38 return ret;
39 }
40 return sprintf(buf, "%d\n", sdev->state);
41}
42
43static ssize_t name_show(struct device *dev, struct device_attribute *attr,
44 char *buf)
45{
46 struct switch_dev *sdev = (struct switch_dev *)
47 dev_get_drvdata(dev);
48
49 if (sdev->print_name) {
50 int ret = sdev->print_name(sdev, buf);
51 if (ret >= 0)
52 return ret;
53 }
54 return sprintf(buf, "%s\n", sdev->name);
55}
56
57static DEVICE_ATTR(state, S_IRUGO | S_IWUSR, state_show, NULL);
58static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, name_show, NULL);
59
60void switch_set_state(struct switch_dev *sdev, int state)
61{
62 char name_buf[120];
63 char state_buf[120];
64 char *prop_buf;
65 char *envp[3];
66 int env_offset = 0;
67 int length;
68
69 if (sdev->state != state) {
70 sdev->state = state;
71
72 prop_buf = (char *)get_zeroed_page(GFP_KERNEL);
73 if (prop_buf) {
74 length = name_show(sdev->dev, NULL, prop_buf);
75 if (length > 0) {
76 if (prop_buf[length - 1] == '\n')
77 prop_buf[length - 1] = 0;
78 snprintf(name_buf, sizeof(name_buf),
79 "SWITCH_NAME=%s", prop_buf);
80 envp[env_offset++] = name_buf;
81 }
82 length = state_show(sdev->dev, NULL, prop_buf);
83 if (length > 0) {
84 if (prop_buf[length - 1] == '\n')
85 prop_buf[length - 1] = 0;
86 snprintf(state_buf, sizeof(state_buf),
87 "SWITCH_STATE=%s", prop_buf);
88 envp[env_offset++] = state_buf;
89 }
90 envp[env_offset] = NULL;
91 kobject_uevent_env(&sdev->dev->kobj, KOBJ_CHANGE, envp);
92 free_page((unsigned long)prop_buf);
93 } else {
94 printk(KERN_ERR "out of memory in switch_set_state\n");
95 kobject_uevent(&sdev->dev->kobj, KOBJ_CHANGE);
96 }
97 }
98}
99EXPORT_SYMBOL_GPL(switch_set_state);
100
101static int create_switch_class(void)
102{
103 if (!switch_class) {
104 switch_class = class_create(THIS_MODULE, "switch");
105 if (IS_ERR(switch_class))
106 return PTR_ERR(switch_class);
107 atomic_set(&device_count, 0);
108 }
109
110 return 0;
111}
112
113int switch_dev_register(struct switch_dev *sdev)
114{
115 int ret;
116
117 if (!switch_class) {
118 ret = create_switch_class();
119 if (ret < 0)
120 return ret;
121 }
122
123 sdev->index = atomic_inc_return(&device_count);
124 sdev->dev = device_create(switch_class, NULL,
125 MKDEV(0, sdev->index), NULL, sdev->name);
126 if (IS_ERR(sdev->dev))
127 return PTR_ERR(sdev->dev);
128
129 ret = device_create_file(sdev->dev, &dev_attr_state);
130 if (ret < 0)
131 goto err_create_file_1;
132 ret = device_create_file(sdev->dev, &dev_attr_name);
133 if (ret < 0)
134 goto err_create_file_2;
135
136 dev_set_drvdata(sdev->dev, sdev);
137 sdev->state = 0;
138 return 0;
139
140err_create_file_2:
141 device_remove_file(sdev->dev, &dev_attr_state);
142err_create_file_1:
143 device_destroy(switch_class, MKDEV(0, sdev->index));
144 printk(KERN_ERR "switch: Failed to register driver %s\n", sdev->name);
145
146 return ret;
147}
148EXPORT_SYMBOL_GPL(switch_dev_register);
149
150void switch_dev_unregister(struct switch_dev *sdev)
151{
152 device_remove_file(sdev->dev, &dev_attr_name);
153 device_remove_file(sdev->dev, &dev_attr_state);
154 device_destroy(switch_class, MKDEV(0, sdev->index));
155 dev_set_drvdata(sdev->dev, NULL);
156}
157EXPORT_SYMBOL_GPL(switch_dev_unregister);
158
159static int __init switch_class_init(void)
160{
161 return create_switch_class();
162}
163
164static void __exit switch_class_exit(void)
165{
166 class_destroy(switch_class);
167}
168
169module_init(switch_class_init);
170module_exit(switch_class_exit);
171
172MODULE_AUTHOR("Mike Lockwood <lockwood@android.com>");
173MODULE_DESCRIPTION("Switch class driver");
174MODULE_LICENSE("GPL");
diff --git a/drivers/staging/android/switch/switch_gpio.c b/drivers/staging/android/switch/switch_gpio.c
new file mode 100644
index 000000000000..38b2c2f6004e
--- /dev/null
+++ b/drivers/staging/android/switch/switch_gpio.c
@@ -0,0 +1,172 @@
1/*
2 * switch_gpio.c
3 *
4 * Copyright (C) 2008 Google, Inc.
5 * Author: Mike Lockwood <lockwood@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16*/
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/workqueue.h>
25#include <linux/gpio.h>
26#include "switch.h"
27
28struct gpio_switch_data {
29 struct switch_dev sdev;
30 unsigned gpio;
31 const char *name_on;
32 const char *name_off;
33 const char *state_on;
34 const char *state_off;
35 int irq;
36 struct work_struct work;
37};
38
39static void gpio_switch_work(struct work_struct *work)
40{
41 int state;
42 struct gpio_switch_data *data =
43 container_of(work, struct gpio_switch_data, work);
44
45 state = gpio_get_value(data->gpio);
46 switch_set_state(&data->sdev, state);
47}
48
49static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
50{
51 struct gpio_switch_data *switch_data =
52 (struct gpio_switch_data *)dev_id;
53
54 schedule_work(&switch_data->work);
55 return IRQ_HANDLED;
56}
57
58static ssize_t switch_gpio_print_state(struct switch_dev *sdev, char *buf)
59{
60 struct gpio_switch_data *switch_data =
61 container_of(sdev, struct gpio_switch_data, sdev);
62 const char *state;
63 if (switch_get_state(sdev))
64 state = switch_data->state_on;
65 else
66 state = switch_data->state_off;
67
68 if (state)
69 return sprintf(buf, "%s\n", state);
70 return -1;
71}
72
73static int gpio_switch_probe(struct platform_device *pdev)
74{
75 struct gpio_switch_platform_data *pdata = pdev->dev.platform_data;
76 struct gpio_switch_data *switch_data;
77 int ret = 0;
78
79 if (!pdata)
80 return -EBUSY;
81
82 switch_data = kzalloc(sizeof(struct gpio_switch_data), GFP_KERNEL);
83 if (!switch_data)
84 return -ENOMEM;
85
86 switch_data->sdev.name = pdata->name;
87 switch_data->gpio = pdata->gpio;
88 switch_data->name_on = pdata->name_on;
89 switch_data->name_off = pdata->name_off;
90 switch_data->state_on = pdata->state_on;
91 switch_data->state_off = pdata->state_off;
92 switch_data->sdev.print_state = switch_gpio_print_state;
93
94 ret = switch_dev_register(&switch_data->sdev);
95 if (ret < 0)
96 goto err_switch_dev_register;
97
98 ret = gpio_request(switch_data->gpio, pdev->name);
99 if (ret < 0)
100 goto err_request_gpio;
101
102 ret = gpio_direction_input(switch_data->gpio);
103 if (ret < 0)
104 goto err_set_gpio_input;
105
106 INIT_WORK(&switch_data->work, gpio_switch_work);
107
108 switch_data->irq = gpio_to_irq(switch_data->gpio);
109 if (switch_data->irq < 0) {
110 ret = switch_data->irq;
111 goto err_detect_irq_num_failed;
112 }
113
114 ret = request_irq(switch_data->irq, gpio_irq_handler,
115 IRQF_TRIGGER_LOW, pdev->name, switch_data);
116 if (ret < 0)
117 goto err_request_irq;
118
119 /* Perform initial detection */
120 gpio_switch_work(&switch_data->work);
121
122 return 0;
123
124err_request_irq:
125err_detect_irq_num_failed:
126err_set_gpio_input:
127 gpio_free(switch_data->gpio);
128err_request_gpio:
129 switch_dev_unregister(&switch_data->sdev);
130err_switch_dev_register:
131 kfree(switch_data);
132
133 return ret;
134}
135
136static int __devexit gpio_switch_remove(struct platform_device *pdev)
137{
138 struct gpio_switch_data *switch_data = platform_get_drvdata(pdev);
139
140 cancel_work_sync(&switch_data->work);
141 gpio_free(switch_data->gpio);
142 switch_dev_unregister(&switch_data->sdev);
143 kfree(switch_data);
144
145 return 0;
146}
147
148static struct platform_driver gpio_switch_driver = {
149 .probe = gpio_switch_probe,
150 .remove = __devexit_p(gpio_switch_remove),
151 .driver = {
152 .name = "switch-gpio",
153 .owner = THIS_MODULE,
154 },
155};
156
157static int __init gpio_switch_init(void)
158{
159 return platform_driver_register(&gpio_switch_driver);
160}
161
162static void __exit gpio_switch_exit(void)
163{
164 platform_driver_unregister(&gpio_switch_driver);
165}
166
167module_init(gpio_switch_init);
168module_exit(gpio_switch_exit);
169
170MODULE_AUTHOR("Mike Lockwood <lockwood@android.com>");
171MODULE_DESCRIPTION("GPIO Switch driver");
172MODULE_LICENSE("GPL");
diff --git a/drivers/staging/android/timed_gpio.c b/drivers/staging/android/timed_gpio.c
new file mode 100644
index 000000000000..a64481c3e86d
--- /dev/null
+++ b/drivers/staging/android/timed_gpio.c
@@ -0,0 +1,176 @@
1/* drivers/misc/timed_gpio.c
2 *
3 * Copyright (C) 2008 Google, Inc.
4 * Author: Mike Lockwood <lockwood@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/hrtimer.h>
21#include <linux/err.h>
22#include <linux/gpio.h>
23
24#include "timed_output.h"
25#include "timed_gpio.h"
26
27
28struct timed_gpio_data {
29 struct timed_output_dev dev;
30 struct hrtimer timer;
31 spinlock_t lock;
32 unsigned gpio;
33 int max_timeout;
34 u8 active_low;
35};
36
37static enum hrtimer_restart gpio_timer_func(struct hrtimer *timer)
38{
39 struct timed_gpio_data *data =
40 container_of(timer, struct timed_gpio_data, timer);
41
42 gpio_direction_output(data->gpio, data->active_low ? 1 : 0);
43 return HRTIMER_NORESTART;
44}
45
46static int gpio_get_time(struct timed_output_dev *dev)
47{
48 struct timed_gpio_data *data =
49 container_of(dev, struct timed_gpio_data, dev);
50
51 if (hrtimer_active(&data->timer)) {
52 ktime_t r = hrtimer_get_remaining(&data->timer);
53 struct timeval t = ktime_to_timeval(r);
54 return t.tv_sec * 1000 + t.tv_usec / 1000;
55 } else
56 return 0;
57}
58
59static void gpio_enable(struct timed_output_dev *dev, int value)
60{
61 struct timed_gpio_data *data =
62 container_of(dev, struct timed_gpio_data, dev);
63 unsigned long flags;
64
65 spin_lock_irqsave(&data->lock, flags);
66
67 /* cancel previous timer and set GPIO according to value */
68 hrtimer_cancel(&data->timer);
69 gpio_direction_output(data->gpio, data->active_low ? !value : !!value);
70
71 if (value > 0) {
72 if (value > data->max_timeout)
73 value = data->max_timeout;
74
75 hrtimer_start(&data->timer,
76 ktime_set(value / 1000, (value % 1000) * 1000000),
77 HRTIMER_MODE_REL);
78 }
79
80 spin_unlock_irqrestore(&data->lock, flags);
81}
82
83static int timed_gpio_probe(struct platform_device *pdev)
84{
85 struct timed_gpio_platform_data *pdata = pdev->dev.platform_data;
86 struct timed_gpio *cur_gpio;
87 struct timed_gpio_data *gpio_data, *gpio_dat;
88 int i, j, ret = 0;
89
90 if (!pdata)
91 return -EBUSY;
92
93 gpio_data = kzalloc(sizeof(struct timed_gpio_data) * pdata->num_gpios,
94 GFP_KERNEL);
95 if (!gpio_data)
96 return -ENOMEM;
97
98 for (i = 0; i < pdata->num_gpios; i++) {
99 cur_gpio = &pdata->gpios[i];
100 gpio_dat = &gpio_data[i];
101
102 hrtimer_init(&gpio_dat->timer, CLOCK_MONOTONIC,
103 HRTIMER_MODE_REL);
104 gpio_dat->timer.function = gpio_timer_func;
105 spin_lock_init(&gpio_dat->lock);
106
107 gpio_dat->dev.name = cur_gpio->name;
108 gpio_dat->dev.get_time = gpio_get_time;
109 gpio_dat->dev.enable = gpio_enable;
110 ret = gpio_request(cur_gpio->gpio, cur_gpio->name);
111 if (ret >= 0) {
112 ret = timed_output_dev_register(&gpio_dat->dev);
113 if (ret < 0)
114 gpio_free(cur_gpio->gpio);
115 }
116 if (ret < 0) {
117 for (j = 0; j < i; j++) {
118 timed_output_dev_unregister(&gpio_data[i].dev);
119 gpio_free(gpio_data[i].gpio);
120 }
121 kfree(gpio_data);
122 return ret;
123 }
124
125 gpio_dat->gpio = cur_gpio->gpio;
126 gpio_dat->max_timeout = cur_gpio->max_timeout;
127 gpio_dat->active_low = cur_gpio->active_low;
128 gpio_direction_output(gpio_dat->gpio, gpio_dat->active_low);
129 }
130
131 platform_set_drvdata(pdev, gpio_data);
132
133 return 0;
134}
135
136static int timed_gpio_remove(struct platform_device *pdev)
137{
138 struct timed_gpio_platform_data *pdata = pdev->dev.platform_data;
139 struct timed_gpio_data *gpio_data = platform_get_drvdata(pdev);
140 int i;
141
142 for (i = 0; i < pdata->num_gpios; i++) {
143 timed_output_dev_unregister(&gpio_data[i].dev);
144 gpio_free(gpio_data[i].gpio);
145 }
146
147 kfree(gpio_data);
148
149 return 0;
150}
151
152static struct platform_driver timed_gpio_driver = {
153 .probe = timed_gpio_probe,
154 .remove = timed_gpio_remove,
155 .driver = {
156 .name = TIMED_GPIO_NAME,
157 .owner = THIS_MODULE,
158 },
159};
160
161static int __init timed_gpio_init(void)
162{
163 return platform_driver_register(&timed_gpio_driver);
164}
165
166static void __exit timed_gpio_exit(void)
167{
168 platform_driver_unregister(&timed_gpio_driver);
169}
170
171module_init(timed_gpio_init);
172module_exit(timed_gpio_exit);
173
174MODULE_AUTHOR("Mike Lockwood <lockwood@android.com>");
175MODULE_DESCRIPTION("timed gpio driver");
176MODULE_LICENSE("GPL");
diff --git a/drivers/staging/android/timed_gpio.h b/drivers/staging/android/timed_gpio.h
new file mode 100644
index 000000000000..a0e15f8be3f7
--- /dev/null
+++ b/drivers/staging/android/timed_gpio.h
@@ -0,0 +1,33 @@
1/* include/linux/timed_gpio.h
2 *
3 * Copyright (C) 2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14*/
15
16#ifndef _LINUX_TIMED_GPIO_H
17#define _LINUX_TIMED_GPIO_H
18
19#define TIMED_GPIO_NAME "timed-gpio"
20
21struct timed_gpio {
22 const char *name;
23 unsigned gpio;
24 int max_timeout;
25 u8 active_low;
26};
27
28struct timed_gpio_platform_data {
29 int num_gpios;
30 struct timed_gpio *gpios;
31};
32
33#endif
diff --git a/drivers/staging/android/timed_output.c b/drivers/staging/android/timed_output.c
new file mode 100644
index 000000000000..f373422308e0
--- /dev/null
+++ b/drivers/staging/android/timed_output.c
@@ -0,0 +1,123 @@
1/* drivers/misc/timed_output.c
2 *
3 * Copyright (C) 2009 Google, Inc.
4 * Author: Mike Lockwood <lockwood@android.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/device.h>
20#include <linux/fs.h>
21#include <linux/err.h>
22
23#include "timed_output.h"
24
25static struct class *timed_output_class;
26static atomic_t device_count;
27
28static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
29 char *buf)
30{
31 struct timed_output_dev *tdev = dev_get_drvdata(dev);
32 int remaining = tdev->get_time(tdev);
33
34 return sprintf(buf, "%d\n", remaining);
35}
36
37static ssize_t enable_store(
38 struct device *dev, struct device_attribute *attr,
39 const char *buf, size_t size)
40{
41 struct timed_output_dev *tdev = dev_get_drvdata(dev);
42 int value;
43
44 if (sscanf(buf, "%d", &value) != 1)
45 return -EINVAL;
46
47 tdev->enable(tdev, value);
48
49 return size;
50}
51
52static DEVICE_ATTR(enable, S_IRUGO | S_IWUSR, enable_show, enable_store);
53
54static int create_timed_output_class(void)
55{
56 if (!timed_output_class) {
57 timed_output_class = class_create(THIS_MODULE, "timed_output");
58 if (IS_ERR(timed_output_class))
59 return PTR_ERR(timed_output_class);
60 atomic_set(&device_count, 0);
61 }
62
63 return 0;
64}
65
66int timed_output_dev_register(struct timed_output_dev *tdev)
67{
68 int ret;
69
70 if (!tdev || !tdev->name || !tdev->enable || !tdev->get_time)
71 return -EINVAL;
72
73 ret = create_timed_output_class();
74 if (ret < 0)
75 return ret;
76
77 tdev->index = atomic_inc_return(&device_count);
78 tdev->dev = device_create(timed_output_class, NULL,
79 MKDEV(0, tdev->index), NULL, tdev->name);
80 if (IS_ERR(tdev->dev))
81 return PTR_ERR(tdev->dev);
82
83 ret = device_create_file(tdev->dev, &dev_attr_enable);
84 if (ret < 0)
85 goto err_create_file;
86
87 dev_set_drvdata(tdev->dev, tdev);
88 tdev->state = 0;
89 return 0;
90
91err_create_file:
92 device_destroy(timed_output_class, MKDEV(0, tdev->index));
93 printk(KERN_ERR "timed_output: Failed to register driver %s\n",
94 tdev->name);
95
96 return ret;
97}
98EXPORT_SYMBOL_GPL(timed_output_dev_register);
99
100void timed_output_dev_unregister(struct timed_output_dev *tdev)
101{
102 device_remove_file(tdev->dev, &dev_attr_enable);
103 device_destroy(timed_output_class, MKDEV(0, tdev->index));
104 dev_set_drvdata(tdev->dev, NULL);
105}
106EXPORT_SYMBOL_GPL(timed_output_dev_unregister);
107
108static int __init timed_output_init(void)
109{
110 return create_timed_output_class();
111}
112
113static void __exit timed_output_exit(void)
114{
115 class_destroy(timed_output_class);
116}
117
118module_init(timed_output_init);
119module_exit(timed_output_exit);
120
121MODULE_AUTHOR("Mike Lockwood <lockwood@android.com>");
122MODULE_DESCRIPTION("timed output class driver");
123MODULE_LICENSE("GPL");
diff --git a/drivers/staging/android/timed_output.h b/drivers/staging/android/timed_output.h
new file mode 100644
index 000000000000..ec907ab2ff54
--- /dev/null
+++ b/drivers/staging/android/timed_output.h
@@ -0,0 +1,37 @@
1/* include/linux/timed_output.h
2 *
3 * Copyright (C) 2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14*/
15
16#ifndef _LINUX_TIMED_OUTPUT_H
17#define _LINUX_TIMED_OUTPUT_H
18
19struct timed_output_dev {
20 const char *name;
21
22 /* enable the output and set the timer */
23 void (*enable)(struct timed_output_dev *sdev, int timeout);
24
25 /* returns the current number of milliseconds remaining on the timer */
26 int (*get_time)(struct timed_output_dev *sdev);
27
28 /* private data */
29 struct device *dev;
30 int index;
31 int state;
32};
33
34extern int timed_output_dev_register(struct timed_output_dev *dev);
35extern void timed_output_dev_unregister(struct timed_output_dev *dev);
36
37#endif
diff --git a/drivers/staging/asus_oled/asus_oled.c b/drivers/staging/asus_oled/asus_oled.c
index 7bb7da7959a2..e77e4e0396cf 100644
--- a/drivers/staging/asus_oled/asus_oled.c
+++ b/drivers/staging/asus_oled/asus_oled.c
@@ -201,7 +201,7 @@ static ssize_t set_enabled(struct device *dev, struct device_attribute *attr,
201 struct usb_interface *intf = to_usb_interface(dev); 201 struct usb_interface *intf = to_usb_interface(dev);
202 struct asus_oled_dev *odev = usb_get_intfdata(intf); 202 struct asus_oled_dev *odev = usb_get_intfdata(intf);
203 unsigned long value; 203 unsigned long value;
204 if (strict_strtoul(buf, 10, &value)) 204 if (kstrtoul(buf, 10, &value))
205 return -EINVAL; 205 return -EINVAL;
206 206
207 enable_oled(odev, value); 207 enable_oled(odev, value);
@@ -217,7 +217,7 @@ static ssize_t class_set_enabled(struct device *device,
217 (struct asus_oled_dev *) dev_get_drvdata(device); 217 (struct asus_oled_dev *) dev_get_drvdata(device);
218 unsigned long value; 218 unsigned long value;
219 219
220 if (strict_strtoul(buf, 10, &value)) 220 if (kstrtoul(buf, 10, &value))
221 return -EINVAL; 221 return -EINVAL;
222 222
223 enable_oled(odev, value); 223 enable_oled(odev, value);
diff --git a/drivers/staging/bcm/Bcmchar.c b/drivers/staging/bcm/Bcmchar.c
index 2fa658eb74dc..179707b5e7c7 100644
--- a/drivers/staging/bcm/Bcmchar.c
+++ b/drivers/staging/bcm/Bcmchar.c
@@ -161,6 +161,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
161 INT Status = STATUS_FAILURE; 161 INT Status = STATUS_FAILURE;
162 int timeout = 0; 162 int timeout = 0;
163 IOCTL_BUFFER IoBuffer; 163 IOCTL_BUFFER IoBuffer;
164 int bytes;
164 165
165 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Parameters Passed to control IOCTL cmd=0x%X arg=0x%lX", cmd, arg); 166 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Parameters Passed to control IOCTL cmd=0x%X arg=0x%lX", cmd, arg);
166 167
@@ -230,11 +231,16 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
230 if (!temp_buff) 231 if (!temp_buff)
231 return -ENOMEM; 232 return -ENOMEM;
232 233
233 Status = rdmalt(Adapter, (UINT)sRdmBuffer.Register, 234 bytes = rdmalt(Adapter, (UINT)sRdmBuffer.Register,
234 (PUINT)temp_buff, Bufflen); 235 (PUINT)temp_buff, Bufflen);
235 if (Status == STATUS_SUCCESS) { 236 if (bytes > 0) {
236 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, IoBuffer.OutputLength)) 237 Status = STATUS_SUCCESS;
237 Status = -EFAULT; 238 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, bytes)) {
239 kfree(temp_buff);
240 return -EFAULT;
241 }
242 } else {
243 Status = bytes;
238 } 244 }
239 245
240 kfree(temp_buff); 246 kfree(temp_buff);
@@ -302,7 +308,11 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
302 if (copy_from_user(&sRdmBuffer, IoBuffer.InputBuffer, IoBuffer.InputLength)) 308 if (copy_from_user(&sRdmBuffer, IoBuffer.InputBuffer, IoBuffer.InputLength))
303 return -EFAULT; 309 return -EFAULT;
304 310
305 /* FIXME: don't trust user supplied length */ 311 if (IoBuffer.OutputLength > USHRT_MAX ||
312 IoBuffer.OutputLength == 0) {
313 return -EINVAL;
314 }
315
306 temp_buff = kmalloc(IoBuffer.OutputLength, GFP_KERNEL); 316 temp_buff = kmalloc(IoBuffer.OutputLength, GFP_KERNEL);
307 if (!temp_buff) 317 if (!temp_buff)
308 return STATUS_FAILURE; 318 return STATUS_FAILURE;
@@ -318,11 +328,17 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
318 } 328 }
319 329
320 uiTempVar = sRdmBuffer.Register & EEPROM_REJECT_MASK; 330 uiTempVar = sRdmBuffer.Register & EEPROM_REJECT_MASK;
321 Status = rdmaltWithLock(Adapter, (UINT)sRdmBuffer.Register, (PUINT)temp_buff, IoBuffer.OutputLength); 331 bytes = rdmaltWithLock(Adapter, (UINT)sRdmBuffer.Register, (PUINT)temp_buff, IoBuffer.OutputLength);
322 332
323 if (Status == STATUS_SUCCESS) 333 if (bytes > 0) {
324 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, IoBuffer.OutputLength)) 334 Status = STATUS_SUCCESS;
325 Status = -EFAULT; 335 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, bytes)) {
336 kfree(temp_buff);
337 return -EFAULT;
338 }
339 } else {
340 Status = bytes;
341 }
326 342
327 kfree(temp_buff); 343 kfree(temp_buff);
328 break; 344 break;
@@ -437,12 +453,14 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
437 } 453 }
438 } 454 }
439 455
440 Status = rdmaltWithLock(Adapter, (UINT)GPIO_MODE_REGISTER, (PUINT)ucResetValue, sizeof(UINT)); 456 bytes = rdmaltWithLock(Adapter, (UINT)GPIO_MODE_REGISTER, (PUINT)ucResetValue, sizeof(UINT));
441 457 if (bytes < 0) {
442 if (STATUS_SUCCESS != Status) { 458 Status = bytes;
443 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, 459 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL,
444 "GPIO_MODE_REGISTER read failed"); 460 "GPIO_MODE_REGISTER read failed");
445 break; 461 break;
462 } else {
463 Status = STATUS_SUCCESS;
446 } 464 }
447 465
448 /* Set the gpio mode register to output */ 466 /* Set the gpio mode register to output */
@@ -519,12 +537,15 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
519 uiBit = gpio_info.uiGpioNumber; 537 uiBit = gpio_info.uiGpioNumber;
520 538
521 /* Set the gpio output register */ 539 /* Set the gpio output register */
522 Status = rdmaltWithLock(Adapter, (UINT)GPIO_PIN_STATE_REGISTER, 540 bytes = rdmaltWithLock(Adapter, (UINT)GPIO_PIN_STATE_REGISTER,
523 (PUINT)ucRead, sizeof(UINT)); 541 (PUINT)ucRead, sizeof(UINT));
524 542
525 if (Status != STATUS_SUCCESS) { 543 if (bytes < 0) {
544 Status = bytes;
526 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "RDM Failed\n"); 545 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "RDM Failed\n");
527 return Status; 546 return Status;
547 } else {
548 Status = STATUS_SUCCESS;
528 } 549 }
529 } 550 }
530 break; 551 break;
@@ -590,11 +611,14 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
590 } 611 }
591 612
592 if (pgpio_multi_info[WIMAX_IDX].uiGPIOMask) { 613 if (pgpio_multi_info[WIMAX_IDX].uiGPIOMask) {
593 Status = rdmaltWithLock(Adapter, (UINT)GPIO_PIN_STATE_REGISTER, (PUINT)ucResetValue, sizeof(UINT)); 614 bytes = rdmaltWithLock(Adapter, (UINT)GPIO_PIN_STATE_REGISTER, (PUINT)ucResetValue, sizeof(UINT));
594 615
595 if (Status != STATUS_SUCCESS) { 616 if (bytes < 0) {
617 Status = bytes;
596 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "RDM to GPIO_PIN_STATE_REGISTER Failed."); 618 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "RDM to GPIO_PIN_STATE_REGISTER Failed.");
597 return Status; 619 return Status;
620 } else {
621 Status = STATUS_SUCCESS;
598 } 622 }
599 623
600 pgpio_multi_info[WIMAX_IDX].uiGPIOValue = (*(UINT *)ucResetValue & 624 pgpio_multi_info[WIMAX_IDX].uiGPIOValue = (*(UINT *)ucResetValue &
@@ -605,7 +629,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
605 if (Status) { 629 if (Status) {
606 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 630 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
607 "Failed while copying Content to IOBufer for user space err:%d", Status); 631 "Failed while copying Content to IOBufer for user space err:%d", Status);
608 break; 632 return -EFAULT;
609 } 633 }
610 } 634 }
611 break; 635 break;
@@ -629,11 +653,14 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
629 if (copy_from_user(&gpio_multi_mode, IoBuffer.InputBuffer, IoBuffer.InputLength)) 653 if (copy_from_user(&gpio_multi_mode, IoBuffer.InputBuffer, IoBuffer.InputLength))
630 return -EFAULT; 654 return -EFAULT;
631 655
632 Status = rdmaltWithLock(Adapter, (UINT)GPIO_MODE_REGISTER, (PUINT)ucResetValue, sizeof(UINT)); 656 bytes = rdmaltWithLock(Adapter, (UINT)GPIO_MODE_REGISTER, (PUINT)ucResetValue, sizeof(UINT));
633 657
634 if (STATUS_SUCCESS != Status) { 658 if (bytes < 0) {
659 Status = bytes;
635 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Read of GPIO_MODE_REGISTER failed"); 660 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Read of GPIO_MODE_REGISTER failed");
636 return Status; 661 return Status;
662 } else {
663 Status = STATUS_SUCCESS;
637 } 664 }
638 665
639 /* Validating the request */ 666 /* Validating the request */
@@ -678,7 +705,7 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
678 if (Status) { 705 if (Status) {
679 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 706 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
680 "Failed while copying Content to IOBufer for user space err:%d", Status); 707 "Failed while copying Content to IOBufer for user space err:%d", Status);
681 break; 708 return -EFAULT;
682 } 709 }
683 } 710 }
684 break; 711 break;
@@ -706,9 +733,8 @@ static long bcm_char_ioctl(struct file *filp, UINT cmd, ULONG arg)
706 return -ENOMEM; 733 return -ENOMEM;
707 734
708 if (copy_from_user(pvBuffer, IoBuffer.InputBuffer, IoBuffer.InputLength)) { 735 if (copy_from_user(pvBuffer, IoBuffer.InputBuffer, IoBuffer.InputLength)) {
709 Status = -EFAULT;
710 kfree(pvBuffer); 736 kfree(pvBuffer);
711 break; 737 return -EFAULT;
712 } 738 }
713 739
714 down(&Adapter->LowPowerModeSync); 740 down(&Adapter->LowPowerModeSync);
@@ -733,8 +759,7 @@ cntrlEnd:
733 } 759 }
734 760
735 case IOCTL_BCM_BUFFER_DOWNLOAD_START: { 761 case IOCTL_BCM_BUFFER_DOWNLOAD_START: {
736 INT NVMAccess = down_trylock(&Adapter->NVMRdmWrmLock); 762 if (down_trylock(&Adapter->NVMRdmWrmLock)) {
737 if (NVMAccess) {
738 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, 763 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL,
739 "IOCTL_BCM_CHIP_RESET not allowed as EEPROM Read/Write is in progress\n"); 764 "IOCTL_BCM_CHIP_RESET not allowed as EEPROM Read/Write is in progress\n");
740 return -EACCES; 765 return -EACCES;
@@ -743,157 +768,162 @@ cntrlEnd:
743 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 768 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
744 "Starting the firmware download PID =0x%x!!!!\n", current->pid); 769 "Starting the firmware download PID =0x%x!!!!\n", current->pid);
745 770
746 if (!down_trylock(&Adapter->fw_download_sema)) { 771 if (down_trylock(&Adapter->fw_download_sema))
747 Adapter->bBinDownloaded = FALSE; 772 return -EBUSY;
748 Adapter->fw_download_process_pid = current->pid; 773
749 Adapter->bCfgDownloaded = FALSE; 774 Adapter->bBinDownloaded = FALSE;
750 Adapter->fw_download_done = FALSE; 775 Adapter->fw_download_process_pid = current->pid;
751 netif_carrier_off(Adapter->dev); 776 Adapter->bCfgDownloaded = FALSE;
752 netif_stop_queue(Adapter->dev); 777 Adapter->fw_download_done = FALSE;
753 Status = reset_card_proc(Adapter); 778 netif_carrier_off(Adapter->dev);
754 if (Status) { 779 netif_stop_queue(Adapter->dev);
755 pr_err(PFX "%s: reset_card_proc Failed!\n", Adapter->dev->name); 780 Status = reset_card_proc(Adapter);
756 up(&Adapter->fw_download_sema); 781 if (Status) {
757 up(&Adapter->NVMRdmWrmLock); 782 pr_err(PFX "%s: reset_card_proc Failed!\n", Adapter->dev->name);
758 break; 783 up(&Adapter->fw_download_sema);
759 } 784 up(&Adapter->NVMRdmWrmLock);
760 mdelay(10); 785 return Status;
761 } else {
762 Status = -EBUSY;
763 } 786 }
787 mdelay(10);
764 788
765 up(&Adapter->NVMRdmWrmLock); 789 up(&Adapter->NVMRdmWrmLock);
766 break; 790 return Status;
767 } 791 }
768 792
769 case IOCTL_BCM_BUFFER_DOWNLOAD: { 793 case IOCTL_BCM_BUFFER_DOWNLOAD: {
770 FIRMWARE_INFO *psFwInfo = NULL; 794 FIRMWARE_INFO *psFwInfo = NULL;
771 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Starting the firmware download PID =0x%x!!!!\n", current->pid); 795 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Starting the firmware download PID =0x%x!!!!\n", current->pid);
772 do {
773 if (!down_trylock(&Adapter->fw_download_sema)) {
774 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
775 "Invalid way to download buffer. Use Start and then call this!!!\n");
776 Status = -EINVAL;
777 break;
778 }
779
780 /* Copy Ioctl Buffer structure */
781 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)))
782 return -EFAULT;
783 796
797 if (!down_trylock(&Adapter->fw_download_sema)) {
784 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 798 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
785 "Length for FW DLD is : %lx\n", IoBuffer.InputLength); 799 "Invalid way to download buffer. Use Start and then call this!!!\n");
800 up(&Adapter->fw_download_sema);
801 Status = -EINVAL;
802 return Status;
803 }
786 804
787 if (IoBuffer.InputLength > sizeof(FIRMWARE_INFO)) 805 /* Copy Ioctl Buffer structure */
788 return -EINVAL; 806 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) {
807 up(&Adapter->fw_download_sema);
808 return -EFAULT;
809 }
789 810
790 psFwInfo = kmalloc(sizeof(*psFwInfo), GFP_KERNEL); 811 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
791 if (!psFwInfo) 812 "Length for FW DLD is : %lx\n", IoBuffer.InputLength);
792 return -ENOMEM;
793 813
794 if (copy_from_user(psFwInfo, IoBuffer.InputBuffer, IoBuffer.InputLength)) 814 if (IoBuffer.InputLength > sizeof(FIRMWARE_INFO)) {
795 return -EFAULT; 815 up(&Adapter->fw_download_sema);
816 return -EINVAL;
817 }
796 818
797 if (!psFwInfo->pvMappedFirmwareAddress || 819 psFwInfo = kmalloc(sizeof(*psFwInfo), GFP_KERNEL);
798 (psFwInfo->u32FirmwareLength == 0)) { 820 if (!psFwInfo) {
821 up(&Adapter->fw_download_sema);
822 return -ENOMEM;
823 }
799 824
800 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Something else is wrong %lu\n", 825 if (copy_from_user(psFwInfo, IoBuffer.InputBuffer, IoBuffer.InputLength)) {
801 psFwInfo->u32FirmwareLength); 826 up(&Adapter->fw_download_sema);
802 Status = -EINVAL; 827 return -EFAULT;
803 break; 828 }
804 }
805 829
806 Status = bcm_ioctl_fw_download(Adapter, psFwInfo); 830 if (!psFwInfo->pvMappedFirmwareAddress ||
831 (psFwInfo->u32FirmwareLength == 0)) {
807 832
808 if (Status != STATUS_SUCCESS) { 833 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Something else is wrong %lu\n",
809 if (psFwInfo->u32StartingAddress == CONFIG_BEGIN_ADDR) 834 psFwInfo->u32FirmwareLength);
810 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "IOCTL: Configuration File Upload Failed\n"); 835 up(&Adapter->fw_download_sema);
811 else 836 Status = -EINVAL;
812 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "IOCTL: Firmware File Upload Failed\n"); 837 return Status;
838 }
813 839
814 /* up(&Adapter->fw_download_sema); */ 840 Status = bcm_ioctl_fw_download(Adapter, psFwInfo);
815 841
816 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) { 842 if (Status != STATUS_SUCCESS) {
817 Adapter->DriverState = DRIVER_INIT; 843 if (psFwInfo->u32StartingAddress == CONFIG_BEGIN_ADDR)
818 Adapter->LEDInfo.bLedInitDone = FALSE; 844 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "IOCTL: Configuration File Upload Failed\n");
819 wake_up(&Adapter->LEDInfo.notify_led_event); 845 else
820 } 846 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "IOCTL: Firmware File Upload Failed\n");
821 } 847
822 break; 848 /* up(&Adapter->fw_download_sema); */
823 849
824 } while (0); 850 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) {
851 Adapter->DriverState = DRIVER_INIT;
852 Adapter->LEDInfo.bLedInitDone = FALSE;
853 wake_up(&Adapter->LEDInfo.notify_led_event);
854 }
855 }
825 856
826 if (Status != STATUS_SUCCESS) 857 if (Status != STATUS_SUCCESS)
827 up(&Adapter->fw_download_sema); 858 up(&Adapter->fw_download_sema);
828 859
829 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, OSAL_DBG, DBG_LVL_ALL, "IOCTL: Firmware File Uploaded\n"); 860 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, OSAL_DBG, DBG_LVL_ALL, "IOCTL: Firmware File Uploaded\n");
830 kfree(psFwInfo); 861 kfree(psFwInfo);
831 break; 862 return Status;
832 } 863 }
833 864
834 case IOCTL_BCM_BUFFER_DOWNLOAD_STOP: { 865 case IOCTL_BCM_BUFFER_DOWNLOAD_STOP: {
835 INT NVMAccess = down_trylock(&Adapter->NVMRdmWrmLock); 866 if (!down_trylock(&Adapter->fw_download_sema)) {
867 up(&Adapter->fw_download_sema);
868 return -EINVAL;
869 }
836 870
837 if (NVMAccess) { 871 if (down_trylock(&Adapter->NVMRdmWrmLock)) {
838 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, 872 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
839 "FW download blocked as EEPROM Read/Write is in progress\n"); 873 "FW download blocked as EEPROM Read/Write is in progress\n");
840 up(&Adapter->fw_download_sema); 874 up(&Adapter->fw_download_sema);
841 return -EACCES; 875 return -EACCES;
842 } 876 }
843 877
844 if (down_trylock(&Adapter->fw_download_sema)) { 878 Adapter->bBinDownloaded = TRUE;
845 Adapter->bBinDownloaded = TRUE; 879 Adapter->bCfgDownloaded = TRUE;
846 Adapter->bCfgDownloaded = TRUE; 880 atomic_set(&Adapter->CurrNumFreeTxDesc, 0);
847 atomic_set(&Adapter->CurrNumFreeTxDesc, 0); 881 Adapter->CurrNumRecvDescs = 0;
848 Adapter->CurrNumRecvDescs = 0; 882 Adapter->downloadDDR = 0;
849 Adapter->downloadDDR = 0;
850
851 /* setting the Mips to Run */
852 Status = run_card_proc(Adapter);
853 883
854 if (Status) { 884 /* setting the Mips to Run */
855 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Firm Download Failed\n"); 885 Status = run_card_proc(Adapter);
856 up(&Adapter->fw_download_sema);
857 up(&Adapter->NVMRdmWrmLock);
858 break;
859 } else {
860 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG,
861 DBG_LVL_ALL, "Firm Download Over...\n");
862 }
863
864 mdelay(10);
865
866 /* Wait for MailBox Interrupt */
867 if (StartInterruptUrb((PS_INTERFACE_ADAPTER)Adapter->pvInterfaceAdapter))
868 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Unable to send interrupt...\n");
869
870 timeout = 5*HZ;
871 Adapter->waiting_to_fw_download_done = FALSE;
872 wait_event_timeout(Adapter->ioctl_fw_dnld_wait_queue,
873 Adapter->waiting_to_fw_download_done, timeout);
874 Adapter->fw_download_process_pid = INVALID_PID;
875 Adapter->fw_download_done = TRUE;
876 atomic_set(&Adapter->CurrNumFreeTxDesc, 0);
877 Adapter->CurrNumRecvDescs = 0;
878 Adapter->PrevNumRecvDescs = 0;
879 atomic_set(&Adapter->cntrlpktCnt, 0);
880 Adapter->LinkUpStatus = 0;
881 Adapter->LinkStatus = 0;
882 886
883 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) { 887 if (Status) {
884 Adapter->DriverState = FW_DOWNLOAD_DONE; 888 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Firm Download Failed\n");
885 wake_up(&Adapter->LEDInfo.notify_led_event); 889 up(&Adapter->fw_download_sema);
886 } 890 up(&Adapter->NVMRdmWrmLock);
887 891 return Status;
888 if (!timeout)
889 Status = -ENODEV;
890 } else { 892 } else {
891 Status = -EINVAL; 893 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG,
894 DBG_LVL_ALL, "Firm Download Over...\n");
895 }
896
897 mdelay(10);
898
899 /* Wait for MailBox Interrupt */
900 if (StartInterruptUrb((PS_INTERFACE_ADAPTER)Adapter->pvInterfaceAdapter))
901 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Unable to send interrupt...\n");
902
903 timeout = 5*HZ;
904 Adapter->waiting_to_fw_download_done = FALSE;
905 wait_event_timeout(Adapter->ioctl_fw_dnld_wait_queue,
906 Adapter->waiting_to_fw_download_done, timeout);
907 Adapter->fw_download_process_pid = INVALID_PID;
908 Adapter->fw_download_done = TRUE;
909 atomic_set(&Adapter->CurrNumFreeTxDesc, 0);
910 Adapter->CurrNumRecvDescs = 0;
911 Adapter->PrevNumRecvDescs = 0;
912 atomic_set(&Adapter->cntrlpktCnt, 0);
913 Adapter->LinkUpStatus = 0;
914 Adapter->LinkStatus = 0;
915
916 if (Adapter->LEDInfo.led_thread_running & BCM_LED_THREAD_RUNNING_ACTIVELY) {
917 Adapter->DriverState = FW_DOWNLOAD_DONE;
918 wake_up(&Adapter->LEDInfo.notify_led_event);
892 } 919 }
893 920
921 if (!timeout)
922 Status = -ENODEV;
923
894 up(&Adapter->fw_download_sema); 924 up(&Adapter->fw_download_sema);
895 up(&Adapter->NVMRdmWrmLock); 925 up(&Adapter->NVMRdmWrmLock);
896 break; 926 return Status;
897 } 927 }
898 928
899 case IOCTL_BE_BUCKET_SIZE: 929 case IOCTL_BE_BUCKET_SIZE:
@@ -969,11 +999,15 @@ cntrlEnd:
969 } 999 }
970 1000
971 case IOCTL_BCM_GET_DRIVER_VERSION: { 1001 case IOCTL_BCM_GET_DRIVER_VERSION: {
1002 ulong len;
1003
972 /* Copy Ioctl Buffer structure */ 1004 /* Copy Ioctl Buffer structure */
973 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1005 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)))
974 return -EFAULT; 1006 return -EFAULT;
975 1007
976 if (copy_to_user(IoBuffer.OutputBuffer, VER_FILEVERSION_STR, IoBuffer.OutputLength)) 1008 len = min_t(ulong, IoBuffer.OutputLength, strlen(VER_FILEVERSION_STR) + 1);
1009
1010 if (copy_to_user(IoBuffer.OutputBuffer, VER_FILEVERSION_STR, len))
977 return -EFAULT; 1011 return -EFAULT;
978 Status = STATUS_SUCCESS; 1012 Status = STATUS_SUCCESS;
979 break; 1013 break;
@@ -985,8 +1019,7 @@ cntrlEnd:
985 /* Copy Ioctl Buffer structure */ 1019 /* Copy Ioctl Buffer structure */
986 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) { 1020 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) {
987 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user failed..\n"); 1021 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user failed..\n");
988 Status = -EFAULT; 1022 return -EFAULT;
989 break;
990 } 1023 }
991 1024
992 if (IoBuffer.OutputLength != sizeof(link_state)) { 1025 if (IoBuffer.OutputLength != sizeof(link_state)) {
@@ -1001,8 +1034,7 @@ cntrlEnd:
1001 1034
1002 if (copy_to_user(IoBuffer.OutputBuffer, &link_state, min_t(size_t, sizeof(link_state), IoBuffer.OutputLength))) { 1035 if (copy_to_user(IoBuffer.OutputBuffer, &link_state, min_t(size_t, sizeof(link_state), IoBuffer.OutputLength))) {
1003 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy_to_user Failed..\n"); 1036 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy_to_user Failed..\n");
1004 Status = -EFAULT; 1037 return -EFAULT;
1005 break;
1006 } 1038 }
1007 Status = STATUS_SUCCESS; 1039 Status = STATUS_SUCCESS;
1008 break; 1040 break;
@@ -1068,8 +1100,10 @@ cntrlEnd:
1068 GetDroppedAppCntrlPktMibs(temp_buff, pTarang); 1100 GetDroppedAppCntrlPktMibs(temp_buff, pTarang);
1069 1101
1070 if (Status != STATUS_FAILURE) 1102 if (Status != STATUS_FAILURE)
1071 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, sizeof(S_MIBS_HOST_STATS_MIBS))) 1103 if (copy_to_user(IoBuffer.OutputBuffer, temp_buff, sizeof(S_MIBS_HOST_STATS_MIBS))) {
1072 Status = -EFAULT; 1104 kfree(temp_buff);
1105 return -EFAULT;
1106 }
1073 1107
1074 kfree(temp_buff); 1108 kfree(temp_buff);
1075 break; 1109 break;
@@ -1103,7 +1137,9 @@ cntrlEnd:
1103 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) 1137 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)))
1104 return -EFAULT; 1138 return -EFAULT;
1105 1139
1106 /* FIXME: restrict length */ 1140 if (IoBuffer.InputLength < sizeof(ULONG) * 2)
1141 return -EINVAL;
1142
1107 pvBuffer = kmalloc(IoBuffer.InputLength, GFP_KERNEL); 1143 pvBuffer = kmalloc(IoBuffer.InputLength, GFP_KERNEL);
1108 if (!pvBuffer) 1144 if (!pvBuffer)
1109 return -ENOMEM; 1145 return -ENOMEM;
@@ -1111,8 +1147,7 @@ cntrlEnd:
1111 /* Get WrmBuffer structure */ 1147 /* Get WrmBuffer structure */
1112 if (copy_from_user(pvBuffer, IoBuffer.InputBuffer, IoBuffer.InputLength)) { 1148 if (copy_from_user(pvBuffer, IoBuffer.InputBuffer, IoBuffer.InputLength)) {
1113 kfree(pvBuffer); 1149 kfree(pvBuffer);
1114 Status = -EFAULT; 1150 return -EFAULT;
1115 break;
1116 } 1151 }
1117 1152
1118 pBulkBuffer = (PBULKWRM_BUFFER)pvBuffer; 1153 pBulkBuffer = (PBULKWRM_BUFFER)pvBuffer;
@@ -1242,8 +1277,7 @@ cntrlEnd:
1242 memset(&tv1, 0, sizeof(struct timeval)); 1277 memset(&tv1, 0, sizeof(struct timeval));
1243 if ((Adapter->eNVMType == NVM_FLASH) && (Adapter->uiFlashLayoutMajorVersion == 0)) { 1278 if ((Adapter->eNVMType == NVM_FLASH) && (Adapter->uiFlashLayoutMajorVersion == 0)) {
1244 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "The Flash Control Section is Corrupted. Hence Rejection on NVM Read/Write\n"); 1279 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "The Flash Control Section is Corrupted. Hence Rejection on NVM Read/Write\n");
1245 Status = -EFAULT; 1280 return -EFAULT;
1246 break;
1247 } 1281 }
1248 1282
1249 if (IsFlash2x(Adapter)) { 1283 if (IsFlash2x(Adapter)) {
@@ -1252,7 +1286,7 @@ cntrlEnd:
1252 (Adapter->eActiveDSD != DSD2)) { 1286 (Adapter->eActiveDSD != DSD2)) {
1253 1287
1254 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "No DSD is active..hence NVM Command is blocked"); 1288 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "No DSD is active..hence NVM Command is blocked");
1255 return STATUS_FAILURE ; 1289 return STATUS_FAILURE;
1256 } 1290 }
1257 } 1291 }
1258 1292
@@ -1271,8 +1305,7 @@ cntrlEnd:
1271 1305
1272 if ((stNVMReadWrite.uiOffset + stNVMReadWrite.uiNumBytes) > Adapter->uiNVMDSDSize) { 1306 if ((stNVMReadWrite.uiOffset + stNVMReadWrite.uiNumBytes) > Adapter->uiNVMDSDSize) {
1273 /* BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Can't allow access beyond NVM Size: 0x%x 0x%x\n", stNVMReadWrite.uiOffset, stNVMReadWrite.uiNumBytes); */ 1307 /* BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Can't allow access beyond NVM Size: 0x%x 0x%x\n", stNVMReadWrite.uiOffset, stNVMReadWrite.uiNumBytes); */
1274 Status = STATUS_FAILURE; 1308 return STATUS_FAILURE;
1275 break;
1276 } 1309 }
1277 1310
1278 pReadData = kzalloc(stNVMReadWrite.uiNumBytes, GFP_KERNEL); 1311 pReadData = kzalloc(stNVMReadWrite.uiNumBytes, GFP_KERNEL);
@@ -1280,9 +1313,8 @@ cntrlEnd:
1280 return -ENOMEM; 1313 return -ENOMEM;
1281 1314
1282 if (copy_from_user(pReadData, stNVMReadWrite.pBuffer, stNVMReadWrite.uiNumBytes)) { 1315 if (copy_from_user(pReadData, stNVMReadWrite.pBuffer, stNVMReadWrite.uiNumBytes)) {
1283 Status = -EFAULT;
1284 kfree(pReadData); 1316 kfree(pReadData);
1285 break; 1317 return -EFAULT;
1286 } 1318 }
1287 1319
1288 do_gettimeofday(&tv0); 1320 do_gettimeofday(&tv0);
@@ -1309,7 +1341,7 @@ cntrlEnd:
1309 1341
1310 if (copy_to_user(stNVMReadWrite.pBuffer, pReadData, stNVMReadWrite.uiNumBytes)) { 1342 if (copy_to_user(stNVMReadWrite.pBuffer, pReadData, stNVMReadWrite.uiNumBytes)) {
1311 kfree(pReadData); 1343 kfree(pReadData);
1312 Status = -EFAULT; 1344 return -EFAULT;
1313 } 1345 }
1314 } else { 1346 } else {
1315 down(&Adapter->NVMRdmWrmLock); 1347 down(&Adapter->NVMRdmWrmLock);
@@ -1377,9 +1409,8 @@ cntrlEnd:
1377 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, " timetaken by Write/read :%ld msec\n", (tv1.tv_sec - tv0.tv_sec)*1000 + (tv1.tv_usec - tv0.tv_usec)/1000); 1409 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, " timetaken by Write/read :%ld msec\n", (tv1.tv_sec - tv0.tv_sec)*1000 + (tv1.tv_usec - tv0.tv_usec)/1000);
1378 1410
1379 kfree(pReadData); 1411 kfree(pReadData);
1380 Status = STATUS_SUCCESS; 1412 return STATUS_SUCCESS;
1381 } 1413 }
1382 break;
1383 1414
1384 case IOCTL_BCM_FLASH2X_SECTION_READ: { 1415 case IOCTL_BCM_FLASH2X_SECTION_READ: {
1385 FLASH2X_READWRITE sFlash2xRead = {0}; 1416 FLASH2X_READWRITE sFlash2xRead = {0};
@@ -1456,7 +1487,9 @@ cntrlEnd:
1456 Status = copy_to_user(OutPutBuff, pReadBuff, ReadBytes); 1487 Status = copy_to_user(OutPutBuff, pReadBuff, ReadBytes);
1457 if (Status) { 1488 if (Status) {
1458 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Copy to use failed with status :%d", Status); 1489 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Copy to use failed with status :%d", Status);
1459 break; 1490 up(&Adapter->NVMRdmWrmLock);
1491 kfree(pReadBuff);
1492 return -EFAULT;
1460 } 1493 }
1461 NOB = NOB - ReadBytes; 1494 NOB = NOB - ReadBytes;
1462 if (NOB) { 1495 if (NOB) {
@@ -1548,7 +1581,9 @@ cntrlEnd:
1548 Status = copy_from_user(pWriteBuff, InputAddr, WriteBytes); 1581 Status = copy_from_user(pWriteBuff, InputAddr, WriteBytes);
1549 if (Status) { 1582 if (Status) {
1550 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy to user failed with status :%d", Status); 1583 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy to user failed with status :%d", Status);
1551 break; 1584 up(&Adapter->NVMRdmWrmLock);
1585 kfree(pWriteBuff);
1586 return -EFAULT;
1552 } 1587 }
1553 BCM_DEBUG_PRINT_BUFFER(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, pWriteBuff, WriteBytes); 1588 BCM_DEBUG_PRINT_BUFFER(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, pWriteBuff, WriteBytes);
1554 1589
@@ -1608,8 +1643,10 @@ cntrlEnd:
1608 1643
1609 BcmGetFlash2xSectionalBitMap(Adapter, psFlash2xBitMap); 1644 BcmGetFlash2xSectionalBitMap(Adapter, psFlash2xBitMap);
1610 up(&Adapter->NVMRdmWrmLock); 1645 up(&Adapter->NVMRdmWrmLock);
1611 if (copy_to_user(IoBuffer.OutputBuffer, psFlash2xBitMap, sizeof(FLASH2X_BITMAP))) 1646 if (copy_to_user(IoBuffer.OutputBuffer, psFlash2xBitMap, sizeof(FLASH2X_BITMAP))) {
1612 Status = -EFAULT; 1647 kfree(psFlash2xBitMap);
1648 return -EFAULT;
1649 }
1613 1650
1614 kfree(psFlash2xBitMap); 1651 kfree(psFlash2xBitMap);
1615 } 1652 }
@@ -1627,13 +1664,13 @@ cntrlEnd:
1627 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1664 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER));
1628 if (Status) { 1665 if (Status) {
1629 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed"); 1666 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed");
1630 return Status; 1667 return -EFAULT;
1631 } 1668 }
1632 1669
1633 Status = copy_from_user(&eFlash2xSectionVal, IoBuffer.InputBuffer, sizeof(INT)); 1670 Status = copy_from_user(&eFlash2xSectionVal, IoBuffer.InputBuffer, sizeof(INT));
1634 if (Status) { 1671 if (Status) {
1635 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of flash section val failed"); 1672 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of flash section val failed");
1636 return Status; 1673 return -EFAULT;
1637 } 1674 }
1638 1675
1639 down(&Adapter->NVMRdmWrmLock); 1676 down(&Adapter->NVMRdmWrmLock);
@@ -1677,13 +1714,13 @@ cntrlEnd:
1677 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1714 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER));
1678 if (Status) { 1715 if (Status) {
1679 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed Status :%d", Status); 1716 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed Status :%d", Status);
1680 return Status; 1717 return -EFAULT;
1681 } 1718 }
1682 1719
1683 Status = copy_from_user(&sCopySectStrut, IoBuffer.InputBuffer, sizeof(FLASH2X_COPY_SECTION)); 1720 Status = copy_from_user(&sCopySectStrut, IoBuffer.InputBuffer, sizeof(FLASH2X_COPY_SECTION));
1684 if (Status) { 1721 if (Status) {
1685 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of Copy_Section_Struct failed with Status :%d", Status); 1722 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of Copy_Section_Struct failed with Status :%d", Status);
1686 return Status; 1723 return -EFAULT;
1687 } 1724 }
1688 1725
1689 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Source SEction :%x", sCopySectStrut.SrcSection); 1726 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Source SEction :%x", sCopySectStrut.SrcSection);
@@ -1744,7 +1781,7 @@ cntrlEnd:
1744 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1781 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER));
1745 if (Status) { 1782 if (Status) {
1746 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed"); 1783 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed");
1747 break; 1784 return -EFAULT;
1748 } 1785 }
1749 1786
1750 if (Adapter->eNVMType != NVM_FLASH) { 1787 if (Adapter->eNVMType != NVM_FLASH) {
@@ -1783,12 +1820,12 @@ cntrlEnd:
1783 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1820 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER));
1784 if (Status) { 1821 if (Status) {
1785 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed"); 1822 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of IOCTL BUFFER failed");
1786 return Status; 1823 return -EFAULT;
1787 } 1824 }
1788 Status = copy_from_user(&eFlash2xSectionVal, IoBuffer.InputBuffer, sizeof(INT)); 1825 Status = copy_from_user(&eFlash2xSectionVal, IoBuffer.InputBuffer, sizeof(INT));
1789 if (Status) { 1826 if (Status) {
1790 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of flash section val failed"); 1827 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy of flash section val failed");
1791 return Status; 1828 return -EFAULT;
1792 } 1829 }
1793 1830
1794 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Read Section :%d", eFlash2xSectionVal); 1831 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Read Section :%d", eFlash2xSectionVal);
@@ -1830,8 +1867,7 @@ cntrlEnd:
1830 /* Copy Ioctl Buffer structure */ 1867 /* Copy Ioctl Buffer structure */
1831 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) { 1868 if (copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER))) {
1832 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user 1 failed\n"); 1869 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "copy_from_user 1 failed\n");
1833 Status = -EFAULT; 1870 return -EFAULT;
1834 break;
1835 } 1871 }
1836 1872
1837 if (copy_from_user(&stNVMRead, IoBuffer.OutputBuffer, sizeof(NVM_READWRITE))) 1873 if (copy_from_user(&stNVMRead, IoBuffer.OutputBuffer, sizeof(NVM_READWRITE)))
@@ -1886,7 +1922,9 @@ cntrlEnd:
1886 Status = copy_to_user(OutPutBuff, pReadBuff, ReadBytes); 1922 Status = copy_to_user(OutPutBuff, pReadBuff, ReadBytes);
1887 if (Status) { 1923 if (Status) {
1888 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy to use failed with status :%d", Status); 1924 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Copy to use failed with status :%d", Status);
1889 break; 1925 up(&Adapter->NVMRdmWrmLock);
1926 kfree(pReadBuff);
1927 return -EFAULT;
1890 } 1928 }
1891 NOB = NOB - ReadBytes; 1929 NOB = NOB - ReadBytes;
1892 if (NOB) { 1930 if (NOB) {
@@ -1907,8 +1945,7 @@ cntrlEnd:
1907 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER)); 1945 Status = copy_from_user(&IoBuffer, argp, sizeof(IOCTL_BUFFER));
1908 if (Status) { 1946 if (Status) {
1909 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "copy of Ioctl buffer is failed from user space"); 1947 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "copy of Ioctl buffer is failed from user space");
1910 Status = -EFAULT; 1948 return -EFAULT;
1911 break;
1912 } 1949 }
1913 1950
1914 if (IoBuffer.InputLength != sizeof(unsigned long)) { 1951 if (IoBuffer.InputLength != sizeof(unsigned long)) {
@@ -1919,8 +1956,7 @@ cntrlEnd:
1919 Status = copy_from_user(&RxCntrlMsgBitMask, IoBuffer.InputBuffer, IoBuffer.InputLength); 1956 Status = copy_from_user(&RxCntrlMsgBitMask, IoBuffer.InputBuffer, IoBuffer.InputLength);
1920 if (Status) { 1957 if (Status) {
1921 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "copy of control bit mask failed from user space"); 1958 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "copy of control bit mask failed from user space");
1922 Status = -EFAULT; 1959 return -EFAULT;
1923 break;
1924 } 1960 }
1925 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "\n Got user defined cntrl msg bit mask :%lx", RxCntrlMsgBitMask); 1961 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "\n Got user defined cntrl msg bit mask :%lx", RxCntrlMsgBitMask);
1926 pTarang->RxCntrlMsgBitMask = RxCntrlMsgBitMask; 1962 pTarang->RxCntrlMsgBitMask = RxCntrlMsgBitMask;
diff --git a/drivers/staging/bcm/HandleControlPacket.c b/drivers/staging/bcm/HandleControlPacket.c
index 2b1e9e17e11c..b058e30b2ca6 100644
--- a/drivers/staging/bcm/HandleControlPacket.c
+++ b/drivers/staging/bcm/HandleControlPacket.c
@@ -1,195 +1,208 @@
1/** 1/**
2@file HandleControlPacket.c 2 * @file HandleControlPacket.c
3This file contains the routines to deal with 3 * This file contains the routines to deal with
4sending and receiving of control packets. 4 * sending and receiving of control packets.
5*/ 5 */
6#include "headers.h" 6#include "headers.h"
7 7
8/** 8/**
9When a control packet is received, analyze the 9 * When a control packet is received, analyze the
10"status" and call appropriate response function. 10 * "status" and call appropriate response function.
11Enqueue the control packet for Application. 11 * Enqueue the control packet for Application.
12@return None 12 * @return None
13*/ 13 */
14static VOID handle_rx_control_packet(PMINI_ADAPTER Adapter, struct sk_buff *skb) 14static VOID handle_rx_control_packet(PMINI_ADAPTER Adapter, struct sk_buff *skb)
15{ 15{
16 PPER_TARANG_DATA pTarang = NULL; 16 PPER_TARANG_DATA pTarang = NULL;
17 BOOLEAN HighPriorityMessage = FALSE; 17 BOOLEAN HighPriorityMessage = FALSE;
18 struct sk_buff * newPacket = NULL; 18 struct sk_buff *newPacket = NULL;
19 CHAR cntrl_msg_mask_bit = 0; 19 CHAR cntrl_msg_mask_bit = 0;
20 BOOLEAN drop_pkt_flag = TRUE ; 20 BOOLEAN drop_pkt_flag = TRUE;
21 USHORT usStatus = *(PUSHORT)(skb->data); 21 USHORT usStatus = *(PUSHORT)(skb->data);
22 22
23 if (netif_msg_pktdata(Adapter)) 23 if (netif_msg_pktdata(Adapter))
24 print_hex_dump(KERN_DEBUG, PFX "rx control: ", DUMP_PREFIX_NONE, 24 print_hex_dump(KERN_DEBUG, PFX "rx control: ", DUMP_PREFIX_NONE,
25 16, 1, skb->data, skb->len, 0); 25 16, 1, skb->data, skb->len, 0);
26 26
27 switch(usStatus) 27 switch (usStatus) {
28 { 28 case CM_RESPONSES: /* 0xA0 */
29 case CM_RESPONSES: // 0xA0 29 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT,
30 BCM_DEBUG_PRINT( Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL, "MAC Version Seems to be Non Multi-Classifier, rejected by Driver"); 30 DBG_LVL_ALL,
31 HighPriorityMessage = TRUE ; 31 "MAC Version Seems to be Non Multi-Classifier, rejected by Driver");
32 break; 32 HighPriorityMessage = TRUE;
33 case CM_CONTROL_NEWDSX_MULTICLASSIFIER_RESP: 33 break;
34 HighPriorityMessage = TRUE ; 34 case CM_CONTROL_NEWDSX_MULTICLASSIFIER_RESP:
35 if(Adapter->LinkStatus==LINKUP_DONE) 35 HighPriorityMessage = TRUE;
36 { 36 if (Adapter->LinkStatus == LINKUP_DONE)
37 CmControlResponseMessage(Adapter,(skb->data +sizeof(USHORT))); 37 CmControlResponseMessage(Adapter,
38 } 38 (skb->data + sizeof(USHORT)));
39 break; 39 break;
40 case LINK_CONTROL_RESP: //0xA2 40 case LINK_CONTROL_RESP: /* 0xA2 */
41 case STATUS_RSP: //0xA1 41 case STATUS_RSP: /* 0xA1 */
42 BCM_DEBUG_PRINT( Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL,"LINK_CONTROL_RESP"); 42 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT,
43 HighPriorityMessage = TRUE ; 43 DBG_LVL_ALL, "LINK_CONTROL_RESP");
44 LinkControlResponseMessage(Adapter,(skb->data + sizeof(USHORT))); 44 HighPriorityMessage = TRUE;
45 break; 45 LinkControlResponseMessage(Adapter,
46 case STATS_POINTER_RESP: //0xA6 46 (skb->data + sizeof(USHORT)));
47 HighPriorityMessage = TRUE ; 47 break;
48 StatisticsResponse(Adapter, (skb->data + sizeof(USHORT))); 48 case STATS_POINTER_RESP: /* 0xA6 */
49 break; 49 HighPriorityMessage = TRUE;
50 case IDLE_MODE_STATUS: //0xA3 50 StatisticsResponse(Adapter, (skb->data + sizeof(USHORT)));
51 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL,"IDLE_MODE_STATUS Type Message Got from F/W"); 51 break;
52 InterfaceIdleModeRespond(Adapter, (PUINT)(skb->data + 52 case IDLE_MODE_STATUS: /* 0xA3 */
53 sizeof(USHORT))); 53 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT,
54 HighPriorityMessage = TRUE ; 54 DBG_LVL_ALL,
55 break; 55 "IDLE_MODE_STATUS Type Message Got from F/W");
56 56 InterfaceIdleModeRespond(Adapter, (PUINT)(skb->data +
57 case AUTH_SS_HOST_MSG: 57 sizeof(USHORT)));
58 HighPriorityMessage = TRUE ; 58 HighPriorityMessage = TRUE;
59 break; 59 break;
60 60
61 default: 61 case AUTH_SS_HOST_MSG:
62 BCM_DEBUG_PRINT( Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL,"Got Default Response"); 62 HighPriorityMessage = TRUE;
63 /* Let the Application Deal with This Packet */ 63 break;
64 break; 64
65 default:
66 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT,
67 DBG_LVL_ALL, "Got Default Response");
68 /* Let the Application Deal with This Packet */
69 break;
65 } 70 }
66 71
67 //Queue The Control Packet to The Application Queues 72 /* Queue The Control Packet to The Application Queues */
68 down(&Adapter->RxAppControlQueuelock); 73 down(&Adapter->RxAppControlQueuelock);
69 74
70 for (pTarang = Adapter->pTarangs; pTarang; pTarang = pTarang->next) 75 for (pTarang = Adapter->pTarangs; pTarang; pTarang = pTarang->next) {
71 { 76 if (Adapter->device_removed)
72 if(Adapter->device_removed)
73 {
74 break; 77 break;
75 }
76 78
77 drop_pkt_flag = TRUE ; 79 drop_pkt_flag = TRUE;
78 /* 80 /*
79 There are cntrl msg from A0 to AC. It has been mapped to 0 to C bit in the cntrl mask. 81 * There are cntrl msg from A0 to AC. It has been mapped to 0 to
80 Also, by default AD to BF has been masked to the rest of the bits... which wil be ON by default. 82 * C bit in the cntrl mask.
81 if mask bit is enable to particular pkt status, send it out to app else stop it. 83 * Also, by default AD to BF has been masked to the rest of the
82 */ 84 * bits... which wil be ON by default.
85 * if mask bit is enable to particular pkt status, send it out
86 * to app else stop it.
87 */
83 cntrl_msg_mask_bit = (usStatus & 0x1F); 88 cntrl_msg_mask_bit = (usStatus & 0x1F);
84 //printk("\ninew msg mask bit which is disable in mask:%X", cntrl_msg_mask_bit); 89 /*
85 if(pTarang->RxCntrlMsgBitMask & (1<<cntrl_msg_mask_bit)) 90 * printk("\ninew msg mask bit which is disable in mask:%X",
86 drop_pkt_flag = FALSE; 91 * cntrl_msg_mask_bit);
87 92 */
88 if ((drop_pkt_flag == TRUE) || (pTarang->AppCtrlQueueLen > MAX_APP_QUEUE_LEN) || 93 if (pTarang->RxCntrlMsgBitMask & (1 << cntrl_msg_mask_bit))
89 ((pTarang->AppCtrlQueueLen > MAX_APP_QUEUE_LEN/2) && (HighPriorityMessage == FALSE))) 94 drop_pkt_flag = FALSE;
90 { 95
96 if ((drop_pkt_flag == TRUE) ||
97 (pTarang->AppCtrlQueueLen > MAX_APP_QUEUE_LEN)
98 || ((pTarang->AppCtrlQueueLen >
99 MAX_APP_QUEUE_LEN / 2) &&
100 (HighPriorityMessage == FALSE))) {
91 /* 101 /*
92 Assumption:- 102 * Assumption:-
93 1. every tarang manages it own dropped pkt statitistics 103 * 1. every tarang manages it own dropped pkt
94 2. Total packet dropped per tarang will be equal to the sum of all types of dropped 104 * statitistics
95 pkt by that tarang only. 105 * 2. Total packet dropped per tarang will be equal to
96 106 * the sum of all types of dropped pkt by that
97 */ 107 * tarang only.
98 switch(*(PUSHORT)skb->data) 108 */
99 { 109 switch (*(PUSHORT)skb->data) {
100 case CM_RESPONSES: 110 case CM_RESPONSES:
101 pTarang->stDroppedAppCntrlMsgs.cm_responses++; 111 pTarang->stDroppedAppCntrlMsgs.cm_responses++;
102 break; 112 break;
103 case CM_CONTROL_NEWDSX_MULTICLASSIFIER_RESP: 113 case CM_CONTROL_NEWDSX_MULTICLASSIFIER_RESP:
104 pTarang->stDroppedAppCntrlMsgs.cm_control_newdsx_multiclassifier_resp++; 114 pTarang->stDroppedAppCntrlMsgs.cm_control_newdsx_multiclassifier_resp++;
105 break; 115 break;
106 case LINK_CONTROL_RESP: 116 case LINK_CONTROL_RESP:
107 pTarang->stDroppedAppCntrlMsgs.link_control_resp++; 117 pTarang->stDroppedAppCntrlMsgs.link_control_resp++;
108 break; 118 break;
109 case STATUS_RSP: 119 case STATUS_RSP:
110 pTarang->stDroppedAppCntrlMsgs.status_rsp++; 120 pTarang->stDroppedAppCntrlMsgs.status_rsp++;
111 break; 121 break;
112 case STATS_POINTER_RESP: 122 case STATS_POINTER_RESP:
113 pTarang->stDroppedAppCntrlMsgs.stats_pointer_resp++; 123 pTarang->stDroppedAppCntrlMsgs.stats_pointer_resp++;
114 break; 124 break;
115 case IDLE_MODE_STATUS: 125 case IDLE_MODE_STATUS:
116 pTarang->stDroppedAppCntrlMsgs.idle_mode_status++ ; 126 pTarang->stDroppedAppCntrlMsgs.idle_mode_status++;
117 break; 127 break;
118 case AUTH_SS_HOST_MSG: 128 case AUTH_SS_HOST_MSG:
119 pTarang->stDroppedAppCntrlMsgs.auth_ss_host_msg++ ; 129 pTarang->stDroppedAppCntrlMsgs.auth_ss_host_msg++;
120 break; 130 break;
121 default: 131 default:
122 pTarang->stDroppedAppCntrlMsgs.low_priority_message++ ; 132 pTarang->stDroppedAppCntrlMsgs.low_priority_message++;
123 break; 133 break;
124 } 134 }
125 135
126 continue; 136 continue;
127 } 137 }
128 138
129 newPacket = skb_clone(skb, GFP_KERNEL); 139 newPacket = skb_clone(skb, GFP_KERNEL);
130 if (!newPacket) 140 if (!newPacket)
131 break; 141 break;
132 ENQUEUEPACKET(pTarang->RxAppControlHead,pTarang->RxAppControlTail, 142 ENQUEUEPACKET(pTarang->RxAppControlHead,
133 newPacket); 143 pTarang->RxAppControlTail, newPacket);
134 pTarang->AppCtrlQueueLen++; 144 pTarang->AppCtrlQueueLen++;
135 } 145 }
136 up(&Adapter->RxAppControlQueuelock); 146 up(&Adapter->RxAppControlQueuelock);
137 wake_up(&Adapter->process_read_wait_queue); 147 wake_up(&Adapter->process_read_wait_queue);
138 dev_kfree_skb(skb); 148 dev_kfree_skb(skb);
139 BCM_DEBUG_PRINT( Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL, "After wake_up_interruptible"); 149 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL,
150 "After wake_up_interruptible");
140} 151}
141 152
142/** 153/**
143@ingroup ctrl_pkt_functions 154 * @ingroup ctrl_pkt_functions
144Thread to handle control pkt reception 155 * Thread to handle control pkt reception
145*/ 156 */
146int control_packet_handler (PMINI_ADAPTER Adapter /**< pointer to adapter object*/ 157int control_packet_handler(PMINI_ADAPTER Adapter /* pointer to adapter object*/)
147 )
148{ 158{
149 struct sk_buff *ctrl_packet= NULL; 159 struct sk_buff *ctrl_packet = NULL;
150 unsigned long flags = 0; 160 unsigned long flags = 0;
151 //struct timeval tv ; 161 /* struct timeval tv; */
152 //int *puiBuffer = NULL ; 162 /* int *puiBuffer = NULL; */
153 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL, "Entering to make thread wait on control packet event!"); 163 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL,
154 while(1) 164 "Entering to make thread wait on control packet event!");
155 { 165 while (1) {
156 wait_event_interruptible(Adapter->process_rx_cntrlpkt, 166 wait_event_interruptible(Adapter->process_rx_cntrlpkt,
157 atomic_read(&Adapter->cntrlpktCnt) || 167 atomic_read(&Adapter->cntrlpktCnt) ||
158 Adapter->bWakeUpDevice || 168 Adapter->bWakeUpDevice ||
159 kthread_should_stop() 169 kthread_should_stop());
160 );
161 170
162 171
163 if(kthread_should_stop()) 172 if (kthread_should_stop()) {
164 { 173 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, CP_CTRL_PKT,
165 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL, "Exiting \n"); 174 DBG_LVL_ALL, "Exiting\n");
166 return 0; 175 return 0;
167 } 176 }
168 if(TRUE == Adapter->bWakeUpDevice) 177 if (TRUE == Adapter->bWakeUpDevice) {
169 {
170 Adapter->bWakeUpDevice = FALSE; 178 Adapter->bWakeUpDevice = FALSE;
171 if((FALSE == Adapter->bTriedToWakeUpFromlowPowerMode) && 179 if ((FALSE == Adapter->bTriedToWakeUpFromlowPowerMode)
172 ((TRUE == Adapter->IdleMode)|| (TRUE == Adapter->bShutStatus))) 180 && ((TRUE == Adapter->IdleMode) ||
173 { 181 (TRUE == Adapter->bShutStatus))) {
174 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, CP_CTRL_PKT, DBG_LVL_ALL, "Calling InterfaceAbortIdlemode\n"); 182 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
175 // Adapter->bTriedToWakeUpFromlowPowerMode = TRUE; 183 CP_CTRL_PKT, DBG_LVL_ALL,
176 InterfaceIdleModeWakeup (Adapter); 184 "Calling InterfaceAbortIdlemode\n");
185 /*
186 * Adapter->bTriedToWakeUpFromlowPowerMode
187 * = TRUE;
188 */
189 InterfaceIdleModeWakeup(Adapter);
177 } 190 }
178 continue; 191 continue;
179 } 192 }
180 193
181 while(atomic_read(&Adapter->cntrlpktCnt)) 194 while (atomic_read(&Adapter->cntrlpktCnt)) {
182 {
183 spin_lock_irqsave(&Adapter->control_queue_lock, flags); 195 spin_lock_irqsave(&Adapter->control_queue_lock, flags);
184 ctrl_packet = Adapter->RxControlHead; 196 ctrl_packet = Adapter->RxControlHead;
185 if(ctrl_packet) 197 if (ctrl_packet) {
186 { 198 DEQUEUEPACKET(Adapter->RxControlHead,
187 DEQUEUEPACKET(Adapter->RxControlHead,Adapter->RxControlTail); 199 Adapter->RxControlTail);
188// Adapter->RxControlHead=ctrl_packet->next; 200 /* Adapter->RxControlHead=ctrl_packet->next; */
189 } 201 }
190 202
191 spin_unlock_irqrestore (&Adapter->control_queue_lock, flags); 203 spin_unlock_irqrestore(&Adapter->control_queue_lock,
192 handle_rx_control_packet(Adapter, ctrl_packet); 204 flags);
205 handle_rx_control_packet(Adapter, ctrl_packet);
193 atomic_dec(&Adapter->cntrlpktCnt); 206 atomic_dec(&Adapter->cntrlpktCnt);
194 } 207 }
195 208
@@ -201,22 +214,22 @@ int control_packet_handler (PMINI_ADAPTER Adapter /**< pointer to adapter obje
201INT flushAllAppQ(void) 214INT flushAllAppQ(void)
202{ 215{
203 PMINI_ADAPTER Adapter = GET_BCM_ADAPTER(gblpnetdev); 216 PMINI_ADAPTER Adapter = GET_BCM_ADAPTER(gblpnetdev);
204 PPER_TARANG_DATA pTarang = NULL; 217 PPER_TARANG_DATA pTarang = NULL;
205 struct sk_buff *PacketToDrop = NULL; 218 struct sk_buff *PacketToDrop = NULL;
206 for(pTarang = Adapter->pTarangs; pTarang; pTarang = pTarang->next) 219 for (pTarang = Adapter->pTarangs; pTarang; pTarang = pTarang->next) {
207 { 220 while (pTarang->RxAppControlHead != NULL) {
208 while(pTarang->RxAppControlHead != NULL) 221 PacketToDrop = pTarang->RxAppControlHead;
209 { 222 DEQUEUEPACKET(pTarang->RxAppControlHead,
210 PacketToDrop=pTarang->RxAppControlHead; 223 pTarang->RxAppControlTail);
211 DEQUEUEPACKET(pTarang->RxAppControlHead,pTarang->RxAppControlTail);
212 dev_kfree_skb(PacketToDrop); 224 dev_kfree_skb(PacketToDrop);
213 } 225 }
214 pTarang->AppCtrlQueueLen = 0; 226 pTarang->AppCtrlQueueLen = 0;
215 //dropped contrl packet statistics also should be reset. 227 /* dropped contrl packet statistics also should be reset. */
216 memset((PVOID)&pTarang->stDroppedAppCntrlMsgs, 0, sizeof(S_MIBS_DROPPED_APP_CNTRL_MESSAGES)); 228 memset((PVOID)&pTarang->stDroppedAppCntrlMsgs, 0,
229 sizeof(S_MIBS_DROPPED_APP_CNTRL_MESSAGES));
217 230
218 } 231 }
219 return STATUS_SUCCESS ; 232 return STATUS_SUCCESS;
220} 233}
221 234
222 235
diff --git a/drivers/staging/bcm/InterfaceDld.c b/drivers/staging/bcm/InterfaceDld.c
index bcd86bbef2fd..65c352f35681 100644
--- a/drivers/staging/bcm/InterfaceDld.c
+++ b/drivers/staging/bcm/InterfaceDld.c
@@ -62,6 +62,7 @@ int InterfaceFileReadbackFromChip(PVOID arg, struct file *flp, unsigned int on_c
62 static int fw_down; 62 static int fw_down;
63 INT Status = STATUS_SUCCESS; 63 INT Status = STATUS_SUCCESS;
64 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)arg; 64 PS_INTERFACE_ADAPTER psIntfAdapter = (PS_INTERFACE_ADAPTER)arg;
65 int bytes;
65 66
66 buff = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_DMA); 67 buff = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_DMA);
67 buff_readback = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB , GFP_DMA); 68 buff_readback = kmalloc(MAX_TRANSFER_CTRL_BYTE_USB , GFP_DMA);
@@ -94,8 +95,9 @@ int InterfaceFileReadbackFromChip(PVOID arg, struct file *flp, unsigned int on_c
94 break; 95 break;
95 } 96 }
96 97
97 Status = InterfaceRDM(psIntfAdapter, on_chip_loc, buff_readback, len); 98 bytes = InterfaceRDM(psIntfAdapter, on_chip_loc, buff_readback, len);
98 if (Status) { 99 if (bytes < 0) {
100 Status = bytes;
99 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "RDM of len %d Failed! %d", len, reg); 101 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "RDM of len %d Failed! %d", len, reg);
100 goto exit; 102 goto exit;
101 } 103 }
@@ -302,6 +304,7 @@ static INT buffRdbkVerify(PMINI_ADAPTER Adapter, PUCHAR mappedbuffer, UINT u32Fi
302 UINT len = u32FirmwareLength; 304 UINT len = u32FirmwareLength;
303 INT retval = STATUS_SUCCESS; 305 INT retval = STATUS_SUCCESS;
304 PUCHAR readbackbuff = kzalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_KERNEL); 306 PUCHAR readbackbuff = kzalloc(MAX_TRANSFER_CTRL_BYTE_USB, GFP_KERNEL);
307 int bytes;
305 308
306 if (NULL == readbackbuff) { 309 if (NULL == readbackbuff) {
307 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "MEMORY ALLOCATION FAILED"); 310 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "MEMORY ALLOCATION FAILED");
@@ -310,9 +313,10 @@ static INT buffRdbkVerify(PMINI_ADAPTER Adapter, PUCHAR mappedbuffer, UINT u32Fi
310 313
311 while (u32FirmwareLength && !retval) { 314 while (u32FirmwareLength && !retval) {
312 len = MIN_VAL(u32FirmwareLength, MAX_TRANSFER_CTRL_BYTE_USB); 315 len = MIN_VAL(u32FirmwareLength, MAX_TRANSFER_CTRL_BYTE_USB);
313 retval = rdm(Adapter, u32StartingAddress, readbackbuff, len); 316 bytes = rdm(Adapter, u32StartingAddress, readbackbuff, len);
314 317
315 if (retval) { 318 if (bytes < 0) {
319 retval = bytes;
316 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "rdm failed with status %d", retval); 320 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "rdm failed with status %d", retval);
317 break; 321 break;
318 } 322 }
diff --git a/drivers/staging/bcm/InterfaceIdleMode.c b/drivers/staging/bcm/InterfaceIdleMode.c
index 96fa4ead7930..faeb03e62c06 100644
--- a/drivers/staging/bcm/InterfaceIdleMode.c
+++ b/drivers/staging/bcm/InterfaceIdleMode.c
@@ -46,6 +46,7 @@ int InterfaceIdleModeRespond(PMINI_ADAPTER Adapter, unsigned int* puiBuffer)
46{ 46{
47 int status = STATUS_SUCCESS; 47 int status = STATUS_SUCCESS;
48 unsigned int uiRegRead = 0; 48 unsigned int uiRegRead = 0;
49 int bytes;
49 50
50 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, IDLE_MODE, DBG_LVL_ALL,"SubType of Message :0x%X", ntohl(*puiBuffer)); 51 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, IDLE_MODE, DBG_LVL_ALL,"SubType of Message :0x%X", ntohl(*puiBuffer));
51 52
@@ -77,16 +78,16 @@ int InterfaceIdleModeRespond(PMINI_ADAPTER Adapter, unsigned int* puiBuffer)
77 else if(Adapter->ulPowerSaveMode != DEVICE_POWERSAVE_MODE_AS_PROTOCOL_IDLE_MODE) 78 else if(Adapter->ulPowerSaveMode != DEVICE_POWERSAVE_MODE_AS_PROTOCOL_IDLE_MODE)
78 { 79 {
79 //clear on read Register 80 //clear on read Register
80 status = rdmalt(Adapter, DEVICE_INT_OUT_EP_REG0, &uiRegRead, sizeof(uiRegRead)); 81 bytes = rdmalt(Adapter, DEVICE_INT_OUT_EP_REG0, &uiRegRead, sizeof(uiRegRead));
81 if(status) 82 if (bytes < 0) {
82 { 83 status = bytes;
83 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0, "rdm failed while clearing H/W Abort Reg0"); 84 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0, "rdm failed while clearing H/W Abort Reg0");
84 return status; 85 return status;
85 } 86 }
86 //clear on read Register 87 //clear on read Register
87 status = rdmalt (Adapter, DEVICE_INT_OUT_EP_REG1, &uiRegRead, sizeof(uiRegRead)); 88 bytes = rdmalt(Adapter, DEVICE_INT_OUT_EP_REG1, &uiRegRead, sizeof(uiRegRead));
88 if(status) 89 if (bytes < 0) {
89 { 90 status = bytes;
90 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0, "rdm failed while clearing H/W Abort Reg1"); 91 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0, "rdm failed while clearing H/W Abort Reg1");
91 return status; 92 return status;
92 } 93 }
@@ -117,9 +118,9 @@ int InterfaceIdleModeRespond(PMINI_ADAPTER Adapter, unsigned int* puiBuffer)
117 Adapter->chip_id== BCS220_3) 118 Adapter->chip_id== BCS220_3)
118 { 119 {
119 120
120 status = rdmalt(Adapter, HPM_CONFIG_MSW, &uiRegRead, sizeof(uiRegRead)); 121 bytes = rdmalt(Adapter, HPM_CONFIG_MSW, &uiRegRead, sizeof(uiRegRead));
121 if(status) 122 if (bytes < 0) {
122 { 123 status = bytes;
123 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, IDLE_MODE, DBG_LVL_ALL, "rdm failed while Reading HPM_CONFIG_LDO145 Reg 0\n"); 124 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, IDLE_MODE, DBG_LVL_ALL, "rdm failed while Reading HPM_CONFIG_LDO145 Reg 0\n");
124 return status; 125 return status;
125 } 126 }
@@ -266,6 +267,8 @@ void InterfaceHandleShutdownModeWakeup(PMINI_ADAPTER Adapter)
266{ 267{
267 unsigned int uiRegVal = 0; 268 unsigned int uiRegVal = 0;
268 INT Status = 0; 269 INT Status = 0;
270 int bytes;
271
269 if(Adapter->ulPowerSaveMode == DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING) 272 if(Adapter->ulPowerSaveMode == DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING)
270 { 273 {
271 // clear idlemode interrupt. 274 // clear idlemode interrupt.
@@ -282,16 +285,16 @@ void InterfaceHandleShutdownModeWakeup(PMINI_ADAPTER Adapter)
282 { 285 {
283 286
284 //clear Interrupt EP registers. 287 //clear Interrupt EP registers.
285 Status = rdmalt(Adapter,DEVICE_INT_OUT_EP_REG0, &uiRegVal, sizeof(uiRegVal)); 288 bytes = rdmalt(Adapter,DEVICE_INT_OUT_EP_REG0, &uiRegVal, sizeof(uiRegVal));
286 if(Status) 289 if (bytes < 0) {
287 { 290 Status = bytes;
288 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"RDM of DEVICE_INT_OUT_EP_REG0 failed with Err :%d", Status); 291 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"RDM of DEVICE_INT_OUT_EP_REG0 failed with Err :%d", Status);
289 return; 292 return;
290 } 293 }
291 294
292 Status = rdmalt(Adapter,DEVICE_INT_OUT_EP_REG1, &uiRegVal, sizeof(uiRegVal)); 295 bytes = rdmalt(Adapter,DEVICE_INT_OUT_EP_REG1, &uiRegVal, sizeof(uiRegVal));
293 if(Status) 296 if (bytes < 0) {
294 { 297 Status = bytes;
295 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"RDM of DEVICE_INT_OUT_EP_REG1 failed with Err :%d", Status); 298 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"RDM of DEVICE_INT_OUT_EP_REG1 failed with Err :%d", Status);
296 return; 299 return;
297 } 300 }
diff --git a/drivers/staging/bcm/InterfaceInit.c b/drivers/staging/bcm/InterfaceInit.c
index a09d35108f04..8e3c586a699c 100644
--- a/drivers/staging/bcm/InterfaceInit.c
+++ b/drivers/staging/bcm/InterfaceInit.c
@@ -68,7 +68,7 @@ static void InterfaceAdapterFree(PS_INTERFACE_ADAPTER psIntfAdapter)
68static void ConfigureEndPointTypesThroughEEPROM(PMINI_ADAPTER Adapter) 68static void ConfigureEndPointTypesThroughEEPROM(PMINI_ADAPTER Adapter)
69{ 69{
70 unsigned long ulReg = 0; 70 unsigned long ulReg = 0;
71 int ret; 71 int bytes;
72 72
73 /* Program EP2 MAX_PKT_SIZE */ 73 /* Program EP2 MAX_PKT_SIZE */
74 ulReg = ntohl(EP2_MPS_REG); 74 ulReg = ntohl(EP2_MPS_REG);
@@ -94,8 +94,8 @@ static void ConfigureEndPointTypesThroughEEPROM(PMINI_ADAPTER Adapter)
94 BeceemEEPROMBulkWrite(Adapter, (PUCHAR)&ulReg, 0x140, 4, TRUE); 94 BeceemEEPROMBulkWrite(Adapter, (PUCHAR)&ulReg, 0x140, 4, TRUE);
95 95
96 /* Program TX EP as interrupt(Alternate Setting) */ 96 /* Program TX EP as interrupt(Alternate Setting) */
97 ret = rdmalt(Adapter, 0x0F0110F8, (u32 *)&ulReg, sizeof(u32)); 97 bytes = rdmalt(Adapter, 0x0F0110F8, (u32 *)&ulReg, sizeof(u32));
98 if (ret) { 98 if (bytes < 0) {
99 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, DRV_ENTRY, DBG_LVL_ALL, 99 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_INITEXIT, DRV_ENTRY, DBG_LVL_ALL,
100 "reading of Tx EP failed\n"); 100 "reading of Tx EP failed\n");
101 return; 101 return;
@@ -430,6 +430,7 @@ static int InterfaceAdapterInit(PS_INTERFACE_ADAPTER psIntfAdapter)
430 int usedIntOutForBulkTransfer = 0 ; 430 int usedIntOutForBulkTransfer = 0 ;
431 BOOLEAN bBcm16 = FALSE; 431 BOOLEAN bBcm16 = FALSE;
432 UINT uiData = 0; 432 UINT uiData = 0;
433 int bytes;
433 434
434 /* Store the usb dev into interface adapter */ 435 /* Store the usb dev into interface adapter */
435 psIntfAdapter->udev = usb_get_dev(interface_to_usbdev(psIntfAdapter->interface)); 436 psIntfAdapter->udev = usb_get_dev(interface_to_usbdev(psIntfAdapter->interface));
@@ -438,9 +439,10 @@ static int InterfaceAdapterInit(PS_INTERFACE_ADAPTER psIntfAdapter)
438 psIntfAdapter->psAdapter->interface_rdm = BcmRDM; 439 psIntfAdapter->psAdapter->interface_rdm = BcmRDM;
439 psIntfAdapter->psAdapter->interface_wrm = BcmWRM; 440 psIntfAdapter->psAdapter->interface_wrm = BcmWRM;
440 441
441 retval = rdmalt(psIntfAdapter->psAdapter, CHIP_ID_REG, 442 bytes = rdmalt(psIntfAdapter->psAdapter, CHIP_ID_REG,
442 (u32 *)&(psIntfAdapter->psAdapter->chip_id), sizeof(u32)); 443 (u32 *)&(psIntfAdapter->psAdapter->chip_id), sizeof(u32));
443 if (retval) { 444 if (bytes < 0) {
445 retval = bytes;
444 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "CHIP ID Read Failed\n"); 446 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_PRINTK, 0, 0, "CHIP ID Read Failed\n");
445 return retval; 447 return retval;
446 } 448 }
diff --git a/drivers/staging/bcm/InterfaceMisc.c b/drivers/staging/bcm/InterfaceMisc.c
index 61f878b4f56c..2218faeaf8ac 100644
--- a/drivers/staging/bcm/InterfaceMisc.c
+++ b/drivers/staging/bcm/InterfaceMisc.c
@@ -5,7 +5,7 @@ INT InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter,
5 PVOID buff, 5 PVOID buff,
6 INT len) 6 INT len)
7{ 7{
8 int retval = 0; 8 int bytes;
9 USHORT usRetries = 0; 9 USHORT usRetries = 0;
10 10
11 if (psIntfAdapter == NULL) { 11 if (psIntfAdapter == NULL) {
@@ -30,7 +30,7 @@ INT InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter,
30 psIntfAdapter->psAdapter->DeviceAccess = TRUE; 30 psIntfAdapter->psAdapter->DeviceAccess = TRUE;
31 31
32 do { 32 do {
33 retval = usb_control_msg(psIntfAdapter->udev, 33 bytes = usb_control_msg(psIntfAdapter->udev,
34 usb_rcvctrlpipe(psIntfAdapter->udev, 0), 34 usb_rcvctrlpipe(psIntfAdapter->udev, 0),
35 0x02, 35 0x02,
36 0xC2, 36 0xC2,
@@ -41,22 +41,20 @@ INT InterfaceRDM(PS_INTERFACE_ADAPTER psIntfAdapter,
41 5000); 41 5000);
42 42
43 usRetries++; 43 usRetries++;
44 if (-ENODEV == retval) { 44 if (-ENODEV == bytes) {
45 psIntfAdapter->psAdapter->device_removed = TRUE; 45 psIntfAdapter->psAdapter->device_removed = TRUE;
46 break; 46 break;
47 } 47 }
48 48
49 } while ((retval < 0) && (usRetries < MAX_RDM_WRM_RETIRES)); 49 } while ((bytes < 0) && (usRetries < MAX_RDM_WRM_RETIRES));
50 50
51 if (retval < 0) { 51 if (bytes < 0)
52 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM failed status :%d, retires :%d", retval, usRetries); 52 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM failed status :%d, retires :%d", bytes, usRetries);
53 psIntfAdapter->psAdapter->DeviceAccess = FALSE; 53 else
54 return retval; 54 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM sent %d", bytes);
55 } else { 55
56 BCM_DEBUG_PRINT(psIntfAdapter->psAdapter, DBG_TYPE_OTHERS, RDM, DBG_LVL_ALL, "RDM sent %d", retval); 56 psIntfAdapter->psAdapter->DeviceAccess = FALSE;
57 psIntfAdapter->psAdapter->DeviceAccess = FALSE; 57 return bytes;
58 return STATUS_SUCCESS;
59 }
60} 58}
61 59
62INT InterfaceWRM(PS_INTERFACE_ADAPTER psIntfAdapter, 60INT InterfaceWRM(PS_INTERFACE_ADAPTER psIntfAdapter,
diff --git a/drivers/staging/bcm/Misc.c b/drivers/staging/bcm/Misc.c
index e9f29d597518..c7725e141fd5 100644
--- a/drivers/staging/bcm/Misc.c
+++ b/drivers/staging/bcm/Misc.c
@@ -814,6 +814,7 @@ int reset_card_proc(PMINI_ADAPTER ps_adapter)
814 PMINI_ADAPTER Adapter = GET_BCM_ADAPTER(gblpnetdev); 814 PMINI_ADAPTER Adapter = GET_BCM_ADAPTER(gblpnetdev);
815 PS_INTERFACE_ADAPTER psIntfAdapter = NULL; 815 PS_INTERFACE_ADAPTER psIntfAdapter = NULL;
816 unsigned int value = 0, uiResetValue = 0; 816 unsigned int value = 0, uiResetValue = 0;
817 int bytes;
817 818
818 psIntfAdapter = ((PS_INTERFACE_ADAPTER)(ps_adapter->pvInterfaceAdapter)); 819 psIntfAdapter = ((PS_INTERFACE_ADAPTER)(ps_adapter->pvInterfaceAdapter));
819 ps_adapter->bDDRInitDone = FALSE; 820 ps_adapter->bDDRInitDone = FALSE;
@@ -848,8 +849,9 @@ int reset_card_proc(PMINI_ADAPTER ps_adapter)
848 ps_adapter->chip_id == BCS250_BC || 849 ps_adapter->chip_id == BCS250_BC ||
849 ps_adapter->chip_id == BCS220_3) { 850 ps_adapter->chip_id == BCS220_3) {
850 851
851 retval = rdmalt(ps_adapter, HPM_CONFIG_LDO145, &value, sizeof(value)); 852 bytes = rdmalt(ps_adapter, HPM_CONFIG_LDO145, &value, sizeof(value));
852 if (retval < 0) { 853 if (bytes < 0) {
854 retval = bytes;
853 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "read failed with status :%d", retval); 855 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "read failed with status :%d", retval);
854 goto err_exit; 856 goto err_exit;
855 } 857 }
@@ -862,8 +864,9 @@ int reset_card_proc(PMINI_ADAPTER ps_adapter)
862 } 864 }
863 } 865 }
864 } else { 866 } else {
865 retval = rdmalt(ps_adapter, 0x0f007018, &value, sizeof(value)); 867 bytes = rdmalt(ps_adapter, 0x0f007018, &value, sizeof(value));
866 if (retval < 0) { 868 if (bytes < 0) {
869 retval = bytes;
867 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "read failed with status :%d", retval); 870 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "read failed with status :%d", retval);
868 goto err_exit; 871 goto err_exit;
869 } 872 }
@@ -925,11 +928,16 @@ err_exit:
925 928
926int run_card_proc(PMINI_ADAPTER ps_adapter) 929int run_card_proc(PMINI_ADAPTER ps_adapter)
927{ 930{
931 int status = STATUS_SUCCESS;
932 int bytes;
933
928 unsigned int value = 0; 934 unsigned int value = 0;
929 { 935 {
930 if (rdmalt(ps_adapter, CLOCK_RESET_CNTRL_REG_1, &value, sizeof(value)) < 0) { 936 bytes = rdmalt(ps_adapter, CLOCK_RESET_CNTRL_REG_1, &value, sizeof(value));
937 if (bytes < 0) {
938 status = bytes;
931 BCM_DEBUG_PRINT(ps_adapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "%s:%d\n", __func__, __LINE__); 939 BCM_DEBUG_PRINT(ps_adapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "%s:%d\n", __func__, __LINE__);
932 return STATUS_FAILURE; 940 return status;
933 } 941 }
934 942
935 if (ps_adapter->bFlashBoot) 943 if (ps_adapter->bFlashBoot)
@@ -942,7 +950,7 @@ int run_card_proc(PMINI_ADAPTER ps_adapter)
942 return STATUS_FAILURE; 950 return STATUS_FAILURE;
943 } 951 }
944 } 952 }
945 return STATUS_SUCCESS; 953 return status;
946} 954}
947 955
948int InitCardAndDownloadFirmware(PMINI_ADAPTER ps_adapter) 956int InitCardAndDownloadFirmware(PMINI_ADAPTER ps_adapter)
@@ -1215,6 +1223,7 @@ static unsigned char *ReadMacAddrEEPROM(PMINI_ADAPTER Adapter, ulong dwAddress)
1215 int status = 0, i = 0; 1223 int status = 0, i = 0;
1216 unsigned int temp = 0; 1224 unsigned int temp = 0;
1217 unsigned char *pucmacaddr = kmalloc(MAC_ADDRESS_SIZE, GFP_KERNEL); 1225 unsigned char *pucmacaddr = kmalloc(MAC_ADDRESS_SIZE, GFP_KERNEL);
1226 int bytes;
1218 1227
1219 if (!pucmacaddr) { 1228 if (!pucmacaddr) {
1220 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "No Buffers to Read the EEPROM Address\n"); 1229 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "No Buffers to Read the EEPROM Address\n");
@@ -1231,8 +1240,9 @@ static unsigned char *ReadMacAddrEEPROM(PMINI_ADAPTER Adapter, ulong dwAddress)
1231 } 1240 }
1232 1241
1233 for (i = 0; i < MAC_ADDRESS_SIZE; i++) { 1242 for (i = 0; i < MAC_ADDRESS_SIZE; i++) {
1234 status = rdmalt(Adapter, EEPROM_READ_DATA_Q_REG, &temp, sizeof(temp)); 1243 bytes = rdmalt(Adapter, EEPROM_READ_DATA_Q_REG, &temp, sizeof(temp));
1235 if (status != STATUS_SUCCESS) { 1244 if (bytes < 0) {
1245 status = bytes;
1236 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "rdm Failed..\n"); 1246 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "rdm Failed..\n");
1237 kfree(pucmacaddr); 1247 kfree(pucmacaddr);
1238 pucmacaddr = NULL; 1248 pucmacaddr = NULL;
@@ -1574,11 +1584,13 @@ void update_per_sf_desc_cnts(PMINI_ADAPTER Adapter)
1574{ 1584{
1575 INT iIndex = 0; 1585 INT iIndex = 0;
1576 u32 uibuff[MAX_TARGET_DSX_BUFFERS]; 1586 u32 uibuff[MAX_TARGET_DSX_BUFFERS];
1587 int bytes;
1577 1588
1578 if (!atomic_read(&Adapter->uiMBupdate)) 1589 if (!atomic_read(&Adapter->uiMBupdate))
1579 return; 1590 return;
1580 1591
1581 if (rdmaltWithLock(Adapter, TARGET_SFID_TXDESC_MAP_LOC, (PUINT)uibuff, sizeof(UINT) * MAX_TARGET_DSX_BUFFERS) < 0) { 1592 bytes = rdmaltWithLock(Adapter, TARGET_SFID_TXDESC_MAP_LOC, (PUINT)uibuff, sizeof(UINT) * MAX_TARGET_DSX_BUFFERS);
1593 if (bytes < 0) {
1582 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "rdm failed\n"); 1594 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "rdm failed\n");
1583 return; 1595 return;
1584 } 1596 }
diff --git a/drivers/staging/bcm/hostmibs.c b/drivers/staging/bcm/hostmibs.c
index c13ea5c9a2aa..101c4e31249e 100644
--- a/drivers/staging/bcm/hostmibs.c
+++ b/drivers/staging/bcm/hostmibs.c
@@ -1,4 +1,3 @@
1
2/* 1/*
3 * File Name: hostmibs.c 2 * File Name: hostmibs.c
4 * 3 *
@@ -6,73 +5,72 @@
6 * 5 *
7 * Abstract: This file contains the routines to copy the statistics used by 6 * Abstract: This file contains the routines to copy the statistics used by
8 * the driver to the Host MIBS structure and giving the same to Application. 7 * the driver to the Host MIBS structure and giving the same to Application.
9 *
10 */ 8 */
9
11#include "headers.h" 10#include "headers.h"
12 11
13INT ProcessGetHostMibs(PMINI_ADAPTER Adapter, S_MIBS_HOST_STATS_MIBS *pstHostMibs) 12INT ProcessGetHostMibs(PMINI_ADAPTER Adapter, S_MIBS_HOST_STATS_MIBS *pstHostMibs)
14{ 13{
15 S_SERVICEFLOW_ENTRY *pstServiceFlowEntry = NULL; 14 S_SERVICEFLOW_ENTRY *pstServiceFlowEntry = NULL;
16 S_PHS_RULE *pstPhsRule = NULL; 15 S_PHS_RULE *pstPhsRule = NULL;
17 S_CLASSIFIER_TABLE *pstClassifierTable = NULL; 16 S_CLASSIFIER_TABLE *pstClassifierTable = NULL;
18 S_CLASSIFIER_ENTRY *pstClassifierRule = NULL; 17 S_CLASSIFIER_ENTRY *pstClassifierRule = NULL;
19 PPHS_DEVICE_EXTENSION pDeviceExtension = (PPHS_DEVICE_EXTENSION)&Adapter->stBCMPhsContext; 18 PPHS_DEVICE_EXTENSION pDeviceExtension = (PPHS_DEVICE_EXTENSION) &Adapter->stBCMPhsContext;
20 19
21 UINT nClassifierIndex = 0, nPhsTableIndex = 0,nSfIndex = 0, uiIndex = 0; 20 UINT nClassifierIndex = 0, nPhsTableIndex = 0, nSfIndex = 0, uiIndex = 0;
22 21
23 if(pDeviceExtension == NULL) 22 if (pDeviceExtension == NULL) {
24 { 23 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, HOST_MIBS, DBG_LVL_ALL, "Invalid Device Extension\n");
25 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, HOST_MIBS, DBG_LVL_ALL, "Invalid Device Extension\n");
26 return STATUS_FAILURE; 24 return STATUS_FAILURE;
27 } 25 }
28 26
29 //Copy the classifier Table 27 /* Copy the classifier Table */
30 for(nClassifierIndex=0; nClassifierIndex < MAX_CLASSIFIERS; 28 for (nClassifierIndex = 0; nClassifierIndex < MAX_CLASSIFIERS; nClassifierIndex++) {
31 nClassifierIndex++) 29 if (Adapter->astClassifierTable[nClassifierIndex].bUsed == TRUE)
32 { 30 memcpy((PVOID) & pstHostMibs->
33 if(Adapter->astClassifierTable[nClassifierIndex].bUsed == TRUE) 31 astClassifierTable[nClassifierIndex],
34 memcpy((PVOID)&pstHostMibs->astClassifierTable[nClassifierIndex], 32 (PVOID) & Adapter->
35 (PVOID)&Adapter->astClassifierTable[nClassifierIndex], 33 astClassifierTable[nClassifierIndex],
36 sizeof(S_MIBS_CLASSIFIER_RULE)); 34 sizeof(S_MIBS_CLASSIFIER_RULE));
37 } 35 }
38 36
39 //Copy the SF Table 37 /* Copy the SF Table */
40 for(nSfIndex=0; nSfIndex < NO_OF_QUEUES ; nSfIndex++) 38 for (nSfIndex = 0; nSfIndex < NO_OF_QUEUES; nSfIndex++) {
41 { 39 if (Adapter->PackInfo[nSfIndex].bValid) {
42 if(Adapter->PackInfo[nSfIndex].bValid) 40 memcpy((PVOID) & pstHostMibs->astSFtable[nSfIndex],
43 { 41 (PVOID) & Adapter->PackInfo[nSfIndex],
44 memcpy((PVOID)&pstHostMibs->astSFtable[nSfIndex],(PVOID)&Adapter->PackInfo[nSfIndex],sizeof(S_MIBS_SERVICEFLOW_TABLE)); 42 sizeof(S_MIBS_SERVICEFLOW_TABLE));
45 } 43 } else {
46 else 44 /* If index in not valid,
47 { 45 * don't process this for the PHS table.
48 //if index in not valid, don't process this for the PHS table. Go For the next entry. 46 * Go For the next entry.
49 continue ; 47 */
50 } 48 continue;
49 }
51 50
52 //Retrieve the SFID Entry Index for requested Service Flow 51 /* Retrieve the SFID Entry Index for requested Service Flow */
53 if(PHS_INVALID_TABLE_INDEX == GetServiceFlowEntry(pDeviceExtension->pstServiceFlowPhsRulesTable, 52 if (PHS_INVALID_TABLE_INDEX ==
54 Adapter->PackInfo[nSfIndex].usVCID_Value ,&pstServiceFlowEntry)) 53 GetServiceFlowEntry(pDeviceExtension->
55 { 54 pstServiceFlowPhsRulesTable,
55 Adapter->PackInfo[nSfIndex].
56 usVCID_Value, &pstServiceFlowEntry))
56 57
57 continue; 58 continue;
58 }
59 59
60 pstClassifierTable = pstServiceFlowEntry->pstClassifierTable; 60 pstClassifierTable = pstServiceFlowEntry->pstClassifierTable;
61 61
62 62 for (uiIndex = 0; uiIndex < MAX_PHSRULE_PER_SF; uiIndex++) {
63 for(uiIndex = 0; uiIndex < MAX_PHSRULE_PER_SF; uiIndex++)
64 {
65 pstClassifierRule = &pstClassifierTable->stActivePhsRulesList[uiIndex]; 63 pstClassifierRule = &pstClassifierTable->stActivePhsRulesList[uiIndex];
66 64
67 if(pstClassifierRule->bUsed) 65 if (pstClassifierRule->bUsed) {
68 { 66 pstPhsRule = pstClassifierRule->pstPhsRule;
69 pstPhsRule = pstClassifierRule->pstPhsRule;
70 67
71 pstHostMibs->astPhsRulesTable[nPhsTableIndex].ulSFID = Adapter->PackInfo[nSfIndex].ulSFID; 68 pstHostMibs->astPhsRulesTable[nPhsTableIndex].
69 ulSFID = Adapter->PackInfo[nSfIndex].ulSFID;
72 70
73 memcpy(&pstHostMibs->astPhsRulesTable[nPhsTableIndex].u8PHSI, 71 memcpy(&pstHostMibs->
74 &pstPhsRule->u8PHSI, 72 astPhsRulesTable[nPhsTableIndex].u8PHSI,
75 sizeof(S_PHS_RULE)); 73 &pstPhsRule->u8PHSI, sizeof(S_PHS_RULE));
76 nPhsTableIndex++; 74 nPhsTableIndex++;
77 75
78 } 76 }
@@ -81,65 +79,63 @@ INT ProcessGetHostMibs(PMINI_ADAPTER Adapter, S_MIBS_HOST_STATS_MIBS *pstHostMi
81 79
82 } 80 }
83 81
84 82 /* Copy other Host Statistics parameters */
85 //copy other Host Statistics parameters
86 pstHostMibs->stHostInfo.GoodTransmits = Adapter->dev->stats.tx_packets; 83 pstHostMibs->stHostInfo.GoodTransmits = Adapter->dev->stats.tx_packets;
87 pstHostMibs->stHostInfo.GoodReceives = Adapter->dev->stats.rx_packets; 84 pstHostMibs->stHostInfo.GoodReceives = Adapter->dev->stats.rx_packets;
88 pstHostMibs->stHostInfo.CurrNumFreeDesc = 85 pstHostMibs->stHostInfo.CurrNumFreeDesc = atomic_read(&Adapter->CurrNumFreeTxDesc);
89 atomic_read(&Adapter->CurrNumFreeTxDesc);
90 pstHostMibs->stHostInfo.BEBucketSize = Adapter->BEBucketSize; 86 pstHostMibs->stHostInfo.BEBucketSize = Adapter->BEBucketSize;
91 pstHostMibs->stHostInfo.rtPSBucketSize = Adapter->rtPSBucketSize; 87 pstHostMibs->stHostInfo.rtPSBucketSize = Adapter->rtPSBucketSize;
92 pstHostMibs->stHostInfo.TimerActive = Adapter->TimerActive; 88 pstHostMibs->stHostInfo.TimerActive = Adapter->TimerActive;
93 pstHostMibs->stHostInfo.u32TotalDSD = Adapter->u32TotalDSD; 89 pstHostMibs->stHostInfo.u32TotalDSD = Adapter->u32TotalDSD;
94 90
95 memcpy(pstHostMibs->stHostInfo.aTxPktSizeHist,Adapter->aTxPktSizeHist,sizeof(UINT32)*MIBS_MAX_HIST_ENTRIES); 91 memcpy(pstHostMibs->stHostInfo.aTxPktSizeHist, Adapter->aTxPktSizeHist, sizeof(UINT32) * MIBS_MAX_HIST_ENTRIES);
96 memcpy(pstHostMibs->stHostInfo.aRxPktSizeHist,Adapter->aRxPktSizeHist,sizeof(UINT32)*MIBS_MAX_HIST_ENTRIES); 92 memcpy(pstHostMibs->stHostInfo.aRxPktSizeHist, Adapter->aRxPktSizeHist, sizeof(UINT32) * MIBS_MAX_HIST_ENTRIES);
97 93
98 return STATUS_SUCCESS; 94 return STATUS_SUCCESS;
99} 95}
100 96
101
102VOID GetDroppedAppCntrlPktMibs(S_MIBS_HOST_STATS_MIBS *pstHostMibs, const PPER_TARANG_DATA pTarang) 97VOID GetDroppedAppCntrlPktMibs(S_MIBS_HOST_STATS_MIBS *pstHostMibs, const PPER_TARANG_DATA pTarang)
103{ 98{
104 memcpy(&(pstHostMibs->stDroppedAppCntrlMsgs), 99 memcpy(&(pstHostMibs->stDroppedAppCntrlMsgs),
105 &(pTarang->stDroppedAppCntrlMsgs),sizeof(S_MIBS_DROPPED_APP_CNTRL_MESSAGES)); 100 &(pTarang->stDroppedAppCntrlMsgs),
101 sizeof(S_MIBS_DROPPED_APP_CNTRL_MESSAGES));
106} 102}
107 103
108 104VOID CopyMIBSExtendedSFParameters(PMINI_ADAPTER Adapter, CServiceFlowParamSI *psfLocalSet, UINT uiSearchRuleIndex)
109VOID CopyMIBSExtendedSFParameters(PMINI_ADAPTER Adapter,
110 CServiceFlowParamSI *psfLocalSet, UINT uiSearchRuleIndex)
111{ 105{
112 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfSfid = psfLocalSet->u32SFID; 106 S_MIBS_EXTSERVICEFLOW_PARAMETERS *t = &Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable;
113 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsMaxSustainedRate = psfLocalSet->u32MaxSustainedTrafficRate; 107
114 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsMaxTrafficBurst = psfLocalSet->u32MaxTrafficBurst; 108 t->wmanIfSfid = psfLocalSet->u32SFID;
115 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsMinReservedRate = psfLocalSet->u32MinReservedTrafficRate; 109 t->wmanIfCmnCpsMaxSustainedRate = psfLocalSet->u32MaxSustainedTrafficRate;
116 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsToleratedJitter = psfLocalSet->u32ToleratedJitter; 110 t->wmanIfCmnCpsMaxTrafficBurst = psfLocalSet->u32MaxTrafficBurst;
117 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsMaxLatency = psfLocalSet->u32MaximumLatency; 111 t->wmanIfCmnCpsMinReservedRate = psfLocalSet->u32MinReservedTrafficRate;
118 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsFixedVsVariableSduInd = psfLocalSet->u8FixedLengthVSVariableLengthSDUIndicator; 112 t->wmanIfCmnCpsToleratedJitter = psfLocalSet->u32ToleratedJitter;
119 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsFixedVsVariableSduInd = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsFixedVsVariableSduInd); 113 t->wmanIfCmnCpsMaxLatency = psfLocalSet->u32MaximumLatency;
120 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsSduSize = psfLocalSet->u8SDUSize; 114 t->wmanIfCmnCpsFixedVsVariableSduInd = psfLocalSet->u8FixedLengthVSVariableLengthSDUIndicator;
121 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsSduSize = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsSduSize); 115 t->wmanIfCmnCpsFixedVsVariableSduInd = ntohl(t->wmanIfCmnCpsFixedVsVariableSduInd);
122 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsSfSchedulingType = psfLocalSet->u8ServiceFlowSchedulingType; 116 t->wmanIfCmnCpsSduSize = psfLocalSet->u8SDUSize;
123 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsSfSchedulingType = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsSfSchedulingType); 117 t->wmanIfCmnCpsSduSize = ntohl(t->wmanIfCmnCpsSduSize);
124 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqEnable = psfLocalSet->u8ARQEnable; 118 t->wmanIfCmnCpsSfSchedulingType = psfLocalSet->u8ServiceFlowSchedulingType;
125 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqEnable = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqEnable); 119 t->wmanIfCmnCpsSfSchedulingType = ntohl(t->wmanIfCmnCpsSfSchedulingType);
126 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqWindowSize = ntohs(psfLocalSet->u16ARQWindowSize); 120 t->wmanIfCmnCpsArqEnable = psfLocalSet->u8ARQEnable;
127 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqWindowSize = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqWindowSize); 121 t->wmanIfCmnCpsArqEnable = ntohl(t->wmanIfCmnCpsArqEnable);
128 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqBlockLifetime = ntohs(psfLocalSet->u16ARQBlockLifeTime); 122 t->wmanIfCmnCpsArqWindowSize = ntohs(psfLocalSet->u16ARQWindowSize);
129 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqBlockLifetime = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqBlockLifetime); 123 t->wmanIfCmnCpsArqWindowSize = ntohl(t->wmanIfCmnCpsArqWindowSize);
130 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqSyncLossTimeout = ntohs(psfLocalSet->u16ARQSyncLossTimeOut); 124 t->wmanIfCmnCpsArqBlockLifetime = ntohs(psfLocalSet->u16ARQBlockLifeTime);
131 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqSyncLossTimeout = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqSyncLossTimeout); 125 t->wmanIfCmnCpsArqBlockLifetime = ntohl(t->wmanIfCmnCpsArqBlockLifetime);
132 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqDeliverInOrder = psfLocalSet->u8ARQDeliverInOrder; 126 t->wmanIfCmnCpsArqSyncLossTimeout = ntohs(psfLocalSet->u16ARQSyncLossTimeOut);
133 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqDeliverInOrder = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqDeliverInOrder); 127 t->wmanIfCmnCpsArqSyncLossTimeout = ntohl(t->wmanIfCmnCpsArqSyncLossTimeout);
134 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqRxPurgeTimeout = ntohs(psfLocalSet->u16ARQRxPurgeTimeOut); 128 t->wmanIfCmnCpsArqDeliverInOrder = psfLocalSet->u8ARQDeliverInOrder;
135 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqRxPurgeTimeout = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqRxPurgeTimeout); 129 t->wmanIfCmnCpsArqDeliverInOrder = ntohl(t->wmanIfCmnCpsArqDeliverInOrder);
136 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqBlockSize = ntohs(psfLocalSet->u16ARQBlockSize); 130 t->wmanIfCmnCpsArqRxPurgeTimeout = ntohs(psfLocalSet->u16ARQRxPurgeTimeOut);
137 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqBlockSize = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsArqBlockSize); 131 t->wmanIfCmnCpsArqRxPurgeTimeout = ntohl(t->wmanIfCmnCpsArqRxPurgeTimeout);
138 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsReqTxPolicy = psfLocalSet->u8RequesttransmissionPolicy; 132 t->wmanIfCmnCpsArqBlockSize = ntohs(psfLocalSet->u16ARQBlockSize);
139 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsReqTxPolicy = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsReqTxPolicy); 133 t->wmanIfCmnCpsArqBlockSize = ntohl(t->wmanIfCmnCpsArqBlockSize);
140 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnSfCsSpecification = psfLocalSet->u8CSSpecification; 134 t->wmanIfCmnCpsReqTxPolicy = psfLocalSet->u8RequesttransmissionPolicy;
141 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnSfCsSpecification = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnSfCsSpecification); 135 t->wmanIfCmnCpsReqTxPolicy = ntohl(t->wmanIfCmnCpsReqTxPolicy);
142 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsTargetSaid = ntohs(psfLocalSet->u16TargetSAID); 136 t->wmanIfCmnSfCsSpecification = psfLocalSet->u8CSSpecification;
143 Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsTargetSaid = ntohl(Adapter->PackInfo[uiSearchRuleIndex].stMibsExtServiceFlowTable.wmanIfCmnCpsTargetSaid); 137 t->wmanIfCmnSfCsSpecification = ntohl(t->wmanIfCmnSfCsSpecification);
138 t->wmanIfCmnCpsTargetSaid = ntohs(psfLocalSet->u16TargetSAID);
139 t->wmanIfCmnCpsTargetSaid = ntohl(t->wmanIfCmnCpsTargetSaid);
144 140
145} 141}
diff --git a/drivers/staging/bcm/led_control.c b/drivers/staging/bcm/led_control.c
index 16e939fa15d6..c7f488629722 100644
--- a/drivers/staging/bcm/led_control.c
+++ b/drivers/staging/bcm/led_control.c
@@ -5,65 +5,69 @@
5 5
6static B_UINT16 CFG_CalculateChecksum(B_UINT8 *pu8Buffer, B_UINT32 u32Size) 6static B_UINT16 CFG_CalculateChecksum(B_UINT8 *pu8Buffer, B_UINT32 u32Size)
7{ 7{
8 B_UINT16 u16CheckSum=0; 8 B_UINT16 u16CheckSum = 0;
9 while(u32Size--) { 9 while (u32Size--) {
10 u16CheckSum += (B_UINT8)~(*pu8Buffer); 10 u16CheckSum += (B_UINT8)~(*pu8Buffer);
11 pu8Buffer++; 11 pu8Buffer++;
12 } 12 }
13 return u16CheckSum; 13 return u16CheckSum;
14} 14}
15
15BOOLEAN IsReqGpioIsLedInNVM(PMINI_ADAPTER Adapter, UINT gpios) 16BOOLEAN IsReqGpioIsLedInNVM(PMINI_ADAPTER Adapter, UINT gpios)
16{ 17{
17 INT Status ; 18 INT Status;
18 Status = (Adapter->gpioBitMap & gpios) ^ gpios ; 19 Status = (Adapter->gpioBitMap & gpios) ^ gpios;
19 if(Status) 20 if (Status)
20 return FALSE; 21 return FALSE;
21 else 22 else
22 return TRUE; 23 return TRUE;
23} 24}
24 25
25static INT LED_Blink(PMINI_ADAPTER Adapter, UINT GPIO_Num, UCHAR uiLedIndex, ULONG timeout, INT num_of_time, LedEventInfo_t currdriverstate) 26static INT LED_Blink(PMINI_ADAPTER Adapter, UINT GPIO_Num, UCHAR uiLedIndex,
27 ULONG timeout, INT num_of_time, LedEventInfo_t currdriverstate)
26{ 28{
27 int Status = STATUS_SUCCESS; 29 int Status = STATUS_SUCCESS;
28 BOOLEAN bInfinite = FALSE; 30 BOOLEAN bInfinite = FALSE;
29 31
30 /*Check if num_of_time is -ve. If yes, blink led in infinite loop*/ 32 /* Check if num_of_time is -ve. If yes, blink led in infinite loop */
31 if(num_of_time < 0) 33 if (num_of_time < 0) {
32 {
33 bInfinite = TRUE; 34 bInfinite = TRUE;
34 num_of_time = 1; 35 num_of_time = 1;
35 } 36 }
36 while(num_of_time) 37 while (num_of_time) {
37 { 38 if (currdriverstate == Adapter->DriverState)
38
39 if(currdriverstate == Adapter->DriverState)
40 TURN_ON_LED(GPIO_Num, uiLedIndex); 39 TURN_ON_LED(GPIO_Num, uiLedIndex);
41 40
42 /*Wait for timeout after setting on the LED*/ 41 /* Wait for timeout after setting on the LED */
43 Status = wait_event_interruptible_timeout(Adapter->LEDInfo.notify_led_event, 42 Status = wait_event_interruptible_timeout(
44 currdriverstate != Adapter->DriverState || kthread_should_stop(), 43 Adapter->LEDInfo.notify_led_event,
45 msecs_to_jiffies(timeout)); 44 currdriverstate != Adapter->DriverState ||
46 45 kthread_should_stop(),
47 if(kthread_should_stop()) 46 msecs_to_jiffies(timeout));
48 { 47
49 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL, "Led thread got signal to exit..hence exiting"); 48 if (kthread_should_stop()) {
50 Adapter->LEDInfo.led_thread_running= BCM_LED_THREAD_DISABLED; 49 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
50 DBG_LVL_ALL,
51 "Led thread got signal to exit..hence exiting");
52 Adapter->LEDInfo.led_thread_running =
53 BCM_LED_THREAD_DISABLED;
51 TURN_OFF_LED(GPIO_Num, uiLedIndex); 54 TURN_OFF_LED(GPIO_Num, uiLedIndex);
52 Status=EVENT_SIGNALED; 55 Status = EVENT_SIGNALED;
53 break; 56 break;
54 } 57 }
55 if(Status) 58 if (Status) {
56 {
57 TURN_OFF_LED(GPIO_Num, uiLedIndex); 59 TURN_OFF_LED(GPIO_Num, uiLedIndex);
58 Status=EVENT_SIGNALED; 60 Status = EVENT_SIGNALED;
59 break; 61 break;
60 } 62 }
61 63
62 TURN_OFF_LED(GPIO_Num, uiLedIndex); 64 TURN_OFF_LED(GPIO_Num, uiLedIndex);
63 Status = wait_event_interruptible_timeout(Adapter->LEDInfo.notify_led_event, 65 Status = wait_event_interruptible_timeout(
64 currdriverstate!= Adapter->DriverState || kthread_should_stop(), 66 Adapter->LEDInfo.notify_led_event,
65 msecs_to_jiffies(timeout)); 67 currdriverstate != Adapter->DriverState ||
66 if(bInfinite == FALSE) 68 kthread_should_stop(),
69 msecs_to_jiffies(timeout));
70 if (bInfinite == FALSE)
67 num_of_time--; 71 num_of_time--;
68 } 72 }
69 return Status; 73 return Status;
@@ -71,19 +75,19 @@ static INT LED_Blink(PMINI_ADAPTER Adapter, UINT GPIO_Num, UCHAR uiLedIndex, ULO
71 75
72static INT ScaleRateofTransfer(ULONG rate) 76static INT ScaleRateofTransfer(ULONG rate)
73{ 77{
74 if(rate <= 3) 78 if (rate <= 3)
75 return rate; 79 return rate;
76 else if((rate > 3) && (rate <= 100)) 80 else if ((rate > 3) && (rate <= 100))
77 return 5; 81 return 5;
78 else if((rate > 100) && (rate <= 200)) 82 else if ((rate > 100) && (rate <= 200))
79 return 6; 83 return 6;
80 else if((rate > 200) && (rate <= 300)) 84 else if ((rate > 200) && (rate <= 300))
81 return 7; 85 return 7;
82 else if((rate > 300) && (rate <= 400)) 86 else if ((rate > 300) && (rate <= 400))
83 return 8; 87 return 8;
84 else if((rate > 400) && (rate <= 500)) 88 else if ((rate > 400) && (rate <= 500))
85 return 9; 89 return 9;
86 else if((rate > 500) && (rate <= 600)) 90 else if ((rate > 500) && (rate <= 600))
87 return 10; 91 return 10;
88 else 92 else
89 return MAX_NUM_OF_BLINKS; 93 return MAX_NUM_OF_BLINKS;
@@ -92,215 +96,232 @@ static INT ScaleRateofTransfer(ULONG rate)
92 96
93 97
94static INT LED_Proportional_Blink(PMINI_ADAPTER Adapter, UCHAR GPIO_Num_tx, 98static INT LED_Proportional_Blink(PMINI_ADAPTER Adapter, UCHAR GPIO_Num_tx,
95 UCHAR uiTxLedIndex, UCHAR GPIO_Num_rx, UCHAR uiRxLedIndex, LedEventInfo_t currdriverstate) 99 UCHAR uiTxLedIndex, UCHAR GPIO_Num_rx, UCHAR uiRxLedIndex,
100 LedEventInfo_t currdriverstate)
96{ 101{
97 /* Initial values of TX and RX packets*/ 102 /* Initial values of TX and RX packets */
98 ULONG64 Initial_num_of_packts_tx = 0, Initial_num_of_packts_rx = 0; 103 ULONG64 Initial_num_of_packts_tx = 0, Initial_num_of_packts_rx = 0;
99 /*values of TX and RX packets after 1 sec*/ 104 /* values of TX and RX packets after 1 sec */
100 ULONG64 Final_num_of_packts_tx = 0, Final_num_of_packts_rx = 0; 105 ULONG64 Final_num_of_packts_tx = 0, Final_num_of_packts_rx = 0;
101 /*Rate of transfer of Tx and Rx in 1 sec*/ 106 /* Rate of transfer of Tx and Rx in 1 sec */
102 ULONG64 rate_of_transfer_tx = 0, rate_of_transfer_rx = 0; 107 ULONG64 rate_of_transfer_tx = 0, rate_of_transfer_rx = 0;
103 int Status = STATUS_SUCCESS; 108 int Status = STATUS_SUCCESS;
104 INT num_of_time = 0, num_of_time_tx = 0, num_of_time_rx = 0; 109 INT num_of_time = 0, num_of_time_tx = 0, num_of_time_rx = 0;
105 UINT remDelay = 0; 110 UINT remDelay = 0;
106 BOOLEAN bBlinkBothLED = TRUE; 111 BOOLEAN bBlinkBothLED = TRUE;
107 //UINT GPIO_num = DISABLE_GPIO_NUM; 112 /* UINT GPIO_num = DISABLE_GPIO_NUM; */
108 ulong timeout = 0; 113 ulong timeout = 0;
109 114
110 /*Read initial value of packets sent/received */ 115 /* Read initial value of packets sent/received */
111 Initial_num_of_packts_tx = Adapter->dev->stats.tx_packets; 116 Initial_num_of_packts_tx = Adapter->dev->stats.tx_packets;
112 Initial_num_of_packts_rx = Adapter->dev->stats.rx_packets; 117 Initial_num_of_packts_rx = Adapter->dev->stats.rx_packets;
113 118
114 /*Scale the rate of transfer to no of blinks.*/ 119 /* Scale the rate of transfer to no of blinks. */
115 num_of_time_tx= ScaleRateofTransfer((ULONG)rate_of_transfer_tx); 120 num_of_time_tx = ScaleRateofTransfer((ULONG)rate_of_transfer_tx);
116 num_of_time_rx= ScaleRateofTransfer((ULONG)rate_of_transfer_rx); 121 num_of_time_rx = ScaleRateofTransfer((ULONG)rate_of_transfer_rx);
117 122
118 while((Adapter->device_removed == FALSE)) 123 while ((Adapter->device_removed == FALSE)) {
119 {
120 timeout = 50; 124 timeout = 50;
121 /*Blink Tx and Rx LED when both Tx and Rx is in normal bandwidth*/ 125 /*
122 if(bBlinkBothLED) 126 * Blink Tx and Rx LED when both Tx and Rx is
123 { 127 * in normal bandwidth
124 /*Assign minimum number of blinks of either Tx or Rx.*/ 128 */
125 if(num_of_time_tx > num_of_time_rx) 129 if (bBlinkBothLED) {
130 /*
131 * Assign minimum number of blinks of
132 * either Tx or Rx.
133 */
134 if (num_of_time_tx > num_of_time_rx)
126 num_of_time = num_of_time_rx; 135 num_of_time = num_of_time_rx;
127 else 136 else
128 num_of_time = num_of_time_tx; 137 num_of_time = num_of_time_tx;
129 if(num_of_time > 0) 138 if (num_of_time > 0) {
130 { 139 /* Blink both Tx and Rx LEDs */
131 /*Blink both Tx and Rx LEDs*/ 140 if (LED_Blink(Adapter, 1 << GPIO_Num_tx,
132 if(LED_Blink(Adapter, 1<<GPIO_Num_tx, uiTxLedIndex, timeout, num_of_time,currdriverstate) 141 uiTxLedIndex, timeout,
142 num_of_time, currdriverstate)
133 == EVENT_SIGNALED) 143 == EVENT_SIGNALED)
134 {
135 return EVENT_SIGNALED; 144 return EVENT_SIGNALED;
136 } 145
137 if(LED_Blink(Adapter, 1<<GPIO_Num_rx, uiRxLedIndex, timeout, num_of_time,currdriverstate) 146 if (LED_Blink(Adapter, 1 << GPIO_Num_rx,
147 uiRxLedIndex, timeout,
148 num_of_time, currdriverstate)
138 == EVENT_SIGNALED) 149 == EVENT_SIGNALED)
139 {
140 return EVENT_SIGNALED; 150 return EVENT_SIGNALED;
141 }
142 151
143 } 152 }
144 153
145 if(num_of_time == num_of_time_tx) 154 if (num_of_time == num_of_time_tx) {
146 { 155 /* Blink pending rate of Rx */
147 /*Blink pending rate of Rx*/ 156 if (LED_Blink(Adapter, (1 << GPIO_Num_rx),
148 if(LED_Blink(Adapter, (1 << GPIO_Num_rx), uiRxLedIndex, timeout, 157 uiRxLedIndex, timeout,
149 num_of_time_rx-num_of_time,currdriverstate) == EVENT_SIGNALED) 158 num_of_time_rx-num_of_time,
150 { 159 currdriverstate)
160 == EVENT_SIGNALED)
151 return EVENT_SIGNALED; 161 return EVENT_SIGNALED;
152 } 162
153 num_of_time = num_of_time_rx; 163 num_of_time = num_of_time_rx;
154 } 164 } else {
155 else 165 /* Blink pending rate of Tx */
156 { 166 if (LED_Blink(Adapter, 1 << GPIO_Num_tx,
157 /*Blink pending rate of Tx*/ 167 uiTxLedIndex, timeout,
158 if(LED_Blink(Adapter, 1<<GPIO_Num_tx, uiTxLedIndex, timeout, 168 num_of_time_tx-num_of_time,
159 num_of_time_tx-num_of_time,currdriverstate) == EVENT_SIGNALED) 169 currdriverstate)
160 { 170 == EVENT_SIGNALED)
161 return EVENT_SIGNALED; 171 return EVENT_SIGNALED;
162 } 172
163 num_of_time = num_of_time_tx; 173 num_of_time = num_of_time_tx;
164 } 174 }
165 } 175 } else {
166 else 176 if (num_of_time == num_of_time_tx) {
167 { 177 /* Blink pending rate of Rx */
168 if(num_of_time == num_of_time_tx) 178 if (LED_Blink(Adapter, 1 << GPIO_Num_tx,
169 { 179 uiTxLedIndex, timeout,
170 /*Blink pending rate of Rx*/ 180 num_of_time, currdriverstate)
171 if(LED_Blink(Adapter, 1<<GPIO_Num_tx, uiTxLedIndex, timeout, num_of_time,currdriverstate)
172 == EVENT_SIGNALED) 181 == EVENT_SIGNALED)
173 {
174 return EVENT_SIGNALED; 182 return EVENT_SIGNALED;
175 } 183 } else {
176 } 184 /* Blink pending rate of Tx */
177 else 185 if (LED_Blink(Adapter, 1 << GPIO_Num_rx,
178 { 186 uiRxLedIndex, timeout,
179 /*Blink pending rate of Tx*/ 187 num_of_time, currdriverstate)
180 if(LED_Blink(Adapter, 1<<GPIO_Num_rx, uiRxLedIndex, timeout, 188 == EVENT_SIGNALED)
181 num_of_time,currdriverstate) == EVENT_SIGNALED)
182 {
183 return EVENT_SIGNALED; 189 return EVENT_SIGNALED;
184 }
185 } 190 }
186 } 191 }
187 /* If Tx/Rx rate is less than maximum blinks per second, 192
188 * wait till delay completes to 1 second 193 /*
189 */ 194 * If Tx/Rx rate is less than maximum blinks per second,
195 * wait till delay completes to 1 second
196 */
190 remDelay = MAX_NUM_OF_BLINKS - num_of_time; 197 remDelay = MAX_NUM_OF_BLINKS - num_of_time;
191 if(remDelay > 0) 198 if (remDelay > 0) {
192 { 199 timeout = 100 * remDelay;
193 timeout= 100 * remDelay; 200 Status = wait_event_interruptible_timeout(
194 Status = wait_event_interruptible_timeout(Adapter->LEDInfo.notify_led_event, 201 Adapter->LEDInfo.notify_led_event,
195 currdriverstate!= Adapter->DriverState ||kthread_should_stop() , 202 currdriverstate != Adapter->DriverState
196 msecs_to_jiffies (timeout)); 203 || kthread_should_stop(),
197 204 msecs_to_jiffies(timeout));
198 if(kthread_should_stop()) 205
199 { 206 if (kthread_should_stop()) {
200 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL, "Led thread got signal to exit..hence exiting"); 207 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
201 Adapter->LEDInfo.led_thread_running= BCM_LED_THREAD_DISABLED; 208 LED_DUMP_INFO, DBG_LVL_ALL,
209 "Led thread got signal to exit..hence exiting");
210 Adapter->LEDInfo.led_thread_running =
211 BCM_LED_THREAD_DISABLED;
202 return EVENT_SIGNALED; 212 return EVENT_SIGNALED;
203 } 213 }
204 if(Status) 214 if (Status)
205 return EVENT_SIGNALED; 215 return EVENT_SIGNALED;
206 } 216 }
207 217
208 /*Turn off both Tx and Rx LEDs before next second*/ 218 /* Turn off both Tx and Rx LEDs before next second */
209 TURN_OFF_LED(1<<GPIO_Num_tx, uiTxLedIndex); 219 TURN_OFF_LED(1 << GPIO_Num_tx, uiTxLedIndex);
210 TURN_OFF_LED(1<<GPIO_Num_rx, uiTxLedIndex); 220 TURN_OFF_LED(1 << GPIO_Num_rx, uiTxLedIndex);
211 221
212 /* 222 /*
213 * Read the Tx & Rx packets transmission after 1 second and 223 * Read the Tx & Rx packets transmission after 1 second and
214 * calculate rate of transfer 224 * calculate rate of transfer
215 */ 225 */
216 Final_num_of_packts_tx = Adapter->dev->stats.tx_packets; 226 Final_num_of_packts_tx = Adapter->dev->stats.tx_packets;
217 Final_num_of_packts_rx = Adapter->dev->stats.rx_packets; 227 Final_num_of_packts_rx = Adapter->dev->stats.rx_packets;
218 228
219 rate_of_transfer_tx = Final_num_of_packts_tx - Initial_num_of_packts_tx; 229 rate_of_transfer_tx = Final_num_of_packts_tx -
220 rate_of_transfer_rx = Final_num_of_packts_rx - Initial_num_of_packts_rx; 230 Initial_num_of_packts_tx;
231 rate_of_transfer_rx = Final_num_of_packts_rx -
232 Initial_num_of_packts_rx;
221 233
222 /*Read initial value of packets sent/received */ 234 /* Read initial value of packets sent/received */
223 Initial_num_of_packts_tx = Final_num_of_packts_tx; 235 Initial_num_of_packts_tx = Final_num_of_packts_tx;
224 Initial_num_of_packts_rx = Final_num_of_packts_rx ; 236 Initial_num_of_packts_rx = Final_num_of_packts_rx;
225 237
226 /*Scale the rate of transfer to no of blinks.*/ 238 /* Scale the rate of transfer to no of blinks. */
227 num_of_time_tx= ScaleRateofTransfer((ULONG)rate_of_transfer_tx); 239 num_of_time_tx =
228 num_of_time_rx= ScaleRateofTransfer((ULONG)rate_of_transfer_rx); 240 ScaleRateofTransfer((ULONG)rate_of_transfer_tx);
241 num_of_time_rx =
242 ScaleRateofTransfer((ULONG)rate_of_transfer_rx);
229 243
230 } 244 }
231 return Status; 245 return Status;
232} 246}
233 247
234 248/*
235//----------------------------------------------------------------------------- 249 * -----------------------------------------------------------------------------
236// Procedure: ValidateDSDParamsChecksum 250 * Procedure: ValidateDSDParamsChecksum
237// 251 *
238// Description: Reads DSD Params and validates checkusm. 252 * Description: Reads DSD Params and validates checkusm.
239// 253 *
240// Arguments: 254 * Arguments:
241// Adapter - Pointer to Adapter structure. 255 * Adapter - Pointer to Adapter structure.
242// ulParamOffset - Start offset of the DSD parameter to be read and validated. 256 * ulParamOffset - Start offset of the DSD parameter to be read and
243// usParamLen - Length of the DSD Parameter. 257 * validated.
244// 258 * usParamLen - Length of the DSD Parameter.
245// Returns: 259 *
246// <OSAL_STATUS_CODE> 260 * Returns:
247//----------------------------------------------------------------------------- 261 * <OSAL_STATUS_CODE>
248 262 * -----------------------------------------------------------------------------
249static INT ValidateDSDParamsChecksum( 263 */
250 PMINI_ADAPTER Adapter, 264static INT ValidateDSDParamsChecksum(PMINI_ADAPTER Adapter, ULONG ulParamOffset,
251 ULONG ulParamOffset, 265 USHORT usParamLen)
252 USHORT usParamLen )
253{ 266{
254 INT Status = STATUS_SUCCESS; 267 INT Status = STATUS_SUCCESS;
255 PUCHAR puBuffer = NULL; 268 PUCHAR puBuffer = NULL;
256 USHORT usChksmOrg = 0; 269 USHORT usChksmOrg = 0;
257 USHORT usChecksumCalculated = 0; 270 USHORT usChecksumCalculated = 0;
258 271
259 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread:ValidateDSDParamsChecksum: 0x%lx 0x%X",ulParamOffset, usParamLen); 272 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
273 "LED Thread:ValidateDSDParamsChecksum: 0x%lx 0x%X",
274 ulParamOffset, usParamLen);
260 275
261 puBuffer = kmalloc(usParamLen, GFP_KERNEL); 276 puBuffer = kmalloc(usParamLen, GFP_KERNEL);
262 if(!puBuffer) 277 if (!puBuffer) {
263 { 278 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
264 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: ValidateDSDParamsChecksum Allocation failed"); 279 DBG_LVL_ALL,
280 "LED Thread: ValidateDSDParamsChecksum Allocation failed");
265 return -ENOMEM; 281 return -ENOMEM;
266 282
267 } 283 }
268 284
269 // 285 /* Read the DSD data from the parameter offset. */
270 // Read the DSD data from the parameter offset. 286 if (STATUS_SUCCESS != BeceemNVMRead(Adapter, (PUINT)puBuffer,
271 // 287 ulParamOffset, usParamLen)) {
272 if(STATUS_SUCCESS != BeceemNVMRead(Adapter,(PUINT)puBuffer,ulParamOffset,usParamLen)) 288 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
273 { 289 DBG_LVL_ALL,
274 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: ValidateDSDParamsChecksum BeceemNVMRead failed"); 290 "LED Thread: ValidateDSDParamsChecksum BeceemNVMRead failed");
275 Status=STATUS_IMAGE_CHECKSUM_MISMATCH; 291 Status = STATUS_IMAGE_CHECKSUM_MISMATCH;
276 goto exit; 292 goto exit;
277 } 293 }
278 294
279 // 295 /* Calculate the checksum of the data read from the DSD parameter. */
280 // Calculate the checksum of the data read from the DSD parameter. 296 usChecksumCalculated = CFG_CalculateChecksum(puBuffer, usParamLen);
281 // 297 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
282 usChecksumCalculated = CFG_CalculateChecksum(puBuffer,usParamLen); 298 "LED Thread: usCheckSumCalculated = 0x%x\n",
283 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: usCheckSumCalculated = 0x%x\n", usChecksumCalculated); 299 usChecksumCalculated);
284 300
285 // 301 /*
286 // End of the DSD parameter will have a TWO bytes checksum stored in it. Read it and compare with the calculated 302 * End of the DSD parameter will have a TWO bytes checksum stored in it.
287 // Checksum. 303 * Read it and compare with the calculated Checksum.
288 // 304 */
289 if(STATUS_SUCCESS != BeceemNVMRead(Adapter,(PUINT)&usChksmOrg,ulParamOffset+usParamLen,2)) 305 if (STATUS_SUCCESS != BeceemNVMRead(Adapter, (PUINT)&usChksmOrg,
290 { 306 ulParamOffset+usParamLen, 2)) {
291 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: ValidateDSDParamsChecksum BeceemNVMRead failed"); 307 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
292 Status=STATUS_IMAGE_CHECKSUM_MISMATCH; 308 DBG_LVL_ALL,
309 "LED Thread: ValidateDSDParamsChecksum BeceemNVMRead failed");
310 Status = STATUS_IMAGE_CHECKSUM_MISMATCH;
293 goto exit; 311 goto exit;
294 } 312 }
295 usChksmOrg = ntohs(usChksmOrg); 313 usChksmOrg = ntohs(usChksmOrg);
296 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: usChksmOrg = 0x%x", usChksmOrg); 314 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
297 315 "LED Thread: usChksmOrg = 0x%x", usChksmOrg);
298 // 316
299 // Compare the checksum calculated with the checksum read from DSD section 317 /*
300 // 318 * Compare the checksum calculated with the checksum read
301 if(usChecksumCalculated ^ usChksmOrg) 319 * from DSD section
302 { 320 */
303 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: ValidateDSDParamsChecksum: Checksums don't match"); 321 if (usChecksumCalculated ^ usChksmOrg) {
322 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
323 DBG_LVL_ALL,
324 "LED Thread: ValidateDSDParamsChecksum: Checksums don't match");
304 Status = STATUS_IMAGE_CHECKSUM_MISMATCH; 325 Status = STATUS_IMAGE_CHECKSUM_MISMATCH;
305 goto exit; 326 goto exit;
306 } 327 }
@@ -311,523 +332,526 @@ exit:
311} 332}
312 333
313 334
314//----------------------------------------------------------------------------- 335/*
315// Procedure: ValidateHWParmStructure 336 * -----------------------------------------------------------------------------
316// 337 * Procedure: ValidateHWParmStructure
317// Description: Validates HW Parameters. 338 *
318// 339 * Description: Validates HW Parameters.
319// Arguments: 340 *
320// Adapter - Pointer to Adapter structure. 341 * Arguments:
321// ulHwParamOffset - Start offset of the HW parameter Section to be read and validated. 342 * Adapter - Pointer to Adapter structure.
322// 343 * ulHwParamOffset - Start offset of the HW parameter Section to be read
323// Returns: 344 * and validated.
324// <OSAL_STATUS_CODE> 345 *
325//----------------------------------------------------------------------------- 346 * Returns:
326 347 * <OSAL_STATUS_CODE>
348 * -----------------------------------------------------------------------------
349 */
327static INT ValidateHWParmStructure(PMINI_ADAPTER Adapter, ULONG ulHwParamOffset) 350static INT ValidateHWParmStructure(PMINI_ADAPTER Adapter, ULONG ulHwParamOffset)
328{ 351{
329 352
330 INT Status = STATUS_SUCCESS ; 353 INT Status = STATUS_SUCCESS;
331 USHORT HwParamLen = 0; 354 USHORT HwParamLen = 0;
332 // Add DSD start offset to the hwParamOffset to get the actual address. 355 /*
356 * Add DSD start offset to the hwParamOffset to get
357 * the actual address.
358 */
333 ulHwParamOffset += DSD_START_OFFSET; 359 ulHwParamOffset += DSD_START_OFFSET;
334 360
335 /*Read the Length of HW_PARAM structure*/ 361 /* Read the Length of HW_PARAM structure */
336 BeceemNVMRead(Adapter,(PUINT)&HwParamLen,ulHwParamOffset,2); 362 BeceemNVMRead(Adapter, (PUINT)&HwParamLen, ulHwParamOffset, 2);
337 HwParamLen = ntohs(HwParamLen); 363 HwParamLen = ntohs(HwParamLen);
338 if(0==HwParamLen || HwParamLen > Adapter->uiNVMDSDSize) 364 if (0 == HwParamLen || HwParamLen > Adapter->uiNVMDSDSize)
339 {
340 return STATUS_IMAGE_CHECKSUM_MISMATCH; 365 return STATUS_IMAGE_CHECKSUM_MISMATCH;
341 }
342 366
343 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL, "LED Thread:HwParamLen = 0x%x", HwParamLen); 367 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
344 Status =ValidateDSDParamsChecksum(Adapter,ulHwParamOffset,HwParamLen); 368 "LED Thread:HwParamLen = 0x%x", HwParamLen);
369 Status = ValidateDSDParamsChecksum(Adapter, ulHwParamOffset,
370 HwParamLen);
345 return Status; 371 return Status;
346} /* ValidateHWParmStructure() */ 372} /* ValidateHWParmStructure() */
347 373
348static int ReadLEDInformationFromEEPROM(PMINI_ADAPTER Adapter, UCHAR GPIO_Array[]) 374static int ReadLEDInformationFromEEPROM(PMINI_ADAPTER Adapter,
375 UCHAR GPIO_Array[])
349{ 376{
350 int Status = STATUS_SUCCESS; 377 int Status = STATUS_SUCCESS;
351 378
352 ULONG dwReadValue = 0; 379 ULONG dwReadValue = 0;
353 USHORT usHwParamData = 0; 380 USHORT usHwParamData = 0;
354 USHORT usEEPROMVersion = 0; 381 USHORT usEEPROMVersion = 0;
355 UCHAR ucIndex = 0; 382 UCHAR ucIndex = 0;
356 UCHAR ucGPIOInfo[32] = {0}; 383 UCHAR ucGPIOInfo[32] = {0};
357 384
358 BeceemNVMRead(Adapter,(PUINT)&usEEPROMVersion,EEPROM_VERSION_OFFSET,2); 385 BeceemNVMRead(Adapter, (PUINT)&usEEPROMVersion,
386 EEPROM_VERSION_OFFSET, 2);
359 387
360 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"usEEPROMVersion: Minor:0x%X Major:0x%x",usEEPROMVersion&0xFF, ((usEEPROMVersion>>8)&0xFF)); 388 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
389 "usEEPROMVersion: Minor:0x%X Major:0x%x",
390 usEEPROMVersion&0xFF, ((usEEPROMVersion>>8)&0xFF));
361 391
362 392
363 if(((usEEPROMVersion>>8)&0xFF) < EEPROM_MAP5_MAJORVERSION) 393 if (((usEEPROMVersion>>8)&0xFF) < EEPROM_MAP5_MAJORVERSION) {
364 { 394 BeceemNVMRead(Adapter, (PUINT)&usHwParamData,
365 BeceemNVMRead(Adapter,(PUINT)&usHwParamData,EEPROM_HW_PARAM_POINTER_ADDRESS,2); 395 EEPROM_HW_PARAM_POINTER_ADDRESS, 2);
366 usHwParamData = ntohs(usHwParamData); 396 usHwParamData = ntohs(usHwParamData);
367 dwReadValue = usHwParamData; 397 dwReadValue = usHwParamData;
368 } 398 } else {
369 else 399 /*
370 { 400 * Validate Compatibility section and then read HW param
371 // 401 * if compatibility section is valid.
372 // Validate Compatibility section and then read HW param if compatibility section is valid. 402 */
373 //
374 Status = ValidateDSDParamsChecksum(Adapter, 403 Status = ValidateDSDParamsChecksum(Adapter,
375 DSD_START_OFFSET, 404 DSD_START_OFFSET,
376 COMPATIBILITY_SECTION_LENGTH_MAP5); 405 COMPATIBILITY_SECTION_LENGTH_MAP5);
377 406
378 if(Status != STATUS_SUCCESS) 407 if (Status != STATUS_SUCCESS)
379 {
380 return Status; 408 return Status;
381 } 409
382 BeceemNVMRead(Adapter,(PUINT)&dwReadValue,EEPROM_HW_PARAM_POINTER_ADDRRES_MAP5,4); 410 BeceemNVMRead(Adapter, (PUINT)&dwReadValue,
411 EEPROM_HW_PARAM_POINTER_ADDRRES_MAP5, 4);
383 dwReadValue = ntohl(dwReadValue); 412 dwReadValue = ntohl(dwReadValue);
384 } 413 }
385 414
386 415
387 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: Start address of HW_PARAM structure = 0x%lx",dwReadValue); 416 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
417 "LED Thread: Start address of HW_PARAM structure = 0x%lx",
418 dwReadValue);
388 419
389 // 420 /*
390 // Validate if the address read out is within the DSD. 421 * Validate if the address read out is within the DSD.
391 // Adapter->uiNVMDSDSize gives whole DSD size inclusive of Autoinit. 422 * Adapter->uiNVMDSDSize gives whole DSD size inclusive of Autoinit.
392 // lower limit should be above DSD_START_OFFSET and 423 * lower limit should be above DSD_START_OFFSET and
393 // upper limit should be below (Adapter->uiNVMDSDSize-DSD_START_OFFSET) 424 * upper limit should be below (Adapter->uiNVMDSDSize-DSD_START_OFFSET)
394 // 425 */
395 if(dwReadValue < DSD_START_OFFSET || 426 if (dwReadValue < DSD_START_OFFSET ||
396 dwReadValue > (Adapter->uiNVMDSDSize-DSD_START_OFFSET)) 427 dwReadValue > (Adapter->uiNVMDSDSize-DSD_START_OFFSET))
397 {
398 return STATUS_IMAGE_CHECKSUM_MISMATCH; 428 return STATUS_IMAGE_CHECKSUM_MISMATCH;
399 }
400 429
401 Status = ValidateHWParmStructure(Adapter, dwReadValue); 430 Status = ValidateHWParmStructure(Adapter, dwReadValue);
402 if(Status){ 431 if (Status)
403 return Status; 432 return Status;
404 }
405 433
406 /* 434 /*
407 Add DSD_START_OFFSET to the offset read from the EEPROM. 435 * Add DSD_START_OFFSET to the offset read from the EEPROM.
408 This will give the actual start HW Parameters start address. 436 * This will give the actual start HW Parameters start address.
409 To read GPIO section, add GPIO offset further. 437 * To read GPIO section, add GPIO offset further.
410 */ 438 */
411 439
412 dwReadValue += DSD_START_OFFSET; // = start address of hw param section. 440 dwReadValue +=
413 dwReadValue += GPIO_SECTION_START_OFFSET; // = GPIO start offset within HW Param section. 441 DSD_START_OFFSET; /* = start address of hw param section. */
414 442 dwReadValue += GPIO_SECTION_START_OFFSET;
415 /* Read the GPIO values for 32 GPIOs from EEPROM and map the function 443 /* = GPIO start offset within HW Param section. */
416 * number to GPIO pin number to GPIO_Array
417 */
418 BeceemNVMRead(Adapter, (UINT *)ucGPIOInfo,dwReadValue,32);
419 for(ucIndex = 0; ucIndex < 32; ucIndex++)
420 {
421
422 switch(ucGPIOInfo[ucIndex])
423 {
424 case RED_LED:
425 {
426 GPIO_Array[RED_LED] = ucIndex;
427 Adapter->gpioBitMap |= (1<<ucIndex);
428 break;
429 }
430 case BLUE_LED:
431 {
432 GPIO_Array[BLUE_LED] = ucIndex;
433 Adapter->gpioBitMap |= (1<<ucIndex);
434 break;
435 }
436 case YELLOW_LED:
437 {
438 GPIO_Array[YELLOW_LED] = ucIndex;
439 Adapter->gpioBitMap |= (1<<ucIndex);
440 break;
441 }
442 case GREEN_LED:
443 {
444 GPIO_Array[GREEN_LED] = ucIndex;
445 Adapter->gpioBitMap |= (1<<ucIndex);
446 break;
447 }
448 default:
449 break;
450 }
451 444
445 /*
446 * Read the GPIO values for 32 GPIOs from EEPROM and map the function
447 * number to GPIO pin number to GPIO_Array
448 */
449 BeceemNVMRead(Adapter, (UINT *)ucGPIOInfo, dwReadValue, 32);
450 for (ucIndex = 0; ucIndex < 32; ucIndex++) {
451
452 switch (ucGPIOInfo[ucIndex]) {
453 case RED_LED:
454 GPIO_Array[RED_LED] = ucIndex;
455 Adapter->gpioBitMap |= (1 << ucIndex);
456 break;
457 case BLUE_LED:
458 GPIO_Array[BLUE_LED] = ucIndex;
459 Adapter->gpioBitMap |= (1 << ucIndex);
460 break;
461 case YELLOW_LED:
462 GPIO_Array[YELLOW_LED] = ucIndex;
463 Adapter->gpioBitMap |= (1 << ucIndex);
464 break;
465 case GREEN_LED:
466 GPIO_Array[GREEN_LED] = ucIndex;
467 Adapter->gpioBitMap |= (1 << ucIndex);
468 break;
469 default:
470 break;
452 } 471 }
453 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"GPIO's bit map correspond to LED :0x%X",Adapter->gpioBitMap); 472
454 return Status; 473 }
474 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
475 "GPIO's bit map correspond to LED :0x%X", Adapter->gpioBitMap);
476 return Status;
455} 477}
456 478
457 479
458static int ReadConfigFileStructure(PMINI_ADAPTER Adapter, BOOLEAN *bEnableThread) 480static int ReadConfigFileStructure(PMINI_ADAPTER Adapter,
481 BOOLEAN *bEnableThread)
459{ 482{
460 int Status = STATUS_SUCCESS; 483 int Status = STATUS_SUCCESS;
461 UCHAR GPIO_Array[NUM_OF_LEDS+1]; /*Array to store GPIO numbers from EEPROM*/ 484 /* Array to store GPIO numbers from EEPROM */
485 UCHAR GPIO_Array[NUM_OF_LEDS+1];
462 UINT uiIndex = 0; 486 UINT uiIndex = 0;
463 UINT uiNum_of_LED_Type = 0; 487 UINT uiNum_of_LED_Type = 0;
464 PUCHAR puCFGData = NULL; 488 PUCHAR puCFGData = NULL;
465 UCHAR bData = 0; 489 UCHAR bData = 0;
466 memset(GPIO_Array, DISABLE_GPIO_NUM, NUM_OF_LEDS+1); 490 memset(GPIO_Array, DISABLE_GPIO_NUM, NUM_OF_LEDS+1);
467 491
468 if(!Adapter->pstargetparams || IS_ERR(Adapter->pstargetparams)) 492 if (!Adapter->pstargetparams || IS_ERR(Adapter->pstargetparams)) {
469 { 493 BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
470 BCM_DEBUG_PRINT (Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL, "Target Params not Avail.\n"); 494 DBG_LVL_ALL, "Target Params not Avail.\n");
471 return -ENOENT; 495 return -ENOENT;
472 } 496 }
473 497
474 /*Populate GPIO_Array with GPIO numbers for LED functions*/ 498 /* Populate GPIO_Array with GPIO numbers for LED functions */
475 /*Read the GPIO numbers from EEPROM*/ 499 /* Read the GPIO numbers from EEPROM */
476 Status = ReadLEDInformationFromEEPROM(Adapter, GPIO_Array); 500 Status = ReadLEDInformationFromEEPROM(Adapter, GPIO_Array);
477 if(Status == STATUS_IMAGE_CHECKSUM_MISMATCH) 501 if (Status == STATUS_IMAGE_CHECKSUM_MISMATCH) {
478 {
479 *bEnableThread = FALSE; 502 *bEnableThread = FALSE;
480 return STATUS_SUCCESS; 503 return STATUS_SUCCESS;
481 } 504 } else if (Status) {
482 else if(Status)
483 {
484 *bEnableThread = FALSE; 505 *bEnableThread = FALSE;
485 return Status; 506 return Status;
486 } 507 }
487 /* 508
488 * CONFIG file read successfully. Deallocate the memory of 509 /*
489 * uiFileNameBufferSize 510 * CONFIG file read successfully. Deallocate the memory of
490 */ 511 * uiFileNameBufferSize
491 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: Config file read successfully\n"); 512 */
513 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,
514 "LED Thread: Config file read successfully\n");
492 puCFGData = (PUCHAR) &Adapter->pstargetparams->HostDrvrConfig1; 515 puCFGData = (PUCHAR) &Adapter->pstargetparams->HostDrvrConfig1;
493 516
494 /* 517 /*
495 * Offset for HostDrvConfig1, HostDrvConfig2, HostDrvConfig3 which 518 * Offset for HostDrvConfig1, HostDrvConfig2, HostDrvConfig3 which
496 * will have the information of LED type, LED on state for different 519 * will have the information of LED type, LED on state for different
497 * driver state and LED blink state. 520 * driver state and LED blink state.
498 */ 521 */
499 522
500 for(uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) 523 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
501 {
502 bData = *puCFGData; 524 bData = *puCFGData;
503 525
504 /*Check Bit 8 for polarity. If it is set, polarity is reverse polarity*/ 526 /*
505 if(bData & 0x80) 527 * Check Bit 8 for polarity. If it is set,
506 { 528 * polarity is reverse polarity
529 */
530 if (bData & 0x80) {
507 Adapter->LEDInfo.LEDState[uiIndex].BitPolarity = 0; 531 Adapter->LEDInfo.LEDState[uiIndex].BitPolarity = 0;
508 /*unset the bit 8*/ 532 /* unset the bit 8 */
509 bData = bData & 0x7f; 533 bData = bData & 0x7f;
510 } 534 }
511 535
512 Adapter->LEDInfo.LEDState[uiIndex].LED_Type = bData; 536 Adapter->LEDInfo.LEDState[uiIndex].LED_Type = bData;
513 if(bData <= NUM_OF_LEDS) 537 if (bData <= NUM_OF_LEDS)
514 Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num = GPIO_Array[bData]; 538 Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num =
539 GPIO_Array[bData];
515 else 540 else
516 Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num = DISABLE_GPIO_NUM; 541 Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num =
542 DISABLE_GPIO_NUM;
517 543
518 puCFGData++; 544 puCFGData++;
519 bData = *puCFGData; 545 bData = *puCFGData;
520 Adapter->LEDInfo.LEDState[uiIndex].LED_On_State = bData; 546 Adapter->LEDInfo.LEDState[uiIndex].LED_On_State = bData;
521 puCFGData++; 547 puCFGData++;
522 bData = *puCFGData; 548 bData = *puCFGData;
523 Adapter->LEDInfo.LEDState[uiIndex].LED_Blink_State= bData; 549 Adapter->LEDInfo.LEDState[uiIndex].LED_Blink_State = bData;
524 puCFGData++; 550 puCFGData++;
525 } 551 }
526 552
527 /*Check if all the LED settings are disabled. If it is disabled, dont launch the LED control thread.*/ 553 /*
528 for(uiIndex = 0; uiIndex<NUM_OF_LEDS; uiIndex++) 554 * Check if all the LED settings are disabled. If it is disabled,
529 { 555 * dont launch the LED control thread.
530 if((Adapter->LEDInfo.LEDState[uiIndex].LED_Type == DISABLE_GPIO_NUM) || 556 */
531 (Adapter->LEDInfo.LEDState[uiIndex].LED_Type == 0x7f) || 557 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
558 if ((Adapter->LEDInfo.LEDState[uiIndex].LED_Type == DISABLE_GPIO_NUM) ||
559 (Adapter->LEDInfo.LEDState[uiIndex].LED_Type == 0x7f) ||
532 (Adapter->LEDInfo.LEDState[uiIndex].LED_Type == 0)) 560 (Adapter->LEDInfo.LEDState[uiIndex].LED_Type == 0))
533 uiNum_of_LED_Type++; 561 uiNum_of_LED_Type++;
534 } 562 }
535 if(uiNum_of_LED_Type >= NUM_OF_LEDS) 563 if (uiNum_of_LED_Type >= NUM_OF_LEDS)
536 *bEnableThread = FALSE; 564 *bEnableThread = FALSE;
537 565
538 return Status; 566 return Status;
539} 567}
540//--------------------------------------------------------------------------
541// Procedure: LedGpioInit
542//
543// Description: Initializes LED GPIOs. Makes the LED GPIOs to OUTPUT mode and make the
544// initial state to be OFF.
545//
546// Arguments:
547// Adapter - Pointer to MINI_ADAPTER structure.
548//
549// Returns: VOID
550//
551//-----------------------------------------------------------------------------
552 568
569/*
570 * -----------------------------------------------------------------------------
571 * Procedure: LedGpioInit
572 *
573 * Description: Initializes LED GPIOs. Makes the LED GPIOs to OUTPUT mode
574 * and make the initial state to be OFF.
575 *
576 * Arguments:
577 * Adapter - Pointer to MINI_ADAPTER structure.
578 *
579 * Returns: VOID
580 *
581 * -----------------------------------------------------------------------------
582 */
553static VOID LedGpioInit(PMINI_ADAPTER Adapter) 583static VOID LedGpioInit(PMINI_ADAPTER Adapter)
554{ 584{
555 UINT uiResetValue = 0; 585 UINT uiResetValue = 0;
556 UINT uiIndex = 0; 586 UINT uiIndex = 0;
557 587
558 /* Set all LED GPIO Mode to output mode */ 588 /* Set all LED GPIO Mode to output mode */
559 if(rdmalt(Adapter, GPIO_MODE_REGISTER, &uiResetValue, sizeof(uiResetValue)) <0) 589 if (rdmalt(Adapter, GPIO_MODE_REGISTER, &uiResetValue,
560 BCM_DEBUG_PRINT (Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: RDM Failed\n"); 590 sizeof(uiResetValue)) < 0)
561 for(uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) 591 BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
562 { 592 DBG_LVL_ALL, "LED Thread: RDM Failed\n");
563 if(Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != DISABLE_GPIO_NUM) 593 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
594 if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num !=
595 DISABLE_GPIO_NUM)
564 uiResetValue |= (1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num); 596 uiResetValue |= (1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num);
565 TURN_OFF_LED(1<<Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num,uiIndex); 597 TURN_OFF_LED(1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num,
598 uiIndex);
566 } 599 }
567 if(wrmalt(Adapter, GPIO_MODE_REGISTER, &uiResetValue, sizeof(uiResetValue)) < 0) 600 if (wrmalt(Adapter, GPIO_MODE_REGISTER, &uiResetValue,
568 BCM_DEBUG_PRINT (Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: WRM Failed\n"); 601 sizeof(uiResetValue)) < 0)
602 BCM_DEBUG_PRINT (Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
603 DBG_LVL_ALL, "LED Thread: WRM Failed\n");
569 604
570 Adapter->LEDInfo.bIdle_led_off = FALSE; 605 Adapter->LEDInfo.bIdle_led_off = FALSE;
571} 606}
572//-----------------------------------------------------------------------------
573 607
574static INT BcmGetGPIOPinInfo(PMINI_ADAPTER Adapter, UCHAR *GPIO_num_tx, UCHAR *GPIO_num_rx ,UCHAR *uiLedTxIndex, UCHAR *uiLedRxIndex,LedEventInfo_t currdriverstate) 608static INT BcmGetGPIOPinInfo(PMINI_ADAPTER Adapter, UCHAR *GPIO_num_tx,
609 UCHAR *GPIO_num_rx, UCHAR *uiLedTxIndex, UCHAR *uiLedRxIndex,
610 LedEventInfo_t currdriverstate)
575{ 611{
576 UINT uiIndex = 0; 612 UINT uiIndex = 0;
577 613
578 *GPIO_num_tx = DISABLE_GPIO_NUM; 614 *GPIO_num_tx = DISABLE_GPIO_NUM;
579 *GPIO_num_rx = DISABLE_GPIO_NUM; 615 *GPIO_num_rx = DISABLE_GPIO_NUM;
580 616
581 for(uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) 617 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
582 {
583 618
584 if((currdriverstate == NORMAL_OPERATION)|| 619 if ((currdriverstate == NORMAL_OPERATION) ||
585 (currdriverstate == IDLEMODE_EXIT)|| 620 (currdriverstate == IDLEMODE_EXIT) ||
586 (currdriverstate == FW_DOWNLOAD)) 621 (currdriverstate == FW_DOWNLOAD)) {
587 { 622 if (Adapter->LEDInfo.LEDState[uiIndex].LED_Blink_State &
588 if(Adapter->LEDInfo.LEDState[uiIndex].LED_Blink_State & currdriverstate) 623 currdriverstate) {
589 { 624 if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
590 if(Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != DISABLE_GPIO_NUM) 625 != DISABLE_GPIO_NUM) {
591 { 626 if (*GPIO_num_tx == DISABLE_GPIO_NUM) {
592 if(*GPIO_num_tx == DISABLE_GPIO_NUM)
593 {
594 *GPIO_num_tx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num; 627 *GPIO_num_tx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num;
595 *uiLedTxIndex = uiIndex; 628 *uiLedTxIndex = uiIndex;
596 } 629 } else {
597 else
598 {
599 *GPIO_num_rx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num; 630 *GPIO_num_rx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num;
600 *uiLedRxIndex = uiIndex; 631 *uiLedRxIndex = uiIndex;
601 } 632 }
602 } 633 }
603 } 634 }
604 } 635 } else {
605 else 636 if (Adapter->LEDInfo.LEDState[uiIndex].LED_On_State
606 { 637 & currdriverstate) {
607 if(Adapter->LEDInfo.LEDState[uiIndex].LED_On_State & currdriverstate) 638 if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
608 { 639 != DISABLE_GPIO_NUM) {
609 if(Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != DISABLE_GPIO_NUM)
610 {
611 *GPIO_num_tx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num; 640 *GPIO_num_tx = Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num;
612 *uiLedTxIndex = uiIndex; 641 *uiLedTxIndex = uiIndex;
613 } 642 }
614 } 643 }
615 } 644 }
616 } 645 }
617 return STATUS_SUCCESS ; 646 return STATUS_SUCCESS;
618} 647}
619static VOID LEDControlThread(PMINI_ADAPTER Adapter) 648static VOID LEDControlThread(PMINI_ADAPTER Adapter)
620{ 649{
621 UINT uiIndex = 0; 650 UINT uiIndex = 0;
622 UCHAR GPIO_num = 0; 651 UCHAR GPIO_num = 0;
623 UCHAR uiLedIndex = 0 ; 652 UCHAR uiLedIndex = 0;
624 UINT uiResetValue = 0; 653 UINT uiResetValue = 0;
625 LedEventInfo_t currdriverstate = 0; 654 LedEventInfo_t currdriverstate = 0;
626 ulong timeout = 0; 655 ulong timeout = 0;
627 656
628 INT Status = 0; 657 INT Status = 0;
629 658
630 UCHAR dummyGPIONum = 0; 659 UCHAR dummyGPIONum = 0;
631 UCHAR dummyIndex = 0; 660 UCHAR dummyIndex = 0;
632 661
633 //currdriverstate = Adapter->DriverState; 662 /* currdriverstate = Adapter->DriverState; */
634 Adapter->LEDInfo.bIdleMode_tx_from_host = FALSE; 663 Adapter->LEDInfo.bIdleMode_tx_from_host = FALSE;
635 664
636 /*Wait till event is triggered*/ 665 /*
637 //wait_event(Adapter->LEDInfo.notify_led_event, 666 * Wait till event is triggered
638 // currdriverstate!= Adapter->DriverState); 667 *
668 * wait_event(Adapter->LEDInfo.notify_led_event,
669 * currdriverstate!= Adapter->DriverState);
670 */
639 671
640 GPIO_num = DISABLE_GPIO_NUM ; 672 GPIO_num = DISABLE_GPIO_NUM;
641 673
642 while(TRUE) 674 while (TRUE) {
643 { 675 /* Wait till event is triggered */
644 /*Wait till event is triggered*/ 676 if ((GPIO_num == DISABLE_GPIO_NUM)
645 if( (GPIO_num == DISABLE_GPIO_NUM)
646 || 677 ||
647 ((currdriverstate != FW_DOWNLOAD) && 678 ((currdriverstate != FW_DOWNLOAD) &&
648 (currdriverstate != NORMAL_OPERATION) && 679 (currdriverstate != NORMAL_OPERATION) &&
649 (currdriverstate != LOWPOWER_MODE_ENTER)) 680 (currdriverstate != LOWPOWER_MODE_ENTER))
650 || 681 ||
651 (currdriverstate == LED_THREAD_INACTIVE) ) 682 (currdriverstate == LED_THREAD_INACTIVE))
652 { 683 Status = wait_event_interruptible(
653 Status = wait_event_interruptible(Adapter->LEDInfo.notify_led_event, 684 Adapter->LEDInfo.notify_led_event,
654 currdriverstate != Adapter->DriverState || kthread_should_stop()); 685 currdriverstate != Adapter->DriverState
655 } 686 || kthread_should_stop());
656 687
657 if(kthread_should_stop() || Adapter->device_removed ) 688 if (kthread_should_stop() || Adapter->device_removed) {
658 { 689 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
659 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL, "Led thread got signal to exit..hence exiting"); 690 DBG_LVL_ALL,
660 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_DISABLED; 691 "Led thread got signal to exit..hence exiting");
661 TURN_OFF_LED(1<<GPIO_num, uiLedIndex); 692 Adapter->LEDInfo.led_thread_running =
662 return ;//STATUS_FAILURE; 693 BCM_LED_THREAD_DISABLED;
694 TURN_OFF_LED(1 << GPIO_num, uiLedIndex);
695 return; /* STATUS_FAILURE; */
663 } 696 }
664 697
665 if(GPIO_num != DISABLE_GPIO_NUM) 698 if (GPIO_num != DISABLE_GPIO_NUM)
666 { 699 TURN_OFF_LED(1 << GPIO_num, uiLedIndex);
667 TURN_OFF_LED(1<<GPIO_num, uiLedIndex);
668 }
669 700
670 if(Adapter->LEDInfo.bLedInitDone == FALSE) 701 if (Adapter->LEDInfo.bLedInitDone == FALSE) {
671 {
672 LedGpioInit(Adapter); 702 LedGpioInit(Adapter);
673 Adapter->LEDInfo.bLedInitDone = TRUE; 703 Adapter->LEDInfo.bLedInitDone = TRUE;
674 } 704 }
675 705
676 switch(Adapter->DriverState) 706 switch (Adapter->DriverState) {
677 { 707 case DRIVER_INIT:
678 case DRIVER_INIT: 708 currdriverstate = DRIVER_INIT;
679 { 709 /* Adapter->DriverState; */
680 currdriverstate = DRIVER_INIT;//Adapter->DriverState; 710 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
681 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum, &uiLedIndex, &dummyIndex, currdriverstate); 711 &uiLedIndex, &dummyIndex, currdriverstate);
712
713 if (GPIO_num != DISABLE_GPIO_NUM)
714 TURN_ON_LED(1 << GPIO_num, uiLedIndex);
682 715
683 if(GPIO_num != DISABLE_GPIO_NUM)
684 {
685 TURN_ON_LED(1<<GPIO_num, uiLedIndex);
686 }
687 }
688 break; 716 break;
689 case FW_DOWNLOAD: 717 case FW_DOWNLOAD:
690 { 718 /*
691 //BCM_DEBUG_PRINT (Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: FW_DN_DONE called\n"); 719 * BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
692 currdriverstate = FW_DOWNLOAD; 720 * LED_DUMP_INFO, DBG_LVL_ALL,
693 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum, &uiLedIndex, &dummyIndex, currdriverstate); 721 * "LED Thread: FW_DN_DONE called\n");
694 722 */
695 if(GPIO_num != DISABLE_GPIO_NUM) 723 currdriverstate = FW_DOWNLOAD;
696 { 724 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
697 timeout = 50; 725 &uiLedIndex, &dummyIndex, currdriverstate);
698 LED_Blink(Adapter, 1<<GPIO_num, uiLedIndex, timeout, -1,currdriverstate); 726
699 } 727 if (GPIO_num != DISABLE_GPIO_NUM) {
728 timeout = 50;
729 LED_Blink(Adapter, 1 << GPIO_num, uiLedIndex,
730 timeout, -1, currdriverstate);
700 } 731 }
701 break; 732 break;
702 case FW_DOWNLOAD_DONE: 733 case FW_DOWNLOAD_DONE:
703 { 734 currdriverstate = FW_DOWNLOAD_DONE;
704 currdriverstate = FW_DOWNLOAD_DONE; 735 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
705 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum, &uiLedIndex, &dummyIndex,currdriverstate); 736 &uiLedIndex, &dummyIndex, currdriverstate);
706 if(GPIO_num != DISABLE_GPIO_NUM) 737 if (GPIO_num != DISABLE_GPIO_NUM)
707 { 738 TURN_ON_LED(1 << GPIO_num, uiLedIndex);
708 TURN_ON_LED(1<<GPIO_num, uiLedIndex);
709 }
710 }
711 break; 739 break;
712 740
713 case SHUTDOWN_EXIT: 741 case SHUTDOWN_EXIT:
714 //no break, continue to NO_NETWORK_ENTRY state as well. 742 /*
715 743 * no break, continue to NO_NETWORK_ENTRY
716 case NO_NETWORK_ENTRY: 744 * state as well.
717 { 745 */
718 currdriverstate = NO_NETWORK_ENTRY; 746 case NO_NETWORK_ENTRY:
719 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum, &uiLedIndex,&dummyGPIONum,currdriverstate); 747 currdriverstate = NO_NETWORK_ENTRY;
720 if(GPIO_num != DISABLE_GPIO_NUM) 748 BcmGetGPIOPinInfo(Adapter, &GPIO_num, &dummyGPIONum,
721 { 749 &uiLedIndex, &dummyGPIONum, currdriverstate);
722 TURN_ON_LED(1<<GPIO_num, uiLedIndex); 750 if (GPIO_num != DISABLE_GPIO_NUM)
723 } 751 TURN_ON_LED(1 << GPIO_num, uiLedIndex);
724 }
725 break; 752 break;
726 case NORMAL_OPERATION: 753 case NORMAL_OPERATION:
727 { 754 {
728 UCHAR GPIO_num_tx = DISABLE_GPIO_NUM; 755 UCHAR GPIO_num_tx = DISABLE_GPIO_NUM;
729 UCHAR GPIO_num_rx = DISABLE_GPIO_NUM; 756 UCHAR GPIO_num_rx = DISABLE_GPIO_NUM;
730 UCHAR uiLEDTx = 0; 757 UCHAR uiLEDTx = 0;
731 UCHAR uiLEDRx = 0; 758 UCHAR uiLEDRx = 0;
732 currdriverstate = NORMAL_OPERATION; 759 currdriverstate = NORMAL_OPERATION;
733 Adapter->LEDInfo.bIdle_led_off = FALSE; 760 Adapter->LEDInfo.bIdle_led_off = FALSE;
734 761
735 BcmGetGPIOPinInfo(Adapter, &GPIO_num_tx, &GPIO_num_rx, &uiLEDTx,&uiLEDRx,currdriverstate); 762 BcmGetGPIOPinInfo(Adapter, &GPIO_num_tx,
736 if((GPIO_num_tx == DISABLE_GPIO_NUM) && (GPIO_num_rx == DISABLE_GPIO_NUM)) 763 &GPIO_num_rx, &uiLEDTx, &uiLEDRx,
737 { 764 currdriverstate);
738 GPIO_num = DISABLE_GPIO_NUM ; 765 if ((GPIO_num_tx == DISABLE_GPIO_NUM) &&
739 } 766 (GPIO_num_rx ==
740 else 767 DISABLE_GPIO_NUM)) {
741 { 768 GPIO_num = DISABLE_GPIO_NUM;
742 /*If single LED is selected, use same for both Tx and Rx*/ 769 } else {
743 if(GPIO_num_tx == DISABLE_GPIO_NUM) 770 /*
744 { 771 * If single LED is selected, use same
772 * for both Tx and Rx
773 */
774 if (GPIO_num_tx == DISABLE_GPIO_NUM) {
745 GPIO_num_tx = GPIO_num_rx; 775 GPIO_num_tx = GPIO_num_rx;
746 uiLEDTx = uiLEDRx; 776 uiLEDTx = uiLEDRx;
747 } 777 } else if (GPIO_num_rx ==
748 else if(GPIO_num_rx == DISABLE_GPIO_NUM) 778 DISABLE_GPIO_NUM) {
749 {
750 GPIO_num_rx = GPIO_num_tx; 779 GPIO_num_rx = GPIO_num_tx;
751 uiLEDRx = uiLEDTx; 780 uiLEDRx = uiLEDTx;
752 } 781 }
753 /*Blink the LED in proportionate to Tx and Rx transmissions.*/ 782 /*
754 LED_Proportional_Blink(Adapter, GPIO_num_tx, uiLEDTx, GPIO_num_rx, uiLEDRx,currdriverstate); 783 * Blink the LED in proportionate
784 * to Tx and Rx transmissions.
785 */
786 LED_Proportional_Blink(Adapter,
787 GPIO_num_tx, uiLEDTx,
788 GPIO_num_rx, uiLEDRx,
789 currdriverstate);
755 } 790 }
756 } 791 }
757 break; 792 break;
758 case LOWPOWER_MODE_ENTER: 793 case LOWPOWER_MODE_ENTER:
759 { 794 currdriverstate = LOWPOWER_MODE_ENTER;
760 currdriverstate = LOWPOWER_MODE_ENTER; 795 if (DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING ==
761 if( DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING == Adapter->ulPowerSaveMode) 796 Adapter->ulPowerSaveMode) {
762 { 797 /* Turn OFF all the LED */
763 /* Turn OFF all the LED */ 798 uiResetValue = 0;
764 uiResetValue = 0; 799 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
765 for(uiIndex =0; uiIndex < NUM_OF_LEDS; uiIndex++) 800 if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != DISABLE_GPIO_NUM)
766 { 801 TURN_OFF_LED((1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num), uiIndex);
767 if(Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != DISABLE_GPIO_NUM)
768 TURN_OFF_LED((1<<Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num),uiIndex);
769 }
770
771 } 802 }
772 /* Turn off LED And WAKE-UP for Sendinf IDLE mode ACK */ 803
773 Adapter->LEDInfo.bLedInitDone = FALSE;
774 Adapter->LEDInfo.bIdle_led_off = TRUE;
775 wake_up(&Adapter->LEDInfo.idleModeSyncEvent);
776 GPIO_num = DISABLE_GPIO_NUM;
777 break;
778 }
779 case IDLEMODE_CONTINUE:
780 {
781 currdriverstate = IDLEMODE_CONTINUE;
782 GPIO_num = DISABLE_GPIO_NUM;
783 } 804 }
805 /* Turn off LED And WAKE-UP for Sendinf IDLE mode ACK */
806 Adapter->LEDInfo.bLedInitDone = FALSE;
807 Adapter->LEDInfo.bIdle_led_off = TRUE;
808 wake_up(&Adapter->LEDInfo.idleModeSyncEvent);
809 GPIO_num = DISABLE_GPIO_NUM;
784 break; 810 break;
785 case IDLEMODE_EXIT: 811 case IDLEMODE_CONTINUE:
786 { 812 currdriverstate = IDLEMODE_CONTINUE;
787 } 813 GPIO_num = DISABLE_GPIO_NUM;
788 break; 814 break;
789 case DRIVER_HALT: 815 case IDLEMODE_EXIT:
790 { 816 break;
791 currdriverstate = DRIVER_HALT; 817 case DRIVER_HALT:
792 GPIO_num = DISABLE_GPIO_NUM; 818 currdriverstate = DRIVER_HALT;
793 for(uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) 819 GPIO_num = DISABLE_GPIO_NUM;
794 { 820 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
795 if(Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != 821 if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
796 DISABLE_GPIO_NUM) 822 != DISABLE_GPIO_NUM)
797 TURN_OFF_LED((1<<Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num),uiIndex); 823 TURN_OFF_LED((1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num), uiIndex);
798 }
799 //Adapter->DriverState = DRIVER_INIT;
800 } 824 }
825 /* Adapter->DriverState = DRIVER_INIT; */
801 break; 826 break;
802 case LED_THREAD_INACTIVE : 827 case LED_THREAD_INACTIVE:
803 { 828 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
804 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"InActivating LED thread..."); 829 DBG_LVL_ALL, "InActivating LED thread...");
805 currdriverstate = LED_THREAD_INACTIVE; 830 currdriverstate = LED_THREAD_INACTIVE;
806 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_RUNNING_INACTIVELY ; 831 Adapter->LEDInfo.led_thread_running =
807 Adapter->LEDInfo.bLedInitDone = FALSE ; 832 BCM_LED_THREAD_RUNNING_INACTIVELY;
808 //disable ALL LED 833 Adapter->LEDInfo.bLedInitDone = FALSE;
809 for(uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) 834 /* disable ALL LED */
810 { 835 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) {
811 if(Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num != 836 if (Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num
812 DISABLE_GPIO_NUM) 837 != DISABLE_GPIO_NUM)
813 TURN_OFF_LED((1<<Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num),uiIndex); 838 TURN_OFF_LED((1 << Adapter->LEDInfo.LEDState[uiIndex].GPIO_Num), uiIndex);
814 }
815 } 839 }
816 break; 840 break;
817 case LED_THREAD_ACTIVE : 841 case LED_THREAD_ACTIVE:
818 { 842 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
819 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"Activating LED thread again..."); 843 DBG_LVL_ALL, "Activating LED thread again...");
820 if(Adapter->LinkUpStatus == FALSE) 844 if (Adapter->LinkUpStatus == FALSE)
821 Adapter->DriverState = NO_NETWORK_ENTRY; 845 Adapter->DriverState = NO_NETWORK_ENTRY;
822 else 846 else
823 Adapter->DriverState = NORMAL_OPERATION; 847 Adapter->DriverState = NORMAL_OPERATION;
824 848
825 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_RUNNING_ACTIVELY ; 849 Adapter->LEDInfo.led_thread_running =
826 } 850 BCM_LED_THREAD_RUNNING_ACTIVELY;
851 break;
852 /* return; */
853 default:
827 break; 854 break;
828 //return;
829 default:
830 break;
831 } 855 }
832 } 856 }
833 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_DISABLED; 857 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_DISABLED;
@@ -839,49 +863,54 @@ int InitLedSettings(PMINI_ADAPTER Adapter)
839 BOOLEAN bEnableThread = TRUE; 863 BOOLEAN bEnableThread = TRUE;
840 UCHAR uiIndex = 0; 864 UCHAR uiIndex = 0;
841 865
842 /*Initially set BitPolarity to normal polarity. The bit 8 of LED type 866 /*
843 * is used to change the polarity of the LED.*/ 867 * Initially set BitPolarity to normal polarity. The bit 8 of LED type
868 * is used to change the polarity of the LED.
869 */
844 870
845 for(uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++) { 871 for (uiIndex = 0; uiIndex < NUM_OF_LEDS; uiIndex++)
846 Adapter->LEDInfo.LEDState[uiIndex].BitPolarity = 1; 872 Adapter->LEDInfo.LEDState[uiIndex].BitPolarity = 1;
847 }
848 873
849 /*Read the LED settings of CONFIG file and map it to GPIO numbers in EEPROM*/ 874 /*
875 * Read the LED settings of CONFIG file and map it
876 * to GPIO numbers in EEPROM
877 */
850 Status = ReadConfigFileStructure(Adapter, &bEnableThread); 878 Status = ReadConfigFileStructure(Adapter, &bEnableThread);
851 if(STATUS_SUCCESS != Status) 879 if (STATUS_SUCCESS != Status) {
852 { 880 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
853 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL,"LED Thread: FAILED in ReadConfigFileStructure\n"); 881 DBG_LVL_ALL,
882 "LED Thread: FAILED in ReadConfigFileStructure\n");
854 return Status; 883 return Status;
855 } 884 }
856 885
857 if(Adapter->LEDInfo.led_thread_running) 886 if (Adapter->LEDInfo.led_thread_running) {
858 { 887 if (bEnableThread) {
859 if(bEnableThread)
860 ; 888 ;
861 else 889 } else {
862 {
863 Adapter->DriverState = DRIVER_HALT; 890 Adapter->DriverState = DRIVER_HALT;
864 wake_up(&Adapter->LEDInfo.notify_led_event); 891 wake_up(&Adapter->LEDInfo.notify_led_event);
865 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_DISABLED; 892 Adapter->LEDInfo.led_thread_running =
893 BCM_LED_THREAD_DISABLED;
866 } 894 }
867 895
868 } 896 } else if (bEnableThread) {
869 897 /* Create secondary thread to handle the LEDs */
870 else if(bEnableThread)
871 {
872 /*Create secondary thread to handle the LEDs*/
873 init_waitqueue_head(&Adapter->LEDInfo.notify_led_event); 898 init_waitqueue_head(&Adapter->LEDInfo.notify_led_event);
874 init_waitqueue_head(&Adapter->LEDInfo.idleModeSyncEvent); 899 init_waitqueue_head(&Adapter->LEDInfo.idleModeSyncEvent);
875 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_RUNNING_ACTIVELY; 900 Adapter->LEDInfo.led_thread_running =
876 Adapter->LEDInfo.bIdle_led_off = FALSE; 901 BCM_LED_THREAD_RUNNING_ACTIVELY;
877 Adapter->LEDInfo.led_cntrl_threadid = kthread_run((int (*)(void *)) 902 Adapter->LEDInfo.bIdle_led_off = FALSE;
878 LEDControlThread, Adapter, "led_control_thread"); 903 Adapter->LEDInfo.led_cntrl_threadid =
879 if(IS_ERR(Adapter->LEDInfo.led_cntrl_threadid)) 904 kthread_run((int (*)(void *)) LEDControlThread,
880 { 905 Adapter, "led_control_thread");
881 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_OTHERS, LED_DUMP_INFO, DBG_LVL_ALL, "Not able to spawn Kernel Thread\n"); 906 if (IS_ERR(Adapter->LEDInfo.led_cntrl_threadid)) {
882 Adapter->LEDInfo.led_thread_running = BCM_LED_THREAD_DISABLED; 907 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LED_DUMP_INFO,
883 return PTR_ERR(Adapter->LEDInfo.led_cntrl_threadid); 908 DBG_LVL_ALL,
884 } 909 "Not able to spawn Kernel Thread\n");
910 Adapter->LEDInfo.led_thread_running =
911 BCM_LED_THREAD_DISABLED;
912 return PTR_ERR(Adapter->LEDInfo.led_cntrl_threadid);
913 }
885 } 914 }
886 return Status; 915 return Status;
887} 916}
diff --git a/drivers/staging/bcm/nvm.c b/drivers/staging/bcm/nvm.c
index 3de0daf5edb2..7d703cb3c5e0 100644
--- a/drivers/staging/bcm/nvm.c
+++ b/drivers/staging/bcm/nvm.c
@@ -78,7 +78,7 @@ static UCHAR ReadEEPROMStatusRegister( PMINI_ADAPTER Adapter )
78 { 78 {
79 value=0; 79 value=0;
80 uiStatus = 0 ; 80 uiStatus = 0 ;
81 rdmalt( Adapter, EEPROM_SPI_Q_STATUS1_REG,&uiStatus, sizeof(uiStatus)); 81 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG, &uiStatus, sizeof(uiStatus));
82 if(Adapter->device_removed == TRUE) 82 if(Adapter->device_removed == TRUE)
83 { 83 {
84 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Modem has got removed hence exiting...."); 84 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Modem has got removed hence exiting....");
@@ -93,7 +93,7 @@ static UCHAR ReadEEPROMStatusRegister( PMINI_ADAPTER Adapter )
93 wrmalt( Adapter, EEPROM_SPI_Q_STATUS1_REG, &value, sizeof(value)); 93 wrmalt( Adapter, EEPROM_SPI_Q_STATUS1_REG, &value, sizeof(value));
94 94
95 value =0; 95 value =0;
96 rdmalt(Adapter, EEPROM_READ_DATAQ_REG,&value, sizeof(value)); 96 rdmalt(Adapter, EEPROM_READ_DATAQ_REG, &value, sizeof(value));
97 uiData = (UCHAR)value; 97 uiData = (UCHAR)value;
98 98
99 break; 99 break;
@@ -102,8 +102,8 @@ static UCHAR ReadEEPROMStatusRegister( PMINI_ADAPTER Adapter )
102 dwRetries-- ; 102 dwRetries-- ;
103 if ( dwRetries == 0 ) 103 if ( dwRetries == 0 )
104 { 104 {
105 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG,&value, sizeof(value)); 105 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG, &value, sizeof(value));
106 rdmalt(Adapter, EEPROM_SPI_Q_STATUS_REG,&value1, sizeof(value1)); 106 rdmalt(Adapter, EEPROM_SPI_Q_STATUS_REG, &value1, sizeof(value1));
107 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"0x3004 = %x 0x3008 = %x, retries = %d failed.\n",value,value1, MAX_EEPROM_RETRIES*RETRIES_PER_DELAY); 107 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"0x3004 = %x 0x3008 = %x, retries = %d failed.\n",value,value1, MAX_EEPROM_RETRIES*RETRIES_PER_DELAY);
108 return uiData; 108 return uiData;
109 } 109 }
@@ -158,7 +158,7 @@ INT ReadBeceemEEPROMBulk( PMINI_ADAPTER Adapter,
158 { 158 {
159 159
160 uiStatus = 0; 160 uiStatus = 0;
161 rdmalt( Adapter, EEPROM_SPI_Q_STATUS1_REG, &uiStatus, sizeof(uiStatus)); 161 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG, &uiStatus, sizeof(uiStatus));
162 if(Adapter->device_removed == TRUE) 162 if(Adapter->device_removed == TRUE)
163 { 163 {
164 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Modem has got Removed.hence exiting from loop..."); 164 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Modem has got Removed.hence exiting from loop...");
@@ -202,8 +202,8 @@ INT ReadBeceemEEPROMBulk( PMINI_ADAPTER Adapter,
202 { 202 {
203 value=0; 203 value=0;
204 value1=0; 204 value1=0;
205 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG,&value, sizeof(value)); 205 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG, &value, sizeof(value));
206 rdmalt(Adapter, EEPROM_SPI_Q_STATUS_REG,&value1, sizeof(value1)); 206 rdmalt(Adapter, EEPROM_SPI_Q_STATUS_REG, &value1, sizeof(value1));
207 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0, "dwNumWords %d 0x3004 = %x 0x3008 = %x retries = %d failed.\n", dwNumWords, value, value1, MAX_EEPROM_RETRIES*RETRIES_PER_DELAY); 207 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0, "dwNumWords %d 0x3004 = %x 0x3008 = %x retries = %d failed.\n", dwNumWords, value, value1, MAX_EEPROM_RETRIES*RETRIES_PER_DELAY);
208 return STATUS_FAILURE; 208 return STATUS_FAILURE;
209 } 209 }
@@ -217,22 +217,22 @@ INT ReadBeceemEEPROMBulk( PMINI_ADAPTER Adapter,
217 pvalue = (PUCHAR)(pdwData + dwIndex); 217 pvalue = (PUCHAR)(pdwData + dwIndex);
218 218
219 value =0; 219 value =0;
220 rdmalt(Adapter, EEPROM_READ_DATAQ_REG,&value, sizeof(value)); 220 rdmalt(Adapter, EEPROM_READ_DATAQ_REG, &value, sizeof(value));
221 221
222 pvalue[0] = value; 222 pvalue[0] = value;
223 223
224 value = 0; 224 value = 0;
225 rdmalt(Adapter, EEPROM_READ_DATAQ_REG,&value, sizeof(value)); 225 rdmalt(Adapter, EEPROM_READ_DATAQ_REG, &value, sizeof(value));
226 226
227 pvalue[1] = value; 227 pvalue[1] = value;
228 228
229 value =0; 229 value =0;
230 rdmalt(Adapter, EEPROM_READ_DATAQ_REG,&value, sizeof(value)); 230 rdmalt(Adapter, EEPROM_READ_DATAQ_REG, &value, sizeof(value));
231 231
232 pvalue[2] = value; 232 pvalue[2] = value;
233 233
234 value = 0; 234 value = 0;
235 rdmalt(Adapter, EEPROM_READ_DATAQ_REG,&value, sizeof(value)); 235 rdmalt(Adapter, EEPROM_READ_DATAQ_REG, &value, sizeof(value));
236 236
237 pvalue[3] = value; 237 pvalue[3] = value;
238 } 238 }
@@ -445,6 +445,7 @@ static INT BeceemFlashBulkRead(
445 UINT uiBytesToRead = uiNumBytes; 445 UINT uiBytesToRead = uiNumBytes;
446 INT Status = 0; 446 INT Status = 0;
447 UINT uiPartOffset = 0; 447 UINT uiPartOffset = 0;
448 int bytes;
448 449
449 if(Adapter->device_removed ) 450 if(Adapter->device_removed )
450 { 451 {
@@ -469,9 +470,9 @@ static INT BeceemFlashBulkRead(
469 uiBytesToRead = MAX_RW_SIZE - (uiOffset%MAX_RW_SIZE); 470 uiBytesToRead = MAX_RW_SIZE - (uiOffset%MAX_RW_SIZE);
470 uiBytesToRead = MIN(uiNumBytes,uiBytesToRead); 471 uiBytesToRead = MIN(uiNumBytes,uiBytesToRead);
471 472
472 if(rdm(Adapter,uiPartOffset, (PCHAR)pBuffer+uiIndex,uiBytesToRead)) 473 bytes = rdm(Adapter, uiPartOffset, (PCHAR)pBuffer+uiIndex, uiBytesToRead);
473 { 474 if (bytes < 0) {
474 Status = -1; 475 Status = bytes;
475 Adapter->SelectedChip = RESET_CHIP_SELECT; 476 Adapter->SelectedChip = RESET_CHIP_SELECT;
476 return Status; 477 return Status;
477 } 478 }
@@ -488,9 +489,9 @@ static INT BeceemFlashBulkRead(
488 489
489 uiBytesToRead = MIN(uiNumBytes,MAX_RW_SIZE); 490 uiBytesToRead = MIN(uiNumBytes,MAX_RW_SIZE);
490 491
491 if(rdm(Adapter,uiPartOffset, (PCHAR)pBuffer+uiIndex,uiBytesToRead)) 492 bytes = rdm(Adapter, uiPartOffset, (PCHAR)pBuffer+uiIndex, uiBytesToRead);
492 { 493 if (bytes < 0) {
493 Status = -1; 494 Status = bytes;
494 break; 495 break;
495 } 496 }
496 497
@@ -613,6 +614,7 @@ static INT FlashSectorErase(PMINI_ADAPTER Adapter,
613 UINT iIndex = 0, iRetries = 0; 614 UINT iIndex = 0, iRetries = 0;
614 UINT uiStatus = 0; 615 UINT uiStatus = 0;
615 UINT value; 616 UINT value;
617 int bytes;
616 618
617 for(iIndex=0;iIndex<numOfSectors;iIndex++) 619 for(iIndex=0;iIndex<numOfSectors;iIndex++)
618 { 620 {
@@ -632,10 +634,11 @@ static INT FlashSectorErase(PMINI_ADAPTER Adapter,
632 return STATUS_FAILURE; 634 return STATUS_FAILURE;
633 } 635 }
634 636
635 if(rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus)) < 0 ) 637 bytes = rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus));
636 { 638 if (bytes < 0) {
637 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Reading status of FLASH_SPI_READQ_REG fails"); 639 uiStatus = bytes;
638 return STATUS_FAILURE; 640 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Reading status of FLASH_SPI_READQ_REG fails");
641 return uiStatus;
639 } 642 }
640 iRetries++; 643 iRetries++;
641 //After every try lets make the CPU free for 10 ms. generally time taken by the 644 //After every try lets make the CPU free for 10 ms. generally time taken by the
@@ -679,6 +682,7 @@ static INT flashByteWrite(
679 682
680 UINT value; 683 UINT value;
681 ULONG ulData = *(PUCHAR)pData; 684 ULONG ulData = *(PUCHAR)pData;
685 int bytes;
682 686
683// 687//
684// need not write 0xFF because write requires an erase and erase will 688// need not write 0xFF because write requires an erase and erase will
@@ -720,10 +724,11 @@ static INT flashByteWrite(
720 return STATUS_FAILURE; 724 return STATUS_FAILURE;
721 } 725 }
722 //__udelay(1); 726 //__udelay(1);
723 if(rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus)) < 0) 727 bytes = rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus));
724 { 728 if (bytes < 0) {
725 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Reading status of FLASH_SPI_READQ_REG fails"); 729 uiStatus = bytes;
726 return STATUS_FAILURE; 730 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Reading status of FLASH_SPI_READQ_REG fails");
731 return uiStatus;
727 } 732 }
728 iRetries--; 733 iRetries--;
729 if( iRetries && ((iRetries % FLASH_PER_RETRIES_DELAY) == 0)) 734 if( iRetries && ((iRetries % FLASH_PER_RETRIES_DELAY) == 0))
@@ -771,6 +776,7 @@ static INT flashWrite(
771 776
772 UINT value; 777 UINT value;
773 UINT uiErasePattern[4] = {0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF}; 778 UINT uiErasePattern[4] = {0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF};
779 int bytes;
774// 780//
775// need not write 0xFFFFFFFF because write requires an erase and erase will 781// need not write 0xFFFFFFFF because write requires an erase and erase will
776// make whole sector 0xFFFFFFFF. 782// make whole sector 0xFFFFFFFF.
@@ -803,10 +809,11 @@ static INT flashWrite(
803 return STATUS_FAILURE; 809 return STATUS_FAILURE;
804 } 810 }
805 //__udelay(1); 811 //__udelay(1);
806 if(rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus)) < 0 ) 812 bytes = rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus));
807 { 813 if (bytes < 0) {
808 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Reading status of FLASH_SPI_READQ_REG fails"); 814 uiStatus = bytes;
809 return STATUS_FAILURE; 815 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Reading status of FLASH_SPI_READQ_REG fails");
816 return uiStatus;
810 } 817 }
811 818
812 iRetries--; 819 iRetries--;
@@ -849,6 +856,7 @@ static INT flashByteWriteStatus(
849 INT iRetries = MAX_FLASH_RETRIES * FLASH_PER_RETRIES_DELAY; //3 856 INT iRetries = MAX_FLASH_RETRIES * FLASH_PER_RETRIES_DELAY; //3
850 ULONG ulData = *(PUCHAR)pData; 857 ULONG ulData = *(PUCHAR)pData;
851 UINT value; 858 UINT value;
859 int bytes;
852 860
853// 861//
854// need not write 0xFFFFFFFF because write requires an erase and erase will 862// need not write 0xFFFFFFFF because write requires an erase and erase will
@@ -891,10 +899,11 @@ static INT flashByteWriteStatus(
891 return STATUS_FAILURE; 899 return STATUS_FAILURE;
892 } 900 }
893 //__udelay(1); 901 //__udelay(1);
894 if(rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus)) < 0) 902 bytes = rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus));
895 { 903 if (bytes < 0) {
896 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Reading status of FLASH_SPI_READQ_REG fails"); 904 uiStatus = bytes;
897 return STATUS_FAILURE; 905 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Reading status of FLASH_SPI_READQ_REG fails");
906 return uiStatus;
898 } 907 }
899 908
900 iRetries--; 909 iRetries--;
@@ -935,6 +944,7 @@ static INT flashWriteStatus(
935 //UINT uiReadBack = 0; 944 //UINT uiReadBack = 0;
936 UINT value; 945 UINT value;
937 UINT uiErasePattern[4] = {0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF}; 946 UINT uiErasePattern[4] = {0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF};
947 int bytes;
938 948
939// 949//
940// need not write 0xFFFFFFFF because write requires an erase and erase will 950// need not write 0xFFFFFFFF because write requires an erase and erase will
@@ -967,10 +977,11 @@ static INT flashWriteStatus(
967 return STATUS_FAILURE; 977 return STATUS_FAILURE;
968 } 978 }
969 //__udelay(1); 979 //__udelay(1);
970 if(rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus)) < 0) 980 bytes = rdmalt(Adapter, FLASH_SPI_READQ_REG, &uiStatus, sizeof(uiStatus));
971 { 981 if (bytes < 0) {
972 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Reading status of FLASH_SPI_READQ_REG fails"); 982 uiStatus = bytes;
973 return STATUS_FAILURE; 983 BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "Reading status of FLASH_SPI_READQ_REG fails");
984 return uiStatus;
974 } 985 }
975 iRetries--; 986 iRetries--;
976 //this will ensure that in there will be no changes in the current path. 987 //this will ensure that in there will be no changes in the current path.
@@ -1841,7 +1852,7 @@ static INT BeceemEEPROMWritePage( PMINI_ADAPTER Adapter, UINT uiData[], UINT uiO
1841 * What we are checking if the previous write has completed, and this 1852 * What we are checking if the previous write has completed, and this
1842 * may take time. We should wait till the Empty bit is set. */ 1853 * may take time. We should wait till the Empty bit is set. */
1843 uiStatus = 0; 1854 uiStatus = 0;
1844 rdmalt( Adapter, EEPROM_SPI_Q_STATUS1_REG,&uiStatus, sizeof(uiStatus)) ; 1855 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG, &uiStatus, sizeof(uiStatus));
1845 while ( ( uiStatus & EEPROM_WRITE_QUEUE_EMPTY ) == 0 ) 1856 while ( ( uiStatus & EEPROM_WRITE_QUEUE_EMPTY ) == 0 )
1846 { 1857 {
1847 uiRetries--; 1858 uiRetries--;
@@ -1855,7 +1866,7 @@ static INT BeceemEEPROMWritePage( PMINI_ADAPTER Adapter, UINT uiData[], UINT uiO
1855 msleep(1); 1866 msleep(1);
1856 1867
1857 uiStatus = 0; 1868 uiStatus = 0;
1858 rdmalt( Adapter, EEPROM_SPI_Q_STATUS1_REG,&uiStatus, sizeof(uiStatus)) ; 1869 rdmalt(Adapter, EEPROM_SPI_Q_STATUS1_REG, &uiStatus, sizeof(uiStatus));
1859 if(Adapter->device_removed == TRUE) 1870 if(Adapter->device_removed == TRUE)
1860 { 1871 {
1861 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Modem got removed hence exiting from loop...."); 1872 BCM_DEBUG_PRINT(Adapter,DBG_TYPE_PRINTK, 0, 0,"Modem got removed hence exiting from loop....");
@@ -2500,7 +2511,7 @@ static ULONG BcmReadFlashRDID(PMINI_ADAPTER Adapter)
2500// Read SPI READQ REG. The output will be WWXXYYZZ. 2511// Read SPI READQ REG. The output will be WWXXYYZZ.
2501// The ID is 3Bytes long and is WWXXYY. ZZ needs to be Ignored. 2512// The ID is 3Bytes long and is WWXXYY. ZZ needs to be Ignored.
2502// 2513//
2503 rdmalt(Adapter, FLASH_SPI_READQ_REG,(PUINT)&ulRDID, sizeof(ulRDID)); 2514 rdmalt(Adapter, FLASH_SPI_READQ_REG, (PUINT)&ulRDID, sizeof(ulRDID));
2504 2515
2505 return (ulRDID >>8); 2516 return (ulRDID >>8);
2506 2517
@@ -4735,8 +4746,8 @@ static INT BcmDoChipSelect(PMINI_ADAPTER Adapter, UINT offset)
4735 Adapter->SelectedChip = ChipNum ; 4746 Adapter->SelectedChip = ChipNum ;
4736 4747
4737 //bit[13..12] will select the appropriate chip 4748 //bit[13..12] will select the appropriate chip
4738 rdmalt(Adapter,FLASH_CONFIG_REG, &FlashConfig, 4); 4749 rdmalt(Adapter, FLASH_CONFIG_REG, &FlashConfig, 4);
4739 rdmalt(Adapter,FLASH_GPIO_CONFIG_REG, &GPIOConfig, 4); 4750 rdmalt(Adapter, FLASH_GPIO_CONFIG_REG, &GPIOConfig, 4);
4740 4751
4741 { 4752 {
4742 switch(ChipNum) 4753 switch(ChipNum)
diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c
index 5e78c77d5a08..0d18d80bcd25 100644
--- a/drivers/staging/comedi/comedi_fops.c
+++ b/drivers/staging/comedi/comedi_fops.c
@@ -1479,10 +1479,10 @@ static int comedi_mmap(struct file *file, struct vm_area_struct *vma)
1479 1479
1480 dev_file_info = comedi_get_device_file_info(minor); 1480 dev_file_info = comedi_get_device_file_info(minor);
1481 if (dev_file_info == NULL) 1481 if (dev_file_info == NULL)
1482 return -ENODEV; 1482 return -ENODEV;
1483 dev = dev_file_info->device; 1483 dev = dev_file_info->device;
1484 if (dev == NULL) 1484 if (dev == NULL)
1485 return -ENODEV; 1485 return -ENODEV;
1486 1486
1487 mutex_lock(&dev->mutex); 1487 mutex_lock(&dev->mutex);
1488 if (!dev->attached) { 1488 if (!dev->attached) {
@@ -1556,10 +1556,10 @@ static unsigned int comedi_poll(struct file *file, poll_table * wait)
1556 dev_file_info = comedi_get_device_file_info(minor); 1556 dev_file_info = comedi_get_device_file_info(minor);
1557 1557
1558 if (dev_file_info == NULL) 1558 if (dev_file_info == NULL)
1559 return -ENODEV; 1559 return -ENODEV;
1560 dev = dev_file_info->device; 1560 dev = dev_file_info->device;
1561 if (dev == NULL) 1561 if (dev == NULL)
1562 return -ENODEV; 1562 return -ENODEV;
1563 1563
1564 mutex_lock(&dev->mutex); 1564 mutex_lock(&dev->mutex);
1565 if (!dev->attached) { 1565 if (!dev->attached) {
@@ -1610,10 +1610,10 @@ static ssize_t comedi_write(struct file *file, const char __user *buf,
1610 dev_file_info = comedi_get_device_file_info(minor); 1610 dev_file_info = comedi_get_device_file_info(minor);
1611 1611
1612 if (dev_file_info == NULL) 1612 if (dev_file_info == NULL)
1613 return -ENODEV; 1613 return -ENODEV;
1614 dev = dev_file_info->device; 1614 dev = dev_file_info->device;
1615 if (dev == NULL) 1615 if (dev == NULL)
1616 return -ENODEV; 1616 return -ENODEV;
1617 1617
1618 if (!dev->attached) { 1618 if (!dev->attached) {
1619 DPRINTK("no driver configured on comedi%i\n", dev->minor); 1619 DPRINTK("no driver configured on comedi%i\n", dev->minor);
@@ -1721,10 +1721,10 @@ static ssize_t comedi_read(struct file *file, char __user *buf, size_t nbytes,
1721 dev_file_info = comedi_get_device_file_info(minor); 1721 dev_file_info = comedi_get_device_file_info(minor);
1722 1722
1723 if (dev_file_info == NULL) 1723 if (dev_file_info == NULL)
1724 return -ENODEV; 1724 return -ENODEV;
1725 dev = dev_file_info->device; 1725 dev = dev_file_info->device;
1726 if (dev == NULL) 1726 if (dev == NULL)
1727 return -ENODEV; 1727 return -ENODEV;
1728 1728
1729 if (!dev->attached) { 1729 if (!dev->attached) {
1730 DPRINTK("no driver configured on comedi%i\n", dev->minor); 1730 DPRINTK("no driver configured on comedi%i\n", dev->minor);
@@ -1931,10 +1931,10 @@ static int comedi_close(struct inode *inode, struct file *file)
1931 dev_file_info = comedi_get_device_file_info(minor); 1931 dev_file_info = comedi_get_device_file_info(minor);
1932 1932
1933 if (dev_file_info == NULL) 1933 if (dev_file_info == NULL)
1934 return -ENODEV; 1934 return -ENODEV;
1935 dev = dev_file_info->device; 1935 dev = dev_file_info->device;
1936 if (dev == NULL) 1936 if (dev == NULL)
1937 return -ENODEV; 1937 return -ENODEV;
1938 1938
1939 mutex_lock(&dev->mutex); 1939 mutex_lock(&dev->mutex);
1940 1940
@@ -1973,10 +1973,10 @@ static int comedi_fasync(int fd, struct file *file, int on)
1973 dev_file_info = comedi_get_device_file_info(minor); 1973 dev_file_info = comedi_get_device_file_info(minor);
1974 1974
1975 if (dev_file_info == NULL) 1975 if (dev_file_info == NULL)
1976 return -ENODEV; 1976 return -ENODEV;
1977 dev = dev_file_info->device; 1977 dev = dev_file_info->device;
1978 if (dev == NULL) 1978 if (dev == NULL)
1979 return -ENODEV; 1979 return -ENODEV;
1980 1980
1981 return fasync_helper(fd, file, on, &dev->async_queue); 1981 return fasync_helper(fd, file, on, &dev->async_queue);
1982} 1982}
@@ -2479,18 +2479,18 @@ static ssize_t store_max_read_buffer_kb(struct device *dev,
2479 const char *buf, size_t count) 2479 const char *buf, size_t count)
2480{ 2480{
2481 struct comedi_device_file_info *info = dev_get_drvdata(dev); 2481 struct comedi_device_file_info *info = dev_get_drvdata(dev);
2482 unsigned long new_max_size_kb; 2482 unsigned int new_max_size_kb;
2483 uint64_t new_max_size; 2483 unsigned int new_max_size;
2484 int ret;
2484 struct comedi_subdevice *const read_subdevice = 2485 struct comedi_subdevice *const read_subdevice =
2485 comedi_get_read_subdevice(info); 2486 comedi_get_read_subdevice(info);
2486 2487
2487 if (strict_strtoul(buf, 10, &new_max_size_kb)) 2488 ret = kstrtouint(buf, 10, &new_max_size_kb);
2488 return -EINVAL; 2489 if (ret)
2489 if (new_max_size_kb != (uint32_t) new_max_size_kb) 2490 return ret;
2490 return -EINVAL; 2491 if (new_max_size_kb > (UINT_MAX / bytes_per_kibi))
2491 new_max_size = ((uint64_t) new_max_size_kb) * bytes_per_kibi;
2492 if (new_max_size != (uint32_t) new_max_size)
2493 return -EINVAL; 2492 return -EINVAL;
2493 new_max_size = new_max_size_kb * bytes_per_kibi;
2494 2494
2495 mutex_lock(&info->device->mutex); 2495 mutex_lock(&info->device->mutex);
2496 if (read_subdevice == NULL || 2496 if (read_subdevice == NULL ||
@@ -2540,19 +2540,19 @@ static ssize_t store_read_buffer_kb(struct device *dev,
2540 const char *buf, size_t count) 2540 const char *buf, size_t count)
2541{ 2541{
2542 struct comedi_device_file_info *info = dev_get_drvdata(dev); 2542 struct comedi_device_file_info *info = dev_get_drvdata(dev);
2543 unsigned long new_size_kb; 2543 unsigned int new_size_kb;
2544 uint64_t new_size; 2544 unsigned int new_size;
2545 int retval; 2545 int retval;
2546 int ret;
2546 struct comedi_subdevice *const read_subdevice = 2547 struct comedi_subdevice *const read_subdevice =
2547 comedi_get_read_subdevice(info); 2548 comedi_get_read_subdevice(info);
2548 2549
2549 if (strict_strtoul(buf, 10, &new_size_kb)) 2550 ret = kstrtouint(buf, 10, &new_size_kb);
2550 return -EINVAL; 2551 if (ret)
2551 if (new_size_kb != (uint32_t) new_size_kb) 2552 return ret;
2552 return -EINVAL; 2553 if (new_size_kb > (UINT_MAX / bytes_per_kibi))
2553 new_size = ((uint64_t) new_size_kb) * bytes_per_kibi;
2554 if (new_size != (uint32_t) new_size)
2555 return -EINVAL; 2554 return -EINVAL;
2555 new_size = new_size_kb * bytes_per_kibi;
2556 2556
2557 mutex_lock(&info->device->mutex); 2557 mutex_lock(&info->device->mutex);
2558 if (read_subdevice == NULL || 2558 if (read_subdevice == NULL ||
@@ -2606,18 +2606,18 @@ static ssize_t store_max_write_buffer_kb(struct device *dev,
2606 const char *buf, size_t count) 2606 const char *buf, size_t count)
2607{ 2607{
2608 struct comedi_device_file_info *info = dev_get_drvdata(dev); 2608 struct comedi_device_file_info *info = dev_get_drvdata(dev);
2609 unsigned long new_max_size_kb; 2609 unsigned int new_max_size_kb;
2610 uint64_t new_max_size; 2610 unsigned int new_max_size;
2611 int ret;
2611 struct comedi_subdevice *const write_subdevice = 2612 struct comedi_subdevice *const write_subdevice =
2612 comedi_get_write_subdevice(info); 2613 comedi_get_write_subdevice(info);
2613 2614
2614 if (strict_strtoul(buf, 10, &new_max_size_kb)) 2615 ret = kstrtouint(buf, 10, &new_max_size_kb);
2615 return -EINVAL; 2616 if (ret)
2616 if (new_max_size_kb != (uint32_t) new_max_size_kb) 2617 return ret;
2617 return -EINVAL; 2618 if (new_max_size_kb > (UINT_MAX / bytes_per_kibi))
2618 new_max_size = ((uint64_t) new_max_size_kb) * bytes_per_kibi;
2619 if (new_max_size != (uint32_t) new_max_size)
2620 return -EINVAL; 2619 return -EINVAL;
2620 new_max_size = new_max_size_kb * bytes_per_kibi;
2621 2621
2622 mutex_lock(&info->device->mutex); 2622 mutex_lock(&info->device->mutex);
2623 if (write_subdevice == NULL || 2623 if (write_subdevice == NULL ||
@@ -2667,19 +2667,19 @@ static ssize_t store_write_buffer_kb(struct device *dev,
2667 const char *buf, size_t count) 2667 const char *buf, size_t count)
2668{ 2668{
2669 struct comedi_device_file_info *info = dev_get_drvdata(dev); 2669 struct comedi_device_file_info *info = dev_get_drvdata(dev);
2670 unsigned long new_size_kb; 2670 unsigned int new_size_kb;
2671 uint64_t new_size; 2671 unsigned int new_size;
2672 int retval; 2672 int retval;
2673 int ret;
2673 struct comedi_subdevice *const write_subdevice = 2674 struct comedi_subdevice *const write_subdevice =
2674 comedi_get_write_subdevice(info); 2675 comedi_get_write_subdevice(info);
2675 2676
2676 if (strict_strtoul(buf, 10, &new_size_kb)) 2677 ret = kstrtouint(buf, 10, &new_size_kb);
2677 return -EINVAL; 2678 if (ret)
2678 if (new_size_kb != (uint32_t) new_size_kb) 2679 return ret;
2680 if (new_size_kb > (UINT_MAX / bytes_per_kibi))
2679 return -EINVAL; 2681 return -EINVAL;
2680 new_size = ((uint64_t) new_size_kb) * bytes_per_kibi; 2682 new_size = ((uint64_t) new_size_kb) * bytes_per_kibi;
2681 if (new_size != (uint32_t) new_size)
2682 return -EINVAL;
2683 2683
2684 mutex_lock(&info->device->mutex); 2684 mutex_lock(&info->device->mutex);
2685 if (write_subdevice == NULL || 2685 if (write_subdevice == NULL ||
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.c b/drivers/staging/comedi/drivers/addi-data/addi_common.c
index 6fb7594319c6..ca5bd9b8704a 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_common.c
+++ b/drivers/staging/comedi/drivers/addi-data/addi_common.c
@@ -145,78 +145,77 @@ void fpu_end(void)
145 145
146static DEFINE_PCI_DEVICE_TABLE(addi_apci_tbl) = { 146static DEFINE_PCI_DEVICE_TABLE(addi_apci_tbl) = {
147#ifdef CONFIG_APCI_3120 147#ifdef CONFIG_APCI_3120
148 {APCI3120_BOARD_VENDOR_ID, 0x818D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 148 {PCI_DEVICE(APCI3120_BOARD_VENDOR_ID, 0x818D)},
149#endif 149#endif
150#ifdef CONFIG_APCI_1032 150#ifdef CONFIG_APCI_1032
151 {APCI1032_BOARD_VENDOR_ID, 0x1003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 151 {PCI_DEVICE(APCI1032_BOARD_VENDOR_ID, 0x1003)},
152#endif 152#endif
153#ifdef CONFIG_APCI_1516 153#ifdef CONFIG_APCI_1516
154 {APCI1516_BOARD_VENDOR_ID, 0x1001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 154 {PCI_DEVICE(APCI1516_BOARD_VENDOR_ID, 0x1001)},
155#endif 155#endif
156#ifdef CONFIG_APCI_2016 156#ifdef CONFIG_APCI_2016
157 {APCI2016_BOARD_VENDOR_ID, 0x1002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 157 {PCI_DEVICE(APCI2016_BOARD_VENDOR_ID, 0x1002)},
158#endif 158#endif
159#ifdef CONFIG_APCI_2032 159#ifdef CONFIG_APCI_2032
160 {APCI2032_BOARD_VENDOR_ID, 0x1004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 160 {PCI_DEVICE(APCI2032_BOARD_VENDOR_ID, 0x1004)},
161#endif 161#endif
162#ifdef CONFIG_APCI_2200 162#ifdef CONFIG_APCI_2200
163 {APCI2200_BOARD_VENDOR_ID, 0x1005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 163 {PCI_DEVICE(APCI2200_BOARD_VENDOR_ID, 0x1005)},
164#endif 164#endif
165#ifdef CONFIG_APCI_1564 165#ifdef CONFIG_APCI_1564
166 {APCI1564_BOARD_VENDOR_ID, 0x1006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 166 {PCI_DEVICE(APCI1564_BOARD_VENDOR_ID, 0x1006)},
167#endif 167#endif
168#ifdef CONFIG_APCI_1500 168#ifdef CONFIG_APCI_1500
169 {APCI1500_BOARD_VENDOR_ID, 0x80fc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 169 {PCI_DEVICE(APCI1500_BOARD_VENDOR_ID, 0x80fc)},
170#endif 170#endif
171#ifdef CONFIG_APCI_3001 171#ifdef CONFIG_APCI_3001
172 {APCI3120_BOARD_VENDOR_ID, 0x828D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 172 {PCI_DEVICE(APCI3120_BOARD_VENDOR_ID, 0x828D)},
173#endif 173#endif
174#ifdef CONFIG_APCI_3501 174#ifdef CONFIG_APCI_3501
175 {APCI3501_BOARD_VENDOR_ID, 0x3001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 175 {PCI_DEVICE(APCI3501_BOARD_VENDOR_ID, 0x3001)},
176#endif 176#endif
177#ifdef CONFIG_APCI_035 177#ifdef CONFIG_APCI_035
178 {APCI035_BOARD_VENDOR_ID, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 178 {PCI_DEVICE(APCI035_BOARD_VENDOR_ID, 0x0300)},
179#endif 179#endif
180#ifdef CONFIG_APCI_3200 180#ifdef CONFIG_APCI_3200
181 {APCI3200_BOARD_VENDOR_ID, 0x3000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 181 {PCI_DEVICE(APCI3200_BOARD_VENDOR_ID, 0x3000)},
182#endif 182#endif
183#ifdef CONFIG_APCI_3300 183#ifdef CONFIG_APCI_3300
184 {APCI3200_BOARD_VENDOR_ID, 0x3007, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 184 {PCI_DEVICE(APCI3200_BOARD_VENDOR_ID, 0x3007)},
185#endif 185#endif
186#ifdef CONFIG_APCI_1710 186#ifdef CONFIG_APCI_1710
187 {APCI1710_BOARD_VENDOR_ID, APCI1710_BOARD_DEVICE_ID, 187 {PCI_DEVICE(APCI1710_BOARD_VENDOR_ID, APCI1710_BOARD_DEVICE_ID)},
188 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
189#endif 188#endif
190#ifdef CONFIG_APCI_16XX 189#ifdef CONFIG_APCI_16XX
191 {0x15B8, 0x1009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 190 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1009)},
192 {0x15B8, 0x100A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 191 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x100A)},
193#endif 192#endif
194#ifdef CONFIG_APCI_3XXX 193#ifdef CONFIG_APCI_3XXX
195 {0x15B8, 0x3010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 194 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3010)},
196 {0x15B8, 0x300F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 195 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300F)},
197 {0x15B8, 0x300E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 196 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300E)},
198 {0x15B8, 0x3013, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 197 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3013)},
199 {0x15B8, 0x3014, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 198 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3014)},
200 {0x15B8, 0x3015, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 199 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3015)},
201 {0x15B8, 0x3016, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 200 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3016)},
202 {0x15B8, 0x3017, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 201 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3017)},
203 {0x15B8, 0x3018, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 202 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3018)},
204 {0x15B8, 0x3019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 203 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3019)},
205 {0x15B8, 0x301A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 204 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301A)},
206 {0x15B8, 0x301B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 205 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301B)},
207 {0x15B8, 0x301C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 206 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301C)},
208 {0x15B8, 0x301D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 207 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301D)},
209 {0x15B8, 0x301E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 208 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301E)},
210 {0x15B8, 0x301F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 209 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x301F)},
211 {0x15B8, 0x3020, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 210 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3020)},
212 {0x15B8, 0x3021, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 211 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3021)},
213 {0x15B8, 0x3022, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 212 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3022)},
214 {0x15B8, 0x3023, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 213 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3023)},
215 {0x15B8, 0x300B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 214 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x300B)},
216 {0x15B8, 0x3002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 215 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3002)},
217 {0x15B8, 0x3003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 216 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3003)},
218 {0x15B8, 0x3004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 217 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3004)},
219 {0x15B8, 0x3024, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 218 {PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x3024)},
220#endif 219#endif
221 {0} 220 {0}
222}; 221};
@@ -1019,7 +1018,7 @@ static const struct addi_board boardtypes[] = {
1019#endif 1018#endif
1020#ifdef CONFIG_APCI_16XX 1019#ifdef CONFIG_APCI_16XX
1021 {"apci1648", 1020 {"apci1648",
1022 0x15B8, 1021 PCI_VENDOR_ID_ADDIDATA,
1023 0x1009, 1022 0x1009,
1024 128, 1023 128,
1025 0, 1024 0,
@@ -1075,7 +1074,7 @@ static const struct addi_board boardtypes[] = {
1075 i_APCI16XX_InsnBitsWriteTTLIO}, 1074 i_APCI16XX_InsnBitsWriteTTLIO},
1076 1075
1077 {"apci1696", 1076 {"apci1696",
1078 0x15B8, 1077 PCI_VENDOR_ID_ADDIDATA,
1079 0x100A, 1078 0x100A,
1080 128, 1079 128,
1081 0, 1080 0,
@@ -1132,7 +1131,7 @@ static const struct addi_board boardtypes[] = {
1132#endif 1131#endif
1133#ifdef CONFIG_APCI_3XXX 1132#ifdef CONFIG_APCI_3XXX
1134 {"apci3000-16", 1133 {"apci3000-16",
1135 0x15B8, 1134 PCI_VENDOR_ID_ADDIDATA,
1136 0x3010, 1135 0x3010,
1137 256, 1136 256,
1138 256, 1137 256,
@@ -1188,7 +1187,7 @@ static const struct addi_board boardtypes[] = {
1188 i_APCI3XXX_InsnWriteTTLIO}, 1187 i_APCI3XXX_InsnWriteTTLIO},
1189 1188
1190 {"apci3000-8", 1189 {"apci3000-8",
1191 0x15B8, 1190 PCI_VENDOR_ID_ADDIDATA,
1192 0x300F, 1191 0x300F,
1193 256, 1192 256,
1194 256, 1193 256,
@@ -1244,7 +1243,7 @@ static const struct addi_board boardtypes[] = {
1244 i_APCI3XXX_InsnWriteTTLIO}, 1243 i_APCI3XXX_InsnWriteTTLIO},
1245 1244
1246 {"apci3000-4", 1245 {"apci3000-4",
1247 0x15B8, 1246 PCI_VENDOR_ID_ADDIDATA,
1248 0x300E, 1247 0x300E,
1249 256, 1248 256,
1250 256, 1249 256,
@@ -1300,7 +1299,7 @@ static const struct addi_board boardtypes[] = {
1300 i_APCI3XXX_InsnWriteTTLIO}, 1299 i_APCI3XXX_InsnWriteTTLIO},
1301 1300
1302 {"apci3006-16", 1301 {"apci3006-16",
1303 0x15B8, 1302 PCI_VENDOR_ID_ADDIDATA,
1304 0x3013, 1303 0x3013,
1305 256, 1304 256,
1306 256, 1305 256,
@@ -1356,7 +1355,7 @@ static const struct addi_board boardtypes[] = {
1356 i_APCI3XXX_InsnWriteTTLIO}, 1355 i_APCI3XXX_InsnWriteTTLIO},
1357 1356
1358 {"apci3006-8", 1357 {"apci3006-8",
1359 0x15B8, 1358 PCI_VENDOR_ID_ADDIDATA,
1360 0x3014, 1359 0x3014,
1361 256, 1360 256,
1362 256, 1361 256,
@@ -1412,7 +1411,7 @@ static const struct addi_board boardtypes[] = {
1412 i_APCI3XXX_InsnWriteTTLIO}, 1411 i_APCI3XXX_InsnWriteTTLIO},
1413 1412
1414 {"apci3006-4", 1413 {"apci3006-4",
1415 0x15B8, 1414 PCI_VENDOR_ID_ADDIDATA,
1416 0x3015, 1415 0x3015,
1417 256, 1416 256,
1418 256, 1417 256,
@@ -1468,7 +1467,7 @@ static const struct addi_board boardtypes[] = {
1468 i_APCI3XXX_InsnWriteTTLIO}, 1467 i_APCI3XXX_InsnWriteTTLIO},
1469 1468
1470 {"apci3010-16", 1469 {"apci3010-16",
1471 0x15B8, 1470 PCI_VENDOR_ID_ADDIDATA,
1472 0x3016, 1471 0x3016,
1473 256, 1472 256,
1474 256, 1473 256,
@@ -1524,7 +1523,7 @@ static const struct addi_board boardtypes[] = {
1524 i_APCI3XXX_InsnWriteTTLIO}, 1523 i_APCI3XXX_InsnWriteTTLIO},
1525 1524
1526 {"apci3010-8", 1525 {"apci3010-8",
1527 0x15B8, 1526 PCI_VENDOR_ID_ADDIDATA,
1528 0x3017, 1527 0x3017,
1529 256, 1528 256,
1530 256, 1529 256,
@@ -1580,7 +1579,7 @@ static const struct addi_board boardtypes[] = {
1580 i_APCI3XXX_InsnWriteTTLIO}, 1579 i_APCI3XXX_InsnWriteTTLIO},
1581 1580
1582 {"apci3010-4", 1581 {"apci3010-4",
1583 0x15B8, 1582 PCI_VENDOR_ID_ADDIDATA,
1584 0x3018, 1583 0x3018,
1585 256, 1584 256,
1586 256, 1585 256,
@@ -1636,7 +1635,7 @@ static const struct addi_board boardtypes[] = {
1636 i_APCI3XXX_InsnWriteTTLIO}, 1635 i_APCI3XXX_InsnWriteTTLIO},
1637 1636
1638 {"apci3016-16", 1637 {"apci3016-16",
1639 0x15B8, 1638 PCI_VENDOR_ID_ADDIDATA,
1640 0x3019, 1639 0x3019,
1641 256, 1640 256,
1642 256, 1641 256,
@@ -1692,7 +1691,7 @@ static const struct addi_board boardtypes[] = {
1692 i_APCI3XXX_InsnWriteTTLIO}, 1691 i_APCI3XXX_InsnWriteTTLIO},
1693 1692
1694 {"apci3016-8", 1693 {"apci3016-8",
1695 0x15B8, 1694 PCI_VENDOR_ID_ADDIDATA,
1696 0x301A, 1695 0x301A,
1697 256, 1696 256,
1698 256, 1697 256,
@@ -1748,7 +1747,7 @@ static const struct addi_board boardtypes[] = {
1748 i_APCI3XXX_InsnWriteTTLIO}, 1747 i_APCI3XXX_InsnWriteTTLIO},
1749 1748
1750 {"apci3016-4", 1749 {"apci3016-4",
1751 0x15B8, 1750 PCI_VENDOR_ID_ADDIDATA,
1752 0x301B, 1751 0x301B,
1753 256, 1752 256,
1754 256, 1753 256,
@@ -1804,7 +1803,7 @@ static const struct addi_board boardtypes[] = {
1804 i_APCI3XXX_InsnWriteTTLIO}, 1803 i_APCI3XXX_InsnWriteTTLIO},
1805 1804
1806 {"apci3100-16-4", 1805 {"apci3100-16-4",
1807 0x15B8, 1806 PCI_VENDOR_ID_ADDIDATA,
1808 0x301C, 1807 0x301C,
1809 256, 1808 256,
1810 256, 1809 256,
@@ -1860,7 +1859,7 @@ static const struct addi_board boardtypes[] = {
1860 i_APCI3XXX_InsnWriteTTLIO}, 1859 i_APCI3XXX_InsnWriteTTLIO},
1861 1860
1862 {"apci3100-8-4", 1861 {"apci3100-8-4",
1863 0x15B8, 1862 PCI_VENDOR_ID_ADDIDATA,
1864 0x301D, 1863 0x301D,
1865 256, 1864 256,
1866 256, 1865 256,
@@ -1916,7 +1915,7 @@ static const struct addi_board boardtypes[] = {
1916 i_APCI3XXX_InsnWriteTTLIO}, 1915 i_APCI3XXX_InsnWriteTTLIO},
1917 1916
1918 {"apci3106-16-4", 1917 {"apci3106-16-4",
1919 0x15B8, 1918 PCI_VENDOR_ID_ADDIDATA,
1920 0x301E, 1919 0x301E,
1921 256, 1920 256,
1922 256, 1921 256,
@@ -1972,7 +1971,7 @@ static const struct addi_board boardtypes[] = {
1972 i_APCI3XXX_InsnWriteTTLIO}, 1971 i_APCI3XXX_InsnWriteTTLIO},
1973 1972
1974 {"apci3106-8-4", 1973 {"apci3106-8-4",
1975 0x15B8, 1974 PCI_VENDOR_ID_ADDIDATA,
1976 0x301F, 1975 0x301F,
1977 256, 1976 256,
1978 256, 1977 256,
@@ -2028,7 +2027,7 @@ static const struct addi_board boardtypes[] = {
2028 i_APCI3XXX_InsnWriteTTLIO}, 2027 i_APCI3XXX_InsnWriteTTLIO},
2029 2028
2030 {"apci3110-16-4", 2029 {"apci3110-16-4",
2031 0x15B8, 2030 PCI_VENDOR_ID_ADDIDATA,
2032 0x3020, 2031 0x3020,
2033 256, 2032 256,
2034 256, 2033 256,
@@ -2084,7 +2083,7 @@ static const struct addi_board boardtypes[] = {
2084 i_APCI3XXX_InsnWriteTTLIO}, 2083 i_APCI3XXX_InsnWriteTTLIO},
2085 2084
2086 {"apci3110-8-4", 2085 {"apci3110-8-4",
2087 0x15B8, 2086 PCI_VENDOR_ID_ADDIDATA,
2088 0x3021, 2087 0x3021,
2089 256, 2088 256,
2090 256, 2089 256,
@@ -2140,7 +2139,7 @@ static const struct addi_board boardtypes[] = {
2140 i_APCI3XXX_InsnWriteTTLIO}, 2139 i_APCI3XXX_InsnWriteTTLIO},
2141 2140
2142 {"apci3116-16-4", 2141 {"apci3116-16-4",
2143 0x15B8, 2142 PCI_VENDOR_ID_ADDIDATA,
2144 0x3022, 2143 0x3022,
2145 256, 2144 256,
2146 256, 2145 256,
@@ -2196,7 +2195,7 @@ static const struct addi_board boardtypes[] = {
2196 i_APCI3XXX_InsnWriteTTLIO}, 2195 i_APCI3XXX_InsnWriteTTLIO},
2197 2196
2198 {"apci3116-8-4", 2197 {"apci3116-8-4",
2199 0x15B8, 2198 PCI_VENDOR_ID_ADDIDATA,
2200 0x3023, 2199 0x3023,
2201 256, 2200 256,
2202 256, 2201 256,
@@ -2252,7 +2251,7 @@ static const struct addi_board boardtypes[] = {
2252 i_APCI3XXX_InsnWriteTTLIO}, 2251 i_APCI3XXX_InsnWriteTTLIO},
2253 2252
2254 {"apci3003", 2253 {"apci3003",
2255 0x15B8, 2254 PCI_VENDOR_ID_ADDIDATA,
2256 0x300B, 2255 0x300B,
2257 256, 2256 256,
2258 256, 2257 256,
@@ -2307,7 +2306,7 @@ static const struct addi_board boardtypes[] = {
2307 NULL}, 2306 NULL},
2308 2307
2309 {"apci3002-16", 2308 {"apci3002-16",
2310 0x15B8, 2309 PCI_VENDOR_ID_ADDIDATA,
2311 0x3002, 2310 0x3002,
2312 256, 2311 256,
2313 256, 2312 256,
@@ -2362,7 +2361,7 @@ static const struct addi_board boardtypes[] = {
2362 NULL}, 2361 NULL},
2363 2362
2364 {"apci3002-8", 2363 {"apci3002-8",
2365 0x15B8, 2364 PCI_VENDOR_ID_ADDIDATA,
2366 0x3003, 2365 0x3003,
2367 256, 2366 256,
2368 256, 2367 256,
@@ -2417,7 +2416,7 @@ static const struct addi_board boardtypes[] = {
2417 NULL}, 2416 NULL},
2418 2417
2419 {"apci3002-4", 2418 {"apci3002-4",
2420 0x15B8, 2419 PCI_VENDOR_ID_ADDIDATA,
2421 0x3004, 2420 0x3004,
2422 256, 2421 256,
2423 256, 2422 256,
@@ -2472,7 +2471,7 @@ static const struct addi_board boardtypes[] = {
2472 NULL}, 2471 NULL},
2473 2472
2474 {"apci3500", 2473 {"apci3500",
2475 0x15B8, 2474 PCI_VENDOR_ID_ADDIDATA,
2476 0x3024, 2475 0x3024,
2477 256, 2476 256,
2478 256, 2477 256,
diff --git a/drivers/staging/comedi/drivers/adl_pci7230.c b/drivers/staging/comedi/drivers/adl_pci7230.c
index 72a7258b5b92..20d570554fa4 100644
--- a/drivers/staging/comedi/drivers/adl_pci7230.c
+++ b/drivers/staging/comedi/drivers/adl_pci7230.c
@@ -44,15 +44,7 @@ Configuration Options:
44#define PCI_DEVICE_ID_PCI7230 0x7230 44#define PCI_DEVICE_ID_PCI7230 0x7230
45 45
46static DEFINE_PCI_DEVICE_TABLE(adl_pci7230_pci_table) = { 46static DEFINE_PCI_DEVICE_TABLE(adl_pci7230_pci_table) = {
47 { 47 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI7230) },
48 PCI_VENDOR_ID_ADLINK,
49 PCI_DEVICE_ID_PCI7230,
50 PCI_ANY_ID,
51 PCI_ANY_ID,
52 0,
53 0,
54 0
55 },
56 {0} 48 {0}
57}; 49};
58 50
diff --git a/drivers/staging/comedi/drivers/adl_pci7296.c b/drivers/staging/comedi/drivers/adl_pci7296.c
index f28fe6bec050..9a2320537bdb 100644
--- a/drivers/staging/comedi/drivers/adl_pci7296.c
+++ b/drivers/staging/comedi/drivers/adl_pci7296.c
@@ -49,10 +49,8 @@ Configuration Options:
49#define PCI_DEVICE_ID_PCI7296 0x7296 49#define PCI_DEVICE_ID_PCI7296 0x7296
50 50
51static DEFINE_PCI_DEVICE_TABLE(adl_pci7296_pci_table) = { 51static DEFINE_PCI_DEVICE_TABLE(adl_pci7296_pci_table) = {
52 { 52 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI7296) },
53 PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI7296, PCI_ANY_ID, 53 {0}
54 PCI_ANY_ID, 0, 0, 0}, {
55 0}
56}; 54};
57 55
58MODULE_DEVICE_TABLE(pci, adl_pci7296_pci_table); 56MODULE_DEVICE_TABLE(pci, adl_pci7296_pci_table);
diff --git a/drivers/staging/comedi/drivers/adl_pci7432.c b/drivers/staging/comedi/drivers/adl_pci7432.c
index 262da7b29b28..86ee21976041 100644
--- a/drivers/staging/comedi/drivers/adl_pci7432.c
+++ b/drivers/staging/comedi/drivers/adl_pci7432.c
@@ -44,10 +44,8 @@ Configuration Options:
44#define PCI_DEVICE_ID_PCI7432 0x7432 44#define PCI_DEVICE_ID_PCI7432 0x7432
45 45
46static DEFINE_PCI_DEVICE_TABLE(adl_pci7432_pci_table) = { 46static DEFINE_PCI_DEVICE_TABLE(adl_pci7432_pci_table) = {
47 { 47 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI7432) },
48 PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI7432, PCI_ANY_ID, 48 {0}
49 PCI_ANY_ID, 0, 0, 0}, {
50 0}
51}; 49};
52 50
53MODULE_DEVICE_TABLE(pci, adl_pci7432_pci_table); 51MODULE_DEVICE_TABLE(pci, adl_pci7432_pci_table);
diff --git a/drivers/staging/comedi/drivers/adl_pci8164.c b/drivers/staging/comedi/drivers/adl_pci8164.c
index 767a594935c7..3b83d65bc1bc 100644
--- a/drivers/staging/comedi/drivers/adl_pci8164.c
+++ b/drivers/staging/comedi/drivers/adl_pci8164.c
@@ -57,10 +57,8 @@ Configuration Options:
57#define PCI_DEVICE_ID_PCI8164 0x8164 57#define PCI_DEVICE_ID_PCI8164 0x8164
58 58
59static DEFINE_PCI_DEVICE_TABLE(adl_pci8164_pci_table) = { 59static DEFINE_PCI_DEVICE_TABLE(adl_pci8164_pci_table) = {
60 { 60 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI8164) },
61 PCI_VENDOR_ID_ADLINK, PCI_DEVICE_ID_PCI8164, PCI_ANY_ID, 61 {0}
62 PCI_ANY_ID, 0, 0, 0}, {
63 0}
64}; 62};
65 63
66MODULE_DEVICE_TABLE(pci, adl_pci8164_pci_table); 64MODULE_DEVICE_TABLE(pci, adl_pci8164_pci_table);
diff --git a/drivers/staging/comedi/drivers/adl_pci9111.c b/drivers/staging/comedi/drivers/adl_pci9111.c
index fc48bae42ab7..2a9bd88a4abb 100644
--- a/drivers/staging/comedi/drivers/adl_pci9111.c
+++ b/drivers/staging/comedi/drivers/adl_pci9111.c
@@ -311,10 +311,8 @@ static const struct comedi_lrange pci9111_hr_ai_range = {
311}; 311};
312 312
313static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = { 313static DEFINE_PCI_DEVICE_TABLE(pci9111_pci_table) = {
314 { PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 314 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
315 0, 0, 0 }, 315 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
316 /* { PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
317 * 0, 0, 0 }, */
318 { 0 } 316 { 0 }
319}; 317};
320 318
diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c
index da2b75b15d4e..8318c82a555a 100644
--- a/drivers/staging/comedi/drivers/adv_pci1710.c
+++ b/drivers/staging/comedi/drivers/adv_pci1710.c
@@ -1382,16 +1382,14 @@ static int pci1710_attach(struct comedi_device *dev,
1382 int i; 1382 int i;
1383 int board_index; 1383 int board_index;
1384 1384
1385 printk("comedi%d: adv_pci1710: ", dev->minor); 1385 dev_info(dev->hw_dev, "comedi%d: adv_pci1710:\n", dev->minor);
1386 1386
1387 opt_bus = it->options[0]; 1387 opt_bus = it->options[0];
1388 opt_slot = it->options[1]; 1388 opt_slot = it->options[1];
1389 1389
1390 ret = alloc_private(dev, sizeof(struct pci1710_private)); 1390 ret = alloc_private(dev, sizeof(struct pci1710_private));
1391 if (ret < 0) { 1391 if (ret < 0)
1392 printk(" - Allocation failed!\n");
1393 return -ENOMEM; 1392 return -ENOMEM;
1394 }
1395 1393
1396 /* Look for matching PCI device */ 1394 /* Look for matching PCI device */
1397 errstr = "not found!"; 1395 errstr = "not found!";
@@ -1436,10 +1434,10 @@ static int pci1710_attach(struct comedi_device *dev,
1436 1434
1437 if (!pcidev) { 1435 if (!pcidev) {
1438 if (opt_bus || opt_slot) { 1436 if (opt_bus || opt_slot) {
1439 printk(" - Card at b:s %d:%d %s\n", 1437 dev_err(dev->hw_dev, "- Card at b:s %d:%d %s\n",
1440 opt_bus, opt_slot, errstr); 1438 opt_bus, opt_slot, errstr);
1441 } else { 1439 } else {
1442 printk(" - Card %s\n", errstr); 1440 dev_err(dev->hw_dev, "- Card %s\n", errstr);
1443 } 1441 }
1444 return -EIO; 1442 return -EIO;
1445 } 1443 }
@@ -1450,8 +1448,8 @@ static int pci1710_attach(struct comedi_device *dev,
1450 irq = pcidev->irq; 1448 irq = pcidev->irq;
1451 iobase = pci_resource_start(pcidev, 2); 1449 iobase = pci_resource_start(pcidev, 2);
1452 1450
1453 printk(", b:s:f=%d:%d:%d, io=0x%4lx", pci_bus, pci_slot, pci_func, 1451 dev_dbg(dev->hw_dev, "b:s:f=%d:%d:%d, io=0x%4lx\n", pci_bus, pci_slot,
1454 iobase); 1452 pci_func, iobase);
1455 1453
1456 dev->iobase = iobase; 1454 dev->iobase = iobase;
1457 1455
@@ -1471,10 +1469,8 @@ static int pci1710_attach(struct comedi_device *dev,
1471 n_subdevices++; 1469 n_subdevices++;
1472 1470
1473 ret = alloc_subdevices(dev, n_subdevices); 1471 ret = alloc_subdevices(dev, n_subdevices);
1474 if (ret < 0) { 1472 if (ret < 0)
1475 printk(" - Allocation failed!\n");
1476 return ret; 1473 return ret;
1477 }
1478 1474
1479 pci1710_reset(dev); 1475 pci1710_reset(dev);
1480 1476
@@ -1483,24 +1479,20 @@ static int pci1710_attach(struct comedi_device *dev,
1483 if (request_irq(irq, interrupt_service_pci1710, 1479 if (request_irq(irq, interrupt_service_pci1710,
1484 IRQF_SHARED, "Advantech PCI-1710", 1480 IRQF_SHARED, "Advantech PCI-1710",
1485 dev)) { 1481 dev)) {
1486 printk 1482 dev_dbg(dev->hw_dev, "unable to allocate IRQ %d, DISABLING IT",
1487 (", unable to allocate IRQ %d, DISABLING IT", 1483 irq);
1488 irq);
1489 irq = 0; /* Can't use IRQ */ 1484 irq = 0; /* Can't use IRQ */
1490 } else { 1485 } else {
1491 printk(", irq=%u", irq); 1486 dev_dbg(dev->hw_dev, "irq=%u", irq);
1492 } 1487 }
1493 } else { 1488 } else {
1494 printk(", IRQ disabled"); 1489 dev_dbg(dev->hw_dev, "IRQ disabled");
1495 } 1490 }
1496 } else { 1491 } else {
1497 irq = 0; 1492 irq = 0;
1498 } 1493 }
1499 1494
1500 dev->irq = irq; 1495 dev->irq = irq;
1501
1502 printk(".\n");
1503
1504 subdev = 0; 1496 subdev = 0;
1505 1497
1506 if (this_board->n_aichan) { 1498 if (this_board->n_aichan) {
diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c
index 69334f6f64e8..537e58534275 100644
--- a/drivers/staging/comedi/drivers/adv_pci_dio.c
+++ b/drivers/staging/comedi/drivers/adv_pci_dio.c
@@ -1106,13 +1106,10 @@ static int pci_dio_attach(struct comedi_device *dev,
1106 unsigned long iobase; 1106 unsigned long iobase;
1107 struct pci_dev *pcidev = NULL; 1107 struct pci_dev *pcidev = NULL;
1108 1108
1109 printk("comedi%d: adv_pci_dio: ", dev->minor);
1110 1109
1111 ret = alloc_private(dev, sizeof(struct pci_dio_private)); 1110 ret = alloc_private(dev, sizeof(struct pci_dio_private));
1112 if (ret < 0) { 1111 if (ret < 0)
1113 printk(", Error: Cann't allocate private memory!\n");
1114 return -ENOMEM; 1112 return -ENOMEM;
1115 }
1116 1113
1117 for_each_pci_dev(pcidev) { 1114 for_each_pci_dev(pcidev) {
1118 /* loop through cards supported by this driver */ 1115 /* loop through cards supported by this driver */
@@ -1140,19 +1137,18 @@ static int pci_dio_attach(struct comedi_device *dev,
1140 } 1137 }
1141 1138
1142 if (!dev->board_ptr) { 1139 if (!dev->board_ptr) {
1143 printk(", Error: Requested type of the card was not found!\n"); 1140 dev_err(dev->hw_dev, "Error: Requested type of the card was not found!\n");
1144 return -EIO; 1141 return -EIO;
1145 } 1142 }
1146 1143
1147 if (comedi_pci_enable(pcidev, driver_pci_dio.driver_name)) { 1144 if (comedi_pci_enable(pcidev, driver_pci_dio.driver_name)) {
1148 printk 1145 dev_err(dev->hw_dev, "Error: Can't enable PCI device and request regions!\n");
1149 (", Error: Can't enable PCI device and request regions!\n");
1150 return -EIO; 1146 return -EIO;
1151 } 1147 }
1152 iobase = pci_resource_start(pcidev, this_board->main_pci_region); 1148 iobase = pci_resource_start(pcidev, this_board->main_pci_region);
1153 printk(", b:s:f=%d:%d:%d, io=0x%4lx", 1149 dev_dbg(dev->hw_dev, "b:s:f=%d:%d:%d, io=0x%4lx\n",
1154 pcidev->bus->number, PCI_SLOT(pcidev->devfn), 1150 pcidev->bus->number, PCI_SLOT(pcidev->devfn),
1155 PCI_FUNC(pcidev->devfn), iobase); 1151 PCI_FUNC(pcidev->devfn), iobase);
1156 1152
1157 dev->iobase = iobase; 1153 dev->iobase = iobase;
1158 dev->board_name = this_board->name; 1154 dev->board_name = this_board->name;
@@ -1177,15 +1173,10 @@ static int pci_dio_attach(struct comedi_device *dev,
1177 } 1173 }
1178 1174
1179 ret = alloc_subdevices(dev, n_subdevices); 1175 ret = alloc_subdevices(dev, n_subdevices);
1180 if (ret < 0) { 1176 if (ret < 0)
1181 printk(", Error: Cann't allocate subdevice memory!\n");
1182 return ret; 1177 return ret;
1183 }
1184
1185 printk(".\n");
1186 1178
1187 subdev = 0; 1179 subdev = 0;
1188
1189 for (i = 0; i < MAX_DI_SUBDEVS; i++) 1180 for (i = 0; i < MAX_DI_SUBDEVS; i++)
1190 if (this_board->sdi[i].chans) { 1181 if (this_board->sdi[i].chans) {
1191 s = dev->subdevices + subdev; 1182 s = dev->subdevices + subdev;
diff --git a/drivers/staging/comedi/drivers/amplc_dio200.c b/drivers/staging/comedi/drivers/amplc_dio200.c
index 93bbe4ec318d..566cc4411452 100644
--- a/drivers/staging/comedi/drivers/amplc_dio200.c
+++ b/drivers/staging/comedi/drivers/amplc_dio200.c
@@ -421,12 +421,9 @@ static const struct dio200_layout_struct dio200_layouts[] = {
421 421
422#ifdef CONFIG_COMEDI_PCI 422#ifdef CONFIG_COMEDI_PCI
423static DEFINE_PCI_DEVICE_TABLE(dio200_pci_table) = { 423static DEFINE_PCI_DEVICE_TABLE(dio200_pci_table) = {
424 { 424 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI215) },
425 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI215, 425 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI272) },
426 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 426 {0}
427 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI272,
428 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
429 0}
430}; 427};
431 428
432MODULE_DEVICE_TABLE(pci, dio200_pci_table); 429MODULE_DEVICE_TABLE(pci, dio200_pci_table);
diff --git a/drivers/staging/comedi/drivers/amplc_pc236.c b/drivers/staging/comedi/drivers/amplc_pc236.c
index 48246cd50d47..7972cadd403e 100644
--- a/drivers/staging/comedi/drivers/amplc_pc236.c
+++ b/drivers/staging/comedi/drivers/amplc_pc236.c
@@ -134,10 +134,8 @@ static const struct pc236_board pc236_boards[] = {
134 134
135#ifdef CONFIG_COMEDI_PCI 135#ifdef CONFIG_COMEDI_PCI
136static DEFINE_PCI_DEVICE_TABLE(pc236_pci_table) = { 136static DEFINE_PCI_DEVICE_TABLE(pc236_pci_table) = {
137 { 137 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI236) },
138 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI236, 138 {0}
139 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
140 0}
141}; 139};
142 140
143MODULE_DEVICE_TABLE(pci, pc236_pci_table); 141MODULE_DEVICE_TABLE(pci, pc236_pci_table);
diff --git a/drivers/staging/comedi/drivers/amplc_pc263.c b/drivers/staging/comedi/drivers/amplc_pc263.c
index 8a3388079094..191ac0d23ce7 100644
--- a/drivers/staging/comedi/drivers/amplc_pc263.c
+++ b/drivers/staging/comedi/drivers/amplc_pc263.c
@@ -101,10 +101,8 @@ static const struct pc263_board pc263_boards[] = {
101 101
102#ifdef CONFIG_COMEDI_PCI 102#ifdef CONFIG_COMEDI_PCI
103static DEFINE_PCI_DEVICE_TABLE(pc263_pci_table) = { 103static DEFINE_PCI_DEVICE_TABLE(pc263_pci_table) = {
104 { 104 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI263) },
105 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI263, 105 {0}
106 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
107 0}
108}; 106};
109 107
110MODULE_DEVICE_TABLE(pci, pc263_pci_table); 108MODULE_DEVICE_TABLE(pci, pc263_pci_table);
diff --git a/drivers/staging/comedi/drivers/amplc_pci224.c b/drivers/staging/comedi/drivers/amplc_pci224.c
index 1b5ba1c27259..b278917cec25 100644
--- a/drivers/staging/comedi/drivers/amplc_pci224.c
+++ b/drivers/staging/comedi/drivers/amplc_pci224.c
@@ -384,12 +384,9 @@ static const struct pci224_board pci224_boards[] = {
384 */ 384 */
385 385
386static DEFINE_PCI_DEVICE_TABLE(pci224_pci_table) = { 386static DEFINE_PCI_DEVICE_TABLE(pci224_pci_table) = {
387 { 387 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI224) },
388 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI224, 388 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI234) },
389 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 389 {0}
390 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI234,
391 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
392 0}
393}; 390};
394 391
395MODULE_DEVICE_TABLE(pci, pci224_pci_table); 392MODULE_DEVICE_TABLE(pci, pci224_pci_table);
diff --git a/drivers/staging/comedi/drivers/amplc_pci230.c b/drivers/staging/comedi/drivers/amplc_pci230.c
index 7edeb1103dc8..538979551c8e 100644
--- a/drivers/staging/comedi/drivers/amplc_pci230.c
+++ b/drivers/staging/comedi/drivers/amplc_pci230.c
@@ -501,12 +501,9 @@ static const struct pci230_board pci230_boards[] = {
501}; 501};
502 502
503static DEFINE_PCI_DEVICE_TABLE(pci230_pci_table) = { 503static DEFINE_PCI_DEVICE_TABLE(pci230_pci_table) = {
504 { 504 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI230) },
505 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI230, PCI_ANY_ID, 505 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI260) },
506 PCI_ANY_ID, 0, 0, 0}, { 506 {0}
507 PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI260, PCI_ANY_ID,
508 PCI_ANY_ID, 0, 0, 0}, {
509 0}
510}; 507};
511 508
512MODULE_DEVICE_TABLE(pci, pci230_pci_table); 509MODULE_DEVICE_TABLE(pci, pci230_pci_table);
diff --git a/drivers/staging/comedi/drivers/cb_das16_cs.c b/drivers/staging/comedi/drivers/cb_das16_cs.c
index e171c56112d8..49404f49f7b7 100644
--- a/drivers/staging/comedi/drivers/cb_das16_cs.c
+++ b/drivers/staging/comedi/drivers/cb_das16_cs.c
@@ -99,7 +99,7 @@ static struct comedi_driver driver_das16cs = {
99 .detach = das16cs_detach, 99 .detach = das16cs_detach,
100}; 100};
101 101
102static struct pcmcia_device *cur_dev = NULL; 102static struct pcmcia_device *cur_dev;
103 103
104static const struct comedi_lrange das16cs_ai_range = { 4, { 104static const struct comedi_lrange das16cs_ai_range = { 4, {
105 RANGE(-10, 10), 105 RANGE(-10, 10),
@@ -150,7 +150,7 @@ static const struct das16cs_board *das16cs_probe(struct comedi_device *dev,
150 return das16cs_boards + i; 150 return das16cs_boards + i;
151 } 151 }
152 152
153 printk("unknown board!\n"); 153 dev_dbg(dev->hw_dev, "unknown board!\n");
154 154
155 return NULL; 155 return NULL;
156} 156}
@@ -163,20 +163,19 @@ static int das16cs_attach(struct comedi_device *dev,
163 int ret; 163 int ret;
164 int i; 164 int i;
165 165
166 printk("comedi%d: cb_das16_cs: ", dev->minor); 166 dev_dbg(dev->hw_dev, "comedi%d: cb_das16_cs: attached\n", dev->minor);
167 167
168 link = cur_dev; /* XXX hack */ 168 link = cur_dev; /* XXX hack */
169 if (!link) 169 if (!link)
170 return -EIO; 170 return -EIO;
171 171
172 dev->iobase = link->resource[0]->start; 172 dev->iobase = link->resource[0]->start;
173 printk("I/O base=0x%04lx ", dev->iobase); 173 dev_dbg(dev->hw_dev, "I/O base=0x%04lx\n", dev->iobase);
174 174
175 printk("fingerprint:\n"); 175 dev_dbg(dev->hw_dev, "fingerprint:\n");
176 for (i = 0; i < 48; i += 2) 176 for (i = 0; i < 48; i += 2)
177 printk("%04x ", inw(dev->iobase + i)); 177 dev_dbg(dev->hw_dev, "%04x\n", inw(dev->iobase + i));
178 178
179 printk("\n");
180 179
181 ret = request_irq(link->irq, das16cs_interrupt, 180 ret = request_irq(link->irq, das16cs_interrupt,
182 IRQF_SHARED, "cb_das16_cs", dev); 181 IRQF_SHARED, "cb_das16_cs", dev);
@@ -185,7 +184,7 @@ static int das16cs_attach(struct comedi_device *dev,
185 184
186 dev->irq = link->irq; 185 dev->irq = link->irq;
187 186
188 printk("irq=%u ", dev->irq); 187 dev_dbg(dev->hw_dev, "irq=%u\n", dev->irq);
189 188
190 dev->board_ptr = das16cs_probe(dev, link); 189 dev->board_ptr = das16cs_probe(dev, link);
191 if (!dev->board_ptr) 190 if (!dev->board_ptr)
@@ -252,14 +251,13 @@ static int das16cs_attach(struct comedi_device *dev,
252 s->type = COMEDI_SUBD_UNUSED; 251 s->type = COMEDI_SUBD_UNUSED;
253 } 252 }
254 253
255 printk("attached\n");
256 254
257 return 1; 255 return 1;
258} 256}
259 257
260static int das16cs_detach(struct comedi_device *dev) 258static int das16cs_detach(struct comedi_device *dev)
261{ 259{
262 printk("comedi%d: das16cs: remove\n", dev->minor); 260 dev_dbg(dev->hw_dev, "comedi%d: das16cs: remove\n", dev->minor);
263 261
264 if (dev->irq) 262 if (dev->irq)
265 free_irq(dev->irq, dev); 263 free_irq(dev->irq, dev);
@@ -312,7 +310,7 @@ static int das16cs_ai_rinsn(struct comedi_device *dev,
312 break; 310 break;
313 } 311 }
314 if (to == TIMEOUT) { 312 if (to == TIMEOUT) {
315 printk("cb_das16_cs: ai timeout\n"); 313 dev_dbg(dev->hw_dev, "cb_das16_cs: ai timeout\n");
316 return -ETIME; 314 return -ETIME;
317 } 315 }
318 data[i] = (unsigned short)inw(dev->iobase + 0); 316 data[i] = (unsigned short)inw(dev->iobase + 0);
diff --git a/drivers/staging/comedi/drivers/cb_pcidas.c b/drivers/staging/comedi/drivers/cb_pcidas.c
index 61968a505f24..7e4ffcfdac62 100644
--- a/drivers/staging/comedi/drivers/cb_pcidas.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas.c
@@ -565,8 +565,6 @@ static int cb_pcidas_attach(struct comedi_device *dev,
565 int index; 565 int index;
566 int i; 566 int i;
567 567
568 printk("comedi%d: cb_pcidas: ", dev->minor);
569
570/* 568/*
571 * Allocate the private structure area. 569 * Allocate the private structure area.
572 */ 570 */
@@ -576,7 +574,6 @@ static int cb_pcidas_attach(struct comedi_device *dev,
576/* 574/*
577 * Probe the device to determine what device in the series it is. 575 * Probe the device to determine what device in the series it is.
578 */ 576 */
579 printk("\n");
580 577
581 for_each_pci_dev(pcidev) { 578 for_each_pci_dev(pcidev) {
582 /* is it not a computer boards card? */ 579 /* is it not a computer boards card? */
@@ -600,20 +597,20 @@ static int cb_pcidas_attach(struct comedi_device *dev,
600 } 597 }
601 } 598 }
602 599
603 printk("No supported ComputerBoards/MeasurementComputing card found on " 600 dev_err(dev->hw_dev, "No supported ComputerBoards/MeasurementComputing card found on requested position\n");
604 "requested position\n");
605 return -EIO; 601 return -EIO;
606 602
607found: 603found:
608 604
609 printk("Found %s on bus %i, slot %i\n", cb_pcidas_boards[index].name, 605 dev_dbg(dev->hw_dev, "Found %s on bus %i, slot %i\n",
610 pcidev->bus->number, PCI_SLOT(pcidev->devfn)); 606 cb_pcidas_boards[index].name, pcidev->bus->number,
607 PCI_SLOT(pcidev->devfn));
611 608
612 /* 609 /*
613 * Enable PCI device and reserve I/O ports. 610 * Enable PCI device and reserve I/O ports.
614 */ 611 */
615 if (comedi_pci_enable(pcidev, "cb_pcidas")) { 612 if (comedi_pci_enable(pcidev, "cb_pcidas")) {
616 printk(" Failed to enable PCI device and request regions\n"); 613 dev_err(dev->hw_dev, "Failed to enable PCI device and request regions\n");
617 return -EIO; 614 return -EIO;
618 } 615 }
619 /* 616 /*
@@ -639,7 +636,8 @@ found:
639 /* get irq */ 636 /* get irq */
640 if (request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt, 637 if (request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt,
641 IRQF_SHARED, "cb_pcidas", dev)) { 638 IRQF_SHARED, "cb_pcidas", dev)) {
642 printk(" unable to allocate irq %d\n", devpriv->pci_dev->irq); 639 dev_dbg(dev->hw_dev, "unable to allocate irq %d\n",
640 devpriv->pci_dev->irq);
643 return -EINVAL; 641 return -EINVAL;
644 } 642 }
645 dev->irq = devpriv->pci_dev->irq; 643 dev->irq = devpriv->pci_dev->irq;
@@ -768,7 +766,6 @@ found:
768 */ 766 */
769static int cb_pcidas_detach(struct comedi_device *dev) 767static int cb_pcidas_detach(struct comedi_device *dev)
770{ 768{
771 printk("comedi%d: cb_pcidas: remove\n", dev->minor);
772 769
773 if (devpriv) { 770 if (devpriv) {
774 if (devpriv->s5933_config) { 771 if (devpriv->s5933_config) {
@@ -776,8 +773,8 @@ static int cb_pcidas_detach(struct comedi_device *dev)
776 outl(INTCSR_INBOX_INTR_STATUS, 773 outl(INTCSR_INBOX_INTR_STATUS,
777 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 774 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
778#ifdef CB_PCIDAS_DEBUG 775#ifdef CB_PCIDAS_DEBUG
779 printk("detaching, incsr is 0x%x\n", 776 dev_dbg(dev->hw_dev, "detaching, incsr is 0x%x\n",
780 inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR)); 777 inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR));
781#endif 778#endif
782 } 779 }
783 } 780 }
@@ -858,7 +855,8 @@ static int ai_config_calibration_source(struct comedi_device *dev,
858 unsigned int source = data[1]; 855 unsigned int source = data[1];
859 856
860 if (source >= num_calibration_sources) { 857 if (source >= num_calibration_sources) {
861 printk("invalid calibration source: %i\n", source); 858 dev_err(dev->hw_dev, "invalid calibration source: %i\n",
859 source);
862 return -EINVAL; 860 return -EINVAL;
863 } 861 }
864 862
@@ -1279,7 +1277,7 @@ static int cb_pcidas_ai_cmd(struct comedi_device *dev,
1279 outw(bits, devpriv->control_status + ADCMUX_CONT); 1277 outw(bits, devpriv->control_status + ADCMUX_CONT);
1280 1278
1281#ifdef CB_PCIDAS_DEBUG 1279#ifdef CB_PCIDAS_DEBUG
1282 printk("comedi: sent 0x%x to adcmux control\n", bits); 1280 dev_dbg(dev->hw_dev, "comedi: sent 0x%x to adcmux control\n", bits);
1283#endif 1281#endif
1284 1282
1285 /* load counters */ 1283 /* load counters */
@@ -1306,7 +1304,8 @@ static int cb_pcidas_ai_cmd(struct comedi_device *dev,
1306 devpriv->adc_fifo_bits |= INT_FHF; /* interrupt fifo half full */ 1304 devpriv->adc_fifo_bits |= INT_FHF; /* interrupt fifo half full */
1307 } 1305 }
1308#ifdef CB_PCIDAS_DEBUG 1306#ifdef CB_PCIDAS_DEBUG
1309 printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1307 dev_dbg(dev->hw_dev, "comedi: adc_fifo_bits are 0x%x\n",
1308 devpriv->adc_fifo_bits);
1310#endif 1309#endif
1311 /* enable (and clear) interrupts */ 1310 /* enable (and clear) interrupts */
1312 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL, 1311 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL,
@@ -1332,7 +1331,7 @@ static int cb_pcidas_ai_cmd(struct comedi_device *dev,
1332 bits |= BURSTE; 1331 bits |= BURSTE;
1333 outw(bits, devpriv->control_status + TRIG_CONTSTAT); 1332 outw(bits, devpriv->control_status + TRIG_CONTSTAT);
1334#ifdef CB_PCIDAS_DEBUG 1333#ifdef CB_PCIDAS_DEBUG
1335 printk("comedi: sent 0x%x to trig control\n", bits); 1334 dev_dbg(dev->hw_dev, "comedi: sent 0x%x to trig control\n", bits);
1336#endif 1335#endif
1337 1336
1338 return 0; 1337 return 0;
@@ -1549,7 +1548,8 @@ static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
1549 spin_lock_irqsave(&dev->spinlock, flags); 1548 spin_lock_irqsave(&dev->spinlock, flags);
1550 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE; 1549 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE;
1551#ifdef CB_PCIDAS_DEBUG 1550#ifdef CB_PCIDAS_DEBUG
1552 printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1551 dev_dbg(dev->hw_dev, "comedi: adc_fifo_bits are 0x%x\n",
1552 devpriv->adc_fifo_bits);
1553#endif 1553#endif
1554 /* enable and clear interrupts */ 1554 /* enable and clear interrupts */
1555 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI, 1555 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI,
@@ -1559,7 +1559,8 @@ static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
1559 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY; 1559 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY;
1560 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1560 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1561#ifdef CB_PCIDAS_DEBUG 1561#ifdef CB_PCIDAS_DEBUG
1562 printk("comedi: sent 0x%x to dac control\n", devpriv->ao_control_bits); 1562 dev_dbg(dev->hw_dev, "comedi: sent 0x%x to dac control\n",
1563 devpriv->ao_control_bits);
1563#endif 1564#endif
1564 spin_unlock_irqrestore(&dev->spinlock, flags); 1565 spin_unlock_irqrestore(&dev->spinlock, flags);
1565 1566
@@ -1587,8 +1588,9 @@ static irqreturn_t cb_pcidas_interrupt(int irq, void *d)
1587 1588
1588 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR); 1589 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1589#ifdef CB_PCIDAS_DEBUG 1590#ifdef CB_PCIDAS_DEBUG
1590 printk("intcsr 0x%x\n", s5933_status); 1591 dev_dbg(dev->hw_dev, "intcsr 0x%x\n", s5933_status);
1591 printk("mbef 0x%x\n", inl(devpriv->s5933_config + AMCC_OP_REG_MBEF)); 1592 dev_dbg(dev->hw_dev, "mbef 0x%x\n",
1593 inl(devpriv->s5933_config + AMCC_OP_REG_MBEF));
1592#endif 1594#endif
1593 1595
1594 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0) 1596 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0)
diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c
index 1e324198996c..c9e8c4785768 100644
--- a/drivers/staging/comedi/drivers/cb_pcidas64.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas64.c
@@ -1739,8 +1739,6 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
1739 uint32_t local_range, local_decode; 1739 uint32_t local_range, local_decode;
1740 int retval; 1740 int retval;
1741 1741
1742 printk("comedi%d: cb_pcidas64\n", dev->minor);
1743
1744/* 1742/*
1745 * Allocate the private structure area. 1743 * Allocate the private structure area.
1746 */ 1744 */
@@ -1781,12 +1779,11 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
1781 return -EIO; 1779 return -EIO;
1782 } 1780 }
1783 1781
1784 printk("Found %s on bus %i, slot %i\n", board(dev)->name, 1782 dev_dbg(dev->hw_dev, "Found %s on bus %i, slot %i\n", board(dev)->name,
1785 pcidev->bus->number, PCI_SLOT(pcidev->devfn)); 1783 pcidev->bus->number, PCI_SLOT(pcidev->devfn));
1786 1784
1787 if (comedi_pci_enable(pcidev, driver_cb_pcidas.driver_name)) { 1785 if (comedi_pci_enable(pcidev, driver_cb_pcidas.driver_name)) {
1788 printk(KERN_WARNING 1786 dev_warn(dev->hw_dev, "failed to enable PCI device and request regions\n");
1789 " failed to enable PCI device and request regions\n");
1790 return -EIO; 1787 return -EIO;
1791 } 1788 }
1792 pci_set_master(pcidev); 1789 pci_set_master(pcidev);
@@ -1814,7 +1811,7 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
1814 1811
1815 if (!priv(dev)->plx9080_iobase || !priv(dev)->main_iobase 1812 if (!priv(dev)->plx9080_iobase || !priv(dev)->main_iobase
1816 || !priv(dev)->dio_counter_iobase) { 1813 || !priv(dev)->dio_counter_iobase) {
1817 printk(" failed to remap io memory\n"); 1814 dev_warn(dev->hw_dev, "failed to remap io memory\n");
1818 return -ENOMEM; 1815 return -ENOMEM;
1819 } 1816 }
1820 1817
@@ -1850,17 +1847,19 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
1850 1847
1851 priv(dev)->hw_revision = 1848 priv(dev)->hw_revision =
1852 hw_revision(dev, readw(priv(dev)->main_iobase + HW_STATUS_REG)); 1849 hw_revision(dev, readw(priv(dev)->main_iobase + HW_STATUS_REG));
1853 printk(" stc hardware revision %i\n", priv(dev)->hw_revision); 1850 dev_dbg(dev->hw_dev, "stc hardware revision %i\n",
1851 priv(dev)->hw_revision);
1854 init_plx9080(dev); 1852 init_plx9080(dev);
1855 init_stc_registers(dev); 1853 init_stc_registers(dev);
1856 /* get irq */ 1854 /* get irq */
1857 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 1855 if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
1858 "cb_pcidas64", dev)) { 1856 "cb_pcidas64", dev)) {
1859 printk(" unable to allocate irq %u\n", pcidev->irq); 1857 dev_dbg(dev->hw_dev, "unable to allocate irq %u\n",
1858 pcidev->irq);
1860 return -EINVAL; 1859 return -EINVAL;
1861 } 1860 }
1862 dev->irq = pcidev->irq; 1861 dev->irq = pcidev->irq;
1863 printk(" irq %u\n", dev->irq); 1862 dev_dbg(dev->hw_dev, "irq %u\n", dev->irq);
1864 1863
1865 retval = setup_subdevices(dev); 1864 retval = setup_subdevices(dev);
1866 if (retval < 0) 1865 if (retval < 0)
@@ -1882,8 +1881,6 @@ static int detach(struct comedi_device *dev)
1882{ 1881{
1883 unsigned int i; 1882 unsigned int i;
1884 1883
1885 printk("comedi%d: cb_pcidas: remove\n", dev->minor);
1886
1887 if (dev->irq) 1884 if (dev->irq)
1888 free_irq(dev->irq, dev); 1885 free_irq(dev->irq, dev);
1889 if (priv(dev)) { 1886 if (priv(dev)) {
@@ -2093,7 +2090,8 @@ static int ai_config_calibration_source(struct comedi_device *dev,
2093 else 2090 else
2094 num_calibration_sources = 8; 2091 num_calibration_sources = 8;
2095 if (source >= num_calibration_sources) { 2092 if (source >= num_calibration_sources) {
2096 printk("invalid calibration source: %i\n", source); 2093 dev_dbg(dev->hw_dev, "invalid calibration source: %i\n",
2094 source);
2097 return -EINVAL; 2095 return -EINVAL;
2098 } 2096 }
2099 2097
@@ -2924,7 +2922,7 @@ static void pio_drain_ai_fifo_16(struct comedi_device *dev)
2924 } 2922 }
2925 2923
2926 if (num_samples < 0) { 2924 if (num_samples < 0) {
2927 printk(" cb_pcidas64: bug! num_samples < 0\n"); 2925 dev_err(dev->hw_dev, "cb_pcidas64: bug! num_samples < 0\n");
2928 break; 2926 break;
2929 } 2927 }
2930 2928
diff --git a/drivers/staging/comedi/drivers/cb_pcidda.c b/drivers/staging/comedi/drivers/cb_pcidda.c
index 49102b3a6c4a..abba220a767f 100644
--- a/drivers/staging/comedi/drivers/cb_pcidda.c
+++ b/drivers/staging/comedi/drivers/cb_pcidda.c
@@ -282,7 +282,6 @@ static int cb_pcidda_attach(struct comedi_device *dev,
282 struct pci_dev *pcidev = NULL; 282 struct pci_dev *pcidev = NULL;
283 int index; 283 int index;
284 284
285 printk("comedi%d: cb_pcidda: ", dev->minor);
286 285
287/* 286/*
288 * Allocate the private structure area. 287 * Allocate the private structure area.
@@ -293,7 +292,6 @@ static int cb_pcidda_attach(struct comedi_device *dev,
293/* 292/*
294 * Probe the device to determine what device in the series it is. 293 * Probe the device to determine what device in the series it is.
295 */ 294 */
296 printk("\n");
297 295
298 for_each_pci_dev(pcidev) { 296 for_each_pci_dev(pcidev) {
299 if (pcidev->vendor == PCI_VENDOR_ID_CB) { 297 if (pcidev->vendor == PCI_VENDOR_ID_CB) {
@@ -312,22 +310,21 @@ static int cb_pcidda_attach(struct comedi_device *dev,
312 } 310 }
313 } 311 }
314 if (!pcidev) { 312 if (!pcidev) {
315 printk 313 dev_err(dev->hw_dev, "Not a ComputerBoards/MeasurementComputing card on requested position\n");
316 ("Not a ComputerBoards/MeasurementComputing card on requested position\n");
317 return -EIO; 314 return -EIO;
318 } 315 }
319found: 316found:
320 devpriv->pci_dev = pcidev; 317 devpriv->pci_dev = pcidev;
321 dev->board_ptr = cb_pcidda_boards + index; 318 dev->board_ptr = cb_pcidda_boards + index;
322 /* "thisboard" macro can be used from here. */ 319 /* "thisboard" macro can be used from here. */
323 printk("Found %s at requested position\n", thisboard->name); 320 dev_dbg(dev->hw_dev, "Found %s at requested position\n",
321 thisboard->name);
324 322
325 /* 323 /*
326 * Enable PCI device and request regions. 324 * Enable PCI device and request regions.
327 */ 325 */
328 if (comedi_pci_enable(pcidev, thisboard->name)) { 326 if (comedi_pci_enable(pcidev, thisboard->name)) {
329 printk 327 dev_err(dev->hw_dev, "cb_pcidda: failed to enable PCI device and request regions\n");
330 ("cb_pcidda: failed to enable PCI device and request regions\n");
331 return -EIO; 328 return -EIO;
332 } 329 }
333 330
@@ -377,12 +374,11 @@ found:
377 s = dev->subdevices + 2; 374 s = dev->subdevices + 2;
378 subdev_8255_init(dev, s, NULL, devpriv->digitalio + PORT2A); 375 subdev_8255_init(dev, s, NULL, devpriv->digitalio + PORT2A);
379 376
380 printk(" eeprom:"); 377 dev_dbg(dev->hw_dev, "eeprom:\n");
381 for (index = 0; index < EEPROM_SIZE; index++) { 378 for (index = 0; index < EEPROM_SIZE; index++) {
382 devpriv->eeprom_data[index] = cb_pcidda_read_eeprom(dev, index); 379 devpriv->eeprom_data[index] = cb_pcidda_read_eeprom(dev, index);
383 printk(" %i:0x%x ", index, devpriv->eeprom_data[index]); 380 dev_dbg(dev->hw_dev, "%i:0x%x\n", index, devpriv->eeprom_data[index]);
384 } 381 }
385 printk("\n");
386 382
387 /* set calibrations dacs */ 383 /* set calibrations dacs */
388 for (index = 0; index < thisboard->ao_chans; index++) 384 for (index = 0; index < thisboard->ao_chans; index++)
@@ -417,8 +413,6 @@ static int cb_pcidda_detach(struct comedi_device *dev)
417 subdev_8255_cleanup(dev, dev->subdevices + 2); 413 subdev_8255_cleanup(dev, dev->subdevices + 2);
418 } 414 }
419 415
420 printk("comedi%d: cb_pcidda: remove\n", dev->minor);
421
422 return 0; 416 return 0;
423} 417}
424 418
diff --git a/drivers/staging/comedi/drivers/cb_pcidio.c b/drivers/staging/comedi/drivers/cb_pcidio.c
index 79477a595ef9..8f3215239a15 100644
--- a/drivers/staging/comedi/drivers/cb_pcidio.c
+++ b/drivers/staging/comedi/drivers/cb_pcidio.c
@@ -184,8 +184,6 @@ static int pcidio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
184 int index; 184 int index;
185 int i; 185 int i;
186 186
187 printk("comedi%d: cb_pcidio: \n", dev->minor);
188
189/* 187/*
190 * Allocate the private structure area. alloc_private() is a 188 * Allocate the private structure area. alloc_private() is a
191 * convenient macro defined in comedidev.h. 189 * convenient macro defined in comedidev.h.
@@ -223,8 +221,7 @@ static int pcidio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
223 } 221 }
224 } 222 }
225 223
226 printk("No supported ComputerBoards/MeasurementComputing card found on " 224 dev_err(dev->hw_dev, "No supported ComputerBoards/MeasurementComputing card found on requested position\n");
227 "requested position\n");
228 return -EIO; 225 return -EIO;
229 226
230found: 227found:
@@ -236,14 +233,12 @@ found:
236 dev->board_name = thisboard->name; 233 dev->board_name = thisboard->name;
237 234
238 devpriv->pci_dev = pcidev; 235 devpriv->pci_dev = pcidev;
239 printk("Found %s on bus %i, slot %i\n", thisboard->name, 236 dev_dbg(dev->hw_dev, "Found %s on bus %i, slot %i\n", thisboard->name,
240 devpriv->pci_dev->bus->number, 237 devpriv->pci_dev->bus->number,
241 PCI_SLOT(devpriv->pci_dev->devfn)); 238 PCI_SLOT(devpriv->pci_dev->devfn));
242 if (comedi_pci_enable(pcidev, thisboard->name)) { 239 if (comedi_pci_enable(pcidev, thisboard->name))
243 printk
244 ("cb_pcidio: failed to enable PCI device and request regions\n");
245 return -EIO; 240 return -EIO;
246 } 241
247 devpriv->dio_reg_base 242 devpriv->dio_reg_base
248 = 243 =
249 pci_resource_start(devpriv->pci_dev, 244 pci_resource_start(devpriv->pci_dev,
@@ -259,11 +254,10 @@ found:
259 for (i = 0; i < thisboard->n_8255; i++) { 254 for (i = 0; i < thisboard->n_8255; i++) {
260 subdev_8255_init(dev, dev->subdevices + i, 255 subdev_8255_init(dev, dev->subdevices + i,
261 NULL, devpriv->dio_reg_base + i * 4); 256 NULL, devpriv->dio_reg_base + i * 4);
262 printk(" subdev %d: base = 0x%lx\n", i, 257 dev_dbg(dev->hw_dev, "subdev %d: base = 0x%lx\n", i,
263 devpriv->dio_reg_base + i * 4); 258 devpriv->dio_reg_base + i * 4);
264 } 259 }
265 260
266 printk("attached\n");
267 return 1; 261 return 1;
268} 262}
269 263
@@ -277,7 +271,6 @@ found:
277 */ 271 */
278static int pcidio_detach(struct comedi_device *dev) 272static int pcidio_detach(struct comedi_device *dev)
279{ 273{
280 printk("comedi%d: cb_pcidio: remove\n", dev->minor);
281 if (devpriv) { 274 if (devpriv) {
282 if (devpriv->pci_dev) { 275 if (devpriv->pci_dev) {
283 if (devpriv->dio_reg_base) 276 if (devpriv->dio_reg_base)
diff --git a/drivers/staging/comedi/drivers/cb_pcimdas.c b/drivers/staging/comedi/drivers/cb_pcimdas.c
index b1b832b65bc1..8ba694263bd3 100644
--- a/drivers/staging/comedi/drivers/cb_pcimdas.c
+++ b/drivers/staging/comedi/drivers/cb_pcimdas.c
@@ -212,8 +212,6 @@ static int cb_pcimdas_attach(struct comedi_device *dev,
212 int index; 212 int index;
213 /* int i; */ 213 /* int i; */
214 214
215 printk("comedi%d: cb_pcimdas: ", dev->minor);
216
217/* 215/*
218 * Allocate the private structure area. 216 * Allocate the private structure area.
219 */ 217 */
@@ -223,7 +221,6 @@ static int cb_pcimdas_attach(struct comedi_device *dev,
223/* 221/*
224 * Probe the device to determine what device in the series it is. 222 * Probe the device to determine what device in the series it is.
225 */ 223 */
226 printk("\n");
227 224
228 for_each_pci_dev(pcidev) { 225 for_each_pci_dev(pcidev) {
229 /* is it not a computer boards card? */ 226 /* is it not a computer boards card? */
@@ -248,26 +245,26 @@ static int cb_pcimdas_attach(struct comedi_device *dev,
248 } 245 }
249 } 246 }
250 247
251 printk("No supported ComputerBoards/MeasurementComputing card found on " 248 dev_err(dev->hw_dev, "No supported ComputerBoards/MeasurementComputing card found on requested position\n");
252 "requested position\n");
253 return -EIO; 249 return -EIO;
254 250
255found: 251found:
256 252
257 printk("Found %s on bus %i, slot %i\n", cb_pcimdas_boards[index].name, 253 dev_dbg(dev->hw_dev, "Found %s on bus %i, slot %i\n",
258 pcidev->bus->number, PCI_SLOT(pcidev->devfn)); 254 cb_pcimdas_boards[index].name, pcidev->bus->number,
255 PCI_SLOT(pcidev->devfn));
259 256
260 /* Warn about non-tested features */ 257 /* Warn about non-tested features */
261 switch (thisboard->device_id) { 258 switch (thisboard->device_id) {
262 case 0x56: 259 case 0x56:
263 break; 260 break;
264 default: 261 default:
265 printk("THIS CARD IS UNSUPPORTED.\n" 262 dev_dbg(dev->hw_dev, "THIS CARD IS UNSUPPORTED.\n"
266 "PLEASE REPORT USAGE TO <mocelet@sucs.org>\n"); 263 "PLEASE REPORT USAGE TO <mocelet@sucs.org>\n");
267 } 264 }
268 265
269 if (comedi_pci_enable(pcidev, "cb_pcimdas")) { 266 if (comedi_pci_enable(pcidev, "cb_pcimdas")) {
270 printk(" Failed to enable PCI device and request regions\n"); 267 dev_err(dev->hw_dev, "Failed to enable PCI device and request regions\n");
271 return -EIO; 268 return -EIO;
272 } 269 }
273 270
@@ -277,13 +274,11 @@ found:
277 devpriv->BADR3 = pci_resource_start(devpriv->pci_dev, 3); 274 devpriv->BADR3 = pci_resource_start(devpriv->pci_dev, 3);
278 devpriv->BADR4 = pci_resource_start(devpriv->pci_dev, 4); 275 devpriv->BADR4 = pci_resource_start(devpriv->pci_dev, 4);
279 276
280#ifdef CBPCIMDAS_DEBUG 277 dev_dbg(dev->hw_dev, "devpriv->BADR0 = 0x%lx\n", devpriv->BADR0);
281 printk("devpriv->BADR0 = 0x%lx\n", devpriv->BADR0); 278 dev_dbg(dev->hw_dev, "devpriv->BADR1 = 0x%lx\n", devpriv->BADR1);
282 printk("devpriv->BADR1 = 0x%lx\n", devpriv->BADR1); 279 dev_dbg(dev->hw_dev, "devpriv->BADR2 = 0x%lx\n", devpriv->BADR2);
283 printk("devpriv->BADR2 = 0x%lx\n", devpriv->BADR2); 280 dev_dbg(dev->hw_dev, "devpriv->BADR3 = 0x%lx\n", devpriv->BADR3);
284 printk("devpriv->BADR3 = 0x%lx\n", devpriv->BADR3); 281 dev_dbg(dev->hw_dev, "devpriv->BADR4 = 0x%lx\n", devpriv->BADR4);
285 printk("devpriv->BADR4 = 0x%lx\n", devpriv->BADR4);
286#endif
287 282
288/* Dont support IRQ yet */ 283/* Dont support IRQ yet */
289/* get irq */ 284/* get irq */
@@ -333,8 +328,6 @@ found:
333 else 328 else
334 s->type = COMEDI_SUBD_UNUSED; 329 s->type = COMEDI_SUBD_UNUSED;
335 330
336 printk("attached\n");
337
338 return 1; 331 return 1;
339} 332}
340 333
@@ -348,16 +341,19 @@ found:
348 */ 341 */
349static int cb_pcimdas_detach(struct comedi_device *dev) 342static int cb_pcimdas_detach(struct comedi_device *dev)
350{ 343{
351#ifdef CBPCIMDAS_DEBUG
352 if (devpriv) { 344 if (devpriv) {
353 printk("devpriv->BADR0 = 0x%lx\n", devpriv->BADR0); 345 dev_dbg(dev->hw_dev, "devpriv->BADR0 = 0x%lx\n",
354 printk("devpriv->BADR1 = 0x%lx\n", devpriv->BADR1); 346 devpriv->BADR0);
355 printk("devpriv->BADR2 = 0x%lx\n", devpriv->BADR2); 347 dev_dbg(dev->hw_dev, "devpriv->BADR1 = 0x%lx\n",
356 printk("devpriv->BADR3 = 0x%lx\n", devpriv->BADR3); 348 devpriv->BADR1);
357 printk("devpriv->BADR4 = 0x%lx\n", devpriv->BADR4); 349 dev_dbg(dev->hw_dev, "devpriv->BADR2 = 0x%lx\n",
350 devpriv->BADR2);
351 dev_dbg(dev->hw_dev, "devpriv->BADR3 = 0x%lx\n",
352 devpriv->BADR3);
353 dev_dbg(dev->hw_dev, "devpriv->BADR4 = 0x%lx\n",
354 devpriv->BADR4);
358 } 355 }
359#endif 356
360 printk("comedi%d: cb_pcimdas: remove\n", dev->minor);
361 if (dev->irq) 357 if (dev->irq)
362 free_irq(dev->irq, dev); 358 free_irq(dev->irq, dev);
363 if (devpriv) { 359 if (devpriv) {
diff --git a/drivers/staging/comedi/drivers/cb_pcimdda.c b/drivers/staging/comedi/drivers/cb_pcimdda.c
index 8c981a89ab63..40bddfa22220 100644
--- a/drivers/staging/comedi/drivers/cb_pcimdda.c
+++ b/drivers/staging/comedi/drivers/cb_pcimdda.c
@@ -105,7 +105,8 @@ struct board_struct {
105 int ao_bits; 105 int ao_bits;
106 int dio_chans; 106 int dio_chans;
107 int dio_method; 107 int dio_method;
108 int dio_offset; /* how many bytes into the BADR are the DIO ports */ 108 /* how many bytes into the BADR are the DIO ports */
109 int dio_offset;
109 int regs_badrindex; /* IO Region for the control, analog output, 110 int regs_badrindex; /* IO Region for the control, analog output,
110 and DIO registers */ 111 and DIO registers */
111 int reg_sz; /* number of bytes of registers in io region */ 112 int reg_sz; /* number of bytes of registers in io region */
@@ -144,17 +145,18 @@ static const struct board_struct boards[] = {
144/* Please add your PCI vendor ID to comedidev.h, and it will be forwarded 145/* Please add your PCI vendor ID to comedidev.h, and it will be forwarded
145 * upstream. */ 146 * upstream. */
146static DEFINE_PCI_DEVICE_TABLE(pci_table) = { 147static DEFINE_PCI_DEVICE_TABLE(pci_table) = {
147 { 148 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, PCI_ID_PCIM_DDA06_16) },
148 PCI_VENDOR_ID_COMPUTERBOARDS, PCI_ID_PCIM_DDA06_16, PCI_ANY_ID, 149 {0}
149 PCI_ANY_ID, 0, 0, 0}, {
150 0}
151}; 150};
152 151
153MODULE_DEVICE_TABLE(pci, pci_table); 152MODULE_DEVICE_TABLE(pci, pci_table);
154 153
155/* this structure is for data unique to this hardware driver. If 154/*
156 several hardware drivers keep similar information in this structure, 155 * this structure is for data unique to this hardware driver. If
157 feel free to suggest moving the variable to the struct comedi_device struct. */ 156 * several hardware drivers keep similar information in this structure,
157 * feel free to suggest moving the variable to the struct comedi_device
158 * struct.
159 */
158struct board_private_struct { 160struct board_private_struct {
159 unsigned long registers; /* set by probe */ 161 unsigned long registers; /* set by probe */
160 unsigned long dio_registers; 162 unsigned long dio_registers;
@@ -335,7 +337,10 @@ static int attach(struct comedi_device *dev, struct comedi_devconfig *it)
335 if (thisboard->dio_chans) { 337 if (thisboard->dio_chans) {
336 switch (thisboard->dio_method) { 338 switch (thisboard->dio_method) {
337 case DIO_8255: 339 case DIO_8255:
338 /* this is a straight 8255, so register us with the 8255 driver */ 340 /*
341 * this is a straight 8255, so register us with
342 * the 8255 driver
343 */
339 subdev_8255_init(dev, s, NULL, devpriv->dio_registers); 344 subdev_8255_init(dev, s, NULL, devpriv->dio_registers);
340 devpriv->attached_to_8255 = 1; 345 devpriv->attached_to_8255 = 1;
341 break; 346 break;
@@ -436,8 +441,11 @@ static int ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
436 441
437 for (i = 0; i < insn->n; i++) { 442 for (i = 0; i < insn->n; i++) {
438 inw(devpriv->registers + chan * 2); 443 inw(devpriv->registers + chan * 2);
439 /* should I set data[i] to the result of the actual read on the register 444 /*
440 or the cached unsigned int in devpriv->ao_readback[]? */ 445 * should I set data[i] to the result of the actual read
446 * on the register or the cached unsigned int in
447 * devpriv->ao_readback[]?
448 */
441 data[i] = devpriv->ao_readback[chan]; 449 data[i] = devpriv->ao_readback[chan];
442 } 450 }
443 451
diff --git a/drivers/staging/comedi/drivers/contec_pci_dio.c b/drivers/staging/comedi/drivers/contec_pci_dio.c
index 871f109bcfa3..e3659bd6e85e 100644
--- a/drivers/staging/comedi/drivers/contec_pci_dio.c
+++ b/drivers/staging/comedi/drivers/contec_pci_dio.c
@@ -57,10 +57,9 @@ static const struct contec_board contec_boards[] = {
57 57
58#define PCI_DEVICE_ID_PIO1616L 0x8172 58#define PCI_DEVICE_ID_PIO1616L 0x8172
59static DEFINE_PCI_DEVICE_TABLE(contec_pci_table) = { 59static DEFINE_PCI_DEVICE_TABLE(contec_pci_table) = {
60 { 60 { PCI_DEVICE(PCI_VENDOR_ID_CONTEC, PCI_DEVICE_ID_PIO1616L),
61 PCI_VENDOR_ID_CONTEC, PCI_DEVICE_ID_PIO1616L, PCI_ANY_ID, 61 .driver_data = PIO1616L },
62 PCI_ANY_ID, 0, 0, PIO1616L}, { 62 {0}
63 0}
64}; 63};
65 64
66MODULE_DEVICE_TABLE(pci, contec_pci_table); 65MODULE_DEVICE_TABLE(pci, contec_pci_table);
@@ -197,8 +196,8 @@ static int contec_do_insn_bits(struct comedi_device *dev,
197 struct comedi_insn *insn, unsigned int *data) 196 struct comedi_insn *insn, unsigned int *data)
198{ 197{
199 198
200 printk("contec_do_insn_bits called\n"); 199 dev_dbg(dev->hw_dev, "contec_do_insn_bits called\n");
201 printk(" data: %d %d\n", data[0], data[1]); 200 dev_dbg(dev->hw_dev, "data: %d %d\n", data[0], data[1]);
202 201
203 if (insn->n != 2) 202 if (insn->n != 2)
204 return -EINVAL; 203 return -EINVAL;
@@ -206,8 +205,8 @@ static int contec_do_insn_bits(struct comedi_device *dev,
206 if (data[0]) { 205 if (data[0]) {
207 s->state &= ~data[0]; 206 s->state &= ~data[0];
208 s->state |= data[0] & data[1]; 207 s->state |= data[0] & data[1];
209 printk(" out: %d on %lx\n", s->state, 208 dev_dbg(dev->hw_dev, "out: %d on %lx\n", s->state,
210 dev->iobase + thisboard->out_offs); 209 dev->iobase + thisboard->out_offs);
211 outw(s->state, dev->iobase + thisboard->out_offs); 210 outw(s->state, dev->iobase + thisboard->out_offs);
212 } 211 }
213 return 2; 212 return 2;
@@ -218,8 +217,8 @@ static int contec_di_insn_bits(struct comedi_device *dev,
218 struct comedi_insn *insn, unsigned int *data) 217 struct comedi_insn *insn, unsigned int *data)
219{ 218{
220 219
221 printk("contec_di_insn_bits called\n"); 220 dev_dbg(dev->hw_dev, "contec_di_insn_bits called\n");
222 printk(" data: %d %d\n", data[0], data[1]); 221 dev_dbg(dev->hw_dev, "data: %d %d\n", data[0], data[1]);
223 222
224 if (insn->n != 2) 223 if (insn->n != 2)
225 return -EINVAL; 224 return -EINVAL;
diff --git a/drivers/staging/comedi/drivers/daqboard2000.c b/drivers/staging/comedi/drivers/daqboard2000.c
index 82be77daa7d7..e61c6a8f2857 100644
--- a/drivers/staging/comedi/drivers/daqboard2000.c
+++ b/drivers/staging/comedi/drivers/daqboard2000.c
@@ -325,9 +325,8 @@ static const struct daq200_boardtype boardtypes[] = {
325#define this_board ((const struct daq200_boardtype *)dev->board_ptr) 325#define this_board ((const struct daq200_boardtype *)dev->board_ptr)
326 326
327static DEFINE_PCI_DEVICE_TABLE(daqboard2000_pci_table) = { 327static DEFINE_PCI_DEVICE_TABLE(daqboard2000_pci_table) = {
328 { 328 { PCI_DEVICE(0x1616, 0x0409) },
329 0x1616, 0x0409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 329 {0}
330 0}
331}; 330};
332 331
333MODULE_DEVICE_TABLE(pci, daqboard2000_pci_table); 332MODULE_DEVICE_TABLE(pci, daqboard2000_pci_table);
@@ -430,16 +429,14 @@ static int daqboard2000_ai_insn_read(struct comedi_device *dev,
430 /* Enable reading from the scanlist FIFO */ 429 /* Enable reading from the scanlist FIFO */
431 fpga->acqControl = DAQBOARD2000_SeqStartScanList; 430 fpga->acqControl = DAQBOARD2000_SeqStartScanList;
432 for (timeout = 0; timeout < 20; timeout++) { 431 for (timeout = 0; timeout < 20; timeout++) {
433 if (fpga->acqControl & DAQBOARD2000_AcqConfigPipeFull) { 432 if (fpga->acqControl & DAQBOARD2000_AcqConfigPipeFull)
434 break; 433 break;
435 }
436 /* udelay(2); */ 434 /* udelay(2); */
437 } 435 }
438 fpga->acqControl = DAQBOARD2000_AdcPacerEnable; 436 fpga->acqControl = DAQBOARD2000_AdcPacerEnable;
439 for (timeout = 0; timeout < 20; timeout++) { 437 for (timeout = 0; timeout < 20; timeout++) {
440 if (fpga->acqControl & DAQBOARD2000_AcqLogicScanning) { 438 if (fpga->acqControl & DAQBOARD2000_AcqLogicScanning)
441 break; 439 break;
442 }
443 /* udelay(2); */ 440 /* udelay(2); */
444 } 441 }
445 for (timeout = 0; timeout < 20; timeout++) { 442 for (timeout = 0; timeout < 20; timeout++) {
@@ -465,9 +462,8 @@ static int daqboard2000_ao_insn_read(struct comedi_device *dev,
465 int i; 462 int i;
466 int chan = CR_CHAN(insn->chanspec); 463 int chan = CR_CHAN(insn->chanspec);
467 464
468 for (i = 0; i < insn->n; i++) { 465 for (i = 0; i < insn->n; i++)
469 data[i] = devpriv->ao_readback[chan]; 466 data[i] = devpriv->ao_readback[chan];
470 }
471 467
472 return i; 468 return i;
473} 469}
@@ -490,9 +486,8 @@ static int daqboard2000_ao_insn_write(struct comedi_device *dev,
490 /* fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; udelay(1000); */ 486 /* fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; udelay(1000); */
491 fpga->dacSetting[chan] = data[i]; 487 fpga->dacSetting[chan] = data[i];
492 for (timeout = 0; timeout < 20; timeout++) { 488 for (timeout = 0; timeout < 20; timeout++) {
493 if ((fpga->dacControl & ((chan + 1) * 0x0010)) == 0) { 489 if ((fpga->dacControl & ((chan + 1) * 0x0010)) == 0)
494 break; 490 break;
495 }
496 /* udelay(2); */ 491 /* udelay(2); */
497 } 492 }
498 devpriv->ao_readback[chan] = data[i]; 493 devpriv->ao_readback[chan] = data[i];
@@ -507,7 +502,7 @@ static int daqboard2000_ao_insn_write(struct comedi_device *dev,
507 502
508static void daqboard2000_resetLocalBus(struct comedi_device *dev) 503static void daqboard2000_resetLocalBus(struct comedi_device *dev)
509{ 504{
510 printk("daqboard2000_resetLocalBus\n"); 505 dev_dbg(dev->hw_dev, "daqboard2000_resetLocalBus\n");
511 writel(DAQBOARD2000_SECRLocalBusHi, devpriv->plx + 0x6c); 506 writel(DAQBOARD2000_SECRLocalBusHi, devpriv->plx + 0x6c);
512 udelay(10000); 507 udelay(10000);
513 writel(DAQBOARD2000_SECRLocalBusLo, devpriv->plx + 0x6c); 508 writel(DAQBOARD2000_SECRLocalBusLo, devpriv->plx + 0x6c);
@@ -516,7 +511,7 @@ static void daqboard2000_resetLocalBus(struct comedi_device *dev)
516 511
517static void daqboard2000_reloadPLX(struct comedi_device *dev) 512static void daqboard2000_reloadPLX(struct comedi_device *dev)
518{ 513{
519 printk("daqboard2000_reloadPLX\n"); 514 dev_dbg(dev->hw_dev, "daqboard2000_reloadPLX\n");
520 writel(DAQBOARD2000_SECRReloadLo, devpriv->plx + 0x6c); 515 writel(DAQBOARD2000_SECRReloadLo, devpriv->plx + 0x6c);
521 udelay(10000); 516 udelay(10000);
522 writel(DAQBOARD2000_SECRReloadHi, devpriv->plx + 0x6c); 517 writel(DAQBOARD2000_SECRReloadHi, devpriv->plx + 0x6c);
@@ -527,7 +522,7 @@ static void daqboard2000_reloadPLX(struct comedi_device *dev)
527 522
528static void daqboard2000_pulseProgPin(struct comedi_device *dev) 523static void daqboard2000_pulseProgPin(struct comedi_device *dev)
529{ 524{
530 printk("daqboard2000_pulseProgPin 1\n"); 525 dev_dbg(dev->hw_dev, "daqboard2000_pulseProgPin 1\n");
531 writel(DAQBOARD2000_SECRProgPinHi, devpriv->plx + 0x6c); 526 writel(DAQBOARD2000_SECRProgPinHi, devpriv->plx + 0x6c);
532 udelay(10000); 527 udelay(10000);
533 writel(DAQBOARD2000_SECRProgPinLo, devpriv->plx + 0x6c); 528 writel(DAQBOARD2000_SECRProgPinLo, devpriv->plx + 0x6c);
@@ -579,14 +574,14 @@ static int initialize_daqboard2000(struct comedi_device *dev,
579 secr = readl(devpriv->plx + 0x6c); 574 secr = readl(devpriv->plx + 0x6c);
580 if (!(secr & DAQBOARD2000_EEPROM_PRESENT)) { 575 if (!(secr & DAQBOARD2000_EEPROM_PRESENT)) {
581#ifdef DEBUG_EEPROM 576#ifdef DEBUG_EEPROM
582 printk("no serial eeprom\n"); 577 dev_dbg(dev->hw_dev, "no serial eeprom\n");
583#endif 578#endif
584 return -EIO; 579 return -EIO;
585 } 580 }
586 581
587 for (retry = 0; retry < 3; retry++) { 582 for (retry = 0; retry < 3; retry++) {
588#ifdef DEBUG_EEPROM 583#ifdef DEBUG_EEPROM
589 printk("Programming EEPROM try %x\n", retry); 584 dev_dbg(dev->hw_dev, "Programming EEPROM try %x\n", retry);
590#endif 585#endif
591 586
592 daqboard2000_resetLocalBus(dev); 587 daqboard2000_resetLocalBus(dev);
@@ -597,7 +592,8 @@ static int initialize_daqboard2000(struct comedi_device *dev,
597 if (cpld_array[i] == 0xff 592 if (cpld_array[i] == 0xff
598 && cpld_array[i + 1] == 0x20) { 593 && cpld_array[i + 1] == 0x20) {
599#ifdef DEBUG_EEPROM 594#ifdef DEBUG_EEPROM
600 printk("Preamble found at %d\n", i); 595 dev_dbg(dev->hw_dev, "Preamble found at %d\n",
596 i);
601#endif 597#endif
602 break; 598 break;
603 } 599 }
@@ -605,13 +601,12 @@ static int initialize_daqboard2000(struct comedi_device *dev,
605 for (; i < len; i += 2) { 601 for (; i < len; i += 2) {
606 int data = 602 int data =
607 (cpld_array[i] << 8) + cpld_array[i + 1]; 603 (cpld_array[i] << 8) + cpld_array[i + 1];
608 if (!daqboard2000_writeCPLD(dev, data)) { 604 if (!daqboard2000_writeCPLD(dev, data))
609 break; 605 break;
610 }
611 } 606 }
612 if (i >= len) { 607 if (i >= len) {
613#ifdef DEBUG_EEPROM 608#ifdef DEBUG_EEPROM
614 printk("Programmed\n"); 609 dev_dbg(dev->hw_dev, "Programmed\n");
615#endif 610#endif
616 daqboard2000_resetLocalBus(dev); 611 daqboard2000_resetLocalBus(dev);
617 daqboard2000_reloadPLX(dev); 612 daqboard2000_reloadPLX(dev);
@@ -658,9 +653,8 @@ static void daqboard2000_activateReferenceDacs(struct comedi_device *dev)
658 /* Set the + reference dac value in the FPGA */ 653 /* Set the + reference dac value in the FPGA */
659 fpga->refDacs = 0x80 | DAQBOARD2000_PosRefDacSelect; 654 fpga->refDacs = 0x80 | DAQBOARD2000_PosRefDacSelect;
660 for (timeout = 0; timeout < 20; timeout++) { 655 for (timeout = 0; timeout < 20; timeout++) {
661 if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) { 656 if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0)
662 break; 657 break;
663 }
664 udelay(2); 658 udelay(2);
665 } 659 }
666/* printk("DAQBOARD2000_PosRefDacSelect %d\n", timeout);*/ 660/* printk("DAQBOARD2000_PosRefDacSelect %d\n", timeout);*/
@@ -668,9 +662,8 @@ static void daqboard2000_activateReferenceDacs(struct comedi_device *dev)
668 /* Set the - reference dac value in the FPGA */ 662 /* Set the - reference dac value in the FPGA */
669 fpga->refDacs = 0x80 | DAQBOARD2000_NegRefDacSelect; 663 fpga->refDacs = 0x80 | DAQBOARD2000_NegRefDacSelect;
670 for (timeout = 0; timeout < 20; timeout++) { 664 for (timeout = 0; timeout < 20; timeout++) {
671 if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) { 665 if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0)
672 break; 666 break;
673 }
674 udelay(2); 667 udelay(2);
675 } 668 }
676/* printk("DAQBOARD2000_NegRefDacSelect %d\n", timeout);*/ 669/* printk("DAQBOARD2000_NegRefDacSelect %d\n", timeout);*/
@@ -737,15 +730,13 @@ static int daqboard2000_attach(struct comedi_device *dev,
737 unsigned int aux_len; 730 unsigned int aux_len;
738 int bus, slot; 731 int bus, slot;
739 732
740 printk("comedi%d: daqboard2000:", dev->minor);
741
742 bus = it->options[0]; 733 bus = it->options[0];
743 slot = it->options[1]; 734 slot = it->options[1];
744 735
745 result = alloc_private(dev, sizeof(struct daqboard2000_private)); 736 result = alloc_private(dev, sizeof(struct daqboard2000_private));
746 if (result < 0) { 737 if (result < 0)
747 return -ENOMEM; 738 return -ENOMEM;
748 } 739
749 for (card = pci_get_device(0x1616, 0x0409, NULL); 740 for (card = pci_get_device(0x1616, 0x0409, NULL);
750 card != NULL; card = pci_get_device(0x1616, 0x0409, card)) { 741 card != NULL; card = pci_get_device(0x1616, 0x0409, card)) {
751 if (bus || slot) { 742 if (bus || slot) {
@@ -759,10 +750,10 @@ static int daqboard2000_attach(struct comedi_device *dev,
759 } 750 }
760 if (!card) { 751 if (!card) {
761 if (bus || slot) 752 if (bus || slot)
762 printk(" no daqboard2000 found at bus/slot: %d/%d\n", 753 dev_err(dev->hw_dev, "no daqboard2000 found at bus/slot: %d/%d\n",
763 bus, slot); 754 bus, slot);
764 else 755 else
765 printk(" no daqboard2000 found\n"); 756 dev_err(dev->hw_dev, "no daqboard2000 found\n");
766 return -EIO; 757 return -EIO;
767 } else { 758 } else {
768 u32 id; 759 u32 id;
@@ -772,7 +763,8 @@ static int daqboard2000_attach(struct comedi_device *dev,
772 subsystem_device << 16) | card->subsystem_vendor; 763 subsystem_device << 16) | card->subsystem_vendor;
773 for (i = 0; i < n_boardtypes; i++) { 764 for (i = 0; i < n_boardtypes; i++) {
774 if (boardtypes[i].id == id) { 765 if (boardtypes[i].id == id) {
775 printk(" %s", boardtypes[i].name); 766 dev_dbg(dev->hw_dev, "%s\n",
767 boardtypes[i].name);
776 dev->board_ptr = boardtypes + i; 768 dev->board_ptr = boardtypes + i;
777 } 769 }
778 } 770 }
@@ -786,7 +778,7 @@ static int daqboard2000_attach(struct comedi_device *dev,
786 778
787 result = comedi_pci_enable(card, "daqboard2000"); 779 result = comedi_pci_enable(card, "daqboard2000");
788 if (result < 0) { 780 if (result < 0) {
789 printk(" failed to enable PCI device and request regions\n"); 781 dev_err(dev->hw_dev, "failed to enable PCI device and request regions\n");
790 return -EIO; 782 return -EIO;
791 } 783 }
792 devpriv->got_regions = 1; 784 devpriv->got_regions = 1;
@@ -794,9 +786,8 @@ static int daqboard2000_attach(struct comedi_device *dev,
794 ioremap(pci_resource_start(card, 0), DAQBOARD2000_PLX_SIZE); 786 ioremap(pci_resource_start(card, 0), DAQBOARD2000_PLX_SIZE);
795 devpriv->daq = 787 devpriv->daq =
796 ioremap(pci_resource_start(card, 2), DAQBOARD2000_DAQ_SIZE); 788 ioremap(pci_resource_start(card, 2), DAQBOARD2000_DAQ_SIZE);
797 if (!devpriv->plx || !devpriv->daq) { 789 if (!devpriv->plx || !devpriv->daq)
798 return -ENOMEM; 790 return -ENOMEM;
799 }
800 791
801 result = alloc_subdevices(dev, 3); 792 result = alloc_subdevices(dev, 3);
802 if (result < 0) 793 if (result < 0)
@@ -817,7 +808,7 @@ static int daqboard2000_attach(struct comedi_device *dev,
817 if (aux_data && aux_len) { 808 if (aux_data && aux_len) {
818 result = initialize_daqboard2000(dev, aux_data, aux_len); 809 result = initialize_daqboard2000(dev, aux_data, aux_len);
819 } else { 810 } else {
820 printk("no FPGA initialization code, aborting\n"); 811 dev_dbg(dev->hw_dev, "no FPGA initialization code, aborting\n");
821 result = -EIO; 812 result = -EIO;
822 } 813 }
823 if (result < 0) 814 if (result < 0)
@@ -857,30 +848,26 @@ static int daqboard2000_attach(struct comedi_device *dev,
857 result = subdev_8255_init(dev, s, daqboard2000_8255_cb, 848 result = subdev_8255_init(dev, s, daqboard2000_8255_cb,
858 (unsigned long)(dev->iobase + 0x40)); 849 (unsigned long)(dev->iobase + 0x40));
859 850
860 printk("\n");
861out: 851out:
862 return result; 852 return result;
863} 853}
864 854
865static int daqboard2000_detach(struct comedi_device *dev) 855static int daqboard2000_detach(struct comedi_device *dev)
866{ 856{
867 printk("comedi%d: daqboard2000: remove\n", dev->minor);
868
869 if (dev->subdevices) 857 if (dev->subdevices)
870 subdev_8255_cleanup(dev, dev->subdevices + 2); 858 subdev_8255_cleanup(dev, dev->subdevices + 2);
871 859
872 if (dev->irq) { 860 if (dev->irq)
873 free_irq(dev->irq, dev); 861 free_irq(dev->irq, dev);
874 } 862
875 if (devpriv) { 863 if (devpriv) {
876 if (devpriv->daq) 864 if (devpriv->daq)
877 iounmap(devpriv->daq); 865 iounmap(devpriv->daq);
878 if (devpriv->plx) 866 if (devpriv->plx)
879 iounmap(devpriv->plx); 867 iounmap(devpriv->plx);
880 if (devpriv->pci_dev) { 868 if (devpriv->pci_dev) {
881 if (devpriv->got_regions) { 869 if (devpriv->got_regions)
882 comedi_pci_disable(devpriv->pci_dev); 870 comedi_pci_disable(devpriv->pci_dev);
883 }
884 pci_dev_put(devpriv->pci_dev); 871 pci_dev_put(devpriv->pci_dev);
885 } 872 }
886 } 873 }
diff --git a/drivers/staging/comedi/drivers/das08.c b/drivers/staging/comedi/drivers/das08.c
index 3141dc80fe74..c2dd0ed36a73 100644
--- a/drivers/staging/comedi/drivers/das08.c
+++ b/drivers/staging/comedi/drivers/das08.c
@@ -506,10 +506,8 @@ struct das08_board_struct das08_cs_boards[NUM_DAS08_CS_BOARDS] = {
506 506
507#ifdef CONFIG_COMEDI_PCI 507#ifdef CONFIG_COMEDI_PCI
508static DEFINE_PCI_DEVICE_TABLE(das08_pci_table) = { 508static DEFINE_PCI_DEVICE_TABLE(das08_pci_table) = {
509 { 509 { PCI_DEVICE(PCI_VENDOR_ID_COMPUTERBOARDS, PCI_DEVICE_ID_PCIDAS08) },
510 PCI_VENDOR_ID_COMPUTERBOARDS, PCI_DEVICE_ID_PCIDAS08, 510 {0}
511 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
512 0}
513}; 511};
514 512
515MODULE_DEVICE_TABLE(pci, das08_pci_table); 513MODULE_DEVICE_TABLE(pci, das08_pci_table);
diff --git a/drivers/staging/comedi/drivers/das08_cs.c b/drivers/staging/comedi/drivers/das08_cs.c
index 6d91d3028178..4ad398aad72c 100644
--- a/drivers/staging/comedi/drivers/das08_cs.c
+++ b/drivers/staging/comedi/drivers/das08_cs.c
@@ -79,22 +79,20 @@ static int das08_cs_attach(struct comedi_device *dev,
79 if (ret < 0) 79 if (ret < 0)
80 return ret; 80 return ret;
81 81
82 printk("comedi%d: das08_cs: ", dev->minor); 82 dev_info(dev->hw_dev, "comedi%d: das08_cs:\n", dev->minor);
83 /* deal with a pci board */ 83 /* deal with a pci board */
84 84
85 if (thisboard->bustype == pcmcia) { 85 if (thisboard->bustype == pcmcia) {
86 if (link == NULL) { 86 if (link == NULL) {
87 printk(" no pcmcia cards found\n"); 87 dev_err(dev->hw_dev, "no pcmcia cards found\n");
88 return -EIO; 88 return -EIO;
89 } 89 }
90 iobase = link->resource[0]->start; 90 iobase = link->resource[0]->start;
91 } else { 91 } else {
92 printk(" bug! board does not have PCMCIA bustype\n"); 92 dev_err(dev->hw_dev, "bug! board does not have PCMCIA bustype\n");
93 return -EINVAL; 93 return -EINVAL;
94 } 94 }
95 95
96 printk("\n");
97
98 return das08_common_attach(dev, iobase); 96 return das08_common_attach(dev, iobase);
99} 97}
100 98
diff --git a/drivers/staging/comedi/drivers/das16m1.c b/drivers/staging/comedi/drivers/das16m1.c
index a5ce3b2abe4a..5376e718e3d7 100644
--- a/drivers/staging/comedi/drivers/das16m1.c
+++ b/drivers/staging/comedi/drivers/das16m1.c
@@ -384,20 +384,20 @@ static int das16m1_cmd_exec(struct comedi_device *dev,
384 byte = 0; 384 byte = 0;
385 /* if we are using external start trigger (also board dislikes having 385 /* if we are using external start trigger (also board dislikes having
386 * both start and conversion triggers external simultaneously) */ 386 * both start and conversion triggers external simultaneously) */
387 if (cmd->start_src == TRIG_EXT && cmd->convert_src != TRIG_EXT) { 387 if (cmd->start_src == TRIG_EXT && cmd->convert_src != TRIG_EXT)
388 byte |= EXT_TRIG_BIT; 388 byte |= EXT_TRIG_BIT;
389 } 389
390 outb(byte, dev->iobase + DAS16M1_CS); 390 outb(byte, dev->iobase + DAS16M1_CS);
391 /* clear interrupt bit */ 391 /* clear interrupt bit */
392 outb(0, dev->iobase + DAS16M1_CLEAR_INTR); 392 outb(0, dev->iobase + DAS16M1_CLEAR_INTR);
393 393
394 /* enable interrupts and internal pacer */ 394 /* enable interrupts and internal pacer */
395 devpriv->control_state &= ~PACER_MASK; 395 devpriv->control_state &= ~PACER_MASK;
396 if (cmd->convert_src == TRIG_TIMER) { 396 if (cmd->convert_src == TRIG_TIMER)
397 devpriv->control_state |= INT_PACER; 397 devpriv->control_state |= INT_PACER;
398 } else { 398 else
399 devpriv->control_state |= EXT_PACER; 399 devpriv->control_state |= EXT_PACER;
400 } 400
401 devpriv->control_state |= INTE; 401 devpriv->control_state |= INTE;
402 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL); 402 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL);
403 403
@@ -531,9 +531,8 @@ static void munge_sample_array(short *array, unsigned int num_elements)
531{ 531{
532 unsigned int i; 532 unsigned int i;
533 533
534 for (i = 0; i < num_elements; i++) { 534 for (i = 0; i < num_elements; i++)
535 array[i] = munge_sample(array[i]); 535 array[i] = munge_sample(array[i]);
536 }
537} 536}
538 537
539static void das16m1_handler(struct comedi_device *dev, unsigned int status) 538static void das16m1_handler(struct comedi_device *dev, unsigned int status)
@@ -668,25 +667,20 @@ static int das16m1_attach(struct comedi_device *dev,
668 667
669 iobase = it->options[0]; 668 iobase = it->options[0];
670 669
671 printk("comedi%d: das16m1:", dev->minor);
672
673 ret = alloc_private(dev, sizeof(struct das16m1_private_struct)); 670 ret = alloc_private(dev, sizeof(struct das16m1_private_struct));
674 if (ret < 0) 671 if (ret < 0)
675 return ret; 672 return ret;
676 673
677 dev->board_name = thisboard->name; 674 dev->board_name = thisboard->name;
678 675
679 printk(" io 0x%lx-0x%lx 0x%lx-0x%lx",
680 iobase, iobase + DAS16M1_SIZE,
681 iobase + DAS16M1_82C55, iobase + DAS16M1_82C55 + DAS16M1_SIZE2);
682 if (!request_region(iobase, DAS16M1_SIZE, driver_das16m1.driver_name)) { 676 if (!request_region(iobase, DAS16M1_SIZE, driver_das16m1.driver_name)) {
683 printk(" I/O port conflict\n"); 677 comedi_error(dev, "I/O port conflict\n");
684 return -EIO; 678 return -EIO;
685 } 679 }
686 if (!request_region(iobase + DAS16M1_82C55, DAS16M1_SIZE2, 680 if (!request_region(iobase + DAS16M1_82C55, DAS16M1_SIZE2,
687 driver_das16m1.driver_name)) { 681 driver_das16m1.driver_name)) {
688 release_region(iobase, DAS16M1_SIZE); 682 release_region(iobase, DAS16M1_SIZE);
689 printk(" I/O port conflict\n"); 683 comedi_error(dev, "I/O port conflict\n");
690 return -EIO; 684 return -EIO;
691 } 685 }
692 dev->iobase = iobase; 686 dev->iobase = iobase;
@@ -697,17 +691,17 @@ static int das16m1_attach(struct comedi_device *dev,
697 if (das16m1_irq_bits(irq) >= 0) { 691 if (das16m1_irq_bits(irq) >= 0) {
698 ret = request_irq(irq, das16m1_interrupt, 0, 692 ret = request_irq(irq, das16m1_interrupt, 0,
699 driver_das16m1.driver_name, dev); 693 driver_das16m1.driver_name, dev);
700 if (ret < 0) { 694 if (ret < 0)
701 printk(", irq unavailable\n");
702 return ret; 695 return ret;
703 }
704 dev->irq = irq; 696 dev->irq = irq;
705 printk(", irq %u\n", irq); 697 printk
698 ("irq %u\n", irq);
706 } else if (irq == 0) { 699 } else if (irq == 0) {
707 printk(", no irq\n"); 700 printk
701 (", no irq\n");
708 } else { 702 } else {
709 printk(", invalid irq\n" 703 comedi_error(dev, "invalid irq\n"
710 " valid irqs are 2, 3, 5, 7, 10, 11, 12, or 15\n"); 704 " valid irqs are 2, 3, 5, 7, 10, 11, 12, or 15\n");
711 return -EINVAL; 705 return -EINVAL;
712 } 706 }
713 707
@@ -771,7 +765,6 @@ static int das16m1_attach(struct comedi_device *dev,
771 765
772static int das16m1_detach(struct comedi_device *dev) 766static int das16m1_detach(struct comedi_device *dev)
773{ 767{
774 printk("comedi%d: das16m1: remove\n", dev->minor);
775 768
776/* das16m1_reset(dev); */ 769/* das16m1_reset(dev); */
777 770
diff --git a/drivers/staging/comedi/drivers/das1800.c b/drivers/staging/comedi/drivers/das1800.c
index a6df30b7fd7c..99ada5a53b9e 100644
--- a/drivers/staging/comedi/drivers/das1800.c
+++ b/drivers/staging/comedi/drivers/das1800.c
@@ -573,22 +573,23 @@ static int das1800_init_dma(struct comedi_device *dev, unsigned int dma0,
573 devpriv->dma_bits |= DMA_CH7_CH5; 573 devpriv->dma_bits |= DMA_CH7_CH5;
574 break; 574 break;
575 default: 575 default:
576 printk(" only supports dma channels 5 through 7\n" 576 dev_err(dev->hw_dev, " only supports dma channels 5 through 7\n"
577 " Dual dma only allows the following combinations:\n" 577 " Dual dma only allows the following combinations:\n"
578 " dma 5,6 / 6,7 / or 7,5\n"); 578 " dma 5,6 / 6,7 / or 7,5\n");
579 return -EINVAL; 579 return -EINVAL;
580 break; 580 break;
581 } 581 }
582 if (request_dma(dma0, driver_das1800.driver_name)) { 582 if (request_dma(dma0, driver_das1800.driver_name)) {
583 printk(" failed to allocate dma channel %i\n", dma0); 583 dev_err(dev->hw_dev, "failed to allocate dma channel %i\n",
584 dma0);
584 return -EINVAL; 585 return -EINVAL;
585 } 586 }
586 devpriv->dma0 = dma0; 587 devpriv->dma0 = dma0;
587 devpriv->dma_current = dma0; 588 devpriv->dma_current = dma0;
588 if (dma1) { 589 if (dma1) {
589 if (request_dma(dma1, driver_das1800.driver_name)) { 590 if (request_dma(dma1, driver_das1800.driver_name)) {
590 printk(" failed to allocate dma channel %i\n", 591 dev_err(dev->hw_dev, "failed to allocate dma channel %i\n",
591 dma1); 592 dma1);
592 return -EINVAL; 593 return -EINVAL;
593 } 594 }
594 devpriv->dma1 = dma1; 595 devpriv->dma1 = dma1;
@@ -631,20 +632,20 @@ static int das1800_attach(struct comedi_device *dev,
631 if (alloc_private(dev, sizeof(struct das1800_private)) < 0) 632 if (alloc_private(dev, sizeof(struct das1800_private)) < 0)
632 return -ENOMEM; 633 return -ENOMEM;
633 634
634 printk("comedi%d: %s: io 0x%lx", dev->minor, driver_das1800.driver_name, 635 printk(KERN_DEBUG "comedi%d: %s: io 0x%lx", dev->minor,
635 iobase); 636 driver_das1800.driver_name, iobase);
636 if (irq) { 637 if (irq) {
637 printk(", irq %u", irq); 638 printk(KERN_CONT ", irq %u", irq);
638 if (dma0) { 639 if (dma0) {
639 printk(", dma %u", dma0); 640 printk(KERN_CONT ", dma %u", dma0);
640 if (dma1) 641 if (dma1)
641 printk(" and %u", dma1); 642 printk(KERN_CONT " and %u", dma1);
642 } 643 }
643 } 644 }
644 printk("\n"); 645 printk(KERN_CONT "\n");
645 646
646 if (iobase == 0) { 647 if (iobase == 0) {
647 printk(" io base address required\n"); 648 dev_err(dev->hw_dev, "io base address required\n");
648 return -EINVAL; 649 return -EINVAL;
649 } 650 }
650 651
@@ -659,7 +660,7 @@ static int das1800_attach(struct comedi_device *dev,
659 660
660 board = das1800_probe(dev); 661 board = das1800_probe(dev);
661 if (board < 0) { 662 if (board < 0) {
662 printk(" unable to determine board type\n"); 663 dev_err(dev->hw_dev, "unable to determine board type\n");
663 return -ENODEV; 664 return -ENODEV;
664 } 665 }
665 666
@@ -683,7 +684,8 @@ static int das1800_attach(struct comedi_device *dev,
683 if (irq) { 684 if (irq) {
684 if (request_irq(irq, das1800_interrupt, 0, 685 if (request_irq(irq, das1800_interrupt, 0,
685 driver_das1800.driver_name, dev)) { 686 driver_das1800.driver_name, dev)) {
686 printk(" unable to allocate irq %u\n", irq); 687 dev_dbg(dev->hw_dev, "unable to allocate irq %u\n",
688 irq);
687 return -EINVAL; 689 return -EINVAL;
688 } 690 }
689 } 691 }
@@ -712,7 +714,7 @@ static int das1800_attach(struct comedi_device *dev,
712 devpriv->irq_dma_bits |= 0x38; 714 devpriv->irq_dma_bits |= 0x38;
713 break; 715 break;
714 default: 716 default:
715 printk(" irq out of range\n"); 717 dev_err(dev->hw_dev, "irq out of range\n");
716 return -EINVAL; 718 return -EINVAL;
717 break; 719 break;
718 } 720 }
@@ -813,8 +815,8 @@ static int das1800_detach(struct comedi_device *dev)
813 kfree(devpriv->ai_buf1); 815 kfree(devpriv->ai_buf1);
814 } 816 }
815 817
816 printk("comedi%d: %s: remove\n", dev->minor, 818 dev_dbg(dev->hw_dev, "comedi%d: %s: remove\n", dev->minor,
817 driver_das1800.driver_name); 819 driver_das1800.driver_name);
818 820
819 return 0; 821 return 0;
820}; 822};
@@ -833,8 +835,8 @@ static int das1800_probe(struct comedi_device *dev)
833 case 0x3: 835 case 0x3:
834 if (board == das1801st_da || board == das1802st_da || 836 if (board == das1801st_da || board == das1802st_da ||
835 board == das1701st_da || board == das1702st_da) { 837 board == das1701st_da || board == das1702st_da) {
836 printk(" Board model: %s\n", 838 dev_dbg(dev->hw_dev, "Board model: %s\n",
837 das1800_boards[board].name); 839 das1800_boards[board].name);
838 return board; 840 return board;
839 } 841 }
840 printk 842 printk
@@ -843,8 +845,8 @@ static int das1800_probe(struct comedi_device *dev)
843 break; 845 break;
844 case 0x4: 846 case 0x4:
845 if (board == das1802hr_da || board == das1702hr_da) { 847 if (board == das1802hr_da || board == das1702hr_da) {
846 printk(" Board model: %s\n", 848 dev_dbg(dev->hw_dev, "Board model: %s\n",
847 das1800_boards[board].name); 849 das1800_boards[board].name);
848 return board; 850 return board;
849 } 851 }
850 printk 852 printk
@@ -854,8 +856,8 @@ static int das1800_probe(struct comedi_device *dev)
854 case 0x5: 856 case 0x5:
855 if (board == das1801ao || board == das1802ao || 857 if (board == das1801ao || board == das1802ao ||
856 board == das1701ao || board == das1702ao) { 858 board == das1701ao || board == das1702ao) {
857 printk(" Board model: %s\n", 859 dev_dbg(dev->hw_dev, "Board model: %s\n",
858 das1800_boards[board].name); 860 das1800_boards[board].name);
859 return board; 861 return board;
860 } 862 }
861 printk 863 printk
@@ -864,18 +866,19 @@ static int das1800_probe(struct comedi_device *dev)
864 break; 866 break;
865 case 0x6: 867 case 0x6:
866 if (board == das1802hr || board == das1702hr) { 868 if (board == das1802hr || board == das1702hr) {
867 printk(" Board model: %s\n", 869 dev_dbg(dev->hw_dev, "Board model: %s\n",
868 das1800_boards[board].name); 870 das1800_boards[board].name);
869 return board; 871 return board;
870 } 872 }
871 printk(" Board model (probed, not recommended): das-1802hr\n"); 873 printk
874 (" Board model (probed, not recommended): das-1802hr\n");
872 return das1802hr; 875 return das1802hr;
873 break; 876 break;
874 case 0x7: 877 case 0x7:
875 if (board == das1801st || board == das1802st || 878 if (board == das1801st || board == das1802st ||
876 board == das1701st || board == das1702st) { 879 board == das1701st || board == das1702st) {
877 printk(" Board model: %s\n", 880 dev_dbg(dev->hw_dev, "Board model: %s\n",
878 das1800_boards[board].name); 881 das1800_boards[board].name);
879 return board; 882 return board;
880 } 883 }
881 printk 884 printk
@@ -884,8 +887,8 @@ static int das1800_probe(struct comedi_device *dev)
884 break; 887 break;
885 case 0x8: 888 case 0x8:
886 if (board == das1801hc || board == das1802hc) { 889 if (board == das1801hc || board == das1802hc) {
887 printk(" Board model: %s\n", 890 dev_dbg(dev->hw_dev, "Board model: %s\n",
888 das1800_boards[board].name); 891 das1800_boards[board].name);
889 return board; 892 return board;
890 } 893 }
891 printk 894 printk
diff --git a/drivers/staging/comedi/drivers/das6402.c b/drivers/staging/comedi/drivers/das6402.c
index 6328f5280b66..f25684145e84 100644
--- a/drivers/staging/comedi/drivers/das6402.c
+++ b/drivers/staging/comedi/drivers/das6402.c
@@ -171,7 +171,7 @@ static irqreturn_t intr_handler(int irq, void *d)
171 struct comedi_subdevice *s = dev->subdevices; 171 struct comedi_subdevice *s = dev->subdevices;
172 172
173 if (!dev->attached || devpriv->das6402_ignoreirq) { 173 if (!dev->attached || devpriv->das6402_ignoreirq) {
174 printk("das6402: BUG: spurious interrupt\n"); 174 dev_warn(dev->hw_dev, "BUG: spurious interrupt\n");
175 return IRQ_HANDLED; 175 return IRQ_HANDLED;
176 } 176 }
177#ifdef DEBUG 177#ifdef DEBUG
@@ -228,9 +228,7 @@ static int das6402_ai_cancel(struct comedi_device *dev,
228 */ 228 */
229 229
230 devpriv->das6402_ignoreirq = 1; 230 devpriv->das6402_ignoreirq = 1;
231#ifdef DEBUG 231 dev_dbg(dev->hw_dev, "Stopping acquisition\n");
232 printk("das6402: Stopping acquisition\n");
233#endif
234 devpriv->das6402_ignoreirq = 1; 232 devpriv->das6402_ignoreirq = 1;
235 outb_p(0x02, dev->iobase + 10); /* disable external trigging */ 233 outb_p(0x02, dev->iobase + 10); /* disable external trigging */
236 outw_p(SCANL, dev->iobase + 2); /* resets the card fifo */ 234 outw_p(SCANL, dev->iobase + 2); /* resets the card fifo */
@@ -246,10 +244,7 @@ static int das6402_ai_mode2(struct comedi_device *dev,
246 struct comedi_subdevice *s, comedi_trig * it) 244 struct comedi_subdevice *s, comedi_trig * it)
247{ 245{
248 devpriv->das6402_ignoreirq = 1; 246 devpriv->das6402_ignoreirq = 1;
249 247 dev_dbg(dev->hw_dev, "Starting acquisition\n");
250#ifdef DEBUG
251 printk("das6402: Starting acquisition\n");
252#endif
253 outb_p(0x03, dev->iobase + 10); /* enable external trigging */ 248 outb_p(0x03, dev->iobase + 10); /* enable external trigging */
254 outw_p(SCANL, dev->iobase + 2); /* resets the card fifo */ 249 outw_p(SCANL, dev->iobase + 2); /* resets the card fifo */
255 outb_p(IRQ | CONVSRC | BURSTEN | INTE, dev->iobase + 9); 250 outb_p(IRQ | CONVSRC | BURSTEN | INTE, dev->iobase + 9);
@@ -329,10 +324,8 @@ static int das6402_attach(struct comedi_device *dev,
329 if (iobase == 0) 324 if (iobase == 0)
330 iobase = 0x300; 325 iobase = 0x300;
331 326
332 printk("comedi%d: das6402: 0x%04lx", dev->minor, iobase);
333
334 if (!request_region(iobase, DAS6402_SIZE, "das6402")) { 327 if (!request_region(iobase, DAS6402_SIZE, "das6402")) {
335 printk(" I/O port conflict\n"); 328 dev_err(dev->hw_dev, "I/O port conflict\n");
336 return -EIO; 329 return -EIO;
337 } 330 }
338 dev->iobase = iobase; 331 dev->iobase = iobase;
@@ -340,14 +333,12 @@ static int das6402_attach(struct comedi_device *dev,
340 /* should do a probe here */ 333 /* should do a probe here */
341 334
342 irq = it->options[0]; 335 irq = it->options[0];
343 printk(" ( irq = %u )", irq); 336 dev_dbg(dev->hw_dev, "( irq = %u )\n", irq);
344 ret = request_irq(irq, intr_handler, 0, "das6402", dev); 337 ret = request_irq(irq, intr_handler, 0, "das6402", dev);
345 if (ret < 0) { 338 if (ret < 0)
346 printk("irq conflict\n");
347 return ret; 339 return ret;
348 }
349 dev->irq = irq;
350 340
341 dev->irq = irq;
351 ret = alloc_private(dev, sizeof(struct das6402_private)); 342 ret = alloc_private(dev, sizeof(struct das6402_private));
352 if (ret < 0) 343 if (ret < 0)
353 return ret; 344 return ret;
diff --git a/drivers/staging/comedi/drivers/das800.c b/drivers/staging/comedi/drivers/das800.c
index 96d41ad76956..6e347b40fe61 100644
--- a/drivers/staging/comedi/drivers/das800.c
+++ b/drivers/staging/comedi/drivers/das800.c
@@ -296,47 +296,47 @@ static int das800_probe(struct comedi_device *dev)
296 switch (id_bits) { 296 switch (id_bits) {
297 case 0x0: 297 case 0x0:
298 if (board == das800) { 298 if (board == das800) {
299 printk(" Board model: DAS-800\n"); 299 dev_dbg(dev->hw_dev, "Board model: DAS-800\n");
300 return board; 300 return board;
301 } 301 }
302 if (board == ciodas800) { 302 if (board == ciodas800) {
303 printk(" Board model: CIO-DAS800\n"); 303 dev_dbg(dev->hw_dev, "Board model: CIO-DAS800\n");
304 return board; 304 return board;
305 } 305 }
306 printk(" Board model (probed): DAS-800\n"); 306 dev_dbg(dev->hw_dev, "Board model (probed): DAS-800\n");
307 return das800; 307 return das800;
308 break; 308 break;
309 case 0x2: 309 case 0x2:
310 if (board == das801) { 310 if (board == das801) {
311 printk(" Board model: DAS-801\n"); 311 dev_dbg(dev->hw_dev, "Board model: DAS-801\n");
312 return board; 312 return board;
313 } 313 }
314 if (board == ciodas801) { 314 if (board == ciodas801) {
315 printk(" Board model: CIO-DAS801\n"); 315 dev_dbg(dev->hw_dev, "Board model: CIO-DAS801\n");
316 return board; 316 return board;
317 } 317 }
318 printk(" Board model (probed): DAS-801\n"); 318 dev_dbg(dev->hw_dev, "Board model (probed): DAS-801\n");
319 return das801; 319 return das801;
320 break; 320 break;
321 case 0x3: 321 case 0x3:
322 if (board == das802) { 322 if (board == das802) {
323 printk(" Board model: DAS-802\n"); 323 dev_dbg(dev->hw_dev, "Board model: DAS-802\n");
324 return board; 324 return board;
325 } 325 }
326 if (board == ciodas802) { 326 if (board == ciodas802) {
327 printk(" Board model: CIO-DAS802\n"); 327 dev_dbg(dev->hw_dev, "Board model: CIO-DAS802\n");
328 return board; 328 return board;
329 } 329 }
330 if (board == ciodas80216) { 330 if (board == ciodas80216) {
331 printk(" Board model: CIO-DAS802/16\n"); 331 dev_dbg(dev->hw_dev, "Board model: CIO-DAS802/16\n");
332 return board; 332 return board;
333 } 333 }
334 printk(" Board model (probed): DAS-802\n"); 334 dev_dbg(dev->hw_dev, "Board model (probed): DAS-802\n");
335 return das802; 335 return das802;
336 break; 336 break;
337 default: 337 default:
338 printk(" Board model: probe returned 0x%x (unknown)\n", 338 dev_dbg(dev->hw_dev, "Board model: probe returned 0x%x (unknown)\n",
339 id_bits); 339 id_bits);
340 return board; 340 return board;
341 break; 341 break;
342 } 342 }
@@ -466,42 +466,43 @@ static int das800_attach(struct comedi_device *dev, struct comedi_devconfig *it)
466 unsigned long irq_flags; 466 unsigned long irq_flags;
467 int board; 467 int board;
468 468
469 printk("comedi%d: das800: io 0x%lx", dev->minor, iobase); 469 dev_info(dev->hw_dev, "comedi%d: das800: io 0x%lx\n", dev->minor,
470 iobase);
470 if (irq) 471 if (irq)
471 printk(", irq %u", irq); 472 dev_dbg(dev->hw_dev, "irq %u\n", irq);
472 printk("\n");
473 473
474 /* allocate and initialize dev->private */ 474 /* allocate and initialize dev->private */
475 if (alloc_private(dev, sizeof(struct das800_private)) < 0) 475 if (alloc_private(dev, sizeof(struct das800_private)) < 0)
476 return -ENOMEM; 476 return -ENOMEM;
477 477
478 if (iobase == 0) { 478 if (iobase == 0) {
479 printk("io base address required for das800\n"); 479 dev_err(dev->hw_dev, "io base address required for das800\n");
480 return -EINVAL; 480 return -EINVAL;
481 } 481 }
482 482
483 /* check if io addresses are available */ 483 /* check if io addresses are available */
484 if (!request_region(iobase, DAS800_SIZE, "das800")) { 484 if (!request_region(iobase, DAS800_SIZE, "das800")) {
485 printk("I/O port conflict\n"); 485 dev_err(dev->hw_dev, "I/O port conflict\n");
486 return -EIO; 486 return -EIO;
487 } 487 }
488 dev->iobase = iobase; 488 dev->iobase = iobase;
489 489
490 board = das800_probe(dev); 490 board = das800_probe(dev);
491 if (board < 0) { 491 if (board < 0) {
492 printk("unable to determine board type\n"); 492 dev_dbg(dev->hw_dev, "unable to determine board type\n");
493 return -ENODEV; 493 return -ENODEV;
494 } 494 }
495 dev->board_ptr = das800_boards + board; 495 dev->board_ptr = das800_boards + board;
496 496
497 /* grab our IRQ */ 497 /* grab our IRQ */
498 if (irq == 1 || irq > 7) { 498 if (irq == 1 || irq > 7) {
499 printk("irq out of range\n"); 499 dev_err(dev->hw_dev, "irq out of range\n");
500 return -EINVAL; 500 return -EINVAL;
501 } 501 }
502 if (irq) { 502 if (irq) {
503 if (request_irq(irq, das800_interrupt, 0, "das800", dev)) { 503 if (request_irq(irq, das800_interrupt, 0, "das800", dev)) {
504 printk("unable to allocate irq %u\n", irq); 504 dev_err(dev->hw_dev, "unable to allocate irq %u\n",
505 irq);
505 return -EINVAL; 506 return -EINVAL;
506 } 507 }
507 } 508 }
@@ -557,7 +558,7 @@ static int das800_attach(struct comedi_device *dev, struct comedi_devconfig *it)
557 558
558static int das800_detach(struct comedi_device *dev) 559static int das800_detach(struct comedi_device *dev)
559{ 560{
560 printk("comedi%d: das800: remove\n", dev->minor); 561 dev_info(dev->hw_dev, "comedi%d: das800: remove\n", dev->minor);
561 562
562 /* only free stuff if it has been allocated by _attach */ 563 /* only free stuff if it has been allocated by _attach */
563 if (dev->iobase) 564 if (dev->iobase)
diff --git a/drivers/staging/comedi/drivers/dt3000.c b/drivers/staging/comedi/drivers/dt3000.c
index 6170f7bac46e..0a7979e52999 100644
--- a/drivers/staging/comedi/drivers/dt3000.c
+++ b/drivers/staging/comedi/drivers/dt3000.c
@@ -352,7 +352,8 @@ static int dt3k_send_cmd(struct comedi_device *dev, unsigned int cmd)
352 if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR) 352 if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR)
353 return 0; 353 return 0;
354 354
355 printk("dt3k_send_cmd() timeout/error status=0x%04x\n", status); 355 dev_dbg(dev->hw_dev, "dt3k_send_cmd() timeout/error status=0x%04x\n",
356 status);
356 357
357 return -ETIME; 358 return -ETIME;
358} 359}
@@ -383,7 +384,7 @@ static void dt3k_writesingle(struct comedi_device *dev, unsigned int subsys,
383 dt3k_send_cmd(dev, CMD_WRITESINGLE); 384 dt3k_send_cmd(dev, CMD_WRITESINGLE);
384} 385}
385 386
386static int debug_n_ints = 0; 387static int debug_n_ints;
387 388
388/* FIXME! Assumes shared interrupt is for this card. */ 389/* FIXME! Assumes shared interrupt is for this card. */
389/* What's this debug_n_ints stuff? Obviously needs some work... */ 390/* What's this debug_n_ints stuff? Obviously needs some work... */
@@ -429,12 +430,12 @@ static char *intr_flags[] = {
429static void debug_intr_flags(unsigned int flags) 430static void debug_intr_flags(unsigned int flags)
430{ 431{
431 int i; 432 int i;
432 printk("dt3k: intr_flags:"); 433 printk(KERN_DEBUG "dt3k: intr_flags:");
433 for (i = 0; i < 8; i++) { 434 for (i = 0; i < 8; i++) {
434 if (flags & (1 << i)) 435 if (flags & (1 << i))
435 printk(" %s", intr_flags[i]); 436 printk(KERN_CONT " %s", intr_flags[i]);
436 } 437 }
437 printk("\n"); 438 printk(KERN_CONT "\n");
438} 439}
439#endif 440#endif
440 441
@@ -452,7 +453,7 @@ static void dt3k_ai_empty_fifo(struct comedi_device *dev,
452 if (count < 0) 453 if (count < 0)
453 count += AI_FIFO_DEPTH; 454 count += AI_FIFO_DEPTH;
454 455
455 printk("reading %d samples\n", count); 456 dev_dbg(dev->hw_dev, "reading %d samples\n", count);
456 457
457 rear = devpriv->ai_rear; 458 rear = devpriv->ai_rear;
458 459
@@ -640,7 +641,7 @@ static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
640 int ret; 641 int ret;
641 unsigned int mode; 642 unsigned int mode;
642 643
643 printk("dt3k_ai_cmd:\n"); 644 dev_dbg(dev->hw_dev, "dt3k_ai_cmd:\n");
644 for (i = 0; i < cmd->chanlist_len; i++) { 645 for (i = 0; i < cmd->chanlist_len; i++) {
645 chan = CR_CHAN(cmd->chanlist[i]); 646 chan = CR_CHAN(cmd->chanlist[i]);
646 range = CR_RANGE(cmd->chanlist[i]); 647 range = CR_RANGE(cmd->chanlist[i]);
@@ -651,15 +652,15 @@ static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
651 aref = CR_AREF(cmd->chanlist[0]); 652 aref = CR_AREF(cmd->chanlist[0]);
652 653
653 writew(cmd->scan_end_arg, devpriv->io_addr + DPR_Params(0)); 654 writew(cmd->scan_end_arg, devpriv->io_addr + DPR_Params(0));
654 printk("param[0]=0x%04x\n", cmd->scan_end_arg); 655 dev_dbg(dev->hw_dev, "param[0]=0x%04x\n", cmd->scan_end_arg);
655 656
656 if (cmd->convert_src == TRIG_TIMER) { 657 if (cmd->convert_src == TRIG_TIMER) {
657 divider = dt3k_ns_to_timer(50, &cmd->convert_arg, 658 divider = dt3k_ns_to_timer(50, &cmd->convert_arg,
658 cmd->flags & TRIG_ROUND_MASK); 659 cmd->flags & TRIG_ROUND_MASK);
659 writew((divider >> 16), devpriv->io_addr + DPR_Params(1)); 660 writew((divider >> 16), devpriv->io_addr + DPR_Params(1));
660 printk("param[1]=0x%04x\n", divider >> 16); 661 dev_dbg(dev->hw_dev, "param[1]=0x%04x\n", divider >> 16);
661 writew((divider & 0xffff), devpriv->io_addr + DPR_Params(2)); 662 writew((divider & 0xffff), devpriv->io_addr + DPR_Params(2));
662 printk("param[2]=0x%04x\n", divider & 0xffff); 663 dev_dbg(dev->hw_dev, "param[2]=0x%04x\n", divider & 0xffff);
663 } else { 664 } else {
664 /* not supported */ 665 /* not supported */
665 } 666 }
@@ -668,21 +669,21 @@ static int dt3k_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
668 tscandiv = dt3k_ns_to_timer(100, &cmd->scan_begin_arg, 669 tscandiv = dt3k_ns_to_timer(100, &cmd->scan_begin_arg,
669 cmd->flags & TRIG_ROUND_MASK); 670 cmd->flags & TRIG_ROUND_MASK);
670 writew((tscandiv >> 16), devpriv->io_addr + DPR_Params(3)); 671 writew((tscandiv >> 16), devpriv->io_addr + DPR_Params(3));
671 printk("param[3]=0x%04x\n", tscandiv >> 16); 672 dev_dbg(dev->hw_dev, "param[3]=0x%04x\n", tscandiv >> 16);
672 writew((tscandiv & 0xffff), devpriv->io_addr + DPR_Params(4)); 673 writew((tscandiv & 0xffff), devpriv->io_addr + DPR_Params(4));
673 printk("param[4]=0x%04x\n", tscandiv & 0xffff); 674 dev_dbg(dev->hw_dev, "param[4]=0x%04x\n", tscandiv & 0xffff);
674 } else { 675 } else {
675 /* not supported */ 676 /* not supported */
676 } 677 }
677 678
678 mode = DT3000_AD_RETRIG_INTERNAL | 0 | 0; 679 mode = DT3000_AD_RETRIG_INTERNAL | 0 | 0;
679 writew(mode, devpriv->io_addr + DPR_Params(5)); 680 writew(mode, devpriv->io_addr + DPR_Params(5));
680 printk("param[5]=0x%04x\n", mode); 681 dev_dbg(dev->hw_dev, "param[5]=0x%04x\n", mode);
681 writew(aref == AREF_DIFF, devpriv->io_addr + DPR_Params(6)); 682 writew(aref == AREF_DIFF, devpriv->io_addr + DPR_Params(6));
682 printk("param[6]=0x%04x\n", aref == AREF_DIFF); 683 dev_dbg(dev->hw_dev, "param[6]=0x%04x\n", aref == AREF_DIFF);
683 684
684 writew(AI_FIFO_DEPTH / 2, devpriv->io_addr + DPR_Params(7)); 685 writew(AI_FIFO_DEPTH / 2, devpriv->io_addr + DPR_Params(7));
685 printk("param[7]=0x%04x\n", AI_FIFO_DEPTH / 2); 686 dev_dbg(dev->hw_dev, "param[7]=0x%04x\n", AI_FIFO_DEPTH / 2);
686 687
687 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys); 688 writew(SUBS_AI, devpriv->io_addr + DPR_SubSys);
688 ret = dt3k_send_cmd(dev, CMD_CONFIG); 689 ret = dt3k_send_cmd(dev, CMD_CONFIG);
@@ -848,7 +849,7 @@ static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
848 int bus, slot; 849 int bus, slot;
849 int ret = 0; 850 int ret = 0;
850 851
851 printk("dt3000:"); 852 dev_dbg(dev->hw_dev, "dt3000:\n");
852 bus = it->options[0]; 853 bus = it->options[0];
853 slot = it->options[1]; 854 slot = it->options[1];
854 855
@@ -860,7 +861,7 @@ static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
860 if (ret < 0) 861 if (ret < 0)
861 return ret; 862 return ret;
862 if (ret == 0) { 863 if (ret == 0) {
863 printk(" no DT board found\n"); 864 dev_warn(dev->hw_dev, "no DT board found\n");
864 return -ENODEV; 865 return -ENODEV;
865 } 866 }
866 867
@@ -868,7 +869,8 @@ static int dt3000_attach(struct comedi_device *dev, struct comedi_devconfig *it)
868 869
869 if (request_irq(devpriv->pci_dev->irq, dt3k_interrupt, IRQF_SHARED, 870 if (request_irq(devpriv->pci_dev->irq, dt3k_interrupt, IRQF_SHARED,
870 "dt3000", dev)) { 871 "dt3000", dev)) {
871 printk(" unable to allocate IRQ %u\n", devpriv->pci_dev->irq); 872 dev_err(dev->hw_dev, "unable to allocate IRQ %u\n",
873 devpriv->pci_dev->irq);
872 return -EINVAL; 874 return -EINVAL;
873 } 875 }
874 dev->irq = devpriv->pci_dev->irq; 876 dev->irq = devpriv->pci_dev->irq;
diff --git a/drivers/staging/comedi/drivers/jr3_pci.c b/drivers/staging/comedi/drivers/jr3_pci.c
index 8d98cf412709..6a79ba10630d 100644
--- a/drivers/staging/comedi/drivers/jr3_pci.c
+++ b/drivers/staging/comedi/drivers/jr3_pci.c
@@ -71,18 +71,12 @@ static struct comedi_driver driver_jr3_pci = {
71}; 71};
72 72
73static DEFINE_PCI_DEVICE_TABLE(jr3_pci_pci_table) = { 73static DEFINE_PCI_DEVICE_TABLE(jr3_pci_pci_table) = {
74 { 74 { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL) },
75 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL, 75 { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL_NEW) },
76 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 76 { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL) },
77 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL_NEW, 77 { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL) },
78 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 78 { PCI_DEVICE(PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_4_CHANNEL) },
79 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL, 79 {0}
80 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
81 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL,
82 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
83 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_4_CHANNEL,
84 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
85 0}
86}; 80};
87 81
88MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table); 82MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
@@ -378,14 +372,14 @@ static int jr3_pci_open(struct comedi_device *dev)
378 int i; 372 int i;
379 struct jr3_pci_dev_private *devpriv = dev->private; 373 struct jr3_pci_dev_private *devpriv = dev->private;
380 374
381 printk("jr3_pci_open\n"); 375 dev_dbg(dev->hw_dev, "jr3_pci_open\n");
382 for (i = 0; i < devpriv->n_channels; i++) { 376 for (i = 0; i < devpriv->n_channels; i++) {
383 struct jr3_pci_subdev_private *p; 377 struct jr3_pci_subdev_private *p;
384 378
385 p = dev->subdevices[i].private; 379 p = dev->subdevices[i].private;
386 if (p) { 380 if (p) {
387 printk("serial: %p %d (%d)\n", p, p->serial_no, 381 dev_dbg(dev->hw_dev, "serial: %p %d (%d)\n", p,
388 p->channel_no); 382 p->serial_no, p->channel_no);
389 } 383 }
390 } 384 }
391 return 0; 385 return 0;
@@ -463,8 +457,8 @@ static int jr3_download_firmware(struct comedi_device *dev, const u8 * data,
463 break; 457 break;
464 more = more 458 more = more
465 && read_idm_word(data, size, &pos, &addr); 459 && read_idm_word(data, size, &pos, &addr);
466 printk("Loading#%d %4.4x bytes at %4.4x\n", i, 460 dev_dbg(dev->hw_dev, "Loading#%d %4.4x bytes at %4.4x\n",
467 count, addr); 461 i, count, addr);
468 while (more && count > 0) { 462 while (more && count > 0) {
469 if (addr & 0x4000) { 463 if (addr & 0x4000) {
470 /* 16 bit data, never seen in real life!! */ 464 /* 16 bit data, never seen in real life!! */
@@ -599,24 +593,24 @@ static struct poll_delay_t jr3_pci_poll_subdevice(struct comedi_subdevice *s)
599 min_full_scale = 593 min_full_scale =
600 get_min_full_scales(channel); 594 get_min_full_scales(channel);
601 printk("Obtained Min. Full Scales:\n"); 595 printk("Obtained Min. Full Scales:\n");
602 printk("%i ", (min_full_scale).fx); 596 printk(KERN_DEBUG "%i ", (min_full_scale).fx);
603 printk("%i ", (min_full_scale).fy); 597 printk(KERN_CONT "%i ", (min_full_scale).fy);
604 printk("%i ", (min_full_scale).fz); 598 printk(KERN_CONT "%i ", (min_full_scale).fz);
605 printk("%i ", (min_full_scale).mx); 599 printk(KERN_CONT "%i ", (min_full_scale).mx);
606 printk("%i ", (min_full_scale).my); 600 printk(KERN_CONT "%i ", (min_full_scale).my);
607 printk("%i ", (min_full_scale).mz); 601 printk(KERN_CONT "%i ", (min_full_scale).mz);
608 printk("\n"); 602 printk(KERN_CONT "\n");
609 603
610 max_full_scale = 604 max_full_scale =
611 get_max_full_scales(channel); 605 get_max_full_scales(channel);
612 printk("Obtained Max. Full Scales:\n"); 606 printk("Obtained Max. Full Scales:\n");
613 printk("%i ", (max_full_scale).fx); 607 printk(KERN_DEBUG "%i ", (max_full_scale).fx);
614 printk("%i ", (max_full_scale).fy); 608 printk(KERN_CONT "%i ", (max_full_scale).fy);
615 printk("%i ", (max_full_scale).fz); 609 printk(KERN_CONT "%i ", (max_full_scale).fz);
616 printk("%i ", (max_full_scale).mx); 610 printk(KERN_CONT "%i ", (max_full_scale).mx);
617 printk("%i ", (max_full_scale).my); 611 printk(KERN_CONT "%i ", (max_full_scale).my);
618 printk("%i ", (max_full_scale).mz); 612 printk(KERN_CONT "%i ", (max_full_scale).mz);
619 printk("\n"); 613 printk(KERN_CONT "\n");
620 614
621 set_full_scales(channel, 615 set_full_scales(channel,
622 max_full_scale); 616 max_full_scale);
@@ -779,14 +773,12 @@ static int jr3_pci_attach(struct comedi_device *dev,
779 int opt_bus, opt_slot, i; 773 int opt_bus, opt_slot, i;
780 struct jr3_pci_dev_private *devpriv; 774 struct jr3_pci_dev_private *devpriv;
781 775
782 printk("comedi%d: jr3_pci\n", dev->minor);
783
784 opt_bus = it->options[0]; 776 opt_bus = it->options[0];
785 opt_slot = it->options[1]; 777 opt_slot = it->options[1];
786 778
787 if (sizeof(struct jr3_channel) != 0xc00) { 779 if (sizeof(struct jr3_channel) != 0xc00) {
788 printk("sizeof(struct jr3_channel) = %x [expected %x]\n", 780 dev_err(dev->hw_dev, "sizeof(struct jr3_channel) = %x [expected %x]\n",
789 (unsigned)sizeof(struct jr3_channel), 0xc00); 781 (unsigned)sizeof(struct jr3_channel), 0xc00);
790 return -EINVAL; 782 return -EINVAL;
791 } 783 }
792 784
@@ -840,7 +832,7 @@ static int jr3_pci_attach(struct comedi_device *dev,
840 } 832 }
841 } 833 }
842 if (!card) { 834 if (!card) {
843 printk(" no jr3_pci found\n"); 835 dev_err(dev->hw_dev, "no jr3_pci found\n");
844 return -EIO; 836 return -EIO;
845 } else { 837 } else {
846 devpriv->pci_dev = card; 838 devpriv->pci_dev = card;
@@ -875,10 +867,10 @@ static int jr3_pci_attach(struct comedi_device *dev,
875 867
876 p = dev->subdevices[i].private; 868 p = dev->subdevices[i].private;
877 p->channel = &devpriv->iobase->channel[i].data; 869 p->channel = &devpriv->iobase->channel[i].data;
878 printk("p->channel %p %p (%tx)\n", 870 dev_dbg(dev->hw_dev, "p->channel %p %p (%tx)\n",
879 p->channel, devpriv->iobase, 871 p->channel, devpriv->iobase,
880 ((char *)(p->channel) - 872 ((char *)(p->channel) -
881 (char *)(devpriv->iobase))); 873 (char *)(devpriv->iobase)));
882 p->channel_no = i; 874 p->channel_no = i;
883 for (j = 0; j < 8; j++) { 875 for (j = 0; j < 8; j++) {
884 int k; 876 int k;
@@ -916,7 +908,7 @@ static int jr3_pci_attach(struct comedi_device *dev,
916 devpriv->iobase->channel[0].reset = 0; 908 devpriv->iobase->channel[0].reset = 0;
917 909
918 result = comedi_load_firmware(dev, "jr3pci.idm", jr3_download_firmware); 910 result = comedi_load_firmware(dev, "jr3pci.idm", jr3_download_firmware);
919 printk("Firmare load %d\n", result); 911 dev_dbg(dev->hw_dev, "Firmare load %d\n", result);
920 912
921 if (result < 0) 913 if (result < 0)
922 goto out; 914 goto out;
@@ -934,9 +926,9 @@ static int jr3_pci_attach(struct comedi_device *dev,
934 */ 926 */
935 msleep_interruptible(25); 927 msleep_interruptible(25);
936 for (i = 0; i < 0x18; i++) { 928 for (i = 0; i < 0x18; i++) {
937 printk("%c", 929 dev_dbg(dev->hw_dev, "%c\n",
938 get_u16(&devpriv->iobase->channel[0]. 930 get_u16(&devpriv->iobase->channel[0].
939 data.copyright[i]) >> 8); 931 data.copyright[i]) >> 8);
940 } 932 }
941 933
942 /* Start card timer */ 934 /* Start card timer */
@@ -963,7 +955,6 @@ static int jr3_pci_detach(struct comedi_device *dev)
963 int i; 955 int i;
964 struct jr3_pci_dev_private *devpriv = dev->private; 956 struct jr3_pci_dev_private *devpriv = dev->private;
965 957
966 printk("comedi%d: jr3_pci: remove\n", dev->minor);
967 if (devpriv) { 958 if (devpriv) {
968 del_timer_sync(&devpriv->timer); 959 del_timer_sync(&devpriv->timer);
969 960
diff --git a/drivers/staging/comedi/drivers/ke_counter.c b/drivers/staging/comedi/drivers/ke_counter.c
index 286093bca3fb..4e9e9a078652 100644
--- a/drivers/staging/comedi/drivers/ke_counter.c
+++ b/drivers/staging/comedi/drivers/ke_counter.c
@@ -52,10 +52,8 @@ static int cnt_attach(struct comedi_device *dev, struct comedi_devconfig *it);
52static int cnt_detach(struct comedi_device *dev); 52static int cnt_detach(struct comedi_device *dev);
53 53
54static DEFINE_PCI_DEVICE_TABLE(cnt_pci_table) = { 54static DEFINE_PCI_DEVICE_TABLE(cnt_pci_table) = {
55 { 55 { PCI_DEVICE(PCI_VENDOR_ID_KOLTER, CNT_CARD_DEVICE_ID) },
56 PCI_VENDOR_ID_KOLTER, CNT_CARD_DEVICE_ID, PCI_ANY_ID, 56 {0}
57 PCI_ANY_ID, 0, 0, 0}, {
58 0}
59}; 57};
60 58
61MODULE_DEVICE_TABLE(pci, cnt_pci_table); 59MODULE_DEVICE_TABLE(pci, cnt_pci_table);
diff --git a/drivers/staging/comedi/drivers/me_daq.c b/drivers/staging/comedi/drivers/me_daq.c
index cda4b224b30f..8b812e41c52b 100644
--- a/drivers/staging/comedi/drivers/me_daq.c
+++ b/drivers/staging/comedi/drivers/me_daq.c
@@ -188,12 +188,9 @@ static const struct comedi_lrange me2600_ao_range = {
188}; 188};
189 189
190static DEFINE_PCI_DEVICE_TABLE(me_pci_table) = { 190static DEFINE_PCI_DEVICE_TABLE(me_pci_table) = {
191 { 191 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, ME2600_DEVICE_ID) },
192 PCI_VENDOR_ID_MEILHAUS, ME2600_DEVICE_ID, PCI_ANY_ID, 192 { PCI_DEVICE(PCI_VENDOR_ID_MEILHAUS, ME2000_DEVICE_ID) },
193 PCI_ANY_ID, 0, 0, 0}, { 193 {0}
194 PCI_VENDOR_ID_MEILHAUS, ME2000_DEVICE_ID, PCI_ANY_ID,
195 PCI_ANY_ID, 0, 0, 0}, {
196 0}
197}; 194};
198 195
199MODULE_DEVICE_TABLE(pci, me_pci_table); 196MODULE_DEVICE_TABLE(pci, me_pci_table);
diff --git a/drivers/staging/comedi/drivers/ni_at_a2150.c b/drivers/staging/comedi/drivers/ni_at_a2150.c
index 32e675e3f0b9..c25e44c1905e 100644
--- a/drivers/staging/comedi/drivers/ni_at_a2150.c
+++ b/drivers/staging/comedi/drivers/ni_at_a2150.c
@@ -731,9 +731,8 @@ static int a2150_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
731 outw(trigger_bits, dev->iobase + TRIGGER_REG); 731 outw(trigger_bits, dev->iobase + TRIGGER_REG);
732 732
733 /* start acquisition for soft trigger */ 733 /* start acquisition for soft trigger */
734 if (cmd->start_src == TRIG_NOW) { 734 if (cmd->start_src == TRIG_NOW)
735 outw(0, dev->iobase + FIFO_START_REG); 735 outw(0, dev->iobase + FIFO_START_REG);
736 }
737#ifdef A2150_DEBUG 736#ifdef A2150_DEBUG
738 ni_dump_regs(dev); 737 ni_dump_regs(dev);
739#endif 738#endif
@@ -860,11 +859,10 @@ static int a2150_get_timing(struct comedi_device *dev, unsigned int *period,
860 case TRIG_ROUND_NEAREST: 859 case TRIG_ROUND_NEAREST:
861 default: 860 default:
862 /* if least upper bound is better approximation */ 861 /* if least upper bound is better approximation */
863 if (lub - *period < *period - glb) { 862 if (lub - *period < *period - glb)
864 *period = lub; 863 *period = lub;
865 } else { 864 else
866 *period = glb; 865 *period = glb;
867 }
868 break; 866 break;
869 case TRIG_ROUND_UP: 867 case TRIG_ROUND_UP:
870 *period = lub; 868 *period = lub;
diff --git a/drivers/staging/comedi/drivers/ni_daq_dio24.c b/drivers/staging/comedi/drivers/ni_daq_dio24.c
index 49b824c7bd2e..c0423a8c3e36 100644
--- a/drivers/staging/comedi/drivers/ni_daq_dio24.c
+++ b/drivers/staging/comedi/drivers/ni_daq_dio24.c
@@ -52,7 +52,7 @@ the PCMCIA interface.
52#include <pcmcia/cisreg.h> 52#include <pcmcia/cisreg.h>
53#include <pcmcia/ds.h> 53#include <pcmcia/ds.h>
54 54
55static struct pcmcia_device *pcmcia_cur_dev = NULL; 55static struct pcmcia_device *pcmcia_cur_dev;
56 56
57#define DIO24_SIZE 4 /* size of io region used by board */ 57#define DIO24_SIZE 4 /* size of io region used by board */
58 58
@@ -133,22 +133,19 @@ static int dio24_attach(struct comedi_device *dev, struct comedi_devconfig *it)
133#endif 133#endif
134 break; 134 break;
135 default: 135 default:
136 printk("bug! couldn't determine board type\n"); 136 pr_err("bug! couldn't determine board type\n");
137 return -EINVAL; 137 return -EINVAL;
138 break; 138 break;
139 } 139 }
140 printk("comedi%d: ni_daq_dio24: %s, io 0x%lx", dev->minor, 140 pr_debug("comedi%d: ni_daq_dio24: %s, io 0x%lx", dev->minor,
141 thisboard->name, iobase); 141 thisboard->name, iobase);
142#ifdef incomplete 142#ifdef incomplete
143 if (irq) { 143 if (irq)
144 printk(", irq %u", irq); 144 pr_debug("irq %u\n", irq);
145 }
146#endif 145#endif
147 146
148 printk("\n");
149
150 if (iobase == 0) { 147 if (iobase == 0) {
151 printk("io base address is zero!\n"); 148 pr_err("io base address is zero!\n");
152 return -EINVAL; 149 return -EINVAL;
153 } 150 }
154 151
@@ -173,7 +170,7 @@ static int dio24_attach(struct comedi_device *dev, struct comedi_devconfig *it)
173 170
174static int dio24_detach(struct comedi_device *dev) 171static int dio24_detach(struct comedi_device *dev)
175{ 172{
176 printk("comedi%d: ni_daq_dio24: remove\n", dev->minor); 173 dev_info(dev->hw_dev, "comedi%d: ni_daq_dio24: remove\n", dev->minor);
177 174
178 if (dev->subdevices) 175 if (dev->subdevices)
179 subdev_8255_cleanup(dev, dev->subdevices + 0); 176 subdev_8255_cleanup(dev, dev->subdevices + 0);
diff --git a/drivers/staging/comedi/drivers/ni_labpc_cs.c b/drivers/staging/comedi/drivers/ni_labpc_cs.c
index 832a5178b638..ff3840544dd4 100644
--- a/drivers/staging/comedi/drivers/ni_labpc_cs.c
+++ b/drivers/staging/comedi/drivers/ni_labpc_cs.c
@@ -145,7 +145,7 @@ static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
145 irq = link->irq; 145 irq = link->irq;
146 break; 146 break;
147 default: 147 default:
148 printk("bug! couldn't determine board type\n"); 148 pr_err("bug! couldn't determine board type\n");
149 return -EINVAL; 149 return -EINVAL;
150 break; 150 break;
151 } 151 }
diff --git a/drivers/staging/comedi/drivers/ni_pcimio.c b/drivers/staging/comedi/drivers/ni_pcimio.c
index 9148abdad074..0f0d995f137c 100644
--- a/drivers/staging/comedi/drivers/ni_pcimio.c
+++ b/drivers/staging/comedi/drivers/ni_pcimio.c
@@ -1470,7 +1470,7 @@ static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
1470 /* FIXME: DIO_Output_Register (16 bit reg) is replaced by M_Offset_Static_Digital_Output (32 bit) 1470 /* FIXME: DIO_Output_Register (16 bit reg) is replaced by M_Offset_Static_Digital_Output (32 bit)
1471 and M_Offset_SCXI_Serial_Data_Out (8 bit) */ 1471 and M_Offset_SCXI_Serial_Data_Out (8 bit) */
1472 default: 1472 default:
1473 printk("%s: bug! unhandled register=0x%x in switch.\n", 1473 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n",
1474 __func__, reg); 1474 __func__, reg);
1475 BUG(); 1475 BUG();
1476 return; 1476 return;
@@ -1505,7 +1505,7 @@ static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
1505 offset = M_Offset_G01_Status; 1505 offset = M_Offset_G01_Status;
1506 break; 1506 break;
1507 default: 1507 default:
1508 printk("%s: bug! unhandled register=0x%x in switch.\n", 1508 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n",
1509 __func__, reg); 1509 __func__, reg);
1510 BUG(); 1510 BUG();
1511 return 0; 1511 return 0;
@@ -1547,7 +1547,7 @@ static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
1547 offset = M_Offset_G1_Load_B; 1547 offset = M_Offset_G1_Load_B;
1548 break; 1548 break;
1549 default: 1549 default:
1550 printk("%s: bug! unhandled register=0x%x in switch.\n", 1550 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n",
1551 __func__, reg); 1551 __func__, reg);
1552 BUG(); 1552 BUG();
1553 return; 1553 return;
@@ -1573,7 +1573,7 @@ static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
1573 offset = M_Offset_G1_Save; 1573 offset = M_Offset_G1_Save;
1574 break; 1574 break;
1575 default: 1575 default:
1576 printk("%s: bug! unhandled register=0x%x in switch.\n", 1576 printk(KERN_WARNING "%s: bug! unhandled register=0x%x in switch.\n",
1577 __func__, reg); 1577 __func__, reg);
1578 BUG(); 1578 BUG();
1579 return 0; 1579 return 0;
@@ -1632,9 +1632,8 @@ static void m_series_init_eeprom_buffer(struct comedi_device *dev)
1632 } 1632 }
1633 devpriv->serial_number = be32_to_cpu(devpriv->serial_number); 1633 devpriv->serial_number = be32_to_cpu(devpriv->serial_number);
1634 1634
1635 for (i = 0; i < M_SERIES_EEPROM_SIZE; ++i) { 1635 for (i = 0; i < M_SERIES_EEPROM_SIZE; ++i)
1636 devpriv->eeprom_buffer[i] = ni_readb(Start_Cal_EEPROM + i); 1636 devpriv->eeprom_buffer[i] = ni_readb(Start_Cal_EEPROM + i);
1637 }
1638 1637
1639 writel(old_iodwbsr1_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR_1); 1638 writel(old_iodwbsr1_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR_1);
1640 writel(old_iodwbsr_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR); 1639 writel(old_iodwbsr_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR);
@@ -1665,9 +1664,9 @@ static void init_6143(struct comedi_device *dev)
1665static int pcimio_detach(struct comedi_device *dev) 1664static int pcimio_detach(struct comedi_device *dev)
1666{ 1665{
1667 mio_common_detach(dev); 1666 mio_common_detach(dev);
1668 if (dev->irq) { 1667 if (dev->irq)
1669 free_irq(dev->irq, dev); 1668 free_irq(dev->irq, dev);
1670 } 1669
1671 if (dev->private) { 1670 if (dev->private) {
1672 mite_free_ring(devpriv->ai_mite_ring); 1671 mite_free_ring(devpriv->ai_mite_ring);
1673 mite_free_ring(devpriv->ao_mite_ring); 1672 mite_free_ring(devpriv->ao_mite_ring);
@@ -1685,7 +1684,7 @@ static int pcimio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1685{ 1684{
1686 int ret; 1685 int ret;
1687 1686
1688 printk("comedi%d: ni_pcimio:", dev->minor); 1687 dev_info(dev->hw_dev, "comedi%d: ni_pcimio:\n", dev->minor);
1689 1688
1690 ret = ni_alloc_private(dev); 1689 ret = ni_alloc_private(dev);
1691 if (ret < 0) 1690 if (ret < 0)
@@ -1695,7 +1694,7 @@ static int pcimio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1695 if (ret < 0) 1694 if (ret < 0)
1696 return ret; 1695 return ret;
1697 1696
1698 printk(" %s", boardtype.name); 1697 dev_dbg(dev->hw_dev, "%s\n", boardtype.name);
1699 dev->board_name = boardtype.name; 1698 dev->board_name = boardtype.name;
1700 1699
1701 if (boardtype.reg_type & ni_reg_m_series_mask) { 1700 if (boardtype.reg_type & ni_reg_m_series_mask) {
@@ -1712,7 +1711,7 @@ static int pcimio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1712 1711
1713 ret = mite_setup(devpriv->mite); 1712 ret = mite_setup(devpriv->mite);
1714 if (ret < 0) { 1713 if (ret < 0) {
1715 printk(" error setting up mite\n"); 1714 pr_warn("error setting up mite\n");
1716 return ret; 1715 return ret;
1717 } 1716 }
1718 comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev); 1717 comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev);
@@ -1740,13 +1739,13 @@ static int pcimio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1740 dev->irq = mite_irq(devpriv->mite); 1739 dev->irq = mite_irq(devpriv->mite);
1741 1740
1742 if (dev->irq == 0) { 1741 if (dev->irq == 0) {
1743 printk(" unknown irq (bad)\n"); 1742 pr_warn("unknown irq (bad)\n");
1744 } else { 1743 } else {
1745 printk(" ( irq = %u )", dev->irq); 1744 pr_debug("( irq = %u )\n", dev->irq);
1746 ret = request_irq(dev->irq, ni_E_interrupt, NI_E_IRQ_FLAGS, 1745 ret = request_irq(dev->irq, ni_E_interrupt, NI_E_IRQ_FLAGS,
1747 DRV_NAME, dev); 1746 DRV_NAME, dev);
1748 if (ret < 0) { 1747 if (ret < 0) {
1749 printk(" irq not available\n"); 1748 pr_warn("irq not available\n");
1750 dev->irq = 0; 1749 dev->irq = 0;
1751 } 1750 }
1752 } 1751 }
@@ -1787,7 +1786,7 @@ static int pcimio_find_device(struct comedi_device *dev, int bus, int slot)
1787 } 1786 }
1788 } 1787 }
1789 } 1788 }
1790 printk("no device found\n"); 1789 pr_warn("no device found\n");
1791 mite_list_devices(); 1790 mite_list_devices();
1792 return -EIO; 1791 return -EIO;
1793} 1792}
diff --git a/drivers/staging/comedi/drivers/pcl816.c b/drivers/staging/comedi/drivers/pcl816.c
index 0b9bee36eb5f..96cd7ec2ad53 100644
--- a/drivers/staging/comedi/drivers/pcl816.c
+++ b/drivers/staging/comedi/drivers/pcl816.c
@@ -155,8 +155,8 @@ static int pcl816_attach(struct comedi_device *dev,
155static int pcl816_detach(struct comedi_device *dev); 155static int pcl816_detach(struct comedi_device *dev);
156 156
157#ifdef unused 157#ifdef unused
158static int RTC_lock = 0; /* RTC lock */ 158static int RTC_lock; /* RTC lock */
159static int RTC_timer_lock = 0; /* RTC int lock */ 159static int RTC_timer_lock; /* RTC int lock */
160#endif 160#endif
161 161
162static struct comedi_driver driver_pcl816 = { 162static struct comedi_driver driver_pcl816 = {
diff --git a/drivers/staging/comedi/drivers/pcl818.c b/drivers/staging/comedi/drivers/pcl818.c
index b45a9bd8b489..7344a53a81c4 100644
--- a/drivers/staging/comedi/drivers/pcl818.c
+++ b/drivers/staging/comedi/drivers/pcl818.c
@@ -252,8 +252,8 @@ static int pcl818_attach(struct comedi_device *dev,
252static int pcl818_detach(struct comedi_device *dev); 252static int pcl818_detach(struct comedi_device *dev);
253 253
254#ifdef unused 254#ifdef unused
255static int RTC_lock = 0; /* RTC lock */ 255static int RTC_lock; /* RTC lock */
256static int RTC_timer_lock = 0; /* RTC int lock */ 256static int RTC_timer_lock; /* RTC int lock */
257#endif 257#endif
258 258
259struct pcl818_board { 259struct pcl818_board {
@@ -463,9 +463,8 @@ static int pcl818_ao_insn_read(struct comedi_device *dev,
463 int n; 463 int n;
464 int chan = CR_CHAN(insn->chanspec); 464 int chan = CR_CHAN(insn->chanspec);
465 465
466 for (n = 0; n < insn->n; n++) { 466 for (n = 0; n < insn->n; n++)
467 data[n] = devpriv->ao_readback[chan]; 467 data[n] = devpriv->ao_readback[chan];
468 }
469 468
470 return n; 469 return n;
471} 470}
@@ -571,9 +570,9 @@ conv_finish:
571 return IRQ_HANDLED; 570 return IRQ_HANDLED;
572 } 571 }
573 devpriv->act_chanlist_pos++; 572 devpriv->act_chanlist_pos++;
574 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { 573 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len)
575 devpriv->act_chanlist_pos = 0; 574 devpriv->act_chanlist_pos = 0;
576 } 575
577 s->async->cur_chan++; 576 s->async->cur_chan++;
578 if (s->async->cur_chan >= devpriv->ai_n_chan) { 577 if (s->async->cur_chan >= devpriv->ai_n_chan) {
579 /* printk("E"); */ 578 /* printk("E"); */
@@ -645,9 +644,9 @@ static irqreturn_t interrupt_pcl818_ai_mode13_dma(int irq, void *d)
645 comedi_buf_put(s->async, ptr[bufptr++] >> 4); /* get one sample */ 644 comedi_buf_put(s->async, ptr[bufptr++] >> 4); /* get one sample */
646 645
647 devpriv->act_chanlist_pos++; 646 devpriv->act_chanlist_pos++;
648 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { 647 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len)
649 devpriv->act_chanlist_pos = 0; 648 devpriv->act_chanlist_pos = 0;
650 } 649
651 s->async->cur_chan++; 650 s->async->cur_chan++;
652 if (s->async->cur_chan >= devpriv->ai_n_chan) { 651 if (s->async->cur_chan >= devpriv->ai_n_chan) {
653 s->async->cur_chan = 0; 652 s->async->cur_chan = 0;
@@ -805,11 +804,10 @@ static irqreturn_t interrupt_pcl818_ai_mode13_fifo(int irq, void *d)
805 return IRQ_HANDLED; 804 return IRQ_HANDLED;
806 } 805 }
807 806
808 if (lo & 2) { 807 if (lo & 2)
809 len = 512; 808 len = 512;
810 } else { 809 else
811 len = 0; 810 len = 0;
812 }
813 811
814 for (i = 0; i < len; i++) { 812 for (i = 0; i < len; i++) {
815 lo = inb(dev->iobase + PCL818_FI_DATALO); 813 lo = inb(dev->iobase + PCL818_FI_DATALO);
@@ -827,9 +825,9 @@ static irqreturn_t interrupt_pcl818_ai_mode13_fifo(int irq, void *d)
827 comedi_buf_put(s->async, (lo >> 4) | (inb(dev->iobase + PCL818_FI_DATAHI) << 4)); /* get one sample */ 825 comedi_buf_put(s->async, (lo >> 4) | (inb(dev->iobase + PCL818_FI_DATAHI) << 4)); /* get one sample */
828 826
829 devpriv->act_chanlist_pos++; 827 devpriv->act_chanlist_pos++;
830 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len) { 828 if (devpriv->act_chanlist_pos >= devpriv->act_chanlist_len)
831 devpriv->act_chanlist_pos = 0; 829 devpriv->act_chanlist_pos = 0;
832 } 830
833 s->async->cur_chan++; 831 s->async->cur_chan++;
834 if (s->async->cur_chan >= devpriv->ai_n_chan) { 832 if (s->async->cur_chan >= devpriv->ai_n_chan) {
835 s->async->cur_chan = 0; 833 s->async->cur_chan = 0;
@@ -1009,7 +1007,7 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
1009 int divisor1 = 0, divisor2 = 0; 1007 int divisor1 = 0, divisor2 = 0;
1010 unsigned int seglen; 1008 unsigned int seglen;
1011 1009
1012 printk("pcl818_ai_cmd_mode()\n"); 1010 dev_dbg(dev->hw_dev, "pcl818_ai_cmd_mode()\n");
1013 if ((!dev->irq) && (!devpriv->dma_rtc)) { 1011 if ((!dev->irq) && (!devpriv->dma_rtc)) {
1014 comedi_error(dev, "IRQ not defined!"); 1012 comedi_error(dev, "IRQ not defined!");
1015 return -EINVAL; 1013 return -EINVAL;
@@ -1112,7 +1110,7 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
1112 break; 1110 break;
1113 } 1111 }
1114#endif 1112#endif
1115 printk("pcl818_ai_cmd_mode() end\n"); 1113 dev_dbg(dev->hw_dev, "pcl818_ai_cmd_mode() end\n");
1116 return 0; 1114 return 0;
1117} 1115}
1118 1116
@@ -1309,11 +1307,9 @@ static void setup_channel_list(struct comedi_device *dev,
1309*/ 1307*/
1310static int check_single_ended(unsigned int port) 1308static int check_single_ended(unsigned int port)
1311{ 1309{
1312 if (inb(port + PCL818_STATUS) & 0x20) { 1310 if (inb(port + PCL818_STATUS) & 0x20)
1313 return 1; 1311 return 1;
1314 } else { 1312 return 0;
1315 return 0;
1316 }
1317} 1313}
1318 1314
1319/* 1315/*
@@ -1352,9 +1348,8 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1352 if (!cmd->stop_src || tmp != cmd->stop_src) 1348 if (!cmd->stop_src || tmp != cmd->stop_src)
1353 err++; 1349 err++;
1354 1350
1355 if (err) { 1351 if (err)
1356 return 1; 1352 return 1;
1357 }
1358 1353
1359 /* step 2: make sure trigger sources are unique and mutually compatible */ 1354 /* step 2: make sure trigger sources are unique and mutually compatible */
1360 1355
@@ -1377,9 +1372,8 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1377 if (cmd->stop_src != TRIG_NONE && cmd->stop_src != TRIG_COUNT) 1372 if (cmd->stop_src != TRIG_NONE && cmd->stop_src != TRIG_COUNT)
1378 err++; 1373 err++;
1379 1374
1380 if (err) { 1375 if (err)
1381 return 2; 1376 return 2;
1382 }
1383 1377
1384 /* step 3: make sure arguments are trivially compatible */ 1378 /* step 3: make sure arguments are trivially compatible */
1385 1379
@@ -1421,9 +1415,8 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1421 } 1415 }
1422 } 1416 }
1423 1417
1424 if (err) { 1418 if (err)
1425 return 3; 1419 return 3;
1426 }
1427 1420
1428 /* step 4: fix up any arguments */ 1421 /* step 4: fix up any arguments */
1429 1422
@@ -1438,9 +1431,8 @@ static int ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
1438 err++; 1431 err++;
1439 } 1432 }
1440 1433
1441 if (err) { 1434 if (err)
1442 return 4; 1435 return 4;
1443 }
1444 1436
1445 /* step 5: complain about special chanlist considerations */ 1437 /* step 5: complain about special chanlist considerations */
1446 1438
@@ -1461,7 +1453,7 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1461 struct comedi_cmd *cmd = &s->async->cmd; 1453 struct comedi_cmd *cmd = &s->async->cmd;
1462 int retval; 1454 int retval;
1463 1455
1464 printk("pcl818_ai_cmd()\n"); 1456 dev_dbg(dev->hw_dev, "pcl818_ai_cmd()\n");
1465 devpriv->ai_n_chan = cmd->chanlist_len; 1457 devpriv->ai_n_chan = cmd->chanlist_len;
1466 devpriv->ai_chanlist = cmd->chanlist; 1458 devpriv->ai_chanlist = cmd->chanlist;
1467 devpriv->ai_flags = cmd->flags; 1459 devpriv->ai_flags = cmd->flags;
@@ -1470,17 +1462,16 @@ static int ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1470 devpriv->ai_timer1 = 0; 1462 devpriv->ai_timer1 = 0;
1471 devpriv->ai_timer2 = 0; 1463 devpriv->ai_timer2 = 0;
1472 1464
1473 if (cmd->stop_src == TRIG_COUNT) { 1465 if (cmd->stop_src == TRIG_COUNT)
1474 devpriv->ai_scans = cmd->stop_arg; 1466 devpriv->ai_scans = cmd->stop_arg;
1475 } else { 1467 else
1476 devpriv->ai_scans = 0; 1468 devpriv->ai_scans = 0;
1477 }
1478 1469
1479 if (cmd->scan_begin_src == TRIG_FOLLOW) { /* mode 1, 3 */ 1470 if (cmd->scan_begin_src == TRIG_FOLLOW) { /* mode 1, 3 */
1480 if (cmd->convert_src == TRIG_TIMER) { /* mode 1 */ 1471 if (cmd->convert_src == TRIG_TIMER) { /* mode 1 */
1481 devpriv->ai_timer1 = cmd->convert_arg; 1472 devpriv->ai_timer1 = cmd->convert_arg;
1482 retval = pcl818_ai_cmd_mode(1, dev, s); 1473 retval = pcl818_ai_cmd_mode(1, dev, s);
1483 printk("pcl818_ai_cmd() end\n"); 1474 dev_dbg(dev->hw_dev, "pcl818_ai_cmd() end\n");
1484 return retval; 1475 return retval;
1485 } 1476 }
1486 if (cmd->convert_src == TRIG_EXT) { /* mode 3 */ 1477 if (cmd->convert_src == TRIG_EXT) { /* mode 3 */
@@ -1499,7 +1490,7 @@ static int pcl818_ai_cancel(struct comedi_device *dev,
1499 struct comedi_subdevice *s) 1490 struct comedi_subdevice *s)
1500{ 1491{
1501 if (devpriv->irq_blocked > 0) { 1492 if (devpriv->irq_blocked > 0) {
1502 printk("pcl818_ai_cancel()\n"); 1493 dev_dbg(dev->hw_dev, "pcl818_ai_cancel()\n");
1503 devpriv->irq_was_now_closed = 1; 1494 devpriv->irq_was_now_closed = 1;
1504 1495
1505 switch (devpriv->ai_mode) { 1496 switch (devpriv->ai_mode) {
@@ -1549,7 +1540,7 @@ static int pcl818_ai_cancel(struct comedi_device *dev,
1549 } 1540 }
1550 1541
1551end: 1542end:
1552 printk("pcl818_ai_cancel() end\n"); 1543 dev_dbg(dev->hw_dev, "pcl818_ai_cancel() end\n");
1553 return 0; 1544 return 0;
1554} 1545}
1555 1546
@@ -1633,11 +1624,11 @@ static int set_rtc_irq_bit(unsigned char bit)
1633 save_flags(flags); 1624 save_flags(flags);
1634 cli(); 1625 cli();
1635 val = CMOS_READ(RTC_CONTROL); 1626 val = CMOS_READ(RTC_CONTROL);
1636 if (bit) { 1627 if (bit)
1637 val |= RTC_PIE; 1628 val |= RTC_PIE;
1638 } else { 1629 else
1639 val &= ~RTC_PIE; 1630 val &= ~RTC_PIE;
1640 } 1631
1641 CMOS_WRITE(val, RTC_CONTROL); 1632 CMOS_WRITE(val, RTC_CONTROL);
1642 CMOS_READ(RTC_INTR_FLAGS); 1633 CMOS_READ(RTC_INTR_FLAGS);
1643 restore_flags(flags); 1634 restore_flags(flags);
@@ -1754,22 +1745,23 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1754 1745
1755 /* claim our I/O space */ 1746 /* claim our I/O space */
1756 iobase = it->options[0]; 1747 iobase = it->options[0];
1757 printk("comedi%d: pcl818: board=%s, ioport=0x%03lx", 1748 printk
1758 dev->minor, this_board->name, iobase); 1749 ("comedi%d: pcl818: board=%s, ioport=0x%03lx",
1750 dev->minor, this_board->name, iobase);
1759 devpriv->io_range = this_board->io_range; 1751 devpriv->io_range = this_board->io_range;
1760 if ((this_board->fifo) && (it->options[2] == -1)) { /* we've board with FIFO and we want to use FIFO */ 1752 if ((this_board->fifo) && (it->options[2] == -1)) { /* we've board with FIFO and we want to use FIFO */
1761 devpriv->io_range = PCLx1xFIFO_RANGE; 1753 devpriv->io_range = PCLx1xFIFO_RANGE;
1762 devpriv->usefifo = 1; 1754 devpriv->usefifo = 1;
1763 } 1755 }
1764 if (!request_region(iobase, devpriv->io_range, "pcl818")) { 1756 if (!request_region(iobase, devpriv->io_range, "pcl818")) {
1765 printk("I/O port conflict\n"); 1757 comedi_error(dev, "I/O port conflict\n");
1766 return -EIO; 1758 return -EIO;
1767 } 1759 }
1768 1760
1769 dev->iobase = iobase; 1761 dev->iobase = iobase;
1770 1762
1771 if (pcl818_check(iobase)) { 1763 if (pcl818_check(iobase)) {
1772 printk(", I can't detect board. FAIL!\n"); 1764 comedi_error(dev, "I can't detect board. FAIL!\n");
1773 return -EIO; 1765 return -EIO;
1774 } 1766 }
1775 1767
@@ -1793,19 +1785,18 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1793 irq); 1785 irq);
1794 irq = 0; /* Can't use IRQ */ 1786 irq = 0; /* Can't use IRQ */
1795 } else { 1787 } else {
1796 printk(", irq=%u", irq); 1788 printk(KERN_DEBUG "irq=%u", irq);
1797 } 1789 }
1798 } 1790 }
1799 } 1791 }
1800 } 1792 }
1801 1793
1802 dev->irq = irq; 1794 dev->irq = irq;
1803 if (irq) { 1795 if (irq)
1804 devpriv->irq_free = 1; 1796 devpriv->irq_free = 1; /* 1=we have allocated irq */
1805 } /* 1=we have allocated irq */ 1797 else
1806 else {
1807 devpriv->irq_free = 0; 1798 devpriv->irq_free = 0;
1808 } 1799
1809 devpriv->irq_blocked = 0; /* number of subdevice which use IRQ */ 1800 devpriv->irq_blocked = 0; /* number of subdevice which use IRQ */
1810 devpriv->ai_mode = 0; /* mode of irq */ 1801 devpriv->ai_mode = 0; /* mode of irq */
1811 1802
@@ -1825,7 +1816,7 @@ static int pcl818_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1825 "pcl818 DMA (RTC)", dev)) { 1816 "pcl818 DMA (RTC)", dev)) {
1826 devpriv->dma_rtc = 1; 1817 devpriv->dma_rtc = 1;
1827 devpriv->rtc_irq = RTC_IRQ; 1818 devpriv->rtc_irq = RTC_IRQ;
1828 printk(", dma_irq=%u", devpriv->rtc_irq); 1819 printk(KERN_DEBUG "dma_irq=%u", devpriv->rtc_irq);
1829 } else { 1820 } else {
1830 RTC_lock--; 1821 RTC_lock--;
1831 if (RTC_lock == 0) { 1822 if (RTC_lock == 0) {
@@ -1850,34 +1841,26 @@ no_rtc:
1850 if (dma < 1) 1841 if (dma < 1)
1851 goto no_dma; /* DMA disabled */ 1842 goto no_dma; /* DMA disabled */
1852 if (((1 << dma) & this_board->DMAbits) == 0) { 1843 if (((1 << dma) & this_board->DMAbits) == 0) {
1853 printk(", DMA is out of allowed range, FAIL!\n"); 1844 printk(KERN_ERR "DMA is out of allowed range, FAIL!\n");
1854 return -EINVAL; /* Bad DMA */ 1845 return -EINVAL; /* Bad DMA */
1855 } 1846 }
1856 ret = request_dma(dma, "pcl818"); 1847 ret = request_dma(dma, "pcl818");
1857 if (ret) { 1848 if (ret)
1858 printk(", unable to allocate DMA %u, FAIL!\n", dma);
1859 return -EBUSY; /* DMA isn't free */ 1849 return -EBUSY; /* DMA isn't free */
1860 }
1861 devpriv->dma = dma; 1850 devpriv->dma = dma;
1862 printk(", dma=%u", dma);
1863 pages = 2; /* we need 16KB */ 1851 pages = 2; /* we need 16KB */
1864 devpriv->dmabuf[0] = __get_dma_pages(GFP_KERNEL, pages); 1852 devpriv->dmabuf[0] = __get_dma_pages(GFP_KERNEL, pages);
1865 if (!devpriv->dmabuf[0]) { 1853 if (!devpriv->dmabuf[0])
1866 printk(", unable to allocate DMA buffer, FAIL!\n");
1867 /* maybe experiment with try_to_free_pages() will help .... */ 1854 /* maybe experiment with try_to_free_pages() will help .... */
1868 return -EBUSY; /* no buffer :-( */ 1855 return -EBUSY; /* no buffer :-( */
1869 }
1870 devpriv->dmapages[0] = pages; 1856 devpriv->dmapages[0] = pages;
1871 devpriv->hwdmaptr[0] = virt_to_bus((void *)devpriv->dmabuf[0]); 1857 devpriv->hwdmaptr[0] = virt_to_bus((void *)devpriv->dmabuf[0]);
1872 devpriv->hwdmasize[0] = (1 << pages) * PAGE_SIZE; 1858 devpriv->hwdmasize[0] = (1 << pages) * PAGE_SIZE;
1873 /* printk("%d %d %ld, ",devpriv->dmapages[0],devpriv->hwdmasize[0],PAGE_SIZE); */ 1859 /* printk("%d %d %ld, ",devpriv->dmapages[0],devpriv->hwdmasize[0],PAGE_SIZE); */
1874 if (devpriv->dma_rtc == 0) { /* we must do duble buff :-( */ 1860 if (devpriv->dma_rtc == 0) { /* we must do duble buff :-( */
1875 devpriv->dmabuf[1] = __get_dma_pages(GFP_KERNEL, pages); 1861 devpriv->dmabuf[1] = __get_dma_pages(GFP_KERNEL, pages);
1876 if (!devpriv->dmabuf[1]) { 1862 if (!devpriv->dmabuf[1])
1877 printk
1878 (", unable to allocate DMA buffer, FAIL!\n");
1879 return -EBUSY; 1863 return -EBUSY;
1880 }
1881 devpriv->dmapages[1] = pages; 1864 devpriv->dmapages[1] = pages;
1882 devpriv->hwdmaptr[1] = 1865 devpriv->hwdmaptr[1] =
1883 virt_to_bus((void *)devpriv->dmabuf[1]); 1866 virt_to_bus((void *)devpriv->dmabuf[1]);
@@ -2017,11 +2000,10 @@ no_dma:
2017 } 2000 }
2018 2001
2019 /* select 1/10MHz oscilator */ 2002 /* select 1/10MHz oscilator */
2020 if ((it->options[3] == 0) || (it->options[3] == 10)) { 2003 if ((it->options[3] == 0) || (it->options[3] == 10))
2021 devpriv->i8253_osc_base = 100; 2004 devpriv->i8253_osc_base = 100;
2022 } else { 2005 else
2023 devpriv->i8253_osc_base = 1000; 2006 devpriv->i8253_osc_base = 1000;
2024 }
2025 2007
2026 /* max sampling speed */ 2008 /* max sampling speed */
2027 devpriv->ns_min = this_board->ns_min; 2009 devpriv->ns_min = this_board->ns_min;
diff --git a/drivers/staging/comedi/drivers/pcmmio.c b/drivers/staging/comedi/drivers/pcmmio.c
index 3ad04aaa1e3c..eddac00e4e29 100644
--- a/drivers/staging/comedi/drivers/pcmmio.c
+++ b/drivers/staging/comedi/drivers/pcmmio.c
@@ -371,15 +371,15 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
371 iobase = it->options[0]; 371 iobase = it->options[0];
372 irq[0] = it->options[1]; 372 irq[0] = it->options[1];
373 373
374 printk(KERN_INFO "comedi%d: %s: io: %lx ", dev->minor, driver.driver_name, 374 printk(KERN_INFO "comedi%d: %s: io: %lx attaching...\n", dev->minor,
375 iobase); 375 driver.driver_name, iobase);
376 376
377 dev->iobase = iobase; 377 dev->iobase = iobase;
378 378
379 if (!iobase || !request_region(iobase, 379 if (!iobase || !request_region(iobase,
380 thisboard->total_iosize, 380 thisboard->total_iosize,
381 driver.driver_name)) { 381 driver.driver_name)) {
382 printk(KERN_ERR "I/O port conflict\n"); 382 printk(KERN_ERR "comedi%d: I/O port conflict\n", dev->minor);
383 return -EIO; 383 return -EIO;
384 } 384 }
385 385
@@ -394,7 +394,8 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
394 * convenient macro defined in comedidev.h. 394 * convenient macro defined in comedidev.h.
395 */ 395 */
396 if (alloc_private(dev, sizeof(struct pcmmio_private)) < 0) { 396 if (alloc_private(dev, sizeof(struct pcmmio_private)) < 0) {
397 printk(KERN_ERR "cannot allocate private data structure\n"); 397 printk(KERN_ERR "comedi%d: cannot allocate private data structure\n",
398 dev->minor);
398 return -ENOMEM; 399 return -ENOMEM;
399 } 400 }
400 401
@@ -417,7 +418,8 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
417 kcalloc(n_subdevs, sizeof(struct pcmmio_subdev_private), 418 kcalloc(n_subdevs, sizeof(struct pcmmio_subdev_private),
418 GFP_KERNEL); 419 GFP_KERNEL);
419 if (!devpriv->sprivs) { 420 if (!devpriv->sprivs) {
420 printk(KERN_ERR "cannot allocate subdevice private data structures\n"); 421 printk(KERN_ERR "comedi%d: cannot allocate subdevice private data structures\n",
422 dev->minor);
421 return -ENOMEM; 423 return -ENOMEM;
422 } 424 }
423 /* 425 /*
@@ -427,7 +429,8 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
427 * Allocate 1 AI + 1 AO + 2 DIO subdevs (24 lines per DIO) 429 * Allocate 1 AI + 1 AO + 2 DIO subdevs (24 lines per DIO)
428 */ 430 */
429 if (alloc_subdevices(dev, n_subdevs) < 0) { 431 if (alloc_subdevices(dev, n_subdevs) < 0) {
430 printk(KERN_ERR "cannot allocate subdevice data structures\n"); 432 printk(KERN_ERR "comedi%d: cannot allocate subdevice data structures\n",
433 dev->minor);
431 return -ENOMEM; 434 return -ENOMEM;
432 } 435 }
433 436
@@ -557,14 +560,15 @@ static int pcmmio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
557 */ 560 */
558 561
559 if (irq[0]) { 562 if (irq[0]) {
560 printk(KERN_DEBUG "irq: %u ", irq[0]); 563 printk(KERN_DEBUG "comedi%d: irq: %u\n", dev->minor, irq[0]);
561 if (thisboard->dio_num_asics == 2 && irq[1]) 564 if (thisboard->dio_num_asics == 2 && irq[1])
562 printk(KERN_DEBUG "second ASIC irq: %u ", irq[1]); 565 printk(KERN_DEBUG "comedi%d: second ASIC irq: %u\n",
566 dev->minor, irq[1]);
563 } else { 567 } else {
564 printk(KERN_INFO "(IRQ mode disabled) "); 568 printk(KERN_INFO "comedi%d: (IRQ mode disabled)\n", dev->minor);
565 } 569 }
566 570
567 printk(KERN_INFO "attached\n"); 571 printk(KERN_INFO "comedi%d: attached\n", dev->minor);
568 572
569 return 1; 573 return 1;
570} 574}
@@ -663,7 +667,7 @@ static int pcmmio_dio_insn_bits(struct comedi_device *dev,
663 } 667 }
664#ifdef DAMMIT_ITS_BROKEN 668#ifdef DAMMIT_ITS_BROKEN
665 /* DEBUG */ 669 /* DEBUG */
666 printk(KERN_DEBUG "data_out_byte %02x\n", (unsigned)byte); 670 printk("data_out_byte %02x\n", (unsigned)byte);
667#endif 671#endif
668 /* save the digital input lines for this byte.. */ 672 /* save the digital input lines for this byte.. */
669 s->state |= ((unsigned int)byte) << offset; 673 s->state |= ((unsigned int)byte) << offset;
diff --git a/drivers/staging/comedi/drivers/pcmuio.c b/drivers/staging/comedi/drivers/pcmuio.c
index b2c2c8971a32..661ba2e03892 100644
--- a/drivers/staging/comedi/drivers/pcmuio.c
+++ b/drivers/staging/comedi/drivers/pcmuio.c
@@ -295,15 +295,15 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
295 irq[0] = it->options[1]; 295 irq[0] = it->options[1];
296 irq[1] = it->options[2]; 296 irq[1] = it->options[2];
297 297
298 printk("comedi%d: %s: io: %lx ", dev->minor, driver.driver_name, 298 dev_dbg(dev->hw_dev, "comedi%d: %s: io: %lx attached\n", dev->minor,
299 iobase); 299 driver.driver_name, iobase);
300 300
301 dev->iobase = iobase; 301 dev->iobase = iobase;
302 302
303 if (!iobase || !request_region(iobase, 303 if (!iobase || !request_region(iobase,
304 thisboard->num_asics * ASIC_IOSIZE, 304 thisboard->num_asics * ASIC_IOSIZE,
305 driver.driver_name)) { 305 driver.driver_name)) {
306 printk("I/O port conflict\n"); 306 dev_err(dev->hw_dev, "I/O port conflict\n");
307 return -EIO; 307 return -EIO;
308 } 308 }
309 309
@@ -318,7 +318,7 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
318 * convenient macro defined in comedidev.h. 318 * convenient macro defined in comedidev.h.
319 */ 319 */
320 if (alloc_private(dev, sizeof(struct pcmuio_private)) < 0) { 320 if (alloc_private(dev, sizeof(struct pcmuio_private)) < 0) {
321 printk("cannot allocate private data structure\n"); 321 dev_warn(dev->hw_dev, "cannot allocate private data structure\n");
322 return -ENOMEM; 322 return -ENOMEM;
323 } 323 }
324 324
@@ -337,7 +337,7 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
337 kcalloc(n_subdevs, sizeof(struct pcmuio_subdev_private), 337 kcalloc(n_subdevs, sizeof(struct pcmuio_subdev_private),
338 GFP_KERNEL); 338 GFP_KERNEL);
339 if (!devpriv->sprivs) { 339 if (!devpriv->sprivs) {
340 printk("cannot allocate subdevice private data structures\n"); 340 dev_warn(dev->hw_dev, "cannot allocate subdevice private data structures\n");
341 return -ENOMEM; 341 return -ENOMEM;
342 } 342 }
343 /* 343 /*
@@ -348,7 +348,7 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
348 * 96-channel version of the board. 348 * 96-channel version of the board.
349 */ 349 */
350 if (alloc_subdevices(dev, n_subdevs) < 0) { 350 if (alloc_subdevices(dev, n_subdevs) < 0) {
351 printk("cannot allocate subdevice data structures\n"); 351 dev_dbg(dev->hw_dev, "cannot allocate subdevice data structures\n");
352 return -ENOMEM; 352 return -ENOMEM;
353 } 353 }
354 354
@@ -436,14 +436,13 @@ static int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
436 irqs.. */ 436 irqs.. */
437 437
438 if (irq[0]) { 438 if (irq[0]) {
439 printk("irq: %u ", irq[0]); 439 dev_dbg(dev->hw_dev, "irq: %u\n", irq[0]);
440 if (irq[1] && thisboard->num_asics == 2) 440 if (irq[1] && thisboard->num_asics == 2)
441 printk("second ASIC irq: %u ", irq[1]); 441 dev_dbg(dev->hw_dev, "second ASIC irq: %u\n", irq[1]);
442 } else { 442 } else {
443 printk("(IRQ mode disabled) "); 443 dev_dbg(dev->hw_dev, "(IRQ mode disabled)\n");
444 } 444 }
445 445
446 printk("attached\n");
447 446
448 return 1; 447 return 1;
449} 448}
@@ -460,7 +459,8 @@ static int pcmuio_detach(struct comedi_device *dev)
460{ 459{
461 int i; 460 int i;
462 461
463 printk("comedi%d: %s: remove\n", dev->minor, driver.driver_name); 462 dev_dbg(dev->hw_dev, "comedi%d: %s: remove\n", dev->minor,
463 driver.driver_name);
464 if (dev->iobase) 464 if (dev->iobase)
465 release_region(dev->iobase, ASIC_IOSIZE * thisboard->num_asics); 465 release_region(dev->iobase, ASIC_IOSIZE * thisboard->num_asics);
466 466
@@ -501,7 +501,8 @@ static int pcmuio_dio_insn_bits(struct comedi_device *dev,
501 501
502#ifdef DAMMIT_ITS_BROKEN 502#ifdef DAMMIT_ITS_BROKEN
503 /* DEBUG */ 503 /* DEBUG */
504 printk("write mask: %08x data: %08x\n", data[0], data[1]); 504 dev_dbg(dev->hw_dev, "write mask: %08x data: %08x\n", data[0],
505 data[1]);
505#endif 506#endif
506 507
507 s->state = 0; 508 s->state = 0;
@@ -537,7 +538,7 @@ static int pcmuio_dio_insn_bits(struct comedi_device *dev,
537 } 538 }
538#ifdef DAMMIT_ITS_BROKEN 539#ifdef DAMMIT_ITS_BROKEN
539 /* DEBUG */ 540 /* DEBUG */
540 printk("data_out_byte %02x\n", (unsigned)byte); 541 dev_dbg(dev->hw_dev, "data_out_byte %02x\n", (unsigned)byte);
541#endif 542#endif
542 /* save the digital input lines for this byte.. */ 543 /* save the digital input lines for this byte.. */
543 s->state |= ((unsigned int)byte) << offset; 544 s->state |= ((unsigned int)byte) << offset;
@@ -548,7 +549,8 @@ static int pcmuio_dio_insn_bits(struct comedi_device *dev,
548 549
549#ifdef DAMMIT_ITS_BROKEN 550#ifdef DAMMIT_ITS_BROKEN
550 /* DEBUG */ 551 /* DEBUG */
551 printk("s->state %08x data_out %08x\n", s->state, data[1]); 552 dev_dbg(dev->hw_dev, "s->state %08x data_out %08x\n", s->state,
553 data[1]);
552#endif 554#endif
553 555
554 return 2; 556 return 2;
@@ -951,14 +953,13 @@ pcmuio_inttrig_start_intr(struct comedi_device *dev, struct comedi_subdevice *s,
951 953
952 spin_lock_irqsave(&subpriv->intr.spinlock, flags); 954 spin_lock_irqsave(&subpriv->intr.spinlock, flags);
953 s->async->inttrig = 0; 955 s->async->inttrig = 0;
954 if (subpriv->intr.active) { 956 if (subpriv->intr.active)
955 event = pcmuio_start_intr(dev, s); 957 event = pcmuio_start_intr(dev, s);
956 } 958
957 spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 959 spin_unlock_irqrestore(&subpriv->intr.spinlock, flags);
958 960
959 if (event) { 961 if (event)
960 comedi_event(dev, s); 962 comedi_event(dev, s);
961 }
962 963
963 return 1; 964 return 1;
964} 965}
@@ -1000,9 +1001,8 @@ static int pcmuio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1000 } 1001 }
1001 spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 1002 spin_unlock_irqrestore(&subpriv->intr.spinlock, flags);
1002 1003
1003 if (event) { 1004 if (event)
1004 comedi_event(dev, s); 1005 comedi_event(dev, s);
1005 }
1006 1006
1007 return 0; 1007 return 0;
1008} 1008}
diff --git a/drivers/staging/comedi/drivers/serial2002.c b/drivers/staging/comedi/drivers/serial2002.c
index ade2202b6231..d880c2f6fbc1 100644
--- a/drivers/staging/comedi/drivers/serial2002.c
+++ b/drivers/staging/comedi/drivers/serial2002.c
@@ -824,7 +824,7 @@ static int serial2002_attach(struct comedi_device *dev,
824{ 824{
825 struct comedi_subdevice *s; 825 struct comedi_subdevice *s;
826 826
827 printk("comedi%d: serial2002: ", dev->minor); 827 dev_dbg(dev->hw_dev, "comedi%d: attached\n", dev->minor);
828 dev->board_name = thisboard->name; 828 dev->board_name = thisboard->name;
829 if (alloc_private(dev, sizeof(struct serial2002_private)) < 0) 829 if (alloc_private(dev, sizeof(struct serial2002_private)) < 0)
830 return -ENOMEM; 830 return -ENOMEM;
@@ -832,7 +832,8 @@ static int serial2002_attach(struct comedi_device *dev,
832 dev->close = serial_2002_close; 832 dev->close = serial_2002_close;
833 devpriv->port = it->options[0]; 833 devpriv->port = it->options[0];
834 devpriv->speed = it->options[1]; 834 devpriv->speed = it->options[1];
835 printk("/dev/ttyS%d @ %d\n", devpriv->port, devpriv->speed); 835 dev_dbg(dev->hw_dev, "/dev/ttyS%d @ %d\n", devpriv->port,
836 devpriv->speed);
836 837
837 if (alloc_subdevices(dev, 5) < 0) 838 if (alloc_subdevices(dev, 5) < 0)
838 return -ENOMEM; 839 return -ENOMEM;
@@ -891,7 +892,7 @@ static int serial2002_detach(struct comedi_device *dev)
891 struct comedi_subdevice *s; 892 struct comedi_subdevice *s;
892 int i; 893 int i;
893 894
894 printk("comedi%d: serial2002: remove\n", dev->minor); 895 dev_dbg(dev->hw_dev, "comedi%d: remove\n", dev->minor);
895 for (i = 0; i < 5; i++) { 896 for (i = 0; i < 5; i++) {
896 s = &dev->subdevices[i]; 897 s = &dev->subdevices[i];
897 kfree(s->maxdata_list); 898 kfree(s->maxdata_list);
diff --git a/drivers/staging/comedi/drivers/usbduxsigma.c b/drivers/staging/comedi/drivers/usbduxsigma.c
index 6144afb8cbaa..ca6bcf8b0231 100644
--- a/drivers/staging/comedi/drivers/usbduxsigma.c
+++ b/drivers/staging/comedi/drivers/usbduxsigma.c
@@ -1524,15 +1524,17 @@ static int usbdux_ao_inttrig(struct comedi_device *dev,
1524 return -EFAULT; 1524 return -EFAULT;
1525 1525
1526 down(&this_usbduxsub->sem); 1526 down(&this_usbduxsub->sem);
1527
1527 if (!(this_usbduxsub->probed)) { 1528 if (!(this_usbduxsub->probed)) {
1528 up(&this_usbduxsub->sem); 1529 ret = -ENODEV;
1529 return -ENODEV; 1530 goto out;
1530 } 1531 }
1531 if (trignum != 0) { 1532 if (trignum != 0) {
1532 dev_err(&this_usbduxsub->interface->dev, 1533 dev_err(&this_usbduxsub->interface->dev,
1533 "comedi%d: usbdux_ao_inttrig: invalid trignum\n", 1534 "comedi%d: usbdux_ao_inttrig: invalid trignum\n",
1534 dev->minor); 1535 dev->minor);
1535 return -EINVAL; 1536 ret = -EINVAL;
1537 goto out;
1536 } 1538 }
1537 if (!(this_usbduxsub->ao_cmd_running)) { 1539 if (!(this_usbduxsub->ao_cmd_running)) {
1538 this_usbduxsub->ao_cmd_running = 1; 1540 this_usbduxsub->ao_cmd_running = 1;
@@ -1542,8 +1544,7 @@ static int usbdux_ao_inttrig(struct comedi_device *dev,
1542 "comedi%d: usbdux_ao_inttrig: submitURB: " 1544 "comedi%d: usbdux_ao_inttrig: submitURB: "
1543 "err=%d\n", dev->minor, ret); 1545 "err=%d\n", dev->minor, ret);
1544 this_usbduxsub->ao_cmd_running = 0; 1546 this_usbduxsub->ao_cmd_running = 0;
1545 up(&this_usbduxsub->sem); 1547 goto out;
1546 return ret;
1547 } 1548 }
1548 s->async->inttrig = NULL; 1549 s->async->inttrig = NULL;
1549 } else { 1550 } else {
@@ -1551,8 +1552,10 @@ static int usbdux_ao_inttrig(struct comedi_device *dev,
1551 "comedi%d: ao_inttrig but acqu is already running.\n", 1552 "comedi%d: ao_inttrig but acqu is already running.\n",
1552 dev->minor); 1553 dev->minor);
1553 } 1554 }
1555 ret = 1;
1556out:
1554 up(&this_usbduxsub->sem); 1557 up(&this_usbduxsub->sem);
1555 return 1; 1558 return ret;
1556} 1559}
1557 1560
1558static int usbdux_ao_cmdtest(struct comedi_device *dev, 1561static int usbdux_ao_cmdtest(struct comedi_device *dev,
@@ -2689,6 +2692,7 @@ static int usbduxsigma_attach(struct comedi_device *dev,
2689 if (ret < 0) { 2692 if (ret < 0) {
2690 dev_err(&udev->interface->dev, 2693 dev_err(&udev->interface->dev,
2691 "comedi%d: no space for subdev\n", dev->minor); 2694 "comedi%d: no space for subdev\n", dev->minor);
2695 up(&udev->sem);
2692 up(&start_stop_sem); 2696 up(&start_stop_sem);
2693 return ret; 2697 return ret;
2694 } 2698 }
diff --git a/drivers/staging/crystalhd/bc_dts_defs.h b/drivers/staging/crystalhd/bc_dts_defs.h
index fde5b0627f6b..8cd51a7aad8e 100644
--- a/drivers/staging/crystalhd/bc_dts_defs.h
+++ b/drivers/staging/crystalhd/bc_dts_defs.h
@@ -296,43 +296,79 @@ enum {
296 vdecColourPrimariesSMPTE240M, 296 vdecColourPrimariesSMPTE240M,
297 vdecColourPrimariesGenericFilm, 297 vdecColourPrimariesGenericFilm,
298}; 298};
299 299/**
300 * @vdecRESOLUTION_CUSTOM: custom
301 * @vdecRESOLUTION_480i: 480i
302 * @vdecRESOLUTION_1080i: 1080i (1920x1080, 60i)
303 * @vdecRESOLUTION_NTSC: NTSC (720x483, 60i)
304 * @vdecRESOLUTION_480p: 480p (720x480, 60p)
305 * @vdecRESOLUTION_720p: 720p (1280x720, 60p)
306 * @vdecRESOLUTION_PAL1: PAL_1 (720x576, 50i)
307 * @vdecRESOLUTION_1080i25: 1080i25 (1920x1080, 50i)
308 * @vdecRESOLUTION_720p50: 720p50 (1280x720, 50p)
309 * @vdecRESOLUTION_576p: 576p (720x576, 50p)
310 * @vdecRESOLUTION_1080i29_97: 1080i (1920x1080, 59.94i)
311 * @vdecRESOLUTION_720p59_94: 720p (1280x720, 59.94p)
312 * @vdecRESOLUTION_SD_DVD: SD DVD (720x483, 60i)
313 * @vdecRESOLUTION_480p656: 480p (720x480, 60p),
314 * output bus width 8 bit, clock 74.25MHz
315 * @vdecRESOLUTION_1080p23_976: 1080p23_976 (1920x1080, 23.976p)
316 * @vdecRESOLUTION_720p23_976: 720p23_976 (1280x720p, 23.976p)
317 * @vdecRESOLUTION_240p29_97: 240p (1440x240, 29.97p )
318 * @vdecRESOLUTION_240p30: 240p (1440x240, 30p)
319 * @vdecRESOLUTION_288p25: 288p (1440x288p, 25p)
320 * @vdecRESOLUTION_1080p29_97: 1080p29_97 (1920x1080, 29.97p)
321 * @vdecRESOLUTION_1080p30: 1080p30 (1920x1080, 30p)
322 * @vdecRESOLUTION_1080p24: 1080p24 (1920x1080, 24p)
323 * @vdecRESOLUTION_1080p25: 1080p25 (1920x1080, 25p)
324 * @vdecRESOLUTION_720p24: 720p24 (1280x720, 25p)
325 * @vdecRESOLUTION_720p29_97: 720p29.97 (1280x720, 29.97p)
326 * @vdecRESOLUTION_480p23_976: 480p23.976 (720*480, 23.976)
327 * @vdecRESOLUTION_480p29_97: 480p29.976 (720*480, 29.97p)
328 * @vdecRESOLUTION_576p25: 576p25 (720*576, 25p)
329 * @vdecRESOLUTION_480p0: 480p (720x480, 0p)
330 * @vdecRESOLUTION_480i0: 480i (720x480, 0i)
331 * @vdecRESOLUTION_576p0: 576p (720x576, 0p)
332 * @vdecRESOLUTION_720p0: 720p (1280x720, 0p)
333 * @vdecRESOLUTION_1080p0: 1080p (1920x1080, 0p)
334 * @vdecRESOLUTION_1080i0: 1080i (1920x1080, 0i)
335 */
300enum { 336enum {
301 vdecRESOLUTION_CUSTOM = 0x00000000, /* custom */ 337 vdecRESOLUTION_CUSTOM = 0x00000000,
302 vdecRESOLUTION_480i = 0x00000001, /* 480i */ 338 vdecRESOLUTION_480i = 0x00000001,
303 vdecRESOLUTION_1080i = 0x00000002, /* 1080i (1920x1080, 60i) */ 339 vdecRESOLUTION_1080i = 0x00000002,
304 vdecRESOLUTION_NTSC = 0x00000003, /* NTSC (720x483, 60i) */ 340 vdecRESOLUTION_NTSC = 0x00000003,
305 vdecRESOLUTION_480p = 0x00000004, /* 480p (720x480, 60p) */ 341 vdecRESOLUTION_480p = 0x00000004,
306 vdecRESOLUTION_720p = 0x00000005, /* 720p (1280x720, 60p) */ 342 vdecRESOLUTION_720p = 0x00000005,
307 vdecRESOLUTION_PAL1 = 0x00000006, /* PAL_1 (720x576, 50i) */ 343 vdecRESOLUTION_PAL1 = 0x00000006,
308 vdecRESOLUTION_1080i25 = 0x00000007, /* 1080i25 (1920x1080, 50i) */ 344 vdecRESOLUTION_1080i25 = 0x00000007,
309 vdecRESOLUTION_720p50 = 0x00000008, /* 720p50 (1280x720, 50p) */ 345 vdecRESOLUTION_720p50 = 0x00000008,
310 vdecRESOLUTION_576p = 0x00000009, /* 576p (720x576, 50p) */ 346 vdecRESOLUTION_576p = 0x00000009,
311 vdecRESOLUTION_1080i29_97 = 0x0000000A, /* 1080i (1920x1080, 59.94i) */ 347 vdecRESOLUTION_1080i29_97 = 0x0000000A,
312 vdecRESOLUTION_720p59_94 = 0x0000000B, /* 720p (1280x720, 59.94p) */ 348 vdecRESOLUTION_720p59_94 = 0x0000000B,
313 vdecRESOLUTION_SD_DVD = 0x0000000C, /* SD DVD (720x483, 60i) */ 349 vdecRESOLUTION_SD_DVD = 0x0000000C,
314 vdecRESOLUTION_480p656 = 0x0000000D, /* 480p (720x480, 60p), output bus width 8 bit, clock 74.25MHz */ 350 vdecRESOLUTION_480p656 = 0x0000000D,
315 vdecRESOLUTION_1080p23_976 = 0x0000000E, /* 1080p23_976 (1920x1080, 23.976p) */ 351 vdecRESOLUTION_1080p23_976 = 0x0000000E,
316 vdecRESOLUTION_720p23_976 = 0x0000000F, /* 720p23_976 (1280x720p, 23.976p) */ 352 vdecRESOLUTION_720p23_976 = 0x0000000F,
317 vdecRESOLUTION_240p29_97 = 0x00000010, /* 240p (1440x240, 29.97p ) */ 353 vdecRESOLUTION_240p29_97 = 0x00000010,
318 vdecRESOLUTION_240p30 = 0x00000011, /* 240p (1440x240, 30p) */ 354 vdecRESOLUTION_240p30 = 0x00000011,
319 vdecRESOLUTION_288p25 = 0x00000012, /* 288p (1440x288p, 25p) */ 355 vdecRESOLUTION_288p25 = 0x00000012,
320 vdecRESOLUTION_1080p29_97 = 0x00000013, /* 1080p29_97 (1920x1080, 29.97p) */ 356 vdecRESOLUTION_1080p29_97 = 0x00000013,
321 vdecRESOLUTION_1080p30 = 0x00000014, /* 1080p30 (1920x1080, 30p) */ 357 vdecRESOLUTION_1080p30 = 0x00000014,
322 vdecRESOLUTION_1080p24 = 0x00000015, /* 1080p24 (1920x1080, 24p) */ 358 vdecRESOLUTION_1080p24 = 0x00000015,
323 vdecRESOLUTION_1080p25 = 0x00000016, /* 1080p25 (1920x1080, 25p) */ 359 vdecRESOLUTION_1080p25 = 0x00000016,
324 vdecRESOLUTION_720p24 = 0x00000017, /* 720p24 (1280x720, 25p) */ 360 vdecRESOLUTION_720p24 = 0x00000017,
325 vdecRESOLUTION_720p29_97 = 0x00000018, /* 720p29.97 (1280x720, 29.97p) */ 361 vdecRESOLUTION_720p29_97 = 0x00000018,
326 vdecRESOLUTION_480p23_976 = 0x00000019, /* 480p23.976 (720*480, 23.976) */ 362 vdecRESOLUTION_480p23_976 = 0x00000019,
327 vdecRESOLUTION_480p29_97 = 0x0000001A, /* 480p29.976 (720*480, 29.97p) */ 363 vdecRESOLUTION_480p29_97 = 0x0000001A,
328 vdecRESOLUTION_576p25 = 0x0000001B, /* 576p25 (720*576, 25p) */ 364 vdecRESOLUTION_576p25 = 0x0000001B,
329 /* For Zero Frame Rate */ 365 /* For Zero Frame Rate */
330 vdecRESOLUTION_480p0 = 0x0000001C, /* 480p (720x480, 0p) */ 366 vdecRESOLUTION_480p0 = 0x0000001C,
331 vdecRESOLUTION_480i0 = 0x0000001D, /* 480i (720x480, 0i) */ 367 vdecRESOLUTION_480i0 = 0x0000001D,
332 vdecRESOLUTION_576p0 = 0x0000001E, /* 576p (720x576, 0p) */ 368 vdecRESOLUTION_576p0 = 0x0000001E,
333 vdecRESOLUTION_720p0 = 0x0000001F, /* 720p (1280x720, 0p) */ 369 vdecRESOLUTION_720p0 = 0x0000001F,
334 vdecRESOLUTION_1080p0 = 0x00000020, /* 1080p (1920x1080, 0p) */ 370 vdecRESOLUTION_1080p0 = 0x00000020,
335 vdecRESOLUTION_1080i0 = 0x00000021, /* 1080i (1920x1080, 0i) */ 371 vdecRESOLUTION_1080i0 = 0x00000021,
336}; 372};
337 373
338/* Bit definitions for 'flags' field */ 374/* Bit definitions for 'flags' field */
@@ -359,14 +395,23 @@ enum _BC_OUTPUT_FORMAT {
359 MODE422_YUY2 = 0x1, 395 MODE422_YUY2 = 0x1,
360 MODE422_UYVY = 0x2, 396 MODE422_UYVY = 0x2,
361}; 397};
362 398/**
399 * struct BC_PIC_INFO_BLOCK
400 * @timeStam;: Timestamp
401 * @picture_number: Ordinal display number
402 * @width: pixels
403 * @height: pixels
404 * @chroma_format: 0x420, 0x422 or 0x444
405 * @n_drop;: number of non-reference frames
406 * remaining to be dropped
407 */
363struct BC_PIC_INFO_BLOCK { 408struct BC_PIC_INFO_BLOCK {
364 /* Common fields. */ 409 /* Common fields. */
365 uint64_t timeStamp; /* Timestamp */ 410 uint64_t timeStamp;
366 uint32_t picture_number; /* Ordinal display number */ 411 uint32_t picture_number;
367 uint32_t width; /* pixels */ 412 uint32_t width;
368 uint32_t height; /* pixels */ 413 uint32_t height;
369 uint32_t chroma_format; /* 0x420, 0x422 or 0x444 */ 414 uint32_t chroma_format;
370 uint32_t pulldown; 415 uint32_t pulldown;
371 uint32_t flags; 416 uint32_t flags;
372 uint32_t frame_rate; 417 uint32_t frame_rate;
@@ -376,7 +421,8 @@ struct BC_PIC_INFO_BLOCK {
376 uint32_t sess_num; 421 uint32_t sess_num;
377 uint32_t ycom; 422 uint32_t ycom;
378 uint32_t custom_aspect_ratio_width_height; 423 uint32_t custom_aspect_ratio_width_height;
379 uint32_t n_drop; /* number of non-reference frames remaining to be dropped */ 424 uint32_t n_drop; /* number of non-reference frames
425 remaining to be dropped */
380 426
381 /* Protocol-specific extensions. */ 427 /* Protocol-specific extensions. */
382 union { 428 union {
@@ -390,43 +436,71 @@ struct BC_PIC_INFO_BLOCK {
390/*------------------------------------------------------* 436/*------------------------------------------------------*
391 * ProcOut Info * 437 * ProcOut Info *
392 *------------------------------------------------------*/ 438 *------------------------------------------------------*/
393/* Optional flags for ProcOut Interface.*/ 439
440/**
441 * enum POUT_OPTIONAL_IN_FLAGS - Optional flags for ProcOut Interface.
442 * @BC_POUT_FLAGS_YV12: Copy Data in YV12 format
443 * @BC_POUT_FLAGS_STRIDE: Stride size is valid.
444 * @BC_POUT_FLAGS_SIZE: Take size information from Application
445 * @BC_POUT_FLAGS_INTERLACED: copy only half the bytes
446 * @BC_POUT_FLAGS_INTERLEAVED: interleaved frame
447 * @: * @BC_POUT_FLAGS_FMT_CHANGE: Data is not VALID when this flag is set
448 * @BC_POUT_FLAGS_PIB_VALID: PIB Information valid
449 * @BC_POUT_FLAGS_ENCRYPTED: Data is encrypted.
450 * @BC_POUT_FLAGS_FLD_BOT: Bottom Field data
451 */
394enum POUT_OPTIONAL_IN_FLAGS_ { 452enum POUT_OPTIONAL_IN_FLAGS_ {
395 /* Flags from App to Device */ 453 /* Flags from App to Device */
396 BC_POUT_FLAGS_YV12 = 0x01, /* Copy Data in YV12 format */ 454 BC_POUT_FLAGS_YV12 = 0x01,
397 BC_POUT_FLAGS_STRIDE = 0x02, /* Stride size is valid. */ 455 BC_POUT_FLAGS_STRIDE = 0x02,
398 BC_POUT_FLAGS_SIZE = 0x04, /* Take size information from Application */ 456 BC_POUT_FLAGS_SIZE = 0x04,
399 BC_POUT_FLAGS_INTERLACED = 0x08, /* copy only half the bytes */ 457 BC_POUT_FLAGS_INTERLACED = 0x08,
400 BC_POUT_FLAGS_INTERLEAVED = 0x10, /* interleaved frame */ 458 BC_POUT_FLAGS_INTERLEAVED = 0x10,
401 459
402 /* Flags from Device to APP */ 460 /* Flags from Device to APP */
403 BC_POUT_FLAGS_FMT_CHANGE = 0x10000, /* Data is not VALID when this flag is set */ 461 BC_POUT_FLAGS_FMT_CHANGE = 0x10000,
404 BC_POUT_FLAGS_PIB_VALID = 0x20000, /* PIB Information valid */ 462 BC_POUT_FLAGS_PIB_VALID = 0x20000,
405 BC_POUT_FLAGS_ENCRYPTED = 0x40000, /* Data is encrypted. */ 463 BC_POUT_FLAGS_ENCRYPTED = 0x40000,
406 BC_POUT_FLAGS_FLD_BOT = 0x80000, /* Bottom Field data */ 464 BC_POUT_FLAGS_FLD_BOT = 0x80000,
407}; 465};
408 466
409typedef enum BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, void *pOut); 467typedef enum BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width,
468 uint32_t height, uint32_t stride, void *pOut);
410 469
411/* Line 21 Closed Caption */ 470/* Line 21 Closed Caption */
412/* User Data */ 471/* User Data */
413#define MAX_UD_SIZE 1792 /* 1920 - 128 */ 472#define MAX_UD_SIZE 1792 /* 1920 - 128 */
414 473
474/**
475 * struct BC_DTS_PROC_OUT
476 * @Ybuff: Caller Supplied buffer for Y data
477 * @YbuffSz: Caller Supplied Y buffer size
478 * @YBuffDoneSz: Transferred Y datasize
479 * @*UVbuff: Caller Supplied buffer for UV data
480 * @UVbuffSz: Caller Supplied UV buffer size
481 * @UVBuffDoneSz: Transferred UV data size
482 * @StrideSz: Caller supplied Stride Size
483 * @PoutFlags: Call IN Flags
484 * @discCnt: Picture discontinuity count
485 * @PicInfo: Picture Information Block Data
486 * @b422Mode: Picture output Mode
487 * @bPibEnc: PIB encrypted
488 */
415struct BC_DTS_PROC_OUT { 489struct BC_DTS_PROC_OUT {
416 uint8_t *Ybuff; /* Caller Supplied buffer for Y data */ 490 uint8_t *Ybuff;
417 uint32_t YbuffSz; /* Caller Supplied Y buffer size */ 491 uint32_t YbuffSz;
418 uint32_t YBuffDoneSz; /* Transferred Y datasize */ 492 uint32_t YBuffDoneSz;
419 493
420 uint8_t *UVbuff; /* Caller Supplied buffer for UV data */ 494 uint8_t *UVbuff;
421 uint32_t UVbuffSz; /* Caller Supplied UV buffer size */ 495 uint32_t UVbuffSz;
422 uint32_t UVBuffDoneSz; /* Transferred UV data size */ 496 uint32_t UVBuffDoneSz;
423 497
424 uint32_t StrideSz; /* Caller supplied Stride Size */ 498 uint32_t StrideSz;
425 uint32_t PoutFlags; /* Call IN Flags */ 499 uint32_t PoutFlags;
426 500
427 uint32_t discCnt; /* Picture discontinuity count */ 501 uint32_t discCnt;
428 502
429 struct BC_PIC_INFO_BLOCK PicInfo; /* Picture Information Block Data */ 503 struct BC_PIC_INFO_BLOCK PicInfo;
430 504
431 /* Line 21 Closed Caption */ 505 /* Line 21 Closed Caption */
432 /* User Data */ 506 /* User Data */
@@ -436,39 +510,47 @@ struct BC_DTS_PROC_OUT {
436 void *hnd; 510 void *hnd;
437 dts_pout_callback AppCallBack; 511 dts_pout_callback AppCallBack;
438 uint8_t DropFrames; 512 uint8_t DropFrames;
439 uint8_t b422Mode; /* Picture output Mode */ 513 uint8_t b422Mode;
440 uint8_t bPibEnc; /* PIB encrypted */ 514 uint8_t bPibEnc;
441 uint8_t bRevertScramble; 515 uint8_t bRevertScramble;
442 516
443}; 517};
444 518/**
519 * struct BC_DTS_STATUS
520 * @ReadyListCount: Number of frames in ready list (reported by driver)
521 * @PowerStateChange: Number of active state power
522 * transitions (reported by driver)
523 * @FramesDropped: Number of frames dropped. (reported by DIL)
524 * @FramesCaptured: Number of frames captured. (reported by DIL)
525 * @FramesRepeated: Number of frames repeated. (reported by DIL)
526 * @InputCount: Times compressed video has been sent to the HW.
527 * i.e. Successful DtsProcInput() calls (reported by DIL)
528 * @InputTotalSize: Amount of compressed video that has been sent to the HW.
529 * (reported by DIL)
530 * @InputBusyCount: Times compressed video has attempted to be sent to the HW
531 * but the input FIFO was full. (reported by DIL)
532 * @PIBMissCount: Amount of times a PIB is invalid. (reported by DIL)
533 * @cpbEmptySize: supported only for H.264, specifically changed for
534 * Adobe. Report size of CPB buffer available. (reported by DIL)
535 * @NextTimeStamp: TimeStamp of the next picture that will be returned
536 * by a call to ProcOutput. Added for Adobe. Reported
537 * back from the driver
538 */
445struct BC_DTS_STATUS { 539struct BC_DTS_STATUS {
446 uint8_t ReadyListCount; /* Number of frames in ready list (reported by driver) */ 540 uint8_t ReadyListCount;
447 uint8_t FreeListCount; /* Number of frame buffers free. (reported by driver) */ 541 uint8_t FreeListCount;
448 uint8_t PowerStateChange; /* Number of active state power transitions (reported by driver) */ 542 uint8_t PowerStateChange;
449 uint8_t reserved_[1]; 543 uint8_t reserved_[1];
450 544 uint32_t FramesDropped;
451 uint32_t FramesDropped; /* Number of frames dropped. (reported by DIL) */ 545 uint32_t FramesCaptured;
452 uint32_t FramesCaptured; /* Number of frames captured. (reported by DIL) */ 546 uint32_t FramesRepeated;
453 uint32_t FramesRepeated; /* Number of frames repeated. (reported by DIL) */ 547 uint32_t InputCount;
454 548 uint64_t InputTotalSize;
455 uint32_t InputCount; /* Times compressed video has been sent to the HW. 549 uint32_t InputBusyCount;
456 * i.e. Successful DtsProcInput() calls (reported by DIL) */ 550 uint32_t PIBMissCount;
457 uint64_t InputTotalSize; /* Amount of compressed video that has been sent to the HW. 551 uint32_t cpbEmptySize;
458 * (reported by DIL) */ 552 uint64_t NextTimeStamp;
459 uint32_t InputBusyCount; /* Times compressed video has attempted to be sent to the HW
460 * but the input FIFO was full. (reported by DIL) */
461
462 uint32_t PIBMissCount; /* Amount of times a PIB is invalid. (reported by DIL) */
463
464 uint32_t cpbEmptySize; /* supported only for H.264, specifically changed for
465 * Adobe. Report size of CPB buffer available.
466 * Reported by DIL */
467 uint64_t NextTimeStamp; /* TimeStamp of the next picture that will be returned
468 * by a call to ProcOutput. Added for Adobe. Reported
469 * back from the driver */
470 uint8_t reserved__[16]; 553 uint8_t reserved__[16];
471
472}; 554};
473 555
474#define BC_SWAP32(_v) \ 556#define BC_SWAP32(_v) \
diff --git a/drivers/staging/cxt1e1/comet.h b/drivers/staging/cxt1e1/comet.h
index 5cb3afda0112..e06da4a6f6f6 100644
--- a/drivers/staging/cxt1e1/comet.h
+++ b/drivers/staging/cxt1e1/comet.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: comet.h,v 1.3 2005/09/28 00:10:07 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_COMET_H_ 1#ifndef _INC_COMET_H_
6#define _INC_COMET_H_ 2#define _INC_COMET_H_
7 3
@@ -23,27 +19,9 @@
23 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.3 $
28 * Last changed on $Date: 2005/09/28 00:10:07 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: comet.h,v $
32 * Revision 1.3 2005/09/28 00:10:07 rickd
33 * Add RCS header. Switch to structure usage.
34 *
35 * Revision 1.2 2005/04/28 23:43:03 rickd
36 * Add RCS tracking heading.
37 *
38 *-----------------------------------------------------------------------------
39 */ 22 */
40 23
41#if defined(__FreeBSD__) || defined (__NetBSD__)
42#include <sys/types.h>
43#else
44#include <linux/types.h> 24#include <linux/types.h>
45#endif
46
47 25
48#define VINT32 volatile u_int32_t 26#define VINT32 volatile u_int32_t
49 27
diff --git a/drivers/staging/cxt1e1/comet_tables.c b/drivers/staging/cxt1e1/comet_tables.c
index db1293c71a6d..84931117da35 100644
--- a/drivers/staging/cxt1e1/comet_tables.c
+++ b/drivers/staging/cxt1e1/comet_tables.c
@@ -1,7 +1,3 @@
1/*
2 * $Id: comet_tables.c,v 1.2 2005/10/17 23:55:27 rickd PMCC4_3_1B $
3 */
4
5/*----------------------------------------------------------------------------- 1/*-----------------------------------------------------------------------------
6 * comet_tables.c - waveform tables for the PM4351 'COMET' 2 * comet_tables.c - waveform tables for the PM4351 'COMET'
7 * 3 *
@@ -20,28 +16,8 @@
20 * For further information, contact via email: support@sbei.com 16 * For further information, contact via email: support@sbei.com
21 * SBE, Inc. San Ramon, California U.S.A. 17 * SBE, Inc. San Ramon, California U.S.A.
22 *----------------------------------------------------------------------------- 18 *-----------------------------------------------------------------------------
23 * RCS info:
24 * RCS revision: $Revision: 1.2 $
25 * Last changed on $Date: 2005/10/17 23:55:27 $
26 * Changed by $Author: rickd $
27 *-----------------------------------------------------------------------------
28 * $Log: comet_tables.c,v $
29 * Revision 1.2 2005/10/17 23:55:27 rickd
30 * Note that 75 Ohm transmit waveform is not supported on PMCC4.
31 *
32 * Revision 1.1 2005/09/28 00:10:05 rickd
33 * Cosmetic alignment of tables for readability.
34 *
35 * Revision 1.0 2005/05/10 22:47:53 rickd
36 * Initial revision
37 *
38 *-----------------------------------------------------------------------------
39 */ 19 */
40 20
41char SBEid_pmcc4_comet_tblc[] =
42 "@(#)comet_tables.c - $Revision: 1.2 $ (c) Copyright 2004-2005 SBE, Inc.";
43
44
45#include <linux/types.h> 21#include <linux/types.h>
46 22
47/***************************************************************************** 23/*****************************************************************************
diff --git a/drivers/staging/cxt1e1/comet_tables.h b/drivers/staging/cxt1e1/comet_tables.h
index 80424a26a169..3e2e5badf787 100644
--- a/drivers/staging/cxt1e1/comet_tables.h
+++ b/drivers/staging/cxt1e1/comet_tables.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: comet_tables.h,v 1.5 2006/01/02 22:37:31 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_COMET_TBLS_H_ 1#ifndef _INC_COMET_TBLS_H_
6#define _INC_COMET_TBLS_H_ 2#define _INC_COMET_TBLS_H_
7 3
@@ -23,26 +19,6 @@
23 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.5 $
28 * Last changed on $Date: 2006/01/02 22:37:31 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: comet_tables.h,v $
32 * Revision 1.5 2006/01/02 22:37:31 rickd
33 * Double indexed arrays need sizings to avoid CC errors under
34 * gcc 4.0.0
35 *
36 * Revision 1.4 2005/10/17 23:55:28 rickd
37 * The 75 Ohm transmit waveform is not supported on PMCC4.
38 *
39 * Revision 1.3 2005/09/28 00:10:08 rickd
40 * Add GNU License info. Structures moved to -C- file.
41 *
42 * Revision 1.2 2005/04/28 23:43:04 rickd
43 * Add RCS tracking heading.
44 *
45 *-----------------------------------------------------------------------------
46 */ 22 */
47 23
48 24
diff --git a/drivers/staging/cxt1e1/libsbew.h b/drivers/staging/cxt1e1/libsbew.h
index ae8f06d05bed..4254c0426db9 100644
--- a/drivers/staging/cxt1e1/libsbew.h
+++ b/drivers/staging/cxt1e1/libsbew.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: libsbew.h,v 2.1 2005/10/27 18:54:19 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_LIBSBEW_H_ 1#ifndef _INC_LIBSBEW_H_
6#define _INC_LIBSBEW_H_ 2#define _INC_LIBSBEW_H_
7 3
@@ -25,32 +21,8 @@
25 * For further information, contact via email: support@sbei.com 21 * For further information, contact via email: support@sbei.com
26 * SBE, Inc. San Ramon, California U.S.A. 22 * SBE, Inc. San Ramon, California U.S.A.
27 *----------------------------------------------------------------------------- 23 *-----------------------------------------------------------------------------
28 * RCS info:
29 * RCS revision: $Revision: 2.1 $
30 * Last changed on $Date: 2005/10/27 18:54:19 $
31 * Changed by $Author: rickd $
32 *-----------------------------------------------------------------------------
33 * $Log: libsbew.h,v $
34 * Revision 2.1 2005/10/27 18:54:19 rickd
35 * Add E1PLAIN support.
36 *
37 * Revision 2.0 2005/09/28 00:10:08 rickd
38 * Customized for PMCC4 comet-per-port design.
39 *
40 * Revision 1.15 2005/03/29 00:51:31 rickd
41 * File imported from C1T3 port, Revision 1.15
42 *-----------------------------------------------------------------------------
43 */ 24 */
44 25
45#ifndef __KERNEL__
46#include <sys/types.h>
47#endif
48
49#ifdef __cplusplus
50extern "C"
51{
52#endif
53
54/********************************/ 26/********************************/
55/** set driver logging level **/ 27/** set driver logging level **/
56/********************************/ 28/********************************/
@@ -574,8 +546,4 @@ struct sbecom_port_param
574 extern int wancfg_set_tsioc (wcfg_t *, struct wanc1t3_ts_param *); 546 extern int wancfg_set_tsioc (wcfg_t *, struct wanc1t3_ts_param *);
575#endif 547#endif
576 548
577#ifdef __cplusplus
578}
579#endif
580
581#endif /*** _INC_LIBSBEW_H_ ***/ 549#endif /*** _INC_LIBSBEW_H_ ***/
diff --git a/drivers/staging/cxt1e1/musycc.c b/drivers/staging/cxt1e1/musycc.c
index 5cc3423a6646..90c0f1e30f65 100644
--- a/drivers/staging/cxt1e1/musycc.c
+++ b/drivers/staging/cxt1e1/musycc.c
@@ -1,7 +1,3 @@
1/*
2 * $Id: musycc.c,v 2.1 2007/08/15 23:32:17 rickd PMCC4_3_1B $
3 */
4
5unsigned int max_intcnt = 0; 1unsigned int max_intcnt = 0;
6unsigned int max_bh = 0; 2unsigned int max_bh = 0;
7 3
@@ -24,53 +20,8 @@ unsigned int max_bh = 0;
24 * For further information, contact via email: support@onestopsystems.com 20 * For further information, contact via email: support@onestopsystems.com
25 * One Stop Systems, Inc. Escondido, California U.S.A. 21 * One Stop Systems, Inc. Escondido, California U.S.A.
26 *----------------------------------------------------------------------------- 22 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 2.1 $
29 * Last changed on $Date: 2007/08/15 23:32:17 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: musycc.c,v $
33 * Revision 2.1 2007/08/15 23:32:17 rickd
34 * Use 'if 0' instead of GNU comment delimeter to avoid line wrap induced compiler errors.
35 *
36 * Revision 2.0 2007/08/15 22:13:20 rickd
37 * Update to printf pointer %p usage and correct some UINT to ULONG for
38 * 64bit comptibility.
39 *
40 * Revision 1.7 2006/04/21 00:56:40 rickd
41 * workqueue files now prefixed with <sbecom> prefix.
42 *
43 * Revision 1.6 2005/10/27 18:54:19 rickd
44 * Clean out old code. Default to HDLC_FCS16, not TRANS.
45 *
46 * Revision 1.5 2005/10/17 23:55:28 rickd
47 * Initial port of NCOMM support patches from original work found
48 * in pmc_c4t1e1 as updated by NCOMM. Ref: CONFIG_SBE_PMCC4_NCOMM.
49 *
50 * Revision 1.4 2005/10/13 20:35:25 rickd
51 * Cleanup warning for unused <flags> variable.
52 *
53 * Revision 1.3 2005/10/13 19:19:22 rickd
54 * Disable redundant driver removal cleanup code.
55 *
56 * Revision 1.2 2005/10/11 18:36:16 rickd
57 * Clean up warning messages caused by de-implemented some <flags> associated
58 * with spin_lock() removals.
59 *
60 * Revision 1.1 2005/10/05 00:45:28 rickd
61 * Re-enable xmit on flow-controlled and full channel to fix restart hang.
62 * Add some temp spin-lock debug code (rld_spin_owner).
63 *
64 * Revision 1.0 2005/09/28 00:10:06 rickd
65 * Initial release for C4T1E1 support. Lots of transparent
66 * mode updates.
67 *
68 *-----------------------------------------------------------------------------
69 */ 23 */
70 24
71char SBEid_pmcc4_musyccc[] =
72"@(#)musycc.c - $Revision: 2.1 $ (c) Copyright 2004-2006 SBE, Inc.";
73
74#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 25#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
75 26
76#include <linux/types.h> 27#include <linux/types.h>
diff --git a/drivers/staging/cxt1e1/musycc.h b/drivers/staging/cxt1e1/musycc.h
index 68f3660f4477..cf6b54e15689 100644
--- a/drivers/staging/cxt1e1/musycc.h
+++ b/drivers/staging/cxt1e1/musycc.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: musycc.h,v 1.3 2005/09/28 00:10:08 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_MUSYCC_H_ 1#ifndef _INC_MUSYCC_H_
6#define _INC_MUSYCC_H_ 2#define _INC_MUSYCC_H_
7 3
@@ -24,36 +20,13 @@
24 * For further information, contact via email: support@sbei.com 20 * For further information, contact via email: support@sbei.com
25 * SBE, Inc. San Ramon, California U.S.A. 21 * SBE, Inc. San Ramon, California U.S.A.
26 *----------------------------------------------------------------------------- 22 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.3 $
29 * Last changed on $Date: 2005/09/28 00:10:08 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: musycc.h,v $
33 * Revision 1.3 2005/09/28 00:10:08 rickd
34 * Add GNU license info. Add PMCC4 PCI/DevIDs. Implement new
35 * musycc reg&bits namings. Use PORTMAP_0 GCD grouping.
36 *
37 * Revision 1.2 2005/04/28 23:43:04 rickd
38 * Add RCS tracking heading.
39 *
40 *-----------------------------------------------------------------------------
41 */ 23 */
42 24
43#if defined (__FreeBSD__) || defined (__NetBSD__)
44#include <sys/types.h>
45#else
46#include <linux/types.h> 25#include <linux/types.h>
47#endif
48 26
49#define VINT8 volatile u_int8_t 27#define VINT8 volatile u_int8_t
50#define VINT32 volatile u_int32_t 28#define VINT32 volatile u_int32_t
51 29
52#ifdef __cplusplus
53extern "C"
54{
55#endif
56
57#include "pmcc4_defs.h" 30#include "pmcc4_defs.h"
58 31
59 32
@@ -448,10 +421,6 @@ extern "C"
448/* This must be defined on an entire channel group (Port) basis */ 421/* This must be defined on an entire channel group (Port) basis */
449#define SUERM_THRESHOLD 0x1f 422#define SUERM_THRESHOLD 0x1f
450 423
451#ifdef __cplusplus
452}
453#endif
454
455#undef VINT32 424#undef VINT32
456#undef VINT8 425#undef VINT8
457 426
diff --git a/drivers/staging/cxt1e1/ossiRelease.c b/drivers/staging/cxt1e1/ossiRelease.c
index a56029866c2d..f17a902e95e3 100644
--- a/drivers/staging/cxt1e1/ossiRelease.c
+++ b/drivers/staging/cxt1e1/ossiRelease.c
@@ -1,7 +1,3 @@
1/*
2 * $Id: ossiRelease.c,v 1.2 2008/05/08 20:14:03 rdobbs PMCC4_3_1B $
3 */
4
5/*----------------------------------------------------------------------------- 1/*-----------------------------------------------------------------------------
6 * ossiRelease.c - 2 * ossiRelease.c -
7 * 3 *
@@ -26,14 +22,8 @@
26 * One Stop Systems, Inc. Escondido, California U.S.A. 22 * One Stop Systems, Inc. Escondido, California U.S.A.
27 * 23 *
28 *----------------------------------------------------------------------------- 24 *-----------------------------------------------------------------------------
29 * RCS info:
30 * RCS revision: $Revision: 1.2 $
31 * Last changed on $Date: 2008/05/08 20:14:03 $
32 * Changed by $Author: rdobbs $
33 *-----------------------------------------------------------------------------
34 */ 25 */
35 26
36
37char pmcc4_OSSI_release[] = "$Release: PMCC4_3_1B, Copyright (c) 2008 One Stop Systems$"; 27char pmcc4_OSSI_release[] = "$Release: PMCC4_3_1B, Copyright (c) 2008 One Stop Systems$";
38 28
39/*** End-of-File ***/ 29/*** End-of-File ***/
diff --git a/drivers/staging/cxt1e1/pmc93x6_eeprom.h b/drivers/staging/cxt1e1/pmc93x6_eeprom.h
index c3ada87efd26..96c48cb83260 100644
--- a/drivers/staging/cxt1e1/pmc93x6_eeprom.h
+++ b/drivers/staging/cxt1e1/pmc93x6_eeprom.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: pmc93x6_eeprom.h,v 1.1 2005/09/28 00:10:08 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMC93X6_EEPROM_H_ 1#ifndef _INC_PMC93X6_EEPROM_H_
6#define _INC_PMC93X6_EEPROM_H_ 2#define _INC_PMC93X6_EEPROM_H_
7 3
@@ -23,26 +19,9 @@
23 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
26 * RCS info:
27 *-----------------------------------------------------------------------------
28 * $Log: pmc93x6_eeprom.h,v $
29 * Revision 1.1 2005/09/28 00:10:08 rickd
30 * pmc_verify_cksum return value is char.
31 *
32 * Revision 1.0 2005/05/04 17:20:51 rickd
33 * Initial revision
34 *
35 * Revision 1.0 2005/04/22 23:48:48 rickd
36 * Initial revision
37 *
38 *-----------------------------------------------------------------------------
39 */ 22 */
40 23
41#if defined (__FreeBSD__) || defined (__NetBSD__)
42#include <sys/types.h>
43#else
44#include <linux/types.h> 24#include <linux/types.h>
45#endif
46 25
47#ifdef __KERNEL__ 26#ifdef __KERNEL__
48 27
diff --git a/drivers/staging/cxt1e1/pmcc4.h b/drivers/staging/cxt1e1/pmcc4.h
index e046b87763a2..b0ed4ad13011 100644
--- a/drivers/staging/cxt1e1/pmcc4.h
+++ b/drivers/staging/cxt1e1/pmcc4.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: pmcc4.h,v 1.4 2005/11/01 19:24:48 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMCC4_H_ 1#ifndef _INC_PMCC4_H_
6#define _INC_PMCC4_H_ 2#define _INC_PMCC4_H_
7 3
@@ -23,49 +19,15 @@
23 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.4 $
28 * Last changed on $Date: 2005/11/01 19:24:48 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: pmcc4.h,v $
32 * Revision 1.4 2005/11/01 19:24:48 rickd
33 * Remove de-implement function prototypes. Several <int> to
34 * <status_t> changes for consistent usage of same.
35 *
36 * Revision 1.3 2005/09/28 00:10:08 rickd
37 * Add GNU license info. Use config params from libsbew.h
38 *
39 * Revision 1.2 2005/04/28 23:43:03 rickd
40 * Add RCS tracking heading.
41 *
42 *-----------------------------------------------------------------------------
43 */ 22 */
44 23
45
46#if defined(__FreeBSD__) || defined(__NetBSD__)
47#include <sys/types.h>
48#else
49#ifndef __KERNEL__
50#include <sys/types.h>
51#else
52#include <linux/types.h> 24#include <linux/types.h>
53#endif
54#endif
55
56
57 25
58typedef int status_t; 26typedef int status_t;
59 27
60#define SBE_DRVR_FAIL 0 28#define SBE_DRVR_FAIL 0
61#define SBE_DRVR_SUCCESS 1 29#define SBE_DRVR_SUCCESS 1
62 30
63#ifdef __cplusplus
64extern "C"
65{
66#endif
67
68
69/********************/ 31/********************/
70/* PMCC4 memory Map */ 32/* PMCC4 memory Map */
71/********************/ 33/********************/
@@ -105,10 +67,6 @@ extern "C"
105#define sbeE1errSMF 0x02 67#define sbeE1errSMF 0x02
106#define sbeE1CRC 0x01 68#define sbeE1CRC 0x01
107 69
108#ifdef __cplusplus
109}
110#endif
111
112#ifdef __KERNEL__ 70#ifdef __KERNEL__
113 71
114/* 72/*
diff --git a/drivers/staging/cxt1e1/pmcc4_cpld.h b/drivers/staging/cxt1e1/pmcc4_cpld.h
index 6d8f0337aa3e..a51209bc5274 100644
--- a/drivers/staging/cxt1e1/pmcc4_cpld.h
+++ b/drivers/staging/cxt1e1/pmcc4_cpld.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: pmcc4_cpld.h,v 1.0 2005/09/28 00:10:08 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMCC4_CPLD_H_ 1#ifndef _INC_PMCC4_CPLD_H_
6#define _INC_PMCC4_CPLD_H_ 2#define _INC_PMCC4_CPLD_H_
7 3
@@ -23,34 +19,9 @@
23 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.0 $
28 * Last changed on $Date: 2005/09/28 00:10:08 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: pmcc4_cpld.h,v $
32 * Revision 1.0 2005/09/28 00:10:08 rickd
33 * Initial revision
34 *
35 *-----------------------------------------------------------------------------
36 */ 22 */
37 23
38
39#if defined(__FreeBSD__) || defined(__NetBSD__)
40#include <sys/types.h>
41#else
42#ifndef __KERNEL__
43#include <sys/types.h>
44#else
45#include <linux/types.h> 24#include <linux/types.h>
46#endif
47#endif
48
49#ifdef __cplusplus
50extern "C"
51{
52#endif
53
54 25
55/********************************/ 26/********************************/
56/* iSPLD control chip registers */ 27/* iSPLD control chip registers */
@@ -117,8 +88,4 @@ extern "C"
117#define PMCC4_CPLD_INTR_CMT_3 0x04 88#define PMCC4_CPLD_INTR_CMT_3 0x04
118#define PMCC4_CPLD_INTR_CMT_4 0x08 89#define PMCC4_CPLD_INTR_CMT_4 0x08
119 90
120#ifdef __cplusplus
121}
122#endif
123
124#endif /* _INC_PMCC4_CPLD_H_ */ 91#endif /* _INC_PMCC4_CPLD_H_ */
diff --git a/drivers/staging/cxt1e1/pmcc4_defs.h b/drivers/staging/cxt1e1/pmcc4_defs.h
index a39505f45c29..83ceae4324b2 100644
--- a/drivers/staging/cxt1e1/pmcc4_defs.h
+++ b/drivers/staging/cxt1e1/pmcc4_defs.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: pmcc4_defs.h,v 1.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_PMCC4_DEFS_H_ 1#ifndef _INC_PMCC4_DEFS_H_
6#define _INC_PMCC4_DEFS_H_ 2#define _INC_PMCC4_DEFS_H_
7 3
@@ -25,16 +21,6 @@
25 * For further information, contact via email: support@sbei.com 21 * For further information, contact via email: support@sbei.com
26 * SBE, Inc. San Ramon, California U.S.A. 22 * SBE, Inc. San Ramon, California U.S.A.
27 *----------------------------------------------------------------------------- 23 *-----------------------------------------------------------------------------
28 * RCS info:
29 * RCS revision: $Revision: 1.0 $
30 * Last changed on $Date: 2005/09/28 00:10:09 $
31 * Changed by $Author: rickd $
32 *-----------------------------------------------------------------------------
33 * $Log: pmcc4_defs.h,v $
34 * Revision 1.0 2005/09/28 00:10:09 rickd
35 * Initial revision
36 *
37 *-----------------------------------------------------------------------------
38 */ 24 */
39 25
40 26
diff --git a/drivers/staging/cxt1e1/pmcc4_drv.c b/drivers/staging/cxt1e1/pmcc4_drv.c
index e1f07fabd22d..8a7b3a646451 100644
--- a/drivers/staging/cxt1e1/pmcc4_drv.c
+++ b/drivers/staging/cxt1e1/pmcc4_drv.c
@@ -1,8 +1,3 @@
1/*
2 * $Id: pmcc4_drv.c,v 3.1 2007/08/15 23:32:17 rickd PMCC4_3_1B $
3 */
4
5
6/*----------------------------------------------------------------------------- 1/*-----------------------------------------------------------------------------
7 * pmcc4_drv.c - 2 * pmcc4_drv.c -
8 * 3 *
@@ -22,74 +17,10 @@
22 * For further information, contact via email: support@onestopsystems.com 17 * For further information, contact via email: support@onestopsystems.com
23 * One Stop Systems, Inc. Escondido, California U.S.A. 18 * One Stop Systems, Inc. Escondido, California U.S.A.
24 *----------------------------------------------------------------------------- 19 *-----------------------------------------------------------------------------
25 * RCS info:
26 * RCS revision: $Revision: 3.1 $
27 * Last changed on $Date: 2007/08/15 23:32:17 $
28 * Changed by $Author: rickd $
29 *-----------------------------------------------------------------------------
30 * $Log: pmcc4_drv.c,v $
31 * Revision 3.1 2007/08/15 23:32:17 rickd
32 * Use 'if 0' instead of GNU comment delimeter to avoid line wrap induced compiler errors.
33 *
34 * Revision 3.0 2007/08/15 22:19:55 rickd
35 * Correct sizeof() castings and pi->regram to support 64bit compatibility.
36 *
37 * Revision 2.10 2006/04/21 00:56:40 rickd
38 * workqueue files now prefixed with <sbecom> prefix.
39 *
40 * Revision 2.9 2005/11/01 19:22:49 rickd
41 * Add sanity checks against max_port for ioctl functions.
42 *
43 * Revision 2.8 2005/10/27 18:59:25 rickd
44 * Code cleanup. Default channel config to HDLC_FCS16.
45 *
46 * Revision 2.7 2005/10/18 18:16:30 rickd
47 * Further NCOMM code repairs - (1) interrupt matrix usage inconsistent
48 * for indexing into nciInterrupt[][], code missing double parameters.
49 * (2) check input of ncomm interrupt registration cardID for correct
50 * boundary values.
51 *
52 * Revision 2.6 2005/10/17 23:55:28 rickd
53 * Initial port of NCOMM support patches from original work found
54 * in pmc_c4t1e1 as updated by NCOMM. Ref: CONFIG_SBE_PMCC4_NCOMM.
55 * Corrected NCOMMs wanpmcC4T1E1_getBaseAddress() to correctly handle
56 * multiple boards.
57 *
58 * Revision 2.5 2005/10/13 23:01:28 rickd
59 * Correct panic for illegal address reference w/in get_brdinfo on
60 * first_if/last_if name acquistion under Linux 2.6
61 *
62 * Revision 2.4 2005/10/13 21:20:19 rickd
63 * Correction of c4_cleanup() wherein next should be acquired before
64 * ci_t structure is free'd.
65 *
66 * Revision 2.3 2005/10/13 19:20:10 rickd
67 * Correct driver removal cleanup code for multiple boards.
68 *
69 * Revision 2.2 2005/10/11 18:34:04 rickd
70 * New routine added to determine number of ports (comets) on board.
71 *
72 * Revision 2.1 2005/10/05 00:48:13 rickd
73 * Add some RX activation trace code.
74 *
75 * Revision 2.0 2005/09/28 00:10:06 rickd
76 * Implement 2.6 workqueue for TX/RX restart. Correction to
77 * hardware register boundary checks allows expanded access of MUSYCC.
78 * Implement new musycc reg&bits namings.
79 *
80 *-----------------------------------------------------------------------------
81 */ 20 */
82 21
83char OSSIid_pmcc4_drvc[] =
84"@(#)pmcc4_drv.c - $Revision: 3.1 $ (c) Copyright 2002-2007 One Stop Systems, Inc.";
85
86#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
87 23
88#if defined (__FreeBSD__) || defined (__NetBSD__)
89#include <sys/param.h>
90#include <sys/systm.h>
91#include <sys/errno.h>
92#else
93#include <linux/types.h> 24#include <linux/types.h>
94#include "pmcc4_sysdep.h" 25#include "pmcc4_sysdep.h"
95#include <linux/errno.h> 26#include <linux/errno.h>
@@ -98,7 +29,6 @@ char OSSIid_pmcc4_drvc[] =
98#include <linux/timer.h> /* include for timer */ 29#include <linux/timer.h> /* include for timer */
99#include <linux/hdlc.h> 30#include <linux/hdlc.h>
100#include <asm/io.h> 31#include <asm/io.h>
101#endif
102 32
103#include "sbecom_inline_linux.h" 33#include "sbecom_inline_linux.h"
104#include "libsbew.h" 34#include "libsbew.h"
diff --git a/drivers/staging/cxt1e1/pmcc4_ioctls.h b/drivers/staging/cxt1e1/pmcc4_ioctls.h
index 6b8d65673c78..56a1ee39be18 100644
--- a/drivers/staging/cxt1e1/pmcc4_ioctls.h
+++ b/drivers/staging/cxt1e1/pmcc4_ioctls.h
@@ -1,6 +1,3 @@
1/* RCSid: $Header: /home/rickd/projects/pmcc4/include/pmcc4_ioctls.h,v 2.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $
2 */
3
4#ifndef _INC_PMCC4_IOCTLS_H_ 1#ifndef _INC_PMCC4_IOCTLS_H_
5#define _INC_PMCC4_IOCTLS_H_ 2#define _INC_PMCC4_IOCTLS_H_
6 3
@@ -22,19 +19,6 @@
22 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
23 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
24 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
25 * RCS info:
26 * RCS revision: $Revision: 2.0 $
27 * Last changed on $Date: 2005/09/28 00:10:09 $
28 * Changed by $Author: rickd $
29 *-----------------------------------------------------------------------------
30 * $Log: pmcc4_ioctls.h,v $
31 * Revision 2.0 2005/09/28 00:10:09 rickd
32 * Add GNU license info. Switch Ioctls to sbe_ioc.h usage.
33 *
34 * Revision 1.2 2005/04/28 23:43:03 rickd
35 * Add RCS tracking heading.
36 *
37 *-----------------------------------------------------------------------------
38 */ 22 */
39 23
40#include "sbew_ioc.h" 24#include "sbew_ioc.h"
diff --git a/drivers/staging/cxt1e1/sbe_bid.h b/drivers/staging/cxt1e1/sbe_bid.h
index 1f49b4061fb7..abc2e55f62fc 100644
--- a/drivers/staging/cxt1e1/sbe_bid.h
+++ b/drivers/staging/cxt1e1/sbe_bid.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: sbe_bid.h,v 1.0 2005/09/28 00:10:09 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBEBID_H_ 1#ifndef _INC_SBEBID_H_
6#define _INC_SBEBID_H_ 2#define _INC_SBEBID_H_
7 3
@@ -24,16 +20,6 @@
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 * 21 *
26 *----------------------------------------------------------------------------- 22 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.0 $
29 * Last changed on $Date: 2005/09/28 00:10:09 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbe_bid.h,v $
33 * Revision 1.0 2005/09/28 00:10:09 rickd
34 * Initial revision
35 *
36 *-----------------------------------------------------------------------------
37 */ 23 */
38 24
39#define SBE_BID_REG 0x00000000 /* Board ID Register */ 25#define SBE_BID_REG 0x00000000 /* Board ID Register */
diff --git a/drivers/staging/cxt1e1/sbe_promformat.h b/drivers/staging/cxt1e1/sbe_promformat.h
index 746f81b15c73..aad411d185f5 100644
--- a/drivers/staging/cxt1e1/sbe_promformat.h
+++ b/drivers/staging/cxt1e1/sbe_promformat.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: sbe_promformat.h,v 2.2 2005/09/28 00:10:09 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBE_PROMFORMAT_H_ 1#ifndef _INC_SBE_PROMFORMAT_H_
6#define _INC_SBE_PROMFORMAT_H_ 2#define _INC_SBE_PROMFORMAT_H_
7 3
@@ -24,19 +20,6 @@
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 * 21 *
26 *----------------------------------------------------------------------------- 22 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 2.2 $
29 * Last changed on $Date: 2005/09/28 00:10:09 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbe_promformat.h,v $
33 * Revision 2.2 2005/09/28 00:10:09 rickd
34 * Add EEPROM sample from C4T1E1 board.
35 *
36 * Revision 2.1 2005/05/04 17:18:24 rickd
37 * Initial CI.
38 *
39 *-----------------------------------------------------------------------------
40 */ 23 */
41 24
42 25
@@ -85,12 +68,6 @@
85 * 68 *
86 */ 69 */
87 70
88#ifdef __cplusplus
89extern "C"
90{
91#endif
92
93
94#define STRUCT_OFFSET(type, symbol) ((long)&(((type *)0)->symbol)) 71#define STRUCT_OFFSET(type, symbol) ((long)&(((type *)0)->symbol))
95 72
96/*------------------------------------------------------------------------ 73/*------------------------------------------------------------------------
@@ -150,8 +127,4 @@ extern "C"
150 FLD_TYPE2 fldType2; 127 FLD_TYPE2 fldType2;
151 } PROMFORMAT; 128 } PROMFORMAT;
152 129
153#ifdef __cplusplus
154}
155#endif
156
157#endif /*** _INC_SBE_PROMFORMAT_H_ ***/ 130#endif /*** _INC_SBE_PROMFORMAT_H_ ***/
diff --git a/drivers/staging/cxt1e1/sbecom_inline_linux.h b/drivers/staging/cxt1e1/sbecom_inline_linux.h
index 9ea2c0c2061f..68ed445ab0cb 100644
--- a/drivers/staging/cxt1e1/sbecom_inline_linux.h
+++ b/drivers/staging/cxt1e1/sbecom_inline_linux.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: sbecom_inline_linux.h,v 1.2 2007/08/15 22:51:35 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBECOM_INLNX_H_ 1#ifndef _INC_SBECOM_INLNX_H_
6#define _INC_SBECOM_INLNX_H_ 2#define _INC_SBECOM_INLNX_H_
7 3
@@ -24,22 +20,6 @@
24 * For further information, contact via email: support@onestopsystems.com 20 * For further information, contact via email: support@onestopsystems.com
25 * One Stop Systems, Inc. Escondido, California U.S.A. 21 * One Stop Systems, Inc. Escondido, California U.S.A.
26 *----------------------------------------------------------------------------- 22 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.2 $
29 * Last changed on $Date: 2007/08/15 22:51:35 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbecom_inline_linux.h,v $
33 * Revision 1.2 2007/08/15 22:51:35 rickd
34 * Remove duplicate version.h entry.
35 *
36 * Revision 1.1 2007/08/15 22:50:29 rickd
37 * Update linux/config for 2.6.18 and later.
38 *
39 * Revision 1.0 2005/09/28 00:10:09 rickd
40 * Initial revision
41 *
42 *-----------------------------------------------------------------------------
43 */ 23 */
44 24
45 25
diff --git a/drivers/staging/cxt1e1/sbeproc.h b/drivers/staging/cxt1e1/sbeproc.h
index 4aa53f44ec0b..e82be6afd1e8 100644
--- a/drivers/staging/cxt1e1/sbeproc.h
+++ b/drivers/staging/cxt1e1/sbeproc.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: sbeproc.h,v 1.2 2005/10/17 23:55:28 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBEPROC_H_ 1#ifndef _INC_SBEPROC_H_
6#define _INC_SBEPROC_H_ 2#define _INC_SBEPROC_H_
7 3
@@ -23,22 +19,6 @@
23 * For further information, contact via email: support@sbei.com 19 * For further information, contact via email: support@sbei.com
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 *----------------------------------------------------------------------------- 21 *-----------------------------------------------------------------------------
26 * RCS info:
27 * RCS revision: $Revision: 1.2 $
28 * Last changed on $Date: 2005/10/17 23:55:28 $
29 * Changed by $Author: rickd $
30 *-----------------------------------------------------------------------------
31 * $Log: sbeproc.h,v $
32 * Revision 1.2 2005/10/17 23:55:28 rickd
33 * sbecom_proc_brd_init() is an declared an __init function.
34 *
35 * Revision 1.1 2005/09/28 00:10:09 rickd
36 * Remove unneeded inclusion of c4_private.h.
37 *
38 * Revision 1.0 2005/05/10 22:21:46 rickd
39 * Initial check-in.
40 *
41 *-----------------------------------------------------------------------------
42 */ 22 */
43 23
44 24
diff --git a/drivers/staging/cxt1e1/sbew_ioc.h b/drivers/staging/cxt1e1/sbew_ioc.h
index 14d371904d1f..ce9b15c71894 100644
--- a/drivers/staging/cxt1e1/sbew_ioc.h
+++ b/drivers/staging/cxt1e1/sbew_ioc.h
@@ -1,7 +1,3 @@
1/*
2 * $Id: sbew_ioc.h,v 1.0 2005/09/28 00:10:10 rickd PMCC4_3_1B $
3 */
4
5#ifndef _INC_SBEWIOC_H_ 1#ifndef _INC_SBEWIOC_H_
6#define _INC_SBEWIOC_H_ 2#define _INC_SBEWIOC_H_
7 3
@@ -24,55 +20,9 @@
24 * SBE, Inc. San Ramon, California U.S.A. 20 * SBE, Inc. San Ramon, California U.S.A.
25 * 21 *
26 *----------------------------------------------------------------------------- 22 *-----------------------------------------------------------------------------
27 * RCS info:
28 * RCS revision: $Revision: 1.0 $
29 * Last changed on $Date: 2005/09/28 00:10:10 $
30 * Changed by $Author: rickd $
31 *-----------------------------------------------------------------------------
32 * $Log: sbew_ioc.h,v $
33 * Revision 1.0 2005/09/28 00:10:10 rickd
34 * Initial revision
35 *
36 * Revision 1.6 2005/01/11 18:41:01 rickd
37 * Add BRDADDR_GET Ioctl.
38 *
39 * Revision 1.5 2004/09/16 18:55:59 rickd
40 * Start setting up for generic framer configuration Ioctl by switch
41 * from tect3_framer_param[] to sbecom_framer_param[].
42 *
43 * Revision 1.4 2004/06/28 17:58:15 rickd
44 * Rename IOC_TSMAP_[GS] to IOC_TSIOC_[GS] to support need for
45 * multiple formats of data when setting up TimeSlots.
46 *
47 * Revision 1.3 2004/06/22 21:18:13 rickd
48 * read_vec now() ONLY handles a single common wrt_vec array.
49 *
50 * Revision 1.1 2004/06/10 18:11:34 rickd
51 * Add IID_GET Ioctl reference.
52 *
53 * Revision 1.0 2004/06/08 22:59:38 rickd
54 * Initial revision
55 *
56 * Revision 2.0 2004/06/07 17:49:47 rickd
57 * Initial library release following merge of wanc1t3/wan256 into
58 * common elements for lib.
59 *
60 *-----------------------------------------------------------------------------
61 */ 23 */
62 24
63#ifndef __KERNEL__
64#include <sys/types.h>
65#endif
66#ifdef SunOS
67#include <sys/ioccom.h>
68#else
69#include <linux/ioctl.h> 25#include <linux/ioctl.h>
70#endif
71
72#ifdef __cplusplus
73extern "C"
74{
75#endif
76 26
77#define SBE_LOCKFILE "/tmp/.sbewan.LCK" 27#define SBE_LOCKFILE "/tmp/.sbewan.LCK"
78 28
@@ -128,9 +78,4 @@ extern "C"
128 78
129#define SBE_IOC_MAXVEC 1 79#define SBE_IOC_MAXVEC 1
130 80
131
132#ifdef __cplusplus
133}
134#endif
135
136#endif /*** _INC_SBEWIOC_H_ ***/ 81#endif /*** _INC_SBEWIOC_H_ ***/
diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c
index 0c1c6ca8c379..2c4069fcd981 100644
--- a/drivers/staging/et131x/et131x.c
+++ b/drivers/staging/et131x/et131x.c
@@ -155,7 +155,6 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver "
155#define fMP_ADAPTER_FAIL_SEND_MASK 0x3ff00000 155#define fMP_ADAPTER_FAIL_SEND_MASK 0x3ff00000
156 156
157/* Some offsets in PCI config space that are actually used. */ 157/* Some offsets in PCI config space that are actually used. */
158#define ET1310_PCI_MAX_PYLD 0x4C
159#define ET1310_PCI_MAC_ADDRESS 0xA4 158#define ET1310_PCI_MAC_ADDRESS 0xA4
160#define ET1310_PCI_EEPROM_STATUS 0xB2 159#define ET1310_PCI_EEPROM_STATUS 0xB2
161#define ET1310_PCI_ACK_NACK 0xC0 160#define ET1310_PCI_ACK_NACK 0xC0
@@ -178,9 +177,7 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver "
178 177
179/* RX defines */ 178/* RX defines */
180#define USE_FBR0 1 179#define USE_FBR0 1
181
182#define FBR_CHUNKS 32 180#define FBR_CHUNKS 32
183
184#define MAX_DESC_PER_RING_RX 1024 181#define MAX_DESC_PER_RING_RX 1024
185 182
186/* number of RFDs - default and min */ 183/* number of RFDs - default and min */
@@ -195,7 +192,6 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver "
195#endif 192#endif
196 193
197#define NIC_MIN_NUM_RFD 64 194#define NIC_MIN_NUM_RFD 64
198
199#define NUM_PACKETS_HANDLED 256 195#define NUM_PACKETS_HANDLED 256
200 196
201#define ALCATEL_MULTICAST_PKT 0x01000000 197#define ALCATEL_MULTICAST_PKT 0x01000000
@@ -303,8 +299,8 @@ struct fbr_lookup {
303 dma_addr_t ring_physaddr; 299 dma_addr_t ring_physaddr;
304 void *mem_virtaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; 300 void *mem_virtaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
305 dma_addr_t mem_physaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; 301 dma_addr_t mem_physaddrs[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
306 uint64_t real_physaddr; 302 u64 real_physaddr;
307 uint64_t offset; 303 u64 offset;
308 u32 local_full; 304 u32 local_full;
309 u32 num_entries; 305 u32 num_entries;
310 u32 buffsize; 306 u32 buffsize;
@@ -427,7 +423,6 @@ struct tx_ring {
427 int since_irq; 423 int since_irq;
428}; 424};
429 425
430/* ADAPTER defines */
431/* 426/*
432 * Do not change these values: if changed, then change also in respective 427 * Do not change these values: if changed, then change also in respective
433 * TXdma and Rxdma engines 428 * TXdma and Rxdma engines
@@ -576,8 +571,6 @@ struct et131x_adapter {
576 struct net_device_stats net_stats; 571 struct net_device_stats net_stats;
577}; 572};
578 573
579/* EEPROM functions */
580
581static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status) 574static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status)
582{ 575{
583 u32 reg; 576 u32 reg;
@@ -795,7 +788,7 @@ static int eeprom_read(struct et131x_adapter *adapter, u32 addr, u8 *pdata)
795 return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0; 788 return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0;
796} 789}
797 790
798int et131x_init_eeprom(struct et131x_adapter *adapter) 791static int et131x_init_eeprom(struct et131x_adapter *adapter)
799{ 792{
800 struct pci_dev *pdev = adapter->pdev; 793 struct pci_dev *pdev = adapter->pdev;
801 u8 eestatus; 794 u8 eestatus;
@@ -868,7 +861,7 @@ int et131x_init_eeprom(struct et131x_adapter *adapter)
868 * et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310. 861 * et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310.
869 * @adapter: pointer to our adapter structure 862 * @adapter: pointer to our adapter structure
870 */ 863 */
871void et131x_rx_dma_enable(struct et131x_adapter *adapter) 864static void et131x_rx_dma_enable(struct et131x_adapter *adapter)
872{ 865{
873 /* Setup the receive dma configuration register for normal operation */ 866 /* Setup the receive dma configuration register for normal operation */
874 u32 csr = 0x2000; /* FBR1 enable */ 867 u32 csr = 0x2000; /* FBR1 enable */
@@ -906,7 +899,7 @@ void et131x_rx_dma_enable(struct et131x_adapter *adapter)
906 * et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310 899 * et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310
907 * @adapter: pointer to our adapter structure 900 * @adapter: pointer to our adapter structure
908 */ 901 */
909void et131x_rx_dma_disable(struct et131x_adapter *adapter) 902static void et131x_rx_dma_disable(struct et131x_adapter *adapter)
910{ 903{
911 u32 csr; 904 u32 csr;
912 /* Setup the receive dma configuration register */ 905 /* Setup the receive dma configuration register */
@@ -928,7 +921,7 @@ void et131x_rx_dma_disable(struct et131x_adapter *adapter)
928 * 921 *
929 * Mainly used after a return to the D0 (full-power) state from a lower state. 922 * Mainly used after a return to the D0 (full-power) state from a lower state.
930 */ 923 */
931void et131x_tx_dma_enable(struct et131x_adapter *adapter) 924static void et131x_tx_dma_enable(struct et131x_adapter *adapter)
932{ 925{
933 /* Setup the transmit dma configuration register for normal 926 /* Setup the transmit dma configuration register for normal
934 * operation 927 * operation
@@ -948,23 +941,10 @@ static inline void add_12bit(u32 *v, int n)
948} 941}
949 942
950/** 943/**
951 * nic_rx_pkts - Checks the hardware for available packets
952 * @adapter: pointer to our adapter
953 *
954 * Returns rfd, a pointer to our MPRFD.
955 *
956 * Checks the hardware for available packets, using completion ring
957 * If packets are available, it gets an RFD from the recv_list, attaches
958 * the packet to it, puts the RFD in the RecvPendList, and also returns
959 * the pointer to the RFD.
960 */
961/* MAC functions */
962
963/**
964 * et1310_config_mac_regs1 - Initialize the first part of MAC regs 944 * et1310_config_mac_regs1 - Initialize the first part of MAC regs
965 * @adapter: pointer to our adapter structure 945 * @adapter: pointer to our adapter structure
966 */ 946 */
967void et1310_config_mac_regs1(struct et131x_adapter *adapter) 947static void et1310_config_mac_regs1(struct et131x_adapter *adapter)
968{ 948{
969 struct mac_regs __iomem *macregs = &adapter->regs->mac; 949 struct mac_regs __iomem *macregs = &adapter->regs->mac;
970 u32 station1; 950 u32 station1;
@@ -1024,7 +1004,7 @@ void et1310_config_mac_regs1(struct et131x_adapter *adapter)
1024 * et1310_config_mac_regs2 - Initialize the second part of MAC regs 1004 * et1310_config_mac_regs2 - Initialize the second part of MAC regs
1025 * @adapter: pointer to our adapter structure 1005 * @adapter: pointer to our adapter structure
1026 */ 1006 */
1027void et1310_config_mac_regs2(struct et131x_adapter *adapter) 1007static void et1310_config_mac_regs2(struct et131x_adapter *adapter)
1028{ 1008{
1029 int32_t delay = 0; 1009 int32_t delay = 0;
1030 struct mac_regs __iomem *mac = &adapter->regs->mac; 1010 struct mac_regs __iomem *mac = &adapter->regs->mac;
@@ -1105,7 +1085,7 @@ void et1310_config_mac_regs2(struct et131x_adapter *adapter)
1105 * 1085 *
1106 * Returns 0 if the device is not in phy coma, 1 if it is in phy coma 1086 * Returns 0 if the device is not in phy coma, 1 if it is in phy coma
1107 */ 1087 */
1108int et1310_in_phy_coma(struct et131x_adapter *adapter) 1088static int et1310_in_phy_coma(struct et131x_adapter *adapter)
1109{ 1089{
1110 u32 pmcsr; 1090 u32 pmcsr;
1111 1091
@@ -1114,15 +1094,13 @@ int et1310_in_phy_coma(struct et131x_adapter *adapter)
1114 return ET_PM_PHY_SW_COMA & pmcsr ? 1 : 0; 1094 return ET_PM_PHY_SW_COMA & pmcsr ? 1 : 0;
1115} 1095}
1116 1096
1117void et1310_setup_device_for_multicast(struct et131x_adapter *adapter) 1097static void et1310_setup_device_for_multicast(struct et131x_adapter *adapter)
1118{ 1098{
1119 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac; 1099 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac;
1120 uint32_t nIndex; 1100 u32 hash1 = 0;
1121 uint32_t result; 1101 u32 hash2 = 0;
1122 uint32_t hash1 = 0; 1102 u32 hash3 = 0;
1123 uint32_t hash2 = 0; 1103 u32 hash4 = 0;
1124 uint32_t hash3 = 0;
1125 uint32_t hash4 = 0;
1126 u32 pm_csr; 1104 u32 pm_csr;
1127 1105
1128 /* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision 1106 /* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision
@@ -1131,10 +1109,13 @@ void et1310_setup_device_for_multicast(struct et131x_adapter *adapter)
1131 * driver. 1109 * driver.
1132 */ 1110 */
1133 if (adapter->packet_filter & ET131X_PACKET_TYPE_MULTICAST) { 1111 if (adapter->packet_filter & ET131X_PACKET_TYPE_MULTICAST) {
1112 int i;
1113
1134 /* Loop through our multicast array and set up the device */ 1114 /* Loop through our multicast array and set up the device */
1135 for (nIndex = 0; nIndex < adapter->multicast_addr_count; 1115 for (i = 0; i < adapter->multicast_addr_count; i++) {
1136 nIndex++) { 1116 u32 result;
1137 result = ether_crc(6, adapter->multicast_list[nIndex]); 1117
1118 result = ether_crc(6, adapter->multicast_list[i]);
1138 1119
1139 result = (result & 0x3F800000) >> 23; 1120 result = (result & 0x3F800000) >> 23;
1140 1121
@@ -1163,7 +1144,7 @@ void et1310_setup_device_for_multicast(struct et131x_adapter *adapter)
1163 } 1144 }
1164} 1145}
1165 1146
1166void et1310_setup_device_for_unicast(struct et131x_adapter *adapter) 1147static void et1310_setup_device_for_unicast(struct et131x_adapter *adapter)
1167{ 1148{
1168 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac; 1149 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac;
1169 u32 uni_pf1; 1150 u32 uni_pf1;
@@ -1203,7 +1184,7 @@ void et1310_setup_device_for_unicast(struct et131x_adapter *adapter)
1203 } 1184 }
1204} 1185}
1205 1186
1206void et1310_config_rxmac_regs(struct et131x_adapter *adapter) 1187static void et1310_config_rxmac_regs(struct et131x_adapter *adapter)
1207{ 1188{
1208 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac; 1189 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac;
1209 struct phy_device *phydev = adapter->phydev; 1190 struct phy_device *phydev = adapter->phydev;
@@ -1334,7 +1315,7 @@ void et1310_config_rxmac_regs(struct et131x_adapter *adapter)
1334 writel(0x9, &rxmac->ctrl); 1315 writel(0x9, &rxmac->ctrl);
1335} 1316}
1336 1317
1337void et1310_config_txmac_regs(struct et131x_adapter *adapter) 1318static void et1310_config_txmac_regs(struct et131x_adapter *adapter)
1338{ 1319{
1339 struct txmac_regs __iomem *txmac = &adapter->regs->txmac; 1320 struct txmac_regs __iomem *txmac = &adapter->regs->txmac;
1340 1321
@@ -1348,7 +1329,7 @@ void et1310_config_txmac_regs(struct et131x_adapter *adapter)
1348 writel(0x40, &txmac->cf_param); 1329 writel(0x40, &txmac->cf_param);
1349} 1330}
1350 1331
1351void et1310_config_macstat_regs(struct et131x_adapter *adapter) 1332static void et1310_config_macstat_regs(struct et131x_adapter *adapter)
1352{ 1333{
1353 struct macstat_regs __iomem *macstat = 1334 struct macstat_regs __iomem *macstat =
1354 &adapter->regs->macstat; 1335 &adapter->regs->macstat;
@@ -1422,7 +1403,7 @@ void et1310_config_macstat_regs(struct et131x_adapter *adapter)
1422 * 1403 *
1423 * Returns 0 on success, errno on failure (as defined in errno.h) 1404 * Returns 0 on success, errno on failure (as defined in errno.h)
1424 */ 1405 */
1425int et131x_phy_mii_read(struct et131x_adapter *adapter, u8 addr, 1406static int et131x_phy_mii_read(struct et131x_adapter *adapter, u8 addr,
1426 u8 reg, u16 *value) 1407 u8 reg, u16 *value)
1427{ 1408{
1428 struct mac_regs __iomem *mac = &adapter->regs->mac; 1409 struct mac_regs __iomem *mac = &adapter->regs->mac;
@@ -1478,7 +1459,7 @@ int et131x_phy_mii_read(struct et131x_adapter *adapter, u8 addr,
1478 return status; 1459 return status;
1479} 1460}
1480 1461
1481int et131x_mii_read(struct et131x_adapter *adapter, u8 reg, u16 *value) 1462static int et131x_mii_read(struct et131x_adapter *adapter, u8 reg, u16 *value)
1482{ 1463{
1483 struct phy_device *phydev = adapter->phydev; 1464 struct phy_device *phydev = adapter->phydev;
1484 1465
@@ -1498,7 +1479,7 @@ int et131x_mii_read(struct et131x_adapter *adapter, u8 reg, u16 *value)
1498 * 1479 *
1499 * Return 0 on success, errno on failure (as defined in errno.h) 1480 * Return 0 on success, errno on failure (as defined in errno.h)
1500 */ 1481 */
1501int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value) 1482static int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value)
1502{ 1483{
1503 struct mac_regs __iomem *mac = &adapter->regs->mac; 1484 struct mac_regs __iomem *mac = &adapter->regs->mac;
1504 struct phy_device *phydev = adapter->phydev; 1485 struct phy_device *phydev = adapter->phydev;
@@ -1564,8 +1545,9 @@ int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value)
1564} 1545}
1565 1546
1566/* Still used from _mac for BIT_READ */ 1547/* Still used from _mac for BIT_READ */
1567void et1310_phy_access_mii_bit(struct et131x_adapter *adapter, u16 action, 1548static void et1310_phy_access_mii_bit(struct et131x_adapter *adapter,
1568 u16 regnum, u16 bitnum, u8 *value) 1549 u16 action, u16 regnum, u16 bitnum,
1550 u8 *value)
1569{ 1551{
1570 u16 reg; 1552 u16 reg;
1571 u16 mask = 0x0001 << bitnum; 1553 u16 mask = 0x0001 << bitnum;
@@ -1591,7 +1573,7 @@ void et1310_phy_access_mii_bit(struct et131x_adapter *adapter, u16 action,
1591 } 1573 }
1592} 1574}
1593 1575
1594void et1310_config_flow_control(struct et131x_adapter *adapter) 1576static void et1310_config_flow_control(struct et131x_adapter *adapter)
1595{ 1577{
1596 struct phy_device *phydev = adapter->phydev; 1578 struct phy_device *phydev = adapter->phydev;
1597 1579
@@ -1632,7 +1614,7 @@ void et1310_config_flow_control(struct et131x_adapter *adapter)
1632 * et1310_update_macstat_host_counters - Update the local copy of the statistics 1614 * et1310_update_macstat_host_counters - Update the local copy of the statistics
1633 * @adapter: pointer to the adapter structure 1615 * @adapter: pointer to the adapter structure
1634 */ 1616 */
1635void et1310_update_macstat_host_counters(struct et131x_adapter *adapter) 1617static void et1310_update_macstat_host_counters(struct et131x_adapter *adapter)
1636{ 1618{
1637 struct ce_stats *stats = &adapter->stats; 1619 struct ce_stats *stats = &adapter->stats;
1638 struct macstat_regs __iomem *macstat = 1620 struct macstat_regs __iomem *macstat =
@@ -1664,7 +1646,7 @@ void et1310_update_macstat_host_counters(struct et131x_adapter *adapter)
1664 * the statistics held in the adapter structure, checking the "wrap" 1646 * the statistics held in the adapter structure, checking the "wrap"
1665 * bit for each counter. 1647 * bit for each counter.
1666 */ 1648 */
1667void et1310_handle_macstat_interrupt(struct et131x_adapter *adapter) 1649static void et1310_handle_macstat_interrupt(struct et131x_adapter *adapter)
1668{ 1650{
1669 u32 carry_reg1; 1651 u32 carry_reg1;
1670 u32 carry_reg2; 1652 u32 carry_reg2;
@@ -1714,9 +1696,7 @@ void et1310_handle_macstat_interrupt(struct et131x_adapter *adapter)
1714 adapter->stats.tx_collisions += COUNTER_WRAP_12_BIT; 1696 adapter->stats.tx_collisions += COUNTER_WRAP_12_BIT;
1715} 1697}
1716 1698
1717/* PHY functions */ 1699static int et131x_mdio_read(struct mii_bus *bus, int phy_addr, int reg)
1718
1719int et131x_mdio_read(struct mii_bus *bus, int phy_addr, int reg)
1720{ 1700{
1721 struct net_device *netdev = bus->priv; 1701 struct net_device *netdev = bus->priv;
1722 struct et131x_adapter *adapter = netdev_priv(netdev); 1702 struct et131x_adapter *adapter = netdev_priv(netdev);
@@ -1731,7 +1711,7 @@ int et131x_mdio_read(struct mii_bus *bus, int phy_addr, int reg)
1731 return value; 1711 return value;
1732} 1712}
1733 1713
1734int et131x_mdio_write(struct mii_bus *bus, int phy_addr, int reg, u16 value) 1714static int et131x_mdio_write(struct mii_bus *bus, int phy_addr, int reg, u16 value)
1735{ 1715{
1736 struct net_device *netdev = bus->priv; 1716 struct net_device *netdev = bus->priv;
1737 struct et131x_adapter *adapter = netdev_priv(netdev); 1717 struct et131x_adapter *adapter = netdev_priv(netdev);
@@ -1739,7 +1719,7 @@ int et131x_mdio_write(struct mii_bus *bus, int phy_addr, int reg, u16 value)
1739 return et131x_mii_write(adapter, reg, value); 1719 return et131x_mii_write(adapter, reg, value);
1740} 1720}
1741 1721
1742int et131x_mdio_reset(struct mii_bus *bus) 1722static int et131x_mdio_reset(struct mii_bus *bus)
1743{ 1723{
1744 struct net_device *netdev = bus->priv; 1724 struct net_device *netdev = bus->priv;
1745 struct et131x_adapter *adapter = netdev_priv(netdev); 1725 struct et131x_adapter *adapter = netdev_priv(netdev);
@@ -1759,7 +1739,7 @@ int et131x_mdio_reset(struct mii_bus *bus)
1759 * Can't you see that this code processed 1739 * Can't you see that this code processed
1760 * Phy power, phy power.. 1740 * Phy power, phy power..
1761 */ 1741 */
1762void et1310_phy_power_down(struct et131x_adapter *adapter, bool down) 1742static void et1310_phy_power_down(struct et131x_adapter *adapter, bool down)
1763{ 1743{
1764 u16 data; 1744 u16 data;
1765 1745
@@ -1775,7 +1755,7 @@ void et1310_phy_power_down(struct et131x_adapter *adapter, bool down)
1775 * @adapter: pointer to our private adapter structure 1755 * @adapter: pointer to our private adapter structure
1776 * 1756 *
1777 */ 1757 */
1778void et131x_xcvr_init(struct et131x_adapter *adapter) 1758static void et131x_xcvr_init(struct et131x_adapter *adapter)
1779{ 1759{
1780 u16 imr; 1760 u16 imr;
1781 u16 isr; 1761 u16 isr;
@@ -1822,7 +1802,7 @@ void et131x_xcvr_init(struct et131x_adapter *adapter)
1822 * 1802 *
1823 * Used to configure the global registers on the JAGCore 1803 * Used to configure the global registers on the JAGCore
1824 */ 1804 */
1825void et131x_configure_global_regs(struct et131x_adapter *adapter) 1805static void et131x_configure_global_regs(struct et131x_adapter *adapter)
1826{ 1806{
1827 struct global_regs __iomem *regs = &adapter->regs->global; 1807 struct global_regs __iomem *regs = &adapter->regs->global;
1828 1808
@@ -1863,13 +1843,11 @@ void et131x_configure_global_regs(struct et131x_adapter *adapter)
1863 writel(0, &regs->watchdog_timer); 1843 writel(0, &regs->watchdog_timer);
1864} 1844}
1865 1845
1866/* PM functions */
1867
1868/** 1846/**
1869 * et131x_config_rx_dma_regs - Start of Rx_DMA init sequence 1847 * et131x_config_rx_dma_regs - Start of Rx_DMA init sequence
1870 * @adapter: pointer to our adapter structure 1848 * @adapter: pointer to our adapter structure
1871 */ 1849 */
1872void et131x_config_rx_dma_regs(struct et131x_adapter *adapter) 1850static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
1873{ 1851{
1874 struct rxdma_regs __iomem *rx_dma = &adapter->regs->rxdma; 1852 struct rxdma_regs __iomem *rx_dma = &adapter->regs->rxdma;
1875 struct rx_ring *rx_local = &adapter->rx_ring; 1853 struct rx_ring *rx_local = &adapter->rx_ring;
@@ -1987,7 +1965,7 @@ void et131x_config_rx_dma_regs(struct et131x_adapter *adapter)
1987 * Configure the transmit engine with the ring buffers we have created 1965 * Configure the transmit engine with the ring buffers we have created
1988 * and prepare it for use. 1966 * and prepare it for use.
1989 */ 1967 */
1990void et131x_config_tx_dma_regs(struct et131x_adapter *adapter) 1968static void et131x_config_tx_dma_regs(struct et131x_adapter *adapter)
1991{ 1969{
1992 struct txdma_regs __iomem *txdma = &adapter->regs->txdma; 1970 struct txdma_regs __iomem *txdma = &adapter->regs->txdma;
1993 1971
@@ -2017,7 +1995,7 @@ void et131x_config_tx_dma_regs(struct et131x_adapter *adapter)
2017 * 1995 *
2018 * Returns 0 on success, errno on failure (as defined in errno.h) 1996 * Returns 0 on success, errno on failure (as defined in errno.h)
2019 */ 1997 */
2020void et131x_adapter_setup(struct et131x_adapter *adapter) 1998static void et131x_adapter_setup(struct et131x_adapter *adapter)
2021{ 1999{
2022 /* Configure the JAGCore */ 2000 /* Configure the JAGCore */
2023 et131x_configure_global_regs(adapter); 2001 et131x_configure_global_regs(adapter);
@@ -2044,7 +2022,7 @@ void et131x_adapter_setup(struct et131x_adapter *adapter)
2044 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310 2022 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
2045 * @adapter: pointer to our private adapter structure 2023 * @adapter: pointer to our private adapter structure
2046 */ 2024 */
2047void et131x_soft_reset(struct et131x_adapter *adapter) 2025static void et131x_soft_reset(struct et131x_adapter *adapter)
2048{ 2026{
2049 /* Disable MAC Core */ 2027 /* Disable MAC Core */
2050 writel(0xc00f0000, &adapter->regs->mac.cfg1); 2028 writel(0xc00f0000, &adapter->regs->mac.cfg1);
@@ -2062,7 +2040,7 @@ void et131x_soft_reset(struct et131x_adapter *adapter)
2062 * Enable the appropriate interrupts on the ET131x according to our 2040 * Enable the appropriate interrupts on the ET131x according to our
2063 * configuration 2041 * configuration
2064 */ 2042 */
2065void et131x_enable_interrupts(struct et131x_adapter *adapter) 2043static void et131x_enable_interrupts(struct et131x_adapter *adapter)
2066{ 2044{
2067 u32 mask; 2045 u32 mask;
2068 2046
@@ -2082,7 +2060,7 @@ void et131x_enable_interrupts(struct et131x_adapter *adapter)
2082 * 2060 *
2083 * Block all interrupts from the et131x device at the device itself 2061 * Block all interrupts from the et131x device at the device itself
2084 */ 2062 */
2085void et131x_disable_interrupts(struct et131x_adapter *adapter) 2063static void et131x_disable_interrupts(struct et131x_adapter *adapter)
2086{ 2064{
2087 /* Disable all global interrupts */ 2065 /* Disable all global interrupts */
2088 writel(INT_MASK_DISABLE, &adapter->regs->global.int_mask); 2066 writel(INT_MASK_DISABLE, &adapter->regs->global.int_mask);
@@ -2092,7 +2070,7 @@ void et131x_disable_interrupts(struct et131x_adapter *adapter)
2092 * et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310 2070 * et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310
2093 * @adapter: pointer to our adapter structure 2071 * @adapter: pointer to our adapter structure
2094 */ 2072 */
2095void et131x_tx_dma_disable(struct et131x_adapter *adapter) 2073static void et131x_tx_dma_disable(struct et131x_adapter *adapter)
2096{ 2074{
2097 /* Setup the tramsmit dma configuration register */ 2075 /* Setup the tramsmit dma configuration register */
2098 writel(ET_TXDMA_CSR_HALT|ET_TXDMA_SNGL_EPKT, 2076 writel(ET_TXDMA_CSR_HALT|ET_TXDMA_SNGL_EPKT,
@@ -2103,7 +2081,7 @@ void et131x_tx_dma_disable(struct et131x_adapter *adapter)
2103 * et131x_enable_txrx - Enable tx/rx queues 2081 * et131x_enable_txrx - Enable tx/rx queues
2104 * @netdev: device to be enabled 2082 * @netdev: device to be enabled
2105 */ 2083 */
2106void et131x_enable_txrx(struct net_device *netdev) 2084static void et131x_enable_txrx(struct net_device *netdev)
2107{ 2085{
2108 struct et131x_adapter *adapter = netdev_priv(netdev); 2086 struct et131x_adapter *adapter = netdev_priv(netdev);
2109 2087
@@ -2123,7 +2101,7 @@ void et131x_enable_txrx(struct net_device *netdev)
2123 * et131x_disable_txrx - Disable tx/rx queues 2101 * et131x_disable_txrx - Disable tx/rx queues
2124 * @netdev: device to be disabled 2102 * @netdev: device to be disabled
2125 */ 2103 */
2126void et131x_disable_txrx(struct net_device *netdev) 2104static void et131x_disable_txrx(struct net_device *netdev)
2127{ 2105{
2128 struct et131x_adapter *adapter = netdev_priv(netdev); 2106 struct et131x_adapter *adapter = netdev_priv(netdev);
2129 2107
@@ -2142,7 +2120,7 @@ void et131x_disable_txrx(struct net_device *netdev)
2142 * et131x_init_send - Initialize send data structures 2120 * et131x_init_send - Initialize send data structures
2143 * @adapter: pointer to our private adapter structure 2121 * @adapter: pointer to our private adapter structure
2144 */ 2122 */
2145void et131x_init_send(struct et131x_adapter *adapter) 2123static void et131x_init_send(struct et131x_adapter *adapter)
2146{ 2124{
2147 struct tcb *tcb; 2125 struct tcb *tcb;
2148 u32 ct; 2126 u32 ct;
@@ -2192,7 +2170,7 @@ void et131x_init_send(struct et131x_adapter *adapter)
2192 * indicating linkup status, call the MPDisablePhyComa routine to 2170 * indicating linkup status, call the MPDisablePhyComa routine to
2193 * restore JAGCore and gigE PHY 2171 * restore JAGCore and gigE PHY
2194 */ 2172 */
2195void et1310_enable_phy_coma(struct et131x_adapter *adapter) 2173static void et1310_enable_phy_coma(struct et131x_adapter *adapter)
2196{ 2174{
2197 unsigned long flags; 2175 unsigned long flags;
2198 u32 pmcsr; 2176 u32 pmcsr;
@@ -2231,7 +2209,7 @@ void et1310_enable_phy_coma(struct et131x_adapter *adapter)
2231 * et1310_disable_phy_coma - Disable the Phy Coma Mode 2209 * et1310_disable_phy_coma - Disable the Phy Coma Mode
2232 * @adapter: pointer to our adapter structure 2210 * @adapter: pointer to our adapter structure
2233 */ 2211 */
2234void et1310_disable_phy_coma(struct et131x_adapter *adapter) 2212static void et1310_disable_phy_coma(struct et131x_adapter *adapter)
2235{ 2213{
2236 u32 pmcsr; 2214 u32 pmcsr;
2237 2215
@@ -2269,8 +2247,6 @@ void et1310_disable_phy_coma(struct et131x_adapter *adapter)
2269 et131x_enable_txrx(adapter->netdev); 2247 et131x_enable_txrx(adapter->netdev);
2270} 2248}
2271 2249
2272/* RX functions */
2273
2274static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit) 2250static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit)
2275{ 2251{
2276 u32 tmp_free_buff_ring = *free_buff_ring; 2252 u32 tmp_free_buff_ring = *free_buff_ring;
@@ -2296,16 +2272,14 @@ static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit)
2296 * @offset: pointer to the offset variable 2272 * @offset: pointer to the offset variable
2297 * @mask: correct mask 2273 * @mask: correct mask
2298 */ 2274 */
2299void et131x_align_allocated_memory(struct et131x_adapter *adapter, 2275static void et131x_align_allocated_memory(struct et131x_adapter *adapter,
2300 uint64_t *phys_addr, 2276 u64 *phys_addr, u64 *offset,
2301 uint64_t *offset, uint64_t mask) 2277 u64 mask)
2302{ 2278{
2303 uint64_t new_addr; 2279 u64 new_addr = *phys_addr & ~mask;
2304 2280
2305 *offset = 0; 2281 *offset = 0;
2306 2282
2307 new_addr = *phys_addr & ~mask;
2308
2309 if (new_addr != *phys_addr) { 2283 if (new_addr != *phys_addr) {
2310 /* Move to next aligned block */ 2284 /* Move to next aligned block */
2311 new_addr += mask + 1; 2285 new_addr += mask + 1;
@@ -2325,7 +2299,7 @@ void et131x_align_allocated_memory(struct et131x_adapter *adapter,
2325 * Allocates Free buffer ring 1 for sure, free buffer ring 0 if required, 2299 * Allocates Free buffer ring 1 for sure, free buffer ring 0 if required,
2326 * and the Packet Status Ring. 2300 * and the Packet Status Ring.
2327 */ 2301 */
2328int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) 2302static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2329{ 2303{
2330 u32 i, j; 2304 u32 i, j;
2331 u32 bufsize; 2305 u32 bufsize;
@@ -2454,8 +2428,8 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2454 rx_ring->fbr[1]->offset); 2428 rx_ring->fbr[1]->offset);
2455#endif 2429#endif
2456 for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) { 2430 for (i = 0; i < (rx_ring->fbr[0]->num_entries / FBR_CHUNKS); i++) {
2457 u64 fbr1_offset;
2458 u64 fbr1_tmp_physaddr; 2431 u64 fbr1_tmp_physaddr;
2432 u64 fbr1_offset;
2459 u32 fbr1_align; 2433 u32 fbr1_align;
2460 2434
2461 /* This code allocates an area of memory big enough for N 2435 /* This code allocates an area of memory big enough for N
@@ -2520,8 +2494,8 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2520#ifdef USE_FBR0 2494#ifdef USE_FBR0
2521 /* Same for FBR0 (if in use) */ 2495 /* Same for FBR0 (if in use) */
2522 for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) { 2496 for (i = 0; i < (rx_ring->fbr[1]->num_entries / FBR_CHUNKS); i++) {
2523 u64 fbr0_offset;
2524 u64 fbr0_tmp_physaddr; 2497 u64 fbr0_tmp_physaddr;
2498 u64 fbr0_offset;
2525 2499
2526 fbr_chunksize = 2500 fbr_chunksize =
2527 ((FBR_CHUNKS + 1) * rx_ring->fbr[1]->buffsize) - 1; 2501 ((FBR_CHUNKS + 1) * rx_ring->fbr[1]->buffsize) - 1;
@@ -2629,7 +2603,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
2629 * et131x_rx_dma_memory_free - Free all memory allocated within this module. 2603 * et131x_rx_dma_memory_free - Free all memory allocated within this module.
2630 * @adapter: pointer to our private adapter structure 2604 * @adapter: pointer to our private adapter structure
2631 */ 2605 */
2632void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) 2606static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2633{ 2607{
2634 u32 index; 2608 u32 index;
2635 u32 bufsize; 2609 u32 bufsize;
@@ -2774,7 +2748,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
2774 * 2748 *
2775 * Returns 0 on success and errno on failure (as defined in errno.h) 2749 * Returns 0 on success and errno on failure (as defined in errno.h)
2776 */ 2750 */
2777int et131x_init_recv(struct et131x_adapter *adapter) 2751static int et131x_init_recv(struct et131x_adapter *adapter)
2778{ 2752{
2779 int status = -ENOMEM; 2753 int status = -ENOMEM;
2780 struct rfd *rfd = NULL; 2754 struct rfd *rfd = NULL;
@@ -2824,7 +2798,7 @@ int et131x_init_recv(struct et131x_adapter *adapter)
2824 * et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate. 2798 * et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate.
2825 * @adapter: pointer to our adapter structure 2799 * @adapter: pointer to our adapter structure
2826 */ 2800 */
2827void et131x_set_rx_dma_timer(struct et131x_adapter *adapter) 2801static void et131x_set_rx_dma_timer(struct et131x_adapter *adapter)
2828{ 2802{
2829 struct phy_device *phydev = adapter->phydev; 2803 struct phy_device *phydev = adapter->phydev;
2830 2804
@@ -2918,6 +2892,17 @@ static void nic_return_rfd(struct et131x_adapter *adapter, struct rfd *rfd)
2918 WARN_ON(rx_local->num_ready_recv > rx_local->num_rfd); 2892 WARN_ON(rx_local->num_ready_recv > rx_local->num_rfd);
2919} 2893}
2920 2894
2895/**
2896 * nic_rx_pkts - Checks the hardware for available packets
2897 * @adapter: pointer to our adapter
2898 *
2899 * Returns rfd, a pointer to our MPRFD.
2900 *
2901 * Checks the hardware for available packets, using completion ring
2902 * If packets are available, it gets an RFD from the recv_list, attaches
2903 * the packet to it, puts the RFD in the RecvPendList, and also returns
2904 * the pointer to the RFD.
2905 */
2921static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter) 2906static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
2922{ 2907{
2923 struct rx_ring *rx_local = &adapter->rx_ring; 2908 struct rx_ring *rx_local = &adapter->rx_ring;
@@ -3139,7 +3124,7 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)
3139 * 3124 *
3140 * Assumption, Rcv spinlock has been acquired. 3125 * Assumption, Rcv spinlock has been acquired.
3141 */ 3126 */
3142void et131x_handle_recv_interrupt(struct et131x_adapter *adapter) 3127static void et131x_handle_recv_interrupt(struct et131x_adapter *adapter)
3143{ 3128{
3144 struct rfd *rfd = NULL; 3129 struct rfd *rfd = NULL;
3145 u32 count = 0; 3130 u32 count = 0;
@@ -3188,8 +3173,6 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *adapter)
3188 adapter->rx_ring.unfinished_receives = false; 3173 adapter->rx_ring.unfinished_receives = false;
3189} 3174}
3190 3175
3191/* TX functions */
3192
3193/** 3176/**
3194 * et131x_tx_dma_memory_alloc 3177 * et131x_tx_dma_memory_alloc
3195 * @adapter: pointer to our private adapter structure 3178 * @adapter: pointer to our private adapter structure
@@ -3202,7 +3185,7 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *adapter)
3202 * memory. The device will update the "status" in memory each time it xmits a 3185 * memory. The device will update the "status" in memory each time it xmits a
3203 * packet. 3186 * packet.
3204 */ 3187 */
3205int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter) 3188static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)
3206{ 3189{
3207 int desc_size = 0; 3190 int desc_size = 0;
3208 struct tx_ring *tx_ring = &adapter->tx_ring; 3191 struct tx_ring *tx_ring = &adapter->tx_ring;
@@ -3256,7 +3239,7 @@ int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)
3256 * 3239 *
3257 * Returns 0 on success and errno on failure (as defined in errno.h). 3240 * Returns 0 on success and errno on failure (as defined in errno.h).
3258 */ 3241 */
3259void et131x_tx_dma_memory_free(struct et131x_adapter *adapter) 3242static void et131x_tx_dma_memory_free(struct et131x_adapter *adapter)
3260{ 3243{
3261 int desc_size = 0; 3244 int desc_size = 0;
3262 3245
@@ -3578,7 +3561,7 @@ static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter)
3578 * 3561 *
3579 * Return 0 in almost all cases; non-zero value in extreme hard failure only 3562 * Return 0 in almost all cases; non-zero value in extreme hard failure only
3580 */ 3563 */
3581int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev) 3564static int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev)
3582{ 3565{
3583 int status = 0; 3566 int status = 0;
3584 struct et131x_adapter *adapter = netdev_priv(netdev); 3567 struct et131x_adapter *adapter = netdev_priv(netdev);
@@ -3696,7 +3679,7 @@ static inline void free_send_packet(struct et131x_adapter *adapter,
3696 * 3679 *
3697 * Assumption - Send spinlock has been acquired 3680 * Assumption - Send spinlock has been acquired
3698 */ 3681 */
3699void et131x_free_busy_send_packets(struct et131x_adapter *adapter) 3682static void et131x_free_busy_send_packets(struct et131x_adapter *adapter)
3700{ 3683{
3701 struct tcb *tcb; 3684 struct tcb *tcb;
3702 unsigned long flags; 3685 unsigned long flags;
@@ -3743,7 +3726,7 @@ void et131x_free_busy_send_packets(struct et131x_adapter *adapter)
3743 * 3726 *
3744 * Assumption - Send spinlock has been acquired 3727 * Assumption - Send spinlock has been acquired
3745 */ 3728 */
3746void et131x_handle_send_interrupt(struct et131x_adapter *adapter) 3729static void et131x_handle_send_interrupt(struct et131x_adapter *adapter)
3747{ 3730{
3748 unsigned long flags; 3731 unsigned long flags;
3749 u32 serviced; 3732 u32 serviced;
@@ -3798,8 +3781,6 @@ void et131x_handle_send_interrupt(struct et131x_adapter *adapter)
3798 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); 3781 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags);
3799} 3782}
3800 3783
3801/* ETHTOOL functions */
3802
3803static int et131x_get_settings(struct net_device *netdev, 3784static int et131x_get_settings(struct net_device *netdev,
3804 struct ethtool_cmd *cmd) 3785 struct ethtool_cmd *cmd)
3805{ 3786{
@@ -3965,18 +3946,16 @@ static struct ethtool_ops et131x_ethtool_ops = {
3965 .get_link = ethtool_op_get_link, 3946 .get_link = ethtool_op_get_link,
3966}; 3947};
3967 3948
3968void et131x_set_ethtool_ops(struct net_device *netdev) 3949static void et131x_set_ethtool_ops(struct net_device *netdev)
3969{ 3950{
3970 SET_ETHTOOL_OPS(netdev, &et131x_ethtool_ops); 3951 SET_ETHTOOL_OPS(netdev, &et131x_ethtool_ops);
3971} 3952}
3972 3953
3973/* PCI functions */
3974
3975/** 3954/**
3976 * et131x_hwaddr_init - set up the MAC Address on the ET1310 3955 * et131x_hwaddr_init - set up the MAC Address on the ET1310
3977 * @adapter: pointer to our private adapter structure 3956 * @adapter: pointer to our private adapter structure
3978 */ 3957 */
3979void et131x_hwaddr_init(struct et131x_adapter *adapter) 3958static void et131x_hwaddr_init(struct et131x_adapter *adapter)
3980{ 3959{
3981 /* If have our default mac from init and no mac address from 3960 /* If have our default mac from init and no mac address from
3982 * EEPROM then we need to generate the last octet and set it on the 3961 * EEPROM then we need to generate the last octet and set it on the
@@ -4022,24 +4001,31 @@ void et131x_hwaddr_init(struct et131x_adapter *adapter)
4022static int et131x_pci_init(struct et131x_adapter *adapter, 4001static int et131x_pci_init(struct et131x_adapter *adapter,
4023 struct pci_dev *pdev) 4002 struct pci_dev *pdev)
4024{ 4003{
4025 int i; 4004 int cap = pci_pcie_cap(pdev);
4026 u8 max_payload; 4005 u16 max_payload;
4027 u8 read_size_reg; 4006 u16 ctl;
4007 int i, rc;
4028 4008
4029 if (et131x_init_eeprom(adapter) < 0) 4009 rc = et131x_init_eeprom(adapter);
4030 return -EIO; 4010 if (rc < 0)
4011 goto out;
4031 4012
4013 if (!cap) {
4014 dev_err(&pdev->dev, "Missing PCIe capabilities\n");
4015 goto err_out;
4016 }
4017
4032 /* Let's set up the PORT LOGIC Register. First we need to know what 4018 /* Let's set up the PORT LOGIC Register. First we need to know what
4033 * the max_payload_size is 4019 * the max_payload_size is
4034 */ 4020 */
4035 if (pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &max_payload)) { 4021 if (pci_read_config_word(pdev, cap + PCI_EXP_DEVCAP, &max_payload)) {
4036 dev_err(&pdev->dev, 4022 dev_err(&pdev->dev,
4037 "Could not read PCI config space for Max Payload Size\n"); 4023 "Could not read PCI config space for Max Payload Size\n");
4038 return -EIO; 4024 goto err_out;
4039 } 4025 }
4040 4026
4041 /* Program the Ack/Nak latency and replay timers */ 4027 /* Program the Ack/Nak latency and replay timers */
4042 max_payload &= 0x07; /* Only the lower 3 bits are valid */ 4028 max_payload &= 0x07;
4043 4029
4044 if (max_payload < 2) { 4030 if (max_payload < 2) {
4045 static const u16 acknak[2] = { 0x76, 0xD0 }; 4031 static const u16 acknak[2] = { 0x76, 0xD0 };
@@ -4049,13 +4035,13 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
4049 acknak[max_payload])) { 4035 acknak[max_payload])) {
4050 dev_err(&pdev->dev, 4036 dev_err(&pdev->dev,
4051 "Could not write PCI config space for ACK/NAK\n"); 4037 "Could not write PCI config space for ACK/NAK\n");
4052 return -EIO; 4038 goto err_out;
4053 } 4039 }
4054 if (pci_write_config_word(pdev, ET1310_PCI_REPLAY, 4040 if (pci_write_config_word(pdev, ET1310_PCI_REPLAY,
4055 replay[max_payload])) { 4041 replay[max_payload])) {
4056 dev_err(&pdev->dev, 4042 dev_err(&pdev->dev,
4057 "Could not write PCI config space for Replay Timer\n"); 4043 "Could not write PCI config space for Replay Timer\n");
4058 return -EIO; 4044 goto err_out;
4059 } 4045 }
4060 } 4046 }
4061 4047
@@ -4065,23 +4051,22 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
4065 if (pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11)) { 4051 if (pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11)) {
4066 dev_err(&pdev->dev, 4052 dev_err(&pdev->dev,
4067 "Could not write PCI config space for Latency Timers\n"); 4053 "Could not write PCI config space for Latency Timers\n");
4068 return -EIO; 4054 goto err_out;
4069 } 4055 }
4070 4056
4071 /* Change the max read size to 2k */ 4057 /* Change the max read size to 2k */
4072 if (pci_read_config_byte(pdev, 0x51, &read_size_reg)) { 4058 if (pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl)) {
4073 dev_err(&pdev->dev, 4059 dev_err(&pdev->dev,
4074 "Could not read PCI config space for Max read size\n"); 4060 "Could not read PCI config space for Max read size\n");
4075 return -EIO; 4061 goto err_out;
4076 } 4062 }
4077 4063
4078 read_size_reg &= 0x8f; 4064 ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | ( 0x04 << 12);
4079 read_size_reg |= 0x40;
4080 4065
4081 if (pci_write_config_byte(pdev, 0x51, read_size_reg)) { 4066 if (pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl)) {
4082 dev_err(&pdev->dev, 4067 dev_err(&pdev->dev,
4083 "Could not write PCI config space for Max read size\n"); 4068 "Could not write PCI config space for Max read size\n");
4084 return -EIO; 4069 goto err_out;
4085 } 4070 }
4086 4071
4087 /* Get MAC address from config space if an eeprom exists, otherwise 4072 /* Get MAC address from config space if an eeprom exists, otherwise
@@ -4096,11 +4081,15 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
4096 if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i, 4081 if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
4097 adapter->rom_addr + i)) { 4082 adapter->rom_addr + i)) {
4098 dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n"); 4083 dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n");
4099 return -EIO; 4084 goto err_out;
4100 } 4085 }
4101 } 4086 }
4102 memcpy(adapter->addr, adapter->rom_addr, ETH_ALEN); 4087 memcpy(adapter->addr, adapter->rom_addr, ETH_ALEN);
4103 return 0; 4088out:
4089 return rc;
4090err_out:
4091 rc = -EIO;
4092 goto out;
4104} 4093}
4105 4094
4106/** 4095/**
@@ -4110,7 +4099,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
4110 * The routine called when the error timer expires, to track the number of 4099 * The routine called when the error timer expires, to track the number of
4111 * recurring errors. 4100 * recurring errors.
4112 */ 4101 */
4113void et131x_error_timer_handler(unsigned long data) 4102static void et131x_error_timer_handler(unsigned long data)
4114{ 4103{
4115 struct et131x_adapter *adapter = (struct et131x_adapter *) data; 4104 struct et131x_adapter *adapter = (struct et131x_adapter *) data;
4116 struct phy_device *phydev = adapter->phydev; 4105 struct phy_device *phydev = adapter->phydev;
@@ -4153,7 +4142,7 @@ void et131x_error_timer_handler(unsigned long data)
4153 * 4142 *
4154 * Allocate all the memory blocks for send, receive and others. 4143 * Allocate all the memory blocks for send, receive and others.
4155 */ 4144 */
4156int et131x_adapter_memory_alloc(struct et131x_adapter *adapter) 4145static int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
4157{ 4146{
4158 int status; 4147 int status;
4159 4148
@@ -4188,7 +4177,7 @@ int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
4188 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx 4177 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
4189 * @adapter: pointer to our private adapter structure 4178 * @adapter: pointer to our private adapter structure
4190 */ 4179 */
4191void et131x_adapter_memory_free(struct et131x_adapter *adapter) 4180static void et131x_adapter_memory_free(struct et131x_adapter *adapter)
4192{ 4181{
4193 /* Free DMA memory */ 4182 /* Free DMA memory */
4194 et131x_tx_dma_memory_free(adapter); 4183 et131x_tx_dma_memory_free(adapter);
@@ -4364,10 +4353,6 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
4364 adapter->pdev = pci_dev_get(pdev); 4353 adapter->pdev = pci_dev_get(pdev);
4365 adapter->netdev = netdev; 4354 adapter->netdev = netdev;
4366 4355
4367 /* Do the same for the netdev struct */
4368 netdev->irq = pdev->irq;
4369 netdev->base_addr = pci_resource_start(pdev, 0);
4370
4371 /* Initialize spinlocks here */ 4356 /* Initialize spinlocks here */
4372 spin_lock_init(&adapter->lock); 4357 spin_lock_init(&adapter->lock);
4373 spin_lock_init(&adapter->tcb_send_qlock); 4358 spin_lock_init(&adapter->tcb_send_qlock);
@@ -4400,6 +4385,7 @@ static void __devexit et131x_pci_remove(struct pci_dev *pdev)
4400 struct et131x_adapter *adapter = netdev_priv(netdev); 4385 struct et131x_adapter *adapter = netdev_priv(netdev);
4401 4386
4402 unregister_netdev(netdev); 4387 unregister_netdev(netdev);
4388 phy_disconnect(adapter->phydev);
4403 mdiobus_unregister(adapter->mii_bus); 4389 mdiobus_unregister(adapter->mii_bus);
4404 kfree(adapter->mii_bus->irq); 4390 kfree(adapter->mii_bus->irq);
4405 mdiobus_free(adapter->mii_bus); 4391 mdiobus_free(adapter->mii_bus);
@@ -4417,7 +4403,7 @@ static void __devexit et131x_pci_remove(struct pci_dev *pdev)
4417 * et131x_up - Bring up a device for use. 4403 * et131x_up - Bring up a device for use.
4418 * @netdev: device to be opened 4404 * @netdev: device to be opened
4419 */ 4405 */
4420void et131x_up(struct net_device *netdev) 4406static void et131x_up(struct net_device *netdev)
4421{ 4407{
4422 struct et131x_adapter *adapter = netdev_priv(netdev); 4408 struct et131x_adapter *adapter = netdev_priv(netdev);
4423 4409
@@ -4429,7 +4415,7 @@ void et131x_up(struct net_device *netdev)
4429 * et131x_down - Bring down the device 4415 * et131x_down - Bring down the device
4430 * @netdev: device to be broght down 4416 * @netdev: device to be broght down
4431 */ 4417 */
4432void et131x_down(struct net_device *netdev) 4418static void et131x_down(struct net_device *netdev)
4433{ 4419{
4434 struct et131x_adapter *adapter = netdev_priv(netdev); 4420 struct et131x_adapter *adapter = netdev_priv(netdev);
4435 4421
@@ -4475,8 +4461,6 @@ static SIMPLE_DEV_PM_OPS(et131x_pm_ops, et131x_suspend, et131x_resume);
4475#define ET131X_PM_OPS NULL 4461#define ET131X_PM_OPS NULL
4476#endif 4462#endif
4477 4463
4478/* ISR functions */
4479
4480/** 4464/**
4481 * et131x_isr - The Interrupt Service Routine for the driver. 4465 * et131x_isr - The Interrupt Service Routine for the driver.
4482 * @irq: the IRQ on which the interrupt was received. 4466 * @irq: the IRQ on which the interrupt was received.
@@ -4573,7 +4557,7 @@ out:
4573 * scheduled to run in a deferred context by the ISR. This is where the ISR's 4557 * scheduled to run in a deferred context by the ISR. This is where the ISR's
4574 * work actually gets done. 4558 * work actually gets done.
4575 */ 4559 */
4576void et131x_isr_handler(struct work_struct *work) 4560static void et131x_isr_handler(struct work_struct *work)
4577{ 4561{
4578 struct et131x_adapter *adapter = 4562 struct et131x_adapter *adapter =
4579 container_of(work, struct et131x_adapter, task); 4563 container_of(work, struct et131x_adapter, task);
@@ -4774,8 +4758,6 @@ void et131x_isr_handler(struct work_struct *work)
4774 et131x_enable_interrupts(adapter); 4758 et131x_enable_interrupts(adapter);
4775} 4759}
4776 4760
4777/* NETDEV functions */
4778
4779/** 4761/**
4780 * et131x_stats - Return the current device statistics. 4762 * et131x_stats - Return the current device statistics.
4781 * @netdev: device whose stats are being queried 4763 * @netdev: device whose stats are being queried
@@ -4829,10 +4811,12 @@ static struct net_device_stats *et131x_stats(struct net_device *netdev)
4829 * 4811 *
4830 * Returns 0 on success, errno on failure (as defined in errno.h) 4812 * Returns 0 on success, errno on failure (as defined in errno.h)
4831 */ 4813 */
4832int et131x_open(struct net_device *netdev) 4814static int et131x_open(struct net_device *netdev)
4833{ 4815{
4834 int result = 0;
4835 struct et131x_adapter *adapter = netdev_priv(netdev); 4816 struct et131x_adapter *adapter = netdev_priv(netdev);
4817 struct pci_dev *pdev = adapter->pdev;
4818 unsigned int irq = pdev->irq;
4819 int result;
4836 4820
4837 /* Start the timer to track NIC errors */ 4821 /* Start the timer to track NIC errors */
4838 init_timer(&adapter->error_timer); 4822 init_timer(&adapter->error_timer);
@@ -4841,12 +4825,9 @@ int et131x_open(struct net_device *netdev)
4841 adapter->error_timer.data = (unsigned long)adapter; 4825 adapter->error_timer.data = (unsigned long)adapter;
4842 add_timer(&adapter->error_timer); 4826 add_timer(&adapter->error_timer);
4843 4827
4844 /* Register our IRQ */ 4828 result = request_irq(irq, et131x_isr, IRQF_SHARED, netdev->name, netdev);
4845 result = request_irq(netdev->irq, et131x_isr, IRQF_SHARED,
4846 netdev->name, netdev);
4847 if (result) { 4829 if (result) {
4848 dev_err(&adapter->pdev->dev, "could not register IRQ %d\n", 4830 dev_err(&pdev->dev, "could not register IRQ %d\n", irq);
4849 netdev->irq);
4850 return result; 4831 return result;
4851 } 4832 }
4852 4833
@@ -4863,14 +4844,14 @@ int et131x_open(struct net_device *netdev)
4863 * 4844 *
4864 * Returns 0 on success, errno on failure (as defined in errno.h) 4845 * Returns 0 on success, errno on failure (as defined in errno.h)
4865 */ 4846 */
4866int et131x_close(struct net_device *netdev) 4847static int et131x_close(struct net_device *netdev)
4867{ 4848{
4868 struct et131x_adapter *adapter = netdev_priv(netdev); 4849 struct et131x_adapter *adapter = netdev_priv(netdev);
4869 4850
4870 et131x_down(netdev); 4851 et131x_down(netdev);
4871 4852
4872 adapter->flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE; 4853 adapter->flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE;
4873 free_irq(netdev->irq, netdev); 4854 free_irq(adapter->pdev->irq, netdev);
4874 4855
4875 /* Stop the error timer */ 4856 /* Stop the error timer */
4876 return del_timer_sync(&adapter->error_timer); 4857 return del_timer_sync(&adapter->error_timer);
@@ -4905,8 +4886,8 @@ static int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf,
4905 */ 4886 */
4906static int et131x_set_packet_filter(struct et131x_adapter *adapter) 4887static int et131x_set_packet_filter(struct et131x_adapter *adapter)
4907{ 4888{
4889 int filter = adapter->packet_filter;
4908 int status = 0; 4890 int status = 0;
4909 uint32_t filter = adapter->packet_filter;
4910 u32 ctrl; 4891 u32 ctrl;
4911 u32 pf_ctrl; 4892 u32 pf_ctrl;
4912 4893
@@ -4968,7 +4949,7 @@ static int et131x_set_packet_filter(struct et131x_adapter *adapter)
4968static void et131x_multicast(struct net_device *netdev) 4949static void et131x_multicast(struct net_device *netdev)
4969{ 4950{
4970 struct et131x_adapter *adapter = netdev_priv(netdev); 4951 struct et131x_adapter *adapter = netdev_priv(netdev);
4971 uint32_t packet_filter = 0; 4952 int packet_filter;
4972 unsigned long flags; 4953 unsigned long flags;
4973 struct netdev_hw_addr *ha; 4954 struct netdev_hw_addr *ha;
4974 int i; 4955 int i;
@@ -5249,40 +5230,6 @@ static const struct net_device_ops et131x_netdev_ops = {
5249}; 5230};
5250 5231
5251/** 5232/**
5252 * et131x_device_alloc
5253 *
5254 * Returns pointer to the allocated and initialized net_device struct for
5255 * this device.
5256 *
5257 * Create instances of net_device and wl_private for the new adapter and
5258 * register the device's entry points in the net_device structure.
5259 */
5260struct net_device *et131x_device_alloc(void)
5261{
5262 struct net_device *netdev;
5263
5264 /* Alloc net_device and adapter structs */
5265 netdev = alloc_etherdev(sizeof(struct et131x_adapter));
5266
5267 if (!netdev) {
5268 printk(KERN_ERR "et131x: Alloc of net_device struct failed\n");
5269 return NULL;
5270 }
5271
5272 /*
5273 * Setup the function registration table (and other data) for a
5274 * net_device
5275 */
5276 netdev->watchdog_timeo = ET131X_TX_TIMEOUT;
5277 netdev->netdev_ops = &et131x_netdev_ops;
5278
5279 /* Poll? */
5280 /* netdev->poll = &et131x_poll; */
5281 /* netdev->poll_controller = &et131x_poll_controller; */
5282 return netdev;
5283}
5284
5285/**
5286 * et131x_pci_setup - Perform device initialization 5233 * et131x_pci_setup - Perform device initialization
5287 * @pdev: a pointer to the device's pci_dev structure 5234 * @pdev: a pointer to the device's pci_dev structure
5288 * @ent: this device's entry in the pci_device_id table 5235 * @ent: this device's entry in the pci_device_id table
@@ -5297,24 +5244,26 @@ struct net_device *et131x_device_alloc(void)
5297static int __devinit et131x_pci_setup(struct pci_dev *pdev, 5244static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5298 const struct pci_device_id *ent) 5245 const struct pci_device_id *ent)
5299{ 5246{
5300 int result;
5301 struct net_device *netdev; 5247 struct net_device *netdev;
5302 struct et131x_adapter *adapter; 5248 struct et131x_adapter *adapter;
5249 int rc;
5303 int ii; 5250 int ii;
5304 5251
5305 result = pci_enable_device(pdev); 5252 rc = pci_enable_device(pdev);
5306 if (result) { 5253 if (rc < 0) {
5307 dev_err(&pdev->dev, "pci_enable_device() failed\n"); 5254 dev_err(&pdev->dev, "pci_enable_device() failed\n");
5308 goto err_out; 5255 goto out;
5309 } 5256 }
5310 5257
5311 /* Perform some basic PCI checks */ 5258 /* Perform some basic PCI checks */
5312 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 5259 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
5313 dev_err(&pdev->dev, "Can't find PCI device's base address\n"); 5260 dev_err(&pdev->dev, "Can't find PCI device's base address\n");
5261 rc = -ENODEV;
5314 goto err_disable; 5262 goto err_disable;
5315 } 5263 }
5316 5264
5317 if (pci_request_regions(pdev, DRIVER_NAME)) { 5265 rc = pci_request_regions(pdev, DRIVER_NAME);
5266 if (rc < 0) {
5318 dev_err(&pdev->dev, "Can't get PCI resources\n"); 5267 dev_err(&pdev->dev, "Can't get PCI resources\n");
5319 goto err_disable; 5268 goto err_disable;
5320 } 5269 }
@@ -5323,46 +5272,50 @@ static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5323 5272
5324 /* Check the DMA addressing support of this device */ 5273 /* Check the DMA addressing support of this device */
5325 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { 5274 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
5326 result = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 5275 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
5327 if (result) { 5276 if (rc < 0) {
5328 dev_err(&pdev->dev, 5277 dev_err(&pdev->dev,
5329 "Unable to obtain 64 bit DMA for consistent allocations\n"); 5278 "Unable to obtain 64 bit DMA for consistent allocations\n");
5330 goto err_release_res; 5279 goto err_release_res;
5331 } 5280 }
5332 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { 5281 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
5333 result = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 5282 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5334 if (result) { 5283 if (rc < 0) {
5335 dev_err(&pdev->dev, 5284 dev_err(&pdev->dev,
5336 "Unable to obtain 32 bit DMA for consistent allocations\n"); 5285 "Unable to obtain 32 bit DMA for consistent allocations\n");
5337 goto err_release_res; 5286 goto err_release_res;
5338 } 5287 }
5339 } else { 5288 } else {
5340 dev_err(&pdev->dev, "No usable DMA addressing method\n"); 5289 dev_err(&pdev->dev, "No usable DMA addressing method\n");
5341 result = -EIO; 5290 rc = -EIO;
5342 goto err_release_res; 5291 goto err_release_res;
5343 } 5292 }
5344 5293
5345 /* Allocate netdev and private adapter structs */ 5294 /* Allocate netdev and private adapter structs */
5346 netdev = et131x_device_alloc(); 5295 netdev = alloc_etherdev(sizeof(struct et131x_adapter));
5347 if (!netdev) { 5296 if (!netdev) {
5348 dev_err(&pdev->dev, "Couldn't alloc netdev struct\n"); 5297 dev_err(&pdev->dev, "Couldn't alloc netdev struct\n");
5349 result = -ENOMEM; 5298 rc = -ENOMEM;
5350 goto err_release_res; 5299 goto err_release_res;
5351 } 5300 }
5352 5301
5302 netdev->watchdog_timeo = ET131X_TX_TIMEOUT;
5303 netdev->netdev_ops = &et131x_netdev_ops;
5304
5353 SET_NETDEV_DEV(netdev, &pdev->dev); 5305 SET_NETDEV_DEV(netdev, &pdev->dev);
5354 et131x_set_ethtool_ops(netdev); 5306 et131x_set_ethtool_ops(netdev);
5355 5307
5356 adapter = et131x_adapter_init(netdev, pdev); 5308 adapter = et131x_adapter_init(netdev, pdev);
5357 5309
5358 /* Initialise the PCI setup for the device */ 5310 rc = et131x_pci_init(adapter, pdev);
5359 et131x_pci_init(adapter, pdev); 5311 if (rc < 0)
5312 goto err_free_dev;
5360 5313
5361 /* Map the bus-relative registers to system virtual memory */ 5314 /* Map the bus-relative registers to system virtual memory */
5362 adapter->regs = pci_ioremap_bar(pdev, 0); 5315 adapter->regs = pci_ioremap_bar(pdev, 0);
5363 if (!adapter->regs) { 5316 if (!adapter->regs) {
5364 dev_err(&pdev->dev, "Cannot map device registers\n"); 5317 dev_err(&pdev->dev, "Cannot map device registers\n");
5365 result = -ENOMEM; 5318 rc = -ENOMEM;
5366 goto err_free_dev; 5319 goto err_free_dev;
5367 } 5320 }
5368 5321
@@ -5376,8 +5329,8 @@ static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5376 et131x_disable_interrupts(adapter); 5329 et131x_disable_interrupts(adapter);
5377 5330
5378 /* Allocate DMA memory */ 5331 /* Allocate DMA memory */
5379 result = et131x_adapter_memory_alloc(adapter); 5332 rc = et131x_adapter_memory_alloc(adapter);
5380 if (result) { 5333 if (rc < 0) {
5381 dev_err(&pdev->dev, "Could not alloc adapater memory (DMA)\n"); 5334 dev_err(&pdev->dev, "Could not alloc adapater memory (DMA)\n");
5382 goto err_iounmap; 5335 goto err_iounmap;
5383 } 5336 }
@@ -5395,6 +5348,8 @@ static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5395 adapter->boot_coma = 0; 5348 adapter->boot_coma = 0;
5396 et1310_disable_phy_coma(adapter); 5349 et1310_disable_phy_coma(adapter);
5397 5350
5351 rc = -ENOMEM;
5352
5398 /* Setup the mii_bus struct */ 5353 /* Setup the mii_bus struct */
5399 adapter->mii_bus = mdiobus_alloc(); 5354 adapter->mii_bus = mdiobus_alloc();
5400 if (!adapter->mii_bus) { 5355 if (!adapter->mii_bus) {
@@ -5418,13 +5373,14 @@ static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5418 for (ii = 0; ii < PHY_MAX_ADDR; ii++) 5373 for (ii = 0; ii < PHY_MAX_ADDR; ii++)
5419 adapter->mii_bus->irq[ii] = PHY_POLL; 5374 adapter->mii_bus->irq[ii] = PHY_POLL;
5420 5375
5421 if (mdiobus_register(adapter->mii_bus)) { 5376 rc = mdiobus_register(adapter->mii_bus);
5377 if (rc < 0) {
5422 dev_err(&pdev->dev, "failed to register MII bus\n"); 5378 dev_err(&pdev->dev, "failed to register MII bus\n");
5423 mdiobus_free(adapter->mii_bus);
5424 goto err_mdio_free_irq; 5379 goto err_mdio_free_irq;
5425 } 5380 }
5426 5381
5427 if (et131x_mii_probe(netdev)) { 5382 rc = et131x_mii_probe(netdev);
5383 if (rc < 0) {
5428 dev_err(&pdev->dev, "failed to probe MII bus\n"); 5384 dev_err(&pdev->dev, "failed to probe MII bus\n");
5429 goto err_mdio_unregister; 5385 goto err_mdio_unregister;
5430 } 5386 }
@@ -5440,10 +5396,10 @@ static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5440 */ 5396 */
5441 5397
5442 /* Register the net_device struct with the Linux network layer */ 5398 /* Register the net_device struct with the Linux network layer */
5443 result = register_netdev(netdev); 5399 rc = register_netdev(netdev);
5444 if (result != 0) { 5400 if (rc < 0) {
5445 dev_err(&pdev->dev, "register_netdev() failed\n"); 5401 dev_err(&pdev->dev, "register_netdev() failed\n");
5446 goto err_mdio_unregister; 5402 goto err_phy_disconnect;
5447 } 5403 }
5448 5404
5449 /* Register the net_device struct with the PCI subsystem. Save a copy 5405 /* Register the net_device struct with the PCI subsystem. Save a copy
@@ -5451,10 +5407,11 @@ static int __devinit et131x_pci_setup(struct pci_dev *pdev,
5451 * been initialized, just in case it needs to be quickly restored. 5407 * been initialized, just in case it needs to be quickly restored.
5452 */ 5408 */
5453 pci_set_drvdata(pdev, netdev); 5409 pci_set_drvdata(pdev, netdev);
5454 pci_save_state(adapter->pdev); 5410out:
5455 5411 return rc;
5456 return result;
5457 5412
5413err_phy_disconnect:
5414 phy_disconnect(adapter->phydev);
5458err_mdio_unregister: 5415err_mdio_unregister:
5459 mdiobus_unregister(adapter->mii_bus); 5416 mdiobus_unregister(adapter->mii_bus);
5460err_mdio_free_irq: 5417err_mdio_free_irq:
@@ -5472,8 +5429,7 @@ err_release_res:
5472 pci_release_regions(pdev); 5429 pci_release_regions(pdev);
5473err_disable: 5430err_disable:
5474 pci_disable_device(pdev); 5431 pci_disable_device(pdev);
5475err_out: 5432 goto out;
5476 return result;
5477} 5433}
5478 5434
5479static DEFINE_PCI_DEVICE_TABLE(et131x_pci_table) = { 5435static DEFINE_PCI_DEVICE_TABLE(et131x_pci_table) = {
diff --git a/drivers/staging/frontier/tranzport.c b/drivers/staging/frontier/tranzport.c
index c263284ddc0e..cf47a5d191fc 100644
--- a/drivers/staging/frontier/tranzport.c
+++ b/drivers/staging/frontier/tranzport.c
@@ -199,7 +199,7 @@ static void usb_tranzport_abort_transfers(struct usb_tranzport *dev)
199 struct usb_interface *intf = to_usb_interface(dev); \ 199 struct usb_interface *intf = to_usb_interface(dev); \
200 struct usb_tranzport *t = usb_get_intfdata(intf); \ 200 struct usb_tranzport *t = usb_get_intfdata(intf); \
201 unsigned long temp; \ 201 unsigned long temp; \
202 if (strict_strtoul(buf, 10, &temp)) \ 202 if (kstrtoul(buf, 10, &temp)) \
203 return -EINVAL; \ 203 return -EINVAL; \
204 t->value = temp; \ 204 t->value = temp; \
205 return count; \ 205 return count; \
diff --git a/drivers/staging/gma500/Kconfig b/drivers/staging/gma500/Kconfig
index bfe2166acda6..c7a2b3bc0a18 100644
--- a/drivers/staging/gma500/Kconfig
+++ b/drivers/staging/gma500/Kconfig
@@ -1,6 +1,6 @@
1config DRM_PSB 1config DRM_PSB
2 tristate "Intel GMA5/600 KMS Framebuffer" 2 tristate "Intel GMA5/600 KMS Framebuffer"
3 depends on DRM && PCI && X86 3 depends on DRM && PCI && X86 && BROKEN
4 select FB_CFB_COPYAREA 4 select FB_CFB_COPYAREA
5 select FB_CFB_FILLRECT 5 select FB_CFB_FILLRECT
6 select FB_CFB_IMAGEBLIT 6 select FB_CFB_IMAGEBLIT
diff --git a/drivers/staging/gma500/power.c b/drivers/staging/gma500/power.c
index 436fe9733b16..408257038335 100644
--- a/drivers/staging/gma500/power.c
+++ b/drivers/staging/gma500/power.c
@@ -266,7 +266,7 @@ bool gma_power_begin(struct drm_device *dev, bool force_on)
266 ret = gma_resume_pci(dev->pdev); 266 ret = gma_resume_pci(dev->pdev);
267 if (ret == 0) { 267 if (ret == 0) {
268 /* FIXME: we want to defer this for Medfield/Oaktrail */ 268 /* FIXME: we want to defer this for Medfield/Oaktrail */
269 gma_resume_display(dev); 269 gma_resume_display(dev->pdev);
270 psb_irq_preinstall(dev); 270 psb_irq_preinstall(dev);
271 psb_irq_postinstall(dev); 271 psb_irq_postinstall(dev);
272 pm_runtime_get(&dev->pdev->dev); 272 pm_runtime_get(&dev->pdev->dev);
diff --git a/drivers/staging/hv/Kconfig b/drivers/staging/hv/Kconfig
index 072185ebe95b..60ac479a2909 100644
--- a/drivers/staging/hv/Kconfig
+++ b/drivers/staging/hv/Kconfig
@@ -3,15 +3,3 @@ config HYPERV_STORAGE
3 depends on HYPERV && SCSI 3 depends on HYPERV && SCSI
4 help 4 help
5 Select this option to enable the Hyper-V virtual storage driver. 5 Select this option to enable the Hyper-V virtual storage driver.
6
7config HYPERV_NET
8 tristate "Microsoft Hyper-V virtual network driver"
9 depends on HYPERV && NET
10 help
11 Select this option to enable the Hyper-V virtual network driver.
12
13config HYPERV_MOUSE
14 tristate "Microsoft Hyper-V mouse driver"
15 depends on HYPERV && HID
16 help
17 Select this option to enable the Hyper-V mouse driver.
diff --git a/drivers/staging/hv/Makefile b/drivers/staging/hv/Makefile
index 0f55ceee919b..af95a6b7e436 100644
--- a/drivers/staging/hv/Makefile
+++ b/drivers/staging/hv/Makefile
@@ -1,6 +1,3 @@
1obj-$(CONFIG_HYPERV_STORAGE) += hv_storvsc.o 1obj-$(CONFIG_HYPERV_STORAGE) += hv_storvsc.o
2obj-$(CONFIG_HYPERV_NET) += hv_netvsc.o
3obj-$(CONFIG_HYPERV_MOUSE) += hv_mouse.o
4 2
5hv_storvsc-y := storvsc_drv.o 3hv_storvsc-y := storvsc_drv.o
6hv_netvsc-y := netvsc_drv.o netvsc.o rndis_filter.o
diff --git a/drivers/staging/hv/TODO b/drivers/staging/hv/TODO
index ed4d63619df2..dea7d92dfdc1 100644
--- a/drivers/staging/hv/TODO
+++ b/drivers/staging/hv/TODO
@@ -1,7 +1,5 @@
1TODO: 1TODO:
2 - audit the network driver
3 - audit the scsi driver 2 - audit the scsi driver
4 3
5Please send patches for this code to Greg Kroah-Hartman <gregkh@suse.de>, 4Please send patches for this code to Greg Kroah-Hartman <gregkh@suse.de>,
6Hank Janssen <hjanssen@microsoft.com>, Haiyang Zhang <haiyangz@microsoft.com>, 5Haiyang Zhang <haiyangz@microsoft.com>, and K. Y. Srinivasan <kys@microsoft.com>
7K. Y. Srinivasan <kys@microsoft.com>
diff --git a/drivers/staging/hv/hv_mouse.c b/drivers/staging/hv/hv_mouse.c
deleted file mode 100644
index ccd39c70c527..000000000000
--- a/drivers/staging/hv/hv_mouse.c
+++ /dev/null
@@ -1,599 +0,0 @@
1/*
2 * Copyright (c) 2009, Citrix Systems, Inc.
3 * Copyright (c) 2010, Microsoft Corporation.
4 * Copyright (c) 2011, Novell Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/delay.h>
18#include <linux/device.h>
19#include <linux/workqueue.h>
20#include <linux/sched.h>
21#include <linux/wait.h>
22#include <linux/input.h>
23#include <linux/hid.h>
24#include <linux/hiddev.h>
25#include <linux/hyperv.h>
26
27
28struct hv_input_dev_info {
29 unsigned int size;
30 unsigned short vendor;
31 unsigned short product;
32 unsigned short version;
33 unsigned short reserved[11];
34};
35
36/* The maximum size of a synthetic input message. */
37#define SYNTHHID_MAX_INPUT_REPORT_SIZE 16
38
39/*
40 * Current version
41 *
42 * History:
43 * Beta, RC < 2008/1/22 1,0
44 * RC > 2008/1/22 2,0
45 */
46#define SYNTHHID_INPUT_VERSION_MAJOR 2
47#define SYNTHHID_INPUT_VERSION_MINOR 0
48#define SYNTHHID_INPUT_VERSION (SYNTHHID_INPUT_VERSION_MINOR | \
49 (SYNTHHID_INPUT_VERSION_MAJOR << 16))
50
51
52#pragma pack(push, 1)
53/*
54 * Message types in the synthetic input protocol
55 */
56enum synthhid_msg_type {
57 SYNTH_HID_PROTOCOL_REQUEST,
58 SYNTH_HID_PROTOCOL_RESPONSE,
59 SYNTH_HID_INITIAL_DEVICE_INFO,
60 SYNTH_HID_INITIAL_DEVICE_INFO_ACK,
61 SYNTH_HID_INPUT_REPORT,
62 SYNTH_HID_MAX
63};
64
65/*
66 * Basic message structures.
67 */
68struct synthhid_msg_hdr {
69 enum synthhid_msg_type type;
70 u32 size;
71};
72
73struct synthhid_msg {
74 struct synthhid_msg_hdr header;
75 char data[1]; /* Enclosed message */
76};
77
78union synthhid_version {
79 struct {
80 u16 minor_version;
81 u16 major_version;
82 };
83 u32 version;
84};
85
86/*
87 * Protocol messages
88 */
89struct synthhid_protocol_request {
90 struct synthhid_msg_hdr header;
91 union synthhid_version version_requested;
92};
93
94struct synthhid_protocol_response {
95 struct synthhid_msg_hdr header;
96 union synthhid_version version_requested;
97 unsigned char approved;
98};
99
100struct synthhid_device_info {
101 struct synthhid_msg_hdr header;
102 struct hv_input_dev_info hid_dev_info;
103 struct hid_descriptor hid_descriptor;
104};
105
106struct synthhid_device_info_ack {
107 struct synthhid_msg_hdr header;
108 unsigned char reserved;
109};
110
111struct synthhid_input_report {
112 struct synthhid_msg_hdr header;
113 char buffer[1];
114};
115
116#pragma pack(pop)
117
118#define INPUTVSC_SEND_RING_BUFFER_SIZE (10*PAGE_SIZE)
119#define INPUTVSC_RECV_RING_BUFFER_SIZE (10*PAGE_SIZE)
120
121#define NBITS(x) (((x)/BITS_PER_LONG)+1)
122
123enum pipe_prot_msg_type {
124 PIPE_MESSAGE_INVALID,
125 PIPE_MESSAGE_DATA,
126 PIPE_MESSAGE_MAXIMUM
127};
128
129
130struct pipe_prt_msg {
131 enum pipe_prot_msg_type type;
132 u32 size;
133 char data[1];
134};
135
136struct mousevsc_prt_msg {
137 enum pipe_prot_msg_type type;
138 u32 size;
139 union {
140 struct synthhid_protocol_request request;
141 struct synthhid_protocol_response response;
142 struct synthhid_device_info_ack ack;
143 };
144};
145
146/*
147 * Represents an mousevsc device
148 */
149struct mousevsc_dev {
150 struct hv_device *device;
151 unsigned char init_complete;
152 struct mousevsc_prt_msg protocol_req;
153 struct mousevsc_prt_msg protocol_resp;
154 /* Synchronize the request/response if needed */
155 struct completion wait_event;
156 int dev_info_status;
157
158 struct hid_descriptor *hid_desc;
159 unsigned char *report_desc;
160 u32 report_desc_size;
161 struct hv_input_dev_info hid_dev_info;
162 int connected;
163 struct hid_device *hid_device;
164};
165
166
167static struct mousevsc_dev *alloc_input_device(struct hv_device *device)
168{
169 struct mousevsc_dev *input_dev;
170
171 input_dev = kzalloc(sizeof(struct mousevsc_dev), GFP_KERNEL);
172
173 if (!input_dev)
174 return NULL;
175
176 input_dev->device = device;
177 hv_set_drvdata(device, input_dev);
178 init_completion(&input_dev->wait_event);
179
180 return input_dev;
181}
182
183static void free_input_device(struct mousevsc_dev *device)
184{
185 kfree(device->hid_desc);
186 kfree(device->report_desc);
187 hv_set_drvdata(device->device, NULL);
188 kfree(device);
189}
190
191
192static void mousevsc_on_receive_device_info(struct mousevsc_dev *input_device,
193 struct synthhid_device_info *device_info)
194{
195 int ret = 0;
196 struct hid_descriptor *desc;
197 struct mousevsc_prt_msg ack;
198
199 /* Assume success for now */
200 input_device->dev_info_status = 0;
201
202 memcpy(&input_device->hid_dev_info, &device_info->hid_dev_info,
203 sizeof(struct hv_input_dev_info));
204
205 desc = &device_info->hid_descriptor;
206 WARN_ON(desc->bLength == 0);
207
208 input_device->hid_desc = kzalloc(desc->bLength, GFP_ATOMIC);
209
210 if (!input_device->hid_desc)
211 goto cleanup;
212
213 memcpy(input_device->hid_desc, desc, desc->bLength);
214
215 input_device->report_desc_size = desc->desc[0].wDescriptorLength;
216 if (input_device->report_desc_size == 0)
217 goto cleanup;
218 input_device->report_desc = kzalloc(input_device->report_desc_size,
219 GFP_ATOMIC);
220
221 if (!input_device->report_desc)
222 goto cleanup;
223
224 memcpy(input_device->report_desc,
225 ((unsigned char *)desc) + desc->bLength,
226 desc->desc[0].wDescriptorLength);
227
228 /* Send the ack */
229 memset(&ack, 0, sizeof(struct mousevsc_prt_msg));
230
231 ack.type = PIPE_MESSAGE_DATA;
232 ack.size = sizeof(struct synthhid_device_info_ack);
233
234 ack.ack.header.type = SYNTH_HID_INITIAL_DEVICE_INFO_ACK;
235 ack.ack.header.size = 1;
236 ack.ack.reserved = 0;
237
238 ret = vmbus_sendpacket(input_device->device->channel,
239 &ack,
240 sizeof(struct pipe_prt_msg) - sizeof(unsigned char) +
241 sizeof(struct synthhid_device_info_ack),
242 (unsigned long)&ack,
243 VM_PKT_DATA_INBAND,
244 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
245 if (ret != 0)
246 goto cleanup;
247
248 complete(&input_device->wait_event);
249
250 return;
251
252cleanup:
253 kfree(input_device->hid_desc);
254 input_device->hid_desc = NULL;
255
256 kfree(input_device->report_desc);
257 input_device->report_desc = NULL;
258
259 input_device->dev_info_status = -1;
260 complete(&input_device->wait_event);
261}
262
263static void mousevsc_on_receive(struct hv_device *device,
264 struct vmpacket_descriptor *packet)
265{
266 struct pipe_prt_msg *pipe_msg;
267 struct synthhid_msg *hid_msg;
268 struct mousevsc_dev *input_dev = hv_get_drvdata(device);
269 struct synthhid_input_report *input_report;
270
271 pipe_msg = (struct pipe_prt_msg *)((unsigned long)packet +
272 (packet->offset8 << 3));
273
274 if (pipe_msg->type != PIPE_MESSAGE_DATA)
275 return;
276
277 hid_msg = (struct synthhid_msg *)&pipe_msg->data[0];
278
279 switch (hid_msg->header.type) {
280 case SYNTH_HID_PROTOCOL_RESPONSE:
281 memcpy(&input_dev->protocol_resp, pipe_msg,
282 pipe_msg->size + sizeof(struct pipe_prt_msg) -
283 sizeof(unsigned char));
284 complete(&input_dev->wait_event);
285 break;
286
287 case SYNTH_HID_INITIAL_DEVICE_INFO:
288 WARN_ON(pipe_msg->size < sizeof(struct hv_input_dev_info));
289
290 /*
291 * Parse out the device info into device attr,
292 * hid desc and report desc
293 */
294 mousevsc_on_receive_device_info(input_dev,
295 (struct synthhid_device_info *)&pipe_msg->data[0]);
296 break;
297 case SYNTH_HID_INPUT_REPORT:
298 input_report =
299 (struct synthhid_input_report *)&pipe_msg->data[0];
300 if (!input_dev->init_complete)
301 break;
302 hid_input_report(input_dev->hid_device,
303 HID_INPUT_REPORT, input_report->buffer,
304 input_report->header.size, 1);
305 break;
306 default:
307 pr_err("unsupported hid msg type - type %d len %d",
308 hid_msg->header.type, hid_msg->header.size);
309 break;
310 }
311
312}
313
314static void mousevsc_on_channel_callback(void *context)
315{
316 const int packetSize = 0x100;
317 int ret = 0;
318 struct hv_device *device = (struct hv_device *)context;
319
320 u32 bytes_recvd;
321 u64 req_id;
322 unsigned char packet[0x100];
323 struct vmpacket_descriptor *desc;
324 unsigned char *buffer = packet;
325 int bufferlen = packetSize;
326
327
328 do {
329 ret = vmbus_recvpacket_raw(device->channel, buffer,
330 bufferlen, &bytes_recvd, &req_id);
331
332 if (ret == 0) {
333 if (bytes_recvd > 0) {
334 desc = (struct vmpacket_descriptor *)buffer;
335
336 switch (desc->type) {
337 case VM_PKT_COMP:
338 break;
339
340 case VM_PKT_DATA_INBAND:
341 mousevsc_on_receive(
342 device, desc);
343 break;
344
345 default:
346 pr_err("unhandled packet type %d, tid %llx len %d\n",
347 desc->type,
348 req_id,
349 bytes_recvd);
350 break;
351 }
352
353 /* reset */
354 if (bufferlen > packetSize) {
355 kfree(buffer);
356
357 buffer = packet;
358 bufferlen = packetSize;
359 }
360 } else {
361 if (bufferlen > packetSize) {
362 kfree(buffer);
363
364 buffer = packet;
365 bufferlen = packetSize;
366 }
367 break;
368 }
369 } else if (ret == -ENOBUFS) {
370 /* Handle large packet */
371 bufferlen = bytes_recvd;
372 buffer = kzalloc(bytes_recvd, GFP_ATOMIC);
373
374 if (buffer == NULL) {
375 buffer = packet;
376 bufferlen = packetSize;
377 break;
378 }
379 }
380 } while (1);
381
382 return;
383}
384
385static int mousevsc_connect_to_vsp(struct hv_device *device)
386{
387 int ret = 0;
388 int t;
389 struct mousevsc_dev *input_dev = hv_get_drvdata(device);
390 struct mousevsc_prt_msg *request;
391 struct mousevsc_prt_msg *response;
392
393
394 request = &input_dev->protocol_req;
395
396 memset(request, 0, sizeof(struct mousevsc_prt_msg));
397
398 request->type = PIPE_MESSAGE_DATA;
399 request->size = sizeof(struct synthhid_protocol_request);
400
401 request->request.header.type = SYNTH_HID_PROTOCOL_REQUEST;
402 request->request.header.size = sizeof(unsigned int);
403 request->request.version_requested.version = SYNTHHID_INPUT_VERSION;
404
405
406 ret = vmbus_sendpacket(device->channel, request,
407 sizeof(struct pipe_prt_msg) -
408 sizeof(unsigned char) +
409 sizeof(struct synthhid_protocol_request),
410 (unsigned long)request,
411 VM_PKT_DATA_INBAND,
412 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
413 if (ret != 0)
414 goto cleanup;
415
416 t = wait_for_completion_timeout(&input_dev->wait_event, 5*HZ);
417 if (t == 0) {
418 ret = -ETIMEDOUT;
419 goto cleanup;
420 }
421
422 response = &input_dev->protocol_resp;
423
424 if (!response->response.approved) {
425 pr_err("synthhid protocol request failed (version %d)",
426 SYNTHHID_INPUT_VERSION);
427 ret = -ENODEV;
428 goto cleanup;
429 }
430
431 t = wait_for_completion_timeout(&input_dev->wait_event, 5*HZ);
432 if (t == 0) {
433 ret = -ETIMEDOUT;
434 goto cleanup;
435 }
436
437 /*
438 * We should have gotten the device attr, hid desc and report
439 * desc at this point
440 */
441 if (input_dev->dev_info_status)
442 ret = -ENOMEM;
443
444cleanup:
445
446 return ret;
447}
448
449static int mousevsc_hid_open(struct hid_device *hid)
450{
451 return 0;
452}
453
454static void mousevsc_hid_close(struct hid_device *hid)
455{
456}
457
458static struct hid_ll_driver mousevsc_ll_driver = {
459 .open = mousevsc_hid_open,
460 .close = mousevsc_hid_close,
461};
462
463static struct hid_driver mousevsc_hid_driver;
464
465static void reportdesc_callback(struct hv_device *dev, void *packet, u32 len)
466{
467 struct hid_device *hid_dev;
468 struct mousevsc_dev *input_device = hv_get_drvdata(dev);
469
470 hid_dev = hid_allocate_device();
471 if (IS_ERR(hid_dev))
472 return;
473
474 hid_dev->ll_driver = &mousevsc_ll_driver;
475 hid_dev->driver = &mousevsc_hid_driver;
476
477 if (hid_parse_report(hid_dev, packet, len))
478 return;
479
480 hid_dev->bus = BUS_VIRTUAL;
481 hid_dev->vendor = input_device->hid_dev_info.vendor;
482 hid_dev->product = input_device->hid_dev_info.product;
483 hid_dev->version = input_device->hid_dev_info.version;
484
485 sprintf(hid_dev->name, "%s", "Microsoft Vmbus HID-compliant Mouse");
486
487 if (!hidinput_connect(hid_dev, 0)) {
488 hid_dev->claimed |= HID_CLAIMED_INPUT;
489
490 input_device->connected = 1;
491
492 }
493
494 input_device->hid_device = hid_dev;
495}
496
497static int mousevsc_on_device_add(struct hv_device *device)
498{
499 int ret = 0;
500 struct mousevsc_dev *input_dev;
501
502 input_dev = alloc_input_device(device);
503
504 if (!input_dev)
505 return -ENOMEM;
506
507 input_dev->init_complete = false;
508
509 ret = vmbus_open(device->channel,
510 INPUTVSC_SEND_RING_BUFFER_SIZE,
511 INPUTVSC_RECV_RING_BUFFER_SIZE,
512 NULL,
513 0,
514 mousevsc_on_channel_callback,
515 device
516 );
517
518 if (ret != 0) {
519 free_input_device(input_dev);
520 return ret;
521 }
522
523
524 ret = mousevsc_connect_to_vsp(device);
525
526 if (ret != 0) {
527 vmbus_close(device->channel);
528 free_input_device(input_dev);
529 return ret;
530 }
531
532
533 /* workaround SA-167 */
534 if (input_dev->report_desc[14] == 0x25)
535 input_dev->report_desc[14] = 0x29;
536
537 reportdesc_callback(device, input_dev->report_desc,
538 input_dev->report_desc_size);
539
540 input_dev->init_complete = true;
541
542 return ret;
543}
544
545static int mousevsc_probe(struct hv_device *dev,
546 const struct hv_vmbus_device_id *dev_id)
547{
548
549 return mousevsc_on_device_add(dev);
550
551}
552
553static int mousevsc_remove(struct hv_device *dev)
554{
555 struct mousevsc_dev *input_dev = hv_get_drvdata(dev);
556
557 vmbus_close(dev->channel);
558
559 if (input_dev->connected) {
560 hidinput_disconnect(input_dev->hid_device);
561 input_dev->connected = 0;
562 hid_destroy_device(input_dev->hid_device);
563 }
564
565 free_input_device(input_dev);
566
567 return 0;
568}
569
570static const struct hv_vmbus_device_id id_table[] = {
571 /* Mouse guid */
572 { VMBUS_DEVICE(0x9E, 0xB6, 0xA8, 0xCF, 0x4A, 0x5B, 0xc0, 0x4c,
573 0xB9, 0x8B, 0x8B, 0xA1, 0xA1, 0xF3, 0xF9, 0x5A) },
574 { },
575};
576
577MODULE_DEVICE_TABLE(vmbus, id_table);
578
579static struct hv_driver mousevsc_drv = {
580 .name = "mousevsc",
581 .id_table = id_table,
582 .probe = mousevsc_probe,
583 .remove = mousevsc_remove,
584};
585
586static int __init mousevsc_init(void)
587{
588 return vmbus_driver_register(&mousevsc_drv);
589}
590
591static void __exit mousevsc_exit(void)
592{
593 vmbus_driver_unregister(&mousevsc_drv);
594}
595
596MODULE_LICENSE("GPL");
597MODULE_VERSION(HV_DRV_VERSION);
598module_init(mousevsc_init);
599module_exit(mousevsc_exit);
diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c
index ae8c33e7849c..eb853f71089a 100644
--- a/drivers/staging/hv/storvsc_drv.c
+++ b/drivers/staging/hv/storvsc_drv.c
@@ -32,6 +32,7 @@
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/device.h> 33#include <linux/device.h>
34#include <linux/hyperv.h> 34#include <linux/hyperv.h>
35#include <linux/mempool.h>
35#include <scsi/scsi.h> 36#include <scsi/scsi.h>
36#include <scsi/scsi_cmnd.h> 37#include <scsi/scsi_cmnd.h>
37#include <scsi/scsi_host.h> 38#include <scsi/scsi_host.h>
@@ -42,6 +43,7 @@
42#include <scsi/scsi_dbg.h> 43#include <scsi/scsi_dbg.h>
43 44
44 45
46#define STORVSC_MIN_BUF_NR 64
45#define STORVSC_RING_BUFFER_SIZE (20*PAGE_SIZE) 47#define STORVSC_RING_BUFFER_SIZE (20*PAGE_SIZE)
46static int storvsc_ringbuffer_size = STORVSC_RING_BUFFER_SIZE; 48static int storvsc_ringbuffer_size = STORVSC_RING_BUFFER_SIZE;
47 49
@@ -78,7 +80,7 @@ MODULE_PARM_DESC(storvsc_ringbuffer_size, "Ring buffer size (bytes)");
78/* V1 Beta 0.1 */ 80/* V1 Beta 0.1 */
79/* V1 RC < 2008/1/31 1.0 */ 81/* V1 RC < 2008/1/31 1.0 */
80/* V1 RC > 2008/1/31 2.0 */ 82/* V1 RC > 2008/1/31 2.0 */
81#define VMSTOR_PROTOCOL_VERSION_CURRENT VMSTOR_PROTOCOL_VERSION(2, 0) 83#define VMSTOR_PROTOCOL_VERSION_CURRENT VMSTOR_PROTOCOL_VERSION(4, 2)
82 84
83 85
84 86
@@ -104,7 +106,8 @@ enum vstor_packet_operation {
104 VSTOR_OPERATION_END_INITIALIZATION = 8, 106 VSTOR_OPERATION_END_INITIALIZATION = 8,
105 VSTOR_OPERATION_QUERY_PROTOCOL_VERSION = 9, 107 VSTOR_OPERATION_QUERY_PROTOCOL_VERSION = 9,
106 VSTOR_OPERATION_QUERY_PROPERTIES = 10, 108 VSTOR_OPERATION_QUERY_PROPERTIES = 10,
107 VSTOR_OPERATION_MAXIMUM = 10 109 VSTOR_OPERATION_ENUMERATE_BUS = 11,
110 VSTOR_OPERATION_MAXIMUM = 11
108}; 111};
109 112
110/* 113/*
@@ -234,8 +237,6 @@ struct vstor_packet {
234#define STORVSC_MAX_CHANNELS 1 237#define STORVSC_MAX_CHANNELS 1
235#define STORVSC_MAX_CMD_LEN 16 238#define STORVSC_MAX_CMD_LEN 16
236 239
237struct hv_storvsc_request;
238
239/* Matches Windows-end */ 240/* Matches Windows-end */
240enum storvsc_request_type { 241enum storvsc_request_type {
241 WRITE_TYPE, 242 WRITE_TYPE,
@@ -284,9 +285,13 @@ struct storvsc_device {
284 struct hv_storvsc_request reset_request; 285 struct hv_storvsc_request reset_request;
285}; 286};
286 287
288struct stor_mem_pools {
289 struct kmem_cache *request_pool;
290 mempool_t *request_mempool;
291};
292
287struct hv_host_device { 293struct hv_host_device {
288 struct hv_device *dev; 294 struct hv_device *dev;
289 struct kmem_cache *request_pool;
290 unsigned int port; 295 unsigned int port;
291 unsigned char path; 296 unsigned char path;
292 unsigned char target; 297 unsigned char target;
@@ -302,6 +307,51 @@ struct storvsc_cmd_request {
302 struct hv_storvsc_request request; 307 struct hv_storvsc_request request;
303}; 308};
304 309
310struct storvsc_scan_work {
311 struct work_struct work;
312 struct Scsi_Host *host;
313 uint lun;
314};
315
316static void storvsc_bus_scan(struct work_struct *work)
317{
318 struct storvsc_scan_work *wrk;
319 int id, order_id;
320
321 wrk = container_of(work, struct storvsc_scan_work, work);
322 for (id = 0; id < wrk->host->max_id; ++id) {
323 if (wrk->host->reverse_ordering)
324 order_id = wrk->host->max_id - id - 1;
325 else
326 order_id = id;
327
328 scsi_scan_target(&wrk->host->shost_gendev, 0,
329 order_id, SCAN_WILD_CARD, 1);
330 }
331 kfree(wrk);
332}
333
334static void storvsc_remove_lun(struct work_struct *work)
335{
336 struct storvsc_scan_work *wrk;
337 struct scsi_device *sdev;
338
339 wrk = container_of(work, struct storvsc_scan_work, work);
340 if (!scsi_host_get(wrk->host))
341 goto done;
342
343 sdev = scsi_device_lookup(wrk->host, 0, 0, wrk->lun);
344
345 if (sdev) {
346 scsi_remove_device(sdev);
347 scsi_device_put(sdev);
348 }
349 scsi_host_put(wrk->host);
350
351done:
352 kfree(wrk);
353}
354
305static inline struct storvsc_device *get_out_stor_device( 355static inline struct storvsc_device *get_out_stor_device(
306 struct hv_device *device) 356 struct hv_device *device)
307{ 357{
@@ -549,11 +599,25 @@ static void storvsc_on_receive(struct hv_device *device,
549 struct vstor_packet *vstor_packet, 599 struct vstor_packet *vstor_packet,
550 struct hv_storvsc_request *request) 600 struct hv_storvsc_request *request)
551{ 601{
602 struct storvsc_scan_work *work;
603 struct storvsc_device *stor_device;
604
552 switch (vstor_packet->operation) { 605 switch (vstor_packet->operation) {
553 case VSTOR_OPERATION_COMPLETE_IO: 606 case VSTOR_OPERATION_COMPLETE_IO:
554 storvsc_on_io_completion(device, vstor_packet, request); 607 storvsc_on_io_completion(device, vstor_packet, request);
555 break; 608 break;
609
556 case VSTOR_OPERATION_REMOVE_DEVICE: 610 case VSTOR_OPERATION_REMOVE_DEVICE:
611 case VSTOR_OPERATION_ENUMERATE_BUS:
612 stor_device = get_in_stor_device(device);
613 work = kmalloc(sizeof(struct storvsc_scan_work), GFP_ATOMIC);
614 if (!work)
615 return;
616
617 INIT_WORK(&work->work, storvsc_bus_scan);
618 work->host = stor_device->host;
619 schedule_work(&work->work);
620 break;
557 621
558 default: 622 default:
559 break; 623 break;
@@ -729,19 +793,48 @@ static void storvsc_get_ide_info(struct hv_device *dev, int *target, int *path)
729 793
730static int storvsc_device_alloc(struct scsi_device *sdevice) 794static int storvsc_device_alloc(struct scsi_device *sdevice)
731{ 795{
732 /* 796 struct stor_mem_pools *memp;
733 * This enables luns to be located sparsely. Otherwise, we may not 797 int number = STORVSC_MIN_BUF_NR;
734 * discovered them. 798
735 */ 799 memp = kzalloc(sizeof(struct stor_mem_pools), GFP_KERNEL);
736 sdevice->sdev_bflags |= BLIST_SPARSELUN | BLIST_LARGELUN; 800 if (!memp)
801 return -ENOMEM;
802
803 memp->request_pool =
804 kmem_cache_create(dev_name(&sdevice->sdev_dev),
805 sizeof(struct storvsc_cmd_request), 0,
806 SLAB_HWCACHE_ALIGN, NULL);
807
808 if (!memp->request_pool)
809 goto err0;
810
811 memp->request_mempool = mempool_create(number, mempool_alloc_slab,
812 mempool_free_slab,
813 memp->request_pool);
814
815 if (!memp->request_mempool)
816 goto err1;
817
818 sdevice->hostdata = memp;
819
737 return 0; 820 return 0;
821
822err1:
823 kmem_cache_destroy(memp->request_pool);
824
825err0:
826 kfree(memp);
827 return -ENOMEM;
738} 828}
739 829
740static int storvsc_merge_bvec(struct request_queue *q, 830static void storvsc_device_destroy(struct scsi_device *sdevice)
741 struct bvec_merge_data *bmd, struct bio_vec *bvec)
742{ 831{
743 /* checking done by caller. */ 832 struct stor_mem_pools *memp = sdevice->hostdata;
744 return bvec->bv_len; 833
834 mempool_destroy(memp->request_mempool);
835 kmem_cache_destroy(memp->request_pool);
836 kfree(memp);
837 sdevice->hostdata = NULL;
745} 838}
746 839
747static int storvsc_device_configure(struct scsi_device *sdevice) 840static int storvsc_device_configure(struct scsi_device *sdevice)
@@ -751,8 +844,6 @@ static int storvsc_device_configure(struct scsi_device *sdevice)
751 844
752 blk_queue_max_segment_size(sdevice->request_queue, PAGE_SIZE); 845 blk_queue_max_segment_size(sdevice->request_queue, PAGE_SIZE);
753 846
754 blk_queue_merge_bvec(sdevice->request_queue, storvsc_merge_bvec);
755
756 blk_queue_bounce_limit(sdevice->request_queue, BLK_BOUNCE_ANY); 847 blk_queue_bounce_limit(sdevice->request_queue, BLK_BOUNCE_ANY);
757 848
758 return 0; 849 return 0;
@@ -802,12 +893,14 @@ static int do_bounce_buffer(struct scatterlist *sgl, unsigned int sg_count)
802 893
803static struct scatterlist *create_bounce_buffer(struct scatterlist *sgl, 894static struct scatterlist *create_bounce_buffer(struct scatterlist *sgl,
804 unsigned int sg_count, 895 unsigned int sg_count,
805 unsigned int len) 896 unsigned int len,
897 int write)
806{ 898{
807 int i; 899 int i;
808 int num_pages; 900 int num_pages;
809 struct scatterlist *bounce_sgl; 901 struct scatterlist *bounce_sgl;
810 struct page *page_buf; 902 struct page *page_buf;
903 unsigned int buf_len = ((write == WRITE_TYPE) ? 0 : PAGE_SIZE);
811 904
812 num_pages = ALIGN(len, PAGE_SIZE) >> PAGE_SHIFT; 905 num_pages = ALIGN(len, PAGE_SIZE) >> PAGE_SHIFT;
813 906
@@ -819,7 +912,7 @@ static struct scatterlist *create_bounce_buffer(struct scatterlist *sgl,
819 page_buf = alloc_page(GFP_ATOMIC); 912 page_buf = alloc_page(GFP_ATOMIC);
820 if (!page_buf) 913 if (!page_buf)
821 goto cleanup; 914 goto cleanup;
822 sg_set_page(&bounce_sgl[i], page_buf, 0, 0); 915 sg_set_page(&bounce_sgl[i], page_buf, buf_len, 0);
823 } 916 }
824 917
825 return bounce_sgl; 918 return bounce_sgl;
@@ -833,7 +926,8 @@ cleanup:
833/* Assume the original sgl has enough room */ 926/* Assume the original sgl has enough room */
834static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl, 927static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
835 struct scatterlist *bounce_sgl, 928 struct scatterlist *bounce_sgl,
836 unsigned int orig_sgl_count) 929 unsigned int orig_sgl_count,
930 unsigned int bounce_sgl_count)
837{ 931{
838 int i; 932 int i;
839 int j = 0; 933 int j = 0;
@@ -874,6 +968,24 @@ static unsigned int copy_from_bounce_buffer(struct scatterlist *orig_sgl,
874 kunmap_atomic((void *)bounce_addr, KM_IRQ0); 968 kunmap_atomic((void *)bounce_addr, KM_IRQ0);
875 j++; 969 j++;
876 970
971 /*
972 * It is possible that the number of elements
973 * in the bounce buffer may not be equal to
974 * the number of elements in the original
975 * scatter list. Handle this correctly.
976 */
977
978 if (j == bounce_sgl_count) {
979 /*
980 * We are done; cleanup and return.
981 */
982 kunmap_atomic((void *)(dest_addr -
983 orig_sgl[i].offset),
984 KM_IRQ0);
985 local_irq_restore(flags);
986 return total_copied;
987 }
988
877 /* if we need to use another bounce buffer */ 989 /* if we need to use another bounce buffer */
878 if (destlen || i != orig_sgl_count - 1) 990 if (destlen || i != orig_sgl_count - 1)
879 bounce_addr = 991 bounce_addr =
@@ -965,18 +1077,13 @@ static int storvsc_remove(struct hv_device *dev)
965{ 1077{
966 struct storvsc_device *stor_device = hv_get_drvdata(dev); 1078 struct storvsc_device *stor_device = hv_get_drvdata(dev);
967 struct Scsi_Host *host = stor_device->host; 1079 struct Scsi_Host *host = stor_device->host;
968 struct hv_host_device *host_dev =
969 (struct hv_host_device *)host->hostdata;
970 1080
971 scsi_remove_host(host); 1081 scsi_remove_host(host);
972 1082
973 scsi_host_put(host); 1083 scsi_host_put(host);
974 1084
975 storvsc_dev_remove(dev); 1085 storvsc_dev_remove(dev);
976 if (host_dev->request_pool) { 1086
977 kmem_cache_destroy(host_dev->request_pool);
978 host_dev->request_pool = NULL;
979 }
980 return 0; 1087 return 0;
981} 1088}
982 1089
@@ -1014,7 +1121,7 @@ static int storvsc_host_reset(struct hv_device *device)
1014 1121
1015 stor_device = get_out_stor_device(device); 1122 stor_device = get_out_stor_device(device);
1016 if (!stor_device) 1123 if (!stor_device)
1017 return -ENODEV; 1124 return FAILED;
1018 1125
1019 request = &stor_device->reset_request; 1126 request = &stor_device->reset_request;
1020 vstor_packet = &request->vstor_packet; 1127 vstor_packet = &request->vstor_packet;
@@ -1031,13 +1138,11 @@ static int storvsc_host_reset(struct hv_device *device)
1031 VM_PKT_DATA_INBAND, 1138 VM_PKT_DATA_INBAND,
1032 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); 1139 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1033 if (ret != 0) 1140 if (ret != 0)
1034 goto cleanup; 1141 return FAILED;
1035 1142
1036 t = wait_for_completion_timeout(&request->wait_event, 5*HZ); 1143 t = wait_for_completion_timeout(&request->wait_event, 5*HZ);
1037 if (t == 0) { 1144 if (t == 0)
1038 ret = -ETIMEDOUT; 1145 return TIMEOUT_ERROR;
1039 goto cleanup;
1040 }
1041 1146
1042 1147
1043 /* 1148 /*
@@ -1045,8 +1150,7 @@ static int storvsc_host_reset(struct hv_device *device)
1045 * should have been flushed out and return to us 1150 * should have been flushed out and return to us
1046 */ 1151 */
1047 1152
1048cleanup: 1153 return SUCCESS;
1049 return ret;
1050} 1154}
1051 1155
1052 1156
@@ -1055,16 +1159,10 @@ cleanup:
1055 */ 1159 */
1056static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd) 1160static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd)
1057{ 1161{
1058 int ret; 1162 struct hv_host_device *host_dev = shost_priv(scmnd->device->host);
1059 struct hv_host_device *host_dev =
1060 (struct hv_host_device *)scmnd->device->host->hostdata;
1061 struct hv_device *dev = host_dev->dev; 1163 struct hv_device *dev = host_dev->dev;
1062 1164
1063 ret = storvsc_host_reset(dev); 1165 return storvsc_host_reset(dev);
1064 if (ret != 0)
1065 return ret;
1066
1067 return ret;
1068} 1166}
1069 1167
1070 1168
@@ -1076,21 +1174,22 @@ static void storvsc_command_completion(struct hv_storvsc_request *request)
1076 struct storvsc_cmd_request *cmd_request = 1174 struct storvsc_cmd_request *cmd_request =
1077 (struct storvsc_cmd_request *)request->context; 1175 (struct storvsc_cmd_request *)request->context;
1078 struct scsi_cmnd *scmnd = cmd_request->cmd; 1176 struct scsi_cmnd *scmnd = cmd_request->cmd;
1079 struct hv_host_device *host_dev = 1177 struct hv_host_device *host_dev = shost_priv(scmnd->device->host);
1080 (struct hv_host_device *)scmnd->device->host->hostdata;
1081 void (*scsi_done_fn)(struct scsi_cmnd *); 1178 void (*scsi_done_fn)(struct scsi_cmnd *);
1082 struct scsi_sense_hdr sense_hdr; 1179 struct scsi_sense_hdr sense_hdr;
1083 struct vmscsi_request *vm_srb; 1180 struct vmscsi_request *vm_srb;
1181 struct storvsc_scan_work *wrk;
1182 struct stor_mem_pools *memp = scmnd->device->hostdata;
1084 1183
1085 vm_srb = &request->vstor_packet.vm_srb; 1184 vm_srb = &request->vstor_packet.vm_srb;
1086 if (cmd_request->bounce_sgl_count) { 1185 if (cmd_request->bounce_sgl_count) {
1087 if (vm_srb->data_in == READ_TYPE) { 1186 if (vm_srb->data_in == READ_TYPE)
1088 copy_from_bounce_buffer(scsi_sglist(scmnd), 1187 copy_from_bounce_buffer(scsi_sglist(scmnd),
1089 cmd_request->bounce_sgl, 1188 cmd_request->bounce_sgl,
1090 scsi_sg_count(scmnd)); 1189 scsi_sg_count(scmnd),
1091 destroy_bounce_buffer(cmd_request->bounce_sgl, 1190 cmd_request->bounce_sgl_count);
1191 destroy_bounce_buffer(cmd_request->bounce_sgl,
1092 cmd_request->bounce_sgl_count); 1192 cmd_request->bounce_sgl_count);
1093 }
1094 } 1193 }
1095 1194
1096 /* 1195 /*
@@ -1103,6 +1202,29 @@ static void storvsc_command_completion(struct hv_storvsc_request *request)
1103 else 1202 else
1104 scmnd->result = vm_srb->scsi_status; 1203 scmnd->result = vm_srb->scsi_status;
1105 1204
1205 /*
1206 * If the LUN is invalid; remove the device.
1207 */
1208 if (vm_srb->srb_status == 0x20) {
1209 struct storvsc_device *stor_dev;
1210 struct hv_device *dev = host_dev->dev;
1211 struct Scsi_Host *host;
1212
1213 stor_dev = get_in_stor_device(dev);
1214 host = stor_dev->host;
1215
1216 wrk = kmalloc(sizeof(struct storvsc_scan_work),
1217 GFP_ATOMIC);
1218 if (!wrk) {
1219 scmnd->result = DID_TARGET_FAILURE << 16;
1220 } else {
1221 wrk->host = host;
1222 wrk->lun = vm_srb->lun;
1223 INIT_WORK(&wrk->work, storvsc_remove_lun);
1224 schedule_work(&wrk->work);
1225 }
1226 }
1227
1106 if (scmnd->result) { 1228 if (scmnd->result) {
1107 if (scsi_normalize_sense(scmnd->sense_buffer, 1229 if (scsi_normalize_sense(scmnd->sense_buffer,
1108 SCSI_SENSE_BUFFERSIZE, &sense_hdr)) 1230 SCSI_SENSE_BUFFERSIZE, &sense_hdr))
@@ -1120,7 +1242,7 @@ static void storvsc_command_completion(struct hv_storvsc_request *request)
1120 1242
1121 scsi_done_fn(scmnd); 1243 scsi_done_fn(scmnd);
1122 1244
1123 kmem_cache_free(host_dev->request_pool, cmd_request); 1245 mempool_free(cmd_request, memp->request_mempool);
1124} 1246}
1125 1247
1126static bool storvsc_check_scsi_cmd(struct scsi_cmnd *scmnd) 1248static bool storvsc_check_scsi_cmd(struct scsi_cmnd *scmnd)
@@ -1131,7 +1253,7 @@ static bool storvsc_check_scsi_cmd(struct scsi_cmnd *scmnd)
1131 switch (scsi_op) { 1253 switch (scsi_op) {
1132 /* smartd sends this command, which will offline the device */ 1254 /* smartd sends this command, which will offline the device */
1133 case SET_WINDOW: 1255 case SET_WINDOW:
1134 scmnd->result = DID_ERROR << 16; 1256 scmnd->result = ILLEGAL_REQUEST << 16;
1135 allowed = false; 1257 allowed = false;
1136 break; 1258 break;
1137 default: 1259 default:
@@ -1143,12 +1265,10 @@ static bool storvsc_check_scsi_cmd(struct scsi_cmnd *scmnd)
1143/* 1265/*
1144 * storvsc_queuecommand - Initiate command processing 1266 * storvsc_queuecommand - Initiate command processing
1145 */ 1267 */
1146static int storvsc_queuecommand_lck(struct scsi_cmnd *scmnd, 1268static int storvsc_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scmnd)
1147 void (*done)(struct scsi_cmnd *))
1148{ 1269{
1149 int ret; 1270 int ret;
1150 struct hv_host_device *host_dev = 1271 struct hv_host_device *host_dev = shost_priv(host);
1151 (struct hv_host_device *)scmnd->device->host->hostdata;
1152 struct hv_device *dev = host_dev->dev; 1272 struct hv_device *dev = host_dev->dev;
1153 struct hv_storvsc_request *request; 1273 struct hv_storvsc_request *request;
1154 struct storvsc_cmd_request *cmd_request; 1274 struct storvsc_cmd_request *cmd_request;
@@ -1157,9 +1277,10 @@ static int storvsc_queuecommand_lck(struct scsi_cmnd *scmnd,
1157 struct scatterlist *sgl; 1277 struct scatterlist *sgl;
1158 unsigned int sg_count = 0; 1278 unsigned int sg_count = 0;
1159 struct vmscsi_request *vm_srb; 1279 struct vmscsi_request *vm_srb;
1280 struct stor_mem_pools *memp = scmnd->device->hostdata;
1160 1281
1161 if (storvsc_check_scsi_cmd(scmnd) == false) { 1282 if (storvsc_check_scsi_cmd(scmnd) == false) {
1162 done(scmnd); 1283 scmnd->scsi_done(scmnd);
1163 return 0; 1284 return 0;
1164 } 1285 }
1165 1286
@@ -1172,16 +1293,14 @@ static int storvsc_queuecommand_lck(struct scsi_cmnd *scmnd,
1172 goto retry_request; 1293 goto retry_request;
1173 } 1294 }
1174 1295
1175 scmnd->scsi_done = done;
1176
1177 request_size = sizeof(struct storvsc_cmd_request); 1296 request_size = sizeof(struct storvsc_cmd_request);
1178 1297
1179 cmd_request = kmem_cache_zalloc(host_dev->request_pool, 1298 cmd_request = mempool_alloc(memp->request_mempool,
1180 GFP_ATOMIC); 1299 GFP_ATOMIC);
1181 if (!cmd_request) { 1300 if (!cmd_request)
1182 scmnd->scsi_done = NULL;
1183 return SCSI_MLQUEUE_DEVICE_BUSY; 1301 return SCSI_MLQUEUE_DEVICE_BUSY;
1184 } 1302
1303 memset(cmd_request, 0, sizeof(struct storvsc_cmd_request));
1185 1304
1186 /* Setup the cmd request */ 1305 /* Setup the cmd request */
1187 cmd_request->bounce_sgl_count = 0; 1306 cmd_request->bounce_sgl_count = 0;
@@ -1231,12 +1350,12 @@ static int storvsc_queuecommand_lck(struct scsi_cmnd *scmnd,
1231 if (do_bounce_buffer(sgl, scsi_sg_count(scmnd)) != -1) { 1350 if (do_bounce_buffer(sgl, scsi_sg_count(scmnd)) != -1) {
1232 cmd_request->bounce_sgl = 1351 cmd_request->bounce_sgl =
1233 create_bounce_buffer(sgl, scsi_sg_count(scmnd), 1352 create_bounce_buffer(sgl, scsi_sg_count(scmnd),
1234 scsi_bufflen(scmnd)); 1353 scsi_bufflen(scmnd),
1354 vm_srb->data_in);
1235 if (!cmd_request->bounce_sgl) { 1355 if (!cmd_request->bounce_sgl) {
1236 scmnd->scsi_done = NULL;
1237 scmnd->host_scribble = NULL; 1356 scmnd->host_scribble = NULL;
1238 kmem_cache_free(host_dev->request_pool, 1357 mempool_free(cmd_request,
1239 cmd_request); 1358 memp->request_mempool);
1240 1359
1241 return SCSI_MLQUEUE_HOST_BUSY; 1360 return SCSI_MLQUEUE_HOST_BUSY;
1242 } 1361 }
@@ -1278,9 +1397,8 @@ retry_request:
1278 destroy_bounce_buffer(cmd_request->bounce_sgl, 1397 destroy_bounce_buffer(cmd_request->bounce_sgl,
1279 cmd_request->bounce_sgl_count); 1398 cmd_request->bounce_sgl_count);
1280 1399
1281 kmem_cache_free(host_dev->request_pool, cmd_request); 1400 mempool_free(cmd_request, memp->request_mempool);
1282 1401
1283 scmnd->scsi_done = NULL;
1284 scmnd->host_scribble = NULL; 1402 scmnd->host_scribble = NULL;
1285 1403
1286 ret = SCSI_MLQUEUE_DEVICE_BUSY; 1404 ret = SCSI_MLQUEUE_DEVICE_BUSY;
@@ -1289,9 +1407,6 @@ retry_request:
1289 return ret; 1407 return ret;
1290} 1408}
1291 1409
1292static DEF_SCSI_QCMD(storvsc_queuecommand)
1293
1294
1295/* Scsi driver */ 1410/* Scsi driver */
1296static struct scsi_host_template scsi_driver = { 1411static struct scsi_host_template scsi_driver = {
1297 .module = THIS_MODULE, 1412 .module = THIS_MODULE,
@@ -1300,6 +1415,7 @@ static struct scsi_host_template scsi_driver = {
1300 .queuecommand = storvsc_queuecommand, 1415 .queuecommand = storvsc_queuecommand,
1301 .eh_host_reset_handler = storvsc_host_reset_handler, 1416 .eh_host_reset_handler = storvsc_host_reset_handler,
1302 .slave_alloc = storvsc_device_alloc, 1417 .slave_alloc = storvsc_device_alloc,
1418 .slave_destroy = storvsc_device_destroy,
1303 .slave_configure = storvsc_device_configure, 1419 .slave_configure = storvsc_device_configure,
1304 .cmd_per_lun = 1, 1420 .cmd_per_lun = 1,
1305 /* 64 max_queue * 1 target */ 1421 /* 64 max_queue * 1 target */
@@ -1308,14 +1424,7 @@ static struct scsi_host_template scsi_driver = {
1308 /* no use setting to 0 since ll_blk_rw reset it to 1 */ 1424 /* no use setting to 0 since ll_blk_rw reset it to 1 */
1309 /* currently 32 */ 1425 /* currently 32 */
1310 .sg_tablesize = MAX_MULTIPAGE_BUFFER_COUNT, 1426 .sg_tablesize = MAX_MULTIPAGE_BUFFER_COUNT,
1311 /* 1427 .use_clustering = DISABLE_CLUSTERING,
1312 * ENABLE_CLUSTERING allows mutiple physically contig bio_vecs to merge
1313 * into 1 sg element. If set, we must limit the max_segment_size to
1314 * PAGE_SIZE, otherwise we may get 1 sg element that represents
1315 * multiple
1316 */
1317 /* physically contig pfns (ie sg[x].length > PAGE_SIZE). */
1318 .use_clustering = ENABLE_CLUSTERING,
1319 /* Make sure we dont get a sg segment crosses a page boundary */ 1428 /* Make sure we dont get a sg segment crosses a page boundary */
1320 .dma_boundary = PAGE_SIZE-1, 1429 .dma_boundary = PAGE_SIZE-1,
1321}; 1430};
@@ -1360,27 +1469,17 @@ static int storvsc_probe(struct hv_device *device,
1360 if (!host) 1469 if (!host)
1361 return -ENOMEM; 1470 return -ENOMEM;
1362 1471
1363 host_dev = (struct hv_host_device *)host->hostdata; 1472 host_dev = shost_priv(host);
1364 memset(host_dev, 0, sizeof(struct hv_host_device)); 1473 memset(host_dev, 0, sizeof(struct hv_host_device));
1365 1474
1366 host_dev->port = host->host_no; 1475 host_dev->port = host->host_no;
1367 host_dev->dev = device; 1476 host_dev->dev = device;
1368 1477
1369 host_dev->request_pool =
1370 kmem_cache_create(dev_name(&device->device),
1371 sizeof(struct storvsc_cmd_request), 0,
1372 SLAB_HWCACHE_ALIGN, NULL);
1373
1374 if (!host_dev->request_pool) {
1375 scsi_host_put(host);
1376 return -ENOMEM;
1377 }
1378 1478
1379 stor_device = kzalloc(sizeof(struct storvsc_device), GFP_KERNEL); 1479 stor_device = kzalloc(sizeof(struct storvsc_device), GFP_KERNEL);
1380 if (!stor_device) { 1480 if (!stor_device) {
1381 kmem_cache_destroy(host_dev->request_pool); 1481 ret = -ENOMEM;
1382 scsi_host_put(host); 1482 goto err_out0;
1383 return -ENOMEM;
1384 } 1483 }
1385 1484
1386 stor_device->destroy = false; 1485 stor_device->destroy = false;
@@ -1391,12 +1490,8 @@ static int storvsc_probe(struct hv_device *device,
1391 1490
1392 stor_device->port_number = host->host_no; 1491 stor_device->port_number = host->host_no;
1393 ret = storvsc_connect_to_vsp(device, storvsc_ringbuffer_size); 1492 ret = storvsc_connect_to_vsp(device, storvsc_ringbuffer_size);
1394 if (ret) { 1493 if (ret)
1395 kmem_cache_destroy(host_dev->request_pool); 1494 goto err_out1;
1396 scsi_host_put(host);
1397 kfree(stor_device);
1398 return ret;
1399 }
1400 1495
1401 if (dev_is_ide) 1496 if (dev_is_ide)
1402 storvsc_get_ide_info(device, &target, &path); 1497 storvsc_get_ide_info(device, &target, &path);
@@ -1416,7 +1511,7 @@ static int storvsc_probe(struct hv_device *device,
1416 /* Register the HBA and start the scsi bus scan */ 1511 /* Register the HBA and start the scsi bus scan */
1417 ret = scsi_add_host(host, &device->device); 1512 ret = scsi_add_host(host, &device->device);
1418 if (ret != 0) 1513 if (ret != 0)
1419 goto err_out; 1514 goto err_out2;
1420 1515
1421 if (!dev_is_ide) { 1516 if (!dev_is_ide) {
1422 scsi_scan_host(host); 1517 scsi_scan_host(host);
@@ -1425,21 +1520,32 @@ static int storvsc_probe(struct hv_device *device,
1425 ret = scsi_add_device(host, 0, target, 0); 1520 ret = scsi_add_device(host, 0, target, 0);
1426 if (ret) { 1521 if (ret) {
1427 scsi_remove_host(host); 1522 scsi_remove_host(host);
1428 goto err_out; 1523 goto err_out2;
1429 } 1524 }
1430 return 0; 1525 return 0;
1431 1526
1432err_out: 1527err_out2:
1528 /*
1529 * Once we have connected with the host, we would need to
1530 * to invoke storvsc_dev_remove() to rollback this state and
1531 * this call also frees up the stor_device; hence the jump around
1532 * err_out1 label.
1533 */
1433 storvsc_dev_remove(device); 1534 storvsc_dev_remove(device);
1434 kmem_cache_destroy(host_dev->request_pool); 1535 goto err_out0;
1536
1537err_out1:
1538 kfree(stor_device);
1539
1540err_out0:
1435 scsi_host_put(host); 1541 scsi_host_put(host);
1436 return -ENODEV; 1542 return ret;
1437} 1543}
1438 1544
1439/* The one and only one */ 1545/* The one and only one */
1440 1546
1441static struct hv_driver storvsc_drv = { 1547static struct hv_driver storvsc_drv = {
1442 .name = "storvsc", 1548 .name = KBUILD_MODNAME,
1443 .id_table = id_table, 1549 .id_table = id_table,
1444 .probe = storvsc_probe, 1550 .probe = storvsc_probe,
1445 .remove = storvsc_remove, 1551 .remove = storvsc_remove,
diff --git a/drivers/staging/iio/Documentation/generic_buffer.c b/drivers/staging/iio/Documentation/generic_buffer.c
index d58095321491..69a05b9456d6 100644
--- a/drivers/staging/iio/Documentation/generic_buffer.c
+++ b/drivers/staging/iio/Documentation/generic_buffer.c
@@ -28,6 +28,7 @@
28#include <linux/types.h> 28#include <linux/types.h>
29#include <string.h> 29#include <string.h>
30#include <poll.h> 30#include <poll.h>
31#include <endian.h>
31#include "iio_utils.h" 32#include "iio_utils.h"
32 33
33/** 34/**
@@ -56,6 +57,13 @@ int size_from_channelarray(struct iio_channel_info *channels, int num_channels)
56 57
57void print2byte(int input, struct iio_channel_info *info) 58void print2byte(int input, struct iio_channel_info *info)
58{ 59{
60 /* First swap if incorrect endian */
61
62 if (info->be)
63 input = be16toh((uint_16t)input);
64 else
65 input = le16toh((uint_16t)input);
66
59 /* shift before conversion to avoid sign extension 67 /* shift before conversion to avoid sign extension
60 of left aligned data */ 68 of left aligned data */
61 input = input >> info->shift; 69 input = input >> info->shift;
diff --git a/drivers/staging/iio/Documentation/iio_utils.h b/drivers/staging/iio/Documentation/iio_utils.h
index 75938b2412ff..6f3a392297ec 100644
--- a/drivers/staging/iio/Documentation/iio_utils.h
+++ b/drivers/staging/iio/Documentation/iio_utils.h
@@ -13,6 +13,7 @@
13#include <ctype.h> 13#include <ctype.h>
14#include <stdio.h> 14#include <stdio.h>
15#include <stdint.h> 15#include <stdint.h>
16#include <dirent.h>
16 17
17#define IIO_MAX_NAME_LENGTH 30 18#define IIO_MAX_NAME_LENGTH 30
18 19
@@ -73,6 +74,7 @@ struct iio_channel_info {
73 unsigned bits_used; 74 unsigned bits_used;
74 unsigned shift; 75 unsigned shift;
75 uint64_t mask; 76 uint64_t mask;
77 unsigned be;
76 unsigned is_signed; 78 unsigned is_signed;
77 unsigned enabled; 79 unsigned enabled;
78 unsigned location; 80 unsigned location;
@@ -83,6 +85,7 @@ struct iio_channel_info {
83 * @is_signed: output whether channel is signed 85 * @is_signed: output whether channel is signed
84 * @bytes: output how many bytes the channel storage occupies 86 * @bytes: output how many bytes the channel storage occupies
85 * @mask: output a bit mask for the raw data 87 * @mask: output a bit mask for the raw data
88 * @be: big endian
86 * @device_dir: the iio device directory 89 * @device_dir: the iio device directory
87 * @name: the channel name 90 * @name: the channel name
88 * @generic_name: the channel type name 91 * @generic_name: the channel type name
@@ -92,6 +95,7 @@ inline int iioutils_get_type(unsigned *is_signed,
92 unsigned *bits_used, 95 unsigned *bits_used,
93 unsigned *shift, 96 unsigned *shift,
94 uint64_t *mask, 97 uint64_t *mask,
98 unsigned *be,
95 const char *device_dir, 99 const char *device_dir,
96 const char *name, 100 const char *name,
97 const char *generic_name) 101 const char *generic_name)
@@ -100,7 +104,7 @@ inline int iioutils_get_type(unsigned *is_signed,
100 int ret; 104 int ret;
101 DIR *dp; 105 DIR *dp;
102 char *scan_el_dir, *builtname, *builtname_generic, *filename = 0; 106 char *scan_el_dir, *builtname, *builtname_generic, *filename = 0;
103 char signchar; 107 char signchar, endianchar;
104 unsigned padint; 108 unsigned padint;
105 const struct dirent *ent; 109 const struct dirent *ent;
106 110
@@ -144,9 +148,18 @@ inline int iioutils_get_type(unsigned *is_signed,
144 ret = -errno; 148 ret = -errno;
145 goto error_free_filename; 149 goto error_free_filename;
146 } 150 }
147 fscanf(sysfsfp, 151
148 "%c%u/%u>>%u", &signchar, bits_used, 152 ret = fscanf(sysfsfp,
149 &padint, shift); 153 "%ce:%c%u/%u>>%u",
154 &endianchar,
155 &signchar,
156 bits_used,
157 &padint, shift);
158 if (ret < 0) {
159 printf("failed to pass scan type description\n");
160 return ret;
161 }
162 *be = (endianchar == 'b');
150 *bytes = padint / 8; 163 *bytes = padint / 8;
151 if (*bits_used == 64) 164 if (*bits_used == 64)
152 *mask = ~0; 165 *mask = ~0;
@@ -156,6 +169,10 @@ inline int iioutils_get_type(unsigned *is_signed,
156 *is_signed = 1; 169 *is_signed = 1;
157 else 170 else
158 *is_signed = 0; 171 *is_signed = 0;
172 fclose(sysfsfp);
173 free(filename);
174
175 filename = 0;
159 } 176 }
160error_free_filename: 177error_free_filename:
161 if (filename) 178 if (filename)
@@ -386,6 +403,7 @@ inline int build_channel_array(const char *device_dir,
386 &current->bits_used, 403 &current->bits_used,
387 &current->shift, 404 &current->shift,
388 &current->mask, 405 &current->mask,
406 &current->be,
389 device_dir, 407 device_dir,
390 current->name, 408 current->name,
391 current->generic_name); 409 current->generic_name);
diff --git a/drivers/staging/iio/Documentation/ring.txt b/drivers/staging/iio/Documentation/ring.txt
index 7e99ef2b7bc0..e33807761cd7 100644
--- a/drivers/staging/iio/Documentation/ring.txt
+++ b/drivers/staging/iio/Documentation/ring.txt
@@ -23,10 +23,6 @@ The function pointers within here are used to allow the core to handle
23as much buffer functionality as possible. Note almost all of these 23as much buffer functionality as possible. Note almost all of these
24are optional. 24are optional.
25 25
26mark_in_use, unmark_in_use
27 Basically indicate that not changes should be made to the buffer state that
28 will effect the form of the data being captures (e.g. scan elements or length)
29
30store_to 26store_to
31 If possible, push data to the buffer. 27 If possible, push data to the buffer.
32 28
@@ -39,8 +35,6 @@ rip_first_n
39 The primary buffer reading function. Note that it may well not return 35 The primary buffer reading function. Note that it may well not return
40 as much data as requested. 36 as much data as requested.
41 37
42mark_param_changed
43 Used to indicate that something has changed. Used in conjunction with
44request_update 38request_update
45 If parameters have changed that require reinitialization or configuration of 39 If parameters have changed that require reinitialization or configuration of
46 the buffer this will trigger it. 40 the buffer this will trigger it.
@@ -51,7 +45,3 @@ get_bytes_per_datum, set_bytes_per_datum
51get_length / set_length 45get_length / set_length
52 Get/set the number of complete scans that may be held by the buffer. 46 Get/set the number of complete scans that may be held by the buffer.
53 47
54is_enabled
55 Query if ring buffer is in use
56enable
57 Start the ring buffer.
diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio b/drivers/staging/iio/Documentation/sysfs-bus-iio
index 0d6823d19b61..46a995d6d261 100644
--- a/drivers/staging/iio/Documentation/sysfs-bus-iio
+++ b/drivers/staging/iio/Documentation/sysfs-bus-iio
@@ -276,6 +276,16 @@ Description:
276 If a discrete set of scale values are available, they 276 If a discrete set of scale values are available, they
277 are listed in this attribute. 277 are listed in this attribute.
278 278
279What: /sys/.../in_accel_filter_low_pass_3db_frequency
280What: /sys/.../in_magn_filter_low_pass_3db_frequency
281What: /sys/.../in_anglvel_filter_low_pass_3db_frequency
282KernelVersion: 3.2
283Contact: linux-iio@vger.kernel.org
284Description:
285 If a known or controllable low pass filter is applied
286 to the underlying data channel, then this parameter
287 gives the 3dB frequency of the filter in Hz.
288
279What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_raw 289What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_raw
280KernelVersion: 2.6.37 290KernelVersion: 2.6.37
281Contact: linux-iio@vger.kernel.org 291Contact: linux-iio@vger.kernel.org
diff --git a/drivers/staging/iio/Kconfig b/drivers/staging/iio/Kconfig
index 4ec9118955f9..90162aa8b2df 100644
--- a/drivers/staging/iio/Kconfig
+++ b/drivers/staging/iio/Kconfig
@@ -76,7 +76,6 @@ config IIO_DUMMY_EVGEN
76 76
77config IIO_SIMPLE_DUMMY 77config IIO_SIMPLE_DUMMY
78 tristate "An example driver with no hardware requirements" 78 tristate "An example driver with no hardware requirements"
79 select IIO_SIMPLE_DUMMY_EVGEN if IIO_SIMPLE_DUMMY_EVENTS
80 help 79 help
81 Driver intended mainly as documentation for how to write 80 Driver intended mainly as documentation for how to write
82 a driver. May also be useful for testing userspace code 81 a driver. May also be useful for testing userspace code
diff --git a/drivers/staging/iio/accel/adis16201_core.c b/drivers/staging/iio/accel/adis16201_core.c
index 97f747eac647..d439e45d07fa 100644
--- a/drivers/staging/iio/accel/adis16201_core.c
+++ b/drivers/staging/iio/accel/adis16201_core.c
@@ -17,7 +17,7 @@
17 17
18#include "../iio.h" 18#include "../iio.h"
19#include "../sysfs.h" 19#include "../sysfs.h"
20#include "../buffer_generic.h" 20#include "../buffer.h"
21 21
22#include "adis16201.h" 22#include "adis16201.h"
23 23
@@ -322,8 +322,7 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
322 *val = val16; 322 *val = val16;
323 mutex_unlock(&indio_dev->mlock); 323 mutex_unlock(&indio_dev->mlock);
324 return IIO_VAL_INT; 324 return IIO_VAL_INT;
325 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 325 case IIO_CHAN_INFO_SCALE:
326 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
327 switch (chan->type) { 326 switch (chan->type) {
328 case IIO_VOLTAGE: 327 case IIO_VOLTAGE:
329 *val = 0; 328 *val = 0;
@@ -348,10 +347,10 @@ static int adis16201_read_raw(struct iio_dev *indio_dev,
348 return -EINVAL; 347 return -EINVAL;
349 } 348 }
350 break; 349 break;
351 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 350 case IIO_CHAN_INFO_OFFSET:
352 *val = 25; 351 *val = 25;
353 return IIO_VAL_INT; 352 return IIO_VAL_INT;
354 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 353 case IIO_CHAN_INFO_CALIBBIAS:
355 switch (chan->type) { 354 switch (chan->type) {
356 case IIO_ACCEL: 355 case IIO_ACCEL:
357 bits = 12; 356 bits = 12;
@@ -388,7 +387,7 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
388 s16 val16; 387 s16 val16;
389 u8 addr; 388 u8 addr;
390 switch (mask) { 389 switch (mask) {
391 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 390 case IIO_CHAN_INFO_CALIBBIAS:
392 switch (chan->type) { 391 switch (chan->type) {
393 case IIO_ACCEL: 392 case IIO_ACCEL:
394 bits = 12; 393 bits = 12;
@@ -408,36 +407,36 @@ static int adis16201_write_raw(struct iio_dev *indio_dev,
408 407
409static struct iio_chan_spec adis16201_channels[] = { 408static struct iio_chan_spec adis16201_channels[] = {
410 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0, 409 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0,
411 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 410 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
412 in_supply, ADIS16201_SCAN_SUPPLY, 411 in_supply, ADIS16201_SCAN_SUPPLY,
413 IIO_ST('u', 12, 16, 0), 0), 412 IIO_ST('u', 12, 16, 0), 0),
414 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, 413 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
415 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 414 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
416 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE), 415 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
417 temp, ADIS16201_SCAN_TEMP, 416 temp, ADIS16201_SCAN_TEMP,
418 IIO_ST('u', 12, 16, 0), 0), 417 IIO_ST('u', 12, 16, 0), 0),
419 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X, 418 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X,
420 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 419 IIO_CHAN_INFO_SCALE_SHARED_BIT |
421 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 420 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
422 accel_x, ADIS16201_SCAN_ACC_X, 421 accel_x, ADIS16201_SCAN_ACC_X,
423 IIO_ST('s', 14, 16, 0), 0), 422 IIO_ST('s', 14, 16, 0), 0),
424 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y, 423 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y,
425 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 424 IIO_CHAN_INFO_SCALE_SHARED_BIT |
426 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 425 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
427 accel_y, ADIS16201_SCAN_ACC_Y, 426 accel_y, ADIS16201_SCAN_ACC_Y,
428 IIO_ST('s', 14, 16, 0), 0), 427 IIO_ST('s', 14, 16, 0), 0),
429 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, 428 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0,
430 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 429 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
431 in_aux, ADIS16201_SCAN_AUX_ADC, 430 in_aux, ADIS16201_SCAN_AUX_ADC,
432 IIO_ST('u', 12, 16, 0), 0), 431 IIO_ST('u', 12, 16, 0), 0),
433 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X, 432 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X,
434 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 433 IIO_CHAN_INFO_SCALE_SHARED_BIT |
435 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 434 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
436 incli_x, ADIS16201_SCAN_INCLI_X, 435 incli_x, ADIS16201_SCAN_INCLI_X,
437 IIO_ST('s', 14, 16, 0), 0), 436 IIO_ST('s', 14, 16, 0), 0),
438 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y, 437 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y,
439 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 438 IIO_CHAN_INFO_SCALE_SHARED_BIT |
440 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 439 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
441 incli_y, ADIS16201_SCAN_INCLI_Y, 440 incli_y, ADIS16201_SCAN_INCLI_Y,
442 IIO_ST('s', 14, 16, 0), 0), 441 IIO_ST('s', 14, 16, 0), 0),
443 IIO_CHAN_SOFT_TIMESTAMP(7) 442 IIO_CHAN_SOFT_TIMESTAMP(7)
@@ -554,3 +553,4 @@ module_spi_driver(adis16201_driver);
554MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 553MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
555MODULE_DESCRIPTION("Analog Devices ADIS16201 Programmable Digital Vibration Sensor driver"); 554MODULE_DESCRIPTION("Analog Devices ADIS16201 Programmable Digital Vibration Sensor driver");
556MODULE_LICENSE("GPL v2"); 555MODULE_LICENSE("GPL v2");
556MODULE_ALIAS("spi:adis16201");
diff --git a/drivers/staging/iio/accel/adis16201_ring.c b/drivers/staging/iio/accel/adis16201_ring.c
index 0016ed378e3a..26c610faee3f 100644
--- a/drivers/staging/iio/accel/adis16201_ring.c
+++ b/drivers/staging/iio/accel/adis16201_ring.c
@@ -74,11 +74,11 @@ static irqreturn_t adis16201_trigger_handler(int irq, void *p)
74 return -ENOMEM; 74 return -ENOMEM;
75 } 75 }
76 76
77 if (ring->scan_count) 77 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)
78 if (adis16201_read_ring_data(indio_dev, st->rx) >= 0) 78 && adis16201_read_ring_data(indio_dev, st->rx) >= 0)
79 for (; i < ring->scan_count; i++) 79 for (; i < bitmap_weight(indio_dev->active_scan_mask,
80 data[i] = be16_to_cpup( 80 indio_dev->masklength); i++)
81 (__be16 *)&(st->rx[i*2])); 81 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
82 82
83 /* Guaranteed to be aligned with 8 byte boundary */ 83 /* Guaranteed to be aligned with 8 byte boundary */
84 if (ring->scan_timestamp) 84 if (ring->scan_timestamp)
@@ -116,11 +116,9 @@ int adis16201_configure_ring(struct iio_dev *indio_dev)
116 } 116 }
117 indio_dev->buffer = ring; 117 indio_dev->buffer = ring;
118 /* Effectively select the ring buffer implementation */ 118 /* Effectively select the ring buffer implementation */
119 ring->bpe = 2;
120 ring->scan_timestamp = true; 119 ring->scan_timestamp = true;
121 ring->access = &ring_sw_access_funcs; 120 ring->access = &ring_sw_access_funcs;
122 ring->setup_ops = &adis16201_ring_setup_ops; 121 indio_dev->setup_ops = &adis16201_ring_setup_ops;
123 ring->owner = THIS_MODULE;
124 122
125 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 123 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
126 &adis16201_trigger_handler, 124 &adis16201_trigger_handler,
diff --git a/drivers/staging/iio/accel/adis16203_core.c b/drivers/staging/iio/accel/adis16203_core.c
index a6d6d27f3c97..1a5140f9e3f4 100644
--- a/drivers/staging/iio/accel/adis16203_core.c
+++ b/drivers/staging/iio/accel/adis16203_core.c
@@ -17,7 +17,7 @@
17 17
18#include "../iio.h" 18#include "../iio.h"
19#include "../sysfs.h" 19#include "../sysfs.h"
20#include "../buffer_generic.h" 20#include "../buffer.h"
21 21
22#include "adis16203.h" 22#include "adis16203.h"
23 23
@@ -329,8 +329,7 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
329 *val = val16; 329 *val = val16;
330 mutex_unlock(&indio_dev->mlock); 330 mutex_unlock(&indio_dev->mlock);
331 return IIO_VAL_INT; 331 return IIO_VAL_INT;
332 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 332 case IIO_CHAN_INFO_SCALE:
333 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
334 switch (chan->type) { 333 switch (chan->type) {
335 case IIO_VOLTAGE: 334 case IIO_VOLTAGE:
336 *val = 0; 335 *val = 0;
@@ -350,10 +349,10 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
350 default: 349 default:
351 return -EINVAL; 350 return -EINVAL;
352 } 351 }
353 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 352 case IIO_CHAN_INFO_OFFSET:
354 *val = 25; 353 *val = 25;
355 return IIO_VAL_INT; 354 return IIO_VAL_INT;
356 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 355 case IIO_CHAN_INFO_CALIBBIAS:
357 bits = 14; 356 bits = 14;
358 mutex_lock(&indio_dev->mlock); 357 mutex_lock(&indio_dev->mlock);
359 addr = adis16203_addresses[chan->address][1]; 358 addr = adis16203_addresses[chan->address][1];
@@ -374,26 +373,26 @@ static int adis16203_read_raw(struct iio_dev *indio_dev,
374 373
375static struct iio_chan_spec adis16203_channels[] = { 374static struct iio_chan_spec adis16203_channels[] = {
376 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0, 375 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0,
377 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 376 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
378 in_supply, ADIS16203_SCAN_SUPPLY, 377 in_supply, ADIS16203_SCAN_SUPPLY,
379 IIO_ST('u', 12, 16, 0), 0), 378 IIO_ST('u', 12, 16, 0), 0),
380 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, 379 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0,
381 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 380 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
382 in_aux, ADIS16203_SCAN_AUX_ADC, 381 in_aux, ADIS16203_SCAN_AUX_ADC,
383 IIO_ST('u', 12, 16, 0), 0), 382 IIO_ST('u', 12, 16, 0), 0),
384 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X, 383 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X,
385 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 384 IIO_CHAN_INFO_SCALE_SHARED_BIT |
386 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 385 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
387 incli_x, ADIS16203_SCAN_INCLI_X, 386 incli_x, ADIS16203_SCAN_INCLI_X,
388 IIO_ST('s', 14, 16, 0), 0), 387 IIO_ST('s', 14, 16, 0), 0),
389 /* Fixme: Not what it appears to be - see data sheet */ 388 /* Fixme: Not what it appears to be - see data sheet */
390 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y, 389 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y,
391 (1 << IIO_CHAN_INFO_SCALE_SHARED), 390 IIO_CHAN_INFO_SCALE_SHARED_BIT,
392 incli_y, ADIS16203_SCAN_INCLI_Y, 391 incli_y, ADIS16203_SCAN_INCLI_Y,
393 IIO_ST('s', 14, 16, 0), 0), 392 IIO_ST('s', 14, 16, 0), 0),
394 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, 393 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
395 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 394 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
396 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE), 395 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
397 temp, ADIS16203_SCAN_TEMP, 396 temp, ADIS16203_SCAN_TEMP,
398 IIO_ST('u', 12, 16, 0), 0), 397 IIO_ST('u', 12, 16, 0), 0),
399 IIO_CHAN_SOFT_TIMESTAMP(5), 398 IIO_CHAN_SOFT_TIMESTAMP(5),
@@ -509,3 +508,4 @@ module_spi_driver(adis16203_driver);
509MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 508MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
510MODULE_DESCRIPTION("Analog Devices ADIS16203 Programmable Digital Vibration Sensor driver"); 509MODULE_DESCRIPTION("Analog Devices ADIS16203 Programmable Digital Vibration Sensor driver");
511MODULE_LICENSE("GPL v2"); 510MODULE_LICENSE("GPL v2");
511MODULE_ALIAS("spi:adis16203");
diff --git a/drivers/staging/iio/accel/adis16203_ring.c b/drivers/staging/iio/accel/adis16203_ring.c
index 1fdfe6f6ac6e..064640d15e41 100644
--- a/drivers/staging/iio/accel/adis16203_ring.c
+++ b/drivers/staging/iio/accel/adis16203_ring.c
@@ -74,11 +74,11 @@ static irqreturn_t adis16203_trigger_handler(int irq, void *p)
74 return -ENOMEM; 74 return -ENOMEM;
75 } 75 }
76 76
77 if (ring->scan_count) 77 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
78 if (adis16203_read_ring_data(&indio_dev->dev, st->rx) >= 0) 78 adis16203_read_ring_data(&indio_dev->dev, st->rx) >= 0)
79 for (; i < ring->scan_count; i++) 79 for (; i < bitmap_weight(indio_dev->active_scan_mask,
80 data[i] = be16_to_cpup( 80 indio_dev->masklength); i++)
81 (__be16 *)&(st->rx[i*2])); 81 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
82 82
83 /* Guaranteed to be aligned with 8 byte boundary */ 83 /* Guaranteed to be aligned with 8 byte boundary */
84 if (ring->scan_timestamp) 84 if (ring->scan_timestamp)
@@ -118,11 +118,9 @@ int adis16203_configure_ring(struct iio_dev *indio_dev)
118 } 118 }
119 indio_dev->buffer = ring; 119 indio_dev->buffer = ring;
120 /* Effectively select the ring buffer implementation */ 120 /* Effectively select the ring buffer implementation */
121 ring->bpe = 2;
122 ring->scan_timestamp = true; 121 ring->scan_timestamp = true;
123 ring->access = &ring_sw_access_funcs; 122 ring->access = &ring_sw_access_funcs;
124 ring->setup_ops = &adis16203_ring_setup_ops; 123 indio_dev->setup_ops = &adis16203_ring_setup_ops;
125 ring->owner = THIS_MODULE;
126 124
127 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 125 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
128 &adis16203_trigger_handler, 126 &adis16203_trigger_handler,
diff --git a/drivers/staging/iio/accel/adis16204_core.c b/drivers/staging/iio/accel/adis16204_core.c
index 7ac5b4c533d8..fa89364b841e 100644
--- a/drivers/staging/iio/accel/adis16204_core.c
+++ b/drivers/staging/iio/accel/adis16204_core.c
@@ -20,7 +20,7 @@
20 20
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../buffer.h"
24 24
25#include "adis16204.h" 25#include "adis16204.h"
26 26
@@ -366,7 +366,7 @@ static int adis16204_read_raw(struct iio_dev *indio_dev,
366 *val = val16; 366 *val = val16;
367 mutex_unlock(&indio_dev->mlock); 367 mutex_unlock(&indio_dev->mlock);
368 return IIO_VAL_INT; 368 return IIO_VAL_INT;
369 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 369 case IIO_CHAN_INFO_SCALE:
370 switch (chan->type) { 370 switch (chan->type) {
371 case IIO_VOLTAGE: 371 case IIO_VOLTAGE:
372 *val = 0; 372 *val = 0;
@@ -390,12 +390,12 @@ static int adis16204_read_raw(struct iio_dev *indio_dev,
390 return -EINVAL; 390 return -EINVAL;
391 } 391 }
392 break; 392 break;
393 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 393 case IIO_CHAN_INFO_OFFSET:
394 *val = 25; 394 *val = 25;
395 return IIO_VAL_INT; 395 return IIO_VAL_INT;
396 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 396 case IIO_CHAN_INFO_CALIBBIAS:
397 case (1 << IIO_CHAN_INFO_PEAK_SEPARATE): 397 case IIO_CHAN_INFO_PEAK:
398 if (mask == (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE)) { 398 if (mask == IIO_CHAN_INFO_CALIBBIAS) {
399 bits = 12; 399 bits = 12;
400 addrind = 1; 400 addrind = 1;
401 } else { /* PEAK_SEPARATE */ 401 } else { /* PEAK_SEPARATE */
@@ -428,7 +428,7 @@ static int adis16204_write_raw(struct iio_dev *indio_dev,
428 s16 val16; 428 s16 val16;
429 u8 addr; 429 u8 addr;
430 switch (mask) { 430 switch (mask) {
431 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 431 case IIO_CHAN_INFO_CALIBBIAS:
432 switch (chan->type) { 432 switch (chan->type) {
433 case IIO_ACCEL: 433 case IIO_ACCEL:
434 bits = 12; 434 bits = 12;
@@ -445,28 +445,28 @@ static int adis16204_write_raw(struct iio_dev *indio_dev,
445 445
446static struct iio_chan_spec adis16204_channels[] = { 446static struct iio_chan_spec adis16204_channels[] = {
447 IIO_CHAN(IIO_VOLTAGE, 0, 0, 0, "supply", 0, 0, 447 IIO_CHAN(IIO_VOLTAGE, 0, 0, 0, "supply", 0, 0,
448 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 448 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
449 in_supply, ADIS16204_SCAN_SUPPLY, 449 in_supply, ADIS16204_SCAN_SUPPLY,
450 IIO_ST('u', 12, 16, 0), 0), 450 IIO_ST('u', 12, 16, 0), 0),
451 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, 451 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0,
452 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 452 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
453 in_aux, ADIS16204_SCAN_AUX_ADC, 453 in_aux, ADIS16204_SCAN_AUX_ADC,
454 IIO_ST('u', 12, 16, 0), 0), 454 IIO_ST('u', 12, 16, 0), 0),
455 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, 455 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
456 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 456 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
457 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE), 457 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
458 temp, ADIS16204_SCAN_TEMP, 458 temp, ADIS16204_SCAN_TEMP,
459 IIO_ST('u', 12, 16, 0), 0), 459 IIO_ST('u', 12, 16, 0), 0),
460 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X, 460 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X,
461 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 461 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
462 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 462 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
463 (1 << IIO_CHAN_INFO_PEAK_SEPARATE), 463 IIO_CHAN_INFO_PEAK_SEPARATE_BIT,
464 accel_x, ADIS16204_SCAN_ACC_X, 464 accel_x, ADIS16204_SCAN_ACC_X,
465 IIO_ST('s', 14, 16, 0), 0), 465 IIO_ST('s', 14, 16, 0), 0),
466 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y, 466 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y,
467 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 467 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
468 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 468 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
469 (1 << IIO_CHAN_INFO_PEAK_SEPARATE), 469 IIO_CHAN_INFO_PEAK_SEPARATE_BIT,
470 accel_y, ADIS16204_SCAN_ACC_Y, 470 accel_y, ADIS16204_SCAN_ACC_Y,
471 IIO_ST('s', 14, 16, 0), 0), 471 IIO_ST('s', 14, 16, 0), 0),
472 IIO_CHAN_SOFT_TIMESTAMP(5), 472 IIO_CHAN_SOFT_TIMESTAMP(5),
@@ -582,3 +582,4 @@ module_spi_driver(adis16204_driver);
582MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 582MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
583MODULE_DESCRIPTION("ADIS16204 High-g Digital Impact Sensor and Recorder"); 583MODULE_DESCRIPTION("ADIS16204 High-g Digital Impact Sensor and Recorder");
584MODULE_LICENSE("GPL v2"); 584MODULE_LICENSE("GPL v2");
585MODULE_ALIAS("spi:adis16204");
diff --git a/drivers/staging/iio/accel/adis16204_ring.c b/drivers/staging/iio/accel/adis16204_ring.c
index 6fd3d8f51f2c..4081179dfa5c 100644
--- a/drivers/staging/iio/accel/adis16204_ring.c
+++ b/drivers/staging/iio/accel/adis16204_ring.c
@@ -71,11 +71,11 @@ static irqreturn_t adis16204_trigger_handler(int irq, void *p)
71 return -ENOMEM; 71 return -ENOMEM;
72 } 72 }
73 73
74 if (ring->scan_count) 74 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
75 if (adis16204_read_ring_data(&indio_dev->dev, st->rx) >= 0) 75 adis16204_read_ring_data(&indio_dev->dev, st->rx) >= 0)
76 for (; i < ring->scan_count; i++) 76 for (; i < bitmap_weight(indio_dev->active_scan_mask,
77 data[i] = be16_to_cpup( 77 indio_dev->masklength); i++)
78 (__be16 *)&(st->rx[i*2])); 78 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
79 79
80 /* Guaranteed to be aligned with 8 byte boundary */ 80 /* Guaranteed to be aligned with 8 byte boundary */
81 if (ring->scan_timestamp) 81 if (ring->scan_timestamp)
@@ -114,10 +114,8 @@ int adis16204_configure_ring(struct iio_dev *indio_dev)
114 indio_dev->buffer = ring; 114 indio_dev->buffer = ring;
115 /* Effectively select the ring buffer implementation */ 115 /* Effectively select the ring buffer implementation */
116 ring->access = &ring_sw_access_funcs; 116 ring->access = &ring_sw_access_funcs;
117 ring->bpe = 2;
118 ring->scan_timestamp = true; 117 ring->scan_timestamp = true;
119 ring->setup_ops = &adis16204_ring_setup_ops; 118 indio_dev->setup_ops = &adis16204_ring_setup_ops;
120 ring->owner = THIS_MODULE;
121 119
122 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 120 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
123 &adis16204_trigger_handler, 121 &adis16204_trigger_handler,
diff --git a/drivers/staging/iio/accel/adis16209_core.c b/drivers/staging/iio/accel/adis16209_core.c
index c03afbf5bbdc..a98715f6bd6d 100644
--- a/drivers/staging/iio/accel/adis16209_core.c
+++ b/drivers/staging/iio/accel/adis16209_core.c
@@ -18,7 +18,7 @@
18 18
19#include "../iio.h" 19#include "../iio.h"
20#include "../sysfs.h" 20#include "../sysfs.h"
21#include "../buffer_generic.h" 21#include "../buffer.h"
22 22
23#include "adis16209.h" 23#include "adis16209.h"
24 24
@@ -304,7 +304,7 @@ static int adis16209_write_raw(struct iio_dev *indio_dev,
304 s16 val16; 304 s16 val16;
305 u8 addr; 305 u8 addr;
306 switch (mask) { 306 switch (mask) {
307 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 307 case IIO_CHAN_INFO_CALIBBIAS:
308 switch (chan->type) { 308 switch (chan->type) {
309 case IIO_ACCEL: 309 case IIO_ACCEL:
310 case IIO_INCLI: 310 case IIO_INCLI:
@@ -355,8 +355,7 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
355 *val = val16; 355 *val = val16;
356 mutex_unlock(&indio_dev->mlock); 356 mutex_unlock(&indio_dev->mlock);
357 return IIO_VAL_INT; 357 return IIO_VAL_INT;
358 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 358 case IIO_CHAN_INFO_SCALE:
359 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
360 switch (chan->type) { 359 switch (chan->type) {
361 case IIO_VOLTAGE: 360 case IIO_VOLTAGE:
362 *val = 0; 361 *val = 0;
@@ -381,10 +380,10 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
381 return -EINVAL; 380 return -EINVAL;
382 } 381 }
383 break; 382 break;
384 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 383 case IIO_CHAN_INFO_OFFSET:
385 *val = 25; 384 *val = 25;
386 return IIO_VAL_INT; 385 return IIO_VAL_INT;
387 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 386 case IIO_CHAN_INFO_CALIBBIAS:
388 switch (chan->type) { 387 switch (chan->type) {
389 case IIO_ACCEL: 388 case IIO_ACCEL:
390 bits = 14; 389 bits = 14;
@@ -410,34 +409,34 @@ static int adis16209_read_raw(struct iio_dev *indio_dev,
410 409
411static struct iio_chan_spec adis16209_channels[] = { 410static struct iio_chan_spec adis16209_channels[] = {
412 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 411 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
413 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 412 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
414 in_supply, ADIS16209_SCAN_SUPPLY, 413 in_supply, ADIS16209_SCAN_SUPPLY,
415 IIO_ST('u', 14, 16, 0), 0), 414 IIO_ST('u', 14, 16, 0), 0),
416 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, 415 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
417 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 416 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
418 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE), 417 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT,
419 temp, ADIS16209_SCAN_TEMP, 418 temp, ADIS16209_SCAN_TEMP,
420 IIO_ST('u', 12, 16, 0), 0), 419 IIO_ST('u', 12, 16, 0), 0),
421 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X, 420 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X,
422 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 421 IIO_CHAN_INFO_SCALE_SHARED_BIT |
423 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 422 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
424 accel_x, ADIS16209_SCAN_ACC_X, 423 accel_x, ADIS16209_SCAN_ACC_X,
425 IIO_ST('s', 14, 16, 0), 0), 424 IIO_ST('s', 14, 16, 0), 0),
426 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y, 425 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y,
427 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 426 IIO_CHAN_INFO_SCALE_SHARED_BIT |
428 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 427 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
429 accel_y, ADIS16209_SCAN_ACC_Y, 428 accel_y, ADIS16209_SCAN_ACC_Y,
430 IIO_ST('s', 14, 16, 0), 0), 429 IIO_ST('s', 14, 16, 0), 0),
431 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, 430 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0,
432 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 431 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
433 in_aux, ADIS16209_SCAN_AUX_ADC, 432 in_aux, ADIS16209_SCAN_AUX_ADC,
434 IIO_ST('u', 12, 16, 0), 0), 433 IIO_ST('u', 12, 16, 0), 0),
435 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X, 434 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_X,
436 (1 << IIO_CHAN_INFO_SCALE_SHARED), 435 IIO_CHAN_INFO_SCALE_SHARED_BIT,
437 incli_x, ADIS16209_SCAN_INCLI_X, 436 incli_x, ADIS16209_SCAN_INCLI_X,
438 IIO_ST('s', 14, 16, 0), 0), 437 IIO_ST('s', 14, 16, 0), 0),
439 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y, 438 IIO_CHAN(IIO_INCLI, 1, 0, 0, NULL, 0, IIO_MOD_Y,
440 (1 << IIO_CHAN_INFO_SCALE_SHARED), 439 IIO_CHAN_INFO_SCALE_SHARED_BIT,
441 incli_y, ADIS16209_SCAN_INCLI_Y, 440 incli_y, ADIS16209_SCAN_INCLI_Y,
442 IIO_ST('s', 14, 16, 0), 0), 441 IIO_ST('s', 14, 16, 0), 0),
443 IIO_CHAN(IIO_ROT, 0, 1, 0, NULL, 0, IIO_MOD_X, 442 IIO_CHAN(IIO_ROT, 0, 1, 0, NULL, 0, IIO_MOD_X,
@@ -558,3 +557,4 @@ module_spi_driver(adis16209_driver);
558MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 557MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
559MODULE_DESCRIPTION("Analog Devices ADIS16209 Digital Vibration Sensor driver"); 558MODULE_DESCRIPTION("Analog Devices ADIS16209 Digital Vibration Sensor driver");
560MODULE_LICENSE("GPL v2"); 559MODULE_LICENSE("GPL v2");
560MODULE_ALIAS("spi:adis16209");
diff --git a/drivers/staging/iio/accel/adis16209_ring.c b/drivers/staging/iio/accel/adis16209_ring.c
index d17e39d95459..2a6fd334f5f1 100644
--- a/drivers/staging/iio/accel/adis16209_ring.c
+++ b/drivers/staging/iio/accel/adis16209_ring.c
@@ -72,9 +72,10 @@ static irqreturn_t adis16209_trigger_handler(int irq, void *p)
72 return -ENOMEM; 72 return -ENOMEM;
73 } 73 }
74 74
75 if (ring->scan_count && 75 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
76 adis16209_read_ring_data(&indio_dev->dev, st->rx) >= 0) 76 adis16209_read_ring_data(&indio_dev->dev, st->rx) >= 0)
77 for (; i < ring->scan_count; i++) 77 for (; i < bitmap_weight(indio_dev->active_scan_mask,
78 indio_dev->masklength); i++)
78 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2])); 79 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
79 80
80 /* Guaranteed to be aligned with 8 byte boundary */ 81 /* Guaranteed to be aligned with 8 byte boundary */
@@ -114,10 +115,8 @@ int adis16209_configure_ring(struct iio_dev *indio_dev)
114 indio_dev->buffer = ring; 115 indio_dev->buffer = ring;
115 /* Effectively select the ring buffer implementation */ 116 /* Effectively select the ring buffer implementation */
116 ring->access = &ring_sw_access_funcs; 117 ring->access = &ring_sw_access_funcs;
117 ring->bpe = 2;
118 ring->scan_timestamp = true; 118 ring->scan_timestamp = true;
119 ring->setup_ops = &adis16209_ring_setup_ops; 119 indio_dev->setup_ops = &adis16209_ring_setup_ops;
120 ring->owner = THIS_MODULE;
121 120
122 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 121 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
123 &adis16209_trigger_handler, 122 &adis16209_trigger_handler,
diff --git a/drivers/staging/iio/accel/adis16220_core.c b/drivers/staging/iio/accel/adis16220_core.c
index 73298e7849e6..51a852d45482 100644
--- a/drivers/staging/iio/accel/adis16220_core.c
+++ b/drivers/staging/iio/accel/adis16220_core.c
@@ -167,9 +167,9 @@ static ssize_t adis16220_write_16bit(struct device *dev,
167 struct iio_dev *indio_dev = dev_get_drvdata(dev); 167 struct iio_dev *indio_dev = dev_get_drvdata(dev);
168 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 168 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
169 int ret; 169 int ret;
170 long val; 170 u16 val;
171 171
172 ret = strict_strtol(buf, 10, &val); 172 ret = kstrtou16(buf, 10, &val);
173 if (ret) 173 if (ret)
174 goto error_ret; 174 goto error_ret;
175 ret = adis16220_spi_write_reg_16(indio_dev, this_attr->address, val); 175 ret = adis16220_spi_write_reg_16(indio_dev, this_attr->address, val);
@@ -510,17 +510,17 @@ static int adis16220_read_raw(struct iio_dev *indio_dev,
510 case 0: 510 case 0:
511 addrind = 0; 511 addrind = 0;
512 break; 512 break;
513 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 513 case IIO_CHAN_INFO_OFFSET:
514 if (chan->type == IIO_TEMP) { 514 if (chan->type == IIO_TEMP) {
515 *val = 25; 515 *val = 25;
516 return IIO_VAL_INT; 516 return IIO_VAL_INT;
517 } 517 }
518 addrind = 1; 518 addrind = 1;
519 break; 519 break;
520 case (1 << IIO_CHAN_INFO_PEAK_SEPARATE): 520 case IIO_CHAN_INFO_PEAK:
521 addrind = 2; 521 addrind = 2;
522 break; 522 break;
523 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 523 case IIO_CHAN_INFO_SCALE:
524 *val = 0; 524 *val = 0;
525 switch (chan->type) { 525 switch (chan->type) {
526 case IIO_TEMP: 526 case IIO_TEMP:
@@ -575,27 +575,27 @@ static const struct iio_chan_spec adis16220_channels[] = {
575 .indexed = 1, 575 .indexed = 1,
576 .channel = 0, 576 .channel = 0,
577 .extend_name = "supply", 577 .extend_name = "supply",
578 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 578 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
579 .address = in_supply, 579 .address = in_supply,
580 }, { 580 }, {
581 .type = IIO_ACCEL, 581 .type = IIO_ACCEL,
582 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 582 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
583 (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | 583 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
584 (1 << IIO_CHAN_INFO_PEAK_SEPARATE), 584 IIO_CHAN_INFO_PEAK_SEPARATE_BIT,
585 .address = accel, 585 .address = accel,
586 }, { 586 }, {
587 .type = IIO_TEMP, 587 .type = IIO_TEMP,
588 .indexed = 1, 588 .indexed = 1,
589 .channel = 0, 589 .channel = 0,
590 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 590 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
591 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 591 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
592 .address = temp, 592 .address = temp,
593 }, { 593 }, {
594 .type = IIO_VOLTAGE, 594 .type = IIO_VOLTAGE,
595 .indexed = 1, 595 .indexed = 1,
596 .channel = 1, 596 .channel = 1,
597 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 597 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
598 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 598 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
599 .address = in_1, 599 .address = in_1,
600 }, { 600 }, {
601 .type = IIO_VOLTAGE, 601 .type = IIO_VOLTAGE,
@@ -713,3 +713,4 @@ module_spi_driver(adis16220_driver);
713MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 713MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
714MODULE_DESCRIPTION("Analog Devices ADIS16220 Digital Vibration Sensor"); 714MODULE_DESCRIPTION("Analog Devices ADIS16220 Digital Vibration Sensor");
715MODULE_LICENSE("GPL v2"); 715MODULE_LICENSE("GPL v2");
716MODULE_ALIAS("spi:adis16220");
diff --git a/drivers/staging/iio/accel/adis16240_core.c b/drivers/staging/iio/accel/adis16240_core.c
index 88881b9919ef..17f77fef7f2b 100644
--- a/drivers/staging/iio/accel/adis16240_core.c
+++ b/drivers/staging/iio/accel/adis16240_core.c
@@ -21,7 +21,7 @@
21 21
22#include "../iio.h" 22#include "../iio.h"
23#include "../sysfs.h" 23#include "../sysfs.h"
24#include "../buffer_generic.h" 24#include "../buffer.h"
25 25
26#include "adis16240.h" 26#include "adis16240.h"
27 27
@@ -389,8 +389,7 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
389 *val = val16; 389 *val = val16;
390 mutex_unlock(&indio_dev->mlock); 390 mutex_unlock(&indio_dev->mlock);
391 return IIO_VAL_INT; 391 return IIO_VAL_INT;
392 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 392 case IIO_CHAN_INFO_SCALE:
393 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
394 switch (chan->type) { 393 switch (chan->type) {
395 case IIO_VOLTAGE: 394 case IIO_VOLTAGE:
396 *val = 0; 395 *val = 0;
@@ -411,14 +410,14 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
411 return -EINVAL; 410 return -EINVAL;
412 } 411 }
413 break; 412 break;
414 case (1 << IIO_CHAN_INFO_PEAK_SCALE_SHARED): 413 case IIO_CHAN_INFO_PEAK_SCALE:
415 *val = 6; 414 *val = 6;
416 *val2 = 629295; 415 *val2 = 629295;
417 return IIO_VAL_INT_PLUS_MICRO; 416 return IIO_VAL_INT_PLUS_MICRO;
418 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 417 case IIO_CHAN_INFO_OFFSET:
419 *val = 25; 418 *val = 25;
420 return IIO_VAL_INT; 419 return IIO_VAL_INT;
421 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 420 case IIO_CHAN_INFO_CALIBBIAS:
422 bits = 10; 421 bits = 10;
423 mutex_lock(&indio_dev->mlock); 422 mutex_lock(&indio_dev->mlock);
424 addr = adis16240_addresses[chan->address][1]; 423 addr = adis16240_addresses[chan->address][1];
@@ -432,7 +431,7 @@ static int adis16240_read_raw(struct iio_dev *indio_dev,
432 *val = val16; 431 *val = val16;
433 mutex_unlock(&indio_dev->mlock); 432 mutex_unlock(&indio_dev->mlock);
434 return IIO_VAL_INT; 433 return IIO_VAL_INT;
435 case (1 << IIO_CHAN_INFO_PEAK_SEPARATE): 434 case IIO_CHAN_INFO_PEAK:
436 bits = 10; 435 bits = 10;
437 mutex_lock(&indio_dev->mlock); 436 mutex_lock(&indio_dev->mlock);
438 addr = adis16240_addresses[chan->address][2]; 437 addr = adis16240_addresses[chan->address][2];
@@ -460,7 +459,7 @@ static int adis16240_write_raw(struct iio_dev *indio_dev,
460 s16 val16; 459 s16 val16;
461 u8 addr; 460 u8 addr;
462 switch (mask) { 461 switch (mask) {
463 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 462 case IIO_CHAN_INFO_CALIBBIAS:
464 val16 = val & ((1 << bits) - 1); 463 val16 = val & ((1 << bits) - 1);
465 addr = adis16240_addresses[chan->address][1]; 464 addr = adis16240_addresses[chan->address][1];
466 return adis16240_spi_write_reg_16(indio_dev, addr, val16); 465 return adis16240_spi_write_reg_16(indio_dev, addr, val16);
@@ -470,7 +469,7 @@ static int adis16240_write_raw(struct iio_dev *indio_dev,
470 469
471static struct iio_chan_spec adis16240_channels[] = { 470static struct iio_chan_spec adis16240_channels[] = {
472 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0, 471 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0,
473 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 472 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
474 in_supply, ADIS16240_SCAN_SUPPLY, 473 in_supply, ADIS16240_SCAN_SUPPLY,
475 IIO_ST('u', 10, 16, 0), 0), 474 IIO_ST('u', 10, 16, 0), 0),
476 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, 475 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0,
@@ -478,22 +477,22 @@ static struct iio_chan_spec adis16240_channels[] = {
478 in_aux, ADIS16240_SCAN_AUX_ADC, 477 in_aux, ADIS16240_SCAN_AUX_ADC,
479 IIO_ST('u', 10, 16, 0), 0), 478 IIO_ST('u', 10, 16, 0), 0),
480 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X, 479 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_X,
481 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 480 IIO_CHAN_INFO_SCALE_SHARED_BIT |
482 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 481 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
483 accel_x, ADIS16240_SCAN_ACC_X, 482 accel_x, ADIS16240_SCAN_ACC_X,
484 IIO_ST('s', 10, 16, 0), 0), 483 IIO_ST('s', 10, 16, 0), 0),
485 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y, 484 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Y,
486 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 485 IIO_CHAN_INFO_SCALE_SHARED_BIT |
487 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 486 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
488 accel_y, ADIS16240_SCAN_ACC_Y, 487 accel_y, ADIS16240_SCAN_ACC_Y,
489 IIO_ST('s', 10, 16, 0), 0), 488 IIO_ST('s', 10, 16, 0), 0),
490 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Z, 489 IIO_CHAN(IIO_ACCEL, 1, 0, 0, NULL, 0, IIO_MOD_Z,
491 (1 << IIO_CHAN_INFO_SCALE_SHARED) | 490 IIO_CHAN_INFO_SCALE_SHARED_BIT |
492 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 491 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
493 accel_z, ADIS16240_SCAN_ACC_Z, 492 accel_z, ADIS16240_SCAN_ACC_Z,
494 IIO_ST('s', 10, 16, 0), 0), 493 IIO_ST('s', 10, 16, 0), 0),
495 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, 494 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
496 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 495 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
497 temp, ADIS16240_SCAN_TEMP, 496 temp, ADIS16240_SCAN_TEMP,
498 IIO_ST('u', 10, 16, 0), 0), 497 IIO_ST('u', 10, 16, 0), 0),
499 IIO_CHAN_SOFT_TIMESTAMP(6) 498 IIO_CHAN_SOFT_TIMESTAMP(6)
@@ -611,3 +610,4 @@ module_spi_driver(adis16240_driver);
611MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 610MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
612MODULE_DESCRIPTION("Analog Devices Programmable Impact Sensor and Recorder"); 611MODULE_DESCRIPTION("Analog Devices Programmable Impact Sensor and Recorder");
613MODULE_LICENSE("GPL v2"); 612MODULE_LICENSE("GPL v2");
613MODULE_ALIAS("spi:adis16240");
diff --git a/drivers/staging/iio/accel/adis16240_ring.c b/drivers/staging/iio/accel/adis16240_ring.c
index b907ca3f4fdf..e23622d96f9f 100644
--- a/drivers/staging/iio/accel/adis16240_ring.c
+++ b/drivers/staging/iio/accel/adis16240_ring.c
@@ -69,9 +69,10 @@ static irqreturn_t adis16240_trigger_handler(int irq, void *p)
69 return -ENOMEM; 69 return -ENOMEM;
70 } 70 }
71 71
72 if (ring->scan_count && 72 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
73 adis16240_read_ring_data(&indio_dev->dev, st->rx) >= 0) 73 adis16240_read_ring_data(&indio_dev->dev, st->rx) >= 0)
74 for (; i < ring->scan_count; i++) 74 for (; i < bitmap_weight(indio_dev->active_scan_mask,
75 indio_dev->masklength); i++)
75 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2])); 76 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
76 77
77 /* Guaranteed to be aligned with 8 byte boundary */ 78 /* Guaranteed to be aligned with 8 byte boundary */
@@ -111,10 +112,8 @@ int adis16240_configure_ring(struct iio_dev *indio_dev)
111 indio_dev->buffer = ring; 112 indio_dev->buffer = ring;
112 /* Effectively select the ring buffer implementation */ 113 /* Effectively select the ring buffer implementation */
113 ring->access = &ring_sw_access_funcs; 114 ring->access = &ring_sw_access_funcs;
114 ring->bpe = 2;
115 ring->scan_timestamp = true; 115 ring->scan_timestamp = true;
116 ring->setup_ops = &adis16240_ring_setup_ops; 116 indio_dev->setup_ops = &adis16240_ring_setup_ops;
117 ring->owner = THIS_MODULE;
118 117
119 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 118 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
120 &adis16240_trigger_handler, 119 &adis16240_trigger_handler,
diff --git a/drivers/staging/iio/accel/kxsd9.c b/drivers/staging/iio/accel/kxsd9.c
index cfce21c2eddc..d13d7215ff6e 100644
--- a/drivers/staging/iio/accel/kxsd9.c
+++ b/drivers/staging/iio/accel/kxsd9.c
@@ -140,7 +140,7 @@ static int kxsd9_write_raw(struct iio_dev *indio_dev,
140{ 140{
141 int ret = -EINVAL; 141 int ret = -EINVAL;
142 142
143 if (mask == (1 << IIO_CHAN_INFO_SCALE_SHARED)) { 143 if (mask == IIO_CHAN_INFO_SCALE) {
144 /* Check no integer component */ 144 /* Check no integer component */
145 if (val) 145 if (val)
146 return -EINVAL; 146 return -EINVAL;
@@ -164,7 +164,7 @@ static int kxsd9_read_raw(struct iio_dev *indio_dev,
164 goto error_ret; 164 goto error_ret;
165 *val = ret; 165 *val = ret;
166 break; 166 break;
167 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 167 case IIO_CHAN_INFO_SCALE:
168 ret = spi_w8r8(st->us, KXSD9_READ(KXSD9_REG_CTRL_C)); 168 ret = spi_w8r8(st->us, KXSD9_READ(KXSD9_REG_CTRL_C));
169 if (ret) 169 if (ret)
170 goto error_ret; 170 goto error_ret;
@@ -181,7 +181,7 @@ error_ret:
181 .type = IIO_ACCEL, \ 181 .type = IIO_ACCEL, \
182 .modified = 1, \ 182 .modified = 1, \
183 .channel2 = IIO_MOD_##axis, \ 183 .channel2 = IIO_MOD_##axis, \
184 .info_mask = 1 << IIO_CHAN_INFO_SCALE_SHARED, \ 184 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
185 .address = KXSD9_REG_##axis, \ 185 .address = KXSD9_REG_##axis, \
186 } 186 }
187 187
@@ -268,8 +268,10 @@ static int __devexit kxsd9_remove(struct spi_device *spi)
268} 268}
269 269
270static const struct spi_device_id kxsd9_id[] = { 270static const struct spi_device_id kxsd9_id[] = {
271 {"kxsd9", 0} 271 {"kxsd9", 0},
272 { },
272}; 273};
274MODULE_DEVICE_TABLE(spi, kxsd9_id);
273 275
274static struct spi_driver kxsd9_driver = { 276static struct spi_driver kxsd9_driver = {
275 .driver = { 277 .driver = {
diff --git a/drivers/staging/iio/accel/lis3l02dq.h b/drivers/staging/iio/accel/lis3l02dq.h
index 7237a9ab61a8..2db383fc2743 100644
--- a/drivers/staging/iio/accel/lis3l02dq.h
+++ b/drivers/staging/iio/accel/lis3l02dq.h
@@ -181,11 +181,6 @@ int lis3l02dq_disable_all_events(struct iio_dev *indio_dev);
181void lis3l02dq_remove_trigger(struct iio_dev *indio_dev); 181void lis3l02dq_remove_trigger(struct iio_dev *indio_dev);
182int lis3l02dq_probe_trigger(struct iio_dev *indio_dev); 182int lis3l02dq_probe_trigger(struct iio_dev *indio_dev);
183 183
184ssize_t lis3l02dq_read_accel_from_buffer(struct iio_buffer *buffer,
185 int index,
186 int *val);
187
188
189int lis3l02dq_configure_buffer(struct iio_dev *indio_dev); 184int lis3l02dq_configure_buffer(struct iio_dev *indio_dev);
190void lis3l02dq_unconfigure_buffer(struct iio_dev *indio_dev); 185void lis3l02dq_unconfigure_buffer(struct iio_dev *indio_dev);
191 186
@@ -212,13 +207,6 @@ static inline int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
212{ 207{
213 return 0; 208 return 0;
214} 209}
215static inline ssize_t
216lis3l02dq_read_accel_from_buffer(struct iio_buffer *buffer,
217 int index,
218 int *val)
219{
220 return 0;
221}
222 210
223static int lis3l02dq_configure_buffer(struct iio_dev *indio_dev) 211static int lis3l02dq_configure_buffer(struct iio_dev *indio_dev)
224{ 212{
diff --git a/drivers/staging/iio/accel/lis3l02dq_core.c b/drivers/staging/iio/accel/lis3l02dq_core.c
index 6877521ec173..376da5137967 100644
--- a/drivers/staging/iio/accel/lis3l02dq_core.c
+++ b/drivers/staging/iio/accel/lis3l02dq_core.c
@@ -25,7 +25,8 @@
25 25
26#include "../iio.h" 26#include "../iio.h"
27#include "../sysfs.h" 27#include "../sysfs.h"
28#include "../buffer_generic.h" 28#include "../events.h"
29#include "../buffer.h"
29 30
30#include "lis3l02dq.h" 31#include "lis3l02dq.h"
31 32
@@ -226,14 +227,14 @@ static int lis3l02dq_write_raw(struct iio_dev *indio_dev,
226 u8 uval; 227 u8 uval;
227 s8 sval; 228 s8 sval;
228 switch (mask) { 229 switch (mask) {
229 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 230 case IIO_CHAN_INFO_CALIBBIAS:
230 if (val > 255 || val < -256) 231 if (val > 255 || val < -256)
231 return -EINVAL; 232 return -EINVAL;
232 sval = val; 233 sval = val;
233 reg = lis3l02dq_axis_map[LIS3L02DQ_BIAS][chan->address]; 234 reg = lis3l02dq_axis_map[LIS3L02DQ_BIAS][chan->address];
234 ret = lis3l02dq_spi_write_reg_8(indio_dev, reg, sval); 235 ret = lis3l02dq_spi_write_reg_8(indio_dev, reg, sval);
235 break; 236 break;
236 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 237 case IIO_CHAN_INFO_CALIBSCALE:
237 if (val & ~0xFF) 238 if (val & ~0xFF)
238 return -EINVAL; 239 return -EINVAL;
239 uval = val; 240 uval = val;
@@ -259,23 +260,20 @@ static int lis3l02dq_read_raw(struct iio_dev *indio_dev,
259 case 0: 260 case 0:
260 /* Take the iio_dev status lock */ 261 /* Take the iio_dev status lock */
261 mutex_lock(&indio_dev->mlock); 262 mutex_lock(&indio_dev->mlock);
262 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) 263 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) {
263 ret = lis3l02dq_read_accel_from_buffer(indio_dev-> 264 ret = -EBUSY;
264 buffer, 265 } else {
265 chan->scan_index,
266 val);
267 else {
268 reg = lis3l02dq_axis_map 266 reg = lis3l02dq_axis_map
269 [LIS3L02DQ_ACCEL][chan->address]; 267 [LIS3L02DQ_ACCEL][chan->address];
270 ret = lis3l02dq_read_reg_s16(indio_dev, reg, val); 268 ret = lis3l02dq_read_reg_s16(indio_dev, reg, val);
271 } 269 }
272 mutex_unlock(&indio_dev->mlock); 270 mutex_unlock(&indio_dev->mlock);
273 return IIO_VAL_INT; 271 return IIO_VAL_INT;
274 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 272 case IIO_CHAN_INFO_SCALE:
275 *val = 0; 273 *val = 0;
276 *val2 = 9580; 274 *val2 = 9580;
277 return IIO_VAL_INT_PLUS_MICRO; 275 return IIO_VAL_INT_PLUS_MICRO;
278 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 276 case IIO_CHAN_INFO_CALIBSCALE:
279 reg = lis3l02dq_axis_map[LIS3L02DQ_GAIN][chan->address]; 277 reg = lis3l02dq_axis_map[LIS3L02DQ_GAIN][chan->address];
280 ret = lis3l02dq_spi_read_reg_8(indio_dev, reg, &utemp); 278 ret = lis3l02dq_spi_read_reg_8(indio_dev, reg, &utemp);
281 if (ret) 279 if (ret)
@@ -284,7 +282,7 @@ static int lis3l02dq_read_raw(struct iio_dev *indio_dev,
284 *val = utemp; 282 *val = utemp;
285 return IIO_VAL_INT; 283 return IIO_VAL_INT;
286 284
287 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 285 case IIO_CHAN_INFO_CALIBBIAS:
288 reg = lis3l02dq_axis_map[LIS3L02DQ_BIAS][chan->address]; 286 reg = lis3l02dq_axis_map[LIS3L02DQ_BIAS][chan->address];
289 ret = lis3l02dq_spi_read_reg_8(indio_dev, reg, (u8 *)&stemp); 287 ret = lis3l02dq_spi_read_reg_8(indio_dev, reg, (u8 *)&stemp);
290 /* to match with what previous code does */ 288 /* to match with what previous code does */
@@ -331,11 +329,11 @@ static ssize_t lis3l02dq_write_frequency(struct device *dev,
331 size_t len) 329 size_t len)
332{ 330{
333 struct iio_dev *indio_dev = dev_get_drvdata(dev); 331 struct iio_dev *indio_dev = dev_get_drvdata(dev);
334 long val; 332 unsigned long val;
335 int ret; 333 int ret;
336 u8 t; 334 u8 t;
337 335
338 ret = strict_strtol(buf, 10, &val); 336 ret = kstrtoul(buf, 10, &val);
339 if (ret) 337 if (ret)
340 return ret; 338 return ret;
341 339
@@ -515,9 +513,9 @@ static irqreturn_t lis3l02dq_event_handler(int irq, void *private)
515} 513}
516 514
517#define LIS3L02DQ_INFO_MASK \ 515#define LIS3L02DQ_INFO_MASK \
518 ((1 << IIO_CHAN_INFO_SCALE_SHARED) | \ 516 (IIO_CHAN_INFO_SCALE_SHARED_BIT | \
519 (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | \ 517 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
520 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE)) 518 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT)
521 519
522#define LIS3L02DQ_EVENT_MASK \ 520#define LIS3L02DQ_EVENT_MASK \
523 (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | \ 521 (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | \
@@ -534,7 +532,7 @@ static struct iio_chan_spec lis3l02dq_channels[] = {
534}; 532};
535 533
536 534
537static ssize_t lis3l02dq_read_event_config(struct iio_dev *indio_dev, 535static int lis3l02dq_read_event_config(struct iio_dev *indio_dev,
538 u64 event_code) 536 u64 event_code)
539{ 537{
540 538
@@ -809,3 +807,4 @@ module_spi_driver(lis3l02dq_driver);
809MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>"); 807MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>");
810MODULE_DESCRIPTION("ST LIS3L02DQ Accelerometer SPI driver"); 808MODULE_DESCRIPTION("ST LIS3L02DQ Accelerometer SPI driver");
811MODULE_LICENSE("GPL v2"); 809MODULE_LICENSE("GPL v2");
810MODULE_ALIAS("spi:lis3l02dq");
diff --git a/drivers/staging/iio/accel/lis3l02dq_ring.c b/drivers/staging/iio/accel/lis3l02dq_ring.c
index 89527af8f4c5..98c5c92d3450 100644
--- a/drivers/staging/iio/accel/lis3l02dq_ring.c
+++ b/drivers/staging/iio/accel/lis3l02dq_ring.c
@@ -38,38 +38,6 @@ irqreturn_t lis3l02dq_data_rdy_trig_poll(int irq, void *private)
38 return IRQ_WAKE_THREAD; 38 return IRQ_WAKE_THREAD;
39} 39}
40 40
41/**
42 * lis3l02dq_read_accel_from_buffer() individual acceleration read from buffer
43 **/
44ssize_t lis3l02dq_read_accel_from_buffer(struct iio_buffer *buffer,
45 int index,
46 int *val)
47{
48 int ret;
49 s16 *data;
50
51 if (!iio_scan_mask_query(buffer, index))
52 return -EINVAL;
53
54 if (!buffer->access->read_last)
55 return -EBUSY;
56
57 data = kmalloc(buffer->access->get_bytes_per_datum(buffer),
58 GFP_KERNEL);
59 if (data == NULL)
60 return -ENOMEM;
61
62 ret = buffer->access->read_last(buffer, (u8 *)data);
63 if (ret)
64 goto error_free_data;
65 *val = data[bitmap_weight(buffer->scan_mask, index)];
66error_free_data:
67
68 kfree(data);
69
70 return ret;
71}
72
73static const u8 read_all_tx_array[] = { 41static const u8 read_all_tx_array[] = {
74 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0, 42 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
75 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0, 43 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
@@ -87,21 +55,21 @@ static const u8 read_all_tx_array[] = {
87 **/ 55 **/
88static int lis3l02dq_read_all(struct iio_dev *indio_dev, u8 *rx_array) 56static int lis3l02dq_read_all(struct iio_dev *indio_dev, u8 *rx_array)
89{ 57{
90 struct iio_buffer *buffer = indio_dev->buffer;
91 struct lis3l02dq_state *st = iio_priv(indio_dev); 58 struct lis3l02dq_state *st = iio_priv(indio_dev);
92 struct spi_transfer *xfers; 59 struct spi_transfer *xfers;
93 struct spi_message msg; 60 struct spi_message msg;
94 int ret, i, j = 0; 61 int ret, i, j = 0;
95 62
96 xfers = kzalloc((buffer->scan_count) * 2 63 xfers = kcalloc(bitmap_weight(indio_dev->active_scan_mask,
97 * sizeof(*xfers), GFP_KERNEL); 64 indio_dev->masklength) * 2,
65 sizeof(*xfers), GFP_KERNEL);
98 if (!xfers) 66 if (!xfers)
99 return -ENOMEM; 67 return -ENOMEM;
100 68
101 mutex_lock(&st->buf_lock); 69 mutex_lock(&st->buf_lock);
102 70
103 for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++) 71 for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++)
104 if (test_bit(i, buffer->scan_mask)) { 72 if (test_bit(i, indio_dev->active_scan_mask)) {
105 /* lower byte */ 73 /* lower byte */
106 xfers[j].tx_buf = st->tx + 2*j; 74 xfers[j].tx_buf = st->tx + 2*j;
107 st->tx[2*j] = read_all_tx_array[i*4]; 75 st->tx[2*j] = read_all_tx_array[i*4];
@@ -129,7 +97,8 @@ static int lis3l02dq_read_all(struct iio_dev *indio_dev, u8 *rx_array)
129 * values in alternate bytes 97 * values in alternate bytes
130 */ 98 */
131 spi_message_init(&msg); 99 spi_message_init(&msg);
132 for (j = 0; j < buffer->scan_count * 2; j++) 100 for (j = 0; j < bitmap_weight(indio_dev->active_scan_mask,
101 indio_dev->masklength) * 2; j++)
133 spi_message_add_tail(&xfers[j], &msg); 102 spi_message_add_tail(&xfers[j], &msg);
134 103
135 ret = spi_sync(st->us, &msg); 104 ret = spi_sync(st->us, &msg);
@@ -145,14 +114,16 @@ static int lis3l02dq_get_buffer_element(struct iio_dev *indio_dev,
145 int ret, i; 114 int ret, i;
146 u8 *rx_array ; 115 u8 *rx_array ;
147 s16 *data = (s16 *)buf; 116 s16 *data = (s16 *)buf;
117 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
118 indio_dev->masklength);
148 119
149 rx_array = kzalloc(4 * (indio_dev->buffer->scan_count), GFP_KERNEL); 120 rx_array = kzalloc(4 * scan_count, GFP_KERNEL);
150 if (rx_array == NULL) 121 if (rx_array == NULL)
151 return -ENOMEM; 122 return -ENOMEM;
152 ret = lis3l02dq_read_all(indio_dev, rx_array); 123 ret = lis3l02dq_read_all(indio_dev, rx_array);
153 if (ret < 0) 124 if (ret < 0)
154 return ret; 125 return ret;
155 for (i = 0; i < indio_dev->buffer->scan_count; i++) 126 for (i = 0; i < scan_count; i++)
156 data[i] = combine_8_to_16(rx_array[i*4+1], 127 data[i] = combine_8_to_16(rx_array[i*4+1],
157 rx_array[i*4+3]); 128 rx_array[i*4+3]);
158 kfree(rx_array); 129 kfree(rx_array);
@@ -175,7 +146,7 @@ static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p)
175 return -ENOMEM; 146 return -ENOMEM;
176 } 147 }
177 148
178 if (buffer->scan_count) 149 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
179 len = lis3l02dq_get_buffer_element(indio_dev, data); 150 len = lis3l02dq_get_buffer_element(indio_dev, data);
180 151
181 /* Guaranteed to be aligned with 8 byte boundary */ 152 /* Guaranteed to be aligned with 8 byte boundary */
@@ -363,17 +334,17 @@ static int lis3l02dq_buffer_postenable(struct iio_dev *indio_dev)
363 if (ret) 334 if (ret)
364 goto error_ret; 335 goto error_ret;
365 336
366 if (iio_scan_mask_query(indio_dev->buffer, 0)) { 337 if (test_bit(0, indio_dev->active_scan_mask)) {
367 t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE; 338 t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
368 oneenabled = true; 339 oneenabled = true;
369 } else 340 } else
370 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE; 341 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
371 if (iio_scan_mask_query(indio_dev->buffer, 1)) { 342 if (test_bit(1, indio_dev->active_scan_mask)) {
372 t |= LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE; 343 t |= LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
373 oneenabled = true; 344 oneenabled = true;
374 } else 345 } else
375 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE; 346 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
376 if (iio_scan_mask_query(indio_dev->buffer, 2)) { 347 if (test_bit(2, indio_dev->active_scan_mask)) {
377 t |= LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE; 348 t |= LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
378 oneenabled = true; 349 oneenabled = true;
379 } else 350 } else
@@ -437,11 +408,9 @@ int lis3l02dq_configure_buffer(struct iio_dev *indio_dev)
437 indio_dev->buffer = buffer; 408 indio_dev->buffer = buffer;
438 /* Effectively select the buffer implementation */ 409 /* Effectively select the buffer implementation */
439 indio_dev->buffer->access = &lis3l02dq_access_funcs; 410 indio_dev->buffer->access = &lis3l02dq_access_funcs;
440 buffer->bpe = 2;
441 411
442 buffer->scan_timestamp = true; 412 buffer->scan_timestamp = true;
443 buffer->setup_ops = &lis3l02dq_buffer_setup_ops; 413 indio_dev->setup_ops = &lis3l02dq_buffer_setup_ops;
444 buffer->owner = THIS_MODULE;
445 414
446 /* Functions are NULL as we set handler below */ 415 /* Functions are NULL as we set handler below */
447 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 416 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
diff --git a/drivers/staging/iio/accel/sca3000_core.c b/drivers/staging/iio/accel/sca3000_core.c
index 6c359074a06d..49764fb7181c 100644
--- a/drivers/staging/iio/accel/sca3000_core.c
+++ b/drivers/staging/iio/accel/sca3000_core.c
@@ -20,7 +20,8 @@
20#include <linux/module.h> 20#include <linux/module.h>
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../events.h"
24#include "../buffer.h"
24 25
25#include "sca3000.h" 26#include "sca3000.h"
26 27
@@ -381,13 +382,17 @@ sca3000_store_measurement_mode(struct device *dev,
381 struct iio_dev *indio_dev = dev_get_drvdata(dev); 382 struct iio_dev *indio_dev = dev_get_drvdata(dev);
382 struct sca3000_state *st = iio_priv(indio_dev); 383 struct sca3000_state *st = iio_priv(indio_dev);
383 int ret; 384 int ret;
384 int mask = 0x03; 385 u8 mask = 0x03;
385 long val; 386 u8 val;
386 387
387 mutex_lock(&st->lock); 388 mutex_lock(&st->lock);
388 ret = strict_strtol(buf, 10, &val); 389 ret = kstrtou8(buf, 10, &val);
389 if (ret) 390 if (ret)
390 goto error_ret; 391 goto error_ret;
392 if (val > 3) {
393 ret = -EINVAL;
394 goto error_ret;
395 }
391 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 396 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
392 if (ret) 397 if (ret)
393 goto error_ret; 398 goto error_ret;
@@ -424,7 +429,7 @@ static IIO_DEVICE_ATTR(measurement_mode, S_IRUGO | S_IWUSR,
424static IIO_DEVICE_ATTR(revision, S_IRUGO, sca3000_show_rev, NULL, 0); 429static IIO_DEVICE_ATTR(revision, S_IRUGO, sca3000_show_rev, NULL, 0);
425 430
426#define SCA3000_INFO_MASK \ 431#define SCA3000_INFO_MASK \
427 (1 << IIO_CHAN_INFO_SCALE_SHARED) 432 IIO_CHAN_INFO_SCALE_SHARED_BIT
428#define SCA3000_EVENT_MASK \ 433#define SCA3000_EVENT_MASK \
429 (IIO_EV_BIT(IIO_EV_TYPE_MAG, IIO_EV_DIR_RISING)) 434 (IIO_EV_BIT(IIO_EV_TYPE_MAG, IIO_EV_DIR_RISING))
430 435
@@ -474,7 +479,7 @@ static int sca3000_read_raw(struct iio_dev *indio_dev,
474 (sizeof(*val)*8 - 13); 479 (sizeof(*val)*8 - 13);
475 mutex_unlock(&st->lock); 480 mutex_unlock(&st->lock);
476 return IIO_VAL_INT; 481 return IIO_VAL_INT;
477 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 482 case IIO_CHAN_INFO_SCALE:
478 *val = 0; 483 *val = 0;
479 if (chan->type == IIO_ACCEL) 484 if (chan->type == IIO_ACCEL)
480 *val2 = st->info->scale; 485 *val2 = st->info->scale;
@@ -1161,9 +1166,9 @@ static int __devinit sca3000_probe(struct spi_device *spi)
1161 if (ret < 0) 1166 if (ret < 0)
1162 goto error_unregister_dev; 1167 goto error_unregister_dev;
1163 if (indio_dev->buffer) { 1168 if (indio_dev->buffer) {
1164 iio_scan_mask_set(indio_dev->buffer, 0); 1169 iio_scan_mask_set(indio_dev, indio_dev->buffer, 0);
1165 iio_scan_mask_set(indio_dev->buffer, 1); 1170 iio_scan_mask_set(indio_dev, indio_dev->buffer, 1);
1166 iio_scan_mask_set(indio_dev->buffer, 2); 1171 iio_scan_mask_set(indio_dev, indio_dev->buffer, 2);
1167 } 1172 }
1168 1173
1169 if (spi->irq) { 1174 if (spi->irq) {
@@ -1240,6 +1245,7 @@ static const struct spi_device_id sca3000_id[] = {
1240 {"sca3000_e05", e05}, 1245 {"sca3000_e05", e05},
1241 {} 1246 {}
1242}; 1247};
1248MODULE_DEVICE_TABLE(spi, sca3000_id);
1243 1249
1244static struct spi_driver sca3000_driver = { 1250static struct spi_driver sca3000_driver = {
1245 .driver = { 1251 .driver = {
diff --git a/drivers/staging/iio/accel/sca3000_ring.c b/drivers/staging/iio/accel/sca3000_ring.c
index 4a9a01dccd0c..6b824a11f7f4 100644
--- a/drivers/staging/iio/accel/sca3000_ring.c
+++ b/drivers/staging/iio/accel/sca3000_ring.c
@@ -20,7 +20,7 @@
20 20
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../buffer.h"
24#include "../ring_hw.h" 24#include "../ring_hw.h"
25#include "sca3000.h" 25#include "sca3000.h"
26 26
@@ -146,7 +146,6 @@ static int sca3000_ring_get_bytes_per_datum(struct iio_buffer *r)
146} 146}
147 147
148static IIO_BUFFER_ENABLE_ATTR; 148static IIO_BUFFER_ENABLE_ATTR;
149static IIO_BUFFER_BYTES_PER_DATUM_ATTR;
150static IIO_BUFFER_LENGTH_ATTR; 149static IIO_BUFFER_LENGTH_ATTR;
151 150
152/** 151/**
@@ -158,8 +157,7 @@ static ssize_t sca3000_query_ring_int(struct device *dev,
158{ 157{
159 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 158 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
160 int ret, val; 159 int ret, val;
161 struct iio_buffer *ring = dev_get_drvdata(dev); 160 struct iio_dev *indio_dev = dev_get_drvdata(dev);
162 struct iio_dev *indio_dev = ring->indio_dev;
163 struct sca3000_state *st = iio_priv(indio_dev); 161 struct sca3000_state *st = iio_priv(indio_dev);
164 162
165 mutex_lock(&st->lock); 163 mutex_lock(&st->lock);
@@ -180,8 +178,7 @@ static ssize_t sca3000_set_ring_int(struct device *dev,
180 const char *buf, 178 const char *buf,
181 size_t len) 179 size_t len)
182{ 180{
183 struct iio_buffer *ring = dev_get_drvdata(dev); 181 struct iio_dev *indio_dev = dev_get_drvdata(dev);
184 struct iio_dev *indio_dev = ring->indio_dev;
185 struct sca3000_state *st = iio_priv(indio_dev); 182 struct sca3000_state *st = iio_priv(indio_dev);
186 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 183 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
187 long val; 184 long val;
@@ -222,8 +219,7 @@ static ssize_t sca3000_show_buffer_scale(struct device *dev,
222 struct device_attribute *attr, 219 struct device_attribute *attr,
223 char *buf) 220 char *buf)
224{ 221{
225 struct iio_buffer *ring = dev_get_drvdata(dev); 222 struct iio_dev *indio_dev = dev_get_drvdata(dev);
226 struct iio_dev *indio_dev = ring->indio_dev;
227 struct sca3000_state *st = iio_priv(indio_dev); 223 struct sca3000_state *st = iio_priv(indio_dev);
228 224
229 return sprintf(buf, "0.%06d\n", 4*st->info->scale); 225 return sprintf(buf, "0.%06d\n", 4*st->info->scale);
@@ -243,7 +239,6 @@ static IIO_DEVICE_ATTR(in_accel_scale,
243 */ 239 */
244static struct attribute *sca3000_ring_attributes[] = { 240static struct attribute *sca3000_ring_attributes[] = {
245 &dev_attr_length.attr, 241 &dev_attr_length.attr,
246 &dev_attr_bytes_per_datum.attr,
247 &dev_attr_enable.attr, 242 &dev_attr_enable.attr,
248 &iio_dev_attr_50_percent.dev_attr.attr, 243 &iio_dev_attr_50_percent.dev_attr.attr,
249 &iio_dev_attr_75_percent.dev_attr.attr, 244 &iio_dev_attr_75_percent.dev_attr.attr,
@@ -269,7 +264,7 @@ static struct iio_buffer *sca3000_rb_allocate(struct iio_dev *indio_dev)
269 buf = &ring->buf; 264 buf = &ring->buf;
270 buf->stufftoread = 0; 265 buf->stufftoread = 0;
271 buf->attrs = &sca3000_ring_attr; 266 buf->attrs = &sca3000_ring_attr;
272 iio_buffer_init(buf, indio_dev); 267 iio_buffer_init(buf);
273 268
274 return buf; 269 return buf;
275} 270}
@@ -350,7 +345,7 @@ static const struct iio_buffer_setup_ops sca3000_ring_setup_ops = {
350 345
351void sca3000_register_ring_funcs(struct iio_dev *indio_dev) 346void sca3000_register_ring_funcs(struct iio_dev *indio_dev)
352{ 347{
353 indio_dev->buffer->setup_ops = &sca3000_ring_setup_ops; 348 indio_dev->setup_ops = &sca3000_ring_setup_ops;
354} 349}
355 350
356/** 351/**
diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c
index 797e65cd03e8..45f4504ed927 100644
--- a/drivers/staging/iio/adc/ad7192.c
+++ b/drivers/staging/iio/adc/ad7192.c
@@ -19,7 +19,7 @@
19 19
20#include "../iio.h" 20#include "../iio.h"
21#include "../sysfs.h" 21#include "../sysfs.h"
22#include "../buffer_generic.h" 22#include "../buffer.h"
23#include "../ring_sw.h" 23#include "../ring_sw.h"
24#include "../trigger.h" 24#include "../trigger.h"
25#include "../trigger_consumer.h" 25#include "../trigger_consumer.h"
@@ -453,25 +453,6 @@ out:
453 return ret; 453 return ret;
454} 454}
455 455
456static int ad7192_scan_from_ring(struct ad7192_state *st, unsigned ch, int *val)
457{
458 struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
459 int ret;
460 s64 dat64[2];
461 u32 *dat32 = (u32 *)dat64;
462
463 if (!(test_bit(ch, ring->scan_mask)))
464 return -EBUSY;
465
466 ret = ring->access->read_last(ring, (u8 *) &dat64);
467 if (ret)
468 return ret;
469
470 *val = *dat32;
471
472 return 0;
473}
474
475static int ad7192_ring_preenable(struct iio_dev *indio_dev) 456static int ad7192_ring_preenable(struct iio_dev *indio_dev)
476{ 457{
477 struct ad7192_state *st = iio_priv(indio_dev); 458 struct ad7192_state *st = iio_priv(indio_dev);
@@ -479,12 +460,14 @@ static int ad7192_ring_preenable(struct iio_dev *indio_dev)
479 size_t d_size; 460 size_t d_size;
480 unsigned channel; 461 unsigned channel;
481 462
482 if (!ring->scan_count) 463 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
483 return -EINVAL; 464 return -EINVAL;
484 465
485 channel = find_first_bit(ring->scan_mask, indio_dev->masklength); 466 channel = find_first_bit(indio_dev->active_scan_mask,
467 indio_dev->masklength);
486 468
487 d_size = ring->scan_count * 469 d_size = bitmap_weight(indio_dev->active_scan_mask,
470 indio_dev->masklength) *
488 indio_dev->channels[0].scan_type.storagebits / 8; 471 indio_dev->channels[0].scan_type.storagebits / 8;
489 472
490 if (ring->scan_timestamp) { 473 if (ring->scan_timestamp) {
@@ -544,7 +527,7 @@ static irqreturn_t ad7192_trigger_handler(int irq, void *p)
544 s64 dat64[2]; 527 s64 dat64[2];
545 s32 *dat32 = (s32 *)dat64; 528 s32 *dat32 = (s32 *)dat64;
546 529
547 if (ring->scan_count) 530 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
548 __ad7192_read_reg(st, 1, 1, AD7192_REG_DATA, 531 __ad7192_read_reg(st, 1, 1, AD7192_REG_DATA,
549 dat32, 532 dat32,
550 indio_dev->channels[0].scan_type.realbits/8); 533 indio_dev->channels[0].scan_type.realbits/8);
@@ -592,7 +575,7 @@ static int ad7192_register_ring_funcs_and_init(struct iio_dev *indio_dev)
592 } 575 }
593 576
594 /* Ring buffer functions - here trigger setup related */ 577 /* Ring buffer functions - here trigger setup related */
595 indio_dev->buffer->setup_ops = &ad7192_ring_setup_ops; 578 indio_dev->setup_ops = &ad7192_ring_setup_ops;
596 579
597 /* Flag that polled ring buffering is possible */ 580 /* Flag that polled ring buffering is possible */
598 indio_dev->modes |= INDIO_BUFFER_TRIGGERED; 581 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
@@ -626,6 +609,10 @@ static irqreturn_t ad7192_data_rdy_trig_poll(int irq, void *private)
626 return IRQ_HANDLED; 609 return IRQ_HANDLED;
627} 610}
628 611
612static struct iio_trigger_ops ad7192_trigger_ops = {
613 .owner = THIS_MODULE,
614};
615
629static int ad7192_probe_trigger(struct iio_dev *indio_dev) 616static int ad7192_probe_trigger(struct iio_dev *indio_dev)
630{ 617{
631 struct ad7192_state *st = iio_priv(indio_dev); 618 struct ad7192_state *st = iio_priv(indio_dev);
@@ -638,7 +625,7 @@ static int ad7192_probe_trigger(struct iio_dev *indio_dev)
638 ret = -ENOMEM; 625 ret = -ENOMEM;
639 goto error_ret; 626 goto error_ret;
640 } 627 }
641 628 st->trig->ops = &ad7192_trigger_ops;
642 ret = request_irq(st->spi->irq, 629 ret = request_irq(st->spi->irq,
643 ad7192_data_rdy_trig_poll, 630 ad7192_data_rdy_trig_poll,
644 IRQF_TRIGGER_LOW, 631 IRQF_TRIGGER_LOW,
@@ -650,7 +637,6 @@ static int ad7192_probe_trigger(struct iio_dev *indio_dev)
650 disable_irq_nosync(st->spi->irq); 637 disable_irq_nosync(st->spi->irq);
651 st->irq_dis = true; 638 st->irq_dis = true;
652 st->trig->dev.parent = &st->spi->dev; 639 st->trig->dev.parent = &st->spi->dev;
653 st->trig->owner = THIS_MODULE;
654 st->trig->private_data = indio_dev; 640 st->trig->private_data = indio_dev;
655 641
656 ret = iio_trigger_register(st->trig); 642 ret = iio_trigger_register(st->trig);
@@ -795,7 +781,7 @@ static ssize_t ad7192_set(struct device *dev,
795 return -EBUSY; 781 return -EBUSY;
796 } 782 }
797 783
798 switch (this_attr->address) { 784 switch ((u32) this_attr->address) {
799 case AD7192_REG_GPOCON: 785 case AD7192_REG_GPOCON:
800 if (val) 786 if (val)
801 st->gpocon |= AD7192_GPOCON_BPDSW; 787 st->gpocon |= AD7192_GPOCON_BPDSW;
@@ -873,8 +859,7 @@ static int ad7192_read_raw(struct iio_dev *indio_dev,
873 case 0: 859 case 0:
874 mutex_lock(&indio_dev->mlock); 860 mutex_lock(&indio_dev->mlock);
875 if (iio_buffer_enabled(indio_dev)) 861 if (iio_buffer_enabled(indio_dev))
876 ret = ad7192_scan_from_ring(st, 862 ret = -EBUSY;
877 chan->scan_index, &smpl);
878 else 863 else
879 ret = ad7192_read(st, chan->address, 864 ret = ad7192_read(st, chan->address,
880 chan->scan_type.realbits / 8, &smpl); 865 chan->scan_type.realbits / 8, &smpl);
@@ -901,18 +886,20 @@ static int ad7192_read_raw(struct iio_dev *indio_dev,
901 } 886 }
902 return IIO_VAL_INT; 887 return IIO_VAL_INT;
903 888
904 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 889 case IIO_CHAN_INFO_SCALE:
905 mutex_lock(&indio_dev->mlock); 890 switch (chan->type) {
906 *val = st->scale_avail[AD7192_CONF_GAIN(st->conf)][0]; 891 case IIO_VOLTAGE:
907 *val2 = st->scale_avail[AD7192_CONF_GAIN(st->conf)][1]; 892 mutex_lock(&indio_dev->mlock);
908 mutex_unlock(&indio_dev->mlock); 893 *val = st->scale_avail[AD7192_CONF_GAIN(st->conf)][0];
909 894 *val2 = st->scale_avail[AD7192_CONF_GAIN(st->conf)][1];
910 return IIO_VAL_INT_PLUS_NANO; 895 mutex_unlock(&indio_dev->mlock);
911 896 return IIO_VAL_INT_PLUS_NANO;
912 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 897 case IIO_TEMP:
913 *val = 1000; 898 *val = 1000;
914 899 return IIO_VAL_INT;
915 return IIO_VAL_INT; 900 default:
901 return -EINVAL;
902 }
916 } 903 }
917 904
918 return -EINVAL; 905 return -EINVAL;
@@ -935,7 +922,7 @@ static int ad7192_write_raw(struct iio_dev *indio_dev,
935 } 922 }
936 923
937 switch (mask) { 924 switch (mask) {
938 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 925 case IIO_CHAN_INFO_SCALE:
939 ret = -EINVAL; 926 ret = -EINVAL;
940 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) 927 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
941 if (val2 == st->scale_avail[i][1]) { 928 if (val2 == st->scale_avail[i][1]) {
@@ -992,7 +979,7 @@ static const struct iio_info ad7192_info = {
992 .extend_name = _name, \ 979 .extend_name = _name, \
993 .channel = _chan, \ 980 .channel = _chan, \
994 .channel2 = _chan2, \ 981 .channel2 = _chan2, \
995 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), \ 982 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
996 .address = _address, \ 983 .address = _address, \
997 .scan_index = _si, \ 984 .scan_index = _si, \
998 .scan_type = IIO_ST('s', 24, 32, 0)} 985 .scan_type = IIO_ST('s', 24, 32, 0)}
@@ -1001,7 +988,7 @@ static const struct iio_info ad7192_info = {
1001 { .type = IIO_VOLTAGE, \ 988 { .type = IIO_VOLTAGE, \
1002 .indexed = 1, \ 989 .indexed = 1, \
1003 .channel = _chan, \ 990 .channel = _chan, \
1004 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), \ 991 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
1005 .address = _address, \ 992 .address = _address, \
1006 .scan_index = _si, \ 993 .scan_index = _si, \
1007 .scan_type = IIO_ST('s', 24, 32, 0)} 994 .scan_type = IIO_ST('s', 24, 32, 0)}
@@ -1010,7 +997,7 @@ static const struct iio_info ad7192_info = {
1010 { .type = IIO_TEMP, \ 997 { .type = IIO_TEMP, \
1011 .indexed = 1, \ 998 .indexed = 1, \
1012 .channel = _chan, \ 999 .channel = _chan, \
1013 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 1000 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
1014 .address = _address, \ 1001 .address = _address, \
1015 .scan_index = _si, \ 1002 .scan_index = _si, \
1016 .scan_type = IIO_ST('s', 24, 32, 0)} 1003 .scan_type = IIO_ST('s', 24, 32, 0)}
@@ -1151,6 +1138,7 @@ static const struct spi_device_id ad7192_id[] = {
1151 {"ad7195", ID_AD7195}, 1138 {"ad7195", ID_AD7195},
1152 {} 1139 {}
1153}; 1140};
1141MODULE_DEVICE_TABLE(spi, ad7192_id);
1154 1142
1155static struct spi_driver ad7192_driver = { 1143static struct spi_driver ad7192_driver = {
1156 .driver = { 1144 .driver = {
diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c
index dbaeae81e873..7dbd6812c240 100644
--- a/drivers/staging/iio/adc/ad7280a.c
+++ b/drivers/staging/iio/adc/ad7280a.c
@@ -18,6 +18,7 @@
18 18
19#include "../iio.h" 19#include "../iio.h"
20#include "../sysfs.h" 20#include "../sysfs.h"
21#include "../events.h"
21 22
22#include "ad7280a.h" 23#include "ad7280a.h"
23 24
@@ -455,10 +456,10 @@ static ssize_t ad7280_store_balance_timer(struct device *dev,
455 struct iio_dev *indio_dev = dev_get_drvdata(dev); 456 struct iio_dev *indio_dev = dev_get_drvdata(dev);
456 struct ad7280_state *st = iio_priv(indio_dev); 457 struct ad7280_state *st = iio_priv(indio_dev);
457 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 458 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
458 long val; 459 unsigned long val;
459 int ret; 460 int ret;
460 461
461 ret = strict_strtoul(buf, 10, &val); 462 ret = kstrtoul(buf, 10, &val);
462 if (ret) 463 if (ret)
463 return ret; 464 return ret;
464 465
@@ -487,8 +488,8 @@ static int ad7280_channel_init(struct ad7280_state *st)
487{ 488{
488 int dev, ch, cnt; 489 int dev, ch, cnt;
489 490
490 st->channels = kzalloc(sizeof(*st->channels) * 491 st->channels = kcalloc((st->slave_num + 1) * 12 + 2,
491 ((st->slave_num + 1) * 12 + 2), GFP_KERNEL); 492 sizeof(*st->channels), GFP_KERNEL);
492 if (st->channels == NULL) 493 if (st->channels == NULL)
493 return -ENOMEM; 494 return -ENOMEM;
494 495
@@ -507,7 +508,7 @@ static int ad7280_channel_init(struct ad7280_state *st)
507 } 508 }
508 st->channels[cnt].indexed = 1; 509 st->channels[cnt].indexed = 1;
509 st->channels[cnt].info_mask = 510 st->channels[cnt].info_mask =
510 (1 << IIO_CHAN_INFO_SCALE_SHARED); 511 IIO_CHAN_INFO_SCALE_SHARED_BIT;
511 st->channels[cnt].address = 512 st->channels[cnt].address =
512 AD7280A_DEVADDR(dev) << 8 | ch; 513 AD7280A_DEVADDR(dev) << 8 | ch;
513 st->channels[cnt].scan_index = cnt; 514 st->channels[cnt].scan_index = cnt;
@@ -523,7 +524,7 @@ static int ad7280_channel_init(struct ad7280_state *st)
523 st->channels[cnt].channel2 = dev * 6; 524 st->channels[cnt].channel2 = dev * 6;
524 st->channels[cnt].address = AD7280A_ALL_CELLS; 525 st->channels[cnt].address = AD7280A_ALL_CELLS;
525 st->channels[cnt].indexed = 1; 526 st->channels[cnt].indexed = 1;
526 st->channels[cnt].info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED); 527 st->channels[cnt].info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT;
527 st->channels[cnt].scan_index = cnt; 528 st->channels[cnt].scan_index = cnt;
528 st->channels[cnt].scan_type.sign = 'u'; 529 st->channels[cnt].scan_type.sign = 'u';
529 st->channels[cnt].scan_type.realbits = 32; 530 st->channels[cnt].scan_type.realbits = 32;
@@ -600,7 +601,7 @@ static ssize_t ad7280_read_channel_config(struct device *dev,
600 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 601 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
601 unsigned val; 602 unsigned val;
602 603
603 switch (this_attr->address) { 604 switch ((u32) this_attr->address) {
604 case AD7280A_CELL_OVERVOLTAGE: 605 case AD7280A_CELL_OVERVOLTAGE:
605 val = 1000 + (st->cell_threshhigh * 1568) / 100; 606 val = 1000 + (st->cell_threshhigh * 1568) / 100;
606 break; 607 break;
@@ -636,7 +637,7 @@ static ssize_t ad7280_write_channel_config(struct device *dev,
636 if (ret) 637 if (ret)
637 return ret; 638 return ret;
638 639
639 switch (this_attr->address) { 640 switch ((u32) this_attr->address) {
640 case AD7280A_CELL_OVERVOLTAGE: 641 case AD7280A_CELL_OVERVOLTAGE:
641 case AD7280A_CELL_UNDERVOLTAGE: 642 case AD7280A_CELL_UNDERVOLTAGE:
642 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ 643 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
@@ -652,7 +653,7 @@ static ssize_t ad7280_write_channel_config(struct device *dev,
652 val = clamp(val, 0L, 0xFFL); 653 val = clamp(val, 0L, 0xFFL);
653 654
654 mutex_lock(&indio_dev->mlock); 655 mutex_lock(&indio_dev->mlock);
655 switch (this_attr->address) { 656 switch ((u32) this_attr->address) {
656 case AD7280A_CELL_OVERVOLTAGE: 657 case AD7280A_CELL_OVERVOLTAGE:
657 st->cell_threshhigh = val; 658 st->cell_threshhigh = val;
658 break; 659 break;
@@ -682,13 +683,13 @@ static irqreturn_t ad7280_event_handler(int irq, void *private)
682 unsigned *channels; 683 unsigned *channels;
683 int i, ret; 684 int i, ret;
684 685
685 channels = kzalloc(sizeof(*channels) * st->scan_cnt, GFP_KERNEL); 686 channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
686 if (channels == NULL) 687 if (channels == NULL)
687 return IRQ_HANDLED; 688 return IRQ_HANDLED;
688 689
689 ret = ad7280_read_all_channels(st, st->scan_cnt, channels); 690 ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
690 if (ret < 0) 691 if (ret < 0)
691 return IRQ_HANDLED; 692 goto out;
692 693
693 for (i = 0; i < st->scan_cnt; i++) { 694 for (i = 0; i < st->scan_cnt; i++) {
694 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) { 695 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
@@ -731,6 +732,7 @@ static irqreturn_t ad7280_event_handler(int irq, void *private)
731 } 732 }
732 } 733 }
733 734
735out:
734 kfree(channels); 736 kfree(channels);
735 737
736 return IRQ_HANDLED; 738 return IRQ_HANDLED;
@@ -801,7 +803,7 @@ static int ad7280_read_raw(struct iio_dev *indio_dev,
801 *val = ret; 803 *val = ret;
802 804
803 return IIO_VAL_INT; 805 return IIO_VAL_INT;
804 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 806 case IIO_CHAN_INFO_SCALE:
805 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6) 807 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
806 scale_uv = (4000 * 1000) >> AD7280A_BITS; 808 scale_uv = (4000 * 1000) >> AD7280A_BITS;
807 else 809 else
@@ -968,11 +970,11 @@ static const struct spi_device_id ad7280_id[] = {
968 {"ad7280a", 0}, 970 {"ad7280a", 0},
969 {} 971 {}
970}; 972};
973MODULE_DEVICE_TABLE(spi, ad7280_id);
971 974
972static struct spi_driver ad7280_driver = { 975static struct spi_driver ad7280_driver = {
973 .driver = { 976 .driver = {
974 .name = "ad7280", 977 .name = "ad7280",
975 .bus = &spi_bus_type,
976 .owner = THIS_MODULE, 978 .owner = THIS_MODULE,
977 }, 979 },
978 .probe = ad7280_probe, 980 .probe = ad7280_probe,
diff --git a/drivers/staging/iio/adc/ad7291.c b/drivers/staging/iio/adc/ad7291.c
index aa44a52a7adb..0a13616e3db9 100644
--- a/drivers/staging/iio/adc/ad7291.c
+++ b/drivers/staging/iio/adc/ad7291.c
@@ -19,6 +19,7 @@
19 19
20#include "../iio.h" 20#include "../iio.h"
21#include "../sysfs.h" 21#include "../sysfs.h"
22#include "../events.h"
22 23
23/* 24/*
24 * Simplified handling 25 * Simplified handling
@@ -500,7 +501,7 @@ static int ad7291_read_raw(struct iio_dev *indio_dev,
500 default: 501 default:
501 return -EINVAL; 502 return -EINVAL;
502 } 503 }
503 case (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE): 504 case IIO_CHAN_INFO_AVERAGE_RAW:
504 ret = i2c_smbus_read_word_data(chip->client, 505 ret = i2c_smbus_read_word_data(chip->client,
505 AD7291_T_AVERAGE); 506 AD7291_T_AVERAGE);
506 if (ret < 0) 507 if (ret < 0)
@@ -509,18 +510,24 @@ static int ad7291_read_raw(struct iio_dev *indio_dev,
509 AD7291_VALUE_MASK) << 4) >> 4; 510 AD7291_VALUE_MASK) << 4) >> 4;
510 *val = signval; 511 *val = signval;
511 return IIO_VAL_INT; 512 return IIO_VAL_INT;
512 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 513 case IIO_CHAN_INFO_SCALE:
513 scale_uv = (chip->int_vref_mv * 1000) >> AD7291_BITS; 514 switch (chan->type) {
514 *val = scale_uv / 1000; 515 case IIO_VOLTAGE:
515 *val2 = (scale_uv % 1000) * 1000; 516 scale_uv = (chip->int_vref_mv * 1000) >> AD7291_BITS;
516 return IIO_VAL_INT_PLUS_MICRO; 517 *val = scale_uv / 1000;
517 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 518 *val2 = (scale_uv % 1000) * 1000;
518 /* 519 return IIO_VAL_INT_PLUS_MICRO;
519 * One LSB of the ADC corresponds to 0.25 deg C. 520 case IIO_TEMP:
520 * The temperature reading is in 12-bit twos complement format 521 /*
521 */ 522 * One LSB of the ADC corresponds to 0.25 deg C.
522 *val = 250; 523 * The temperature reading is in 12-bit twos
523 return IIO_VAL_INT; 524 * complement format
525 */
526 *val = 250;
527 return IIO_VAL_INT;
528 default:
529 return -EINVAL;
530 }
524 default: 531 default:
525 return -EINVAL; 532 return -EINVAL;
526 } 533 }
@@ -529,7 +536,7 @@ static int ad7291_read_raw(struct iio_dev *indio_dev,
529#define AD7291_VOLTAGE_CHAN(_chan) \ 536#define AD7291_VOLTAGE_CHAN(_chan) \
530{ \ 537{ \
531 .type = IIO_VOLTAGE, \ 538 .type = IIO_VOLTAGE, \
532 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), \ 539 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
533 .indexed = 1, \ 540 .indexed = 1, \
534 .channel = _chan, \ 541 .channel = _chan, \
535 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)|\ 542 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)|\
@@ -547,8 +554,8 @@ static const struct iio_chan_spec ad7291_channels[] = {
547 AD7291_VOLTAGE_CHAN(7), 554 AD7291_VOLTAGE_CHAN(7),
548 { 555 {
549 .type = IIO_TEMP, 556 .type = IIO_TEMP,
550 .info_mask = (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE) | 557 .info_mask = IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT |
551 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 558 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
552 .indexed = 1, 559 .indexed = 1,
553 .channel = 0, 560 .channel = 0,
554 .event_mask = 561 .event_mask =
diff --git a/drivers/staging/iio/adc/ad7298.h b/drivers/staging/iio/adc/ad7298.h
index 9ddf5cf0e519..a0e5dea415ef 100644
--- a/drivers/staging/iio/adc/ad7298.h
+++ b/drivers/staging/iio/adc/ad7298.h
@@ -54,14 +54,9 @@ struct ad7298_state {
54}; 54};
55 55
56#ifdef CONFIG_IIO_BUFFER 56#ifdef CONFIG_IIO_BUFFER
57int ad7298_scan_from_ring(struct iio_dev *indio_dev, long ch);
58int ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev); 57int ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev);
59void ad7298_ring_cleanup(struct iio_dev *indio_dev); 58void ad7298_ring_cleanup(struct iio_dev *indio_dev);
60#else /* CONFIG_IIO_BUFFER */ 59#else /* CONFIG_IIO_BUFFER */
61static inline int ad7298_scan_from_ring(struct iio_dev *indio_dev, long ch)
62{
63 return 0;
64}
65 60
66static inline int 61static inline int
67ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev) 62ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev)
diff --git a/drivers/staging/iio/adc/ad7298_core.c b/drivers/staging/iio/adc/ad7298_core.c
index a799bd1922dc..8dd6aa9cf928 100644
--- a/drivers/staging/iio/adc/ad7298_core.c
+++ b/drivers/staging/iio/adc/ad7298_core.c
@@ -18,37 +18,37 @@
18 18
19#include "../iio.h" 19#include "../iio.h"
20#include "../sysfs.h" 20#include "../sysfs.h"
21#include "../buffer_generic.h" 21#include "../buffer.h"
22 22
23#include "ad7298.h" 23#include "ad7298.h"
24 24
25static struct iio_chan_spec ad7298_channels[] = { 25static struct iio_chan_spec ad7298_channels[] = {
26 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, 26 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
27 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 27 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
28 9, AD7298_CH_TEMP, IIO_ST('s', 32, 32, 0), 0), 28 9, AD7298_CH_TEMP, IIO_ST('s', 32, 32, 0), 0),
29 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 29 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
30 (1 << IIO_CHAN_INFO_SCALE_SHARED), 30 IIO_CHAN_INFO_SCALE_SHARED_BIT,
31 0, 0, IIO_ST('u', 12, 16, 0), 0), 31 0, 0, IIO_ST('u', 12, 16, 0), 0),
32 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, 32 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0,
33 (1 << IIO_CHAN_INFO_SCALE_SHARED), 33 IIO_CHAN_INFO_SCALE_SHARED_BIT,
34 1, 1, IIO_ST('u', 12, 16, 0), 0), 34 1, 1, IIO_ST('u', 12, 16, 0), 0),
35 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 2, 0, 35 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 2, 0,
36 (1 << IIO_CHAN_INFO_SCALE_SHARED), 36 IIO_CHAN_INFO_SCALE_SHARED_BIT,
37 2, 2, IIO_ST('u', 12, 16, 0), 0), 37 2, 2, IIO_ST('u', 12, 16, 0), 0),
38 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 3, 0, 38 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 3, 0,
39 (1 << IIO_CHAN_INFO_SCALE_SHARED), 39 IIO_CHAN_INFO_SCALE_SHARED_BIT,
40 3, 3, IIO_ST('u', 12, 16, 0), 0), 40 3, 3, IIO_ST('u', 12, 16, 0), 0),
41 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 4, 0, 41 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 4, 0,
42 (1 << IIO_CHAN_INFO_SCALE_SHARED), 42 IIO_CHAN_INFO_SCALE_SHARED_BIT,
43 4, 4, IIO_ST('u', 12, 16, 0), 0), 43 4, 4, IIO_ST('u', 12, 16, 0), 0),
44 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 5, 0, 44 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 5, 0,
45 (1 << IIO_CHAN_INFO_SCALE_SHARED), 45 IIO_CHAN_INFO_SCALE_SHARED_BIT,
46 5, 5, IIO_ST('u', 12, 16, 0), 0), 46 5, 5, IIO_ST('u', 12, 16, 0), 0),
47 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 6, 0, 47 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 6, 0,
48 (1 << IIO_CHAN_INFO_SCALE_SHARED), 48 IIO_CHAN_INFO_SCALE_SHARED_BIT,
49 6, 6, IIO_ST('u', 12, 16, 0), 0), 49 6, 6, IIO_ST('u', 12, 16, 0), 0),
50 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 7, 0, 50 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 7, 0,
51 (1 << IIO_CHAN_INFO_SCALE_SHARED), 51 IIO_CHAN_INFO_SCALE_SHARED_BIT,
52 7, 7, IIO_ST('u', 12, 16, 0), 0), 52 7, 7, IIO_ST('u', 12, 16, 0), 0),
53 IIO_CHAN_SOFT_TIMESTAMP(8), 53 IIO_CHAN_SOFT_TIMESTAMP(8),
54}; 54};
@@ -69,27 +69,28 @@ static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
69static int ad7298_scan_temp(struct ad7298_state *st, int *val) 69static int ad7298_scan_temp(struct ad7298_state *st, int *val)
70{ 70{
71 int tmp, ret; 71 int tmp, ret;
72 __be16 buf;
72 73
73 tmp = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE | 74 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
74 AD7298_TAVG | st->ext_ref); 75 AD7298_TAVG | st->ext_ref);
75 76
76 ret = spi_write(st->spi, (u8 *)&tmp, 2); 77 ret = spi_write(st->spi, (u8 *)&buf, 2);
77 if (ret) 78 if (ret)
78 return ret; 79 return ret;
79 80
80 tmp = 0; 81 buf = cpu_to_be16(0);
81 82
82 ret = spi_write(st->spi, (u8 *)&tmp, 2); 83 ret = spi_write(st->spi, (u8 *)&buf, 2);
83 if (ret) 84 if (ret)
84 return ret; 85 return ret;
85 86
86 usleep_range(101, 1000); /* sleep > 100us */ 87 usleep_range(101, 1000); /* sleep > 100us */
87 88
88 ret = spi_read(st->spi, (u8 *)&tmp, 2); 89 ret = spi_read(st->spi, (u8 *)&buf, 2);
89 if (ret) 90 if (ret)
90 return ret; 91 return ret;
91 92
92 tmp = be16_to_cpu(tmp) & RES_MASK(AD7298_BITS); 93 tmp = be16_to_cpu(buf) & RES_MASK(AD7298_BITS);
93 94
94 /* 95 /*
95 * One LSB of the ADC corresponds to 0.25 deg C. 96 * One LSB of the ADC corresponds to 0.25 deg C.
@@ -122,12 +123,8 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
122 switch (m) { 123 switch (m) {
123 case 0: 124 case 0:
124 mutex_lock(&indio_dev->mlock); 125 mutex_lock(&indio_dev->mlock);
125 if (iio_buffer_enabled(indio_dev)) { 126 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) {
126 if (chan->address == AD7298_CH_TEMP) 127 ret = -EBUSY;
127 ret = -ENODEV;
128 else
129 ret = ad7298_scan_from_ring(indio_dev,
130 chan->address);
131 } else { 128 } else {
132 if (chan->address == AD7298_CH_TEMP) 129 if (chan->address == AD7298_CH_TEMP)
133 ret = ad7298_scan_temp(st, val); 130 ret = ad7298_scan_temp(st, val);
@@ -143,15 +140,20 @@ static int ad7298_read_raw(struct iio_dev *indio_dev,
143 *val = ret & RES_MASK(AD7298_BITS); 140 *val = ret & RES_MASK(AD7298_BITS);
144 141
145 return IIO_VAL_INT; 142 return IIO_VAL_INT;
146 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 143 case IIO_CHAN_INFO_SCALE:
147 scale_uv = (st->int_vref_mv * 1000) >> AD7298_BITS; 144 switch (chan->type) {
148 *val = scale_uv / 1000; 145 case IIO_VOLTAGE:
149 *val2 = (scale_uv % 1000) * 1000; 146 scale_uv = (st->int_vref_mv * 1000) >> AD7298_BITS;
150 return IIO_VAL_INT_PLUS_MICRO; 147 *val = scale_uv / 1000;
151 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 148 *val2 = (scale_uv % 1000) * 1000;
152 *val = 1; 149 return IIO_VAL_INT_PLUS_MICRO;
153 *val2 = 0; 150 case IIO_TEMP:
154 return IIO_VAL_INT_PLUS_MICRO; 151 *val = 1;
152 *val2 = 0;
153 return IIO_VAL_INT_PLUS_MICRO;
154 default:
155 return -EINVAL;
156 }
155 } 157 }
156 return -EINVAL; 158 return -EINVAL;
157} 159}
@@ -265,11 +267,11 @@ static const struct spi_device_id ad7298_id[] = {
265 {"ad7298", 0}, 267 {"ad7298", 0},
266 {} 268 {}
267}; 269};
270MODULE_DEVICE_TABLE(spi, ad7298_id);
268 271
269static struct spi_driver ad7298_driver = { 272static struct spi_driver ad7298_driver = {
270 .driver = { 273 .driver = {
271 .name = "ad7298", 274 .name = "ad7298",
272 .bus = &spi_bus_type,
273 .owner = THIS_MODULE, 275 .owner = THIS_MODULE,
274 }, 276 },
275 .probe = ad7298_probe, 277 .probe = ad7298_probe,
@@ -281,4 +283,3 @@ module_spi_driver(ad7298_driver);
281MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 283MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
282MODULE_DESCRIPTION("Analog Devices AD7298 ADC"); 284MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
283MODULE_LICENSE("GPL v2"); 285MODULE_LICENSE("GPL v2");
284MODULE_ALIAS("spi:ad7298");
diff --git a/drivers/staging/iio/adc/ad7298_ring.c b/drivers/staging/iio/adc/ad7298_ring.c
index 47630d506a63..d1a12dd015e2 100644
--- a/drivers/staging/iio/adc/ad7298_ring.c
+++ b/drivers/staging/iio/adc/ad7298_ring.c
@@ -12,41 +12,12 @@
12#include <linux/spi/spi.h> 12#include <linux/spi/spi.h>
13 13
14#include "../iio.h" 14#include "../iio.h"
15#include "../buffer_generic.h" 15#include "../buffer.h"
16#include "../ring_sw.h" 16#include "../ring_sw.h"
17#include "../trigger_consumer.h" 17#include "../trigger_consumer.h"
18 18
19#include "ad7298.h" 19#include "ad7298.h"
20 20
21int ad7298_scan_from_ring(struct iio_dev *indio_dev, long ch)
22{
23 struct iio_buffer *ring = indio_dev->buffer;
24 int ret;
25 u16 *ring_data;
26
27 if (!(test_bit(ch, ring->scan_mask))) {
28 ret = -EBUSY;
29 goto error_ret;
30 }
31
32 ring_data = kmalloc(ring->access->get_bytes_per_datum(ring),
33 GFP_KERNEL);
34 if (ring_data == NULL) {
35 ret = -ENOMEM;
36 goto error_ret;
37 }
38 ret = ring->access->read_last(ring, (u8 *) ring_data);
39 if (ret)
40 goto error_free_ring_data;
41
42 ret = be16_to_cpu(ring_data[ch]);
43
44error_free_ring_data:
45 kfree(ring_data);
46error_ret:
47 return ret;
48}
49
50/** 21/**
51 * ad7298_ring_preenable() setup the parameters of the ring before enabling 22 * ad7298_ring_preenable() setup the parameters of the ring before enabling
52 * 23 *
@@ -61,8 +32,9 @@ static int ad7298_ring_preenable(struct iio_dev *indio_dev)
61 size_t d_size; 32 size_t d_size;
62 int i, m; 33 int i, m;
63 unsigned short command; 34 unsigned short command;
64 35 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
65 d_size = ring->scan_count * (AD7298_STORAGE_BITS / 8); 36 indio_dev->masklength);
37 d_size = scan_count * (AD7298_STORAGE_BITS / 8);
66 38
67 if (ring->scan_timestamp) { 39 if (ring->scan_timestamp) {
68 d_size += sizeof(s64); 40 d_size += sizeof(s64);
@@ -79,7 +51,7 @@ static int ad7298_ring_preenable(struct iio_dev *indio_dev)
79 command = AD7298_WRITE | st->ext_ref; 51 command = AD7298_WRITE | st->ext_ref;
80 52
81 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1) 53 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
82 if (test_bit(i, ring->scan_mask)) 54 if (test_bit(i, indio_dev->active_scan_mask))
83 command |= m; 55 command |= m;
84 56
85 st->tx_buf[0] = cpu_to_be16(command); 57 st->tx_buf[0] = cpu_to_be16(command);
@@ -96,7 +68,7 @@ static int ad7298_ring_preenable(struct iio_dev *indio_dev)
96 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg); 68 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
97 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg); 69 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
98 70
99 for (i = 0; i < ring->scan_count; i++) { 71 for (i = 0; i < scan_count; i++) {
100 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i]; 72 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
101 st->ring_xfer[i + 2].len = 2; 73 st->ring_xfer[i + 2].len = 2;
102 st->ring_xfer[i + 2].cs_change = 1; 74 st->ring_xfer[i + 2].cs_change = 1;
@@ -134,7 +106,8 @@ static irqreturn_t ad7298_trigger_handler(int irq, void *p)
134 &time_ns, sizeof(time_ns)); 106 &time_ns, sizeof(time_ns));
135 } 107 }
136 108
137 for (i = 0; i < ring->scan_count; i++) 109 for (i = 0; i < bitmap_weight(indio_dev->active_scan_mask,
110 indio_dev->masklength); i++)
138 buf[i] = be16_to_cpu(st->rx_buf[i]); 111 buf[i] = be16_to_cpu(st->rx_buf[i]);
139 112
140 indio_dev->buffer->access->store_to(ring, (u8 *)buf, time_ns); 113 indio_dev->buffer->access->store_to(ring, (u8 *)buf, time_ns);
@@ -174,7 +147,7 @@ int ad7298_register_ring_funcs_and_init(struct iio_dev *indio_dev)
174 } 147 }
175 148
176 /* Ring buffer functions - here trigger setup related */ 149 /* Ring buffer functions - here trigger setup related */
177 indio_dev->buffer->setup_ops = &ad7298_ring_setup_ops; 150 indio_dev->setup_ops = &ad7298_ring_setup_ops;
178 indio_dev->buffer->scan_timestamp = true; 151 indio_dev->buffer->scan_timestamp = true;
179 152
180 /* Flag that polled ring buffering is possible */ 153 /* Flag that polled ring buffering is possible */
diff --git a/drivers/staging/iio/adc/ad7476.h b/drivers/staging/iio/adc/ad7476.h
index 60142926565f..27f696c75cc4 100644
--- a/drivers/staging/iio/adc/ad7476.h
+++ b/drivers/staging/iio/adc/ad7476.h
@@ -50,14 +50,9 @@ enum ad7476_supported_device_ids {
50}; 50};
51 51
52#ifdef CONFIG_IIO_BUFFER 52#ifdef CONFIG_IIO_BUFFER
53int ad7476_scan_from_ring(struct iio_dev *indio_dev);
54int ad7476_register_ring_funcs_and_init(struct iio_dev *indio_dev); 53int ad7476_register_ring_funcs_and_init(struct iio_dev *indio_dev);
55void ad7476_ring_cleanup(struct iio_dev *indio_dev); 54void ad7476_ring_cleanup(struct iio_dev *indio_dev);
56#else /* CONFIG_IIO_BUFFER */ 55#else /* CONFIG_IIO_BUFFER */
57static inline int ad7476_scan_from_ring(struct iio_dev *indio_dev)
58{
59 return 0;
60}
61 56
62static inline int 57static inline int
63ad7476_register_ring_funcs_and_init(struct iio_dev *indio_dev) 58ad7476_register_ring_funcs_and_init(struct iio_dev *indio_dev)
diff --git a/drivers/staging/iio/adc/ad7476_core.c b/drivers/staging/iio/adc/ad7476_core.c
index 0b5852030ab6..0c064d1c3927 100644
--- a/drivers/staging/iio/adc/ad7476_core.c
+++ b/drivers/staging/iio/adc/ad7476_core.c
@@ -17,7 +17,7 @@
17 17
18#include "../iio.h" 18#include "../iio.h"
19#include "../sysfs.h" 19#include "../sysfs.h"
20#include "../buffer_generic.h" 20#include "../buffer.h"
21 21
22#include "ad7476.h" 22#include "ad7476.h"
23 23
@@ -46,7 +46,7 @@ static int ad7476_read_raw(struct iio_dev *indio_dev,
46 case 0: 46 case 0:
47 mutex_lock(&indio_dev->mlock); 47 mutex_lock(&indio_dev->mlock);
48 if (iio_buffer_enabled(indio_dev)) 48 if (iio_buffer_enabled(indio_dev))
49 ret = ad7476_scan_from_ring(indio_dev); 49 ret = -EBUSY;
50 else 50 else
51 ret = ad7476_scan_direct(st); 51 ret = ad7476_scan_direct(st);
52 mutex_unlock(&indio_dev->mlock); 52 mutex_unlock(&indio_dev->mlock);
@@ -56,7 +56,7 @@ static int ad7476_read_raw(struct iio_dev *indio_dev,
56 *val = (ret >> st->chip_info->channel[0].scan_type.shift) & 56 *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
57 RES_MASK(st->chip_info->channel[0].scan_type.realbits); 57 RES_MASK(st->chip_info->channel[0].scan_type.realbits);
58 return IIO_VAL_INT; 58 return IIO_VAL_INT;
59 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 59 case IIO_CHAN_INFO_SCALE:
60 scale_uv = (st->int_vref_mv * 1000) 60 scale_uv = (st->int_vref_mv * 1000)
61 >> st->chip_info->channel[0].scan_type.realbits; 61 >> st->chip_info->channel[0].scan_type.realbits;
62 *val = scale_uv/1000; 62 *val = scale_uv/1000;
@@ -69,49 +69,49 @@ static int ad7476_read_raw(struct iio_dev *indio_dev,
69static const struct ad7476_chip_info ad7476_chip_info_tbl[] = { 69static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
70 [ID_AD7466] = { 70 [ID_AD7466] = {
71 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 71 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
72 (1 << IIO_CHAN_INFO_SCALE_SHARED), 72 IIO_CHAN_INFO_SCALE_SHARED_BIT,
73 0, 0, IIO_ST('u', 12, 16, 0), 0), 73 0, 0, IIO_ST('u', 12, 16, 0), 0),
74 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 74 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
75 }, 75 },
76 [ID_AD7467] = { 76 [ID_AD7467] = {
77 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 77 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
78 (1 << IIO_CHAN_INFO_SCALE_SHARED), 78 IIO_CHAN_INFO_SCALE_SHARED_BIT,
79 0, 0, IIO_ST('u', 10, 16, 2), 0), 79 0, 0, IIO_ST('u', 10, 16, 2), 0),
80 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 80 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
81 }, 81 },
82 [ID_AD7468] = { 82 [ID_AD7468] = {
83 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1 , 0, NULL, 0, 0, 83 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1 , 0, NULL, 0, 0,
84 (1 << IIO_CHAN_INFO_SCALE_SHARED), 84 IIO_CHAN_INFO_SCALE_SHARED_BIT,
85 0, 0, IIO_ST('u', 8, 16, 4), 0), 85 0, 0, IIO_ST('u', 8, 16, 4), 0),
86 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 86 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
87 }, 87 },
88 [ID_AD7475] = { 88 [ID_AD7475] = {
89 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 89 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
90 (1 << IIO_CHAN_INFO_SCALE_SHARED), 90 IIO_CHAN_INFO_SCALE_SHARED_BIT,
91 0, 0, IIO_ST('u', 12, 16, 0), 0), 91 0, 0, IIO_ST('u', 12, 16, 0), 0),
92 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 92 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
93 }, 93 },
94 [ID_AD7476] = { 94 [ID_AD7476] = {
95 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 95 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
96 (1 << IIO_CHAN_INFO_SCALE_SHARED), 96 IIO_CHAN_INFO_SCALE_SHARED_BIT,
97 0, 0, IIO_ST('u', 12, 16, 0), 0), 97 0, 0, IIO_ST('u', 12, 16, 0), 0),
98 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 98 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
99 }, 99 },
100 [ID_AD7477] = { 100 [ID_AD7477] = {
101 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 101 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
102 (1 << IIO_CHAN_INFO_SCALE_SHARED), 102 IIO_CHAN_INFO_SCALE_SHARED_BIT,
103 0, 0, IIO_ST('u', 10, 16, 2), 0), 103 0, 0, IIO_ST('u', 10, 16, 2), 0),
104 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 104 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
105 }, 105 },
106 [ID_AD7478] = { 106 [ID_AD7478] = {
107 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 107 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
108 (1 << IIO_CHAN_INFO_SCALE_SHARED), 108 IIO_CHAN_INFO_SCALE_SHARED_BIT,
109 0, 0, IIO_ST('u', 8, 16, 4), 0), 109 0, 0, IIO_ST('u', 8, 16, 4), 0),
110 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 110 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
111 }, 111 },
112 [ID_AD7495] = { 112 [ID_AD7495] = {
113 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 113 .channel[0] = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
114 (1 << IIO_CHAN_INFO_SCALE_SHARED), 114 IIO_CHAN_INFO_SCALE_SHARED_BIT,
115 0, 0, IIO_ST('u', 12, 16, 0), 0), 115 0, 0, IIO_ST('u', 12, 16, 0), 0),
116 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 116 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
117 .int_vref_mv = 2500, 117 .int_vref_mv = 2500,
@@ -237,11 +237,11 @@ static const struct spi_device_id ad7476_id[] = {
237 {"ad7495", ID_AD7495}, 237 {"ad7495", ID_AD7495},
238 {} 238 {}
239}; 239};
240MODULE_DEVICE_TABLE(spi, ad7476_id);
240 241
241static struct spi_driver ad7476_driver = { 242static struct spi_driver ad7476_driver = {
242 .driver = { 243 .driver = {
243 .name = "ad7476", 244 .name = "ad7476",
244 .bus = &spi_bus_type,
245 .owner = THIS_MODULE, 245 .owner = THIS_MODULE,
246 }, 246 },
247 .probe = ad7476_probe, 247 .probe = ad7476_probe,
@@ -253,4 +253,3 @@ module_spi_driver(ad7476_driver);
253MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 253MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
254MODULE_DESCRIPTION("Analog Devices AD7475/6/7/8(A) AD7466/7/8 ADC"); 254MODULE_DESCRIPTION("Analog Devices AD7475/6/7/8(A) AD7466/7/8 ADC");
255MODULE_LICENSE("GPL v2"); 255MODULE_LICENSE("GPL v2");
256MODULE_ALIAS("spi:ad7476");
diff --git a/drivers/staging/iio/adc/ad7476_ring.c b/drivers/staging/iio/adc/ad7476_ring.c
index e82c1a433f4f..4e298b2a05b2 100644
--- a/drivers/staging/iio/adc/ad7476_ring.c
+++ b/drivers/staging/iio/adc/ad7476_ring.c
@@ -14,36 +14,12 @@
14#include <linux/spi/spi.h> 14#include <linux/spi/spi.h>
15 15
16#include "../iio.h" 16#include "../iio.h"
17#include "../buffer_generic.h" 17#include "../buffer.h"
18#include "../ring_sw.h" 18#include "../ring_sw.h"
19#include "../trigger_consumer.h" 19#include "../trigger_consumer.h"
20 20
21#include "ad7476.h" 21#include "ad7476.h"
22 22
23int ad7476_scan_from_ring(struct iio_dev *indio_dev)
24{
25 struct iio_buffer *ring = indio_dev->buffer;
26 int ret;
27 u8 *ring_data;
28
29 ring_data = kmalloc(ring->access->get_bytes_per_datum(ring),
30 GFP_KERNEL);
31 if (ring_data == NULL) {
32 ret = -ENOMEM;
33 goto error_ret;
34 }
35 ret = ring->access->read_last(ring, ring_data);
36 if (ret)
37 goto error_free_ring_data;
38
39 ret = (ring_data[0] << 8) | ring_data[1];
40
41error_free_ring_data:
42 kfree(ring_data);
43error_ret:
44 return ret;
45}
46
47/** 23/**
48 * ad7476_ring_preenable() setup the parameters of the ring before enabling 24 * ad7476_ring_preenable() setup the parameters of the ring before enabling
49 * 25 *
@@ -56,7 +32,8 @@ static int ad7476_ring_preenable(struct iio_dev *indio_dev)
56 struct ad7476_state *st = iio_priv(indio_dev); 32 struct ad7476_state *st = iio_priv(indio_dev);
57 struct iio_buffer *ring = indio_dev->buffer; 33 struct iio_buffer *ring = indio_dev->buffer;
58 34
59 st->d_size = ring->scan_count * 35 st->d_size = bitmap_weight(indio_dev->active_scan_mask,
36 indio_dev->masklength) *
60 st->chip_info->channel[0].scan_type.storagebits / 8; 37 st->chip_info->channel[0].scan_type.storagebits / 8;
61 38
62 if (ring->scan_timestamp) { 39 if (ring->scan_timestamp) {
@@ -137,7 +114,7 @@ int ad7476_register_ring_funcs_and_init(struct iio_dev *indio_dev)
137 } 114 }
138 115
139 /* Ring buffer functions - here trigger setup related */ 116 /* Ring buffer functions - here trigger setup related */
140 indio_dev->buffer->setup_ops = &ad7476_ring_setup_ops; 117 indio_dev->setup_ops = &ad7476_ring_setup_ops;
141 indio_dev->buffer->scan_timestamp = true; 118 indio_dev->buffer->scan_timestamp = true;
142 119
143 /* Flag that polled ring buffering is possible */ 120 /* Flag that polled ring buffering is possible */
diff --git a/drivers/staging/iio/adc/ad7606.h b/drivers/staging/iio/adc/ad7606.h
index 35018c3f518e..10f59896597f 100644
--- a/drivers/staging/iio/adc/ad7606.h
+++ b/drivers/staging/iio/adc/ad7606.h
@@ -99,7 +99,6 @@ enum ad7606_supported_device_ids {
99 ID_AD7606_4 99 ID_AD7606_4
100}; 100};
101 101
102int ad7606_scan_from_ring(struct iio_dev *indio_dev, unsigned ch);
103int ad7606_register_ring_funcs_and_init(struct iio_dev *indio_dev); 102int ad7606_register_ring_funcs_and_init(struct iio_dev *indio_dev);
104void ad7606_ring_cleanup(struct iio_dev *indio_dev); 103void ad7606_ring_cleanup(struct iio_dev *indio_dev);
105#endif /* IIO_ADC_AD7606_H_ */ 104#endif /* IIO_ADC_AD7606_H_ */
diff --git a/drivers/staging/iio/adc/ad7606_core.c b/drivers/staging/iio/adc/ad7606_core.c
index e3ecd3d2ef3a..ddb7ef92f5c1 100644
--- a/drivers/staging/iio/adc/ad7606_core.c
+++ b/drivers/staging/iio/adc/ad7606_core.c
@@ -20,7 +20,7 @@
20 20
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../buffer.h"
24 24
25#include "ad7606.h" 25#include "ad7606.h"
26 26
@@ -91,7 +91,7 @@ static int ad7606_read_raw(struct iio_dev *indio_dev,
91 case 0: 91 case 0:
92 mutex_lock(&indio_dev->mlock); 92 mutex_lock(&indio_dev->mlock);
93 if (iio_buffer_enabled(indio_dev)) 93 if (iio_buffer_enabled(indio_dev))
94 ret = ad7606_scan_from_ring(indio_dev, chan->address); 94 ret = -EBUSY;
95 else 95 else
96 ret = ad7606_scan_direct(indio_dev, chan->address); 96 ret = ad7606_scan_direct(indio_dev, chan->address);
97 mutex_unlock(&indio_dev->mlock); 97 mutex_unlock(&indio_dev->mlock);
@@ -100,7 +100,7 @@ static int ad7606_read_raw(struct iio_dev *indio_dev,
100 return ret; 100 return ret;
101 *val = (short) ret; 101 *val = (short) ret;
102 return IIO_VAL_INT; 102 return IIO_VAL_INT;
103 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 103 case IIO_CHAN_INFO_SCALE:
104 scale_uv = (st->range * 1000 * 2) 104 scale_uv = (st->range * 1000 * 2)
105 >> st->chip_info->channels[0].scan_type.realbits; 105 >> st->chip_info->channels[0].scan_type.realbits;
106 *val = scale_uv / 1000; 106 *val = scale_uv / 1000;
diff --git a/drivers/staging/iio/adc/ad7606_par.c b/drivers/staging/iio/adc/ad7606_par.c
index 688632edd3d7..cff97568189e 100644
--- a/drivers/staging/iio/adc/ad7606_par.c
+++ b/drivers/staging/iio/adc/ad7606_par.c
@@ -189,4 +189,3 @@ module_exit(ad7606_cleanup);
189MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 189MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
190MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 190MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
191MODULE_LICENSE("GPL v2"); 191MODULE_LICENSE("GPL v2");
192MODULE_ALIAS("platform:ad7606_par");
diff --git a/drivers/staging/iio/adc/ad7606_ring.c b/drivers/staging/iio/adc/ad7606_ring.c
index 20927fd53728..e8f94a18a943 100644
--- a/drivers/staging/iio/adc/ad7606_ring.c
+++ b/drivers/staging/iio/adc/ad7606_ring.c
@@ -12,36 +12,12 @@
12#include <linux/slab.h> 12#include <linux/slab.h>
13 13
14#include "../iio.h" 14#include "../iio.h"
15#include "../buffer_generic.h" 15#include "../buffer.h"
16#include "../ring_sw.h" 16#include "../ring_sw.h"
17#include "../trigger_consumer.h" 17#include "../trigger_consumer.h"
18 18
19#include "ad7606.h" 19#include "ad7606.h"
20 20
21int ad7606_scan_from_ring(struct iio_dev *indio_dev, unsigned ch)
22{
23 struct iio_buffer *ring = indio_dev->buffer;
24 int ret;
25 u16 *ring_data;
26
27 ring_data = kmalloc(ring->access->get_bytes_per_datum(ring),
28 GFP_KERNEL);
29 if (ring_data == NULL) {
30 ret = -ENOMEM;
31 goto error_ret;
32 }
33 ret = ring->access->read_last(ring, (u8 *) ring_data);
34 if (ret)
35 goto error_free_ring_data;
36
37 ret = ring_data[ch];
38
39error_free_ring_data:
40 kfree(ring_data);
41error_ret:
42 return ret;
43}
44
45/** 21/**
46 * ad7606_trigger_handler_th() th/bh of trigger launched polling to ring buffer 22 * ad7606_trigger_handler_th() th/bh of trigger launched polling to ring buffer
47 * 23 *
@@ -136,8 +112,6 @@ int ad7606_register_ring_funcs_and_init(struct iio_dev *indio_dev)
136 112
137 /* Effectively select the ring buffer implementation */ 113 /* Effectively select the ring buffer implementation */
138 indio_dev->buffer->access = &ring_sw_access_funcs; 114 indio_dev->buffer->access = &ring_sw_access_funcs;
139 indio_dev->buffer->bpe =
140 st->chip_info->channels[0].scan_type.storagebits / 8;
141 indio_dev->pollfunc = iio_alloc_pollfunc(&ad7606_trigger_handler_th_bh, 115 indio_dev->pollfunc = iio_alloc_pollfunc(&ad7606_trigger_handler_th_bh,
142 &ad7606_trigger_handler_th_bh, 116 &ad7606_trigger_handler_th_bh,
143 0, 117 0,
@@ -152,7 +126,7 @@ int ad7606_register_ring_funcs_and_init(struct iio_dev *indio_dev)
152 126
153 /* Ring buffer functions - here trigger setup related */ 127 /* Ring buffer functions - here trigger setup related */
154 128
155 indio_dev->buffer->setup_ops = &ad7606_ring_setup_ops; 129 indio_dev->setup_ops = &ad7606_ring_setup_ops;
156 indio_dev->buffer->scan_timestamp = true ; 130 indio_dev->buffer->scan_timestamp = true ;
157 131
158 INIT_WORK(&st->poll_work, &ad7606_poll_bh_to_ring); 132 INIT_WORK(&st->poll_work, &ad7606_poll_bh_to_ring);
diff --git a/drivers/staging/iio/adc/ad7606_spi.c b/drivers/staging/iio/adc/ad7606_spi.c
index b984bd2048b6..237f1c44d296 100644
--- a/drivers/staging/iio/adc/ad7606_spi.c
+++ b/drivers/staging/iio/adc/ad7606_spi.c
@@ -97,11 +97,11 @@ static const struct spi_device_id ad7606_id[] = {
97 {"ad7606-4", ID_AD7606_4}, 97 {"ad7606-4", ID_AD7606_4},
98 {} 98 {}
99}; 99};
100MODULE_DEVICE_TABLE(spi, ad7606_id);
100 101
101static struct spi_driver ad7606_driver = { 102static struct spi_driver ad7606_driver = {
102 .driver = { 103 .driver = {
103 .name = "ad7606", 104 .name = "ad7606",
104 .bus = &spi_bus_type,
105 .owner = THIS_MODULE, 105 .owner = THIS_MODULE,
106 .pm = AD7606_SPI_PM_OPS, 106 .pm = AD7606_SPI_PM_OPS,
107 }, 107 },
@@ -114,4 +114,3 @@ module_spi_driver(ad7606_driver);
114MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 114MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
115MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 115MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
116MODULE_LICENSE("GPL v2"); 116MODULE_LICENSE("GPL v2");
117MODULE_ALIAS("spi:ad7606_spi");
diff --git a/drivers/staging/iio/adc/ad7780.c b/drivers/staging/iio/adc/ad7780.c
index ec90261cbc3c..a13e58c814e6 100644
--- a/drivers/staging/iio/adc/ad7780.c
+++ b/drivers/staging/iio/adc/ad7780.c
@@ -114,7 +114,7 @@ static int ad7780_read_raw(struct iio_dev *indio_dev,
114 *val *= 128; 114 *val *= 128;
115 115
116 return IIO_VAL_INT; 116 return IIO_VAL_INT;
117 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 117 case IIO_CHAN_INFO_SCALE:
118 scale_uv = (st->int_vref_mv * 100000) 118 scale_uv = (st->int_vref_mv * 100000)
119 >> (channel.scan_type.realbits - 1); 119 >> (channel.scan_type.realbits - 1);
120 *val = scale_uv / 100000; 120 *val = scale_uv / 100000;
@@ -127,12 +127,12 @@ static int ad7780_read_raw(struct iio_dev *indio_dev,
127static const struct ad7780_chip_info ad7780_chip_info_tbl[] = { 127static const struct ad7780_chip_info ad7780_chip_info_tbl[] = {
128 [ID_AD7780] = { 128 [ID_AD7780] = {
129 .channel = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 129 .channel = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
130 (1 << IIO_CHAN_INFO_SCALE_SHARED), 130 IIO_CHAN_INFO_SCALE_SHARED_BIT,
131 0, 0, IIO_ST('s', 24, 32, 8), 0), 131 0, 0, IIO_ST('s', 24, 32, 8), 0),
132 }, 132 },
133 [ID_AD7781] = { 133 [ID_AD7781] = {
134 .channel = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0, 134 .channel = IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 0, 0,
135 (1 << IIO_CHAN_INFO_SCALE_SHARED), 135 IIO_CHAN_INFO_SCALE_SHARED_BIT,
136 0, 0, IIO_ST('s', 20, 32, 12), 0), 136 0, 0, IIO_ST('s', 20, 32, 12), 0),
137 }, 137 },
138}; 138};
@@ -272,11 +272,11 @@ static const struct spi_device_id ad7780_id[] = {
272 {"ad7781", ID_AD7781}, 272 {"ad7781", ID_AD7781},
273 {} 273 {}
274}; 274};
275MODULE_DEVICE_TABLE(spi, ad7780_id);
275 276
276static struct spi_driver ad7780_driver = { 277static struct spi_driver ad7780_driver = {
277 .driver = { 278 .driver = {
278 .name = "ad7780", 279 .name = "ad7780",
279 .bus = &spi_bus_type,
280 .owner = THIS_MODULE, 280 .owner = THIS_MODULE,
281 }, 281 },
282 .probe = ad7780_probe, 282 .probe = ad7780_probe,
diff --git a/drivers/staging/iio/adc/ad7793.c b/drivers/staging/iio/adc/ad7793.c
index 1c5588e88cdf..6a058b19c49a 100644
--- a/drivers/staging/iio/adc/ad7793.c
+++ b/drivers/staging/iio/adc/ad7793.c
@@ -20,7 +20,7 @@
20 20
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../buffer.h"
24#include "../ring_sw.h" 24#include "../ring_sw.h"
25#include "../trigger.h" 25#include "../trigger.h"
26#include "../trigger_consumer.h" 26#include "../trigger_consumer.h"
@@ -316,25 +316,6 @@ out:
316 return ret; 316 return ret;
317} 317}
318 318
319static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
320{
321 struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
322 int ret;
323 s64 dat64[2];
324 u32 *dat32 = (u32 *)dat64;
325
326 if (!(test_bit(ch, ring->scan_mask)))
327 return -EBUSY;
328
329 ret = ring->access->read_last(ring, (u8 *) &dat64);
330 if (ret)
331 return ret;
332
333 *val = *dat32;
334
335 return 0;
336}
337
338static int ad7793_ring_preenable(struct iio_dev *indio_dev) 319static int ad7793_ring_preenable(struct iio_dev *indio_dev)
339{ 320{
340 struct ad7793_state *st = iio_priv(indio_dev); 321 struct ad7793_state *st = iio_priv(indio_dev);
@@ -342,14 +323,15 @@ static int ad7793_ring_preenable(struct iio_dev *indio_dev)
342 size_t d_size; 323 size_t d_size;
343 unsigned channel; 324 unsigned channel;
344 325
345 if (!ring->scan_count) 326 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
346 return -EINVAL; 327 return -EINVAL;
347 328
348 channel = find_first_bit(ring->scan_mask, 329 channel = find_first_bit(indio_dev->active_scan_mask,
349 indio_dev->masklength); 330 indio_dev->masklength);
350 331
351 d_size = ring->scan_count * 332 d_size = bitmap_weight(indio_dev->active_scan_mask,
352 indio_dev->channels[0].scan_type.storagebits / 8; 333 indio_dev->masklength) *
334 indio_dev->channels[0].scan_type.storagebits / 8;
353 335
354 if (ring->scan_timestamp) { 336 if (ring->scan_timestamp) {
355 d_size += sizeof(s64); 337 d_size += sizeof(s64);
@@ -411,7 +393,7 @@ static irqreturn_t ad7793_trigger_handler(int irq, void *p)
411 s64 dat64[2]; 393 s64 dat64[2];
412 s32 *dat32 = (s32 *)dat64; 394 s32 *dat32 = (s32 *)dat64;
413 395
414 if (ring->scan_count) 396 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
415 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA, 397 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
416 dat32, 398 dat32,
417 indio_dev->channels[0].scan_type.realbits/8); 399 indio_dev->channels[0].scan_type.realbits/8);
@@ -459,7 +441,7 @@ static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
459 } 441 }
460 442
461 /* Ring buffer functions - here trigger setup related */ 443 /* Ring buffer functions - here trigger setup related */
462 indio_dev->buffer->setup_ops = &ad7793_ring_setup_ops; 444 indio_dev->setup_ops = &ad7793_ring_setup_ops;
463 445
464 /* Flag that polled ring buffering is possible */ 446 /* Flag that polled ring buffering is possible */
465 indio_dev->modes |= INDIO_BUFFER_TRIGGERED; 447 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
@@ -493,6 +475,10 @@ static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
493 return IRQ_HANDLED; 475 return IRQ_HANDLED;
494} 476}
495 477
478static struct iio_trigger_ops ad7793_trigger_ops = {
479 .owner = THIS_MODULE,
480};
481
496static int ad7793_probe_trigger(struct iio_dev *indio_dev) 482static int ad7793_probe_trigger(struct iio_dev *indio_dev)
497{ 483{
498 struct ad7793_state *st = iio_priv(indio_dev); 484 struct ad7793_state *st = iio_priv(indio_dev);
@@ -505,6 +491,7 @@ static int ad7793_probe_trigger(struct iio_dev *indio_dev)
505 ret = -ENOMEM; 491 ret = -ENOMEM;
506 goto error_ret; 492 goto error_ret;
507 } 493 }
494 st->trig->ops = &ad7793_trigger_ops;
508 495
509 ret = request_irq(st->spi->irq, 496 ret = request_irq(st->spi->irq,
510 ad7793_data_rdy_trig_poll, 497 ad7793_data_rdy_trig_poll,
@@ -517,7 +504,6 @@ static int ad7793_probe_trigger(struct iio_dev *indio_dev)
517 disable_irq_nosync(st->spi->irq); 504 disable_irq_nosync(st->spi->irq);
518 st->irq_dis = true; 505 st->irq_dis = true;
519 st->trig->dev.parent = &st->spi->dev; 506 st->trig->dev.parent = &st->spi->dev;
520 st->trig->owner = THIS_MODULE;
521 st->trig->private_data = indio_dev; 507 st->trig->private_data = indio_dev;
522 508
523 ret = iio_trigger_register(st->trig); 509 ret = iio_trigger_register(st->trig);
@@ -649,8 +635,7 @@ static int ad7793_read_raw(struct iio_dev *indio_dev,
649 case 0: 635 case 0:
650 mutex_lock(&indio_dev->mlock); 636 mutex_lock(&indio_dev->mlock);
651 if (iio_buffer_enabled(indio_dev)) 637 if (iio_buffer_enabled(indio_dev))
652 ret = ad7793_scan_from_ring(st, 638 ret = -EBUSY;
653 chan->scan_index, &smpl);
654 else 639 else
655 ret = ad7793_read(st, chan->address, 640 ret = ad7793_read(st, chan->address,
656 chan->scan_type.realbits / 8, &smpl); 641 chan->scan_type.realbits / 8, &smpl);
@@ -667,19 +652,21 @@ static int ad7793_read_raw(struct iio_dev *indio_dev,
667 652
668 return IIO_VAL_INT; 653 return IIO_VAL_INT;
669 654
670 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 655 case IIO_CHAN_INFO_SCALE:
671 *val = st->scale_avail[(st->conf >> 8) & 0x7][0];
672 *val2 = st->scale_avail[(st->conf >> 8) & 0x7][1];
673
674 return IIO_VAL_INT_PLUS_NANO;
675
676 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
677 switch (chan->type) { 656 switch (chan->type) {
678 case IIO_VOLTAGE: 657 case IIO_VOLTAGE:
679 /* 1170mV / 2^23 * 6 */ 658 if (chan->differential) {
680 scale_uv = (1170ULL * 100000000ULL * 6ULL) 659 *val = st->
681 >> (chan->scan_type.realbits - 660 scale_avail[(st->conf >> 8) & 0x7][0];
682 (unipolar ? 0 : 1)); 661 *val2 = st->
662 scale_avail[(st->conf >> 8) & 0x7][1];
663 return IIO_VAL_INT_PLUS_NANO;
664 } else {
665 /* 1170mV / 2^23 * 6 */
666 scale_uv = (1170ULL * 100000000ULL * 6ULL)
667 >> (chan->scan_type.realbits -
668 (unipolar ? 0 : 1));
669 }
683 break; 670 break;
684 case IIO_TEMP: 671 case IIO_TEMP:
685 /* Always uses unity gain and internal ref */ 672 /* Always uses unity gain and internal ref */
@@ -716,7 +703,7 @@ static int ad7793_write_raw(struct iio_dev *indio_dev,
716 } 703 }
717 704
718 switch (mask) { 705 switch (mask) {
719 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 706 case IIO_CHAN_INFO_SCALE:
720 ret = -EINVAL; 707 ret = -EINVAL;
721 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) 708 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
722 if (val2 == st->scale_avail[i][1]) { 709 if (val2 == st->scale_avail[i][1]) {
@@ -775,7 +762,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
775 .channel = 0, 762 .channel = 0,
776 .channel2 = 0, 763 .channel2 = 0,
777 .address = AD7793_CH_AIN1P_AIN1M, 764 .address = AD7793_CH_AIN1P_AIN1M,
778 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 765 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
779 .scan_index = 0, 766 .scan_index = 0,
780 .scan_type = IIO_ST('s', 24, 32, 0) 767 .scan_type = IIO_ST('s', 24, 32, 0)
781 }, 768 },
@@ -786,7 +773,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
786 .channel = 1, 773 .channel = 1,
787 .channel2 = 1, 774 .channel2 = 1,
788 .address = AD7793_CH_AIN2P_AIN2M, 775 .address = AD7793_CH_AIN2P_AIN2M,
789 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 776 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
790 .scan_index = 1, 777 .scan_index = 1,
791 .scan_type = IIO_ST('s', 24, 32, 0) 778 .scan_type = IIO_ST('s', 24, 32, 0)
792 }, 779 },
@@ -797,7 +784,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
797 .channel = 2, 784 .channel = 2,
798 .channel2 = 2, 785 .channel2 = 2,
799 .address = AD7793_CH_AIN3P_AIN3M, 786 .address = AD7793_CH_AIN3P_AIN3M,
800 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 787 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
801 .scan_index = 2, 788 .scan_index = 2,
802 .scan_type = IIO_ST('s', 24, 32, 0) 789 .scan_type = IIO_ST('s', 24, 32, 0)
803 }, 790 },
@@ -809,7 +796,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
809 .channel = 2, 796 .channel = 2,
810 .channel2 = 2, 797 .channel2 = 2,
811 .address = AD7793_CH_AIN1M_AIN1M, 798 .address = AD7793_CH_AIN1M_AIN1M,
812 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 799 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
813 .scan_index = 2, 800 .scan_index = 2,
814 .scan_type = IIO_ST('s', 24, 32, 0) 801 .scan_type = IIO_ST('s', 24, 32, 0)
815 }, 802 },
@@ -818,7 +805,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
818 .indexed = 1, 805 .indexed = 1,
819 .channel = 0, 806 .channel = 0,
820 .address = AD7793_CH_TEMP, 807 .address = AD7793_CH_TEMP,
821 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 808 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
822 .scan_index = 4, 809 .scan_index = 4,
823 .scan_type = IIO_ST('s', 24, 32, 0), 810 .scan_type = IIO_ST('s', 24, 32, 0),
824 }, 811 },
@@ -828,7 +815,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
828 .indexed = 1, 815 .indexed = 1,
829 .channel = 4, 816 .channel = 4,
830 .address = AD7793_CH_AVDD_MONITOR, 817 .address = AD7793_CH_AVDD_MONITOR,
831 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 818 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
832 .scan_index = 5, 819 .scan_index = 5,
833 .scan_type = IIO_ST('s', 24, 32, 0), 820 .scan_type = IIO_ST('s', 24, 32, 0),
834 }, 821 },
@@ -842,7 +829,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
842 .channel = 0, 829 .channel = 0,
843 .channel2 = 0, 830 .channel2 = 0,
844 .address = AD7793_CH_AIN1P_AIN1M, 831 .address = AD7793_CH_AIN1P_AIN1M,
845 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 832 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
846 .scan_index = 0, 833 .scan_index = 0,
847 .scan_type = IIO_ST('s', 16, 32, 0) 834 .scan_type = IIO_ST('s', 16, 32, 0)
848 }, 835 },
@@ -853,7 +840,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
853 .channel = 1, 840 .channel = 1,
854 .channel2 = 1, 841 .channel2 = 1,
855 .address = AD7793_CH_AIN2P_AIN2M, 842 .address = AD7793_CH_AIN2P_AIN2M,
856 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 843 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
857 .scan_index = 1, 844 .scan_index = 1,
858 .scan_type = IIO_ST('s', 16, 32, 0) 845 .scan_type = IIO_ST('s', 16, 32, 0)
859 }, 846 },
@@ -864,7 +851,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
864 .channel = 2, 851 .channel = 2,
865 .channel2 = 2, 852 .channel2 = 2,
866 .address = AD7793_CH_AIN3P_AIN3M, 853 .address = AD7793_CH_AIN3P_AIN3M,
867 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 854 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
868 .scan_index = 2, 855 .scan_index = 2,
869 .scan_type = IIO_ST('s', 16, 32, 0) 856 .scan_type = IIO_ST('s', 16, 32, 0)
870 }, 857 },
@@ -876,7 +863,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
876 .channel = 2, 863 .channel = 2,
877 .channel2 = 2, 864 .channel2 = 2,
878 .address = AD7793_CH_AIN1M_AIN1M, 865 .address = AD7793_CH_AIN1M_AIN1M,
879 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 866 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
880 .scan_index = 2, 867 .scan_index = 2,
881 .scan_type = IIO_ST('s', 16, 32, 0) 868 .scan_type = IIO_ST('s', 16, 32, 0)
882 }, 869 },
@@ -885,7 +872,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
885 .indexed = 1, 872 .indexed = 1,
886 .channel = 0, 873 .channel = 0,
887 .address = AD7793_CH_TEMP, 874 .address = AD7793_CH_TEMP,
888 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 875 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
889 .scan_index = 4, 876 .scan_index = 4,
890 .scan_type = IIO_ST('s', 16, 32, 0), 877 .scan_type = IIO_ST('s', 16, 32, 0),
891 }, 878 },
@@ -895,7 +882,7 @@ static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
895 .indexed = 1, 882 .indexed = 1,
896 .channel = 4, 883 .channel = 4,
897 .address = AD7793_CH_AVDD_MONITOR, 884 .address = AD7793_CH_AVDD_MONITOR,
898 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 885 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
899 .scan_index = 5, 886 .scan_index = 5,
900 .scan_type = IIO_ST('s', 16, 32, 0), 887 .scan_type = IIO_ST('s', 16, 32, 0),
901 }, 888 },
@@ -1034,11 +1021,11 @@ static const struct spi_device_id ad7793_id[] = {
1034 {"ad7793", ID_AD7793}, 1021 {"ad7793", ID_AD7793},
1035 {} 1022 {}
1036}; 1023};
1024MODULE_DEVICE_TABLE(spi, ad7793_id);
1037 1025
1038static struct spi_driver ad7793_driver = { 1026static struct spi_driver ad7793_driver = {
1039 .driver = { 1027 .driver = {
1040 .name = "ad7793", 1028 .name = "ad7793",
1041 .bus = &spi_bus_type,
1042 .owner = THIS_MODULE, 1029 .owner = THIS_MODULE,
1043 }, 1030 },
1044 .probe = ad7793_probe, 1031 .probe = ad7793_probe,
diff --git a/drivers/staging/iio/adc/ad7816.c b/drivers/staging/iio/adc/ad7816.c
index acbf9363132b..52b720e2b03a 100644
--- a/drivers/staging/iio/adc/ad7816.c
+++ b/drivers/staging/iio/adc/ad7816.c
@@ -18,6 +18,7 @@
18 18
19#include "../iio.h" 19#include "../iio.h"
20#include "../sysfs.h" 20#include "../sysfs.h"
21#include "../events.h"
21 22
22/* 23/*
23 * AD7816 config masks 24 * AD7816 config masks
@@ -459,7 +460,6 @@ MODULE_DEVICE_TABLE(spi, ad7816_id);
459static struct spi_driver ad7816_driver = { 460static struct spi_driver ad7816_driver = {
460 .driver = { 461 .driver = {
461 .name = "ad7816", 462 .name = "ad7816",
462 .bus = &spi_bus_type,
463 .owner = THIS_MODULE, 463 .owner = THIS_MODULE,
464 }, 464 },
465 .probe = ad7816_probe, 465 .probe = ad7816_probe,
diff --git a/drivers/staging/iio/adc/ad7887.h b/drivers/staging/iio/adc/ad7887.h
index 3452d1819077..bc53b6532121 100644
--- a/drivers/staging/iio/adc/ad7887.h
+++ b/drivers/staging/iio/adc/ad7887.h
@@ -83,14 +83,9 @@ enum ad7887_supported_device_ids {
83}; 83};
84 84
85#ifdef CONFIG_IIO_BUFFER 85#ifdef CONFIG_IIO_BUFFER
86int ad7887_scan_from_ring(struct ad7887_state *st, int channum);
87int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev); 86int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev);
88void ad7887_ring_cleanup(struct iio_dev *indio_dev); 87void ad7887_ring_cleanup(struct iio_dev *indio_dev);
89#else /* CONFIG_IIO_BUFFER */ 88#else /* CONFIG_IIO_BUFFER */
90static inline int ad7887_scan_from_ring(struct ad7887_state *st, int channum)
91{
92 return 0;
93}
94 89
95static inline int 90static inline int
96ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev) 91ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
diff --git a/drivers/staging/iio/adc/ad7887_core.c b/drivers/staging/iio/adc/ad7887_core.c
index 91b8fb09d92b..e9bbc3eed15d 100644
--- a/drivers/staging/iio/adc/ad7887_core.c
+++ b/drivers/staging/iio/adc/ad7887_core.c
@@ -17,7 +17,7 @@
17 17
18#include "../iio.h" 18#include "../iio.h"
19#include "../sysfs.h" 19#include "../sysfs.h"
20#include "../buffer_generic.h" 20#include "../buffer.h"
21 21
22 22
23#include "ad7887.h" 23#include "ad7887.h"
@@ -45,7 +45,7 @@ static int ad7887_read_raw(struct iio_dev *indio_dev,
45 case 0: 45 case 0:
46 mutex_lock(&indio_dev->mlock); 46 mutex_lock(&indio_dev->mlock);
47 if (iio_buffer_enabled(indio_dev)) 47 if (iio_buffer_enabled(indio_dev))
48 ret = ad7887_scan_from_ring(st, 1 << chan->address); 48 ret = -EBUSY;
49 else 49 else
50 ret = ad7887_scan_direct(st, chan->address); 50 ret = ad7887_scan_direct(st, chan->address);
51 mutex_unlock(&indio_dev->mlock); 51 mutex_unlock(&indio_dev->mlock);
@@ -55,7 +55,7 @@ static int ad7887_read_raw(struct iio_dev *indio_dev,
55 *val = (ret >> st->chip_info->channel[0].scan_type.shift) & 55 *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
56 RES_MASK(st->chip_info->channel[0].scan_type.realbits); 56 RES_MASK(st->chip_info->channel[0].scan_type.realbits);
57 return IIO_VAL_INT; 57 return IIO_VAL_INT;
58 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 58 case IIO_CHAN_INFO_SCALE:
59 scale_uv = (st->int_vref_mv * 1000) 59 scale_uv = (st->int_vref_mv * 1000)
60 >> st->chip_info->channel[0].scan_type.realbits; 60 >> st->chip_info->channel[0].scan_type.realbits;
61 *val = scale_uv/1000; 61 *val = scale_uv/1000;
@@ -75,7 +75,7 @@ static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
75 .type = IIO_VOLTAGE, 75 .type = IIO_VOLTAGE,
76 .indexed = 1, 76 .indexed = 1,
77 .channel = 1, 77 .channel = 1,
78 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 78 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
79 .address = 1, 79 .address = 1,
80 .scan_index = 1, 80 .scan_index = 1,
81 .scan_type = IIO_ST('u', 12, 16, 0), 81 .scan_type = IIO_ST('u', 12, 16, 0),
@@ -84,7 +84,7 @@ static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
84 .type = IIO_VOLTAGE, 84 .type = IIO_VOLTAGE,
85 .indexed = 1, 85 .indexed = 1,
86 .channel = 0, 86 .channel = 0,
87 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 87 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
88 .address = 0, 88 .address = 0,
89 .scan_index = 0, 89 .scan_index = 0,
90 .scan_type = IIO_ST('u', 12, 16, 0), 90 .scan_type = IIO_ST('u', 12, 16, 0),
@@ -246,11 +246,11 @@ static const struct spi_device_id ad7887_id[] = {
246 {"ad7887", ID_AD7887}, 246 {"ad7887", ID_AD7887},
247 {} 247 {}
248}; 248};
249MODULE_DEVICE_TABLE(spi, ad7887_id);
249 250
250static struct spi_driver ad7887_driver = { 251static struct spi_driver ad7887_driver = {
251 .driver = { 252 .driver = {
252 .name = "ad7887", 253 .name = "ad7887",
253 .bus = &spi_bus_type,
254 .owner = THIS_MODULE, 254 .owner = THIS_MODULE,
255 }, 255 },
256 .probe = ad7887_probe, 256 .probe = ad7887_probe,
@@ -262,4 +262,3 @@ module_spi_driver(ad7887_driver);
262MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 262MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
263MODULE_DESCRIPTION("Analog Devices AD7887 ADC"); 263MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
264MODULE_LICENSE("GPL v2"); 264MODULE_LICENSE("GPL v2");
265MODULE_ALIAS("spi:ad7887");
diff --git a/drivers/staging/iio/adc/ad7887_ring.c b/drivers/staging/iio/adc/ad7887_ring.c
index cb74cada5611..85076cd962e7 100644
--- a/drivers/staging/iio/adc/ad7887_ring.c
+++ b/drivers/staging/iio/adc/ad7887_ring.c
@@ -13,46 +13,12 @@
13#include <linux/spi/spi.h> 13#include <linux/spi/spi.h>
14 14
15#include "../iio.h" 15#include "../iio.h"
16#include "../buffer_generic.h" 16#include "../buffer.h"
17#include "../ring_sw.h" 17#include "../ring_sw.h"
18#include "../trigger_consumer.h" 18#include "../trigger_consumer.h"
19 19
20#include "ad7887.h" 20#include "ad7887.h"
21 21
22int ad7887_scan_from_ring(struct ad7887_state *st, int channum)
23{
24 struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
25 int count = 0, ret;
26 u16 *ring_data;
27
28 if (!(test_bit(channum, ring->scan_mask))) {
29 ret = -EBUSY;
30 goto error_ret;
31 }
32
33 ring_data = kmalloc(ring->access->get_bytes_per_datum(ring),
34 GFP_KERNEL);
35 if (ring_data == NULL) {
36 ret = -ENOMEM;
37 goto error_ret;
38 }
39 ret = ring->access->read_last(ring, (u8 *) ring_data);
40 if (ret)
41 goto error_free_ring_data;
42
43 /* for single channel scan the result is stored with zero offset */
44 if ((test_bit(1, ring->scan_mask) || test_bit(0, ring->scan_mask)) &&
45 (channum == 1))
46 count = 1;
47
48 ret = be16_to_cpu(ring_data[count]);
49
50error_free_ring_data:
51 kfree(ring_data);
52error_ret:
53 return ret;
54}
55
56/** 22/**
57 * ad7887_ring_preenable() setup the parameters of the ring before enabling 23 * ad7887_ring_preenable() setup the parameters of the ring before enabling
58 * 24 *
@@ -65,7 +31,8 @@ static int ad7887_ring_preenable(struct iio_dev *indio_dev)
65 struct ad7887_state *st = iio_priv(indio_dev); 31 struct ad7887_state *st = iio_priv(indio_dev);
66 struct iio_buffer *ring = indio_dev->buffer; 32 struct iio_buffer *ring = indio_dev->buffer;
67 33
68 st->d_size = ring->scan_count * 34 st->d_size = bitmap_weight(indio_dev->active_scan_mask,
35 indio_dev->masklength) *
69 st->chip_info->channel[0].scan_type.storagebits / 8; 36 st->chip_info->channel[0].scan_type.storagebits / 8;
70 37
71 if (ring->scan_timestamp) { 38 if (ring->scan_timestamp) {
@@ -80,7 +47,7 @@ static int ad7887_ring_preenable(struct iio_dev *indio_dev)
80 set_bytes_per_datum(indio_dev->buffer, st->d_size); 47 set_bytes_per_datum(indio_dev->buffer, st->d_size);
81 48
82 /* We know this is a single long so can 'cheat' */ 49 /* We know this is a single long so can 'cheat' */
83 switch (*ring->scan_mask) { 50 switch (*indio_dev->active_scan_mask) {
84 case (1 << 0): 51 case (1 << 0):
85 st->ring_msg = &st->msg[AD7887_CH0]; 52 st->ring_msg = &st->msg[AD7887_CH0];
86 break; 53 break;
@@ -121,7 +88,8 @@ static irqreturn_t ad7887_trigger_handler(int irq, void *p)
121 __u8 *buf; 88 __u8 *buf;
122 int b_sent; 89 int b_sent;
123 90
124 unsigned int bytes = ring->scan_count * 91 unsigned int bytes = bitmap_weight(indio_dev->active_scan_mask,
92 indio_dev->masklength) *
125 st->chip_info->channel[0].scan_type.storagebits / 8; 93 st->chip_info->channel[0].scan_type.storagebits / 8;
126 94
127 buf = kzalloc(st->d_size, GFP_KERNEL); 95 buf = kzalloc(st->d_size, GFP_KERNEL);
@@ -176,7 +144,7 @@ int ad7887_register_ring_funcs_and_init(struct iio_dev *indio_dev)
176 goto error_deallocate_sw_rb; 144 goto error_deallocate_sw_rb;
177 } 145 }
178 /* Ring buffer functions - here trigger setup related */ 146 /* Ring buffer functions - here trigger setup related */
179 indio_dev->buffer->setup_ops = &ad7887_ring_setup_ops; 147 indio_dev->setup_ops = &ad7887_ring_setup_ops;
180 148
181 /* Flag that polled ring buffering is possible */ 149 /* Flag that polled ring buffering is possible */
182 indio_dev->modes |= INDIO_BUFFER_TRIGGERED; 150 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
diff --git a/drivers/staging/iio/adc/ad799x.h b/drivers/staging/iio/adc/ad799x.h
index eda01d5bab7d..356f690a76fb 100644
--- a/drivers/staging/iio/adc/ad799x.h
+++ b/drivers/staging/iio/adc/ad799x.h
@@ -124,15 +124,9 @@ struct ad799x_platform_data {
124int ad7997_8_set_scan_mode(struct ad799x_state *st, unsigned mask); 124int ad7997_8_set_scan_mode(struct ad799x_state *st, unsigned mask);
125 125
126#ifdef CONFIG_AD799X_RING_BUFFER 126#ifdef CONFIG_AD799X_RING_BUFFER
127int ad799x_single_channel_from_ring(struct iio_dev *indio_dev, int channum);
128int ad799x_register_ring_funcs_and_init(struct iio_dev *indio_dev); 127int ad799x_register_ring_funcs_and_init(struct iio_dev *indio_dev);
129void ad799x_ring_cleanup(struct iio_dev *indio_dev); 128void ad799x_ring_cleanup(struct iio_dev *indio_dev);
130#else /* CONFIG_AD799X_RING_BUFFER */ 129#else /* CONFIG_AD799X_RING_BUFFER */
131int ad799x_single_channel_from_ring(struct iio_dev *indio_dev, int channum)
132{
133 return -EINVAL;
134}
135
136 130
137static inline int 131static inline int
138ad799x_register_ring_funcs_and_init(struct iio_dev *indio_dev) 132ad799x_register_ring_funcs_and_init(struct iio_dev *indio_dev)
diff --git a/drivers/staging/iio/adc/ad799x_core.c b/drivers/staging/iio/adc/ad799x_core.c
index c0d2f886ea2c..d5b581d8bc2b 100644
--- a/drivers/staging/iio/adc/ad799x_core.c
+++ b/drivers/staging/iio/adc/ad799x_core.c
@@ -35,7 +35,8 @@
35 35
36#include "../iio.h" 36#include "../iio.h"
37#include "../sysfs.h" 37#include "../sysfs.h"
38#include "../buffer_generic.h" 38#include "../events.h"
39#include "../buffer.h"
39 40
40#include "ad799x.h" 41#include "ad799x.h"
41 42
@@ -150,8 +151,7 @@ static int ad799x_read_raw(struct iio_dev *indio_dev,
150 case 0: 151 case 0:
151 mutex_lock(&indio_dev->mlock); 152 mutex_lock(&indio_dev->mlock);
152 if (iio_buffer_enabled(indio_dev)) 153 if (iio_buffer_enabled(indio_dev))
153 ret = ad799x_single_channel_from_ring(indio_dev, 154 ret = -EBUSY;
154 chan->scan_index);
155 else 155 else
156 ret = ad799x_scan_direct(st, chan->scan_index); 156 ret = ad799x_scan_direct(st, chan->scan_index);
157 mutex_unlock(&indio_dev->mlock); 157 mutex_unlock(&indio_dev->mlock);
@@ -161,7 +161,7 @@ static int ad799x_read_raw(struct iio_dev *indio_dev,
161 *val = (ret >> chan->scan_type.shift) & 161 *val = (ret >> chan->scan_type.shift) &
162 RES_MASK(chan->scan_type.realbits); 162 RES_MASK(chan->scan_type.realbits);
163 return IIO_VAL_INT; 163 return IIO_VAL_INT;
164 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 164 case IIO_CHAN_INFO_SCALE:
165 scale_uv = (st->int_vref_mv * 1000) >> chan->scan_type.realbits; 165 scale_uv = (st->int_vref_mv * 1000) >> chan->scan_type.realbits;
166 *val = scale_uv / 1000; 166 *val = scale_uv / 1000;
167 *val2 = (scale_uv % 1000) * 1000; 167 *val2 = (scale_uv % 1000) * 1000;
@@ -934,4 +934,3 @@ module_i2c_driver(ad799x_driver);
934MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 934MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
935MODULE_DESCRIPTION("Analog Devices AD799x ADC"); 935MODULE_DESCRIPTION("Analog Devices AD799x ADC");
936MODULE_LICENSE("GPL v2"); 936MODULE_LICENSE("GPL v2");
937MODULE_ALIAS("i2c:ad799x");
diff --git a/drivers/staging/iio/adc/ad799x_ring.c b/drivers/staging/iio/adc/ad799x_ring.c
index e3f4698d7815..5dded9e7820a 100644
--- a/drivers/staging/iio/adc/ad799x_ring.c
+++ b/drivers/staging/iio/adc/ad799x_ring.c
@@ -17,42 +17,12 @@
17#include <linux/bitops.h> 17#include <linux/bitops.h>
18 18
19#include "../iio.h" 19#include "../iio.h"
20#include "../buffer_generic.h" 20#include "../buffer.h"
21#include "../ring_sw.h" 21#include "../ring_sw.h"
22#include "../trigger_consumer.h" 22#include "../trigger_consumer.h"
23 23
24#include "ad799x.h" 24#include "ad799x.h"
25 25
26int ad799x_single_channel_from_ring(struct iio_dev *indio_dev, int channum)
27{
28 struct iio_buffer *ring = indio_dev->buffer;
29 int count = 0, ret;
30 u16 *ring_data;
31
32 if (!(test_bit(channum, ring->scan_mask))) {
33 ret = -EBUSY;
34 goto error_ret;
35 }
36
37 ring_data = kmalloc(ring->access->get_bytes_per_datum(ring),
38 GFP_KERNEL);
39 if (ring_data == NULL) {
40 ret = -ENOMEM;
41 goto error_ret;
42 }
43 ret = ring->access->read_last(ring, (u8 *) ring_data);
44 if (ret)
45 goto error_free_ring_data;
46 /* Need a count of channels prior to this one */
47 count = bitmap_weight(ring->scan_mask, channum);
48 ret = be16_to_cpu(ring_data[count]);
49
50error_free_ring_data:
51 kfree(ring_data);
52error_ret:
53 return ret;
54}
55
56/** 26/**
57 * ad799x_ring_preenable() setup the parameters of the ring before enabling 27 * ad799x_ring_preenable() setup the parameters of the ring before enabling
58 * 28 *
@@ -71,9 +41,10 @@ static int ad799x_ring_preenable(struct iio_dev *indio_dev)
71 */ 41 */
72 42
73 if (st->id == ad7997 || st->id == ad7998) 43 if (st->id == ad7997 || st->id == ad7998)
74 ad7997_8_set_scan_mode(st, *ring->scan_mask); 44 ad7997_8_set_scan_mode(st, *indio_dev->active_scan_mask);
75 45
76 st->d_size = ring->scan_count * 2; 46 st->d_size = bitmap_weight(indio_dev->active_scan_mask,
47 indio_dev->masklength) * 2;
77 48
78 if (ring->scan_timestamp) { 49 if (ring->scan_timestamp) {
79 st->d_size += sizeof(s64); 50 st->d_size += sizeof(s64);
@@ -115,12 +86,13 @@ static irqreturn_t ad799x_trigger_handler(int irq, void *p)
115 case ad7991: 86 case ad7991:
116 case ad7995: 87 case ad7995:
117 case ad7999: 88 case ad7999:
118 cmd = st->config | (*ring->scan_mask << AD799X_CHANNEL_SHIFT); 89 cmd = st->config |
90 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
119 break; 91 break;
120 case ad7992: 92 case ad7992:
121 case ad7993: 93 case ad7993:
122 case ad7994: 94 case ad7994:
123 cmd = (*ring->scan_mask << AD799X_CHANNEL_SHIFT) | 95 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
124 AD7998_CONV_RES_REG; 96 AD7998_CONV_RES_REG;
125 break; 97 break;
126 case ad7997: 98 case ad7997:
@@ -132,7 +104,8 @@ static irqreturn_t ad799x_trigger_handler(int irq, void *p)
132 } 104 }
133 105
134 b_sent = i2c_smbus_read_i2c_block_data(st->client, 106 b_sent = i2c_smbus_read_i2c_block_data(st->client,
135 cmd, ring->scan_count * 2, rxbuf); 107 cmd, bitmap_weight(indio_dev->active_scan_mask,
108 indio_dev->masklength) * 2, rxbuf);
136 if (b_sent < 0) 109 if (b_sent < 0)
137 goto done; 110 goto done;
138 111
@@ -183,7 +156,7 @@ int ad799x_register_ring_funcs_and_init(struct iio_dev *indio_dev)
183 } 156 }
184 157
185 /* Ring buffer functions - here trigger setup related */ 158 /* Ring buffer functions - here trigger setup related */
186 indio_dev->buffer->setup_ops = &ad799x_buf_setup_ops; 159 indio_dev->setup_ops = &ad799x_buf_setup_ops;
187 indio_dev->buffer->scan_timestamp = true; 160 indio_dev->buffer->scan_timestamp = true;
188 161
189 /* Flag that polled ring buffering is possible */ 162 /* Flag that polled ring buffering is possible */
diff --git a/drivers/staging/iio/adc/adt7310.c b/drivers/staging/iio/adc/adt7310.c
index bc307f3b024e..eec2f325d549 100644
--- a/drivers/staging/iio/adc/adt7310.c
+++ b/drivers/staging/iio/adc/adt7310.c
@@ -17,7 +17,7 @@
17 17
18#include "../iio.h" 18#include "../iio.h"
19#include "../sysfs.h" 19#include "../sysfs.h"
20 20#include "../events.h"
21/* 21/*
22 * ADT7310 registers definition 22 * ADT7310 registers definition
23 */ 23 */
@@ -877,7 +877,6 @@ MODULE_DEVICE_TABLE(spi, adt7310_id);
877static struct spi_driver adt7310_driver = { 877static struct spi_driver adt7310_driver = {
878 .driver = { 878 .driver = {
879 .name = "adt7310", 879 .name = "adt7310",
880 .bus = &spi_bus_type,
881 .owner = THIS_MODULE, 880 .owner = THIS_MODULE,
882 }, 881 },
883 .probe = adt7310_probe, 882 .probe = adt7310_probe,
diff --git a/drivers/staging/iio/adc/adt7410.c b/drivers/staging/iio/adc/adt7410.c
index 3481cf6f7574..c62248ceb37a 100644
--- a/drivers/staging/iio/adc/adt7410.c
+++ b/drivers/staging/iio/adc/adt7410.c
@@ -17,6 +17,7 @@
17 17
18#include "../iio.h" 18#include "../iio.h"
19#include "../sysfs.h" 19#include "../sysfs.h"
20#include "../events.h"
20 21
21/* 22/*
22 * ADT7410 registers definition 23 * ADT7410 registers definition
diff --git a/drivers/staging/iio/adc/max1363.h b/drivers/staging/iio/adc/max1363.h
index cbcb08a2cb50..2cd0112067b2 100644
--- a/drivers/staging/iio/adc/max1363.h
+++ b/drivers/staging/iio/adc/max1363.h
@@ -146,22 +146,22 @@ struct max1363_state {
146}; 146};
147 147
148const struct max1363_mode 148const struct max1363_mode
149*max1363_match_mode(unsigned long *mask, const struct max1363_chip_info *ci); 149*max1363_match_mode(const unsigned long *mask,
150 const struct max1363_chip_info *ci);
150 151
151int max1363_set_scan_mode(struct max1363_state *st); 152int max1363_set_scan_mode(struct max1363_state *st);
152 153
153#ifdef CONFIG_MAX1363_RING_BUFFER 154#ifdef CONFIG_MAX1363_RING_BUFFER
154 155int max1363_update_scan_mode(struct iio_dev *indio_dev,
155int max1363_single_channel_from_ring(const long *mask, 156 const unsigned long *scan_mask);
156 struct max1363_state *st);
157int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev); 157int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev);
158void max1363_ring_cleanup(struct iio_dev *indio_dev); 158void max1363_ring_cleanup(struct iio_dev *indio_dev);
159 159
160#else /* CONFIG_MAX1363_RING_BUFFER */ 160#else /* CONFIG_MAX1363_RING_BUFFER */
161 161int max1363_update_scan_mode(struct iio_dev *indio_dev,
162int max1363_single_channel_from_ring(long mask, struct max1363_state *st) 162 const long *scan_mask)
163{ 163{
164 return -EINVAL; 164 return 0;
165} 165}
166 166
167static inline int 167static inline int
diff --git a/drivers/staging/iio/adc/max1363_core.c b/drivers/staging/iio/adc/max1363_core.c
index 3f28f1ab52a2..b92cb4af18ce 100644
--- a/drivers/staging/iio/adc/max1363_core.c
+++ b/drivers/staging/iio/adc/max1363_core.c
@@ -34,7 +34,8 @@
34 34
35#include "../iio.h" 35#include "../iio.h"
36#include "../sysfs.h" 36#include "../sysfs.h"
37#include "../buffer_generic.h" 37#include "../events.h"
38#include "../buffer.h"
38 39
39#include "max1363.h" 40#include "max1363.h"
40 41
@@ -147,7 +148,8 @@ static const struct max1363_mode max1363_mode_table[] = {
147}; 148};
148 149
149const struct max1363_mode 150const struct max1363_mode
150*max1363_match_mode(unsigned long *mask, const struct max1363_chip_info *ci) 151*max1363_match_mode(const unsigned long *mask,
152const struct max1363_chip_info *ci)
151{ 153{
152 int i; 154 int i;
153 if (mask) 155 if (mask)
@@ -189,7 +191,6 @@ static int max1363_read_single_chan(struct iio_dev *indio_dev,
189 int ret = 0; 191 int ret = 0;
190 s32 data; 192 s32 data;
191 char rxbuf[2]; 193 char rxbuf[2];
192 const unsigned long *mask;
193 struct max1363_state *st = iio_priv(indio_dev); 194 struct max1363_state *st = iio_priv(indio_dev);
194 struct i2c_client *client = st->client; 195 struct i2c_client *client = st->client;
195 196
@@ -198,46 +199,38 @@ static int max1363_read_single_chan(struct iio_dev *indio_dev,
198 * If monitor mode is enabled, the method for reading a single 199 * If monitor mode is enabled, the method for reading a single
199 * channel will have to be rather different and has not yet 200 * channel will have to be rather different and has not yet
200 * been implemented. 201 * been implemented.
202 *
203 * Also, cannot read directly if buffered capture enabled.
201 */ 204 */
202 if (st->monitor_on) { 205 if (st->monitor_on || iio_buffer_enabled(indio_dev)) {
203 ret = -EBUSY; 206 ret = -EBUSY;
204 goto error_ret; 207 goto error_ret;
205 } 208 }
206 209
207 /* If ring buffer capture is occurring, query the buffer */ 210 /* Check to see if current scan mode is correct */
208 if (iio_buffer_enabled(indio_dev)) { 211 if (st->current_mode != &max1363_mode_table[chan->address]) {
209 mask = max1363_mode_table[chan->address].modemask; 212 /* Update scan mode if needed */
210 data = max1363_single_channel_from_ring(mask, st); 213 st->current_mode = &max1363_mode_table[chan->address];
214 ret = max1363_set_scan_mode(st);
215 if (ret < 0)
216 goto error_ret;
217 }
218 if (st->chip_info->bits != 8) {
219 /* Get reading */
220 data = i2c_master_recv(client, rxbuf, 2);
211 if (data < 0) { 221 if (data < 0) {
212 ret = data; 222 ret = data;
213 goto error_ret; 223 goto error_ret;
214 } 224 }
225 data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
215 } else { 226 } else {
216 /* Check to see if current scan mode is correct */ 227 /* Get reading */
217 if (st->current_mode != &max1363_mode_table[chan->address]) { 228 data = i2c_master_recv(client, rxbuf, 1);
218 /* Update scan mode if needed */ 229 if (data < 0) {
219 st->current_mode = &max1363_mode_table[chan->address]; 230 ret = data;
220 ret = max1363_set_scan_mode(st); 231 goto error_ret;
221 if (ret < 0)
222 goto error_ret;
223 }
224 if (st->chip_info->bits != 8) {
225 /* Get reading */
226 data = i2c_master_recv(client, rxbuf, 2);
227 if (data < 0) {
228 ret = data;
229 goto error_ret;
230 }
231 data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
232 } else {
233 /* Get reading */
234 data = i2c_master_recv(client, rxbuf, 1);
235 if (data < 0) {
236 ret = data;
237 goto error_ret;
238 }
239 data = rxbuf[0];
240 } 232 }
233 data = rxbuf[0];
241 } 234 }
242 *val = data; 235 *val = data;
243error_ret: 236error_ret:
@@ -260,7 +253,7 @@ static int max1363_read_raw(struct iio_dev *indio_dev,
260 if (ret < 0) 253 if (ret < 0)
261 return ret; 254 return ret;
262 return IIO_VAL_INT; 255 return IIO_VAL_INT;
263 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 256 case IIO_CHAN_INFO_SCALE:
264 if ((1 << (st->chip_info->bits + 1)) > 257 if ((1 << (st->chip_info->bits + 1)) >
265 st->chip_info->int_vref_mv) { 258 st->chip_info->int_vref_mv) {
266 *val = 0; 259 *val = 0;
@@ -288,7 +281,7 @@ static const enum max1363_modes max1363_mode_list[] = {
288#define MAX1363_EV_M \ 281#define MAX1363_EV_M \
289 (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) \ 282 (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) \
290 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING)) 283 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))
291#define MAX1363_INFO_MASK (1 << IIO_CHAN_INFO_SCALE_SHARED) 284#define MAX1363_INFO_MASK IIO_CHAN_INFO_SCALE_SHARED_BIT
292#define MAX1363_CHAN_U(num, addr, si, bits, evmask) \ 285#define MAX1363_CHAN_U(num, addr, si, bits, evmask) \
293 { \ 286 { \
294 .type = IIO_VOLTAGE, \ 287 .type = IIO_VOLTAGE, \
@@ -296,7 +289,13 @@ static const enum max1363_modes max1363_mode_list[] = {
296 .channel = num, \ 289 .channel = num, \
297 .address = addr, \ 290 .address = addr, \
298 .info_mask = MAX1363_INFO_MASK, \ 291 .info_mask = MAX1363_INFO_MASK, \
299 .scan_type = IIO_ST('u', bits, (bits > 8) ? 16 : 8, 0), \ 292 .datasheet_name = "AIN"#num, \
293 .scan_type = { \
294 .sign = 'u', \
295 .realbits = bits, \
296 .storagebits = (bits > 8) ? 16 : 8, \
297 .endianness = IIO_BE, \
298 }, \
300 .scan_index = si, \ 299 .scan_index = si, \
301 .event_mask = evmask, \ 300 .event_mask = evmask, \
302 } 301 }
@@ -311,7 +310,13 @@ static const enum max1363_modes max1363_mode_list[] = {
311 .channel2 = num2, \ 310 .channel2 = num2, \
312 .address = addr, \ 311 .address = addr, \
313 .info_mask = MAX1363_INFO_MASK, \ 312 .info_mask = MAX1363_INFO_MASK, \
314 .scan_type = IIO_ST('u', bits, (bits > 8) ? 16 : 8, 0), \ 313 .datasheet_name = "AIN"#num"-AIN"#num2, \
314 .scan_type = { \
315 .sign = 's', \
316 .realbits = bits, \
317 .storagebits = (bits > 8) ? 16 : 8, \
318 .endianness = IIO_BE, \
319 }, \
315 .scan_index = si, \ 320 .scan_index = si, \
316 .event_mask = evmask, \ 321 .event_mask = evmask, \
317 } 322 }
@@ -833,6 +838,7 @@ static const struct iio_info max1363_info = {
833 .read_event_config = &max1363_read_event_config, 838 .read_event_config = &max1363_read_event_config,
834 .write_event_config = &max1363_write_event_config, 839 .write_event_config = &max1363_write_event_config,
835 .read_raw = &max1363_read_raw, 840 .read_raw = &max1363_read_raw,
841 .update_scan_mode = &max1363_update_scan_mode,
836 .driver_module = THIS_MODULE, 842 .driver_module = THIS_MODULE,
837 .event_attrs = &max1363_event_attribute_group, 843 .event_attrs = &max1363_event_attribute_group,
838}; 844};
diff --git a/drivers/staging/iio/adc/max1363_ring.c b/drivers/staging/iio/adc/max1363_ring.c
index df6893e058cc..f730b3fb971a 100644
--- a/drivers/staging/iio/adc/max1363_ring.c
+++ b/drivers/staging/iio/adc/max1363_ring.c
@@ -15,88 +15,25 @@
15#include <linux/bitops.h> 15#include <linux/bitops.h>
16 16
17#include "../iio.h" 17#include "../iio.h"
18#include "../buffer_generic.h" 18#include "../buffer.h"
19#include "../ring_sw.h" 19#include "../ring_sw.h"
20#include "../trigger_consumer.h" 20#include "../trigger_consumer.h"
21 21
22#include "max1363.h" 22#include "max1363.h"
23 23
24int max1363_single_channel_from_ring(const long *mask, struct max1363_state *st) 24int max1363_update_scan_mode(struct iio_dev *indio_dev,
25{ 25 const unsigned long *scan_mask)
26 struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
27 int count = 0, ret, index;
28 u8 *ring_data;
29 index = find_first_bit(mask, MAX1363_MAX_CHANNELS);
30
31 if (!(test_bit(index, st->current_mode->modemask))) {
32 ret = -EBUSY;
33 goto error_ret;
34 }
35
36 ring_data = kmalloc(ring->access->get_bytes_per_datum(ring),
37 GFP_KERNEL);
38 if (ring_data == NULL) {
39 ret = -ENOMEM;
40 goto error_ret;
41 }
42 ret = ring->access->read_last(ring, ring_data);
43 if (ret)
44 goto error_free_ring_data;
45 /* Need a count of channels prior to this one */
46
47 count = bitmap_weight(mask, index - 1);
48 if (st->chip_info->bits != 8)
49 ret = ((int)(ring_data[count*2 + 0] & 0x0F) << 8)
50 + (int)(ring_data[count*2 + 1]);
51 else
52 ret = ring_data[count];
53
54error_free_ring_data:
55 kfree(ring_data);
56error_ret:
57 return ret;
58}
59
60
61/**
62 * max1363_ring_preenable() - setup the parameters of the ring before enabling
63 *
64 * The complex nature of the setting of the nuber of bytes per datum is due
65 * to this driver currently ensuring that the timestamp is stored at an 8
66 * byte boundary.
67 **/
68static int max1363_ring_preenable(struct iio_dev *indio_dev)
69{ 26{
70 struct max1363_state *st = iio_priv(indio_dev); 27 struct max1363_state *st = iio_priv(indio_dev);
71 struct iio_buffer *ring = indio_dev->buffer;
72 size_t d_size = 0;
73 unsigned long numvals;
74 28
75 /* 29 /*
76 * Need to figure out the current mode based upon the requested 30 * Need to figure out the current mode based upon the requested
77 * scan mask in iio_dev 31 * scan mask in iio_dev
78 */ 32 */
79 st->current_mode = max1363_match_mode(ring->scan_mask, 33 st->current_mode = max1363_match_mode(scan_mask, st->chip_info);
80 st->chip_info);
81 if (!st->current_mode) 34 if (!st->current_mode)
82 return -EINVAL; 35 return -EINVAL;
83
84 max1363_set_scan_mode(st); 36 max1363_set_scan_mode(st);
85
86 numvals = bitmap_weight(st->current_mode->modemask,
87 indio_dev->masklength);
88 if (ring->access->set_bytes_per_datum) {
89 if (ring->scan_timestamp)
90 d_size += sizeof(s64);
91 if (st->chip_info->bits != 8)
92 d_size += numvals*2;
93 else
94 d_size += numvals;
95 if (ring->scan_timestamp && (d_size % 8))
96 d_size += 8 - (d_size % 8);
97 ring->access->set_bytes_per_datum(ring, d_size);
98 }
99
100 return 0; 37 return 0;
101} 38}
102 39
@@ -114,12 +51,14 @@ static irqreturn_t max1363_trigger_handler(int irq, void *p)
114 51
115 /* Ensure the timestamp is 8 byte aligned */ 52 /* Ensure the timestamp is 8 byte aligned */
116 if (st->chip_info->bits != 8) 53 if (st->chip_info->bits != 8)
117 d_size = numvals*2 + sizeof(s64); 54 d_size = numvals*2;
118 else 55 else
119 d_size = numvals + sizeof(s64); 56 d_size = numvals;
120 if (d_size % sizeof(s64)) 57 if (indio_dev->buffer->scan_timestamp) {
121 d_size += sizeof(s64) - (d_size % sizeof(s64)); 58 d_size += sizeof(s64);
122 59 if (d_size % sizeof(s64))
60 d_size += sizeof(s64) - (d_size % sizeof(s64));
61 }
123 /* Monitor mode prevents reading. Whilst not currently implemented 62 /* Monitor mode prevents reading. Whilst not currently implemented
124 * might as well have this test in here in the meantime as it does 63 * might as well have this test in here in the meantime as it does
125 * no harm. 64 * no harm.
@@ -139,9 +78,10 @@ static irqreturn_t max1363_trigger_handler(int irq, void *p)
139 78
140 time_ns = iio_get_time_ns(); 79 time_ns = iio_get_time_ns();
141 80
142 memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns)); 81 if (indio_dev->buffer->scan_timestamp)
82 memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns));
83 iio_push_to_buffer(indio_dev->buffer, rxbuf, time_ns);
143 84
144 indio_dev->buffer->access->store_to(indio_dev->buffer, rxbuf, time_ns);
145done: 85done:
146 iio_trigger_notify_done(indio_dev->trig); 86 iio_trigger_notify_done(indio_dev->trig);
147 kfree(rxbuf); 87 kfree(rxbuf);
@@ -151,7 +91,7 @@ done:
151 91
152static const struct iio_buffer_setup_ops max1363_ring_setup_ops = { 92static const struct iio_buffer_setup_ops max1363_ring_setup_ops = {
153 .postenable = &iio_triggered_buffer_postenable, 93 .postenable = &iio_triggered_buffer_postenable,
154 .preenable = &max1363_ring_preenable, 94 .preenable = &iio_sw_buffer_preenable,
155 .predisable = &iio_triggered_buffer_predisable, 95 .predisable = &iio_triggered_buffer_predisable,
156}; 96};
157 97
@@ -179,7 +119,7 @@ int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev)
179 /* Effectively select the ring buffer implementation */ 119 /* Effectively select the ring buffer implementation */
180 indio_dev->buffer->access = &ring_sw_access_funcs; 120 indio_dev->buffer->access = &ring_sw_access_funcs;
181 /* Ring buffer functions - here trigger setup related */ 121 /* Ring buffer functions - here trigger setup related */
182 indio_dev->buffer->setup_ops = &max1363_ring_setup_ops; 122 indio_dev->setup_ops = &max1363_ring_setup_ops;
183 123
184 /* Flag that polled ring buffering is possible */ 124 /* Flag that polled ring buffering is possible */
185 indio_dev->modes |= INDIO_BUFFER_TRIGGERED; 125 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
diff --git a/drivers/staging/iio/addac/adt7316-spi.c b/drivers/staging/iio/addac/adt7316-spi.c
index 1e93c7b7aed9..1ea3cd06299d 100644
--- a/drivers/staging/iio/addac/adt7316-spi.c
+++ b/drivers/staging/iio/addac/adt7316-spi.c
@@ -151,7 +151,6 @@ static int adt7316_spi_resume(struct spi_device *spi_dev)
151static struct spi_driver adt7316_driver = { 151static struct spi_driver adt7316_driver = {
152 .driver = { 152 .driver = {
153 .name = "adt7316", 153 .name = "adt7316",
154 .bus = &spi_bus_type,
155 .owner = THIS_MODULE, 154 .owner = THIS_MODULE,
156 }, 155 },
157 .probe = adt7316_spi_probe, 156 .probe = adt7316_spi_probe,
diff --git a/drivers/staging/iio/addac/adt7316.c b/drivers/staging/iio/addac/adt7316.c
index 8df24704ff26..13c39292d3f2 100644
--- a/drivers/staging/iio/addac/adt7316.c
+++ b/drivers/staging/iio/addac/adt7316.c
@@ -20,6 +20,7 @@
20#include <linux/module.h> 20#include <linux/module.h>
21 21
22#include "../iio.h" 22#include "../iio.h"
23#include "../events.h"
23#include "../sysfs.h" 24#include "../sysfs.h"
24#include "adt7316.h" 25#include "adt7316.h"
25 26
diff --git a/drivers/staging/iio/buffer_generic.h b/drivers/staging/iio/buffer.h
index 9e8f01009979..6fb6e64181a5 100644
--- a/drivers/staging/iio/buffer_generic.h
+++ b/drivers/staging/iio/buffer.h
@@ -11,7 +11,6 @@
11#define _IIO_BUFFER_GENERIC_H_ 11#define _IIO_BUFFER_GENERIC_H_
12#include <linux/sysfs.h> 12#include <linux/sysfs.h>
13#include "iio.h" 13#include "iio.h"
14#include "chrdev.h"
15 14
16#ifdef CONFIG_IIO_BUFFER 15#ifdef CONFIG_IIO_BUFFER
17 16
@@ -19,22 +18,14 @@ struct iio_buffer;
19 18
20/** 19/**
21 * struct iio_buffer_access_funcs - access functions for buffers. 20 * struct iio_buffer_access_funcs - access functions for buffers.
22 * @mark_in_use: reference counting, typically to prevent module removal
23 * @unmark_in_use: reduce reference count when no longer using buffer
24 * @store_to: actually store stuff to the buffer 21 * @store_to: actually store stuff to the buffer
25 * @read_last: get the last element stored 22 * @read_first_n: try to get a specified number of bytes (must exist)
26 * @read_first_n: try to get a specified number of elements (must exist)
27 * @mark_param_change: notify buffer that some relevant parameter has changed
28 * Often this means the underlying storage may need to
29 * change.
30 * @request_update: if a parameter change has been marked, update underlying 23 * @request_update: if a parameter change has been marked, update underlying
31 * storage. 24 * storage.
32 * @get_bytes_per_datum:get current bytes per datum 25 * @get_bytes_per_datum:get current bytes per datum
33 * @set_bytes_per_datum:set number of bytes per datum 26 * @set_bytes_per_datum:set number of bytes per datum
34 * @get_length: get number of datums in buffer 27 * @get_length: get number of datums in buffer
35 * @set_length: set number of datums in buffer 28 * @set_length: set number of datums in buffer
36 * @is_enabled: query if buffer is currently being used
37 * @enable: enable the buffer
38 * 29 *
39 * The purpose of this structure is to make the buffer element 30 * The purpose of this structure is to make the buffer element
40 * modular as event for a given driver, different usecases may require 31 * modular as event for a given driver, different usecases may require
@@ -45,85 +36,60 @@ struct iio_buffer;
45 * any of them not existing. 36 * any of them not existing.
46 **/ 37 **/
47struct iio_buffer_access_funcs { 38struct iio_buffer_access_funcs {
48 void (*mark_in_use)(struct iio_buffer *buffer);
49 void (*unmark_in_use)(struct iio_buffer *buffer);
50
51 int (*store_to)(struct iio_buffer *buffer, u8 *data, s64 timestamp); 39 int (*store_to)(struct iio_buffer *buffer, u8 *data, s64 timestamp);
52 int (*read_last)(struct iio_buffer *buffer, u8 *data);
53 int (*read_first_n)(struct iio_buffer *buffer, 40 int (*read_first_n)(struct iio_buffer *buffer,
54 size_t n, 41 size_t n,
55 char __user *buf); 42 char __user *buf);
56 43
57 int (*mark_param_change)(struct iio_buffer *buffer);
58 int (*request_update)(struct iio_buffer *buffer); 44 int (*request_update)(struct iio_buffer *buffer);
59 45
60 int (*get_bytes_per_datum)(struct iio_buffer *buffer); 46 int (*get_bytes_per_datum)(struct iio_buffer *buffer);
61 int (*set_bytes_per_datum)(struct iio_buffer *buffer, size_t bpd); 47 int (*set_bytes_per_datum)(struct iio_buffer *buffer, size_t bpd);
62 int (*get_length)(struct iio_buffer *buffer); 48 int (*get_length)(struct iio_buffer *buffer);
63 int (*set_length)(struct iio_buffer *buffer, int length); 49 int (*set_length)(struct iio_buffer *buffer, int length);
64
65 int (*is_enabled)(struct iio_buffer *buffer);
66 int (*enable)(struct iio_buffer *buffer);
67};
68
69/**
70 * struct iio_buffer_setup_ops - buffer setup related callbacks
71 * @preenable: [DRIVER] function to run prior to marking buffer enabled
72 * @postenable: [DRIVER] function to run after marking buffer enabled
73 * @predisable: [DRIVER] function to run prior to marking buffer
74 * disabled
75 * @postdisable: [DRIVER] function to run after marking buffer disabled
76 */
77struct iio_buffer_setup_ops {
78 int (*preenable)(struct iio_dev *);
79 int (*postenable)(struct iio_dev *);
80 int (*predisable)(struct iio_dev *);
81 int (*postdisable)(struct iio_dev *);
82}; 50};
83 51
84/** 52/**
85 * struct iio_buffer - general buffer structure 53 * struct iio_buffer - general buffer structure
86 * @indio_dev: industrial I/O device structure
87 * @owner: module that owns the buffer (for ref counting)
88 * @length: [DEVICE] number of datums in buffer 54 * @length: [DEVICE] number of datums in buffer
89 * @bytes_per_datum: [DEVICE] size of individual datum including timestamp 55 * @bytes_per_datum: [DEVICE] size of individual datum including timestamp
90 * @bpe: [DEVICE] size of individual channel value
91 * @scan_el_attrs: [DRIVER] control of scan elements if that scan mode 56 * @scan_el_attrs: [DRIVER] control of scan elements if that scan mode
92 * control method is used 57 * control method is used
93 * @scan_count: [INTERN] the number of elements in the current scan mode
94 * @scan_mask: [INTERN] bitmask used in masking scan mode elements 58 * @scan_mask: [INTERN] bitmask used in masking scan mode elements
59 * @scan_index_timestamp:[INTERN] cache of the index to the timestamp
95 * @scan_timestamp: [INTERN] does the scan mode include a timestamp 60 * @scan_timestamp: [INTERN] does the scan mode include a timestamp
96 * @access: [DRIVER] buffer access functions associated with the 61 * @access: [DRIVER] buffer access functions associated with the
97 * implementation. 62 * implementation.
98 * @flags: [INTERN] file ops related flags including busy flag. 63 * @scan_el_dev_attr_list:[INTERN] list of scan element related attributes.
64 * @scan_el_group: [DRIVER] attribute group for those attributes not
65 * created from the iio_chan_info array.
66 * @pollq: [INTERN] wait queue to allow for polling on the buffer.
67 * @stufftoread: [INTERN] flag to indicate new data.
68 * @demux_list: [INTERN] list of operations required to demux the scan.
69 * @demux_bounce: [INTERN] buffer for doing gather from incoming scan.
99 **/ 70 **/
100struct iio_buffer { 71struct iio_buffer {
101 struct iio_dev *indio_dev;
102 struct module *owner;
103 int length; 72 int length;
104 int bytes_per_datum; 73 int bytes_per_datum;
105 int bpe;
106 struct attribute_group *scan_el_attrs; 74 struct attribute_group *scan_el_attrs;
107 int scan_count;
108 long *scan_mask; 75 long *scan_mask;
109 bool scan_timestamp; 76 bool scan_timestamp;
77 unsigned scan_index_timestamp;
110 const struct iio_buffer_access_funcs *access; 78 const struct iio_buffer_access_funcs *access;
111 const struct iio_buffer_setup_ops *setup_ops;
112 struct list_head scan_el_dev_attr_list; 79 struct list_head scan_el_dev_attr_list;
113 struct attribute_group scan_el_group; 80 struct attribute_group scan_el_group;
114 wait_queue_head_t pollq; 81 wait_queue_head_t pollq;
115 bool stufftoread; 82 bool stufftoread;
116 unsigned long flags;
117 const struct attribute_group *attrs; 83 const struct attribute_group *attrs;
84 struct list_head demux_list;
85 unsigned char *demux_bounce;
118}; 86};
119 87
120/** 88/**
121 * iio_buffer_init() - Initialize the buffer structure 89 * iio_buffer_init() - Initialize the buffer structure
122 * @buffer: buffer to be initialized 90 * @buffer: buffer to be initialized
123 * @indio_dev: the iio device the buffer is assocated with
124 **/ 91 **/
125void iio_buffer_init(struct iio_buffer *buffer, 92void iio_buffer_init(struct iio_buffer *buffer);
126 struct iio_dev *indio_dev);
127 93
128void iio_buffer_deinit(struct iio_buffer *buffer); 94void iio_buffer_deinit(struct iio_buffer *buffer);
129 95
@@ -140,17 +106,27 @@ static inline void __iio_update_buffer(struct iio_buffer *buffer,
140 buffer->length = length; 106 buffer->length = length;
141} 107}
142 108
143int iio_scan_mask_query(struct iio_buffer *buffer, int bit); 109int iio_scan_mask_query(struct iio_dev *indio_dev,
110 struct iio_buffer *buffer, int bit);
144 111
145/** 112/**
146 * iio_scan_mask_set() - set particular bit in the scan mask 113 * iio_scan_mask_set() - set particular bit in the scan mask
147 * @buffer: the buffer whose scan mask we are interested in 114 * @buffer: the buffer whose scan mask we are interested in
148 * @bit: the bit to be set. 115 * @bit: the bit to be set.
149 **/ 116 **/
150int iio_scan_mask_set(struct iio_buffer *buffer, int bit); 117int iio_scan_mask_set(struct iio_dev *indio_dev,
118 struct iio_buffer *buffer, int bit);
151 119
152#define to_iio_buffer(d) \ 120/**
153 container_of(d, struct iio_buffer, dev) 121 * iio_push_to_buffer() - push to a registered buffer.
122 * @buffer: IIO buffer structure for device
123 * @scan: Full scan.
124 * @timestamp:
125 */
126int iio_push_to_buffer(struct iio_buffer *buffer, unsigned char *data,
127 s64 timestamp);
128
129int iio_update_demux(struct iio_dev *indio_dev);
154 130
155/** 131/**
156 * iio_buffer_register() - register the buffer with IIO core 132 * iio_buffer_register() - register the buffer with IIO core
@@ -180,12 +156,6 @@ ssize_t iio_buffer_write_length(struct device *dev,
180 const char *buf, 156 const char *buf,
181 size_t len); 157 size_t len);
182/** 158/**
183 * iio_buffer_read_bytes_per_datum() - attr for number of bytes in whole datum
184 **/
185ssize_t iio_buffer_read_bytes_per_datum(struct device *dev,
186 struct device_attribute *attr,
187 char *buf);
188/**
189 * iio_buffer_store_enable() - attr to turn the buffer on 159 * iio_buffer_store_enable() - attr to turn the buffer on
190 **/ 160 **/
191ssize_t iio_buffer_store_enable(struct device *dev, 161ssize_t iio_buffer_store_enable(struct device *dev,
@@ -201,9 +171,6 @@ ssize_t iio_buffer_show_enable(struct device *dev,
201#define IIO_BUFFER_LENGTH_ATTR DEVICE_ATTR(length, S_IRUGO | S_IWUSR, \ 171#define IIO_BUFFER_LENGTH_ATTR DEVICE_ATTR(length, S_IRUGO | S_IWUSR, \
202 iio_buffer_read_length, \ 172 iio_buffer_read_length, \
203 iio_buffer_write_length) 173 iio_buffer_write_length)
204#define IIO_BUFFER_BYTES_PER_DATUM_ATTR \
205 DEVICE_ATTR(bytes_per_datum, S_IRUGO | S_IWUSR, \
206 iio_buffer_read_bytes_per_datum, NULL)
207 174
208#define IIO_BUFFER_ENABLE_ATTR DEVICE_ATTR(enable, S_IRUGO | S_IWUSR, \ 175#define IIO_BUFFER_ENABLE_ATTR DEVICE_ATTR(enable, S_IRUGO | S_IWUSR, \
209 iio_buffer_show_enable, \ 176 iio_buffer_show_enable, \
diff --git a/drivers/staging/iio/cdc/ad7150.c b/drivers/staging/iio/cdc/ad7150.c
index 47181875e113..b73007dcf4b3 100644
--- a/drivers/staging/iio/cdc/ad7150.c
+++ b/drivers/staging/iio/cdc/ad7150.c
@@ -15,7 +15,7 @@
15 15
16#include "../iio.h" 16#include "../iio.h"
17#include "../sysfs.h" 17#include "../sysfs.h"
18 18#include "../events.h"
19/* 19/*
20 * AD7150 registers definition 20 * AD7150 registers definition
21 */ 21 */
@@ -111,7 +111,7 @@ static int ad7150_read_raw(struct iio_dev *indio_dev,
111 return ret; 111 return ret;
112 *val = swab16(ret); 112 *val = swab16(ret);
113 return IIO_VAL_INT; 113 return IIO_VAL_INT;
114 case (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE): 114 case IIO_CHAN_INFO_AVERAGE_RAW:
115 ret = i2c_smbus_read_word_data(chip->client, 115 ret = i2c_smbus_read_word_data(chip->client,
116 ad7150_addresses[chan->channel][1]); 116 ad7150_addresses[chan->channel][1]);
117 if (ret < 0) 117 if (ret < 0)
@@ -429,7 +429,7 @@ static const struct iio_chan_spec ad7150_channels[] = {
429 .type = IIO_CAPACITANCE, 429 .type = IIO_CAPACITANCE,
430 .indexed = 1, 430 .indexed = 1,
431 .channel = 0, 431 .channel = 0,
432 .info_mask = (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE), 432 .info_mask = IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT,
433 .event_mask = 433 .event_mask =
434 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | 434 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
435 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) | 435 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) |
@@ -441,7 +441,7 @@ static const struct iio_chan_spec ad7150_channels[] = {
441 .type = IIO_CAPACITANCE, 441 .type = IIO_CAPACITANCE,
442 .indexed = 1, 442 .indexed = 1,
443 .channel = 1, 443 .channel = 1,
444 .info_mask = (1 << IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE), 444 .info_mask = IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT,
445 .event_mask = 445 .event_mask =
446 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) | 446 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
447 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) | 447 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING) |
diff --git a/drivers/staging/iio/cdc/ad7152.c b/drivers/staging/iio/cdc/ad7152.c
index 152d3be6d97d..fdb83c35e6dd 100644
--- a/drivers/staging/iio/cdc/ad7152.c
+++ b/drivers/staging/iio/cdc/ad7152.c
@@ -259,7 +259,7 @@ static int ad7152_write_raw(struct iio_dev *indio_dev,
259 mutex_lock(&indio_dev->mlock); 259 mutex_lock(&indio_dev->mlock);
260 260
261 switch (mask) { 261 switch (mask) {
262 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 262 case IIO_CHAN_INFO_CALIBSCALE:
263 if (val != 1) { 263 if (val != 1) {
264 ret = -EINVAL; 264 ret = -EINVAL;
265 goto out; 265 goto out;
@@ -276,7 +276,7 @@ static int ad7152_write_raw(struct iio_dev *indio_dev,
276 ret = 0; 276 ret = 0;
277 break; 277 break;
278 278
279 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 279 case IIO_CHAN_INFO_CALIBBIAS:
280 if ((val < 0) | (val > 0xFFFF)) { 280 if ((val < 0) | (val > 0xFFFF)) {
281 ret = -EINVAL; 281 ret = -EINVAL;
282 goto out; 282 goto out;
@@ -289,7 +289,7 @@ static int ad7152_write_raw(struct iio_dev *indio_dev,
289 289
290 ret = 0; 290 ret = 0;
291 break; 291 break;
292 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 292 case IIO_CHAN_INFO_SCALE:
293 if (val != 0) { 293 if (val != 0) {
294 ret = -EINVAL; 294 ret = -EINVAL;
295 goto out; 295 goto out;
@@ -372,7 +372,7 @@ static int ad7152_read_raw(struct iio_dev *indio_dev,
372 372
373 ret = IIO_VAL_INT; 373 ret = IIO_VAL_INT;
374 break; 374 break;
375 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 375 case IIO_CHAN_INFO_CALIBSCALE:
376 376
377 ret = i2c_smbus_read_word_data(chip->client, 377 ret = i2c_smbus_read_word_data(chip->client,
378 ad7152_addresses[chan->channel][AD7152_GAIN]); 378 ad7152_addresses[chan->channel][AD7152_GAIN]);
@@ -384,7 +384,7 @@ static int ad7152_read_raw(struct iio_dev *indio_dev,
384 384
385 ret = IIO_VAL_INT_PLUS_MICRO; 385 ret = IIO_VAL_INT_PLUS_MICRO;
386 break; 386 break;
387 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 387 case IIO_CHAN_INFO_CALIBBIAS:
388 ret = i2c_smbus_read_word_data(chip->client, 388 ret = i2c_smbus_read_word_data(chip->client,
389 ad7152_addresses[chan->channel][AD7152_OFFS]); 389 ad7152_addresses[chan->channel][AD7152_OFFS]);
390 if (ret < 0) 390 if (ret < 0)
@@ -393,7 +393,7 @@ static int ad7152_read_raw(struct iio_dev *indio_dev,
393 393
394 ret = IIO_VAL_INT; 394 ret = IIO_VAL_INT;
395 break; 395 break;
396 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 396 case IIO_CHAN_INFO_SCALE:
397 ret = i2c_smbus_read_byte_data(chip->client, 397 ret = i2c_smbus_read_byte_data(chip->client,
398 ad7152_addresses[chan->channel][AD7152_SETUP]); 398 ad7152_addresses[chan->channel][AD7152_SETUP]);
399 if (ret < 0) 399 if (ret < 0)
@@ -416,7 +416,7 @@ static int ad7152_write_raw_get_fmt(struct iio_dev *indio_dev,
416 long mask) 416 long mask)
417{ 417{
418 switch (mask) { 418 switch (mask) {
419 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 419 case IIO_CHAN_INFO_SCALE:
420 return IIO_VAL_INT_PLUS_NANO; 420 return IIO_VAL_INT_PLUS_NANO;
421 default: 421 default:
422 return IIO_VAL_INT_PLUS_MICRO; 422 return IIO_VAL_INT_PLUS_MICRO;
@@ -436,34 +436,34 @@ static const struct iio_chan_spec ad7152_channels[] = {
436 .type = IIO_CAPACITANCE, 436 .type = IIO_CAPACITANCE,
437 .indexed = 1, 437 .indexed = 1,
438 .channel = 0, 438 .channel = 0,
439 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 439 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
440 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 440 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
441 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 441 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
442 }, { 442 }, {
443 .type = IIO_CAPACITANCE, 443 .type = IIO_CAPACITANCE,
444 .differential = 1, 444 .differential = 1,
445 .indexed = 1, 445 .indexed = 1,
446 .channel = 0, 446 .channel = 0,
447 .channel2 = 2, 447 .channel2 = 2,
448 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 448 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
449 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 449 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
450 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 450 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
451 }, { 451 }, {
452 .type = IIO_CAPACITANCE, 452 .type = IIO_CAPACITANCE,
453 .indexed = 1, 453 .indexed = 1,
454 .channel = 1, 454 .channel = 1,
455 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 455 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
456 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 456 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
457 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 457 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
458 }, { 458 }, {
459 .type = IIO_CAPACITANCE, 459 .type = IIO_CAPACITANCE,
460 .differential = 1, 460 .differential = 1,
461 .indexed = 1, 461 .indexed = 1,
462 .channel = 1, 462 .channel = 1,
463 .channel2 = 3, 463 .channel2 = 3,
464 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 464 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
465 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 465 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
466 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 466 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
467 } 467 }
468}; 468};
469/* 469/*
diff --git a/drivers/staging/iio/cdc/ad7746.c b/drivers/staging/iio/cdc/ad7746.c
index 9df590891a69..40b8512cbc32 100644
--- a/drivers/staging/iio/cdc/ad7746.c
+++ b/drivers/staging/iio/cdc/ad7746.c
@@ -123,7 +123,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
123 .type = IIO_VOLTAGE, 123 .type = IIO_VOLTAGE,
124 .indexed = 1, 124 .indexed = 1,
125 .channel = 0, 125 .channel = 0,
126 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 126 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
127 .address = AD7746_REG_VT_DATA_HIGH << 8 | 127 .address = AD7746_REG_VT_DATA_HIGH << 8 |
128 AD7746_VTSETUP_VTMD_EXT_VIN, 128 AD7746_VTSETUP_VTMD_EXT_VIN,
129 }, 129 },
@@ -132,7 +132,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
132 .indexed = 1, 132 .indexed = 1,
133 .channel = 1, 133 .channel = 1,
134 .extend_name = "supply", 134 .extend_name = "supply",
135 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 135 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
136 .address = AD7746_REG_VT_DATA_HIGH << 8 | 136 .address = AD7746_REG_VT_DATA_HIGH << 8 |
137 AD7746_VTSETUP_VTMD_VDD_MON, 137 AD7746_VTSETUP_VTMD_VDD_MON,
138 }, 138 },
@@ -156,10 +156,10 @@ static const struct iio_chan_spec ad7746_channels[] = {
156 .type = IIO_CAPACITANCE, 156 .type = IIO_CAPACITANCE,
157 .indexed = 1, 157 .indexed = 1,
158 .channel = 0, 158 .channel = 0,
159 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 159 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
160 (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) | 160 IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT |
161 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 161 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
162 (1 << IIO_CHAN_INFO_SCALE_SHARED), 162 IIO_CHAN_INFO_SCALE_SHARED_BIT,
163 .address = AD7746_REG_CAP_DATA_HIGH << 8, 163 .address = AD7746_REG_CAP_DATA_HIGH << 8,
164 }, 164 },
165 [CIN1_DIFF] = { 165 [CIN1_DIFF] = {
@@ -168,10 +168,10 @@ static const struct iio_chan_spec ad7746_channels[] = {
168 .indexed = 1, 168 .indexed = 1,
169 .channel = 0, 169 .channel = 0,
170 .channel2 = 2, 170 .channel2 = 2,
171 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 171 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
172 (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) | 172 IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT |
173 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 173 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
174 (1 << IIO_CHAN_INFO_SCALE_SHARED), 174 IIO_CHAN_INFO_SCALE_SHARED_BIT,
175 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 175 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
176 AD7746_CAPSETUP_CAPDIFF 176 AD7746_CAPSETUP_CAPDIFF
177 }, 177 },
@@ -179,10 +179,10 @@ static const struct iio_chan_spec ad7746_channels[] = {
179 .type = IIO_CAPACITANCE, 179 .type = IIO_CAPACITANCE,
180 .indexed = 1, 180 .indexed = 1,
181 .channel = 1, 181 .channel = 1,
182 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 182 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
183 (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) | 183 IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT |
184 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 184 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
185 (1 << IIO_CHAN_INFO_SCALE_SHARED), 185 IIO_CHAN_INFO_SCALE_SHARED_BIT,
186 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 186 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
187 AD7746_CAPSETUP_CIN2, 187 AD7746_CAPSETUP_CIN2,
188 }, 188 },
@@ -192,10 +192,10 @@ static const struct iio_chan_spec ad7746_channels[] = {
192 .indexed = 1, 192 .indexed = 1,
193 .channel = 1, 193 .channel = 1,
194 .channel2 = 3, 194 .channel2 = 3,
195 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | 195 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
196 (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED) | 196 IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT |
197 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 197 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
198 (1 << IIO_CHAN_INFO_SCALE_SHARED), 198 IIO_CHAN_INFO_SCALE_SHARED_BIT,
199 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 199 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
200 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2, 200 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
201 } 201 }
@@ -477,7 +477,7 @@ static int ad7746_write_raw(struct iio_dev *indio_dev,
477 mutex_lock(&indio_dev->mlock); 477 mutex_lock(&indio_dev->mlock);
478 478
479 switch (mask) { 479 switch (mask) {
480 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 480 case IIO_CHAN_INFO_CALIBSCALE:
481 if (val != 1) { 481 if (val != 1) {
482 ret = -EINVAL; 482 ret = -EINVAL;
483 goto out; 483 goto out;
@@ -503,7 +503,7 @@ static int ad7746_write_raw(struct iio_dev *indio_dev,
503 503
504 ret = 0; 504 ret = 0;
505 break; 505 break;
506 case (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED): 506 case IIO_CHAN_INFO_CALIBBIAS:
507 if ((val < 0) | (val > 0xFFFF)) { 507 if ((val < 0) | (val > 0xFFFF)) {
508 ret = -EINVAL; 508 ret = -EINVAL;
509 goto out; 509 goto out;
@@ -515,7 +515,7 @@ static int ad7746_write_raw(struct iio_dev *indio_dev,
515 515
516 ret = 0; 516 ret = 0;
517 break; 517 break;
518 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 518 case IIO_CHAN_INFO_OFFSET:
519 if ((val < 0) | (val > 43008000)) { /* 21pF */ 519 if ((val < 0) | (val > 43008000)) { /* 21pF */
520 ret = -EINVAL; 520 ret = -EINVAL;
521 goto out; 521 goto out;
@@ -612,7 +612,7 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
612 612
613 ret = IIO_VAL_INT; 613 ret = IIO_VAL_INT;
614 break; 614 break;
615 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 615 case IIO_CHAN_INFO_CALIBSCALE:
616 switch (chan->type) { 616 switch (chan->type) {
617 case IIO_CAPACITANCE: 617 case IIO_CAPACITANCE:
618 reg = AD7746_REG_CAP_GAINH; 618 reg = AD7746_REG_CAP_GAINH;
@@ -634,7 +634,7 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
634 634
635 ret = IIO_VAL_INT_PLUS_MICRO; 635 ret = IIO_VAL_INT_PLUS_MICRO;
636 break; 636 break;
637 case (1 << IIO_CHAN_INFO_CALIBBIAS_SHARED): 637 case IIO_CHAN_INFO_CALIBBIAS:
638 ret = i2c_smbus_read_word_data(chip->client, 638 ret = i2c_smbus_read_word_data(chip->client,
639 AD7746_REG_CAP_OFFH); 639 AD7746_REG_CAP_OFFH);
640 if (ret < 0) 640 if (ret < 0)
@@ -643,13 +643,13 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
643 643
644 ret = IIO_VAL_INT; 644 ret = IIO_VAL_INT;
645 break; 645 break;
646 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 646 case IIO_CHAN_INFO_OFFSET:
647 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel] 647 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
648 [chan->differential]) * 338646; 648 [chan->differential]) * 338646;
649 649
650 ret = IIO_VAL_INT; 650 ret = IIO_VAL_INT;
651 break; 651 break;
652 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 652 case IIO_CHAN_INFO_SCALE:
653 switch (chan->type) { 653 switch (chan->type) {
654 case IIO_CAPACITANCE: 654 case IIO_CAPACITANCE:
655 /* 8.192pf / 2^24 */ 655 /* 8.192pf / 2^24 */
diff --git a/drivers/staging/iio/chrdev.h b/drivers/staging/iio/chrdev.h
deleted file mode 100644
index d8e736f60522..000000000000
--- a/drivers/staging/iio/chrdev.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/* The industrial I/O core - character device related
2 *
3 * Copyright (c) 2008 Jonathan Cameron
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 */
9
10#ifndef _IIO_CHRDEV_H_
11#define _IIO_CHRDEV_H_
12
13/**
14 * struct iio_event_data - The actual event being pushed to userspace
15 * @id: event identifier
16 * @timestamp: best estimate of time of event occurrence (often from
17 * the interrupt handler)
18 */
19struct iio_event_data {
20 u64 id;
21 s64 timestamp;
22};
23
24#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
25#endif
diff --git a/drivers/staging/iio/dac/Kconfig b/drivers/staging/iio/dac/Kconfig
index fac8549dc8e7..13e27979df24 100644
--- a/drivers/staging/iio/dac/Kconfig
+++ b/drivers/staging/iio/dac/Kconfig
@@ -24,6 +24,29 @@ config AD5360
24 To compile this driver as module choose M here: the module will be called 24 To compile this driver as module choose M here: the module will be called
25 ad5360. 25 ad5360.
26 26
27config AD5380
28 tristate "Analog Devices AD5380/81/82/83/84/90/91/92 DAC driver"
29 depends on (SPI_MASTER || I2C)
30 select REGMAP_I2C if I2C
31 select REGMAP_SPI if SPI_MASTER
32 help
33 Say yes here to build support for Analog Devices AD5380, AD5381,
34 AD5382, AD5383, AD5384, AD5390, AD5391, AD5392 multi-channel
35 Digital to Analog Converters (DAC).
36
37 To compile this driver as module choose M here: the module will be called
38 ad5380.
39
40config AD5421
41 tristate "Analog Devices AD5421 DAC driver"
42 depends on SPI
43 help
44 Say yes here to build support for Analog Devices AD5421 loop-powered
45 digital-to-analog convertors (DAC).
46
47 To compile this driver as module choose M here: the module will be called
48 ad5421.
49
27config AD5624R_SPI 50config AD5624R_SPI
28 tristate "Analog Devices AD5624/44/64R DAC spi driver" 51 tristate "Analog Devices AD5624/44/64R DAC spi driver"
29 depends on SPI 52 depends on SPI
@@ -37,7 +60,7 @@ config AD5446
37 help 60 help
38 Say yes here to build support for Analog Devices AD5444, AD5446, 61 Say yes here to build support for Analog Devices AD5444, AD5446,
39 AD5512A, AD5542A, AD5543, AD5553, AD5601, AD5611, AD5620, AD5621, 62 AD5512A, AD5542A, AD5543, AD5553, AD5601, AD5611, AD5620, AD5621,
40 AD5640, AD5660 DACs. 63 AD5640, AD5660, AD5662 DACs.
41 64
42 To compile this driver as a module, choose M here: the 65 To compile this driver as a module, choose M here: the
43 module will be called ad5446. 66 module will be called ad5446.
@@ -52,12 +75,22 @@ config AD5504
52 To compile this driver as a module, choose M here: the 75 To compile this driver as a module, choose M here: the
53 module will be called ad5504. 76 module will be called ad5504.
54 77
78config AD5764
79 tristate "Analog Devices AD5764/64R/44/44R DAC driver"
80 depends on SPI_MASTER
81 help
82 Say yes here to build support for Analog Devices AD5764, AD5764R, AD5744,
83 AD5744R Digital to Analog Converter.
84
85 To compile this driver as a module, choose M here: the
86 module will be called ad5764.
87
55config AD5791 88config AD5791
56 tristate "Analog Devices AD5760/AD5780/AD5781/AD5791 DAC SPI driver" 89 tristate "Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC SPI driver"
57 depends on SPI 90 depends on SPI
58 help 91 help
59 Say yes here to build support for Analog Devices AD5760, AD5780, 92 Say yes here to build support for Analog Devices AD5760, AD5780,
60 AD5781, AD5791 High Resolution Voltage Output Digital to 93 AD5781, AD5790, AD5791 High Resolution Voltage Output Digital to
61 Analog Converter. 94 Analog Converter.
62 95
63 To compile this driver as a module, choose M here: the 96 To compile this driver as a module, choose M here: the
diff --git a/drivers/staging/iio/dac/Makefile b/drivers/staging/iio/dac/Makefile
index 07b6f5ebdb52..8ab1d264aab7 100644
--- a/drivers/staging/iio/dac/Makefile
+++ b/drivers/staging/iio/dac/Makefile
@@ -3,10 +3,13 @@
3# 3#
4 4
5obj-$(CONFIG_AD5360) += ad5360.o 5obj-$(CONFIG_AD5360) += ad5360.o
6obj-$(CONFIG_AD5380) += ad5380.o
7obj-$(CONFIG_AD5421) += ad5421.o
6obj-$(CONFIG_AD5624R_SPI) += ad5624r_spi.o 8obj-$(CONFIG_AD5624R_SPI) += ad5624r_spi.o
7obj-$(CONFIG_AD5064) += ad5064.o 9obj-$(CONFIG_AD5064) += ad5064.o
8obj-$(CONFIG_AD5504) += ad5504.o 10obj-$(CONFIG_AD5504) += ad5504.o
9obj-$(CONFIG_AD5446) += ad5446.o 11obj-$(CONFIG_AD5446) += ad5446.o
12obj-$(CONFIG_AD5764) += ad5764.o
10obj-$(CONFIG_AD5791) += ad5791.o 13obj-$(CONFIG_AD5791) += ad5791.o
11obj-$(CONFIG_AD5686) += ad5686.o 14obj-$(CONFIG_AD5686) += ad5686.o
12obj-$(CONFIG_MAX517) += max517.o 15obj-$(CONFIG_MAX517) += max517.o
diff --git a/drivers/staging/iio/dac/ad5064.c b/drivers/staging/iio/dac/ad5064.c
index 39cfe6cb02a2..049a855039c2 100644
--- a/drivers/staging/iio/dac/ad5064.c
+++ b/drivers/staging/iio/dac/ad5064.c
@@ -91,7 +91,7 @@ enum ad5064_type {
91 .indexed = 1, \ 91 .indexed = 1, \
92 .output = 1, \ 92 .output = 1, \
93 .channel = (chan), \ 93 .channel = (chan), \
94 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 94 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
95 .address = AD5064_ADDR_DAC(chan), \ 95 .address = AD5064_ADDR_DAC(chan), \
96 .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)) \ 96 .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)) \
97} 97}
@@ -280,14 +280,14 @@ static int ad5064_read_raw(struct iio_dev *indio_dev,
280 long m) 280 long m)
281{ 281{
282 struct ad5064_state *st = iio_priv(indio_dev); 282 struct ad5064_state *st = iio_priv(indio_dev);
283 unsigned long scale_uv;
284 unsigned int vref; 283 unsigned int vref;
284 int scale_uv;
285 285
286 switch (m) { 286 switch (m) {
287 case 0: 287 case 0:
288 *val = st->dac_cache[chan->channel]; 288 *val = st->dac_cache[chan->channel];
289 return IIO_VAL_INT; 289 return IIO_VAL_INT;
290 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 290 case IIO_CHAN_INFO_SCALE:
291 vref = st->chip_info->shared_vref ? 0 : chan->channel; 291 vref = st->chip_info->shared_vref ? 0 : chan->channel;
292 scale_uv = regulator_get_voltage(st->vref_reg[vref].consumer); 292 scale_uv = regulator_get_voltage(st->vref_reg[vref].consumer);
293 if (scale_uv < 0) 293 if (scale_uv < 0)
diff --git a/drivers/staging/iio/dac/ad5360.c b/drivers/staging/iio/dac/ad5360.c
index bc0459e32d04..710b256affcc 100644
--- a/drivers/staging/iio/dac/ad5360.c
+++ b/drivers/staging/iio/dac/ad5360.c
@@ -103,10 +103,10 @@ enum ad5360_type {
103 .type = IIO_VOLTAGE, \ 103 .type = IIO_VOLTAGE, \
104 .indexed = 1, \ 104 .indexed = 1, \
105 .output = 1, \ 105 .output = 1, \
106 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE) | \ 106 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
107 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | \ 107 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \
108 (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | \ 108 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
109 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), \ 109 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
110 .scan_type = IIO_ST('u', (bits), 16, 16 - (bits)) \ 110 .scan_type = IIO_ST('u', (bits), 16, 16 - (bits)) \
111} 111}
112 112
@@ -326,21 +326,21 @@ static int ad5360_write_raw(struct iio_dev *indio_dev,
326 return ad5360_write(indio_dev, AD5360_CMD_WRITE_DATA, 326 return ad5360_write(indio_dev, AD5360_CMD_WRITE_DATA,
327 chan->address, val, chan->scan_type.shift); 327 chan->address, val, chan->scan_type.shift);
328 328
329 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 329 case IIO_CHAN_INFO_CALIBBIAS:
330 if (val >= max_val || val < 0) 330 if (val >= max_val || val < 0)
331 return -EINVAL; 331 return -EINVAL;
332 332
333 return ad5360_write(indio_dev, AD5360_CMD_WRITE_OFFSET, 333 return ad5360_write(indio_dev, AD5360_CMD_WRITE_OFFSET,
334 chan->address, val, chan->scan_type.shift); 334 chan->address, val, chan->scan_type.shift);
335 335
336 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 336 case IIO_CHAN_INFO_CALIBSCALE:
337 if (val >= max_val || val < 0) 337 if (val >= max_val || val < 0)
338 return -EINVAL; 338 return -EINVAL;
339 339
340 return ad5360_write(indio_dev, AD5360_CMD_WRITE_GAIN, 340 return ad5360_write(indio_dev, AD5360_CMD_WRITE_GAIN,
341 chan->address, val, chan->scan_type.shift); 341 chan->address, val, chan->scan_type.shift);
342 342
343 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 343 case IIO_CHAN_INFO_OFFSET:
344 if (val <= -max_val || val > 0) 344 if (val <= -max_val || val > 0)
345 return -EINVAL; 345 return -EINVAL;
346 346
@@ -371,8 +371,8 @@ static int ad5360_read_raw(struct iio_dev *indio_dev,
371 long m) 371 long m)
372{ 372{
373 struct ad5360_state *st = iio_priv(indio_dev); 373 struct ad5360_state *st = iio_priv(indio_dev);
374 unsigned long scale_uv;
375 unsigned int ofs_index; 374 unsigned int ofs_index;
375 int scale_uv;
376 int ret; 376 int ret;
377 377
378 switch (m) { 378 switch (m) {
@@ -383,7 +383,7 @@ static int ad5360_read_raw(struct iio_dev *indio_dev,
383 return ret; 383 return ret;
384 *val = ret >> chan->scan_type.shift; 384 *val = ret >> chan->scan_type.shift;
385 return IIO_VAL_INT; 385 return IIO_VAL_INT;
386 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 386 case IIO_CHAN_INFO_SCALE:
387 /* vout = 4 * vref * dac_code */ 387 /* vout = 4 * vref * dac_code */
388 scale_uv = ad5360_get_channel_vref(st, chan->channel) * 4 * 100; 388 scale_uv = ad5360_get_channel_vref(st, chan->channel) * 4 * 100;
389 if (scale_uv < 0) 389 if (scale_uv < 0)
@@ -393,21 +393,21 @@ static int ad5360_read_raw(struct iio_dev *indio_dev,
393 *val = scale_uv / 100000; 393 *val = scale_uv / 100000;
394 *val2 = (scale_uv % 100000) * 10; 394 *val2 = (scale_uv % 100000) * 10;
395 return IIO_VAL_INT_PLUS_MICRO; 395 return IIO_VAL_INT_PLUS_MICRO;
396 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 396 case IIO_CHAN_INFO_CALIBBIAS:
397 ret = ad5360_read(indio_dev, AD5360_READBACK_OFFSET, 397 ret = ad5360_read(indio_dev, AD5360_READBACK_OFFSET,
398 chan->address); 398 chan->address);
399 if (ret < 0) 399 if (ret < 0)
400 return ret; 400 return ret;
401 *val = ret; 401 *val = ret;
402 return IIO_VAL_INT; 402 return IIO_VAL_INT;
403 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 403 case IIO_CHAN_INFO_CALIBSCALE:
404 ret = ad5360_read(indio_dev, AD5360_READBACK_GAIN, 404 ret = ad5360_read(indio_dev, AD5360_READBACK_GAIN,
405 chan->address); 405 chan->address);
406 if (ret < 0) 406 if (ret < 0)
407 return ret; 407 return ret;
408 *val = ret; 408 *val = ret;
409 return IIO_VAL_INT; 409 return IIO_VAL_INT;
410 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 410 case IIO_CHAN_INFO_OFFSET:
411 ofs_index = ad5360_get_channel_vref_index(st, chan->channel); 411 ofs_index = ad5360_get_channel_vref_index(st, chan->channel);
412 ret = ad5360_read(indio_dev, AD5360_READBACK_SF, 412 ret = ad5360_read(indio_dev, AD5360_READBACK_SF,
413 AD5360_REG_SF_OFS(ofs_index)); 413 AD5360_REG_SF_OFS(ofs_index));
diff --git a/drivers/staging/iio/dac/ad5380.c b/drivers/staging/iio/dac/ad5380.c
new file mode 100644
index 000000000000..eff97ae05c4b
--- /dev/null
+++ b/drivers/staging/iio/dac/ad5380.c
@@ -0,0 +1,676 @@
1/*
2 * Analog devices AD5380, AD5381, AD5382, AD5383, AD5390, AD5391, AD5392
3 * multi-channel Digital to Analog Converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/i2c.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/regmap.h>
19#include <linux/regulator/consumer.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "dac.h"
24
25
26#define AD5380_REG_DATA(x) (((x) << 2) | 3)
27#define AD5380_REG_OFFSET(x) (((x) << 2) | 2)
28#define AD5380_REG_GAIN(x) (((x) << 2) | 1)
29#define AD5380_REG_SF_PWR_DOWN (8 << 2)
30#define AD5380_REG_SF_PWR_UP (9 << 2)
31#define AD5380_REG_SF_CTRL (12 << 2)
32
33#define AD5380_CTRL_PWR_DOWN_MODE_OFFSET 13
34#define AD5380_CTRL_INT_VREF_2V5 BIT(12)
35#define AD5380_CTRL_INT_VREF_EN BIT(10)
36
37/**
38 * struct ad5380_chip_info - chip specific information
39 * @channel_template: channel specification template
40 * @num_channels: number of channels
41 * @int_vref: internal vref in uV
42*/
43
44struct ad5380_chip_info {
45 struct iio_chan_spec channel_template;
46 unsigned int num_channels;
47 unsigned int int_vref;
48};
49
50/**
51 * struct ad5380_state - driver instance specific data
52 * @regmap: regmap instance used by the device
53 * @chip_info: chip model specific constants, available modes etc
54 * @vref_reg: vref supply regulator
55 * @vref: actual reference voltage used in uA
56 * @pwr_down: whether the chip is currently in power down mode
57 */
58
59struct ad5380_state {
60 struct regmap *regmap;
61 const struct ad5380_chip_info *chip_info;
62 struct regulator *vref_reg;
63 int vref;
64 bool pwr_down;
65};
66
67enum ad5380_type {
68 ID_AD5380_3,
69 ID_AD5380_5,
70 ID_AD5381_3,
71 ID_AD5381_5,
72 ID_AD5382_3,
73 ID_AD5382_5,
74 ID_AD5383_3,
75 ID_AD5383_5,
76 ID_AD5390_3,
77 ID_AD5390_5,
78 ID_AD5391_3,
79 ID_AD5391_5,
80 ID_AD5392_3,
81 ID_AD5392_5,
82};
83
84#define AD5380_CHANNEL(_bits) { \
85 .type = IIO_VOLTAGE, \
86 .indexed = 1, \
87 .output = 1, \
88 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | \
89 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
90 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
91 .scan_type = IIO_ST('u', (_bits), 16, 14 - (_bits)) \
92}
93
94static const struct ad5380_chip_info ad5380_chip_info_tbl[] = {
95 [ID_AD5380_3] = {
96 .channel_template = AD5380_CHANNEL(14),
97 .num_channels = 40,
98 .int_vref = 1250000,
99 },
100 [ID_AD5380_5] = {
101 .channel_template = AD5380_CHANNEL(14),
102 .num_channels = 40,
103 .int_vref = 2500000,
104 },
105 [ID_AD5381_3] = {
106 .channel_template = AD5380_CHANNEL(12),
107 .num_channels = 16,
108 .int_vref = 1250000,
109 },
110 [ID_AD5381_5] = {
111 .channel_template = AD5380_CHANNEL(12),
112 .num_channels = 16,
113 .int_vref = 2500000,
114 },
115 [ID_AD5382_3] = {
116 .channel_template = AD5380_CHANNEL(14),
117 .num_channels = 32,
118 .int_vref = 1250000,
119 },
120 [ID_AD5382_5] = {
121 .channel_template = AD5380_CHANNEL(14),
122 .num_channels = 32,
123 .int_vref = 2500000,
124 },
125 [ID_AD5383_3] = {
126 .channel_template = AD5380_CHANNEL(12),
127 .num_channels = 32,
128 .int_vref = 1250000,
129 },
130 [ID_AD5383_5] = {
131 .channel_template = AD5380_CHANNEL(12),
132 .num_channels = 32,
133 .int_vref = 2500000,
134 },
135 [ID_AD5390_3] = {
136 .channel_template = AD5380_CHANNEL(14),
137 .num_channels = 16,
138 .int_vref = 1250000,
139 },
140 [ID_AD5390_5] = {
141 .channel_template = AD5380_CHANNEL(14),
142 .num_channels = 16,
143 .int_vref = 2500000,
144 },
145 [ID_AD5391_3] = {
146 .channel_template = AD5380_CHANNEL(12),
147 .num_channels = 16,
148 .int_vref = 1250000,
149 },
150 [ID_AD5391_5] = {
151 .channel_template = AD5380_CHANNEL(12),
152 .num_channels = 16,
153 .int_vref = 2500000,
154 },
155 [ID_AD5392_3] = {
156 .channel_template = AD5380_CHANNEL(14),
157 .num_channels = 8,
158 .int_vref = 1250000,
159 },
160 [ID_AD5392_5] = {
161 .channel_template = AD5380_CHANNEL(14),
162 .num_channels = 8,
163 .int_vref = 2500000,
164 },
165};
166
167static ssize_t ad5380_read_dac_powerdown(struct device *dev,
168 struct device_attribute *attr, char *buf)
169{
170 struct iio_dev *indio_dev = dev_get_drvdata(dev);
171 struct ad5380_state *st = iio_priv(indio_dev);
172
173 return sprintf(buf, "%d\n", st->pwr_down);
174}
175
176static ssize_t ad5380_write_dac_powerdown(struct device *dev,
177 struct device_attribute *attr, const char *buf, size_t len)
178{
179 struct iio_dev *indio_dev = dev_get_drvdata(dev);
180 struct ad5380_state *st = iio_priv(indio_dev);
181 bool pwr_down;
182 int ret;
183
184 ret = strtobool(buf, &pwr_down);
185 if (ret)
186 return ret;
187
188 mutex_lock(&indio_dev->mlock);
189
190 if (pwr_down)
191 ret = regmap_write(st->regmap, AD5380_REG_SF_PWR_DOWN, 0);
192 else
193 ret = regmap_write(st->regmap, AD5380_REG_SF_PWR_UP, 0);
194
195 st->pwr_down = pwr_down;
196
197 mutex_unlock(&indio_dev->mlock);
198
199 return ret ? ret : len;
200}
201
202static IIO_DEVICE_ATTR(out_voltage_powerdown,
203 S_IRUGO | S_IWUSR,
204 ad5380_read_dac_powerdown,
205 ad5380_write_dac_powerdown, 0);
206
207static const char ad5380_powerdown_modes[][15] = {
208 [0] = "100kohm_to_gnd",
209 [1] = "three_state",
210};
211
212static ssize_t ad5380_read_powerdown_mode(struct device *dev,
213 struct device_attribute *attr, char *buf)
214{
215 struct iio_dev *indio_dev = dev_get_drvdata(dev);
216 struct ad5380_state *st = iio_priv(indio_dev);
217 unsigned int mode;
218 int ret;
219
220 ret = regmap_read(st->regmap, AD5380_REG_SF_CTRL, &mode);
221 if (ret)
222 return ret;
223
224 mode = (mode >> AD5380_CTRL_PWR_DOWN_MODE_OFFSET) & 1;
225
226 return sprintf(buf, "%s\n", ad5380_powerdown_modes[mode]);
227}
228
229static ssize_t ad5380_write_powerdown_mode(struct device *dev,
230 struct device_attribute *attr, const char *buf, size_t len)
231{
232 struct iio_dev *indio_dev = dev_get_drvdata(dev);
233 struct ad5380_state *st = iio_priv(indio_dev);
234 unsigned int i;
235 int ret;
236
237 for (i = 0; i < ARRAY_SIZE(ad5380_powerdown_modes); ++i) {
238 if (sysfs_streq(buf, ad5380_powerdown_modes[i]))
239 break;
240 }
241
242 if (i == ARRAY_SIZE(ad5380_powerdown_modes))
243 return -EINVAL;
244
245 ret = regmap_update_bits(st->regmap, AD5380_REG_SF_CTRL,
246 1 << AD5380_CTRL_PWR_DOWN_MODE_OFFSET,
247 i << AD5380_CTRL_PWR_DOWN_MODE_OFFSET);
248
249 return ret ? ret : len;
250}
251
252static IIO_DEVICE_ATTR(out_voltage_powerdown_mode,
253 S_IRUGO | S_IWUSR,
254 ad5380_read_powerdown_mode,
255 ad5380_write_powerdown_mode, 0);
256
257static IIO_CONST_ATTR(out_voltage_powerdown_mode_available,
258 "100kohm_to_gnd three_state");
259
260static struct attribute *ad5380_attributes[] = {
261 &iio_dev_attr_out_voltage_powerdown.dev_attr.attr,
262 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr,
263 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
264 NULL,
265};
266
267static const struct attribute_group ad5380_attribute_group = {
268 .attrs = ad5380_attributes,
269};
270
271static unsigned int ad5380_info_to_reg(struct iio_chan_spec const *chan,
272 long info)
273{
274 switch (info) {
275 case 0:
276 return AD5380_REG_DATA(chan->address);
277 case IIO_CHAN_INFO_CALIBBIAS:
278 return AD5380_REG_OFFSET(chan->address);
279 case IIO_CHAN_INFO_CALIBSCALE:
280 return AD5380_REG_GAIN(chan->address);
281 default:
282 break;
283 }
284
285 return 0;
286}
287
288static int ad5380_write_raw(struct iio_dev *indio_dev,
289 struct iio_chan_spec const *chan, int val, int val2, long info)
290{
291 const unsigned int max_val = (1 << chan->scan_type.realbits);
292 struct ad5380_state *st = iio_priv(indio_dev);
293
294 switch (info) {
295 case 0:
296 case IIO_CHAN_INFO_CALIBSCALE:
297 if (val >= max_val || val < 0)
298 return -EINVAL;
299
300 return regmap_write(st->regmap,
301 ad5380_info_to_reg(chan, info),
302 val << chan->scan_type.shift);
303 case IIO_CHAN_INFO_CALIBBIAS:
304 val += (1 << chan->scan_type.realbits) / 2;
305 if (val >= max_val || val < 0)
306 return -EINVAL;
307
308 return regmap_write(st->regmap,
309 AD5380_REG_OFFSET(chan->address),
310 val << chan->scan_type.shift);
311 default:
312 break;
313 }
314 return -EINVAL;
315}
316
317static int ad5380_read_raw(struct iio_dev *indio_dev,
318 struct iio_chan_spec const *chan, int *val, int *val2, long info)
319{
320 struct ad5380_state *st = iio_priv(indio_dev);
321 unsigned long scale_uv;
322 int ret;
323
324 switch (info) {
325 case 0:
326 case IIO_CHAN_INFO_CALIBSCALE:
327 ret = regmap_read(st->regmap, ad5380_info_to_reg(chan, info),
328 val);
329 if (ret)
330 return ret;
331 *val >>= chan->scan_type.shift;
332 return IIO_VAL_INT;
333 case IIO_CHAN_INFO_CALIBBIAS:
334 ret = regmap_read(st->regmap, AD5380_REG_OFFSET(chan->address),
335 val);
336 if (ret)
337 return ret;
338 *val >>= chan->scan_type.shift;
339 val -= (1 << chan->scan_type.realbits) / 2;
340 return IIO_VAL_INT;
341 case IIO_CHAN_INFO_SCALE:
342 scale_uv = ((2 * st->vref) >> chan->scan_type.realbits) * 100;
343 *val = scale_uv / 100000;
344 *val2 = (scale_uv % 100000) * 10;
345 return IIO_VAL_INT_PLUS_MICRO;
346 default:
347 break;
348 }
349
350 return -EINVAL;
351}
352
353static const struct iio_info ad5380_info = {
354 .read_raw = ad5380_read_raw,
355 .write_raw = ad5380_write_raw,
356 .attrs = &ad5380_attribute_group,
357 .driver_module = THIS_MODULE,
358};
359
360static int __devinit ad5380_alloc_channels(struct iio_dev *indio_dev)
361{
362 struct ad5380_state *st = iio_priv(indio_dev);
363 struct iio_chan_spec *channels;
364 unsigned int i;
365
366 channels = kcalloc(sizeof(struct iio_chan_spec),
367 st->chip_info->num_channels, GFP_KERNEL);
368
369 if (!channels)
370 return -ENOMEM;
371
372 for (i = 0; i < st->chip_info->num_channels; ++i) {
373 channels[i] = st->chip_info->channel_template;
374 channels[i].channel = i;
375 channels[i].address = i;
376 }
377
378 indio_dev->channels = channels;
379
380 return 0;
381}
382
383static int __devinit ad5380_probe(struct device *dev, struct regmap *regmap,
384 enum ad5380_type type, const char *name)
385{
386 struct iio_dev *indio_dev;
387 struct ad5380_state *st;
388 unsigned int ctrl = 0;
389 int ret;
390
391 indio_dev = iio_allocate_device(sizeof(*st));
392 if (indio_dev == NULL) {
393 dev_err(dev, "Failed to allocate iio device\n");
394 ret = -ENOMEM;
395 goto error_regmap_exit;
396 }
397
398 st = iio_priv(indio_dev);
399 dev_set_drvdata(dev, indio_dev);
400
401 st->chip_info = &ad5380_chip_info_tbl[type];
402 st->regmap = regmap;
403
404 indio_dev->dev.parent = dev;
405 indio_dev->name = name;
406 indio_dev->info = &ad5380_info;
407 indio_dev->modes = INDIO_DIRECT_MODE;
408 indio_dev->num_channels = st->chip_info->num_channels;
409
410 ret = ad5380_alloc_channels(indio_dev);
411 if (ret) {
412 dev_err(dev, "Failed to allocate channel spec: %d\n", ret);
413 goto error_free;
414 }
415
416 if (st->chip_info->int_vref == 2500000)
417 ctrl |= AD5380_CTRL_INT_VREF_2V5;
418
419 st->vref_reg = regulator_get(dev, "vref");
420 if (!IS_ERR(st->vref_reg)) {
421 ret = regulator_enable(st->vref_reg);
422 if (ret) {
423 dev_err(dev, "Failed to enable vref regulators: %d\n",
424 ret);
425 goto error_free_reg;
426 }
427
428 st->vref = regulator_get_voltage(st->vref_reg);
429 } else {
430 st->vref = st->chip_info->int_vref;
431 ctrl |= AD5380_CTRL_INT_VREF_EN;
432 }
433
434 ret = regmap_write(st->regmap, AD5380_REG_SF_CTRL, ctrl);
435 if (ret) {
436 dev_err(dev, "Failed to write to device: %d\n", ret);
437 goto error_disable_reg;
438 }
439
440 ret = iio_device_register(indio_dev);
441 if (ret) {
442 dev_err(dev, "Failed to register iio device: %d\n", ret);
443 goto error_disable_reg;
444 }
445
446 return 0;
447
448error_disable_reg:
449 if (!IS_ERR(st->vref_reg))
450 regulator_disable(st->vref_reg);
451error_free_reg:
452 if (!IS_ERR(st->vref_reg))
453 regulator_put(st->vref_reg);
454
455 kfree(indio_dev->channels);
456error_free:
457 iio_free_device(indio_dev);
458error_regmap_exit:
459 regmap_exit(regmap);
460
461 return ret;
462}
463
464static int __devexit ad5380_remove(struct device *dev)
465{
466 struct iio_dev *indio_dev = dev_get_drvdata(dev);
467 struct ad5380_state *st = iio_priv(indio_dev);
468
469 iio_device_unregister(indio_dev);
470
471 kfree(indio_dev->channels);
472
473 if (!IS_ERR(st->vref_reg)) {
474 regulator_disable(st->vref_reg);
475 regulator_put(st->vref_reg);
476 }
477
478 regmap_exit(st->regmap);
479 iio_free_device(indio_dev);
480
481 return 0;
482}
483
484static bool ad5380_reg_false(struct device *dev, unsigned int reg)
485{
486 return false;
487}
488
489static const struct regmap_config ad5380_regmap_config = {
490 .reg_bits = 10,
491 .val_bits = 14,
492
493 .max_register = AD5380_REG_DATA(40),
494 .cache_type = REGCACHE_RBTREE,
495
496 .volatile_reg = ad5380_reg_false,
497 .readable_reg = ad5380_reg_false,
498};
499
500#if IS_ENABLED(CONFIG_SPI_MASTER)
501
502static int __devinit ad5380_spi_probe(struct spi_device *spi)
503{
504 const struct spi_device_id *id = spi_get_device_id(spi);
505 struct regmap *regmap;
506
507 regmap = regmap_init_spi(spi, &ad5380_regmap_config);
508
509 if (IS_ERR(regmap))
510 return PTR_ERR(regmap);
511
512 return ad5380_probe(&spi->dev, regmap, id->driver_data, id->name);
513}
514
515static int __devexit ad5380_spi_remove(struct spi_device *spi)
516{
517 return ad5380_remove(&spi->dev);
518}
519
520static const struct spi_device_id ad5380_spi_ids[] = {
521 { "ad5380-3", ID_AD5380_3 },
522 { "ad5380-5", ID_AD5380_5 },
523 { "ad5381-3", ID_AD5381_3 },
524 { "ad5381-5", ID_AD5381_5 },
525 { "ad5382-3", ID_AD5382_3 },
526 { "ad5382-5", ID_AD5382_5 },
527 { "ad5383-3", ID_AD5383_3 },
528 { "ad5383-5", ID_AD5383_5 },
529 { "ad5384-3", ID_AD5380_3 },
530 { "ad5384-5", ID_AD5380_5 },
531 { "ad5390-3", ID_AD5390_3 },
532 { "ad5390-5", ID_AD5390_5 },
533 { "ad5391-3", ID_AD5391_3 },
534 { "ad5391-5", ID_AD5391_5 },
535 { "ad5392-3", ID_AD5392_3 },
536 { "ad5392-5", ID_AD5392_5 },
537 { }
538};
539MODULE_DEVICE_TABLE(spi, ad5380_spi_ids);
540
541static struct spi_driver ad5380_spi_driver = {
542 .driver = {
543 .name = "ad5380",
544 .owner = THIS_MODULE,
545 },
546 .probe = ad5380_spi_probe,
547 .remove = __devexit_p(ad5380_spi_remove),
548 .id_table = ad5380_spi_ids,
549};
550
551static inline int ad5380_spi_register_driver(void)
552{
553 return spi_register_driver(&ad5380_spi_driver);
554}
555
556static inline void ad5380_spi_unregister_driver(void)
557{
558 spi_unregister_driver(&ad5380_spi_driver);
559}
560
561#else
562
563static inline int ad5380_spi_register_driver(void)
564{
565 return 0;
566}
567
568static inline void ad5380_spi_unregister_driver(void)
569{
570}
571
572#endif
573
574#if IS_ENABLED(CONFIG_I2C)
575
576static int __devinit ad5380_i2c_probe(struct i2c_client *i2c,
577 const struct i2c_device_id *id)
578{
579 struct regmap *regmap;
580
581 regmap = regmap_init_i2c(i2c, &ad5380_regmap_config);
582
583 if (IS_ERR(regmap))
584 return PTR_ERR(regmap);
585
586 return ad5380_probe(&i2c->dev, regmap, id->driver_data, id->name);
587}
588
589static int __devexit ad5380_i2c_remove(struct i2c_client *i2c)
590{
591 return ad5380_remove(&i2c->dev);
592}
593
594static const struct i2c_device_id ad5380_i2c_ids[] = {
595 { "ad5380-3", ID_AD5380_3 },
596 { "ad5380-5", ID_AD5380_5 },
597 { "ad5381-3", ID_AD5381_3 },
598 { "ad5381-5", ID_AD5381_5 },
599 { "ad5382-3", ID_AD5382_3 },
600 { "ad5382-5", ID_AD5382_5 },
601 { "ad5383-3", ID_AD5383_3 },
602 { "ad5383-5", ID_AD5383_5 },
603 { "ad5384-3", ID_AD5380_3 },
604 { "ad5384-5", ID_AD5380_5 },
605 { "ad5390-3", ID_AD5390_3 },
606 { "ad5390-5", ID_AD5390_5 },
607 { "ad5391-3", ID_AD5391_3 },
608 { "ad5391-5", ID_AD5391_5 },
609 { "ad5392-3", ID_AD5392_3 },
610 { "ad5392-5", ID_AD5392_5 },
611 { }
612};
613MODULE_DEVICE_TABLE(i2c, ad5380_i2c_ids);
614
615static struct i2c_driver ad5380_i2c_driver = {
616 .driver = {
617 .name = "ad5380",
618 .owner = THIS_MODULE,
619 },
620 .probe = ad5380_i2c_probe,
621 .remove = __devexit_p(ad5380_i2c_remove),
622 .id_table = ad5380_i2c_ids,
623};
624
625static inline int ad5380_i2c_register_driver(void)
626{
627 return i2c_add_driver(&ad5380_i2c_driver);
628}
629
630static inline void ad5380_i2c_unregister_driver(void)
631{
632 i2c_del_driver(&ad5380_i2c_driver);
633}
634
635#else
636
637static inline int ad5380_i2c_register_driver(void)
638{
639 return 0;
640}
641
642static inline void ad5380_i2c_unregister_driver(void)
643{
644}
645
646#endif
647
648static int __init ad5380_spi_init(void)
649{
650 int ret;
651
652 ret = ad5380_spi_register_driver();
653 if (ret)
654 return ret;
655
656 ret = ad5380_i2c_register_driver();
657 if (ret) {
658 ad5380_spi_unregister_driver();
659 return ret;
660 }
661
662 return 0;
663}
664module_init(ad5380_spi_init);
665
666static void __exit ad5380_spi_exit(void)
667{
668 ad5380_i2c_unregister_driver();
669 ad5380_spi_unregister_driver();
670
671}
672module_exit(ad5380_spi_exit);
673
674MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
675MODULE_DESCRIPTION("Analog Devices AD5380/81/82/83/84/90/91/92 DAC");
676MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/dac/ad5421.c b/drivers/staging/iio/dac/ad5421.c
new file mode 100644
index 000000000000..71ee86824763
--- /dev/null
+++ b/drivers/staging/iio/dac/ad5421.c
@@ -0,0 +1,555 @@
1/*
2 * AD5421 Digital to analog converters driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/device.h>
10#include <linux/delay.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18
19#include "../iio.h"
20#include "../sysfs.h"
21#include "../events.h"
22#include "dac.h"
23#include "ad5421.h"
24
25
26#define AD5421_REG_DAC_DATA 0x1
27#define AD5421_REG_CTRL 0x2
28#define AD5421_REG_OFFSET 0x3
29#define AD5421_REG_GAIN 0x4
30/* load dac and fault shared the same register number. Writing to it will cause
31 * a dac load command, reading from it will return the fault status register */
32#define AD5421_REG_LOAD_DAC 0x5
33#define AD5421_REG_FAULT 0x5
34#define AD5421_REG_FORCE_ALARM_CURRENT 0x6
35#define AD5421_REG_RESET 0x7
36#define AD5421_REG_START_CONVERSION 0x8
37#define AD5421_REG_NOOP 0x9
38
39#define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
40#define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
41#define AD5421_CTRL_MIN_CURRENT BIT(9)
42#define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
43#define AD5421_CTRL_ADC_ENABLE BIT(7)
44#define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
45
46#define AD5421_FAULT_SPI BIT(15)
47#define AD5421_FAULT_PEC BIT(14)
48#define AD5421_FAULT_OVER_CURRENT BIT(13)
49#define AD5421_FAULT_UNDER_CURRENT BIT(12)
50#define AD5421_FAULT_TEMP_OVER_140 BIT(11)
51#define AD5421_FAULT_TEMP_OVER_100 BIT(10)
52#define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
53#define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
54
55/* These bits will cause the fault pin to go high */
56#define AD5421_FAULT_TRIGGER_IRQ \
57 (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
58 AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
59
60/**
61 * struct ad5421_state - driver instance specific data
62 * @spi: spi_device
63 * @ctrl: control register cache
64 * @current_range: current range which the device is configured for
65 * @data: spi transfer buffers
66 * @fault_mask: software masking of events
67 */
68struct ad5421_state {
69 struct spi_device *spi;
70 unsigned int ctrl;
71 enum ad5421_current_range current_range;
72 unsigned int fault_mask;
73
74 /*
75 * DMA (thus cache coherency maintenance) requires the
76 * transfer buffers to live in their own cache lines.
77 */
78 union {
79 u32 d32;
80 u8 d8[4];
81 } data[2] ____cacheline_aligned;
82};
83
84static const struct iio_chan_spec ad5421_channels[] = {
85 {
86 .type = IIO_CURRENT,
87 .indexed = 1,
88 .output = 1,
89 .channel = 0,
90 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
91 IIO_CHAN_INFO_OFFSET_SHARED_BIT |
92 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
93 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
94 .scan_type = IIO_ST('u', 16, 16, 0),
95 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
96 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
97 },
98 {
99 .type = IIO_TEMP,
100 .channel = -1,
101 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
102 },
103};
104
105static int ad5421_write_unlocked(struct iio_dev *indio_dev,
106 unsigned int reg, unsigned int val)
107{
108 struct ad5421_state *st = iio_priv(indio_dev);
109
110 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
111
112 return spi_write(st->spi, &st->data[0].d8[1], 3);
113}
114
115static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
116 unsigned int val)
117{
118 int ret;
119
120 mutex_lock(&indio_dev->mlock);
121 ret = ad5421_write_unlocked(indio_dev, reg, val);
122 mutex_unlock(&indio_dev->mlock);
123
124 return ret;
125}
126
127static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
128{
129 struct ad5421_state *st = iio_priv(indio_dev);
130 struct spi_message m;
131 int ret;
132 struct spi_transfer t[] = {
133 {
134 .tx_buf = &st->data[0].d8[1],
135 .len = 3,
136 .cs_change = 1,
137 }, {
138 .rx_buf = &st->data[1].d8[1],
139 .len = 3,
140 },
141 };
142
143 spi_message_init(&m);
144 spi_message_add_tail(&t[0], &m);
145 spi_message_add_tail(&t[1], &m);
146
147 mutex_lock(&indio_dev->mlock);
148
149 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
150
151 ret = spi_sync(st->spi, &m);
152 if (ret >= 0)
153 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
154
155 mutex_unlock(&indio_dev->mlock);
156
157 return ret;
158}
159
160static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
161 unsigned int clr)
162{
163 struct ad5421_state *st = iio_priv(indio_dev);
164 unsigned int ret;
165
166 mutex_lock(&indio_dev->mlock);
167
168 st->ctrl &= ~clr;
169 st->ctrl |= set;
170
171 ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
172
173 mutex_unlock(&indio_dev->mlock);
174
175 return ret;
176}
177
178static irqreturn_t ad5421_fault_handler(int irq, void *data)
179{
180 struct iio_dev *indio_dev = data;
181 struct ad5421_state *st = iio_priv(indio_dev);
182 unsigned int fault;
183 unsigned int old_fault = 0;
184 unsigned int events;
185
186 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
187 if (!fault)
188 return IRQ_NONE;
189
190 /* If we had a fault, this might mean that the DAC has lost its state
191 * and has been reset. Make sure that the control register actually
192 * contains what we expect it to contain. Otherwise the watchdog might
193 * be enabled and we get watchdog timeout faults, which will render the
194 * DAC unusable. */
195 ad5421_update_ctrl(indio_dev, 0, 0);
196
197
198 /* The fault pin stays high as long as a fault condition is present and
199 * it is not possible to mask fault conditions. For certain fault
200 * conditions for example like over-temperature it takes some time
201 * until the fault condition disappears. If we would exit the interrupt
202 * handler immediately after handling the event it would be entered
203 * again instantly. Thus we fall back to polling in case we detect that
204 * a interrupt condition is still present.
205 */
206 do {
207 /* 0xffff is a invalid value for the register and will only be
208 * read if there has been a communication error */
209 if (fault == 0xffff)
210 fault = 0;
211
212 /* we are only interested in new events */
213 events = (old_fault ^ fault) & fault;
214 events &= st->fault_mask;
215
216 if (events & AD5421_FAULT_OVER_CURRENT) {
217 iio_push_event(indio_dev,
218 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
219 0,
220 IIO_EV_TYPE_THRESH,
221 IIO_EV_DIR_RISING),
222 iio_get_time_ns());
223 }
224
225 if (events & AD5421_FAULT_UNDER_CURRENT) {
226 iio_push_event(indio_dev,
227 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
228 0,
229 IIO_EV_TYPE_THRESH,
230 IIO_EV_DIR_FALLING),
231 iio_get_time_ns());
232 }
233
234 if (events & AD5421_FAULT_TEMP_OVER_140) {
235 iio_push_event(indio_dev,
236 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
237 0,
238 IIO_EV_TYPE_MAG,
239 IIO_EV_DIR_RISING),
240 iio_get_time_ns());
241 }
242
243 old_fault = fault;
244 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
245
246 /* still active? go to sleep for some time */
247 if (fault & AD5421_FAULT_TRIGGER_IRQ)
248 msleep(1000);
249
250 } while (fault & AD5421_FAULT_TRIGGER_IRQ);
251
252
253 return IRQ_HANDLED;
254}
255
256static void ad5421_get_current_min_max(struct ad5421_state *st,
257 unsigned int *min, unsigned int *max)
258{
259 /* The current range is configured using external pins, which are
260 * usually hard-wired and not run-time switchable. */
261 switch (st->current_range) {
262 case AD5421_CURRENT_RANGE_4mA_20mA:
263 *min = 4000;
264 *max = 20000;
265 break;
266 case AD5421_CURRENT_RANGE_3mA8_21mA:
267 *min = 3800;
268 *max = 21000;
269 break;
270 case AD5421_CURRENT_RANGE_3mA2_24mA:
271 *min = 3200;
272 *max = 24000;
273 break;
274 default:
275 *min = 0;
276 *max = 1;
277 break;
278 }
279}
280
281static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
282{
283 unsigned int min, max;
284
285 ad5421_get_current_min_max(st, &min, &max);
286 return (min * (1 << 16)) / (max - min);
287}
288
289static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
290{
291 unsigned int min, max;
292
293 ad5421_get_current_min_max(st, &min, &max);
294 return ((max - min) * 1000) / (1 << 16);
295}
296
297static int ad5421_read_raw(struct iio_dev *indio_dev,
298 struct iio_chan_spec const *chan, int *val, int *val2, long m)
299{
300 struct ad5421_state *st = iio_priv(indio_dev);
301 int ret;
302
303 if (chan->type != IIO_CURRENT)
304 return -EINVAL;
305
306 switch (m) {
307 case 0:
308 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
309 if (ret < 0)
310 return ret;
311 *val = ret;
312 return IIO_VAL_INT;
313 case IIO_CHAN_INFO_SCALE:
314 *val = 0;
315 *val2 = ad5421_get_scale(st);
316 return IIO_VAL_INT_PLUS_MICRO;
317 case IIO_CHAN_INFO_OFFSET:
318 *val = ad5421_get_offset(st);
319 return IIO_VAL_INT;
320 case IIO_CHAN_INFO_CALIBBIAS:
321 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
322 if (ret < 0)
323 return ret;
324 *val = ret - 32768;
325 return IIO_VAL_INT;
326 case IIO_CHAN_INFO_CALIBSCALE:
327 ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
328 if (ret < 0)
329 return ret;
330 *val = ret;
331 return IIO_VAL_INT;
332 }
333
334 return -EINVAL;
335}
336
337static int ad5421_write_raw(struct iio_dev *indio_dev,
338 struct iio_chan_spec const *chan, int val, int val2, long mask)
339{
340 const unsigned int max_val = 1 << 16;
341
342 switch (mask) {
343 case 0:
344 if (val >= max_val || val < 0)
345 return -EINVAL;
346
347 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
348 case IIO_CHAN_INFO_CALIBBIAS:
349 val += 32768;
350 if (val >= max_val || val < 0)
351 return -EINVAL;
352
353 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
354 case IIO_CHAN_INFO_CALIBSCALE:
355 if (val >= max_val || val < 0)
356 return -EINVAL;
357
358 return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
359 default:
360 break;
361 }
362
363 return -EINVAL;
364}
365
366static int ad5421_write_event_config(struct iio_dev *indio_dev,
367 u64 event_code, int state)
368{
369 struct ad5421_state *st = iio_priv(indio_dev);
370 unsigned int mask;
371
372 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
373 case IIO_CURRENT:
374 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
375 IIO_EV_DIR_RISING)
376 mask = AD5421_FAULT_OVER_CURRENT;
377 else
378 mask = AD5421_FAULT_UNDER_CURRENT;
379 break;
380 case IIO_TEMP:
381 mask = AD5421_FAULT_TEMP_OVER_140;
382 break;
383 default:
384 return -EINVAL;
385 }
386
387 mutex_lock(&indio_dev->mlock);
388 if (state)
389 st->fault_mask |= mask;
390 else
391 st->fault_mask &= ~mask;
392 mutex_unlock(&indio_dev->mlock);
393
394 return 0;
395}
396
397static int ad5421_read_event_config(struct iio_dev *indio_dev,
398 u64 event_code)
399{
400 struct ad5421_state *st = iio_priv(indio_dev);
401 unsigned int mask;
402
403 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
404 case IIO_CURRENT:
405 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
406 IIO_EV_DIR_RISING)
407 mask = AD5421_FAULT_OVER_CURRENT;
408 else
409 mask = AD5421_FAULT_UNDER_CURRENT;
410 break;
411 case IIO_TEMP:
412 mask = AD5421_FAULT_TEMP_OVER_140;
413 break;
414 default:
415 return -EINVAL;
416 }
417
418 return (bool)(st->fault_mask & mask);
419}
420
421static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
422 int *val)
423{
424 int ret;
425
426 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
427 case IIO_CURRENT:
428 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
429 if (ret < 0)
430 return ret;
431 *val = ret;
432 break;
433 case IIO_TEMP:
434 *val = 140000;
435 break;
436 default:
437 return -EINVAL;
438 }
439
440 return 0;
441}
442
443static const struct iio_info ad5421_info = {
444 .read_raw = ad5421_read_raw,
445 .write_raw = ad5421_write_raw,
446 .read_event_config = ad5421_read_event_config,
447 .write_event_config = ad5421_write_event_config,
448 .read_event_value = ad5421_read_event_value,
449 .driver_module = THIS_MODULE,
450};
451
452static int __devinit ad5421_probe(struct spi_device *spi)
453{
454 struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
455 struct iio_dev *indio_dev;
456 struct ad5421_state *st;
457 int ret;
458
459 indio_dev = iio_allocate_device(sizeof(*st));
460 if (indio_dev == NULL) {
461 dev_err(&spi->dev, "Failed to allocate iio device\n");
462 return -ENOMEM;
463 }
464
465 st = iio_priv(indio_dev);
466 spi_set_drvdata(spi, indio_dev);
467
468 st->spi = spi;
469
470 indio_dev->dev.parent = &spi->dev;
471 indio_dev->name = "ad5421";
472 indio_dev->info = &ad5421_info;
473 indio_dev->modes = INDIO_DIRECT_MODE;
474 indio_dev->channels = ad5421_channels;
475 indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
476
477 st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
478 AD5421_CTRL_AUTO_FAULT_READBACK;
479
480 if (pdata) {
481 st->current_range = pdata->current_range;
482 if (pdata->external_vref)
483 st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
484 } else {
485 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
486 }
487
488 /* write initial ctrl register value */
489 ad5421_update_ctrl(indio_dev, 0, 0);
490
491 if (spi->irq) {
492 ret = request_threaded_irq(spi->irq,
493 NULL,
494 ad5421_fault_handler,
495 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
496 "ad5421 fault",
497 indio_dev);
498 if (ret)
499 goto error_free;
500 }
501
502 ret = iio_device_register(indio_dev);
503 if (ret) {
504 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
505 goto error_free_irq;
506 }
507
508 return 0;
509
510error_free_irq:
511 if (spi->irq)
512 free_irq(spi->irq, indio_dev);
513error_free:
514 iio_free_device(indio_dev);
515
516 return ret;
517}
518
519static int __devexit ad5421_remove(struct spi_device *spi)
520{
521 struct iio_dev *indio_dev = spi_get_drvdata(spi);
522
523 iio_device_unregister(indio_dev);
524 if (spi->irq)
525 free_irq(spi->irq, indio_dev);
526 iio_free_device(indio_dev);
527
528 return 0;
529}
530
531static struct spi_driver ad5421_driver = {
532 .driver = {
533 .name = "ad5421",
534 .owner = THIS_MODULE,
535 },
536 .probe = ad5421_probe,
537 .remove = __devexit_p(ad5421_remove),
538};
539
540static __init int ad5421_init(void)
541{
542 return spi_register_driver(&ad5421_driver);
543}
544module_init(ad5421_init);
545
546static __exit void ad5421_exit(void)
547{
548 spi_unregister_driver(&ad5421_driver);
549}
550module_exit(ad5421_exit);
551
552MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
553MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
554MODULE_LICENSE("GPL v2");
555MODULE_ALIAS("spi:ad5421");
diff --git a/drivers/staging/iio/dac/ad5421.h b/drivers/staging/iio/dac/ad5421.h
new file mode 100644
index 000000000000..cd2bb84ff1b0
--- /dev/null
+++ b/drivers/staging/iio/dac/ad5421.h
@@ -0,0 +1,32 @@
1#ifndef __IIO_DAC_AD5421_H__
2#define __IIO_DAC_AD5421_H__
3
4/*
5 * TODO: This file needs to go into include/linux/iio
6 */
7
8/**
9 * enum ad5421_current_range - Current range the AD5421 is configured for.
10 * @AD5421_CURRENT_RANGE_4mA_20mA: 4 mA to 20 mA (RANGE1,0 pins = 00)
11 * @AD5421_CURRENT_RANGE_3mA8_21mA: 3.8 mA to 21 mA (RANGE1,0 pins = x1)
12 * @AD5421_CURRENT_RANGE_3mA2_24mA: 3.2 mA to 24 mA (RANGE1,0 pins = 10)
13 */
14
15enum ad5421_current_range {
16 AD5421_CURRENT_RANGE_4mA_20mA,
17 AD5421_CURRENT_RANGE_3mA8_21mA,
18 AD5421_CURRENT_RANGE_3mA2_24mA,
19};
20
21/**
22 * struct ad5421_platform_data - AD5421 DAC driver platform data
23 * @external_vref: whether an external reference voltage is used or not
24 * @current_range: Current range the AD5421 is configured for
25 */
26
27struct ad5421_platform_data {
28 bool external_vref;
29 enum ad5421_current_range current_range;
30};
31
32#endif
diff --git a/drivers/staging/iio/dac/ad5446.c b/drivers/staging/iio/dac/ad5446.c
index ec701e939b6b..693e7482524c 100644
--- a/drivers/staging/iio/dac/ad5446.c
+++ b/drivers/staging/iio/dac/ad5446.c
@@ -26,19 +26,17 @@
26 26
27static void ad5446_store_sample(struct ad5446_state *st, unsigned val) 27static void ad5446_store_sample(struct ad5446_state *st, unsigned val)
28{ 28{
29 st->data.d16 = cpu_to_be16(AD5446_LOAD | 29 st->data.d16 = cpu_to_be16(AD5446_LOAD | val);
30 (val << st->chip_info->left_shift));
31} 30}
32 31
33static void ad5542_store_sample(struct ad5446_state *st, unsigned val) 32static void ad5542_store_sample(struct ad5446_state *st, unsigned val)
34{ 33{
35 st->data.d16 = cpu_to_be16(val << st->chip_info->left_shift); 34 st->data.d16 = cpu_to_be16(val);
36} 35}
37 36
38static void ad5620_store_sample(struct ad5446_state *st, unsigned val) 37static void ad5620_store_sample(struct ad5446_state *st, unsigned val)
39{ 38{
40 st->data.d16 = cpu_to_be16(AD5620_LOAD | 39 st->data.d16 = cpu_to_be16(AD5620_LOAD | val);
41 (val << st->chip_info->left_shift));
42} 40}
43 41
44static void ad5660_store_sample(struct ad5446_state *st, unsigned val) 42static void ad5660_store_sample(struct ad5446_state *st, unsigned val)
@@ -63,50 +61,6 @@ static void ad5660_store_pwr_down(struct ad5446_state *st, unsigned mode)
63 st->data.d24[2] = val & 0xFF; 61 st->data.d24[2] = val & 0xFF;
64} 62}
65 63
66static ssize_t ad5446_write(struct device *dev,
67 struct device_attribute *attr,
68 const char *buf,
69 size_t len)
70{
71 struct iio_dev *indio_dev = dev_get_drvdata(dev);
72 struct ad5446_state *st = iio_priv(indio_dev);
73 int ret;
74 long val;
75
76 ret = strict_strtol(buf, 10, &val);
77 if (ret)
78 goto error_ret;
79
80 if (val > RES_MASK(st->chip_info->bits)) {
81 ret = -EINVAL;
82 goto error_ret;
83 }
84
85 mutex_lock(&indio_dev->mlock);
86 st->cached_val = val;
87 st->chip_info->store_sample(st, val);
88 ret = spi_sync(st->spi, &st->msg);
89 mutex_unlock(&indio_dev->mlock);
90
91error_ret:
92 return ret ? ret : len;
93}
94
95static IIO_DEV_ATTR_OUT_RAW(0, ad5446_write, 0);
96
97static ssize_t ad5446_show_scale(struct device *dev,
98 struct device_attribute *attr,
99 char *buf)
100{
101 struct iio_dev *indio_dev = dev_get_drvdata(dev);
102 struct ad5446_state *st = iio_priv(indio_dev);
103 /* Corresponds to Vref / 2^(bits) */
104 unsigned int scale_uv = (st->vref_mv * 1000) >> st->chip_info->bits;
105
106 return sprintf(buf, "%d.%03d\n", scale_uv / 1000, scale_uv % 1000);
107}
108static IIO_DEVICE_ATTR(out_voltage_scale, S_IRUGO, ad5446_show_scale, NULL, 0);
109
110static ssize_t ad5446_write_powerdown_mode(struct device *dev, 64static ssize_t ad5446_write_powerdown_mode(struct device *dev,
111 struct device_attribute *attr, 65 struct device_attribute *attr,
112 const char *buf, size_t len) 66 const char *buf, size_t len)
@@ -189,8 +143,6 @@ static IIO_DEVICE_ATTR(out_voltage0_powerdown, S_IRUGO | S_IWUSR,
189 ad5446_write_dac_powerdown, 0); 143 ad5446_write_dac_powerdown, 0);
190 144
191static struct attribute *ad5446_attributes[] = { 145static struct attribute *ad5446_attributes[] = {
192 &iio_dev_attr_out_voltage0_raw.dev_attr.attr,
193 &iio_dev_attr_out_voltage_scale.dev_attr.attr,
194 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr, 146 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr,
195 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr, 147 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr,
196 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr, 148 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
@@ -223,121 +175,148 @@ static const struct attribute_group ad5446_attribute_group = {
223 .is_visible = ad5446_attr_is_visible, 175 .is_visible = ad5446_attr_is_visible,
224}; 176};
225 177
178#define AD5446_CHANNEL(bits, storage, shift) { \
179 .type = IIO_VOLTAGE, \
180 .indexed = 1, \
181 .output = 1, \
182 .channel = 0, \
183 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
184 .scan_type = IIO_ST('u', (bits), (storage), (shift)) \
185}
186
226static const struct ad5446_chip_info ad5446_chip_info_tbl[] = { 187static const struct ad5446_chip_info ad5446_chip_info_tbl[] = {
227 [ID_AD5444] = { 188 [ID_AD5444] = {
228 .bits = 12, 189 .channel = AD5446_CHANNEL(12, 16, 2),
229 .storagebits = 16,
230 .left_shift = 2,
231 .store_sample = ad5446_store_sample, 190 .store_sample = ad5446_store_sample,
232 }, 191 },
233 [ID_AD5446] = { 192 [ID_AD5446] = {
234 .bits = 14, 193 .channel = AD5446_CHANNEL(14, 16, 0),
235 .storagebits = 16,
236 .left_shift = 0,
237 .store_sample = ad5446_store_sample, 194 .store_sample = ad5446_store_sample,
238 }, 195 },
239 [ID_AD5541A] = { 196 [ID_AD5541A] = {
240 .bits = 16, 197 .channel = AD5446_CHANNEL(16, 16, 0),
241 .storagebits = 16,
242 .left_shift = 0,
243 .store_sample = ad5542_store_sample, 198 .store_sample = ad5542_store_sample,
244 }, 199 },
245 [ID_AD5542A] = { 200 [ID_AD5542A] = {
246 .bits = 16, 201 .channel = AD5446_CHANNEL(16, 16, 0),
247 .storagebits = 16,
248 .left_shift = 0,
249 .store_sample = ad5542_store_sample, 202 .store_sample = ad5542_store_sample,
250 }, 203 },
251 [ID_AD5543] = { 204 [ID_AD5543] = {
252 .bits = 16, 205 .channel = AD5446_CHANNEL(16, 16, 0),
253 .storagebits = 16,
254 .left_shift = 0,
255 .store_sample = ad5542_store_sample, 206 .store_sample = ad5542_store_sample,
256 }, 207 },
257 [ID_AD5512A] = { 208 [ID_AD5512A] = {
258 .bits = 12, 209 .channel = AD5446_CHANNEL(12, 16, 4),
259 .storagebits = 16,
260 .left_shift = 4,
261 .store_sample = ad5542_store_sample, 210 .store_sample = ad5542_store_sample,
262 }, 211 },
263 [ID_AD5553] = { 212 [ID_AD5553] = {
264 .bits = 14, 213 .channel = AD5446_CHANNEL(14, 16, 0),
265 .storagebits = 16,
266 .left_shift = 0,
267 .store_sample = ad5542_store_sample, 214 .store_sample = ad5542_store_sample,
268 }, 215 },
269 [ID_AD5601] = { 216 [ID_AD5601] = {
270 .bits = 8, 217 .channel = AD5446_CHANNEL(8, 16, 6),
271 .storagebits = 16,
272 .left_shift = 6,
273 .store_sample = ad5542_store_sample, 218 .store_sample = ad5542_store_sample,
274 .store_pwr_down = ad5620_store_pwr_down, 219 .store_pwr_down = ad5620_store_pwr_down,
275 }, 220 },
276 [ID_AD5611] = { 221 [ID_AD5611] = {
277 .bits = 10, 222 .channel = AD5446_CHANNEL(10, 16, 4),
278 .storagebits = 16,
279 .left_shift = 4,
280 .store_sample = ad5542_store_sample, 223 .store_sample = ad5542_store_sample,
281 .store_pwr_down = ad5620_store_pwr_down, 224 .store_pwr_down = ad5620_store_pwr_down,
282 }, 225 },
283 [ID_AD5621] = { 226 [ID_AD5621] = {
284 .bits = 12, 227 .channel = AD5446_CHANNEL(12, 16, 2),
285 .storagebits = 16,
286 .left_shift = 2,
287 .store_sample = ad5542_store_sample, 228 .store_sample = ad5542_store_sample,
288 .store_pwr_down = ad5620_store_pwr_down, 229 .store_pwr_down = ad5620_store_pwr_down,
289 }, 230 },
290 [ID_AD5620_2500] = { 231 [ID_AD5620_2500] = {
291 .bits = 12, 232 .channel = AD5446_CHANNEL(12, 16, 2),
292 .storagebits = 16,
293 .left_shift = 2,
294 .int_vref_mv = 2500, 233 .int_vref_mv = 2500,
295 .store_sample = ad5620_store_sample, 234 .store_sample = ad5620_store_sample,
296 .store_pwr_down = ad5620_store_pwr_down, 235 .store_pwr_down = ad5620_store_pwr_down,
297 }, 236 },
298 [ID_AD5620_1250] = { 237 [ID_AD5620_1250] = {
299 .bits = 12, 238 .channel = AD5446_CHANNEL(12, 16, 2),
300 .storagebits = 16,
301 .left_shift = 2,
302 .int_vref_mv = 1250, 239 .int_vref_mv = 1250,
303 .store_sample = ad5620_store_sample, 240 .store_sample = ad5620_store_sample,
304 .store_pwr_down = ad5620_store_pwr_down, 241 .store_pwr_down = ad5620_store_pwr_down,
305 }, 242 },
306 [ID_AD5640_2500] = { 243 [ID_AD5640_2500] = {
307 .bits = 14, 244 .channel = AD5446_CHANNEL(14, 16, 0),
308 .storagebits = 16,
309 .left_shift = 0,
310 .int_vref_mv = 2500, 245 .int_vref_mv = 2500,
311 .store_sample = ad5620_store_sample, 246 .store_sample = ad5620_store_sample,
312 .store_pwr_down = ad5620_store_pwr_down, 247 .store_pwr_down = ad5620_store_pwr_down,
313 }, 248 },
314 [ID_AD5640_1250] = { 249 [ID_AD5640_1250] = {
315 .bits = 14, 250 .channel = AD5446_CHANNEL(14, 16, 0),
316 .storagebits = 16,
317 .left_shift = 0,
318 .int_vref_mv = 1250, 251 .int_vref_mv = 1250,
319 .store_sample = ad5620_store_sample, 252 .store_sample = ad5620_store_sample,
320 .store_pwr_down = ad5620_store_pwr_down, 253 .store_pwr_down = ad5620_store_pwr_down,
321 }, 254 },
322 [ID_AD5660_2500] = { 255 [ID_AD5660_2500] = {
323 .bits = 16, 256 .channel = AD5446_CHANNEL(16, 16, 0),
324 .storagebits = 24,
325 .left_shift = 0,
326 .int_vref_mv = 2500, 257 .int_vref_mv = 2500,
327 .store_sample = ad5660_store_sample, 258 .store_sample = ad5660_store_sample,
328 .store_pwr_down = ad5660_store_pwr_down, 259 .store_pwr_down = ad5660_store_pwr_down,
329 }, 260 },
330 [ID_AD5660_1250] = { 261 [ID_AD5660_1250] = {
331 .bits = 16, 262 .channel = AD5446_CHANNEL(16, 16, 0),
332 .storagebits = 24,
333 .left_shift = 0,
334 .int_vref_mv = 1250, 263 .int_vref_mv = 1250,
335 .store_sample = ad5660_store_sample, 264 .store_sample = ad5660_store_sample,
336 .store_pwr_down = ad5660_store_pwr_down, 265 .store_pwr_down = ad5660_store_pwr_down,
337 }, 266 },
338}; 267};
339 268
269static int ad5446_read_raw(struct iio_dev *indio_dev,
270 struct iio_chan_spec const *chan,
271 int *val,
272 int *val2,
273 long m)
274{
275 struct ad5446_state *st = iio_priv(indio_dev);
276 unsigned long scale_uv;
277
278 switch (m) {
279 case IIO_CHAN_INFO_SCALE:
280 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
281 *val = scale_uv / 1000;
282 *val2 = (scale_uv % 1000) * 1000;
283 return IIO_VAL_INT_PLUS_MICRO;
284
285 }
286 return -EINVAL;
287}
288
289static int ad5446_write_raw(struct iio_dev *indio_dev,
290 struct iio_chan_spec const *chan,
291 int val,
292 int val2,
293 long mask)
294{
295 struct ad5446_state *st = iio_priv(indio_dev);
296 int ret;
297
298 switch (mask) {
299 case 0:
300 if (val >= (1 << chan->scan_type.realbits) || val < 0)
301 return -EINVAL;
302
303 val <<= chan->scan_type.shift;
304 mutex_lock(&indio_dev->mlock);
305 st->cached_val = val;
306 st->chip_info->store_sample(st, val);
307 ret = spi_sync(st->spi, &st->msg);
308 mutex_unlock(&indio_dev->mlock);
309 break;
310 default:
311 ret = -EINVAL;
312 }
313
314 return ret;
315}
316
340static const struct iio_info ad5446_info = { 317static const struct iio_info ad5446_info = {
318 .read_raw = ad5446_read_raw,
319 .write_raw = ad5446_write_raw,
341 .attrs = &ad5446_attribute_group, 320 .attrs = &ad5446_attribute_group,
342 .driver_module = THIS_MODULE, 321 .driver_module = THIS_MODULE,
343}; 322};
@@ -376,11 +355,13 @@ static int __devinit ad5446_probe(struct spi_device *spi)
376 indio_dev->name = spi_get_device_id(spi)->name; 355 indio_dev->name = spi_get_device_id(spi)->name;
377 indio_dev->info = &ad5446_info; 356 indio_dev->info = &ad5446_info;
378 indio_dev->modes = INDIO_DIRECT_MODE; 357 indio_dev->modes = INDIO_DIRECT_MODE;
358 indio_dev->channels = &st->chip_info->channel;
359 indio_dev->num_channels = 1;
379 360
380 /* Setup default message */ 361 /* Setup default message */
381 362
382 st->xfer.tx_buf = &st->data; 363 st->xfer.tx_buf = &st->data;
383 st->xfer.len = st->chip_info->storagebits / 8; 364 st->xfer.len = st->chip_info->channel.scan_type.storagebits / 8;
384 365
385 spi_message_init(&st->msg); 366 spi_message_init(&st->msg);
386 spi_message_add_tail(&st->xfer, &st->msg); 367 spi_message_add_tail(&st->xfer, &st->msg);
@@ -454,11 +435,11 @@ static const struct spi_device_id ad5446_id[] = {
454 {"ad5660-1250", ID_AD5660_1250}, 435 {"ad5660-1250", ID_AD5660_1250},
455 {} 436 {}
456}; 437};
438MODULE_DEVICE_TABLE(spi, ad5446_id);
457 439
458static struct spi_driver ad5446_driver = { 440static struct spi_driver ad5446_driver = {
459 .driver = { 441 .driver = {
460 .name = "ad5446", 442 .name = "ad5446",
461 .bus = &spi_bus_type,
462 .owner = THIS_MODULE, 443 .owner = THIS_MODULE,
463 }, 444 },
464 .probe = ad5446_probe, 445 .probe = ad5446_probe,
@@ -470,4 +451,3 @@ module_spi_driver(ad5446_driver);
470MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 451MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
471MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC"); 452MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
472MODULE_LICENSE("GPL v2"); 453MODULE_LICENSE("GPL v2");
473MODULE_ALIAS("spi:ad5446");
diff --git a/drivers/staging/iio/dac/ad5446.h b/drivers/staging/iio/dac/ad5446.h
index 7118d653ac3e..4ea3476fb065 100644
--- a/drivers/staging/iio/dac/ad5446.h
+++ b/drivers/staging/iio/dac/ad5446.h
@@ -25,8 +25,6 @@
25#define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */ 25#define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */
26#define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */ 26#define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */
27 27
28#define RES_MASK(bits) ((1 << (bits)) - 1)
29
30#define MODE_PWRDWN_1k 0x1 28#define MODE_PWRDWN_1k 0x1
31#define MODE_PWRDWN_100k 0x2 29#define MODE_PWRDWN_100k 0x2
32#define MODE_PWRDWN_TRISTATE 0x3 30#define MODE_PWRDWN_TRISTATE 0x3
@@ -62,18 +60,14 @@ struct ad5446_state {
62 60
63/** 61/**
64 * struct ad5446_chip_info - chip specific information 62 * struct ad5446_chip_info - chip specific information
65 * @bits: accuracy of the DAC in bits 63 * @channel: channel spec for the DAC
66 * @storagebits: number of bits written to the DAC
67 * @left_shift: number of bits the datum must be shifted
68 * @int_vref_mv: AD5620/40/60: the internal reference voltage 64 * @int_vref_mv: AD5620/40/60: the internal reference voltage
69 * @store_sample: chip specific helper function to store the datum 65 * @store_sample: chip specific helper function to store the datum
70 * @store_sample: chip specific helper function to store the powerpown cmd 66 * @store_sample: chip specific helper function to store the powerpown cmd
71 */ 67 */
72 68
73struct ad5446_chip_info { 69struct ad5446_chip_info {
74 u8 bits; 70 struct iio_chan_spec channel;
75 u8 storagebits;
76 u8 left_shift;
77 u16 int_vref_mv; 71 u16 int_vref_mv;
78 void (*store_sample) (struct ad5446_state *st, unsigned val); 72 void (*store_sample) (struct ad5446_state *st, unsigned val);
79 void (*store_pwr_down) (struct ad5446_state *st, unsigned mode); 73 void (*store_pwr_down) (struct ad5446_state *st, unsigned mode);
diff --git a/drivers/staging/iio/dac/ad5504.c b/drivers/staging/iio/dac/ad5504.c
index 57539ce8e6cf..bc17205fe722 100644
--- a/drivers/staging/iio/dac/ad5504.c
+++ b/drivers/staging/iio/dac/ad5504.c
@@ -18,9 +18,27 @@
18 18
19#include "../iio.h" 19#include "../iio.h"
20#include "../sysfs.h" 20#include "../sysfs.h"
21#include "../events.h"
21#include "dac.h" 22#include "dac.h"
22#include "ad5504.h" 23#include "ad5504.h"
23 24
25#define AD5504_CHANNEL(_chan) { \
26 .type = IIO_VOLTAGE, \
27 .indexed = 1, \
28 .output = 1, \
29 .channel = (_chan), \
30 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
31 .address = AD5504_ADDR_DAC(_chan), \
32 .scan_type = IIO_ST('u', 12, 16, 0), \
33}
34
35static const struct iio_chan_spec ad5504_channels[] = {
36 AD5504_CHANNEL(0),
37 AD5504_CHANNEL(1),
38 AD5504_CHANNEL(2),
39 AD5504_CHANNEL(3),
40};
41
24static int ad5504_spi_write(struct spi_device *spi, u8 addr, u16 val) 42static int ad5504_spi_write(struct spi_device *spi, u8 addr, u16 val)
25{ 43{
26 u16 tmp = cpu_to_be16(AD5504_CMD_WRITE | 44 u16 tmp = cpu_to_be16(AD5504_CMD_WRITE |
@@ -30,13 +48,14 @@ static int ad5504_spi_write(struct spi_device *spi, u8 addr, u16 val)
30 return spi_write(spi, (u8 *)&tmp, 2); 48 return spi_write(spi, (u8 *)&tmp, 2);
31} 49}
32 50
33static int ad5504_spi_read(struct spi_device *spi, u8 addr, u16 *val) 51static int ad5504_spi_read(struct spi_device *spi, u8 addr)
34{ 52{
35 u16 tmp = cpu_to_be16(AD5504_CMD_READ | AD5504_ADDR(addr)); 53 u16 tmp = cpu_to_be16(AD5504_CMD_READ | AD5504_ADDR(addr));
54 u16 val;
36 int ret; 55 int ret;
37 struct spi_transfer t = { 56 struct spi_transfer t = {
38 .tx_buf = &tmp, 57 .tx_buf = &tmp,
39 .rx_buf = val, 58 .rx_buf = &val,
40 .len = 2, 59 .len = 2,
41 }; 60 };
42 struct spi_message m; 61 struct spi_message m;
@@ -45,44 +64,61 @@ static int ad5504_spi_read(struct spi_device *spi, u8 addr, u16 *val)
45 spi_message_add_tail(&t, &m); 64 spi_message_add_tail(&t, &m);
46 ret = spi_sync(spi, &m); 65 ret = spi_sync(spi, &m);
47 66
48 *val = be16_to_cpu(*val) & AD5504_RES_MASK; 67 if (ret < 0)
68 return ret;
49 69
50 return ret; 70 return be16_to_cpu(val) & AD5504_RES_MASK;
51} 71}
52 72
53static ssize_t ad5504_write_dac(struct device *dev, 73static int ad5504_read_raw(struct iio_dev *indio_dev,
54 struct device_attribute *attr, 74 struct iio_chan_spec const *chan,
55 const char *buf, size_t len) 75 int *val,
76 int *val2,
77 long m)
56{ 78{
57 struct iio_dev *indio_dev = dev_get_drvdata(dev);
58 struct ad5504_state *st = iio_priv(indio_dev); 79 struct ad5504_state *st = iio_priv(indio_dev);
59 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 80 unsigned long scale_uv;
60 long readin;
61 int ret; 81 int ret;
62 82
63 ret = strict_strtol(buf, 10, &readin); 83 switch (m) {
64 if (ret) 84 case 0:
65 return ret; 85 ret = ad5504_spi_read(st->spi, chan->address);
86 if (ret < 0)
87 return ret;
66 88
67 ret = ad5504_spi_write(st->spi, this_attr->address, readin); 89 *val = ret;
68 return ret ? ret : len; 90
91 return IIO_VAL_INT;
92 case IIO_CHAN_INFO_SCALE:
93 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
94 *val = scale_uv / 1000;
95 *val2 = (scale_uv % 1000) * 1000;
96 return IIO_VAL_INT_PLUS_MICRO;
97
98 }
99 return -EINVAL;
69} 100}
70 101
71static ssize_t ad5504_read_dac(struct device *dev, 102static int ad5504_write_raw(struct iio_dev *indio_dev,
72 struct device_attribute *attr, 103 struct iio_chan_spec const *chan,
73 char *buf) 104 int val,
105 int val2,
106 long mask)
74{ 107{
75 struct iio_dev *indio_dev = dev_get_drvdata(dev);
76 struct ad5504_state *st = iio_priv(indio_dev); 108 struct ad5504_state *st = iio_priv(indio_dev);
77 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
78 int ret; 109 int ret;
79 u16 val;
80 110
81 ret = ad5504_spi_read(st->spi, this_attr->address, &val); 111 switch (mask) {
82 if (ret) 112 case 0:
83 return ret; 113 if (val >= (1 << chan->scan_type.realbits) || val < 0)
114 return -EINVAL;
84 115
85 return sprintf(buf, "%d\n", val); 116 return ad5504_spi_write(st->spi, chan->address, val);
117 default:
118 ret = -EINVAL;
119 }
120
121 return -EINVAL;
86} 122}
87 123
88static ssize_t ad5504_read_powerdown_mode(struct device *dev, 124static ssize_t ad5504_read_powerdown_mode(struct device *dev,
@@ -157,32 +193,6 @@ static ssize_t ad5504_write_dac_powerdown(struct device *dev,
157 return ret ? ret : len; 193 return ret ? ret : len;
158} 194}
159 195
160static ssize_t ad5504_show_scale(struct device *dev,
161 struct device_attribute *attr,
162 char *buf)
163{
164 struct iio_dev *indio_dev = dev_get_drvdata(dev);
165 struct ad5504_state *st = iio_priv(indio_dev);
166 /* Corresponds to Vref / 2^(bits) */
167 unsigned int scale_uv = (st->vref_mv * 1000) >> AD5505_BITS;
168
169 return sprintf(buf, "%d.%03d\n", scale_uv / 1000, scale_uv % 1000);
170}
171static IIO_DEVICE_ATTR(out_voltage_scale, S_IRUGO, ad5504_show_scale, NULL, 0);
172
173#define IIO_DEV_ATTR_OUT_RW_RAW(_num, _show, _store, _addr) \
174 IIO_DEVICE_ATTR(out_voltage##_num##_raw, \
175 S_IRUGO | S_IWUSR, _show, _store, _addr)
176
177static IIO_DEV_ATTR_OUT_RW_RAW(0, ad5504_read_dac,
178 ad5504_write_dac, AD5504_ADDR_DAC0);
179static IIO_DEV_ATTR_OUT_RW_RAW(1, ad5504_read_dac,
180 ad5504_write_dac, AD5504_ADDR_DAC1);
181static IIO_DEV_ATTR_OUT_RW_RAW(2, ad5504_read_dac,
182 ad5504_write_dac, AD5504_ADDR_DAC2);
183static IIO_DEV_ATTR_OUT_RW_RAW(3, ad5504_read_dac,
184 ad5504_write_dac, AD5504_ADDR_DAC3);
185
186static IIO_DEVICE_ATTR(out_voltage_powerdown_mode, S_IRUGO | 196static IIO_DEVICE_ATTR(out_voltage_powerdown_mode, S_IRUGO |
187 S_IWUSR, ad5504_read_powerdown_mode, 197 S_IWUSR, ad5504_read_powerdown_mode,
188 ad5504_write_powerdown_mode, 0); 198 ad5504_write_powerdown_mode, 0);
@@ -203,17 +213,12 @@ static IIO_DEV_ATTR_DAC_POWERDOWN(3, ad5504_read_dac_powerdown,
203 ad5504_write_dac_powerdown, 3); 213 ad5504_write_dac_powerdown, 3);
204 214
205static struct attribute *ad5504_attributes[] = { 215static struct attribute *ad5504_attributes[] = {
206 &iio_dev_attr_out_voltage0_raw.dev_attr.attr,
207 &iio_dev_attr_out_voltage1_raw.dev_attr.attr,
208 &iio_dev_attr_out_voltage2_raw.dev_attr.attr,
209 &iio_dev_attr_out_voltage3_raw.dev_attr.attr,
210 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr, 216 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr,
211 &iio_dev_attr_out_voltage1_powerdown.dev_attr.attr, 217 &iio_dev_attr_out_voltage1_powerdown.dev_attr.attr,
212 &iio_dev_attr_out_voltage2_powerdown.dev_attr.attr, 218 &iio_dev_attr_out_voltage2_powerdown.dev_attr.attr,
213 &iio_dev_attr_out_voltage3_powerdown.dev_attr.attr, 219 &iio_dev_attr_out_voltage3_powerdown.dev_attr.attr,
214 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr, 220 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr,
215 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr, 221 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
216 &iio_dev_attr_out_voltage_scale.dev_attr.attr,
217 NULL, 222 NULL,
218}; 223};
219 224
@@ -222,11 +227,9 @@ static const struct attribute_group ad5504_attribute_group = {
222}; 227};
223 228
224static struct attribute *ad5501_attributes[] = { 229static struct attribute *ad5501_attributes[] = {
225 &iio_dev_attr_out_voltage0_raw.dev_attr.attr,
226 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr, 230 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr,
227 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr, 231 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr,
228 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr, 232 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
229 &iio_dev_attr_out_voltage_scale.dev_attr.attr,
230 NULL, 233 NULL,
231}; 234};
232 235
@@ -261,12 +264,16 @@ static irqreturn_t ad5504_event_handler(int irq, void *private)
261} 264}
262 265
263static const struct iio_info ad5504_info = { 266static const struct iio_info ad5504_info = {
267 .write_raw = ad5504_write_raw,
268 .read_raw = ad5504_read_raw,
264 .attrs = &ad5504_attribute_group, 269 .attrs = &ad5504_attribute_group,
265 .event_attrs = &ad5504_ev_attribute_group, 270 .event_attrs = &ad5504_ev_attribute_group,
266 .driver_module = THIS_MODULE, 271 .driver_module = THIS_MODULE,
267}; 272};
268 273
269static const struct iio_info ad5501_info = { 274static const struct iio_info ad5501_info = {
275 .write_raw = ad5504_write_raw,
276 .read_raw = ad5504_read_raw,
270 .attrs = &ad5501_attribute_group, 277 .attrs = &ad5501_attribute_group,
271 .event_attrs = &ad5504_ev_attribute_group, 278 .event_attrs = &ad5504_ev_attribute_group,
272 .driver_module = THIS_MODULE, 279 .driver_module = THIS_MODULE,
@@ -307,10 +314,14 @@ static int __devinit ad5504_probe(struct spi_device *spi)
307 st->spi = spi; 314 st->spi = spi;
308 indio_dev->dev.parent = &spi->dev; 315 indio_dev->dev.parent = &spi->dev;
309 indio_dev->name = spi_get_device_id(st->spi)->name; 316 indio_dev->name = spi_get_device_id(st->spi)->name;
310 if (spi_get_device_id(st->spi)->driver_data == ID_AD5501) 317 if (spi_get_device_id(st->spi)->driver_data == ID_AD5501) {
311 indio_dev->info = &ad5501_info; 318 indio_dev->info = &ad5501_info;
312 else 319 indio_dev->num_channels = 1;
320 } else {
313 indio_dev->info = &ad5504_info; 321 indio_dev->info = &ad5504_info;
322 indio_dev->num_channels = 4;
323 }
324 indio_dev->channels = ad5504_channels;
314 indio_dev->modes = INDIO_DIRECT_MODE; 325 indio_dev->modes = INDIO_DIRECT_MODE;
315 326
316 if (spi->irq) { 327 if (spi->irq) {
@@ -367,6 +378,7 @@ static const struct spi_device_id ad5504_id[] = {
367 {"ad5501", ID_AD5501}, 378 {"ad5501", ID_AD5501},
368 {} 379 {}
369}; 380};
381MODULE_DEVICE_TABLE(spi, ad5504_id);
370 382
371static struct spi_driver ad5504_driver = { 383static struct spi_driver ad5504_driver = {
372 .driver = { 384 .driver = {
diff --git a/drivers/staging/iio/dac/ad5504.h b/drivers/staging/iio/dac/ad5504.h
index 85beb1dd29b9..afe09522f53c 100644
--- a/drivers/staging/iio/dac/ad5504.h
+++ b/drivers/staging/iio/dac/ad5504.h
@@ -18,10 +18,7 @@
18 18
19/* Registers */ 19/* Registers */
20#define AD5504_ADDR_NOOP 0 20#define AD5504_ADDR_NOOP 0
21#define AD5504_ADDR_DAC0 1 21#define AD5504_ADDR_DAC(x) ((x) + 1)
22#define AD5504_ADDR_DAC1 2
23#define AD5504_ADDR_DAC2 3
24#define AD5504_ADDR_DAC3 4
25#define AD5504_ADDR_ALL_DAC 5 22#define AD5504_ADDR_ALL_DAC 5
26#define AD5504_ADDR_CTRL 7 23#define AD5504_ADDR_CTRL 7
27 24
diff --git a/drivers/staging/iio/dac/ad5624r.h b/drivers/staging/iio/dac/ad5624r.h
index b71c6a03e780..5dca3028cdfd 100644
--- a/drivers/staging/iio/dac/ad5624r.h
+++ b/drivers/staging/iio/dac/ad5624r.h
@@ -32,12 +32,12 @@
32 32
33/** 33/**
34 * struct ad5624r_chip_info - chip specific information 34 * struct ad5624r_chip_info - chip specific information
35 * @bits: accuracy of the DAC in bits 35 * @channels: channel spec for the DAC
36 * @int_vref_mv: AD5620/40/60: the internal reference voltage 36 * @int_vref_mv: AD5620/40/60: the internal reference voltage
37 */ 37 */
38 38
39struct ad5624r_chip_info { 39struct ad5624r_chip_info {
40 u8 bits; 40 const struct iio_chan_spec *channels;
41 u16 int_vref_mv; 41 u16 int_vref_mv;
42}; 42};
43 43
diff --git a/drivers/staging/iio/dac/ad5624r_spi.c b/drivers/staging/iio/dac/ad5624r_spi.c
index 6e05f0dbae0b..10c7484366ef 100644
--- a/drivers/staging/iio/dac/ad5624r_spi.c
+++ b/drivers/staging/iio/dac/ad5624r_spi.c
@@ -21,29 +21,51 @@
21#include "dac.h" 21#include "dac.h"
22#include "ad5624r.h" 22#include "ad5624r.h"
23 23
24#define AD5624R_CHANNEL(_chan, _bits) { \
25 .type = IIO_VOLTAGE, \
26 .indexed = 1, \
27 .output = 1, \
28 .channel = (_chan), \
29 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
30 .address = (_chan), \
31 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)), \
32}
33
34#define DECLARE_AD5624R_CHANNELS(_name, _bits) \
35 const struct iio_chan_spec _name##_channels[] = { \
36 AD5624R_CHANNEL(0, _bits), \
37 AD5624R_CHANNEL(1, _bits), \
38 AD5624R_CHANNEL(2, _bits), \
39 AD5624R_CHANNEL(3, _bits), \
40}
41
42static DECLARE_AD5624R_CHANNELS(ad5624r, 12);
43static DECLARE_AD5624R_CHANNELS(ad5644r, 14);
44static DECLARE_AD5624R_CHANNELS(ad5664r, 16);
45
24static const struct ad5624r_chip_info ad5624r_chip_info_tbl[] = { 46static const struct ad5624r_chip_info ad5624r_chip_info_tbl[] = {
25 [ID_AD5624R3] = { 47 [ID_AD5624R3] = {
26 .bits = 12, 48 .channels = ad5624r_channels,
27 .int_vref_mv = 1250,
28 },
29 [ID_AD5644R3] = {
30 .bits = 14,
31 .int_vref_mv = 1250,
32 },
33 [ID_AD5664R3] = {
34 .bits = 16,
35 .int_vref_mv = 1250, 49 .int_vref_mv = 1250,
36 }, 50 },
37 [ID_AD5624R5] = { 51 [ID_AD5624R5] = {
38 .bits = 12, 52 .channels = ad5624r_channels,
39 .int_vref_mv = 2500, 53 .int_vref_mv = 2500,
40 }, 54 },
55 [ID_AD5644R3] = {
56 .channels = ad5644r_channels,
57 .int_vref_mv = 1250,
58 },
41 [ID_AD5644R5] = { 59 [ID_AD5644R5] = {
42 .bits = 14, 60 .channels = ad5644r_channels,
43 .int_vref_mv = 2500, 61 .int_vref_mv = 2500,
44 }, 62 },
63 [ID_AD5664R3] = {
64 .channels = ad5664r_channels,
65 .int_vref_mv = 1250,
66 },
45 [ID_AD5664R5] = { 67 [ID_AD5664R5] = {
46 .bits = 16, 68 .channels = ad5664r_channels,
47 .int_vref_mv = 2500, 69 .int_vref_mv = 2500,
48 }, 70 },
49}; 71};
@@ -70,24 +92,49 @@ static int ad5624r_spi_write(struct spi_device *spi,
70 return spi_write(spi, msg, 3); 92 return spi_write(spi, msg, 3);
71} 93}
72 94
73static ssize_t ad5624r_write_dac(struct device *dev, 95static int ad5624r_read_raw(struct iio_dev *indio_dev,
74 struct device_attribute *attr, 96 struct iio_chan_spec const *chan,
75 const char *buf, size_t len) 97 int *val,
98 int *val2,
99 long m)
76{ 100{
77 long readin;
78 int ret;
79 struct iio_dev *indio_dev = dev_get_drvdata(dev);
80 struct ad5624r_state *st = iio_priv(indio_dev); 101 struct ad5624r_state *st = iio_priv(indio_dev);
81 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 102 unsigned long scale_uv;
82 103
83 ret = strict_strtol(buf, 10, &readin); 104 switch (m) {
84 if (ret) 105 case IIO_CHAN_INFO_SCALE:
85 return ret; 106 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
107 *val = scale_uv / 1000;
108 *val2 = (scale_uv % 1000) * 1000;
109 return IIO_VAL_INT_PLUS_MICRO;
86 110
87 ret = ad5624r_spi_write(st->us, AD5624R_CMD_WRITE_INPUT_N_UPDATE_N, 111 }
88 this_attr->address, readin, 112 return -EINVAL;
89 st->chip_info->bits); 113}
90 return ret ? ret : len; 114
115static int ad5624r_write_raw(struct iio_dev *indio_dev,
116 struct iio_chan_spec const *chan,
117 int val,
118 int val2,
119 long mask)
120{
121 struct ad5624r_state *st = iio_priv(indio_dev);
122 int ret;
123
124 switch (mask) {
125 case 0:
126 if (val >= (1 << chan->scan_type.realbits) || val < 0)
127 return -EINVAL;
128
129 return ad5624r_spi_write(st->us,
130 AD5624R_CMD_WRITE_INPUT_N_UPDATE_N,
131 chan->address, val,
132 chan->scan_type.shift);
133 default:
134 ret = -EINVAL;
135 }
136
137 return -EINVAL;
91} 138}
92 139
93static ssize_t ad5624r_read_powerdown_mode(struct device *dev, 140static ssize_t ad5624r_read_powerdown_mode(struct device *dev,
@@ -161,24 +208,6 @@ static ssize_t ad5624r_write_dac_powerdown(struct device *dev,
161 return ret ? ret : len; 208 return ret ? ret : len;
162} 209}
163 210
164static ssize_t ad5624r_show_scale(struct device *dev,
165 struct device_attribute *attr,
166 char *buf)
167{
168 struct iio_dev *indio_dev = dev_get_drvdata(dev);
169 struct ad5624r_state *st = iio_priv(indio_dev);
170 /* Corresponds to Vref / 2^(bits) */
171 unsigned int scale_uv = (st->vref_mv * 1000) >> st->chip_info->bits;
172
173 return sprintf(buf, "%d.%03d\n", scale_uv / 1000, scale_uv % 1000);
174}
175static IIO_DEVICE_ATTR(out_voltage_scale, S_IRUGO, ad5624r_show_scale, NULL, 0);
176
177static IIO_DEV_ATTR_OUT_RAW(0, ad5624r_write_dac, AD5624R_ADDR_DAC0);
178static IIO_DEV_ATTR_OUT_RAW(1, ad5624r_write_dac, AD5624R_ADDR_DAC1);
179static IIO_DEV_ATTR_OUT_RAW(2, ad5624r_write_dac, AD5624R_ADDR_DAC2);
180static IIO_DEV_ATTR_OUT_RAW(3, ad5624r_write_dac, AD5624R_ADDR_DAC3);
181
182static IIO_DEVICE_ATTR(out_voltage_powerdown_mode, S_IRUGO | 211static IIO_DEVICE_ATTR(out_voltage_powerdown_mode, S_IRUGO |
183 S_IWUSR, ad5624r_read_powerdown_mode, 212 S_IWUSR, ad5624r_read_powerdown_mode,
184 ad5624r_write_powerdown_mode, 0); 213 ad5624r_write_powerdown_mode, 0);
@@ -200,17 +229,12 @@ static IIO_DEV_ATTR_DAC_POWERDOWN(3, ad5624r_read_dac_powerdown,
200 ad5624r_write_dac_powerdown, 3); 229 ad5624r_write_dac_powerdown, 3);
201 230
202static struct attribute *ad5624r_attributes[] = { 231static struct attribute *ad5624r_attributes[] = {
203 &iio_dev_attr_out_voltage0_raw.dev_attr.attr,
204 &iio_dev_attr_out_voltage1_raw.dev_attr.attr,
205 &iio_dev_attr_out_voltage2_raw.dev_attr.attr,
206 &iio_dev_attr_out_voltage3_raw.dev_attr.attr,
207 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr, 232 &iio_dev_attr_out_voltage0_powerdown.dev_attr.attr,
208 &iio_dev_attr_out_voltage1_powerdown.dev_attr.attr, 233 &iio_dev_attr_out_voltage1_powerdown.dev_attr.attr,
209 &iio_dev_attr_out_voltage2_powerdown.dev_attr.attr, 234 &iio_dev_attr_out_voltage2_powerdown.dev_attr.attr,
210 &iio_dev_attr_out_voltage3_powerdown.dev_attr.attr, 235 &iio_dev_attr_out_voltage3_powerdown.dev_attr.attr,
211 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr, 236 &iio_dev_attr_out_voltage_powerdown_mode.dev_attr.attr,
212 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr, 237 &iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
213 &iio_dev_attr_out_voltage_scale.dev_attr.attr,
214 NULL, 238 NULL,
215}; 239};
216 240
@@ -219,6 +243,8 @@ static const struct attribute_group ad5624r_attribute_group = {
219}; 243};
220 244
221static const struct iio_info ad5624r_info = { 245static const struct iio_info ad5624r_info = {
246 .write_raw = ad5624r_write_raw,
247 .read_raw = ad5624r_read_raw,
222 .attrs = &ad5624r_attribute_group, 248 .attrs = &ad5624r_attribute_group,
223 .driver_module = THIS_MODULE, 249 .driver_module = THIS_MODULE,
224}; 250};
@@ -259,6 +285,8 @@ static int __devinit ad5624r_probe(struct spi_device *spi)
259 indio_dev->name = spi_get_device_id(spi)->name; 285 indio_dev->name = spi_get_device_id(spi)->name;
260 indio_dev->info = &ad5624r_info; 286 indio_dev->info = &ad5624r_info;
261 indio_dev->modes = INDIO_DIRECT_MODE; 287 indio_dev->modes = INDIO_DIRECT_MODE;
288 indio_dev->channels = st->chip_info->channels;
289 indio_dev->num_channels = AD5624R_DAC_CHANNELS;
262 290
263 ret = ad5624r_spi_write(spi, AD5624R_CMD_INTERNAL_REFER_SETUP, 0, 291 ret = ad5624r_spi_write(spi, AD5624R_CMD_INTERNAL_REFER_SETUP, 0,
264 !!voltage_uv, 16); 292 !!voltage_uv, 16);
@@ -307,6 +335,7 @@ static const struct spi_device_id ad5624r_id[] = {
307 {"ad5664r5", ID_AD5664R5}, 335 {"ad5664r5", ID_AD5664R5},
308 {} 336 {}
309}; 337};
338MODULE_DEVICE_TABLE(spi, ad5624r_id);
310 339
311static struct spi_driver ad5624r_driver = { 340static struct spi_driver ad5624r_driver = {
312 .driver = { 341 .driver = {
diff --git a/drivers/staging/iio/dac/ad5686.c b/drivers/staging/iio/dac/ad5686.c
index e72db2fbfedf..ce2d6193dd89 100644
--- a/drivers/staging/iio/dac/ad5686.c
+++ b/drivers/staging/iio/dac/ad5686.c
@@ -99,7 +99,7 @@ enum ad5686_supported_device_ids {
99 .indexed = 1, \ 99 .indexed = 1, \
100 .output = 1, \ 100 .output = 1, \
101 .channel = chan, \ 101 .channel = chan, \
102 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), \ 102 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
103 .address = AD5686_ADDR_DAC(chan), \ 103 .address = AD5686_ADDR_DAC(chan), \
104 .scan_type = IIO_ST('u', bits, 16, shift) \ 104 .scan_type = IIO_ST('u', bits, 16, shift) \
105} 105}
@@ -306,7 +306,7 @@ static int ad5686_read_raw(struct iio_dev *indio_dev,
306 *val = ret; 306 *val = ret;
307 return IIO_VAL_INT; 307 return IIO_VAL_INT;
308 break; 308 break;
309 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 309 case IIO_CHAN_INFO_SCALE:
310 scale_uv = (st->vref_mv * 100000) 310 scale_uv = (st->vref_mv * 100000)
311 >> (chan->scan_type.realbits); 311 >> (chan->scan_type.realbits);
312 *val = scale_uv / 100000; 312 *val = scale_uv / 100000;
@@ -437,6 +437,7 @@ static const struct spi_device_id ad5686_id[] = {
437 {"ad5686", ID_AD5686}, 437 {"ad5686", ID_AD5686},
438 {} 438 {}
439}; 439};
440MODULE_DEVICE_TABLE(spi, ad5686_id);
440 441
441static struct spi_driver ad5686_driver = { 442static struct spi_driver ad5686_driver = {
442 .driver = { 443 .driver = {
diff --git a/drivers/staging/iio/dac/ad5764.c b/drivers/staging/iio/dac/ad5764.c
new file mode 100644
index 000000000000..ff91480ae65c
--- /dev/null
+++ b/drivers/staging/iio/dac/ad5764.c
@@ -0,0 +1,393 @@
1/*
2 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
3 * Digital to Analog Converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include "../iio.h"
20#include "../sysfs.h"
21#include "dac.h"
22
23#define AD5764_REG_SF_NOP 0x0
24#define AD5764_REG_SF_CONFIG 0x1
25#define AD5764_REG_SF_CLEAR 0x4
26#define AD5764_REG_SF_LOAD 0x5
27#define AD5764_REG_DATA(x) ((2 << 3) | (x))
28#define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
29#define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
30#define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
31
32#define AD5764_NUM_CHANNELS 4
33
34/**
35 * struct ad5764_chip_info - chip specific information
36 * @int_vref: Value of the internal reference voltage in uV - 0 if external
37 * reference voltage is used
38 * @channel channel specification
39*/
40
41struct ad5764_chip_info {
42 unsigned long int_vref;
43 const struct iio_chan_spec *channels;
44};
45
46/**
47 * struct ad5764_state - driver instance specific data
48 * @spi: spi_device
49 * @chip_info: chip info
50 * @vref_reg: vref supply regulators
51 * @data: spi transfer buffers
52 */
53
54struct ad5764_state {
55 struct spi_device *spi;
56 const struct ad5764_chip_info *chip_info;
57 struct regulator_bulk_data vref_reg[2];
58
59 /*
60 * DMA (thus cache coherency maintenance) requires the
61 * transfer buffers to live in their own cache lines.
62 */
63 union {
64 __be32 d32;
65 u8 d8[4];
66 } data[2] ____cacheline_aligned;
67};
68
69enum ad5764_type {
70 ID_AD5744,
71 ID_AD5744R,
72 ID_AD5764,
73 ID_AD5764R,
74};
75
76#define AD5764_CHANNEL(_chan, _bits) { \
77 .type = IIO_VOLTAGE, \
78 .indexed = 1, \
79 .output = 1, \
80 .channel = (_chan), \
81 .address = (_chan), \
82 .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
83 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
84 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
85 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
86 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
87}
88
89#define DECLARE_AD5764_CHANNELS(_name, _bits) \
90const struct iio_chan_spec _name##_channels[] = { \
91 AD5764_CHANNEL(0, (_bits)), \
92 AD5764_CHANNEL(1, (_bits)), \
93 AD5764_CHANNEL(2, (_bits)), \
94 AD5764_CHANNEL(3, (_bits)), \
95};
96
97static DECLARE_AD5764_CHANNELS(ad5764, 16);
98static DECLARE_AD5764_CHANNELS(ad5744, 14);
99
100static const struct ad5764_chip_info ad5764_chip_infos[] = {
101 [ID_AD5744] = {
102 .int_vref = 0,
103 .channels = ad5744_channels,
104 },
105 [ID_AD5744R] = {
106 .int_vref = 5000000,
107 .channels = ad5744_channels,
108 },
109 [ID_AD5764] = {
110 .int_vref = 0,
111 .channels = ad5764_channels,
112 },
113 [ID_AD5764R] = {
114 .int_vref = 5000000,
115 .channels = ad5764_channels,
116 },
117};
118
119static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
120 unsigned int val)
121{
122 struct ad5764_state *st = iio_priv(indio_dev);
123 int ret;
124
125 mutex_lock(&indio_dev->mlock);
126 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
127
128 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
129 mutex_unlock(&indio_dev->mlock);
130
131 return ret;
132}
133
134static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
135 unsigned int *val)
136{
137 struct ad5764_state *st = iio_priv(indio_dev);
138 struct spi_message m;
139 int ret;
140 struct spi_transfer t[] = {
141 {
142 .tx_buf = &st->data[0].d8[1],
143 .len = 3,
144 .cs_change = 1,
145 }, {
146 .rx_buf = &st->data[1].d8[1],
147 .len = 3,
148 },
149 };
150
151 spi_message_init(&m);
152 spi_message_add_tail(&t[0], &m);
153 spi_message_add_tail(&t[1], &m);
154
155 mutex_lock(&indio_dev->mlock);
156
157 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
158
159 ret = spi_sync(st->spi, &m);
160 if (ret >= 0)
161 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
162
163 mutex_unlock(&indio_dev->mlock);
164
165 return ret;
166}
167
168static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
169{
170 switch (info) {
171 case 0:
172 return AD5764_REG_DATA(chan->address);
173 case IIO_CHAN_INFO_CALIBBIAS:
174 return AD5764_REG_OFFSET(chan->address);
175 case IIO_CHAN_INFO_CALIBSCALE:
176 return AD5764_REG_FINE_GAIN(chan->address);
177 default:
178 break;
179 }
180
181 return 0;
182}
183
184static int ad5764_write_raw(struct iio_dev *indio_dev,
185 struct iio_chan_spec const *chan, int val, int val2, long info)
186{
187 const int max_val = (1 << chan->scan_type.realbits);
188 unsigned int reg;
189
190 switch (info) {
191 case 0:
192 if (val >= max_val || val < 0)
193 return -EINVAL;
194 val <<= chan->scan_type.shift;
195 break;
196 case IIO_CHAN_INFO_CALIBBIAS:
197 if (val >= 128 || val < -128)
198 return -EINVAL;
199 break;
200 case IIO_CHAN_INFO_CALIBSCALE:
201 if (val >= 32 || val < -32)
202 return -EINVAL;
203 break;
204 default:
205 return -EINVAL;
206 }
207
208 reg = ad5764_chan_info_to_reg(chan, info);
209 return ad5764_write(indio_dev, reg, (u16)val);
210}
211
212static int ad5764_get_channel_vref(struct ad5764_state *st,
213 unsigned int channel)
214{
215 if (st->chip_info->int_vref)
216 return st->chip_info->int_vref;
217 else
218 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
219}
220
221static int ad5764_read_raw(struct iio_dev *indio_dev,
222 struct iio_chan_spec const *chan, int *val, int *val2, long info)
223{
224 struct ad5764_state *st = iio_priv(indio_dev);
225 unsigned long scale_uv;
226 unsigned int reg;
227 int vref;
228 int ret;
229
230 switch (info) {
231 case 0:
232 reg = AD5764_REG_DATA(chan->address);
233 ret = ad5764_read(indio_dev, reg, val);
234 if (ret < 0)
235 return ret;
236 *val >>= chan->scan_type.shift;
237 return IIO_VAL_INT;
238 case IIO_CHAN_INFO_CALIBBIAS:
239 reg = AD5764_REG_OFFSET(chan->address);
240 ret = ad5764_read(indio_dev, reg, val);
241 if (ret < 0)
242 return ret;
243 *val = sign_extend32(*val, 7);
244 return IIO_VAL_INT;
245 case IIO_CHAN_INFO_CALIBSCALE:
246 reg = AD5764_REG_FINE_GAIN(chan->address);
247 ret = ad5764_read(indio_dev, reg, val);
248 if (ret < 0)
249 return ret;
250 *val = sign_extend32(*val, 5);
251 return IIO_VAL_INT;
252 case IIO_CHAN_INFO_SCALE:
253 /* vout = 4 * vref + ((dac_code / 65535) - 0.5) */
254 vref = ad5764_get_channel_vref(st, chan->channel);
255 if (vref < 0)
256 return vref;
257
258 scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
259 *val = scale_uv / 100000;
260 *val2 = (scale_uv % 100000) * 10;
261 return IIO_VAL_INT_PLUS_MICRO;
262 case IIO_CHAN_INFO_OFFSET:
263 *val = -(1 << chan->scan_type.realbits) / 2;
264 return IIO_VAL_INT;
265 }
266
267 return -EINVAL;
268}
269
270static const struct iio_info ad5764_info = {
271 .read_raw = ad5764_read_raw,
272 .write_raw = ad5764_write_raw,
273 .driver_module = THIS_MODULE,
274};
275
276static int __devinit ad5764_probe(struct spi_device *spi)
277{
278 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
279 struct iio_dev *indio_dev;
280 struct ad5764_state *st;
281 int ret;
282
283 indio_dev = iio_allocate_device(sizeof(*st));
284 if (indio_dev == NULL) {
285 dev_err(&spi->dev, "Failed to allocate iio device\n");
286 return -ENOMEM;
287 }
288
289 st = iio_priv(indio_dev);
290 spi_set_drvdata(spi, indio_dev);
291
292 st->spi = spi;
293 st->chip_info = &ad5764_chip_infos[type];
294
295 indio_dev->dev.parent = &spi->dev;
296 indio_dev->name = spi_get_device_id(spi)->name;
297 indio_dev->info = &ad5764_info;
298 indio_dev->modes = INDIO_DIRECT_MODE;
299 indio_dev->num_channels = AD5764_NUM_CHANNELS;
300 indio_dev->channels = st->chip_info->channels;
301
302 if (st->chip_info->int_vref == 0) {
303 st->vref_reg[0].supply = "vrefAB";
304 st->vref_reg[1].supply = "vrefCD";
305
306 ret = regulator_bulk_get(&st->spi->dev,
307 ARRAY_SIZE(st->vref_reg), st->vref_reg);
308 if (ret) {
309 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
310 ret);
311 goto error_free;
312 }
313
314 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
315 st->vref_reg);
316 if (ret) {
317 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
318 ret);
319 goto error_free_reg;
320 }
321 }
322
323 ret = iio_device_register(indio_dev);
324 if (ret) {
325 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
326 goto error_disable_reg;
327 }
328
329 return 0;
330
331error_disable_reg:
332 if (st->chip_info->int_vref == 0)
333 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
334error_free_reg:
335 if (st->chip_info->int_vref == 0)
336 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
337error_free:
338 iio_free_device(indio_dev);
339
340 return ret;
341}
342
343static int __devexit ad5764_remove(struct spi_device *spi)
344{
345 struct iio_dev *indio_dev = spi_get_drvdata(spi);
346 struct ad5764_state *st = iio_priv(indio_dev);
347
348 iio_device_unregister(indio_dev);
349
350 if (st->chip_info->int_vref == 0) {
351 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
352 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
353 }
354
355 iio_free_device(indio_dev);
356
357 return 0;
358}
359
360static const struct spi_device_id ad5764_ids[] = {
361 { "ad5744", ID_AD5744 },
362 { "ad5744r", ID_AD5744R },
363 { "ad5764", ID_AD5764 },
364 { "ad5764r", ID_AD5764R },
365 { }
366};
367MODULE_DEVICE_TABLE(spi, ad5764_ids);
368
369static struct spi_driver ad5764_driver = {
370 .driver = {
371 .name = "ad5764",
372 .owner = THIS_MODULE,
373 },
374 .probe = ad5764_probe,
375 .remove = __devexit_p(ad5764_remove),
376 .id_table = ad5764_ids,
377};
378
379static int __init ad5764_spi_init(void)
380{
381 return spi_register_driver(&ad5764_driver);
382}
383module_init(ad5764_spi_init);
384
385static void __exit ad5764_spi_exit(void)
386{
387 spi_unregister_driver(&ad5764_driver);
388}
389module_exit(ad5764_spi_exit);
390
391MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
392MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
393MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/dac/ad5791.c b/drivers/staging/iio/dac/ad5791.c
index 4a80fd822231..ac45636a8d72 100644
--- a/drivers/staging/iio/dac/ad5791.c
+++ b/drivers/staging/iio/dac/ad5791.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * AD5760, AD5780, AD5781, AD5791 Voltage Output Digital to Analog Converter 2 * AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
3 * Converter
3 * 4 *
4 * Copyright 2011 Analog Devices Inc. 5 * Copyright 2011 Analog Devices Inc.
5 * 6 *
@@ -77,8 +78,8 @@ static int ad5791_spi_read(struct spi_device *spi, u8 addr, u32 *val)
77 .indexed = 1, \ 78 .indexed = 1, \
78 .address = AD5791_ADDR_DAC0, \ 79 .address = AD5791_ADDR_DAC0, \
79 .channel = 0, \ 80 .channel = 0, \
80 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED) | \ 81 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | \
81 (1 << IIO_CHAN_INFO_OFFSET_SHARED), \ 82 IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
82 .scan_type = IIO_ST('u', bits, 24, shift) \ 83 .scan_type = IIO_ST('u', bits, 24, shift) \
83} 84}
84 85
@@ -237,11 +238,11 @@ static int ad5791_read_raw(struct iio_dev *indio_dev,
237 *val &= AD5791_DAC_MASK; 238 *val &= AD5791_DAC_MASK;
238 *val >>= chan->scan_type.shift; 239 *val >>= chan->scan_type.shift;
239 return IIO_VAL_INT; 240 return IIO_VAL_INT;
240 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 241 case IIO_CHAN_INFO_SCALE:
241 *val = 0; 242 *val = 0;
242 *val2 = (((u64)st->vref_mv) * 1000000ULL) >> chan->scan_type.realbits; 243 *val2 = (((u64)st->vref_mv) * 1000000ULL) >> chan->scan_type.realbits;
243 return IIO_VAL_INT_PLUS_MICRO; 244 return IIO_VAL_INT_PLUS_MICRO;
244 case (1 << IIO_CHAN_INFO_OFFSET_SHARED): 245 case IIO_CHAN_INFO_OFFSET:
245 val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits); 246 val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
246 do_div(val64, st->vref_mv); 247 do_div(val64, st->vref_mv);
247 *val = -val64; 248 *val = -val64;
@@ -397,9 +398,11 @@ static const struct spi_device_id ad5791_id[] = {
397 {"ad5760", ID_AD5760}, 398 {"ad5760", ID_AD5760},
398 {"ad5780", ID_AD5780}, 399 {"ad5780", ID_AD5780},
399 {"ad5781", ID_AD5781}, 400 {"ad5781", ID_AD5781},
401 {"ad5790", ID_AD5791},
400 {"ad5791", ID_AD5791}, 402 {"ad5791", ID_AD5791},
401 {} 403 {}
402}; 404};
405MODULE_DEVICE_TABLE(spi, ad5791_id);
403 406
404static struct spi_driver ad5791_driver = { 407static struct spi_driver ad5791_driver = {
405 .driver = { 408 .driver = {
@@ -413,5 +416,5 @@ static struct spi_driver ad5791_driver = {
413module_spi_driver(ad5791_driver); 416module_spi_driver(ad5791_driver);
414 417
415MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 418MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
416MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5791 DAC"); 419MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
417MODULE_LICENSE("GPL v2"); 420MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/dds/ad5930.c b/drivers/staging/iio/dds/ad5930.c
index 4a360d044a36..9c32d1beae25 100644
--- a/drivers/staging/iio/dds/ad5930.c
+++ b/drivers/staging/iio/dds/ad5930.c
@@ -148,3 +148,4 @@ module_spi_driver(ad5930_driver);
148MODULE_AUTHOR("Cliff Cai"); 148MODULE_AUTHOR("Cliff Cai");
149MODULE_DESCRIPTION("Analog Devices ad5930 driver"); 149MODULE_DESCRIPTION("Analog Devices ad5930 driver");
150MODULE_LICENSE("GPL v2"); 150MODULE_LICENSE("GPL v2");
151MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/dds/ad9832.c b/drivers/staging/iio/dds/ad9832.c
index cc32fd65b8b3..2ccf25dd9289 100644
--- a/drivers/staging/iio/dds/ad9832.c
+++ b/drivers/staging/iio/dds/ad9832.c
@@ -88,7 +88,7 @@ static ssize_t ad9832_write(struct device *dev,
88 goto error_ret; 88 goto error_ret;
89 89
90 mutex_lock(&indio_dev->mlock); 90 mutex_lock(&indio_dev->mlock);
91 switch (this_attr->address) { 91 switch ((u32) this_attr->address) {
92 case AD9832_FREQ0HM: 92 case AD9832_FREQ0HM:
93 case AD9832_FREQ1HM: 93 case AD9832_FREQ1HM:
94 ret = ad9832_write_frequency(st, this_attr->address, val); 94 ret = ad9832_write_frequency(st, this_attr->address, val);
@@ -344,11 +344,11 @@ static const struct spi_device_id ad9832_id[] = {
344 {"ad9835", 0}, 344 {"ad9835", 0},
345 {} 345 {}
346}; 346};
347MODULE_DEVICE_TABLE(spi, ad9832_id);
347 348
348static struct spi_driver ad9832_driver = { 349static struct spi_driver ad9832_driver = {
349 .driver = { 350 .driver = {
350 .name = "ad9832", 351 .name = "ad9832",
351 .bus = &spi_bus_type,
352 .owner = THIS_MODULE, 352 .owner = THIS_MODULE,
353 }, 353 },
354 .probe = ad9832_probe, 354 .probe = ad9832_probe,
@@ -360,4 +360,3 @@ module_spi_driver(ad9832_driver);
360MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 360MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
361MODULE_DESCRIPTION("Analog Devices AD9832/AD9835 DDS"); 361MODULE_DESCRIPTION("Analog Devices AD9832/AD9835 DDS");
362MODULE_LICENSE("GPL v2"); 362MODULE_LICENSE("GPL v2");
363MODULE_ALIAS("spi:ad9832");
diff --git a/drivers/staging/iio/dds/ad9834.c b/drivers/staging/iio/dds/ad9834.c
index 51fda6f69815..5e67104fea18 100644
--- a/drivers/staging/iio/dds/ad9834.c
+++ b/drivers/staging/iio/dds/ad9834.c
@@ -77,7 +77,7 @@ static ssize_t ad9834_write(struct device *dev,
77 goto error_ret; 77 goto error_ret;
78 78
79 mutex_lock(&indio_dev->mlock); 79 mutex_lock(&indio_dev->mlock);
80 switch (this_attr->address) { 80 switch ((u32) this_attr->address) {
81 case AD9834_REG_FREQ0: 81 case AD9834_REG_FREQ0:
82 case AD9834_REG_FREQ1: 82 case AD9834_REG_FREQ1:
83 ret = ad9834_write_frequency(st, this_attr->address, val); 83 ret = ad9834_write_frequency(st, this_attr->address, val);
@@ -153,7 +153,7 @@ static ssize_t ad9834_store_wavetype(struct device *dev,
153 153
154 mutex_lock(&indio_dev->mlock); 154 mutex_lock(&indio_dev->mlock);
155 155
156 switch (this_attr->address) { 156 switch ((u32) this_attr->address) {
157 case 0: 157 case 0:
158 if (sysfs_streq(buf, "sine")) { 158 if (sysfs_streq(buf, "sine")) {
159 st->control &= ~AD9834_MODE; 159 st->control &= ~AD9834_MODE;
@@ -435,11 +435,11 @@ static const struct spi_device_id ad9834_id[] = {
435 {"ad9838", ID_AD9838}, 435 {"ad9838", ID_AD9838},
436 {} 436 {}
437}; 437};
438MODULE_DEVICE_TABLE(spi, ad9834_id);
438 439
439static struct spi_driver ad9834_driver = { 440static struct spi_driver ad9834_driver = {
440 .driver = { 441 .driver = {
441 .name = "ad9834", 442 .name = "ad9834",
442 .bus = &spi_bus_type,
443 .owner = THIS_MODULE, 443 .owner = THIS_MODULE,
444 }, 444 },
445 .probe = ad9834_probe, 445 .probe = ad9834_probe,
@@ -451,4 +451,3 @@ module_spi_driver(ad9834_driver);
451MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 451MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
452MODULE_DESCRIPTION("Analog Devices AD9833/AD9834/AD9837/AD9838 DDS"); 452MODULE_DESCRIPTION("Analog Devices AD9833/AD9834/AD9837/AD9838 DDS");
453MODULE_LICENSE("GPL v2"); 453MODULE_LICENSE("GPL v2");
454MODULE_ALIAS("spi:ad9834");
diff --git a/drivers/staging/iio/dds/ad9850.c b/drivers/staging/iio/dds/ad9850.c
index f9c96afcb996..f4f731bb2191 100644
--- a/drivers/staging/iio/dds/ad9850.c
+++ b/drivers/staging/iio/dds/ad9850.c
@@ -134,3 +134,4 @@ module_spi_driver(ad9850_driver);
134MODULE_AUTHOR("Cliff Cai"); 134MODULE_AUTHOR("Cliff Cai");
135MODULE_DESCRIPTION("Analog Devices ad9850 driver"); 135MODULE_DESCRIPTION("Analog Devices ad9850 driver");
136MODULE_LICENSE("GPL v2"); 136MODULE_LICENSE("GPL v2");
137MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/dds/ad9852.c b/drivers/staging/iio/dds/ad9852.c
index 9fc73fdc9c3b..554266c615a8 100644
--- a/drivers/staging/iio/dds/ad9852.c
+++ b/drivers/staging/iio/dds/ad9852.c
@@ -285,3 +285,4 @@ module_spi_driver(ad9852_driver);
285MODULE_AUTHOR("Cliff Cai"); 285MODULE_AUTHOR("Cliff Cai");
286MODULE_DESCRIPTION("Analog Devices ad9852 driver"); 286MODULE_DESCRIPTION("Analog Devices ad9852 driver");
287MODULE_LICENSE("GPL v2"); 287MODULE_LICENSE("GPL v2");
288MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/dds/ad9910.c b/drivers/staging/iio/dds/ad9910.c
index 57046b03121f..3985766d6f87 100644
--- a/drivers/staging/iio/dds/ad9910.c
+++ b/drivers/staging/iio/dds/ad9910.c
@@ -418,3 +418,4 @@ module_spi_driver(ad9910_driver);
418MODULE_AUTHOR("Cliff Cai"); 418MODULE_AUTHOR("Cliff Cai");
419MODULE_DESCRIPTION("Analog Devices ad9910 driver"); 419MODULE_DESCRIPTION("Analog Devices ad9910 driver");
420MODULE_LICENSE("GPL v2"); 420MODULE_LICENSE("GPL v2");
421MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/dds/ad9951.c b/drivers/staging/iio/dds/ad9951.c
index d29130e9acdf..4d150048002a 100644
--- a/drivers/staging/iio/dds/ad9951.c
+++ b/drivers/staging/iio/dds/ad9951.c
@@ -229,3 +229,4 @@ module_spi_driver(ad9951_driver);
229MODULE_AUTHOR("Cliff Cai"); 229MODULE_AUTHOR("Cliff Cai");
230MODULE_DESCRIPTION("Analog Devices ad9951 driver"); 230MODULE_DESCRIPTION("Analog Devices ad9951 driver");
231MODULE_LICENSE("GPL v2"); 231MODULE_LICENSE("GPL v2");
232MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/staging/iio/events.h b/drivers/staging/iio/events.h
new file mode 100644
index 000000000000..bfb63400fa60
--- /dev/null
+++ b/drivers/staging/iio/events.h
@@ -0,0 +1,103 @@
1/* The industrial I/O - event passing to userspace
2 *
3 * Copyright (c) 2008-2011 Jonathan Cameron
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 */
9#ifndef _IIO_EVENTS_H_
10#define _IIO_EVENTS_H_
11
12#include <linux/ioctl.h>
13#include <linux/types.h>
14#include "types.h"
15
16/**
17 * struct iio_event_data - The actual event being pushed to userspace
18 * @id: event identifier
19 * @timestamp: best estimate of time of event occurrence (often from
20 * the interrupt handler)
21 */
22struct iio_event_data {
23 __u64 id;
24 __s64 timestamp;
25};
26
27#define IIO_GET_EVENT_FD_IOCTL _IOR('i', 0x90, int)
28
29enum iio_event_type {
30 IIO_EV_TYPE_THRESH,
31 IIO_EV_TYPE_MAG,
32 IIO_EV_TYPE_ROC,
33 IIO_EV_TYPE_THRESH_ADAPTIVE,
34 IIO_EV_TYPE_MAG_ADAPTIVE,
35};
36
37enum iio_event_direction {
38 IIO_EV_DIR_EITHER,
39 IIO_EV_DIR_RISING,
40 IIO_EV_DIR_FALLING,
41};
42
43/**
44 * IIO_EVENT_CODE() - create event identifier
45 * @chan_type: Type of the channel. Should be one of enum iio_chan_type.
46 * @diff: Whether the event is for an differential channel or not.
47 * @modifier: Modifier for the channel. Should be one of enum iio_modifier.
48 * @direction: Direction of the event. One of enum iio_event_direction.
49 * @type: Type of the event. Should be one enum iio_event_type.
50 * @chan: Channel number for non-differential channels.
51 * @chan1: First channel number for differential channels.
52 * @chan2: Second channel number for differential channels.
53 */
54
55#define IIO_EVENT_CODE(chan_type, diff, modifier, direction, \
56 type, chan, chan1, chan2) \
57 (((u64)type << 56) | ((u64)diff << 55) | \
58 ((u64)direction << 48) | ((u64)modifier << 40) | \
59 ((u64)chan_type << 32) | (((u16)chan2) << 16) | ((u16)chan1) | \
60 ((u16)chan))
61
62
63#define IIO_EV_DIR_MAX 4
64#define IIO_EV_BIT(type, direction) \
65 (1 << (type*IIO_EV_DIR_MAX + direction))
66
67/**
68 * IIO_MOD_EVENT_CODE() - create event identifier for modified channels
69 * @chan_type: Type of the channel. Should be one of enum iio_chan_type.
70 * @number: Channel number.
71 * @modifier: Modifier for the channel. Should be one of enum iio_modifier.
72 * @type: Type of the event. Should be one enum iio_event_type.
73 * @direction: Direction of the event. One of enum iio_event_direction.
74 */
75
76#define IIO_MOD_EVENT_CODE(chan_type, number, modifier, \
77 type, direction) \
78 IIO_EVENT_CODE(chan_type, 0, modifier, direction, type, number, 0, 0)
79
80/**
81 * IIO_UNMOD_EVENT_CODE() - create event identifier for unmodified channels
82 * @chan_type: Type of the channel. Should be one of enum iio_chan_type.
83 * @number: Channel number.
84 * @type: Type of the event. Should be one enum iio_event_type.
85 * @direction: Direction of the event. One of enum iio_event_direction.
86 */
87
88#define IIO_UNMOD_EVENT_CODE(chan_type, number, type, direction) \
89 IIO_EVENT_CODE(chan_type, 0, 0, direction, type, number, 0, 0)
90
91#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
92
93#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0xCF)
94
95#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
96
97/* Event code number extraction depends on which type of event we have.
98 * Perhaps review this function in the future*/
99#define IIO_EVENT_CODE_EXTRACT_NUM(mask) ((__s16)(mask & 0xFFFF))
100
101#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
102
103#endif
diff --git a/drivers/staging/iio/gyro/Kconfig b/drivers/staging/iio/gyro/Kconfig
index 22aea5b4e61d..ea295b25308c 100644
--- a/drivers/staging/iio/gyro/Kconfig
+++ b/drivers/staging/iio/gyro/Kconfig
@@ -37,11 +37,11 @@ config ADIS16260
37 will be called adis16260. 37 will be called adis16260.
38 38
39config ADXRS450 39config ADXRS450
40 tristate "Analog Devices ADXRS450 Digital Output Gyroscope SPI driver" 40 tristate "Analog Devices ADXRS450/3 Digital Output Gyroscope SPI driver"
41 depends on SPI 41 depends on SPI
42 help 42 help
43 Say yes here to build support for Analog Devices ADXRS450 programmable 43 Say yes here to build support for Analog Devices ADXRS450 and ADXRS453
44 digital output gyroscope. 44 programmable digital output gyroscope.
45 45
46 This driver can also be built as a module. If so, the module 46 This driver can also be built as a module. If so, the module
47 will be called adxrs450. 47 will be called adxrs450.
diff --git a/drivers/staging/iio/gyro/adis16060_core.c b/drivers/staging/iio/gyro/adis16060_core.c
index ff1b5a82b3d6..c0ca7093e0ed 100644
--- a/drivers/staging/iio/gyro/adis16060_core.c
+++ b/drivers/staging/iio/gyro/adis16060_core.c
@@ -98,11 +98,11 @@ static int adis16060_read_raw(struct iio_dev *indio_dev,
98 mutex_unlock(&indio_dev->mlock); 98 mutex_unlock(&indio_dev->mlock);
99 *val = tval; 99 *val = tval;
100 return IIO_VAL_INT; 100 return IIO_VAL_INT;
101 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 101 case IIO_CHAN_INFO_OFFSET:
102 *val = -7; 102 *val = -7;
103 *val2 = 461117; 103 *val2 = 461117;
104 return IIO_VAL_INT_PLUS_MICRO; 104 return IIO_VAL_INT_PLUS_MICRO;
105 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 105 case IIO_CHAN_INFO_SCALE:
106 *val = 0; 106 *val = 0;
107 *val2 = 34000; 107 *val2 = 34000;
108 return IIO_VAL_INT_PLUS_MICRO; 108 return IIO_VAL_INT_PLUS_MICRO;
@@ -136,8 +136,8 @@ static const struct iio_chan_spec adis16060_channels[] = {
136 .type = IIO_TEMP, 136 .type = IIO_TEMP,
137 .indexed = 1, 137 .indexed = 1,
138 .channel = 0, 138 .channel = 0,
139 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 139 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
140 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 140 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
141 .address = ADIS16060_TEMP_OUT, 141 .address = ADIS16060_TEMP_OUT,
142 } 142 }
143}; 143};
diff --git a/drivers/staging/iio/gyro/adis16080_core.c b/drivers/staging/iio/gyro/adis16080_core.c
index 9405f2d368ee..1815490db8b4 100644
--- a/drivers/staging/iio/gyro/adis16080_core.c
+++ b/drivers/staging/iio/gyro/adis16080_core.c
@@ -194,3 +194,4 @@ module_spi_driver(adis16080_driver);
194MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 194MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
195MODULE_DESCRIPTION("Analog Devices ADIS16080/100 Yaw Rate Gyroscope Driver"); 195MODULE_DESCRIPTION("Analog Devices ADIS16080/100 Yaw Rate Gyroscope Driver");
196MODULE_LICENSE("GPL v2"); 196MODULE_LICENSE("GPL v2");
197MODULE_ALIAS("spi:adis16080");
diff --git a/drivers/staging/iio/gyro/adis16130_core.c b/drivers/staging/iio/gyro/adis16130_core.c
index c9aaca9631f4..947eb86f05d8 100644
--- a/drivers/staging/iio/gyro/adis16130_core.c
+++ b/drivers/staging/iio/gyro/adis16130_core.c
@@ -173,3 +173,4 @@ module_spi_driver(adis16130_driver);
173MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 173MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
174MODULE_DESCRIPTION("Analog Devices ADIS16130 High Precision Angular Rate"); 174MODULE_DESCRIPTION("Analog Devices ADIS16130 High Precision Angular Rate");
175MODULE_LICENSE("GPL v2"); 175MODULE_LICENSE("GPL v2");
176MODULE_ALIAS("spi:adis16130");
diff --git a/drivers/staging/iio/gyro/adis16260_core.c b/drivers/staging/iio/gyro/adis16260_core.c
index 886dddf867ef..8f6af47e9559 100644
--- a/drivers/staging/iio/gyro/adis16260_core.c
+++ b/drivers/staging/iio/gyro/adis16260_core.c
@@ -20,7 +20,7 @@
20 20
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../buffer.h"
24 24
25#include "adis16260.h" 25#include "adis16260.h"
26 26
@@ -390,9 +390,9 @@ enum adis16260_channel {
390#define ADIS16260_GYRO_CHANNEL_SET(axis, mod) \ 390#define ADIS16260_GYRO_CHANNEL_SET(axis, mod) \
391 struct iio_chan_spec adis16260_channels_##axis[] = { \ 391 struct iio_chan_spec adis16260_channels_##axis[] = { \
392 IIO_CHAN(IIO_ANGL_VEL, 1, 0, 0, NULL, 0, mod, \ 392 IIO_CHAN(IIO_ANGL_VEL, 1, 0, 0, NULL, 0, mod, \
393 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | \ 393 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT | \
394 (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) | \ 394 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
395 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 395 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
396 gyro, ADIS16260_SCAN_GYRO, \ 396 gyro, ADIS16260_SCAN_GYRO, \
397 IIO_ST('s', 14, 16, 0), 0), \ 397 IIO_ST('s', 14, 16, 0), 0), \
398 IIO_CHAN(IIO_ANGL, 1, 0, 0, NULL, 0, mod, \ 398 IIO_CHAN(IIO_ANGL, 1, 0, 0, NULL, 0, mod, \
@@ -400,16 +400,16 @@ enum adis16260_channel {
400 angle, ADIS16260_SCAN_ANGL, \ 400 angle, ADIS16260_SCAN_ANGL, \
401 IIO_ST('u', 14, 16, 0), 0), \ 401 IIO_ST('u', 14, 16, 0), 0), \
402 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, \ 402 IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0, \
403 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | \ 403 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \
404 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 404 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
405 temp, ADIS16260_SCAN_TEMP, \ 405 temp, ADIS16260_SCAN_TEMP, \
406 IIO_ST('u', 12, 16, 0), 0), \ 406 IIO_ST('u', 12, 16, 0), 0), \
407 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0, \ 407 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "supply", 0, 0, \
408 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 408 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
409 in_supply, ADIS16260_SCAN_SUPPLY, \ 409 in_supply, ADIS16260_SCAN_SUPPLY, \
410 IIO_ST('u', 12, 16, 0), 0), \ 410 IIO_ST('u', 12, 16, 0), 0), \
411 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, \ 411 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, NULL, 1, 0, \
412 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 412 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
413 in_aux, ADIS16260_SCAN_AUX_ADC, \ 413 in_aux, ADIS16260_SCAN_AUX_ADC, \
414 IIO_ST('u', 12, 16, 0), 0), \ 414 IIO_ST('u', 12, 16, 0), 0), \
415 IIO_CHAN_SOFT_TIMESTAMP(5) \ 415 IIO_CHAN_SOFT_TIMESTAMP(5) \
@@ -464,8 +464,7 @@ static int adis16260_read_raw(struct iio_dev *indio_dev,
464 *val = val16; 464 *val = val16;
465 mutex_unlock(&indio_dev->mlock); 465 mutex_unlock(&indio_dev->mlock);
466 return IIO_VAL_INT; 466 return IIO_VAL_INT;
467 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 467 case IIO_CHAN_INFO_SCALE:
468 case (1 << IIO_CHAN_INFO_SCALE_SHARED):
469 switch (chan->type) { 468 switch (chan->type) {
470 case IIO_ANGL_VEL: 469 case IIO_ANGL_VEL:
471 *val = 0; 470 *val = 0;
@@ -489,10 +488,10 @@ static int adis16260_read_raw(struct iio_dev *indio_dev,
489 return -EINVAL; 488 return -EINVAL;
490 } 489 }
491 break; 490 break;
492 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 491 case IIO_CHAN_INFO_OFFSET:
493 *val = 25; 492 *val = 25;
494 return IIO_VAL_INT; 493 return IIO_VAL_INT;
495 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 494 case IIO_CHAN_INFO_CALIBBIAS:
496 switch (chan->type) { 495 switch (chan->type) {
497 case IIO_ANGL_VEL: 496 case IIO_ANGL_VEL:
498 bits = 12; 497 bits = 12;
@@ -512,7 +511,7 @@ static int adis16260_read_raw(struct iio_dev *indio_dev,
512 *val = val16; 511 *val = val16;
513 mutex_unlock(&indio_dev->mlock); 512 mutex_unlock(&indio_dev->mlock);
514 return IIO_VAL_INT; 513 return IIO_VAL_INT;
515 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 514 case IIO_CHAN_INFO_CALIBSCALE:
516 switch (chan->type) { 515 switch (chan->type) {
517 case IIO_ANGL_VEL: 516 case IIO_ANGL_VEL:
518 bits = 12; 517 bits = 12;
@@ -544,11 +543,11 @@ static int adis16260_write_raw(struct iio_dev *indio_dev,
544 s16 val16; 543 s16 val16;
545 u8 addr; 544 u8 addr;
546 switch (mask) { 545 switch (mask) {
547 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 546 case IIO_CHAN_INFO_CALIBBIAS:
548 val16 = val & ((1 << bits) - 1); 547 val16 = val & ((1 << bits) - 1);
549 addr = adis16260_addresses[chan->address][1]; 548 addr = adis16260_addresses[chan->address][1];
550 return adis16260_spi_write_reg_16(indio_dev, addr, val16); 549 return adis16260_spi_write_reg_16(indio_dev, addr, val16);
551 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 550 case IIO_CHAN_INFO_CALIBSCALE:
552 val16 = val & ((1 << bits) - 1); 551 val16 = val & ((1 << bits) - 1);
553 addr = adis16260_addresses[chan->address][2]; 552 addr = adis16260_addresses[chan->address][2];
554 return adis16260_spi_write_reg_16(indio_dev, addr, val16); 553 return adis16260_spi_write_reg_16(indio_dev, addr, val16);
@@ -633,11 +632,16 @@ static int __devinit adis16260_probe(struct spi_device *spi)
633 } 632 }
634 if (indio_dev->buffer) { 633 if (indio_dev->buffer) {
635 /* Set default scan mode */ 634 /* Set default scan mode */
636 iio_scan_mask_set(indio_dev->buffer, ADIS16260_SCAN_SUPPLY); 635 iio_scan_mask_set(indio_dev, indio_dev->buffer,
637 iio_scan_mask_set(indio_dev->buffer, ADIS16260_SCAN_GYRO); 636 ADIS16260_SCAN_SUPPLY);
638 iio_scan_mask_set(indio_dev->buffer, ADIS16260_SCAN_AUX_ADC); 637 iio_scan_mask_set(indio_dev, indio_dev->buffer,
639 iio_scan_mask_set(indio_dev->buffer, ADIS16260_SCAN_TEMP); 638 ADIS16260_SCAN_GYRO);
640 iio_scan_mask_set(indio_dev->buffer, ADIS16260_SCAN_ANGL); 639 iio_scan_mask_set(indio_dev, indio_dev->buffer,
640 ADIS16260_SCAN_AUX_ADC);
641 iio_scan_mask_set(indio_dev, indio_dev->buffer,
642 ADIS16260_SCAN_TEMP);
643 iio_scan_mask_set(indio_dev, indio_dev->buffer,
644 ADIS16260_SCAN_ANGL);
641 } 645 }
642 if (spi->irq) { 646 if (spi->irq) {
643 ret = adis16260_probe_trigger(indio_dev); 647 ret = adis16260_probe_trigger(indio_dev);
@@ -701,6 +705,7 @@ static const struct spi_device_id adis16260_id[] = {
701 {"adis16251", 1}, 705 {"adis16251", 1},
702 {} 706 {}
703}; 707};
708MODULE_DEVICE_TABLE(spi, adis16260_id);
704 709
705static struct spi_driver adis16260_driver = { 710static struct spi_driver adis16260_driver = {
706 .driver = { 711 .driver = {
diff --git a/drivers/staging/iio/gyro/adis16260_ring.c b/drivers/staging/iio/gyro/adis16260_ring.c
index 52a9e784e7c8..699a6152c409 100644
--- a/drivers/staging/iio/gyro/adis16260_ring.c
+++ b/drivers/staging/iio/gyro/adis16260_ring.c
@@ -74,9 +74,10 @@ static irqreturn_t adis16260_trigger_handler(int irq, void *p)
74 return -ENOMEM; 74 return -ENOMEM;
75 } 75 }
76 76
77 if (ring->scan_count && 77 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength) &&
78 adis16260_read_ring_data(&indio_dev->dev, st->rx) >= 0) 78 adis16260_read_ring_data(&indio_dev->dev, st->rx) >= 0)
79 for (; i < ring->scan_count; i++) 79 for (; i < bitmap_weight(indio_dev->active_scan_mask,
80 indio_dev->masklength); i++)
80 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2])); 81 data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
81 82
82 /* Guaranteed to be aligned with 8 byte boundary */ 83 /* Guaranteed to be aligned with 8 byte boundary */
@@ -116,10 +117,8 @@ int adis16260_configure_ring(struct iio_dev *indio_dev)
116 indio_dev->buffer = ring; 117 indio_dev->buffer = ring;
117 /* Effectively select the ring buffer implementation */ 118 /* Effectively select the ring buffer implementation */
118 ring->access = &ring_sw_access_funcs; 119 ring->access = &ring_sw_access_funcs;
119 ring->bpe = 2;
120 ring->scan_timestamp = true; 120 ring->scan_timestamp = true;
121 ring->setup_ops = &adis16260_ring_setup_ops; 121 indio_dev->setup_ops = &adis16260_ring_setup_ops;
122 ring->owner = THIS_MODULE;
123 122
124 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 123 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
125 &adis16260_trigger_handler, 124 &adis16260_trigger_handler,
diff --git a/drivers/staging/iio/gyro/adxrs450.h b/drivers/staging/iio/gyro/adxrs450.h
index b6b682876406..af0c870100b6 100644
--- a/drivers/staging/iio/gyro/adxrs450.h
+++ b/drivers/staging/iio/gyro/adxrs450.h
@@ -39,6 +39,11 @@
39 39
40#define ADXRS450_GET_ST(a) ((a >> 26) & 0x3) 40#define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
41 41
42enum {
43 ID_ADXRS450,
44 ID_ADXRS453,
45};
46
42/** 47/**
43 * struct adxrs450_state - device instance specific data 48 * struct adxrs450_state - device instance specific data
44 * @us: actual spi_device 49 * @us: actual spi_device
diff --git a/drivers/staging/iio/gyro/adxrs450_core.c b/drivers/staging/iio/gyro/adxrs450_core.c
index 70fd468b6850..15e2496f70c8 100644
--- a/drivers/staging/iio/gyro/adxrs450_core.c
+++ b/drivers/staging/iio/gyro/adxrs450_core.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * ADXRS450 Digital Output Gyroscope Driver 2 * ADXRS450/ADXRS453 Digital Output Gyroscope Driver
3 * 3 *
4 * Copyright 2011 Analog Devices Inc. 4 * Copyright 2011 Analog Devices Inc.
5 * 5 *
@@ -243,7 +243,7 @@ static int adxrs450_write_raw(struct iio_dev *indio_dev,
243{ 243{
244 int ret; 244 int ret;
245 switch (mask) { 245 switch (mask) {
246 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 246 case IIO_CHAN_INFO_CALIBBIAS:
247 ret = adxrs450_spi_write_reg_16(indio_dev, 247 ret = adxrs450_spi_write_reg_16(indio_dev,
248 ADXRS450_DNC1, 248 ADXRS450_DNC1,
249 val & 0x3FF); 249 val & 0x3FF);
@@ -263,7 +263,7 @@ static int adxrs450_read_raw(struct iio_dev *indio_dev,
263{ 263{
264 int ret; 264 int ret;
265 s16 t; 265 s16 t;
266 u16 ut; 266
267 switch (mask) { 267 switch (mask) {
268 case 0: 268 case 0:
269 switch (chan->type) { 269 switch (chan->type) {
@@ -276,10 +276,10 @@ static int adxrs450_read_raw(struct iio_dev *indio_dev,
276 break; 276 break;
277 case IIO_TEMP: 277 case IIO_TEMP:
278 ret = adxrs450_spi_read_reg_16(indio_dev, 278 ret = adxrs450_spi_read_reg_16(indio_dev,
279 ADXRS450_TEMP1, &ut); 279 ADXRS450_TEMP1, &t);
280 if (ret) 280 if (ret)
281 break; 281 break;
282 *val = ut; 282 *val = (t >> 6) + 225;
283 ret = IIO_VAL_INT; 283 ret = IIO_VAL_INT;
284 break; 284 break;
285 default: 285 default:
@@ -287,13 +287,34 @@ static int adxrs450_read_raw(struct iio_dev *indio_dev,
287 break; 287 break;
288 } 288 }
289 break; 289 break;
290 case (1 << IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE): 290 case IIO_CHAN_INFO_SCALE:
291 switch (chan->type) {
292 case IIO_ANGL_VEL:
293 *val = 0;
294 *val2 = 218166;
295 return IIO_VAL_INT_PLUS_NANO;
296 case IIO_TEMP:
297 *val = 200;
298 *val2 = 0;
299 return IIO_VAL_INT;
300 default:
301 return -EINVAL;
302 }
303 break;
304 case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
291 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t); 305 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
292 if (ret) 306 if (ret)
293 break; 307 break;
294 *val = t; 308 *val = t;
295 ret = IIO_VAL_INT; 309 ret = IIO_VAL_INT;
296 break; 310 break;
311 case IIO_CHAN_INFO_CALIBBIAS:
312 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
313 if (ret)
314 break;
315 *val = t;
316 ret = IIO_VAL_INT;
317 break;
297 default: 318 default:
298 ret = -EINVAL; 319 ret = -EINVAL;
299 break; 320 break;
@@ -302,18 +323,36 @@ static int adxrs450_read_raw(struct iio_dev *indio_dev,
302 return ret; 323 return ret;
303} 324}
304 325
305static const struct iio_chan_spec adxrs450_channels[] = { 326static const struct iio_chan_spec adxrs450_channels[2][2] = {
306 { 327 [ID_ADXRS450] = {
307 .type = IIO_ANGL_VEL, 328 {
308 .modified = 1, 329 .type = IIO_ANGL_VEL,
309 .channel2 = IIO_MOD_Z, 330 .modified = 1,
310 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 331 .channel2 = IIO_MOD_Z,
311 (1 << IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE) 332 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
312 }, { 333 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT |
313 .type = IIO_TEMP, 334 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
314 .indexed = 1, 335 }, {
315 .channel = 0, 336 .type = IIO_TEMP,
316 } 337 .indexed = 1,
338 .channel = 0,
339 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
340 }
341 },
342 [ID_ADXRS453] = {
343 {
344 .type = IIO_ANGL_VEL,
345 .modified = 1,
346 .channel2 = IIO_MOD_Z,
347 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
348 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT,
349 }, {
350 .type = IIO_TEMP,
351 .indexed = 1,
352 .channel = 0,
353 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
354 }
355 },
317}; 356};
318 357
319static const struct iio_info adxrs450_info = { 358static const struct iio_info adxrs450_info = {
@@ -343,7 +382,8 @@ static int __devinit adxrs450_probe(struct spi_device *spi)
343 indio_dev->dev.parent = &spi->dev; 382 indio_dev->dev.parent = &spi->dev;
344 indio_dev->info = &adxrs450_info; 383 indio_dev->info = &adxrs450_info;
345 indio_dev->modes = INDIO_DIRECT_MODE; 384 indio_dev->modes = INDIO_DIRECT_MODE;
346 indio_dev->channels = adxrs450_channels; 385 indio_dev->channels =
386 adxrs450_channels[spi_get_device_id(spi)->driver_data];
347 indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels); 387 indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
348 indio_dev->name = spi->dev.driver->name; 388 indio_dev->name = spi->dev.driver->name;
349 389
@@ -373,6 +413,13 @@ static int adxrs450_remove(struct spi_device *spi)
373 return 0; 413 return 0;
374} 414}
375 415
416static const struct spi_device_id adxrs450_id[] = {
417 {"adxrs450", ID_ADXRS450},
418 {"adxrs453", ID_ADXRS453},
419 {}
420};
421MODULE_DEVICE_TABLE(spi, adxrs450_id);
422
376static struct spi_driver adxrs450_driver = { 423static struct spi_driver adxrs450_driver = {
377 .driver = { 424 .driver = {
378 .name = "adxrs450", 425 .name = "adxrs450",
@@ -380,9 +427,10 @@ static struct spi_driver adxrs450_driver = {
380 }, 427 },
381 .probe = adxrs450_probe, 428 .probe = adxrs450_probe,
382 .remove = __devexit_p(adxrs450_remove), 429 .remove = __devexit_p(adxrs450_remove),
430 .id_table = adxrs450_id,
383}; 431};
384module_spi_driver(adxrs450_driver); 432module_spi_driver(adxrs450_driver);
385 433
386MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>"); 434MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
387MODULE_DESCRIPTION("Analog Devices ADXRS450 Gyroscope SPI driver"); 435MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
388MODULE_LICENSE("GPL v2"); 436MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/iio.h b/drivers/staging/iio/iio.h
index f3d88cd7e8a0..be6ced31f65e 100644
--- a/drivers/staging/iio/iio.h
+++ b/drivers/staging/iio/iio.h
@@ -7,13 +7,12 @@
7 * under the terms of the GNU General Public License version 2 as published by 7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation. 8 * the Free Software Foundation.
9 */ 9 */
10
11#ifndef _INDUSTRIAL_IO_H_ 10#ifndef _INDUSTRIAL_IO_H_
12#define _INDUSTRIAL_IO_H_ 11#define _INDUSTRIAL_IO_H_
13 12
14#include <linux/device.h> 13#include <linux/device.h>
15#include <linux/cdev.h> 14#include <linux/cdev.h>
16 15#include "types.h"
17/* IIO TODO LIST */ 16/* IIO TODO LIST */
18/* 17/*
19 * Provide means of adjusting timer accuracy. 18 * Provide means of adjusting timer accuracy.
@@ -25,62 +24,64 @@ enum iio_data_type {
25 IIO_PROCESSED, 24 IIO_PROCESSED,
26}; 25};
27 26
28enum iio_chan_type {
29 /* real channel types */
30 IIO_VOLTAGE,
31 IIO_CURRENT,
32 IIO_POWER,
33 IIO_ACCEL,
34 IIO_ANGL_VEL,
35 IIO_MAGN,
36 IIO_LIGHT,
37 IIO_INTENSITY,
38 IIO_PROXIMITY,
39 IIO_TEMP,
40 IIO_INCLI,
41 IIO_ROT,
42 IIO_ANGL,
43 IIO_TIMESTAMP,
44 IIO_CAPACITANCE,
45};
46
47enum iio_modifier {
48 IIO_NO_MOD,
49 IIO_MOD_X,
50 IIO_MOD_Y,
51 IIO_MOD_Z,
52 IIO_MOD_X_AND_Y,
53 IIO_MOD_X_ANX_Z,
54 IIO_MOD_Y_AND_Z,
55 IIO_MOD_X_AND_Y_AND_Z,
56 IIO_MOD_X_OR_Y,
57 IIO_MOD_X_OR_Z,
58 IIO_MOD_Y_OR_Z,
59 IIO_MOD_X_OR_Y_OR_Z,
60 IIO_MOD_LIGHT_BOTH,
61 IIO_MOD_LIGHT_IR,
62};
63
64/* Could add the raw attributes as well - allowing buffer only devices */ 27/* Could add the raw attributes as well - allowing buffer only devices */
65enum iio_chan_info_enum { 28enum iio_chan_info_enum {
66 IIO_CHAN_INFO_SCALE_SHARED, 29 /* 0 is reserverd for raw attributes */
67 IIO_CHAN_INFO_SCALE_SEPARATE, 30 IIO_CHAN_INFO_SCALE = 1,
68 IIO_CHAN_INFO_OFFSET_SHARED, 31 IIO_CHAN_INFO_OFFSET,
69 IIO_CHAN_INFO_OFFSET_SEPARATE, 32 IIO_CHAN_INFO_CALIBSCALE,
70 IIO_CHAN_INFO_CALIBSCALE_SHARED, 33 IIO_CHAN_INFO_CALIBBIAS,
71 IIO_CHAN_INFO_CALIBSCALE_SEPARATE, 34 IIO_CHAN_INFO_PEAK,
72 IIO_CHAN_INFO_CALIBBIAS_SHARED, 35 IIO_CHAN_INFO_PEAK_SCALE,
73 IIO_CHAN_INFO_CALIBBIAS_SEPARATE, 36 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW,
74 IIO_CHAN_INFO_PEAK_SHARED, 37 IIO_CHAN_INFO_AVERAGE_RAW,
75 IIO_CHAN_INFO_PEAK_SEPARATE, 38 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY,
76 IIO_CHAN_INFO_PEAK_SCALE_SHARED,
77 IIO_CHAN_INFO_PEAK_SCALE_SEPARATE,
78 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SHARED,
79 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE,
80 IIO_CHAN_INFO_AVERAGE_RAW_SHARED,
81 IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE,
82}; 39};
83 40
41#define IIO_CHAN_INFO_SHARED_BIT(type) BIT(type*2)
42#define IIO_CHAN_INFO_SEPARATE_BIT(type) BIT(type*2 + 1)
43
44#define IIO_CHAN_INFO_SCALE_SEPARATE_BIT \
45 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_SCALE)
46#define IIO_CHAN_INFO_SCALE_SHARED_BIT \
47 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_SCALE)
48#define IIO_CHAN_INFO_OFFSET_SEPARATE_BIT \
49 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_OFFSET)
50#define IIO_CHAN_INFO_OFFSET_SHARED_BIT \
51 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_OFFSET)
52#define IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT \
53 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_CALIBSCALE)
54#define IIO_CHAN_INFO_CALIBSCALE_SHARED_BIT \
55 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_CALIBSCALE)
56#define IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT \
57 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_CALIBBIAS)
58#define IIO_CHAN_INFO_CALIBBIAS_SHARED_BIT \
59 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_CALIBBIAS)
60#define IIO_CHAN_INFO_PEAK_SEPARATE_BIT \
61 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_PEAK)
62#define IIO_CHAN_INFO_PEAK_SHARED_BIT \
63 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_PEAK)
64#define IIO_CHAN_INFO_PEAKSCALE_SEPARATE_BIT \
65 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_PEAKSCALE)
66#define IIO_CHAN_INFO_PEAKSCALE_SHARED_BIT \
67 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_PEAKSCALE)
68#define IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT \
69 IIO_CHAN_INFO_SEPARATE_BIT( \
70 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW)
71#define IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SHARED_BIT \
72 IIO_CHAN_INFO_SHARED_BIT( \
73 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW)
74#define IIO_CHAN_INFO_AVERAGE_RAW_SEPARATE_BIT \
75 IIO_CHAN_INFO_SEPARATE_BIT(IIO_CHAN_INFO_AVERAGE_RAW)
76#define IIO_CHAN_INFO_AVERAGE_RAW_SHARED_BIT \
77 IIO_CHAN_INFO_SHARED_BIT(IIO_CHAN_INFO_AVERAGE_RAW)
78#define IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT \
79 IIO_CHAN_INFO_SHARED_BIT( \
80 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY)
81#define IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SEPARATE_BIT \
82 IIO_CHAN_INFO_SEPARATE_BIT( \
83 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY)
84
84enum iio_endian { 85enum iio_endian {
85 IIO_CPU, 86 IIO_CPU,
86 IIO_BE, 87 IIO_BE,
@@ -109,6 +110,10 @@ enum iio_endian {
109 * @extend_name: Allows labeling of channel attributes with an 110 * @extend_name: Allows labeling of channel attributes with an
110 * informative name. Note this has no effect codes etc, 111 * informative name. Note this has no effect codes etc,
111 * unlike modifiers. 112 * unlike modifiers.
113 * @datasheet_name: A name used in in kernel mapping of channels. It should
114 * corrspond to the first name that the channel is referred
115 * to by in the datasheet (e.g. IND), or the nearest
116 * possible compound name (e.g. IND-INC).
112 * @processed_val: Flag to specify the data access attribute should be 117 * @processed_val: Flag to specify the data access attribute should be
113 * *_input rather than *_raw. 118 * *_input rather than *_raw.
114 * @modified: Does a modifier apply to this channel. What these are 119 * @modified: Does a modifier apply to this channel. What these are
@@ -137,6 +142,7 @@ struct iio_chan_spec {
137 long info_mask; 142 long info_mask;
138 long event_mask; 143 long event_mask;
139 char *extend_name; 144 char *extend_name;
145 const char *datasheet_name;
140 unsigned processed_val:1; 146 unsigned processed_val:1;
141 unsigned modified:1; 147 unsigned modified:1;
142 unsigned indexed:1; 148 unsigned indexed:1;
@@ -261,7 +267,23 @@ struct iio_info {
261 int val); 267 int val);
262 int (*validate_trigger)(struct iio_dev *indio_dev, 268 int (*validate_trigger)(struct iio_dev *indio_dev,
263 struct iio_trigger *trig); 269 struct iio_trigger *trig);
270 int (*update_scan_mode)(struct iio_dev *indio_dev,
271 const unsigned long *scan_mask);
272};
264 273
274/**
275 * struct iio_buffer_setup_ops - buffer setup related callbacks
276 * @preenable: [DRIVER] function to run prior to marking buffer enabled
277 * @postenable: [DRIVER] function to run after marking buffer enabled
278 * @predisable: [DRIVER] function to run prior to marking buffer
279 * disabled
280 * @postdisable: [DRIVER] function to run after marking buffer disabled
281 */
282struct iio_buffer_setup_ops {
283 int (*preenable)(struct iio_dev *);
284 int (*postenable)(struct iio_dev *);
285 int (*predisable)(struct iio_dev *);
286 int (*postdisable)(struct iio_dev *);
265}; 287};
266 288
267/** 289/**
@@ -278,6 +300,7 @@ struct iio_info {
278 * @available_scan_masks: [DRIVER] optional array of allowed bitmasks 300 * @available_scan_masks: [DRIVER] optional array of allowed bitmasks
279 * @masklength: [INTERN] the length of the mask established from 301 * @masklength: [INTERN] the length of the mask established from
280 * channels 302 * channels
303 * @active_scan_mask: [INTERN] union of all scan masks requested by buffers
281 * @trig: [INTERN] current device trigger (buffer modes) 304 * @trig: [INTERN] current device trigger (buffer modes)
282 * @pollfunc: [DRIVER] function run on trigger being received 305 * @pollfunc: [DRIVER] function run on trigger being received
283 * @channels: [DRIVER] channel specification structure table 306 * @channels: [DRIVER] channel specification structure table
@@ -290,6 +313,7 @@ struct iio_info {
290 * @chrdev: [INTERN] associated character device 313 * @chrdev: [INTERN] associated character device
291 * @groups: [INTERN] attribute groups 314 * @groups: [INTERN] attribute groups
292 * @groupcounter: [INTERN] index of next attribute group 315 * @groupcounter: [INTERN] index of next attribute group
316 * @flags: [INTERN] file ops related flags including busy flag.
293 **/ 317 **/
294struct iio_dev { 318struct iio_dev {
295 int id; 319 int id;
@@ -305,6 +329,7 @@ struct iio_dev {
305 329
306 unsigned long *available_scan_masks; 330 unsigned long *available_scan_masks;
307 unsigned masklength; 331 unsigned masklength;
332 unsigned long *active_scan_mask;
308 struct iio_trigger *trig; 333 struct iio_trigger *trig;
309 struct iio_poll_func *pollfunc; 334 struct iio_poll_func *pollfunc;
310 335
@@ -315,13 +340,24 @@ struct iio_dev {
315 struct attribute_group chan_attr_group; 340 struct attribute_group chan_attr_group;
316 const char *name; 341 const char *name;
317 const struct iio_info *info; 342 const struct iio_info *info;
343 const struct iio_buffer_setup_ops *setup_ops;
318 struct cdev chrdev; 344 struct cdev chrdev;
319#define IIO_MAX_GROUPS 6 345#define IIO_MAX_GROUPS 6
320 const struct attribute_group *groups[IIO_MAX_GROUPS + 1]; 346 const struct attribute_group *groups[IIO_MAX_GROUPS + 1];
321 int groupcounter; 347 int groupcounter;
348
349 unsigned long flags;
322}; 350};
323 351
324/** 352/**
353 * iio_find_channel_from_si() - get channel from its scan index
354 * @indio_dev: device
355 * @si: scan index to match
356 */
357const struct iio_chan_spec
358*iio_find_channel_from_si(struct iio_dev *indio_dev, int si);
359
360/**
325 * iio_device_register() - register a device with the IIO subsystem 361 * iio_device_register() - register a device with the IIO subsystem
326 * @indio_dev: Device structure filled by the device driver 362 * @indio_dev: Device structure filled by the device driver
327 **/ 363 **/
diff --git a/drivers/staging/iio/iio_core.h b/drivers/staging/iio/iio_core.h
index 36159e0dbfc3..107cfb1cbb01 100644
--- a/drivers/staging/iio/iio_core.h
+++ b/drivers/staging/iio/iio_core.h
@@ -33,9 +33,6 @@ int __iio_add_chan_devattr(const char *postfix,
33#ifdef CONFIG_IIO_BUFFER 33#ifdef CONFIG_IIO_BUFFER
34struct poll_table_struct; 34struct poll_table_struct;
35 35
36int iio_chrdev_buffer_open(struct iio_dev *indio_dev);
37void iio_chrdev_buffer_release(struct iio_dev *indio_dev);
38
39unsigned int iio_buffer_poll(struct file *filp, 36unsigned int iio_buffer_poll(struct file *filp,
40 struct poll_table_struct *wait); 37 struct poll_table_struct *wait);
41ssize_t iio_buffer_read_first_n_outer(struct file *filp, char __user *buf, 38ssize_t iio_buffer_read_first_n_outer(struct file *filp, char __user *buf,
@@ -47,14 +44,6 @@ ssize_t iio_buffer_read_first_n_outer(struct file *filp, char __user *buf,
47 44
48#else 45#else
49 46
50static inline int iio_chrdev_buffer_open(struct iio_dev *indio_dev)
51{
52 return -EINVAL;
53}
54
55static inline void iio_chrdev_buffer_release(struct iio_dev *indio_dev)
56{}
57
58#define iio_buffer_poll_addr NULL 47#define iio_buffer_poll_addr NULL
59#define iio_buffer_read_first_n_outer_addr NULL 48#define iio_buffer_read_first_n_outer_addr NULL
60 49
diff --git a/drivers/staging/iio/iio_core_trigger.h b/drivers/staging/iio/iio_core_trigger.h
index 523c288b776b..6f7c56fcbe78 100644
--- a/drivers/staging/iio/iio_core_trigger.h
+++ b/drivers/staging/iio/iio_core_trigger.h
@@ -13,8 +13,7 @@
13 * iio_device_register_trigger_consumer() - set up an iio_dev to use triggers 13 * iio_device_register_trigger_consumer() - set up an iio_dev to use triggers
14 * @indio_dev: iio_dev associated with the device that will consume the trigger 14 * @indio_dev: iio_dev associated with the device that will consume the trigger
15 **/ 15 **/
16 16void iio_device_register_trigger_consumer(struct iio_dev *indio_dev);
17int iio_device_register_trigger_consumer(struct iio_dev *indio_dev);
18 17
19/** 18/**
20 * iio_device_unregister_trigger_consumer() - reverse the registration process 19 * iio_device_unregister_trigger_consumer() - reverse the registration process
diff --git a/drivers/staging/iio/iio_dummy_evgen.c b/drivers/staging/iio/iio_dummy_evgen.c
index da657d10471d..cdbf289bfe2d 100644
--- a/drivers/staging/iio/iio_dummy_evgen.c
+++ b/drivers/staging/iio/iio_dummy_evgen.c
@@ -102,6 +102,10 @@ static int iio_dummy_evgen_create(void)
102int iio_dummy_evgen_get_irq(void) 102int iio_dummy_evgen_get_irq(void)
103{ 103{
104 int i, ret = 0; 104 int i, ret = 0;
105
106 if (iio_evgen == NULL)
107 return -ENODEV;
108
105 mutex_lock(&iio_evgen->lock); 109 mutex_lock(&iio_evgen->lock);
106 for (i = 0; i < IIO_EVENTGEN_NO; i++) 110 for (i = 0; i < IIO_EVENTGEN_NO; i++)
107 if (iio_evgen->inuse[i] == false) { 111 if (iio_evgen->inuse[i] == false) {
diff --git a/drivers/staging/iio/iio_simple_dummy.c b/drivers/staging/iio/iio_simple_dummy.c
index af0c99236d4f..e3a94572bb40 100644
--- a/drivers/staging/iio/iio_simple_dummy.c
+++ b/drivers/staging/iio/iio_simple_dummy.c
@@ -21,7 +21,8 @@
21 21
22#include "iio.h" 22#include "iio.h"
23#include "sysfs.h" 23#include "sysfs.h"
24#include "buffer_generic.h" 24#include "events.h"
25#include "buffer.h"
25#include "iio_simple_dummy.h" 26#include "iio_simple_dummy.h"
26 27
27/* 28/*
@@ -76,13 +77,13 @@ static struct iio_chan_spec iio_dummy_channels[] = {
76 * Offset for userspace to apply prior to scale 77 * Offset for userspace to apply prior to scale
77 * when converting to standard units (microvolts) 78 * when converting to standard units (microvolts)
78 */ 79 */
79 (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 80 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
80 /* 81 /*
81 * in_voltage0_scale 82 * in_voltage0_scale
82 * Multipler for userspace to apply post offset 83 * Multipler for userspace to apply post offset
83 * when converting to standard units (microvolts) 84 * when converting to standard units (microvolts)
84 */ 85 */
85 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 86 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
86 /* The ordering of elements in the buffer via an enum */ 87 /* The ordering of elements in the buffer via an enum */
87 .scan_index = voltage0, 88 .scan_index = voltage0,
88 .scan_type = { /* Description of storage in buffer */ 89 .scan_type = { /* Description of storage in buffer */
@@ -117,7 +118,7 @@ static struct iio_chan_spec iio_dummy_channels[] = {
117 * Shared version of scale - shared by differential 118 * Shared version of scale - shared by differential
118 * input channels of type IIO_VOLTAGE. 119 * input channels of type IIO_VOLTAGE.
119 */ 120 */
120 (1 << IIO_CHAN_INFO_SCALE_SHARED), 121 IIO_CHAN_INFO_SCALE_SHARED_BIT,
121 .scan_index = diffvoltage1m2, 122 .scan_index = diffvoltage1m2,
122 .scan_type = { /* Description of storage in buffer */ 123 .scan_type = { /* Description of storage in buffer */
123 .sign = 's', /* signed */ 124 .sign = 's', /* signed */
@@ -134,7 +135,7 @@ static struct iio_chan_spec iio_dummy_channels[] = {
134 .channel = 3, 135 .channel = 3,
135 .channel2 = 4, 136 .channel2 = 4,
136 .info_mask = 137 .info_mask =
137 (1 << IIO_CHAN_INFO_SCALE_SHARED), 138 IIO_CHAN_INFO_SCALE_SHARED_BIT,
138 .scan_index = diffvoltage3m4, 139 .scan_index = diffvoltage3m4,
139 .scan_type = { 140 .scan_type = {
140 .sign = 's', 141 .sign = 's',
@@ -159,7 +160,7 @@ static struct iio_chan_spec iio_dummy_channels[] = {
159 * seeing the readings. Typically part of hardware 160 * seeing the readings. Typically part of hardware
160 * calibration. 161 * calibration.
161 */ 162 */
162 (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE), 163 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
163 .scan_index = accelx, 164 .scan_index = accelx,
164 .scan_type = { /* Description of storage in buffer */ 165 .scan_type = { /* Description of storage in buffer */
165 .sign = 's', /* signed */ 166 .sign = 's', /* signed */
@@ -228,29 +229,32 @@ static int iio_dummy_read_raw(struct iio_dev *indio_dev,
228 break; 229 break;
229 } 230 }
230 break; 231 break;
231 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 232 case IIO_CHAN_INFO_OFFSET:
232 /* only single ended adc -> 7 */ 233 /* only single ended adc -> 7 */
233 *val = 7; 234 *val = 7;
234 ret = IIO_VAL_INT; 235 ret = IIO_VAL_INT;
235 break; 236 break;
236 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 237 case IIO_CHAN_INFO_SCALE:
237 /* only single ended adc -> 0.001333 */ 238 switch (chan->differential) {
238 *val = 0; 239 case 0:
239 *val2 = 1333; 240 /* only single ended adc -> 0.001333 */
240 ret = IIO_VAL_INT_PLUS_MICRO; 241 *val = 0;
241 break; 242 *val2 = 1333;
242 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 243 ret = IIO_VAL_INT_PLUS_MICRO;
243 /* all differential adc channels -> 0.000001344 */ 244 break;
244 *val = 0; 245 case 1:
245 *val2 = 1344; 246 /* all differential adc channels -> 0.000001344 */
246 ret = IIO_VAL_INT_PLUS_NANO; 247 *val = 0;
248 *val2 = 1344;
249 ret = IIO_VAL_INT_PLUS_NANO;
250 }
247 break; 251 break;
248 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 252 case IIO_CHAN_INFO_CALIBBIAS:
249 /* only the acceleration axis - read from cache */ 253 /* only the acceleration axis - read from cache */
250 *val = st->accel_calibbias; 254 *val = st->accel_calibbias;
251 ret = IIO_VAL_INT; 255 ret = IIO_VAL_INT;
252 break; 256 break;
253 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 257 case IIO_CHAN_INFO_CALIBSCALE:
254 *val = st->accel_calibscale->val; 258 *val = st->accel_calibscale->val;
255 *val2 = st->accel_calibscale->val2; 259 *val2 = st->accel_calibscale->val2;
256 ret = IIO_VAL_INT_PLUS_MICRO; 260 ret = IIO_VAL_INT_PLUS_MICRO;
@@ -295,7 +299,7 @@ static int iio_dummy_write_raw(struct iio_dev *indio_dev,
295 st->dac_val = val; 299 st->dac_val = val;
296 mutex_unlock(&st->lock); 300 mutex_unlock(&st->lock);
297 return 0; 301 return 0;
298 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 302 case IIO_CHAN_INFO_CALIBBIAS:
299 mutex_lock(&st->lock); 303 mutex_lock(&st->lock);
300 /* Compare against table - hard matching here */ 304 /* Compare against table - hard matching here */
301 for (i = 0; i < ARRAY_SIZE(dummy_scales); i++) 305 for (i = 0; i < ARRAY_SIZE(dummy_scales); i++)
@@ -514,7 +518,8 @@ static __init int iio_dummy_init(void)
514 return -EINVAL; 518 return -EINVAL;
515 } 519 }
516 /* Fake a bus */ 520 /* Fake a bus */
517 iio_dummy_devs = kzalloc(sizeof(*iio_dummy_devs)*instances, GFP_KERNEL); 521 iio_dummy_devs = kcalloc(instances, sizeof(*iio_dummy_devs),
522 GFP_KERNEL);
518 /* Here we have no actual device so call probe */ 523 /* Here we have no actual device so call probe */
519 for (i = 0; i < instances; i++) { 524 for (i = 0; i < instances; i++) {
520 ret = iio_dummy_probe(i); 525 ret = iio_dummy_probe(i);
diff --git a/drivers/staging/iio/iio_simple_dummy_buffer.c b/drivers/staging/iio/iio_simple_dummy_buffer.c
index edad0e7b4f4d..d6a1c0e82a5b 100644
--- a/drivers/staging/iio/iio_simple_dummy_buffer.c
+++ b/drivers/staging/iio/iio_simple_dummy_buffer.c
@@ -57,7 +57,7 @@ static irqreturn_t iio_simple_dummy_trigger_h(int irq, void *p)
57 if (data == NULL) 57 if (data == NULL)
58 return -ENOMEM; 58 return -ENOMEM;
59 59
60 if (buffer->scan_count) { 60 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)) {
61 /* 61 /*
62 * Three common options here: 62 * Three common options here:
63 * hardware scans: certain combinations of channels make 63 * hardware scans: certain combinations of channels make
@@ -75,7 +75,10 @@ static irqreturn_t iio_simple_dummy_trigger_h(int irq, void *p)
75 * in the constant table fakedata. 75 * in the constant table fakedata.
76 */ 76 */
77 int i, j; 77 int i, j;
78 for (i = 0, j = 0; i < buffer->scan_count; i++) { 78 for (i = 0, j = 0;
79 i < bitmap_weight(indio_dev->active_scan_mask,
80 indio_dev->masklength);
81 i++) {
79 j = find_next_bit(buffer->scan_mask, 82 j = find_next_bit(buffer->scan_mask,
80 indio_dev->masklength, j + 1); 83 indio_dev->masklength, j + 1);
81 /* random access read form the 'device' */ 84 /* random access read form the 'device' */
@@ -142,8 +145,6 @@ int iio_simple_dummy_configure_buffer(struct iio_dev *indio_dev)
142 /* Tell the core how to access the buffer */ 145 /* Tell the core how to access the buffer */
143 buffer->access = &kfifo_access_funcs; 146 buffer->access = &kfifo_access_funcs;
144 147
145 /* Number of bytes per element */
146 buffer->bpe = 2;
147 /* Enable timestamps by default */ 148 /* Enable timestamps by default */
148 buffer->scan_timestamp = true; 149 buffer->scan_timestamp = true;
149 150
@@ -151,8 +152,7 @@ int iio_simple_dummy_configure_buffer(struct iio_dev *indio_dev)
151 * Tell the core what device type specific functions should 152 * Tell the core what device type specific functions should
152 * be run on either side of buffer capture enable / disable. 153 * be run on either side of buffer capture enable / disable.
153 */ 154 */
154 buffer->setup_ops = &iio_simple_dummy_buffer_setup_ops; 155 indio_dev->setup_ops = &iio_simple_dummy_buffer_setup_ops;
155 buffer->owner = THIS_MODULE;
156 156
157 /* 157 /*
158 * Configure a polling function. 158 * Configure a polling function.
diff --git a/drivers/staging/iio/iio_simple_dummy_events.c b/drivers/staging/iio/iio_simple_dummy_events.c
index 9f00cff7ddd5..449c7a5ece80 100644
--- a/drivers/staging/iio/iio_simple_dummy_events.c
+++ b/drivers/staging/iio/iio_simple_dummy_events.c
@@ -14,6 +14,7 @@
14 14
15#include "iio.h" 15#include "iio.h"
16#include "sysfs.h" 16#include "sysfs.h"
17#include "events.h"
17#include "iio_simple_dummy.h" 18#include "iio_simple_dummy.h"
18 19
19/* Evgen 'fakes' interrupt events for this example */ 20/* Evgen 'fakes' interrupt events for this example */
diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
index 454d131455de..9a2ca55625f4 100644
--- a/drivers/staging/iio/impedance-analyzer/ad5933.c
+++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
@@ -21,7 +21,7 @@
21 21
22#include "../iio.h" 22#include "../iio.h"
23#include "../sysfs.h" 23#include "../sysfs.h"
24#include "../buffer_generic.h" 24#include "../buffer.h"
25#include "../ring_sw.h" 25#include "../ring_sw.h"
26 26
27#include "ad5933.h" 27#include "ad5933.h"
@@ -113,10 +113,10 @@ static struct iio_chan_spec ad5933_channels[] = {
113 0, AD5933_REG_TEMP_DATA, IIO_ST('s', 14, 16, 0), 0), 113 0, AD5933_REG_TEMP_DATA, IIO_ST('s', 14, 16, 0), 0),
114 /* Ring Channels */ 114 /* Ring Channels */
115 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "real_raw", 0, 0, 115 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "real_raw", 0, 0,
116 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 116 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
117 AD5933_REG_REAL_DATA, 0, IIO_ST('s', 16, 16, 0), 0), 117 AD5933_REG_REAL_DATA, 0, IIO_ST('s', 16, 16, 0), 0),
118 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "imag_raw", 0, 0, 118 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "imag_raw", 0, 0,
119 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 119 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
120 AD5933_REG_IMAG_DATA, 1, IIO_ST('s', 16, 16, 0), 0), 120 AD5933_REG_IMAG_DATA, 1, IIO_ST('s', 16, 16, 0), 0),
121}; 121};
122 122
@@ -329,7 +329,7 @@ static ssize_t ad5933_show(struct device *dev,
329 int ret = 0, len = 0; 329 int ret = 0, len = 0;
330 330
331 mutex_lock(&indio_dev->mlock); 331 mutex_lock(&indio_dev->mlock);
332 switch (this_attr->address) { 332 switch ((u32) this_attr->address) {
333 case AD5933_OUT_RANGE: 333 case AD5933_OUT_RANGE:
334 len = sprintf(buf, "%d\n", 334 len = sprintf(buf, "%d\n",
335 st->range_avail[(st->ctrl_hb >> 1) & 0x3]); 335 st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
@@ -380,7 +380,7 @@ static ssize_t ad5933_store(struct device *dev,
380 } 380 }
381 381
382 mutex_lock(&indio_dev->mlock); 382 mutex_lock(&indio_dev->mlock);
383 switch (this_attr->address) { 383 switch ((u32) this_attr->address) {
384 case AD5933_OUT_RANGE: 384 case AD5933_OUT_RANGE:
385 for (i = 0; i < 4; i++) 385 for (i = 0; i < 4; i++)
386 if (val == st->range_avail[i]) { 386 if (val == st->range_avail[i]) {
@@ -537,14 +537,14 @@ static const struct iio_info ad5933_info = {
537static int ad5933_ring_preenable(struct iio_dev *indio_dev) 537static int ad5933_ring_preenable(struct iio_dev *indio_dev)
538{ 538{
539 struct ad5933_state *st = iio_priv(indio_dev); 539 struct ad5933_state *st = iio_priv(indio_dev);
540 struct iio_buffer *ring = indio_dev->buffer;
541 size_t d_size; 540 size_t d_size;
542 int ret; 541 int ret;
543 542
544 if (!ring->scan_count) 543 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
545 return -EINVAL; 544 return -EINVAL;
546 545
547 d_size = ring->scan_count * 546 d_size = bitmap_weight(indio_dev->active_scan_mask,
547 indio_dev->masklength) *
548 ad5933_channels[1].scan_type.storagebits / 8; 548 ad5933_channels[1].scan_type.storagebits / 8;
549 549
550 if (indio_dev->buffer->access->set_bytes_per_datum) 550 if (indio_dev->buffer->access->set_bytes_per_datum)
@@ -611,7 +611,7 @@ static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
611 indio_dev->buffer->access = &ring_sw_access_funcs; 611 indio_dev->buffer->access = &ring_sw_access_funcs;
612 612
613 /* Ring buffer functions - here trigger setup related */ 613 /* Ring buffer functions - here trigger setup related */
614 indio_dev->buffer->setup_ops = &ad5933_ring_setup_ops; 614 indio_dev->setup_ops = &ad5933_ring_setup_ops;
615 615
616 indio_dev->modes |= INDIO_BUFFER_HARDWARE; 616 indio_dev->modes |= INDIO_BUFFER_HARDWARE;
617 617
@@ -640,12 +640,14 @@ static void ad5933_work(struct work_struct *work)
640 ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status); 640 ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
641 641
642 if (status & AD5933_STAT_DATA_VALID) { 642 if (status & AD5933_STAT_DATA_VALID) {
643 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
644 indio_dev->masklength);
643 ad5933_i2c_read(st->client, 645 ad5933_i2c_read(st->client,
644 test_bit(1, ring->scan_mask) ? 646 test_bit(1, indio_dev->active_scan_mask) ?
645 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA, 647 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
646 ring->scan_count * 2, (u8 *)buf); 648 scan_count * 2, (u8 *)buf);
647 649
648 if (ring->scan_count == 2) { 650 if (scan_count == 2) {
649 buf[0] = be16_to_cpu(buf[0]); 651 buf[0] = be16_to_cpu(buf[0]);
650 buf[1] = be16_to_cpu(buf[1]); 652 buf[1] = be16_to_cpu(buf[1]);
651 } else { 653 } else {
@@ -734,8 +736,8 @@ static int __devinit ad5933_probe(struct i2c_client *client,
734 goto error_unreg_ring; 736 goto error_unreg_ring;
735 737
736 /* enable both REAL and IMAG channels by default */ 738 /* enable both REAL and IMAG channels by default */
737 iio_scan_mask_set(indio_dev->buffer, 0); 739 iio_scan_mask_set(indio_dev, indio_dev->buffer, 0);
738 iio_scan_mask_set(indio_dev->buffer, 1); 740 iio_scan_mask_set(indio_dev, indio_dev->buffer, 1);
739 741
740 ret = ad5933_setup(st); 742 ret = ad5933_setup(st);
741 if (ret) 743 if (ret)
diff --git a/drivers/staging/iio/imu/adis16400.h b/drivers/staging/iio/imu/adis16400.h
index f3546ee910a2..83d133efaac6 100644
--- a/drivers/staging/iio/imu/adis16400.h
+++ b/drivers/staging/iio/imu/adis16400.h
@@ -148,12 +148,14 @@ struct adis16400_chip_info {
148 * @tx: transmit buffer 148 * @tx: transmit buffer
149 * @rx: receive buffer 149 * @rx: receive buffer
150 * @buf_lock: mutex to protect tx and rx 150 * @buf_lock: mutex to protect tx and rx
151 * @filt_int: integer part of requested filter frequency
151 **/ 152 **/
152struct adis16400_state { 153struct adis16400_state {
153 struct spi_device *us; 154 struct spi_device *us;
154 struct iio_trigger *trig; 155 struct iio_trigger *trig;
155 struct mutex buf_lock; 156 struct mutex buf_lock;
156 struct adis16400_chip_info *variant; 157 struct adis16400_chip_info *variant;
158 int filt_int;
157 159
158 u8 tx[ADIS16400_MAX_TX] ____cacheline_aligned; 160 u8 tx[ADIS16400_MAX_TX] ____cacheline_aligned;
159 u8 rx[ADIS16400_MAX_RX] ____cacheline_aligned; 161 u8 rx[ADIS16400_MAX_RX] ____cacheline_aligned;
diff --git a/drivers/staging/iio/imu/adis16400_core.c b/drivers/staging/iio/imu/adis16400_core.c
index efc0f6529008..e73ad7818d85 100644
--- a/drivers/staging/iio/imu/adis16400_core.c
+++ b/drivers/staging/iio/imu/adis16400_core.c
@@ -28,7 +28,7 @@
28 28
29#include "../iio.h" 29#include "../iio.h"
30#include "../sysfs.h" 30#include "../sysfs.h"
31#include "../buffer_generic.h" 31#include "../buffer.h"
32#include "adis16400.h" 32#include "adis16400.h"
33 33
34enum adis16400_chip_variant { 34enum adis16400_chip_variant {
@@ -161,25 +161,65 @@ error_ret:
161 return ret; 161 return ret;
162} 162}
163 163
164static int adis16400_get_freq(struct iio_dev *indio_dev)
165{
166 u16 t;
167 int sps, ret;
168
169 ret = adis16400_spi_read_reg_16(indio_dev, ADIS16400_SMPL_PRD, &t);
170 if (ret < 0)
171 return ret;
172 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638;
173 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
174
175 return sps;
176}
177
164static ssize_t adis16400_read_frequency(struct device *dev, 178static ssize_t adis16400_read_frequency(struct device *dev,
165 struct device_attribute *attr, 179 struct device_attribute *attr,
166 char *buf) 180 char *buf)
167{ 181{
168 struct iio_dev *indio_dev = dev_get_drvdata(dev); 182 struct iio_dev *indio_dev = dev_get_drvdata(dev);
169 int ret, len = 0; 183 int ret, len = 0;
170 u16 t; 184 ret = adis16400_get_freq(indio_dev);
171 int sps; 185 if (ret < 0)
172 ret = adis16400_spi_read_reg_16(indio_dev,
173 ADIS16400_SMPL_PRD,
174 &t);
175 if (ret)
176 return ret; 186 return ret;
177 sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 53 : 1638; 187 len = sprintf(buf, "%d SPS\n", ret);
178 sps /= (t & ADIS16400_SMPL_PRD_DIV_MASK) + 1;
179 len = sprintf(buf, "%d SPS\n", sps);
180 return len; 188 return len;
181} 189}
182 190
191static const unsigned adis16400_3db_divisors[] = {
192 [0] = 2, /* Special case */
193 [1] = 5,
194 [2] = 10,
195 [3] = 50,
196 [4] = 200,
197};
198
199static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val)
200{
201 int i, ret;
202 u16 val16;
203 for (i = ARRAY_SIZE(adis16400_3db_divisors) - 1; i >= 0; i--)
204 if (sps/adis16400_3db_divisors[i] > val)
205 break;
206 if (i == -1)
207 ret = -EINVAL;
208 else {
209 ret = adis16400_spi_read_reg_16(indio_dev,
210 ADIS16400_SENS_AVG,
211 &val16);
212 if (ret < 0)
213 goto error_ret;
214
215 ret = adis16400_spi_write_reg_16(indio_dev,
216 ADIS16400_SENS_AVG,
217 (val16 & ~0x03) | i);
218 }
219error_ret:
220 return ret;
221}
222
183static ssize_t adis16400_write_frequency(struct device *dev, 223static ssize_t adis16400_write_frequency(struct device *dev,
184 struct device_attribute *attr, 224 struct device_attribute *attr,
185 const char *buf, 225 const char *buf,
@@ -210,6 +250,7 @@ static ssize_t adis16400_write_frequency(struct device *dev,
210 ADIS16400_SMPL_PRD, 250 ADIS16400_SMPL_PRD,
211 t); 251 t);
212 252
253 /* Also update the filter */
213 mutex_unlock(&indio_dev->mlock); 254 mutex_unlock(&indio_dev->mlock);
214 255
215 return ret ? ret : len; 256 return ret ? ret : len;
@@ -455,22 +496,39 @@ static u8 adis16400_addresses[17][2] = {
455 [incli_y] = { ADIS16300_ROLL_OUT } 496 [incli_y] = { ADIS16300_ROLL_OUT }
456}; 497};
457 498
499
458static int adis16400_write_raw(struct iio_dev *indio_dev, 500static int adis16400_write_raw(struct iio_dev *indio_dev,
459 struct iio_chan_spec const *chan, 501 struct iio_chan_spec const *chan,
460 int val, 502 int val,
461 int val2, 503 int val2,
462 long mask) 504 long mask)
463{ 505{
464 int ret; 506 struct adis16400_state *st = iio_priv(indio_dev);
507 int ret, sps;
465 508
466 switch (mask) { 509 switch (mask) {
467 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 510 case IIO_CHAN_INFO_CALIBBIAS:
468 mutex_lock(&indio_dev->mlock); 511 mutex_lock(&indio_dev->mlock);
469 ret = adis16400_spi_write_reg_16(indio_dev, 512 ret = adis16400_spi_write_reg_16(indio_dev,
470 adis16400_addresses[chan->address][1], 513 adis16400_addresses[chan->address][1],
471 val); 514 val);
472 mutex_unlock(&indio_dev->mlock); 515 mutex_unlock(&indio_dev->mlock);
473 return ret; 516 return ret;
517 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
518 /* Need to cache values so we can update if the frequency
519 changes */
520 mutex_lock(&indio_dev->mlock);
521 st->filt_int = val;
522 /* Work out update to current value */
523 sps = adis16400_get_freq(indio_dev);
524 if (sps < 0) {
525 mutex_unlock(&indio_dev->mlock);
526 return sps;
527 }
528
529 ret = adis16400_set_filter(indio_dev, sps, val);
530 mutex_unlock(&indio_dev->mlock);
531 return ret;
474 default: 532 default:
475 return -EINVAL; 533 return -EINVAL;
476 } 534 }
@@ -504,8 +562,7 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
504 *val = val16; 562 *val = val16;
505 mutex_unlock(&indio_dev->mlock); 563 mutex_unlock(&indio_dev->mlock);
506 return IIO_VAL_INT; 564 return IIO_VAL_INT;
507 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 565 case IIO_CHAN_INFO_SCALE:
508 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
509 switch (chan->type) { 566 switch (chan->type) {
510 case IIO_ANGL_VEL: 567 case IIO_ANGL_VEL:
511 *val = 0; 568 *val = 0;
@@ -533,7 +590,7 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
533 default: 590 default:
534 return -EINVAL; 591 return -EINVAL;
535 } 592 }
536 case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE): 593 case IIO_CHAN_INFO_CALIBBIAS:
537 mutex_lock(&indio_dev->mlock); 594 mutex_lock(&indio_dev->mlock);
538 ret = adis16400_spi_read_reg_16(indio_dev, 595 ret = adis16400_spi_read_reg_16(indio_dev,
539 adis16400_addresses[chan->address][1], 596 adis16400_addresses[chan->address][1],
@@ -544,11 +601,29 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
544 val16 = ((val16 & 0xFFF) << 4) >> 4; 601 val16 = ((val16 & 0xFFF) << 4) >> 4;
545 *val = val16; 602 *val = val16;
546 return IIO_VAL_INT; 603 return IIO_VAL_INT;
547 case (1 << IIO_CHAN_INFO_OFFSET_SEPARATE): 604 case IIO_CHAN_INFO_OFFSET:
548 /* currently only temperature */ 605 /* currently only temperature */
549 *val = 198; 606 *val = 198;
550 *val2 = 160000; 607 *val2 = 160000;
551 return IIO_VAL_INT_PLUS_MICRO; 608 return IIO_VAL_INT_PLUS_MICRO;
609 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
610 mutex_lock(&indio_dev->mlock);
611 /* Need both the number of taps and the sampling frequency */
612 ret = adis16400_spi_read_reg_16(indio_dev,
613 ADIS16400_SENS_AVG,
614 &val16);
615 if (ret < 0) {
616 mutex_unlock(&indio_dev->mlock);
617 return ret;
618 }
619 ret = adis16400_get_freq(indio_dev);
620 if (ret > 0)
621 *val = ret/adis16400_3db_divisors[val16 & 0x03];
622 *val2 = 0;
623 mutex_unlock(&indio_dev->mlock);
624 if (ret < 0)
625 return ret;
626 return IIO_VAL_INT_PLUS_MICRO;
552 default: 627 default:
553 return -EINVAL; 628 return -EINVAL;
554 } 629 }
@@ -560,7 +635,7 @@ static struct iio_chan_spec adis16400_channels[] = {
560 .indexed = 1, 635 .indexed = 1,
561 .channel = 0, 636 .channel = 0,
562 .extend_name = "supply", 637 .extend_name = "supply",
563 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 638 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
564 .address = in_supply, 639 .address = in_supply,
565 .scan_index = ADIS16400_SCAN_SUPPLY, 640 .scan_index = ADIS16400_SCAN_SUPPLY,
566 .scan_type = IIO_ST('u', 14, 16, 0) 641 .scan_type = IIO_ST('u', 14, 16, 0)
@@ -568,8 +643,9 @@ static struct iio_chan_spec adis16400_channels[] = {
568 .type = IIO_ANGL_VEL, 643 .type = IIO_ANGL_VEL,
569 .modified = 1, 644 .modified = 1,
570 .channel2 = IIO_MOD_X, 645 .channel2 = IIO_MOD_X,
571 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 646 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
572 (1 << IIO_CHAN_INFO_SCALE_SHARED), 647 IIO_CHAN_INFO_SCALE_SHARED_BIT |
648 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
573 .address = gyro_x, 649 .address = gyro_x,
574 .scan_index = ADIS16400_SCAN_GYRO_X, 650 .scan_index = ADIS16400_SCAN_GYRO_X,
575 .scan_type = IIO_ST('s', 14, 16, 0) 651 .scan_type = IIO_ST('s', 14, 16, 0)
@@ -577,8 +653,9 @@ static struct iio_chan_spec adis16400_channels[] = {
577 .type = IIO_ANGL_VEL, 653 .type = IIO_ANGL_VEL,
578 .modified = 1, 654 .modified = 1,
579 .channel2 = IIO_MOD_Y, 655 .channel2 = IIO_MOD_Y,
580 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 656 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
581 (1 << IIO_CHAN_INFO_SCALE_SHARED), 657 IIO_CHAN_INFO_SCALE_SHARED_BIT |
658 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
582 .address = gyro_y, 659 .address = gyro_y,
583 .scan_index = ADIS16400_SCAN_GYRO_Y, 660 .scan_index = ADIS16400_SCAN_GYRO_Y,
584 .scan_type = IIO_ST('s', 14, 16, 0), 661 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -586,8 +663,9 @@ static struct iio_chan_spec adis16400_channels[] = {
586 .type = IIO_ANGL_VEL, 663 .type = IIO_ANGL_VEL,
587 .modified = 1, 664 .modified = 1,
588 .channel2 = IIO_MOD_Z, 665 .channel2 = IIO_MOD_Z,
589 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 666 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
590 (1 << IIO_CHAN_INFO_SCALE_SHARED), 667 IIO_CHAN_INFO_SCALE_SHARED_BIT |
668 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
591 .address = gyro_z, 669 .address = gyro_z,
592 .scan_index = ADIS16400_SCAN_GYRO_Z, 670 .scan_index = ADIS16400_SCAN_GYRO_Z,
593 .scan_type = IIO_ST('s', 14, 16, 0), 671 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -595,8 +673,9 @@ static struct iio_chan_spec adis16400_channels[] = {
595 .type = IIO_ACCEL, 673 .type = IIO_ACCEL,
596 .modified = 1, 674 .modified = 1,
597 .channel2 = IIO_MOD_X, 675 .channel2 = IIO_MOD_X,
598 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 676 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
599 (1 << IIO_CHAN_INFO_SCALE_SHARED), 677 IIO_CHAN_INFO_SCALE_SHARED_BIT |
678 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
600 .address = accel_x, 679 .address = accel_x,
601 .scan_index = ADIS16400_SCAN_ACC_X, 680 .scan_index = ADIS16400_SCAN_ACC_X,
602 .scan_type = IIO_ST('s', 14, 16, 0), 681 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -604,8 +683,9 @@ static struct iio_chan_spec adis16400_channels[] = {
604 .type = IIO_ACCEL, 683 .type = IIO_ACCEL,
605 .modified = 1, 684 .modified = 1,
606 .channel2 = IIO_MOD_Y, 685 .channel2 = IIO_MOD_Y,
607 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 686 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
608 (1 << IIO_CHAN_INFO_SCALE_SHARED), 687 IIO_CHAN_INFO_SCALE_SHARED_BIT |
688 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
609 .address = accel_y, 689 .address = accel_y,
610 .scan_index = ADIS16400_SCAN_ACC_Y, 690 .scan_index = ADIS16400_SCAN_ACC_Y,
611 .scan_type = IIO_ST('s', 14, 16, 0), 691 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -613,8 +693,9 @@ static struct iio_chan_spec adis16400_channels[] = {
613 .type = IIO_ACCEL, 693 .type = IIO_ACCEL,
614 .modified = 1, 694 .modified = 1,
615 .channel2 = IIO_MOD_Z, 695 .channel2 = IIO_MOD_Z,
616 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 696 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
617 (1 << IIO_CHAN_INFO_SCALE_SHARED), 697 IIO_CHAN_INFO_SCALE_SHARED_BIT |
698 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
618 .address = accel_z, 699 .address = accel_z,
619 .scan_index = ADIS16400_SCAN_ACC_Z, 700 .scan_index = ADIS16400_SCAN_ACC_Z,
620 .scan_type = IIO_ST('s', 14, 16, 0), 701 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -622,7 +703,8 @@ static struct iio_chan_spec adis16400_channels[] = {
622 .type = IIO_MAGN, 703 .type = IIO_MAGN,
623 .modified = 1, 704 .modified = 1,
624 .channel2 = IIO_MOD_X, 705 .channel2 = IIO_MOD_X,
625 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 706 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
707 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
626 .address = magn_x, 708 .address = magn_x,
627 .scan_index = ADIS16400_SCAN_MAGN_X, 709 .scan_index = ADIS16400_SCAN_MAGN_X,
628 .scan_type = IIO_ST('s', 14, 16, 0), 710 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -630,7 +712,8 @@ static struct iio_chan_spec adis16400_channels[] = {
630 .type = IIO_MAGN, 712 .type = IIO_MAGN,
631 .modified = 1, 713 .modified = 1,
632 .channel2 = IIO_MOD_Y, 714 .channel2 = IIO_MOD_Y,
633 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 715 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
716 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
634 .address = magn_y, 717 .address = magn_y,
635 .scan_index = ADIS16400_SCAN_MAGN_Y, 718 .scan_index = ADIS16400_SCAN_MAGN_Y,
636 .scan_type = IIO_ST('s', 14, 16, 0), 719 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -638,7 +721,8 @@ static struct iio_chan_spec adis16400_channels[] = {
638 .type = IIO_MAGN, 721 .type = IIO_MAGN,
639 .modified = 1, 722 .modified = 1,
640 .channel2 = IIO_MOD_Z, 723 .channel2 = IIO_MOD_Z,
641 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 724 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
725 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
642 .address = magn_z, 726 .address = magn_z,
643 .scan_index = ADIS16400_SCAN_MAGN_Z, 727 .scan_index = ADIS16400_SCAN_MAGN_Z,
644 .scan_type = IIO_ST('s', 14, 16, 0), 728 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -646,8 +730,8 @@ static struct iio_chan_spec adis16400_channels[] = {
646 .type = IIO_TEMP, 730 .type = IIO_TEMP,
647 .indexed = 1, 731 .indexed = 1,
648 .channel = 0, 732 .channel = 0,
649 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 733 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
650 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 734 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
651 .address = temp, 735 .address = temp,
652 .scan_index = ADIS16400_SCAN_TEMP, 736 .scan_index = ADIS16400_SCAN_TEMP,
653 .scan_type = IIO_ST('s', 12, 16, 0), 737 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -655,7 +739,7 @@ static struct iio_chan_spec adis16400_channels[] = {
655 .type = IIO_VOLTAGE, 739 .type = IIO_VOLTAGE,
656 .indexed = 1, 740 .indexed = 1,
657 .channel = 1, 741 .channel = 1,
658 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 742 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
659 .address = in1, 743 .address = in1,
660 .scan_index = ADIS16400_SCAN_ADC_0, 744 .scan_index = ADIS16400_SCAN_ADC_0,
661 .scan_type = IIO_ST('s', 12, 16, 0), 745 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -669,7 +753,7 @@ static struct iio_chan_spec adis16350_channels[] = {
669 .indexed = 1, 753 .indexed = 1,
670 .channel = 0, 754 .channel = 0,
671 .extend_name = "supply", 755 .extend_name = "supply",
672 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 756 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
673 .address = in_supply, 757 .address = in_supply,
674 .scan_index = ADIS16400_SCAN_SUPPLY, 758 .scan_index = ADIS16400_SCAN_SUPPLY,
675 .scan_type = IIO_ST('u', 12, 16, 0) 759 .scan_type = IIO_ST('u', 12, 16, 0)
@@ -677,8 +761,9 @@ static struct iio_chan_spec adis16350_channels[] = {
677 .type = IIO_ANGL_VEL, 761 .type = IIO_ANGL_VEL,
678 .modified = 1, 762 .modified = 1,
679 .channel2 = IIO_MOD_X, 763 .channel2 = IIO_MOD_X,
680 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 764 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
681 (1 << IIO_CHAN_INFO_SCALE_SHARED), 765 IIO_CHAN_INFO_SCALE_SHARED_BIT |
766 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
682 .address = gyro_x, 767 .address = gyro_x,
683 .scan_index = ADIS16400_SCAN_GYRO_X, 768 .scan_index = ADIS16400_SCAN_GYRO_X,
684 .scan_type = IIO_ST('s', 14, 16, 0) 769 .scan_type = IIO_ST('s', 14, 16, 0)
@@ -686,8 +771,9 @@ static struct iio_chan_spec adis16350_channels[] = {
686 .type = IIO_ANGL_VEL, 771 .type = IIO_ANGL_VEL,
687 .modified = 1, 772 .modified = 1,
688 .channel2 = IIO_MOD_Y, 773 .channel2 = IIO_MOD_Y,
689 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 774 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
690 (1 << IIO_CHAN_INFO_SCALE_SHARED), 775 IIO_CHAN_INFO_SCALE_SHARED_BIT |
776 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
691 .address = gyro_y, 777 .address = gyro_y,
692 .scan_index = ADIS16400_SCAN_GYRO_Y, 778 .scan_index = ADIS16400_SCAN_GYRO_Y,
693 .scan_type = IIO_ST('s', 14, 16, 0), 779 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -695,8 +781,9 @@ static struct iio_chan_spec adis16350_channels[] = {
695 .type = IIO_ANGL_VEL, 781 .type = IIO_ANGL_VEL,
696 .modified = 1, 782 .modified = 1,
697 .channel2 = IIO_MOD_Z, 783 .channel2 = IIO_MOD_Z,
698 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 784 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
699 (1 << IIO_CHAN_INFO_SCALE_SHARED), 785 IIO_CHAN_INFO_SCALE_SHARED_BIT |
786 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
700 .address = gyro_z, 787 .address = gyro_z,
701 .scan_index = ADIS16400_SCAN_GYRO_Z, 788 .scan_index = ADIS16400_SCAN_GYRO_Z,
702 .scan_type = IIO_ST('s', 14, 16, 0), 789 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -704,8 +791,9 @@ static struct iio_chan_spec adis16350_channels[] = {
704 .type = IIO_ACCEL, 791 .type = IIO_ACCEL,
705 .modified = 1, 792 .modified = 1,
706 .channel2 = IIO_MOD_X, 793 .channel2 = IIO_MOD_X,
707 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 794 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
708 (1 << IIO_CHAN_INFO_SCALE_SHARED), 795 IIO_CHAN_INFO_SCALE_SHARED_BIT |
796 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
709 .address = accel_x, 797 .address = accel_x,
710 .scan_index = ADIS16400_SCAN_ACC_X, 798 .scan_index = ADIS16400_SCAN_ACC_X,
711 .scan_type = IIO_ST('s', 14, 16, 0), 799 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -713,8 +801,9 @@ static struct iio_chan_spec adis16350_channels[] = {
713 .type = IIO_ACCEL, 801 .type = IIO_ACCEL,
714 .modified = 1, 802 .modified = 1,
715 .channel2 = IIO_MOD_Y, 803 .channel2 = IIO_MOD_Y,
716 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 804 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
717 (1 << IIO_CHAN_INFO_SCALE_SHARED), 805 IIO_CHAN_INFO_SCALE_SHARED_BIT |
806 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
718 .address = accel_y, 807 .address = accel_y,
719 .scan_index = ADIS16400_SCAN_ACC_Y, 808 .scan_index = ADIS16400_SCAN_ACC_Y,
720 .scan_type = IIO_ST('s', 14, 16, 0), 809 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -722,8 +811,9 @@ static struct iio_chan_spec adis16350_channels[] = {
722 .type = IIO_ACCEL, 811 .type = IIO_ACCEL,
723 .modified = 1, 812 .modified = 1,
724 .channel2 = IIO_MOD_Z, 813 .channel2 = IIO_MOD_Z,
725 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 814 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
726 (1 << IIO_CHAN_INFO_SCALE_SHARED), 815 IIO_CHAN_INFO_SCALE_SHARED_BIT |
816 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
727 .address = accel_z, 817 .address = accel_z,
728 .scan_index = ADIS16400_SCAN_ACC_Z, 818 .scan_index = ADIS16400_SCAN_ACC_Z,
729 .scan_type = IIO_ST('s', 14, 16, 0), 819 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -732,8 +822,9 @@ static struct iio_chan_spec adis16350_channels[] = {
732 .indexed = 1, 822 .indexed = 1,
733 .channel = 0, 823 .channel = 0,
734 .extend_name = "x", 824 .extend_name = "x",
735 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 825 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
736 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 826 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
827 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
737 .address = temp0, 828 .address = temp0,
738 .scan_index = ADIS16350_SCAN_TEMP_X, 829 .scan_index = ADIS16350_SCAN_TEMP_X,
739 .scan_type = IIO_ST('s', 12, 16, 0), 830 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -742,8 +833,9 @@ static struct iio_chan_spec adis16350_channels[] = {
742 .indexed = 1, 833 .indexed = 1,
743 .channel = 1, 834 .channel = 1,
744 .extend_name = "y", 835 .extend_name = "y",
745 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 836 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
746 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 837 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
838 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
747 .address = temp1, 839 .address = temp1,
748 .scan_index = ADIS16350_SCAN_TEMP_Y, 840 .scan_index = ADIS16350_SCAN_TEMP_Y,
749 .scan_type = IIO_ST('s', 12, 16, 0), 841 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -752,8 +844,8 @@ static struct iio_chan_spec adis16350_channels[] = {
752 .indexed = 1, 844 .indexed = 1,
753 .channel = 2, 845 .channel = 2,
754 .extend_name = "z", 846 .extend_name = "z",
755 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 847 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
756 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 848 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
757 .address = temp2, 849 .address = temp2,
758 .scan_index = ADIS16350_SCAN_TEMP_Z, 850 .scan_index = ADIS16350_SCAN_TEMP_Z,
759 .scan_type = IIO_ST('s', 12, 16, 0), 851 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -761,7 +853,7 @@ static struct iio_chan_spec adis16350_channels[] = {
761 .type = IIO_VOLTAGE, 853 .type = IIO_VOLTAGE,
762 .indexed = 1, 854 .indexed = 1,
763 .channel = 1, 855 .channel = 1,
764 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 856 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
765 .address = in1, 857 .address = in1,
766 .scan_index = ADIS16350_SCAN_ADC_0, 858 .scan_index = ADIS16350_SCAN_ADC_0,
767 .scan_type = IIO_ST('s', 12, 16, 0), 859 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -775,7 +867,7 @@ static struct iio_chan_spec adis16300_channels[] = {
775 .indexed = 1, 867 .indexed = 1,
776 .channel = 0, 868 .channel = 0,
777 .extend_name = "supply", 869 .extend_name = "supply",
778 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 870 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
779 .address = in_supply, 871 .address = in_supply,
780 .scan_index = ADIS16400_SCAN_SUPPLY, 872 .scan_index = ADIS16400_SCAN_SUPPLY,
781 .scan_type = IIO_ST('u', 12, 16, 0) 873 .scan_type = IIO_ST('u', 12, 16, 0)
@@ -783,8 +875,9 @@ static struct iio_chan_spec adis16300_channels[] = {
783 .type = IIO_ANGL_VEL, 875 .type = IIO_ANGL_VEL,
784 .modified = 1, 876 .modified = 1,
785 .channel2 = IIO_MOD_X, 877 .channel2 = IIO_MOD_X,
786 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 878 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
787 (1 << IIO_CHAN_INFO_SCALE_SHARED), 879 IIO_CHAN_INFO_SCALE_SHARED_BIT |
880 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
788 .address = gyro_x, 881 .address = gyro_x,
789 .scan_index = ADIS16400_SCAN_GYRO_X, 882 .scan_index = ADIS16400_SCAN_GYRO_X,
790 .scan_type = IIO_ST('s', 14, 16, 0), 883 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -792,8 +885,9 @@ static struct iio_chan_spec adis16300_channels[] = {
792 .type = IIO_ACCEL, 885 .type = IIO_ACCEL,
793 .modified = 1, 886 .modified = 1,
794 .channel2 = IIO_MOD_X, 887 .channel2 = IIO_MOD_X,
795 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 888 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
796 (1 << IIO_CHAN_INFO_SCALE_SHARED), 889 IIO_CHAN_INFO_SCALE_SHARED_BIT |
890 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
797 .address = accel_x, 891 .address = accel_x,
798 .scan_index = ADIS16400_SCAN_ACC_X, 892 .scan_index = ADIS16400_SCAN_ACC_X,
799 .scan_type = IIO_ST('s', 14, 16, 0), 893 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -801,8 +895,9 @@ static struct iio_chan_spec adis16300_channels[] = {
801 .type = IIO_ACCEL, 895 .type = IIO_ACCEL,
802 .modified = 1, 896 .modified = 1,
803 .channel2 = IIO_MOD_Y, 897 .channel2 = IIO_MOD_Y,
804 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 898 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
805 (1 << IIO_CHAN_INFO_SCALE_SHARED), 899 IIO_CHAN_INFO_SCALE_SHARED_BIT |
900 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
806 .address = accel_y, 901 .address = accel_y,
807 .scan_index = ADIS16400_SCAN_ACC_Y, 902 .scan_index = ADIS16400_SCAN_ACC_Y,
808 .scan_type = IIO_ST('s', 14, 16, 0), 903 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -810,8 +905,9 @@ static struct iio_chan_spec adis16300_channels[] = {
810 .type = IIO_ACCEL, 905 .type = IIO_ACCEL,
811 .modified = 1, 906 .modified = 1,
812 .channel2 = IIO_MOD_Z, 907 .channel2 = IIO_MOD_Z,
813 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 908 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
814 (1 << IIO_CHAN_INFO_SCALE_SHARED), 909 IIO_CHAN_INFO_SCALE_SHARED_BIT |
910 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
815 .address = accel_z, 911 .address = accel_z,
816 .scan_index = ADIS16400_SCAN_ACC_Z, 912 .scan_index = ADIS16400_SCAN_ACC_Z,
817 .scan_type = IIO_ST('s', 14, 16, 0), 913 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -819,8 +915,8 @@ static struct iio_chan_spec adis16300_channels[] = {
819 .type = IIO_TEMP, 915 .type = IIO_TEMP,
820 .indexed = 1, 916 .indexed = 1,
821 .channel = 0, 917 .channel = 0,
822 .info_mask = (1 << IIO_CHAN_INFO_OFFSET_SEPARATE) | 918 .info_mask = IIO_CHAN_INFO_OFFSET_SEPARATE_BIT |
823 (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 919 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
824 .address = temp, 920 .address = temp,
825 .scan_index = ADIS16400_SCAN_TEMP, 921 .scan_index = ADIS16400_SCAN_TEMP,
826 .scan_type = IIO_ST('s', 12, 16, 0), 922 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -828,7 +924,7 @@ static struct iio_chan_spec adis16300_channels[] = {
828 .type = IIO_VOLTAGE, 924 .type = IIO_VOLTAGE,
829 .indexed = 1, 925 .indexed = 1,
830 .channel = 1, 926 .channel = 1,
831 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), 927 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
832 .address = in1, 928 .address = in1,
833 .scan_index = ADIS16350_SCAN_ADC_0, 929 .scan_index = ADIS16350_SCAN_ADC_0,
834 .scan_type = IIO_ST('s', 12, 16, 0), 930 .scan_type = IIO_ST('s', 12, 16, 0),
@@ -836,7 +932,7 @@ static struct iio_chan_spec adis16300_channels[] = {
836 .type = IIO_INCLI, 932 .type = IIO_INCLI,
837 .modified = 1, 933 .modified = 1,
838 .channel2 = IIO_MOD_X, 934 .channel2 = IIO_MOD_X,
839 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 935 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
840 .address = incli_x, 936 .address = incli_x,
841 .scan_index = ADIS16300_SCAN_INCLI_X, 937 .scan_index = ADIS16300_SCAN_INCLI_X,
842 .scan_type = IIO_ST('s', 13, 16, 0), 938 .scan_type = IIO_ST('s', 13, 16, 0),
@@ -844,7 +940,7 @@ static struct iio_chan_spec adis16300_channels[] = {
844 .type = IIO_INCLI, 940 .type = IIO_INCLI,
845 .modified = 1, 941 .modified = 1,
846 .channel2 = IIO_MOD_Y, 942 .channel2 = IIO_MOD_Y,
847 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), 943 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
848 .address = incli_y, 944 .address = incli_y,
849 .scan_index = ADIS16300_SCAN_INCLI_Y, 945 .scan_index = ADIS16300_SCAN_INCLI_Y,
850 .scan_type = IIO_ST('s', 13, 16, 0), 946 .scan_type = IIO_ST('s', 13, 16, 0),
@@ -857,8 +953,9 @@ static const struct iio_chan_spec adis16334_channels[] = {
857 .type = IIO_ANGL_VEL, 953 .type = IIO_ANGL_VEL,
858 .modified = 1, 954 .modified = 1,
859 .channel2 = IIO_MOD_X, 955 .channel2 = IIO_MOD_X,
860 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 956 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
861 (1 << IIO_CHAN_INFO_SCALE_SHARED), 957 IIO_CHAN_INFO_SCALE_SHARED_BIT |
958 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
862 .address = gyro_x, 959 .address = gyro_x,
863 .scan_index = ADIS16400_SCAN_GYRO_X, 960 .scan_index = ADIS16400_SCAN_GYRO_X,
864 .scan_type = IIO_ST('s', 14, 16, 0), 961 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -866,8 +963,9 @@ static const struct iio_chan_spec adis16334_channels[] = {
866 .type = IIO_ANGL_VEL, 963 .type = IIO_ANGL_VEL,
867 .modified = 1, 964 .modified = 1,
868 .channel2 = IIO_MOD_Y, 965 .channel2 = IIO_MOD_Y,
869 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 966 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
870 (1 << IIO_CHAN_INFO_SCALE_SHARED), 967 IIO_CHAN_INFO_SCALE_SHARED_BIT |
968 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
871 .address = gyro_y, 969 .address = gyro_y,
872 .scan_index = ADIS16400_SCAN_GYRO_Y, 970 .scan_index = ADIS16400_SCAN_GYRO_Y,
873 .scan_type = IIO_ST('s', 14, 16, 0), 971 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -875,8 +973,9 @@ static const struct iio_chan_spec adis16334_channels[] = {
875 .type = IIO_ANGL_VEL, 973 .type = IIO_ANGL_VEL,
876 .modified = 1, 974 .modified = 1,
877 .channel2 = IIO_MOD_Z, 975 .channel2 = IIO_MOD_Z,
878 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 976 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
879 (1 << IIO_CHAN_INFO_SCALE_SHARED), 977 IIO_CHAN_INFO_SCALE_SHARED_BIT |
978 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
880 .address = gyro_z, 979 .address = gyro_z,
881 .scan_index = ADIS16400_SCAN_GYRO_Z, 980 .scan_index = ADIS16400_SCAN_GYRO_Z,
882 .scan_type = IIO_ST('s', 14, 16, 0), 981 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -884,8 +983,9 @@ static const struct iio_chan_spec adis16334_channels[] = {
884 .type = IIO_ACCEL, 983 .type = IIO_ACCEL,
885 .modified = 1, 984 .modified = 1,
886 .channel2 = IIO_MOD_X, 985 .channel2 = IIO_MOD_X,
887 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 986 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
888 (1 << IIO_CHAN_INFO_SCALE_SHARED), 987 IIO_CHAN_INFO_SCALE_SHARED_BIT |
988 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
889 .address = accel_x, 989 .address = accel_x,
890 .scan_index = ADIS16400_SCAN_ACC_X, 990 .scan_index = ADIS16400_SCAN_ACC_X,
891 .scan_type = IIO_ST('s', 14, 16, 0), 991 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -893,8 +993,9 @@ static const struct iio_chan_spec adis16334_channels[] = {
893 .type = IIO_ACCEL, 993 .type = IIO_ACCEL,
894 .modified = 1, 994 .modified = 1,
895 .channel2 = IIO_MOD_Y, 995 .channel2 = IIO_MOD_Y,
896 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 996 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
897 (1 << IIO_CHAN_INFO_SCALE_SHARED), 997 IIO_CHAN_INFO_SCALE_SHARED_BIT |
998 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
898 .address = accel_y, 999 .address = accel_y,
899 .scan_index = ADIS16400_SCAN_ACC_Y, 1000 .scan_index = ADIS16400_SCAN_ACC_Y,
900 .scan_type = IIO_ST('s', 14, 16, 0), 1001 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -902,8 +1003,9 @@ static const struct iio_chan_spec adis16334_channels[] = {
902 .type = IIO_ACCEL, 1003 .type = IIO_ACCEL,
903 .modified = 1, 1004 .modified = 1,
904 .channel2 = IIO_MOD_Z, 1005 .channel2 = IIO_MOD_Z,
905 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 1006 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
906 (1 << IIO_CHAN_INFO_SCALE_SHARED), 1007 IIO_CHAN_INFO_SCALE_SHARED_BIT |
1008 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT,
907 .address = accel_z, 1009 .address = accel_z,
908 .scan_index = ADIS16400_SCAN_ACC_Z, 1010 .scan_index = ADIS16400_SCAN_ACC_Z,
909 .scan_type = IIO_ST('s', 14, 16, 0), 1011 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -911,8 +1013,8 @@ static const struct iio_chan_spec adis16334_channels[] = {
911 .type = IIO_TEMP, 1013 .type = IIO_TEMP,
912 .indexed = 1, 1014 .indexed = 1,
913 .channel = 0, 1015 .channel = 0,
914 .info_mask = (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) | 1016 .info_mask = IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
915 (1 << IIO_CHAN_INFO_SCALE_SHARED), 1017 IIO_CHAN_INFO_SCALE_SHARED_BIT,
916 .address = accel_z, 1018 .address = accel_z,
917 .scan_index = ADIS16400_SCAN_ACC_Z, 1019 .scan_index = ADIS16400_SCAN_ACC_Z,
918 .scan_type = IIO_ST('s', 14, 16, 0), 1020 .scan_type = IIO_ST('s', 14, 16, 0),
@@ -1118,6 +1220,7 @@ static const struct spi_device_id adis16400_id[] = {
1118 {"adis16405", ADIS16400}, 1220 {"adis16405", ADIS16400},
1119 {} 1221 {}
1120}; 1222};
1223MODULE_DEVICE_TABLE(spi, adis16400_id);
1121 1224
1122static struct spi_driver adis16400_driver = { 1225static struct spi_driver adis16400_driver = {
1123 .driver = { 1226 .driver = {
diff --git a/drivers/staging/iio/imu/adis16400_ring.c b/drivers/staging/iio/imu/adis16400_ring.c
index fd886bf51a6d..ac22de573f3e 100644
--- a/drivers/staging/iio/imu/adis16400_ring.c
+++ b/drivers/staging/iio/imu/adis16400_ring.c
@@ -79,14 +79,16 @@ static int adis16350_spi_read_all(struct device *dev, u8 *rx)
79 struct spi_message msg; 79 struct spi_message msg;
80 int i, j = 0, ret; 80 int i, j = 0, ret;
81 struct spi_transfer *xfers; 81 struct spi_transfer *xfers;
82 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
83 indio_dev->masklength);
82 84
83 xfers = kzalloc(sizeof(*xfers)*indio_dev->buffer->scan_count + 1, 85 xfers = kzalloc(sizeof(*xfers)*(scan_count + 1),
84 GFP_KERNEL); 86 GFP_KERNEL);
85 if (xfers == NULL) 87 if (xfers == NULL)
86 return -ENOMEM; 88 return -ENOMEM;
87 89
88 for (i = 0; i < ARRAY_SIZE(read_all_tx_array); i++) 90 for (i = 0; i < ARRAY_SIZE(read_all_tx_array); i++)
89 if (test_bit(i, indio_dev->buffer->scan_mask)) { 91 if (test_bit(i, indio_dev->active_scan_mask)) {
90 xfers[j].tx_buf = &read_all_tx_array[i]; 92 xfers[j].tx_buf = &read_all_tx_array[i];
91 xfers[j].bits_per_word = 16; 93 xfers[j].bits_per_word = 16;
92 xfers[j].len = 2; 94 xfers[j].len = 2;
@@ -97,7 +99,7 @@ static int adis16350_spi_read_all(struct device *dev, u8 *rx)
97 xfers[j].len = 2; 99 xfers[j].len = 2;
98 100
99 spi_message_init(&msg); 101 spi_message_init(&msg);
100 for (j = 0; j < indio_dev->buffer->scan_count + 1; j++) 102 for (j = 0; j < scan_count + 1; j++)
101 spi_message_add_tail(&xfers[j], &msg); 103 spi_message_add_tail(&xfers[j], &msg);
102 104
103 ret = spi_sync(st->us, &msg); 105 ret = spi_sync(st->us, &msg);
@@ -119,26 +121,27 @@ static irqreturn_t adis16400_trigger_handler(int irq, void *p)
119 s16 *data; 121 s16 *data;
120 size_t datasize = ring->access->get_bytes_per_datum(ring); 122 size_t datasize = ring->access->get_bytes_per_datum(ring);
121 /* Asumption that long is enough for maximum channels */ 123 /* Asumption that long is enough for maximum channels */
122 unsigned long mask = *ring->scan_mask; 124 unsigned long mask = *indio_dev->active_scan_mask;
123 125 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
126 indio_dev->masklength);
124 data = kmalloc(datasize , GFP_KERNEL); 127 data = kmalloc(datasize , GFP_KERNEL);
125 if (data == NULL) { 128 if (data == NULL) {
126 dev_err(&st->us->dev, "memory alloc failed in ring bh"); 129 dev_err(&st->us->dev, "memory alloc failed in ring bh");
127 return -ENOMEM; 130 return -ENOMEM;
128 } 131 }
129 132
130 if (ring->scan_count) { 133 if (scan_count) {
131 if (st->variant->flags & ADIS16400_NO_BURST) { 134 if (st->variant->flags & ADIS16400_NO_BURST) {
132 ret = adis16350_spi_read_all(&indio_dev->dev, st->rx); 135 ret = adis16350_spi_read_all(&indio_dev->dev, st->rx);
133 if (ret < 0) 136 if (ret < 0)
134 goto err; 137 goto err;
135 for (; i < ring->scan_count; i++) 138 for (; i < scan_count; i++)
136 data[i] = *(s16 *)(st->rx + i*2); 139 data[i] = *(s16 *)(st->rx + i*2);
137 } else { 140 } else {
138 ret = adis16400_spi_read_burst(&indio_dev->dev, st->rx); 141 ret = adis16400_spi_read_burst(&indio_dev->dev, st->rx);
139 if (ret < 0) 142 if (ret < 0)
140 goto err; 143 goto err;
141 for (; i < indio_dev->buffer->scan_count; i++) { 144 for (; i < scan_count; i++) {
142 j = __ffs(mask); 145 j = __ffs(mask);
143 mask &= ~(1 << j); 146 mask &= ~(1 << j);
144 data[i] = be16_to_cpup( 147 data[i] = be16_to_cpup(
@@ -186,10 +189,8 @@ int adis16400_configure_ring(struct iio_dev *indio_dev)
186 indio_dev->buffer = ring; 189 indio_dev->buffer = ring;
187 /* Effectively select the ring buffer implementation */ 190 /* Effectively select the ring buffer implementation */
188 ring->access = &ring_sw_access_funcs; 191 ring->access = &ring_sw_access_funcs;
189 ring->bpe = 2;
190 ring->scan_timestamp = true; 192 ring->scan_timestamp = true;
191 ring->setup_ops = &adis16400_ring_setup_ops; 193 indio_dev->setup_ops = &adis16400_ring_setup_ops;
192 ring->owner = THIS_MODULE;
193 194
194 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 195 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
195 &adis16400_trigger_handler, 196 &adis16400_trigger_handler,
diff --git a/drivers/staging/iio/industrialio-buffer.c b/drivers/staging/iio/industrialio-buffer.c
index 9df0ce81dade..d7b1e9e435ae 100644
--- a/drivers/staging/iio/industrialio-buffer.c
+++ b/drivers/staging/iio/industrialio-buffer.c
@@ -24,7 +24,7 @@
24#include "iio.h" 24#include "iio.h"
25#include "iio_core.h" 25#include "iio_core.h"
26#include "sysfs.h" 26#include "sysfs.h"
27#include "buffer_generic.h" 27#include "buffer.h"
28 28
29static const char * const iio_endian_prefix[] = { 29static const char * const iio_endian_prefix[] = {
30 [IIO_BE] = "be", 30 [IIO_BE] = "be",
@@ -43,7 +43,7 @@ ssize_t iio_buffer_read_first_n_outer(struct file *filp, char __user *buf,
43 struct iio_dev *indio_dev = filp->private_data; 43 struct iio_dev *indio_dev = filp->private_data;
44 struct iio_buffer *rb = indio_dev->buffer; 44 struct iio_buffer *rb = indio_dev->buffer;
45 45
46 if (!rb->access->read_first_n) 46 if (!rb || !rb->access->read_first_n)
47 return -EINVAL; 47 return -EINVAL;
48 return rb->access->read_first_n(rb, n, buf); 48 return rb->access->read_first_n(rb, n, buf);
49} 49}
@@ -64,28 +64,9 @@ unsigned int iio_buffer_poll(struct file *filp,
64 return 0; 64 return 0;
65} 65}
66 66
67int iio_chrdev_buffer_open(struct iio_dev *indio_dev) 67void iio_buffer_init(struct iio_buffer *buffer)
68{ 68{
69 struct iio_buffer *rb = indio_dev->buffer; 69 INIT_LIST_HEAD(&buffer->demux_list);
70 if (!rb)
71 return -EINVAL;
72 if (rb->access->mark_in_use)
73 rb->access->mark_in_use(rb);
74 return 0;
75}
76
77void iio_chrdev_buffer_release(struct iio_dev *indio_dev)
78{
79 struct iio_buffer *rb = indio_dev->buffer;
80
81 clear_bit(IIO_BUSY_BIT_POS, &rb->flags);
82 if (rb->access->unmark_in_use)
83 rb->access->unmark_in_use(rb);
84}
85
86void iio_buffer_init(struct iio_buffer *buffer, struct iio_dev *indio_dev)
87{
88 buffer->indio_dev = indio_dev;
89 init_waitqueue_head(&buffer->pollq); 70 init_waitqueue_head(&buffer->pollq);
90} 71}
91EXPORT_SYMBOL(iio_buffer_init); 72EXPORT_SYMBOL(iio_buffer_init);
@@ -126,17 +107,15 @@ static ssize_t iio_scan_el_show(struct device *dev,
126 int ret; 107 int ret;
127 struct iio_dev *indio_dev = dev_get_drvdata(dev); 108 struct iio_dev *indio_dev = dev_get_drvdata(dev);
128 109
129 ret = iio_scan_mask_query(indio_dev->buffer, 110 ret = test_bit(to_iio_dev_attr(attr)->address,
130 to_iio_dev_attr(attr)->address); 111 indio_dev->buffer->scan_mask);
131 if (ret < 0) 112
132 return ret;
133 return sprintf(buf, "%d\n", ret); 113 return sprintf(buf, "%d\n", ret);
134} 114}
135 115
136static int iio_scan_mask_clear(struct iio_buffer *buffer, int bit) 116static int iio_scan_mask_clear(struct iio_buffer *buffer, int bit)
137{ 117{
138 clear_bit(bit, buffer->scan_mask); 118 clear_bit(bit, buffer->scan_mask);
139 buffer->scan_count--;
140 return 0; 119 return 0;
141} 120}
142 121
@@ -153,11 +132,11 @@ static ssize_t iio_scan_el_store(struct device *dev,
153 132
154 state = !(buf[0] == '0'); 133 state = !(buf[0] == '0');
155 mutex_lock(&indio_dev->mlock); 134 mutex_lock(&indio_dev->mlock);
156 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { 135 if (iio_buffer_enabled(indio_dev)) {
157 ret = -EBUSY; 136 ret = -EBUSY;
158 goto error_ret; 137 goto error_ret;
159 } 138 }
160 ret = iio_scan_mask_query(buffer, this_attr->address); 139 ret = iio_scan_mask_query(indio_dev, buffer, this_attr->address);
161 if (ret < 0) 140 if (ret < 0)
162 goto error_ret; 141 goto error_ret;
163 if (!state && ret) { 142 if (!state && ret) {
@@ -165,7 +144,7 @@ static ssize_t iio_scan_el_store(struct device *dev,
165 if (ret) 144 if (ret)
166 goto error_ret; 145 goto error_ret;
167 } else if (state && !ret) { 146 } else if (state && !ret) {
168 ret = iio_scan_mask_set(buffer, this_attr->address); 147 ret = iio_scan_mask_set(indio_dev, buffer, this_attr->address);
169 if (ret) 148 if (ret)
170 goto error_ret; 149 goto error_ret;
171 } 150 }
@@ -173,7 +152,7 @@ static ssize_t iio_scan_el_store(struct device *dev,
173error_ret: 152error_ret:
174 mutex_unlock(&indio_dev->mlock); 153 mutex_unlock(&indio_dev->mlock);
175 154
176 return ret ? ret : len; 155 return ret < 0 ? ret : len;
177 156
178} 157}
179 158
@@ -196,7 +175,7 @@ static ssize_t iio_scan_el_ts_store(struct device *dev,
196 175
197 state = !(buf[0] == '0'); 176 state = !(buf[0] == '0');
198 mutex_lock(&indio_dev->mlock); 177 mutex_lock(&indio_dev->mlock);
199 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { 178 if (iio_buffer_enabled(indio_dev)) {
200 ret = -EBUSY; 179 ret = -EBUSY;
201 goto error_ret; 180 goto error_ret;
202 } 181 }
@@ -311,12 +290,14 @@ int iio_buffer_register(struct iio_dev *indio_dev,
311 if (ret < 0) 290 if (ret < 0)
312 goto error_cleanup_dynamic; 291 goto error_cleanup_dynamic;
313 attrcount += ret; 292 attrcount += ret;
293 if (channels[i].type == IIO_TIMESTAMP)
294 buffer->scan_index_timestamp =
295 channels[i].scan_index;
314 } 296 }
315 if (indio_dev->masklength && buffer->scan_mask == NULL) { 297 if (indio_dev->masklength && buffer->scan_mask == NULL) {
316 buffer->scan_mask 298 buffer->scan_mask = kcalloc(BITS_TO_LONGS(indio_dev->masklength),
317 = kzalloc(sizeof(*buffer->scan_mask)* 299 sizeof(*buffer->scan_mask),
318 BITS_TO_LONGS(indio_dev->masklength), 300 GFP_KERNEL);
319 GFP_KERNEL);
320 if (buffer->scan_mask == NULL) { 301 if (buffer->scan_mask == NULL) {
321 ret = -ENOMEM; 302 ret = -ENOMEM;
322 goto error_cleanup_dynamic; 303 goto error_cleanup_dynamic;
@@ -326,10 +307,9 @@ int iio_buffer_register(struct iio_dev *indio_dev,
326 307
327 buffer->scan_el_group.name = iio_scan_elements_group_name; 308 buffer->scan_el_group.name = iio_scan_elements_group_name;
328 309
329 buffer->scan_el_group.attrs 310 buffer->scan_el_group.attrs = kcalloc(attrcount + 1,
330 = kzalloc(sizeof(buffer->scan_el_group.attrs[0])* 311 sizeof(buffer->scan_el_group.attrs[0]),
331 (attrcount + 1), 312 GFP_KERNEL);
332 GFP_KERNEL);
333 if (buffer->scan_el_group.attrs == NULL) { 313 if (buffer->scan_el_group.attrs == NULL) {
334 ret = -ENOMEM; 314 ret = -ENOMEM;
335 goto error_free_scan_mask; 315 goto error_free_scan_mask;
@@ -395,31 +375,20 @@ ssize_t iio_buffer_write_length(struct device *dev,
395 if (val == buffer->access->get_length(buffer)) 375 if (val == buffer->access->get_length(buffer))
396 return len; 376 return len;
397 377
398 if (buffer->access->set_length) { 378 mutex_lock(&indio_dev->mlock);
399 buffer->access->set_length(buffer, val); 379 if (iio_buffer_enabled(indio_dev)) {
400 if (buffer->access->mark_param_change) 380 ret = -EBUSY;
401 buffer->access->mark_param_change(buffer); 381 } else {
382 if (buffer->access->set_length)
383 buffer->access->set_length(buffer, val);
384 ret = 0;
402 } 385 }
386 mutex_unlock(&indio_dev->mlock);
403 387
404 return len; 388 return ret ? ret : len;
405} 389}
406EXPORT_SYMBOL(iio_buffer_write_length); 390EXPORT_SYMBOL(iio_buffer_write_length);
407 391
408ssize_t iio_buffer_read_bytes_per_datum(struct device *dev,
409 struct device_attribute *attr,
410 char *buf)
411{
412 struct iio_dev *indio_dev = dev_get_drvdata(dev);
413 struct iio_buffer *buffer = indio_dev->buffer;
414
415 if (buffer->access->get_bytes_per_datum)
416 return sprintf(buf, "%d\n",
417 buffer->access->get_bytes_per_datum(buffer));
418
419 return 0;
420}
421EXPORT_SYMBOL(iio_buffer_read_bytes_per_datum);
422
423ssize_t iio_buffer_store_enable(struct device *dev, 392ssize_t iio_buffer_store_enable(struct device *dev,
424 struct device_attribute *attr, 393 struct device_attribute *attr,
425 const char *buf, 394 const char *buf,
@@ -434,14 +403,14 @@ ssize_t iio_buffer_store_enable(struct device *dev,
434 mutex_lock(&indio_dev->mlock); 403 mutex_lock(&indio_dev->mlock);
435 previous_mode = indio_dev->currentmode; 404 previous_mode = indio_dev->currentmode;
436 requested_state = !(buf[0] == '0'); 405 requested_state = !(buf[0] == '0');
437 current_state = !!(previous_mode & INDIO_ALL_BUFFER_MODES); 406 current_state = iio_buffer_enabled(indio_dev);
438 if (current_state == requested_state) { 407 if (current_state == requested_state) {
439 printk(KERN_INFO "iio-buffer, current state requested again\n"); 408 printk(KERN_INFO "iio-buffer, current state requested again\n");
440 goto done; 409 goto done;
441 } 410 }
442 if (requested_state) { 411 if (requested_state) {
443 if (buffer->setup_ops->preenable) { 412 if (indio_dev->setup_ops->preenable) {
444 ret = buffer->setup_ops->preenable(indio_dev); 413 ret = indio_dev->setup_ops->preenable(indio_dev);
445 if (ret) { 414 if (ret) {
446 printk(KERN_ERR 415 printk(KERN_ERR
447 "Buffer not started:" 416 "Buffer not started:"
@@ -458,16 +427,12 @@ ssize_t iio_buffer_store_enable(struct device *dev,
458 goto error_ret; 427 goto error_ret;
459 } 428 }
460 } 429 }
461 if (buffer->access->mark_in_use)
462 buffer->access->mark_in_use(buffer);
463 /* Definitely possible for devices to support both of these.*/ 430 /* Definitely possible for devices to support both of these.*/
464 if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) { 431 if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) {
465 if (!indio_dev->trig) { 432 if (!indio_dev->trig) {
466 printk(KERN_INFO 433 printk(KERN_INFO
467 "Buffer not started: no trigger\n"); 434 "Buffer not started: no trigger\n");
468 ret = -EINVAL; 435 ret = -EINVAL;
469 if (buffer->access->unmark_in_use)
470 buffer->access->unmark_in_use(buffer);
471 goto error_ret; 436 goto error_ret;
472 } 437 }
473 indio_dev->currentmode = INDIO_BUFFER_TRIGGERED; 438 indio_dev->currentmode = INDIO_BUFFER_TRIGGERED;
@@ -478,32 +443,28 @@ ssize_t iio_buffer_store_enable(struct device *dev,
478 goto error_ret; 443 goto error_ret;
479 } 444 }
480 445
481 if (buffer->setup_ops->postenable) { 446 if (indio_dev->setup_ops->postenable) {
482 ret = buffer->setup_ops->postenable(indio_dev); 447 ret = indio_dev->setup_ops->postenable(indio_dev);
483 if (ret) { 448 if (ret) {
484 printk(KERN_INFO 449 printk(KERN_INFO
485 "Buffer not started:" 450 "Buffer not started:"
486 "postenable failed\n"); 451 "postenable failed\n");
487 if (buffer->access->unmark_in_use)
488 buffer->access->unmark_in_use(buffer);
489 indio_dev->currentmode = previous_mode; 452 indio_dev->currentmode = previous_mode;
490 if (buffer->setup_ops->postdisable) 453 if (indio_dev->setup_ops->postdisable)
491 buffer->setup_ops-> 454 indio_dev->setup_ops->
492 postdisable(indio_dev); 455 postdisable(indio_dev);
493 goto error_ret; 456 goto error_ret;
494 } 457 }
495 } 458 }
496 } else { 459 } else {
497 if (buffer->setup_ops->predisable) { 460 if (indio_dev->setup_ops->predisable) {
498 ret = buffer->setup_ops->predisable(indio_dev); 461 ret = indio_dev->setup_ops->predisable(indio_dev);
499 if (ret) 462 if (ret)
500 goto error_ret; 463 goto error_ret;
501 } 464 }
502 if (buffer->access->unmark_in_use)
503 buffer->access->unmark_in_use(buffer);
504 indio_dev->currentmode = INDIO_DIRECT_MODE; 465 indio_dev->currentmode = INDIO_DIRECT_MODE;
505 if (buffer->setup_ops->postdisable) { 466 if (indio_dev->setup_ops->postdisable) {
506 ret = buffer->setup_ops->postdisable(indio_dev); 467 ret = indio_dev->setup_ops->postdisable(indio_dev);
507 if (ret) 468 if (ret)
508 goto error_ret; 469 goto error_ret;
509 } 470 }
@@ -523,37 +484,10 @@ ssize_t iio_buffer_show_enable(struct device *dev,
523 char *buf) 484 char *buf)
524{ 485{
525 struct iio_dev *indio_dev = dev_get_drvdata(dev); 486 struct iio_dev *indio_dev = dev_get_drvdata(dev);
526 return sprintf(buf, "%d\n", !!(indio_dev->currentmode 487 return sprintf(buf, "%d\n", iio_buffer_enabled(indio_dev));
527 & INDIO_ALL_BUFFER_MODES));
528} 488}
529EXPORT_SYMBOL(iio_buffer_show_enable); 489EXPORT_SYMBOL(iio_buffer_show_enable);
530 490
531int iio_sw_buffer_preenable(struct iio_dev *indio_dev)
532{
533 struct iio_buffer *buffer = indio_dev->buffer;
534 size_t size;
535 dev_dbg(&indio_dev->dev, "%s\n", __func__);
536 /* Check if there are any scan elements enabled, if not fail*/
537 if (!(buffer->scan_count || buffer->scan_timestamp))
538 return -EINVAL;
539 if (buffer->scan_timestamp)
540 if (buffer->scan_count)
541 /* Timestamp (aligned to s64) and data */
542 size = (((buffer->scan_count * buffer->bpe)
543 + sizeof(s64) - 1)
544 & ~(sizeof(s64) - 1))
545 + sizeof(s64);
546 else /* Timestamp only */
547 size = sizeof(s64);
548 else /* Data only */
549 size = buffer->scan_count * buffer->bpe;
550 buffer->access->set_bytes_per_datum(buffer, size);
551
552 return 0;
553}
554EXPORT_SYMBOL(iio_sw_buffer_preenable);
555
556
557/* note NULL used as error indicator as it doesn't make sense. */ 491/* note NULL used as error indicator as it doesn't make sense. */
558static unsigned long *iio_scan_mask_match(unsigned long *av_masks, 492static unsigned long *iio_scan_mask_match(unsigned long *av_masks,
559 unsigned int masklength, 493 unsigned int masklength,
@@ -569,14 +503,57 @@ static unsigned long *iio_scan_mask_match(unsigned long *av_masks,
569 return NULL; 503 return NULL;
570} 504}
571 505
506int iio_sw_buffer_preenable(struct iio_dev *indio_dev)
507{
508 struct iio_buffer *buffer = indio_dev->buffer;
509 const struct iio_chan_spec *ch;
510 unsigned bytes = 0;
511 int length, i;
512 dev_dbg(&indio_dev->dev, "%s\n", __func__);
513
514 /* How much space will the demuxed element take? */
515 for_each_set_bit(i, buffer->scan_mask,
516 indio_dev->masklength) {
517 ch = iio_find_channel_from_si(indio_dev, i);
518 length = ch->scan_type.storagebits/8;
519 bytes = ALIGN(bytes, length);
520 bytes += length;
521 }
522 if (buffer->scan_timestamp) {
523 ch = iio_find_channel_from_si(indio_dev,
524 buffer->scan_index_timestamp);
525 length = ch->scan_type.storagebits/8;
526 bytes = ALIGN(bytes, length);
527 bytes += length;
528 }
529 buffer->access->set_bytes_per_datum(buffer, bytes);
530
531 /* What scan mask do we actually have ?*/
532 if (indio_dev->available_scan_masks)
533 indio_dev->active_scan_mask =
534 iio_scan_mask_match(indio_dev->available_scan_masks,
535 indio_dev->masklength,
536 buffer->scan_mask);
537 else
538 indio_dev->active_scan_mask = buffer->scan_mask;
539 iio_update_demux(indio_dev);
540
541 if (indio_dev->info->update_scan_mode)
542 return indio_dev->info
543 ->update_scan_mode(indio_dev,
544 indio_dev->active_scan_mask);
545 return 0;
546}
547EXPORT_SYMBOL(iio_sw_buffer_preenable);
548
572/** 549/**
573 * iio_scan_mask_set() - set particular bit in the scan mask 550 * iio_scan_mask_set() - set particular bit in the scan mask
574 * @buffer: the buffer whose scan mask we are interested in 551 * @buffer: the buffer whose scan mask we are interested in
575 * @bit: the bit to be set. 552 * @bit: the bit to be set.
576 **/ 553 **/
577int iio_scan_mask_set(struct iio_buffer *buffer, int bit) 554int iio_scan_mask_set(struct iio_dev *indio_dev,
555 struct iio_buffer *buffer, int bit)
578{ 556{
579 struct iio_dev *indio_dev = buffer->indio_dev;
580 unsigned long *mask; 557 unsigned long *mask;
581 unsigned long *trialmask; 558 unsigned long *trialmask;
582 559
@@ -604,7 +581,6 @@ int iio_scan_mask_set(struct iio_buffer *buffer, int bit)
604 } 581 }
605 } 582 }
606 bitmap_copy(buffer->scan_mask, trialmask, indio_dev->masklength); 583 bitmap_copy(buffer->scan_mask, trialmask, indio_dev->masklength);
607 buffer->scan_count++;
608 584
609 kfree(trialmask); 585 kfree(trialmask);
610 586
@@ -612,25 +588,147 @@ int iio_scan_mask_set(struct iio_buffer *buffer, int bit)
612}; 588};
613EXPORT_SYMBOL_GPL(iio_scan_mask_set); 589EXPORT_SYMBOL_GPL(iio_scan_mask_set);
614 590
615int iio_scan_mask_query(struct iio_buffer *buffer, int bit) 591int iio_scan_mask_query(struct iio_dev *indio_dev,
592 struct iio_buffer *buffer, int bit)
616{ 593{
617 struct iio_dev *indio_dev = buffer->indio_dev;
618 long *mask;
619
620 if (bit > indio_dev->masklength) 594 if (bit > indio_dev->masklength)
621 return -EINVAL; 595 return -EINVAL;
622 596
623 if (!buffer->scan_mask) 597 if (!buffer->scan_mask)
624 return 0; 598 return 0;
625 if (indio_dev->available_scan_masks)
626 mask = iio_scan_mask_match(indio_dev->available_scan_masks,
627 indio_dev->masklength,
628 buffer->scan_mask);
629 else
630 mask = buffer->scan_mask;
631 if (!mask)
632 return 0;
633 599
634 return test_bit(bit, mask); 600 return test_bit(bit, buffer->scan_mask);
635}; 601};
636EXPORT_SYMBOL_GPL(iio_scan_mask_query); 602EXPORT_SYMBOL_GPL(iio_scan_mask_query);
603
604/**
605 * struct iio_demux_table() - table describing demux memcpy ops
606 * @from: index to copy from
607 * @to: index to copy to
608 * @length: how many bytes to copy
609 * @l: list head used for management
610 */
611struct iio_demux_table {
612 unsigned from;
613 unsigned to;
614 unsigned length;
615 struct list_head l;
616};
617
618static unsigned char *iio_demux(struct iio_buffer *buffer,
619 unsigned char *datain)
620{
621 struct iio_demux_table *t;
622
623 if (list_empty(&buffer->demux_list))
624 return datain;
625 list_for_each_entry(t, &buffer->demux_list, l)
626 memcpy(buffer->demux_bounce + t->to,
627 datain + t->from, t->length);
628
629 return buffer->demux_bounce;
630}
631
632int iio_push_to_buffer(struct iio_buffer *buffer, unsigned char *data,
633 s64 timestamp)
634{
635 unsigned char *dataout = iio_demux(buffer, data);
636
637 return buffer->access->store_to(buffer, dataout, timestamp);
638}
639EXPORT_SYMBOL_GPL(iio_push_to_buffer);
640
641int iio_update_demux(struct iio_dev *indio_dev)
642{
643 const struct iio_chan_spec *ch;
644 struct iio_buffer *buffer = indio_dev->buffer;
645 int ret, in_ind = -1, out_ind, length;
646 unsigned in_loc = 0, out_loc = 0;
647 struct iio_demux_table *p, *q;
648
649 /* Clear out any old demux */
650 list_for_each_entry_safe(p, q, &buffer->demux_list, l) {
651 list_del(&p->l);
652 kfree(p);
653 }
654 kfree(buffer->demux_bounce);
655 buffer->demux_bounce = NULL;
656
657 /* First work out which scan mode we will actually have */
658 if (bitmap_equal(indio_dev->active_scan_mask,
659 buffer->scan_mask,
660 indio_dev->masklength))
661 return 0;
662
663 /* Now we have the two masks, work from least sig and build up sizes */
664 for_each_set_bit(out_ind,
665 indio_dev->active_scan_mask,
666 indio_dev->masklength) {
667 in_ind = find_next_bit(indio_dev->active_scan_mask,
668 indio_dev->masklength,
669 in_ind + 1);
670 while (in_ind != out_ind) {
671 in_ind = find_next_bit(indio_dev->active_scan_mask,
672 indio_dev->masklength,
673 in_ind + 1);
674 ch = iio_find_channel_from_si(indio_dev, in_ind);
675 length = ch->scan_type.storagebits/8;
676 /* Make sure we are aligned */
677 in_loc += length;
678 if (in_loc % length)
679 in_loc += length - in_loc % length;
680 }
681 p = kmalloc(sizeof(*p), GFP_KERNEL);
682 if (p == NULL) {
683 ret = -ENOMEM;
684 goto error_clear_mux_table;
685 }
686 ch = iio_find_channel_from_si(indio_dev, in_ind);
687 length = ch->scan_type.storagebits/8;
688 if (out_loc % length)
689 out_loc += length - out_loc % length;
690 if (in_loc % length)
691 in_loc += length - in_loc % length;
692 p->from = in_loc;
693 p->to = out_loc;
694 p->length = length;
695 list_add_tail(&p->l, &buffer->demux_list);
696 out_loc += length;
697 in_loc += length;
698 }
699 /* Relies on scan_timestamp being last */
700 if (buffer->scan_timestamp) {
701 p = kmalloc(sizeof(*p), GFP_KERNEL);
702 if (p == NULL) {
703 ret = -ENOMEM;
704 goto error_clear_mux_table;
705 }
706 ch = iio_find_channel_from_si(indio_dev,
707 buffer->scan_index_timestamp);
708 length = ch->scan_type.storagebits/8;
709 if (out_loc % length)
710 out_loc += length - out_loc % length;
711 if (in_loc % length)
712 in_loc += length - in_loc % length;
713 p->from = in_loc;
714 p->to = out_loc;
715 p->length = length;
716 list_add_tail(&p->l, &buffer->demux_list);
717 out_loc += length;
718 in_loc += length;
719 }
720 buffer->demux_bounce = kzalloc(out_loc, GFP_KERNEL);
721 if (buffer->demux_bounce == NULL) {
722 ret = -ENOMEM;
723 goto error_clear_mux_table;
724 }
725 return 0;
726
727error_clear_mux_table:
728 list_for_each_entry_safe(p, q, &buffer->demux_list, l) {
729 list_del(&p->l);
730 kfree(p);
731 }
732 return ret;
733}
734EXPORT_SYMBOL_GPL(iio_update_demux);
diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c
index aec9311b108c..19f897f3c85e 100644
--- a/drivers/staging/iio/industrialio-core.c
+++ b/drivers/staging/iio/industrialio-core.c
@@ -25,8 +25,8 @@
25#include "iio.h" 25#include "iio.h"
26#include "iio_core.h" 26#include "iio_core.h"
27#include "iio_core_trigger.h" 27#include "iio_core_trigger.h"
28#include "chrdev.h"
29#include "sysfs.h" 28#include "sysfs.h"
29#include "events.h"
30 30
31/* IDA to assign each registered device a unique id*/ 31/* IDA to assign each registered device a unique id*/
32static DEFINE_IDA(iio_ida); 32static DEFINE_IDA(iio_ida);
@@ -77,17 +77,29 @@ static const char * const iio_modifier_names[] = {
77 77
78/* relies on pairs of these shared then separate */ 78/* relies on pairs of these shared then separate */
79static const char * const iio_chan_info_postfix[] = { 79static const char * const iio_chan_info_postfix[] = {
80 [IIO_CHAN_INFO_SCALE_SHARED/2] = "scale", 80 [IIO_CHAN_INFO_SCALE] = "scale",
81 [IIO_CHAN_INFO_OFFSET_SHARED/2] = "offset", 81 [IIO_CHAN_INFO_OFFSET] = "offset",
82 [IIO_CHAN_INFO_CALIBSCALE_SHARED/2] = "calibscale", 82 [IIO_CHAN_INFO_CALIBSCALE] = "calibscale",
83 [IIO_CHAN_INFO_CALIBBIAS_SHARED/2] = "calibbias", 83 [IIO_CHAN_INFO_CALIBBIAS] = "calibbias",
84 [IIO_CHAN_INFO_PEAK_SHARED/2] = "peak_raw", 84 [IIO_CHAN_INFO_PEAK] = "peak_raw",
85 [IIO_CHAN_INFO_PEAK_SCALE_SHARED/2] = "peak_scale", 85 [IIO_CHAN_INFO_PEAK_SCALE] = "peak_scale",
86 [IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SHARED/2] 86 [IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW] = "quadrature_correction_raw",
87 = "quadrature_correction_raw", 87 [IIO_CHAN_INFO_AVERAGE_RAW] = "mean_raw",
88 [IIO_CHAN_INFO_AVERAGE_RAW_SHARED/2] = "mean_raw", 88 [IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY]
89 = "filter_low_pass_3db_frequency",
89}; 90};
90 91
92const struct iio_chan_spec
93*iio_find_channel_from_si(struct iio_dev *indio_dev, int si)
94{
95 int i;
96
97 for (i = 0; i < indio_dev->num_channels; i++)
98 if (indio_dev->channels[i].scan_index == si)
99 return &indio_dev->channels[i];
100 return NULL;
101}
102
91/** 103/**
92 * struct iio_detected_event_list - list element for events that have occurred 104 * struct iio_detected_event_list - list element for events that have occurred
93 * @list: linked list header 105 * @list: linked list header
@@ -169,8 +181,11 @@ static ssize_t iio_event_chrdev_read(struct file *filep,
169{ 181{
170 struct iio_event_interface *ev_int = filep->private_data; 182 struct iio_event_interface *ev_int = filep->private_data;
171 struct iio_detected_event_list *el; 183 struct iio_detected_event_list *el;
184 size_t len = sizeof(el->ev);
172 int ret; 185 int ret;
173 size_t len; 186
187 if (count < len)
188 return -EINVAL;
174 189
175 mutex_lock(&ev_int->event_list_lock); 190 mutex_lock(&ev_int->event_list_lock);
176 if (list_empty(&ev_int->det_events)) { 191 if (list_empty(&ev_int->det_events)) {
@@ -192,7 +207,6 @@ static ssize_t iio_event_chrdev_read(struct file *filep,
192 el = list_first_entry(&ev_int->det_events, 207 el = list_first_entry(&ev_int->det_events,
193 struct iio_detected_event_list, 208 struct iio_detected_event_list,
194 list); 209 list);
195 len = sizeof el->ev;
196 if (copy_to_user(buf, &(el->ev), len)) { 210 if (copy_to_user(buf, &(el->ev), len)) {
197 ret = -EFAULT; 211 ret = -EFAULT;
198 goto error_mutex_unlock; 212 goto error_mutex_unlock;
@@ -415,7 +429,7 @@ int __iio_device_attr_init(struct device_attribute *dev_attr,
415 sysfs_attr_init(&dev_attr->attr); 429 sysfs_attr_init(&dev_attr->attr);
416 430
417 /* Build up postfix of <extend_name>_<modifier>_postfix */ 431 /* Build up postfix of <extend_name>_<modifier>_postfix */
418 if (chan->modified) { 432 if (chan->modified && !generic) {
419 if (chan->extend_name) 433 if (chan->extend_name)
420 full_postfix = kasprintf(GFP_KERNEL, "%s_%s_%s", 434 full_postfix = kasprintf(GFP_KERNEL, "%s_%s_%s",
421 iio_modifier_names[chan 435 iio_modifier_names[chan
@@ -600,7 +614,7 @@ static int iio_device_add_channel_sysfs(struct iio_dev *indio_dev,
600 chan, 614 chan,
601 &iio_read_channel_info, 615 &iio_read_channel_info,
602 &iio_write_channel_info, 616 &iio_write_channel_info,
603 (1 << i), 617 i/2,
604 !(i%2), 618 !(i%2),
605 &indio_dev->dev, 619 &indio_dev->dev,
606 &indio_dev->channel_attr_list); 620 &indio_dev->channel_attr_list);
@@ -665,10 +679,9 @@ static int iio_device_register_sysfs(struct iio_dev *indio_dev)
665 if (indio_dev->name) 679 if (indio_dev->name)
666 attrcount++; 680 attrcount++;
667 681
668 indio_dev->chan_attr_group.attrs 682 indio_dev->chan_attr_group.attrs = kcalloc(attrcount + 1,
669 = kzalloc(sizeof(indio_dev->chan_attr_group.attrs[0])* 683 sizeof(indio_dev->chan_attr_group.attrs[0]),
670 (attrcount + 1), 684 GFP_KERNEL);
671 GFP_KERNEL);
672 if (indio_dev->chan_attr_group.attrs == NULL) { 685 if (indio_dev->chan_attr_group.attrs == NULL) {
673 ret = -ENOMEM; 686 ret = -ENOMEM;
674 goto error_clear_attrs; 687 goto error_clear_attrs;
@@ -788,6 +801,9 @@ static ssize_t iio_ev_value_store(struct device *dev,
788 unsigned long val; 801 unsigned long val;
789 int ret; 802 int ret;
790 803
804 if (!indio_dev->info->write_event_value)
805 return -EINVAL;
806
791 ret = strict_strtoul(buf, 10, &val); 807 ret = strict_strtoul(buf, 10, &val);
792 if (ret) 808 if (ret)
793 return ret; 809 return ret;
@@ -958,10 +974,9 @@ static int iio_device_register_eventset(struct iio_dev *indio_dev)
958 } 974 }
959 975
960 indio_dev->event_interface->group.name = iio_event_group_name; 976 indio_dev->event_interface->group.name = iio_event_group_name;
961 indio_dev->event_interface->group.attrs = 977 indio_dev->event_interface->group.attrs = kcalloc(attrcount + 1,
962 kzalloc(sizeof(indio_dev->event_interface->group.attrs[0]) 978 sizeof(indio_dev->event_interface->group.attrs[0]),
963 *(attrcount + 1), 979 GFP_KERNEL);
964 GFP_KERNEL);
965 if (indio_dev->event_interface->group.attrs == NULL) { 980 if (indio_dev->event_interface->group.attrs == NULL) {
966 ret = -ENOMEM; 981 ret = -ENOMEM;
967 goto error_free_setup_event_lines; 982 goto error_free_setup_event_lines;
@@ -1068,9 +1083,13 @@ static int iio_chrdev_open(struct inode *inode, struct file *filp)
1068{ 1083{
1069 struct iio_dev *indio_dev = container_of(inode->i_cdev, 1084 struct iio_dev *indio_dev = container_of(inode->i_cdev,
1070 struct iio_dev, chrdev); 1085 struct iio_dev, chrdev);
1086
1087 if (test_and_set_bit(IIO_BUSY_BIT_POS, &indio_dev->flags))
1088 return -EBUSY;
1089
1071 filp->private_data = indio_dev; 1090 filp->private_data = indio_dev;
1072 1091
1073 return iio_chrdev_buffer_open(indio_dev); 1092 return 0;
1074} 1093}
1075 1094
1076/** 1095/**
@@ -1078,8 +1097,9 @@ static int iio_chrdev_open(struct inode *inode, struct file *filp)
1078 **/ 1097 **/
1079static int iio_chrdev_release(struct inode *inode, struct file *filp) 1098static int iio_chrdev_release(struct inode *inode, struct file *filp)
1080{ 1099{
1081 iio_chrdev_buffer_release(container_of(inode->i_cdev, 1100 struct iio_dev *indio_dev = container_of(inode->i_cdev,
1082 struct iio_dev, chrdev)); 1101 struct iio_dev, chrdev);
1102 clear_bit(IIO_BUSY_BIT_POS, &indio_dev->flags);
1083 return 0; 1103 return 0;
1084} 1104}
1085 1105
diff --git a/drivers/staging/iio/industrialio-trigger.c b/drivers/staging/iio/industrialio-trigger.c
index 68a4d4e8c635..47ecadd4818d 100644
--- a/drivers/staging/iio/industrialio-trigger.c
+++ b/drivers/staging/iio/industrialio-trigger.c
@@ -159,13 +159,12 @@ EXPORT_SYMBOL(iio_trigger_generic_data_rdy_poll);
159void iio_trigger_poll_chained(struct iio_trigger *trig, s64 time) 159void iio_trigger_poll_chained(struct iio_trigger *trig, s64 time)
160{ 160{
161 int i; 161 int i;
162 if (!trig->use_count) { 162 if (!trig->use_count)
163 for (i = 0; i < CONFIG_IIO_CONSUMERS_PER_TRIGGER; i++) 163 for (i = 0; i < CONFIG_IIO_CONSUMERS_PER_TRIGGER; i++)
164 if (trig->subirqs[i].enabled) { 164 if (trig->subirqs[i].enabled) {
165 trig->use_count++; 165 trig->use_count++;
166 handle_nested_irq(trig->subirq_base + i); 166 handle_nested_irq(trig->subirq_base + i);
167 } 167 }
168 }
169} 168}
170EXPORT_SYMBOL(iio_trigger_poll_chained); 169EXPORT_SYMBOL(iio_trigger_poll_chained);
171 170
@@ -173,10 +172,9 @@ void iio_trigger_notify_done(struct iio_trigger *trig)
173{ 172{
174 trig->use_count--; 173 trig->use_count--;
175 if (trig->use_count == 0 && trig->ops && trig->ops->try_reenable) 174 if (trig->use_count == 0 && trig->ops && trig->ops->try_reenable)
176 if (trig->ops->try_reenable(trig)) { 175 if (trig->ops->try_reenable(trig))
177 /* Missed and interrupt so launch new poll now */ 176 /* Missed and interrupt so launch new poll now */
178 iio_trigger_poll(trig, 0); 177 iio_trigger_poll(trig, 0);
179 }
180} 178}
181EXPORT_SYMBOL(iio_trigger_notify_done); 179EXPORT_SYMBOL(iio_trigger_notify_done);
182 180
@@ -222,8 +220,16 @@ static int iio_trigger_attach_poll_func(struct iio_trigger *trig,
222 ret = request_threaded_irq(pf->irq, pf->h, pf->thread, 220 ret = request_threaded_irq(pf->irq, pf->h, pf->thread,
223 pf->type, pf->name, 221 pf->type, pf->name,
224 pf); 222 pf);
225 if (trig->ops && trig->ops->set_trigger_state && notinuse) 223 if (ret < 0) {
224 module_put(pf->indio_dev->info->driver_module);
225 return ret;
226 }
227
228 if (trig->ops && trig->ops->set_trigger_state && notinuse) {
226 ret = trig->ops->set_trigger_state(trig, true); 229 ret = trig->ops->set_trigger_state(trig, true);
230 if (ret < 0)
231 module_put(pf->indio_dev->info->driver_module);
232 }
227 233
228 return ret; 234 return ret;
229} 235}
@@ -336,6 +342,8 @@ static ssize_t iio_trigger_write_current(struct device *dev,
336 mutex_unlock(&indio_dev->mlock); 342 mutex_unlock(&indio_dev->mlock);
337 343
338 trig = iio_trigger_find_by_name(buf, len); 344 trig = iio_trigger_find_by_name(buf, len);
345 if (oldtrig == trig)
346 return len;
339 347
340 if (trig && indio_dev->info->validate_trigger) { 348 if (trig && indio_dev->info->validate_trigger) {
341 ret = indio_dev->info->validate_trigger(indio_dev, trig); 349 ret = indio_dev->info->validate_trigger(indio_dev, trig);
@@ -473,12 +481,10 @@ void iio_free_trigger(struct iio_trigger *trig)
473} 481}
474EXPORT_SYMBOL(iio_free_trigger); 482EXPORT_SYMBOL(iio_free_trigger);
475 483
476int iio_device_register_trigger_consumer(struct iio_dev *indio_dev) 484void iio_device_register_trigger_consumer(struct iio_dev *indio_dev)
477{ 485{
478 indio_dev->groups[indio_dev->groupcounter++] = 486 indio_dev->groups[indio_dev->groupcounter++] =
479 &iio_trigger_consumer_attr_group; 487 &iio_trigger_consumer_attr_group;
480
481 return 0;
482} 488}
483 489
484void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev) 490void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev)
@@ -490,18 +496,14 @@ void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev)
490 496
491int iio_triggered_buffer_postenable(struct iio_dev *indio_dev) 497int iio_triggered_buffer_postenable(struct iio_dev *indio_dev)
492{ 498{
493 return indio_dev->trig 499 return iio_trigger_attach_poll_func(indio_dev->trig,
494 ? iio_trigger_attach_poll_func(indio_dev->trig, 500 indio_dev->pollfunc);
495 indio_dev->pollfunc)
496 : 0;
497} 501}
498EXPORT_SYMBOL(iio_triggered_buffer_postenable); 502EXPORT_SYMBOL(iio_triggered_buffer_postenable);
499 503
500int iio_triggered_buffer_predisable(struct iio_dev *indio_dev) 504int iio_triggered_buffer_predisable(struct iio_dev *indio_dev)
501{ 505{
502 return indio_dev->trig 506 return iio_trigger_dettach_poll_func(indio_dev->trig,
503 ? iio_trigger_dettach_poll_func(indio_dev->trig, 507 indio_dev->pollfunc);
504 indio_dev->pollfunc)
505 : 0;
506} 508}
507EXPORT_SYMBOL(iio_triggered_buffer_predisable); 509EXPORT_SYMBOL(iio_triggered_buffer_predisable);
diff --git a/drivers/staging/iio/kfifo_buf.c b/drivers/staging/iio/kfifo_buf.c
index e8c234bb18f0..e1e9c06cde4a 100644
--- a/drivers/staging/iio/kfifo_buf.c
+++ b/drivers/staging/iio/kfifo_buf.c
@@ -11,9 +11,7 @@
11struct iio_kfifo { 11struct iio_kfifo {
12 struct iio_buffer buffer; 12 struct iio_buffer buffer;
13 struct kfifo kf; 13 struct kfifo kf;
14 int use_count;
15 int update_needed; 14 int update_needed;
16 struct mutex use_lock;
17}; 15};
18 16
19#define iio_to_kfifo(r) container_of(r, struct iio_kfifo, buffer) 17#define iio_to_kfifo(r) container_of(r, struct iio_kfifo, buffer)
@@ -33,54 +31,25 @@ static int iio_request_update_kfifo(struct iio_buffer *r)
33 int ret = 0; 31 int ret = 0;
34 struct iio_kfifo *buf = iio_to_kfifo(r); 32 struct iio_kfifo *buf = iio_to_kfifo(r);
35 33
36 mutex_lock(&buf->use_lock);
37 if (!buf->update_needed) 34 if (!buf->update_needed)
38 goto error_ret; 35 goto error_ret;
39 if (buf->use_count) {
40 ret = -EAGAIN;
41 goto error_ret;
42 }
43 kfifo_free(&buf->kf); 36 kfifo_free(&buf->kf);
44 ret = __iio_allocate_kfifo(buf, buf->buffer.bytes_per_datum, 37 ret = __iio_allocate_kfifo(buf, buf->buffer.bytes_per_datum,
45 buf->buffer.length); 38 buf->buffer.length);
46error_ret: 39error_ret:
47 mutex_unlock(&buf->use_lock);
48 return ret; 40 return ret;
49} 41}
50 42
51static void iio_mark_kfifo_in_use(struct iio_buffer *r)
52{
53 struct iio_kfifo *buf = iio_to_kfifo(r);
54 mutex_lock(&buf->use_lock);
55 buf->use_count++;
56 mutex_unlock(&buf->use_lock);
57}
58
59static void iio_unmark_kfifo_in_use(struct iio_buffer *r)
60{
61 struct iio_kfifo *buf = iio_to_kfifo(r);
62 mutex_lock(&buf->use_lock);
63 buf->use_count--;
64 mutex_unlock(&buf->use_lock);
65}
66
67static int iio_get_length_kfifo(struct iio_buffer *r) 43static int iio_get_length_kfifo(struct iio_buffer *r)
68{ 44{
69 return r->length; 45 return r->length;
70} 46}
71 47
72static inline void __iio_init_kfifo(struct iio_kfifo *kf)
73{
74 mutex_init(&kf->use_lock);
75}
76
77static IIO_BUFFER_ENABLE_ATTR; 48static IIO_BUFFER_ENABLE_ATTR;
78static IIO_BUFFER_BYTES_PER_DATUM_ATTR;
79static IIO_BUFFER_LENGTH_ATTR; 49static IIO_BUFFER_LENGTH_ATTR;
80 50
81static struct attribute *iio_kfifo_attributes[] = { 51static struct attribute *iio_kfifo_attributes[] = {
82 &dev_attr_length.attr, 52 &dev_attr_length.attr,
83 &dev_attr_bytes_per_datum.attr,
84 &dev_attr_enable.attr, 53 &dev_attr_enable.attr,
85 NULL, 54 NULL,
86}; 55};
@@ -98,9 +67,8 @@ struct iio_buffer *iio_kfifo_allocate(struct iio_dev *indio_dev)
98 if (!kf) 67 if (!kf)
99 return NULL; 68 return NULL;
100 kf->update_needed = true; 69 kf->update_needed = true;
101 iio_buffer_init(&kf->buffer, indio_dev); 70 iio_buffer_init(&kf->buffer);
102 kf->buffer.attrs = &iio_kfifo_attribute_group; 71 kf->buffer.attrs = &iio_kfifo_attribute_group;
103 __iio_init_kfifo(kf);
104 72
105 return &kf->buffer; 73 return &kf->buffer;
106} 74}
@@ -111,20 +79,19 @@ static int iio_get_bytes_per_datum_kfifo(struct iio_buffer *r)
111 return r->bytes_per_datum; 79 return r->bytes_per_datum;
112} 80}
113 81
114static int iio_set_bytes_per_datum_kfifo(struct iio_buffer *r, size_t bpd) 82static int iio_mark_update_needed_kfifo(struct iio_buffer *r)
115{ 83{
116 if (r->bytes_per_datum != bpd) { 84 struct iio_kfifo *kf = iio_to_kfifo(r);
117 r->bytes_per_datum = bpd; 85 kf->update_needed = true;
118 if (r->access->mark_param_change)
119 r->access->mark_param_change(r);
120 }
121 return 0; 86 return 0;
122} 87}
123 88
124static int iio_mark_update_needed_kfifo(struct iio_buffer *r) 89static int iio_set_bytes_per_datum_kfifo(struct iio_buffer *r, size_t bpd)
125{ 90{
126 struct iio_kfifo *kf = iio_to_kfifo(r); 91 if (r->bytes_per_datum != bpd) {
127 kf->update_needed = true; 92 r->bytes_per_datum = bpd;
93 iio_mark_update_needed_kfifo(r);
94 }
128 return 0; 95 return 0;
129} 96}
130 97
@@ -132,8 +99,7 @@ static int iio_set_length_kfifo(struct iio_buffer *r, int length)
132{ 99{
133 if (r->length != length) { 100 if (r->length != length) {
134 r->length = length; 101 r->length = length;
135 if (r->access->mark_param_change) 102 iio_mark_update_needed_kfifo(r);
136 r->access->mark_param_change(r);
137 } 103 }
138 return 0; 104 return 0;
139} 105}
@@ -150,16 +116,9 @@ static int iio_store_to_kfifo(struct iio_buffer *r,
150{ 116{
151 int ret; 117 int ret;
152 struct iio_kfifo *kf = iio_to_kfifo(r); 118 struct iio_kfifo *kf = iio_to_kfifo(r);
153 u8 *datal = kmalloc(r->bytes_per_datum, GFP_KERNEL);
154 memcpy(datal, data, r->bytes_per_datum - sizeof(timestamp));
155 memcpy(datal + r->bytes_per_datum - sizeof(timestamp),
156 &timestamp, sizeof(timestamp));
157 ret = kfifo_in(&kf->kf, data, r->bytes_per_datum); 119 ret = kfifo_in(&kf->kf, data, r->bytes_per_datum);
158 if (ret != r->bytes_per_datum) { 120 if (ret != r->bytes_per_datum)
159 kfree(datal);
160 return -EBUSY; 121 return -EBUSY;
161 }
162 kfree(datal);
163 return 0; 122 return 0;
164} 123}
165 124
@@ -169,17 +128,18 @@ static int iio_read_first_n_kfifo(struct iio_buffer *r,
169 int ret, copied; 128 int ret, copied;
170 struct iio_kfifo *kf = iio_to_kfifo(r); 129 struct iio_kfifo *kf = iio_to_kfifo(r);
171 130
172 ret = kfifo_to_user(&kf->kf, buf, r->bytes_per_datum*n, &copied); 131 if (n < r->bytes_per_datum)
132 return -EINVAL;
133
134 n = rounddown(n, r->bytes_per_datum);
135 ret = kfifo_to_user(&kf->kf, buf, n, &copied);
173 136
174 return copied; 137 return copied;
175} 138}
176 139
177const struct iio_buffer_access_funcs kfifo_access_funcs = { 140const struct iio_buffer_access_funcs kfifo_access_funcs = {
178 .mark_in_use = &iio_mark_kfifo_in_use,
179 .unmark_in_use = &iio_unmark_kfifo_in_use,
180 .store_to = &iio_store_to_kfifo, 141 .store_to = &iio_store_to_kfifo,
181 .read_first_n = &iio_read_first_n_kfifo, 142 .read_first_n = &iio_read_first_n_kfifo,
182 .mark_param_change = &iio_mark_update_needed_kfifo,
183 .request_update = &iio_request_update_kfifo, 143 .request_update = &iio_request_update_kfifo,
184 .get_bytes_per_datum = &iio_get_bytes_per_datum_kfifo, 144 .get_bytes_per_datum = &iio_get_bytes_per_datum_kfifo,
185 .set_bytes_per_datum = &iio_set_bytes_per_datum_kfifo, 145 .set_bytes_per_datum = &iio_set_bytes_per_datum_kfifo,
diff --git a/drivers/staging/iio/kfifo_buf.h b/drivers/staging/iio/kfifo_buf.h
index a15598bb9fdb..cc2bd9a1ccfe 100644
--- a/drivers/staging/iio/kfifo_buf.h
+++ b/drivers/staging/iio/kfifo_buf.h
@@ -1,7 +1,7 @@
1 1
2#include <linux/kfifo.h> 2#include <linux/kfifo.h>
3#include "iio.h" 3#include "iio.h"
4#include "buffer_generic.h" 4#include "buffer.h"
5 5
6extern const struct iio_buffer_access_funcs kfifo_access_funcs; 6extern const struct iio_buffer_access_funcs kfifo_access_funcs;
7 7
diff --git a/drivers/staging/iio/light/isl29018.c b/drivers/staging/iio/light/isl29018.c
index 47638362224b..849d6a564afa 100644
--- a/drivers/staging/iio/light/isl29018.c
+++ b/drivers/staging/iio/light/isl29018.c
@@ -362,8 +362,7 @@ static int isl29018_write_raw(struct iio_dev *indio_dev,
362 int ret = -EINVAL; 362 int ret = -EINVAL;
363 363
364 mutex_lock(&chip->lock); 364 mutex_lock(&chip->lock);
365 if (mask == (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) && 365 if (mask == IIO_CHAN_INFO_CALIBSCALE && chan->type == IIO_LIGHT) {
366 chan->type == IIO_LIGHT) {
367 chip->lux_scale = val; 366 chip->lux_scale = val;
368 ret = 0; 367 ret = 0;
369 } 368 }
@@ -402,7 +401,7 @@ static int isl29018_read_raw(struct iio_dev *indio_dev,
402 if (!ret) 401 if (!ret)
403 ret = IIO_VAL_INT; 402 ret = IIO_VAL_INT;
404 break; 403 break;
405 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 404 case IIO_CHAN_INFO_CALIBSCALE:
406 if (chan->type == IIO_LIGHT) { 405 if (chan->type == IIO_LIGHT) {
407 *val = chip->lux_scale; 406 *val = chip->lux_scale;
408 ret = IIO_VAL_INT; 407 ret = IIO_VAL_INT;
@@ -421,7 +420,7 @@ static const struct iio_chan_spec isl29018_channels[] = {
421 .indexed = 1, 420 .indexed = 1,
422 .channel = 0, 421 .channel = 0,
423 .processed_val = IIO_PROCESSED, 422 .processed_val = IIO_PROCESSED,
424 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE), 423 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT,
425 }, { 424 }, {
426 .type = IIO_INTENSITY, 425 .type = IIO_INTENSITY,
427 .modified = 1, 426 .modified = 1,
diff --git a/drivers/staging/iio/light/tsl2563.c b/drivers/staging/iio/light/tsl2563.c
index 1942db13b03b..ffca85e81ef5 100644
--- a/drivers/staging/iio/light/tsl2563.c
+++ b/drivers/staging/iio/light/tsl2563.c
@@ -37,6 +37,7 @@
37 37
38#include "../iio.h" 38#include "../iio.h"
39#include "../sysfs.h" 39#include "../sysfs.h"
40#include "../events.h"
40#include "tsl2563.h" 41#include "tsl2563.h"
41 42
42/* Use this many bits for fraction part. */ 43/* Use this many bits for fraction part. */
@@ -226,6 +227,8 @@ static int tsl2563_read_id(struct tsl2563_chip *chip, u8 *id)
226 if (ret < 0) 227 if (ret < 0)
227 return ret; 228 return ret;
228 229
230 *id = ret;
231
229 return 0; 232 return 0;
230} 233}
231 234
@@ -510,7 +513,7 @@ static int tsl2563_read_raw(struct iio_dev *indio_dev,
510 } 513 }
511 break; 514 break;
512 515
513 case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE): 516 case IIO_CHAN_INFO_CALIBSCALE:
514 if (chan->channel == 0) 517 if (chan->channel == 0)
515 *val = calib_to_sysfs(chip->calib0); 518 *val = calib_to_sysfs(chip->calib0);
516 else 519 else
@@ -536,7 +539,7 @@ static const struct iio_chan_spec tsl2563_channels[] = {
536 .type = IIO_INTENSITY, 539 .type = IIO_INTENSITY,
537 .modified = 1, 540 .modified = 1,
538 .channel2 = IIO_MOD_LIGHT_BOTH, 541 .channel2 = IIO_MOD_LIGHT_BOTH,
539 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE), 542 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT,
540 .event_mask = (IIO_EV_BIT(IIO_EV_TYPE_THRESH, 543 .event_mask = (IIO_EV_BIT(IIO_EV_TYPE_THRESH,
541 IIO_EV_DIR_RISING) | 544 IIO_EV_DIR_RISING) |
542 IIO_EV_BIT(IIO_EV_TYPE_THRESH, 545 IIO_EV_BIT(IIO_EV_TYPE_THRESH,
@@ -544,8 +547,8 @@ static const struct iio_chan_spec tsl2563_channels[] = {
544 }, { 547 }, {
545 .type = IIO_INTENSITY, 548 .type = IIO_INTENSITY,
546 .modified = 1, 549 .modified = 1,
547 .channel2 = IIO_MOD_LIGHT_BOTH, 550 .channel2 = IIO_MOD_LIGHT_IR,
548 .info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE), 551 .info_mask = IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT,
549 } 552 }
550}; 553};
551 554
diff --git a/drivers/staging/iio/light/tsl2583.c b/drivers/staging/iio/light/tsl2583.c
index 3836f73a5296..5b6455a238d8 100644
--- a/drivers/staging/iio/light/tsl2583.c
+++ b/drivers/staging/iio/light/tsl2583.c
@@ -194,6 +194,7 @@ static int taos_get_lux(struct iio_dev *indio_dev)
194{ 194{
195 u16 ch0, ch1; /* separated ch0/ch1 data from device */ 195 u16 ch0, ch1; /* separated ch0/ch1 data from device */
196 u32 lux; /* raw lux calculated from device data */ 196 u32 lux; /* raw lux calculated from device data */
197 u64 lux64;
197 u32 ratio; 198 u32 ratio;
198 u8 buf[5]; 199 u8 buf[5];
199 struct taos_lux *p; 200 struct taos_lux *p;
@@ -297,9 +298,19 @@ static int taos_get_lux(struct iio_dev *indio_dev)
297 lux = (lux + (chip->als_time_scale >> 1)) / 298 lux = (lux + (chip->als_time_scale >> 1)) /
298 chip->als_time_scale; 299 chip->als_time_scale;
299 300
300 /* adjust for active gain scale */ 301 /* Adjust for active gain scale.
301 lux >>= 13; /* tables have factor of 8192 builtin for accuracy */ 302 * The taos_device_lux tables above have a factor of 8192 built in,
302 lux = (lux * chip->taos_settings.als_gain_trim + 500) / 1000; 303 * so we need to shift right.
304 * User-specified gain provides a multiplier.
305 * Apply user-specified gain before shifting right to retain precision.
306 * Use 64 bits to avoid overflow on multiplication.
307 * Then go back to 32 bits before division to avoid using div_u64().
308 */
309 lux64 = lux;
310 lux64 = lux64 * chip->taos_settings.als_gain_trim;
311 lux64 >>= 13;
312 lux = lux64;
313 lux = (lux + 500) / 1000;
303 if (lux > TSL258X_LUX_CALC_OVER_FLOW) { /* check for overflow */ 314 if (lux > TSL258X_LUX_CALC_OVER_FLOW) { /* check for overflow */
304return_max: 315return_max:
305 lux = TSL258X_LUX_CALC_OVER_FLOW; 316 lux = TSL258X_LUX_CALC_OVER_FLOW;
diff --git a/drivers/staging/iio/magnetometer/ak8975.c b/drivers/staging/iio/magnetometer/ak8975.c
index db31d6d0e5b6..3158f12cb051 100644
--- a/drivers/staging/iio/magnetometer/ak8975.c
+++ b/drivers/staging/iio/magnetometer/ak8975.c
@@ -431,7 +431,7 @@ static int ak8975_read_raw(struct iio_dev *indio_dev,
431 switch (mask) { 431 switch (mask) {
432 case 0: 432 case 0:
433 return ak8975_read_axis(indio_dev, chan->address, val); 433 return ak8975_read_axis(indio_dev, chan->address, val);
434 case (1 << IIO_CHAN_INFO_SCALE_SEPARATE): 434 case IIO_CHAN_INFO_SCALE:
435 *val = data->raw_to_gauss[chan->address]; 435 *val = data->raw_to_gauss[chan->address];
436 return IIO_VAL_INT; 436 return IIO_VAL_INT;
437 } 437 }
@@ -443,7 +443,7 @@ static int ak8975_read_raw(struct iio_dev *indio_dev,
443 .type = IIO_MAGN, \ 443 .type = IIO_MAGN, \
444 .modified = 1, \ 444 .modified = 1, \
445 .channel2 = IIO_MOD_##axis, \ 445 .channel2 = IIO_MOD_##axis, \
446 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE), \ 446 .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
447 .address = index, \ 447 .address = index, \
448 } 448 }
449 449
diff --git a/drivers/staging/iio/magnetometer/hmc5843.c b/drivers/staging/iio/magnetometer/hmc5843.c
index 7bb1bc605136..f2e85a9cf196 100644
--- a/drivers/staging/iio/magnetometer/hmc5843.c
+++ b/drivers/staging/iio/magnetometer/hmc5843.c
@@ -463,7 +463,7 @@ static int hmc5843_read_raw(struct iio_dev *indio_dev,
463 return hmc5843_read_measurement(indio_dev, 463 return hmc5843_read_measurement(indio_dev,
464 chan->address, 464 chan->address,
465 val); 465 val);
466 case (1 << IIO_CHAN_INFO_SCALE_SHARED): 466 case IIO_CHAN_INFO_SCALE:
467 *val = 0; 467 *val = 0;
468 *val2 = hmc5843_regval_to_nanoscale[data->range]; 468 *val2 = hmc5843_regval_to_nanoscale[data->range];
469 return IIO_VAL_INT_PLUS_NANO; 469 return IIO_VAL_INT_PLUS_NANO;
@@ -476,7 +476,7 @@ static int hmc5843_read_raw(struct iio_dev *indio_dev,
476 .type = IIO_MAGN, \ 476 .type = IIO_MAGN, \
477 .modified = 1, \ 477 .modified = 1, \
478 .channel2 = IIO_MOD_##axis, \ 478 .channel2 = IIO_MOD_##axis, \
479 .info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED), \ 479 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT, \
480 .address = add \ 480 .address = add \
481 } 481 }
482 482
@@ -605,6 +605,7 @@ static const struct i2c_device_id hmc5843_id[] = {
605 { "hmc5843", 0 }, 605 { "hmc5843", 0 },
606 { } 606 { }
607}; 607};
608MODULE_DEVICE_TABLE(i2c, hmc5843_id);
608 609
609static struct i2c_driver hmc5843_driver = { 610static struct i2c_driver hmc5843_driver = {
610 .driver = { 611 .driver = {
diff --git a/drivers/staging/iio/meter/ade7753.c b/drivers/staging/iio/meter/ade7753.c
index 4c7b0cbf49fa..57baac6c0d40 100644
--- a/drivers/staging/iio/meter/ade7753.c
+++ b/drivers/staging/iio/meter/ade7753.c
@@ -582,3 +582,4 @@ module_spi_driver(ade7753_driver);
582MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 582MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
583MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter"); 583MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
584MODULE_LICENSE("GPL v2"); 584MODULE_LICENSE("GPL v2");
585MODULE_ALIAS("spi:ade7753");
diff --git a/drivers/staging/iio/meter/ade7754.c b/drivers/staging/iio/meter/ade7754.c
index 15c98cde76d1..8d81c92007e9 100644
--- a/drivers/staging/iio/meter/ade7754.c
+++ b/drivers/staging/iio/meter/ade7754.c
@@ -605,3 +605,4 @@ module_spi_driver(ade7754_driver);
605MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 605MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
606MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver"); 606MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
607MODULE_LICENSE("GPL v2"); 607MODULE_LICENSE("GPL v2");
608MODULE_ALIAS("spi:ad7754");
diff --git a/drivers/staging/iio/meter/ade7758_core.c b/drivers/staging/iio/meter/ade7758_core.c
index 39338bcb1872..dcb20294dfe8 100644
--- a/drivers/staging/iio/meter/ade7758_core.c
+++ b/drivers/staging/iio/meter/ade7758_core.c
@@ -20,7 +20,7 @@
20 20
21#include "../iio.h" 21#include "../iio.h"
22#include "../sysfs.h" 22#include "../sysfs.h"
23#include "../buffer_generic.h" 23#include "../buffer.h"
24#include "meter.h" 24#include "meter.h"
25#include "ade7758.h" 25#include "ade7758.h"
26 26
@@ -663,63 +663,63 @@ static const struct attribute_group ade7758_attribute_group = {
663 663
664static struct iio_chan_spec ade7758_channels[] = { 664static struct iio_chan_spec ade7758_channels[] = {
665 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 0, 0, 665 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 0, 0,
666 (1 << IIO_CHAN_INFO_SCALE_SHARED), 666 IIO_CHAN_INFO_SCALE_SHARED_BIT,
667 AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE), 667 AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE),
668 0, IIO_ST('s', 24, 32, 0), 0), 668 0, IIO_ST('s', 24, 32, 0), 0),
669 IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 0, 0, 669 IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 0, 0,
670 (1 << IIO_CHAN_INFO_SCALE_SHARED), 670 IIO_CHAN_INFO_SCALE_SHARED_BIT,
671 AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT), 671 AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT),
672 1, IIO_ST('s', 24, 32, 0), 0), 672 1, IIO_ST('s', 24, 32, 0), 0),
673 IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 0, 0, 673 IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 0, 0,
674 (1 << IIO_CHAN_INFO_SCALE_SHARED), 674 IIO_CHAN_INFO_SCALE_SHARED_BIT,
675 AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR), 675 AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR),
676 2, IIO_ST('s', 24, 32, 0), 0), 676 2, IIO_ST('s', 24, 32, 0), 0),
677 IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 0, 0, 677 IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 0, 0,
678 (1 << IIO_CHAN_INFO_SCALE_SHARED), 678 IIO_CHAN_INFO_SCALE_SHARED_BIT,
679 AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR), 679 AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR),
680 3, IIO_ST('s', 24, 32, 0), 0), 680 3, IIO_ST('s', 24, 32, 0), 0),
681 IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 0, 0, 681 IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 0, 0,
682 (1 << IIO_CHAN_INFO_SCALE_SHARED), 682 IIO_CHAN_INFO_SCALE_SHARED_BIT,
683 AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR), 683 AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR),
684 4, IIO_ST('s', 24, 32, 0), 0), 684 4, IIO_ST('s', 24, 32, 0), 0),
685 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 1, 0, 685 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 1, 0,
686 (1 << IIO_CHAN_INFO_SCALE_SHARED), 686 IIO_CHAN_INFO_SCALE_SHARED_BIT,
687 AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE), 687 AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE),
688 5, IIO_ST('s', 24, 32, 0), 0), 688 5, IIO_ST('s', 24, 32, 0), 0),
689 IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 1, 0, 689 IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 1, 0,
690 (1 << IIO_CHAN_INFO_SCALE_SHARED), 690 IIO_CHAN_INFO_SCALE_SHARED_BIT,
691 AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT), 691 AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT),
692 6, IIO_ST('s', 24, 32, 0), 0), 692 6, IIO_ST('s', 24, 32, 0), 0),
693 IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 1, 0, 693 IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 1, 0,
694 (1 << IIO_CHAN_INFO_SCALE_SHARED), 694 IIO_CHAN_INFO_SCALE_SHARED_BIT,
695 AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR), 695 AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR),
696 7, IIO_ST('s', 24, 32, 0), 0), 696 7, IIO_ST('s', 24, 32, 0), 0),
697 IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 1, 0, 697 IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 1, 0,
698 (1 << IIO_CHAN_INFO_SCALE_SHARED), 698 IIO_CHAN_INFO_SCALE_SHARED_BIT,
699 AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR), 699 AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR),
700 8, IIO_ST('s', 24, 32, 0), 0), 700 8, IIO_ST('s', 24, 32, 0), 0),
701 IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 1, 0, 701 IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 1, 0,
702 (1 << IIO_CHAN_INFO_SCALE_SHARED), 702 IIO_CHAN_INFO_SCALE_SHARED_BIT,
703 AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR), 703 AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR),
704 9, IIO_ST('s', 24, 32, 0), 0), 704 9, IIO_ST('s', 24, 32, 0), 0),
705 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 2, 0, 705 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 2, 0,
706 (1 << IIO_CHAN_INFO_SCALE_SHARED), 706 IIO_CHAN_INFO_SCALE_SHARED_BIT,
707 AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE), 707 AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE),
708 10, IIO_ST('s', 24, 32, 0), 0), 708 10, IIO_ST('s', 24, 32, 0), 0),
709 IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 2, 0, 709 IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 2, 0,
710 (1 << IIO_CHAN_INFO_SCALE_SHARED), 710 IIO_CHAN_INFO_SCALE_SHARED_BIT,
711 AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT), 711 AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT),
712 11, IIO_ST('s', 24, 32, 0), 0), 712 11, IIO_ST('s', 24, 32, 0), 0),
713 IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 2, 0, 713 IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 2, 0,
714 (1 << IIO_CHAN_INFO_SCALE_SHARED), 714 IIO_CHAN_INFO_SCALE_SHARED_BIT,
715 AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR), 715 AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR),
716 12, IIO_ST('s', 24, 32, 0), 0), 716 12, IIO_ST('s', 24, 32, 0), 0),
717 IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 2, 0, 717 IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 2, 0,
718 (1 << IIO_CHAN_INFO_SCALE_SHARED), 718 IIO_CHAN_INFO_SCALE_SHARED_BIT,
719 AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR), 719 AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR),
720 13, IIO_ST('s', 24, 32, 0), 0), 720 13, IIO_ST('s', 24, 32, 0), 0),
721 IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 2, 0, 721 IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 2, 0,
722 (1 << IIO_CHAN_INFO_SCALE_SHARED), 722 IIO_CHAN_INFO_SCALE_SHARED_BIT,
723 AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR), 723 AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR),
724 14, IIO_ST('s', 24, 32, 0), 0), 724 14, IIO_ST('s', 24, 32, 0), 0),
725 IIO_CHAN_SOFT_TIMESTAMP(15), 725 IIO_CHAN_SOFT_TIMESTAMP(15),
@@ -746,12 +746,12 @@ static int __devinit ade7758_probe(struct spi_device *spi)
746 spi_set_drvdata(spi, indio_dev); 746 spi_set_drvdata(spi, indio_dev);
747 747
748 /* Allocate the comms buffers */ 748 /* Allocate the comms buffers */
749 st->rx = kzalloc(sizeof(*st->rx)*ADE7758_MAX_RX, GFP_KERNEL); 749 st->rx = kcalloc(ADE7758_MAX_RX, sizeof(*st->rx), GFP_KERNEL);
750 if (st->rx == NULL) { 750 if (st->rx == NULL) {
751 ret = -ENOMEM; 751 ret = -ENOMEM;
752 goto error_free_dev; 752 goto error_free_dev;
753 } 753 }
754 st->tx = kzalloc(sizeof(*st->tx)*ADE7758_MAX_TX, GFP_KERNEL); 754 st->tx = kcalloc(ADE7758_MAX_TX, sizeof(*st->tx), GFP_KERNEL);
755 if (st->tx == NULL) { 755 if (st->tx == NULL) {
756 ret = -ENOMEM; 756 ret = -ENOMEM;
757 goto error_free_rx; 757 goto error_free_rx;
@@ -843,6 +843,7 @@ static const struct spi_device_id ade7758_id[] = {
843 {"ade7758", 0}, 843 {"ade7758", 0},
844 {} 844 {}
845}; 845};
846MODULE_DEVICE_TABLE(spi, ade7758_id);
846 847
847static struct spi_driver ade7758_driver = { 848static struct spi_driver ade7758_driver = {
848 .driver = { 849 .driver = {
diff --git a/drivers/staging/iio/meter/ade7758_ring.c b/drivers/staging/iio/meter/ade7758_ring.c
index 00fa2ac5c459..f29f2b278fe4 100644
--- a/drivers/staging/iio/meter/ade7758_ring.c
+++ b/drivers/staging/iio/meter/ade7758_ring.c
@@ -67,7 +67,7 @@ static irqreturn_t ade7758_trigger_handler(int irq, void *p)
67 s64 dat64[2]; 67 s64 dat64[2];
68 u32 *dat32 = (u32 *)dat64; 68 u32 *dat32 = (u32 *)dat64;
69 69
70 if (ring->scan_count) 70 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
71 if (ade7758_spi_read_burst(&indio_dev->dev) >= 0) 71 if (ade7758_spi_read_burst(&indio_dev->dev) >= 0)
72 *dat32 = get_unaligned_be32(&st->rx_buf[5]) & 0xFFFFFF; 72 *dat32 = get_unaligned_be32(&st->rx_buf[5]) & 0xFFFFFF;
73 73
@@ -96,10 +96,11 @@ static int ade7758_ring_preenable(struct iio_dev *indio_dev)
96 size_t d_size; 96 size_t d_size;
97 unsigned channel; 97 unsigned channel;
98 98
99 if (!ring->scan_count) 99 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
100 return -EINVAL; 100 return -EINVAL;
101 101
102 channel = find_first_bit(ring->scan_mask, indio_dev->masklength); 102 channel = find_first_bit(indio_dev->active_scan_mask,
103 indio_dev->masklength);
103 104
104 d_size = st->ade7758_ring_channels[channel].scan_type.storagebits / 8; 105 d_size = st->ade7758_ring_channels[channel].scan_type.storagebits / 8;
105 106
@@ -145,8 +146,7 @@ int ade7758_configure_ring(struct iio_dev *indio_dev)
145 146
146 /* Effectively select the ring buffer implementation */ 147 /* Effectively select the ring buffer implementation */
147 indio_dev->buffer->access = &ring_sw_access_funcs; 148 indio_dev->buffer->access = &ring_sw_access_funcs;
148 indio_dev->buffer->setup_ops = &ade7758_ring_setup_ops; 149 indio_dev->setup_ops = &ade7758_ring_setup_ops;
149 indio_dev->buffer->owner = THIS_MODULE;
150 150
151 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 151 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
152 &ade7758_trigger_handler, 152 &ade7758_trigger_handler,
diff --git a/drivers/staging/iio/meter/ade7759.c b/drivers/staging/iio/meter/ade7759.c
index cfa2a5eff122..0beab478dcd9 100644
--- a/drivers/staging/iio/meter/ade7759.c
+++ b/drivers/staging/iio/meter/ade7759.c
@@ -526,3 +526,4 @@ module_spi_driver(ade7759_driver);
526MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 526MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
527MODULE_DESCRIPTION("Analog Devices ADE7759 Active Energy Metering IC Driver"); 527MODULE_DESCRIPTION("Analog Devices ADE7759 Active Energy Metering IC Driver");
528MODULE_LICENSE("GPL v2"); 528MODULE_LICENSE("GPL v2");
529MODULE_ALIAS("spi:ad7759");
diff --git a/drivers/staging/iio/meter/ade7854-spi.c b/drivers/staging/iio/meter/ade7854-spi.c
index c485a79aeec3..81121862c1bd 100644
--- a/drivers/staging/iio/meter/ade7854-spi.c
+++ b/drivers/staging/iio/meter/ade7854-spi.c
@@ -343,6 +343,7 @@ static const struct spi_device_id ade7854_id[] = {
343 { "ade7878", 0 }, 343 { "ade7878", 0 },
344 { } 344 { }
345}; 345};
346MODULE_DEVICE_TABLE(spi, ade7854_id);
346 347
347static struct spi_driver ade7854_driver = { 348static struct spi_driver ade7854_driver = {
348 .driver = { 349 .driver = {
diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
index 1c6a02bfd45d..d8ce854c1897 100644
--- a/drivers/staging/iio/resolver/ad2s1200.c
+++ b/drivers/staging/iio/resolver/ad2s1200.c
@@ -160,6 +160,7 @@ static const struct spi_device_id ad2s1200_id[] = {
160 { "ad2s1205" }, 160 { "ad2s1205" },
161 {} 161 {}
162}; 162};
163MODULE_DEVICE_TABLE(spi, ad2s1200_id);
163 164
164static struct spi_driver ad2s1200_driver = { 165static struct spi_driver ad2s1200_driver = {
165 .driver = { 166 .driver = {
diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c
index ff1b3316d016..c439fcf72be7 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -749,6 +749,7 @@ static const struct spi_device_id ad2s1210_id[] = {
749 { "ad2s1210" }, 749 { "ad2s1210" },
750 {} 750 {}
751}; 751};
752MODULE_DEVICE_TABLE(spi, ad2s1210_id);
752 753
753static struct spi_driver ad2s1210_driver = { 754static struct spi_driver ad2s1210_driver = {
754 .driver = { 755 .driver = {
diff --git a/drivers/staging/iio/resolver/ad2s90.c b/drivers/staging/iio/resolver/ad2s90.c
index 6d0794389e74..2a86f582ddf1 100644
--- a/drivers/staging/iio/resolver/ad2s90.c
+++ b/drivers/staging/iio/resolver/ad2s90.c
@@ -109,6 +109,7 @@ static const struct spi_device_id ad2s90_id[] = {
109 { "ad2s90" }, 109 { "ad2s90" },
110 {} 110 {}
111}; 111};
112MODULE_DEVICE_TABLE(spi, ad2s90_id);
112 113
113static struct spi_driver ad2s90_driver = { 114static struct spi_driver ad2s90_driver = {
114 .driver = { 115 .driver = {
diff --git a/drivers/staging/iio/ring_sw.c b/drivers/staging/iio/ring_sw.c
index 66a34addb75f..3e24ec455854 100644
--- a/drivers/staging/iio/ring_sw.c
+++ b/drivers/staging/iio/ring_sw.c
@@ -23,11 +23,8 @@
23 * @data: the ring buffer memory 23 * @data: the ring buffer memory
24 * @read_p: read pointer (oldest available) 24 * @read_p: read pointer (oldest available)
25 * @write_p: write pointer 25 * @write_p: write pointer
26 * @last_written_p: read pointer (newest available)
27 * @half_p: half buffer length behind write_p (event generation) 26 * @half_p: half buffer length behind write_p (event generation)
28 * @use_count: reference count to prevent resizing when in use
29 * @update_needed: flag to indicated change in size requested 27 * @update_needed: flag to indicated change in size requested
30 * @use_lock: lock to prevent change in size when in use
31 * 28 *
32 * Note that the first element of all ring buffers must be a 29 * Note that the first element of all ring buffers must be a
33 * struct iio_buffer. 30 * struct iio_buffer.
@@ -37,12 +34,9 @@ struct iio_sw_ring_buffer {
37 unsigned char *data; 34 unsigned char *data;
38 unsigned char *read_p; 35 unsigned char *read_p;
39 unsigned char *write_p; 36 unsigned char *write_p;
40 unsigned char *last_written_p;
41 /* used to act as a point at which to signal an event */ 37 /* used to act as a point at which to signal an event */
42 unsigned char *half_p; 38 unsigned char *half_p;
43 int use_count;
44 int update_needed; 39 int update_needed;
45 spinlock_t use_lock;
46}; 40};
47 41
48#define iio_to_sw_ring(r) container_of(r, struct iio_sw_ring_buffer, buf) 42#define iio_to_sw_ring(r) container_of(r, struct iio_sw_ring_buffer, buf)
@@ -56,38 +50,15 @@ static inline int __iio_allocate_sw_ring_buffer(struct iio_sw_ring_buffer *ring,
56 ring->data = kmalloc(length*ring->buf.bytes_per_datum, GFP_ATOMIC); 50 ring->data = kmalloc(length*ring->buf.bytes_per_datum, GFP_ATOMIC);
57 ring->read_p = NULL; 51 ring->read_p = NULL;
58 ring->write_p = NULL; 52 ring->write_p = NULL;
59 ring->last_written_p = NULL;
60 ring->half_p = NULL; 53 ring->half_p = NULL;
61 return ring->data ? 0 : -ENOMEM; 54 return ring->data ? 0 : -ENOMEM;
62} 55}
63 56
64static inline void __iio_init_sw_ring_buffer(struct iio_sw_ring_buffer *ring)
65{
66 spin_lock_init(&ring->use_lock);
67}
68
69static inline void __iio_free_sw_ring_buffer(struct iio_sw_ring_buffer *ring) 57static inline void __iio_free_sw_ring_buffer(struct iio_sw_ring_buffer *ring)
70{ 58{
71 kfree(ring->data); 59 kfree(ring->data);
72} 60}
73 61
74static void iio_mark_sw_rb_in_use(struct iio_buffer *r)
75{
76 struct iio_sw_ring_buffer *ring = iio_to_sw_ring(r);
77 spin_lock(&ring->use_lock);
78 ring->use_count++;
79 spin_unlock(&ring->use_lock);
80}
81
82static void iio_unmark_sw_rb_in_use(struct iio_buffer *r)
83{
84 struct iio_sw_ring_buffer *ring = iio_to_sw_ring(r);
85 spin_lock(&ring->use_lock);
86 ring->use_count--;
87 spin_unlock(&ring->use_lock);
88}
89
90
91/* Ring buffer related functionality */ 62/* Ring buffer related functionality */
92/* Store to ring is typically called in the bh of a data ready interrupt handler 63/* Store to ring is typically called in the bh of a data ready interrupt handler
93 * in the device driver */ 64 * in the device driver */
@@ -115,7 +86,6 @@ static int iio_store_to_sw_ring(struct iio_sw_ring_buffer *ring,
115 * Always valid as either points to latest or second latest value. 86 * Always valid as either points to latest or second latest value.
116 * Before this runs it is null and read attempts fail with -EAGAIN. 87 * Before this runs it is null and read attempts fail with -EAGAIN.
117 */ 88 */
118 ring->last_written_p = ring->write_p;
119 barrier(); 89 barrier();
120 /* temp_ptr used to ensure we never have an invalid pointer 90 /* temp_ptr used to ensure we never have an invalid pointer
121 * it may be slightly lagging, but never invalid 91 * it may be slightly lagging, but never invalid
@@ -174,6 +144,7 @@ static int iio_read_first_n_sw_rb(struct iio_buffer *r,
174 u8 *initial_read_p, *initial_write_p, *current_read_p, *end_read_p; 144 u8 *initial_read_p, *initial_write_p, *current_read_p, *end_read_p;
175 u8 *data; 145 u8 *data;
176 int ret, max_copied, bytes_to_rip, dead_offset; 146 int ret, max_copied, bytes_to_rip, dead_offset;
147 size_t data_available, buffer_size;
177 148
178 /* A userspace program has probably made an error if it tries to 149 /* A userspace program has probably made an error if it tries to
179 * read something that is not a whole number of bpds. 150 * read something that is not a whole number of bpds.
@@ -186,9 +157,11 @@ static int iio_read_first_n_sw_rb(struct iio_buffer *r,
186 n, ring->buf.bytes_per_datum); 157 n, ring->buf.bytes_per_datum);
187 goto error_ret; 158 goto error_ret;
188 } 159 }
160
161 buffer_size = ring->buf.bytes_per_datum*ring->buf.length;
162
189 /* Limit size to whole of ring buffer */ 163 /* Limit size to whole of ring buffer */
190 bytes_to_rip = min((size_t)(ring->buf.bytes_per_datum*ring->buf.length), 164 bytes_to_rip = min_t(size_t, buffer_size, n);
191 n);
192 165
193 data = kmalloc(bytes_to_rip, GFP_KERNEL); 166 data = kmalloc(bytes_to_rip, GFP_KERNEL);
194 if (data == NULL) { 167 if (data == NULL) {
@@ -217,38 +190,24 @@ static int iio_read_first_n_sw_rb(struct iio_buffer *r,
217 goto error_free_data_cpy; 190 goto error_free_data_cpy;
218 } 191 }
219 192
220 if (initial_write_p >= initial_read_p + bytes_to_rip) { 193 if (initial_write_p >= initial_read_p)
221 /* write_p is greater than necessary, all is easy */ 194 data_available = initial_write_p - initial_read_p;
222 max_copied = bytes_to_rip; 195 else
223 memcpy(data, initial_read_p, max_copied); 196 data_available = buffer_size - (initial_read_p - initial_write_p);
224 end_read_p = initial_read_p + max_copied; 197
225 } else if (initial_write_p > initial_read_p) { 198 if (data_available < bytes_to_rip)
226 /*not enough data to cpy */ 199 bytes_to_rip = data_available;
227 max_copied = initial_write_p - initial_read_p; 200
201 if (initial_read_p + bytes_to_rip >= ring->data + buffer_size) {
202 max_copied = ring->data + buffer_size - initial_read_p;
228 memcpy(data, initial_read_p, max_copied); 203 memcpy(data, initial_read_p, max_copied);
229 end_read_p = initial_write_p; 204 memcpy(data + max_copied, ring->data, bytes_to_rip - max_copied);
205 end_read_p = ring->data + bytes_to_rip - max_copied;
230 } else { 206 } else {
231 /* going through 'end' of ring buffer */ 207 memcpy(data, initial_read_p, bytes_to_rip);
232 max_copied = ring->data 208 end_read_p = initial_read_p + bytes_to_rip;
233 + ring->buf.length*ring->buf.bytes_per_datum - initial_read_p;
234 memcpy(data, initial_read_p, max_copied);
235 /* possible we are done if we align precisely with end */
236 if (max_copied == bytes_to_rip)
237 end_read_p = ring->data;
238 else if (initial_write_p
239 > ring->data + bytes_to_rip - max_copied) {
240 /* enough data to finish */
241 memcpy(data + max_copied, ring->data,
242 bytes_to_rip - max_copied);
243 max_copied = bytes_to_rip;
244 end_read_p = ring->data + (bytes_to_rip - max_copied);
245 } else { /* not enough data */
246 memcpy(data + max_copied, ring->data,
247 initial_write_p - ring->data);
248 max_copied += initial_write_p - ring->data;
249 end_read_p = initial_write_p;
250 }
251 } 209 }
210
252 /* Now to verify which section was cleanly copied - i.e. how far 211 /* Now to verify which section was cleanly copied - i.e. how far
253 * read pointer has been pushed */ 212 * read pointer has been pushed */
254 current_read_p = ring->read_p; 213 current_read_p = ring->read_p;
@@ -256,15 +215,14 @@ static int iio_read_first_n_sw_rb(struct iio_buffer *r,
256 if (initial_read_p <= current_read_p) 215 if (initial_read_p <= current_read_p)
257 dead_offset = current_read_p - initial_read_p; 216 dead_offset = current_read_p - initial_read_p;
258 else 217 else
259 dead_offset = ring->buf.length*ring->buf.bytes_per_datum 218 dead_offset = buffer_size - (initial_read_p - current_read_p);
260 - (initial_read_p - current_read_p);
261 219
262 /* possible issue if the initial write has been lapped or indeed 220 /* possible issue if the initial write has been lapped or indeed
263 * the point we were reading to has been passed */ 221 * the point we were reading to has been passed */
264 /* No valid data read. 222 /* No valid data read.
265 * In this case the read pointer is already correct having been 223 * In this case the read pointer is already correct having been
266 * pushed further than we would look. */ 224 * pushed further than we would look. */
267 if (max_copied - dead_offset < 0) { 225 if (bytes_to_rip - dead_offset < 0) {
268 ret = 0; 226 ret = 0;
269 goto error_free_data_cpy; 227 goto error_free_data_cpy;
270 } 228 }
@@ -280,7 +238,7 @@ static int iio_read_first_n_sw_rb(struct iio_buffer *r,
280 while (ring->read_p != end_read_p) 238 while (ring->read_p != end_read_p)
281 ring->read_p = end_read_p; 239 ring->read_p = end_read_p;
282 240
283 ret = max_copied - dead_offset; 241 ret = bytes_to_rip - dead_offset;
284 242
285 if (copy_to_user(buf, data + dead_offset, ret)) { 243 if (copy_to_user(buf, data + dead_offset, ret)) {
286 ret = -EFAULT; 244 ret = -EFAULT;
@@ -305,52 +263,18 @@ static int iio_store_to_sw_rb(struct iio_buffer *r,
305 return iio_store_to_sw_ring(ring, data, timestamp); 263 return iio_store_to_sw_ring(ring, data, timestamp);
306} 264}
307 265
308static int iio_read_last_from_sw_ring(struct iio_sw_ring_buffer *ring,
309 unsigned char *data)
310{
311 unsigned char *last_written_p_copy;
312
313 iio_mark_sw_rb_in_use(&ring->buf);
314again:
315 barrier();
316 last_written_p_copy = ring->last_written_p;
317 barrier(); /*unnessecary? */
318 /* Check there is anything here */
319 if (last_written_p_copy == NULL)
320 return -EAGAIN;
321 memcpy(data, last_written_p_copy, ring->buf.bytes_per_datum);
322
323 if (unlikely(ring->last_written_p != last_written_p_copy))
324 goto again;
325
326 iio_unmark_sw_rb_in_use(&ring->buf);
327 return 0;
328}
329
330static int iio_read_last_from_sw_rb(struct iio_buffer *r,
331 unsigned char *data)
332{
333 return iio_read_last_from_sw_ring(iio_to_sw_ring(r), data);
334}
335
336static int iio_request_update_sw_rb(struct iio_buffer *r) 266static int iio_request_update_sw_rb(struct iio_buffer *r)
337{ 267{
338 int ret = 0; 268 int ret = 0;
339 struct iio_sw_ring_buffer *ring = iio_to_sw_ring(r); 269 struct iio_sw_ring_buffer *ring = iio_to_sw_ring(r);
340 270
341 r->stufftoread = false; 271 r->stufftoread = false;
342 spin_lock(&ring->use_lock);
343 if (!ring->update_needed) 272 if (!ring->update_needed)
344 goto error_ret; 273 goto error_ret;
345 if (ring->use_count) {
346 ret = -EAGAIN;
347 goto error_ret;
348 }
349 __iio_free_sw_ring_buffer(ring); 274 __iio_free_sw_ring_buffer(ring);
350 ret = __iio_allocate_sw_ring_buffer(ring, ring->buf.bytes_per_datum, 275 ret = __iio_allocate_sw_ring_buffer(ring, ring->buf.bytes_per_datum,
351 ring->buf.length); 276 ring->buf.length);
352error_ret: 277error_ret:
353 spin_unlock(&ring->use_lock);
354 return ret; 278 return ret;
355} 279}
356 280
@@ -360,12 +284,18 @@ static int iio_get_bytes_per_datum_sw_rb(struct iio_buffer *r)
360 return ring->buf.bytes_per_datum; 284 return ring->buf.bytes_per_datum;
361} 285}
362 286
287static int iio_mark_update_needed_sw_rb(struct iio_buffer *r)
288{
289 struct iio_sw_ring_buffer *ring = iio_to_sw_ring(r);
290 ring->update_needed = true;
291 return 0;
292}
293
363static int iio_set_bytes_per_datum_sw_rb(struct iio_buffer *r, size_t bpd) 294static int iio_set_bytes_per_datum_sw_rb(struct iio_buffer *r, size_t bpd)
364{ 295{
365 if (r->bytes_per_datum != bpd) { 296 if (r->bytes_per_datum != bpd) {
366 r->bytes_per_datum = bpd; 297 r->bytes_per_datum = bpd;
367 if (r->access->mark_param_change) 298 iio_mark_update_needed_sw_rb(r);
368 r->access->mark_param_change(r);
369 } 299 }
370 return 0; 300 return 0;
371} 301}
@@ -379,27 +309,17 @@ static int iio_set_length_sw_rb(struct iio_buffer *r, int length)
379{ 309{
380 if (r->length != length) { 310 if (r->length != length) {
381 r->length = length; 311 r->length = length;
382 if (r->access->mark_param_change) 312 iio_mark_update_needed_sw_rb(r);
383 r->access->mark_param_change(r);
384 } 313 }
385 return 0; 314 return 0;
386} 315}
387 316
388static int iio_mark_update_needed_sw_rb(struct iio_buffer *r)
389{
390 struct iio_sw_ring_buffer *ring = iio_to_sw_ring(r);
391 ring->update_needed = true;
392 return 0;
393}
394
395static IIO_BUFFER_ENABLE_ATTR; 317static IIO_BUFFER_ENABLE_ATTR;
396static IIO_BUFFER_BYTES_PER_DATUM_ATTR;
397static IIO_BUFFER_LENGTH_ATTR; 318static IIO_BUFFER_LENGTH_ATTR;
398 319
399/* Standard set of ring buffer attributes */ 320/* Standard set of ring buffer attributes */
400static struct attribute *iio_ring_attributes[] = { 321static struct attribute *iio_ring_attributes[] = {
401 &dev_attr_length.attr, 322 &dev_attr_length.attr,
402 &dev_attr_bytes_per_datum.attr,
403 &dev_attr_enable.attr, 323 &dev_attr_enable.attr,
404 NULL, 324 NULL,
405}; 325};
@@ -419,8 +339,7 @@ struct iio_buffer *iio_sw_rb_allocate(struct iio_dev *indio_dev)
419 return NULL; 339 return NULL;
420 ring->update_needed = true; 340 ring->update_needed = true;
421 buf = &ring->buf; 341 buf = &ring->buf;
422 iio_buffer_init(buf, indio_dev); 342 iio_buffer_init(buf);
423 __iio_init_sw_ring_buffer(ring);
424 buf->attrs = &iio_ring_attribute_group; 343 buf->attrs = &iio_ring_attribute_group;
425 344
426 return buf; 345 return buf;
@@ -434,12 +353,8 @@ void iio_sw_rb_free(struct iio_buffer *r)
434EXPORT_SYMBOL(iio_sw_rb_free); 353EXPORT_SYMBOL(iio_sw_rb_free);
435 354
436const struct iio_buffer_access_funcs ring_sw_access_funcs = { 355const struct iio_buffer_access_funcs ring_sw_access_funcs = {
437 .mark_in_use = &iio_mark_sw_rb_in_use,
438 .unmark_in_use = &iio_unmark_sw_rb_in_use,
439 .store_to = &iio_store_to_sw_rb, 356 .store_to = &iio_store_to_sw_rb,
440 .read_last = &iio_read_last_from_sw_rb,
441 .read_first_n = &iio_read_first_n_sw_rb, 357 .read_first_n = &iio_read_first_n_sw_rb,
442 .mark_param_change = &iio_mark_update_needed_sw_rb,
443 .request_update = &iio_request_update_sw_rb, 358 .request_update = &iio_request_update_sw_rb,
444 .get_bytes_per_datum = &iio_get_bytes_per_datum_sw_rb, 359 .get_bytes_per_datum = &iio_get_bytes_per_datum_sw_rb,
445 .set_bytes_per_datum = &iio_set_bytes_per_datum_sw_rb, 360 .set_bytes_per_datum = &iio_set_bytes_per_datum_sw_rb,
diff --git a/drivers/staging/iio/ring_sw.h b/drivers/staging/iio/ring_sw.h
index a3e15784c225..e6a6e2c40960 100644
--- a/drivers/staging/iio/ring_sw.h
+++ b/drivers/staging/iio/ring_sw.h
@@ -23,7 +23,7 @@
23 23
24#ifndef _IIO_RING_SW_H_ 24#ifndef _IIO_RING_SW_H_
25#define _IIO_RING_SW_H_ 25#define _IIO_RING_SW_H_
26#include "buffer_generic.h" 26#include "buffer.h"
27 27
28/** 28/**
29 * ring_sw_access_funcs - access functions for a software ring buffer 29 * ring_sw_access_funcs - access functions for a software ring buffer
diff --git a/drivers/staging/iio/sysfs.h b/drivers/staging/iio/sysfs.h
index 868952b5ba63..bfedb73b850e 100644
--- a/drivers/staging/iio/sysfs.h
+++ b/drivers/staging/iio/sysfs.h
@@ -114,47 +114,4 @@ struct iio_const_attr {
114#define IIO_CONST_ATTR_TEMP_SCALE(_string) \ 114#define IIO_CONST_ATTR_TEMP_SCALE(_string) \
115 IIO_CONST_ATTR(in_temp_scale, _string) 115 IIO_CONST_ATTR(in_temp_scale, _string)
116 116
117enum iio_event_type {
118 IIO_EV_TYPE_THRESH,
119 IIO_EV_TYPE_MAG,
120 IIO_EV_TYPE_ROC,
121 IIO_EV_TYPE_THRESH_ADAPTIVE,
122 IIO_EV_TYPE_MAG_ADAPTIVE,
123};
124
125enum iio_event_direction {
126 IIO_EV_DIR_EITHER,
127 IIO_EV_DIR_RISING,
128 IIO_EV_DIR_FALLING,
129};
130
131#define IIO_EVENT_CODE(chan_type, diff, modifier, direction, \
132 type, chan, chan1, chan2) \
133 (((u64)type << 56) | ((u64)diff << 55) | \
134 ((u64)direction << 48) | ((u64)modifier << 40) | \
135 ((u64)chan_type << 32) | (chan2 << 16) | chan1 | chan)
136
137#define IIO_EV_DIR_MAX 4
138#define IIO_EV_BIT(type, direction) \
139 (1 << (type*IIO_EV_DIR_MAX + direction))
140
141#define IIO_MOD_EVENT_CODE(channelclass, number, modifier, \
142 type, direction) \
143 IIO_EVENT_CODE(channelclass, 0, modifier, direction, type, number, 0, 0)
144
145#define IIO_UNMOD_EVENT_CODE(channelclass, number, type, direction) \
146 IIO_EVENT_CODE(channelclass, 0, 0, direction, type, number, 0, 0)
147
148#define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF)
149
150#define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0xCF)
151
152#define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF)
153
154/* Event code number extraction depends on which type of event we have.
155 * Perhaps review this function in the future*/
156#define IIO_EVENT_CODE_EXTRACT_NUM(mask) (mask & 0xFFFF)
157
158#define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF)
159
160#endif /* _INDUSTRIAL_IO_SYSFS_H_ */ 117#endif /* _INDUSTRIAL_IO_SYSFS_H_ */
diff --git a/drivers/staging/iio/trigger.h b/drivers/staging/iio/trigger.h
index 5cc42a655c88..1cfca231db8f 100644
--- a/drivers/staging/iio/trigger.h
+++ b/drivers/staging/iio/trigger.h
@@ -46,7 +46,6 @@ struct iio_trigger_ops {
46 * @private_data: [DRIVER] device specific data 46 * @private_data: [DRIVER] device specific data
47 * @list: [INTERN] used in maintenance of global trigger list 47 * @list: [INTERN] used in maintenance of global trigger list
48 * @alloc_list: [DRIVER] used for driver specific trigger list 48 * @alloc_list: [DRIVER] used for driver specific trigger list
49 * @owner: [DRIVER] used to monitor usage count of the trigger.
50 * @use_count: use count for the trigger 49 * @use_count: use count for the trigger
51 * @subirq_chip: [INTERN] associate 'virtual' irq chip. 50 * @subirq_chip: [INTERN] associate 'virtual' irq chip.
52 * @subirq_base: [INTERN] base number for irqs provided by trigger. 51 * @subirq_base: [INTERN] base number for irqs provided by trigger.
@@ -63,7 +62,6 @@ struct iio_trigger {
63 void *private_data; 62 void *private_data;
64 struct list_head list; 63 struct list_head list;
65 struct list_head alloc_list; 64 struct list_head alloc_list;
66 struct module *owner;
67 int use_count; 65 int use_count;
68 66
69 struct irq_chip subirq_chip; 67 struct irq_chip subirq_chip;
diff --git a/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c b/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
index d35d085da949..bd7416b2c561 100644
--- a/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
+++ b/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c
@@ -125,7 +125,6 @@ static int iio_trig_periodic_rtc_probe(struct platform_device *dev)
125 goto error_put_trigger_and_remove_from_list; 125 goto error_put_trigger_and_remove_from_list;
126 } 126 }
127 trig->private_data = trig_info; 127 trig->private_data = trig_info;
128 trig->owner = THIS_MODULE;
129 trig->ops = &iio_prtc_trigger_ops; 128 trig->ops = &iio_prtc_trigger_ops;
130 /* RTC access */ 129 /* RTC access */
131 trig_info->rtc 130 trig_info->rtc
diff --git a/drivers/staging/iio/types.h b/drivers/staging/iio/types.h
new file mode 100644
index 000000000000..b7d26474ad06
--- /dev/null
+++ b/drivers/staging/iio/types.h
@@ -0,0 +1,49 @@
1/* industrial I/O data types needed both in and out of kernel
2 *
3 * Copyright (c) 2008 Jonathan Cameron
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 */
9
10#ifndef _IIO_TYPES_H_
11#define _IIO_TYPES_H_
12
13enum iio_chan_type {
14 /* real channel types */
15 IIO_VOLTAGE,
16 IIO_CURRENT,
17 IIO_POWER,
18 IIO_ACCEL,
19 IIO_ANGL_VEL,
20 IIO_MAGN,
21 IIO_LIGHT,
22 IIO_INTENSITY,
23 IIO_PROXIMITY,
24 IIO_TEMP,
25 IIO_INCLI,
26 IIO_ROT,
27 IIO_ANGL,
28 IIO_TIMESTAMP,
29 IIO_CAPACITANCE,
30};
31
32enum iio_modifier {
33 IIO_NO_MOD,
34 IIO_MOD_X,
35 IIO_MOD_Y,
36 IIO_MOD_Z,
37 IIO_MOD_X_AND_Y,
38 IIO_MOD_X_AND_Z,
39 IIO_MOD_Y_AND_Z,
40 IIO_MOD_X_AND_Y_AND_Z,
41 IIO_MOD_X_OR_Y,
42 IIO_MOD_X_OR_Z,
43 IIO_MOD_Y_OR_Z,
44 IIO_MOD_X_OR_Y_OR_Z,
45 IIO_MOD_LIGHT_BOTH,
46 IIO_MOD_LIGHT_IR,
47};
48
49#endif /* _IIO_TYPES_H_ */
diff --git a/drivers/staging/intel_sst/Kconfig b/drivers/staging/intel_sst/Kconfig
deleted file mode 100644
index 82391077b384..000000000000
--- a/drivers/staging/intel_sst/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
1config SND_INTEL_SST
2 tristate "Intel SST (LPE) Driver"
3 depends on X86 && INTEL_SCU_IPC
4 default n
5 help
6 Say Y here to include support for the Intel(R) MID SST DSP driver
7 On other PC platforms if you are unsure answer 'N'
8
9config SND_INTELMID
10 tristate "Intel MID sound card driver"
11 depends on SOUND && SND
12 select SND_PCM
13 select SND_SEQUENCER
14 select SND_JACK
15 depends on SND_INTEL_SST
16 default n
17 help
18 Say Y here to include support for the Intel(R) MID sound card driver
19 On other PC platforms if you are unsure answer 'N'
diff --git a/drivers/staging/intel_sst/Makefile b/drivers/staging/intel_sst/Makefile
deleted file mode 100644
index 9eb7c158bb65..000000000000
--- a/drivers/staging/intel_sst/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for Intel MID Audio drivers
3#
4snd-intel-sst-y := intel_sst.o intel_sst_ipc.o intel_sst_stream.o intel_sst_drv_interface.o intel_sst_dsp.o intel_sst_pvt.o intel_sst_stream_encoded.o intel_sst_app_interface.o
5snd-intelmid-y := intelmid.o intelmid_msic_control.o intelmid_ctrl.o intelmid_pvt.o intelmid_v0_control.o intelmid_v1_control.o intelmid_v2_control.o
6obj-$(CONFIG_SND_INTEL_SST) += snd-intel-sst.o
7obj-$(CONFIG_SND_INTELMID) += snd-intelmid.o
diff --git a/drivers/staging/intel_sst/TODO b/drivers/staging/intel_sst/TODO
deleted file mode 100644
index c733d7011091..000000000000
--- a/drivers/staging/intel_sst/TODO
+++ /dev/null
@@ -1,13 +0,0 @@
1TODO
2----
3
4Get the memrar driver cleaned up and upstream (dependency blocking SST)
5Replace long/short press with two virtual buttons
6Review the printks and kill off any left over ST_ERR: messages
7Review the misc device ioctls for 32/64bit safety and sanity
8Review the misc device ioctls for size safety depending on config and decide
9 if space/unused areas should be left
10What the sound folks turn up on full review
11Using the ALSA frameworks properly
12
13
diff --git a/drivers/staging/intel_sst/intel_sst.c b/drivers/staging/intel_sst/intel_sst.c
deleted file mode 100644
index ff9aaec0557f..000000000000
--- a/drivers/staging/intel_sst/intel_sst.c
+++ /dev/null
@@ -1,649 +0,0 @@
1/*
2 * intel_sst.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This driver exposes the audio engine functionalities to the ALSA
27 * and middleware.
28 *
29 * This file contains all init functions
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/pci.h>
35#include <linux/fs.h>
36#include <linux/interrupt.h>
37#include <linux/firmware.h>
38#include <linux/miscdevice.h>
39#include <linux/pm_runtime.h>
40#include <linux/module.h>
41#include <asm/mrst.h>
42#include "intel_sst.h"
43#include "intel_sst_ioctl.h"
44#include "intel_sst_fw_ipc.h"
45#include "intel_sst_common.h"
46
47
48MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
49MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
50MODULE_AUTHOR("Dharageswari R <dharageswari.r@intel.com>");
51MODULE_AUTHOR("KP Jeeja <jeeja.kp@intel.com>");
52MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver");
53MODULE_LICENSE("GPL v2");
54MODULE_VERSION(SST_DRIVER_VERSION);
55
56struct intel_sst_drv *sst_drv_ctx;
57static struct mutex drv_ctx_lock;
58struct class *sst_class;
59
60/* fops Routines */
61static const struct file_operations intel_sst_fops = {
62 .owner = THIS_MODULE,
63 .open = intel_sst_open,
64 .release = intel_sst_release,
65 .read = intel_sst_read,
66 .write = intel_sst_write,
67 .unlocked_ioctl = intel_sst_ioctl,
68 .mmap = intel_sst_mmap,
69 .aio_read = intel_sst_aio_read,
70 .aio_write = intel_sst_aio_write,
71};
72static const struct file_operations intel_sst_fops_cntrl = {
73 .owner = THIS_MODULE,
74 .open = intel_sst_open_cntrl,
75 .release = intel_sst_release_cntrl,
76 .unlocked_ioctl = intel_sst_ioctl,
77};
78
79static struct miscdevice lpe_dev = {
80 .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
81 .name = "intel_sst",/* /dev/intel_sst */
82 .fops = &intel_sst_fops
83};
84
85
86static struct miscdevice lpe_ctrl = {
87 .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */
88 .name = "intel_sst_ctrl",/* /dev/intel_sst_ctrl */
89 .fops = &intel_sst_fops_cntrl
90};
91
92/**
93* intel_sst_interrupt - Interrupt service routine for SST
94*
95* @irq: irq number of interrupt
96* @context: pointer to device structre
97*
98* This function is called by OS when SST device raises
99* an interrupt. This will be result of write in IPC register
100* Source can be busy or done interrupt
101*/
102static irqreturn_t intel_sst_interrupt(int irq, void *context)
103{
104 union interrupt_reg isr;
105 union ipc_header header;
106 union interrupt_reg imr;
107 struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
108 unsigned int size = 0, str_id;
109 struct stream_info *stream ;
110
111 /* Do not handle interrupt in suspended state */
112 if (drv->sst_state == SST_SUSPENDED)
113 return IRQ_NONE;
114 /* Interrupt arrived, check src */
115 isr.full = sst_shim_read(drv->shim, SST_ISRX);
116
117 if (isr.part.busy_interrupt) {
118 header.full = sst_shim_read(drv->shim, SST_IPCD);
119 if (header.part.msg_id == IPC_SST_PERIOD_ELAPSED) {
120 sst_clear_interrupt();
121 str_id = header.part.str_id;
122 stream = &sst_drv_ctx->streams[str_id];
123 if (stream->period_elapsed)
124 stream->period_elapsed(stream->pcm_substream);
125 return IRQ_HANDLED;
126 }
127 if (header.part.large)
128 size = header.part.data;
129 if (header.part.msg_id & REPLY_MSG) {
130 sst_drv_ctx->ipc_process_msg.header = header;
131 memcpy_fromio(sst_drv_ctx->ipc_process_msg.mailbox,
132 drv->mailbox + SST_MAILBOX_RCV, size);
133 queue_work(sst_drv_ctx->process_msg_wq,
134 &sst_drv_ctx->ipc_process_msg.wq);
135 } else {
136 sst_drv_ctx->ipc_process_reply.header = header;
137 memcpy_fromio(sst_drv_ctx->ipc_process_reply.mailbox,
138 drv->mailbox + SST_MAILBOX_RCV, size);
139 queue_work(sst_drv_ctx->process_reply_wq,
140 &sst_drv_ctx->ipc_process_reply.wq);
141 }
142 /* mask busy inetrrupt */
143 imr.full = sst_shim_read(drv->shim, SST_IMRX);
144 imr.part.busy_interrupt = 1;
145 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
146 return IRQ_HANDLED;
147 } else if (isr.part.done_interrupt) {
148 /* Clear done bit */
149 header.full = sst_shim_read(drv->shim, SST_IPCX);
150 header.part.done = 0;
151 sst_shim_write(sst_drv_ctx->shim, SST_IPCX, header.full);
152 /* write 1 to clear status register */;
153 isr.part.done_interrupt = 1;
154 /* dummy register for shim workaround */
155 sst_shim_write(sst_drv_ctx->shim, SST_ISRX, isr.full);
156 queue_work(sst_drv_ctx->post_msg_wq,
157 &sst_drv_ctx->ipc_post_msg.wq);
158 return IRQ_HANDLED;
159 } else
160 return IRQ_NONE;
161
162}
163
164
165/*
166* intel_sst_probe - PCI probe function
167*
168* @pci: PCI device structure
169* @pci_id: PCI device ID structure
170*
171* This function is called by OS when a device is found
172* This enables the device, interrupt etc
173*/
174static int __devinit intel_sst_probe(struct pci_dev *pci,
175 const struct pci_device_id *pci_id)
176{
177 int i, ret = 0;
178
179 pr_debug("Probe for DID %x\n", pci->device);
180 mutex_lock(&drv_ctx_lock);
181 if (sst_drv_ctx) {
182 pr_err("Only one sst handle is supported\n");
183 mutex_unlock(&drv_ctx_lock);
184 return -EBUSY;
185 }
186
187 sst_drv_ctx = kzalloc(sizeof(*sst_drv_ctx), GFP_KERNEL);
188 if (!sst_drv_ctx) {
189 pr_err("malloc fail\n");
190 mutex_unlock(&drv_ctx_lock);
191 return -ENOMEM;
192 }
193 mutex_unlock(&drv_ctx_lock);
194
195 sst_drv_ctx->pci_id = pci->device;
196
197 mutex_init(&sst_drv_ctx->stream_lock);
198 mutex_init(&sst_drv_ctx->sst_lock);
199 sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
200
201 sst_drv_ctx->stream_cnt = 0;
202 sst_drv_ctx->encoded_cnt = 0;
203 sst_drv_ctx->am_cnt = 0;
204 sst_drv_ctx->pb_streams = 0;
205 sst_drv_ctx->cp_streams = 0;
206 sst_drv_ctx->unique_id = 0;
207 sst_drv_ctx->pmic_port_instance = SST_DEFAULT_PMIC_PORT;
208
209 INIT_LIST_HEAD(&sst_drv_ctx->ipc_dispatch_list);
210 INIT_WORK(&sst_drv_ctx->ipc_post_msg.wq, sst_post_message);
211 INIT_WORK(&sst_drv_ctx->ipc_process_msg.wq, sst_process_message);
212 INIT_WORK(&sst_drv_ctx->ipc_process_reply.wq, sst_process_reply);
213 INIT_WORK(&sst_drv_ctx->mad_ops.wq, sst_process_mad_ops);
214 init_waitqueue_head(&sst_drv_ctx->wait_queue);
215
216 sst_drv_ctx->mad_wq = create_workqueue("sst_mad_wq");
217 if (!sst_drv_ctx->mad_wq)
218 goto do_free_drv_ctx;
219 sst_drv_ctx->post_msg_wq = create_workqueue("sst_post_msg_wq");
220 if (!sst_drv_ctx->post_msg_wq)
221 goto free_mad_wq;
222 sst_drv_ctx->process_msg_wq = create_workqueue("sst_process_msg_wqq");
223 if (!sst_drv_ctx->process_msg_wq)
224 goto free_post_msg_wq;
225 sst_drv_ctx->process_reply_wq = create_workqueue("sst_proces_reply_wq");
226 if (!sst_drv_ctx->process_reply_wq)
227 goto free_process_msg_wq;
228
229 for (i = 0; i < MAX_ACTIVE_STREAM; i++) {
230 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
231 sst_drv_ctx->alloc_block[i].ops_block.condition = false;
232 }
233 spin_lock_init(&sst_drv_ctx->list_spin_lock);
234
235 sst_drv_ctx->max_streams = pci_id->driver_data;
236 pr_debug("Got drv data max stream %d\n",
237 sst_drv_ctx->max_streams);
238 for (i = 1; i <= sst_drv_ctx->max_streams; i++) {
239 struct stream_info *stream = &sst_drv_ctx->streams[i];
240 INIT_LIST_HEAD(&stream->bufs);
241 mutex_init(&stream->lock);
242 spin_lock_init(&stream->pcm_lock);
243 }
244 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
245 sst_drv_ctx->mmap_mem = NULL;
246 sst_drv_ctx->mmap_len = SST_MMAP_PAGES * PAGE_SIZE;
247 while (sst_drv_ctx->mmap_len > 0) {
248 sst_drv_ctx->mmap_mem =
249 kzalloc(sst_drv_ctx->mmap_len, GFP_KERNEL);
250 if (sst_drv_ctx->mmap_mem) {
251 pr_debug("Got memory %p size 0x%x\n",
252 sst_drv_ctx->mmap_mem,
253 sst_drv_ctx->mmap_len);
254 break;
255 }
256 if (sst_drv_ctx->mmap_len < (SST_MMAP_STEP*PAGE_SIZE)) {
257 pr_err("mem alloc fail...abort!!\n");
258 ret = -ENOMEM;
259 goto free_process_reply_wq;
260 }
261 sst_drv_ctx->mmap_len -= (SST_MMAP_STEP * PAGE_SIZE);
262 pr_debug("mem alloc failed...trying %d\n",
263 sst_drv_ctx->mmap_len);
264 }
265 }
266
267 /* Init the device */
268 ret = pci_enable_device(pci);
269 if (ret) {
270 pr_err("device can't be enabled\n");
271 goto do_free_mem;
272 }
273 sst_drv_ctx->pci = pci_dev_get(pci);
274 ret = pci_request_regions(pci, SST_DRV_NAME);
275 if (ret)
276 goto do_disable_device;
277 /* map registers */
278 /* SST Shim */
279 sst_drv_ctx->shim_phy_add = pci_resource_start(pci, 1);
280 sst_drv_ctx->shim = pci_ioremap_bar(pci, 1);
281 if (!sst_drv_ctx->shim)
282 goto do_release_regions;
283 pr_debug("SST Shim Ptr %p\n", sst_drv_ctx->shim);
284
285 /* Shared SRAM */
286 sst_drv_ctx->mailbox = pci_ioremap_bar(pci, 2);
287 if (!sst_drv_ctx->mailbox)
288 goto do_unmap_shim;
289 pr_debug("SRAM Ptr %p\n", sst_drv_ctx->mailbox);
290
291 /* IRAM */
292 sst_drv_ctx->iram = pci_ioremap_bar(pci, 3);
293 if (!sst_drv_ctx->iram)
294 goto do_unmap_sram;
295 pr_debug("IRAM Ptr %p\n", sst_drv_ctx->iram);
296
297 /* DRAM */
298 sst_drv_ctx->dram = pci_ioremap_bar(pci, 4);
299 if (!sst_drv_ctx->dram)
300 goto do_unmap_iram;
301 pr_debug("DRAM Ptr %p\n", sst_drv_ctx->dram);
302
303 mutex_lock(&sst_drv_ctx->sst_lock);
304 sst_drv_ctx->sst_state = SST_UN_INIT;
305 mutex_unlock(&sst_drv_ctx->sst_lock);
306 /* Register the ISR */
307 ret = request_irq(pci->irq, intel_sst_interrupt,
308 IRQF_SHARED, SST_DRV_NAME, sst_drv_ctx);
309 if (ret)
310 goto do_unmap_dram;
311 pr_debug("Registered IRQ 0x%x\n", pci->irq);
312
313 /*Register LPE Control as misc driver*/
314 ret = misc_register(&lpe_ctrl);
315 if (ret) {
316 pr_err("couldn't register control device\n");
317 goto do_free_irq;
318 }
319
320 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
321 ret = misc_register(&lpe_dev);
322 if (ret) {
323 pr_err("couldn't register LPE device\n");
324 goto do_free_misc;
325 }
326 } else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID) {
327 u32 csr;
328
329 /*allocate mem for fw context save during suspend*/
330 sst_drv_ctx->fw_cntx = kzalloc(FW_CONTEXT_MEM, GFP_KERNEL);
331 if (!sst_drv_ctx->fw_cntx) {
332 ret = -ENOMEM;
333 goto do_free_misc;
334 }
335 /*setting zero as that is valid mem to restore*/
336 sst_drv_ctx->fw_cntx_size = 0;
337
338 /*set lpe start clock and ram size*/
339 csr = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
340 csr |= 0x30060; /*remove the clock ratio after fw fix*/
341 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr);
342 }
343 sst_drv_ctx->lpe_stalled = 0;
344 pci_set_drvdata(pci, sst_drv_ctx);
345 pm_runtime_allow(&pci->dev);
346 pm_runtime_put_noidle(&pci->dev);
347 pr_debug("...successfully done!!!\n");
348 return ret;
349
350do_free_misc:
351 misc_deregister(&lpe_ctrl);
352do_free_irq:
353 free_irq(pci->irq, sst_drv_ctx);
354do_unmap_dram:
355 iounmap(sst_drv_ctx->dram);
356do_unmap_iram:
357 iounmap(sst_drv_ctx->iram);
358do_unmap_sram:
359 iounmap(sst_drv_ctx->mailbox);
360do_unmap_shim:
361 iounmap(sst_drv_ctx->shim);
362do_release_regions:
363 pci_release_regions(pci);
364do_disable_device:
365 pci_disable_device(pci);
366do_free_mem:
367 kfree(sst_drv_ctx->mmap_mem);
368free_process_reply_wq:
369 destroy_workqueue(sst_drv_ctx->process_reply_wq);
370free_process_msg_wq:
371 destroy_workqueue(sst_drv_ctx->process_msg_wq);
372free_post_msg_wq:
373 destroy_workqueue(sst_drv_ctx->post_msg_wq);
374free_mad_wq:
375 destroy_workqueue(sst_drv_ctx->mad_wq);
376do_free_drv_ctx:
377 kfree(sst_drv_ctx);
378 sst_drv_ctx = NULL;
379 pr_err("Probe failed with %d\n", ret);
380 return ret;
381}
382
383/**
384* intel_sst_remove - PCI remove function
385*
386* @pci: PCI device structure
387*
388* This function is called by OS when a device is unloaded
389* This frees the interrupt etc
390*/
391static void __devexit intel_sst_remove(struct pci_dev *pci)
392{
393 pm_runtime_get_noresume(&pci->dev);
394 pm_runtime_forbid(&pci->dev);
395 pci_dev_put(sst_drv_ctx->pci);
396 mutex_lock(&sst_drv_ctx->sst_lock);
397 sst_drv_ctx->sst_state = SST_UN_INIT;
398 mutex_unlock(&sst_drv_ctx->sst_lock);
399 misc_deregister(&lpe_ctrl);
400 free_irq(pci->irq, sst_drv_ctx);
401 iounmap(sst_drv_ctx->dram);
402 iounmap(sst_drv_ctx->iram);
403 iounmap(sst_drv_ctx->mailbox);
404 iounmap(sst_drv_ctx->shim);
405 sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
406 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
407 misc_deregister(&lpe_dev);
408 kfree(sst_drv_ctx->mmap_mem);
409 } else
410 kfree(sst_drv_ctx->fw_cntx);
411 flush_scheduled_work();
412 destroy_workqueue(sst_drv_ctx->process_reply_wq);
413 destroy_workqueue(sst_drv_ctx->process_msg_wq);
414 destroy_workqueue(sst_drv_ctx->post_msg_wq);
415 destroy_workqueue(sst_drv_ctx->mad_wq);
416 kfree(pci_get_drvdata(pci));
417 sst_drv_ctx = NULL;
418 pci_release_regions(pci);
419 pci_disable_device(pci);
420 pci_set_drvdata(pci, NULL);
421}
422
423void sst_save_dsp_context(void)
424{
425 struct snd_sst_ctxt_params fw_context;
426 unsigned int pvt_id, i;
427 struct ipc_post *msg = NULL;
428
429 /*check cpu type*/
430 if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
431 return;
432 /*not supported for rest*/
433 if (sst_drv_ctx->sst_state != SST_FW_RUNNING) {
434 pr_debug("fw not running no context save ...\n");
435 return;
436 }
437
438 /*send msg to fw*/
439 if (sst_create_large_msg(&msg))
440 return;
441 pvt_id = sst_assign_pvt_id(sst_drv_ctx);
442 i = sst_get_block_stream(sst_drv_ctx);
443 sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
444 sst_fill_header(&msg->header, IPC_IA_GET_FW_CTXT, 1, pvt_id);
445 msg->header.part.data = sizeof(fw_context) + sizeof(u32);
446 fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
447 fw_context.size = FW_CONTEXT_MEM;
448 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
449 memcpy(msg->mailbox_data + sizeof(u32),
450 &fw_context, sizeof(fw_context));
451 spin_lock(&sst_drv_ctx->list_spin_lock);
452 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
453 spin_unlock(&sst_drv_ctx->list_spin_lock);
454 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
455 /*wait for reply*/
456 if (sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]))
457 pr_debug("err fw context save timeout ...\n");
458 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
459 pr_debug("fw context saved ...\n");
460 return;
461}
462
463/* Power Management */
464/*
465* intel_sst_suspend - PCI suspend function
466*
467* @pci: PCI device structure
468* @state: PM message
469*
470* This function is called by OS when a power event occurs
471*/
472int intel_sst_suspend(struct pci_dev *pci, pm_message_t state)
473{
474 union config_status_reg csr;
475
476 pr_debug("intel_sst_suspend called\n");
477
478 if (sst_drv_ctx->stream_cnt) {
479 pr_err("active streams,not able to suspend\n");
480 return -EBUSY;
481 }
482 /*save fw context*/
483 sst_save_dsp_context();
484 /*Assert RESET on LPE Processor*/
485 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
486 csr.full = csr.full | 0x2;
487 /* Move the SST state to Suspended */
488 mutex_lock(&sst_drv_ctx->sst_lock);
489 sst_drv_ctx->sst_state = SST_SUSPENDED;
490 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
491 mutex_unlock(&sst_drv_ctx->sst_lock);
492 pci_set_drvdata(pci, sst_drv_ctx);
493 pci_save_state(pci);
494 pci_disable_device(pci);
495 pci_set_power_state(pci, PCI_D3hot);
496 return 0;
497}
498
499/**
500* intel_sst_resume - PCI resume function
501*
502* @pci: PCI device structure
503*
504* This function is called by OS when a power event occurs
505*/
506int intel_sst_resume(struct pci_dev *pci)
507{
508 int ret = 0;
509
510 pr_debug("intel_sst_resume called\n");
511 if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
512 pr_err("SST is not in suspended state\n");
513 return 0;
514 }
515 sst_drv_ctx = pci_get_drvdata(pci);
516 pci_set_power_state(pci, PCI_D0);
517 pci_restore_state(pci);
518 ret = pci_enable_device(pci);
519 if (ret)
520 pr_err("device can't be enabled\n");
521
522 mutex_lock(&sst_drv_ctx->sst_lock);
523 sst_drv_ctx->sst_state = SST_UN_INIT;
524 mutex_unlock(&sst_drv_ctx->sst_lock);
525 return 0;
526}
527
528/* The runtime_suspend/resume is pretty much similar to the legacy
529 * suspend/resume with the noted exception below:
530 * The PCI core takes care of taking the system through D3hot and
531 * restoring it back to D0 and so there is no need to duplicate
532 * that here.
533 */
534static int intel_sst_runtime_suspend(struct device *dev)
535{
536 union config_status_reg csr;
537
538 pr_debug("intel_sst_runtime_suspend called\n");
539 if (sst_drv_ctx->stream_cnt) {
540 pr_err("active streams,not able to suspend\n");
541 return -EBUSY;
542 }
543 /*save fw context*/
544 sst_save_dsp_context();
545 /*Assert RESET on LPE Processor*/
546 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
547 csr.full = csr.full | 0x2;
548 /* Move the SST state to Suspended */
549 mutex_lock(&sst_drv_ctx->sst_lock);
550 sst_drv_ctx->sst_state = SST_SUSPENDED;
551
552 /* Only needed by Medfield */
553 if (sst_drv_ctx->pci_id != SST_MRST_PCI_ID)
554 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
555 mutex_unlock(&sst_drv_ctx->sst_lock);
556 return 0;
557}
558
559static int intel_sst_runtime_resume(struct device *dev)
560{
561
562 pr_debug("intel_sst_runtime_resume called\n");
563 if (sst_drv_ctx->sst_state != SST_SUSPENDED) {
564 pr_err("SST is not in suspended state\n");
565 return 0;
566 }
567
568 mutex_lock(&sst_drv_ctx->sst_lock);
569 sst_drv_ctx->sst_state = SST_UN_INIT;
570 mutex_unlock(&sst_drv_ctx->sst_lock);
571 return 0;
572}
573
574static int intel_sst_runtime_idle(struct device *dev)
575{
576 pr_debug("runtime_idle called\n");
577 if (sst_drv_ctx->stream_cnt == 0 && sst_drv_ctx->am_cnt == 0)
578 pm_schedule_suspend(dev, SST_SUSPEND_DELAY);
579 return -EBUSY;
580}
581
582static const struct dev_pm_ops intel_sst_pm = {
583 .runtime_suspend = intel_sst_runtime_suspend,
584 .runtime_resume = intel_sst_runtime_resume,
585 .runtime_idle = intel_sst_runtime_idle,
586};
587
588/* PCI Routines */
589static struct pci_device_id intel_sst_ids[] = {
590 { PCI_VDEVICE(INTEL, SST_MRST_PCI_ID), 3},
591 { PCI_VDEVICE(INTEL, SST_MFLD_PCI_ID), 6},
592 { 0, }
593};
594MODULE_DEVICE_TABLE(pci, intel_sst_ids);
595
596static struct pci_driver driver = {
597 .name = SST_DRV_NAME,
598 .id_table = intel_sst_ids,
599 .probe = intel_sst_probe,
600 .remove = __devexit_p(intel_sst_remove),
601#ifdef CONFIG_PM
602 .suspend = intel_sst_suspend,
603 .resume = intel_sst_resume,
604 .driver = {
605 .pm = &intel_sst_pm,
606 },
607#endif
608};
609
610/**
611* intel_sst_init - Module init function
612*
613* Registers with PCI
614* Registers with /dev
615* Init all data strutures
616*/
617static int __init intel_sst_init(void)
618{
619 /* Init all variables, data structure etc....*/
620 int ret = 0;
621 pr_debug("INFO: ******** SST DRIVER loading.. Ver: %s\n",
622 SST_DRIVER_VERSION);
623
624 mutex_init(&drv_ctx_lock);
625 /* Register with PCI */
626 ret = pci_register_driver(&driver);
627 if (ret)
628 pr_err("PCI register failed\n");
629 return ret;
630}
631
632/**
633* intel_sst_exit - Module exit function
634*
635* Unregisters with PCI
636* Unregisters with /dev
637* Frees all data strutures
638*/
639static void __exit intel_sst_exit(void)
640{
641 pci_unregister_driver(&driver);
642
643 pr_debug("driver unloaded\n");
644 sst_drv_ctx = NULL;
645 return;
646}
647
648module_init(intel_sst_init);
649module_exit(intel_sst_exit);
diff --git a/drivers/staging/intel_sst/intel_sst.h b/drivers/staging/intel_sst/intel_sst.h
deleted file mode 100644
index 4ad2829105a7..000000000000
--- a/drivers/staging/intel_sst/intel_sst.h
+++ /dev/null
@@ -1,162 +0,0 @@
1#ifndef __INTEL_SST_H__
2#define __INTEL_SST_H__
3/*
4 * intel_sst.h - Intel SST Driver for audio engine
5 *
6 * Copyright (C) 2008-10 Intel Corporation
7 * Authors: Vinod Koul <vinod.koul@intel.com>
8 * Harsha Priya <priya.harsha@intel.com>
9 * Dharageswari R <dharageswari.r@intel.com>
10 * KP Jeeja <jeeja.kp@intel.com>
11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; version 2 of the License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 *
28 * This driver exposes the audio engine functionalities to the ALSA
29 * and middleware.
30 * This file is shared between the SST and MAD drivers
31 */
32#include "intel_sst_ioctl.h"
33#include <sound/jack.h>
34
35#define SST_CARD_NAMES "intel_mid_card"
36
37#define MFLD_MAX_HW_CH 4
38/* control list Pmic & Lpe */
39/* Input controls */
40enum port_status {
41 ACTIVATE = 1,
42 DEACTIVATE,
43};
44
45/* Card states */
46enum sst_card_states {
47 SND_CARD_UN_INIT = 0,
48 SND_CARD_INIT_DONE,
49};
50
51enum sst_controls {
52 SST_SND_ALLOC = 0x1000,
53 SST_SND_PAUSE = 0x1001,
54 SST_SND_RESUME = 0x1002,
55 SST_SND_DROP = 0x1003,
56 SST_SND_FREE = 0x1004,
57 SST_SND_BUFFER_POINTER = 0x1005,
58 SST_SND_STREAM_INIT = 0x1006,
59 SST_SND_START = 0x1007,
60 SST_SND_STREAM_PROCESS = 0x1008,
61 SST_MAX_CONTROLS = 0x1008,
62 SST_CONTROL_BASE = 0x1000,
63 SST_ENABLE_RX_TIME_SLOT = 0x1009,
64};
65
66enum SND_CARDS {
67 SND_FS = 0,
68 SND_MX,
69 SND_NC,
70 SND_MSIC
71};
72
73struct pcm_stream_info {
74 int str_id;
75 void *mad_substream;
76 void (*period_elapsed) (void *mad_substream);
77 unsigned long long buffer_ptr;
78 int sfreq;
79};
80
81struct snd_pmic_ops {
82 int card_status;
83 int master_mute;
84 int num_channel;
85 int input_dev_id;
86 int mute_status;
87 struct mutex lock;
88 int pb_on, pbhs_on;
89 int cap_on;
90 int output_dev_id;
91 int lineout_dev_id, line_out_names_cnt;
92 int prev_lineout_dev_id;
93 bool jack_interrupt_status;
94 int (*set_input_dev) (u8 value);
95 int (*set_output_dev) (u8 value);
96 int (*set_lineout_dev) (u8 value);
97 int (*set_mute) (int dev_id, u8 value);
98 int (*get_mute) (int dev_id, u8 *value);
99
100 int (*set_vol) (int dev_id, int value);
101 int (*get_vol) (int dev_id, int *value);
102
103 int (*init_card) (void);
104 int (*set_pcm_audio_params)
105 (int sfreq, int word_size , int num_channel);
106 int (*set_pcm_voice_params) (void);
107 int (*set_voice_port) (int status);
108 int (*set_audio_port) (int status);
109
110 int (*power_up_pmic_pb) (unsigned int port);
111 int (*power_up_pmic_cp) (unsigned int port);
112 int (*power_down_pmic_pb) (unsigned int device);
113 int (*power_down_pmic_cp) (unsigned int device);
114 int (*power_down_pmic) (void);
115 void (*pmic_irq_cb) (void *cb_data, u8 value);
116 void (*pmic_irq_enable)(void *data);
117 int (*pmic_jack_enable) (void);
118 int (*pmic_get_mic_bias)(void *intelmaddata);
119 int (*pmic_set_headset_state)(int state);
120
121 unsigned int hw_dmic_map[MFLD_MAX_HW_CH];
122 unsigned int available_dmics;
123 int (*set_hw_dmic_route) (u8 index);
124
125 int gpio_amp;
126};
127
128extern void sst_mad_send_jack_report(struct snd_jack *jack,
129 int buttonpressevent,
130 int status);
131
132
133int intemad_set_headset_state(int state);
134int intelmad_get_mic_bias(void);
135
136struct intel_sst_pcm_control {
137 int (*open) (struct snd_sst_params *str_param);
138 int (*device_control) (int cmd, void *arg);
139 int (*close) (unsigned int str_id);
140};
141struct intel_sst_card_ops {
142 char *module_name;
143 unsigned int vendor_id;
144 struct intel_sst_pcm_control *pcm_control;
145 struct snd_pmic_ops *scard_ops;
146};
147
148/* modified for generic access */
149struct sc_reg_access {
150 u16 reg_addr;
151 u8 value;
152 u8 mask;
153};
154enum sc_reg_access_type {
155 PMIC_READ = 0,
156 PMIC_WRITE,
157 PMIC_READ_MODIFY,
158};
159
160int register_sst_card(struct intel_sst_card_ops *card);
161void unregister_sst_card(struct intel_sst_card_ops *card);
162#endif /* __INTEL_SST_H__ */
diff --git a/drivers/staging/intel_sst/intel_sst_app_interface.c b/drivers/staging/intel_sst/intel_sst_app_interface.c
deleted file mode 100644
index 93b41a284d83..000000000000
--- a/drivers/staging/intel_sst/intel_sst_app_interface.c
+++ /dev/null
@@ -1,1460 +0,0 @@
1/*
2 * intel_sst_interface.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * Jeeja KP <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 * This driver exposes the audio engine functionalities to the ALSA
26 * and middleware.
27 * Upper layer interfaces (MAD driver, MMF) to SST driver
28 */
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#include <linux/pci.h>
33#include <linux/fs.h>
34#include <linux/uio.h>
35#include <linux/aio.h>
36#include <linux/uaccess.h>
37#include <linux/firmware.h>
38#include <linux/pm_runtime.h>
39#include <linux/ioctl.h>
40#ifdef CONFIG_MRST_RAR_HANDLER
41#include <linux/rar_register.h>
42#include "../../../drivers/staging/memrar/memrar.h"
43#endif
44#include "intel_sst.h"
45#include "intel_sst_ioctl.h"
46#include "intel_sst_fw_ipc.h"
47#include "intel_sst_common.h"
48
49#define AM_MODULE 1
50#define STREAM_MODULE 0
51
52
53/**
54* intel_sst_check_device - checks SST device
55*
56* This utility function checks the state of SST device and downlaods FW if
57* not done, or resumes the device if suspended
58*/
59
60static int intel_sst_check_device(void)
61{
62 int retval = 0;
63 if (sst_drv_ctx->pmic_state != SND_MAD_INIT_DONE) {
64 pr_warn("Sound card not available\n");
65 return -EIO;
66 }
67 if (sst_drv_ctx->sst_state == SST_SUSPENDED) {
68 pr_debug("Resuming from Suspended state\n");
69 retval = intel_sst_resume(sst_drv_ctx->pci);
70 if (retval) {
71 pr_debug("Resume Failed= %#x,abort\n", retval);
72 return retval;
73 }
74 }
75
76 if (sst_drv_ctx->sst_state == SST_UN_INIT) {
77 /* FW is not downloaded */
78 retval = sst_download_fw();
79 if (retval)
80 return -ENODEV;
81 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
82 retval = sst_drv_ctx->rx_time_slot_status;
83 if (retval != RX_TIMESLOT_UNINIT
84 && sst_drv_ctx->pmic_vendor != SND_NC)
85 sst_enable_rx_timeslot(retval);
86 }
87 }
88 return 0;
89}
90
91/**
92 * intel_sst_open - opens a handle to driver
93 *
94 * @i_node: inode structure
95 * @file_ptr:pointer to file
96 *
97 * This function is called by OS when a user space component
98 * tries to get a driver handle. Only one handle at a time
99 * will be allowed
100 */
101int intel_sst_open(struct inode *i_node, struct file *file_ptr)
102{
103 unsigned int retval;
104
105 mutex_lock(&sst_drv_ctx->stream_lock);
106 pm_runtime_get_sync(&sst_drv_ctx->pci->dev);
107 retval = intel_sst_check_device();
108 if (retval) {
109 pm_runtime_put(&sst_drv_ctx->pci->dev);
110 mutex_unlock(&sst_drv_ctx->stream_lock);
111 return retval;
112 }
113
114 if (sst_drv_ctx->encoded_cnt < MAX_ENC_STREAM) {
115 struct ioctl_pvt_data *data =
116 kzalloc(sizeof(struct ioctl_pvt_data), GFP_KERNEL);
117 if (!data) {
118 pm_runtime_put(&sst_drv_ctx->pci->dev);
119 mutex_unlock(&sst_drv_ctx->stream_lock);
120 return -ENOMEM;
121 }
122
123 sst_drv_ctx->encoded_cnt++;
124 mutex_unlock(&sst_drv_ctx->stream_lock);
125 data->pvt_id = sst_assign_pvt_id(sst_drv_ctx);
126 data->str_id = 0;
127 file_ptr->private_data = (void *)data;
128 pr_debug("pvt_id handle = %d!\n", data->pvt_id);
129 } else {
130 retval = -EUSERS;
131 pm_runtime_put(&sst_drv_ctx->pci->dev);
132 mutex_unlock(&sst_drv_ctx->stream_lock);
133 }
134 return retval;
135}
136
137/**
138 * intel_sst_open_cntrl - opens a handle to driver
139 *
140 * @i_node: inode structure
141 * @file_ptr:pointer to file
142 *
143 * This function is called by OS when a user space component
144 * tries to get a driver handle to /dev/intel_sst_control.
145 * Only one handle at a time will be allowed
146 * This is for control operations only
147 */
148int intel_sst_open_cntrl(struct inode *i_node, struct file *file_ptr)
149{
150 unsigned int retval;
151
152 /* audio manager open */
153 mutex_lock(&sst_drv_ctx->stream_lock);
154 pm_runtime_get_sync(&sst_drv_ctx->pci->dev);
155 retval = intel_sst_check_device();
156 if (retval) {
157 pm_runtime_put(&sst_drv_ctx->pci->dev);
158 mutex_unlock(&sst_drv_ctx->stream_lock);
159 return retval;
160 }
161
162 if (sst_drv_ctx->am_cnt < MAX_AM_HANDLES) {
163 sst_drv_ctx->am_cnt++;
164 pr_debug("AM handle opened...\n");
165 file_ptr->private_data = NULL;
166 } else {
167 retval = -EACCES;
168 pm_runtime_put(&sst_drv_ctx->pci->dev);
169 }
170
171 mutex_unlock(&sst_drv_ctx->stream_lock);
172 return retval;
173}
174
175/**
176 * intel_sst_release - releases a handle to driver
177 *
178 * @i_node: inode structure
179 * @file_ptr: pointer to file
180 *
181 * This function is called by OS when a user space component
182 * tries to release a driver handle.
183 */
184int intel_sst_release(struct inode *i_node, struct file *file_ptr)
185{
186 struct ioctl_pvt_data *data = file_ptr->private_data;
187
188 pr_debug("Release called, closing app handle\n");
189 mutex_lock(&sst_drv_ctx->stream_lock);
190 sst_drv_ctx->encoded_cnt--;
191 sst_drv_ctx->stream_cnt--;
192 pm_runtime_put(&sst_drv_ctx->pci->dev);
193 mutex_unlock(&sst_drv_ctx->stream_lock);
194 free_stream_context(data->str_id);
195 kfree(data);
196 return 0;
197}
198
199int intel_sst_release_cntrl(struct inode *i_node, struct file *file_ptr)
200{
201 /* audio manager close */
202 mutex_lock(&sst_drv_ctx->stream_lock);
203 sst_drv_ctx->am_cnt--;
204 pm_runtime_put(&sst_drv_ctx->pci->dev);
205 mutex_unlock(&sst_drv_ctx->stream_lock);
206 pr_debug("AM handle closed\n");
207 return 0;
208}
209
210/**
211* intel_sst_mmap - mmaps a kernel buffer to user space for copying data
212*
213* @vma: vm area structure instance
214* @file_ptr: pointer to file
215*
216* This function is called by OS when a user space component
217* tries to get mmap memory from driver
218*/
219int intel_sst_mmap(struct file *file_ptr, struct vm_area_struct *vma)
220{
221 int retval, length;
222 struct ioctl_pvt_data *data =
223 (struct ioctl_pvt_data *)file_ptr->private_data;
224 int str_id = data->str_id;
225 void *mem_area;
226
227 retval = sst_validate_strid(str_id);
228 if (retval)
229 return -EINVAL;
230
231 length = vma->vm_end - vma->vm_start;
232 pr_debug("called for stream %d length 0x%x\n", str_id, length);
233
234 if (length > sst_drv_ctx->mmap_len)
235 return -ENOMEM;
236 if (!sst_drv_ctx->mmap_mem)
237 return -EIO;
238
239 /* round it up to the page boundary */
240 /*mem_area = (void *)((((unsigned long)sst_drv_ctx->mmap_mem)
241 + PAGE_SIZE - 1) & PAGE_MASK);*/
242 mem_area = (void *) PAGE_ALIGN((unsigned int) sst_drv_ctx->mmap_mem);
243
244 /* map the whole physically contiguous area in one piece */
245 retval = remap_pfn_range(vma,
246 vma->vm_start,
247 virt_to_phys((void *)mem_area) >> PAGE_SHIFT,
248 length,
249 vma->vm_page_prot);
250 if (retval)
251 sst_drv_ctx->streams[str_id].mmapped = false;
252 else
253 sst_drv_ctx->streams[str_id].mmapped = true;
254
255 pr_debug("mmap ret 0x%x\n", retval);
256 return retval;
257}
258
259/* sets mmap data buffers to play/capture*/
260static int intel_sst_mmap_play_capture(u32 str_id,
261 struct snd_sst_mmap_buffs *mmap_buf)
262{
263 struct sst_stream_bufs *bufs;
264 int retval, i;
265 struct stream_info *stream;
266 struct snd_sst_mmap_buff_entry *buf_entry;
267 struct snd_sst_mmap_buff_entry *tmp_buf;
268
269 pr_debug("called for str_id %d\n", str_id);
270 retval = sst_validate_strid(str_id);
271 if (retval)
272 return -EINVAL;
273
274 stream = &sst_drv_ctx->streams[str_id];
275 if (stream->mmapped != true)
276 return -EIO;
277
278 if (stream->status == STREAM_UN_INIT ||
279 stream->status == STREAM_DECODE) {
280 return -EBADRQC;
281 }
282 stream->curr_bytes = 0;
283 stream->cumm_bytes = 0;
284
285 tmp_buf = kcalloc(mmap_buf->entries, sizeof(*tmp_buf), GFP_KERNEL);
286 if (!tmp_buf)
287 return -ENOMEM;
288 if (copy_from_user(tmp_buf, (void __user *)mmap_buf->buff,
289 mmap_buf->entries * sizeof(*tmp_buf))) {
290 retval = -EFAULT;
291 goto out_free;
292 }
293
294 pr_debug("new buffers count %d status %d\n",
295 mmap_buf->entries, stream->status);
296 buf_entry = tmp_buf;
297 for (i = 0; i < mmap_buf->entries; i++) {
298 bufs = kzalloc(sizeof(*bufs), GFP_KERNEL);
299 if (!bufs) {
300 retval = -ENOMEM;
301 goto out_free;
302 }
303 bufs->size = buf_entry->size;
304 bufs->offset = buf_entry->offset;
305 bufs->addr = sst_drv_ctx->mmap_mem;
306 bufs->in_use = false;
307 buf_entry++;
308 /* locking here */
309 mutex_lock(&stream->lock);
310 list_add_tail(&bufs->node, &stream->bufs);
311 mutex_unlock(&stream->lock);
312 }
313
314 mutex_lock(&stream->lock);
315 stream->data_blk.condition = false;
316 stream->data_blk.ret_code = 0;
317 if (stream->status == STREAM_INIT &&
318 stream->prev != STREAM_UN_INIT &&
319 stream->need_draining != true) {
320 stream->prev = stream->status;
321 stream->status = STREAM_RUNNING;
322 if (stream->ops == STREAM_OPS_PLAYBACK) {
323 if (sst_play_frame(str_id) < 0) {
324 pr_warn("play frames fail\n");
325 mutex_unlock(&stream->lock);
326 retval = -EIO;
327 goto out_free;
328 }
329 } else if (stream->ops == STREAM_OPS_CAPTURE) {
330 if (sst_capture_frame(str_id) < 0) {
331 pr_warn("capture frame fail\n");
332 mutex_unlock(&stream->lock);
333 retval = -EIO;
334 goto out_free;
335 }
336 }
337 }
338 mutex_unlock(&stream->lock);
339 /* Block the call for reply */
340 if (!list_empty(&stream->bufs)) {
341 stream->data_blk.on = true;
342 retval = sst_wait_interruptible(sst_drv_ctx,
343 &stream->data_blk);
344 }
345
346 if (retval >= 0)
347 retval = stream->cumm_bytes;
348 pr_debug("end of play/rec ioctl bytes = %d!!\n", retval);
349
350out_free:
351 kfree(tmp_buf);
352 return retval;
353}
354
355/*sets user data buffers to play/capture*/
356static int intel_sst_play_capture(struct stream_info *stream, int str_id)
357{
358 int retval;
359
360 stream->data_blk.ret_code = 0;
361 stream->data_blk.on = true;
362 stream->data_blk.condition = false;
363
364 mutex_lock(&stream->lock);
365 if (stream->status == STREAM_INIT && stream->prev != STREAM_UN_INIT) {
366 /* stream is started */
367 stream->prev = stream->status;
368 stream->status = STREAM_RUNNING;
369 }
370
371 if (stream->status == STREAM_INIT && stream->prev == STREAM_UN_INIT) {
372 /* stream is not started yet */
373 pr_debug("Stream isn't in started state %d, prev %d\n",
374 stream->status, stream->prev);
375 } else if ((stream->status == STREAM_RUNNING ||
376 stream->status == STREAM_PAUSED) &&
377 stream->need_draining != true) {
378 /* stream is started */
379 if (stream->ops == STREAM_OPS_PLAYBACK ||
380 stream->ops == STREAM_OPS_PLAYBACK_DRM) {
381 if (sst_play_frame(str_id) < 0) {
382 pr_warn("play frames failed\n");
383 mutex_unlock(&stream->lock);
384 return -EIO;
385 }
386 } else if (stream->ops == STREAM_OPS_CAPTURE) {
387 if (sst_capture_frame(str_id) < 0) {
388 pr_warn("capture frames failed\n");
389 mutex_unlock(&stream->lock);
390 return -EIO;
391 }
392 }
393 } else {
394 mutex_unlock(&stream->lock);
395 return -EIO;
396 }
397 mutex_unlock(&stream->lock);
398 /* Block the call for reply */
399
400 retval = sst_wait_interruptible(sst_drv_ctx, &stream->data_blk);
401 if (retval) {
402 stream->status = STREAM_INIT;
403 pr_debug("wait returned error...\n");
404 }
405 return retval;
406}
407
408/* fills kernel list with buffer addresses for SST DSP driver to process*/
409static int snd_sst_fill_kernel_list(struct stream_info *stream,
410 const struct iovec *iovec, unsigned long nr_segs,
411 struct list_head *copy_to_list)
412{
413 struct sst_stream_bufs *stream_bufs;
414 unsigned long index, mmap_len;
415 unsigned char __user *bufp;
416 unsigned long size, copied_size;
417 int retval = 0, add_to_list = 0;
418 static int sent_offset;
419 static unsigned long sent_index;
420
421#ifdef CONFIG_MRST_RAR_HANDLER
422 if (stream->ops == STREAM_OPS_PLAYBACK_DRM) {
423 for (index = stream->sg_index; index < nr_segs; index++) {
424 __u32 rar_handle;
425 struct sst_stream_bufs *stream_bufs =
426 kzalloc(sizeof(*stream_bufs), GFP_KERNEL);
427
428 stream->sg_index = index;
429 if (!stream_bufs)
430 return -ENOMEM;
431 if (copy_from_user((void *) &rar_handle,
432 iovec[index].iov_base,
433 sizeof(__u32))) {
434 kfree(stream_bufs);
435 return -EFAULT;
436 }
437 stream_bufs->addr = (char *)rar_handle;
438 stream_bufs->in_use = false;
439 stream_bufs->size = iovec[0].iov_len;
440 /* locking here */
441 mutex_lock(&stream->lock);
442 list_add_tail(&stream_bufs->node, &stream->bufs);
443 mutex_unlock(&stream->lock);
444 }
445 stream->sg_index = index;
446 return retval;
447 }
448#endif
449 stream_bufs = kzalloc(sizeof(*stream_bufs), GFP_KERNEL);
450 if (!stream_bufs)
451 return -ENOMEM;
452 stream_bufs->addr = sst_drv_ctx->mmap_mem;
453 mmap_len = sst_drv_ctx->mmap_len;
454 stream_bufs->addr = sst_drv_ctx->mmap_mem;
455 bufp = stream->cur_ptr;
456
457 copied_size = 0;
458
459 if (!stream->sg_index)
460 sent_index = sent_offset = 0;
461
462 for (index = stream->sg_index; index < nr_segs; index++) {
463 stream->sg_index = index;
464 if (!stream->cur_ptr)
465 bufp = iovec[index].iov_base;
466
467 size = ((unsigned long)iovec[index].iov_base
468 + iovec[index].iov_len) - (unsigned long) bufp;
469
470 if ((copied_size + size) > mmap_len)
471 size = mmap_len - copied_size;
472
473
474 if (stream->ops == STREAM_OPS_PLAYBACK) {
475 if (copy_from_user((void *)
476 (stream_bufs->addr + copied_size),
477 bufp, size)) {
478 /* Clean up the list and return error code */
479 retval = -EFAULT;
480 break;
481 }
482 } else if (stream->ops == STREAM_OPS_CAPTURE) {
483 struct snd_sst_user_cap_list *entry =
484 kzalloc(sizeof(*entry), GFP_KERNEL);
485
486 if (!entry) {
487 kfree(stream_bufs);
488 return -ENOMEM;
489 }
490 entry->iov_index = index;
491 entry->iov_offset = (unsigned long) bufp -
492 (unsigned long)iovec[index].iov_base;
493 entry->offset = copied_size;
494 entry->size = size;
495 list_add_tail(&entry->node, copy_to_list);
496 }
497
498 stream->cur_ptr = bufp + size;
499
500 if (((unsigned long)iovec[index].iov_base
501 + iovec[index].iov_len) <
502 ((unsigned long)iovec[index].iov_base)) {
503 pr_debug("Buffer overflows\n");
504 kfree(stream_bufs);
505 return -EINVAL;
506 }
507
508 if (((unsigned long)iovec[index].iov_base
509 + iovec[index].iov_len) ==
510 (unsigned long)stream->cur_ptr) {
511 stream->cur_ptr = NULL;
512 stream->sg_index++;
513 }
514
515 copied_size += size;
516 pr_debug("copied_size - %lx\n", copied_size);
517 if ((copied_size >= mmap_len) ||
518 (stream->sg_index == nr_segs)) {
519 add_to_list = 1;
520 }
521
522 if (add_to_list) {
523 stream_bufs->in_use = false;
524 stream_bufs->size = copied_size;
525 /* locking here */
526 mutex_lock(&stream->lock);
527 list_add_tail(&stream_bufs->node, &stream->bufs);
528 mutex_unlock(&stream->lock);
529 break;
530 }
531 }
532 return retval;
533}
534
535/* This function copies the captured data returned from SST DSP engine
536 * to the user buffers*/
537static int snd_sst_copy_userbuf_capture(struct stream_info *stream,
538 const struct iovec *iovec,
539 struct list_head *copy_to_list)
540{
541 struct snd_sst_user_cap_list *entry, *_entry;
542 struct sst_stream_bufs *kbufs = NULL, *_kbufs;
543 int retval = 0;
544
545 /* copy sent buffers */
546 pr_debug("capture stream copying to user now...\n");
547 list_for_each_entry_safe(kbufs, _kbufs, &stream->bufs, node) {
548 if (kbufs->in_use == true) {
549 /* copy to user */
550 list_for_each_entry_safe(entry, _entry,
551 copy_to_list, node) {
552 if (copy_to_user(iovec[entry->iov_index].iov_base + entry->iov_offset,
553 kbufs->addr + entry->offset,
554 entry->size)) {
555 /* Clean up the list and return error */
556 retval = -EFAULT;
557 break;
558 }
559 list_del(&entry->node);
560 kfree(entry);
561 }
562 }
563 }
564 pr_debug("end of cap copy\n");
565 return retval;
566}
567
568/*
569 * snd_sst_userbufs_play_cap - constructs the list from user buffers
570 *
571 * @iovec:pointer to iovec structure
572 * @nr_segs:number entries in the iovec structure
573 * @str_id:stream id
574 * @stream:pointer to stream_info structure
575 *
576 * This function will traverse the user list and copy the data to the kernel
577 * space buffers.
578 */
579static int snd_sst_userbufs_play_cap(const struct iovec *iovec,
580 unsigned long nr_segs, unsigned int str_id,
581 struct stream_info *stream)
582{
583 int retval;
584 LIST_HEAD(copy_to_list);
585
586
587 retval = snd_sst_fill_kernel_list(stream, iovec, nr_segs,
588 &copy_to_list);
589
590 retval = intel_sst_play_capture(stream, str_id);
591 if (retval < 0)
592 return retval;
593
594 if (stream->ops == STREAM_OPS_CAPTURE) {
595 retval = snd_sst_copy_userbuf_capture(stream, iovec,
596 &copy_to_list);
597 }
598 return retval;
599}
600
601/* This function is common function across read/write
602 for user buffers called from system calls*/
603static int intel_sst_read_write(unsigned int str_id, char __user *buf,
604 size_t count)
605{
606 int retval;
607 struct stream_info *stream;
608 struct iovec iovec;
609 unsigned long nr_segs;
610
611 retval = sst_validate_strid(str_id);
612 if (retval)
613 return -EINVAL;
614 stream = &sst_drv_ctx->streams[str_id];
615 if (stream->mmapped == true) {
616 pr_warn("user write and stream is mapped\n");
617 return -EIO;
618 }
619 if (!count)
620 return -EINVAL;
621 stream->curr_bytes = 0;
622 stream->cumm_bytes = 0;
623 /* copy user buf details */
624 pr_debug("new buffers %p, copy size %d, status %d\n" ,
625 buf, (int) count, (int) stream->status);
626
627 stream->buf_type = SST_BUF_USER_STATIC;
628 iovec.iov_base = buf;
629 iovec.iov_len = count;
630 nr_segs = 1;
631
632 do {
633 retval = snd_sst_userbufs_play_cap(
634 &iovec, nr_segs, str_id, stream);
635 if (retval < 0)
636 break;
637
638 } while (stream->sg_index < nr_segs);
639
640 stream->sg_index = 0;
641 stream->cur_ptr = NULL;
642 if (retval >= 0)
643 retval = stream->cumm_bytes;
644 pr_debug("end of play/rec bytes = %d!!\n", retval);
645 return retval;
646}
647
648/***
649 * intel_sst_write - This function is called when user tries to play out data
650 *
651 * @file_ptr:pointer to file
652 * @buf:user buffer to be played out
653 * @count:size of tthe buffer
654 * @offset:offset to start from
655 *
656 * writes the encoded data into DSP
657 */
658int intel_sst_write(struct file *file_ptr, const char __user *buf,
659 size_t count, loff_t *offset)
660{
661 struct ioctl_pvt_data *data = file_ptr->private_data;
662 int str_id = data->str_id;
663 struct stream_info *stream = &sst_drv_ctx->streams[str_id];
664
665 pr_debug("called for %d\n", str_id);
666 if (stream->status == STREAM_UN_INIT ||
667 stream->status == STREAM_DECODE) {
668 return -EBADRQC;
669 }
670 return intel_sst_read_write(str_id, (char __user *)buf, count);
671}
672
673/*
674 * intel_sst_aio_write - write buffers
675 *
676 * @kiocb:pointer to a structure containing file pointer
677 * @iov:list of user buffer to be played out
678 * @nr_segs:number of entries
679 * @offset:offset to start from
680 *
681 * This function is called when user tries to play out multiple data buffers
682 */
683ssize_t intel_sst_aio_write(struct kiocb *kiocb, const struct iovec *iov,
684 unsigned long nr_segs, loff_t offset)
685{
686 int retval;
687 struct ioctl_pvt_data *data = kiocb->ki_filp->private_data;
688 int str_id = data->str_id;
689 struct stream_info *stream;
690
691 pr_debug("entry - %ld\n", nr_segs);
692
693 if (is_sync_kiocb(kiocb) == false)
694 return -EINVAL;
695
696 pr_debug("called for str_id %d\n", str_id);
697 retval = sst_validate_strid(str_id);
698 if (retval)
699 return -EINVAL;
700 stream = &sst_drv_ctx->streams[str_id];
701 if (stream->mmapped == true)
702 return -EIO;
703 if (stream->status == STREAM_UN_INIT ||
704 stream->status == STREAM_DECODE) {
705 return -EBADRQC;
706 }
707 stream->curr_bytes = 0;
708 stream->cumm_bytes = 0;
709 pr_debug("new segs %ld, offset %d, status %d\n" ,
710 nr_segs, (int) offset, (int) stream->status);
711 stream->buf_type = SST_BUF_USER_STATIC;
712 do {
713 retval = snd_sst_userbufs_play_cap(iov, nr_segs,
714 str_id, stream);
715 if (retval < 0)
716 break;
717
718 } while (stream->sg_index < nr_segs);
719
720 stream->sg_index = 0;
721 stream->cur_ptr = NULL;
722 if (retval >= 0)
723 retval = stream->cumm_bytes;
724 pr_debug("end of play/rec bytes = %d!!\n", retval);
725 return retval;
726}
727
728/*
729 * intel_sst_read - read the encoded data
730 *
731 * @file_ptr: pointer to file
732 * @buf: user buffer to be filled with captured data
733 * @count: size of tthe buffer
734 * @offset: offset to start from
735 *
736 * This function is called when user tries to capture data
737 */
738int intel_sst_read(struct file *file_ptr, char __user *buf,
739 size_t count, loff_t *offset)
740{
741 struct ioctl_pvt_data *data = file_ptr->private_data;
742 int str_id = data->str_id;
743 struct stream_info *stream = &sst_drv_ctx->streams[str_id];
744
745 pr_debug("called for %d\n", str_id);
746 if (stream->status == STREAM_UN_INIT ||
747 stream->status == STREAM_DECODE)
748 return -EBADRQC;
749 return intel_sst_read_write(str_id, buf, count);
750}
751
752/*
753 * intel_sst_aio_read - aio read
754 *
755 * @kiocb: pointer to a structure containing file pointer
756 * @iov: list of user buffer to be filled with captured
757 * @nr_segs: number of entries
758 * @offset: offset to start from
759 *
760 * This function is called when user tries to capture out multiple data buffers
761 */
762ssize_t intel_sst_aio_read(struct kiocb *kiocb, const struct iovec *iov,
763 unsigned long nr_segs, loff_t offset)
764{
765 int retval;
766 struct ioctl_pvt_data *data = kiocb->ki_filp->private_data;
767 int str_id = data->str_id;
768 struct stream_info *stream;
769
770 pr_debug("entry - %ld\n", nr_segs);
771
772 if (is_sync_kiocb(kiocb) == false) {
773 pr_debug("aio_read from user space is not allowed\n");
774 return -EINVAL;
775 }
776
777 pr_debug("called for str_id %d\n", str_id);
778 retval = sst_validate_strid(str_id);
779 if (retval)
780 return -EINVAL;
781 stream = &sst_drv_ctx->streams[str_id];
782 if (stream->mmapped == true)
783 return -EIO;
784 if (stream->status == STREAM_UN_INIT ||
785 stream->status == STREAM_DECODE)
786 return -EBADRQC;
787 stream->curr_bytes = 0;
788 stream->cumm_bytes = 0;
789
790 pr_debug("new segs %ld, offset %d, status %d\n" ,
791 nr_segs, (int) offset, (int) stream->status);
792 stream->buf_type = SST_BUF_USER_STATIC;
793 do {
794 retval = snd_sst_userbufs_play_cap(iov, nr_segs,
795 str_id, stream);
796 if (retval < 0)
797 break;
798
799 } while (stream->sg_index < nr_segs);
800
801 stream->sg_index = 0;
802 stream->cur_ptr = NULL;
803 if (retval >= 0)
804 retval = stream->cumm_bytes;
805 pr_debug("end of play/rec bytes = %d!!\n", retval);
806 return retval;
807}
808
809/* sst_print_stream_params - prints the stream parameters (debug fn)*/
810static void sst_print_stream_params(struct snd_sst_get_stream_params *get_prm)
811{
812 pr_debug("codec params:result = %d\n",
813 get_prm->codec_params.result);
814 pr_debug("codec params:stream = %d\n",
815 get_prm->codec_params.stream_id);
816 pr_debug("codec params:codec = %d\n",
817 get_prm->codec_params.codec);
818 pr_debug("codec params:ops = %d\n",
819 get_prm->codec_params.ops);
820 pr_debug("codec params:stream_type = %d\n",
821 get_prm->codec_params.stream_type);
822 pr_debug("pcmparams:sfreq = %d\n",
823 get_prm->pcm_params.sfreq);
824 pr_debug("pcmparams:num_chan = %d\n",
825 get_prm->pcm_params.num_chan);
826 pr_debug("pcmparams:pcm_wd_sz = %d\n",
827 get_prm->pcm_params.pcm_wd_sz);
828 return;
829}
830
831/**
832 * sst_create_algo_ipc - create ipc msg for algorithm parameters
833 *
834 * @algo_params: Algorithm parameters
835 * @msg: post msg pointer
836 *
837 * This function is called to create ipc msg
838 */
839int sst_create_algo_ipc(struct snd_ppp_params *algo_params,
840 struct ipc_post **msg)
841{
842 if (sst_create_large_msg(msg))
843 return -ENOMEM;
844 sst_fill_header(&(*msg)->header,
845 IPC_IA_ALG_PARAMS, 1, algo_params->str_id);
846 (*msg)->header.part.data = sizeof(u32) +
847 sizeof(*algo_params) + algo_params->size;
848 memcpy((*msg)->mailbox_data, &(*msg)->header, sizeof(u32));
849 memcpy((*msg)->mailbox_data + sizeof(u32),
850 algo_params, sizeof(*algo_params));
851 return 0;
852}
853
854/**
855 * sst_send_algo_ipc - send ipc msg for algorithm parameters
856 *
857 * @msg: post msg pointer
858 *
859 * This function is called to send ipc msg
860 */
861int sst_send_algo_ipc(struct ipc_post **msg)
862{
863 sst_drv_ctx->ppp_params_blk.condition = false;
864 sst_drv_ctx->ppp_params_blk.ret_code = 0;
865 sst_drv_ctx->ppp_params_blk.on = true;
866 sst_drv_ctx->ppp_params_blk.data = NULL;
867 spin_lock(&sst_drv_ctx->list_spin_lock);
868 list_add_tail(&(*msg)->node, &sst_drv_ctx->ipc_dispatch_list);
869 spin_unlock(&sst_drv_ctx->list_spin_lock);
870 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
871 return sst_wait_interruptible_timeout(sst_drv_ctx,
872 &sst_drv_ctx->ppp_params_blk, SST_BLOCK_TIMEOUT);
873}
874
875/**
876 * intel_sst_ioctl_dsp - receives the device ioctl's
877 *
878 * @cmd:Ioctl cmd
879 * @arg:data
880 *
881 * This function is called when a user space component
882 * sends a DSP Ioctl to SST driver
883 */
884long intel_sst_ioctl_dsp(unsigned int cmd, unsigned long arg)
885{
886 int retval = 0;
887 struct snd_ppp_params algo_params;
888 struct snd_ppp_params *algo_params_copied;
889 struct ipc_post *msg;
890
891 switch (_IOC_NR(cmd)) {
892 case _IOC_NR(SNDRV_SST_SET_ALGO):
893 if (copy_from_user(&algo_params, (void __user *)arg,
894 sizeof(algo_params)))
895 return -EFAULT;
896 if (algo_params.size > SST_MAILBOX_SIZE)
897 return -EMSGSIZE;
898
899 pr_debug("Algo ID %d Str id %d Enable %d Size %d\n",
900 algo_params.algo_id, algo_params.str_id,
901 algo_params.enable, algo_params.size);
902 retval = sst_create_algo_ipc(&algo_params, &msg);
903 if (retval)
904 break;
905 algo_params.reserved = 0;
906 if (copy_from_user(msg->mailbox_data + sizeof(algo_params),
907 algo_params.params, algo_params.size))
908 return -EFAULT;
909
910 retval = sst_send_algo_ipc(&msg);
911 if (retval) {
912 pr_debug("Error in sst_set_algo = %d\n", retval);
913 retval = -EIO;
914 }
915 break;
916
917 case _IOC_NR(SNDRV_SST_GET_ALGO):
918 if (copy_from_user(&algo_params, (void __user *)arg,
919 sizeof(algo_params)))
920 return -EFAULT;
921 pr_debug("Algo ID %d Str id %d Enable %d Size %d\n",
922 algo_params.algo_id, algo_params.str_id,
923 algo_params.enable, algo_params.size);
924 retval = sst_create_algo_ipc(&algo_params, &msg);
925 if (retval)
926 break;
927 algo_params.reserved = 1;
928 retval = sst_send_algo_ipc(&msg);
929 if (retval) {
930 pr_debug("Error in sst_get_algo = %d\n", retval);
931 retval = -EIO;
932 break;
933 }
934 algo_params_copied = (struct snd_ppp_params *)
935 sst_drv_ctx->ppp_params_blk.data;
936 if (algo_params_copied->size > algo_params.size) {
937 pr_debug("mem insufficient to copy\n");
938 retval = -EMSGSIZE;
939 goto free_mem;
940 } else {
941 char __user *tmp;
942
943 if (copy_to_user(algo_params.params,
944 algo_params_copied->params,
945 algo_params_copied->size)) {
946 retval = -EFAULT;
947 goto free_mem;
948 }
949 tmp = (char __user *)arg + offsetof(
950 struct snd_ppp_params, size);
951 if (copy_to_user(tmp, &algo_params_copied->size,
952 sizeof(__u32))) {
953 retval = -EFAULT;
954 goto free_mem;
955 }
956
957 }
958free_mem:
959 kfree(algo_params_copied->params);
960 kfree(algo_params_copied);
961 break;
962 }
963 return retval;
964}
965
966
967int sst_ioctl_tuning_params(unsigned long arg)
968{
969 struct snd_sst_tuning_params params;
970 struct ipc_post *msg;
971
972 if (copy_from_user(&params, (void __user *)arg, sizeof(params)))
973 return -EFAULT;
974 if (params.size > SST_MAILBOX_SIZE)
975 return -ENOMEM;
976 pr_debug("Parameter %d, Stream %d, Size %d\n", params.type,
977 params.str_id, params.size);
978 if (sst_create_large_msg(&msg))
979 return -ENOMEM;
980
981 sst_fill_header(&msg->header, IPC_IA_TUNING_PARAMS, 1, params.str_id);
982 msg->header.part.data = sizeof(u32) + sizeof(params) + params.size;
983 memcpy(msg->mailbox_data, &msg->header.full, sizeof(u32));
984 memcpy(msg->mailbox_data + sizeof(u32), &params, sizeof(params));
985 if (copy_from_user(msg->mailbox_data + sizeof(params),
986 (void __user *)(unsigned long)params.addr,
987 params.size)) {
988 kfree(msg->mailbox_data);
989 kfree(msg);
990 return -EFAULT;
991 }
992 return sst_send_algo_ipc(&msg);
993}
994/**
995 * intel_sst_ioctl - receives the device ioctl's
996 * @file_ptr:pointer to file
997 * @cmd:Ioctl cmd
998 * @arg:data
999 *
1000 * This function is called by OS when a user space component
1001 * sends an Ioctl to SST driver
1002 */
1003long intel_sst_ioctl(struct file *file_ptr, unsigned int cmd, unsigned long arg)
1004{
1005 int retval = 0;
1006 struct ioctl_pvt_data *data = NULL;
1007 int str_id = 0, minor = 0;
1008
1009 data = file_ptr->private_data;
1010 if (data) {
1011 minor = 0;
1012 str_id = data->str_id;
1013 } else
1014 minor = 1;
1015
1016 if (sst_drv_ctx->sst_state != SST_FW_RUNNING)
1017 return -EBUSY;
1018
1019 switch (_IOC_NR(cmd)) {
1020 case _IOC_NR(SNDRV_SST_STREAM_PAUSE):
1021 pr_debug("IOCTL_PAUSE received for %d!\n", str_id);
1022 if (minor != STREAM_MODULE) {
1023 retval = -EBADRQC;
1024 break;
1025 }
1026 retval = sst_pause_stream(str_id);
1027 break;
1028
1029 case _IOC_NR(SNDRV_SST_STREAM_RESUME):
1030 pr_debug("SNDRV_SST_IOCTL_RESUME received!\n");
1031 if (minor != STREAM_MODULE) {
1032 retval = -EBADRQC;
1033 break;
1034 }
1035 retval = sst_resume_stream(str_id);
1036 break;
1037
1038 case _IOC_NR(SNDRV_SST_STREAM_SET_PARAMS): {
1039 struct snd_sst_params str_param;
1040
1041 pr_debug("IOCTL_SET_PARAMS received!\n");
1042 if (minor != STREAM_MODULE) {
1043 retval = -EBADRQC;
1044 break;
1045 }
1046
1047 if (copy_from_user(&str_param, (void __user *)arg,
1048 sizeof(str_param))) {
1049 retval = -EFAULT;
1050 break;
1051 }
1052
1053 if (!str_id) {
1054
1055 retval = sst_get_stream(&str_param);
1056 if (retval > 0) {
1057 struct stream_info *str_info;
1058 char __user *dest;
1059
1060 sst_drv_ctx->stream_cnt++;
1061 data->str_id = retval;
1062 str_info = &sst_drv_ctx->streams[retval];
1063 str_info->src = SST_DRV;
1064 dest = (char __user *)arg + offsetof(struct snd_sst_params, stream_id);
1065 retval = copy_to_user(dest, &retval, sizeof(__u32));
1066 if (retval)
1067 retval = -EFAULT;
1068 } else {
1069 if (retval == -SST_ERR_INVALID_PARAMS)
1070 retval = -EINVAL;
1071 }
1072 } else {
1073 pr_debug("SET_STREAM_PARAMS received!\n");
1074 /* allocated set params only */
1075 retval = sst_set_stream_param(str_id, &str_param);
1076 /* Block the call for reply */
1077 if (!retval) {
1078 int sfreq = 0, word_size = 0, num_channel = 0;
1079 sfreq = str_param.sparams.uc.pcm_params.sfreq;
1080 word_size = str_param.sparams.uc.pcm_params.pcm_wd_sz;
1081 num_channel = str_param.sparams.uc.pcm_params.num_chan;
1082 if (str_param.ops == STREAM_OPS_CAPTURE) {
1083 sst_drv_ctx->scard_ops->\
1084 set_pcm_audio_params(sfreq,
1085 word_size, num_channel);
1086 }
1087 }
1088 }
1089 break;
1090 }
1091 case _IOC_NR(SNDRV_SST_SET_VOL): {
1092 struct snd_sst_vol set_vol;
1093
1094 if (copy_from_user(&set_vol, (void __user *)arg,
1095 sizeof(set_vol))) {
1096 pr_debug("copy failed\n");
1097 retval = -EFAULT;
1098 break;
1099 }
1100 pr_debug("SET_VOLUME received for %d!\n",
1101 set_vol.stream_id);
1102 if (minor == STREAM_MODULE && set_vol.stream_id == 0) {
1103 pr_debug("invalid operation!\n");
1104 retval = -EPERM;
1105 break;
1106 }
1107 retval = sst_set_vol(&set_vol);
1108 break;
1109 }
1110 case _IOC_NR(SNDRV_SST_GET_VOL): {
1111 struct snd_sst_vol get_vol;
1112
1113 if (copy_from_user(&get_vol, (void __user *)arg,
1114 sizeof(get_vol))) {
1115 retval = -EFAULT;
1116 break;
1117 }
1118 pr_debug("IOCTL_GET_VOLUME received for stream = %d!\n",
1119 get_vol.stream_id);
1120 if (minor == STREAM_MODULE && get_vol.stream_id == 0) {
1121 pr_debug("invalid operation!\n");
1122 retval = -EPERM;
1123 break;
1124 }
1125 retval = sst_get_vol(&get_vol);
1126 if (retval) {
1127 retval = -EIO;
1128 break;
1129 }
1130 pr_debug("id:%d\n, vol:%d, ramp_dur:%d, ramp_type:%d\n",
1131 get_vol.stream_id, get_vol.volume,
1132 get_vol.ramp_duration, get_vol.ramp_type);
1133 if (copy_to_user((struct snd_sst_vol __user *)arg,
1134 &get_vol, sizeof(get_vol))) {
1135 retval = -EFAULT;
1136 break;
1137 }
1138 /*sst_print_get_vol_info(str_id, &get_vol);*/
1139 break;
1140 }
1141
1142 case _IOC_NR(SNDRV_SST_MUTE): {
1143 struct snd_sst_mute set_mute;
1144
1145 if (copy_from_user(&set_mute, (void __user *)arg,
1146 sizeof(set_mute))) {
1147 retval = -EFAULT;
1148 break;
1149 }
1150 pr_debug("SNDRV_SST_SET_VOLUME received for %d!\n",
1151 set_mute.stream_id);
1152 if (minor == STREAM_MODULE && set_mute.stream_id == 0) {
1153 retval = -EPERM;
1154 break;
1155 }
1156 retval = sst_set_mute(&set_mute);
1157 break;
1158 }
1159 case _IOC_NR(SNDRV_SST_STREAM_GET_PARAMS): {
1160 struct snd_sst_get_stream_params get_params;
1161
1162 pr_debug("IOCTL_GET_PARAMS received!\n");
1163 if (minor != 0) {
1164 retval = -EBADRQC;
1165 break;
1166 }
1167
1168 retval = sst_get_stream_params(str_id, &get_params);
1169 if (retval) {
1170 retval = -EIO;
1171 break;
1172 }
1173 if (copy_to_user((struct snd_sst_get_stream_params __user *)arg,
1174 &get_params, sizeof(get_params))) {
1175 retval = -EFAULT;
1176 break;
1177 }
1178 sst_print_stream_params(&get_params);
1179 break;
1180 }
1181
1182 case _IOC_NR(SNDRV_SST_MMAP_PLAY):
1183 case _IOC_NR(SNDRV_SST_MMAP_CAPTURE): {
1184 struct snd_sst_mmap_buffs mmap_buf;
1185
1186 pr_debug("SNDRV_SST_MMAP_PLAY/CAPTURE received!\n");
1187 if (minor != STREAM_MODULE) {
1188 retval = -EBADRQC;
1189 break;
1190 }
1191 if (copy_from_user(&mmap_buf, (void __user *)arg,
1192 sizeof(mmap_buf))) {
1193 retval = -EFAULT;
1194 break;
1195 }
1196 retval = intel_sst_mmap_play_capture(str_id, &mmap_buf);
1197 break;
1198 }
1199 case _IOC_NR(SNDRV_SST_STREAM_DROP):
1200 pr_debug("SNDRV_SST_IOCTL_DROP received!\n");
1201 if (minor != STREAM_MODULE) {
1202 retval = -EINVAL;
1203 break;
1204 }
1205 retval = sst_drop_stream(str_id);
1206 break;
1207
1208 case _IOC_NR(SNDRV_SST_STREAM_GET_TSTAMP): {
1209 struct snd_sst_tstamp tstamp = {0};
1210 unsigned long long time, freq, mod;
1211
1212 pr_debug("SNDRV_SST_STREAM_GET_TSTAMP received!\n");
1213 if (minor != STREAM_MODULE) {
1214 retval = -EBADRQC;
1215 break;
1216 }
1217 memcpy_fromio(&tstamp,
1218 sst_drv_ctx->mailbox + SST_TIME_STAMP + str_id * sizeof(tstamp),
1219 sizeof(tstamp));
1220 time = tstamp.samples_rendered;
1221 freq = (unsigned long long) tstamp.sampling_frequency;
1222 time = time * 1000; /* converting it to ms */
1223 mod = do_div(time, freq);
1224 if (copy_to_user((void __user *)arg, &time,
1225 sizeof(unsigned long long)))
1226 retval = -EFAULT;
1227 break;
1228 }
1229
1230 case _IOC_NR(SNDRV_SST_STREAM_START):{
1231 struct stream_info *stream;
1232
1233 pr_debug("SNDRV_SST_STREAM_START received!\n");
1234 if (minor != STREAM_MODULE) {
1235 retval = -EINVAL;
1236 break;
1237 }
1238 retval = sst_validate_strid(str_id);
1239 if (retval)
1240 break;
1241 stream = &sst_drv_ctx->streams[str_id];
1242 mutex_lock(&stream->lock);
1243 if (stream->status == STREAM_INIT &&
1244 stream->need_draining != true) {
1245 stream->prev = stream->status;
1246 stream->status = STREAM_RUNNING;
1247 if (stream->ops == STREAM_OPS_PLAYBACK ||
1248 stream->ops == STREAM_OPS_PLAYBACK_DRM) {
1249 retval = sst_play_frame(str_id);
1250 } else if (stream->ops == STREAM_OPS_CAPTURE)
1251 retval = sst_capture_frame(str_id);
1252 else {
1253 retval = -EINVAL;
1254 mutex_unlock(&stream->lock);
1255 break;
1256 }
1257 if (retval < 0) {
1258 stream->status = STREAM_INIT;
1259 mutex_unlock(&stream->lock);
1260 break;
1261 }
1262 } else {
1263 retval = -EINVAL;
1264 }
1265 mutex_unlock(&stream->lock);
1266 break;
1267 }
1268
1269 case _IOC_NR(SNDRV_SST_SET_TARGET_DEVICE): {
1270 struct snd_sst_target_device target_device;
1271
1272 pr_debug("SET_TARGET_DEVICE received!\n");
1273 if (copy_from_user(&target_device, (void __user *)arg,
1274 sizeof(target_device))) {
1275 retval = -EFAULT;
1276 break;
1277 }
1278 if (minor != AM_MODULE) {
1279 retval = -EBADRQC;
1280 break;
1281 }
1282 retval = sst_target_device_select(&target_device);
1283 break;
1284 }
1285
1286 case _IOC_NR(SNDRV_SST_DRIVER_INFO): {
1287 struct snd_sst_driver_info info;
1288
1289 pr_debug("SNDRV_SST_DRIVER_INFO received\n");
1290 info.version = SST_VERSION_NUM;
1291 /* hard coding, shud get sumhow later */
1292 info.active_pcm_streams = sst_drv_ctx->stream_cnt -
1293 sst_drv_ctx->encoded_cnt;
1294 info.active_enc_streams = sst_drv_ctx->encoded_cnt;
1295 info.max_pcm_streams = MAX_ACTIVE_STREAM - MAX_ENC_STREAM;
1296 info.max_enc_streams = MAX_ENC_STREAM;
1297 info.buf_per_stream = sst_drv_ctx->mmap_len;
1298 if (copy_to_user((void __user *)arg, &info,
1299 sizeof(info)))
1300 retval = -EFAULT;
1301 break;
1302 }
1303
1304 case _IOC_NR(SNDRV_SST_STREAM_DECODE): {
1305 struct snd_sst_dbufs param;
1306 struct snd_sst_dbufs dbufs_local;
1307 struct snd_sst_buffs ibufs, obufs;
1308 struct snd_sst_buff_entry *ibuf_tmp, *obuf_tmp;
1309 char __user *dest;
1310
1311 pr_debug("SNDRV_SST_STREAM_DECODE received\n");
1312 if (minor != STREAM_MODULE) {
1313 retval = -EBADRQC;
1314 break;
1315 }
1316 if (copy_from_user(&param, (void __user *)arg,
1317 sizeof(param))) {
1318 retval = -EFAULT;
1319 break;
1320 }
1321
1322 dbufs_local.input_bytes_consumed = param.input_bytes_consumed;
1323 dbufs_local.output_bytes_produced =
1324 param.output_bytes_produced;
1325
1326 if (copy_from_user(&ibufs, (void __user *)param.ibufs, sizeof(ibufs))) {
1327 retval = -EFAULT;
1328 break;
1329 }
1330 if (copy_from_user(&obufs, (void __user *)param.obufs, sizeof(obufs))) {
1331 retval = -EFAULT;
1332 break;
1333 }
1334
1335 ibuf_tmp = kcalloc(ibufs.entries, sizeof(*ibuf_tmp), GFP_KERNEL);
1336 obuf_tmp = kcalloc(obufs.entries, sizeof(*obuf_tmp), GFP_KERNEL);
1337 if (!ibuf_tmp || !obuf_tmp) {
1338 retval = -ENOMEM;
1339 goto free_iobufs;
1340 }
1341
1342 if (copy_from_user(ibuf_tmp, (void __user *)ibufs.buff_entry,
1343 ibufs.entries * sizeof(*ibuf_tmp))) {
1344 retval = -EFAULT;
1345 goto free_iobufs;
1346 }
1347 ibufs.buff_entry = ibuf_tmp;
1348 dbufs_local.ibufs = &ibufs;
1349
1350 if (copy_from_user(obuf_tmp, (void __user *)obufs.buff_entry,
1351 obufs.entries * sizeof(*obuf_tmp))) {
1352 retval = -EFAULT;
1353 goto free_iobufs;
1354 }
1355 obufs.buff_entry = obuf_tmp;
1356 dbufs_local.obufs = &obufs;
1357
1358 retval = sst_decode(str_id, &dbufs_local);
1359 if (retval) {
1360 retval = -EAGAIN;
1361 goto free_iobufs;
1362 }
1363
1364 dest = (char __user *)arg + offsetof(struct snd_sst_dbufs, input_bytes_consumed);
1365 if (copy_to_user(dest,
1366 &dbufs_local.input_bytes_consumed,
1367 sizeof(unsigned long long))) {
1368 retval = -EFAULT;
1369 goto free_iobufs;
1370 }
1371
1372 dest = (char __user *)arg + offsetof(struct snd_sst_dbufs, input_bytes_consumed);
1373 if (copy_to_user(dest,
1374 &dbufs_local.output_bytes_produced,
1375 sizeof(unsigned long long))) {
1376 retval = -EFAULT;
1377 goto free_iobufs;
1378 }
1379free_iobufs:
1380 kfree(ibuf_tmp);
1381 kfree(obuf_tmp);
1382 break;
1383 }
1384
1385 case _IOC_NR(SNDRV_SST_STREAM_DRAIN):
1386 pr_debug("SNDRV_SST_STREAM_DRAIN received\n");
1387 if (minor != STREAM_MODULE) {
1388 retval = -EINVAL;
1389 break;
1390 }
1391 retval = sst_drain_stream(str_id);
1392 break;
1393
1394 case _IOC_NR(SNDRV_SST_STREAM_BYTES_DECODED): {
1395 unsigned long long __user *bytes = (unsigned long long __user *)arg;
1396 struct snd_sst_tstamp tstamp = {0};
1397
1398 pr_debug("STREAM_BYTES_DECODED received!\n");
1399 if (minor != STREAM_MODULE) {
1400 retval = -EINVAL;
1401 break;
1402 }
1403 memcpy_fromio(&tstamp,
1404 sst_drv_ctx->mailbox + SST_TIME_STAMP + str_id * sizeof(tstamp),
1405 sizeof(tstamp));
1406 if (copy_to_user(bytes, &tstamp.bytes_processed,
1407 sizeof(*bytes)))
1408 retval = -EFAULT;
1409 break;
1410 }
1411 case _IOC_NR(SNDRV_SST_FW_INFO): {
1412 struct snd_sst_fw_info *fw_info;
1413
1414 pr_debug("SNDRV_SST_FW_INFO received\n");
1415
1416 fw_info = kzalloc(sizeof(*fw_info), GFP_ATOMIC);
1417 if (!fw_info) {
1418 retval = -ENOMEM;
1419 break;
1420 }
1421 retval = sst_get_fw_info(fw_info);
1422 if (retval) {
1423 retval = -EIO;
1424 kfree(fw_info);
1425 break;
1426 }
1427 if (copy_to_user((struct snd_sst_dbufs __user *)arg,
1428 fw_info, sizeof(*fw_info))) {
1429 kfree(fw_info);
1430 retval = -EFAULT;
1431 break;
1432 }
1433 /*sst_print_fw_info(fw_info);*/
1434 kfree(fw_info);
1435 break;
1436 }
1437 case _IOC_NR(SNDRV_SST_GET_ALGO):
1438 case _IOC_NR(SNDRV_SST_SET_ALGO):
1439 if (minor != AM_MODULE) {
1440 retval = -EBADRQC;
1441 break;
1442 }
1443 retval = intel_sst_ioctl_dsp(cmd, arg);
1444 break;
1445
1446 case _IOC_NR(SNDRV_SST_TUNING_PARAMS):
1447 if (minor != AM_MODULE) {
1448 retval = -EBADRQC;
1449 break;
1450 }
1451 retval = sst_ioctl_tuning_params(arg);
1452 break;
1453
1454 default:
1455 retval = -EINVAL;
1456 }
1457 pr_debug("intel_sst_ioctl:complete ret code = %d\n", retval);
1458 return retval;
1459}
1460
diff --git a/drivers/staging/intel_sst/intel_sst_common.h b/drivers/staging/intel_sst/intel_sst_common.h
deleted file mode 100644
index 870981ba3c97..000000000000
--- a/drivers/staging/intel_sst/intel_sst_common.h
+++ /dev/null
@@ -1,623 +0,0 @@
1#ifndef __INTEL_SST_COMMON_H__
2#define __INTEL_SST_COMMON_H__
3/*
4 * intel_sst_common.h - Intel SST Driver for audio engine
5 *
6 * Copyright (C) 2008-10 Intel Corporation
7 * Authors: Vinod Koul <vinod.koul@intel.com>
8 * Harsha Priya <priya.harsha@intel.com>
9 * Dharageswari R <dharageswari.r@intel.com>
10 * KP Jeeja <jeeja.kp@intel.com>
11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; version 2 of the License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 *
28 * Common private declarations for SST
29 */
30
31#define SST_DRIVER_VERSION "1.2.17"
32#define SST_VERSION_NUM 0x1217
33
34/* driver names */
35#define SST_DRV_NAME "intel_sst_driver"
36#define SST_MRST_PCI_ID 0x080A
37#define SST_MFLD_PCI_ID 0x082F
38#define PCI_ID_LENGTH 4
39#define SST_SUSPEND_DELAY 2000
40#define FW_CONTEXT_MEM (64*1024)
41
42enum sst_states {
43 SST_FW_LOADED = 1,
44 SST_FW_RUNNING,
45 SST_UN_INIT,
46 SST_ERROR,
47 SST_SUSPENDED
48};
49
50#define MAX_ACTIVE_STREAM 3
51#define MAX_ENC_STREAM 1
52#define MAX_AM_HANDLES 1
53#define ALLOC_TIMEOUT 5000
54/* SST numbers */
55#define SST_BLOCK_TIMEOUT 5000
56#define TARGET_DEV_BLOCK_TIMEOUT 5000
57
58#define BLOCK_UNINIT -1
59#define RX_TIMESLOT_UNINIT -1
60
61/* SST register map */
62#define SST_CSR 0x00
63#define SST_PISR 0x08
64#define SST_PIMR 0x10
65#define SST_ISRX 0x18
66#define SST_IMRX 0x28
67#define SST_IPCX 0x38 /* IPC IA-SST */
68#define SST_IPCD 0x40 /* IPC SST-IA */
69#define SST_ISRD 0x20 /* dummy register for shim workaround */
70#define SST_SHIM_SIZE 0X44
71
72#define SPI_MODE_ENABLE_BASE_ADDR 0xffae4000
73#define FW_SIGNATURE_SIZE 4
74
75/* PMIC and SST hardware states */
76enum sst_mad_states {
77 SND_MAD_UN_INIT = 0,
78 SND_MAD_INIT_DONE,
79};
80
81/* stream states */
82enum sst_stream_states {
83 STREAM_UN_INIT = 0, /* Freed/Not used stream */
84 STREAM_RUNNING = 1, /* Running */
85 STREAM_PAUSED = 2, /* Paused stream */
86 STREAM_DECODE = 3, /* stream is in decoding only state */
87 STREAM_INIT = 4, /* stream init, waiting for data */
88};
89
90
91enum sst_ram_type {
92 SST_IRAM = 1,
93 SST_DRAM = 2,
94};
95/* SST shim registers to structure mapping */
96union config_status_reg {
97 struct {
98 u32 mfld_strb:1;
99 u32 sst_reset:1;
100 u32 hw_rsvd:3;
101 u32 sst_clk:2;
102 u32 bypass:3;
103 u32 run_stall:1;
104 u32 rsvd1:2;
105 u32 strb_cntr_rst:1;
106 u32 rsvd:18;
107 } part;
108 u32 full;
109};
110
111union interrupt_reg {
112 struct {
113 u32 done_interrupt:1;
114 u32 busy_interrupt:1;
115 u32 rsvd:30;
116 } part;
117 u32 full;
118};
119
120union sst_pisr_reg {
121 struct {
122 u32 pssp0:1;
123 u32 pssp1:1;
124 u32 rsvd0:3;
125 u32 dmac:1;
126 u32 rsvd1:26;
127 } part;
128 u32 full;
129};
130
131union sst_pimr_reg {
132 struct {
133 u32 ssp0:1;
134 u32 ssp1:1;
135 u32 rsvd0:3;
136 u32 dmac:1;
137 u32 rsvd1:10;
138 u32 ssp0_sc:1;
139 u32 ssp1_sc:1;
140 u32 rsvd2:3;
141 u32 dmac_sc:1;
142 u32 rsvd3:10;
143 } part;
144 u32 full;
145};
146
147
148struct sst_stream_bufs {
149 struct list_head node;
150 u32 size;
151 const char *addr;
152 u32 data_copied;
153 bool in_use;
154 u32 offset;
155};
156
157struct snd_sst_user_cap_list {
158 unsigned int iov_index; /* index of iov */
159 unsigned long iov_offset; /* offset in iov */
160 unsigned long offset; /* offset in kmem */
161 unsigned long size; /* size copied */
162 struct list_head node;
163};
164/*
165This structure is used to block a user/fw data call to another
166fw/user call
167*/
168struct sst_block {
169 bool condition; /* condition for blocking check */
170 int ret_code; /* ret code when block is released */
171 void *data; /* data to be appsed for block if any */
172 bool on;
173};
174
175enum snd_sst_buf_type {
176 SST_BUF_USER_STATIC = 1,
177 SST_BUF_USER_DYNAMIC,
178 SST_BUF_MMAP_STATIC,
179 SST_BUF_MMAP_DYNAMIC,
180};
181
182enum snd_src {
183 SST_DRV = 1,
184 MAD_DRV = 2
185};
186
187/**
188 * struct stream_info - structure that holds the stream information
189 *
190 * @status : stream current state
191 * @prev : stream prev state
192 * @codec : stream codec
193 * @sst_id : stream id
194 * @ops : stream operation pb/cp/drm...
195 * @bufs: stream buffer list
196 * @lock : stream mutex for protecting state
197 * @pcm_lock : spinlock for pcm path only
198 * @mmapped : is stream mmapped
199 * @sg_index : current stream user buffer index
200 * @cur_ptr : stream user buffer pointer
201 * @buf_entry : current user buffer
202 * @data_blk : stream block for data operations
203 * @ctrl_blk : stream block for ctrl operations
204 * @buf_type : stream user buffer type
205 * @pcm_substream : PCM substream
206 * @period_elapsed : PCM period elapsed callback
207 * @sfreq : stream sampling freq
208 * @decode_ibuf : Decoded i/p buffers pointer
209 * @decode_obuf : Decoded o/p buffers pointer
210 * @decode_isize : Decoded i/p buffers size
211 * @decode_osize : Decoded o/p buffers size
212 * @decode_ibuf_type : Decoded i/p buffer type
213 * @decode_obuf_type : Decoded o/p buffer type
214 * @idecode_alloc : Decode alloc index
215 * @need_draining : stream set for drain
216 * @str_type : stream type
217 * @curr_bytes : current bytes decoded
218 * @cumm_bytes : cummulative bytes decoded
219 * @str_type : stream type
220 * @src : stream source
221 * @device : output device type (medfield only)
222 * @pcm_slot : pcm slot value
223 */
224struct stream_info {
225 unsigned int status;
226 unsigned int prev;
227 u8 codec;
228 unsigned int sst_id;
229 unsigned int ops;
230 struct list_head bufs;
231 struct mutex lock; /* mutex */
232 spinlock_t pcm_lock;
233 bool mmapped;
234 unsigned int sg_index; /* current buf Index */
235 unsigned char __user *cur_ptr; /* Current static bufs */
236 struct snd_sst_buf_entry __user *buf_entry;
237 struct sst_block data_blk; /* stream ops block */
238 struct sst_block ctrl_blk; /* stream control cmd block */
239 enum snd_sst_buf_type buf_type;
240 void *pcm_substream;
241 void (*period_elapsed) (void *pcm_substream);
242 unsigned int sfreq;
243 void *decode_ibuf, *decode_obuf;
244 unsigned int decode_isize, decode_osize;
245 u8 decode_ibuf_type, decode_obuf_type;
246 unsigned int idecode_alloc;
247 unsigned int need_draining;
248 unsigned int str_type;
249 u32 curr_bytes;
250 u32 cumm_bytes;
251 u32 src;
252 enum snd_sst_audio_device_type device;
253 u8 pcm_slot;
254};
255
256/*
257 * struct stream_alloc_bloc - this structure is used for blocking the user's
258 * alloc calls to fw's response to alloc calls
259 *
260 * @sst_id : session id of blocked stream
261 * @ops_block : ops block struture
262 */
263struct stream_alloc_block {
264 int sst_id; /* session id of blocked stream */
265 struct sst_block ops_block; /* ops block struture */
266};
267
268#define SST_FW_SIGN "$SST"
269#define SST_FW_LIB_SIGN "$LIB"
270
271/*
272 * struct fw_header - FW file headers
273 *
274 * @signature : FW signature
275 * @modules : # of modules
276 * @file_format : version of header format
277 * @reserved : reserved fields
278 */
279struct fw_header {
280 unsigned char signature[FW_SIGNATURE_SIZE]; /* FW signature */
281 u32 file_size; /* size of fw minus this header */
282 u32 modules; /* # of modules */
283 u32 file_format; /* version of header format */
284 u32 reserved[4];
285};
286
287struct fw_module_header {
288 unsigned char signature[FW_SIGNATURE_SIZE]; /* module signature */
289 u32 mod_size; /* size of module */
290 u32 blocks; /* # of blocks */
291 u32 type; /* codec type, pp lib */
292 u32 entry_point;
293};
294
295struct dma_block_info {
296 enum sst_ram_type type; /* IRAM/DRAM */
297 u32 size; /* Bytes */
298 u32 ram_offset; /* Offset in I/DRAM */
299 u32 rsvd; /* Reserved field */
300};
301
302struct ioctl_pvt_data {
303 int str_id;
304 int pvt_id;
305};
306
307struct sst_ipc_msg_wq {
308 union ipc_header header;
309 char mailbox[SST_MAILBOX_SIZE];
310 struct work_struct wq;
311};
312
313struct mad_ops_wq {
314 int stream_id;
315 enum sst_controls control_op;
316 struct work_struct wq;
317
318};
319
320#define SST_MMAP_PAGES (640*1024 / PAGE_SIZE)
321#define SST_MMAP_STEP (40*1024 / PAGE_SIZE)
322
323/***
324 * struct intel_sst_drv - driver ops
325 *
326 * @pmic_state : pmic state
327 * @pmic_vendor : pmic vendor detected
328 * @sst_state : current sst device state
329 * @pci_id : PCI device id loaded
330 * @shim : SST shim pointer
331 * @mailbox : SST mailbox pointer
332 * @iram : SST IRAM pointer
333 * @dram : SST DRAM pointer
334 * @shim_phy_add : SST shim phy addr
335 * @ipc_dispatch_list : ipc messages dispatched
336 * @ipc_post_msg_wq : wq to post IPC messages context
337 * @ipc_process_msg : wq to process msgs from FW context
338 * @ipc_process_reply : wq to process reply from FW context
339 * @ipc_post_msg : wq to post reply from FW context
340 * @mad_ops : MAD driver operations registered
341 * @mad_wq : MAD driver wq
342 * @post_msg_wq : wq to post IPC messages
343 * @process_msg_wq : wq to process msgs from FW
344 * @process_reply_wq : wq to process reply from FW
345 * @streams : sst stream contexts
346 * @alloc_block : block structure for alloc
347 * @tgt_dev_blk : block structure for target device
348 * @fw_info_blk : block structure for fw info block
349 * @vol_info_blk : block structure for vol info block
350 * @mute_info_blk : block structure for mute info block
351 * @hs_info_blk : block structure for hs info block
352 * @list_lock : sst driver list lock (deprecated)
353 * @list_spin_lock : sst driver spin lock block
354 * @scard_ops : sst card ops
355 * @pci : sst pci device struture
356 * @active_streams : sst active streams
357 * @sst_lock : sst device lock
358 * @stream_lock : sst stream lock
359 * @unique_id : sst unique id
360 * @stream_cnt : total sst active stream count
361 * @pb_streams : total active pb streams
362 * @cp_streams : total active cp streams
363 * @lpe_stalled : lpe stall status
364 * @pmic_port_instance : active pmic port instance
365 * @rx_time_slot_status : active rx slot
366 * @lpaudio_start : lpaudio status
367 * @audio_start : audio status
368 * @devt_d : pointer to /dev/lpe node
369 * @devt_c : pointer to /dev/lpe_ctrl node
370 * @max_streams : max streams allowed
371 */
372struct intel_sst_drv {
373 bool pmic_state;
374 int pmic_vendor;
375 int sst_state;
376 unsigned int pci_id;
377 void __iomem *shim;
378 void __iomem *mailbox;
379 void __iomem *iram;
380 void __iomem *dram;
381 unsigned int shim_phy_add;
382 struct list_head ipc_dispatch_list;
383 struct work_struct ipc_post_msg_wq;
384 struct sst_ipc_msg_wq ipc_process_msg;
385 struct sst_ipc_msg_wq ipc_process_reply;
386 struct sst_ipc_msg_wq ipc_post_msg;
387 struct mad_ops_wq mad_ops;
388 wait_queue_head_t wait_queue;
389 struct workqueue_struct *mad_wq;
390 struct workqueue_struct *post_msg_wq;
391 struct workqueue_struct *process_msg_wq;
392 struct workqueue_struct *process_reply_wq;
393
394 struct stream_info streams[MAX_NUM_STREAMS];
395 struct stream_alloc_block alloc_block[MAX_ACTIVE_STREAM];
396 struct sst_block tgt_dev_blk, fw_info_blk, ppp_params_blk,
397 vol_info_blk, mute_info_blk, hs_info_blk;
398 struct mutex list_lock;/* mutex for IPC list locking */
399 spinlock_t list_spin_lock; /* mutex for IPC list locking */
400 struct snd_pmic_ops *scard_ops;
401 struct pci_dev *pci;
402 int active_streams[MAX_NUM_STREAMS];
403 void *mmap_mem;
404 struct mutex sst_lock;
405 struct mutex stream_lock;
406 unsigned int mmap_len;
407 unsigned int unique_id;
408 unsigned int stream_cnt; /* total streams */
409 unsigned int encoded_cnt; /* enocded streams only */
410 unsigned int am_cnt;
411 unsigned int pb_streams; /* pb streams active */
412 unsigned int cp_streams; /* cp streams active */
413 unsigned int lpe_stalled; /* LPE is stalled or not */
414 unsigned int pmic_port_instance; /*pmic port instance*/
415 int rx_time_slot_status;
416 unsigned int lpaudio_start;
417 /* 1 - LPA stream(MP3 pb) in progress*/
418 unsigned int audio_start;
419 dev_t devt_d, devt_c;
420 unsigned int max_streams;
421 unsigned int *fw_cntx;
422 unsigned int fw_cntx_size;
423
424 unsigned int fw_downloaded;
425};
426
427extern struct intel_sst_drv *sst_drv_ctx;
428
429#define CHIP_REV_REG 0xff108000
430#define CHIP_REV_ADDR 0x78
431
432/* misc definitions */
433#define FW_DWNL_ID 0xFF
434#define LOOP1 0x11111111
435#define LOOP2 0x22222222
436#define LOOP3 0x33333333
437#define LOOP4 0x44444444
438
439#define SST_DEFAULT_PMIC_PORT 1 /*audio port*/
440/* NOTE: status will have +ve for good cases and -ve for error ones */
441#define MAX_STREAM_FIELD 255
442
443int sst_alloc_stream(char *params, unsigned int stream_ops, u8 codec,
444 unsigned int session_id);
445int sst_alloc_stream_response(unsigned int str_id,
446 struct snd_sst_alloc_response *response);
447int sst_stalled(void);
448int sst_pause_stream(int id);
449int sst_resume_stream(int id);
450int sst_enable_rx_timeslot(int status);
451int sst_drop_stream(int id);
452int sst_free_stream(int id);
453int sst_start_stream(int streamID);
454int sst_play_frame(int streamID);
455int sst_pcm_play_frame(int str_id, struct sst_stream_bufs *sst_buf);
456int sst_capture_frame(int streamID);
457int sst_set_stream_param(int streamID, struct snd_sst_params *str_param);
458int sst_target_device_select(struct snd_sst_target_device *target_device);
459int sst_decode(int str_id, struct snd_sst_dbufs *dbufs);
460int sst_get_decoded_bytes(int str_id, unsigned long long *bytes);
461int sst_get_fw_info(struct snd_sst_fw_info *info);
462int sst_get_stream_params(int str_id,
463 struct snd_sst_get_stream_params *get_params);
464int sst_get_stream(struct snd_sst_params *str_param);
465int sst_get_stream_allocated(struct snd_sst_params *str_param,
466 struct snd_sst_lib_download **lib_dnld);
467int sst_drain_stream(int str_id);
468int sst_get_vol(struct snd_sst_vol *set_vol);
469int sst_set_vol(struct snd_sst_vol *set_vol);
470int sst_set_mute(struct snd_sst_mute *set_mute);
471
472
473void sst_post_message(struct work_struct *work);
474void sst_process_message(struct work_struct *work);
475void sst_process_reply(struct work_struct *work);
476void sst_process_mad_ops(struct work_struct *work);
477void sst_process_mad_jack_detection(struct work_struct *work);
478
479long intel_sst_ioctl(struct file *file_ptr, unsigned int cmd,
480 unsigned long arg);
481int intel_sst_open(struct inode *i_node, struct file *file_ptr);
482int intel_sst_open_cntrl(struct inode *i_node, struct file *file_ptr);
483int intel_sst_release(struct inode *i_node, struct file *file_ptr);
484int intel_sst_release_cntrl(struct inode *i_node, struct file *file_ptr);
485int intel_sst_read(struct file *file_ptr, char __user *buf,
486 size_t count, loff_t *ppos);
487int intel_sst_write(struct file *file_ptr, const char __user *buf,
488 size_t count, loff_t *ppos);
489int intel_sst_mmap(struct file *fp, struct vm_area_struct *vma);
490ssize_t intel_sst_aio_write(struct kiocb *kiocb, const struct iovec *iov,
491 unsigned long nr_segs, loff_t offset);
492ssize_t intel_sst_aio_read(struct kiocb *kiocb, const struct iovec *iov,
493 unsigned long nr_segs, loff_t offset);
494
495int sst_load_fw(const struct firmware *fw, void *context);
496int sst_load_library(struct snd_sst_lib_download *lib, u8 ops);
497int sst_spi_mode_enable(void);
498int sst_get_block_stream(struct intel_sst_drv *sst_drv_ctx);
499
500int sst_wait_interruptible(struct intel_sst_drv *sst_drv_ctx,
501 struct sst_block *block);
502int sst_wait_interruptible_timeout(struct intel_sst_drv *sst_drv_ctx,
503 struct sst_block *block, int timeout);
504int sst_wait_timeout(struct intel_sst_drv *sst_drv_ctx,
505 struct stream_alloc_block *block);
506int sst_create_large_msg(struct ipc_post **arg);
507int sst_create_short_msg(struct ipc_post **arg);
508void sst_wake_up_alloc_block(struct intel_sst_drv *sst_drv_ctx,
509 u8 sst_id, int status, void *data);
510void sst_clear_interrupt(void);
511int intel_sst_resume(struct pci_dev *pci);
512int sst_download_fw(void);
513void free_stream_context(unsigned int str_id);
514void sst_clean_stream(struct stream_info *stream);
515
516/*
517 * sst_fill_header - inline to fill sst header
518 *
519 * @header : ipc header
520 * @msg : IPC message to be sent
521 * @large : is ipc large msg
522 * @str_id : stream id
523 *
524 * this function is an inline function that sets the headers before
525 * sending a message
526 */
527static inline void sst_fill_header(union ipc_header *header,
528 int msg, int large, int str_id)
529{
530 header->part.msg_id = msg;
531 header->part.str_id = str_id;
532 header->part.large = large;
533 header->part.done = 0;
534 header->part.busy = 1;
535 header->part.data = 0;
536}
537
538/*
539 * sst_assign_pvt_id - assign a pvt id for stream
540 *
541 * @sst_drv_ctx : driver context
542 *
543 * this inline function assigns a private id for calls that dont have stream
544 * context yet, should be called with lock held
545 */
546static inline unsigned int sst_assign_pvt_id(struct intel_sst_drv *sst_drv_ctx)
547{
548 sst_drv_ctx->unique_id++;
549 if (sst_drv_ctx->unique_id >= MAX_NUM_STREAMS)
550 sst_drv_ctx->unique_id = 1;
551 return sst_drv_ctx->unique_id;
552}
553
554/*
555 * sst_init_stream - this function initialzes stream context
556 *
557 * @stream : stream struture
558 * @codec : codec for stream
559 * @sst_id : stream id
560 * @ops : stream operation
561 * @slot : stream pcm slot
562 * @device : device type
563 *
564 * this inline function initialzes stream context for allocated stream
565 */
566static inline void sst_init_stream(struct stream_info *stream,
567 int codec, int sst_id, int ops, u8 slot,
568 enum snd_sst_audio_device_type device)
569{
570 stream->status = STREAM_INIT;
571 stream->prev = STREAM_UN_INIT;
572 stream->codec = codec;
573 stream->sst_id = sst_id;
574 stream->str_type = 0;
575 stream->ops = ops;
576 stream->data_blk.on = false;
577 stream->data_blk.condition = false;
578 stream->data_blk.ret_code = 0;
579 stream->data_blk.data = NULL;
580 stream->ctrl_blk.on = false;
581 stream->ctrl_blk.condition = false;
582 stream->ctrl_blk.ret_code = 0;
583 stream->ctrl_blk.data = NULL;
584 stream->need_draining = false;
585 stream->decode_ibuf = NULL;
586 stream->decode_isize = 0;
587 stream->mmapped = false;
588 stream->pcm_slot = slot;
589 stream->device = device;
590}
591
592
593/*
594 * sst_validate_strid - this function validates the stream id
595 *
596 * @str_id : stream id to be validated
597 *
598 * returns 0 if valid stream
599 */
600static inline int sst_validate_strid(int str_id)
601{
602 if (str_id <= 0 || str_id > sst_drv_ctx->max_streams) {
603 pr_err("SST ERR: invalid stream id : %d MAX_STREAMS:%d\n",
604 str_id, sst_drv_ctx->max_streams);
605 return -EINVAL;
606 } else
607 return 0;
608}
609
610static inline int sst_shim_write(void __iomem *addr, int offset, int value)
611{
612
613 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
614 writel(value, addr + SST_ISRD); /*dummy*/
615 writel(value, addr + offset);
616 return 0;
617}
618
619static inline int sst_shim_read(void __iomem *addr, int offset)
620{
621 return readl(addr + offset);
622}
623#endif /* __INTEL_SST_COMMON_H__ */
diff --git a/drivers/staging/intel_sst/intel_sst_drv_interface.c b/drivers/staging/intel_sst/intel_sst_drv_interface.c
deleted file mode 100644
index 22bd29c0c439..000000000000
--- a/drivers/staging/intel_sst/intel_sst_drv_interface.c
+++ /dev/null
@@ -1,564 +0,0 @@
1/*
2 * intel_sst_interface.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com)
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 * This driver exposes the audio engine functionalities to the ALSA
25 * and middleware.
26 * Upper layer interfaces (MAD driver, MMF) to SST driver
27 */
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/fs.h>
34#include <linux/firmware.h>
35#include <linux/pm_runtime.h>
36#include <linux/export.h>
37#include "intel_sst.h"
38#include "intel_sst_ioctl.h"
39#include "intel_sst_fw_ipc.h"
40#include "intel_sst_common.h"
41
42
43/*
44 * sst_download_fw - download the audio firmware to DSP
45 *
46 * This function is called when the FW needs to be downloaded to SST DSP engine
47 */
48int sst_download_fw(void)
49{
50 int retval;
51 const struct firmware *fw_sst;
52 char name[20];
53
54 if (sst_drv_ctx->sst_state != SST_UN_INIT)
55 return -EPERM;
56
57 /* Reload firmware is not needed for MRST */
58 if ( (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) && sst_drv_ctx->fw_downloaded) {
59 pr_debug("FW already downloaded, skip for MRST platform\n");
60 sst_drv_ctx->sst_state = SST_FW_RUNNING;
61 return 0;
62 }
63
64 snprintf(name, sizeof(name), "%s%04x%s", "fw_sst_",
65 sst_drv_ctx->pci_id, ".bin");
66
67 pr_debug("Downloading %s FW now...\n", name);
68 retval = request_firmware(&fw_sst, name, &sst_drv_ctx->pci->dev);
69 if (retval) {
70 pr_err("request fw failed %d\n", retval);
71 return retval;
72 }
73 sst_drv_ctx->alloc_block[0].sst_id = FW_DWNL_ID;
74 sst_drv_ctx->alloc_block[0].ops_block.condition = false;
75 retval = sst_load_fw(fw_sst, NULL);
76 if (retval)
77 goto end_restore;
78
79 retval = sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[0]);
80 if (retval)
81 pr_err("fw download failed %d\n" , retval);
82 else
83 sst_drv_ctx->fw_downloaded = 1;
84
85end_restore:
86 release_firmware(fw_sst);
87 sst_drv_ctx->alloc_block[0].sst_id = BLOCK_UNINIT;
88 return retval;
89}
90
91
92/*
93 * sst_stalled - this function checks if the lpe is in stalled state
94 */
95int sst_stalled(void)
96{
97 int retry = 1000;
98 int retval = -1;
99
100 while (retry) {
101 if (!sst_drv_ctx->lpe_stalled)
102 return 0;
103 /*wait for time and re-check*/
104 msleep(1);
105
106 retry--;
107 }
108 pr_debug("in Stalled State\n");
109 return retval;
110}
111
112void free_stream_context(unsigned int str_id)
113{
114 struct stream_info *stream;
115
116 if (!sst_validate_strid(str_id)) {
117 /* str_id is valid, so stream is alloacted */
118 stream = &sst_drv_ctx->streams[str_id];
119 if (sst_free_stream(str_id))
120 sst_clean_stream(&sst_drv_ctx->streams[str_id]);
121 if (stream->ops == STREAM_OPS_PLAYBACK ||
122 stream->ops == STREAM_OPS_PLAYBACK_DRM) {
123 sst_drv_ctx->pb_streams--;
124 if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID)
125 sst_drv_ctx->scard_ops->power_down_pmic_pb(
126 stream->device);
127 else {
128 if (sst_drv_ctx->pb_streams == 0)
129 sst_drv_ctx->scard_ops->
130 power_down_pmic_pb(stream->device);
131 }
132 } else if (stream->ops == STREAM_OPS_CAPTURE) {
133 sst_drv_ctx->cp_streams--;
134 if (sst_drv_ctx->cp_streams == 0)
135 sst_drv_ctx->scard_ops->power_down_pmic_cp(
136 stream->device);
137 }
138 if (sst_drv_ctx->pb_streams == 0
139 && sst_drv_ctx->cp_streams == 0)
140 sst_drv_ctx->scard_ops->power_down_pmic();
141 }
142}
143
144/*
145 * sst_get_stream_allocated - this function gets a stream allocated with
146 * the given params
147 *
148 * @str_param : stream params
149 * @lib_dnld : pointer to pointer of lib downlaod struct
150 *
151 * This creates new stream id for a stream, in case lib is to be downloaded to
152 * DSP, it downloads that
153 */
154int sst_get_stream_allocated(struct snd_sst_params *str_param,
155 struct snd_sst_lib_download **lib_dnld)
156{
157 int retval, str_id;
158 struct stream_info *str_info;
159
160 retval = sst_alloc_stream((char *) &str_param->sparams, str_param->ops,
161 str_param->codec, str_param->device_type);
162 if (retval < 0) {
163 pr_err("sst_alloc_stream failed %d\n", retval);
164 return retval;
165 }
166 pr_debug("Stream allocated %d\n", retval);
167 str_id = retval;
168 str_info = &sst_drv_ctx->streams[str_id];
169 /* Block the call for reply */
170 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
171 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
172 if ((retval != 0) || (str_info->ctrl_blk.ret_code != 0)) {
173 pr_debug("FW alloc failed retval %d, ret_code %d\n",
174 retval, str_info->ctrl_blk.ret_code);
175 str_id = -str_info->ctrl_blk.ret_code; /*return error*/
176 *lib_dnld = str_info->ctrl_blk.data;
177 sst_clean_stream(str_info);
178 } else
179 pr_debug("FW Stream allocated success\n");
180 return str_id; /*will ret either error (in above if) or correct str id*/
181}
182
183/*
184 * sst_get_sfreq - this function returns the frequency of the stream
185 *
186 * @str_param : stream params
187 */
188static int sst_get_sfreq(struct snd_sst_params *str_param)
189{
190 switch (str_param->codec) {
191 case SST_CODEC_TYPE_PCM:
192 return 48000; /*str_param->sparams.uc.pcm_params.sfreq;*/
193 case SST_CODEC_TYPE_MP3:
194 return str_param->sparams.uc.mp3_params.sfreq;
195 case SST_CODEC_TYPE_AAC:
196 return str_param->sparams.uc.aac_params.sfreq;
197 case SST_CODEC_TYPE_WMA9:
198 return str_param->sparams.uc.wma_params.sfreq;
199 default:
200 return 0;
201 }
202}
203
204/*
205 * sst_get_stream - this function prepares for stream allocation
206 *
207 * @str_param : stream param
208 */
209int sst_get_stream(struct snd_sst_params *str_param)
210{
211 int i, retval;
212 struct stream_info *str_info;
213 struct snd_sst_lib_download *lib_dnld;
214
215 /* stream is not allocated, we are allocating */
216 retval = sst_get_stream_allocated(str_param, &lib_dnld);
217 if (retval == -(SST_LIB_ERR_LIB_DNLD_REQUIRED)) {
218 /* codec download is required */
219 struct snd_sst_alloc_response *response;
220
221 pr_debug("Codec is required.... trying that\n");
222 if (lib_dnld == NULL) {
223 pr_err("lib download null!!! abort\n");
224 return -EIO;
225 }
226 i = sst_get_block_stream(sst_drv_ctx);
227 response = sst_drv_ctx->alloc_block[i].ops_block.data;
228 pr_debug("alloc block allocated = %d\n", i);
229 if (i < 0) {
230 kfree(lib_dnld);
231 return -ENOMEM;
232 }
233 retval = sst_load_library(lib_dnld, str_param->ops);
234 kfree(lib_dnld);
235
236 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
237 if (!retval) {
238 pr_debug("codec was downloaded successfully\n");
239
240 retval = sst_get_stream_allocated(str_param, &lib_dnld);
241 if (retval <= 0)
242 goto err;
243
244 pr_debug("Alloc done stream id %d\n", retval);
245 } else {
246 pr_debug("codec download failed\n");
247 retval = -EIO;
248 goto err;
249 }
250 } else if (retval <= 0)
251 goto err;
252 /*else
253 set_port_params(str_param, str_param->ops);*/
254
255 /* store sampling freq */
256 str_info = &sst_drv_ctx->streams[retval];
257 str_info->sfreq = sst_get_sfreq(str_param);
258
259 /* power on the analog, if reqd */
260 if (str_param->ops == STREAM_OPS_PLAYBACK ||
261 str_param->ops == STREAM_OPS_PLAYBACK_DRM) {
262 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
263 sst_drv_ctx->scard_ops->power_up_pmic_pb(
264 sst_drv_ctx->pmic_port_instance);
265 else
266 sst_drv_ctx->scard_ops->power_up_pmic_pb(
267 str_info->device);
268 /*Only if the playback is MP3 - Send a message*/
269 sst_drv_ctx->pb_streams++;
270 } else if (str_param->ops == STREAM_OPS_CAPTURE) {
271
272 sst_drv_ctx->scard_ops->power_up_pmic_cp(
273 sst_drv_ctx->pmic_port_instance);
274 /*Send a messageif not sent already*/
275 sst_drv_ctx->cp_streams++;
276 }
277
278err:
279 return retval;
280}
281
282void sst_process_mad_ops(struct work_struct *work)
283{
284
285 struct mad_ops_wq *mad_ops =
286 container_of(work, struct mad_ops_wq, wq);
287 int retval = 0;
288
289 switch (mad_ops->control_op) {
290 case SST_SND_PAUSE:
291 retval = sst_pause_stream(mad_ops->stream_id);
292 break;
293 case SST_SND_RESUME:
294 retval = sst_resume_stream(mad_ops->stream_id);
295 break;
296 case SST_SND_DROP:
297 retval = sst_drop_stream(mad_ops->stream_id);
298 break;
299 case SST_SND_START:
300 pr_debug("SST Debug: start stream\n");
301 retval = sst_start_stream(mad_ops->stream_id);
302 break;
303 case SST_SND_STREAM_PROCESS:
304 pr_debug("play/capt frames...\n");
305 break;
306 default:
307 pr_err(" wrong control_ops reported\n");
308 }
309 return;
310}
311
312void send_intial_rx_timeslot(void)
313{
314 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID &&
315 sst_drv_ctx->rx_time_slot_status != RX_TIMESLOT_UNINIT
316 && sst_drv_ctx->pmic_vendor != SND_NC)
317 sst_enable_rx_timeslot(sst_drv_ctx->rx_time_slot_status);
318}
319
320/*
321 * sst_open_pcm_stream - Open PCM interface
322 *
323 * @str_param: parameters of pcm stream
324 *
325 * This function is called by MID sound card driver to open
326 * a new pcm interface
327 */
328int sst_open_pcm_stream(struct snd_sst_params *str_param)
329{
330 struct stream_info *str_info;
331 int retval;
332
333 pm_runtime_get_sync(&sst_drv_ctx->pci->dev);
334
335 if (sst_drv_ctx->sst_state == SST_SUSPENDED) {
336 /* LPE is suspended, resume it before proceeding*/
337 pr_debug("Resuming from Suspended state\n");
338 retval = intel_sst_resume(sst_drv_ctx->pci);
339 if (retval) {
340 pr_err("Resume Failed = %#x, abort\n", retval);
341 pm_runtime_put(&sst_drv_ctx->pci->dev);
342 return retval;
343 }
344 }
345 if (sst_drv_ctx->sst_state == SST_UN_INIT) {
346 /* FW is not downloaded */
347 pr_debug("DSP Downloading FW now...\n");
348 retval = sst_download_fw();
349 if (retval) {
350 pr_err("FW download fail %x, abort\n", retval);
351 pm_runtime_put(&sst_drv_ctx->pci->dev);
352 return retval;
353 }
354 send_intial_rx_timeslot();
355 }
356
357 if (!str_param) {
358 pm_runtime_put(&sst_drv_ctx->pci->dev);
359 return -EINVAL;
360 }
361
362 retval = sst_get_stream(str_param);
363 if (retval > 0) {
364 sst_drv_ctx->stream_cnt++;
365 str_info = &sst_drv_ctx->streams[retval];
366 str_info->src = MAD_DRV;
367 } else
368 pm_runtime_put(&sst_drv_ctx->pci->dev);
369
370 return retval;
371}
372
373/*
374 * sst_close_pcm_stream - Close PCM interface
375 *
376 * @str_id: stream id to be closed
377 *
378 * This function is called by MID sound card driver to close
379 * an existing pcm interface
380 */
381int sst_close_pcm_stream(unsigned int str_id)
382{
383 struct stream_info *stream;
384
385 pr_debug("sst: stream free called\n");
386 if (sst_validate_strid(str_id))
387 return -EINVAL;
388 stream = &sst_drv_ctx->streams[str_id];
389 free_stream_context(str_id);
390 stream->pcm_substream = NULL;
391 stream->status = STREAM_UN_INIT;
392 stream->period_elapsed = NULL;
393 sst_drv_ctx->stream_cnt--;
394 pr_debug("sst: will call runtime put now\n");
395 pm_runtime_put(&sst_drv_ctx->pci->dev);
396 return 0;
397}
398
399/*
400 * sst_device_control - Set Control params
401 *
402 * @cmd: control cmd to be set
403 * @arg: command argument
404 *
405 * This function is called by MID sound card driver to set
406 * SST/Sound card controls for an opened stream.
407 * This is registered with MID driver
408 */
409int sst_device_control(int cmd, void *arg)
410{
411 int retval = 0, str_id = 0;
412
413 switch (cmd) {
414 case SST_SND_PAUSE:
415 case SST_SND_RESUME:
416 case SST_SND_DROP:
417 case SST_SND_START:
418 sst_drv_ctx->mad_ops.control_op = cmd;
419 sst_drv_ctx->mad_ops.stream_id = *(int *)arg;
420 queue_work(sst_drv_ctx->mad_wq, &sst_drv_ctx->mad_ops.wq);
421 break;
422
423 case SST_SND_STREAM_INIT: {
424 struct pcm_stream_info *str_info;
425 struct stream_info *stream;
426
427 pr_debug("stream init called\n");
428 str_info = (struct pcm_stream_info *)arg;
429 str_id = str_info->str_id;
430 retval = sst_validate_strid(str_id);
431 if (retval)
432 break;
433
434 stream = &sst_drv_ctx->streams[str_id];
435 pr_debug("setting the period ptrs\n");
436 stream->pcm_substream = str_info->mad_substream;
437 stream->period_elapsed = str_info->period_elapsed;
438 stream->sfreq = str_info->sfreq;
439 stream->prev = stream->status;
440 stream->status = STREAM_INIT;
441 break;
442 }
443
444 case SST_SND_BUFFER_POINTER: {
445 struct pcm_stream_info *stream_info;
446 struct snd_sst_tstamp fw_tstamp = {0,};
447 struct stream_info *stream;
448
449
450 stream_info = (struct pcm_stream_info *)arg;
451 str_id = stream_info->str_id;
452 retval = sst_validate_strid(str_id);
453 if (retval)
454 break;
455 stream = &sst_drv_ctx->streams[str_id];
456
457 if (!stream->pcm_substream)
458 break;
459 memcpy_fromio(&fw_tstamp,
460 ((void *)(sst_drv_ctx->mailbox + SST_TIME_STAMP)
461 +(str_id * sizeof(fw_tstamp))),
462 sizeof(fw_tstamp));
463
464 pr_debug("Pointer Query on strid = %d ops %d\n",
465 str_id, stream->ops);
466
467 if (stream->ops == STREAM_OPS_PLAYBACK)
468 stream_info->buffer_ptr = fw_tstamp.samples_rendered;
469 else
470 stream_info->buffer_ptr = fw_tstamp.samples_processed;
471 pr_debug("Samples rendered = %llu, buffer ptr %llu\n",
472 fw_tstamp.samples_rendered, stream_info->buffer_ptr);
473 break;
474 }
475 case SST_ENABLE_RX_TIME_SLOT: {
476 int status = *(int *)arg;
477 sst_drv_ctx->rx_time_slot_status = status ;
478 sst_enable_rx_timeslot(status);
479 break;
480 }
481 default:
482 /* Illegal case */
483 pr_warn("illegal req\n");
484 return -EINVAL;
485 }
486
487 return retval;
488}
489
490
491struct intel_sst_pcm_control pcm_ops = {
492 .open = sst_open_pcm_stream,
493 .device_control = sst_device_control,
494 .close = sst_close_pcm_stream,
495};
496
497struct intel_sst_card_ops sst_pmic_ops = {
498 .pcm_control = &pcm_ops,
499};
500
501/*
502 * register_sst_card - function for sound card to register
503 *
504 * @card: pointer to structure of operations
505 *
506 * This function is called card driver loads and is ready for registration
507 */
508int register_sst_card(struct intel_sst_card_ops *card)
509{
510 if (!sst_drv_ctx) {
511 pr_err("No SST driver register card reject\n");
512 return -ENODEV;
513 }
514
515 if (!card || !card->module_name) {
516 pr_err("Null Pointer Passed\n");
517 return -EINVAL;
518 }
519 if (sst_drv_ctx->pmic_state == SND_MAD_UN_INIT) {
520 /* register this driver */
521 if ((strncmp(SST_CARD_NAMES, card->module_name,
522 strlen(SST_CARD_NAMES))) == 0) {
523 sst_drv_ctx->pmic_vendor = card->vendor_id;
524 sst_drv_ctx->scard_ops = card->scard_ops;
525 sst_pmic_ops.module_name = card->module_name;
526 sst_drv_ctx->pmic_state = SND_MAD_INIT_DONE;
527 sst_drv_ctx->rx_time_slot_status = 0; /*default AMIC*/
528 card->pcm_control = sst_pmic_ops.pcm_control;
529 return 0;
530 } else {
531 pr_err("strcmp fail %s\n", card->module_name);
532 return -EINVAL;
533 }
534
535 } else {
536 /* already registered a driver */
537 pr_err("Repeat for registration..denied\n");
538 return -EBADRQC;
539 }
540 /* The ASoC code doesn't set scard_ops */
541 if (sst_drv_ctx->scard_ops)
542 sst_drv_ctx->scard_ops->card_status = SND_CARD_UN_INIT;
543 return 0;
544}
545EXPORT_SYMBOL_GPL(register_sst_card);
546
547/*
548 * unregister_sst_card- function for sound card to un-register
549 *
550 * @card: pointer to structure of operations
551 *
552 * This function is called when card driver unloads
553 */
554void unregister_sst_card(struct intel_sst_card_ops *card)
555{
556 if (sst_pmic_ops.pcm_control == card->pcm_control) {
557 /* unreg */
558 sst_pmic_ops.module_name = "";
559 sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
560 pr_debug("Unregistered %s\n", card->module_name);
561 }
562 return;
563}
564EXPORT_SYMBOL_GPL(unregister_sst_card);
diff --git a/drivers/staging/intel_sst/intel_sst_dsp.c b/drivers/staging/intel_sst/intel_sst_dsp.c
deleted file mode 100644
index 426d2b92073a..000000000000
--- a/drivers/staging/intel_sst/intel_sst_dsp.c
+++ /dev/null
@@ -1,496 +0,0 @@
1/*
2 * intel_sst_dsp.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This driver exposes the audio engine functionalities to the ALSA
27 * and middleware.
28 *
29 * This file contains all dsp controlling functions like firmware download,
30 * setting/resetting dsp cores, etc
31 */
32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35#include <linux/pci.h>
36#include <linux/fs.h>
37#include <linux/firmware.h>
38#include "intel_sst.h"
39#include "intel_sst_ioctl.h"
40#include "intel_sst_fw_ipc.h"
41#include "intel_sst_common.h"
42
43
44/**
45 * intel_sst_reset_dsp_mrst - Resetting SST DSP
46 *
47 * This resets DSP in case of MRST platfroms
48 */
49static int intel_sst_reset_dsp_mrst(void)
50{
51 union config_status_reg csr;
52
53 pr_debug("Resetting the DSP in mrst\n");
54 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
55 csr.full |= 0x382;
56 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
57 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
58 csr.part.strb_cntr_rst = 0;
59 csr.part.run_stall = 0x1;
60 csr.part.bypass = 0x7;
61 csr.part.sst_reset = 0x1;
62 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
63 return 0;
64}
65
66/**
67 * intel_sst_reset_dsp_medfield - Resetting SST DSP
68 *
69 * This resets DSP in case of Medfield platfroms
70 */
71static int intel_sst_reset_dsp_medfield(void)
72{
73 union config_status_reg csr;
74
75 pr_debug("Resetting the DSP in medfield\n");
76 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
77 csr.full |= 0x382;
78 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
79
80 return 0;
81}
82
83/**
84 * sst_start_mrst - Start the SST DSP processor
85 *
86 * This starts the DSP in MRST platfroms
87 */
88static int sst_start_mrst(void)
89{
90 union config_status_reg csr;
91
92 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
93 csr.part.bypass = 0;
94 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
95 csr.part.run_stall = 0;
96 csr.part.sst_reset = 0;
97 csr.part.strb_cntr_rst = 1;
98 pr_debug("Setting SST to execute_mrst 0x%x\n", csr.full);
99 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
100
101 return 0;
102}
103
104/**
105 * sst_start_medfield - Start the SST DSP processor
106 *
107 * This starts the DSP in Medfield platfroms
108 */
109static int sst_start_medfield(void)
110{
111 union config_status_reg csr;
112
113 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
114 csr.part.bypass = 0;
115 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
116 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
117 csr.part.mfld_strb = 1;
118 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
119 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
120 csr.part.run_stall = 0;
121 csr.part.sst_reset = 0;
122 pr_debug("Starting the DSP_medfld %x\n", csr.full);
123 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
124 pr_debug("Starting the DSP_medfld\n");
125
126 return 0;
127}
128
129/**
130 * sst_parse_module - Parse audio FW modules
131 *
132 * @module: FW module header
133 *
134 * Parses modules that need to be placed in SST IRAM and DRAM
135 * returns error or 0 if module sizes are proper
136 */
137static int sst_parse_module(struct fw_module_header *module)
138{
139 struct dma_block_info *block;
140 u32 count;
141 void __iomem *ram;
142
143 pr_debug("module sign %s size %x blocks %x type %x\n",
144 module->signature, module->mod_size,
145 module->blocks, module->type);
146 pr_debug("module entrypoint 0x%x\n", module->entry_point);
147
148 block = (void *)module + sizeof(*module);
149
150 for (count = 0; count < module->blocks; count++) {
151 if (block->size <= 0) {
152 pr_err("block size invalid\n");
153 return -EINVAL;
154 }
155 switch (block->type) {
156 case SST_IRAM:
157 ram = sst_drv_ctx->iram;
158 break;
159 case SST_DRAM:
160 ram = sst_drv_ctx->dram;
161 break;
162 default:
163 pr_err("wrong ram type0x%x in block0x%x\n",
164 block->type, count);
165 return -EINVAL;
166 }
167 memcpy_toio(ram + block->ram_offset,
168 (void *)block + sizeof(*block), block->size);
169 block = (void *)block + sizeof(*block) + block->size;
170 }
171 return 0;
172}
173
174/**
175 * sst_parse_fw_image - parse and load FW
176 *
177 * @sst_fw: pointer to audio fw
178 *
179 * This function is called to parse and download the FW image
180 */
181static int sst_parse_fw_image(const struct firmware *sst_fw)
182{
183 struct fw_header *header;
184 u32 count;
185 int ret_val;
186 struct fw_module_header *module;
187
188 BUG_ON(!sst_fw);
189
190 /* Read the header information from the data pointer */
191 header = (struct fw_header *)sst_fw->data;
192
193 /* verify FW */
194 if ((strncmp(header->signature, SST_FW_SIGN, 4) != 0) ||
195 (sst_fw->size != header->file_size + sizeof(*header))) {
196 /* Invalid FW signature */
197 pr_err("Invalid FW sign/filesize mismatch\n");
198 return -EINVAL;
199 }
200 pr_debug("header sign=%s size=%x modules=%x fmt=%x size=%x\n",
201 header->signature, header->file_size, header->modules,
202 header->file_format, sizeof(*header));
203 module = (void *)sst_fw->data + sizeof(*header);
204 for (count = 0; count < header->modules; count++) {
205 /* module */
206 ret_val = sst_parse_module(module);
207 if (ret_val)
208 return ret_val;
209 module = (void *)module + sizeof(*module) + module->mod_size ;
210 }
211
212 return 0;
213}
214
215/**
216 * sst_load_fw - function to load FW into DSP
217 *
218 * @fw: Pointer to driver loaded FW
219 * @context: driver context
220 *
221 * This function is called by OS when the FW is loaded into kernel
222 */
223int sst_load_fw(const struct firmware *fw, void *context)
224{
225 int ret_val;
226
227 pr_debug("load_fw called\n");
228 BUG_ON(!fw);
229
230 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
231 ret_val = intel_sst_reset_dsp_mrst();
232 else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID)
233 ret_val = intel_sst_reset_dsp_medfield();
234 if (ret_val)
235 return ret_val;
236
237 ret_val = sst_parse_fw_image(fw);
238 if (ret_val)
239 return ret_val;
240 mutex_lock(&sst_drv_ctx->sst_lock);
241 sst_drv_ctx->sst_state = SST_FW_LOADED;
242 mutex_unlock(&sst_drv_ctx->sst_lock);
243 /* 7. ask scu to reset the bypass bits */
244 /* 8.bring sst out of reset */
245 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
246 ret_val = sst_start_mrst();
247 else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID)
248 ret_val = sst_start_medfield();
249 if (ret_val)
250 return ret_val;
251
252 pr_debug("fw loaded successful!!!\n");
253 return ret_val;
254}
255
256/*This function is called when any codec/post processing library
257 needs to be downloaded*/
258static int sst_download_library(const struct firmware *fw_lib,
259 struct snd_sst_lib_download_info *lib)
260{
261 /* send IPC message and wait */
262 int i;
263 u8 pvt_id;
264 struct ipc_post *msg = NULL;
265 union config_status_reg csr;
266 struct snd_sst_str_type str_type = {0};
267 int retval = 0;
268
269 if (sst_create_large_msg(&msg))
270 return -ENOMEM;
271
272 pvt_id = sst_assign_pvt_id(sst_drv_ctx);
273 i = sst_get_block_stream(sst_drv_ctx);
274 pr_debug("alloc block allocated = %d, pvt_id %d\n", i, pvt_id);
275 if (i < 0) {
276 kfree(msg);
277 return -ENOMEM;
278 }
279 sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
280 sst_fill_header(&msg->header, IPC_IA_PREP_LIB_DNLD, 1, pvt_id);
281 msg->header.part.data = sizeof(u32) + sizeof(str_type);
282 str_type.codec_type = lib->dload_lib.lib_info.lib_type;
283 /*str_type.pvt_id = pvt_id;*/
284 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
285 memcpy(msg->mailbox_data + sizeof(u32), &str_type, sizeof(str_type));
286 spin_lock(&sst_drv_ctx->list_spin_lock);
287 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
288 spin_unlock(&sst_drv_ctx->list_spin_lock);
289 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
290 retval = sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]);
291 if (retval) {
292 /* error */
293 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
294 pr_err("Prep codec downloaded failed %d\n",
295 retval);
296 return -EIO;
297 }
298 pr_debug("FW responded, ready for download now...\n");
299 /* downloading on success */
300 mutex_lock(&sst_drv_ctx->sst_lock);
301 sst_drv_ctx->sst_state = SST_FW_LOADED;
302 mutex_unlock(&sst_drv_ctx->sst_lock);
303 csr.full = readl(sst_drv_ctx->shim + SST_CSR);
304 csr.part.run_stall = 1;
305 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
306
307 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
308 csr.part.bypass = 0x7;
309 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
310
311 sst_parse_fw_image(fw_lib);
312
313 /* set the FW to running again */
314 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
315 csr.part.bypass = 0x0;
316 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
317
318 csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
319 csr.part.run_stall = 0;
320 sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
321
322 /* send download complete and wait */
323 if (sst_create_large_msg(&msg)) {
324 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
325 return -ENOMEM;
326 }
327
328 sst_fill_header(&msg->header, IPC_IA_LIB_DNLD_CMPLT, 1, pvt_id);
329 sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
330 msg->header.part.data = sizeof(u32) + sizeof(*lib);
331 lib->pvt_id = pvt_id;
332 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
333 memcpy(msg->mailbox_data + sizeof(u32), lib, sizeof(*lib));
334 spin_lock(&sst_drv_ctx->list_spin_lock);
335 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
336 spin_unlock(&sst_drv_ctx->list_spin_lock);
337 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
338 pr_debug("Waiting for FW response Download complete\n");
339 sst_drv_ctx->alloc_block[i].ops_block.condition = false;
340 retval = sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]);
341 if (retval) {
342 /* error */
343 mutex_lock(&sst_drv_ctx->sst_lock);
344 sst_drv_ctx->sst_state = SST_UN_INIT;
345 mutex_unlock(&sst_drv_ctx->sst_lock);
346 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
347 return -EIO;
348 }
349
350 pr_debug("FW success on Download complete\n");
351 sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
352 mutex_lock(&sst_drv_ctx->sst_lock);
353 sst_drv_ctx->sst_state = SST_FW_RUNNING;
354 mutex_unlock(&sst_drv_ctx->sst_lock);
355 return 0;
356
357}
358
359/* This function is called before downloading the codec/postprocessing
360library is set for download to SST DSP*/
361static int sst_validate_library(const struct firmware *fw_lib,
362 struct lib_slot_info *slot,
363 u32 *entry_point)
364{
365 struct fw_header *header;
366 struct fw_module_header *module;
367 struct dma_block_info *block;
368 unsigned int n_blk, isize = 0, dsize = 0;
369 int err = 0;
370
371 header = (struct fw_header *)fw_lib->data;
372 if (header->modules != 1) {
373 pr_err("Module no mismatch found\n");
374 err = -EINVAL;
375 goto exit;
376 }
377 module = (void *)fw_lib->data + sizeof(*header);
378 *entry_point = module->entry_point;
379 pr_debug("Module entry point 0x%x\n", *entry_point);
380 pr_debug("Module Sign %s, Size 0x%x, Blocks 0x%x Type 0x%x\n",
381 module->signature, module->mod_size,
382 module->blocks, module->type);
383
384 block = (void *)module + sizeof(*module);
385 for (n_blk = 0; n_blk < module->blocks; n_blk++) {
386 switch (block->type) {
387 case SST_IRAM:
388 isize += block->size;
389 break;
390 case SST_DRAM:
391 dsize += block->size;
392 break;
393 default:
394 pr_err("Invalid block type for 0x%x\n", n_blk);
395 err = -EINVAL;
396 goto exit;
397 }
398 block = (void *)block + sizeof(*block) + block->size;
399 }
400 if (isize > slot->iram_size || dsize > slot->dram_size) {
401 pr_err("library exceeds size allocated\n");
402 err = -EINVAL;
403 goto exit;
404 } else
405 pr_debug("Library is safe for download...\n");
406
407 pr_debug("iram 0x%x, dram 0x%x, iram 0x%x, dram 0x%x\n",
408 isize, dsize, slot->iram_size, slot->dram_size);
409exit:
410 return err;
411
412}
413
414/* This function is called when FW requests for a particular library download
415This function prepares the library to download*/
416int sst_load_library(struct snd_sst_lib_download *lib, u8 ops)
417{
418 char buf[20];
419 const char *type, *dir;
420 int len = 0, error = 0;
421 u32 entry_point;
422 const struct firmware *fw_lib;
423 struct snd_sst_lib_download_info dload_info = {{{0},},};
424
425 memset(buf, 0, sizeof(buf));
426
427 pr_debug("Lib Type 0x%x, Slot 0x%x, ops 0x%x\n",
428 lib->lib_info.lib_type, lib->slot_info.slot_num, ops);
429 pr_debug("Version 0x%x, name %s, caps 0x%x media type 0x%x\n",
430 lib->lib_info.lib_version, lib->lib_info.lib_name,
431 lib->lib_info.lib_caps, lib->lib_info.media_type);
432
433 pr_debug("IRAM Size 0x%x, offset 0x%x\n",
434 lib->slot_info.iram_size, lib->slot_info.iram_offset);
435 pr_debug("DRAM Size 0x%x, offset 0x%x\n",
436 lib->slot_info.dram_size, lib->slot_info.dram_offset);
437
438 switch (lib->lib_info.lib_type) {
439 case SST_CODEC_TYPE_MP3:
440 type = "mp3_";
441 break;
442 case SST_CODEC_TYPE_AAC:
443 type = "aac_";
444 break;
445 case SST_CODEC_TYPE_AACP:
446 type = "aac_v1_";
447 break;
448 case SST_CODEC_TYPE_eAACP:
449 type = "aac_v2_";
450 break;
451 case SST_CODEC_TYPE_WMA9:
452 type = "wma9_";
453 break;
454 default:
455 pr_err("Invalid codec type\n");
456 error = -EINVAL;
457 goto wake;
458 }
459
460 if (ops == STREAM_OPS_CAPTURE)
461 dir = "enc_";
462 else
463 dir = "dec_";
464 len = strlen(type) + strlen(dir);
465 strncpy(buf, type, sizeof(buf)-1);
466 strncpy(buf + strlen(type), dir, sizeof(buf)-strlen(type)-1);
467 len += snprintf(buf + len, sizeof(buf) - len, "%d",
468 lib->slot_info.slot_num);
469 len += snprintf(buf + len, sizeof(buf) - len, ".bin");
470
471 pr_debug("Requesting %s\n", buf);
472
473 error = request_firmware(&fw_lib, buf, &sst_drv_ctx->pci->dev);
474 if (error) {
475 pr_err("library load failed %d\n", error);
476 goto wake;
477 }
478 error = sst_validate_library(fw_lib, &lib->slot_info, &entry_point);
479 if (error)
480 goto wake_free;
481
482 lib->mod_entry_pt = entry_point;
483 memcpy(&dload_info.dload_lib, lib, sizeof(*lib));
484 error = sst_download_library(fw_lib, &dload_info);
485 if (error)
486 goto wake_free;
487
488 /* lib is downloaded and init send alloc again */
489 pr_debug("Library is downloaded now...\n");
490wake_free:
491 /* sst_wake_up_alloc_block(sst_drv_ctx, pvt_id, error, NULL); */
492 release_firmware(fw_lib);
493wake:
494 return error;
495}
496
diff --git a/drivers/staging/intel_sst/intel_sst_fw_ipc.h b/drivers/staging/intel_sst/intel_sst_fw_ipc.h
deleted file mode 100644
index 5d0cc56aaef9..000000000000
--- a/drivers/staging/intel_sst/intel_sst_fw_ipc.h
+++ /dev/null
@@ -1,416 +0,0 @@
1#ifndef __INTEL_SST_FW_IPC_H__
2#define __INTEL_SST_FW_IPC_H__
3/*
4* intel_sst_fw_ipc.h - Intel SST Driver for audio engine
5*
6* Copyright (C) 2008-10 Intel Corporation
7* Author: Vinod Koul <vinod.koul@intel.com>
8* Harsha Priya <priya.harsha@intel.com>
9* Dharageswari R <dharageswari.r@intel.com>
10* KP Jeeja <jeeja.kp@intel.com>
11* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12*
13* This program is free software; you can redistribute it and/or modify
14* it under the terms of the GNU General Public License as published by
15* the Free Software Foundation; version 2 of the License.
16*
17* This program is distributed in the hope that it will be useful, but
18* WITHOUT ANY WARRANTY; without even the implied warranty of
19* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20* General Public License for more details.
21*
22* You should have received a copy of the GNU General Public License along
23* with this program; if not, write to the Free Software Foundation, Inc.,
24* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25*
26* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27*
28* This driver exposes the audio engine functionalities to the ALSA
29* and middleware.
30* This file has definitions shared between the firmware and driver
31*/
32
33#define MAX_NUM_STREAMS_MRST 3
34#define MAX_NUM_STREAMS_MFLD 6
35#define MAX_NUM_STREAMS 6
36#define MAX_DBG_RW_BYTES 80
37#define MAX_NUM_SCATTER_BUFFERS 8
38#define MAX_LOOP_BACK_DWORDS 8
39/* IPC base address and mailbox, timestamp offsets */
40#define SST_MAILBOX_SIZE 0x0400
41#define SST_MAILBOX_SEND 0x0000
42#define SST_MAILBOX_RCV 0x0804
43#define SST_TIME_STAMP 0x1800
44#define SST_RESERVED_OFFSET 0x1A00
45#define SST_CHEKPOINT_OFFSET 0x1C00
46#define REPLY_MSG 0x80
47
48/* Message ID's for IPC messages */
49/* Bits B7: SST or IA/SC ; B6-B4: Msg Category; B3-B0: Msg Type */
50
51/* I2L Firmware/Codec Download msgs */
52#define IPC_IA_PREP_LIB_DNLD 0x01
53#define IPC_IA_LIB_DNLD_CMPLT 0x02
54
55#define IPC_IA_SET_PMIC_TYPE 0x03
56#define IPC_IA_GET_FW_VERSION 0x04
57#define IPC_IA_GET_FW_BUILD_INF 0x05
58#define IPC_IA_GET_FW_INFO 0x06
59#define IPC_IA_GET_FW_CTXT 0x07
60#define IPC_IA_SET_FW_CTXT 0x08
61
62/* I2L Codec Config/control msgs */
63#define IPC_IA_SET_CODEC_PARAMS 0x10
64#define IPC_IA_GET_CODEC_PARAMS 0x11
65#define IPC_IA_SET_PPP_PARAMS 0x12
66#define IPC_IA_GET_PPP_PARAMS 0x13
67#define IPC_IA_PLAY_FRAMES 0x14
68#define IPC_IA_CAPT_FRAMES 0x15
69#define IPC_IA_PLAY_VOICE 0x16
70#define IPC_IA_CAPT_VOICE 0x17
71#define IPC_IA_DECODE_FRAMES 0x18
72
73#define IPC_IA_ALG_PARAMS 0x1A
74#define IPC_IA_TUNING_PARAMS 0x1B
75
76/* I2L Stream config/control msgs */
77#define IPC_IA_ALLOC_STREAM 0x20 /* Allocate a stream ID */
78#define IPC_IA_FREE_STREAM 0x21 /* Free the stream ID */
79#define IPC_IA_SET_STREAM_PARAMS 0x22
80#define IPC_IA_GET_STREAM_PARAMS 0x23
81#define IPC_IA_PAUSE_STREAM 0x24
82#define IPC_IA_RESUME_STREAM 0x25
83#define IPC_IA_DROP_STREAM 0x26
84#define IPC_IA_DRAIN_STREAM 0x27 /* Short msg with str_id */
85#define IPC_IA_TARGET_DEV_SELECT 0x28
86#define IPC_IA_CONTROL_ROUTING 0x29
87
88#define IPC_IA_SET_STREAM_VOL 0x2A /*Vol for stream, pre mixer */
89#define IPC_IA_GET_STREAM_VOL 0x2B
90#define IPC_IA_SET_STREAM_MUTE 0x2C
91#define IPC_IA_GET_STREAM_MUTE 0x2D
92#define IPC_IA_ENABLE_RX_TIME_SLOT 0x2E /* Enable Rx time slot 0 or 1 */
93
94#define IPC_IA_START_STREAM 0x30 /* Short msg with str_id */
95
96/* Debug msgs */
97#define IPC_IA_DBG_MEM_READ 0x40
98#define IPC_IA_DBG_MEM_WRITE 0x41
99#define IPC_IA_DBG_LOOP_BACK 0x42
100
101/* L2I Firmware/Codec Download msgs */
102#define IPC_IA_FW_INIT_CMPLT 0x81
103#define IPC_IA_LPE_GETTING_STALLED 0x82
104#define IPC_IA_LPE_UNSTALLED 0x83
105
106/* L2I Codec Config/control msgs */
107#define IPC_SST_GET_PLAY_FRAMES 0x90 /* Request IA more data */
108#define IPC_SST_GET_CAPT_FRAMES 0x91 /* Request IA more data */
109#define IPC_SST_BUF_UNDER_RUN 0x92 /* PB Under run and stopped */
110#define IPC_SST_BUF_OVER_RUN 0x93 /* CAP Under run and stopped */
111#define IPC_SST_DRAIN_END 0x94 /* PB Drain complete and stopped */
112#define IPC_SST_CHNGE_SSP_PARAMS 0x95 /* PB SSP parameters changed */
113#define IPC_SST_STREAM_PROCESS_FATAL_ERR 0x96/* error in processing a stream */
114#define IPC_SST_PERIOD_ELAPSED 0x97 /* period elapsed */
115#define IPC_IA_TARGET_DEV_CHNGD 0x98 /* error in processing a stream */
116
117#define IPC_SST_ERROR_EVENT 0x99 /* Buffer over run occurred */
118/* L2S messages */
119#define IPC_SC_DDR_LINK_UP 0xC0
120#define IPC_SC_DDR_LINK_DOWN 0xC1
121#define IPC_SC_SET_LPECLK_REQ 0xC2
122#define IPC_SC_SSP_BIT_BANG 0xC3
123
124/* L2I Error reporting msgs */
125#define IPC_IA_MEM_ALLOC_FAIL 0xE0
126#define IPC_IA_PROC_ERR 0xE1 /* error in processing a
127 stream can be used by playback and
128 capture modules */
129
130/* L2I Debug msgs */
131#define IPC_IA_PRINT_STRING 0xF0
132
133
134
135/* Command Response or Acknowledge message to any IPC message will have
136 * same message ID and stream ID information which is sent.
137 * There is no specific Ack message ID. The data field is used as response
138 * meaning.
139 */
140enum ackData {
141 IPC_ACK_SUCCESS = 0,
142 IPC_ACK_FAILURE
143};
144
145
146enum sst_error_codes {
147 /* Error code,response to msgId: Description */
148 /* Common error codes */
149 SST_SUCCESS = 0, /* Success */
150 SST_ERR_INVALID_STREAM_ID = 1,
151 SST_ERR_INVALID_MSG_ID = 2,
152 SST_ERR_INVALID_STREAM_OP = 3,
153 SST_ERR_INVALID_PARAMS = 4,
154 SST_ERR_INVALID_CODEC = 5,
155 SST_ERR_INVALID_MEDIA_TYPE = 6,
156 SST_ERR_STREAM_ERR = 7,
157
158 /* IPC specific error codes */
159 SST_IPC_ERR_CALL_BACK_NOT_REGD = 8,
160 SST_IPC_ERR_STREAM_NOT_ALLOCATED = 9,
161 SST_IPC_ERR_STREAM_ALLOC_FAILED = 10,
162 SST_IPC_ERR_GET_STREAM_FAILED = 11,
163 SST_ERR_MOD_NOT_AVAIL = 12,
164 SST_ERR_MOD_DNLD_RQD = 13,
165 SST_ERR_STREAM_STOPPED = 14,
166 SST_ERR_STREAM_IN_USE = 15,
167
168 /* Capture specific error codes */
169 SST_CAP_ERR_INCMPLTE_CAPTURE_MSG = 16,
170 SST_CAP_ERR_CAPTURE_FAIL = 17,
171 SST_CAP_ERR_GET_DDR_NEW_SGLIST = 18,
172 SST_CAP_ERR_UNDER_RUN = 19,
173 SST_CAP_ERR_OVERFLOW = 20,
174
175 /* Playback specific error codes*/
176 SST_PB_ERR_INCMPLTE_PLAY_MSG = 21,
177 SST_PB_ERR_PLAY_FAIL = 22,
178 SST_PB_ERR_GET_DDR_NEW_SGLIST = 23,
179
180 /* Codec manager specific error codes */
181 SST_LIB_ERR_LIB_DNLD_REQUIRED = 24,
182 SST_LIB_ERR_LIB_NOT_SUPPORTED = 25,
183
184 /* Library manager specific error codes */
185 SST_SCC_ERR_PREP_DNLD_FAILED = 26,
186 SST_SCC_ERR_LIB_DNLD_RES_FAILED = 27,
187 /* Scheduler specific error codes */
188 SST_SCH_ERR_FAIL = 28,
189
190 /* DMA specific error codes */
191 SST_DMA_ERR_NO_CHNL_AVAILABLE = 29,
192 SST_DMA_ERR_INVALID_INPUT_PARAMS = 30,
193 SST_DMA_ERR_CHNL_ALREADY_SUSPENDED = 31,
194 SST_DMA_ERR_CHNL_ALREADY_STARTED = 32,
195 SST_DMA_ERR_CHNL_NOT_ENABLED = 33,
196 SST_DMA_ERR_TRANSFER_FAILED = 34,
197
198 SST_SSP_ERR_ALREADY_ENABLED = 35,
199 SST_SSP_ERR_ALREADY_DISABLED = 36,
200 SST_SSP_ERR_NOT_INITIALIZED = 37,
201 SST_SSP_ERR_SRAM_NO_DMA_DATA = 38,
202
203 /* Other error codes */
204 SST_ERR_MOD_INIT_FAIL = 39,
205
206 /* FW init error codes */
207 SST_RDR_ERR_IO_DEV_SEL_NOT_ALLOWED = 40,
208 SST_RDR_ERR_ROUTE_ALREADY_STARTED = 41,
209 SST_RDR_ERR_IO_DEV_SEL_FAILED = 42,
210 SST_RDR_PREP_CODEC_DNLD_FAILED = 43,
211
212 /* Memory debug error codes */
213 SST_ERR_DBG_MEM_READ_FAIL = 44,
214 SST_ERR_DBG_MEM_WRITE_FAIL = 45,
215 SST_ERR_INSUFFICIENT_INPUT_SG_LIST = 46,
216 SST_ERR_INSUFFICIENT_OUTPUT_SG_LIST = 47,
217
218 SST_ERR_BUFFER_NOT_AVAILABLE = 48,
219 SST_ERR_BUFFER_NOT_ALLOCATED = 49,
220 SST_ERR_INVALID_REGION_TYPE = 50,
221 SST_ERR_NULL_PTR = 51,
222 SST_ERR_INVALID_BUFFER_SIZE = 52,
223 SST_ERR_INVALID_BUFFER_INDEX = 53,
224
225 /*IIPC specific error codes */
226 SST_IIPC_QUEUE_FULL = 54,
227 SST_IIPC_ERR_MSG_SND_FAILED = 55,
228 SST_PB_ERR_UNDERRUN_OCCURED = 56,
229 SST_RDR_INSUFFICIENT_MIXER_BUFFER = 57,
230 SST_INVALID_TIME_SLOTS = 58,
231};
232
233enum dbg_mem_data_type {
234 /* Data type of debug read/write */
235 DATA_TYPE_U32,
236 DATA_TYPE_U16,
237 DATA_TYPE_U8,
238};
239
240/* CAUTION NOTE: All IPC message body must be multiple of 32 bits.*/
241
242/* IPC Header */
243union ipc_header {
244 struct {
245 u32 msg_id:8; /* Message ID - Max 256 Message Types */
246 u32 str_id:5;
247 u32 large:1; /* Large Message if large = 1 */
248 u32 reserved:2; /* Reserved for future use */
249 u32 data:14; /* Ack/Info for msg, size of msg in Mailbox */
250 u32 done:1; /* bit 30 */
251 u32 busy:1; /* bit 31 */
252 } part;
253 u32 full;
254} __attribute__ ((packed));
255
256/* Firmware build info */
257struct sst_fw_build_info {
258 unsigned char date[16]; /* Firmware build date */
259 unsigned char time[16]; /* Firmware build time */
260} __attribute__ ((packed));
261
262struct ipc_header_fw_init {
263 struct snd_sst_fw_version fw_version;/* Firmware version details */
264 struct sst_fw_build_info build_info;
265 u16 result; /* Fw init result */
266 u8 module_id; /* Module ID in case of error */
267 u8 debug_info; /* Debug info from Module ID in case of fail */
268} __attribute__ ((packed));
269
270/* Address and size info of a frame buffer in DDR */
271struct sst_address_info {
272 u32 addr; /* Address at IA */
273 u32 size; /* Size of the buffer */
274} __attribute__ ((packed));
275
276/* Time stamp */
277struct snd_sst_tstamp {
278 u64 samples_processed;/* capture - data in DDR */
279 u64 samples_rendered;/* playback - data rendered */
280 u64 bytes_processed;/* bytes decoded or encoded */
281 u32 sampling_frequency;/* eg: 48000, 44100 */
282 u32 dma_base_address;/* DMA base address */
283 u16 dma_channel_no;/* DMA Channel used for the data transfer*/
284 u16 reserved;/* 32 bit alignment */
285};
286
287/* Frame info to play or capture */
288struct sst_frame_info {
289 u16 num_entries; /* number of entries to follow */
290 u16 rsrvd;
291 struct sst_address_info addr[MAX_NUM_SCATTER_BUFFERS];
292} __attribute__ ((packed));
293
294/* Frames info for decode */
295struct snd_sst_decode_info {
296 unsigned long long input_bytes_consumed;
297 unsigned long long output_bytes_produced;
298 struct sst_frame_info frames_in;
299 struct sst_frame_info frames_out;
300} __attribute__ ((packed));
301
302/* SST to IA print debug message*/
303struct ipc_sst_ia_print_params {
304 u32 string_size;/* Max value is 160 */
305 u8 prt_string[160];/* Null terminated Char string */
306} __attribute__ ((packed));
307
308/* Voice data message */
309struct snd_sst_voice_data {
310 u16 num_bytes;/* Number of valid voice data bytes */
311 u8 pcm_wd_size;/* 0=8 bit, 1=16 bit 2=32 bit */
312 u8 reserved;/* Reserved */
313 u8 voice_data_buf[0];/* Voice data buffer in bytes, little endian */
314} __attribute__ ((packed));
315
316/* SST to IA memory read debug message */
317struct ipc_sst_ia_dbg_mem_rw {
318 u16 num_bytes;/* Maximum of MAX_DBG_RW_BYTES */
319 u16 data_type;/* enum: dbg_mem_data_type */
320 u32 address; /* Memory address of data memory of data_type */
321 u8 rw_bytes[MAX_DBG_RW_BYTES];/* Maximum of 64 bytes can be RW */
322} __attribute__ ((packed));
323
324struct ipc_sst_ia_dbg_loop_back {
325 u16 num_dwords; /* Maximum of MAX_DBG_RW_BYTES */
326 u16 increment_val;/* Increments dwords by this value, 0- no increment */
327 u32 lpbk_dwords[MAX_LOOP_BACK_DWORDS];/* Maximum of 8 dwords loopback */
328} __attribute__ ((packed));
329
330/* Stream type params struture for Alloc stream */
331struct snd_sst_str_type {
332 u8 codec_type; /* Codec type */
333 u8 str_type; /* 1 = voice 2 = music */
334 u8 operation; /* Playback or Capture */
335 u8 protected_str; /* 0=Non DRM, 1=DRM */
336 u8 time_slots;
337 u8 reserved; /* Reserved */
338 u16 result; /* Result used for acknowledgment */
339} __attribute__ ((packed));
340
341/* Library info structure */
342struct module_info {
343 u32 lib_version;
344 u32 lib_type;/*TBD- KLOCKWORK u8 lib_type;*/
345 u32 media_type;
346 u8 lib_name[12];
347 u32 lib_caps;
348 unsigned char b_date[16]; /* Lib build date */
349 unsigned char b_time[16]; /* Lib build time */
350} __attribute__ ((packed));
351
352/* Library slot info */
353struct lib_slot_info {
354 u8 slot_num; /* 1 or 2 */
355 u8 reserved1;
356 u16 reserved2;
357 u32 iram_size; /* slot size in IRAM */
358 u32 dram_size; /* slot size in DRAM */
359 u32 iram_offset; /* starting offset of slot in IRAM */
360 u32 dram_offset; /* starting offset of slot in DRAM */
361} __attribute__ ((packed));
362
363struct snd_sst_lib_download {
364 struct module_info lib_info; /* library info type, capabilities etc */
365 struct lib_slot_info slot_info; /* slot info to be downloaded */
366 u32 mod_entry_pt;
367};
368
369struct snd_sst_lib_download_info {
370 struct snd_sst_lib_download dload_lib;
371 u16 result; /* Result used for acknowledgment */
372 u8 pvt_id; /* Private ID */
373 u8 reserved; /* for alignment */
374};
375
376/* Alloc stream params structure */
377struct snd_sst_alloc_params {
378 struct snd_sst_str_type str_type;
379 struct snd_sst_stream_params stream_params;
380};
381
382struct snd_sst_fw_get_stream_params {
383 struct snd_sst_stream_params codec_params;
384 struct snd_sst_pmic_config pcm_params;
385};
386
387/* Alloc stream response message */
388struct snd_sst_alloc_response {
389 struct snd_sst_str_type str_type; /* Stream type for allocation */
390 struct snd_sst_lib_download lib_dnld; /* Valid only for codec dnld */
391};
392
393/* Drop response */
394struct snd_sst_drop_response {
395 u32 result;
396 u32 bytes;
397};
398
399/* CSV Voice call routing structure */
400struct snd_sst_control_routing {
401 u8 control; /* 0=start, 1=Stop */
402 u8 reserved[3]; /* Reserved- for 32 bit alignment */
403};
404
405
406struct ipc_post {
407 struct list_head node;
408 union ipc_header header; /* driver specific */
409 char *mailbox_data;
410};
411
412struct snd_sst_ctxt_params {
413 u32 address; /* Physical Address in DDR where the context is stored */
414 u32 size; /* size of the context */
415};
416#endif /* __INTEL_SST_FW_IPC_H__ */
diff --git a/drivers/staging/intel_sst/intel_sst_ioctl.h b/drivers/staging/intel_sst/intel_sst_ioctl.h
deleted file mode 100644
index 5da5ee092c69..000000000000
--- a/drivers/staging/intel_sst/intel_sst_ioctl.h
+++ /dev/null
@@ -1,440 +0,0 @@
1#ifndef __INTEL_SST_IOCTL_H__
2#define __INTEL_SST_IOCTL_H__
3/*
4 * intel_sst_ioctl.h - Intel SST Driver for audio engine
5 *
6 * Copyright (C) 2008-10 Intel Corporation
7 * Authors: Vinod Koul <vinod.koul@intel.com>
8 * Harsha Priya <priya.harsha@intel.com>
9 * Dharageswari R <dharageswari.r@intel.com>
10 * KP Jeeja <jeeja.kp@intel.com>
11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; version 2 of the License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 *
28 * This file defines all sst ioctls
29 */
30
31/* codec and post/pre processing related info */
32
33#include <linux/types.h>
34
35enum sst_codec_types {
36/* AUDIO/MUSIC CODEC Type Definitions */
37 SST_CODEC_TYPE_UNKNOWN = 0,
38 SST_CODEC_TYPE_PCM, /* Pass through Audio codec */
39 SST_CODEC_TYPE_MP3,
40 SST_CODEC_TYPE_MP24,
41 SST_CODEC_TYPE_AAC,
42 SST_CODEC_TYPE_AACP,
43 SST_CODEC_TYPE_eAACP,
44 SST_CODEC_TYPE_WMA9,
45 SST_CODEC_TYPE_WMA10,
46 SST_CODEC_TYPE_WMA10P,
47 SST_CODEC_TYPE_RA,
48 SST_CODEC_TYPE_DDAC3,
49 SST_CODEC_TYPE_STEREO_TRUE_HD,
50 SST_CODEC_TYPE_STEREO_HD_PLUS,
51
52 /* VOICE CODEC Type Definitions */
53 SST_CODEC_TYPE_VOICE_PCM = 0x21, /* Pass through voice codec */
54};
55
56enum sst_algo_types {
57 SST_CODEC_SRC = 0x64,
58 SST_CODEC_MIXER = 0x65,
59 SST_CODEC_DOWN_MIXER = 0x66,
60 SST_CODEC_VOLUME_CONTROL = 0x67,
61 SST_CODEC_OEM1 = 0xC8,
62 SST_CODEC_OEM2 = 0xC9,
63};
64
65enum snd_sst_stream_ops {
66 STREAM_OPS_PLAYBACK = 0, /* Decode */
67 STREAM_OPS_CAPTURE, /* Encode */
68 STREAM_OPS_PLAYBACK_DRM, /* Play Audio/Voice */
69 STREAM_OPS_PLAYBACK_ALERT, /* Play Audio/Voice */
70 STREAM_OPS_CAPTURE_VOICE_CALL, /* CSV Voice recording */
71};
72
73enum stream_mode {
74 SST_STREAM_MODE_NONE = 0,
75 SST_STREAM_MODE_DNR = 1,
76 SST_STREAM_MODE_FNF = 2,
77 SST_STREAM_MODE_CAPTURE = 3
78};
79
80enum stream_type {
81 SST_STREAM_TYPE_NONE = 0,
82 SST_STREAM_TYPE_MUSIC = 1,
83 SST_STREAM_TYPE_NORMAL = 2,
84 SST_STREAM_TYPE_LONG_PB = 3,
85 SST_STREAM_TYPE_LOW_LATENCY = 4,
86};
87
88enum snd_sst_audio_device_type {
89 SND_SST_DEVICE_HEADSET = 1,
90 SND_SST_DEVICE_IHF,
91 SND_SST_DEVICE_VIBRA,
92 SND_SST_DEVICE_HAPTIC,
93 SND_SST_DEVICE_CAPTURE,
94};
95
96/* Firmware Version info */
97struct snd_sst_fw_version {
98 __u8 build; /* build number*/
99 __u8 minor; /* minor number*/
100 __u8 major; /* major number*/
101 __u8 type; /* build type */
102};
103
104/* Port info structure */
105struct snd_sst_port_info {
106 __u16 port_type;
107 __u16 reserved;
108};
109
110/* Mixer info structure */
111struct snd_sst_mix_info {
112 __u16 max_streams;
113 __u16 reserved;
114};
115
116/* PCM Parameters */
117struct snd_pcm_params {
118 __u16 codec; /* codec type */
119 __u8 num_chan; /* 1=Mono, 2=Stereo */
120 __u8 pcm_wd_sz; /* 16/24 - bit*/
121 __u32 reserved; /* Bitrate in bits per second */
122 __u32 sfreq; /* Sampling rate in Hz */
123 __u32 ring_buffer_size;
124 __u32 period_count; /* period elapsed in samples*/
125 __u32 ring_buffer_addr;
126};
127
128/* MP3 Music Parameters Message */
129struct snd_mp3_params {
130 __u16 codec;
131 __u8 num_chan; /* 1=Mono, 2=Stereo */
132 __u8 pcm_wd_sz; /* 16/24 - bit*/
133 __u32 brate; /* Use the hard coded value. */
134 __u32 sfreq; /* Sampling freq eg. 8000, 441000, 48000 */
135 __u8 crc_check; /* crc_check - disable (0) or enable (1) */
136 __u8 op_align; /* op align 0- 16 bit, 1- MSB, 2 LSB*/
137 __u16 reserved; /* Unused */
138};
139
140#define AAC_BIT_STREAM_ADTS 0
141#define AAC_BIT_STREAM_ADIF 1
142#define AAC_BIT_STREAM_RAW 2
143
144/* AAC Music Parameters Message */
145struct snd_aac_params {
146 __u16 codec;
147 __u8 num_chan; /* 1=Mono, 2=Stereo*/
148 __u8 pcm_wd_sz; /* 16/24 - bit*/
149 __u32 brate;
150 __u32 sfreq; /* Sampling freq eg. 8000, 441000, 48000 */
151 __u32 aac_srate; /* Plain AAC decoder operating sample rate */
152 __u8 mpg_id; /* 0=MPEG-2, 1=MPEG-4 */
153 __u8 bs_format; /* input bit stream format adts=0, adif=1, raw=2 */
154 __u8 aac_profile; /* 0=Main Profile, 1=LC profile, 3=SSR profile */
155 __u8 ext_chl; /* No.of external channels */
156 __u8 aot; /* Audio object type. 1=Main , 2=LC , 3=SSR, 4=SBR*/
157 __u8 op_align; /* output alignment 0=16 bit , 1=MSB, 2= LSB align */
158 __u8 brate_type; /* 0=CBR, 1=VBR */
159 __u8 crc_check; /* crc check 0= disable, 1=enable */
160 __s8 bit_stream_format[8]; /* input bit stream format adts/adif/raw */
161 __u8 jstereo; /* Joint stereo Flag */
162 __u8 sbr_present; /* 1 = SBR Present, 0 = SBR absent, for RAW */
163 __u8 downsample; /* 1 = Downsampling ON, 0 = Downsampling OFF */
164 __u8 num_syntc_elems; /* 1- Mono/stereo, 0 - Dual Mono, 0 - for raw */
165 __s8 syntc_id[2]; /* 0 for ID_SCE(Dula Mono), -1 for raw */
166 __s8 syntc_tag[2]; /* raw - -1 and 0 -16 for rest of the streams */
167 __u8 pce_present; /* Flag. 1- present 0 - not present, for RAW */
168 __u8 sbr_type; /* sbr_type: 0-plain aac, 1-aac-v1, 2-aac-v2 */
169 __u8 outchmode; /*0- mono, 1-stereo, 2-dual mono 3-Parametric stereo */
170 __u8 ps_present;
171};
172
173/* WMA Music Parameters Message */
174struct snd_wma_params {
175 __u16 codec;
176 __u8 num_chan; /* 1=Mono, 2=Stereo */
177 __u8 pcm_wd_sz; /* 16/24 - bit*/
178 __u32 brate; /* Use the hard coded value. */
179 __u32 sfreq; /* Sampling freq eg. 8000, 441000, 48000 */
180 __u32 channel_mask; /* Channel Mask */
181 __u16 format_tag; /* Format Tag */
182 __u16 block_align; /* packet size */
183 __u16 wma_encode_opt;/* Encoder option */
184 __u8 op_align; /* op align 0- 16 bit, 1- MSB, 2 LSB */
185 __u8 pcm_src; /* input pcm bit width */
186};
187
188/* Pre processing param structure */
189struct snd_prp_params {
190 __u32 reserved; /* No pre-processing defined yet */
191};
192
193/* Pre and post processing params structure */
194struct snd_ppp_params {
195 __u8 algo_id;/* Post/Pre processing algorithm ID */
196 __u8 str_id; /*Only 5 bits used 0 - 31 are valid*/
197 __u8 enable; /* 0= disable, 1= enable*/
198 __u8 reserved;
199 __u32 size; /*Size of parameters for all blocks*/
200 void *params;
201} __attribute__ ((packed));
202
203struct snd_sst_postproc_info {
204 __u32 src_min; /* Supported SRC Min sampling freq */
205 __u32 src_max; /* Supported SRC Max sampling freq */
206 __u8 src; /* 0=Not supported, 1=Supported */
207 __u8 bass_boost; /* 0=Not Supported, 1=Supported */
208 __u8 stereo_widening; /* 0=Not Supported, 1=Supported */
209 __u8 volume_control; /* 0=Not Supported, 1=Supported */
210 __s16 min_vol; /* Minimum value of Volume in dB */
211 __s16 max_vol; /* Maximum value of Volume in dB */
212 __u8 mute_control; /* 0=No Mute, 1=Mute */
213 __u8 reserved1;
214 __u16 reserved2;
215};
216
217/* pre processing Capability info structure */
218struct snd_sst_prp_info {
219 __s16 min_vol; /* Minimum value of Volume in dB */
220 __s16 max_vol; /* Maximum value of Volume in dB */
221 __u8 volume_control; /* 0=Not Supported, 1=Supported */
222 __u8 reserved1; /* for 32 bit alignment */
223 __u16 reserved2; /* for 32 bit alignment */
224} __attribute__ ((packed));
225
226/*Pre / Post processing algorithms support*/
227struct snd_sst_ppp_info {
228 __u32 src:1; /* 0=Not supported, 1=Supported */
229 __u32 mixer:1; /* 0=Not supported, 1=Supported */
230 __u32 volume_control:1; /* 0=Not Supported, 1=Supported */
231 __u32 mute_control:1; /* 0=Not Supported, 1=Supported */
232 __u32 anc:1; /* 0=Not Supported, 1=Supported */
233 __u32 side_tone:1; /* 0=Not Supported, 1=Supported */
234 __u32 dc_removal:1; /* 0=Not Supported, 1=Supported */
235 __u32 equalizer:1; /* 0=Not Supported, 1=Supported */
236 __u32 spkr_prot:1; /* 0=Not Supported, 1=Supported */
237 __u32 bass_boost:1; /* 0=Not Supported, 1=Supported */
238 __u32 stereo_widening:1;/* 0=Not Supported, 1=Supported */
239 __u32 rsvd1:21;
240 __u32 rsvd2;
241};
242
243/* Firmware capabilities info */
244struct snd_sst_fw_info {
245 struct snd_sst_fw_version fw_version; /* Firmware version */
246 __u8 audio_codecs_supported[8]; /* Codecs supported by FW */
247 __u32 recommend_min_duration; /* Min duration for Lowpower Playback */
248 __u8 max_pcm_streams_supported; /* Max num of PCM streams supported */
249 __u8 max_enc_streams_supported; /* Max number of Encoded streams */
250 __u16 reserved; /* 32 bit alignment*/
251 struct snd_sst_ppp_info ppp_info; /* pre_processing mod cap info */
252 struct snd_sst_postproc_info pop_info; /* Post processing cap info*/
253 struct snd_sst_port_info port_info[3]; /* Port info */
254 struct snd_sst_mix_info mix_info;/* Mixer info */
255 __u32 min_input_buf; /* minmum i/p buffer for decode */
256};
257
258/* Codec params struture */
259union snd_sst_codec_params {
260 struct snd_pcm_params pcm_params;
261 struct snd_mp3_params mp3_params;
262 struct snd_aac_params aac_params;
263 struct snd_wma_params wma_params;
264};
265
266
267struct snd_sst_stream_params {
268 union snd_sst_codec_params uc;
269} __attribute__ ((packed));
270
271struct snd_sst_params {
272 __u32 result;
273 __u32 stream_id;
274 __u8 codec;
275 __u8 ops;
276 __u8 stream_type;
277 __u8 device_type;
278 struct snd_sst_stream_params sparams;
279};
280
281struct snd_sst_vol {
282 __u32 stream_id;
283 __s32 volume;
284 __u32 ramp_duration;
285 __u32 ramp_type; /* Ramp type, default=0 */
286};
287
288struct snd_sst_mute {
289 __u32 stream_id;
290 __u32 mute;
291};
292
293/* ioctl related stuff here */
294struct snd_sst_pmic_config {
295 __u32 sfreq; /* Sampling rate in Hz */
296 __u16 num_chan; /* Mono =1 or Stereo =2 */
297 __u16 pcm_wd_sz; /* Number of bits per sample */
298} __attribute__ ((packed));
299
300struct snd_sst_get_stream_params {
301 struct snd_sst_params codec_params;
302 struct snd_sst_pmic_config pcm_params;
303};
304
305enum snd_sst_target_type {
306 SND_SST_TARGET_PMIC = 1,
307 SND_SST_TARGET_LPE,
308 SND_SST_TARGET_MODEM,
309 SND_SST_TARGET_BT,
310 SND_SST_TARGET_FM,
311 SND_SST_TARGET_NONE,
312};
313
314enum snd_sst_device_type {
315 SND_SST_DEVICE_SSP = 1,
316 SND_SST_DEVICE_PCM,
317 SND_SST_DEVICE_OTHER,
318};
319
320enum snd_sst_device_mode {
321
322 SND_SST_DEV_MODE_PCM_MODE1 = 1, /*(16-bit word, bit-length frame sync)*/
323 SND_SST_DEV_MODE_PCM_MODE2,
324 SND_SST_DEV_MODE_PCM_MODE3,
325 SND_SST_DEV_MODE_PCM_MODE4_RIGHT_JUSTIFIED,
326 SND_SST_DEV_MODE_PCM_MODE4_LEFT_JUSTIFIED,
327 SND_SST_DEV_MODE_PCM_MODE4_I2S, /*(I2S mode, 16-bit words)*/
328 SND_SST_DEV_MODE_PCM_MODE5,
329 SND_SST_DEV_MODE_PCM_MODE6,
330};
331
332enum snd_sst_port_action {
333 SND_SST_PORT_PREPARE = 1,
334 SND_SST_PORT_ACTIVATE,
335};
336
337/* Target selection per device structure */
338struct snd_sst_slot_info {
339 __u8 mix_enable; /* Mixer enable or disable */
340 __u8 device_type;
341 __u8 device_instance; /* 0, 1, 2 */
342 __u8 target_device;
343 __u16 target_sink;
344 __u8 slot[2];
345 __u8 master;
346 __u8 action;
347 __u8 device_mode;
348 __u8 reserved;
349 struct snd_sst_pmic_config pcm_params;
350} __attribute__ ((packed));
351
352#define SST_MAX_TARGET_DEVICES 3
353/* Target device list structure */
354struct snd_sst_target_device {
355 __u32 device_route;
356 struct snd_sst_slot_info devices[SST_MAX_TARGET_DEVICES];
357} __attribute__ ((packed));
358
359struct snd_sst_driver_info {
360 __u32 version; /* Version of the driver */
361 __u32 active_pcm_streams;
362 __u32 active_enc_streams;
363 __u32 max_pcm_streams;
364 __u32 max_enc_streams;
365 __u32 buf_per_stream;
366};
367
368enum snd_sst_buff_type {
369 SST_BUF_USER = 1,
370 SST_BUF_MMAP,
371 SST_BUF_RAR,
372};
373
374struct snd_sst_mmap_buff_entry {
375 unsigned int offset;
376 unsigned int size;
377};
378
379struct snd_sst_mmap_buffs {
380 unsigned int entries;
381 enum snd_sst_buff_type type;
382 struct snd_sst_mmap_buff_entry *buff;
383};
384
385struct snd_sst_buff_entry {
386 void *buffer;
387 unsigned int size;
388};
389
390struct snd_sst_buffs {
391 unsigned int entries;
392 __u8 type;
393 struct snd_sst_buff_entry *buff_entry;
394};
395
396struct snd_sst_dbufs {
397 unsigned long long input_bytes_consumed;
398 unsigned long long output_bytes_produced;
399 struct snd_sst_buffs *ibufs;
400 struct snd_sst_buffs *obufs;
401};
402
403struct snd_sst_tuning_params {
404 __u8 type;
405 __u8 str_id;
406 __u8 size;
407 __u8 rsvd;
408 __aligned_u64 addr;
409} __attribute__ ((packed));
410/*IOCTL defined here */
411/*SST MMF IOCTLS only */
412#define SNDRV_SST_STREAM_SET_PARAMS _IOR('L', 0x00, \
413 struct snd_sst_stream_params *)
414#define SNDRV_SST_STREAM_GET_PARAMS _IOWR('L', 0x01, \
415 struct snd_sst_get_stream_params *)
416#define SNDRV_SST_STREAM_GET_TSTAMP _IOWR('L', 0x02, __u64 *)
417#define SNDRV_SST_STREAM_DECODE _IOWR('L', 0x03, struct snd_sst_dbufs *)
418#define SNDRV_SST_STREAM_BYTES_DECODED _IOWR('L', 0x04, __u64 *)
419#define SNDRV_SST_STREAM_START _IO('A', 0x42)
420#define SNDRV_SST_STREAM_DROP _IO('A', 0x43)
421#define SNDRV_SST_STREAM_DRAIN _IO('A', 0x44)
422#define SNDRV_SST_STREAM_PAUSE _IOW('A', 0x45, int)
423#define SNDRV_SST_STREAM_RESUME _IO('A', 0x47)
424#define SNDRV_SST_MMAP_PLAY _IOW('L', 0x05, struct snd_sst_mmap_buffs *)
425#define SNDRV_SST_MMAP_CAPTURE _IOW('L', 0x06, struct snd_sst_mmap_buffs *)
426/*SST common ioctls */
427#define SNDRV_SST_DRIVER_INFO _IOR('L', 0x10, struct snd_sst_driver_info *)
428#define SNDRV_SST_SET_VOL _IOW('L', 0x11, struct snd_sst_vol *)
429#define SNDRV_SST_GET_VOL _IOW('L', 0x12, struct snd_sst_vol *)
430#define SNDRV_SST_MUTE _IOW('L', 0x13, struct snd_sst_mute *)
431/*AM Ioctly only */
432#define SNDRV_SST_FW_INFO _IOR('L', 0x20, struct snd_sst_fw_info *)
433#define SNDRV_SST_SET_TARGET_DEVICE _IOW('L', 0x21, \
434 struct snd_sst_target_device *)
435/*DSP Ioctls on /dev/intel_sst_ctrl only*/
436#define SNDRV_SST_SET_ALGO _IOW('L', 0x30, struct snd_ppp_params *)
437#define SNDRV_SST_GET_ALGO _IOWR('L', 0x31, struct snd_ppp_params *)
438#define SNDRV_SST_TUNING_PARAMS _IOW('L', 0x32, struct snd_sst_tuning_params *)
439
440#endif /* __INTEL_SST_IOCTL_H__ */
diff --git a/drivers/staging/intel_sst/intel_sst_ipc.c b/drivers/staging/intel_sst/intel_sst_ipc.c
deleted file mode 100644
index 5c3444f6ab41..000000000000
--- a/drivers/staging/intel_sst/intel_sst_ipc.c
+++ /dev/null
@@ -1,774 +0,0 @@
1/*
2 * intel_sst_ipc.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corporation
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This file defines all ipc functions
27 */
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/pci.h>
32#include <linux/firmware.h>
33#include <linux/sched.h>
34#include "intel_sst.h"
35#include "intel_sst_ioctl.h"
36#include "intel_sst_fw_ipc.h"
37#include "intel_sst_common.h"
38
39/*
40 * sst_send_sound_card_type - send sound card type
41 *
42 * this function sends the sound card type to sst dsp engine
43 */
44static void sst_send_sound_card_type(void)
45{
46 struct ipc_post *msg = NULL;
47
48 if (sst_create_short_msg(&msg))
49 return;
50
51 sst_fill_header(&msg->header, IPC_IA_SET_PMIC_TYPE, 0, 0);
52 msg->header.part.data = sst_drv_ctx->pmic_vendor;
53 spin_lock(&sst_drv_ctx->list_spin_lock);
54 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
55 spin_unlock(&sst_drv_ctx->list_spin_lock);
56 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
57 return;
58}
59
60/**
61* sst_post_message - Posts message to SST
62*
63* @work: Pointer to work structure
64*
65* This function is called by any component in driver which
66* wants to send an IPC message. This will post message only if
67* busy bit is free
68*/
69void sst_post_message(struct work_struct *work)
70{
71 struct ipc_post *msg;
72 union ipc_header header;
73 union interrupt_reg imr;
74 int retval = 0;
75 imr.full = 0;
76
77 /*To check if LPE is in stalled state.*/
78 retval = sst_stalled();
79 if (retval < 0) {
80 pr_err("in stalled state\n");
81 return;
82 }
83 pr_debug("post message called\n");
84 spin_lock(&sst_drv_ctx->list_spin_lock);
85
86 /* check list */
87 if (list_empty(&sst_drv_ctx->ipc_dispatch_list)) {
88 /* list is empty, mask imr */
89 pr_debug("Empty msg queue... masking\n");
90 imr.full = readl(sst_drv_ctx->shim + SST_IMRX);
91 imr.part.done_interrupt = 1;
92 /* dummy register for shim workaround */
93 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
94 spin_unlock(&sst_drv_ctx->list_spin_lock);
95 return;
96 }
97
98 /* check busy bit */
99 header.full = sst_shim_read(sst_drv_ctx->shim, SST_IPCX);
100 if (header.part.busy) {
101 /* busy, unmask */
102 pr_debug("Busy not free... unmasking\n");
103 imr.full = readl(sst_drv_ctx->shim + SST_IMRX);
104 imr.part.done_interrupt = 0;
105 /* dummy register for shim workaround */
106 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
107 spin_unlock(&sst_drv_ctx->list_spin_lock);
108 return;
109 }
110 /* copy msg from list */
111 msg = list_entry(sst_drv_ctx->ipc_dispatch_list.next,
112 struct ipc_post, node);
113 list_del(&msg->node);
114 pr_debug("Post message: header = %x\n", msg->header.full);
115 pr_debug("size: = %x\n", msg->header.part.data);
116 if (msg->header.part.large)
117 memcpy_toio(sst_drv_ctx->mailbox + SST_MAILBOX_SEND,
118 msg->mailbox_data, msg->header.part.data);
119 /* dummy register for shim workaround */
120
121 sst_shim_write(sst_drv_ctx->shim, SST_IPCX, msg->header.full);
122 spin_unlock(&sst_drv_ctx->list_spin_lock);
123
124 kfree(msg->mailbox_data);
125 kfree(msg);
126 return;
127}
128
129/*
130 * sst_clear_interrupt - clear the SST FW interrupt
131 *
132 * This function clears the interrupt register after the interrupt
133 * bottom half is complete allowing next interrupt to arrive
134 */
135void sst_clear_interrupt(void)
136{
137 union interrupt_reg isr;
138 union interrupt_reg imr;
139 union ipc_header clear_ipc;
140
141 imr.full = sst_shim_read(sst_drv_ctx->shim, SST_IMRX);
142 isr.full = sst_shim_read(sst_drv_ctx->shim, SST_ISRX);
143 /* write 1 to clear */;
144 isr.part.busy_interrupt = 1;
145 sst_shim_write(sst_drv_ctx->shim, SST_ISRX, isr.full);
146 /* Set IA done bit */
147 clear_ipc.full = sst_shim_read(sst_drv_ctx->shim, SST_IPCD);
148 clear_ipc.part.busy = 0;
149 clear_ipc.part.done = 1;
150 clear_ipc.part.data = IPC_ACK_SUCCESS;
151 sst_shim_write(sst_drv_ctx->shim, SST_IPCD, clear_ipc.full);
152 /* un mask busy interrupt */
153 imr.part.busy_interrupt = 0;
154 sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
155}
156
157void sst_restore_fw_context(void)
158{
159 struct snd_sst_ctxt_params fw_context;
160 struct ipc_post *msg = NULL;
161
162 pr_debug("restore_fw_context\n");
163 /*check cpu type*/
164 if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
165 return;
166 /*not supported for rest*/
167 if (!sst_drv_ctx->fw_cntx_size)
168 return;
169 /*nothing to restore*/
170 pr_debug("restoring context......\n");
171 /*send msg to fw*/
172 if (sst_create_large_msg(&msg))
173 return;
174
175 sst_fill_header(&msg->header, IPC_IA_SET_FW_CTXT, 1, 0);
176 msg->header.part.data = sizeof(fw_context) + sizeof(u32);
177 fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
178 fw_context.size = sst_drv_ctx->fw_cntx_size;
179 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
180 memcpy(msg->mailbox_data + sizeof(u32),
181 &fw_context, sizeof(fw_context));
182 spin_lock(&sst_drv_ctx->list_spin_lock);
183 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
184 spin_unlock(&sst_drv_ctx->list_spin_lock);
185 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
186 return;
187}
188/*
189 * process_fw_init - process the FW init msg
190 *
191 * @msg: IPC message from FW
192 *
193 * This function processes the FW init msg from FW
194 * marks FW state and prints debug info of loaded FW
195 */
196int process_fw_init(struct sst_ipc_msg_wq *msg)
197{
198 struct ipc_header_fw_init *init =
199 (struct ipc_header_fw_init *)msg->mailbox;
200 int retval = 0;
201
202 pr_debug("*** FW Init msg came***\n");
203 if (init->result) {
204 mutex_lock(&sst_drv_ctx->sst_lock);
205 sst_drv_ctx->sst_state = SST_ERROR;
206 mutex_unlock(&sst_drv_ctx->sst_lock);
207 pr_debug("FW Init failed, Error %x\n", init->result);
208 pr_err("FW Init failed, Error %x\n", init->result);
209 retval = -init->result;
210 return retval;
211 }
212 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
213 sst_send_sound_card_type();
214 mutex_lock(&sst_drv_ctx->sst_lock);
215 sst_drv_ctx->sst_state = SST_FW_RUNNING;
216 sst_drv_ctx->lpe_stalled = 0;
217 mutex_unlock(&sst_drv_ctx->sst_lock);
218 pr_debug("FW Version %02x.%02x.%02x\n", init->fw_version.major,
219 init->fw_version.minor, init->fw_version.build);
220 pr_debug("Build Type %x\n", init->fw_version.type);
221 pr_debug(" Build date %s Time %s\n",
222 init->build_info.date, init->build_info.time);
223 sst_wake_up_alloc_block(sst_drv_ctx, FW_DWNL_ID, retval, NULL);
224 sst_restore_fw_context();
225 return retval;
226}
227/**
228* sst_process_message - Processes message from SST
229*
230* @work: Pointer to work structure
231*
232* This function is scheduled by ISR
233* It take a msg from process_queue and does action based on msg
234*/
235void sst_process_message(struct work_struct *work)
236{
237 struct sst_ipc_msg_wq *msg =
238 container_of(work, struct sst_ipc_msg_wq, wq);
239 int str_id = msg->header.part.str_id;
240
241 pr_debug("IPC process for %x\n", msg->header.full);
242
243 /* based on msg in list call respective handler */
244 switch (msg->header.part.msg_id) {
245 case IPC_SST_BUF_UNDER_RUN:
246 case IPC_SST_BUF_OVER_RUN:
247 if (sst_validate_strid(str_id)) {
248 pr_err("stream id %d invalid\n", str_id);
249 break;
250 }
251 pr_err("Buffer under/overrun for %d\n",
252 msg->header.part.str_id);
253 pr_err("Got Underrun & not to send data...ignore\n");
254 break;
255
256 case IPC_SST_GET_PLAY_FRAMES:
257 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
258 struct stream_info *stream ;
259
260 if (sst_validate_strid(str_id)) {
261 pr_err("strid %d invalid\n", str_id);
262 break;
263 }
264 /* call sst_play_frame */
265 stream = &sst_drv_ctx->streams[str_id];
266 pr_debug("sst_play_frames for %d\n",
267 msg->header.part.str_id);
268 mutex_lock(&sst_drv_ctx->streams[str_id].lock);
269 sst_play_frame(msg->header.part.str_id);
270 mutex_unlock(&sst_drv_ctx->streams[str_id].lock);
271 break;
272 } else
273 pr_err("sst_play_frames for Penwell!!\n");
274
275 case IPC_SST_GET_CAPT_FRAMES:
276 if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
277 struct stream_info *stream;
278 /* call sst_capture_frame */
279 if (sst_validate_strid(str_id)) {
280 pr_err("str id %d invalid\n", str_id);
281 break;
282 }
283 stream = &sst_drv_ctx->streams[str_id];
284 pr_debug("sst_capture_frames for %d\n",
285 msg->header.part.str_id);
286 mutex_lock(&stream->lock);
287 if (stream->mmapped == false &&
288 stream->src == SST_DRV) {
289 pr_debug("waking up block for copy.\n");
290 stream->data_blk.ret_code = 0;
291 stream->data_blk.condition = true;
292 stream->data_blk.on = false;
293 wake_up(&sst_drv_ctx->wait_queue);
294 } else
295 sst_capture_frame(msg->header.part.str_id);
296 mutex_unlock(&stream->lock);
297 } else
298 pr_err("sst_play_frames for Penwell!!\n");
299 break;
300
301 case IPC_IA_PRINT_STRING:
302 pr_debug("been asked to print something by fw\n");
303 /* TBD */
304 break;
305
306 case IPC_IA_FW_INIT_CMPLT: {
307 /* send next data to FW */
308 process_fw_init(msg);
309 break;
310 }
311
312 case IPC_SST_STREAM_PROCESS_FATAL_ERR:
313 if (sst_validate_strid(str_id)) {
314 pr_err("stream id %d invalid\n", str_id);
315 break;
316 }
317 pr_err("codec fatal error %x stream %d...\n",
318 msg->header.full, msg->header.part.str_id);
319 pr_err("Dropping the stream\n");
320 sst_drop_stream(msg->header.part.str_id);
321 break;
322 case IPC_IA_LPE_GETTING_STALLED:
323 sst_drv_ctx->lpe_stalled = 1;
324 break;
325 case IPC_IA_LPE_UNSTALLED:
326 sst_drv_ctx->lpe_stalled = 0;
327 break;
328 default:
329 /* Illegal case */
330 pr_err("Unhandled msg %x header %x\n",
331 msg->header.part.msg_id, msg->header.full);
332 }
333 sst_clear_interrupt();
334 return;
335}
336
337/**
338* sst_process_reply - Processes reply message from SST
339*
340* @work: Pointer to work structure
341*
342* This function is scheduled by ISR
343* It take a reply msg from response_queue and
344* does action based on msg
345*/
346void sst_process_reply(struct work_struct *work)
347{
348 struct sst_ipc_msg_wq *msg =
349 container_of(work, struct sst_ipc_msg_wq, wq);
350
351 int str_id = msg->header.part.str_id;
352 struct stream_info *str_info;
353
354 switch (msg->header.part.msg_id) {
355 case IPC_IA_TARGET_DEV_SELECT:
356 if (!msg->header.part.data) {
357 sst_drv_ctx->tgt_dev_blk.ret_code = 0;
358 } else {
359 pr_err(" Msg %x reply error %x\n",
360 msg->header.part.msg_id, msg->header.part.data);
361 sst_drv_ctx->tgt_dev_blk.ret_code =
362 -msg->header.part.data;
363 }
364
365 if (sst_drv_ctx->tgt_dev_blk.on == true) {
366 sst_drv_ctx->tgt_dev_blk.condition = true;
367 wake_up(&sst_drv_ctx->wait_queue);
368 }
369 break;
370 case IPC_IA_ALG_PARAMS: {
371 pr_debug("sst:IPC_ALG_PARAMS response %x\n", msg->header.full);
372 pr_debug("sst: data value %x\n", msg->header.part.data);
373 pr_debug("sst: large value %x\n", msg->header.part.large);
374
375 if (!msg->header.part.large) {
376 if (!msg->header.part.data) {
377 pr_debug("sst: alg set success\n");
378 sst_drv_ctx->ppp_params_blk.ret_code = 0;
379 } else {
380 pr_debug("sst: alg set failed\n");
381 sst_drv_ctx->ppp_params_blk.ret_code =
382 -msg->header.part.data;
383 }
384
385 } else if (msg->header.part.data) {
386 struct snd_ppp_params *mailbox_params, *get_params;
387 char *params;
388
389 pr_debug("sst: alg get success\n");
390 mailbox_params = (struct snd_ppp_params *)msg->mailbox;
391 get_params = kzalloc(sizeof(*get_params), GFP_KERNEL);
392 if (get_params == NULL) {
393 pr_err("sst: out of memory for ALG PARAMS");
394 break;
395 }
396 memcpy_fromio(get_params, mailbox_params,
397 sizeof(*get_params));
398 get_params->params = kzalloc(mailbox_params->size,
399 GFP_KERNEL);
400 if (get_params->params == NULL) {
401 kfree(get_params);
402 pr_err("sst: out of memory for ALG PARAMS block");
403 break;
404 }
405 params = msg->mailbox;
406 params = params + sizeof(*mailbox_params) - sizeof(u32);
407 memcpy_fromio(get_params->params, params,
408 get_params->size);
409 sst_drv_ctx->ppp_params_blk.ret_code = 0;
410 sst_drv_ctx->ppp_params_blk.data = get_params;
411 }
412
413 if (sst_drv_ctx->ppp_params_blk.on == true) {
414 sst_drv_ctx->ppp_params_blk.condition = true;
415 wake_up(&sst_drv_ctx->wait_queue);
416 }
417 break;
418 }
419
420 case IPC_IA_TUNING_PARAMS: {
421 pr_debug("sst:IPC_TUNING_PARAMS resp: %x\n", msg->header.full);
422 pr_debug("data value %x\n", msg->header.part.data);
423 if (msg->header.part.large) {
424 pr_debug("alg set failed\n");
425 sst_drv_ctx->ppp_params_blk.ret_code =
426 -msg->header.part.data;
427 } else {
428 pr_debug("alg set success\n");
429 sst_drv_ctx->ppp_params_blk.ret_code = 0;
430 }
431 if (sst_drv_ctx->ppp_params_blk.on == true) {
432 sst_drv_ctx->ppp_params_blk.condition = true;
433 wake_up(&sst_drv_ctx->wait_queue);
434 }
435 }
436
437 case IPC_IA_GET_FW_INFO: {
438 struct snd_sst_fw_info *fw_info =
439 (struct snd_sst_fw_info *)msg->mailbox;
440 if (msg->header.part.large) {
441 int major = fw_info->fw_version.major;
442 int minor = fw_info->fw_version.minor;
443 int build = fw_info->fw_version.build;
444 pr_debug("Msg succeeded %x\n",
445 msg->header.part.msg_id);
446 pr_debug("INFO: ***FW*** = %02d.%02d.%02d\n",
447 major, minor, build);
448 memcpy_fromio(sst_drv_ctx->fw_info_blk.data,
449 ((struct snd_sst_fw_info *)(msg->mailbox)),
450 sizeof(struct snd_sst_fw_info));
451 sst_drv_ctx->fw_info_blk.ret_code = 0;
452 } else {
453 pr_err(" Msg %x reply error %x\n",
454 msg->header.part.msg_id, msg->header.part.data);
455 sst_drv_ctx->fw_info_blk.ret_code =
456 -msg->header.part.data;
457 }
458 if (sst_drv_ctx->fw_info_blk.on == true) {
459 pr_debug("Memcopy succeeded\n");
460 sst_drv_ctx->fw_info_blk.on = false;
461 sst_drv_ctx->fw_info_blk.condition = true;
462 wake_up(&sst_drv_ctx->wait_queue);
463 }
464 break;
465 }
466 case IPC_IA_SET_STREAM_MUTE:
467 if (!msg->header.part.data) {
468 pr_debug("Msg succeeded %x\n",
469 msg->header.part.msg_id);
470 sst_drv_ctx->mute_info_blk.ret_code = 0;
471 } else {
472 pr_err(" Msg %x reply error %x\n",
473 msg->header.part.msg_id, msg->header.part.data);
474 sst_drv_ctx->mute_info_blk.ret_code =
475 -msg->header.part.data;
476
477 }
478 if (sst_drv_ctx->mute_info_blk.on == true) {
479 sst_drv_ctx->mute_info_blk.on = false;
480 sst_drv_ctx->mute_info_blk.condition = true;
481 wake_up(&sst_drv_ctx->wait_queue);
482 }
483 break;
484 case IPC_IA_SET_STREAM_VOL:
485 if (!msg->header.part.data) {
486 pr_debug("Msg succeeded %x\n",
487 msg->header.part.msg_id);
488 sst_drv_ctx->vol_info_blk.ret_code = 0;
489 } else {
490 pr_err(" Msg %x reply error %x\n",
491 msg->header.part.msg_id,
492 msg->header.part.data);
493 sst_drv_ctx->vol_info_blk.ret_code =
494 -msg->header.part.data;
495
496 }
497
498 if (sst_drv_ctx->vol_info_blk.on == true) {
499 sst_drv_ctx->vol_info_blk.on = false;
500 sst_drv_ctx->vol_info_blk.condition = true;
501 wake_up(&sst_drv_ctx->wait_queue);
502 }
503 break;
504 case IPC_IA_GET_STREAM_VOL:
505 if (msg->header.part.large) {
506 pr_debug("Large Msg Received Successfully\n");
507 pr_debug("Msg succeeded %x\n",
508 msg->header.part.msg_id);
509 memcpy_fromio(sst_drv_ctx->vol_info_blk.data,
510 (void *) msg->mailbox,
511 sizeof(struct snd_sst_vol));
512 sst_drv_ctx->vol_info_blk.ret_code = 0;
513 } else {
514 pr_err("Msg %x reply error %x\n",
515 msg->header.part.msg_id, msg->header.part.data);
516 sst_drv_ctx->vol_info_blk.ret_code =
517 -msg->header.part.data;
518 }
519 if (sst_drv_ctx->vol_info_blk.on == true) {
520 sst_drv_ctx->vol_info_blk.on = false;
521 sst_drv_ctx->vol_info_blk.condition = true;
522 wake_up(&sst_drv_ctx->wait_queue);
523 }
524 break;
525
526 case IPC_IA_GET_STREAM_PARAMS:
527 if (sst_validate_strid(str_id)) {
528 pr_err("stream id %d invalid\n", str_id);
529 break;
530 }
531 str_info = &sst_drv_ctx->streams[str_id];
532 if (msg->header.part.large) {
533 pr_debug("Get stream large success\n");
534 memcpy_fromio(str_info->ctrl_blk.data,
535 ((void *)(msg->mailbox)),
536 sizeof(struct snd_sst_fw_get_stream_params));
537 str_info->ctrl_blk.ret_code = 0;
538 } else {
539 pr_err("Msg %x reply error %x\n",
540 msg->header.part.msg_id, msg->header.part.data);
541 str_info->ctrl_blk.ret_code = -msg->header.part.data;
542 }
543 if (str_info->ctrl_blk.on == true) {
544 str_info->ctrl_blk.on = false;
545 str_info->ctrl_blk.condition = true;
546 wake_up(&sst_drv_ctx->wait_queue);
547 }
548 break;
549 case IPC_IA_DECODE_FRAMES:
550 if (sst_validate_strid(str_id)) {
551 pr_err("stream id %d invalid\n", str_id);
552 break;
553 }
554 str_info = &sst_drv_ctx->streams[str_id];
555 if (msg->header.part.large) {
556 pr_debug("Msg succeeded %x\n",
557 msg->header.part.msg_id);
558 memcpy_fromio(str_info->data_blk.data,
559 ((void *)(msg->mailbox)),
560 sizeof(struct snd_sst_decode_info));
561 str_info->data_blk.ret_code = 0;
562 } else {
563 pr_err("Msg %x reply error %x\n",
564 msg->header.part.msg_id, msg->header.part.data);
565 str_info->data_blk.ret_code = -msg->header.part.data;
566 }
567 if (str_info->data_blk.on == true) {
568 str_info->data_blk.on = false;
569 str_info->data_blk.condition = true;
570 wake_up(&sst_drv_ctx->wait_queue);
571 }
572 break;
573 case IPC_IA_DRAIN_STREAM:
574 if (sst_validate_strid(str_id)) {
575 pr_err("stream id %d invalid\n", str_id);
576 break;
577 }
578 str_info = &sst_drv_ctx->streams[str_id];
579 if (!msg->header.part.data) {
580 pr_debug("Msg succeeded %x\n",
581 msg->header.part.msg_id);
582 str_info->ctrl_blk.ret_code = 0;
583
584 } else {
585 pr_err(" Msg %x reply error %x\n",
586 msg->header.part.msg_id, msg->header.part.data);
587 str_info->ctrl_blk.ret_code = -msg->header.part.data;
588
589 }
590 str_info = &sst_drv_ctx->streams[str_id];
591 if (str_info->data_blk.on == true) {
592 str_info->data_blk.on = false;
593 str_info->data_blk.condition = true;
594 wake_up(&sst_drv_ctx->wait_queue);
595 }
596 break;
597
598 case IPC_IA_DROP_STREAM:
599 if (sst_validate_strid(str_id)) {
600 pr_err("str id %d invalid\n", str_id);
601 break;
602 }
603 str_info = &sst_drv_ctx->streams[str_id];
604 if (msg->header.part.large) {
605 struct snd_sst_drop_response *drop_resp =
606 (struct snd_sst_drop_response *)msg->mailbox;
607
608 pr_debug("Drop ret bytes %x\n", drop_resp->bytes);
609
610 str_info->curr_bytes = drop_resp->bytes;
611 str_info->ctrl_blk.ret_code = 0;
612 } else {
613 pr_err(" Msg %x reply error %x\n",
614 msg->header.part.msg_id, msg->header.part.data);
615 str_info->ctrl_blk.ret_code = -msg->header.part.data;
616 }
617 if (str_info->ctrl_blk.on == true) {
618 str_info->ctrl_blk.on = false;
619 str_info->ctrl_blk.condition = true;
620 wake_up(&sst_drv_ctx->wait_queue);
621 }
622 break;
623 case IPC_IA_ENABLE_RX_TIME_SLOT:
624 if (!msg->header.part.data) {
625 pr_debug("RX_TIME_SLOT success\n");
626 sst_drv_ctx->hs_info_blk.ret_code = 0;
627 } else {
628 pr_err(" Msg %x reply error %x\n",
629 msg->header.part.msg_id,
630 msg->header.part.data);
631 sst_drv_ctx->hs_info_blk.ret_code =
632 -msg->header.part.data;
633 }
634 if (sst_drv_ctx->hs_info_blk.on == true) {
635 sst_drv_ctx->hs_info_blk.on = false;
636 sst_drv_ctx->hs_info_blk.condition = true;
637 wake_up(&sst_drv_ctx->wait_queue);
638 }
639 break;
640 case IPC_IA_PAUSE_STREAM:
641 case IPC_IA_RESUME_STREAM:
642 case IPC_IA_SET_STREAM_PARAMS:
643 str_info = &sst_drv_ctx->streams[str_id];
644 if (!msg->header.part.data) {
645 pr_debug("Msg succeeded %x\n",
646 msg->header.part.msg_id);
647 str_info->ctrl_blk.ret_code = 0;
648 } else {
649 pr_err(" Msg %x reply error %x\n",
650 msg->header.part.msg_id,
651 msg->header.part.data);
652 str_info->ctrl_blk.ret_code = -msg->header.part.data;
653 }
654 if (sst_validate_strid(str_id)) {
655 pr_err(" stream id %d invalid\n", str_id);
656 break;
657 }
658
659 if (str_info->ctrl_blk.on == true) {
660 str_info->ctrl_blk.on = false;
661 str_info->ctrl_blk.condition = true;
662 wake_up(&sst_drv_ctx->wait_queue);
663 }
664 break;
665
666 case IPC_IA_FREE_STREAM:
667 str_info = &sst_drv_ctx->streams[str_id];
668 if (!msg->header.part.data) {
669 pr_debug("Stream %d freed\n", str_id);
670 } else {
671 pr_err("Free for %d ret error %x\n",
672 str_id, msg->header.part.data);
673 }
674 if (str_info->ctrl_blk.on == true) {
675 str_info->ctrl_blk.on = false;
676 str_info->ctrl_blk.condition = true;
677 wake_up(&sst_drv_ctx->wait_queue);
678 }
679 break;
680 case IPC_IA_ALLOC_STREAM: {
681 /* map to stream, call play */
682 struct snd_sst_alloc_response *resp =
683 (struct snd_sst_alloc_response *)msg->mailbox;
684 if (resp->str_type.result)
685 pr_err("error alloc stream = %x\n",
686 resp->str_type.result);
687 sst_alloc_stream_response(str_id, resp);
688 break;
689 }
690
691 case IPC_IA_PLAY_FRAMES:
692 case IPC_IA_CAPT_FRAMES:
693 if (sst_validate_strid(str_id)) {
694 pr_err("stream id %d invalid\n", str_id);
695 break;
696 }
697 pr_debug("Ack for play/capt frames received\n");
698 break;
699
700 case IPC_IA_PREP_LIB_DNLD: {
701 struct snd_sst_str_type *str_type =
702 (struct snd_sst_str_type *)msg->mailbox;
703 pr_debug("Prep Lib download %x\n",
704 msg->header.part.msg_id);
705 if (str_type->result)
706 pr_err("Prep lib download %x\n", str_type->result);
707 else
708 pr_debug("Can download codec now...\n");
709 sst_wake_up_alloc_block(sst_drv_ctx, str_id,
710 str_type->result, NULL);
711 break;
712 }
713
714 case IPC_IA_LIB_DNLD_CMPLT: {
715 struct snd_sst_lib_download_info *resp =
716 (struct snd_sst_lib_download_info *)msg->mailbox;
717 int retval = resp->result;
718
719 pr_debug("Lib downloaded %x\n", msg->header.part.msg_id);
720 if (resp->result) {
721 pr_err("err in lib dload %x\n", resp->result);
722 } else {
723 pr_debug("Codec download complete...\n");
724 pr_debug("codec Type %d Ver %d Built %s: %s\n",
725 resp->dload_lib.lib_info.lib_type,
726 resp->dload_lib.lib_info.lib_version,
727 resp->dload_lib.lib_info.b_date,
728 resp->dload_lib.lib_info.b_time);
729 }
730 sst_wake_up_alloc_block(sst_drv_ctx, str_id,
731 retval, NULL);
732 break;
733 }
734
735 case IPC_IA_GET_FW_VERSION: {
736 struct ipc_header_fw_init *version =
737 (struct ipc_header_fw_init *)msg->mailbox;
738 int major = version->fw_version.major;
739 int minor = version->fw_version.minor;
740 int build = version->fw_version.build;
741 dev_info(&sst_drv_ctx->pci->dev,
742 "INFO: ***LOADED SST FW VERSION*** = %02d.%02d.%02d\n",
743 major, minor, build);
744 break;
745 }
746 case IPC_IA_GET_FW_BUILD_INF: {
747 struct sst_fw_build_info *build =
748 (struct sst_fw_build_info *)msg->mailbox;
749 pr_debug("Build date:%sTime:%s", build->date, build->time);
750 break;
751 }
752 case IPC_IA_SET_PMIC_TYPE:
753 break;
754 case IPC_IA_START_STREAM:
755 pr_debug("reply for START STREAM %x\n", msg->header.full);
756 break;
757
758 case IPC_IA_GET_FW_CTXT:
759 pr_debug("reply for get fw ctxt %x\n", msg->header.full);
760 if (msg->header.part.data)
761 sst_drv_ctx->fw_cntx_size = 0;
762 else
763 sst_drv_ctx->fw_cntx_size = *sst_drv_ctx->fw_cntx;
764 pr_debug("fw copied data %x\n", sst_drv_ctx->fw_cntx_size);
765 sst_wake_up_alloc_block(
766 sst_drv_ctx, str_id, msg->header.part.data, NULL);
767 break;
768 default:
769 /* Illegal case */
770 pr_err("process reply:default = %x\n", msg->header.full);
771 }
772 sst_clear_interrupt();
773 return;
774}
diff --git a/drivers/staging/intel_sst/intel_sst_pvt.c b/drivers/staging/intel_sst/intel_sst_pvt.c
deleted file mode 100644
index e034bea56f14..000000000000
--- a/drivers/staging/intel_sst/intel_sst_pvt.c
+++ /dev/null
@@ -1,313 +0,0 @@
1/*
2 * intel_sst_pvt.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This driver exposes the audio engine functionalities to the ALSA
27 * and middleware.
28 *
29 * This file contains all private functions
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/pci.h>
35#include <linux/fs.h>
36#include <linux/firmware.h>
37#include <linux/sched.h>
38#include "intel_sst.h"
39#include "intel_sst_ioctl.h"
40#include "intel_sst_fw_ipc.h"
41#include "intel_sst_common.h"
42
43/*
44 * sst_get_block_stream - get a new block stream
45 *
46 * @sst_drv_ctx: Driver context structure
47 *
48 * This function assigns a block for the calls that dont have stream context yet
49 * the blocks are used for waiting on Firmware's response for any operation
50 * Should be called with stream lock held
51 */
52int sst_get_block_stream(struct intel_sst_drv *sst_drv_ctx)
53{
54 int i;
55
56 for (i = 0; i < MAX_ACTIVE_STREAM; i++) {
57 if (sst_drv_ctx->alloc_block[i].sst_id == BLOCK_UNINIT) {
58 sst_drv_ctx->alloc_block[i].ops_block.condition = false;
59 sst_drv_ctx->alloc_block[i].ops_block.ret_code = 0;
60 sst_drv_ctx->alloc_block[i].sst_id = 0;
61 break;
62 }
63 }
64 if (i == MAX_ACTIVE_STREAM) {
65 pr_err("max alloc_stream reached\n");
66 i = -EBUSY; /* active stream limit reached */
67 }
68 return i;
69}
70
71/*
72 * sst_wait_interruptible - wait on event
73 *
74 * @sst_drv_ctx: Driver context
75 * @block: Driver block to wait on
76 *
77 * This function waits without a timeout (and is interruptable) for a
78 * given block event
79 */
80int sst_wait_interruptible(struct intel_sst_drv *sst_drv_ctx,
81 struct sst_block *block)
82{
83 int retval = 0;
84
85 if (!wait_event_interruptible(sst_drv_ctx->wait_queue,
86 block->condition)) {
87 /* event wake */
88 if (block->ret_code < 0) {
89 pr_err("stream failed %d\n", block->ret_code);
90 retval = -EBUSY;
91 } else {
92 pr_debug("event up\n");
93 retval = 0;
94 }
95 } else {
96 pr_err("signal interrupted\n");
97 retval = -EINTR;
98 }
99 return retval;
100
101}
102
103
104/*
105 * sst_wait_interruptible_timeout - wait on event interruptable
106 *
107 * @sst_drv_ctx: Driver context
108 * @block: Driver block to wait on
109 * @timeout: time for wait on
110 *
111 * This function waits with a timeout value (and is interruptible) on a
112 * given block event
113 */
114int sst_wait_interruptible_timeout(
115 struct intel_sst_drv *sst_drv_ctx,
116 struct sst_block *block, int timeout)
117{
118 int retval = 0;
119
120 pr_debug("sst_wait_interruptible_timeout - waiting....\n");
121 if (wait_event_interruptible_timeout(sst_drv_ctx->wait_queue,
122 block->condition,
123 msecs_to_jiffies(timeout))) {
124 if (block->ret_code < 0)
125 pr_err("stream failed %d\n", block->ret_code);
126 else
127 pr_debug("event up\n");
128 retval = block->ret_code;
129 } else {
130 block->on = false;
131 pr_err("timeout occurred...\n");
132 /*setting firmware state as uninit so that the
133 firmware will get re-downloaded on next request
134 this is because firmare not responding for 5 sec
135 is equalant to some unrecoverable error of FW
136 sst_drv_ctx->sst_state = SST_UN_INIT;*/
137 retval = -EBUSY;
138 }
139 return retval;
140
141}
142
143
144/*
145 * sst_wait_timeout - wait on event for timeout
146 *
147 * @sst_drv_ctx: Driver context
148 * @block: Driver block to wait on
149 *
150 * This function waits with a timeout value (and is not interruptible) on a
151 * given block event
152 */
153int sst_wait_timeout(struct intel_sst_drv *sst_drv_ctx,
154 struct stream_alloc_block *block)
155{
156 int retval = 0;
157
158 /* NOTE:
159 Observed that FW processes the alloc msg and replies even
160 before the alloc thread has finished execution */
161 pr_debug("waiting for %x, condition %x\n",
162 block->sst_id, block->ops_block.condition);
163 if (wait_event_interruptible_timeout(sst_drv_ctx->wait_queue,
164 block->ops_block.condition,
165 msecs_to_jiffies(SST_BLOCK_TIMEOUT))) {
166 /* event wake */
167 pr_debug("Event wake %x\n", block->ops_block.condition);
168 pr_debug("message ret: %d\n", block->ops_block.ret_code);
169 retval = block->ops_block.ret_code;
170 } else {
171 block->ops_block.on = false;
172 pr_err("Wait timed-out %x\n", block->ops_block.condition);
173 /* settign firmware state as uninit so that the
174 firmware will get redownloaded on next request
175 this is because firmare not responding for 5 sec
176 is equalant to some unrecoverable error of FW
177 sst_drv_ctx->sst_state = SST_UN_INIT;*/
178 retval = -EBUSY;
179 }
180 return retval;
181
182}
183
184/*
185 * sst_create_large_msg - create a large IPC message
186 *
187 * @arg: ipc message
188 *
189 * this function allocates structures to send a large message to the firmware
190 */
191int sst_create_large_msg(struct ipc_post **arg)
192{
193 struct ipc_post *msg;
194
195 msg = kzalloc(sizeof(struct ipc_post), GFP_ATOMIC);
196 if (!msg) {
197 pr_err("kzalloc msg failed\n");
198 return -ENOMEM;
199 }
200
201 msg->mailbox_data = kzalloc(SST_MAILBOX_SIZE, GFP_ATOMIC);
202 if (!msg->mailbox_data) {
203 kfree(msg);
204 pr_err("kzalloc mailbox_data failed");
205 return -ENOMEM;
206 }
207 *arg = msg;
208 return 0;
209}
210
211/*
212 * sst_create_short_msg - create a short IPC message
213 *
214 * @arg: ipc message
215 *
216 * this function allocates structures to send a short message to the firmware
217 */
218int sst_create_short_msg(struct ipc_post **arg)
219{
220 struct ipc_post *msg;
221
222 msg = kzalloc(sizeof(*msg), GFP_ATOMIC);
223 if (!msg) {
224 pr_err("kzalloc msg failed\n");
225 return -ENOMEM;
226 }
227 msg->mailbox_data = NULL;
228 *arg = msg;
229 return 0;
230}
231
232/*
233 * sst_clean_stream - clean the stream context
234 *
235 * @stream: stream structure
236 *
237 * this function resets the stream contexts
238 * should be called in free
239 */
240void sst_clean_stream(struct stream_info *stream)
241{
242 struct sst_stream_bufs *bufs = NULL, *_bufs;
243 stream->status = STREAM_UN_INIT;
244 stream->prev = STREAM_UN_INIT;
245 mutex_lock(&stream->lock);
246 list_for_each_entry_safe(bufs, _bufs, &stream->bufs, node) {
247 list_del(&bufs->node);
248 kfree(bufs);
249 }
250 mutex_unlock(&stream->lock);
251
252 if (stream->ops != STREAM_OPS_PLAYBACK_DRM)
253 kfree(stream->decode_ibuf);
254}
255
256/*
257 * sst_wake_up_alloc_block - wake up waiting block
258 *
259 * @sst_drv_ctx: Driver context
260 * @sst_id: stream id
261 * @status: status of wakeup
262 * @data: data pointer of wakeup
263 *
264 * This function wakes up a sleeping block event based on the response
265 */
266void sst_wake_up_alloc_block(struct intel_sst_drv *sst_drv_ctx,
267 u8 sst_id, int status, void *data)
268{
269 int i;
270
271 /* Unblock with retval code */
272 for (i = 0; i < MAX_ACTIVE_STREAM; i++) {
273 if (sst_id == sst_drv_ctx->alloc_block[i].sst_id) {
274 sst_drv_ctx->alloc_block[i].ops_block.condition = true;
275 sst_drv_ctx->alloc_block[i].ops_block.ret_code = status;
276 sst_drv_ctx->alloc_block[i].ops_block.data = data;
277 wake_up(&sst_drv_ctx->wait_queue);
278 break;
279 }
280 }
281}
282
283/*
284 * sst_enable_rx_timeslot - Send msg to query for stream parameters
285 * @status: rx timeslot to be enabled
286 *
287 * This function is called when the RX timeslot is required to be enabled
288 */
289int sst_enable_rx_timeslot(int status)
290{
291 int retval = 0;
292 struct ipc_post *msg = NULL;
293
294 if (sst_create_short_msg(&msg)) {
295 pr_err("mem allocation failed\n");
296 return -ENOMEM;
297 }
298 pr_debug("ipc message sending: ENABLE_RX_TIME_SLOT\n");
299 sst_fill_header(&msg->header, IPC_IA_ENABLE_RX_TIME_SLOT, 0, 0);
300 msg->header.part.data = status;
301 sst_drv_ctx->hs_info_blk.condition = false;
302 sst_drv_ctx->hs_info_blk.ret_code = 0;
303 sst_drv_ctx->hs_info_blk.on = true;
304 spin_lock(&sst_drv_ctx->list_spin_lock);
305 list_add_tail(&msg->node,
306 &sst_drv_ctx->ipc_dispatch_list);
307 spin_unlock(&sst_drv_ctx->list_spin_lock);
308 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
309 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
310 &sst_drv_ctx->hs_info_blk, SST_BLOCK_TIMEOUT);
311 return retval;
312}
313
diff --git a/drivers/staging/intel_sst/intel_sst_stream.c b/drivers/staging/intel_sst/intel_sst_stream.c
deleted file mode 100644
index be4565e74f8c..000000000000
--- a/drivers/staging/intel_sst/intel_sst_stream.c
+++ /dev/null
@@ -1,583 +0,0 @@
1/*
2 * intel_sst_stream.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This file contains the stream operations of SST driver
27 */
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/pci.h>
32#include <linux/firmware.h>
33#include <linux/sched.h>
34#include <linux/delay.h>
35#include "intel_sst_ioctl.h"
36#include "intel_sst.h"
37#include "intel_sst_fw_ipc.h"
38#include "intel_sst_common.h"
39
40/*
41 * sst_check_device_type - Check the medfield device type
42 *
43 * @device: Device to be checked
44 * @num_ch: Number of channels queried
45 * @pcm_slot: slot to be enabled for this device
46 *
47 * This checks the deivce against the map and calculates pcm_slot value
48 */
49int sst_check_device_type(u32 device, u32 num_chan, u32 *pcm_slot)
50{
51 if (device >= MAX_NUM_STREAMS_MFLD) {
52 pr_debug("device type invalid %d\n", device);
53 return -EINVAL;
54 }
55 if (sst_drv_ctx->streams[device].status == STREAM_UN_INIT) {
56 if (device == SND_SST_DEVICE_VIBRA && num_chan == 1)
57 *pcm_slot = 0x10;
58 else if (device == SND_SST_DEVICE_HAPTIC && num_chan == 1)
59 *pcm_slot = 0x20;
60 else if (device == SND_SST_DEVICE_IHF && num_chan == 1)
61 *pcm_slot = 0x04;
62 else if (device == SND_SST_DEVICE_IHF && num_chan == 2)
63 *pcm_slot = 0x0C;
64 else if (device == SND_SST_DEVICE_HEADSET && num_chan == 1)
65 *pcm_slot = 0x01;
66 else if (device == SND_SST_DEVICE_HEADSET && num_chan == 2)
67 *pcm_slot = 0x03;
68 else if (device == SND_SST_DEVICE_CAPTURE && num_chan == 1)
69 *pcm_slot = 0x01;
70 else if (device == SND_SST_DEVICE_CAPTURE && num_chan == 2)
71 *pcm_slot = 0x03;
72 else if (device == SND_SST_DEVICE_CAPTURE && num_chan == 3)
73 *pcm_slot = 0x07;
74 else if (device == SND_SST_DEVICE_CAPTURE && num_chan == 4)
75 *pcm_slot = 0x0F;
76 else if (device == SND_SST_DEVICE_CAPTURE && num_chan > 4)
77 *pcm_slot = 0x1F;
78 else {
79 pr_debug("No condition satisfied.. ret err\n");
80 return -EINVAL;
81 }
82 } else {
83 pr_debug("this stream state is not uni-init, is %d\n",
84 sst_drv_ctx->streams[device].status);
85 return -EBADRQC;
86 }
87 pr_debug("returning slot %x\n", *pcm_slot);
88 return 0;
89}
90/**
91 * get_mrst_stream_id - gets a new stream id for use
92 *
93 * This functions searches the current streams and allocated an empty stream
94 * lock stream_lock required to be held before calling this
95 */
96static unsigned int get_mrst_stream_id(void)
97{
98 int i;
99
100 for (i = 1; i <= MAX_NUM_STREAMS_MRST; i++) {
101 if (sst_drv_ctx->streams[i].status == STREAM_UN_INIT)
102 return i;
103 }
104 pr_debug("Didn't find empty stream for mrst\n");
105 return -EBUSY;
106}
107
108/**
109 * sst_alloc_stream - Send msg for a new stream ID
110 *
111 * @params: stream params
112 * @stream_ops: operation of stream PB/capture
113 * @codec: codec for stream
114 * @device: device stream to be allocated for
115 *
116 * This function is called by any function which wants to start
117 * a new stream. This also check if a stream exists which is idle
118 * it initializes idle stream id to this request
119 */
120int sst_alloc_stream(char *params, unsigned int stream_ops,
121 u8 codec, unsigned int device)
122{
123 struct ipc_post *msg = NULL;
124 struct snd_sst_alloc_params alloc_param;
125 unsigned int pcm_slot = 0, num_ch;
126 int str_id;
127 struct snd_sst_stream_params *sparams;
128 struct stream_info *str_info;
129
130 pr_debug("SST DBG:entering sst_alloc_stream\n");
131 pr_debug("SST DBG:%d %d %d\n", stream_ops, codec, device);
132
133 BUG_ON(!params);
134 sparams = (struct snd_sst_stream_params *)params;
135 num_ch = sparams->uc.pcm_params.num_chan;
136 /*check the device type*/
137 if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID) {
138 if (sst_check_device_type(device, num_ch, &pcm_slot))
139 return -EINVAL;
140 mutex_lock(&sst_drv_ctx->stream_lock);
141 str_id = device;
142 mutex_unlock(&sst_drv_ctx->stream_lock);
143 pr_debug("SST_DBG: slot %x\n", pcm_slot);
144 } else {
145 mutex_lock(&sst_drv_ctx->stream_lock);
146 str_id = get_mrst_stream_id();
147 mutex_unlock(&sst_drv_ctx->stream_lock);
148 if (str_id <= 0)
149 return -EBUSY;
150 }
151 /*allocate device type context*/
152 sst_init_stream(&sst_drv_ctx->streams[str_id], codec,
153 str_id, stream_ops, pcm_slot, device);
154 /* send msg to FW to allocate a stream */
155 if (sst_create_large_msg(&msg))
156 return -ENOMEM;
157
158 sst_fill_header(&msg->header, IPC_IA_ALLOC_STREAM, 1, str_id);
159 msg->header.part.data = sizeof(alloc_param) + sizeof(u32);
160 alloc_param.str_type.codec_type = codec;
161 alloc_param.str_type.str_type = SST_STREAM_TYPE_MUSIC;
162 alloc_param.str_type.operation = stream_ops;
163 alloc_param.str_type.protected_str = 0; /* non drm */
164 alloc_param.str_type.time_slots = pcm_slot;
165 alloc_param.str_type.result = alloc_param.str_type.reserved = 0;
166 memcpy(&alloc_param.stream_params, params,
167 sizeof(struct snd_sst_stream_params));
168
169 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
170 memcpy(msg->mailbox_data + sizeof(u32), &alloc_param,
171 sizeof(alloc_param));
172 str_info = &sst_drv_ctx->streams[str_id];
173 str_info->ctrl_blk.condition = false;
174 str_info->ctrl_blk.ret_code = 0;
175 str_info->ctrl_blk.on = true;
176 spin_lock(&sst_drv_ctx->list_spin_lock);
177 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
178 spin_unlock(&sst_drv_ctx->list_spin_lock);
179 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
180 pr_debug("SST DBG:alloc stream done\n");
181 return str_id;
182}
183
184
185/*
186 * sst_alloc_stream_response - process alloc reply
187 *
188 * @str_id: stream id for which the stream has been allocated
189 * @resp the stream response from firware
190 *
191 * This function is called by firmware as a response to stream allcoation
192 * request
193 */
194int sst_alloc_stream_response(unsigned int str_id,
195 struct snd_sst_alloc_response *resp)
196{
197 int retval = 0;
198 struct stream_info *str_info;
199 struct snd_sst_lib_download *lib_dnld;
200
201 pr_debug("SST DEBUG: stream number given = %d\n", str_id);
202 str_info = &sst_drv_ctx->streams[str_id];
203 if (resp->str_type.result == SST_LIB_ERR_LIB_DNLD_REQUIRED) {
204 lib_dnld = kzalloc(sizeof(*lib_dnld), GFP_KERNEL);
205 memcpy(lib_dnld, &resp->lib_dnld, sizeof(*lib_dnld));
206 } else
207 lib_dnld = NULL;
208 if (str_info->ctrl_blk.on == true) {
209 str_info->ctrl_blk.on = false;
210 str_info->ctrl_blk.data = lib_dnld;
211 str_info->ctrl_blk.condition = true;
212 str_info->ctrl_blk.ret_code = resp->str_type.result;
213 pr_debug("SST DEBUG: sst_alloc_stream_response: waking up.\n");
214 wake_up(&sst_drv_ctx->wait_queue);
215 }
216 return retval;
217}
218
219
220/**
221* sst_get_fw_info - Send msg to query for firmware configurations
222* @info: out param that holds the firmare configurations
223*
224* This function is called when the firmware configurations are queiried for
225*/
226int sst_get_fw_info(struct snd_sst_fw_info *info)
227{
228 int retval = 0;
229 struct ipc_post *msg = NULL;
230
231 pr_debug("SST DBG:sst_get_fw_info called\n");
232
233 if (sst_create_short_msg(&msg)) {
234 pr_err("SST ERR: message creation failed\n");
235 return -ENOMEM;
236 }
237
238 sst_fill_header(&msg->header, IPC_IA_GET_FW_INFO, 0, 0);
239 sst_drv_ctx->fw_info_blk.condition = false;
240 sst_drv_ctx->fw_info_blk.ret_code = 0;
241 sst_drv_ctx->fw_info_blk.on = true;
242 sst_drv_ctx->fw_info_blk.data = info;
243 spin_lock(&sst_drv_ctx->list_spin_lock);
244 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
245 spin_unlock(&sst_drv_ctx->list_spin_lock);
246 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
247 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
248 &sst_drv_ctx->fw_info_blk, SST_BLOCK_TIMEOUT);
249 if (retval) {
250 pr_err("SST ERR: error in fw_info = %d\n", retval);
251 retval = -EIO;
252 }
253 return retval;
254}
255
256
257/**
258* sst_pause_stream - Send msg for a pausing stream
259* @str_id: stream ID
260*
261* This function is called by any function which wants to pause
262* an already running stream.
263*/
264int sst_start_stream(int str_id)
265{
266 int retval = 0;
267 struct ipc_post *msg = NULL;
268 struct stream_info *str_info;
269
270 pr_debug("sst_start_stream for %d\n", str_id);
271 retval = sst_validate_strid(str_id);
272 if (retval)
273 return retval;
274 str_info = &sst_drv_ctx->streams[str_id];
275 if (str_info->status != STREAM_INIT)
276 return -EBADRQC;
277 if (sst_create_short_msg(&msg))
278 return -ENOMEM;
279
280 sst_fill_header(&msg->header, IPC_IA_START_STREAM, 0, str_id);
281 spin_lock(&sst_drv_ctx->list_spin_lock);
282 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
283 spin_unlock(&sst_drv_ctx->list_spin_lock);
284 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
285 return retval;
286}
287
288/*
289 * sst_pause_stream - Send msg for a pausing stream
290 * @str_id: stream ID
291 *
292 * This function is called by any function which wants to pause
293 * an already running stream.
294 */
295int sst_pause_stream(int str_id)
296{
297 int retval = 0;
298 struct ipc_post *msg = NULL;
299 struct stream_info *str_info;
300
301 pr_debug("SST DBG:sst_pause_stream for %d\n", str_id);
302 retval = sst_validate_strid(str_id);
303 if (retval)
304 return retval;
305 str_info = &sst_drv_ctx->streams[str_id];
306 if (str_info->status == STREAM_PAUSED)
307 return 0;
308 if (str_info->status == STREAM_RUNNING ||
309 str_info->status == STREAM_INIT) {
310 if (str_info->prev == STREAM_UN_INIT)
311 return -EBADRQC;
312 if (str_info->ctrl_blk.on == true) {
313 pr_err("SST ERR: control path is in use\n");
314 return -EINVAL;
315 }
316 if (sst_create_short_msg(&msg))
317 return -ENOMEM;
318
319 sst_fill_header(&msg->header, IPC_IA_PAUSE_STREAM, 0, str_id);
320 str_info->ctrl_blk.condition = false;
321 str_info->ctrl_blk.ret_code = 0;
322 str_info->ctrl_blk.on = true;
323 spin_lock(&sst_drv_ctx->list_spin_lock);
324 list_add_tail(&msg->node,
325 &sst_drv_ctx->ipc_dispatch_list);
326 spin_unlock(&sst_drv_ctx->list_spin_lock);
327 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
328 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
329 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
330 if (retval == 0) {
331 str_info->prev = str_info->status;
332 str_info->status = STREAM_PAUSED;
333 } else if (retval == SST_ERR_INVALID_STREAM_ID) {
334 retval = -EINVAL;
335 mutex_lock(&sst_drv_ctx->stream_lock);
336 sst_clean_stream(str_info);
337 mutex_unlock(&sst_drv_ctx->stream_lock);
338 }
339 } else {
340 retval = -EBADRQC;
341 pr_err("SST ERR: BADQRC for stream\n");
342 }
343
344 return retval;
345}
346
347/**
348 * sst_resume_stream - Send msg for resuming stream
349 * @str_id: stream ID
350 *
351 * This function is called by any function which wants to resume
352 * an already paused stream.
353 */
354int sst_resume_stream(int str_id)
355{
356 int retval = 0;
357 struct ipc_post *msg = NULL;
358 struct stream_info *str_info;
359
360 pr_debug("SST DBG:sst_resume_stream for %d\n", str_id);
361 retval = sst_validate_strid(str_id);
362 if (retval)
363 return retval;
364 str_info = &sst_drv_ctx->streams[str_id];
365 if (str_info->status == STREAM_RUNNING)
366 return 0;
367 if (str_info->status == STREAM_PAUSED) {
368 if (str_info->ctrl_blk.on == true) {
369 pr_err("SST ERR: control path in use\n");
370 return -EINVAL;
371 }
372 if (sst_create_short_msg(&msg)) {
373 pr_err("SST ERR: mem allocation failed\n");
374 return -ENOMEM;
375 }
376 sst_fill_header(&msg->header, IPC_IA_RESUME_STREAM, 0, str_id);
377 str_info->ctrl_blk.condition = false;
378 str_info->ctrl_blk.ret_code = 0;
379 str_info->ctrl_blk.on = true;
380 spin_lock(&sst_drv_ctx->list_spin_lock);
381 list_add_tail(&msg->node,
382 &sst_drv_ctx->ipc_dispatch_list);
383 spin_unlock(&sst_drv_ctx->list_spin_lock);
384 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
385 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
386 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
387 if (!retval) {
388 if (str_info->prev == STREAM_RUNNING)
389 str_info->status = STREAM_RUNNING;
390 else
391 str_info->status = STREAM_INIT;
392 str_info->prev = STREAM_PAUSED;
393 } else if (retval == -SST_ERR_INVALID_STREAM_ID) {
394 retval = -EINVAL;
395 mutex_lock(&sst_drv_ctx->stream_lock);
396 sst_clean_stream(str_info);
397 mutex_unlock(&sst_drv_ctx->stream_lock);
398 }
399 } else {
400 retval = -EBADRQC;
401 pr_err("SST ERR: BADQRC for stream\n");
402 }
403
404 return retval;
405}
406
407
408/**
409 * sst_drop_stream - Send msg for stopping stream
410 * @str_id: stream ID
411 *
412 * This function is called by any function which wants to stop
413 * a stream.
414 */
415int sst_drop_stream(int str_id)
416{
417 int retval = 0;
418 struct ipc_post *msg = NULL;
419 struct sst_stream_bufs *bufs = NULL, *_bufs;
420 struct stream_info *str_info;
421
422 pr_debug("SST DBG:sst_drop_stream for %d\n", str_id);
423 retval = sst_validate_strid(str_id);
424 if (retval)
425 return retval;
426 str_info = &sst_drv_ctx->streams[str_id];
427
428 if (str_info->status != STREAM_UN_INIT &&
429 str_info->status != STREAM_DECODE) {
430 if (str_info->ctrl_blk.on == true) {
431 pr_err("SST ERR: control path in use\n");
432 return -EINVAL;
433 }
434 if (sst_create_short_msg(&msg)) {
435 pr_err("SST ERR: mem allocation failed\n");
436 return -ENOMEM;
437 }
438 sst_fill_header(&msg->header, IPC_IA_DROP_STREAM, 0, str_id);
439 str_info->ctrl_blk.condition = false;
440 str_info->ctrl_blk.ret_code = 0;
441 str_info->ctrl_blk.on = true;
442 spin_lock(&sst_drv_ctx->list_spin_lock);
443 list_add_tail(&msg->node,
444 &sst_drv_ctx->ipc_dispatch_list);
445 spin_unlock(&sst_drv_ctx->list_spin_lock);
446 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
447 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
448 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
449 if (!retval) {
450 pr_debug("SST DBG:drop success\n");
451 str_info->prev = STREAM_UN_INIT;
452 str_info->status = STREAM_INIT;
453 if (str_info->src != MAD_DRV) {
454 mutex_lock(&str_info->lock);
455 list_for_each_entry_safe(bufs, _bufs,
456 &str_info->bufs, node) {
457 list_del(&bufs->node);
458 kfree(bufs);
459 }
460 mutex_unlock(&str_info->lock);
461 }
462 str_info->cumm_bytes += str_info->curr_bytes;
463 } else if (retval == -SST_ERR_INVALID_STREAM_ID) {
464 retval = -EINVAL;
465 mutex_lock(&sst_drv_ctx->stream_lock);
466 sst_clean_stream(str_info);
467 mutex_unlock(&sst_drv_ctx->stream_lock);
468 }
469 if (str_info->data_blk.on == true) {
470 str_info->data_blk.condition = true;
471 str_info->data_blk.ret_code = retval;
472 wake_up(&sst_drv_ctx->wait_queue);
473 }
474 } else {
475 retval = -EBADRQC;
476 pr_err("SST ERR: BADQRC for stream\n");
477 }
478 return retval;
479}
480
481/**
482* sst_drain_stream - Send msg for draining stream
483* @str_id: stream ID
484*
485* This function is called by any function which wants to drain
486* a stream.
487*/
488int sst_drain_stream(int str_id)
489{
490 int retval = 0;
491 struct ipc_post *msg = NULL;
492 struct stream_info *str_info;
493
494 pr_debug("SST DBG:sst_drain_stream for %d\n", str_id);
495 retval = sst_validate_strid(str_id);
496 if (retval)
497 return retval;
498 str_info = &sst_drv_ctx->streams[str_id];
499
500 if (str_info->status != STREAM_RUNNING &&
501 str_info->status != STREAM_INIT &&
502 str_info->status != STREAM_PAUSED) {
503 pr_err("SST ERR: BADQRC for stream = %d\n",
504 str_info->status);
505 return -EBADRQC;
506 }
507
508 if (str_info->status == STREAM_INIT) {
509 if (sst_create_short_msg(&msg)) {
510 pr_err("SST ERR: mem allocation failed\n");
511 return -ENOMEM;
512 }
513 sst_fill_header(&msg->header, IPC_IA_DRAIN_STREAM, 0, str_id);
514 spin_lock(&sst_drv_ctx->list_spin_lock);
515 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
516 spin_unlock(&sst_drv_ctx->list_spin_lock);
517 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
518 } else
519 str_info->need_draining = true;
520 str_info->data_blk.condition = false;
521 str_info->data_blk.ret_code = 0;
522 str_info->data_blk.on = true;
523 retval = sst_wait_interruptible(sst_drv_ctx, &str_info->data_blk);
524 str_info->need_draining = false;
525 return retval;
526}
527
528/**
529 * sst_free_stream - Frees a stream
530 * @str_id: stream ID
531 *
532 * This function is called by any function which wants to free
533 * a stream.
534 */
535int sst_free_stream(int str_id)
536{
537 int retval = 0;
538 struct ipc_post *msg = NULL;
539 struct stream_info *str_info;
540
541 pr_debug("SST DBG:sst_free_stream for %d\n", str_id);
542
543 retval = sst_validate_strid(str_id);
544 if (retval)
545 return retval;
546 str_info = &sst_drv_ctx->streams[str_id];
547
548 if (str_info->status != STREAM_UN_INIT) {
549 if (sst_create_short_msg(&msg)) {
550 pr_err("SST ERR: mem allocation failed\n");
551 return -ENOMEM;
552 }
553 sst_fill_header(&msg->header, IPC_IA_FREE_STREAM, 0, str_id);
554 spin_lock(&sst_drv_ctx->list_spin_lock);
555 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
556 spin_unlock(&sst_drv_ctx->list_spin_lock);
557 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
558 str_info->prev = str_info->status;
559 str_info->status = STREAM_UN_INIT;
560 if (str_info->data_blk.on == true) {
561 str_info->data_blk.condition = true;
562 str_info->data_blk.ret_code = 0;
563 wake_up(&sst_drv_ctx->wait_queue);
564 }
565 str_info->data_blk.on = true;
566 str_info->data_blk.condition = false;
567 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
568 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
569 pr_debug("wait for free returned %d\n", retval);
570 msleep(100);
571 mutex_lock(&sst_drv_ctx->stream_lock);
572 sst_clean_stream(str_info);
573 mutex_unlock(&sst_drv_ctx->stream_lock);
574 pr_debug("SST DBG:Stream freed\n");
575 } else {
576 retval = -EBADRQC;
577 pr_debug("SST DBG:BADQRC for stream\n");
578 }
579
580 return retval;
581}
582
583
diff --git a/drivers/staging/intel_sst/intel_sst_stream_encoded.c b/drivers/staging/intel_sst/intel_sst_stream_encoded.c
deleted file mode 100644
index 2be58c5cba02..000000000000
--- a/drivers/staging/intel_sst/intel_sst_stream_encoded.c
+++ /dev/null
@@ -1,1273 +0,0 @@
1/*
2 * intel_sst_stream.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This file contains the stream operations of SST driver
27 */
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/pci.h>
32#include <linux/syscalls.h>
33#include <linux/firmware.h>
34#include <linux/sched.h>
35#ifdef CONFIG_MRST_RAR_HANDLER
36#include <linux/rar_register.h>
37#include "../memrar/memrar.h"
38#endif
39#include "intel_sst_ioctl.h"
40#include "intel_sst.h"
41#include "intel_sst_fw_ipc.h"
42#include "intel_sst_common.h"
43/**
44* sst_get_stream_params - Send msg to query for stream parameters
45* @str_id: stream id for which the parameters are queried for
46* @get_params: out parameters to which the parameters are copied to
47*
48* This function is called when the stream parameters are queiried for
49*/
50int sst_get_stream_params(int str_id,
51 struct snd_sst_get_stream_params *get_params)
52{
53 int retval = 0;
54 struct ipc_post *msg = NULL;
55 struct stream_info *str_info;
56 struct snd_sst_fw_get_stream_params *fw_params;
57
58 pr_debug("get_stream for %d\n", str_id);
59 retval = sst_validate_strid(str_id);
60 if (retval)
61 return retval;
62
63 str_info = &sst_drv_ctx->streams[str_id];
64 if (str_info->status != STREAM_UN_INIT) {
65 if (str_info->ctrl_blk.on == true) {
66 pr_err("control path in use\n");
67 return -EINVAL;
68 }
69 if (sst_create_short_msg(&msg)) {
70 pr_err("message creation failed\n");
71 return -ENOMEM;
72 }
73 fw_params = kzalloc(sizeof(*fw_params), GFP_ATOMIC);
74 if (!fw_params) {
75 pr_err("mem allocation failed\n");
76 kfree(msg);
77 return -ENOMEM;
78 }
79
80 sst_fill_header(&msg->header, IPC_IA_GET_STREAM_PARAMS,
81 0, str_id);
82 str_info->ctrl_blk.condition = false;
83 str_info->ctrl_blk.ret_code = 0;
84 str_info->ctrl_blk.on = true;
85 str_info->ctrl_blk.data = (void *) fw_params;
86 spin_lock(&sst_drv_ctx->list_spin_lock);
87 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
88 spin_unlock(&sst_drv_ctx->list_spin_lock);
89 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
90 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
91 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
92 if (retval) {
93 get_params->codec_params.result = retval;
94 kfree(fw_params);
95 return -EIO;
96 }
97 memcpy(&get_params->pcm_params, &fw_params->pcm_params,
98 sizeof(fw_params->pcm_params));
99 memcpy(&get_params->codec_params.sparams,
100 &fw_params->codec_params,
101 sizeof(fw_params->codec_params));
102 get_params->codec_params.result = 0;
103 get_params->codec_params.stream_id = str_id;
104 get_params->codec_params.codec = str_info->codec;
105 get_params->codec_params.ops = str_info->ops;
106 get_params->codec_params.stream_type = str_info->str_type;
107 kfree(fw_params);
108 } else {
109 pr_debug("Stream is not in the init state\n");
110 }
111 return retval;
112}
113
114/**
115 * sst_set_stream_param - Send msg for setting stream parameters
116 *
117 * @str_id: stream id
118 * @str_param: stream params
119 *
120 * This function sets stream params during runtime
121 */
122int sst_set_stream_param(int str_id, struct snd_sst_params *str_param)
123{
124 int retval = 0;
125 struct ipc_post *msg = NULL;
126 struct stream_info *str_info;
127
128 BUG_ON(!str_param);
129 if (sst_drv_ctx->streams[str_id].ops != str_param->ops) {
130 pr_err("Invalid operation\n");
131 return -EINVAL;
132 }
133 retval = sst_validate_strid(str_id);
134 if (retval)
135 return retval;
136 pr_debug("set_stream for %d\n", str_id);
137 str_info = &sst_drv_ctx->streams[str_id];
138 if (sst_drv_ctx->streams[str_id].status == STREAM_INIT) {
139 if (str_info->ctrl_blk.on == true) {
140 pr_err("control path in use\n");
141 return -EAGAIN;
142 }
143 if (sst_create_large_msg(&msg))
144 return -ENOMEM;
145
146 sst_fill_header(&msg->header,
147 IPC_IA_SET_STREAM_PARAMS, 1, str_id);
148 str_info->ctrl_blk.condition = false;
149 str_info->ctrl_blk.ret_code = 0;
150 str_info->ctrl_blk.on = true;
151 msg->header.part.data = sizeof(u32) +
152 sizeof(str_param->sparams);
153 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
154 memcpy(msg->mailbox_data + sizeof(u32), &str_param->sparams,
155 sizeof(str_param->sparams));
156 spin_lock(&sst_drv_ctx->list_spin_lock);
157 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
158 spin_unlock(&sst_drv_ctx->list_spin_lock);
159 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
160 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
161 &str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
162 if (retval < 0) {
163 retval = -EIO;
164 sst_clean_stream(str_info);
165 }
166 } else {
167 retval = -EBADRQC;
168 pr_err("BADQRC for stream\n");
169 }
170 return retval;
171}
172
173/**
174* sst_get_vol - This function allows to get the premix gain or gain of a stream
175*
176* @get_vol: this is an output param through which the volume
177* structure is passed back to user
178*
179* This function is called when the premix gain or stream gain is queried for
180*/
181int sst_get_vol(struct snd_sst_vol *get_vol)
182{
183 int retval = 0;
184 struct ipc_post *msg = NULL;
185 struct snd_sst_vol *fw_get_vol;
186 int str_id = get_vol->stream_id;
187
188 pr_debug("get vol called\n");
189
190 if (sst_create_short_msg(&msg))
191 return -ENOMEM;
192
193 sst_fill_header(&msg->header,
194 IPC_IA_GET_STREAM_VOL, 0, str_id);
195 sst_drv_ctx->vol_info_blk.condition = false;
196 sst_drv_ctx->vol_info_blk.ret_code = 0;
197 sst_drv_ctx->vol_info_blk.on = true;
198 fw_get_vol = kzalloc(sizeof(*fw_get_vol), GFP_ATOMIC);
199 if (!fw_get_vol) {
200 pr_err("mem allocation failed\n");
201 kfree(msg);
202 return -ENOMEM;
203 }
204 sst_drv_ctx->vol_info_blk.data = (void *)fw_get_vol;
205 spin_lock(&sst_drv_ctx->list_spin_lock);
206 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
207 spin_unlock(&sst_drv_ctx->list_spin_lock);
208 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
209 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
210 &sst_drv_ctx->vol_info_blk, SST_BLOCK_TIMEOUT);
211 if (retval)
212 retval = -EIO;
213 else {
214 pr_debug("stream id %d\n", fw_get_vol->stream_id);
215 pr_debug("volume %d\n", fw_get_vol->volume);
216 pr_debug("ramp duration %d\n", fw_get_vol->ramp_duration);
217 pr_debug("ramp_type %d\n", fw_get_vol->ramp_type);
218 memcpy(get_vol, fw_get_vol, sizeof(*fw_get_vol));
219 }
220 return retval;
221}
222
223/**
224* sst_set_vol - This function allows to set the premix gain or gain of a stream
225*
226* @set_vol: this holds the volume structure that needs to be set
227*
228* This function is called when premix gain or stream gain is requested to be set
229*/
230int sst_set_vol(struct snd_sst_vol *set_vol)
231{
232
233 int retval = 0;
234 struct ipc_post *msg = NULL;
235
236 pr_debug("set vol called\n");
237
238 if (sst_create_large_msg(&msg)) {
239 pr_err("message creation failed\n");
240 return -ENOMEM;
241 }
242 sst_fill_header(&msg->header, IPC_IA_SET_STREAM_VOL, 1,
243 set_vol->stream_id);
244
245 msg->header.part.data = sizeof(u32) + sizeof(*set_vol);
246 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
247 memcpy(msg->mailbox_data + sizeof(u32), set_vol, sizeof(*set_vol));
248 sst_drv_ctx->vol_info_blk.condition = false;
249 sst_drv_ctx->vol_info_blk.ret_code = 0;
250 sst_drv_ctx->vol_info_blk.on = true;
251 sst_drv_ctx->vol_info_blk.data = set_vol;
252 spin_lock(&sst_drv_ctx->list_spin_lock);
253 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
254 spin_unlock(&sst_drv_ctx->list_spin_lock);
255 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
256 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
257 &sst_drv_ctx->vol_info_blk, SST_BLOCK_TIMEOUT);
258 if (retval) {
259 pr_err("error in set_vol = %d\n", retval);
260 retval = -EIO;
261 }
262 return retval;
263}
264
265/**
266* sst_set_mute - This function sets premix mute or soft mute of a stream
267*
268* @set_mute: this holds the mute structure that needs to be set
269*
270* This function is called when premix mute or stream mute requested to be set
271*/
272int sst_set_mute(struct snd_sst_mute *set_mute)
273{
274
275 int retval = 0;
276 struct ipc_post *msg = NULL;
277
278 pr_debug("set mute called\n");
279
280 if (sst_create_large_msg(&msg)) {
281 pr_err("message creation failed\n");
282 return -ENOMEM;
283 }
284 sst_fill_header(&msg->header, IPC_IA_SET_STREAM_MUTE, 1,
285 set_mute->stream_id);
286 sst_drv_ctx->mute_info_blk.condition = false;
287 sst_drv_ctx->mute_info_blk.ret_code = 0;
288 sst_drv_ctx->mute_info_blk.on = true;
289 sst_drv_ctx->mute_info_blk.data = set_mute;
290
291 msg->header.part.data = sizeof(u32) + sizeof(*set_mute);
292 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
293 memcpy(msg->mailbox_data + sizeof(u32), set_mute,
294 sizeof(*set_mute));
295 spin_lock(&sst_drv_ctx->list_spin_lock);
296 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
297 spin_unlock(&sst_drv_ctx->list_spin_lock);
298 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
299 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
300 &sst_drv_ctx->mute_info_blk, SST_BLOCK_TIMEOUT);
301 if (retval) {
302 pr_err("error in set_mute = %d\n", retval);
303 retval = -EIO;
304 }
305 return retval;
306}
307
308int sst_prepare_target(struct snd_sst_slot_info *slot)
309{
310 if (slot->target_device == SND_SST_TARGET_PMIC
311 && slot->device_instance == 1) {
312 /*music mode*/
313 if (sst_drv_ctx->pmic_port_instance == 0)
314 sst_drv_ctx->scard_ops->set_voice_port(
315 DEACTIVATE);
316 } else if ((slot->target_device == SND_SST_TARGET_PMIC ||
317 slot->target_device == SND_SST_TARGET_MODEM) &&
318 slot->device_instance == 0) {
319 /*voip mode where pcm0 is active*/
320 if (sst_drv_ctx->pmic_port_instance == 1)
321 sst_drv_ctx->scard_ops->set_audio_port(
322 DEACTIVATE);
323 }
324 return 0;
325}
326
327int sst_activate_target(struct snd_sst_slot_info *slot)
328{
329 if (slot->target_device == SND_SST_TARGET_PMIC &&
330 slot->device_instance == 1) {
331 /*music mode*/
332 sst_drv_ctx->pmic_port_instance = 1;
333 sst_drv_ctx->scard_ops->set_audio_port(ACTIVATE);
334 sst_drv_ctx->scard_ops->set_pcm_audio_params(
335 slot->pcm_params.sfreq,
336 slot->pcm_params.pcm_wd_sz,
337 slot->pcm_params.num_chan);
338 if (sst_drv_ctx->pb_streams)
339 sst_drv_ctx->scard_ops->power_up_pmic_pb(1);
340 if (sst_drv_ctx->cp_streams)
341 sst_drv_ctx->scard_ops->power_up_pmic_cp(1);
342 } else if ((slot->target_device == SND_SST_TARGET_PMIC ||
343 slot->target_device == SND_SST_TARGET_MODEM) &&
344 slot->device_instance == 0) {
345 /*voip mode where pcm0 is active*/
346 sst_drv_ctx->pmic_port_instance = 0;
347 sst_drv_ctx->scard_ops->set_voice_port(
348 ACTIVATE);
349 sst_drv_ctx->scard_ops->power_up_pmic_pb(0);
350 /*sst_drv_ctx->scard_ops->power_up_pmic_cp(0);*/
351 }
352 return 0;
353}
354
355int sst_parse_target(struct snd_sst_slot_info *slot)
356{
357 int retval = 0;
358
359 if (slot->action == SND_SST_PORT_ACTIVATE &&
360 slot->device_type == SND_SST_DEVICE_PCM) {
361 retval = sst_activate_target(slot);
362 if (retval)
363 pr_err("SST_Activate_target_fail\n");
364 else
365 pr_err("SST_Activate_target_pass\n");
366 } else if (slot->action == SND_SST_PORT_PREPARE &&
367 slot->device_type == SND_SST_DEVICE_PCM) {
368 retval = sst_prepare_target(slot);
369 if (retval)
370 pr_err("SST_prepare_target_fail\n");
371 else
372 pr_err("SST_prepare_target_pass\n");
373 } else {
374 pr_err("slot_action : %d, device_type: %d\n",
375 slot->action, slot->device_type);
376 }
377 return retval;
378}
379
380int sst_send_target(struct snd_sst_target_device *target)
381{
382 int retval;
383 struct ipc_post *msg;
384
385 if (sst_create_large_msg(&msg)) {
386 pr_err("message creation failed\n");
387 return -ENOMEM;
388 }
389 sst_fill_header(&msg->header, IPC_IA_TARGET_DEV_SELECT, 1, 0);
390 sst_drv_ctx->tgt_dev_blk.condition = false;
391 sst_drv_ctx->tgt_dev_blk.ret_code = 0;
392 sst_drv_ctx->tgt_dev_blk.on = true;
393
394 msg->header.part.data = sizeof(u32) + sizeof(*target);
395 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
396 memcpy(msg->mailbox_data + sizeof(u32), target,
397 sizeof(*target));
398 spin_lock(&sst_drv_ctx->list_spin_lock);
399 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
400 spin_unlock(&sst_drv_ctx->list_spin_lock);
401 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
402 pr_debug("message sent- waiting\n");
403 retval = sst_wait_interruptible_timeout(sst_drv_ctx,
404 &sst_drv_ctx->tgt_dev_blk, TARGET_DEV_BLOCK_TIMEOUT);
405 if (retval)
406 pr_err("target device ipc failed = 0x%x\n", retval);
407 return retval;
408
409}
410
411int sst_target_device_validate(struct snd_sst_target_device *target)
412{
413 int retval = 0;
414 int i;
415
416 for (i = 0; i < SST_MAX_TARGET_DEVICES; i++) {
417 if (target->devices[i].device_type == SND_SST_DEVICE_PCM) {
418 /*pcm device, check params*/
419 if (target->devices[i].device_instance == 1) {
420 if ((target->devices[i].device_mode !=
421 SND_SST_DEV_MODE_PCM_MODE4_I2S) &&
422 (target->devices[i].device_mode !=
423 SND_SST_DEV_MODE_PCM_MODE4_RIGHT_JUSTIFIED)
424 && (target->devices[i].device_mode !=
425 SND_SST_DEV_MODE_PCM_MODE1))
426 goto err;
427 } else if (target->devices[i].device_instance == 0) {
428 if ((target->devices[i].device_mode !=
429 SND_SST_DEV_MODE_PCM_MODE2)
430 && (target->devices[i].device_mode !=
431 SND_SST_DEV_MODE_PCM_MODE4_I2S)
432 && (target->devices[i].device_mode !=
433 SND_SST_DEV_MODE_PCM_MODE1))
434 goto err;
435 if (target->devices[i].pcm_params.sfreq != 8000
436 || target->devices[i].pcm_params.num_chan != 1
437 || target->devices[i].pcm_params.pcm_wd_sz !=
438 16)
439 goto err;
440 } else {
441err:
442 pr_err("i/p params incorrect\n");
443 return -EINVAL;
444 }
445 }
446 }
447 return retval;
448}
449
450/**
451 * sst_target_device_select - This function sets the target device configurations
452 *
453 * @target: this parameter holds the configurations to be set
454 *
455 * This function is called when the user layer wants to change the target
456 * device's configurations
457 */
458
459int sst_target_device_select(struct snd_sst_target_device *target)
460{
461 int retval, i, prepare_count = 0;
462
463 pr_debug("Target Device Select\n");
464
465 if (target->device_route < 0 || target->device_route > 2) {
466 pr_err("device route is invalid\n");
467 return -EINVAL;
468 }
469
470 if (target->device_route != 0) {
471 pr_err("Unsupported config\n");
472 return -EIO;
473 }
474 retval = sst_target_device_validate(target);
475 if (retval)
476 return retval;
477
478 retval = sst_send_target(target);
479 if (retval)
480 return retval;
481 for (i = 0; i < SST_MAX_TARGET_DEVICES; i++) {
482 if (target->devices[i].action == SND_SST_PORT_ACTIVATE) {
483 pr_debug("activate called in %d\n", i);
484 retval = sst_parse_target(&target->devices[i]);
485 if (retval)
486 return retval;
487 } else if (target->devices[i].action == SND_SST_PORT_PREPARE) {
488 pr_debug("PREPARE in %d, Forwarding\n", i);
489 retval = sst_parse_target(&target->devices[i]);
490 if (retval) {
491 pr_err("Parse Target fail %d\n", retval);
492 return retval;
493 }
494 pr_debug("Parse Target successful %d\n", retval);
495 if (target->devices[i].device_type ==
496 SND_SST_DEVICE_PCM)
497 prepare_count++;
498 }
499 }
500 if (target->devices[0].action == SND_SST_PORT_PREPARE &&
501 prepare_count == 0)
502 sst_drv_ctx->scard_ops->power_down_pmic();
503
504 return retval;
505}
506#ifdef CONFIG_MRST_RAR_HANDLER
507/*This function gets the physical address of the secure memory from the handle*/
508static inline int sst_get_RAR(struct RAR_buffer *buffers, int count)
509{
510 int retval = 0, rar_status = 0;
511
512 rar_status = rar_handle_to_bus(buffers, count);
513
514 if (count != rar_status) {
515 pr_err("The rar CALL Failed");
516 retval = -EIO;
517 }
518 if (buffers->info.type != RAR_TYPE_AUDIO) {
519 pr_err("Invalid RAR type\n");
520 return -EINVAL;
521 }
522 return retval;
523}
524
525#endif
526
527/* This function creates the scatter gather list to be sent to firmware to
528capture/playback data*/
529static int sst_create_sg_list(struct stream_info *stream,
530 struct sst_frame_info *sg_list)
531{
532 struct sst_stream_bufs *kbufs = NULL;
533#ifdef CONFIG_MRST_RAR_HANDLER
534 struct RAR_buffer rar_buffers;
535 int retval = 0;
536#endif
537 int i = 0;
538 list_for_each_entry(kbufs, &stream->bufs, node) {
539 if (kbufs->in_use == false) {
540#ifdef CONFIG_MRST_RAR_HANDLER
541 if (stream->ops == STREAM_OPS_PLAYBACK_DRM) {
542 pr_debug("DRM playback handling\n");
543 rar_buffers.info.handle = (__u32)kbufs->addr;
544 rar_buffers.info.size = kbufs->size;
545 pr_debug("rar handle 0x%x size=0x%x\n",
546 rar_buffers.info.handle,
547 rar_buffers.info.size);
548 retval = sst_get_RAR(&rar_buffers, 1);
549
550 if (retval)
551 return retval;
552 sg_list->addr[i].addr = rar_buffers.bus_address;
553 /* rar_buffers.info.size; */
554 sg_list->addr[i].size = (__u32)kbufs->size;
555 pr_debug("phyaddr[%d] 0x%x Size:0x%x\n"
556 , i, sg_list->addr[i].addr,
557 sg_list->addr[i].size);
558 }
559#endif
560 if (stream->ops != STREAM_OPS_PLAYBACK_DRM) {
561 sg_list->addr[i].addr =
562 virt_to_phys((void *)
563 kbufs->addr + kbufs->offset);
564 sg_list->addr[i].size = kbufs->size;
565 pr_debug("phyaddr[%d]:0x%x Size:0x%x\n"
566 , i , sg_list->addr[i].addr, kbufs->size);
567 }
568 stream->curr_bytes += sg_list->addr[i].size;
569 kbufs->in_use = true;
570 i++;
571 }
572 if (i >= MAX_NUM_SCATTER_BUFFERS)
573 break;
574 }
575
576 sg_list->num_entries = i;
577 pr_debug("sg list entries = %d\n", sg_list->num_entries);
578 return i;
579}
580
581
582/**
583 * sst_play_frame - Send msg for sending stream frames
584 *
585 * @str_id: ID of stream
586 *
587 * This function is called to send data to be played out
588 * to the firmware
589 */
590int sst_play_frame(int str_id)
591{
592 int i = 0, retval = 0;
593 struct ipc_post *msg = NULL;
594 struct sst_frame_info sg_list = {0};
595 struct sst_stream_bufs *kbufs = NULL, *_kbufs;
596 struct stream_info *stream;
597
598 pr_debug("play frame for %d\n", str_id);
599 retval = sst_validate_strid(str_id);
600 if (retval)
601 return retval;
602
603 stream = &sst_drv_ctx->streams[str_id];
604 /* clear prev sent buffers */
605 list_for_each_entry_safe(kbufs, _kbufs, &stream->bufs, node) {
606 if (kbufs->in_use == true) {
607 spin_lock(&stream->pcm_lock);
608 list_del(&kbufs->node);
609 spin_unlock(&stream->pcm_lock);
610 kfree(kbufs);
611 }
612 }
613 /* update bytes sent */
614 stream->cumm_bytes += stream->curr_bytes;
615 stream->curr_bytes = 0;
616 if (list_empty(&stream->bufs)) {
617 /* no user buffer available */
618 pr_debug("Null buffer stream status %d\n", stream->status);
619 stream->prev = stream->status;
620 stream->status = STREAM_INIT;
621 pr_debug("new stream status = %d\n", stream->status);
622 if (stream->need_draining == true) {
623 pr_debug("draining stream\n");
624 if (sst_create_short_msg(&msg)) {
625 pr_err("mem allocation failed\n");
626 return -ENOMEM;
627 }
628 sst_fill_header(&msg->header, IPC_IA_DRAIN_STREAM,
629 0, str_id);
630 spin_lock(&sst_drv_ctx->list_spin_lock);
631 list_add_tail(&msg->node,
632 &sst_drv_ctx->ipc_dispatch_list);
633 spin_unlock(&sst_drv_ctx->list_spin_lock);
634 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
635 } else if (stream->data_blk.on == true) {
636 pr_debug("user list empty.. wake\n");
637 /* unblock */
638 stream->data_blk.ret_code = 0;
639 stream->data_blk.condition = true;
640 stream->data_blk.on = false;
641 wake_up(&sst_drv_ctx->wait_queue);
642 }
643 return 0;
644 }
645
646 /* create list */
647 i = sst_create_sg_list(stream, &sg_list);
648
649 /* post msg */
650 if (sst_create_large_msg(&msg))
651 return -ENOMEM;
652
653 sst_fill_header(&msg->header, IPC_IA_PLAY_FRAMES, 1, str_id);
654 msg->header.part.data = sizeof(u32) + sizeof(sg_list);
655 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
656 memcpy(msg->mailbox_data + sizeof(u32), &sg_list, sizeof(sg_list));
657 spin_lock(&sst_drv_ctx->list_spin_lock);
658 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
659 spin_unlock(&sst_drv_ctx->list_spin_lock);
660 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
661 return 0;
662
663}
664
665/**
666 * sst_capture_frame - Send msg for sending stream frames
667 *
668 * @str_id: ID of stream
669 *
670 * This function is called to capture data from the firmware
671 */
672int sst_capture_frame(int str_id)
673{
674 int i = 0, retval = 0;
675 struct ipc_post *msg = NULL;
676 struct sst_frame_info sg_list = {0};
677 struct sst_stream_bufs *kbufs = NULL, *_kbufs;
678 struct stream_info *stream;
679
680
681 pr_debug("capture frame for %d\n", str_id);
682 retval = sst_validate_strid(str_id);
683 if (retval)
684 return retval;
685 stream = &sst_drv_ctx->streams[str_id];
686 /* clear prev sent buffers */
687 list_for_each_entry_safe(kbufs, _kbufs, &stream->bufs, node) {
688 if (kbufs->in_use == true) {
689 list_del(&kbufs->node);
690 kfree(kbufs);
691 pr_debug("del node\n");
692 }
693 }
694 if (list_empty(&stream->bufs)) {
695 /* no user buffer available */
696 pr_debug("Null buffer!!!!stream status %d\n",
697 stream->status);
698 stream->prev = stream->status;
699 stream->status = STREAM_INIT;
700 pr_debug("new stream status = %d\n",
701 stream->status);
702 if (stream->data_blk.on == true) {
703 pr_debug("user list empty.. wake\n");
704 /* unblock */
705 stream->data_blk.ret_code = 0;
706 stream->data_blk.condition = true;
707 stream->data_blk.on = false;
708 wake_up(&sst_drv_ctx->wait_queue);
709
710 }
711 return 0;
712 }
713 /* create new sg list */
714 i = sst_create_sg_list(stream, &sg_list);
715
716 /* post msg */
717 if (sst_create_large_msg(&msg))
718 return -ENOMEM;
719
720 sst_fill_header(&msg->header, IPC_IA_CAPT_FRAMES, 1, str_id);
721 msg->header.part.data = sizeof(u32) + sizeof(sg_list);
722 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
723 memcpy(msg->mailbox_data + sizeof(u32), &sg_list, sizeof(sg_list));
724 spin_lock(&sst_drv_ctx->list_spin_lock);
725 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
726 spin_unlock(&sst_drv_ctx->list_spin_lock);
727 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
728
729
730 /*update bytes recevied*/
731 stream->cumm_bytes += stream->curr_bytes;
732 stream->curr_bytes = 0;
733
734 pr_debug("Cum bytes = %d\n", stream->cumm_bytes);
735 return 0;
736}
737
738/*This function is used to calculate the minimum size of input buffers given*/
739static unsigned int calculate_min_size(struct snd_sst_buffs *bufs)
740{
741 int i, min_val = bufs->buff_entry[0].size;
742 for (i = 1 ; i < bufs->entries; i++) {
743 if (bufs->buff_entry[i].size < min_val)
744 min_val = bufs->buff_entry[i].size;
745 }
746 pr_debug("min_val = %d\n", min_val);
747 return min_val;
748}
749
750static unsigned int calculate_max_size(struct snd_sst_buffs *bufs)
751{
752 int i, max_val = bufs->buff_entry[0].size;
753 for (i = 1 ; i < bufs->entries; i++) {
754 if (bufs->buff_entry[i].size > max_val)
755 max_val = bufs->buff_entry[i].size;
756 }
757 pr_debug("max_val = %d\n", max_val);
758 return max_val;
759}
760
761/*This function is used to allocate input and output buffers to be sent to
762the firmware that will take encoded data and return decoded data*/
763static int sst_allocate_decode_buf(struct stream_info *str_info,
764 struct snd_sst_dbufs *dbufs,
765 unsigned int cum_input_given,
766 unsigned int cum_output_given)
767{
768#ifdef CONFIG_MRST_RAR_HANDLER
769 if (str_info->ops == STREAM_OPS_PLAYBACK_DRM) {
770
771 if (dbufs->ibufs->type == SST_BUF_RAR &&
772 dbufs->obufs->type == SST_BUF_RAR) {
773 if (dbufs->ibufs->entries == dbufs->obufs->entries)
774 return 0;
775 else {
776 pr_err("RAR entries dont match\n");
777 return -EINVAL;
778 }
779 } else
780 str_info->decode_osize = cum_output_given;
781 return 0;
782
783 }
784#endif
785 if (!str_info->decode_ibuf) {
786 pr_debug("no i/p buffers, trying full size\n");
787 str_info->decode_isize = cum_input_given;
788 str_info->decode_ibuf = kzalloc(str_info->decode_isize,
789 GFP_KERNEL);
790 str_info->idecode_alloc = str_info->decode_isize;
791 }
792 if (!str_info->decode_ibuf) {
793 pr_debug("buff alloc failed, try max size\n");
794 str_info->decode_isize = calculate_max_size(dbufs->ibufs);
795 str_info->decode_ibuf = kzalloc(
796 str_info->decode_isize, GFP_KERNEL);
797 str_info->idecode_alloc = str_info->decode_isize;
798 }
799 if (!str_info->decode_ibuf) {
800 pr_debug("buff alloc failed, try min size\n");
801 str_info->decode_isize = calculate_min_size(dbufs->ibufs);
802 str_info->decode_ibuf = kzalloc(str_info->decode_isize,
803 GFP_KERNEL);
804 if (!str_info->decode_ibuf) {
805 pr_err("mem allocation failed\n");
806 return -ENOMEM;
807 }
808 str_info->idecode_alloc = str_info->decode_isize;
809 }
810 str_info->decode_osize = cum_output_given;
811 if (str_info->decode_osize > sst_drv_ctx->mmap_len)
812 str_info->decode_osize = sst_drv_ctx->mmap_len;
813 return 0;
814}
815
816/*This function is used to send the message to firmware to decode the data*/
817static int sst_send_decode_mess(int str_id, struct stream_info *str_info,
818 struct snd_sst_decode_info *dec_info)
819{
820 struct ipc_post *msg = NULL;
821 int retval = 0;
822
823 pr_debug("SST DBG:sst_set_mute:called\n");
824
825 if (str_info->decode_ibuf_type == SST_BUF_RAR) {
826#ifdef CONFIG_MRST_RAR_HANDLER
827 dec_info->frames_in.addr[0].addr =
828 (unsigned long)str_info->decode_ibuf;
829 dec_info->frames_in.addr[0].size =
830 str_info->decode_isize;
831#endif
832
833 } else {
834 dec_info->frames_in.addr[0].addr = virt_to_phys((void *)
835 str_info->decode_ibuf);
836 dec_info->frames_in.addr[0].size = str_info->decode_isize;
837 }
838
839
840 if (str_info->decode_obuf_type == SST_BUF_RAR) {
841#ifdef CONFIG_MRST_RAR_HANDLER
842 dec_info->frames_out.addr[0].addr =
843 (unsigned long)str_info->decode_obuf;
844 dec_info->frames_out.addr[0].size = str_info->decode_osize;
845#endif
846
847 } else {
848 dec_info->frames_out.addr[0].addr = virt_to_phys((void *)
849 str_info->decode_obuf) ;
850 dec_info->frames_out.addr[0].size = str_info->decode_osize;
851 }
852
853 dec_info->frames_in.num_entries = 1;
854 dec_info->frames_out.num_entries = 1;
855 dec_info->frames_in.rsrvd = 0;
856 dec_info->frames_out.rsrvd = 0;
857 dec_info->input_bytes_consumed = 0;
858 dec_info->output_bytes_produced = 0;
859 if (sst_create_large_msg(&msg)) {
860 pr_err("message creation failed\n");
861 return -ENOMEM;
862 }
863
864 sst_fill_header(&msg->header, IPC_IA_DECODE_FRAMES, 1, str_id);
865 msg->header.part.data = sizeof(u32) + sizeof(*dec_info);
866 memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
867 memcpy(msg->mailbox_data + sizeof(u32), dec_info,
868 sizeof(*dec_info));
869 spin_lock(&sst_drv_ctx->list_spin_lock);
870 list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
871 spin_unlock(&sst_drv_ctx->list_spin_lock);
872 str_info->data_blk.condition = false;
873 str_info->data_blk.ret_code = 0;
874 str_info->data_blk.on = true;
875 str_info->data_blk.data = dec_info;
876 sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
877 retval = sst_wait_interruptible(sst_drv_ctx, &str_info->data_blk);
878 return retval;
879}
880
881#ifdef CONFIG_MRST_RAR_HANDLER
882static int sst_prepare_input_buffers_rar(struct stream_info *str_info,
883 struct snd_sst_dbufs *dbufs,
884 int *input_index, int *in_copied,
885 int *input_index_valid_size, int *new_entry_flag)
886{
887 int retval = 0, i;
888
889 if (str_info->ops == STREAM_OPS_PLAYBACK_DRM) {
890 struct RAR_buffer rar_buffers;
891 __u32 info;
892 retval = copy_from_user((void *) &info,
893 dbufs->ibufs->buff_entry[i].buffer,
894 sizeof(__u32));
895 if (retval) {
896 pr_err("cpy from user fail\n");
897 return -EAGAIN;
898 }
899 rar_buffers.info.type = dbufs->ibufs->type;
900 rar_buffers.info.size = dbufs->ibufs->buff_entry[i].size;
901 rar_buffers.info.handle = info;
902 pr_debug("rar in DnR(input buffer function)=0x%x size=0x%x",
903 rar_buffers.info.handle,
904 rar_buffers.info.size);
905 retval = sst_get_RAR(&rar_buffers, 1);
906 if (retval) {
907 pr_debug("SST ERR: RAR API failed\n");
908 return retval;
909 }
910 str_info->decode_ibuf =
911 (void *) ((unsigned long) rar_buffers.bus_address);
912 pr_debug("RAR buf addr in DnR (input buffer function)0x%lu",
913 (unsigned long) str_info->decode_ibuf);
914 pr_debug("rar in DnR decode function/output b_add rar =0x%lu",
915 (unsigned long) rar_buffers.bus_address);
916 *input_index = i + 1;
917 str_info->decode_isize = dbufs->ibufs->buff_entry[i].size;
918 str_info->decode_ibuf_type = dbufs->ibufs->type;
919 *in_copied = str_info->decode_isize;
920 }
921 return retval;
922}
923#endif
924/*This function is used to prepare the kernel input buffers with contents
925before sending for decode*/
926static int sst_prepare_input_buffers(struct stream_info *str_info,
927 struct snd_sst_dbufs *dbufs,
928 int *input_index, int *in_copied,
929 int *input_index_valid_size, int *new_entry_flag)
930{
931 int i, cpy_size, retval = 0;
932
933 pr_debug("input_index = %d, input entries = %d\n",
934 *input_index, dbufs->ibufs->entries);
935 for (i = *input_index; i < dbufs->ibufs->entries; i++) {
936#ifdef CONFIG_MRST_RAR_HANDLER
937 retval = sst_prepare_input_buffers_rar(str_info,
938 dbufs, input_index, in_copied,
939 input_index_valid_size, new_entry_flag);
940 if (retval) {
941 pr_err("In prepare input buffers for RAR\n");
942 return -EIO;
943 }
944#endif
945 *input_index = i;
946 if (*input_index_valid_size == 0)
947 *input_index_valid_size =
948 dbufs->ibufs->buff_entry[i].size;
949 pr_debug("inout addr = %p, size = %d\n",
950 dbufs->ibufs->buff_entry[i].buffer,
951 *input_index_valid_size);
952 pr_debug("decode_isize = %d, in_copied %d\n",
953 str_info->decode_isize, *in_copied);
954 if (*input_index_valid_size <=
955 (str_info->decode_isize - *in_copied))
956 cpy_size = *input_index_valid_size;
957 else
958 cpy_size = str_info->decode_isize - *in_copied;
959
960 pr_debug("cpy size = %d\n", cpy_size);
961 if (!dbufs->ibufs->buff_entry[i].buffer) {
962 pr_err("i/p buffer is null\n");
963 return -EINVAL;
964 }
965 pr_debug("Try copy To %p, From %p, size %d\n",
966 str_info->decode_ibuf + *in_copied,
967 dbufs->ibufs->buff_entry[i].buffer, cpy_size);
968
969 retval =
970 copy_from_user((void *)(str_info->decode_ibuf + *in_copied),
971 (void *) dbufs->ibufs->buff_entry[i].buffer,
972 cpy_size);
973 if (retval) {
974 pr_err("copy from user failed\n");
975 return -EIO;
976 }
977 *in_copied += cpy_size;
978 *input_index_valid_size -= cpy_size;
979 pr_debug("in buff size = %d, in_copied = %d\n",
980 *input_index_valid_size, *in_copied);
981 if (*input_index_valid_size != 0) {
982 pr_debug("more input buffers left\n");
983 dbufs->ibufs->buff_entry[i].buffer += cpy_size;
984 break;
985 }
986 if (*in_copied == str_info->decode_isize &&
987 *input_index_valid_size == 0 &&
988 (i+1) <= dbufs->ibufs->entries) {
989 pr_debug("all input buffers copied\n");
990 *new_entry_flag = true;
991 *input_index = i + 1;
992 break;
993 }
994 }
995 return retval;
996}
997
998/* This function is used to copy the decoded data from kernel buffers to
999the user output buffers with contents after decode*/
1000static int sst_prepare_output_buffers(struct stream_info *str_info,
1001 struct snd_sst_dbufs *dbufs,
1002 int *output_index, int output_size,
1003 int *out_copied)
1004
1005{
1006 int i, cpy_size, retval = 0;
1007 pr_debug("output_index = %d, output entries = %d\n",
1008 *output_index,
1009 dbufs->obufs->entries);
1010 for (i = *output_index; i < dbufs->obufs->entries; i++) {
1011 *output_index = i;
1012 pr_debug("output addr = %p, size = %d\n",
1013 dbufs->obufs->buff_entry[i].buffer,
1014 dbufs->obufs->buff_entry[i].size);
1015 pr_debug("output_size = %d, out_copied = %d\n",
1016 output_size, *out_copied);
1017 if (dbufs->obufs->buff_entry[i].size <
1018 (output_size - *out_copied))
1019 cpy_size = dbufs->obufs->buff_entry[i].size;
1020 else
1021 cpy_size = output_size - *out_copied;
1022 pr_debug("cpy size = %d\n", cpy_size);
1023 pr_debug("Try copy To: %p, From %p, size %d\n",
1024 dbufs->obufs->buff_entry[i].buffer,
1025 sst_drv_ctx->mmap_mem + *out_copied,
1026 cpy_size);
1027 retval = copy_to_user(dbufs->obufs->buff_entry[i].buffer,
1028 sst_drv_ctx->mmap_mem + *out_copied,
1029 cpy_size);
1030 if (retval) {
1031 pr_err("copy to user failed\n");
1032 return -EIO;
1033 } else
1034 pr_debug("copy to user passed\n");
1035 *out_copied += cpy_size;
1036 dbufs->obufs->buff_entry[i].size -= cpy_size;
1037 pr_debug("o/p buff size %d, out_copied %d\n",
1038 dbufs->obufs->buff_entry[i].size, *out_copied);
1039 if (dbufs->obufs->buff_entry[i].size != 0) {
1040 *output_index = i;
1041 dbufs->obufs->buff_entry[i].buffer += cpy_size;
1042 break;
1043 } else if (*out_copied == output_size) {
1044 *output_index = i + 1;
1045 break;
1046 }
1047 }
1048 return retval;
1049}
1050
1051/**
1052 * sst_decode - Send msg for decoding frames
1053 *
1054 * @str_id: ID of stream
1055 * @dbufs: param that holds the user input and output buffers and size
1056 *
1057 * This function is called to decode data from the firmware
1058 */
1059int sst_decode(int str_id, struct snd_sst_dbufs *dbufs)
1060{
1061 int retval = 0, i;
1062 unsigned long long total_input = 0 , total_output = 0;
1063 unsigned int cum_input_given = 0 , cum_output_given = 0;
1064 int copy_in_done = false, copy_out_done = false;
1065 int input_index = 0, output_index = 0;
1066 int input_index_valid_size = 0;
1067 int in_copied, out_copied;
1068 int new_entry_flag;
1069 u64 output_size;
1070 struct stream_info *str_info;
1071 struct snd_sst_decode_info dec_info;
1072 unsigned long long input_bytes, output_bytes;
1073
1074 sst_drv_ctx->scard_ops->power_down_pmic();
1075 pr_debug("Powering_down_PMIC...\n");
1076
1077 retval = sst_validate_strid(str_id);
1078 if (retval)
1079 return retval;
1080
1081 str_info = &sst_drv_ctx->streams[str_id];
1082 if (str_info->status != STREAM_INIT) {
1083 pr_err("invalid stream state = %d\n",
1084 str_info->status);
1085 return -EINVAL;
1086 }
1087
1088 str_info->prev = str_info->status;
1089 str_info->status = STREAM_DECODE;
1090
1091 for (i = 0; i < dbufs->ibufs->entries; i++)
1092 cum_input_given += dbufs->ibufs->buff_entry[i].size;
1093 for (i = 0; i < dbufs->obufs->entries; i++)
1094 cum_output_given += dbufs->obufs->buff_entry[i].size;
1095
1096 /* input and output buffer allocation */
1097 retval = sst_allocate_decode_buf(str_info, dbufs,
1098 cum_input_given, cum_output_given);
1099 if (retval) {
1100 pr_err("mem allocation failed, abort!!!\n");
1101 retval = -ENOMEM;
1102 goto finish;
1103 }
1104
1105 str_info->decode_isize = str_info->idecode_alloc;
1106 str_info->decode_ibuf_type = dbufs->ibufs->type;
1107 str_info->decode_obuf_type = dbufs->obufs->type;
1108
1109 while ((copy_out_done == false) && (copy_in_done == false)) {
1110 in_copied = 0;
1111 new_entry_flag = false;
1112 retval = sst_prepare_input_buffers(str_info,\
1113 dbufs, &input_index, &in_copied,
1114 &input_index_valid_size, &new_entry_flag);
1115 if (retval) {
1116 pr_err("prepare in buffers failed\n");
1117 goto finish;
1118 }
1119
1120 if (str_info->ops != STREAM_OPS_PLAYBACK_DRM)
1121 str_info->decode_obuf = sst_drv_ctx->mmap_mem;
1122
1123#ifdef CONFIG_MRST_RAR_HANDLER
1124 else {
1125 if (dbufs->obufs->type == SST_BUF_RAR) {
1126 struct RAR_buffer rar_buffers;
1127 __u32 info;
1128
1129 pr_debug("DRM");
1130 retval = copy_from_user((void *) &info,
1131 dbufs->obufs->
1132 buff_entry[output_index].buffer,
1133 sizeof(__u32));
1134
1135 rar_buffers.info.size = dbufs->obufs->
1136 buff_entry[output_index].size;
1137 rar_buffers.info.handle = info;
1138 retval = sst_get_RAR(&rar_buffers, 1);
1139 if (retval)
1140 return retval;
1141
1142 str_info->decode_obuf = (void *)((unsigned long)
1143 rar_buffers.bus_address);
1144 str_info->decode_osize = dbufs->obufs->
1145 buff_entry[output_index].size;
1146 str_info->decode_obuf_type = dbufs->obufs->type;
1147 pr_debug("DRM handling\n");
1148 pr_debug("o/p_add=0x%lu Size=0x%x\n",
1149 (unsigned long) str_info->decode_obuf,
1150 str_info->decode_osize);
1151 } else {
1152 str_info->decode_obuf = sst_drv_ctx->mmap_mem;
1153 str_info->decode_osize = dbufs->obufs->
1154 buff_entry[output_index].size;
1155
1156 }
1157 }
1158#endif
1159 if (str_info->ops != STREAM_OPS_PLAYBACK_DRM) {
1160 if (str_info->decode_isize > in_copied) {
1161 str_info->decode_isize = in_copied;
1162 pr_debug("i/p size = %d\n",
1163 str_info->decode_isize);
1164 }
1165 }
1166
1167
1168 retval = sst_send_decode_mess(str_id, str_info, &dec_info);
1169 if (retval || dec_info.input_bytes_consumed == 0) {
1170 pr_err("SST ERR: mess failed or no input consumed\n");
1171 goto finish;
1172 }
1173 input_bytes = dec_info.input_bytes_consumed;
1174 output_bytes = dec_info.output_bytes_produced;
1175
1176 pr_debug("in_copied=%d, con=%lld, prod=%lld\n",
1177 in_copied, input_bytes, output_bytes);
1178 if (dbufs->obufs->type == SST_BUF_RAR) {
1179 output_index += 1;
1180 if (output_index == dbufs->obufs->entries) {
1181 copy_in_done = true;
1182 pr_debug("all i/p cpy done\n");
1183 }
1184 total_output += output_bytes;
1185 } else {
1186 out_copied = 0;
1187 output_size = output_bytes;
1188 retval = sst_prepare_output_buffers(str_info, dbufs,
1189 &output_index, output_size, &out_copied);
1190 if (retval) {
1191 pr_err("prep out buff fail\n");
1192 goto finish;
1193 }
1194 if (str_info->ops != STREAM_OPS_PLAYBACK_DRM) {
1195 if (in_copied != input_bytes) {
1196 int bytes_left = in_copied -
1197 input_bytes;
1198 pr_debug("bytes %d\n",
1199 bytes_left);
1200 if (new_entry_flag == true)
1201 input_index--;
1202 while (bytes_left) {
1203 struct snd_sst_buffs *ibufs;
1204 struct snd_sst_buff_entry
1205 *buff_entry;
1206 unsigned int size_sent;
1207
1208 ibufs = dbufs->ibufs;
1209 buff_entry =
1210 &ibufs->buff_entry[input_index];
1211 size_sent = buff_entry->size -\
1212 input_index_valid_size;
1213 if (bytes_left == size_sent) {
1214 bytes_left = 0;
1215 } else if (bytes_left <
1216 size_sent) {
1217 buff_entry->buffer +=
1218 (size_sent -
1219 bytes_left);
1220 buff_entry->size -=
1221 (size_sent -
1222 bytes_left);
1223 bytes_left = 0;
1224 } else {
1225 bytes_left -= size_sent;
1226 input_index--;
1227 input_index_valid_size =
1228 0;
1229 }
1230 }
1231
1232 }
1233 }
1234
1235 total_output += out_copied;
1236 if (str_info->decode_osize != out_copied) {
1237 str_info->decode_osize -= out_copied;
1238 pr_debug("output size modified = %d\n",
1239 str_info->decode_osize);
1240 }
1241 }
1242 total_input += input_bytes;
1243
1244 if (str_info->ops == STREAM_OPS_PLAYBACK_DRM) {
1245 if (total_input == cum_input_given)
1246 copy_in_done = true;
1247 copy_out_done = true;
1248
1249 } else {
1250 if (total_output == cum_output_given) {
1251 copy_out_done = true;
1252 pr_debug("all o/p cpy done\n");
1253 }
1254
1255 if (total_input == cum_input_given) {
1256 copy_in_done = true;
1257 pr_debug("all i/p cpy done\n");
1258 }
1259 }
1260
1261 pr_debug("copy_out = %d, copy_in = %d\n",
1262 copy_out_done, copy_in_done);
1263 }
1264
1265finish:
1266 dbufs->input_bytes_consumed = total_input;
1267 dbufs->output_bytes_produced = total_output;
1268 str_info->status = str_info->prev;
1269 str_info->prev = STREAM_DECODE;
1270 kfree(str_info->decode_ibuf);
1271 str_info->decode_ibuf = NULL;
1272 return retval;
1273}
diff --git a/drivers/staging/intel_sst/intelmid.c b/drivers/staging/intel_sst/intelmid.c
deleted file mode 100644
index 492b660246b4..000000000000
--- a/drivers/staging/intel_sst/intelmid.c
+++ /dev/null
@@ -1,1022 +0,0 @@
1/*
2 * intelmid.c - Intel Sound card driver for MID
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Harsha Priya <priya.harsha@intel.com>
6 * Vinod Koul <vinod.koul@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 * ALSA driver for Intel MID sound card chipset
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/module.h>
31#include <linux/slab.h>
32#include <linux/io.h>
33#include <linux/platform_device.h>
34#include <linux/interrupt.h>
35#include <linux/sched.h>
36#include <linux/firmware.h>
37#include <linux/input.h>
38#include <sound/control.h>
39#include <asm/mrst.h>
40#include <sound/pcm.h>
41#include <sound/jack.h>
42#include <sound/pcm_params.h>
43#include <sound/initval.h>
44#include <linux/gpio.h>
45#include "intel_sst.h"
46#include "intel_sst_ioctl.h"
47#include "intel_sst_fw_ipc.h"
48#include "intel_sst_common.h"
49#include "intelmid_snd_control.h"
50#include "intelmid_adc_control.h"
51#include "intelmid.h"
52
53MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
54MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
55MODULE_AUTHOR("Dharageswari R <dharageswari.r@intel.com>");
56MODULE_AUTHOR("KP Jeeja <jeeja.kp@intel.com>");
57MODULE_DESCRIPTION("Intel MAD Sound card driver");
58MODULE_LICENSE("GPL v2");
59MODULE_SUPPORTED_DEVICE("{Intel,Intel_MAD}");
60
61
62static int card_index = SNDRV_DEFAULT_IDX1;/* Index 0-MAX */
63static char *card_id = SNDRV_DEFAULT_STR1; /* ID for this card */
64
65module_param(card_index, int, 0444);
66MODULE_PARM_DESC(card_index, "Index value for INTELMAD soundcard.");
67module_param(card_id, charp, 0444);
68MODULE_PARM_DESC(card_id, "ID string for INTELMAD soundcard.");
69
70int sst_card_vendor_id;
71int intelmid_audio_interrupt_enable;/*checkpatch fix*/
72struct snd_intelmad *intelmad_drv;
73
74#define INFO(_cpu_id, _irq_cache, _size) \
75 ((kernel_ulong_t)&(struct snd_intelmad_probe_info) { \
76 .cpu_id = (_cpu_id), \
77 .irq_cache = (_irq_cache), \
78 .size = (_size), \
79 })
80/* Data path functionalities */
81static struct snd_pcm_hardware snd_intelmad_stream = {
82 .info = (SNDRV_PCM_INFO_INTERLEAVED |
83 SNDRV_PCM_INFO_DOUBLE |
84 SNDRV_PCM_INFO_PAUSE |
85 SNDRV_PCM_INFO_RESUME |
86 SNDRV_PCM_INFO_MMAP|
87 SNDRV_PCM_INFO_MMAP_VALID |
88 SNDRV_PCM_INFO_BLOCK_TRANSFER |
89 SNDRV_PCM_INFO_SYNC_START),
90 .formats = (SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_U16 |
91 SNDRV_PCM_FMTBIT_S24 | SNDRV_PCM_FMTBIT_U24 |
92 SNDRV_PCM_FMTBIT_S32 | SNDRV_PCM_FMTBIT_U32),
93 .rates = (SNDRV_PCM_RATE_8000|
94 SNDRV_PCM_RATE_44100 |
95 SNDRV_PCM_RATE_48000),
96 .rate_min = MIN_RATE,
97
98 .rate_max = MAX_RATE,
99 .channels_min = MIN_CHANNEL,
100 .channels_max = MAX_CHANNEL_AMIC,
101 .buffer_bytes_max = MAX_BUFFER,
102 .period_bytes_min = MIN_PERIOD_BYTES,
103 .period_bytes_max = MAX_PERIOD_BYTES,
104 .periods_min = MIN_PERIODS,
105 .periods_max = MAX_PERIODS,
106 .fifo_size = FIFO_SIZE,
107};
108
109
110/**
111 * snd_intelmad_pcm_trigger - stream activities are handled here
112 *
113 * @substream:substream for which the stream function is called
114 * @cmd:the stream commamd that requested from upper layer
115 *
116 * This function is called whenever an a stream activity is invoked
117 */
118static int snd_intelmad_pcm_trigger(struct snd_pcm_substream *substream,
119 int cmd)
120{
121 int ret_val = 0, str_id;
122 struct snd_intelmad *intelmaddata;
123 struct mad_stream_pvt *stream;
124 struct intel_sst_pcm_control *sst_ops;
125
126 WARN_ON(!substream);
127
128 intelmaddata = snd_pcm_substream_chip(substream);
129 stream = substream->runtime->private_data;
130
131 WARN_ON(!intelmaddata->sstdrv_ops);
132 WARN_ON(!intelmaddata->sstdrv_ops->scard_ops);
133 sst_ops = intelmaddata->sstdrv_ops->pcm_control;
134 str_id = stream->stream_info.str_id;
135
136 switch (cmd) {
137 case SNDRV_PCM_TRIGGER_START:
138 pr_debug("Trigger Start\n");
139 ret_val = sst_ops->device_control(SST_SND_START, &str_id);
140 if (ret_val)
141 return ret_val;
142 stream->stream_status = RUNNING;
143 stream->substream = substream;
144 break;
145 case SNDRV_PCM_TRIGGER_STOP:
146 pr_debug("in stop\n");
147 ret_val = sst_ops->device_control(SST_SND_DROP, &str_id);
148 if (ret_val)
149 return ret_val;
150 stream->stream_status = DROPPED;
151 break;
152 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
153 pr_debug("in pause\n");
154 ret_val = sst_ops->device_control(SST_SND_PAUSE, &str_id);
155 if (ret_val)
156 return ret_val;
157 stream->stream_status = PAUSED;
158 break;
159 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
160 pr_debug("in pause release\n");
161 ret_val = sst_ops->device_control(SST_SND_RESUME, &str_id);
162 if (ret_val)
163 return ret_val;
164 stream->stream_status = RUNNING;
165 break;
166 default:
167 return -EINVAL;
168 }
169 return ret_val;
170}
171
172/**
173* snd_intelmad_pcm_prepare- internal preparation before starting a stream
174*
175* @substream: substream for which the function is called
176*
177* This function is called when a stream is started for internal preparation.
178*/
179static int snd_intelmad_pcm_prepare(struct snd_pcm_substream *substream)
180{
181 struct mad_stream_pvt *stream;
182 int ret_val = 0;
183 struct snd_intelmad *intelmaddata;
184
185 pr_debug("pcm_prepare called\n");
186
187 WARN_ON(!substream);
188 stream = substream->runtime->private_data;
189 intelmaddata = snd_pcm_substream_chip(substream);
190 pr_debug("pb cnt = %d cap cnt = %d\n",\
191 intelmaddata->playback_cnt,
192 intelmaddata->capture_cnt);
193
194 if (stream->stream_info.str_id) {
195 pr_debug("Prepare called for already set stream\n");
196 ret_val = intelmaddata->sstdrv_ops->pcm_control->device_control(
197 SST_SND_DROP, &stream->stream_info.str_id);
198 return ret_val;
199 }
200
201 ret_val = snd_intelmad_alloc_stream(substream);
202 if (ret_val < 0)
203 return ret_val;
204 stream->dbg_cum_bytes = 0;
205 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
206 intelmaddata->playback_cnt++;
207 else
208 intelmaddata->capture_cnt++;
209 /* return back the stream id */
210 snprintf(substream->pcm->id, sizeof(substream->pcm->id),
211 "%d", stream->stream_info.str_id);
212 pr_debug("stream id to user = %s\n",
213 substream->pcm->id);
214
215 ret_val = snd_intelmad_init_stream(substream);
216 if (ret_val)
217 return ret_val;
218 substream->runtime->hw.info = SNDRV_PCM_INFO_BLOCK_TRANSFER;
219 return ret_val;
220}
221
222static int snd_intelmad_hw_params(struct snd_pcm_substream *substream,
223 struct snd_pcm_hw_params *hw_params)
224{
225 int ret_val;
226
227 pr_debug("snd_intelmad_hw_params called\n");
228 ret_val = snd_pcm_lib_malloc_pages(substream,
229 params_buffer_bytes(hw_params));
230 memset(substream->runtime->dma_area, 0,
231 params_buffer_bytes(hw_params));
232
233 return ret_val;
234}
235
236static int snd_intelmad_hw_free(struct snd_pcm_substream *substream)
237{
238 pr_debug("snd_intelmad_hw_free called\n");
239 return snd_pcm_lib_free_pages(substream);
240}
241
242/**
243 * snd_intelmad_pcm_pointer- to send the current buffer pointer processed by hw
244 *
245 * @substream: substream for which the function is called
246 *
247 * This function is called by ALSA framework to get the current hw buffer ptr
248 * when a period is elapsed
249 */
250static snd_pcm_uframes_t snd_intelmad_pcm_pointer
251 (struct snd_pcm_substream *substream)
252{
253 /* struct snd_pcm_runtime *runtime = substream->runtime; */
254 struct mad_stream_pvt *stream;
255 struct snd_intelmad *intelmaddata;
256 int ret_val;
257
258 WARN_ON(!substream);
259
260 intelmaddata = snd_pcm_substream_chip(substream);
261 stream = substream->runtime->private_data;
262 if (stream->stream_status == INIT)
263 return 0;
264
265 ret_val = intelmaddata->sstdrv_ops->pcm_control->device_control(
266 SST_SND_BUFFER_POINTER, &stream->stream_info);
267 if (ret_val) {
268 pr_err("error code = 0x%x\n", ret_val);
269 return ret_val;
270 }
271 pr_debug("samples reported out 0x%llx\n",
272 stream->stream_info.buffer_ptr);
273 pr_debug("Frame bits:: %d period_count :: %d\n",
274 (int)substream->runtime->frame_bits,
275 (int)substream->runtime->period_size);
276
277 return stream->stream_info.buffer_ptr;
278
279}
280
281/**
282 * snd_intelmad_close- to free parameteres when stream is stopped
283 *
284 * @substream: substream for which the function is called
285 *
286 * This function is called by ALSA framework when stream is stopped
287 */
288static int snd_intelmad_close(struct snd_pcm_substream *substream)
289{
290 struct snd_intelmad *intelmaddata;
291 struct mad_stream_pvt *stream;
292 int ret_val = 0, str_id;
293
294 WARN_ON(!substream);
295
296 stream = substream->runtime->private_data;
297 str_id = stream->stream_info.str_id;
298
299 pr_debug("sst: snd_intelmad_close called for %d\n", str_id);
300 intelmaddata = snd_pcm_substream_chip(substream);
301
302 pr_debug("str id = %d\n", stream->stream_info.str_id);
303 if (stream->stream_info.str_id) {
304 /* SST API to actually stop/free the stream */
305 ret_val = intelmaddata->sstdrv_ops->pcm_control->close(str_id);
306 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
307 intelmaddata->playback_cnt--;
308 else
309 intelmaddata->capture_cnt--;
310 }
311 pr_debug("snd_intelmad_close : pb cnt = %d cap cnt = %d\n",
312 intelmaddata->playback_cnt, intelmaddata->capture_cnt);
313 kfree(substream->runtime->private_data);
314 return ret_val;
315}
316
317/**
318 * snd_intelmad_open- to set runtime parameters during stream start
319 *
320 * @substream: substream for which the function is called
321 * @type: audio device type
322 *
323 * This function is called by ALSA framework when stream is started
324 */
325static int snd_intelmad_open(struct snd_pcm_substream *substream,
326 enum snd_sst_audio_device_type type)
327{
328 struct snd_intelmad *intelmaddata;
329 struct snd_pcm_runtime *runtime;
330 struct mad_stream_pvt *stream;
331
332 WARN_ON(!substream);
333
334 pr_debug("snd_intelmad_open called\n");
335
336 intelmaddata = snd_pcm_substream_chip(substream);
337 runtime = substream->runtime;
338 /* set the runtime hw parameter with local snd_pcm_hardware struct */
339 runtime->hw = snd_intelmad_stream;
340 if (intelmaddata->cpu_id == CPU_CHIP_LINCROFT) {
341 /*
342 * MRST firmware currently denies stereo recording requests.
343 */
344 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
345 runtime->hw.formats = (SNDRV_PCM_FMTBIT_S16 |
346 SNDRV_PCM_FMTBIT_U16);
347 runtime->hw.channels_max = 1;
348 }
349 }
350 if (intelmaddata->cpu_id == CPU_CHIP_PENWELL) {
351 runtime->hw = snd_intelmad_stream;
352 runtime->hw.rates = SNDRV_PCM_RATE_48000;
353 runtime->hw.rate_min = MAX_RATE;
354 runtime->hw.formats = (SNDRV_PCM_FMTBIT_S24 |
355 SNDRV_PCM_FMTBIT_U24);
356 if (intelmaddata->sstdrv_ops->scard_ops->input_dev_id == AMIC)
357 runtime->hw.channels_max = MAX_CHANNEL_AMIC;
358 else
359 runtime->hw.channels_max = MAX_CHANNEL_DMIC;
360
361 }
362 /* setup the internal datastruture stream pointers based on it being
363 playback or capture stream */
364 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
365 if (!stream)
366 return -ENOMEM;
367 stream->stream_info.str_id = 0;
368 stream->device = type;
369 stream->stream_status = INIT;
370 runtime->private_data = stream;
371 return snd_pcm_hw_constraint_integer(runtime,
372 SNDRV_PCM_HW_PARAM_PERIODS);
373}
374
375static int snd_intelmad_headset_open(struct snd_pcm_substream *substream)
376{
377 return snd_intelmad_open(substream, SND_SST_DEVICE_HEADSET);
378}
379
380static int snd_intelmad_ihf_open(struct snd_pcm_substream *substream)
381{
382 return snd_intelmad_open(substream, SND_SST_DEVICE_IHF);
383}
384
385static int snd_intelmad_vibra_open(struct snd_pcm_substream *substream)
386{
387 return snd_intelmad_open(substream, SND_SST_DEVICE_VIBRA);
388}
389
390static int snd_intelmad_haptic_open(struct snd_pcm_substream *substream)
391{
392 return snd_intelmad_open(substream, SND_SST_DEVICE_HAPTIC);
393}
394
395static struct snd_pcm_ops snd_intelmad_headset_ops = {
396 .open = snd_intelmad_headset_open,
397 .close = snd_intelmad_close,
398 .ioctl = snd_pcm_lib_ioctl,
399 .hw_params = snd_intelmad_hw_params,
400 .hw_free = snd_intelmad_hw_free,
401 .prepare = snd_intelmad_pcm_prepare,
402 .trigger = snd_intelmad_pcm_trigger,
403 .pointer = snd_intelmad_pcm_pointer,
404};
405
406static struct snd_pcm_ops snd_intelmad_ihf_ops = {
407 .open = snd_intelmad_ihf_open,
408 .close = snd_intelmad_close,
409 .ioctl = snd_pcm_lib_ioctl,
410 .hw_params = snd_intelmad_hw_params,
411 .hw_free = snd_intelmad_hw_free,
412 .prepare = snd_intelmad_pcm_prepare,
413 .trigger = snd_intelmad_pcm_trigger,
414 .pointer = snd_intelmad_pcm_pointer,
415};
416
417static struct snd_pcm_ops snd_intelmad_vibra_ops = {
418 .open = snd_intelmad_vibra_open,
419 .close = snd_intelmad_close,
420 .ioctl = snd_pcm_lib_ioctl,
421 .hw_params = snd_intelmad_hw_params,
422 .hw_free = snd_intelmad_hw_free,
423 .prepare = snd_intelmad_pcm_prepare,
424 .trigger = snd_intelmad_pcm_trigger,
425 .pointer = snd_intelmad_pcm_pointer,
426};
427
428static struct snd_pcm_ops snd_intelmad_haptic_ops = {
429 .open = snd_intelmad_haptic_open,
430 .close = snd_intelmad_close,
431 .ioctl = snd_pcm_lib_ioctl,
432 .hw_params = snd_intelmad_hw_params,
433 .hw_free = snd_intelmad_hw_free,
434 .prepare = snd_intelmad_pcm_prepare,
435 .trigger = snd_intelmad_pcm_trigger,
436 .pointer = snd_intelmad_pcm_pointer,
437};
438
439static struct snd_pcm_ops snd_intelmad_capture_ops = {
440 .open = snd_intelmad_headset_open,
441 .close = snd_intelmad_close,
442 .ioctl = snd_pcm_lib_ioctl,
443 .hw_params = snd_intelmad_hw_params,
444 .hw_free = snd_intelmad_hw_free,
445 .prepare = snd_intelmad_pcm_prepare,
446 .trigger = snd_intelmad_pcm_trigger,
447 .pointer = snd_intelmad_pcm_pointer,
448};
449
450int intelmad_get_mic_bias(void)
451{
452 struct snd_pmic_ops *pmic_ops;
453
454 if (!intelmad_drv || !intelmad_drv->sstdrv_ops)
455 return -ENODEV;
456 pmic_ops = intelmad_drv->sstdrv_ops->scard_ops;
457 if (pmic_ops && pmic_ops->pmic_get_mic_bias)
458 return pmic_ops->pmic_get_mic_bias(intelmad_drv);
459 else
460 return -ENODEV;
461}
462EXPORT_SYMBOL_GPL(intelmad_get_mic_bias);
463
464int intelmad_set_headset_state(int state)
465{
466 struct snd_pmic_ops *pmic_ops;
467
468 if (!intelmad_drv || !intelmad_drv->sstdrv_ops)
469 return -ENODEV;
470 pmic_ops = intelmad_drv->sstdrv_ops->scard_ops;
471 if (pmic_ops && pmic_ops->pmic_set_headset_state)
472 return pmic_ops->pmic_set_headset_state(state);
473 else
474 return -ENODEV;
475}
476EXPORT_SYMBOL_GPL(intelmad_set_headset_state);
477
478void sst_process_mad_jack_detection(struct work_struct *work)
479{
480 u8 interrupt_status;
481 struct mad_jack_msg_wq *mad_jack_detect =
482 container_of(work, struct mad_jack_msg_wq, wq);
483
484 struct snd_intelmad *intelmaddata =
485 mad_jack_detect->intelmaddata;
486
487 if (!intelmaddata)
488 return;
489
490 interrupt_status = mad_jack_detect->intsts;
491 if (intelmaddata->sstdrv_ops && intelmaddata->sstdrv_ops->scard_ops
492 && intelmaddata->sstdrv_ops->scard_ops->pmic_irq_cb) {
493 intelmaddata->sstdrv_ops->scard_ops->pmic_irq_cb(
494 (void *)intelmaddata, interrupt_status);
495 intelmaddata->sstdrv_ops->scard_ops->pmic_jack_enable();
496 }
497 kfree(mad_jack_detect);
498}
499/**
500 * snd_intelmad_intr_handler- interrupt handler
501 *
502 * @irq : irq number of the interrupt received
503 * @dev: device context
504 *
505 * This function is called when an interrupt is raised at the sound card
506 */
507static irqreturn_t snd_intelmad_intr_handler(int irq, void *dev)
508{
509 struct snd_intelmad *intelmaddata =
510 (struct snd_intelmad *)dev;
511 u8 interrupt_status;
512 struct mad_jack_msg_wq *mad_jack_msg;
513 memcpy_fromio(&interrupt_status,
514 ((void *)(intelmaddata->int_base)),
515 sizeof(u8));
516
517 mad_jack_msg = kzalloc(sizeof(*mad_jack_msg), GFP_ATOMIC);
518 mad_jack_msg->intsts = interrupt_status;
519 mad_jack_msg->intelmaddata = intelmaddata;
520 INIT_WORK(&mad_jack_msg->wq, sst_process_mad_jack_detection);
521 queue_work(intelmaddata->mad_jack_wq, &mad_jack_msg->wq);
522
523 return IRQ_HANDLED;
524}
525
526void sst_mad_send_jack_report(struct snd_jack *jack,
527 int buttonpressevent , int status)
528{
529
530 if (!jack) {
531 pr_debug("MAD error jack empty\n");
532
533 } else {
534 snd_jack_report(jack, status);
535 /* button pressed and released */
536 if (buttonpressevent)
537 snd_jack_report(jack, 0);
538 pr_debug("MAD sending jack report Done !!!\n");
539 }
540}
541
542static int __devinit snd_intelmad_register_irq(
543 struct snd_intelmad *intelmaddata, unsigned int regbase,
544 unsigned int regsize)
545{
546 int ret_val;
547 char *drv_name;
548
549 pr_debug("irq reg regbase 0x%x, regsize 0x%x\n",
550 regbase, regsize);
551 intelmaddata->int_base = ioremap_nocache(regbase, regsize);
552 if (!intelmaddata->int_base)
553 pr_err("Mapping of cache failed\n");
554 pr_debug("irq = 0x%x\n", intelmaddata->irq);
555 if (intelmaddata->cpu_id == CPU_CHIP_PENWELL)
556 drv_name = DRIVER_NAME_MFLD;
557 else
558 drv_name = DRIVER_NAME_MRST;
559 ret_val = request_irq(intelmaddata->irq,
560 snd_intelmad_intr_handler,
561 IRQF_SHARED, drv_name,
562 intelmaddata);
563 if (ret_val)
564 pr_err("cannot register IRQ\n");
565 return ret_val;
566}
567
568static int __devinit snd_intelmad_sst_register(
569 struct snd_intelmad *intelmaddata)
570{
571 int ret_val = 0;
572 struct snd_pmic_ops *intelmad_vendor_ops[MAX_VENDORS] = {
573 &snd_pmic_ops_fs,
574 &snd_pmic_ops_mx,
575 &snd_pmic_ops_nc,
576 &snd_msic_ops
577 };
578
579 struct sc_reg_access vendor_addr = {0x00, 0x00, 0x00};
580
581 if (intelmaddata->cpu_id == CPU_CHIP_LINCROFT) {
582 ret_val = sst_sc_reg_access(&vendor_addr, PMIC_READ, 1);
583 if (ret_val)
584 return ret_val;
585 sst_card_vendor_id = (vendor_addr.value & (MASK2|MASK1|MASK0));
586 pr_debug("original n extrated vendor id = 0x%x %d\n",
587 vendor_addr.value, sst_card_vendor_id);
588 if (sst_card_vendor_id < 0 || sst_card_vendor_id > 2) {
589 pr_err("vendor card not supported!!\n");
590 return -EIO;
591 }
592 } else
593 sst_card_vendor_id = 0x3;
594
595 intelmaddata->sstdrv_ops->module_name = SST_CARD_NAMES;
596 intelmaddata->sstdrv_ops->vendor_id = sst_card_vendor_id;
597 BUG_ON(!intelmad_vendor_ops[sst_card_vendor_id]);
598 intelmaddata->sstdrv_ops->scard_ops =
599 intelmad_vendor_ops[sst_card_vendor_id];
600
601 if (intelmaddata->cpu_id == CPU_CHIP_PENWELL) {
602 intelmaddata->sstdrv_ops->scard_ops->pb_on = 0;
603 intelmaddata->sstdrv_ops->scard_ops->cap_on = 0;
604 intelmaddata->sstdrv_ops->scard_ops->input_dev_id = DMIC;
605 intelmaddata->sstdrv_ops->scard_ops->output_dev_id =
606 STEREO_HEADPHONE;
607 intelmaddata->sstdrv_ops->scard_ops->lineout_dev_id = NONE;
608 }
609
610 /* registering with SST driver to get access to SST APIs to use */
611 ret_val = register_sst_card(intelmaddata->sstdrv_ops);
612 if (ret_val) {
613 pr_err("sst card registration failed\n");
614 return ret_val;
615 }
616 sst_card_vendor_id = intelmaddata->sstdrv_ops->vendor_id;
617 intelmaddata->pmic_status = PMIC_UNINIT;
618 return ret_val;
619}
620
621static void snd_intelmad_page_free(struct snd_pcm *pcm)
622{
623 snd_pcm_lib_preallocate_free_for_all(pcm);
624}
625/* Driver Init/exit functionalities */
626/**
627 * snd_intelmad_pcm_new - to setup pcm for the card
628 *
629 * @card: pointer to the sound card structure
630 * @intelmaddata: pointer to internal context
631 * @pb: playback count for this card
632 * @cap: capture count for this card
633 * @index: device index
634 *
635 * This function is called from probe function to set up pcm params
636 * and functions
637 */
638static int __devinit snd_intelmad_pcm_new(struct snd_card *card,
639 struct snd_intelmad *intelmaddata,
640 unsigned int pb, unsigned int cap, unsigned int index)
641{
642 int ret_val = 0;
643 struct snd_pcm *pcm;
644 char name[32] = INTEL_MAD;
645 struct snd_pcm_ops *pb_ops = NULL, *cap_ops = NULL;
646
647 pr_debug("called for pb %d, cp %d, idx %d\n", pb, cap, index);
648 ret_val = snd_pcm_new(card, name, index, pb, cap, &pcm);
649 if (ret_val)
650 return ret_val;
651 /* setup the ops for playback and capture streams */
652 switch (index) {
653 case 0:
654 pb_ops = &snd_intelmad_headset_ops;
655 cap_ops = &snd_intelmad_capture_ops;
656 break;
657 case 1:
658 pb_ops = &snd_intelmad_ihf_ops;
659 cap_ops = &snd_intelmad_capture_ops;
660 break;
661 case 2:
662 pb_ops = &snd_intelmad_vibra_ops;
663 cap_ops = &snd_intelmad_capture_ops;
664 break;
665 case 3:
666 pb_ops = &snd_intelmad_haptic_ops;
667 cap_ops = &snd_intelmad_capture_ops;
668 break;
669 }
670 if (pb)
671 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, pb_ops);
672 if (cap)
673 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, cap_ops);
674 /* setup private data which can be retrieved when required */
675 pcm->private_data = intelmaddata;
676 pcm->private_free = snd_intelmad_page_free;
677 pcm->info_flags = 0;
678 strncpy(pcm->name, card->shortname, strlen(card->shortname));
679 /* allocate dma pages for ALSA stream operations */
680 snd_pcm_lib_preallocate_pages_for_all(pcm,
681 SNDRV_DMA_TYPE_CONTINUOUS,
682 snd_dma_continuous_data(GFP_KERNEL),
683 MIN_BUFFER, MAX_BUFFER);
684 return ret_val;
685}
686
687static int __devinit snd_intelmad_pcm(struct snd_card *card,
688 struct snd_intelmad *intelmaddata)
689{
690 int ret_val = 0;
691
692 WARN_ON(!card);
693 WARN_ON(!intelmaddata);
694 pr_debug("snd_intelmad_pcm called\n");
695 ret_val = snd_intelmad_pcm_new(card, intelmaddata, 1, 1, 0);
696 if (intelmaddata->cpu_id == CPU_CHIP_LINCROFT)
697 return ret_val;
698 ret_val = snd_intelmad_pcm_new(card, intelmaddata, 1, 0, 1);
699 if (ret_val)
700 return ret_val;
701 ret_val = snd_intelmad_pcm_new(card, intelmaddata, 1, 0, 2);
702 if (ret_val)
703 return ret_val;
704 return snd_intelmad_pcm_new(card, intelmaddata, 1, 0, 3);
705}
706
707/**
708 * snd_intelmad_jack- to setup jack settings of the card
709 *
710 * @intelmaddata: pointer to internal context
711 *
712 * This function is called send jack events
713 */
714static int snd_intelmad_jack(struct snd_intelmad *intelmaddata)
715{
716 struct snd_jack *jack;
717 int retval;
718
719 pr_debug("snd_intelmad_jack called\n");
720 jack = &intelmaddata->jack[0].jack;
721 snd_jack_set_key(jack, SND_JACK_BTN_0, KEY_PHONE);
722 retval = snd_jack_new(intelmaddata->card, "Intel(R) MID Audio Jack",
723 SND_JACK_HEADPHONE | SND_JACK_HEADSET |
724 SW_JACK_PHYSICAL_INSERT | SND_JACK_BTN_0
725 | SND_JACK_BTN_1, &jack);
726 pr_debug("snd_intelmad_jack called\n");
727 if (retval < 0)
728 return retval;
729 snd_jack_report(jack, 0);
730
731 jack->private_data = jack;
732 intelmaddata->jack[0].jack = *jack;
733
734 return retval;
735}
736
737/**
738 * snd_intelmad_mixer- to setup mixer settings of the card
739 *
740 * @intelmaddata: pointer to internal context
741 *
742 * This function is called from probe function to set up mixer controls
743 */
744static int __devinit snd_intelmad_mixer(struct snd_intelmad *intelmaddata)
745{
746 struct snd_card *card;
747 unsigned int idx;
748 int ret_val = 0, max_controls = 0;
749 char *mixername = "IntelMAD Controls";
750 struct snd_kcontrol_new *controls;
751
752 WARN_ON(!intelmaddata);
753
754 card = intelmaddata->card;
755 strncpy(card->mixername, mixername, sizeof(card->mixername)-1);
756 /* add all widget controls and expose the same */
757 if (intelmaddata->cpu_id == CPU_CHIP_PENWELL) {
758 max_controls = MAX_CTRL_MFLD;
759 controls = snd_intelmad_controls_mfld;
760 } else {
761 max_controls = MAX_CTRL_MRST;
762 controls = snd_intelmad_controls_mrst;
763 }
764 for (idx = 0; idx < max_controls; idx++) {
765 ret_val = snd_ctl_add(card,
766 snd_ctl_new1(&controls[idx],
767 intelmaddata));
768 pr_debug("mixer[idx]=%d added\n", idx);
769 if (ret_val) {
770 pr_err("in adding of control index = %d\n", idx);
771 break;
772 }
773 }
774 return ret_val;
775}
776
777static int snd_intelmad_dev_free(struct snd_device *device)
778{
779 struct snd_intelmad *intelmaddata;
780
781 WARN_ON(!device);
782
783 intelmaddata = device->device_data;
784
785 pr_debug("snd_intelmad_dev_free called\n");
786 unregister_sst_card(intelmaddata->sstdrv_ops);
787
788 /* free allocated memory for internal context */
789 destroy_workqueue(intelmaddata->mad_jack_wq);
790 device->device_data = NULL;
791 kfree(intelmaddata->sstdrv_ops);
792 kfree(intelmaddata);
793
794 return 0;
795}
796
797static int __devinit snd_intelmad_create(
798 struct snd_intelmad *intelmaddata,
799 struct snd_card *card)
800{
801 int ret_val;
802 static struct snd_device_ops ops = {
803 .dev_free = snd_intelmad_dev_free,
804 };
805
806 WARN_ON(!intelmaddata);
807 WARN_ON(!card);
808 /* ALSA api to register for the device */
809 ret_val = snd_device_new(card, SNDRV_DEV_LOWLEVEL, intelmaddata, &ops);
810 return ret_val;
811}
812
813/**
814* snd_intelmad_probe- function registred for init
815* @pdev : pointer to the device struture
816* This function is called when the device is initialized
817*/
818int __devinit snd_intelmad_probe(struct platform_device *pdev)
819{
820 struct snd_card *card;
821 int ret_val;
822 struct snd_intelmad *intelmaddata;
823 const struct platform_device_id *id = platform_get_device_id(pdev);
824 struct snd_intelmad_probe_info *info = (void *)id->driver_data;
825
826 pr_debug("probe for %s cpu_id %d\n", pdev->name, info->cpu_id);
827 pr_debug("rq_chache %x of size %x\n", info->irq_cache, info->size);
828 if (!strcmp(pdev->name, DRIVER_NAME_MRST))
829 pr_debug("detected MRST\n");
830 else if (!strcmp(pdev->name, DRIVER_NAME_MFLD))
831 pr_debug("detected MFLD\n");
832 else {
833 pr_err("detected unknown device abort!!\n");
834 return -EIO;
835 }
836 if ((info->cpu_id < CPU_CHIP_LINCROFT) ||
837 (info->cpu_id > CPU_CHIP_PENWELL)) {
838 pr_err("detected unknown cpu_id abort!!\n");
839 return -EIO;
840 }
841 /* allocate memory for saving internal context and working */
842 intelmaddata = kzalloc(sizeof(*intelmaddata), GFP_KERNEL);
843 if (!intelmaddata) {
844 pr_debug("mem alloctn fail\n");
845 return -ENOMEM;
846 }
847 intelmad_drv = intelmaddata;
848
849 /* allocate memory for LPE API set */
850 intelmaddata->sstdrv_ops = kzalloc(sizeof(struct intel_sst_card_ops),
851 GFP_KERNEL);
852 if (!intelmaddata->sstdrv_ops) {
853 pr_err("mem allocation for ops fail\n");
854 kfree(intelmaddata);
855 return -ENOMEM;
856 }
857
858 intelmaddata->cpu_id = info->cpu_id;
859 /* create a card instance with ALSA framework */
860 ret_val = snd_card_create(card_index, card_id, THIS_MODULE, 0, &card);
861 if (ret_val) {
862 pr_err("snd_card_create fail\n");
863 goto free_allocs;
864 }
865
866 intelmaddata->pdev = pdev;
867 intelmaddata->irq = platform_get_irq(pdev, 0);
868 platform_set_drvdata(pdev, intelmaddata);
869 intelmaddata->card = card;
870 intelmaddata->card_id = card_id;
871 intelmaddata->card_index = card_index;
872 intelmaddata->master_mute = UNMUTE;
873 intelmaddata->playback_cnt = intelmaddata->capture_cnt = 0;
874 strncpy(card->driver, INTEL_MAD, strlen(INTEL_MAD));
875 strncpy(card->shortname, INTEL_MAD, strlen(INTEL_MAD));
876
877 intelmaddata->sstdrv_ops->module_name = SST_CARD_NAMES;
878 /* registering with LPE driver to get access to SST APIs to use */
879 ret_val = snd_intelmad_sst_register(intelmaddata);
880 if (ret_val) {
881 pr_err("snd_intelmad_sst_register failed\n");
882 goto set_null_data;
883 }
884
885 intelmaddata->pmic_status = PMIC_INIT;
886
887 ret_val = snd_intelmad_pcm(card, intelmaddata);
888 if (ret_val) {
889 pr_err("snd_intelmad_pcm failed\n");
890 goto free_sst;
891 }
892
893 ret_val = snd_intelmad_mixer(intelmaddata);
894 if (ret_val) {
895 pr_err("snd_intelmad_mixer failed\n");
896 goto free_card;
897 }
898
899 ret_val = snd_intelmad_jack(intelmaddata);
900 if (ret_val) {
901 pr_err("snd_intelmad_jack failed\n");
902 goto free_card;
903 }
904 intelmaddata->adc_address = mid_initialize_adc();
905
906 /*create work queue for jack interrupt*/
907 INIT_WORK(&intelmaddata->mad_jack_msg.wq,
908 sst_process_mad_jack_detection);
909
910 intelmaddata->mad_jack_wq = create_workqueue("sst_mad_jack_wq");
911 if (!intelmaddata->mad_jack_wq)
912 goto free_card;
913
914 ret_val = snd_intelmad_register_irq(intelmaddata,
915 info->irq_cache, info->size);
916 if (ret_val) {
917 pr_err("snd_intelmad_register_irq fail\n");
918 goto free_mad_jack_wq;
919 }
920
921 /* internal function call to register device with ALSA */
922 ret_val = snd_intelmad_create(intelmaddata, card);
923 if (ret_val) {
924 pr_err("snd_intelmad_create failed\n");
925 goto set_pvt_data;
926 }
927 card->private_data = &intelmaddata;
928 snd_card_set_dev(card, &pdev->dev);
929 ret_val = snd_card_register(card);
930 if (ret_val) {
931 pr_err("snd_card_register failed\n");
932 goto set_pvt_data;
933 }
934 if (pdev->dev.platform_data) {
935 int gpio_amp = *(int *)pdev->dev.platform_data;
936 if (gpio_request_one(gpio_amp, GPIOF_OUT_INIT_LOW, "amp power"))
937 gpio_amp = 0;
938 intelmaddata->sstdrv_ops->scard_ops->gpio_amp = gpio_amp;
939 }
940
941 pr_debug("snd_intelmad_probe complete\n");
942 return ret_val;
943
944set_pvt_data:
945 card->private_data = NULL;
946free_mad_jack_wq:
947 destroy_workqueue(intelmaddata->mad_jack_wq);
948free_card:
949 snd_card_free(intelmaddata->card);
950free_sst:
951 unregister_sst_card(intelmaddata->sstdrv_ops);
952set_null_data:
953 platform_set_drvdata(pdev, NULL);
954free_allocs:
955 pr_err("probe failed\n");
956 snd_card_free(card);
957 kfree(intelmaddata->sstdrv_ops);
958 kfree(intelmaddata);
959 return ret_val;
960}
961
962
963static int snd_intelmad_remove(struct platform_device *pdev)
964{
965 struct snd_intelmad *intelmaddata = platform_get_drvdata(pdev);
966
967 if (intelmaddata) {
968 if (intelmaddata->sstdrv_ops->scard_ops->gpio_amp)
969 gpio_free(intelmaddata->sstdrv_ops->scard_ops->gpio_amp);
970 free_irq(intelmaddata->irq, intelmaddata);
971 snd_card_free(intelmaddata->card);
972 }
973 intelmad_drv = NULL;
974 platform_set_drvdata(pdev, NULL);
975 return 0;
976}
977
978/*********************************************************************
979 * Driver initialization and exit
980 *********************************************************************/
981static const struct platform_device_id snd_intelmad_ids[] = {
982 {DRIVER_NAME_MRST, INFO(CPU_CHIP_LINCROFT, AUDINT_BASE, 1)},
983 {DRIVER_NAME_MFLD, INFO(CPU_CHIP_PENWELL, 0xFFFF7FCD, 1)},
984 {"", 0},
985
986};
987
988static struct platform_driver snd_intelmad_driver = {
989 .driver = {
990 .owner = THIS_MODULE,
991 .name = "intel_mid_sound_card",
992 },
993 .id_table = snd_intelmad_ids,
994 .probe = snd_intelmad_probe,
995 .remove = __devexit_p(snd_intelmad_remove),
996};
997
998/*
999 * alsa_card_intelmad_init- driver init function
1000 *
1001 * This function is called when driver module is inserted
1002 */
1003static int __init alsa_card_intelmad_init(void)
1004{
1005 pr_debug("mad_init called\n");
1006 return platform_driver_register(&snd_intelmad_driver);
1007}
1008
1009/**
1010 * alsa_card_intelmad_exit- driver exit function
1011 *
1012 * This function is called when driver module is removed
1013 */
1014static void __exit alsa_card_intelmad_exit(void)
1015{
1016 pr_debug("mad_exit called\n");
1017 return platform_driver_unregister(&snd_intelmad_driver);
1018}
1019
1020module_init(alsa_card_intelmad_init)
1021module_exit(alsa_card_intelmad_exit)
1022
diff --git a/drivers/staging/intel_sst/intelmid.h b/drivers/staging/intel_sst/intelmid.h
deleted file mode 100644
index 14a7ba078b7c..000000000000
--- a/drivers/staging/intel_sst/intelmid.h
+++ /dev/null
@@ -1,209 +0,0 @@
1/*
2 * intelmid.h - Intel Sound card driver for MID
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Harsha Priya <priya.harsha@intel.com>
6 * Vinod Koul <vinod.koul@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 * ALSA driver header for Intel MAD chipset
26 */
27#ifndef __INTELMID_H
28#define __INTELMID_H
29
30#include <linux/time.h>
31#include <sound/jack.h>
32
33#define DRIVER_NAME_MFLD "msic_audio"
34#define DRIVER_NAME_MRST "pmic_audio"
35#define DRIVER_NAME "intelmid_audio"
36#define PMIC_SOUND_IRQ_TYPE_MASK (1 << 15)
37#define AUDINT_BASE (0xFFFFEFF8 + (6 * sizeof(u8)))
38#define REG_IRQ
39/* values #defined */
40/* will differ for different hw - to be taken from config */
41#define MAX_DEVICES 1
42#define MIN_RATE 8000
43#define MAX_RATE 48000
44#define MAX_BUFFER (800*1024) /* for PCM */
45#define MIN_BUFFER (800*1024)
46#define MAX_PERIODS (1024*2)
47#define MIN_PERIODS 2
48#define MAX_PERIOD_BYTES MAX_BUFFER
49#define MIN_PERIOD_BYTES 32
50/*#define MIN_PERIOD_BYTES 160*/
51#define MAX_MUTE 1
52#define MIN_MUTE 0
53#define MONO_CNTL 1
54#define STEREO_CNTL 2
55#define MIN_CHANNEL 1
56#define MAX_CHANNEL_AMIC 2
57#define MAX_CHANNEL_DMIC 5
58#define FIFO_SIZE 0 /* fifo not being used */
59#define INTEL_MAD "Intel MAD"
60#define MAX_CTRL_MRST 8
61#define MAX_CTRL_MFLD 7
62#define MAX_CTRL 8
63#define MAX_VENDORS 4
64/* TODO +6 db */
65#define MAX_VOL 64
66/* TODO -57 db */
67#define MIN_VOL 0
68#define PLAYBACK_COUNT 1
69#define CAPTURE_COUNT 1
70#define ADC_ONE_LSB_MULTIPLIER 2346
71
72#define MID_JACK_HS_LONG_PRESS SND_JACK_BTN_0
73#define MID_JACK_HS_SHORT_PRESS SND_JACK_BTN_1
74
75extern int sst_card_vendor_id;
76
77struct mad_jack {
78 struct snd_jack jack;
79 int jack_status;
80 int jack_dev_state;
81 struct timeval buttonpressed;
82 struct timeval buttonreleased;
83};
84
85struct mad_jack_msg_wq {
86 u8 intsts;
87 struct snd_intelmad *intelmaddata;
88 struct work_struct wq;
89
90};
91
92struct snd_intelmad_probe_info {
93 unsigned int cpu_id;
94 unsigned int irq_cache;
95 unsigned int size;
96};
97
98/**
99 * struct snd_intelmad - intelmad driver structure
100 *
101 * @card: ptr to the card details
102 * @card_index: sound card index
103 * @card_id: sound card id detected
104 * @sstdrv_ops: ptr to sst driver ops
105 * @pdev: ptr to platform device
106 * @irq: interrupt number detected
107 * @pmic_status: Device status of sound card
108 * @int_base: ptr to MMIO interrupt region
109 * @output_sel: device selected as o/p
110 * @input_sel: device selected as i/p
111 * @master_mute: master mute status
112 * @jack: jack status
113 * @playback_cnt: active pb streams
114 * @capture_cnt: active cp streams
115 * @mad_jack_msg: wq struct for jack interrupt processing
116 * @mad_jack_wq: wq for jack interrupt processing
117 * @jack_prev_state: Previos state of jack detected
118 * @cpu_id: current cpu id loaded for
119 */
120struct snd_intelmad {
121 struct snd_card *card; /* ptr to the card details */
122 int card_index;/* card index */
123 char *card_id; /* card id */
124 struct intel_sst_card_ops *sstdrv_ops;/* ptr to sst driver ops */
125 struct platform_device *pdev;
126 int irq;
127 int pmic_status;
128 void __iomem *int_base;
129 int output_sel;
130 int input_sel;
131 int lineout_sel;
132 int master_mute;
133 struct mad_jack jack[4];
134 int playback_cnt;
135 int capture_cnt;
136 u16 adc_address;
137 struct mad_jack_msg_wq mad_jack_msg;
138 struct workqueue_struct *mad_jack_wq;
139 u8 jack_prev_state;
140 unsigned int cpu_id;
141};
142
143struct snd_control_val {
144 int playback_vol_max;
145 int playback_vol_min;
146 int capture_vol_max;
147 int capture_vol_min;
148 int master_vol_max;
149 int master_vol_min;
150};
151
152struct mad_stream_pvt {
153 int stream_status;
154 int stream_ops;
155 struct snd_pcm_substream *substream;
156 struct pcm_stream_info stream_info;
157 ssize_t dbg_cum_bytes;
158 enum snd_sst_device_type device;
159};
160
161enum mad_drv_status {
162 INIT = 1,
163 STARTED,
164 RUNNING,
165 PAUSED,
166 DROPPED,
167};
168
169enum mad_pmic_status {
170 PMIC_UNINIT = 1,
171 PMIC_INIT,
172};
173enum _widget_ctrl {
174 OUTPUT_SEL = 1,
175 INPUT_SEL,
176 PLAYBACK_VOL,
177 PLAYBACK_MUTE,
178 CAPTURE_VOL,
179 CAPTURE_MUTE,
180 MASTER_VOL,
181 MASTER_MUTE
182};
183enum _widget_ctrl_mfld {
184 LINEOUT_SEL_MFLD = 3,
185};
186enum hw_chs {
187 HW_CH0 = 0,
188 HW_CH1,
189 HW_CH2,
190 HW_CH3
191};
192
193void period_elapsed(void *mad_substream);
194int snd_intelmad_alloc_stream(struct snd_pcm_substream *substream);
195int snd_intelmad_init_stream(struct snd_pcm_substream *substream);
196
197int sst_sc_reg_access(struct sc_reg_access *sc_access,
198 int type, int num_val);
199#define CPU_CHIP_LINCROFT 1 /* System running lincroft */
200#define CPU_CHIP_PENWELL 2 /* System running penwell */
201
202extern struct snd_control_val intelmad_ctrl_val[];
203extern struct snd_kcontrol_new snd_intelmad_controls_mrst[];
204extern struct snd_kcontrol_new snd_intelmad_controls_mfld[];
205extern struct snd_pmic_ops *intelmad_vendor_ops[];
206void sst_mad_send_jack_report(struct snd_jack *jack,
207 int buttonpressevent , int status);
208
209#endif /* __INTELMID_H */
diff --git a/drivers/staging/intel_sst/intelmid_adc_control.h b/drivers/staging/intel_sst/intelmid_adc_control.h
deleted file mode 100644
index 65d5c3988762..000000000000
--- a/drivers/staging/intel_sst/intelmid_adc_control.h
+++ /dev/null
@@ -1,193 +0,0 @@
1#ifndef __INTELMID_ADC_CONTROL_H__
2#define __INTELMID_ADC_CONTROL_H_
3/*
4 * intelmid_adc_control.h - Intel SST Driver for audio engine
5 *
6 * Copyright (C) 2008-10 Intel Corporation
7 * Authors: R Durgadadoss <r.durgadoss@intel.com>
8 * Dharageswari R <dharageswari.r@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * Common private ADC declarations for SST
27 */
28
29
30#define MSIC_ADC1CNTL1 0x1C0
31#define MSIC_ADC_ENBL 0x10
32#define MSIC_ADC_START 0x08
33
34#define MSIC_ADC1CNTL3 0x1C2
35#define MSIC_ADCTHERM_ENBL 0x04
36#define MSIC_ADCRRDATA_ENBL 0x05
37
38#define MSIC_STOPBIT_MASK 16
39#define MSIC_ADCTHERM_MASK 4
40
41#define ADC_CHANLS_MAX 15 /* Number of ADC channels */
42#define ADC_LOOP_MAX (ADC_CHANLS_MAX - 1)
43
44/* ADC channel code values */
45#define AUDIO_DETECT_CODE 0x06
46
47/* ADC base addresses */
48#define ADC_CHNL_START_ADDR 0x1C5 /* increments by 1 */
49#define ADC_DATA_START_ADDR 0x1D4 /* increments by 2 */
50
51
52/**
53 * configure_adc - enables/disables the ADC for conversion
54 * @val: zero: disables the ADC non-zero:enables the ADC
55 *
56 * Enable/Disable the ADC depending on the argument
57 *
58 * Can sleep
59 */
60static inline int configure_adc(int val)
61{
62 int ret;
63 struct sc_reg_access sc_access = {0,};
64
65
66 sc_access.reg_addr = MSIC_ADC1CNTL1;
67 ret = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
68 if (ret)
69 return ret;
70
71 if (val)
72 /* Enable and start the ADC */
73 sc_access.value |= (MSIC_ADC_ENBL | MSIC_ADC_START);
74 else
75 /* Just stop the ADC */
76 sc_access.value &= (~MSIC_ADC_START);
77 sc_access.reg_addr = MSIC_ADC1CNTL1;
78 return sst_sc_reg_access(&sc_access, PMIC_WRITE, 1);
79}
80
81/**
82 * reset_stopbit - sets the stop bit to 0 on the given channel
83 * @addr: address of the channel
84 *
85 * Can sleep
86 */
87static inline int reset_stopbit(uint16_t addr)
88{
89 int ret;
90 struct sc_reg_access sc_access = {0,};
91 sc_access.reg_addr = addr;
92 ret = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
93 if (ret)
94 return ret;
95 /* Set the stop bit to zero */
96 sc_access.reg_addr = addr;
97 sc_access.value = (sc_access.value) & 0xEF;
98 return sst_sc_reg_access(&sc_access, PMIC_WRITE, 1);
99}
100
101/**
102 * find_free_channel - finds an empty channel for conversion
103 *
104 * If the ADC is not enabled then start using 0th channel
105 * itself. Otherwise find an empty channel by looking for a
106 * channel in which the stopbit is set to 1. returns the index
107 * of the first free channel if succeeds or an error code.
108 *
109 * Context: can sleep
110 *
111 */
112static inline int find_free_channel(void)
113{
114 int ret;
115 int i;
116
117 struct sc_reg_access sc_access = {0,};
118
119 /* check whether ADC is enabled */
120 sc_access.reg_addr = MSIC_ADC1CNTL1;
121 ret = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
122 if (ret)
123 return ret;
124
125 if ((sc_access.value & MSIC_ADC_ENBL) == 0)
126 return 0;
127
128 /* ADC is already enabled; Looking for an empty channel */
129 for (i = 0; i < ADC_CHANLS_MAX; i++) {
130
131 sc_access.reg_addr = ADC_CHNL_START_ADDR + i;
132 ret = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
133 if (ret)
134 return ret;
135
136 if (sc_access.value & MSIC_STOPBIT_MASK) {
137 ret = i;
138 break;
139 }
140 }
141 return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
142}
143
144/**
145 * mid_initialize_adc - initializing the ADC
146 * @dev: our device structure
147 *
148 * Initialize the ADC for reading thermistor values. Can sleep.
149 */
150static inline int mid_initialize_adc(void)
151{
152 int base_addr, chnl_addr;
153 int ret;
154 static int channel_index;
155 struct sc_reg_access sc_access = {0,};
156
157 /* Index of the first channel in which the stop bit is set */
158 channel_index = find_free_channel();
159 if (channel_index < 0) {
160 pr_err("No free ADC channels");
161 return channel_index;
162 }
163
164 base_addr = ADC_CHNL_START_ADDR + channel_index;
165
166 if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) {
167 /* Reset stop bit for channels other than 0 and 12 */
168 ret = reset_stopbit(base_addr);
169 if (ret)
170 return ret;
171
172 /* Index of the first free channel */
173 base_addr++;
174 channel_index++;
175 }
176
177 /* Since this is the last channel, set the stop bit
178 to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
179 sc_access.reg_addr = base_addr;
180 sc_access.value = AUDIO_DETECT_CODE | 0x10;
181 ret = sst_sc_reg_access(&sc_access, PMIC_WRITE, 1);
182 if (ret) {
183 pr_err("unable to enable ADC");
184 return ret;
185 }
186
187 chnl_addr = ADC_DATA_START_ADDR + 2 * channel_index;
188 pr_debug("mid_initialize : %x", chnl_addr);
189 configure_adc(1);
190 return chnl_addr;
191}
192#endif
193
diff --git a/drivers/staging/intel_sst/intelmid_ctrl.c b/drivers/staging/intel_sst/intelmid_ctrl.c
deleted file mode 100644
index 19ec474b362a..000000000000
--- a/drivers/staging/intel_sst/intelmid_ctrl.c
+++ /dev/null
@@ -1,921 +0,0 @@
1/*
2 * intelmid_ctrl.c - Intel Sound card driver for MID
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Harsha Priya <priya.harsha@intel.com>
6 * Vinod Koul <vinod.koul@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 * ALSA driver handling mixer controls for Intel MAD chipset
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <sound/core.h>
31#include <sound/control.h>
32#include "intel_sst.h"
33#include "intel_sst_ioctl.h"
34#include "intelmid_snd_control.h"
35#include "intelmid.h"
36
37#define HW_CH_BASE 4
38
39
40#define HW_CH_0 "Hw1"
41#define HW_CH_1 "Hw2"
42#define HW_CH_2 "Hw3"
43#define HW_CH_3 "Hw4"
44
45static char *router_dmics[] = { "DMIC1",
46 "DMIC2",
47 "DMIC3",
48 "DMIC4",
49 "DMIC5",
50 "DMIC6"
51 };
52
53static char *out_names_mrst[] = {"Headphones",
54 "Internal speakers"};
55static char *in_names_mrst[] = {"AMIC",
56 "DMIC",
57 "HS_MIC"};
58static char *line_out_names_mfld[] = {"Headset",
59 "IHF ",
60 "Vibra1 ",
61 "Vibra2 ",
62 "NONE "};
63static char *out_names_mfld[] = {"Headset ",
64 "EarPiece "};
65static char *in_names_mfld[] = {"AMIC",
66 "DMIC"};
67
68struct snd_control_val intelmad_ctrl_val[MAX_VENDORS] = {
69 {
70 .playback_vol_max = 63,
71 .playback_vol_min = 0,
72 .capture_vol_max = 63,
73 .capture_vol_min = 0,
74 },
75 {
76 .playback_vol_max = 0,
77 .playback_vol_min = -31,
78 .capture_vol_max = 0,
79 .capture_vol_min = -20,
80 },
81 {
82 .playback_vol_max = 0,
83 .playback_vol_min = -31,
84 .capture_vol_max = 0,
85 .capture_vol_min = -31,
86 .master_vol_max = 0,
87 .master_vol_min = -126,
88 },
89};
90
91/* control path functionalities */
92
93static inline int snd_intelmad_volume_info(struct snd_ctl_elem_info *uinfo,
94 int control_type, int max, int min)
95{
96 WARN_ON(!uinfo);
97
98 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
99 uinfo->count = control_type;
100 uinfo->value.integer.min = min;
101 uinfo->value.integer.max = max;
102 return 0;
103}
104
105/**
106* snd_intelmad_mute_info - provides information about the mute controls
107*
108* @kcontrol: pointer to the control
109* @uinfo: pointer to the structure where the control's info need
110* to be filled
111*
112* This function is called when a mixer application requests for control's info
113*/
114static int snd_intelmad_mute_info(struct snd_kcontrol *kcontrol,
115 struct snd_ctl_elem_info *uinfo)
116{
117 WARN_ON(!uinfo);
118 WARN_ON(!kcontrol);
119
120 /* set up the mute as a boolean mono control with min-max values */
121 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
122 uinfo->count = MONO_CNTL;
123 uinfo->value.integer.min = MIN_MUTE;
124 uinfo->value.integer.max = MAX_MUTE;
125 return 0;
126}
127
128/**
129* snd_intelmad_capture_volume_info - provides info about the volume control
130*
131* @kcontrol: pointer to the control
132* @uinfo: pointer to the structure where the control's info need
133* to be filled
134*
135* This function is called when a mixer application requests for control's info
136*/
137static int snd_intelmad_capture_volume_info(struct snd_kcontrol *kcontrol,
138 struct snd_ctl_elem_info *uinfo)
139{
140 snd_intelmad_volume_info(uinfo, MONO_CNTL,
141 intelmad_ctrl_val[sst_card_vendor_id].capture_vol_max,
142 intelmad_ctrl_val[sst_card_vendor_id].capture_vol_min);
143 return 0;
144}
145
146/**
147* snd_intelmad_playback_volume_info - provides info about the volume control
148*
149* @kcontrol: pointer to the control
150* @uinfo: pointer to the structure where the control's info need
151* to be filled
152*
153* This function is called when a mixer application requests for control's info
154*/
155static int snd_intelmad_playback_volume_info(struct snd_kcontrol *kcontrol,
156 struct snd_ctl_elem_info *uinfo)
157{
158 snd_intelmad_volume_info(uinfo, STEREO_CNTL,
159 intelmad_ctrl_val[sst_card_vendor_id].playback_vol_max,
160 intelmad_ctrl_val[sst_card_vendor_id].playback_vol_min);
161 return 0;
162}
163
164static int snd_intelmad_master_volume_info(struct snd_kcontrol *kcontrol,
165 struct snd_ctl_elem_info *uinfo)
166{
167 snd_intelmad_volume_info(uinfo, STEREO_CNTL,
168 intelmad_ctrl_val[sst_card_vendor_id].master_vol_max,
169 intelmad_ctrl_val[sst_card_vendor_id].master_vol_min);
170 return 0;
171}
172
173/**
174* snd_intelmad_device_info_mrst - provides information about the devices available
175*
176* @kcontrol: pointer to the control
177* @uinfo: pointer to the structure where the devices's info need
178* to be filled
179*
180* This function is called when a mixer application requests for device's info
181*/
182static int snd_intelmad_device_info_mrst(struct snd_kcontrol *kcontrol,
183 struct snd_ctl_elem_info *uinfo)
184{
185
186 WARN_ON(!kcontrol);
187 WARN_ON(!uinfo);
188
189 /* setup device select as drop down controls with different values */
190 if (kcontrol->id.numid == OUTPUT_SEL)
191 uinfo->value.enumerated.items = ARRAY_SIZE(out_names_mrst);
192 else
193 uinfo->value.enumerated.items = ARRAY_SIZE(in_names_mrst);
194 uinfo->count = MONO_CNTL;
195 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
196
197 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
198 uinfo->value.enumerated.item = 1;
199 if (kcontrol->id.numid == OUTPUT_SEL)
200 strncpy(uinfo->value.enumerated.name,
201 out_names_mrst[uinfo->value.enumerated.item],
202 sizeof(uinfo->value.enumerated.name)-1);
203 else
204 strncpy(uinfo->value.enumerated.name,
205 in_names_mrst[uinfo->value.enumerated.item],
206 sizeof(uinfo->value.enumerated.name)-1);
207 return 0;
208}
209
210static int snd_intelmad_device_info_mfld(struct snd_kcontrol *kcontrol,
211 struct snd_ctl_elem_info *uinfo)
212{
213 struct snd_pmic_ops *scard_ops;
214 struct snd_intelmad *intelmaddata;
215
216 WARN_ON(!kcontrol);
217 WARN_ON(!uinfo);
218
219 intelmaddata = kcontrol->private_data;
220
221 WARN_ON(!intelmaddata->sstdrv_ops);
222
223 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
224 /* setup device select as drop down controls with different values */
225 if (kcontrol->id.numid == OUTPUT_SEL)
226 uinfo->value.enumerated.items = ARRAY_SIZE(out_names_mfld);
227 else if (kcontrol->id.numid == INPUT_SEL)
228 uinfo->value.enumerated.items = ARRAY_SIZE(in_names_mfld);
229 else if (kcontrol->id.numid == LINEOUT_SEL_MFLD) {
230 uinfo->value.enumerated.items = ARRAY_SIZE(line_out_names_mfld);
231 scard_ops->line_out_names_cnt = uinfo->value.enumerated.items;
232 } else
233 return -EINVAL;
234 uinfo->count = MONO_CNTL;
235 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
236
237 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
238 uinfo->value.enumerated.item = 1;
239 if (kcontrol->id.numid == OUTPUT_SEL)
240 strncpy(uinfo->value.enumerated.name,
241 out_names_mfld[uinfo->value.enumerated.item],
242 sizeof(uinfo->value.enumerated.name)-1);
243 else if (kcontrol->id.numid == INPUT_SEL)
244 strncpy(uinfo->value.enumerated.name,
245 in_names_mfld[uinfo->value.enumerated.item],
246 sizeof(uinfo->value.enumerated.name)-1);
247 else if (kcontrol->id.numid == LINEOUT_SEL_MFLD)
248 strncpy(uinfo->value.enumerated.name,
249 line_out_names_mfld[uinfo->value.enumerated.item],
250 sizeof(uinfo->value.enumerated.name)-1);
251 else
252 return -EINVAL;
253 return 0;
254}
255
256/**
257* snd_intelmad_volume_get - gets the current volume for the control
258*
259* @kcontrol: pointer to the control
260* @uval: pointer to the structure where the control's info need
261* to be filled
262*
263* This function is called when .get function of a control is invoked from app
264*/
265static int snd_intelmad_volume_get(struct snd_kcontrol *kcontrol,
266 struct snd_ctl_elem_value *uval)
267{
268 int ret_val = 0, cntl_list[2] = {0,};
269 int value = 0;
270 struct snd_intelmad *intelmaddata;
271 struct snd_pmic_ops *scard_ops;
272
273 pr_debug("snd_intelmad_volume_get called\n");
274
275 WARN_ON(!uval);
276 WARN_ON(!kcontrol);
277
278 intelmaddata = kcontrol->private_data;
279
280 WARN_ON(!intelmaddata->sstdrv_ops);
281
282 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
283
284 WARN_ON(!scard_ops);
285
286 switch (kcontrol->id.numid) {
287 case PLAYBACK_VOL:
288 cntl_list[0] = PMIC_SND_RIGHT_PB_VOL;
289 cntl_list[1] = PMIC_SND_LEFT_PB_VOL;
290 break;
291
292 case CAPTURE_VOL:
293 cntl_list[0] = PMIC_SND_CAPTURE_VOL;
294 break;
295
296 case MASTER_VOL:
297 cntl_list[0] = PMIC_SND_RIGHT_MASTER_VOL;
298 cntl_list[1] = PMIC_SND_LEFT_MASTER_VOL;
299 break;
300 default:
301 return -EINVAL;
302 }
303
304 ret_val = scard_ops->get_vol(cntl_list[0], &value);
305 uval->value.integer.value[0] = value;
306
307 if (ret_val)
308 return ret_val;
309
310 if (kcontrol->id.numid == PLAYBACK_VOL ||
311 kcontrol->id.numid == MASTER_VOL) {
312 ret_val = scard_ops->get_vol(cntl_list[1], &value);
313 uval->value.integer.value[1] = value;
314 }
315 return ret_val;
316}
317
318/**
319* snd_intelmad_mute_get - gets the current mute status for the control
320*
321* @kcontrol: pointer to the control
322* @uval: pointer to the structure where the control's info need
323* to be filled
324*
325* This function is called when .get function of a control is invoked from app
326*/
327static int snd_intelmad_mute_get(struct snd_kcontrol *kcontrol,
328 struct snd_ctl_elem_value *uval)
329{
330
331 int cntl_list = 0, ret_val = 0;
332 u8 value = 0;
333 struct snd_intelmad *intelmaddata;
334 struct snd_pmic_ops *scard_ops;
335
336 pr_debug("Mute_get called\n");
337
338 WARN_ON(!uval);
339 WARN_ON(!kcontrol);
340
341 intelmaddata = kcontrol->private_data;
342
343 WARN_ON(!intelmaddata->sstdrv_ops);
344
345 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
346
347 WARN_ON(!scard_ops);
348
349 switch (kcontrol->id.numid) {
350 case PLAYBACK_MUTE:
351 if (intelmaddata->output_sel == STEREO_HEADPHONE)
352 cntl_list = PMIC_SND_LEFT_HP_MUTE;
353 else if ((intelmaddata->output_sel == INTERNAL_SPKR) ||
354 (intelmaddata->output_sel == MONO_EARPIECE))
355 cntl_list = PMIC_SND_LEFT_SPEAKER_MUTE;
356 break;
357
358 case CAPTURE_MUTE:
359 if (intelmaddata->input_sel == DMIC)
360 cntl_list = PMIC_SND_DMIC_MUTE;
361 else if (intelmaddata->input_sel == AMIC)
362 cntl_list = PMIC_SND_AMIC_MUTE;
363 else if (intelmaddata->input_sel == HS_MIC)
364 cntl_list = PMIC_SND_HP_MIC_MUTE;
365 break;
366 case MASTER_MUTE:
367 uval->value.integer.value[0] = intelmaddata->master_mute;
368 return 0;
369 default:
370 return -EINVAL;
371 }
372
373 ret_val = scard_ops->get_mute(cntl_list, &value);
374 uval->value.integer.value[0] = value;
375 return ret_val;
376}
377
378/**
379* snd_intelmad_volume_set - sets the volume control's info
380*
381* @kcontrol: pointer to the control
382* @uval: pointer to the structure where the control's info is
383* available to be set
384*
385* This function is called when .set function of a control is invoked from app
386*/
387static int snd_intelmad_volume_set(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_value *uval)
389{
390
391 int ret_val, cntl_list[2] = {0,};
392 struct snd_intelmad *intelmaddata;
393 struct snd_pmic_ops *scard_ops;
394
395 pr_debug("volume set called:%ld %ld\n",
396 uval->value.integer.value[0],
397 uval->value.integer.value[1]);
398
399 WARN_ON(!uval);
400 WARN_ON(!kcontrol);
401
402 intelmaddata = kcontrol->private_data;
403
404 WARN_ON(!intelmaddata->sstdrv_ops);
405
406 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
407
408 WARN_ON(!scard_ops);
409
410 switch (kcontrol->id.numid) {
411 case PLAYBACK_VOL:
412 cntl_list[0] = PMIC_SND_LEFT_PB_VOL;
413 cntl_list[1] = PMIC_SND_RIGHT_PB_VOL;
414 break;
415
416 case CAPTURE_VOL:
417 cntl_list[0] = PMIC_SND_CAPTURE_VOL;
418 break;
419
420 case MASTER_VOL:
421 cntl_list[0] = PMIC_SND_LEFT_MASTER_VOL;
422 cntl_list[1] = PMIC_SND_RIGHT_MASTER_VOL;
423 break;
424
425 default:
426 return -EINVAL;
427 }
428
429 ret_val = scard_ops->set_vol(cntl_list[0],
430 uval->value.integer.value[0]);
431 if (ret_val)
432 return ret_val;
433
434 if (kcontrol->id.numid == PLAYBACK_VOL ||
435 kcontrol->id.numid == MASTER_VOL)
436 ret_val = scard_ops->set_vol(cntl_list[1],
437 uval->value.integer.value[1]);
438 return ret_val;
439}
440
441/**
442* snd_intelmad_mute_set - sets the mute control's info
443*
444* @kcontrol: pointer to the control
445* @uval: pointer to the structure where the control's info is
446* available to be set
447*
448* This function is called when .set function of a control is invoked from app
449*/
450static int snd_intelmad_mute_set(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *uval)
452{
453 int cntl_list[2] = {0,}, ret_val;
454 struct snd_intelmad *intelmaddata;
455 struct snd_pmic_ops *scard_ops;
456
457 pr_debug("snd_intelmad_mute_set called\n");
458
459 WARN_ON(!uval);
460 WARN_ON(!kcontrol);
461
462 intelmaddata = kcontrol->private_data;
463
464 WARN_ON(!intelmaddata->sstdrv_ops);
465
466 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
467
468 WARN_ON(!scard_ops);
469
470 kcontrol->private_value = uval->value.integer.value[0];
471
472 switch (kcontrol->id.numid) {
473 case PLAYBACK_MUTE:
474 if (intelmaddata->output_sel == STEREO_HEADPHONE) {
475 cntl_list[0] = PMIC_SND_LEFT_HP_MUTE;
476 cntl_list[1] = PMIC_SND_RIGHT_HP_MUTE;
477 } else if ((intelmaddata->output_sel == INTERNAL_SPKR) ||
478 (intelmaddata->output_sel == MONO_EARPIECE)) {
479 cntl_list[0] = PMIC_SND_LEFT_SPEAKER_MUTE;
480 cntl_list[1] = PMIC_SND_RIGHT_SPEAKER_MUTE;
481 }
482 break;
483
484 case CAPTURE_MUTE:/*based on sel device mute the i/p dev*/
485 if (intelmaddata->input_sel == DMIC)
486 cntl_list[0] = PMIC_SND_DMIC_MUTE;
487 else if (intelmaddata->input_sel == AMIC)
488 cntl_list[0] = PMIC_SND_AMIC_MUTE;
489 else if (intelmaddata->input_sel == HS_MIC)
490 cntl_list[0] = PMIC_SND_HP_MIC_MUTE;
491 break;
492 case MASTER_MUTE:
493 cntl_list[0] = PMIC_SND_MUTE_ALL;
494 intelmaddata->master_mute = uval->value.integer.value[0];
495 break;
496 default:
497 return -EINVAL;
498 }
499
500 ret_val = scard_ops->set_mute(cntl_list[0],
501 uval->value.integer.value[0]);
502 if (ret_val)
503 return ret_val;
504
505 if (kcontrol->id.numid == PLAYBACK_MUTE)
506 ret_val = scard_ops->set_mute(cntl_list[1],
507 uval->value.integer.value[0]);
508 return ret_val;
509}
510
511/**
512* snd_intelmad_device_get - get the device select control's info
513*
514* @kcontrol: pointer to the control
515* @uval: pointer to the structure where the control's info is
516* to be filled
517*
518* This function is called when .get function of a control is invoked from app
519*/
520static int snd_intelmad_device_get(struct snd_kcontrol *kcontrol,
521 struct snd_ctl_elem_value *uval)
522{
523 struct snd_intelmad *intelmaddata;
524 struct snd_pmic_ops *scard_ops;
525 pr_debug("device_get called\n");
526
527 WARN_ON(!uval);
528 WARN_ON(!kcontrol);
529
530 intelmaddata = kcontrol->private_data;
531 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
532 if (intelmaddata->cpu_id == CPU_CHIP_PENWELL) {
533 if (kcontrol->id.numid == OUTPUT_SEL)
534 uval->value.enumerated.item[0] =
535 scard_ops->output_dev_id;
536 else if (kcontrol->id.numid == INPUT_SEL)
537 uval->value.enumerated.item[0] =
538 scard_ops->input_dev_id;
539 else if (kcontrol->id.numid == LINEOUT_SEL_MFLD)
540 uval->value.enumerated.item[0] =
541 scard_ops->lineout_dev_id;
542 else
543 return -EINVAL;
544 } else if (intelmaddata->cpu_id == CPU_CHIP_LINCROFT) {
545 if (kcontrol->id.numid == OUTPUT_SEL)
546 /* There is a mismatch here.
547 * ALSA expects 1 for internal speaker.
548 * But internally, we may give 2 for internal speaker.
549 */
550 if (scard_ops->output_dev_id == MONO_EARPIECE ||
551 scard_ops->output_dev_id == INTERNAL_SPKR)
552 uval->value.enumerated.item[0] = MONO_EARPIECE;
553 else if (scard_ops->output_dev_id == STEREO_HEADPHONE)
554 uval->value.enumerated.item[0] =
555 STEREO_HEADPHONE;
556 else
557 return -EINVAL;
558 else if (kcontrol->id.numid == INPUT_SEL)
559 uval->value.enumerated.item[0] =
560 scard_ops->input_dev_id;
561 else
562 return -EINVAL;
563 } else
564 uval->value.enumerated.item[0] = kcontrol->private_value;
565 return 0;
566}
567
568/**
569* snd_intelmad_device_set - set the device select control's info
570*
571* @kcontrol: pointer to the control
572* @uval: pointer to the structure where the control's info is
573* available to be set
574*
575* This function is called when .set function of a control is invoked from app
576*/
577static int snd_intelmad_device_set(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *uval)
579{
580 struct snd_intelmad *intelmaddata;
581 struct snd_pmic_ops *scard_ops;
582 int ret_val = 0, vendor, status;
583 struct intel_sst_pcm_control *pcm_control;
584
585 pr_debug("snd_intelmad_device_set called\n");
586
587 WARN_ON(!uval);
588 WARN_ON(!kcontrol);
589 status = -1;
590
591 intelmaddata = kcontrol->private_data;
592
593 WARN_ON(!intelmaddata->sstdrv_ops);
594
595 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
596
597 WARN_ON(!scard_ops);
598
599 /* store value with driver */
600 kcontrol->private_value = uval->value.enumerated.item[0];
601
602 switch (kcontrol->id.numid) {
603 case OUTPUT_SEL:
604 ret_val = scard_ops->set_output_dev(
605 uval->value.enumerated.item[0]);
606 intelmaddata->output_sel = uval->value.enumerated.item[0];
607 break;
608 case INPUT_SEL:
609 vendor = intelmaddata->sstdrv_ops->vendor_id;
610 if ((vendor == SND_MX) || (vendor == SND_FS)) {
611 pcm_control = intelmaddata->sstdrv_ops->pcm_control;
612 if (uval->value.enumerated.item[0] == HS_MIC)
613 status = 1;
614 else
615 status = 0;
616 pcm_control->device_control(
617 SST_ENABLE_RX_TIME_SLOT, &status);
618 }
619 ret_val = scard_ops->set_input_dev(
620 uval->value.enumerated.item[0]);
621 intelmaddata->input_sel = uval->value.enumerated.item[0];
622 break;
623 case LINEOUT_SEL_MFLD:
624 ret_val = scard_ops->set_lineout_dev(
625 uval->value.enumerated.item[0]);
626 intelmaddata->lineout_sel = uval->value.enumerated.item[0];
627 break;
628 default:
629 return -EINVAL;
630 }
631 kcontrol->private_value = uval->value.enumerated.item[0];
632 return ret_val;
633}
634
635static int snd_intelmad_device_dmic_get(struct snd_kcontrol *kcontrol,
636 struct snd_ctl_elem_value *uval)
637{
638 struct snd_intelmad *intelmaddata;
639 struct snd_pmic_ops *scard_ops;
640
641 WARN_ON(!uval);
642 WARN_ON(!kcontrol);
643
644 intelmaddata = kcontrol->private_data;
645 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
646
647 if (scard_ops->input_dev_id != DMIC) {
648 pr_debug("input dev = 0x%x\n", scard_ops->input_dev_id);
649 return 0;
650 }
651
652 if (intelmaddata->cpu_id == CPU_CHIP_PENWELL)
653 uval->value.enumerated.item[0] = kcontrol->private_value;
654 else
655 pr_debug(" CPU id = 0x%xis invalid.\n",
656 intelmaddata->cpu_id);
657 return 0;
658}
659
660void msic_set_bit(u8 index, unsigned int *available_dmics)
661{
662 *available_dmics |= (1 << index);
663}
664
665void msic_clear_bit(u8 index, unsigned int *available_dmics)
666{
667 *available_dmics &= ~(1 << index);
668}
669
670int msic_is_set_bit(u8 index, unsigned int *available_dmics)
671{
672 int ret_val;
673
674 ret_val = (*available_dmics & (1 << index));
675 return ret_val;
676}
677
678static int snd_intelmad_device_dmic_set(struct snd_kcontrol *kcontrol,
679 struct snd_ctl_elem_value *uval)
680{
681 struct snd_intelmad *intelmaddata;
682 struct snd_pmic_ops *scard_ops;
683 int i, dmic_index;
684 unsigned int available_dmics;
685 int jump_count;
686 int max_dmics = ARRAY_SIZE(router_dmics);
687
688 WARN_ON(!uval);
689 WARN_ON(!kcontrol);
690
691 intelmaddata = kcontrol->private_data;
692 WARN_ON(!intelmaddata->sstdrv_ops);
693
694 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
695 WARN_ON(!scard_ops);
696
697 if (scard_ops->input_dev_id != DMIC) {
698 pr_debug("input dev = 0x%x\n", scard_ops->input_dev_id);
699 return 0;
700 }
701
702 available_dmics = scard_ops->available_dmics;
703
704 if (kcontrol->private_value > uval->value.enumerated.item[0]) {
705 pr_debug("jump count -1.\n");
706 jump_count = -1;
707 } else {
708 pr_debug("jump count 1.\n");
709 jump_count = 1;
710 }
711
712 dmic_index = uval->value.enumerated.item[0];
713 pr_debug("set function. dmic_index = %d, avl_dmic = 0x%x\n",
714 dmic_index, available_dmics);
715 for (i = 0; i < max_dmics; i++) {
716 pr_debug("set function. loop index = 0x%x. dmic_index = 0x%x\n",
717 i, dmic_index);
718 if (!msic_is_set_bit(dmic_index, &available_dmics)) {
719 msic_clear_bit(kcontrol->private_value,
720 &available_dmics);
721 msic_set_bit(dmic_index, &available_dmics);
722 kcontrol->private_value = dmic_index;
723 scard_ops->available_dmics = available_dmics;
724 scard_ops->hw_dmic_map[kcontrol->id.numid-HW_CH_BASE] =
725 kcontrol->private_value;
726 scard_ops->set_hw_dmic_route
727 (kcontrol->id.numid-HW_CH_BASE);
728 return 0;
729 }
730
731 dmic_index += jump_count;
732
733 if (dmic_index > (max_dmics - 1) && jump_count == 1) {
734 pr_debug("Resettingthe dmic index to 0.\n");
735 dmic_index = 0;
736 } else if (dmic_index == -1 && jump_count == -1) {
737 pr_debug("Resetting the dmic index to 5.\n");
738 dmic_index = max_dmics - 1;
739 }
740 }
741
742 return -EINVAL;
743}
744
745static int snd_intelmad_device_dmic_info_mfld(struct snd_kcontrol *kcontrol,
746 struct snd_ctl_elem_info *uinfo)
747{
748 struct snd_intelmad *intelmaddata;
749 struct snd_pmic_ops *scard_ops;
750
751 uinfo->count = MONO_CNTL;
752 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
753 uinfo->value.enumerated.items = ARRAY_SIZE(router_dmics);
754
755 intelmaddata = kcontrol->private_data;
756 WARN_ON(!intelmaddata->sstdrv_ops);
757
758 scard_ops = intelmaddata->sstdrv_ops->scard_ops;
759 WARN_ON(!scard_ops);
760
761 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
762 uinfo->value.enumerated.item =
763 uinfo->value.enumerated.items - 1;
764
765 strncpy(uinfo->value.enumerated.name,
766 router_dmics[uinfo->value.enumerated.item],
767 sizeof(uinfo->value.enumerated.name)-1);
768
769
770 msic_set_bit(kcontrol->private_value, &scard_ops->available_dmics);
771 pr_debug("info function. avl_dmic = 0x%x",
772 scard_ops->available_dmics);
773
774 scard_ops->hw_dmic_map[kcontrol->id.numid-HW_CH_BASE] =
775 kcontrol->private_value;
776
777 return 0;
778}
779
780struct snd_kcontrol_new snd_intelmad_controls_mrst[MAX_CTRL] __devinitdata = {
781{
782 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
783 .name = "PCM Playback Source",
784 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
785 .info = snd_intelmad_device_info_mrst,
786 .get = snd_intelmad_device_get,
787 .put = snd_intelmad_device_set,
788 .private_value = 0,
789},
790{
791 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
792 .name = "PCM Capture Source",
793 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
794 .info = snd_intelmad_device_info_mrst,
795 .get = snd_intelmad_device_get,
796 .put = snd_intelmad_device_set,
797 .private_value = 0,
798},
799{
800 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
801 .name = "PCM Playback Volume",
802 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
803 .info = snd_intelmad_playback_volume_info,
804 .get = snd_intelmad_volume_get,
805 .put = snd_intelmad_volume_set,
806 .private_value = 0,
807},
808{
809 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
810 .name = "PCM Playback Switch",
811 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
812 .info = snd_intelmad_mute_info,
813 .get = snd_intelmad_mute_get,
814 .put = snd_intelmad_mute_set,
815 .private_value = 0,
816},
817{
818 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
819 .name = "PCM Capture Volume",
820 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
821 .info = snd_intelmad_capture_volume_info,
822 .get = snd_intelmad_volume_get,
823 .put = snd_intelmad_volume_set,
824 .private_value = 0,
825},
826{
827 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
828 .name = "PCM Capture Switch",
829 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
830 .info = snd_intelmad_mute_info,
831 .get = snd_intelmad_mute_get,
832 .put = snd_intelmad_mute_set,
833 .private_value = 0,
834},
835{
836 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
837 .name = "Master Playback Volume",
838 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
839 .info = snd_intelmad_master_volume_info,
840 .get = snd_intelmad_volume_get,
841 .put = snd_intelmad_volume_set,
842 .private_value = 0,
843},
844{
845 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
846 .name = "Master Playback Switch",
847 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
848 .info = snd_intelmad_mute_info,
849 .get = snd_intelmad_mute_get,
850 .put = snd_intelmad_mute_set,
851 .private_value = 0,
852},
853};
854
855struct snd_kcontrol_new
856snd_intelmad_controls_mfld[MAX_CTRL_MFLD] __devinitdata = {
857{
858 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
859 .name = "PCM Playback Source",
860 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
861 .info = snd_intelmad_device_info_mfld,
862 .get = snd_intelmad_device_get,
863 .put = snd_intelmad_device_set,
864 .private_value = 0,
865},
866{
867 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
868 .name = "PCM Capture Source",
869 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
870 .info = snd_intelmad_device_info_mfld,
871 .get = snd_intelmad_device_get,
872 .put = snd_intelmad_device_set,
873 .private_value = 0,
874},
875{
876 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
877 .name = "Line out",
878 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
879 .info = snd_intelmad_device_info_mfld,
880 .get = snd_intelmad_device_get,
881 .put = snd_intelmad_device_set,
882 .private_value = 0,
883},
884{
885 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
886 .name = HW_CH_0,
887 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
888 .info = snd_intelmad_device_dmic_info_mfld,
889 .get = snd_intelmad_device_dmic_get,
890 .put = snd_intelmad_device_dmic_set,
891 .private_value = 0
892},
893{
894 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
895 .name = HW_CH_1,
896 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
897 .info = snd_intelmad_device_dmic_info_mfld,
898 .get = snd_intelmad_device_dmic_get,
899 .put = snd_intelmad_device_dmic_set,
900 .private_value = 1
901},
902{
903 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
904 .name = HW_CH_2,
905 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
906 .info = snd_intelmad_device_dmic_info_mfld,
907 .get = snd_intelmad_device_dmic_get,
908 .put = snd_intelmad_device_dmic_set,
909 .private_value = 2
910},
911{
912 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
913 .name = HW_CH_3,
914 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
915 .info = snd_intelmad_device_dmic_info_mfld,
916 .get = snd_intelmad_device_dmic_get,
917 .put = snd_intelmad_device_dmic_set,
918 .private_value = 3
919}
920};
921
diff --git a/drivers/staging/intel_sst/intelmid_msic_control.c b/drivers/staging/intel_sst/intelmid_msic_control.c
deleted file mode 100644
index 70cdb1697815..000000000000
--- a/drivers/staging/intel_sst/intelmid_msic_control.c
+++ /dev/null
@@ -1,1047 +0,0 @@
1/*
2 * intelmid_vm_control.c - Intel Sound card driver for MID
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 * This file contains the control operations of msic vendors
25 */
26
27#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28
29#include <linux/pci.h>
30#include <linux/file.h>
31#include <linux/delay.h>
32#include <sound/control.h>
33#include "intel_sst.h"
34#include <linux/input.h>
35#include "intelmid_snd_control.h"
36#include "intelmid.h"
37
38#define AUDIOMUX12 0x24c
39#define AUDIOMUX34 0x24d
40
41static int msic_init_card(void)
42{
43 struct sc_reg_access sc_access[] = {
44 /* dmic configuration */
45 {0x241, 0x85, 0},
46 {0x242, 0x02, 0},
47 /* audio paths config */
48 {0x24C, 0x10, 0},
49 {0x24D, 0x32, 0},
50 /* PCM2 interface slots */
51 /* preconfigured slots for 0-5 both tx, rx */
52 {0x272, 0x10, 0},
53 {0x273, 0x32, 0},
54 {0x274, 0xFF, 0},
55 {0x275, 0x10, 0},
56 {0x276, 0x32, 0},
57 {0x277, 0x54, 0},
58 /*Sinc5 decimator*/
59 {0x24E, 0x28, 0},
60 /*TI vibra w/a settings*/
61 {0x384, 0x80, 0},
62 {0x385, 0x80, 0},
63 {0x267, 0x00, 0},
64 {0x261, 0x00, 0},
65 /* pcm port setting */
66 {0x278, 0x00, 0},
67 {0x27B, 0x01, 0},
68 {0x27C, 0x0a, 0},
69 /* Set vol HSLRVOLCTRL, IHFVOL */
70 {0x259, 0x08, 0},
71 {0x25A, 0x08, 0},
72 {0x25B, 0x08, 0},
73 {0x25C, 0x08, 0},
74 /* HSEPRXCTRL Enable the headset left and right FIR filters */
75 {0x250, 0x30, 0},
76 /* HSMIXER */
77 {0x256, 0x11, 0},
78 /* amic configuration */
79 {0x249, 0x01, 0x0},
80 {0x24A, 0x01, 0x0},
81 /* unmask ocaudio/accdet interrupts */
82 {0x1d, 0x00, 0x00},
83 {0x1e, 0x00, 0x00},
84 };
85 snd_msic_ops.card_status = SND_CARD_INIT_DONE;
86 sst_sc_reg_access(sc_access, PMIC_WRITE, 28);
87 snd_msic_ops.pb_on = 0;
88 snd_msic_ops.pbhs_on = 0;
89 snd_msic_ops.cap_on = 0;
90 snd_msic_ops.input_dev_id = DMIC; /*def dev*/
91 snd_msic_ops.output_dev_id = STEREO_HEADPHONE;
92 snd_msic_ops.jack_interrupt_status = false;
93 pr_debug("msic init complete!!\n");
94 return 0;
95}
96static int msic_line_out_restore(u8 value)
97{
98 struct sc_reg_access hs_drv_en[] = {
99 {0x25d, 0x03, 0x03},
100 };
101 struct sc_reg_access ep_drv_en[] = {
102 {0x25d, 0x40, 0x40},
103 };
104 struct sc_reg_access ihf_drv_en[] = {
105 {0x25d, 0x0c, 0x0c},
106 };
107 struct sc_reg_access vib1_drv_en[] = {
108 {0x25d, 0x10, 0x10},
109 };
110 struct sc_reg_access vib2_drv_en[] = {
111 {0x25d, 0x20, 0x20},
112 };
113 struct sc_reg_access pmode_enable[] = {
114 {0x381, 0x10, 0x10},
115 };
116 int retval = 0;
117
118 pr_debug("msic_lineout_restore_lineout_dev:%d\n", value);
119
120 switch (value) {
121 case HEADSET:
122 pr_debug("Selecting Lineout-HEADSET-restore\n");
123 if (snd_msic_ops.output_dev_id == STEREO_HEADPHONE)
124 retval = sst_sc_reg_access(hs_drv_en,
125 PMIC_READ_MODIFY, 1);
126 else
127 retval = sst_sc_reg_access(ep_drv_en,
128 PMIC_READ_MODIFY, 1);
129 break;
130 case IHF:
131 pr_debug("Selecting Lineout-IHF-restore\n");
132 retval = sst_sc_reg_access(ihf_drv_en, PMIC_READ_MODIFY, 1);
133 if (retval)
134 return retval;
135 retval = sst_sc_reg_access(pmode_enable, PMIC_READ_MODIFY, 1);
136 break;
137 case VIBRA1:
138 pr_debug("Selecting Lineout-Vibra1-restore\n");
139 retval = sst_sc_reg_access(vib1_drv_en, PMIC_READ_MODIFY, 1);
140 break;
141 case VIBRA2:
142 pr_debug("Selecting Lineout-VIBRA2-restore\n");
143 retval = sst_sc_reg_access(vib2_drv_en, PMIC_READ_MODIFY, 1);
144 break;
145 case NONE:
146 pr_debug("Selecting Lineout-NONE-restore\n");
147 break;
148 default:
149 return -EINVAL;
150 }
151 return retval;
152}
153static int msic_get_lineout_prvstate(void)
154{
155 struct sc_reg_access hs_ihf_drv[2] = {
156 {0x257, 0x0, 0x0},
157 {0x25d, 0x0, 0x0},
158 };
159 struct sc_reg_access vib1drv[2] = {
160 {0x264, 0x0, 0x0},
161 {0x25D, 0x0, 0x0},
162 };
163 struct sc_reg_access vib2drv[2] = {
164 {0x26A, 0x0, 0x0},
165 {0x25D, 0x0, 0x0},
166 };
167 int retval = 0, drv_en, dac_en, dev_id, mask;
168 for (dev_id = 0; dev_id < snd_msic_ops.line_out_names_cnt; dev_id++) {
169 switch (dev_id) {
170 case HEADSET:
171 pr_debug("msic_get_lineout_prvs_state: HEADSET\n");
172 sst_sc_reg_access(hs_ihf_drv, PMIC_READ, 2);
173
174 mask = (MASK0|MASK1);
175 dac_en = (hs_ihf_drv[0].value) & mask;
176
177 mask = ((MASK0|MASK1)|MASK6);
178 drv_en = (hs_ihf_drv[1].value) & mask;
179
180 if (dac_en && (!drv_en)) {
181 snd_msic_ops.prev_lineout_dev_id = HEADSET;
182 return retval;
183 }
184 break;
185 case IHF:
186 pr_debug("msic_get_lineout_prvstate: IHF\n");
187 sst_sc_reg_access(hs_ihf_drv, PMIC_READ, 2);
188
189 mask = (MASK2 | MASK3);
190 dac_en = (hs_ihf_drv[0].value) & mask;
191
192 mask = (MASK2 | MASK3);
193 drv_en = (hs_ihf_drv[1].value) & mask;
194
195 if (dac_en && (!drv_en)) {
196 snd_msic_ops.prev_lineout_dev_id = IHF;
197 return retval;
198 }
199 break;
200 case VIBRA1:
201 pr_debug("msic_get_lineout_prvstate: vibra1\n");
202 sst_sc_reg_access(vib1drv, PMIC_READ, 2);
203
204 mask = MASK1;
205 dac_en = (vib1drv[0].value) & mask;
206
207 mask = MASK4;
208 drv_en = (vib1drv[1].value) & mask;
209
210 if (dac_en && (!drv_en)) {
211 snd_msic_ops.prev_lineout_dev_id = VIBRA1;
212 return retval;
213 }
214 break;
215 case VIBRA2:
216 pr_debug("msic_get_lineout_prvstate: vibra2\n");
217 sst_sc_reg_access(vib2drv, PMIC_READ, 2);
218
219 mask = MASK1;
220 dac_en = (vib2drv[0].value) & mask;
221
222 mask = MASK5;
223 drv_en = ((vib2drv[1].value) & mask);
224
225 if (dac_en && (!drv_en)) {
226 snd_msic_ops.prev_lineout_dev_id = VIBRA2;
227 return retval;
228 }
229 break;
230 case NONE:
231 pr_debug("msic_get_lineout_prvstate: NONE\n");
232 snd_msic_ops.prev_lineout_dev_id = NONE;
233 return retval;
234 default:
235 pr_debug("Invalid device id\n");
236 snd_msic_ops.prev_lineout_dev_id = NONE;
237 return -EINVAL;
238 }
239 }
240 return retval;
241}
242static int msic_set_selected_lineout_dev(u8 value)
243{
244 struct sc_reg_access lout_hs[] = {
245 {0x25e, 0x33, 0xFF},
246 {0x25d, 0x0, 0x43},
247 };
248 struct sc_reg_access lout_ihf[] = {
249 {0x25e, 0x55, 0xff},
250 {0x25d, 0x0, 0x0c},
251 };
252 struct sc_reg_access lout_vibra1[] = {
253
254 {0x25e, 0x61, 0xff},
255 {0x25d, 0x0, 0x10},
256 };
257 struct sc_reg_access lout_vibra2[] = {
258
259 {0x25e, 0x16, 0xff},
260 {0x25d, 0x0, 0x20},
261 };
262 struct sc_reg_access lout_def[] = {
263 {0x25e, 0x66, 0x0},
264 };
265 struct sc_reg_access pmode_disable[] = {
266 {0x381, 0x00, 0x10},
267 };
268 struct sc_reg_access pmode_enable[] = {
269 {0x381, 0x10, 0x10},
270 };
271 int retval = 0;
272
273 pr_debug("msic_set_selected_lineout_dev:%d\n", value);
274 msic_get_lineout_prvstate();
275 msic_line_out_restore(snd_msic_ops.prev_lineout_dev_id);
276 snd_msic_ops.lineout_dev_id = value;
277
278 switch (value) {
279 case HEADSET:
280 pr_debug("Selecting Lineout-HEADSET\n");
281 if (snd_msic_ops.pb_on)
282 retval = sst_sc_reg_access(lout_hs,
283 PMIC_READ_MODIFY, 2);
284 if (retval)
285 return retval;
286 retval = sst_sc_reg_access(pmode_disable,
287 PMIC_READ_MODIFY, 1);
288 break;
289 case IHF:
290 pr_debug("Selecting Lineout-IHF\n");
291 if (snd_msic_ops.pb_on)
292 retval = sst_sc_reg_access(lout_ihf,
293 PMIC_READ_MODIFY, 2);
294 if (retval)
295 return retval;
296 retval = sst_sc_reg_access(pmode_enable,
297 PMIC_READ_MODIFY, 1);
298 break;
299 case VIBRA1:
300 pr_debug("Selecting Lineout-Vibra1\n");
301 if (snd_msic_ops.pb_on)
302 retval = sst_sc_reg_access(lout_vibra1,
303 PMIC_READ_MODIFY, 2);
304 if (retval)
305 return retval;
306 retval = sst_sc_reg_access(pmode_disable,
307 PMIC_READ_MODIFY, 1);
308 break;
309 case VIBRA2:
310 pr_debug("Selecting Lineout-VIBRA2\n");
311 if (snd_msic_ops.pb_on)
312 retval = sst_sc_reg_access(lout_vibra2,
313 PMIC_READ_MODIFY, 2);
314 if (retval)
315 return retval;
316 retval = sst_sc_reg_access(pmode_disable,
317 PMIC_READ_MODIFY, 1);
318 break;
319 case NONE:
320 pr_debug("Selecting Lineout-NONE\n");
321 retval = sst_sc_reg_access(lout_def,
322 PMIC_WRITE, 1);
323 if (retval)
324 return retval;
325 retval = sst_sc_reg_access(pmode_disable,
326 PMIC_READ_MODIFY, 1);
327 break;
328 default:
329 return -EINVAL;
330 }
331 return retval;
332}
333
334
335static int msic_power_up_pb(unsigned int device)
336{
337 struct sc_reg_access vaud[] = {
338 /* turn on the audio power supplies */
339 {0x0DB, 0x07, 0},
340 };
341 struct sc_reg_access pll[] = {
342 /* turn on PLL */
343 {0x240, 0x20, 0},
344 };
345 struct sc_reg_access vhs[] = {
346 /* VHSP */
347 {0x0DC, 0x3D, 0},
348 /* VHSN */
349 {0x0DD, 0x3F, 0},
350 };
351 struct sc_reg_access hsdac[] = {
352 {0x382, 0x40, 0x40},
353 /* disable driver */
354 {0x25D, 0x0, 0x43},
355 /* DAC CONFIG ; both HP, LP on */
356 {0x257, 0x03, 0x03},
357 };
358 struct sc_reg_access hs_filter[] = {
359 /* HSEPRXCTRL Enable the headset left and right FIR filters */
360 {0x250, 0x30, 0},
361 /* HSMIXER */
362 {0x256, 0x11, 0},
363 };
364 struct sc_reg_access hs_enable[] = {
365 /* enable driver */
366 {0x25D, 0x3, 0x3},
367 {0x26C, 0x0, 0x2},
368 /* unmute the headset */
369 { 0x259, 0x80, 0x80},
370 { 0x25A, 0x80, 0x80},
371 };
372 struct sc_reg_access vihf[] = {
373 /* VIHF ON */
374 {0x0C9, 0x27, 0x00},
375 };
376 struct sc_reg_access ihf_filter[] = {
377 /* disable driver */
378 {0x25D, 0x00, 0x0C},
379 /*Filer DAC enable*/
380 {0x251, 0x03, 0x03},
381 {0x257, 0x0C, 0x0C},
382 };
383 struct sc_reg_access ihf_en[] = {
384 /*enable drv*/
385 {0x25D, 0x0C, 0x0c},
386 };
387 struct sc_reg_access ihf_unmute[] = {
388 /*unmute headset*/
389 {0x25B, 0x80, 0x80},
390 {0x25C, 0x80, 0x80},
391 };
392 struct sc_reg_access epdac[] = {
393 /* disable driver */
394 {0x25D, 0x0, 0x43},
395 /* DAC CONFIG ; both HP, LP on */
396 {0x257, 0x03, 0x03},
397 };
398 struct sc_reg_access ep_enable[] = {
399 /* enable driver */
400 {0x25D, 0x40, 0x40},
401 /* unmute the headset */
402 { 0x259, 0x80, 0x80},
403 { 0x25A, 0x80, 0x80},
404 };
405 struct sc_reg_access vib1_en[] = {
406 /* enable driver, ADC */
407 {0x25D, 0x10, 0x10},
408 {0x264, 0x02, 0x82},
409 };
410 struct sc_reg_access vib2_en[] = {
411 /* enable driver, ADC */
412 {0x25D, 0x20, 0x20},
413 {0x26A, 0x02, 0x82},
414 };
415 struct sc_reg_access pcm2_en[] = {
416 /* enable pcm 2 */
417 {0x27C, 0x1, 0x1},
418 };
419 int retval = 0;
420
421 if (snd_msic_ops.card_status == SND_CARD_UN_INIT) {
422 retval = msic_init_card();
423 if (retval)
424 return retval;
425 }
426
427 pr_debug("powering up pb.... Device %d\n", device);
428 sst_sc_reg_access(vaud, PMIC_WRITE, 1);
429 msleep(1);
430 sst_sc_reg_access(pll, PMIC_WRITE, 1);
431 msleep(1);
432 switch (device) {
433 case SND_SST_DEVICE_HEADSET:
434 snd_msic_ops.pb_on = 1;
435 snd_msic_ops.pbhs_on = 1;
436 if (snd_msic_ops.output_dev_id == STEREO_HEADPHONE) {
437 sst_sc_reg_access(vhs, PMIC_WRITE, 2);
438 sst_sc_reg_access(hsdac, PMIC_READ_MODIFY, 3);
439 sst_sc_reg_access(hs_filter, PMIC_WRITE, 2);
440 sst_sc_reg_access(hs_enable, PMIC_READ_MODIFY, 4);
441 } else {
442 sst_sc_reg_access(epdac, PMIC_READ_MODIFY, 2);
443 sst_sc_reg_access(hs_filter, PMIC_WRITE, 2);
444 sst_sc_reg_access(ep_enable, PMIC_READ_MODIFY, 3);
445 }
446 if (snd_msic_ops.lineout_dev_id == HEADSET)
447 msic_set_selected_lineout_dev(HEADSET);
448 break;
449 case SND_SST_DEVICE_IHF:
450 snd_msic_ops.pb_on = 1;
451 sst_sc_reg_access(vihf, PMIC_WRITE, 1);
452 sst_sc_reg_access(ihf_filter, PMIC_READ_MODIFY, 3);
453 sst_sc_reg_access(ihf_en, PMIC_READ_MODIFY, 1);
454 sst_sc_reg_access(ihf_unmute, PMIC_READ_MODIFY, 2);
455 if (snd_msic_ops.lineout_dev_id == IHF)
456 msic_set_selected_lineout_dev(IHF);
457 break;
458
459 case SND_SST_DEVICE_VIBRA:
460 snd_msic_ops.pb_on = 1;
461 sst_sc_reg_access(vib1_en, PMIC_READ_MODIFY, 2);
462 if (snd_msic_ops.lineout_dev_id == VIBRA1)
463 msic_set_selected_lineout_dev(VIBRA1);
464 break;
465
466 case SND_SST_DEVICE_HAPTIC:
467 snd_msic_ops.pb_on = 1;
468 sst_sc_reg_access(vib2_en, PMIC_READ_MODIFY, 2);
469 if (snd_msic_ops.lineout_dev_id == VIBRA2)
470 msic_set_selected_lineout_dev(VIBRA2);
471 break;
472
473 default:
474 pr_warn("Wrong Device %d, selected %d\n",
475 device, snd_msic_ops.output_dev_id);
476 }
477 return sst_sc_reg_access(pcm2_en, PMIC_READ_MODIFY, 1);
478}
479
480static int msic_power_up_cp(unsigned int device)
481{
482 struct sc_reg_access vaud[] = {
483 /* turn on the audio power supplies */
484 {0x0DB, 0x07, 0},
485 };
486 struct sc_reg_access pll[] = {
487 /* turn on PLL */
488 {0x240, 0x20, 0},
489 };
490 struct sc_reg_access dmic_bias[] = {
491 /* Turn on AMIC supply */
492 {0x247, 0xA0, 0xA0},
493 };
494 struct sc_reg_access dmic[] = {
495 /* mic demux enable */
496 {0x245, 0x3F, 0x3F},
497 {0x246, 0x07, 0x07},
498
499 };
500 struct sc_reg_access amic_bias[] = {
501 /* Turn on AMIC supply */
502 {0x247, 0xFC, 0xFC},
503 };
504 struct sc_reg_access amic[] = {
505 /*MIC EN*/
506 {0x249, 0x01, 0x01},
507 {0x24A, 0x01, 0x01},
508 /*ADC EN*/
509 {0x248, 0x05, 0x0F},
510
511 };
512 struct sc_reg_access pcm2[] = {
513 /* enable pcm 2 */
514 {0x27C, 0x1, 0x1},
515 };
516 struct sc_reg_access tx_on[] = {
517 /*wait for mic to stabalize before turning on audio channels*/
518 {0x24F, 0x3C, 0x0},
519 };
520 int retval = 0;
521
522 if (snd_msic_ops.card_status == SND_CARD_UN_INIT) {
523 retval = msic_init_card();
524 if (retval)
525 return retval;
526 }
527
528 pr_debug("powering up cp....%d\n", snd_msic_ops.input_dev_id);
529 sst_sc_reg_access(vaud, PMIC_WRITE, 1);
530 msleep(500);/*FIXME need optimzed value here*/
531 sst_sc_reg_access(pll, PMIC_WRITE, 1);
532 msleep(1);
533 snd_msic_ops.cap_on = 1;
534 if (snd_msic_ops.input_dev_id == AMIC) {
535 sst_sc_reg_access(amic_bias, PMIC_READ_MODIFY, 1);
536 msleep(1);
537 sst_sc_reg_access(amic, PMIC_READ_MODIFY, 3);
538 } else {
539 sst_sc_reg_access(dmic_bias, PMIC_READ_MODIFY, 1);
540 msleep(1);
541 sst_sc_reg_access(dmic, PMIC_READ_MODIFY, 2);
542 }
543 msleep(1);
544 sst_sc_reg_access(tx_on, PMIC_WRITE, 1);
545 return sst_sc_reg_access(pcm2, PMIC_READ_MODIFY, 1);
546}
547
548static int msic_power_down(void)
549{
550 struct sc_reg_access power_dn[] = {
551 /* VHSP */
552 {0x0DC, 0xC4, 0},
553 /* VHSN */
554 {0x0DD, 0x04, 0},
555 /* VIHF */
556 {0x0C9, 0x24, 0},
557 };
558 struct sc_reg_access pll[] = {
559 /* turn off PLL*/
560 {0x240, 0x00, 0x0},
561 };
562 struct sc_reg_access vaud[] = {
563 /* turn off VAUD*/
564 {0x0DB, 0x04, 0},
565 };
566
567 pr_debug("powering dn msic\n");
568 snd_msic_ops.pbhs_on = 0;
569 snd_msic_ops.pb_on = 0;
570 snd_msic_ops.cap_on = 0;
571 sst_sc_reg_access(power_dn, PMIC_WRITE, 3);
572 msleep(1);
573 sst_sc_reg_access(pll, PMIC_WRITE, 1);
574 msleep(1);
575 sst_sc_reg_access(vaud, PMIC_WRITE, 1);
576 return 0;
577}
578
579static int msic_power_down_pb(unsigned int device)
580{
581 struct sc_reg_access drv_enable[] = {
582 {0x25D, 0x00, 0x00},
583 };
584 struct sc_reg_access hs_mute[] = {
585 {0x259, 0x80, 0x80},
586 {0x25A, 0x80, 0x80},
587 {0x26C, 0x02, 0x02},
588 };
589 struct sc_reg_access hs_off[] = {
590 {0x257, 0x00, 0x03},
591 {0x250, 0x00, 0x30},
592 {0x382, 0x00, 0x40},
593 };
594 struct sc_reg_access ihf_mute[] = {
595 {0x25B, 0x80, 0x80},
596 {0x25C, 0x80, 0x80},
597 };
598 struct sc_reg_access ihf_off[] = {
599 {0x257, 0x00, 0x0C},
600 {0x251, 0x00, 0x03},
601 };
602 struct sc_reg_access vib1_off[] = {
603 {0x264, 0x00, 0x82},
604 };
605 struct sc_reg_access vib2_off[] = {
606 {0x26A, 0x00, 0x82},
607 };
608 struct sc_reg_access lout_off[] = {
609 {0x25e, 0x66, 0x00},
610 };
611 struct sc_reg_access pmode_disable[] = {
612 {0x381, 0x00, 0x10},
613 };
614
615
616
617 pr_debug("powering dn pb for device %d\n", device);
618 switch (device) {
619 case SND_SST_DEVICE_HEADSET:
620 snd_msic_ops.pbhs_on = 0;
621 sst_sc_reg_access(hs_mute, PMIC_READ_MODIFY, 3);
622 drv_enable[0].mask = 0x43;
623 sst_sc_reg_access(drv_enable, PMIC_READ_MODIFY, 1);
624 sst_sc_reg_access(hs_off, PMIC_READ_MODIFY, 3);
625 if (snd_msic_ops.lineout_dev_id == HEADSET)
626 sst_sc_reg_access(lout_off, PMIC_WRITE, 1);
627 break;
628
629 case SND_SST_DEVICE_IHF:
630 sst_sc_reg_access(ihf_mute, PMIC_READ_MODIFY, 2);
631 drv_enable[0].mask = 0x0C;
632 sst_sc_reg_access(drv_enable, PMIC_READ_MODIFY, 1);
633 sst_sc_reg_access(ihf_off, PMIC_READ_MODIFY, 2);
634 if (snd_msic_ops.lineout_dev_id == IHF) {
635 sst_sc_reg_access(lout_off, PMIC_WRITE, 1);
636 sst_sc_reg_access(pmode_disable, PMIC_READ_MODIFY, 1);
637 }
638 break;
639
640 case SND_SST_DEVICE_VIBRA:
641 sst_sc_reg_access(vib1_off, PMIC_READ_MODIFY, 1);
642 drv_enable[0].mask = 0x10;
643 sst_sc_reg_access(drv_enable, PMIC_READ_MODIFY, 1);
644 if (snd_msic_ops.lineout_dev_id == VIBRA1)
645 sst_sc_reg_access(lout_off, PMIC_WRITE, 1);
646 break;
647
648 case SND_SST_DEVICE_HAPTIC:
649 sst_sc_reg_access(vib2_off, PMIC_READ_MODIFY, 1);
650 drv_enable[0].mask = 0x20;
651 sst_sc_reg_access(drv_enable, PMIC_READ_MODIFY, 1);
652 if (snd_msic_ops.lineout_dev_id == VIBRA2)
653 sst_sc_reg_access(lout_off, PMIC_WRITE, 1);
654 break;
655 }
656 return 0;
657}
658
659static int msic_power_down_cp(unsigned int device)
660{
661 struct sc_reg_access dmic[] = {
662 {0x247, 0x00, 0xA0},
663 {0x245, 0x00, 0x38},
664 {0x246, 0x00, 0x07},
665 };
666 struct sc_reg_access amic[] = {
667 {0x248, 0x00, 0x05},
668 {0x249, 0x00, 0x01},
669 {0x24A, 0x00, 0x01},
670 {0x247, 0x00, 0xA3},
671 };
672 struct sc_reg_access tx_off[] = {
673 {0x24F, 0x00, 0x3C},
674 };
675
676 pr_debug("powering dn cp....\n");
677 snd_msic_ops.cap_on = 0;
678 sst_sc_reg_access(tx_off, PMIC_READ_MODIFY, 1);
679 if (snd_msic_ops.input_dev_id == DMIC)
680 sst_sc_reg_access(dmic, PMIC_READ_MODIFY, 3);
681 else
682 sst_sc_reg_access(amic, PMIC_READ_MODIFY, 4);
683 return 0;
684}
685
686static int msic_set_selected_output_dev(u8 value)
687{
688 int retval = 0;
689
690 pr_debug("msic set selected output:%d\n", value);
691 snd_msic_ops.output_dev_id = value;
692 if (snd_msic_ops.pbhs_on)
693 msic_power_up_pb(SND_SST_DEVICE_HEADSET);
694 return retval;
695}
696
697static int msic_set_selected_input_dev(u8 value)
698{
699
700 struct sc_reg_access sc_access_dmic[] = {
701 {0x24C, 0x10, 0x0},
702 };
703 struct sc_reg_access sc_access_amic[] = {
704 {0x24C, 0x76, 0x0},
705
706 };
707 int retval = 0;
708
709 pr_debug("msic_set_selected_input_dev:%d\n", value);
710 snd_msic_ops.input_dev_id = value;
711 switch (value) {
712 case AMIC:
713 pr_debug("Selecting AMIC1\n");
714 retval = sst_sc_reg_access(sc_access_amic, PMIC_WRITE, 1);
715 break;
716 case DMIC:
717 pr_debug("Selecting DMIC1\n");
718 retval = sst_sc_reg_access(sc_access_dmic, PMIC_WRITE, 1);
719 break;
720 default:
721 return -EINVAL;
722
723 }
724 if (snd_msic_ops.cap_on)
725 retval = msic_power_up_cp(SND_SST_DEVICE_CAPTURE);
726 return retval;
727}
728
729static int msic_set_hw_dmic_route(u8 hw_ch_index)
730{
731 struct sc_reg_access sc_access_router;
732 int retval = -EINVAL;
733
734 switch (hw_ch_index) {
735 case HW_CH0:
736 sc_access_router.reg_addr = AUDIOMUX12;
737 sc_access_router.value = snd_msic_ops.hw_dmic_map[0];
738 sc_access_router.mask = (MASK2 | MASK1 | MASK0);
739 pr_debug("hw_ch0. value = 0x%x\n",
740 sc_access_router.value);
741 retval = sst_sc_reg_access(&sc_access_router,
742 PMIC_READ_MODIFY, 1);
743 break;
744
745 case HW_CH1:
746 sc_access_router.reg_addr = AUDIOMUX12;
747 sc_access_router.value = (snd_msic_ops.hw_dmic_map[1]) << 4;
748 sc_access_router.mask = (MASK6 | MASK5 | MASK4);
749 pr_debug("### hw_ch1. value = 0x%x\n",
750 sc_access_router.value);
751 retval = sst_sc_reg_access(&sc_access_router,
752 PMIC_READ_MODIFY, 1);
753 break;
754
755 case HW_CH2:
756 sc_access_router.reg_addr = AUDIOMUX34;
757 sc_access_router.value = snd_msic_ops.hw_dmic_map[2];
758 sc_access_router.mask = (MASK2 | MASK1 | MASK0);
759 pr_debug("hw_ch2. value = 0x%x\n",
760 sc_access_router.value);
761 retval = sst_sc_reg_access(&sc_access_router,
762 PMIC_READ_MODIFY, 1);
763 break;
764
765 case HW_CH3:
766 sc_access_router.reg_addr = AUDIOMUX34;
767 sc_access_router.value = (snd_msic_ops.hw_dmic_map[3]) << 4;
768 sc_access_router.mask = (MASK6 | MASK5 | MASK4);
769 pr_debug("hw_ch3. value = 0x%x\n",
770 sc_access_router.value);
771 retval = sst_sc_reg_access(&sc_access_router,
772 PMIC_READ_MODIFY, 1);
773 break;
774 }
775
776 return retval;
777}
778
779
780static int msic_set_pcm_voice_params(void)
781{
782 return 0;
783}
784
785static int msic_set_pcm_audio_params(int sfreq, int word_size, int num_channel)
786{
787 return 0;
788}
789
790static int msic_set_audio_port(int status)
791{
792 return 0;
793}
794
795static int msic_set_voice_port(int status)
796{
797 return 0;
798}
799
800static int msic_set_mute(int dev_id, u8 value)
801{
802 return 0;
803}
804
805static int msic_set_vol(int dev_id, int value)
806{
807 return 0;
808}
809
810static int msic_get_mute(int dev_id, u8 *value)
811{
812 return 0;
813}
814
815static int msic_get_vol(int dev_id, int *value)
816{
817 return 0;
818}
819
820static int msic_set_headset_state(int state)
821{
822 struct sc_reg_access hs_enable[] = {
823 {0x25D, 0x03, 0x03},
824 };
825
826 if (state)
827 /*enable*/
828 sst_sc_reg_access(hs_enable, PMIC_READ_MODIFY, 1);
829 else {
830 hs_enable[0].value = 0;
831 sst_sc_reg_access(hs_enable, PMIC_READ_MODIFY, 1);
832 }
833 return 0;
834}
835
836static int msic_enable_mic_bias(void)
837{
838 struct sc_reg_access jack_interrupt_reg[] = {
839 {0x0DB, 0x07, 0x00},
840
841 };
842 struct sc_reg_access jack_bias_reg[] = {
843 {0x247, 0x0C, 0x0C},
844 };
845
846 sst_sc_reg_access(jack_interrupt_reg, PMIC_WRITE, 1);
847 sst_sc_reg_access(jack_bias_reg, PMIC_READ_MODIFY, 1);
848 return 0;
849}
850
851static int msic_disable_mic_bias(void)
852{
853 if (snd_msic_ops.jack_interrupt_status == true)
854 return 0;
855 if (!(snd_msic_ops.pb_on || snd_msic_ops.cap_on))
856 msic_power_down();
857 return 0;
858}
859
860static int msic_disable_jack_btn(void)
861{
862 struct sc_reg_access btn_disable[] = {
863 {0x26C, 0x00, 0x01}
864 };
865
866 if (!(snd_msic_ops.pb_on || snd_msic_ops.cap_on))
867 msic_power_down();
868 snd_msic_ops.jack_interrupt_status = false;
869 return sst_sc_reg_access(btn_disable, PMIC_READ_MODIFY, 1);
870}
871
872static int msic_enable_jack_btn(void)
873{
874 struct sc_reg_access btn_enable[] = {
875 {0x26b, 0x77, 0x00},
876 {0x26C, 0x01, 0x00},
877 };
878 return sst_sc_reg_access(btn_enable, PMIC_WRITE, 2);
879}
880static int msic_convert_adc_to_mvolt(unsigned int mic_bias)
881{
882 return (ADC_ONE_LSB_MULTIPLIER * mic_bias) / 1000;
883}
884int msic_get_headset_state(int mic_bias)
885{
886 struct sc_reg_access msic_hs_toggle[] = {
887 {0x070, 0x00, 0x01},
888 };
889 if (mic_bias >= 0 && mic_bias < 400) {
890
891 pr_debug("Detected Headphone!!!\n");
892 sst_sc_reg_access(msic_hs_toggle, PMIC_READ_MODIFY, 1);
893
894 } else if (mic_bias > 400 && mic_bias < 650) {
895
896 pr_debug("Detected American headset\n");
897 msic_hs_toggle[0].value = 0x01;
898 sst_sc_reg_access(msic_hs_toggle, PMIC_READ_MODIFY, 1);
899
900 } else if (mic_bias >= 650 && mic_bias < 2000) {
901
902 pr_debug("Detected Headset!!!\n");
903 sst_sc_reg_access(msic_hs_toggle, PMIC_READ_MODIFY, 1);
904 /*power on jack and btn*/
905 snd_msic_ops.jack_interrupt_status = true;
906 msic_enable_jack_btn();
907 msic_enable_mic_bias();
908 return SND_JACK_HEADSET;
909
910 } else
911 pr_debug("Detected Open Cable!!!\n");
912
913 return SND_JACK_HEADPHONE;
914}
915
916static int msic_get_mic_bias(void *arg)
917{
918 struct snd_intelmad *intelmad_drv = (struct snd_intelmad *)arg;
919 u16 adc_adr = intelmad_drv->adc_address;
920 u16 adc_val;
921 int ret;
922 struct sc_reg_access adc_ctrl3[2] = {
923 {0x1C2, 0x05, 0x0},
924 };
925
926 struct sc_reg_access audio_adc_reg1 = {0,};
927 struct sc_reg_access audio_adc_reg2 = {0,};
928
929 msic_enable_mic_bias();
930 /* Enable the msic for conversion before reading */
931 ret = sst_sc_reg_access(adc_ctrl3, PMIC_WRITE, 1);
932 if (ret)
933 return ret;
934 adc_ctrl3[0].value = 0x04;
935 /* Re-toggle the RRDATARD bit */
936 ret = sst_sc_reg_access(adc_ctrl3, PMIC_WRITE, 1);
937 if (ret)
938 return ret;
939
940 audio_adc_reg1.reg_addr = adc_adr;
941 /* Read the higher bits of data */
942 msleep(1000);
943 ret = sst_sc_reg_access(&audio_adc_reg1, PMIC_READ, 1);
944 if (ret)
945 return ret;
946 pr_debug("adc read value %x", audio_adc_reg1.value);
947
948 /* Shift bits to accomodate the lower two data bits */
949 adc_val = (audio_adc_reg1.value << 2);
950 adc_adr++;
951 audio_adc_reg2. reg_addr = adc_adr;
952 ret = sst_sc_reg_access(&audio_adc_reg2, PMIC_READ, 1);
953 if (ret)
954 return ret;
955 pr_debug("adc read value %x", audio_adc_reg2.value);
956
957 /* Adding lower two bits to the higher bits */
958 audio_adc_reg2.value &= 03;
959 adc_val += audio_adc_reg2.value;
960
961 pr_debug("ADC value 0x%x", adc_val);
962 msic_disable_mic_bias();
963 return adc_val;
964}
965
966static void msic_pmic_irq_cb(void *cb_data, u8 intsts)
967{
968 struct mad_jack *mjack = NULL;
969 unsigned int present = 0, jack_event_flag = 0, buttonpressflag = 0;
970 struct snd_intelmad *intelmaddata = cb_data;
971 int retval = 0;
972
973 pr_debug("value returned = 0x%x\n", intsts);
974
975 if (snd_msic_ops.card_status == SND_CARD_UN_INIT) {
976 retval = msic_init_card();
977 if (retval)
978 return;
979 }
980
981 mjack = &intelmaddata->jack[0];
982 if (intsts & 0x1) {
983 pr_debug("MAD short_push detected\n");
984 present = SND_JACK_BTN_0;
985 jack_event_flag = buttonpressflag = 1;
986 mjack->jack.type = SND_JACK_BTN_0;
987 mjack->jack.key[0] = BTN_0 ;
988 }
989
990 if (intsts & 0x2) {
991 pr_debug(":MAD long_push detected\n");
992 jack_event_flag = buttonpressflag = 1;
993 mjack->jack.type = present = SND_JACK_BTN_1;
994 mjack->jack.key[1] = BTN_1;
995 }
996
997 if (intsts & 0x4) {
998 unsigned int mic_bias;
999 jack_event_flag = 1;
1000 buttonpressflag = 0;
1001 mic_bias = msic_get_mic_bias(intelmaddata);
1002 pr_debug("mic_bias = %d\n", mic_bias);
1003 mic_bias = msic_convert_adc_to_mvolt(mic_bias);
1004 pr_debug("mic_bias after conversion = %d mV\n", mic_bias);
1005 mjack->jack_dev_state = msic_get_headset_state(mic_bias);
1006 mjack->jack.type = present = mjack->jack_dev_state;
1007 }
1008
1009 if (intsts & 0x8) {
1010 mjack->jack.type = mjack->jack_dev_state;
1011 present = 0;
1012 jack_event_flag = 1;
1013 buttonpressflag = 0;
1014 msic_disable_jack_btn();
1015 msic_disable_mic_bias();
1016 }
1017 if (jack_event_flag)
1018 sst_mad_send_jack_report(&mjack->jack,
1019 buttonpressflag, present);
1020}
1021
1022
1023
1024struct snd_pmic_ops snd_msic_ops = {
1025 .set_input_dev = msic_set_selected_input_dev,
1026 .set_output_dev = msic_set_selected_output_dev,
1027 .set_lineout_dev = msic_set_selected_lineout_dev,
1028 .set_hw_dmic_route = msic_set_hw_dmic_route,
1029 .set_mute = msic_set_mute,
1030 .get_mute = msic_get_mute,
1031 .set_vol = msic_set_vol,
1032 .get_vol = msic_get_vol,
1033 .init_card = msic_init_card,
1034 .set_pcm_audio_params = msic_set_pcm_audio_params,
1035 .set_pcm_voice_params = msic_set_pcm_voice_params,
1036 .set_voice_port = msic_set_voice_port,
1037 .set_audio_port = msic_set_audio_port,
1038 .power_up_pmic_pb = msic_power_up_pb,
1039 .power_up_pmic_cp = msic_power_up_cp,
1040 .power_down_pmic_pb = msic_power_down_pb,
1041 .power_down_pmic_cp = msic_power_down_cp,
1042 .power_down_pmic = msic_power_down,
1043 .pmic_irq_cb = msic_pmic_irq_cb,
1044 .pmic_jack_enable = msic_enable_mic_bias,
1045 .pmic_get_mic_bias = msic_get_mic_bias,
1046 .pmic_set_headset_state = msic_set_headset_state,
1047};
diff --git a/drivers/staging/intel_sst/intelmid_pvt.c b/drivers/staging/intel_sst/intelmid_pvt.c
deleted file mode 100644
index 90e0e64c0ab0..000000000000
--- a/drivers/staging/intel_sst/intelmid_pvt.c
+++ /dev/null
@@ -1,173 +0,0 @@
1/*
2 * intelmid_pvt.h - Intel Sound card driver for MID
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Harsha Priya <priya.harsha@intel.com>
6 * Vinod Koul <vinod.koul@intel.com>
7 * KP Jeeja <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 * ALSA driver for Intel MID sound card chipset - holding private functions
25 */
26
27#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28
29#include <linux/io.h>
30#include <asm/intel_scu_ipc.h>
31#include <sound/core.h>
32#include <sound/control.h>
33#include <sound/pcm.h>
34#include "intel_sst.h"
35#include "intel_sst_ioctl.h"
36#include "intelmid_snd_control.h"
37#include "intelmid.h"
38
39
40void period_elapsed(void *mad_substream)
41{
42 struct snd_pcm_substream *substream = mad_substream;
43 struct mad_stream_pvt *stream;
44
45
46
47 if (!substream || !substream->runtime)
48 return;
49 stream = substream->runtime->private_data;
50 if (!stream)
51 return;
52
53 if (stream->stream_status != RUNNING)
54 return;
55 pr_debug("calling period elapsed\n");
56 snd_pcm_period_elapsed(substream);
57 return;
58}
59
60
61int snd_intelmad_alloc_stream(struct snd_pcm_substream *substream)
62{
63 struct snd_intelmad *intelmaddata = snd_pcm_substream_chip(substream);
64 struct mad_stream_pvt *stream = substream->runtime->private_data;
65 struct snd_sst_stream_params param = {{{0,},},};
66 struct snd_sst_params str_params = {0};
67 int ret_val;
68
69 /* set codec params and inform SST driver the same */
70
71 param.uc.pcm_params.codec = SST_CODEC_TYPE_PCM;
72 param.uc.pcm_params.num_chan = (u8) substream->runtime->channels;
73 param.uc.pcm_params.pcm_wd_sz = substream->runtime->sample_bits;
74 param.uc.pcm_params.reserved = 0;
75 param.uc.pcm_params.sfreq = substream->runtime->rate;
76 param.uc.pcm_params.ring_buffer_size =
77 snd_pcm_lib_buffer_bytes(substream);
78 param.uc.pcm_params.period_count = substream->runtime->period_size;
79 param.uc.pcm_params.ring_buffer_addr =
80 virt_to_phys(substream->runtime->dma_area);
81 pr_debug("period_cnt = %d\n", param.uc.pcm_params.period_count);
82 pr_debug("sfreq= %d, wd_sz = %d\n",
83 param.uc.pcm_params.sfreq, param.uc.pcm_params.pcm_wd_sz);
84
85 str_params.sparams = param;
86 str_params.codec = SST_CODEC_TYPE_PCM;
87
88 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
89 str_params.ops = STREAM_OPS_PLAYBACK;
90 pr_debug("Playbck stream,Device %d\n", stream->device);
91 } else {
92 str_params.ops = STREAM_OPS_CAPTURE;
93 stream->device = SND_SST_DEVICE_CAPTURE;
94 pr_debug("Capture stream,Device %d\n", stream->device);
95 }
96 str_params.device_type = stream->device;
97 ret_val = intelmaddata->sstdrv_ops->pcm_control->open(&str_params);
98 pr_debug("sst: SST_SND_PLAY/CAPTURE ret_val = %x\n", ret_val);
99 if (ret_val < 0)
100 return ret_val;
101
102 stream->stream_info.str_id = ret_val;
103 stream->stream_status = INIT;
104 stream->stream_info.buffer_ptr = 0;
105 pr_debug("str id : %d\n", stream->stream_info.str_id);
106
107 return ret_val;
108}
109
110int snd_intelmad_init_stream(struct snd_pcm_substream *substream)
111{
112 struct mad_stream_pvt *stream = substream->runtime->private_data;
113 struct snd_intelmad *intelmaddata = snd_pcm_substream_chip(substream);
114 int ret_val;
115
116 pr_debug("setting buffer ptr param\n");
117 stream->stream_info.period_elapsed = period_elapsed;
118 stream->stream_info.mad_substream = substream;
119 stream->stream_info.buffer_ptr = 0;
120 stream->stream_info.sfreq = substream->runtime->rate;
121 ret_val = intelmaddata->sstdrv_ops->pcm_control->device_control(
122 SST_SND_STREAM_INIT, &stream->stream_info);
123 if (ret_val)
124 pr_err("control_set ret error %d\n", ret_val);
125 return ret_val;
126
127}
128
129
130/**
131 * sst_sc_reg_access - IPC read/write wrapper
132 *
133 * @sc_access: array of data, addresses and mask
134 * @type: operation type
135 * @num_val: number of reg to opertae on
136 *
137 * Reads/writes/read-modify operations on registers accessed through SCU (sound
138 * card and few SST DSP regsisters that are not accissible to IA)
139 */
140int sst_sc_reg_access(struct sc_reg_access *sc_access,
141 int type, int num_val)
142{
143 int i, retval = 0;
144 if (type == PMIC_WRITE) {
145 for (i = 0; i < num_val; i++) {
146 retval = intel_scu_ipc_iowrite8(sc_access[i].reg_addr,
147 sc_access[i].value);
148 if (retval)
149 goto err;
150 }
151 } else if (type == PMIC_READ) {
152 for (i = 0; i < num_val; i++) {
153 retval = intel_scu_ipc_ioread8(sc_access[i].reg_addr,
154 &(sc_access[i].value));
155 if (retval)
156 goto err;
157 }
158 } else {
159 for (i = 0; i < num_val; i++) {
160 retval = intel_scu_ipc_update_register(
161 sc_access[i].reg_addr, sc_access[i].value,
162 sc_access[i].mask);
163 if (retval)
164 goto err;
165 }
166 }
167 return 0;
168err:
169 pr_err("IPC failed for cmd %d, %d\n", retval, type);
170 pr_err("reg:0x%2x addr:0x%2x\n",
171 sc_access[i].reg_addr, sc_access[i].value);
172 return retval;
173}
diff --git a/drivers/staging/intel_sst/intelmid_snd_control.h b/drivers/staging/intel_sst/intelmid_snd_control.h
deleted file mode 100644
index 06ad3a10099c..000000000000
--- a/drivers/staging/intel_sst/intelmid_snd_control.h
+++ /dev/null
@@ -1,123 +0,0 @@
1#ifndef __INTELMID_SND_CTRL_H__
2#define __INTELMID_SND_CTRL_H__
3/*
4 * intelmid_snd_control.h - Intel Sound card driver for MID
5 *
6 * Copyright (C) 2008-10 Intel Corporation
7 * Authors: Vinod Koul <vinod.koul@intel.com>
8 * Harsha Priya <priya.harsha@intel.com>
9 * Dharageswari R <dharageswari.r@intel.com>
10 * KP Jeeja <jeeja.kp@intel.com>
11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; version 2 of the License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 *
28 * This file defines all snd control functions
29 */
30
31/*
32Mask bits
33*/
34#define MASK0 0x01 /* 0000 0001 */
35#define MASK1 0x02 /* 0000 0010 */
36#define MASK2 0x04 /* 0000 0100 */
37#define MASK3 0x08 /* 0000 1000 */
38#define MASK4 0x10 /* 0001 0000 */
39#define MASK5 0x20 /* 0010 0000 */
40#define MASK6 0x40 /* 0100 0000 */
41#define MASK7 0x80 /* 1000 0000 */
42/*
43value bits
44*/
45#define VALUE0 0x01 /* 0000 0001 */
46#define VALUE1 0x02 /* 0000 0010 */
47#define VALUE2 0x04 /* 0000 0100 */
48#define VALUE3 0x08 /* 0000 1000 */
49#define VALUE4 0x10 /* 0001 0000 */
50#define VALUE5 0x20 /* 0010 0000 */
51#define VALUE6 0x40 /* 0100 0000 */
52#define VALUE7 0x80 /* 1000 0000 */
53
54#define MUTE 0 /* ALSA Passes 0 for mute */
55#define UNMUTE 1 /* ALSA Passes 1 for unmute */
56
57#define MAX_VOL_PMIC_VENDOR0 0x3f /* max vol in dB for stereo & voice DAC */
58#define MIN_VOL_PMIC_VENDOR0 0 /* min vol in dB for stereo & voice DAC */
59/* Head phone volume control */
60#define MAX_HP_VOL_PMIC_VENDOR1 6 /* max volume in dB for HP */
61#define MIN_HP_VOL_PMIC_VENDOR1 (-84) /* min volume in dB for HP */
62#define MAX_HP_VOL_INDX_PMIC_VENDOR1 40 /* Number of HP volume control values */
63
64/* Mono Earpiece Volume control */
65#define MAX_EP_VOL_PMIC_VENDOR1 0 /* max volume in dB for EP */
66#define MIN_EP_VOL_PMIC_VENDOR1 (-75) /* min volume in dB for EP */
67#define MAX_EP_VOL_INDX_PMIC_VENDOR1 32 /* Number of EP volume control values */
68
69int sst_sc_reg_access(struct sc_reg_access *sc_access,
70 int type, int num_val);
71extern struct snd_pmic_ops snd_pmic_ops_fs;
72extern struct snd_pmic_ops snd_pmic_ops_mx;
73extern struct snd_pmic_ops snd_pmic_ops_nc;
74extern struct snd_pmic_ops snd_msic_ops;
75
76/* device */
77enum SND_INPUT_DEVICE {
78 AMIC,
79 DMIC,
80 HS_MIC,
81 IN_UNDEFINED
82};
83enum SND_LINE_OUT_DEVICE {
84 HEADSET,
85 IHF,
86 VIBRA1,
87 VIBRA2,
88 NONE,
89};
90
91enum SND_OUTPUT_DEVICE {
92 STEREO_HEADPHONE,
93 MONO_EARPIECE,
94
95 INTERNAL_SPKR,
96 RECEIVER,
97 OUT_UNDEFINED
98};
99
100enum pmic_controls {
101 PMIC_SND_HP_MIC_MUTE = 0x0001,
102 PMIC_SND_AMIC_MUTE = 0x0002,
103 PMIC_SND_DMIC_MUTE = 0x0003,
104 PMIC_SND_CAPTURE_VOL = 0x0004,
105/* Output controls */
106 PMIC_SND_LEFT_PB_VOL = 0x0010,
107 PMIC_SND_RIGHT_PB_VOL = 0x0011,
108 PMIC_SND_LEFT_HP_MUTE = 0x0012,
109 PMIC_SND_RIGHT_HP_MUTE = 0x0013,
110 PMIC_SND_LEFT_SPEAKER_MUTE = 0x0014,
111 PMIC_SND_RIGHT_SPEAKER_MUTE = 0x0015,
112 PMIC_SND_RECEIVER_VOL = 0x0016,
113 PMIC_SND_RECEIVER_MUTE = 0x0017,
114 PMIC_SND_LEFT_MASTER_VOL = 0x0018,
115 PMIC_SND_RIGHT_MASTER_VOL = 0x0019,
116/* Other controls */
117 PMIC_SND_MUTE_ALL = 0x0020,
118 PMIC_MAX_CONTROLS = 0x0020,
119};
120
121#endif /* __INTELMID_SND_CTRL_H__ */
122
123
diff --git a/drivers/staging/intel_sst/intelmid_v0_control.c b/drivers/staging/intel_sst/intelmid_v0_control.c
deleted file mode 100644
index b8dfdb9bc1aa..000000000000
--- a/drivers/staging/intel_sst/intelmid_v0_control.c
+++ /dev/null
@@ -1,866 +0,0 @@
1/*
2 * intel_sst_v0_control.c - Intel SST Driver for audio engine
3 *
4 * Copyright (C) 2008-10 Intel Corporation
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * Dharageswari R <dharageswari.r@intel.com>
8 * KP Jeeja <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This file contains the control operations of vendor 1
27 */
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/pci.h>
32#include <linux/file.h>
33#include <sound/control.h>
34#include "intel_sst.h"
35#include "intelmid_snd_control.h"
36#include "intelmid.h"
37
38enum _reg_v1 {
39 VOICEPORT1 = 0x180,
40 VOICEPORT2 = 0x181,
41 AUDIOPORT1 = 0x182,
42 AUDIOPORT2 = 0x183,
43 MISCVOICECTRL = 0x184,
44 MISCAUDCTRL = 0x185,
45 DMICCTRL1 = 0x186,
46 AUDIOBIAS = 0x187,
47 MICCTRL = 0x188,
48 MICLICTRL1 = 0x189,
49 MICLICTRL2 = 0x18A,
50 MICLICTRL3 = 0x18B,
51 VOICEDACCTRL1 = 0x18C,
52 STEREOADCCTRL = 0x18D,
53 AUD15 = 0x18E,
54 AUD16 = 0x18F,
55 AUD17 = 0x190,
56 AUD18 = 0x191,
57 RMIXOUTSEL = 0x192,
58 ANALOGLBR = 0x193,
59 ANALOGLBL = 0x194,
60 POWERCTRL1 = 0x195,
61 POWERCTRL2 = 0x196,
62 HEADSETDETECTINT = 0x197,
63 HEADSETDETECTINTMASK = 0x198,
64 TRIMENABLE = 0x199,
65};
66
67int rev_id = 0x20;
68static bool jack_det_enabled;
69
70/****
71 * fs_init_card - initialize the sound card
72 *
73 * This initializes the audio paths to know values in case of this sound card
74 */
75static int fs_init_card(void)
76{
77 struct sc_reg_access sc_access[] = {
78 {0x180, 0x00, 0x0},
79 {0x181, 0x00, 0x0},
80 {0x182, 0xF8, 0x0},
81 {0x183, 0x08, 0x0},
82 {0x184, 0x00, 0x0},
83 {0x185, 0x40, 0x0},
84 {0x186, 0x06, 0x0},
85 {0x187, 0x80, 0x0},
86 {0x188, 0x40, 0x0},
87 {0x189, 0x39, 0x0},
88 {0x18a, 0x39, 0x0},
89 {0x18b, 0x1F, 0x0},
90 {0x18c, 0x00, 0x0},
91 {0x18d, 0x00, 0x0},
92 {0x18e, 0x39, 0x0},
93 {0x18f, 0x39, 0x0},
94 {0x190, 0x39, 0x0},
95 {0x191, 0x11, 0x0},
96 {0x192, 0x0E, 0x0},
97 {0x193, 0x00, 0x0},
98 {0x194, 0x00, 0x0},
99 {0x195, 0x00, 0x0},
100 {0x196, 0x7C, 0x0},
101 {0x197, 0x00, 0x0},
102 {0x198, 0x0B, 0x0},
103 {0x199, 0x00, 0x0},
104 {0x037, 0x3F, 0x0},
105 };
106
107 snd_pmic_ops_fs.card_status = SND_CARD_INIT_DONE;
108 snd_pmic_ops_fs.master_mute = UNMUTE;
109 snd_pmic_ops_fs.mute_status = UNMUTE;
110 snd_pmic_ops_fs.num_channel = 2;
111 return sst_sc_reg_access(sc_access, PMIC_WRITE, 27);
112}
113
114static int fs_enable_audiodac(int value)
115{
116 struct sc_reg_access sc_access[3];
117 sc_access[0].reg_addr = AUD16;
118 sc_access[1].reg_addr = AUD17;
119 sc_access[2].reg_addr = AUD15;
120 sc_access[0].mask = sc_access[1].mask = sc_access[2].mask = MASK7;
121
122 if (snd_pmic_ops_fs.mute_status == MUTE)
123 return 0;
124 if (value == MUTE) {
125 sc_access[0].value = sc_access[1].value =
126 sc_access[2].value = 0x80;
127
128 } else {
129 sc_access[0].value = sc_access[1].value =
130 sc_access[2].value = 0x0;
131 }
132 if (snd_pmic_ops_fs.num_channel == 1)
133 sc_access[1].value = sc_access[2].value = 0x80;
134 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 3);
135
136}
137
138static int fs_power_up_pb(unsigned int port)
139{
140 struct sc_reg_access sc_access[] = {
141 {AUDIOBIAS, 0x00, MASK7},
142 {POWERCTRL1, 0xC6, 0xC6},
143 {POWERCTRL2, 0x30, 0x30},
144
145 };
146 int retval = 0;
147
148 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
149 retval = fs_init_card();
150 if (retval)
151 return retval;
152 retval = fs_enable_audiodac(MUTE);
153 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 3);
154
155 if (retval)
156 return retval;
157
158 pr_debug("in fs power up pb\n");
159 return fs_enable_audiodac(UNMUTE);
160}
161
162static int fs_power_down_pb(unsigned int device)
163{
164 struct sc_reg_access sc_access[] = {
165 {POWERCTRL1, 0x00, 0xC6},
166 {POWERCTRL2, 0x00, 0x30},
167 };
168 int retval = 0;
169
170 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
171 retval = fs_init_card();
172 if (retval)
173 return retval;
174 retval = fs_enable_audiodac(MUTE);
175 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
176
177 if (retval)
178 return retval;
179
180 pr_debug("in fsl power down pb\n");
181 return fs_enable_audiodac(UNMUTE);
182}
183
184static int fs_power_up_cp(unsigned int port)
185{
186 struct sc_reg_access sc_access[] = {
187 {POWERCTRL2, 0x32, 0x32}, /*NOTE power up A ADC only as*/
188 {AUDIOBIAS, 0x00, MASK7},
189 /*as turning on V ADC causes noise*/
190 };
191 int retval = 0;
192
193 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
194 retval = fs_init_card();
195 if (retval)
196 return retval;
197 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
198}
199
200static int fs_power_down_cp(unsigned int device)
201{
202 struct sc_reg_access sc_access[] = {
203 {POWERCTRL2, 0x00, 0x03},
204 };
205 int retval = 0;
206
207 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
208 retval = fs_init_card();
209 if (retval)
210 return retval;
211 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
212}
213
214static int fs_power_down(void)
215{
216 int retval = 0;
217 struct sc_reg_access sc_access[] = {
218 {AUDIOBIAS, MASK7, MASK7},
219 };
220
221 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
222 retval = fs_init_card();
223 if (retval)
224 return retval;
225 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
226}
227
228static int fs_set_pcm_voice_params(void)
229{
230 struct sc_reg_access sc_access[] = {
231 {0x180, 0xA0, 0},
232 {0x181, 0x04, 0},
233 {0x182, 0x0, 0},
234 {0x183, 0x0, 0},
235 {0x184, 0x18, 0},
236 {0x185, 0x40, 0},
237 {0x186, 0x06, 0},
238 {0x187, 0x0, 0},
239 {0x188, 0x10, 0},
240 {0x189, 0x39, 0},
241 {0x18a, 0x39, 0},
242 {0x18b, 0x02, 0},
243 {0x18c, 0x0, 0},
244 {0x18d, 0x0, 0},
245 {0x18e, 0x39, 0},
246 {0x18f, 0x0, 0},
247 {0x190, 0x0, 0},
248 {0x191, 0x20, 0},
249 {0x192, 0x20, 0},
250 {0x193, 0x0, 0},
251 {0x194, 0x0, 0},
252 {0x195, 0x06, 0},
253 {0x196, 0x25, 0},
254 {0x197, 0x0, 0},
255 {0x198, 0xF, 0},
256 {0x199, 0x0, 0},
257 };
258 int retval = 0;
259
260 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
261 retval = fs_init_card();
262 if (retval)
263 return retval;
264 return sst_sc_reg_access(sc_access, PMIC_WRITE, 26);
265}
266
267static int fs_set_audio_port(int status)
268{
269 struct sc_reg_access sc_access[2];
270 int retval = 0;
271
272 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
273 retval = fs_init_card();
274 if (retval)
275 return retval;
276 if (status == DEACTIVATE) {
277 /* Deactivate audio port-tristate and power */
278 sc_access[0].value = 0x00;
279 sc_access[0].mask = MASK6|MASK7;
280 sc_access[0].reg_addr = AUDIOPORT1;
281 sc_access[1].value = 0x00;
282 sc_access[1].mask = MASK4|MASK5;
283 sc_access[1].reg_addr = POWERCTRL2;
284 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
285 } else if (status == ACTIVATE) {
286 /* activate audio port */
287 sc_access[0].value = 0xC0;
288 sc_access[0].mask = MASK6|MASK7;
289 sc_access[0].reg_addr = AUDIOPORT1;
290 sc_access[1].value = 0x30;
291 sc_access[1].mask = MASK4|MASK5;
292 sc_access[1].reg_addr = POWERCTRL2;
293 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
294 } else
295 return -EINVAL;
296}
297
298static int fs_set_voice_port(int status)
299{
300 struct sc_reg_access sc_access[2];
301 int retval = 0;
302
303 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
304 retval = fs_init_card();
305 if (retval)
306 return retval;
307 if (status == DEACTIVATE) {
308 /* Deactivate audio port-tristate and power */
309 sc_access[0].value = 0x00;
310 sc_access[0].mask = MASK6|MASK7;
311 sc_access[0].reg_addr = VOICEPORT1;
312 sc_access[1].value = 0x00;
313 sc_access[1].mask = MASK0|MASK1;
314 sc_access[1].reg_addr = POWERCTRL2;
315 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
316 } else if (status == ACTIVATE) {
317 /* activate audio port */
318 sc_access[0].value = 0xC0;
319 sc_access[0].mask = MASK6|MASK7;
320 sc_access[0].reg_addr = VOICEPORT1;
321 sc_access[1].value = 0x03;
322 sc_access[1].mask = MASK0|MASK1;
323 sc_access[1].reg_addr = POWERCTRL2;
324 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
325 } else
326 return -EINVAL;
327}
328
329static int fs_set_pcm_audio_params(int sfreq, int word_size, int num_channel)
330{
331 u8 config1 = 0;
332 struct sc_reg_access sc_access[4];
333 int retval = 0, num_value = 0;
334
335 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
336 retval = fs_init_card();
337 if (retval)
338 return retval;
339 switch (sfreq) {
340 case 8000:
341 config1 = 0x00;
342 break;
343 case 11025:
344 config1 = 0x01;
345 break;
346 case 12000:
347 config1 = 0x02;
348 break;
349 case 16000:
350 config1 = 0x03;
351 break;
352 case 22050:
353 config1 = 0x04;
354 break;
355 case 24000:
356 config1 = 0x05;
357 break;
358 case 26000:
359 config1 = 0x06;
360 break;
361 case 32000:
362 config1 = 0x07;
363 break;
364 case 44100:
365 config1 = 0x08;
366 break;
367 case 48000:
368 config1 = 0x09;
369 break;
370 }
371 snd_pmic_ops_fs.num_channel = num_channel;
372 if (snd_pmic_ops_fs.num_channel == 1) {
373 sc_access[0].reg_addr = AUD17;
374 sc_access[1].reg_addr = AUD15;
375 sc_access[0].mask = sc_access[1].mask = MASK7;
376 sc_access[0].value = sc_access[1].value = 0x80;
377 sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
378
379 } else {
380 sc_access[0].reg_addr = AUD17;
381 sc_access[1].reg_addr = AUD15;
382 sc_access[0].mask = sc_access[1].mask = MASK7;
383 sc_access[0].value = sc_access[1].value = 0x00;
384 sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
385
386 }
387 pr_debug("sfreq:%d,Register value = %x\n", sfreq, config1);
388
389 if (word_size == 24) {
390 sc_access[0].reg_addr = AUDIOPORT1;
391 sc_access[0].mask = MASK0|MASK1|MASK2|MASK3;
392 sc_access[0].value = 0xFB;
393
394
395 sc_access[1].reg_addr = AUDIOPORT2;
396 sc_access[1].value = config1 | 0x10;
397 sc_access[1].mask = MASK0 | MASK1 | MASK2 | MASK3
398 | MASK4 | MASK5 | MASK6;
399
400 sc_access[2].reg_addr = MISCAUDCTRL;
401 sc_access[2].value = 0x02;
402 sc_access[2].mask = 0x02;
403
404 num_value = 3 ;
405
406 } else {
407
408 sc_access[0].reg_addr = AUDIOPORT2;
409 sc_access[0].value = config1;
410 sc_access[0].mask = MASK0|MASK1|MASK2|MASK3;
411
412 sc_access[1].reg_addr = MISCAUDCTRL;
413 sc_access[1].value = 0x00;
414 sc_access[1].mask = 0x02;
415 num_value = 2;
416 }
417 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, num_value);
418
419}
420
421static int fs_set_selected_input_dev(u8 value)
422{
423 struct sc_reg_access sc_access_dmic[] = {
424 {MICCTRL, 0x81, 0xf7},
425 {MICLICTRL3, 0x00, 0xE0},
426 };
427 struct sc_reg_access sc_access_mic[] = {
428 {MICCTRL, 0x40, MASK2|MASK4|MASK5|MASK6|MASK7},
429 {MICLICTRL3, 0x00, 0xE0},
430 };
431 struct sc_reg_access sc_access_hsmic[] = {
432 {MICCTRL, 0x10, MASK2|MASK4|MASK5|MASK6|MASK7},
433 {MICLICTRL3, 0x00, 0xE0},
434 };
435
436 int retval = 0;
437
438 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
439 retval = fs_init_card();
440 if (retval)
441 return retval;
442
443 switch (value) {
444 case AMIC:
445 pr_debug("Selecting amic not supported in mono cfg\n");
446 return sst_sc_reg_access(sc_access_mic, PMIC_READ_MODIFY, 2);
447 break;
448
449 case HS_MIC:
450 pr_debug("Selecting hsmic\n");
451 return sst_sc_reg_access(sc_access_hsmic,
452 PMIC_READ_MODIFY, 2);
453 break;
454
455 case DMIC:
456 pr_debug("Selecting dmic\n");
457 return sst_sc_reg_access(sc_access_dmic, PMIC_READ_MODIFY, 2);
458 break;
459
460 default:
461 return -EINVAL;
462
463 }
464}
465
466static int fs_set_selected_output_dev(u8 value)
467{
468 struct sc_reg_access sc_access_hp[] = {
469 {0x191, 0x11, 0x0},
470 {0x192, 0x0E, 0x0},
471 };
472 struct sc_reg_access sc_access_is[] = {
473 {0x191, 0x17, 0xFF},
474 {0x192, 0x08, 0xFF},
475 };
476 int retval = 0;
477
478 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
479 retval = fs_init_card();
480 if (retval)
481 return retval;
482
483 switch (value) {
484 case STEREO_HEADPHONE:
485 pr_debug("SST DBG:Selecting headphone\n");
486 return sst_sc_reg_access(sc_access_hp, PMIC_WRITE, 2);
487 break;
488 case MONO_EARPIECE:
489 case INTERNAL_SPKR:
490 pr_debug("SST DBG:Selecting internal spkr\n");
491 return sst_sc_reg_access(sc_access_is, PMIC_READ_MODIFY, 2);
492 break;
493
494 default:
495 return -EINVAL;
496
497 }
498}
499
500static int fs_set_mute(int dev_id, u8 value)
501{
502 struct sc_reg_access sc_access[6] = {{0,},};
503 int reg_num = 0;
504 int retval = 0;
505
506 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
507 retval = fs_init_card();
508 if (retval)
509 return retval;
510
511
512 pr_debug("dev_id:0x%x value:0x%x\n", dev_id, value);
513 switch (dev_id) {
514 case PMIC_SND_DMIC_MUTE:
515 sc_access[0].reg_addr = MICCTRL;
516 sc_access[1].reg_addr = MICLICTRL1;
517 sc_access[2].reg_addr = MICLICTRL2;
518 sc_access[0].mask = MASK5;
519 sc_access[1].mask = sc_access[2].mask = MASK6;
520 if (value == MUTE) {
521 sc_access[0].value = 0x20;
522 sc_access[2].value = sc_access[1].value = 0x40;
523 } else
524 sc_access[0].value = sc_access[1].value
525 = sc_access[2].value = 0x0;
526 reg_num = 3;
527 break;
528 case PMIC_SND_HP_MIC_MUTE:
529 case PMIC_SND_AMIC_MUTE:
530 sc_access[0].reg_addr = MICLICTRL1;
531 sc_access[1].reg_addr = MICLICTRL2;
532 sc_access[0].mask = sc_access[1].mask = MASK6;
533 if (value == MUTE)
534 sc_access[0].value = sc_access[1].value = 0x40;
535 else
536 sc_access[0].value = sc_access[1].value = 0x0;
537 reg_num = 2;
538 break;
539 case PMIC_SND_LEFT_SPEAKER_MUTE:
540 case PMIC_SND_LEFT_HP_MUTE:
541 sc_access[0].reg_addr = AUD16;
542 sc_access[1].reg_addr = AUD15;
543
544 sc_access[0].mask = sc_access[1].mask = MASK7;
545 if (value == MUTE)
546 sc_access[0].value = sc_access[1].value = 0x80;
547 else
548 sc_access[0].value = sc_access[1].value = 0x0;
549 reg_num = 2;
550 snd_pmic_ops_fs.mute_status = value;
551 break;
552 case PMIC_SND_RIGHT_HP_MUTE:
553 case PMIC_SND_RIGHT_SPEAKER_MUTE:
554 sc_access[0].reg_addr = AUD17;
555 sc_access[1].reg_addr = AUD15;
556 sc_access[0].mask = sc_access[1].mask = MASK7;
557 if (value == MUTE)
558 sc_access[0].value = sc_access[1].value = 0x80;
559 else
560 sc_access[0].value = sc_access[1].value = 0x0;
561 snd_pmic_ops_fs.mute_status = value;
562 if (snd_pmic_ops_fs.num_channel == 1)
563 sc_access[0].value = sc_access[1].value = 0x80;
564 reg_num = 2;
565 break;
566 case PMIC_SND_MUTE_ALL:
567 sc_access[0].reg_addr = AUD16;
568 sc_access[1].reg_addr = AUD17;
569 sc_access[2].reg_addr = AUD15;
570 sc_access[3].reg_addr = MICCTRL;
571 sc_access[4].reg_addr = MICLICTRL1;
572 sc_access[5].reg_addr = MICLICTRL2;
573 sc_access[0].mask = sc_access[1].mask =
574 sc_access[2].mask = MASK7;
575 sc_access[3].mask = MASK5;
576 sc_access[4].mask = sc_access[5].mask = MASK6;
577
578 if (value == MUTE) {
579 sc_access[0].value =
580 sc_access[1].value = sc_access[2].value = 0x80;
581 sc_access[3].value = 0x20;
582 sc_access[4].value = sc_access[5].value = 0x40;
583
584 } else {
585 sc_access[0].value = sc_access[1].value =
586 sc_access[2].value = sc_access[3].value =
587 sc_access[4].value = sc_access[5].value = 0x0;
588 }
589 if (snd_pmic_ops_fs.num_channel == 1)
590 sc_access[1].value = sc_access[2].value = 0x80;
591 reg_num = 6;
592 snd_pmic_ops_fs.mute_status = value;
593 snd_pmic_ops_fs.master_mute = value;
594 break;
595
596 }
597 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, reg_num);
598}
599
600static int fs_set_vol(int dev_id, int value)
601{
602 struct sc_reg_access sc_acces, sc_access[4] = {{0},};
603 int reg_num = 0;
604 int retval = 0;
605
606 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
607 retval = fs_init_card();
608 if (retval)
609 return retval;
610
611 switch (dev_id) {
612 case PMIC_SND_LEFT_PB_VOL:
613 pr_debug("PMIC_SND_LEFT_PB_VOL:%d\n", value);
614 sc_access[0].value = sc_access[1].value = value;
615 sc_access[0].reg_addr = AUD16;
616 sc_access[1].reg_addr = AUD15;
617 sc_access[0].mask = sc_access[1].mask =
618 (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
619 reg_num = 2;
620 break;
621
622 case PMIC_SND_RIGHT_PB_VOL:
623 pr_debug("PMIC_SND_RIGHT_PB_VOL:%d\n", value);
624 sc_access[0].value = sc_access[1].value = value;
625 sc_access[0].reg_addr = AUD17;
626 sc_access[1].reg_addr = AUD15;
627 sc_access[0].mask = sc_access[1].mask =
628 (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
629 if (snd_pmic_ops_fs.num_channel == 1) {
630 sc_access[0].value = sc_access[1].value = 0x80;
631 sc_access[0].mask = sc_access[1].mask = MASK7;
632 }
633 reg_num = 2;
634 break;
635 case PMIC_SND_CAPTURE_VOL:
636 pr_debug("PMIC_SND_CAPTURE_VOL:%d\n", value);
637 sc_access[0].reg_addr = MICLICTRL1;
638 sc_access[1].reg_addr = MICLICTRL2;
639 sc_access[2].reg_addr = DMICCTRL1;
640 sc_access[2].value = value;
641 sc_access[0].value = sc_access[1].value = value;
642 sc_acces.reg_addr = MICLICTRL3;
643 sc_acces.value = value;
644 sc_acces.mask = (MASK0|MASK1|MASK2|MASK3|MASK5|MASK6|MASK7);
645 retval = sst_sc_reg_access(&sc_acces, PMIC_READ_MODIFY, 1);
646 sc_access[0].mask = sc_access[1].mask =
647 sc_access[2].mask = (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
648 reg_num = 3;
649 break;
650
651 default:
652 return -EINVAL;
653 }
654
655 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, reg_num);
656}
657
658static int fs_get_mute(int dev_id, u8 *value)
659{
660 struct sc_reg_access sc_access[6] = {{0,},};
661
662 int retval = 0, temp_value = 0, mask = 0;
663
664 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
665 retval = fs_init_card();
666 if (retval)
667 return retval;
668
669 switch (dev_id) {
670
671 case PMIC_SND_AMIC_MUTE:
672 case PMIC_SND_HP_MIC_MUTE:
673 sc_access[0].reg_addr = MICLICTRL1;
674 mask = MASK6;
675 retval = sst_sc_reg_access(sc_access, PMIC_READ, 1);
676 if (sc_access[0].value & mask)
677 *value = MUTE;
678 else
679 *value = UNMUTE;
680 break;
681 case PMIC_SND_DMIC_MUTE:
682 sc_access[0].reg_addr = MICCTRL;
683 mask = MASK5;
684 retval = sst_sc_reg_access(sc_access, PMIC_READ, 1);
685 temp_value = (sc_access[0].value & mask);
686 if (temp_value == 0)
687 *value = UNMUTE;
688 else
689 *value = MUTE;
690 break;
691
692 case PMIC_SND_LEFT_HP_MUTE:
693 case PMIC_SND_LEFT_SPEAKER_MUTE:
694 sc_access[0].reg_addr = AUD16;
695 mask = MASK7;
696 retval = sst_sc_reg_access(sc_access, PMIC_READ, 1);
697 temp_value = sc_access[0].value & mask;
698 if (temp_value == 0)
699 *value = UNMUTE;
700 else
701 *value = MUTE;
702 break;
703 case PMIC_SND_RIGHT_HP_MUTE:
704 case PMIC_SND_RIGHT_SPEAKER_MUTE:
705 sc_access[0].reg_addr = AUD17;
706 mask = MASK7;
707 retval = sst_sc_reg_access(sc_access, PMIC_READ, 1);
708 temp_value = sc_access[0].value & mask;
709 if (temp_value == 0)
710 *value = UNMUTE;
711 else
712 *value = MUTE;
713 break;
714 default:
715 return -EINVAL;
716 }
717
718 return retval;
719}
720
721static int fs_get_vol(int dev_id, int *value)
722{
723 struct sc_reg_access sc_access = {0,};
724 int retval = 0, mask = 0;
725
726 if (snd_pmic_ops_fs.card_status == SND_CARD_UN_INIT)
727 retval = fs_init_card();
728 if (retval)
729 return retval;
730
731 switch (dev_id) {
732 case PMIC_SND_CAPTURE_VOL:
733 pr_debug("PMIC_SND_CAPTURE_VOL\n");
734 sc_access.reg_addr = MICLICTRL1;
735 mask = (MASK5|MASK4|MASK3|MASK2|MASK1|MASK0);
736 break;
737 case PMIC_SND_LEFT_PB_VOL:
738 pr_debug("PMIC_SND_LEFT_PB_VOL\n");
739 sc_access.reg_addr = AUD16;
740 mask = (MASK5|MASK4|MASK3|MASK2|MASK1|MASK0);
741 break;
742 case PMIC_SND_RIGHT_PB_VOL:
743 pr_debug("PMIC_SND_RT_PB_VOL\n");
744 sc_access.reg_addr = AUD17;
745 mask = (MASK5|MASK4|MASK3|MASK2|MASK1|MASK0);
746 break;
747 default:
748 return -EINVAL;
749 }
750
751 retval = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
752 pr_debug("value read = 0x%x\n", sc_access.value);
753 *value = (int) (sc_access.value & mask);
754 pr_debug("value returned = 0x%x\n", *value);
755 return retval;
756}
757
758static void fs_pmic_irq_enable(void *data)
759{
760 struct snd_intelmad *intelmaddata = data;
761 struct sc_reg_access sc_access[] = {
762 {0x187, 0x00, MASK7},
763 {0x188, 0x10, MASK4},
764 {0x18b, 0x10, MASK4},
765 };
766
767 struct sc_reg_access sc_access_write[] = {
768 {0x198, 0x00, 0x0},
769 };
770 pr_debug("Audio interrupt enable\n");
771 sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 3);
772 sst_sc_reg_access(sc_access_write, PMIC_WRITE, 1);
773
774 intelmaddata->jack[0].jack_status = 0;
775 /*intelmaddata->jack[1].jack_status = 0;*/
776
777 jack_det_enabled = true;
778 return;
779}
780
781static void fs_pmic_irq_cb(void *cb_data, u8 value)
782{
783 struct mad_jack *mjack = NULL;
784 struct snd_intelmad *intelmaddata = cb_data;
785 unsigned int present = 0, jack_event_flag = 0, buttonpressflag = 0;
786
787 mjack = &intelmaddata->jack[0];
788
789 if (value & 0x4) {
790 if (!jack_det_enabled)
791 fs_pmic_irq_enable(intelmaddata);
792
793 /* send headphone detect */
794 pr_debug(":MAD headphone %d\n", value & 0x4);
795 present = !(mjack->jack_status);
796 mjack->jack_status = present;
797 jack_event_flag = 1;
798 mjack->jack.type = SND_JACK_HEADPHONE;
799 }
800
801 if (value & 0x2) {
802 /* send short push */
803 pr_debug(":MAD short push %d\n", value & 0x2);
804 present = 1;
805 jack_event_flag = 1;
806 buttonpressflag = 1;
807 mjack->jack.type = MID_JACK_HS_SHORT_PRESS;
808 }
809
810 if (value & 0x1) {
811 /* send long push */
812 pr_debug(":MAD long push %d\n", value & 0x1);
813 present = 1;
814 jack_event_flag = 1;
815 buttonpressflag = 1;
816 mjack->jack.type = MID_JACK_HS_LONG_PRESS;
817 }
818
819 if (value & 0x8) {
820 if (!jack_det_enabled)
821 fs_pmic_irq_enable(intelmaddata);
822 /* send headset detect */
823 pr_debug(":MAD headset = %d\n", value & 0x8);
824 present = !(mjack->jack_status);
825 mjack->jack_status = present;
826 jack_event_flag = 1;
827 mjack->jack.type = SND_JACK_HEADSET;
828 }
829
830
831 if (jack_event_flag)
832 sst_mad_send_jack_report(&mjack->jack,
833 buttonpressflag, present);
834
835 return;
836}
837static int fs_jack_enable(void)
838{
839 return 0;
840}
841
842struct snd_pmic_ops snd_pmic_ops_fs = {
843 .set_input_dev = fs_set_selected_input_dev,
844 .set_output_dev = fs_set_selected_output_dev,
845 .set_mute = fs_set_mute,
846 .get_mute = fs_get_mute,
847 .set_vol = fs_set_vol,
848 .get_vol = fs_get_vol,
849 .init_card = fs_init_card,
850 .set_pcm_audio_params = fs_set_pcm_audio_params,
851 .set_pcm_voice_params = fs_set_pcm_voice_params,
852 .set_voice_port = fs_set_voice_port,
853 .set_audio_port = fs_set_audio_port,
854 .power_up_pmic_pb = fs_power_up_pb,
855 .power_up_pmic_cp = fs_power_up_cp,
856 .power_down_pmic_pb = fs_power_down_pb,
857 .power_down_pmic_cp = fs_power_down_cp,
858 .power_down_pmic = fs_power_down,
859 .pmic_irq_cb = fs_pmic_irq_cb,
860 /*
861 * Jack detection enabling
862 * need be delayed till first IRQ happen.
863 */
864 .pmic_irq_enable = NULL,
865 .pmic_jack_enable = fs_jack_enable,
866};
diff --git a/drivers/staging/intel_sst/intelmid_v1_control.c b/drivers/staging/intel_sst/intelmid_v1_control.c
deleted file mode 100644
index 9d00728d8deb..000000000000
--- a/drivers/staging/intel_sst/intelmid_v1_control.c
+++ /dev/null
@@ -1,978 +0,0 @@
1/* intel_sst_v1_control.c - Intel SST Driver for audio engine
2 *
3 * Copyright (C) 2008-10 Intel Corp
4 * Authors: Vinod Koul <vinod.koul@intel.com>
5 * Harsha Priya <priya.harsha@intel.com>
6 * Dharageswari R <dharageswari.r@intel.com>
7 * KP Jeeja <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 *
25 * This file contains the control operations of vendor 2
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/pci.h>
31#include <linux/delay.h>
32#include <linux/file.h>
33#include <asm/mrst.h>
34#include <sound/pcm.h>
35#include <sound/pcm_params.h>
36#include <sound/control.h>
37#include <sound/initval.h>
38#include "intel_sst.h"
39#include "intel_sst_ioctl.h"
40#include "intelmid.h"
41#include "intelmid_snd_control.h"
42
43#include <linux/gpio.h>
44#define KOSKI_VOICE_CODEC_ENABLE 46
45
46enum _reg_v2 {
47
48 MASTER_CLOCK_PRESCALAR = 0x205,
49 SET_MASTER_AND_LR_CLK1 = 0x20b,
50 SET_MASTER_AND_LR_CLK2 = 0x20c,
51 MASTER_MODE_AND_DATA_DELAY = 0x20d,
52 DIGITAL_INTERFACE_TO_DAI2 = 0x20e,
53 CLK_AND_FS1 = 0x208,
54 CLK_AND_FS2 = 0x209,
55 DAI2_TO_DAC_HP = 0x210,
56 HP_OP_SINGLE_ENDED = 0x224,
57 ENABLE_OPDEV_CTRL = 0x226,
58 ENABLE_DEV_AND_USE_XTAL = 0x227,
59
60 /* Max audio subsystem (PQ49) MAX 8921 */
61 AS_IP_MODE_CTL = 0xF9,
62 AS_LEFT_SPKR_VOL_CTL = 0xFA, /* Mono Earpiece volume control */
63 AS_RIGHT_SPKR_VOL_CTL = 0xFB,
64 AS_LEFT_HP_VOL_CTL = 0xFC,
65 AS_RIGHT_HP_VOL_CTL = 0xFD,
66 AS_OP_MIX_CTL = 0xFE,
67 AS_CONFIG = 0xFF,
68
69 /* Headphone volume control & mute registers */
70 VOL_CTRL_LT = 0x21c,
71 VOL_CTRL_RT = 0x21d,
72
73};
74/**
75 * mx_init_card - initialize the sound card
76 *
77 * This initializes the audio paths to know values in case of this sound card
78 */
79static int mx_init_card(void)
80{
81 struct sc_reg_access sc_access[] = {
82 {0x200, 0x80, 0x00},
83 {0x201, 0xC0, 0x00},
84 {0x202, 0x00, 0x00},
85 {0x203, 0x00, 0x00},
86 {0x204, 0x02, 0x00},
87 {0x205, 0x10, 0x00},
88 {0x206, 0x60, 0x00},
89 {0x207, 0x00, 0x00},
90 {0x208, 0x90, 0x00},
91 {0x209, 0x51, 0x00},
92 {0x20a, 0x00, 0x00},
93 {0x20b, 0x10, 0x00},
94 {0x20c, 0x00, 0x00},
95 {0x20d, 0x00, 0x00},
96 {0x20e, 0x21, 0x00},
97 {0x20f, 0x00, 0x00},
98 {0x210, 0x84, 0x00},
99 {0x211, 0xB3, 0x00},
100 {0x212, 0x00, 0x00},
101 {0x213, 0x00, 0x00},
102 {0x214, 0x41, 0x00},
103 {0x215, 0x00, 0x00},
104 {0x216, 0x00, 0x00},
105 {0x217, 0x00, 0x00},
106 {0x218, 0x03, 0x00},
107 {0x219, 0x03, 0x00},
108 {0x21a, 0x00, 0x00},
109 {0x21b, 0x00, 0x00},
110 {0x21c, 0x00, 0x00},
111 {0x21d, 0x00, 0x00},
112 {0x21e, 0x00, 0x00},
113 {0x21f, 0x00, 0x00},
114 {0x220, 0x20, 0x00},
115 {0x221, 0x20, 0x00},
116 {0x222, 0x51, 0x00},
117 {0x223, 0x20, 0x00},
118 {0x224, 0x04, 0x00},
119 {0x225, 0x80, 0x00},
120 {0x226, 0x0F, 0x00},
121 {0x227, 0x08, 0x00},
122 {0xf9, 0x40, 0x00},
123 {0xfa, 0x1f, 0x00},
124 {0xfb, 0x1f, 0x00},
125 {0xfc, 0x1f, 0x00},
126 {0xfd, 0x1f, 0x00},
127 {0xfe, 0x00, 0x00},
128 {0xff, 0x0c, 0x00},
129 };
130 snd_pmic_ops_mx.card_status = SND_CARD_INIT_DONE;
131 snd_pmic_ops_mx.num_channel = 2;
132 snd_pmic_ops_mx.master_mute = UNMUTE;
133 snd_pmic_ops_mx.mute_status = UNMUTE;
134 return sst_sc_reg_access(sc_access, PMIC_WRITE, 47);
135}
136
137static int mx_enable_audiodac(int value)
138{
139 struct sc_reg_access sc_access[3];
140 int mute_val = 0;
141 int mute_val1 = 0;
142 int retval = 0;
143
144 sc_access[0].reg_addr = AS_LEFT_HP_VOL_CTL;
145 sc_access[1].reg_addr = AS_RIGHT_HP_VOL_CTL;
146
147 if (value == UNMUTE) {
148 mute_val = 0x1F;
149 mute_val1 = 0x00;
150 } else {
151 mute_val = 0x00;
152 mute_val1 = 0x40;
153 }
154 sc_access[0].mask = sc_access[1].mask = MASK0|MASK1|MASK2|MASK3|MASK4;
155 sc_access[0].value = sc_access[1].value = (u8)mute_val;
156 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
157 if (retval)
158 return retval;
159 pr_debug("mute status = %d\n", snd_pmic_ops_mx.mute_status);
160 if (snd_pmic_ops_mx.mute_status == MUTE ||
161 snd_pmic_ops_mx.master_mute == MUTE)
162 return retval;
163
164 sc_access[0].reg_addr = VOL_CTRL_LT;
165 sc_access[1].reg_addr = VOL_CTRL_RT;
166 sc_access[0].mask = sc_access[1].mask = MASK6;
167 sc_access[0].value = sc_access[1].value = mute_val1;
168 if (snd_pmic_ops_mx.num_channel == 1)
169 sc_access[1].value = 0x40;
170 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
171}
172
173static int mx_power_up_pb(unsigned int port)
174{
175
176 int retval = 0;
177 struct sc_reg_access sc_access[3];
178
179 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
180 retval = mx_init_card();
181 if (retval)
182 return retval;
183 }
184 retval = mx_enable_audiodac(MUTE);
185 if (retval)
186 return retval;
187
188 msleep(10);
189
190 sc_access[0].reg_addr = AS_CONFIG;
191 sc_access[0].mask = MASK7;
192 sc_access[0].value = 0x80;
193 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
194 if (retval)
195 return retval;
196
197 sc_access[0].reg_addr = ENABLE_OPDEV_CTRL;
198 sc_access[0].mask = 0xff;
199 sc_access[0].value = 0x3C;
200 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
201 if (retval)
202 return retval;
203
204 sc_access[0].reg_addr = ENABLE_DEV_AND_USE_XTAL;
205 sc_access[0].mask = 0x80;
206 sc_access[0].value = 0x80;
207 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
208 if (retval)
209 return retval;
210
211 return mx_enable_audiodac(UNMUTE);
212}
213
214static int mx_power_down_pb(unsigned int device)
215{
216 struct sc_reg_access sc_access[3];
217 int retval = 0;
218
219 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
220 retval = mx_init_card();
221 if (retval)
222 return retval;
223 }
224
225 retval = mx_enable_audiodac(MUTE);
226 if (retval)
227 return retval;
228
229 sc_access[0].reg_addr = ENABLE_OPDEV_CTRL;
230 sc_access[0].mask = MASK3|MASK2;
231 sc_access[0].value = 0x00;
232
233 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
234 if (retval)
235 return retval;
236
237 return mx_enable_audiodac(UNMUTE);
238}
239
240static int mx_power_up_cp(unsigned int port)
241{
242 int retval = 0;
243 struct sc_reg_access sc_access[] = {
244 {ENABLE_DEV_AND_USE_XTAL, 0x80, MASK7},
245 {ENABLE_OPDEV_CTRL, 0x3, 0x3},
246 };
247
248 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
249 retval = mx_init_card();
250 if (retval)
251 return retval;
252 }
253
254 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
255}
256
257static int mx_power_down_cp(unsigned int device)
258{
259 struct sc_reg_access sc_access[] = {
260 {ENABLE_OPDEV_CTRL, 0x00, MASK1|MASK0},
261 };
262 int retval = 0;
263
264 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
265 retval = mx_init_card();
266 if (retval)
267 return retval;
268 }
269
270 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
271}
272
273static int mx_power_down(void)
274{
275 int retval = 0;
276 struct sc_reg_access sc_access[3];
277
278 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
279 retval = mx_init_card();
280 if (retval)
281 return retval;
282 }
283
284 retval = mx_enable_audiodac(MUTE);
285 if (retval)
286 return retval;
287
288 sc_access[0].reg_addr = AS_CONFIG;
289 sc_access[0].mask = MASK7;
290 sc_access[0].value = 0x00;
291 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
292 if (retval)
293 return retval;
294
295 sc_access[0].reg_addr = ENABLE_DEV_AND_USE_XTAL;
296 sc_access[0].mask = MASK7;
297 sc_access[0].value = 0x00;
298 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
299 if (retval)
300 return retval;
301
302 sc_access[0].reg_addr = ENABLE_OPDEV_CTRL;
303 sc_access[0].mask = MASK3|MASK2;
304 sc_access[0].value = 0x00;
305 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
306 if (retval)
307 return retval;
308
309 return mx_enable_audiodac(UNMUTE);
310}
311
312static int mx_set_pcm_voice_params(void)
313{
314 int retval = 0;
315 struct sc_reg_access sc_access[] = {
316 {0x200, 0x80, 0x00},
317 {0x201, 0xC0, 0x00},
318 {0x202, 0x00, 0x00},
319 {0x203, 0x00, 0x00},
320 {0x204, 0x0e, 0x00},
321 {0x205, 0x20, 0x00},
322 {0x206, 0x8f, 0x00},
323 {0x207, 0x21, 0x00},
324 {0x208, 0x18, 0x00},
325 {0x209, 0x32, 0x00},
326 {0x20a, 0x00, 0x00},
327 {0x20b, 0x5A, 0x00},
328 {0x20c, 0xBE, 0x00},/* 0x00 -> 0xBE Koski */
329 {0x20d, 0x00, 0x00}, /* DAI2 'off' */
330 {0x20e, 0x40, 0x00},
331 {0x20f, 0x00, 0x00},
332 {0x210, 0x84, 0x00},
333 {0x211, 0x33, 0x00}, /* Voice filter */
334 {0x212, 0x00, 0x00},
335 {0x213, 0x00, 0x00},
336 {0x214, 0x41, 0x00},
337 {0x215, 0x00, 0x00},
338 {0x216, 0x00, 0x00},
339 {0x217, 0x20, 0x00},
340 {0x218, 0x00, 0x00},
341 {0x219, 0x00, 0x00},
342 {0x21a, 0x40, 0x00},
343 {0x21b, 0x40, 0x00},
344 {0x21c, 0x09, 0x00},
345 {0x21d, 0x09, 0x00},
346 {0x21e, 0x00, 0x00},
347 {0x21f, 0x00, 0x00},
348 {0x220, 0x00, 0x00}, /* Microphone configurations */
349 {0x221, 0x00, 0x00}, /* Microphone configurations */
350 {0x222, 0x50, 0x00}, /* Microphone configurations */
351 {0x223, 0x21, 0x00}, /* Microphone configurations */
352 {0x224, 0x00, 0x00},
353 {0x225, 0x80, 0x00},
354 {0xf9, 0x40, 0x00},
355 {0xfa, 0x19, 0x00},
356 {0xfb, 0x19, 0x00},
357 {0xfc, 0x12, 0x00},
358 {0xfd, 0x12, 0x00},
359 {0xfe, 0x00, 0x00},
360 };
361
362 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
363 retval = mx_init_card();
364 if (retval)
365 return retval;
366 }
367 pr_debug("SST DBG:mx_set_pcm_voice_params called\n");
368 return sst_sc_reg_access(sc_access, PMIC_WRITE, 44);
369}
370
371static int mx_set_pcm_audio_params(int sfreq, int word_size, int num_channel)
372{
373 int retval = 0;
374
375 int config1 = 0, config2 = 0, filter = 0xB3;
376 struct sc_reg_access sc_access[5];
377
378 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
379 retval = mx_init_card();
380 if (retval)
381 return retval;
382 }
383
384 switch (sfreq) {
385 case 8000:
386 config1 = 0x10;
387 config2 = 0x00;
388 filter = 0x33;
389 break;
390 case 11025:
391 config1 = 0x16;
392 config2 = 0x0d;
393 break;
394 case 12000:
395 config1 = 0x18;
396 config2 = 0x00;
397 break;
398 case 16000:
399 config1 = 0x20;
400 config2 = 0x00;
401 break;
402 case 22050:
403 config1 = 0x2c;
404 config2 = 0x1a;
405 break;
406 case 24000:
407 config1 = 0x30;
408 config2 = 0x00;
409 break;
410 case 32000:
411 config1 = 0x40;
412 config2 = 0x00;
413 break;
414 case 44100:
415 config1 = 0x58;
416 config2 = 0x33;
417 break;
418 case 48000:
419 config1 = 0x60;
420 config2 = 0x00;
421 break;
422 }
423 snd_pmic_ops_mx.num_channel = num_channel;
424 /*mute the right channel if MONO*/
425 if (snd_pmic_ops_mx.num_channel == 1) {
426 sc_access[0].reg_addr = VOL_CTRL_RT;
427 sc_access[0].value = 0x40;
428 sc_access[0].mask = MASK6;
429
430 sc_access[1].reg_addr = 0x224;
431 sc_access[1].value = 0x05;
432 sc_access[1].mask = MASK0|MASK1|MASK2;
433
434 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
435 if (retval)
436 return retval;
437 } else {
438 sc_access[0].reg_addr = VOL_CTRL_RT;
439 sc_access[0].value = 0x00;
440 sc_access[0].mask = MASK6;
441
442 sc_access[1].reg_addr = 0x224;
443 sc_access[1].value = 0x04;
444 sc_access[1].mask = MASK0|MASK1|MASK2;
445
446 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
447 if (retval)
448 return retval;
449 }
450 sc_access[0].reg_addr = 0x206;
451 sc_access[0].value = config1;
452 sc_access[1].reg_addr = 0x207;
453 sc_access[1].value = config2;
454
455 if (word_size == 16) {
456 sc_access[2].value = 0x51;
457 sc_access[3].value = 0x31;
458 } else if (word_size == 24) {
459 sc_access[2].value = 0x52;
460 sc_access[3].value = 0x92;
461 }
462
463 sc_access[2].reg_addr = 0x209;
464 sc_access[3].reg_addr = 0x20e;
465
466 sc_access[4].reg_addr = 0x211;
467 sc_access[4].value = filter;
468
469 return sst_sc_reg_access(sc_access, PMIC_WRITE, 5);
470}
471
472static int mx_set_selected_output_dev(u8 dev_id)
473{
474 struct sc_reg_access sc_access[2];
475 int num_reg = 0;
476 int retval = 0;
477
478 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
479 retval = mx_init_card();
480 if (retval)
481 return retval;
482 }
483
484 pr_debug("mx_set_selected_output_dev dev_id:0x%x\n", dev_id);
485 snd_pmic_ops_mx.output_dev_id = dev_id;
486 switch (dev_id) {
487 case STEREO_HEADPHONE:
488 sc_access[0].reg_addr = 0xFF;
489 sc_access[0].value = 0x8C;
490 sc_access[0].mask =
491 MASK2|MASK3|MASK5|MASK6|MASK4;
492
493 num_reg = 1;
494 break;
495 case MONO_EARPIECE:
496 case INTERNAL_SPKR:
497 sc_access[0].reg_addr = 0xFF;
498 sc_access[0].value = 0xb0;
499 sc_access[0].mask = MASK2|MASK3|MASK5|MASK6|MASK4;
500
501 num_reg = 1;
502 break;
503 case RECEIVER:
504 pr_debug("RECEIVER Koski selected\n");
505
506 /* configuration - AS enable, receiver enable */
507 sc_access[0].reg_addr = 0xFF;
508 sc_access[0].value = 0x81;
509 sc_access[0].mask = 0xff;
510
511 num_reg = 1;
512 break;
513 default:
514 pr_err("Not a valid output dev\n");
515 return 0;
516 }
517 return sst_sc_reg_access(sc_access, PMIC_WRITE, num_reg);
518}
519
520
521static int mx_set_voice_port(int status)
522{
523 int retval = 0;
524
525 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
526 retval = mx_init_card();
527 if (retval)
528 return retval;
529 }
530 if (status == ACTIVATE)
531 retval = mx_set_pcm_voice_params();
532
533 return retval;
534}
535
536static int mx_set_audio_port(int status)
537{
538 return 0;
539}
540
541static int mx_set_selected_input_dev(u8 dev_id)
542{
543 struct sc_reg_access sc_access[2];
544 int num_reg = 0;
545 int retval = 0;
546
547 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
548 retval = mx_init_card();
549 if (retval)
550 return retval;
551 }
552 snd_pmic_ops_mx.input_dev_id = dev_id;
553 pr_debug("mx_set_selected_input_dev dev_id:0x%x\n", dev_id);
554
555 switch (dev_id) {
556 case AMIC:
557 sc_access[0].reg_addr = 0x223;
558 sc_access[0].value = 0x00;
559 sc_access[0].mask = MASK7|MASK6|MASK5|MASK4|MASK0;
560 sc_access[1].reg_addr = 0x222;
561 sc_access[1].value = 0x50;
562 sc_access[1].mask = MASK7|MASK6|MASK5|MASK4;
563 num_reg = 2;
564 break;
565
566 case HS_MIC:
567 sc_access[0].reg_addr = 0x223;
568 sc_access[0].value = 0x20;
569 sc_access[0].mask = MASK7|MASK6|MASK5|MASK4|MASK0;
570 sc_access[1].reg_addr = 0x222;
571 sc_access[1].value = 0x51;
572 sc_access[1].mask = MASK7|MASK6|MASK5|MASK4;
573 num_reg = 2;
574 break;
575 case DMIC:
576 sc_access[1].reg_addr = 0x222;
577 sc_access[1].value = 0x00;
578 sc_access[1].mask = MASK7|MASK6|MASK5|MASK4|MASK0;
579 sc_access[0].reg_addr = 0x223;
580 sc_access[0].value = 0x20;
581 sc_access[0].mask = MASK7|MASK6|MASK5|MASK4|MASK0;
582 num_reg = 2;
583 break;
584 }
585 return sst_sc_reg_access(sc_access, PMIC_WRITE, num_reg);
586}
587
588static int mx_set_mute(int dev_id, u8 value)
589{
590 struct sc_reg_access sc_access[5];
591 int num_reg = 0;
592 int retval = 0;
593
594 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
595 retval = mx_init_card();
596 if (retval)
597 return retval;
598 }
599
600
601 pr_debug("set_mute dev_id:0x%x , value:%d\n", dev_id, value);
602
603 switch (dev_id) {
604 case PMIC_SND_DMIC_MUTE:
605 case PMIC_SND_AMIC_MUTE:
606 case PMIC_SND_HP_MIC_MUTE:
607 sc_access[0].reg_addr = 0x220;
608 sc_access[1].reg_addr = 0x221;
609 sc_access[2].reg_addr = 0x223;
610 if (value == MUTE) {
611 sc_access[0].value = 0x00;
612 sc_access[1].value = 0x00;
613 if (snd_pmic_ops_mx.input_dev_id == DMIC)
614 sc_access[2].value = 0x00;
615 else
616 sc_access[2].value = 0x20;
617 } else {
618 sc_access[0].value = 0x20;
619 sc_access[1].value = 0x20;
620 if (snd_pmic_ops_mx.input_dev_id == DMIC)
621 sc_access[2].value = 0x20;
622 else
623 sc_access[2].value = 0x00;
624 }
625 sc_access[0].mask = MASK5|MASK6;
626 sc_access[1].mask = MASK5|MASK6;
627 sc_access[2].mask = MASK5|MASK6;
628 num_reg = 3;
629 break;
630 case PMIC_SND_LEFT_SPEAKER_MUTE:
631 case PMIC_SND_LEFT_HP_MUTE:
632 sc_access[0].reg_addr = VOL_CTRL_LT;
633 if (value == MUTE)
634 sc_access[0].value = 0x40;
635 else
636 sc_access[0].value = 0x00;
637 sc_access[0].mask = MASK6;
638 num_reg = 1;
639 snd_pmic_ops_mx.mute_status = value;
640 break;
641 case PMIC_SND_RIGHT_SPEAKER_MUTE:
642 case PMIC_SND_RIGHT_HP_MUTE:
643 sc_access[0].reg_addr = VOL_CTRL_RT;
644 if (snd_pmic_ops_mx.num_channel == 1)
645 value = MUTE;
646 if (value == MUTE)
647 sc_access[0].value = 0x40;
648 else
649 sc_access[0].value = 0x00;
650 sc_access[0].mask = MASK6;
651 num_reg = 1;
652 snd_pmic_ops_mx.mute_status = value;
653 break;
654 case PMIC_SND_MUTE_ALL:
655 sc_access[0].reg_addr = VOL_CTRL_RT;
656 sc_access[1].reg_addr = VOL_CTRL_LT;
657 sc_access[2].reg_addr = 0x220;
658 sc_access[3].reg_addr = 0x221;
659 sc_access[4].reg_addr = 0x223;
660 snd_pmic_ops_mx.master_mute = value;
661 if (value == MUTE) {
662 sc_access[0].value = sc_access[1].value = 0x40;
663 sc_access[2].value = 0x00;
664 sc_access[3].value = 0x00;
665 if (snd_pmic_ops_mx.input_dev_id == DMIC)
666 sc_access[4].value = 0x00;
667 else
668 sc_access[4].value = 0x20;
669
670 } else {
671 sc_access[0].value = sc_access[1].value = 0x00;
672 sc_access[2].value = sc_access[3].value = 0x20;
673 sc_access[4].value = 0x20;
674 if (snd_pmic_ops_mx.input_dev_id == DMIC)
675 sc_access[4].value = 0x20;
676 else
677 sc_access[4].value = 0x00;
678
679
680 }
681 if (snd_pmic_ops_mx.num_channel == 1)
682 sc_access[0].value = 0x40;
683 sc_access[0].mask = sc_access[1].mask = MASK6;
684 sc_access[2].mask = MASK5|MASK6;
685 sc_access[3].mask = MASK5|MASK6|MASK2|MASK4;
686 sc_access[4].mask = MASK5|MASK6|MASK4;
687
688 num_reg = 5;
689 break;
690 case PMIC_SND_RECEIVER_MUTE:
691 sc_access[0].reg_addr = VOL_CTRL_RT;
692 if (value == MUTE)
693 sc_access[0].value = 0x40;
694 else
695 sc_access[0].value = 0x00;
696 sc_access[0].mask = MASK6;
697 num_reg = 1;
698 break;
699 }
700
701 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, num_reg);
702}
703
704static int mx_set_vol(int dev_id, int value)
705{
706 struct sc_reg_access sc_access[2] = {{0},};
707 int num_reg = 0;
708 int retval = 0;
709
710 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
711 retval = mx_init_card();
712 if (retval)
713 return retval;
714 }
715 pr_debug("set_vol dev_id:0x%x ,value:%d\n", dev_id, value);
716 switch (dev_id) {
717 case PMIC_SND_RECEIVER_VOL:
718 return 0;
719 break;
720 case PMIC_SND_CAPTURE_VOL:
721 sc_access[0].reg_addr = 0x220;
722 sc_access[1].reg_addr = 0x221;
723 sc_access[0].value = sc_access[1].value = -value;
724 sc_access[0].mask = sc_access[1].mask =
725 (MASK0|MASK1|MASK2|MASK3|MASK4);
726 num_reg = 2;
727 break;
728 case PMIC_SND_LEFT_PB_VOL:
729 sc_access[0].value = -value;
730 sc_access[0].reg_addr = VOL_CTRL_LT;
731 sc_access[0].mask = (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
732 num_reg = 1;
733 break;
734 case PMIC_SND_RIGHT_PB_VOL:
735 sc_access[0].value = -value;
736 sc_access[0].reg_addr = VOL_CTRL_RT;
737 sc_access[0].mask = (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
738 if (snd_pmic_ops_mx.num_channel == 1) {
739 sc_access[0].value = 0x40;
740 sc_access[0].mask = MASK6;
741 sc_access[0].reg_addr = VOL_CTRL_RT;
742 }
743 num_reg = 1;
744 break;
745 }
746 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, num_reg);
747}
748
749static int mx_get_mute(int dev_id, u8 *value)
750{
751 struct sc_reg_access sc_access[4] = {{0},};
752 int retval = 0, num_reg = 0, mask = 0;
753
754 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
755 retval = mx_init_card();
756 if (retval)
757 return retval;
758 }
759 switch (dev_id) {
760 case PMIC_SND_DMIC_MUTE:
761 case PMIC_SND_AMIC_MUTE:
762 case PMIC_SND_HP_MIC_MUTE:
763 sc_access[0].reg_addr = 0x220;
764 mask = MASK5|MASK6;
765 num_reg = 1;
766 retval = sst_sc_reg_access(sc_access, PMIC_READ, num_reg);
767 if (retval)
768 return retval;
769 *value = sc_access[0].value & mask;
770 if (*value)
771 *value = UNMUTE;
772 else
773 *value = MUTE;
774 return retval;
775 case PMIC_SND_LEFT_HP_MUTE:
776 case PMIC_SND_LEFT_SPEAKER_MUTE:
777 sc_access[0].reg_addr = VOL_CTRL_LT;
778 num_reg = 1;
779 mask = MASK6;
780 break;
781 case PMIC_SND_RIGHT_HP_MUTE:
782 case PMIC_SND_RIGHT_SPEAKER_MUTE:
783 sc_access[0].reg_addr = VOL_CTRL_RT;
784 num_reg = 1;
785 mask = MASK6;
786 break;
787 }
788 retval = sst_sc_reg_access(sc_access, PMIC_READ, num_reg);
789 if (retval)
790 return retval;
791 *value = sc_access[0].value & mask;
792 if (*value)
793 *value = MUTE;
794 else
795 *value = UNMUTE;
796 return retval;
797}
798
799static int mx_get_vol(int dev_id, int *value)
800{
801 struct sc_reg_access sc_access = {0,};
802 int retval = 0, mask = 0, num_reg = 0;
803
804 if (snd_pmic_ops_mx.card_status == SND_CARD_UN_INIT) {
805 retval = mx_init_card();
806 if (retval)
807 return retval;
808 }
809 switch (dev_id) {
810 case PMIC_SND_CAPTURE_VOL:
811 sc_access.reg_addr = 0x220;
812 mask = MASK0|MASK1|MASK2|MASK3|MASK4;
813 num_reg = 1;
814 break;
815 case PMIC_SND_LEFT_PB_VOL:
816 sc_access.reg_addr = VOL_CTRL_LT;
817 mask = MASK0|MASK1|MASK2|MASK3|MASK4|MASK5;
818 num_reg = 1;
819 break;
820 case PMIC_SND_RIGHT_PB_VOL:
821 sc_access.reg_addr = VOL_CTRL_RT;
822 mask = MASK0|MASK1|MASK2|MASK3|MASK4|MASK5;
823 num_reg = 1;
824 break;
825 }
826 retval = sst_sc_reg_access(&sc_access, PMIC_READ, num_reg);
827 if (retval)
828 return retval;
829 *value = -(sc_access.value & mask);
830 pr_debug("get volume value extracted %d\n", *value);
831 return retval;
832}
833
834static u8 mx_get_jack_status(void)
835{
836 struct sc_reg_access sc_access_read = {0,};
837
838 sc_access_read.reg_addr = 0x201;
839 sst_sc_reg_access(&sc_access_read, PMIC_READ, 1);
840 pr_debug("value returned = 0x%x\n", sc_access_read.value);
841 return sc_access_read.value;
842}
843
844static void mx_pmic_irq_enable(void *data)
845{
846 struct snd_intelmad *intelmaddata = data;
847
848 intelmaddata->jack_prev_state = 0xc0;
849 return;
850}
851
852static void mx_pmic_irq_cb(void *cb_data, u8 intsts)
853{
854 u8 jack_cur_status, jack_prev_state = 0;
855 struct mad_jack *mjack = NULL;
856 unsigned int present = 0, jack_event_flag = 0, buttonpressflag = 0;
857 time_t timediff;
858 struct snd_intelmad *intelmaddata = cb_data;
859
860 mjack = &intelmaddata->jack[0];
861 if (intsts & 0x2) {
862 jack_cur_status = mx_get_jack_status();
863 jack_prev_state = intelmaddata->jack_prev_state;
864 if ((jack_prev_state == 0xc0) && (jack_cur_status == 0x40)) {
865 /*headset insert detected. */
866 pr_debug("MAD headset inserted\n");
867 present = 1;
868 jack_event_flag = 1;
869 mjack->jack_status = 1;
870 mjack->jack.type = SND_JACK_HEADSET;
871 }
872
873 if ((jack_prev_state == 0xc0) && (jack_cur_status == 0x00)) {
874 /* headphone insert detected. */
875 pr_debug("MAD headphone inserted\n");
876 present = 1;
877 jack_event_flag = 1;
878 mjack->jack.type = SND_JACK_HEADPHONE;
879 }
880
881 if ((jack_prev_state == 0x40) && (jack_cur_status == 0xc0)) {
882 /* headset remove detected. */
883 pr_debug("MAD headset removed\n");
884
885 present = 0;
886 jack_event_flag = 1;
887 mjack->jack_status = 0;
888 mjack->jack.type = SND_JACK_HEADSET;
889 }
890
891 if ((jack_prev_state == 0x00) && (jack_cur_status == 0xc0)) {
892 /* headphone remove detected. */
893 pr_debug("MAD headphone removed\n");
894 present = 0;
895 jack_event_flag = 1;
896 mjack->jack.type = SND_JACK_HEADPHONE;
897 }
898
899 if ((jack_prev_state == 0x40) && (jack_cur_status == 0x00)) {
900 /* button pressed */
901 do_gettimeofday(&mjack->buttonpressed);
902 pr_debug("MAD button press detected\n");
903 }
904
905 if ((jack_prev_state == 0x00) && (jack_cur_status == 0x40)) {
906 if (mjack->jack_status) {
907 /*button pressed */
908 do_gettimeofday(
909 &mjack->buttonreleased);
910 /*button pressed */
911 pr_debug("MAD Button Released detected\n");
912 timediff = mjack->buttonreleased.tv_sec -
913 mjack->buttonpressed.tv_sec;
914 buttonpressflag = 1;
915
916 if (timediff > 1) {
917 pr_debug("MAD long press dtd\n");
918 /* send headphone detect/undetect */
919 present = 1;
920 jack_event_flag = 1;
921 mjack->jack.type =
922 MID_JACK_HS_LONG_PRESS;
923 } else {
924 pr_debug("MAD short press dtd\n");
925 /* send headphone detect/undetect */
926 present = 1;
927 jack_event_flag = 1;
928 mjack->jack.type =
929 MID_JACK_HS_SHORT_PRESS;
930 }
931 } else {
932 /***workaround for maxim
933 hw issue,0x00 t 0x40 is not
934 a valid transiton for Headset insertion */
935 /*headset insert detected. */
936 pr_debug("MAD headset inserted\n");
937 present = 1;
938 jack_event_flag = 1;
939 mjack->jack_status = 1;
940 mjack->jack.type = SND_JACK_HEADSET;
941 }
942 }
943 intelmaddata->jack_prev_state = jack_cur_status;
944 pr_debug("mx_pmic_irq_cb prv_state= 0x%x\n",
945 intelmaddata->jack_prev_state);
946 }
947
948 if (jack_event_flag)
949 sst_mad_send_jack_report(&mjack->jack,
950 buttonpressflag, present);
951}
952static int mx_jack_enable(void)
953{
954 return 0;
955}
956
957struct snd_pmic_ops snd_pmic_ops_mx = {
958 .set_input_dev = mx_set_selected_input_dev,
959 .set_output_dev = mx_set_selected_output_dev,
960 .set_mute = mx_set_mute,
961 .get_mute = mx_get_mute,
962 .set_vol = mx_set_vol,
963 .get_vol = mx_get_vol,
964 .init_card = mx_init_card,
965 .set_pcm_audio_params = mx_set_pcm_audio_params,
966 .set_pcm_voice_params = mx_set_pcm_voice_params,
967 .set_voice_port = mx_set_voice_port,
968 .set_audio_port = mx_set_audio_port,
969 .power_up_pmic_pb = mx_power_up_pb,
970 .power_up_pmic_cp = mx_power_up_cp,
971 .power_down_pmic_pb = mx_power_down_pb,
972 .power_down_pmic_cp = mx_power_down_cp,
973 .power_down_pmic = mx_power_down,
974 .pmic_irq_cb = mx_pmic_irq_cb,
975 .pmic_irq_enable = mx_pmic_irq_enable,
976 .pmic_jack_enable = mx_jack_enable,
977};
978
diff --git a/drivers/staging/intel_sst/intelmid_v2_control.c b/drivers/staging/intel_sst/intelmid_v2_control.c
deleted file mode 100644
index 46ab55eb8097..000000000000
--- a/drivers/staging/intel_sst/intelmid_v2_control.c
+++ /dev/null
@@ -1,1156 +0,0 @@
1/*
2 * intelmid_v2_control.c - Intel Sound card driver for MID
3 *
4 * Copyright (C) 2008-10 Intel Corp
5 * Authors: Vinod Koul <vinod.koul@intel.com>
6 * Harsha Priya <priya.harsha@intel.com>
7 * KP Jeeja <jeeja.kp@intel.com>
8 * Dharageswari R <dharageswari.r@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 *
26 * This file contains the control operations of vendor 3
27 */
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/gpio.h>
32#include <linux/pci.h>
33#include <linux/delay.h>
34#include <linux/file.h>
35#include <sound/control.h>
36#include "intel_sst.h"
37#include "intelmid_snd_control.h"
38#include "intelmid.h"
39
40enum reg_v3 {
41 VAUDIOCNT = 0x51,
42 VOICEPORT1 = 0x100,
43 VOICEPORT2 = 0x101,
44 AUDIOPORT1 = 0x102,
45 AUDIOPORT2 = 0x103,
46 ADCSAMPLERATE = 0x104,
47 DMICCTRL1 = 0x105,
48 DMICCTRL2 = 0x106,
49 MICCTRL = 0x107,
50 MICSELVOL = 0x108,
51 LILSEL = 0x109,
52 LIRSEL = 0x10a,
53 VOICEVOL = 0x10b,
54 AUDIOLVOL = 0x10c,
55 AUDIORVOL = 0x10d,
56 LMUTE = 0x10e,
57 RMUTE = 0x10f,
58 POWERCTRL1 = 0x110,
59 POWERCTRL2 = 0x111,
60 DRVPOWERCTRL = 0x112,
61 VREFPLL = 0x113,
62 PCMBUFCTRL = 0x114,
63 SOFTMUTE = 0x115,
64 DTMFPATH = 0x116,
65 DTMFVOL = 0x117,
66 DTMFFREQ = 0x118,
67 DTMFHFREQ = 0x119,
68 DTMFLFREQ = 0x11a,
69 DTMFCTRL = 0x11b,
70 DTMFASON = 0x11c,
71 DTMFASOFF = 0x11d,
72 DTMFASINUM = 0x11e,
73 CLASSDVOL = 0x11f,
74 VOICEDACAVOL = 0x120,
75 AUDDACAVOL = 0x121,
76 LOMUTEVOL = 0x122,
77 HPLVOL = 0x123,
78 HPRVOL = 0x124,
79 MONOVOL = 0x125,
80 LINEOUTMIXVOL = 0x126,
81 EPMIXVOL = 0x127,
82 LINEOUTLSEL = 0x128,
83 LINEOUTRSEL = 0x129,
84 EPMIXOUTSEL = 0x12a,
85 HPLMIXSEL = 0x12b,
86 HPRMIXSEL = 0x12c,
87 LOANTIPOP = 0x12d,
88 AUXDBNC = 0x12f,
89};
90
91static void nc_set_amp_power(int power)
92{
93 if (snd_pmic_ops_nc.gpio_amp)
94 gpio_set_value(snd_pmic_ops_nc.gpio_amp, power);
95}
96
97/****
98 * nc_init_card - initialize the sound card
99 *
100 * This initializes the audio paths to know values in case of this sound card
101 */
102static int nc_init_card(void)
103{
104 struct sc_reg_access sc_access[] = {
105 {VAUDIOCNT, 0x25, 0},
106 {VOICEPORT1, 0x00, 0},
107 {VOICEPORT2, 0x00, 0},
108 {AUDIOPORT1, 0x98, 0},
109 {AUDIOPORT2, 0x09, 0},
110 {AUDIOLVOL, 0x00, 0},
111 {AUDIORVOL, 0x00, 0},
112 {LMUTE, 0x03, 0},
113 {RMUTE, 0x03, 0},
114 {POWERCTRL1, 0x00, 0},
115 {POWERCTRL2, 0x00, 0},
116 {DRVPOWERCTRL, 0x00, 0},
117 {VREFPLL, 0x10, 0},
118 {HPLMIXSEL, 0xee, 0},
119 {HPRMIXSEL, 0xf6, 0},
120 {PCMBUFCTRL, 0x0, 0},
121 {VOICEVOL, 0x0e, 0},
122 {HPLVOL, 0x06, 0},
123 {HPRVOL, 0x06, 0},
124 {MICCTRL, 0x51, 0x00},
125 {ADCSAMPLERATE, 0x8B, 0x00},
126 {MICSELVOL, 0x5B, 0x00},
127 {LILSEL, 0x06, 0},
128 {LIRSEL, 0x46, 0},
129 {LOANTIPOP, 0x00, 0},
130 {DMICCTRL1, 0x40, 0},
131 {AUXDBNC, 0xff, 0},
132 };
133 snd_pmic_ops_nc.card_status = SND_CARD_INIT_DONE;
134 snd_pmic_ops_nc.master_mute = UNMUTE;
135 snd_pmic_ops_nc.mute_status = UNMUTE;
136 sst_sc_reg_access(sc_access, PMIC_WRITE, 27);
137 mutex_init(&snd_pmic_ops_nc.lock);
138 pr_debug("init complete!!\n");
139 return 0;
140}
141
142static int nc_enable_audiodac(int value)
143{
144 struct sc_reg_access sc_access[3];
145 int mute_val = 0;
146
147 if (snd_pmic_ops_nc.mute_status == MUTE)
148 return 0;
149
150 if (((snd_pmic_ops_nc.output_dev_id == MONO_EARPIECE) ||
151 (snd_pmic_ops_nc.output_dev_id == INTERNAL_SPKR)) &&
152 (value == UNMUTE))
153 return 0;
154 if (value == UNMUTE) {
155 /* unmute the system, set the 7th bit to zero */
156 mute_val = 0x00;
157 } else {
158 /* MUTE:Set the seventh bit */
159 mute_val = 0x04;
160
161 }
162 sc_access[0].reg_addr = LMUTE;
163 sc_access[1].reg_addr = RMUTE;
164 sc_access[0].mask = sc_access[1].mask = MASK2;
165 sc_access[0].value = sc_access[1].value = mute_val;
166
167 if (snd_pmic_ops_nc.num_channel == 1)
168 sc_access[1].value = 0x04;
169 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
170
171}
172
173static int nc_power_up_pb(unsigned int port)
174{
175 struct sc_reg_access sc_access[7];
176 int retval = 0;
177
178 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
179 retval = nc_init_card();
180 if (retval)
181 return retval;
182 if (port == 0xFF)
183 return 0;
184 mutex_lock(&snd_pmic_ops_nc.lock);
185 nc_enable_audiodac(MUTE);
186 msleep(30);
187
188 pr_debug("powering up pb....\n");
189
190 sc_access[0].reg_addr = VAUDIOCNT;
191 sc_access[0].value = 0x27;
192 sc_access[0].mask = 0x27;
193 sc_access[1].reg_addr = VREFPLL;
194 if (port == 0) {
195 sc_access[1].value = 0x3A;
196 sc_access[1].mask = 0x3A;
197 } else if (port == 1) {
198 sc_access[1].value = 0x35;
199 sc_access[1].mask = 0x35;
200 }
201 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
202
203
204
205 sc_access[0].reg_addr = POWERCTRL1;
206 if (port == 0) {
207 sc_access[0].value = 0x40;
208 sc_access[0].mask = 0x40;
209 } else if (port == 1) {
210 sc_access[0].value = 0x01;
211 sc_access[0].mask = 0x01;
212 }
213 sc_access[1].reg_addr = POWERCTRL2;
214 sc_access[1].value = 0x0C;
215 sc_access[1].mask = 0x0C;
216
217 sc_access[2].reg_addr = DRVPOWERCTRL;
218 sc_access[2].value = 0x86;
219 sc_access[2].mask = 0x86;
220
221 sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 3);
222
223 msleep(30);
224
225 snd_pmic_ops_nc.pb_on = 1;
226
227 /*
228 * There is a mismatch between Playback Sources and the enumerated
229 * values of output sources. This mismatch causes ALSA upper to send
230 * Item 1 for Internal Speaker, but the expected enumeration is 2! For
231 * now, treat MONO_EARPIECE and INTERNAL_SPKR identically and power up
232 * the needed resources
233 */
234 if (snd_pmic_ops_nc.output_dev_id == MONO_EARPIECE ||
235 snd_pmic_ops_nc.output_dev_id == INTERNAL_SPKR)
236 nc_set_amp_power(1);
237 nc_enable_audiodac(UNMUTE);
238 mutex_unlock(&snd_pmic_ops_nc.lock);
239 return 0;
240}
241
242static int nc_power_up_cp(unsigned int port)
243{
244 struct sc_reg_access sc_access[5];
245 int retval = 0;
246
247
248 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
249 retval = nc_init_card();
250 if (retval)
251 return retval;
252
253
254 pr_debug("powering up cp....\n");
255
256 if (port == 0xFF)
257 return 0;
258 sc_access[0].reg_addr = VAUDIOCNT;
259 sc_access[0].value = 0x27;
260 sc_access[0].mask = 0x27;
261 sc_access[1].reg_addr = VREFPLL;
262 if (port == 0) {
263 sc_access[1].value = 0x3E;
264 sc_access[1].mask = 0x3E;
265 } else if (port == 1) {
266 sc_access[1].value = 0x35;
267 sc_access[1].mask = 0x35;
268 }
269
270 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
271
272
273 sc_access[0].reg_addr = POWERCTRL1;
274 if (port == 0) {
275 sc_access[0].value = 0xB4;
276 sc_access[0].mask = 0xB4;
277 } else if (port == 1) {
278 sc_access[0].value = 0xBF;
279 sc_access[0].mask = 0xBF;
280 }
281 sc_access[1].reg_addr = POWERCTRL2;
282 if (port == 0) {
283 sc_access[1].value = 0x0C;
284 sc_access[1].mask = 0x0C;
285 } else if (port == 1) {
286 sc_access[1].value = 0x02;
287 sc_access[1].mask = 0x02;
288 }
289
290 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
291
292}
293
294static int nc_power_down(void)
295{
296 int retval = 0;
297 struct sc_reg_access sc_access[5];
298
299 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
300 retval = nc_init_card();
301 if (retval)
302 return retval;
303 nc_enable_audiodac(MUTE);
304
305
306 pr_debug("powering dn nc_power_down ....\n");
307
308 if (snd_pmic_ops_nc.output_dev_id == MONO_EARPIECE ||
309 snd_pmic_ops_nc.output_dev_id == INTERNAL_SPKR)
310 nc_set_amp_power(0);
311
312 msleep(30);
313
314 sc_access[0].reg_addr = DRVPOWERCTRL;
315 sc_access[0].value = 0x00;
316 sc_access[0].mask = 0x00;
317
318 sst_sc_reg_access(sc_access, PMIC_WRITE, 1);
319
320 sc_access[0].reg_addr = POWERCTRL1;
321 sc_access[0].value = 0x00;
322 sc_access[0].mask = 0x00;
323
324 sc_access[1].reg_addr = POWERCTRL2;
325 sc_access[1].value = 0x00;
326 sc_access[1].mask = 0x00;
327
328
329
330 sst_sc_reg_access(sc_access, PMIC_WRITE, 2);
331
332 msleep(30);
333 sc_access[0].reg_addr = VREFPLL;
334 sc_access[0].value = 0x10;
335 sc_access[0].mask = 0x10;
336
337 sc_access[1].reg_addr = VAUDIOCNT;
338 sc_access[1].value = 0x25;
339 sc_access[1].mask = 0x25;
340
341
342 retval = sst_sc_reg_access(sc_access, PMIC_WRITE, 2);
343
344 msleep(30);
345 return nc_enable_audiodac(UNMUTE);
346}
347
348static int nc_power_down_pb(unsigned int device)
349{
350
351 int retval = 0;
352 struct sc_reg_access sc_access[5];
353
354 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
355 retval = nc_init_card();
356 if (retval)
357 return retval;
358
359 pr_debug("powering dn pb....\n");
360 mutex_lock(&snd_pmic_ops_nc.lock);
361 nc_enable_audiodac(MUTE);
362
363
364 msleep(30);
365
366
367 sc_access[0].reg_addr = DRVPOWERCTRL;
368 sc_access[0].value = 0x00;
369 sc_access[0].mask = 0x00;
370
371 sst_sc_reg_access(sc_access, PMIC_WRITE, 1);
372
373 msleep(30);
374
375 sc_access[0].reg_addr = POWERCTRL1;
376 sc_access[0].value = 0x00;
377 sc_access[0].mask = 0x41;
378
379 sc_access[1].reg_addr = POWERCTRL2;
380 sc_access[1].value = 0x00;
381 sc_access[1].mask = 0x0C;
382
383 sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2);
384
385 msleep(30);
386
387 snd_pmic_ops_nc.pb_on = 0;
388
389 nc_enable_audiodac(UNMUTE);
390 mutex_unlock(&snd_pmic_ops_nc.lock);
391 return 0;
392}
393
394static int nc_power_down_cp(unsigned int device)
395{
396 struct sc_reg_access sc_access[] = {
397 {POWERCTRL1, 0x00, 0xBE},
398 {POWERCTRL2, 0x00, 0x02},
399 };
400 int retval = 0;
401
402 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
403 retval = nc_init_card();
404 if (retval)
405 return retval;
406
407 pr_debug("powering dn cp....\n");
408 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
409}
410
411static int nc_set_pcm_voice_params(void)
412{
413 struct sc_reg_access sc_access[] = {
414 {0x100, 0xD5, 0},
415 {0x101, 0x08, 0},
416 {0x104, 0x03, 0},
417 {0x107, 0x10, 0},
418 {0x10B, 0x0E, 0},
419 {0x10E, 0x03, 0},
420 {0x10F, 0x03, 0},
421 {0x114, 0x13, 0},
422 {0x115, 0x00, 0},
423 {0x128, 0xFE, 0},
424 {0x129, 0xFE, 0},
425 {0x12A, 0xFE, 0},
426 {0x12B, 0xDE, 0},
427 {0x12C, 0xDE, 0},
428 };
429 int retval = 0;
430
431 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
432 retval = nc_init_card();
433 if (retval)
434 return retval;
435
436 sst_sc_reg_access(sc_access, PMIC_WRITE, 14);
437 pr_debug("Voice parameters set successfully!!\n");
438 return 0;
439}
440
441
442static int nc_set_pcm_audio_params(int sfreq, int word_size, int num_channel)
443{
444 int config2 = 0;
445 struct sc_reg_access sc_access;
446 int retval = 0;
447
448 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
449 retval = nc_init_card();
450 if (retval)
451 return retval;
452
453 switch (sfreq) {
454 case 8000:
455 config2 = 0x00;
456 break;
457 case 11025:
458 config2 = 0x01;
459 break;
460 case 12000:
461 config2 = 0x02;
462 break;
463 case 16000:
464 config2 = 0x03;
465 break;
466 case 22050:
467 config2 = 0x04;
468 break;
469 case 24000:
470 config2 = 0x05;
471 break;
472 case 32000:
473 config2 = 0x07;
474 break;
475 case 44100:
476 config2 = 0x08;
477 break;
478 case 48000:
479 config2 = 0x09;
480 break;
481 }
482
483 snd_pmic_ops_nc.num_channel = num_channel;
484 if (snd_pmic_ops_nc.num_channel == 1) {
485
486 sc_access.value = 0x07;
487 sc_access.reg_addr = RMUTE;
488 pr_debug("RIGHT_HP_MUTE value%d\n", sc_access.value);
489 sc_access.mask = MASK2;
490 sst_sc_reg_access(&sc_access, PMIC_READ_MODIFY, 1);
491 } else {
492 sc_access.value = 0x00;
493 sc_access.reg_addr = RMUTE;
494 pr_debug("RIGHT_HP_MUTE value %d\n", sc_access.value);
495 sc_access.mask = MASK2;
496 sst_sc_reg_access(&sc_access, PMIC_READ_MODIFY, 1);
497
498
499 }
500
501 pr_debug("word_size = %d\n", word_size);
502
503 if (word_size == 24) {
504 sc_access.reg_addr = AUDIOPORT2;
505 sc_access.value = config2 | 0x10;
506 sc_access.mask = 0x1F;
507 } else {
508 sc_access.value = config2;
509 sc_access.mask = 0x1F;
510 sc_access.reg_addr = AUDIOPORT2;
511 }
512 sst_sc_reg_access(&sc_access, PMIC_READ_MODIFY, 1);
513
514 pr_debug("word_size = %d\n", word_size);
515 sc_access.reg_addr = AUDIOPORT1;
516 sc_access.mask = MASK5|MASK4|MASK1|MASK0;
517 if (word_size == 16)
518 sc_access.value = 0x98;
519 else if (word_size == 24)
520 sc_access.value = 0xAB;
521
522 return sst_sc_reg_access(&sc_access, PMIC_READ_MODIFY, 1);
523
524
525
526}
527
528static int nc_set_selected_output_dev(u8 value)
529{
530 struct sc_reg_access sc_access_HP[] = {
531 {LMUTE, 0x02, 0x06},
532 {RMUTE, 0x02, 0x06},
533 {DRVPOWERCTRL, 0x06, 0x06},
534 };
535 struct sc_reg_access sc_access_IS[] = {
536 {LMUTE, 0x04, 0x06},
537 {RMUTE, 0x04, 0x06},
538 {DRVPOWERCTRL, 0x00, 0x06},
539 };
540 int retval = 0;
541
542 snd_pmic_ops_nc.output_dev_id = value;
543 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
544 retval = nc_init_card();
545 if (retval)
546 return retval;
547 pr_debug("nc set selected output:%d\n", value);
548 mutex_lock(&snd_pmic_ops_nc.lock);
549 switch (value) {
550 case STEREO_HEADPHONE:
551 if (snd_pmic_ops_nc.pb_on)
552 sst_sc_reg_access(sc_access_HP+2, PMIC_WRITE, 1);
553 retval = sst_sc_reg_access(sc_access_HP, PMIC_WRITE, 2);
554 nc_set_amp_power(0);
555 break;
556 case MONO_EARPIECE:
557 case INTERNAL_SPKR:
558 retval = sst_sc_reg_access(sc_access_IS, PMIC_WRITE, 3);
559 if (snd_pmic_ops_nc.pb_on)
560 nc_set_amp_power(1);
561 break;
562 default:
563 pr_err("rcvd illegal request: %d\n", value);
564 mutex_unlock(&snd_pmic_ops_nc.lock);
565 return -EINVAL;
566 }
567 mutex_unlock(&snd_pmic_ops_nc.lock);
568 return retval;
569}
570
571static int nc_audio_init(void)
572{
573 struct sc_reg_access sc_acces, sc_access[] = {
574 {0x100, 0x00, 0},
575 {0x101, 0x00, 0},
576 {0x104, 0x8B, 0},
577 {0x107, 0x11, 0},
578 {0x10B, 0x0E, 0},
579 {0x114, 0x00, 0},
580 {0x115, 0x00, 0},
581 {0x128, 0x00, 0},
582 {0x129, 0x00, 0},
583 {0x12A, 0x00, 0},
584 {0x12B, 0xee, 0},
585 {0x12C, 0xf6, 0},
586 };
587
588 sst_sc_reg_access(sc_access, PMIC_WRITE, 12);
589 pr_debug("Audio Init successfully!!\n");
590
591 /*set output device */
592 nc_set_selected_output_dev(snd_pmic_ops_nc.output_dev_id);
593
594 if (snd_pmic_ops_nc.num_channel == 1) {
595 sc_acces.value = 0x07;
596 sc_acces.reg_addr = RMUTE;
597 pr_debug("RIGHT_HP_MUTE value%d\n", sc_acces.value);
598 sc_acces.mask = MASK2;
599 sst_sc_reg_access(&sc_acces, PMIC_READ_MODIFY, 1);
600 } else {
601 sc_acces.value = 0x00;
602 sc_acces.reg_addr = RMUTE;
603 pr_debug("RIGHT_HP_MUTE value%d\n", sc_acces.value);
604 sc_acces.mask = MASK2;
605 sst_sc_reg_access(&sc_acces, PMIC_READ_MODIFY, 1);
606 }
607
608 return 0;
609}
610
611static int nc_set_audio_port(int status)
612{
613 struct sc_reg_access sc_access[2] = {{0,},};
614 int retval = 0;
615
616 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
617 retval = nc_init_card();
618 if (retval)
619 return retval;
620
621 if (status == DEACTIVATE) {
622 /* Deactivate audio port-tristate and power */
623 sc_access[0].value = 0x00;
624 sc_access[0].mask = MASK4|MASK5;
625 sc_access[0].reg_addr = AUDIOPORT1;
626 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
627 } else if (status == ACTIVATE) {
628 /* activate audio port */
629 nc_audio_init();
630 sc_access[0].value = 0x10;
631 sc_access[0].mask = MASK4|MASK5 ;
632 sc_access[0].reg_addr = AUDIOPORT1;
633 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
634 } else
635 return -EINVAL;
636
637}
638
639static int nc_set_voice_port(int status)
640{
641 struct sc_reg_access sc_access[2] = {{0,},};
642 int retval = 0;
643
644 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
645 retval = nc_init_card();
646 if (retval)
647 return retval;
648
649 if (status == DEACTIVATE) {
650 /* Activate Voice port */
651 sc_access[0].value = 0x00;
652 sc_access[0].mask = MASK4;
653 sc_access[0].reg_addr = VOICEPORT1;
654 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
655 } else if (status == ACTIVATE) {
656 /* Deactivate voice port */
657 nc_set_pcm_voice_params();
658 sc_access[0].value = 0x10;
659 sc_access[0].mask = MASK4;
660 sc_access[0].reg_addr = VOICEPORT1;
661 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
662 } else
663 return -EINVAL;
664}
665
666static int nc_set_mute(int dev_id, u8 value)
667{
668 struct sc_reg_access sc_access[3];
669 u8 mute_val, cap_mute;
670 int retval = 0;
671
672 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
673 retval = nc_init_card();
674 if (retval)
675 return retval;
676
677 pr_debug("set device id::%d, value %d\n", dev_id, value);
678
679 switch (dev_id) {
680 case PMIC_SND_MUTE_ALL:
681 pr_debug("PMIC_SND_MUTE_ALL value %d\n", value);
682 snd_pmic_ops_nc.mute_status = value;
683 snd_pmic_ops_nc.master_mute = value;
684 if (value == UNMUTE) {
685 /* unmute the system, set the 7th bit to zero */
686 mute_val = cap_mute = 0x00;
687 } else {
688 /* MUTE:Set the seventh bit */
689 mute_val = 0x80;
690 cap_mute = 0x40;
691 }
692 sc_access[0].reg_addr = AUDIOLVOL;
693 sc_access[1].reg_addr = AUDIORVOL;
694 sc_access[0].mask = sc_access[1].mask = MASK7;
695 sc_access[0].value = sc_access[1].value = mute_val;
696 if (snd_pmic_ops_nc.num_channel == 1)
697 sc_access[1].value = 0x80;
698 if (!sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2)) {
699 sc_access[0].reg_addr = 0x109;
700 sc_access[1].reg_addr = 0x10a;
701 sc_access[2].reg_addr = 0x105;
702 sc_access[0].mask = sc_access[1].mask =
703 sc_access[2].mask = MASK6;
704 sc_access[0].value = sc_access[1].value =
705 sc_access[2].value = cap_mute;
706
707 if ((snd_pmic_ops_nc.input_dev_id == AMIC) ||
708 (snd_pmic_ops_nc.input_dev_id == DMIC))
709 sc_access[1].value = 0x40;
710 if (snd_pmic_ops_nc.input_dev_id == HS_MIC)
711 sc_access[0].value = 0x40;
712 retval = sst_sc_reg_access(sc_access,
713 PMIC_READ_MODIFY, 3);
714 }
715 break;
716 case PMIC_SND_HP_MIC_MUTE:
717 pr_debug("PMIC_SND_HPMIC_MUTE value %d\n", value);
718 if (value == UNMUTE) {
719 /* unmute the system, set the 6th bit to one */
720 sc_access[0].value = 0x00;
721 } else {
722 /* mute the system, reset the 6th bit to zero */
723 sc_access[0].value = 0x40;
724 }
725 sc_access[0].reg_addr = LIRSEL;
726 sc_access[0].mask = MASK6;
727 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
728 break;
729 case PMIC_SND_AMIC_MUTE:
730 pr_debug("PMIC_SND_AMIC_MUTE value %d\n", value);
731 if (value == UNMUTE) {
732 /* unmute the system, set the 6th bit to one */
733 sc_access[0].value = 0x00;
734 } else {
735 /* mute the system, reset the 6th bit to zero */
736 sc_access[0].value = 0x40;
737 }
738 sc_access[0].reg_addr = LILSEL;
739 sc_access[0].mask = MASK6;
740 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
741 break;
742
743 case PMIC_SND_DMIC_MUTE:
744 pr_debug("INPUT_MUTE_DMIC value%d\n", value);
745 if (value == UNMUTE) {
746 /* unmute the system, set the 6th bit to one */
747 sc_access[1].value = 0x00;
748 sc_access[0].value = 0x00;
749 } else {
750 /* mute the system, reset the 6th bit to zero */
751 sc_access[1].value = 0x40;
752 sc_access[0].value = 0x40;
753 }
754 sc_access[0].reg_addr = DMICCTRL1;
755 sc_access[0].mask = MASK6;
756 sc_access[1].reg_addr = LILSEL;
757 sc_access[1].mask = MASK6;
758 retval = sst_sc_reg_access(sc_access,
759 PMIC_READ_MODIFY, 2);
760 break;
761
762 case PMIC_SND_LEFT_HP_MUTE:
763 case PMIC_SND_RIGHT_HP_MUTE:
764 snd_pmic_ops_nc.mute_status = value;
765 if (value == UNMUTE)
766 sc_access[0].value = 0x0;
767 else
768 sc_access[0].value = 0x04;
769
770 if (dev_id == PMIC_SND_LEFT_HP_MUTE) {
771 sc_access[0].reg_addr = LMUTE;
772 pr_debug("LEFT_HP_MUTE value %d\n",
773 sc_access[0].value);
774 } else {
775 if (snd_pmic_ops_nc.num_channel == 1)
776 sc_access[0].value = 0x04;
777 sc_access[0].reg_addr = RMUTE;
778 pr_debug("RIGHT_HP_MUTE value %d\n",
779 sc_access[0].value);
780 }
781 sc_access[0].mask = MASK2;
782 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
783 break;
784 case PMIC_SND_LEFT_SPEAKER_MUTE:
785 case PMIC_SND_RIGHT_SPEAKER_MUTE:
786 if (value == UNMUTE)
787 sc_access[0].value = 0x00;
788 else
789 sc_access[0].value = 0x03;
790 sc_access[0].reg_addr = LMUTE;
791 pr_debug("SPEAKER_MUTE %d\n", sc_access[0].value);
792 sc_access[0].mask = MASK1;
793 retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1);
794 break;
795 default:
796 return -EINVAL;
797 }
798 return retval ;
799
800}
801
802static int nc_set_vol(int dev_id, int value)
803{
804 struct sc_reg_access sc_access[3];
805 int retval = 0, entries = 0;
806
807 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
808 retval = nc_init_card();
809 if (retval)
810 return retval;
811
812 pr_debug("set volume:%d\n", dev_id);
813 switch (dev_id) {
814 case PMIC_SND_CAPTURE_VOL:
815 pr_debug("PMIC_SND_CAPTURE_VOL:value::%d\n", value);
816 sc_access[0].value = sc_access[1].value =
817 sc_access[2].value = -value;
818 sc_access[0].mask = sc_access[1].mask = sc_access[2].mask =
819 (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
820 sc_access[0].reg_addr = 0x10a;
821 sc_access[1].reg_addr = 0x109;
822 sc_access[2].reg_addr = 0x105;
823 entries = 3;
824 break;
825
826 case PMIC_SND_LEFT_PB_VOL:
827 pr_debug("PMIC_SND_LEFT_HP_VOL %d\n", value);
828 sc_access[0].value = -value;
829 sc_access[0].reg_addr = HPLVOL;
830 sc_access[0].mask = (MASK0|MASK1|MASK2|MASK3|MASK4);
831 entries = 1;
832 break;
833
834 case PMIC_SND_RIGHT_PB_VOL:
835 pr_debug("PMIC_SND_RIGHT_HP_VOL value %d\n", value);
836 if (snd_pmic_ops_nc.num_channel == 1) {
837 sc_access[0].value = 0x04;
838 sc_access[0].reg_addr = RMUTE;
839 sc_access[0].mask = MASK2;
840 } else {
841 sc_access[0].value = -value;
842 sc_access[0].reg_addr = HPRVOL;
843 sc_access[0].mask = (MASK0|MASK1|MASK2|MASK3|MASK4);
844 }
845 entries = 1;
846 break;
847
848 case PMIC_SND_LEFT_MASTER_VOL:
849 pr_debug("PMIC_SND_LEFT_MASTER_VOL value %d\n", value);
850 sc_access[0].value = -value;
851 sc_access[0].reg_addr = AUDIOLVOL;
852 sc_access[0].mask =
853 (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5|MASK6);
854 entries = 1;
855 break;
856
857 case PMIC_SND_RIGHT_MASTER_VOL:
858 pr_debug("PMIC_SND_RIGHT_MASTER_VOL value %d\n", value);
859 sc_access[0].value = -value;
860 sc_access[0].reg_addr = AUDIORVOL;
861 sc_access[0].mask =
862 (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5|MASK6);
863 entries = 1;
864 break;
865
866 default:
867 return -EINVAL;
868
869 }
870 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, entries);
871}
872
873static int nc_set_selected_input_dev(u8 value)
874{
875 struct sc_reg_access sc_access[6];
876 u8 num_val;
877 int retval = 0;
878
879 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
880 retval = nc_init_card();
881 if (retval)
882 return retval;
883 snd_pmic_ops_nc.input_dev_id = value;
884
885 pr_debug("nc set selected input:%d\n", value);
886
887 switch (value) {
888 case AMIC:
889 pr_debug("Selecting AMIC\n");
890 sc_access[0].reg_addr = 0x107;
891 sc_access[0].value = 0x40;
892 sc_access[0].mask = MASK6|MASK3|MASK1|MASK0;
893 sc_access[1].reg_addr = 0x10a;
894 sc_access[1].value = 0x40;
895 sc_access[1].mask = MASK6;
896 sc_access[2].reg_addr = 0x109;
897 sc_access[2].value = 0x00;
898 sc_access[2].mask = MASK6;
899 sc_access[3].reg_addr = 0x105;
900 sc_access[3].value = 0x40;
901 sc_access[3].mask = MASK6;
902 num_val = 4;
903 break;
904
905 case HS_MIC:
906 pr_debug("Selecting HS_MIC\n");
907 sc_access[0].reg_addr = MICCTRL;
908 sc_access[0].mask = MASK6|MASK3|MASK1|MASK0;
909 sc_access[0].value = 0x00;
910 sc_access[1].reg_addr = 0x109;
911 sc_access[1].mask = MASK6;
912 sc_access[1].value = 0x40;
913 sc_access[2].reg_addr = 0x10a;
914 sc_access[2].mask = MASK6;
915 sc_access[2].value = 0x00;
916 sc_access[3].reg_addr = 0x105;
917 sc_access[3].value = 0x40;
918 sc_access[3].mask = MASK6;
919 sc_access[4].reg_addr = ADCSAMPLERATE;
920 sc_access[4].mask = MASK7|MASK6|MASK5|MASK4|MASK3;
921 sc_access[4].value = 0xc8;
922 num_val = 5;
923 break;
924
925 case DMIC:
926 pr_debug("DMIC\n");
927 sc_access[0].reg_addr = MICCTRL;
928 sc_access[0].mask = MASK6|MASK3|MASK1|MASK0;
929 sc_access[0].value = 0x0B;
930 sc_access[1].reg_addr = 0x105;
931 sc_access[1].value = 0x80;
932 sc_access[1].mask = MASK7|MASK6;
933 sc_access[2].reg_addr = 0x10a;
934 sc_access[2].value = 0x40;
935 sc_access[2].mask = MASK6;
936 sc_access[3].reg_addr = LILSEL;
937 sc_access[3].mask = MASK6;
938 sc_access[3].value = 0x00;
939 sc_access[4].reg_addr = ADCSAMPLERATE;
940 sc_access[4].mask = MASK7|MASK6|MASK5|MASK4|MASK3;
941 sc_access[4].value = 0x33;
942 num_val = 5;
943 break;
944 default:
945 return -EINVAL;
946 }
947 return sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, num_val);
948}
949
950static int nc_get_mute(int dev_id, u8 *value)
951{
952 int retval = 0, mask = 0;
953 struct sc_reg_access sc_access = {0,};
954
955 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
956 retval = nc_init_card();
957 if (retval)
958 return retval;
959
960 pr_debug("get mute::%d\n", dev_id);
961
962 switch (dev_id) {
963 case PMIC_SND_AMIC_MUTE:
964 pr_debug("PMIC_SND_INPUT_MUTE_MIC1\n");
965 sc_access.reg_addr = LILSEL;
966 mask = MASK6;
967 break;
968 case PMIC_SND_HP_MIC_MUTE:
969 pr_debug("PMIC_SND_INPUT_MUTE_MIC2\n");
970 sc_access.reg_addr = LIRSEL;
971 mask = MASK6;
972 break;
973 case PMIC_SND_LEFT_HP_MUTE:
974 case PMIC_SND_RIGHT_HP_MUTE:
975 mask = MASK2;
976 pr_debug("PMIC_SN_LEFT/RIGHT_HP_MUTE\n");
977 if (dev_id == PMIC_SND_RIGHT_HP_MUTE)
978 sc_access.reg_addr = RMUTE;
979 else
980 sc_access.reg_addr = LMUTE;
981 break;
982
983 case PMIC_SND_LEFT_SPEAKER_MUTE:
984 pr_debug("PMIC_MONO_EARPIECE_MUTE\n");
985 sc_access.reg_addr = RMUTE;
986 mask = MASK1;
987 break;
988 case PMIC_SND_DMIC_MUTE:
989 pr_debug("PMIC_SND_INPUT_MUTE_DMIC\n");
990 sc_access.reg_addr = 0x105;
991 mask = MASK6;
992 break;
993 default:
994 return -EINVAL;
995
996 }
997 retval = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
998 pr_debug("reg value = %d\n", sc_access.value);
999 if (retval)
1000 return retval;
1001 *value = (sc_access.value) & mask;
1002 pr_debug("masked value = %d\n", *value);
1003 if (*value)
1004 *value = 0;
1005 else
1006 *value = 1;
1007 pr_debug("value returned = 0x%x\n", *value);
1008 return retval;
1009}
1010
1011static int nc_get_vol(int dev_id, int *value)
1012{
1013 int retval = 0, mask = 0;
1014 struct sc_reg_access sc_access = {0,};
1015
1016 if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT)
1017 retval = nc_init_card();
1018 if (retval)
1019 return retval;
1020
1021 switch (dev_id) {
1022 case PMIC_SND_CAPTURE_VOL:
1023 pr_debug("PMIC_SND_INPUT_CAPTURE_VOL\n");
1024 sc_access.reg_addr = LILSEL;
1025 mask = (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5);
1026 break;
1027
1028 case PMIC_SND_LEFT_MASTER_VOL:
1029 pr_debug("GET_VOLUME_PMIC_LEFT_MASTER_VOL\n");
1030 sc_access.reg_addr = AUDIOLVOL;
1031 mask = (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5|MASK6);
1032 break;
1033
1034 case PMIC_SND_RIGHT_MASTER_VOL:
1035 pr_debug("GET_VOLUME_PMIC_RIGHT_MASTER_VOL\n");
1036 sc_access.reg_addr = AUDIORVOL;
1037 mask = (MASK0|MASK1|MASK2|MASK3|MASK4|MASK5|MASK6);
1038 break;
1039
1040 case PMIC_SND_RIGHT_PB_VOL:
1041 pr_debug("GET_VOLUME_PMIC_RIGHT_HP_VOL\n");
1042 sc_access.reg_addr = HPRVOL;
1043 mask = (MASK0|MASK1|MASK2|MASK3|MASK4);
1044 break;
1045
1046 case PMIC_SND_LEFT_PB_VOL:
1047 pr_debug("GET_VOLUME_PMIC_LEFT_HP_VOL\n");
1048 sc_access.reg_addr = HPLVOL;
1049 mask = (MASK0|MASK1|MASK2|MASK3|MASK4);
1050 break;
1051
1052 default:
1053 return -EINVAL;
1054
1055 }
1056 retval = sst_sc_reg_access(&sc_access, PMIC_READ, 1);
1057 pr_debug("value read = 0x%x\n", sc_access.value);
1058 *value = -((sc_access.value) & mask);
1059 pr_debug("get vol value returned = %d\n", *value);
1060 return retval;
1061}
1062
1063static void hp_automute(enum snd_jack_types type, int present)
1064{
1065 u8 in = DMIC;
1066 u8 out = INTERNAL_SPKR;
1067 if (present) {
1068 if (type == SND_JACK_HEADSET)
1069 in = HS_MIC;
1070 out = STEREO_HEADPHONE;
1071 }
1072 nc_set_selected_input_dev(in);
1073 nc_set_selected_output_dev(out);
1074}
1075
1076static void nc_pmic_irq_cb(void *cb_data, u8 intsts)
1077{
1078 u8 value = 0;
1079 struct mad_jack *mjack = NULL;
1080 unsigned int present = 0, jack_event_flag = 0, buttonpressflag = 0;
1081 struct snd_intelmad *intelmaddata = cb_data;
1082 struct sc_reg_access sc_access_read = {0,};
1083
1084 sc_access_read.reg_addr = 0x132;
1085 sst_sc_reg_access(&sc_access_read, PMIC_READ, 1);
1086 value = (sc_access_read.value);
1087 pr_debug("value returned = 0x%x\n", value);
1088
1089 mjack = &intelmaddata->jack[0];
1090 if (intsts & 0x1) {
1091 pr_debug("SST DBG:MAD headset detected\n");
1092 /* send headset detect/undetect */
1093 present = (value == 0x1) ? 3 : 0;
1094 jack_event_flag = 1;
1095 mjack->jack.type = SND_JACK_HEADSET;
1096 hp_automute(SND_JACK_HEADSET, present);
1097 }
1098
1099 if (intsts & 0x2) {
1100 pr_debug(":MAD headphone detected\n");
1101 /* send headphone detect/undetect */
1102 present = (value == 0x2) ? 1 : 0;
1103 jack_event_flag = 1;
1104 mjack->jack.type = SND_JACK_HEADPHONE;
1105 hp_automute(SND_JACK_HEADPHONE, present);
1106 }
1107
1108 if (intsts & 0x4) {
1109 pr_debug("MAD short push detected\n");
1110 /* send short push */
1111 present = 1;
1112 jack_event_flag = 1;
1113 buttonpressflag = 1;
1114 mjack->jack.type = MID_JACK_HS_SHORT_PRESS;
1115 }
1116
1117 if (intsts & 0x8) {
1118 pr_debug(":MAD long push detected\n");
1119 /* send long push */
1120 present = 1;
1121 jack_event_flag = 1;
1122 buttonpressflag = 1;
1123 mjack->jack.type = MID_JACK_HS_LONG_PRESS;
1124 }
1125
1126 if (jack_event_flag)
1127 sst_mad_send_jack_report(&mjack->jack,
1128 buttonpressflag, present);
1129}
1130static int nc_jack_enable(void)
1131{
1132 return 0;
1133}
1134
1135struct snd_pmic_ops snd_pmic_ops_nc = {
1136 .input_dev_id = DMIC,
1137 .output_dev_id = INTERNAL_SPKR,
1138 .set_input_dev = nc_set_selected_input_dev,
1139 .set_output_dev = nc_set_selected_output_dev,
1140 .set_mute = nc_set_mute,
1141 .get_mute = nc_get_mute,
1142 .set_vol = nc_set_vol,
1143 .get_vol = nc_get_vol,
1144 .init_card = nc_init_card,
1145 .set_pcm_audio_params = nc_set_pcm_audio_params,
1146 .set_pcm_voice_params = nc_set_pcm_voice_params,
1147 .set_voice_port = nc_set_voice_port,
1148 .set_audio_port = nc_set_audio_port,
1149 .power_up_pmic_pb = nc_power_up_pb,
1150 .power_up_pmic_cp = nc_power_up_cp,
1151 .power_down_pmic_pb = nc_power_down_pb,
1152 .power_down_pmic_cp = nc_power_down_cp,
1153 .power_down_pmic = nc_power_down,
1154 .pmic_irq_cb = nc_pmic_irq_cb,
1155 .pmic_jack_enable = nc_jack_enable,
1156};
diff --git a/drivers/staging/line6/Makefile b/drivers/staging/line6/Makefile
index de6bd12e9736..34a2ddacc7e9 100644
--- a/drivers/staging/line6/Makefile
+++ b/drivers/staging/line6/Makefile
@@ -12,4 +12,5 @@ line6usb-y := \
12 playback.o \ 12 playback.o \
13 pod.o \ 13 pod.o \
14 toneport.o \ 14 toneport.o \
15 variax.o 15 variax.o \
16 podhd.o
diff --git a/drivers/staging/line6/capture.c b/drivers/staging/line6/capture.c
index 9647154a4923..127f95247749 100644
--- a/drivers/staging/line6/capture.c
+++ b/drivers/staging/line6/capture.c
@@ -9,6 +9,7 @@
9 * 9 *
10 */ 10 */
11 11
12#include <linux/slab.h>
12#include <sound/core.h> 13#include <sound/core.h>
13#include <sound/pcm.h> 14#include <sound/pcm.h>
14#include <sound/pcm_params.h> 15#include <sound/pcm_params.h>
@@ -192,6 +193,31 @@ void line6_capture_check_period(struct snd_line6_pcm *line6pcm, int length)
192 } 193 }
193} 194}
194 195
196int line6_alloc_capture_buffer(struct snd_line6_pcm *line6pcm)
197{
198 /* We may be invoked multiple times in a row so allocate once only */
199 if (line6pcm->buffer_in)
200 return 0;
201
202 line6pcm->buffer_in =
203 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS *
204 line6pcm->max_packet_size, GFP_KERNEL);
205
206 if (!line6pcm->buffer_in) {
207 dev_err(line6pcm->line6->ifcdev,
208 "cannot malloc capture buffer\n");
209 return -ENOMEM;
210 }
211
212 return 0;
213}
214
215void line6_free_capture_buffer(struct snd_line6_pcm *line6pcm)
216{
217 kfree(line6pcm->buffer_in);
218 line6pcm->buffer_in = NULL;
219}
220
195/* 221/*
196 * Callback for completed capture URB. 222 * Callback for completed capture URB.
197 */ 223 */
@@ -243,11 +269,7 @@ static void audio_in_callback(struct urb *urb)
243 length += fsize; 269 length += fsize;
244 270
245 /* the following assumes LINE6_ISO_PACKETS == 1: */ 271 /* the following assumes LINE6_ISO_PACKETS == 1: */
246#if LINE6_BACKUP_MONITOR_SIGNAL
247 memcpy(line6pcm->prev_fbuf, fbuf, fsize);
248#else
249 line6pcm->prev_fbuf = fbuf; 272 line6pcm->prev_fbuf = fbuf;
250#endif
251 line6pcm->prev_fsize = fsize; 273 line6pcm->prev_fsize = fsize;
252 274
253#ifdef CONFIG_LINE6_USB_IMPULSE_RESPONSE 275#ifdef CONFIG_LINE6_USB_IMPULSE_RESPONSE
@@ -319,6 +341,13 @@ static int snd_line6_capture_hw_params(struct snd_pcm_substream *substream,
319 } 341 }
320 /* -- [FD] end */ 342 /* -- [FD] end */
321 343
344 if ((line6pcm->flags & MASK_CAPTURE) == 0) {
345 ret = line6_alloc_capture_buffer(line6pcm);
346
347 if (ret < 0)
348 return ret;
349 }
350
322 ret = snd_pcm_lib_malloc_pages(substream, 351 ret = snd_pcm_lib_malloc_pages(substream,
323 params_buffer_bytes(hw_params)); 352 params_buffer_bytes(hw_params));
324 if (ret < 0) 353 if (ret < 0)
@@ -331,6 +360,13 @@ static int snd_line6_capture_hw_params(struct snd_pcm_substream *substream,
331/* hw_free capture callback */ 360/* hw_free capture callback */
332static int snd_line6_capture_hw_free(struct snd_pcm_substream *substream) 361static int snd_line6_capture_hw_free(struct snd_pcm_substream *substream)
333{ 362{
363 struct snd_line6_pcm *line6pcm = snd_pcm_substream_chip(substream);
364
365 if ((line6pcm->flags & MASK_CAPTURE) == 0) {
366 line6_unlink_wait_clear_audio_in_urbs(line6pcm);
367 line6_free_capture_buffer(line6pcm);
368 }
369
334 return snd_pcm_lib_free_pages(substream); 370 return snd_pcm_lib_free_pages(substream);
335} 371}
336 372
diff --git a/drivers/staging/line6/capture.h b/drivers/staging/line6/capture.h
index a7509fbbb954..366cbaa7c88d 100644
--- a/drivers/staging/line6/capture.h
+++ b/drivers/staging/line6/capture.h
@@ -19,11 +19,13 @@
19 19
20extern struct snd_pcm_ops snd_line6_capture_ops; 20extern struct snd_pcm_ops snd_line6_capture_ops;
21 21
22extern int line6_alloc_capture_buffer(struct snd_line6_pcm *line6pcm);
22extern void line6_capture_copy(struct snd_line6_pcm *line6pcm, char *fbuf, 23extern void line6_capture_copy(struct snd_line6_pcm *line6pcm, char *fbuf,
23 int fsize); 24 int fsize);
24extern void line6_capture_check_period(struct snd_line6_pcm *line6pcm, 25extern void line6_capture_check_period(struct snd_line6_pcm *line6pcm,
25 int length); 26 int length);
26extern int line6_create_audio_in_urbs(struct snd_line6_pcm *line6pcm); 27extern int line6_create_audio_in_urbs(struct snd_line6_pcm *line6pcm);
28extern void line6_free_capture_buffer(struct snd_line6_pcm *line6pcm);
27extern int line6_submit_audio_in_all_urbs(struct snd_line6_pcm *line6pcm); 29extern int line6_submit_audio_in_all_urbs(struct snd_line6_pcm *line6pcm);
28extern void line6_unlink_audio_in_urbs(struct snd_line6_pcm *line6pcm); 30extern void line6_unlink_audio_in_urbs(struct snd_line6_pcm *line6pcm);
29extern void line6_unlink_wait_clear_audio_in_urbs(struct snd_line6_pcm 31extern void line6_unlink_wait_clear_audio_in_urbs(struct snd_line6_pcm
diff --git a/drivers/staging/line6/driver.c b/drivers/staging/line6/driver.c
index 851b762319cf..6a1959e16e00 100644
--- a/drivers/staging/line6/driver.c
+++ b/drivers/staging/line6/driver.c
@@ -21,6 +21,7 @@
21#include "midi.h" 21#include "midi.h"
22#include "playback.h" 22#include "playback.h"
23#include "pod.h" 23#include "pod.h"
24#include "podhd.h"
24#include "revision.h" 25#include "revision.h"
25#include "toneport.h" 26#include "toneport.h"
26#include "usbdefs.h" 27#include "usbdefs.h"
@@ -37,6 +38,8 @@ static const struct usb_device_id line6_id_table[] = {
37 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXTPRO)}, 38 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_BASSPODXTPRO)},
38 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_GUITARPORT)}, 39 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_GUITARPORT)},
39 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_POCKETPOD)}, 40 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_POCKETPOD)},
41 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODHD300)},
42 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODHD500)},
40 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODSTUDIO_GX)}, 43 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODSTUDIO_GX)},
41 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODSTUDIO_UX1)}, 44 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODSTUDIO_UX1)},
42 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODSTUDIO_UX2)}, 45 {USB_DEVICE(LINE6_VENDOR_ID, LINE6_DEVID_PODSTUDIO_UX2)},
@@ -56,23 +59,25 @@ MODULE_DEVICE_TABLE(usb, line6_id_table);
56 59
57/* *INDENT-OFF* */ 60/* *INDENT-OFF* */
58static struct line6_properties line6_properties_table[] = { 61static struct line6_properties line6_properties_table[] = {
59 { "BassPODxt", "BassPODxt", LINE6_BIT_BASSPODXT, LINE6_BIT_CONTROL_PCM_HWMON }, 62 { LINE6_BIT_BASSPODXT, "BassPODxt", "BassPODxt", LINE6_BIT_CONTROL_PCM_HWMON },
60 { "BassPODxtLive", "BassPODxt Live", LINE6_BIT_BASSPODXTLIVE, LINE6_BIT_CONTROL_PCM_HWMON }, 63 { LINE6_BIT_BASSPODXTLIVE, "BassPODxtLive", "BassPODxt Live", LINE6_BIT_CONTROL_PCM_HWMON },
61 { "BassPODxtPro", "BassPODxt Pro", LINE6_BIT_BASSPODXTPRO, LINE6_BIT_CONTROL_PCM_HWMON }, 64 { LINE6_BIT_BASSPODXTPRO, "BassPODxtPro", "BassPODxt Pro", LINE6_BIT_CONTROL_PCM_HWMON },
62 { "GuitarPort", "GuitarPort", LINE6_BIT_GUITARPORT, LINE6_BIT_PCM }, 65 { LINE6_BIT_GUITARPORT, "GuitarPort", "GuitarPort", LINE6_BIT_PCM },
63 { "PocketPOD", "Pocket POD", LINE6_BIT_POCKETPOD, LINE6_BIT_CONTROL }, 66 { LINE6_BIT_POCKETPOD, "PocketPOD", "Pocket POD", LINE6_BIT_CONTROL },
64 { "PODStudioGX", "POD Studio GX", LINE6_BIT_PODSTUDIO_GX, LINE6_BIT_PCM }, 67 { LINE6_BIT_PODHD300, "PODHD300", "POD HD300", LINE6_BIT_CONTROL_PCM_HWMON },
65 { "PODStudioUX1", "POD Studio UX1", LINE6_BIT_PODSTUDIO_UX1, LINE6_BIT_PCM }, 68 { LINE6_BIT_PODHD500, "PODHD500", "POD HD500", LINE6_BIT_CONTROL_PCM_HWMON },
66 { "PODStudioUX2", "POD Studio UX2", LINE6_BIT_PODSTUDIO_UX2, LINE6_BIT_PCM }, 69 { LINE6_BIT_PODSTUDIO_GX, "PODStudioGX", "POD Studio GX", LINE6_BIT_PCM },
67 { "PODX3", "POD X3", LINE6_BIT_PODX3, LINE6_BIT_PCM }, 70 { LINE6_BIT_PODSTUDIO_UX1, "PODStudioUX1", "POD Studio UX1", LINE6_BIT_PCM },
68 { "PODX3Live", "POD X3 Live", LINE6_BIT_PODX3LIVE, LINE6_BIT_PCM }, 71 { LINE6_BIT_PODSTUDIO_UX2, "PODStudioUX2", "POD Studio UX2", LINE6_BIT_PCM },
69 { "PODxt", "PODxt", LINE6_BIT_PODXT, LINE6_BIT_CONTROL_PCM_HWMON }, 72 { LINE6_BIT_PODX3, "PODX3", "POD X3", LINE6_BIT_PCM },
70 { "PODxtLive", "PODxt Live", LINE6_BIT_PODXTLIVE, LINE6_BIT_CONTROL_PCM_HWMON }, 73 { LINE6_BIT_PODX3LIVE, "PODX3Live", "POD X3 Live", LINE6_BIT_PCM },
71 { "PODxtPro", "PODxt Pro", LINE6_BIT_PODXTPRO, LINE6_BIT_CONTROL_PCM_HWMON }, 74 { LINE6_BIT_PODXT, "PODxt", "PODxt", LINE6_BIT_CONTROL_PCM_HWMON },
72 { "TonePortGX", "TonePort GX", LINE6_BIT_TONEPORT_GX, LINE6_BIT_PCM }, 75 { LINE6_BIT_PODXTLIVE, "PODxtLive", "PODxt Live", LINE6_BIT_CONTROL_PCM_HWMON },
73 { "TonePortUX1", "TonePort UX1", LINE6_BIT_TONEPORT_UX1, LINE6_BIT_PCM }, 76 { LINE6_BIT_PODXTPRO, "PODxtPro", "PODxt Pro", LINE6_BIT_CONTROL_PCM_HWMON },
74 { "TonePortUX2", "TonePort UX2", LINE6_BIT_TONEPORT_UX2, LINE6_BIT_PCM }, 77 { LINE6_BIT_TONEPORT_GX, "TonePortGX", "TonePort GX", LINE6_BIT_PCM },
75 { "Variax", "Variax Workbench", LINE6_BIT_VARIAX, LINE6_BIT_CONTROL } 78 { LINE6_BIT_TONEPORT_UX1, "TonePortUX1", "TonePort UX1", LINE6_BIT_PCM },
79 { LINE6_BIT_TONEPORT_UX2, "TonePortUX2", "TonePort UX2", LINE6_BIT_PCM },
80 { LINE6_BIT_VARIAX, "Variax", "Variax Workbench", LINE6_BIT_CONTROL },
76}; 81};
77/* *INDENT-ON* */ 82/* *INDENT-ON* */
78 83
@@ -437,6 +442,10 @@ static void line6_data_received(struct urb *urb)
437 line6); 442 line6);
438 break; 443 break;
439 444
445 case LINE6_DEVID_PODHD300:
446 case LINE6_DEVID_PODHD500:
447 break; /* let userspace handle MIDI */
448
440 case LINE6_DEVID_PODXTLIVE: 449 case LINE6_DEVID_PODXTLIVE:
441 switch (line6->interface_number) { 450 switch (line6->interface_number) {
442 case PODXTLIVE_INTERFACE_POD: 451 case PODXTLIVE_INTERFACE_POD:
@@ -720,8 +729,8 @@ static int line6_probe(struct usb_interface *interface,
720 const struct usb_device_id *id) 729 const struct usb_device_id *id)
721{ 730{
722 int devtype; 731 int devtype;
723 struct usb_device *usbdev = NULL; 732 struct usb_device *usbdev;
724 struct usb_line6 *line6 = NULL; 733 struct usb_line6 *line6;
725 const struct line6_properties *properties; 734 const struct line6_properties *properties;
726 int devnum; 735 int devnum;
727 int interface_number, alternate = 0; 736 int interface_number, alternate = 0;
@@ -794,6 +803,7 @@ static int line6_probe(struct usb_interface *interface,
794 } 803 }
795 break; 804 break;
796 805
806 case LINE6_DEVID_PODHD500:
797 case LINE6_DEVID_PODX3: 807 case LINE6_DEVID_PODX3:
798 case LINE6_DEVID_PODX3LIVE: 808 case LINE6_DEVID_PODX3LIVE:
799 switch (interface_number) { 809 switch (interface_number) {
@@ -812,6 +822,7 @@ static int line6_probe(struct usb_interface *interface,
812 case LINE6_DEVID_BASSPODXTPRO: 822 case LINE6_DEVID_BASSPODXTPRO:
813 case LINE6_DEVID_PODXT: 823 case LINE6_DEVID_PODXT:
814 case LINE6_DEVID_PODXTPRO: 824 case LINE6_DEVID_PODXTPRO:
825 case LINE6_DEVID_PODHD300:
815 alternate = 5; 826 alternate = 5;
816 break; 827 break;
817 828
@@ -865,6 +876,18 @@ static int line6_probe(struct usb_interface *interface,
865 ep_write = 0x03; 876 ep_write = 0x03;
866 break; 877 break;
867 878
879 case LINE6_DEVID_PODHD300:
880 size = sizeof(struct usb_line6_podhd);
881 ep_read = 0x84;
882 ep_write = 0x03;
883 break;
884
885 case LINE6_DEVID_PODHD500:
886 size = sizeof(struct usb_line6_podhd);
887 ep_read = 0x81;
888 ep_write = 0x01;
889 break;
890
868 case LINE6_DEVID_POCKETPOD: 891 case LINE6_DEVID_POCKETPOD:
869 size = sizeof(struct usb_line6_pod); 892 size = sizeof(struct usb_line6_pod);
870 ep_read = 0x82; 893 ep_read = 0x82;
@@ -923,7 +946,7 @@ static int line6_probe(struct usb_interface *interface,
923 } 946 }
924 947
925 if (size == 0) { 948 if (size == 0) {
926 dev_err(line6->ifcdev, 949 dev_err(&interface->dev,
927 "driver bug: interface data size not set\n"); 950 "driver bug: interface data size not set\n");
928 ret = -ENODEV; 951 ret = -ENODEV;
929 goto err_put; 952 goto err_put;
@@ -1017,6 +1040,12 @@ static int line6_probe(struct usb_interface *interface,
1017 ret = line6_pod_init(interface, (struct usb_line6_pod *)line6); 1040 ret = line6_pod_init(interface, (struct usb_line6_pod *)line6);
1018 break; 1041 break;
1019 1042
1043 case LINE6_DEVID_PODHD300:
1044 case LINE6_DEVID_PODHD500:
1045 ret = line6_podhd_init(interface,
1046 (struct usb_line6_podhd *)line6);
1047 break;
1048
1020 case LINE6_DEVID_PODXTLIVE: 1049 case LINE6_DEVID_PODXTLIVE:
1021 switch (interface_number) { 1050 switch (interface_number) {
1022 case PODXTLIVE_INTERFACE_POD: 1051 case PODXTLIVE_INTERFACE_POD:
@@ -1139,6 +1168,11 @@ static void line6_disconnect(struct usb_interface *interface)
1139 line6_pod_disconnect(interface); 1168 line6_pod_disconnect(interface);
1140 break; 1169 break;
1141 1170
1171 case LINE6_DEVID_PODHD300:
1172 case LINE6_DEVID_PODHD500:
1173 line6_podhd_disconnect(interface);
1174 break;
1175
1142 case LINE6_DEVID_PODXTLIVE: 1176 case LINE6_DEVID_PODXTLIVE:
1143 switch (interface_number) { 1177 switch (interface_number) {
1144 case PODXTLIVE_INTERFACE_POD: 1178 case PODXTLIVE_INTERFACE_POD:
diff --git a/drivers/staging/line6/driver.h b/drivers/staging/line6/driver.h
index 553192f49317..117bf9943568 100644
--- a/drivers/staging/line6/driver.h
+++ b/drivers/staging/line6/driver.h
@@ -88,6 +88,11 @@ static const int SYSEX_EXTRA_SIZE = sizeof(line6_midi_id) + 4;
88*/ 88*/
89struct line6_properties { 89struct line6_properties {
90 /** 90 /**
91 Bit identifying this device in the line6usb driver.
92 */
93 int device_bit;
94
95 /**
91 Card id string (maximum 16 characters). 96 Card id string (maximum 16 characters).
92 This can be used to address the device in ALSA programs as 97 This can be used to address the device in ALSA programs as
93 "default:CARD=<id>" 98 "default:CARD=<id>"
@@ -100,11 +105,6 @@ struct line6_properties {
100 const char *name; 105 const char *name;
101 106
102 /** 107 /**
103 Bit identifying this device in the line6usb driver.
104 */
105 int device_bit;
106
107 /**
108 Bit vector defining this device's capabilities in the 108 Bit vector defining this device's capabilities in the
109 line6usb driver. 109 line6usb driver.
110 */ 110 */
diff --git a/drivers/staging/line6/midi.c b/drivers/staging/line6/midi.c
index e554a2da643a..13d02939c3cb 100644
--- a/drivers/staging/line6/midi.c
+++ b/drivers/staging/line6/midi.c
@@ -135,7 +135,7 @@ static int send_midi_async(struct usb_line6 *line6, unsigned char *data,
135 line6_write_hexdump(line6, 'S', data, length); 135 line6_write_hexdump(line6, 'S', data, length);
136#endif 136#endif
137 137
138 transfer_buffer = kmalloc(length, GFP_ATOMIC); 138 transfer_buffer = kmemdup(data, length, GFP_ATOMIC);
139 139
140 if (transfer_buffer == NULL) { 140 if (transfer_buffer == NULL) {
141 usb_free_urb(urb); 141 usb_free_urb(urb);
@@ -143,7 +143,6 @@ static int send_midi_async(struct usb_line6 *line6, unsigned char *data,
143 return -ENOMEM; 143 return -ENOMEM;
144 } 144 }
145 145
146 memcpy(transfer_buffer, data, length);
147 usb_fill_int_urb(urb, line6->usbdev, 146 usb_fill_int_urb(urb, line6->usbdev,
148 usb_sndbulkpipe(line6->usbdev, 147 usb_sndbulkpipe(line6->usbdev,
149 line6->ep_control_write), 148 line6->ep_control_write),
@@ -173,6 +172,8 @@ static int send_midi_async(struct usb_line6 *line6, unsigned char *data,
173 break; 172 break;
174 173
175 case LINE6_DEVID_VARIAX: 174 case LINE6_DEVID_VARIAX:
175 case LINE6_DEVID_PODHD300:
176 case LINE6_DEVID_PODHD500:
176 break; 177 break;
177 178
178 default: 179 default:
@@ -307,10 +308,10 @@ static ssize_t midi_set_midi_mask_transmit(struct device *dev,
307{ 308{
308 struct usb_interface *interface = to_usb_interface(dev); 309 struct usb_interface *interface = to_usb_interface(dev);
309 struct usb_line6 *line6 = usb_get_intfdata(interface); 310 struct usb_line6 *line6 = usb_get_intfdata(interface);
310 unsigned long value; 311 unsigned short value;
311 int ret; 312 int ret;
312 313
313 ret = strict_strtoul(buf, 10, &value); 314 ret = kstrtou16(buf, 10, &value);
314 if (ret) 315 if (ret)
315 return ret; 316 return ret;
316 317
@@ -339,10 +340,10 @@ static ssize_t midi_set_midi_mask_receive(struct device *dev,
339{ 340{
340 struct usb_interface *interface = to_usb_interface(dev); 341 struct usb_interface *interface = to_usb_interface(dev);
341 struct usb_line6 *line6 = usb_get_intfdata(interface); 342 struct usb_line6 *line6 = usb_get_intfdata(interface);
342 unsigned long value; 343 unsigned short value;
343 int ret; 344 int ret;
344 345
345 ret = strict_strtoul(buf, 10, &value); 346 ret = kstrtou16(buf, 10, &value);
346 if (ret) 347 if (ret)
347 return ret; 348 return ret;
348 349
@@ -391,16 +392,32 @@ int line6_init_midi(struct usb_line6 *line6)
391 return -ENOMEM; 392 return -ENOMEM;
392 393
393 err = line6_midibuf_init(&line6midi->midibuf_in, MIDI_BUFFER_SIZE, 0); 394 err = line6_midibuf_init(&line6midi->midibuf_in, MIDI_BUFFER_SIZE, 0);
394 if (err < 0) 395 if (err < 0) {
396 kfree(line6midi);
395 return err; 397 return err;
398 }
396 399
397 err = line6_midibuf_init(&line6midi->midibuf_out, MIDI_BUFFER_SIZE, 1); 400 err = line6_midibuf_init(&line6midi->midibuf_out, MIDI_BUFFER_SIZE, 1);
398 if (err < 0) 401 if (err < 0) {
402 kfree(line6midi->midibuf_in.buf);
403 kfree(line6midi);
399 return err; 404 return err;
405 }
400 406
401 line6midi->line6 = line6; 407 line6midi->line6 = line6;
402 line6midi->midi_mask_transmit = 1; 408
403 line6midi->midi_mask_receive = 4; 409 switch(line6->product) {
410 case LINE6_DEVID_PODHD300:
411 case LINE6_DEVID_PODHD500:
412 line6midi->midi_mask_transmit = 1;
413 line6midi->midi_mask_receive = 1;
414 break;
415
416 default:
417 line6midi->midi_mask_transmit = 1;
418 line6midi->midi_mask_receive = 4;
419 }
420
404 line6->line6midi = line6midi; 421 line6->line6midi = line6midi;
405 422
406 err = snd_device_new(line6->card, SNDRV_DEV_RAWMIDI, line6midi, 423 err = snd_device_new(line6->card, SNDRV_DEV_RAWMIDI, line6midi,
diff --git a/drivers/staging/line6/midi.h b/drivers/staging/line6/midi.h
index b73a025d8be9..4a9e9f947297 100644
--- a/drivers/staging/line6/midi.h
+++ b/drivers/staging/line6/midi.h
@@ -57,12 +57,12 @@ struct snd_line6_midi {
57 /** 57 /**
58 Bit mask for output MIDI channels. 58 Bit mask for output MIDI channels.
59 */ 59 */
60 int midi_mask_transmit; 60 unsigned short midi_mask_transmit;
61 61
62 /** 62 /**
63 Bit mask for input MIDI channels. 63 Bit mask for input MIDI channels.
64 */ 64 */
65 int midi_mask_receive; 65 unsigned short midi_mask_receive;
66 66
67 /** 67 /**
68 Buffer for incoming MIDI stream. 68 Buffer for incoming MIDI stream.
diff --git a/drivers/staging/line6/pcm.c b/drivers/staging/line6/pcm.c
index 9d4c8a606eea..37675e66da81 100644
--- a/drivers/staging/line6/pcm.c
+++ b/drivers/staging/line6/pcm.c
@@ -86,31 +86,22 @@ static DEVICE_ATTR(impulse_period, S_IWUSR | S_IRUGO, pcm_get_impulse_period,
86 86
87#endif 87#endif
88 88
89static bool test_flags(unsigned long flags0, unsigned long flags1,
90 unsigned long mask)
91{
92 return ((flags0 & mask) == 0) && ((flags1 & mask) != 0);
93}
94
89int line6_pcm_start(struct snd_line6_pcm *line6pcm, int channels) 95int line6_pcm_start(struct snd_line6_pcm *line6pcm, int channels)
90{ 96{
91 unsigned long flags_old = 97 unsigned long flags_old =
92 __sync_fetch_and_or(&line6pcm->flags, channels); 98 __sync_fetch_and_or(&line6pcm->flags, channels);
93 unsigned long flags_new = flags_old | channels; 99 unsigned long flags_new = flags_old | channels;
94 int err = 0; 100 int err = 0;
95 101
96#if LINE6_BACKUP_MONITOR_SIGNAL
97 if (!(line6pcm->line6->properties->capabilities & LINE6_BIT_HWMON)) {
98 line6pcm->prev_fbuf =
99 kmalloc(LINE6_ISO_PACKETS * line6pcm->max_packet_size,
100 GFP_KERNEL);
101
102 if (!line6pcm->prev_fbuf) {
103 dev_err(line6pcm->line6->ifcdev,
104 "cannot malloc monitor buffer\n");
105 return -ENOMEM;
106 }
107 }
108#else
109 line6pcm->prev_fbuf = NULL; 102 line6pcm->prev_fbuf = NULL;
110#endif
111 103
112 if (((flags_old & MASK_CAPTURE) == 0) && 104 if (test_flags(flags_old, flags_new, MASK_CAPTURE)) {
113 ((flags_new & MASK_CAPTURE) != 0)) {
114 /* 105 /*
115 Waiting for completion of active URBs in the stop handler is 106 Waiting for completion of active URBs in the stop handler is
116 a bug, we therefore report an error if capturing is restarted 107 a bug, we therefore report an error if capturing is restarted
@@ -119,54 +110,47 @@ int line6_pcm_start(struct snd_line6_pcm *line6pcm, int channels)
119 if (line6pcm->active_urb_in | line6pcm->unlink_urb_in) 110 if (line6pcm->active_urb_in | line6pcm->unlink_urb_in)
120 return -EBUSY; 111 return -EBUSY;
121 112
122 line6pcm->buffer_in = 113 if (!(flags_new & MASK_PCM_ALSA_CAPTURE)) {
123 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS * 114 err = line6_alloc_capture_buffer(line6pcm);
124 line6pcm->max_packet_size, GFP_KERNEL);
125 115
126 if (!line6pcm->buffer_in) { 116 if (err < 0)
127 dev_err(line6pcm->line6->ifcdev, 117 goto pcm_start_error;
128 "cannot malloc capture buffer\n");
129 return -ENOMEM;
130 } 118 }
131 119
132 line6pcm->count_in = 0; 120 line6pcm->count_in = 0;
133 line6pcm->prev_fsize = 0; 121 line6pcm->prev_fsize = 0;
134 err = line6_submit_audio_in_all_urbs(line6pcm); 122 err = line6_submit_audio_in_all_urbs(line6pcm);
135 123
136 if (err < 0) { 124 if (err < 0)
137 __sync_fetch_and_and(&line6pcm->flags, ~channels); 125 goto pcm_start_error;
138 return err;
139 }
140 } 126 }
141 127
142 if (((flags_old & MASK_PLAYBACK) == 0) && 128 if (test_flags(flags_old, flags_new, MASK_PLAYBACK)) {
143 ((flags_new & MASK_PLAYBACK) != 0)) {
144 /* 129 /*
145 See comment above regarding PCM restart. 130 See comment above regarding PCM restart.
146 */ 131 */
147 if (line6pcm->active_urb_out | line6pcm->unlink_urb_out) 132 if (line6pcm->active_urb_out | line6pcm->unlink_urb_out)
148 return -EBUSY; 133 return -EBUSY;
149 134
150 line6pcm->buffer_out = 135 if (!(flags_new & MASK_PCM_ALSA_PLAYBACK)) {
151 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS * 136 err = line6_alloc_playback_buffer(line6pcm);
152 line6pcm->max_packet_size, GFP_KERNEL);
153 137
154 if (!line6pcm->buffer_out) { 138 if (err < 0)
155 dev_err(line6pcm->line6->ifcdev, 139 goto pcm_start_error;
156 "cannot malloc playback buffer\n");
157 return -ENOMEM;
158 } 140 }
159 141
160 line6pcm->count_out = 0; 142 line6pcm->count_out = 0;
161 err = line6_submit_audio_out_all_urbs(line6pcm); 143 err = line6_submit_audio_out_all_urbs(line6pcm);
162 144
163 if (err < 0) { 145 if (err < 0)
164 __sync_fetch_and_and(&line6pcm->flags, ~channels); 146 goto pcm_start_error;
165 return err;
166 }
167 } 147 }
168 148
169 return 0; 149 return 0;
150
151pcm_start_error:
152 __sync_fetch_and_and(&line6pcm->flags, ~channels);
153 return err;
170} 154}
171 155
172int line6_pcm_stop(struct snd_line6_pcm *line6pcm, int channels) 156int line6_pcm_stop(struct snd_line6_pcm *line6pcm, int channels)
@@ -175,22 +159,19 @@ int line6_pcm_stop(struct snd_line6_pcm *line6pcm, int channels)
175 __sync_fetch_and_and(&line6pcm->flags, ~channels); 159 __sync_fetch_and_and(&line6pcm->flags, ~channels);
176 unsigned long flags_new = flags_old & ~channels; 160 unsigned long flags_new = flags_old & ~channels;
177 161
178 if (((flags_old & MASK_CAPTURE) != 0) && 162 if (test_flags(flags_new, flags_old, MASK_CAPTURE)) {
179 ((flags_new & MASK_CAPTURE) == 0)) {
180 line6_unlink_audio_in_urbs(line6pcm); 163 line6_unlink_audio_in_urbs(line6pcm);
181 kfree(line6pcm->buffer_in); 164
182 line6pcm->buffer_in = NULL; 165 if (!(flags_old & MASK_PCM_ALSA_CAPTURE))
166 line6_free_capture_buffer(line6pcm);
183 } 167 }
184 168
185 if (((flags_old & MASK_PLAYBACK) != 0) && 169 if (test_flags(flags_new, flags_old, MASK_PLAYBACK)) {
186 ((flags_new & MASK_PLAYBACK) == 0)) {
187 line6_unlink_audio_out_urbs(line6pcm); 170 line6_unlink_audio_out_urbs(line6pcm);
188 kfree(line6pcm->buffer_out); 171
189 line6pcm->buffer_out = NULL; 172 if (!(flags_old & MASK_PCM_ALSA_PLAYBACK))
173 line6_free_playback_buffer(line6pcm);
190 } 174 }
191#if LINE6_BACKUP_MONITOR_SIGNAL
192 kfree(line6pcm->prev_fbuf);
193#endif
194 175
195 return 0; 176 return 0;
196} 177}
@@ -403,10 +384,12 @@ int line6_init_pcm(struct usb_line6 *line6,
403 case LINE6_DEVID_PODXT: 384 case LINE6_DEVID_PODXT:
404 case LINE6_DEVID_PODXTLIVE: 385 case LINE6_DEVID_PODXTLIVE:
405 case LINE6_DEVID_PODXTPRO: 386 case LINE6_DEVID_PODXTPRO:
387 case LINE6_DEVID_PODHD300:
406 ep_read = 0x82; 388 ep_read = 0x82;
407 ep_write = 0x01; 389 ep_write = 0x01;
408 break; 390 break;
409 391
392 case LINE6_DEVID_PODHD500:
410 case LINE6_DEVID_PODX3: 393 case LINE6_DEVID_PODX3:
411 case LINE6_DEVID_PODX3LIVE: 394 case LINE6_DEVID_PODX3LIVE:
412 ep_read = 0x86; 395 ep_read = 0x86;
@@ -451,9 +434,14 @@ int line6_init_pcm(struct usb_line6 *line6,
451 line6pcm->line6 = line6; 434 line6pcm->line6 = line6;
452 line6pcm->ep_audio_read = ep_read; 435 line6pcm->ep_audio_read = ep_read;
453 line6pcm->ep_audio_write = ep_write; 436 line6pcm->ep_audio_write = ep_write;
454 line6pcm->max_packet_size = usb_maxpacket(line6->usbdev, 437
455 usb_rcvintpipe(line6->usbdev, 438 /* Read and write buffers are sized identically, so choose minimum */
456 ep_read), 0); 439 line6pcm->max_packet_size = min(
440 usb_maxpacket(line6->usbdev,
441 usb_rcvisocpipe(line6->usbdev, ep_read), 0),
442 usb_maxpacket(line6->usbdev,
443 usb_sndisocpipe(line6->usbdev, ep_write), 1));
444
457 line6pcm->properties = properties; 445 line6pcm->properties = properties;
458 line6->line6pcm = line6pcm; 446 line6->line6pcm = line6pcm;
459 447
@@ -508,6 +496,23 @@ int snd_line6_prepare(struct snd_pcm_substream *substream)
508{ 496{
509 struct snd_line6_pcm *line6pcm = snd_pcm_substream_chip(substream); 497 struct snd_line6_pcm *line6pcm = snd_pcm_substream_chip(substream);
510 498
499 switch (substream->stream) {
500 case SNDRV_PCM_STREAM_PLAYBACK:
501 if ((line6pcm->flags & MASK_PLAYBACK) == 0)
502 line6_unlink_wait_clear_audio_out_urbs(line6pcm);
503
504 break;
505
506 case SNDRV_PCM_STREAM_CAPTURE:
507 if ((line6pcm->flags & MASK_CAPTURE) == 0)
508 line6_unlink_wait_clear_audio_in_urbs(line6pcm);
509
510 break;
511
512 default:
513 MISSING_CASE;
514 }
515
511 if (!test_and_set_bit(BIT_PREPARED, &line6pcm->flags)) { 516 if (!test_and_set_bit(BIT_PREPARED, &line6pcm->flags)) {
512 line6pcm->count_out = 0; 517 line6pcm->count_out = 0;
513 line6pcm->pos_out = 0; 518 line6pcm->pos_out = 0;
diff --git a/drivers/staging/line6/pcm.h b/drivers/staging/line6/pcm.h
index 77055b3724ad..55d8297dd3d9 100644
--- a/drivers/staging/line6/pcm.h
+++ b/drivers/staging/line6/pcm.h
@@ -39,9 +39,6 @@
39#define LINE6_IMPULSE_DEFAULT_PERIOD 100 39#define LINE6_IMPULSE_DEFAULT_PERIOD 100
40#endif 40#endif
41 41
42#define LINE6_BACKUP_MONITOR_SIGNAL 0
43#define LINE6_REUSE_DMA_AREA_FOR_PLAYBACK 0
44
45/* 42/*
46 Get substream from Line6 PCM data structure 43 Get substream from Line6 PCM data structure
47*/ 44*/
@@ -149,11 +146,6 @@ struct snd_line6_pcm {
149 unsigned char *buffer_in; 146 unsigned char *buffer_in;
150 147
151 /** 148 /**
152 Temporary buffer index for playback.
153 */
154 int index_out;
155
156 /**
157 Previously captured frame (for software monitoring). 149 Previously captured frame (for software monitoring).
158 */ 150 */
159 unsigned char *prev_fbuf; 151 unsigned char *prev_fbuf;
diff --git a/drivers/staging/line6/playback.c b/drivers/staging/line6/playback.c
index 10c543836583..4152db2328b7 100644
--- a/drivers/staging/line6/playback.c
+++ b/drivers/staging/line6/playback.c
@@ -9,6 +9,7 @@
9 * 9 *
10 */ 10 */
11 11
12#include <linux/slab.h>
12#include <sound/core.h> 13#include <sound/core.h>
13#include <sound/pcm.h> 14#include <sound/pcm.h>
14#include <sound/pcm_params.h> 15#include <sound/pcm_params.h>
@@ -191,13 +192,10 @@ static int submit_audio_out_urb(struct snd_line6_pcm *line6pcm)
191 urb_frames = urb_size / bytes_per_frame; 192 urb_frames = urb_size / bytes_per_frame;
192 urb_out->transfer_buffer = 193 urb_out->transfer_buffer =
193 line6pcm->buffer_out + 194 line6pcm->buffer_out +
194 line6pcm->max_packet_size * line6pcm->index_out; 195 index * LINE6_ISO_PACKETS * line6pcm->max_packet_size;
195 urb_out->transfer_buffer_length = urb_size; 196 urb_out->transfer_buffer_length = urb_size;
196 urb_out->context = line6pcm; 197 urb_out->context = line6pcm;
197 198
198 if (++line6pcm->index_out == LINE6_ISO_BUFFERS)
199 line6pcm->index_out = 0;
200
201 if (test_bit(BIT_PCM_ALSA_PLAYBACK, &line6pcm->flags) && 199 if (test_bit(BIT_PCM_ALSA_PLAYBACK, &line6pcm->flags) &&
202 !test_bit(BIT_PAUSE_PLAYBACK, &line6pcm->flags)) { 200 !test_bit(BIT_PAUSE_PLAYBACK, &line6pcm->flags)) {
203 struct snd_pcm_runtime *runtime = 201 struct snd_pcm_runtime *runtime =
@@ -222,18 +220,10 @@ static int submit_audio_out_urb(struct snd_line6_pcm *line6pcm)
222 } else 220 } else
223 dev_err(line6pcm->line6->ifcdev, "driver bug: len = %d\n", len); /* this is somewhat paranoid */ 221 dev_err(line6pcm->line6->ifcdev, "driver bug: len = %d\n", len); /* this is somewhat paranoid */
224 } else { 222 } else {
225#if LINE6_REUSE_DMA_AREA_FOR_PLAYBACK
226 /* set the buffer pointer */
227 urb_out->transfer_buffer =
228 runtime->dma_area +
229 line6pcm->pos_out * bytes_per_frame;
230#else
231 /* copy data */
232 memcpy(urb_out->transfer_buffer, 223 memcpy(urb_out->transfer_buffer,
233 runtime->dma_area + 224 runtime->dma_area +
234 line6pcm->pos_out * bytes_per_frame, 225 line6pcm->pos_out * bytes_per_frame,
235 urb_out->transfer_buffer_length); 226 urb_out->transfer_buffer_length);
236#endif
237 } 227 }
238 228
239 line6pcm->pos_out += urb_frames; 229 line6pcm->pos_out += urb_frames;
@@ -361,6 +351,31 @@ void line6_unlink_wait_clear_audio_out_urbs(struct snd_line6_pcm *line6pcm)
361 wait_clear_audio_out_urbs(line6pcm); 351 wait_clear_audio_out_urbs(line6pcm);
362} 352}
363 353
354int line6_alloc_playback_buffer(struct snd_line6_pcm *line6pcm)
355{
356 /* We may be invoked multiple times in a row so allocate once only */
357 if (line6pcm->buffer_out)
358 return 0;
359
360 line6pcm->buffer_out =
361 kmalloc(LINE6_ISO_BUFFERS * LINE6_ISO_PACKETS *
362 line6pcm->max_packet_size, GFP_KERNEL);
363
364 if (!line6pcm->buffer_out) {
365 dev_err(line6pcm->line6->ifcdev,
366 "cannot malloc playback buffer\n");
367 return -ENOMEM;
368 }
369
370 return 0;
371}
372
373void line6_free_playback_buffer(struct snd_line6_pcm *line6pcm)
374{
375 kfree(line6pcm->buffer_out);
376 line6pcm->buffer_out = NULL;
377}
378
364/* 379/*
365 Callback for completed playback URB. 380 Callback for completed playback URB.
366*/ 381*/
@@ -469,6 +484,13 @@ static int snd_line6_playback_hw_params(struct snd_pcm_substream *substream,
469 } 484 }
470 /* -- [FD] end */ 485 /* -- [FD] end */
471 486
487 if ((line6pcm->flags & MASK_PLAYBACK) == 0) {
488 ret = line6_alloc_playback_buffer(line6pcm);
489
490 if (ret < 0)
491 return ret;
492 }
493
472 ret = snd_pcm_lib_malloc_pages(substream, 494 ret = snd_pcm_lib_malloc_pages(substream,
473 params_buffer_bytes(hw_params)); 495 params_buffer_bytes(hw_params));
474 if (ret < 0) 496 if (ret < 0)
@@ -481,6 +503,13 @@ static int snd_line6_playback_hw_params(struct snd_pcm_substream *substream,
481/* hw_free playback callback */ 503/* hw_free playback callback */
482static int snd_line6_playback_hw_free(struct snd_pcm_substream *substream) 504static int snd_line6_playback_hw_free(struct snd_pcm_substream *substream)
483{ 505{
506 struct snd_line6_pcm *line6pcm = snd_pcm_substream_chip(substream);
507
508 if ((line6pcm->flags & MASK_PLAYBACK) == 0) {
509 line6_unlink_wait_clear_audio_out_urbs(line6pcm);
510 line6_free_playback_buffer(line6pcm);
511 }
512
484 return snd_pcm_lib_free_pages(substream); 513 return snd_pcm_lib_free_pages(substream);
485} 514}
486 515
diff --git a/drivers/staging/line6/playback.h b/drivers/staging/line6/playback.h
index f2fc8c0526e3..02487ff24538 100644
--- a/drivers/staging/line6/playback.h
+++ b/drivers/staging/line6/playback.h
@@ -29,7 +29,9 @@
29 29
30extern struct snd_pcm_ops snd_line6_playback_ops; 30extern struct snd_pcm_ops snd_line6_playback_ops;
31 31
32extern int line6_alloc_playback_buffer(struct snd_line6_pcm *line6pcm);
32extern int line6_create_audio_out_urbs(struct snd_line6_pcm *line6pcm); 33extern int line6_create_audio_out_urbs(struct snd_line6_pcm *line6pcm);
34extern void line6_free_playback_buffer(struct snd_line6_pcm *line6pcm);
33extern int line6_submit_audio_out_all_urbs(struct snd_line6_pcm *line6pcm); 35extern int line6_submit_audio_out_all_urbs(struct snd_line6_pcm *line6pcm);
34extern void line6_unlink_audio_out_urbs(struct snd_line6_pcm *line6pcm); 36extern void line6_unlink_audio_out_urbs(struct snd_line6_pcm *line6pcm);
35extern void line6_unlink_wait_clear_audio_out_urbs(struct snd_line6_pcm 37extern void line6_unlink_wait_clear_audio_out_urbs(struct snd_line6_pcm
diff --git a/drivers/staging/line6/pod.c b/drivers/staging/line6/pod.c
index d9b30212585c..4dadc571d961 100644
--- a/drivers/staging/line6/pod.c
+++ b/drivers/staging/line6/pod.c
@@ -1149,14 +1149,10 @@ static struct snd_kcontrol_new pod_control_monitor = {
1149static void pod_destruct(struct usb_interface *interface) 1149static void pod_destruct(struct usb_interface *interface)
1150{ 1150{
1151 struct usb_line6_pod *pod = usb_get_intfdata(interface); 1151 struct usb_line6_pod *pod = usb_get_intfdata(interface);
1152 struct usb_line6 *line6;
1153 1152
1154 if (pod == NULL) 1153 if (pod == NULL)
1155 return; 1154 return;
1156 line6 = &pod->line6; 1155 line6_cleanup_audio(&pod->line6);
1157 if (line6 == NULL)
1158 return;
1159 line6_cleanup_audio(line6);
1160 1156
1161 del_timer(&pod->startup_timer); 1157 del_timer(&pod->startup_timer);
1162 cancel_work_sync(&pod->startup_work); 1158 cancel_work_sync(&pod->startup_work);
diff --git a/drivers/staging/line6/podhd.c b/drivers/staging/line6/podhd.c
new file mode 100644
index 000000000000..7ef45437b4f2
--- /dev/null
+++ b/drivers/staging/line6/podhd.c
@@ -0,0 +1,154 @@
1/*
2 * Line6 Pod HD
3 *
4 * Copyright (C) 2011 Stefan Hajnoczi <stefanha@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 *
10 */
11
12#include <sound/core.h>
13#include <sound/pcm.h>
14
15#include "audio.h"
16#include "driver.h"
17#include "pcm.h"
18#include "podhd.h"
19
20#define PODHD_BYTES_PER_FRAME 6 /* 24bit audio (stereo) */
21
22static struct snd_ratden podhd_ratden = {
23 .num_min = 48000,
24 .num_max = 48000,
25 .num_step = 1,
26 .den = 1,
27};
28
29static struct line6_pcm_properties podhd_pcm_properties = {
30 .snd_line6_playback_hw = {
31 .info = (SNDRV_PCM_INFO_MMAP |
32 SNDRV_PCM_INFO_INTERLEAVED |
33 SNDRV_PCM_INFO_BLOCK_TRANSFER |
34 SNDRV_PCM_INFO_MMAP_VALID |
35 SNDRV_PCM_INFO_PAUSE |
36#ifdef CONFIG_PM
37 SNDRV_PCM_INFO_RESUME |
38#endif
39 SNDRV_PCM_INFO_SYNC_START),
40 .formats = SNDRV_PCM_FMTBIT_S24_3LE,
41 .rates = SNDRV_PCM_RATE_48000,
42 .rate_min = 48000,
43 .rate_max = 48000,
44 .channels_min = 2,
45 .channels_max = 2,
46 .buffer_bytes_max = 60000,
47 .period_bytes_min = 64,
48 .period_bytes_max = 8192,
49 .periods_min = 1,
50 .periods_max = 1024},
51 .snd_line6_capture_hw = {
52 .info = (SNDRV_PCM_INFO_MMAP |
53 SNDRV_PCM_INFO_INTERLEAVED |
54 SNDRV_PCM_INFO_BLOCK_TRANSFER |
55 SNDRV_PCM_INFO_MMAP_VALID |
56#ifdef CONFIG_PM
57 SNDRV_PCM_INFO_RESUME |
58#endif
59 SNDRV_PCM_INFO_SYNC_START),
60 .formats = SNDRV_PCM_FMTBIT_S24_3LE,
61 .rates = SNDRV_PCM_RATE_48000,
62 .rate_min = 48000,
63 .rate_max = 48000,
64 .channels_min = 2,
65 .channels_max = 2,
66 .buffer_bytes_max = 60000,
67 .period_bytes_min = 64,
68 .period_bytes_max = 8192,
69 .periods_min = 1,
70 .periods_max = 1024},
71 .snd_line6_rates = {
72 .nrats = 1,
73 .rats = &podhd_ratden},
74 .bytes_per_frame = PODHD_BYTES_PER_FRAME
75};
76
77/*
78 POD HD destructor.
79*/
80static void podhd_destruct(struct usb_interface *interface)
81{
82 struct usb_line6_podhd *podhd = usb_get_intfdata(interface);
83
84 if (podhd == NULL)
85 return;
86 line6_cleanup_audio(&podhd->line6);
87}
88
89/*
90 Try to init POD HD device.
91*/
92static int podhd_try_init(struct usb_interface *interface,
93 struct usb_line6_podhd *podhd)
94{
95 int err;
96 struct usb_line6 *line6 = &podhd->line6;
97
98 if ((interface == NULL) || (podhd == NULL))
99 return -ENODEV;
100
101 /* initialize audio system: */
102 err = line6_init_audio(line6);
103 if (err < 0)
104 return err;
105
106 /* initialize MIDI subsystem: */
107 err = line6_init_midi(line6);
108 if (err < 0)
109 return err;
110
111 /* initialize PCM subsystem: */
112 err = line6_init_pcm(line6, &podhd_pcm_properties);
113 if (err < 0)
114 return err;
115
116 /* register USB audio system: */
117 err = line6_register_audio(line6);
118 return err;
119}
120
121/*
122 Init POD HD device (and clean up in case of failure).
123*/
124int line6_podhd_init(struct usb_interface *interface,
125 struct usb_line6_podhd *podhd)
126{
127 int err = podhd_try_init(interface, podhd);
128
129 if (err < 0)
130 podhd_destruct(interface);
131
132 return err;
133}
134
135/*
136 POD HD device disconnected.
137*/
138void line6_podhd_disconnect(struct usb_interface *interface)
139{
140 struct usb_line6_podhd *podhd;
141
142 if (interface == NULL)
143 return;
144 podhd = usb_get_intfdata(interface);
145
146 if (podhd != NULL) {
147 struct snd_line6_pcm *line6pcm = podhd->line6.line6pcm;
148
149 if (line6pcm != NULL)
150 line6_pcm_disconnect(line6pcm);
151 }
152
153 podhd_destruct(interface);
154}
diff --git a/drivers/staging/line6/podhd.h b/drivers/staging/line6/podhd.h
new file mode 100644
index 000000000000..652f74056bb9
--- /dev/null
+++ b/drivers/staging/line6/podhd.h
@@ -0,0 +1,30 @@
1/*
2 * Line6 Pod HD
3 *
4 * Copyright (C) 2011 Stefan Hajnoczi <stefanha@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 *
10 */
11
12#ifndef PODHD_H
13#define PODHD_H
14
15#include <linux/usb.h>
16
17#include "driver.h"
18
19struct usb_line6_podhd {
20 /**
21 Generic Line6 USB data.
22 */
23 struct usb_line6 line6;
24};
25
26extern void line6_podhd_disconnect(struct usb_interface *interface);
27extern int line6_podhd_init(struct usb_interface *interface,
28 struct usb_line6_podhd *podhd);
29
30#endif /* PODHD_H */
diff --git a/drivers/staging/line6/revision.h b/drivers/staging/line6/revision.h
index 350d0dfff8f8..b4eee2b73831 100644
--- a/drivers/staging/line6/revision.h
+++ b/drivers/staging/line6/revision.h
@@ -1,4 +1,4 @@
1#ifndef DRIVER_REVISION 1#ifndef DRIVER_REVISION
2/* current subversion revision */ 2/* current subversion revision */
3#define DRIVER_REVISION " (revision 690)" 3#define DRIVER_REVISION " (904)"
4#endif 4#endif
diff --git a/drivers/staging/line6/toneport.c b/drivers/staging/line6/toneport.c
index 879e6992bbc6..f31057830dbc 100644
--- a/drivers/staging/line6/toneport.c
+++ b/drivers/staging/line6/toneport.c
@@ -295,14 +295,10 @@ static struct snd_kcontrol_new toneport_control_source = {
295static void toneport_destruct(struct usb_interface *interface) 295static void toneport_destruct(struct usb_interface *interface)
296{ 296{
297 struct usb_line6_toneport *toneport = usb_get_intfdata(interface); 297 struct usb_line6_toneport *toneport = usb_get_intfdata(interface);
298 struct usb_line6 *line6;
299 298
300 if (toneport == NULL) 299 if (toneport == NULL)
301 return; 300 return;
302 line6 = &toneport->line6; 301 line6_cleanup_audio(&toneport->line6);
303 if (line6 == NULL)
304 return;
305 line6_cleanup_audio(line6);
306} 302}
307 303
308/* 304/*
diff --git a/drivers/staging/line6/usbdefs.h b/drivers/staging/line6/usbdefs.h
index c6dffe6bc1a5..aff9e5caea46 100644
--- a/drivers/staging/line6/usbdefs.h
+++ b/drivers/staging/line6/usbdefs.h
@@ -24,6 +24,8 @@
24#define LINE6_DEVID_BASSPODXTPRO 0x4252 24#define LINE6_DEVID_BASSPODXTPRO 0x4252
25#define LINE6_DEVID_GUITARPORT 0x4750 25#define LINE6_DEVID_GUITARPORT 0x4750
26#define LINE6_DEVID_POCKETPOD 0x5051 26#define LINE6_DEVID_POCKETPOD 0x5051
27#define LINE6_DEVID_PODHD300 0x5057
28#define LINE6_DEVID_PODHD500 0x414D
27#define LINE6_DEVID_PODSTUDIO_GX 0x4153 29#define LINE6_DEVID_PODSTUDIO_GX 0x4153
28#define LINE6_DEVID_PODSTUDIO_UX1 0x4150 30#define LINE6_DEVID_PODSTUDIO_UX1 0x4150
29#define LINE6_DEVID_PODSTUDIO_UX2 0x4151 31#define LINE6_DEVID_PODSTUDIO_UX2 0x4151
@@ -37,48 +39,71 @@
37#define LINE6_DEVID_TONEPORT_UX2 0x4142 39#define LINE6_DEVID_TONEPORT_UX2 0x4142
38#define LINE6_DEVID_VARIAX 0x534d 40#define LINE6_DEVID_VARIAX 0x534d
39 41
40#define LINE6_BIT_BASSPODXT (1 << 0) 42enum {
41#define LINE6_BIT_BASSPODXTLIVE (1 << 1) 43 LINE6_ID_BASSPODXT,
42#define LINE6_BIT_BASSPODXTPRO (1 << 2) 44 LINE6_ID_BASSPODXTLIVE,
43#define LINE6_BIT_GUITARPORT (1 << 3) 45 LINE6_ID_BASSPODXTPRO,
44#define LINE6_BIT_POCKETPOD (1 << 4) 46 LINE6_ID_GUITARPORT,
45#define LINE6_BIT_PODSTUDIO_GX (1 << 5) 47 LINE6_ID_POCKETPOD,
46#define LINE6_BIT_PODSTUDIO_UX1 (1 << 6) 48 LINE6_ID_PODHD300,
47#define LINE6_BIT_PODSTUDIO_UX2 (1 << 7) 49 LINE6_ID_PODHD500,
48#define LINE6_BIT_PODX3 (1 << 8) 50 LINE6_ID_PODSTUDIO_GX,
49#define LINE6_BIT_PODX3LIVE (1 << 9) 51 LINE6_ID_PODSTUDIO_UX1,
50#define LINE6_BIT_PODXT (1 << 10) 52 LINE6_ID_PODSTUDIO_UX2,
51#define LINE6_BIT_PODXTLIVE (1 << 11) 53 LINE6_ID_PODX3,
52#define LINE6_BIT_PODXTPRO (1 << 12) 54 LINE6_ID_PODX3LIVE,
53#define LINE6_BIT_TONEPORT_GX (1 << 13) 55 LINE6_ID_PODXT,
54#define LINE6_BIT_TONEPORT_UX1 (1 << 14) 56 LINE6_ID_PODXTLIVE,
55#define LINE6_BIT_TONEPORT_UX2 (1 << 15) 57 LINE6_ID_PODXTPRO,
56#define LINE6_BIT_VARIAX (1 << 16) 58 LINE6_ID_TONEPORT_GX,
59 LINE6_ID_TONEPORT_UX1,
60 LINE6_ID_TONEPORT_UX2,
61 LINE6_ID_VARIAX
62};
57 63
58#define LINE6_BITS_PRO (LINE6_BIT_BASSPODXTPRO | \ 64#define LINE6_BIT(x) LINE6_BIT_ ## x = 1 << LINE6_ID_ ## x
59 LINE6_BIT_PODXTPRO) 65
60#define LINE6_BITS_LIVE (LINE6_BIT_BASSPODXTLIVE | \ 66enum {
61 LINE6_BIT_PODXTLIVE | \ 67 LINE6_BIT(BASSPODXT),
62 LINE6_BIT_PODX3LIVE) 68 LINE6_BIT(BASSPODXTLIVE),
63#define LINE6_BITS_PODXTALL (LINE6_BIT_PODXT | \ 69 LINE6_BIT(BASSPODXTPRO),
64 LINE6_BIT_PODXTLIVE | \ 70 LINE6_BIT(GUITARPORT),
65 LINE6_BIT_PODXTPRO) 71 LINE6_BIT(POCKETPOD),
66#define LINE6_BITS_BASSPODXTALL (LINE6_BIT_BASSPODXT | \ 72 LINE6_BIT(PODHD300),
67 LINE6_BIT_BASSPODXTLIVE | \ 73 LINE6_BIT(PODHD500),
68 LINE6_BIT_BASSPODXTPRO) 74 LINE6_BIT(PODSTUDIO_GX),
75 LINE6_BIT(PODSTUDIO_UX1),
76 LINE6_BIT(PODSTUDIO_UX2),
77 LINE6_BIT(PODX3),
78 LINE6_BIT(PODX3LIVE),
79 LINE6_BIT(PODXT),
80 LINE6_BIT(PODXTLIVE),
81 LINE6_BIT(PODXTPRO),
82 LINE6_BIT(TONEPORT_GX),
83 LINE6_BIT(TONEPORT_UX1),
84 LINE6_BIT(TONEPORT_UX2),
85 LINE6_BIT(VARIAX),
86
87 LINE6_BITS_PRO = LINE6_BIT_BASSPODXTPRO | LINE6_BIT_PODXTPRO,
88 LINE6_BITS_LIVE = LINE6_BIT_BASSPODXTLIVE | LINE6_BIT_PODXTLIVE | LINE6_BIT_PODX3LIVE,
89 LINE6_BITS_PODXTALL = LINE6_BIT_PODXT | LINE6_BIT_PODXTLIVE | LINE6_BIT_PODXTPRO,
90 LINE6_BITS_PODX3ALL = LINE6_BIT_PODX3 | LINE6_BIT_PODX3LIVE,
91 LINE6_BITS_PODHDALL = LINE6_BIT_PODHD300 | LINE6_BIT_PODHD500,
92 LINE6_BITS_BASSPODXTALL = LINE6_BIT_BASSPODXT | LINE6_BIT_BASSPODXTLIVE | LINE6_BIT_BASSPODXTPRO
93};
69 94
70/* device supports settings parameter via USB */ 95/* device supports settings parameter via USB */
71#define LINE6_BIT_CONTROL (1 << 0) 96#define LINE6_BIT_CONTROL (1 << 0)
72/* device supports PCM input/output via USB */ 97/* device supports PCM input/output via USB */
73#define LINE6_BIT_PCM (1 << 1) 98#define LINE6_BIT_PCM (1 << 1)
74/* device support hardware monitoring */ 99/* device support hardware monitoring */
75#define LINE6_BIT_HWMON (1 << 2) 100#define LINE6_BIT_HWMON (1 << 2)
76 101
77#define LINE6_BIT_CONTROL_PCM_HWMON (LINE6_BIT_CONTROL | \ 102#define LINE6_BIT_CONTROL_PCM_HWMON (LINE6_BIT_CONTROL | \
78 LINE6_BIT_PCM | \ 103 LINE6_BIT_PCM | \
79 LINE6_BIT_HWMON) 104 LINE6_BIT_HWMON)
80 105
81#define LINE6_FALLBACK_INTERVAL 10 106#define LINE6_FALLBACK_INTERVAL 10
82#define LINE6_FALLBACK_MAXPACKETSIZE 16 107#define LINE6_FALLBACK_MAXPACKETSIZE 16
83 108
84#endif 109#endif
diff --git a/drivers/staging/line6/variax.c b/drivers/staging/line6/variax.c
index 81241cdf1be9..d36622228b2d 100644
--- a/drivers/staging/line6/variax.c
+++ b/drivers/staging/line6/variax.c
@@ -572,14 +572,10 @@ static DEVICE_ATTR(raw2, S_IWUSR, line6_nop_read, variax_set_raw2);
572static void variax_destruct(struct usb_interface *interface) 572static void variax_destruct(struct usb_interface *interface)
573{ 573{
574 struct usb_line6_variax *variax = usb_get_intfdata(interface); 574 struct usb_line6_variax *variax = usb_get_intfdata(interface);
575 struct usb_line6 *line6;
576 575
577 if (variax == NULL) 576 if (variax == NULL)
578 return; 577 return;
579 line6 = &variax->line6; 578 line6_cleanup_audio(&variax->line6);
580 if (line6 == NULL)
581 return;
582 line6_cleanup_audio(line6);
583 579
584 del_timer(&variax->startup_timer1); 580 del_timer(&variax->startup_timer1);
585 del_timer(&variax->startup_timer2); 581 del_timer(&variax->startup_timer2);
diff --git a/drivers/staging/mei/init.c b/drivers/staging/mei/init.c
index 8bf34794489c..4ac3696883cb 100644
--- a/drivers/staging/mei/init.c
+++ b/drivers/staging/mei/init.c
@@ -38,7 +38,6 @@ void mei_io_list_init(struct mei_io_list *list)
38{ 38{
39 /* initialize our queue list */ 39 /* initialize our queue list */
40 INIT_LIST_HEAD(&list->mei_cb.cb_list); 40 INIT_LIST_HEAD(&list->mei_cb.cb_list);
41 list->status = 0;
42} 41}
43 42
44/** 43/**
@@ -49,22 +48,15 @@ void mei_io_list_init(struct mei_io_list *list)
49 */ 48 */
50void mei_io_list_flush(struct mei_io_list *list, struct mei_cl *cl) 49void mei_io_list_flush(struct mei_io_list *list, struct mei_cl *cl)
51{ 50{
52 struct mei_cl_cb *cb_pos = NULL; 51 struct mei_cl_cb *pos;
53 struct mei_cl_cb *cb_next = NULL; 52 struct mei_cl_cb *next;
54 53
55 if (list->status != 0) 54 list_for_each_entry_safe(pos, next, &list->mei_cb.cb_list, cb_list) {
56 return; 55 if (pos->file_private) {
57
58 if (list_empty(&list->mei_cb.cb_list))
59 return;
60
61 list_for_each_entry_safe(cb_pos, cb_next,
62 &list->mei_cb.cb_list, cb_list) {
63 if (cb_pos) {
64 struct mei_cl *cl_tmp; 56 struct mei_cl *cl_tmp;
65 cl_tmp = (struct mei_cl *)cb_pos->file_private; 57 cl_tmp = (struct mei_cl *)pos->file_private;
66 if (mei_cl_cmp_id(cl, cl_tmp)) 58 if (mei_cl_cmp_id(cl, cl_tmp))
67 list_del(&cb_pos->cb_list); 59 list_del(&pos->cb_list);
68 } 60 }
69 } 61 }
70} 62}
@@ -338,16 +330,10 @@ void mei_reset(struct mei_device *dev, int interrupts_enabled)
338 } 330 }
339 } 331 }
340 /* remove all waiting requests */ 332 /* remove all waiting requests */
341 if (dev->write_list.status == 0 && 333 list_for_each_entry_safe(cb_pos, cb_next,
342 !list_empty(&dev->write_list.mei_cb.cb_list)) { 334 &dev->write_list.mei_cb.cb_list, cb_list) {
343 list_for_each_entry_safe(cb_pos, cb_next, 335 list_del(&cb_pos->cb_list);
344 &dev->write_list.mei_cb.cb_list, cb_list) { 336 mei_free_cb_private(cb_pos);
345 if (cb_pos) {
346 list_del(&cb_pos->cb_list);
347 mei_free_cb_private(cb_pos);
348 cb_pos = NULL;
349 }
350 }
351 } 337 }
352} 338}
353 339
@@ -380,8 +366,7 @@ void mei_host_start_message(struct mei_device *dev)
380 host_start_req->host_version.major_version = HBM_MAJOR_VERSION; 366 host_start_req->host_version.major_version = HBM_MAJOR_VERSION;
381 host_start_req->host_version.minor_version = HBM_MINOR_VERSION; 367 host_start_req->host_version.minor_version = HBM_MINOR_VERSION;
382 dev->recvd_msg = false; 368 dev->recvd_msg = false;
383 if (!mei_write_message(dev, mei_hdr, 369 if (!mei_write_message(dev, mei_hdr, (unsigned char *)host_start_req,
384 (unsigned char *) (host_start_req),
385 mei_hdr->length)) { 370 mei_hdr->length)) {
386 dev_dbg(&dev->pdev->dev, "write send version message to FW fail.\n"); 371 dev_dbg(&dev->pdev->dev, "write send version message to FW fail.\n");
387 dev->mei_state = MEI_RESETING; 372 dev->mei_state = MEI_RESETING;
@@ -414,8 +399,7 @@ void mei_host_enum_clients_message(struct mei_device *dev)
414 host_enum_req = (struct hbm_host_enum_request *) &dev->wr_msg_buf[1]; 399 host_enum_req = (struct hbm_host_enum_request *) &dev->wr_msg_buf[1];
415 memset(host_enum_req, 0, sizeof(struct hbm_host_enum_request)); 400 memset(host_enum_req, 0, sizeof(struct hbm_host_enum_request));
416 host_enum_req->cmd.cmd = HOST_ENUM_REQ_CMD; 401 host_enum_req->cmd.cmd = HOST_ENUM_REQ_CMD;
417 if (!mei_write_message(dev, mei_hdr, 402 if (!mei_write_message(dev, mei_hdr, (unsigned char *)host_enum_req,
418 (unsigned char *) (host_enum_req),
419 mei_hdr->length)) { 403 mei_hdr->length)) {
420 dev->mei_state = MEI_RESETING; 404 dev->mei_state = MEI_RESETING;
421 dev_dbg(&dev->pdev->dev, "write send enumeration request message to FW fail.\n"); 405 dev_dbg(&dev->pdev->dev, "write send enumeration request message to FW fail.\n");
@@ -605,15 +589,10 @@ void mei_host_init_iamthif(struct mei_device *dev)
605 return; 589 return;
606 } 590 }
607 591
608 /* Do not render the system unusable when iamthif_mtu is not equal to 592 /* Assign iamthif_mtu to the value received from ME */
609 the value received from ME.
610 Assign iamthif_mtu to the value received from ME in order to solve the
611 hardware macro incompatibility. */
612 593
613 dev_dbg(&dev->pdev->dev, "[DEFAULT] IAMTHIF = %d\n", dev->iamthif_mtu);
614 dev->iamthif_mtu = dev->me_clients[i].props.max_msg_length; 594 dev->iamthif_mtu = dev->me_clients[i].props.max_msg_length;
615 dev_dbg(&dev->pdev->dev, 595 dev_dbg(&dev->pdev->dev, "IAMTHIF_MTU = %d\n",
616 "IAMTHIF = %d\n",
617 dev->me_clients[i].props.max_msg_length); 596 dev->me_clients[i].props.max_msg_length);
618 597
619 kfree(dev->iamthif_msg_buf); 598 kfree(dev->iamthif_msg_buf);
diff --git a/drivers/staging/mei/interface.c b/drivers/staging/mei/interface.c
index a65dacf00213..eb5df7fc2269 100644
--- a/drivers/staging/mei/interface.c
+++ b/drivers/staging/mei/interface.c
@@ -128,9 +128,9 @@ int mei_count_empty_write_slots(struct mei_device *dev)
128 * returns 1 if success, 0 - otherwise. 128 * returns 1 if success, 0 - otherwise.
129 */ 129 */
130int mei_write_message(struct mei_device *dev, 130int mei_write_message(struct mei_device *dev,
131 struct mei_msg_hdr *header, 131 struct mei_msg_hdr *header,
132 unsigned char *write_buffer, 132 unsigned char *write_buffer,
133 unsigned long write_length) 133 unsigned long write_length)
134{ 134{
135 u32 temp_msg = 0; 135 u32 temp_msg = 0;
136 unsigned long bytes_written = 0; 136 unsigned long bytes_written = 0;
@@ -216,7 +216,7 @@ int mei_count_full_read_slots(struct mei_device *dev)
216 * @buffer_length: message size will be read 216 * @buffer_length: message size will be read
217 */ 217 */
218void mei_read_slots(struct mei_device *dev, 218void mei_read_slots(struct mei_device *dev,
219 unsigned char *buffer, unsigned long buffer_length) 219 unsigned char *buffer, unsigned long buffer_length)
220{ 220{
221 u32 i = 0; 221 u32 i = 0;
222 unsigned char temp_buf[sizeof(u32)]; 222 unsigned char temp_buf[sizeof(u32)];
diff --git a/drivers/staging/mei/interface.h b/drivers/staging/mei/interface.h
index 7bd38ae2c233..aeae511419c7 100644
--- a/drivers/staging/mei/interface.h
+++ b/drivers/staging/mei/interface.h
@@ -52,6 +52,17 @@ int mei_wd_send(struct mei_device *dev);
52int mei_wd_stop(struct mei_device *dev, bool preserve); 52int mei_wd_stop(struct mei_device *dev, bool preserve);
53bool mei_wd_host_init(struct mei_device *dev); 53bool mei_wd_host_init(struct mei_device *dev);
54void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout); 54void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout);
55/*
56 * mei_watchdog_register - Registering watchdog interface
57 * once we got connection to the WD Client
58 * @dev - mei device
59 */
60void mei_watchdog_register(struct mei_device *dev);
61/*
62 * mei_watchdog_unregister - Uegistering watchdog interface
63 * @dev - mei device
64 */
65void mei_watchdog_unregister(struct mei_device *dev);
55 66
56int mei_flow_ctrl_reduce(struct mei_device *dev, struct mei_cl *cl); 67int mei_flow_ctrl_reduce(struct mei_device *dev, struct mei_cl *cl);
57 68
diff --git a/drivers/staging/mei/interrupt.c b/drivers/staging/mei/interrupt.c
index 882d106d54e5..3544fee34e48 100644
--- a/drivers/staging/mei/interrupt.c
+++ b/drivers/staging/mei/interrupt.c
@@ -198,8 +198,7 @@ static int mei_irq_thread_read_client_message(struct mei_io_list *complete_list,
198 unsigned char *buffer = NULL; 198 unsigned char *buffer = NULL;
199 199
200 dev_dbg(&dev->pdev->dev, "start client msg\n"); 200 dev_dbg(&dev->pdev->dev, "start client msg\n");
201 if (!(dev->read_list.status == 0 && 201 if (list_empty(&dev->read_list.mei_cb.cb_list))
202 !list_empty(&dev->read_list.mei_cb.cb_list)))
203 goto quit; 202 goto quit;
204 203
205 list_for_each_entry_safe(cb_pos, cb_next, 204 list_for_each_entry_safe(cb_pos, cb_next,
@@ -210,9 +209,6 @@ static int mei_irq_thread_read_client_message(struct mei_io_list *complete_list,
210 buffer = (unsigned char *) 209 buffer = (unsigned char *)
211 (cb_pos->response_buffer.data + 210 (cb_pos->response_buffer.data +
212 cb_pos->information); 211 cb_pos->information);
213 BUG_ON(cb_pos->response_buffer.size <
214 mei_hdr->length +
215 cb_pos->information);
216 212
217 if (cb_pos->response_buffer.size < 213 if (cb_pos->response_buffer.size <
218 mei_hdr->length + cb_pos->information) { 214 mei_hdr->length + cb_pos->information) {
@@ -390,24 +386,10 @@ static void mei_client_connect_response(struct mei_device *dev,
390 /* if WD or iamthif client treat specially */ 386 /* if WD or iamthif client treat specially */
391 387
392 if (is_treat_specially_client(&(dev->wd_cl), rs)) { 388 if (is_treat_specially_client(&(dev->wd_cl), rs)) {
393 dev_dbg(&dev->pdev->dev, "dev->wd_timeout =%d.\n",
394 dev->wd_timeout);
395
396 dev->wd_due_counter = (dev->wd_timeout) ? 1 : 0;
397
398 dev_dbg(&dev->pdev->dev, "successfully connected to WD client.\n"); 389 dev_dbg(&dev->pdev->dev, "successfully connected to WD client.\n");
390 mei_watchdog_register(dev);
399 391
400 /* Registering watchdog interface device once we got connection 392 /* next step in the state maching */
401 to the WD Client
402 */
403 if (watchdog_register_device(&amt_wd_dev)) {
404 printk(KERN_ERR "mei: unable to register watchdog device.\n");
405 dev->wd_interface_reg = false;
406 } else {
407 dev_dbg(&dev->pdev->dev, "successfully register watchdog interface.\n");
408 dev->wd_interface_reg = true;
409 }
410
411 mei_host_init_iamthif(dev); 393 mei_host_init_iamthif(dev);
412 return; 394 return;
413 } 395 }
@@ -416,22 +398,20 @@ static void mei_client_connect_response(struct mei_device *dev,
416 dev->iamthif_state = MEI_IAMTHIF_IDLE; 398 dev->iamthif_state = MEI_IAMTHIF_IDLE;
417 return; 399 return;
418 } 400 }
419 if (!dev->ctrl_rd_list.status && 401 list_for_each_entry_safe(cb_pos, cb_next,
420 !list_empty(&dev->ctrl_rd_list.mei_cb.cb_list)) { 402 &dev->ctrl_rd_list.mei_cb.cb_list, cb_list) {
421 list_for_each_entry_safe(cb_pos, cb_next, 403
422 &dev->ctrl_rd_list.mei_cb.cb_list, cb_list) { 404 cl = (struct mei_cl *)cb_pos->file_private;
423 cl = (struct mei_cl *)cb_pos->file_private; 405 if (!cl) {
424 if (!cl) { 406 list_del(&cb_pos->cb_list);
407 return;
408 }
409 if (MEI_IOCTL == cb_pos->major_file_operations) {
410 if (is_treat_specially_client(cl, rs)) {
425 list_del(&cb_pos->cb_list); 411 list_del(&cb_pos->cb_list);
426 return; 412 cl->status = 0;
427 } 413 cl->timer_count = 0;
428 if (MEI_IOCTL == cb_pos->major_file_operations) { 414 break;
429 if (is_treat_specially_client(cl, rs)) {
430 list_del(&cb_pos->cb_list);
431 cl->status = 0;
432 cl->timer_count = 0;
433 break;
434 }
435 } 415 }
436 } 416 }
437 } 417 }
@@ -458,29 +438,26 @@ static void mei_client_disconnect_response(struct mei_device *dev,
458 rs->host_addr, 438 rs->host_addr,
459 rs->status); 439 rs->status);
460 440
461 if (!dev->ctrl_rd_list.status && 441 list_for_each_entry_safe(cb_pos, cb_next,
462 !list_empty(&dev->ctrl_rd_list.mei_cb.cb_list)) { 442 &dev->ctrl_rd_list.mei_cb.cb_list, cb_list) {
463 list_for_each_entry_safe(cb_pos, cb_next, 443 cl = (struct mei_cl *)cb_pos->file_private;
464 &dev->ctrl_rd_list.mei_cb.cb_list, cb_list) {
465 cl = (struct mei_cl *)cb_pos->file_private;
466 444
467 if (!cl) { 445 if (!cl) {
468 list_del(&cb_pos->cb_list); 446 list_del(&cb_pos->cb_list);
469 return; 447 return;
470 } 448 }
471 449
472 dev_dbg(&dev->pdev->dev, "list_for_each_entry_safe in ctrl_rd_list.\n"); 450 dev_dbg(&dev->pdev->dev, "list_for_each_entry_safe in ctrl_rd_list.\n");
473 if (cl->host_client_id == rs->host_addr && 451 if (cl->host_client_id == rs->host_addr &&
474 cl->me_client_id == rs->me_addr) { 452 cl->me_client_id == rs->me_addr) {
475 453
476 list_del(&cb_pos->cb_list); 454 list_del(&cb_pos->cb_list);
477 if (!rs->status) 455 if (!rs->status)
478 cl->state = MEI_FILE_DISCONNECTED; 456 cl->state = MEI_FILE_DISCONNECTED;
479 457
480 cl->status = 0; 458 cl->status = 0;
481 cl->timer_count = 0; 459 cl->timer_count = 0;
482 break; 460 break;
483 }
484 } 461 }
485 } 462 }
486} 463}
@@ -718,7 +695,7 @@ static void mei_irq_thread_read_bus_message(struct mei_device *dev,
718 case CLIENT_DISCONNECT_RES_CMD: 695 case CLIENT_DISCONNECT_RES_CMD:
719 disconnect_res = 696 disconnect_res =
720 (struct hbm_client_connect_response *) mei_msg; 697 (struct hbm_client_connect_response *) mei_msg;
721 mei_client_disconnect_response(dev, disconnect_res); 698 mei_client_disconnect_response(dev, disconnect_res);
722 dev_dbg(&dev->pdev->dev, "client disconnect response message received.\n"); 699 dev_dbg(&dev->pdev->dev, "client disconnect response message received.\n");
723 wake_up(&dev->wait_recvd_msg); 700 wake_up(&dev->wait_recvd_msg);
724 break; 701 break;
@@ -736,7 +713,7 @@ static void mei_irq_thread_read_bus_message(struct mei_device *dev,
736 mei_reset(dev, 1); 713 mei_reset(dev, 1);
737 return; 714 return;
738 } 715 }
739 if (dev->me_clients[dev->me_client_presentation_num] 716 if (dev->me_clients[dev->me_client_presentation_num]
740 .client_id == props_res->address) { 717 .client_id == props_res->address) {
741 718
742 dev->me_clients[dev->me_client_presentation_num].props 719 dev->me_clients[dev->me_client_presentation_num].props
@@ -1228,7 +1205,7 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list,
1228{ 1205{
1229 1206
1230 struct mei_cl *cl; 1207 struct mei_cl *cl;
1231 struct mei_cl_cb *cb_pos = NULL, *cb_next = NULL; 1208 struct mei_cl_cb *pos = NULL, *next = NULL;
1232 struct mei_io_list *list; 1209 struct mei_io_list *list;
1233 int ret; 1210 int ret;
1234 1211
@@ -1241,36 +1218,31 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list,
1241 dev_dbg(&dev->pdev->dev, "complete all waiting for write cb.\n"); 1218 dev_dbg(&dev->pdev->dev, "complete all waiting for write cb.\n");
1242 1219
1243 list = &dev->write_waiting_list; 1220 list = &dev->write_waiting_list;
1244 if (!list->status && !list_empty(&list->mei_cb.cb_list)) { 1221 list_for_each_entry_safe(pos, next,
1245 list_for_each_entry_safe(cb_pos, cb_next, 1222 &list->mei_cb.cb_list, cb_list) {
1246 &list->mei_cb.cb_list, cb_list) { 1223 cl = (struct mei_cl *)pos->file_private;
1247 cl = (struct mei_cl *)cb_pos->file_private; 1224 if (cl == NULL)
1248 if (cl) { 1225 continue;
1249 cl->status = 0; 1226
1250 list_del(&cb_pos->cb_list); 1227 cl->status = 0;
1251 if (MEI_WRITING == cl->writing_state && 1228 list_del(&pos->cb_list);
1252 (cb_pos->major_file_operations == 1229 if (MEI_WRITING == cl->writing_state &&
1253 MEI_WRITE) && 1230 (pos->major_file_operations == MEI_WRITE) &&
1254 (cl != &dev->iamthif_cl)) { 1231 (cl != &dev->iamthif_cl)) {
1255 dev_dbg(&dev->pdev->dev, 1232 dev_dbg(&dev->pdev->dev,
1256 "MEI WRITE COMPLETE\n"); 1233 "MEI WRITE COMPLETE\n");
1257 cl->writing_state = 1234 cl->writing_state = MEI_WRITE_COMPLETE;
1258 MEI_WRITE_COMPLETE; 1235 list_add_tail(&pos->cb_list,
1259 list_add_tail(&cb_pos->cb_list, 1236 &cmpl_list->mei_cb.cb_list);
1260 &cmpl_list->mei_cb.cb_list); 1237 }
1261 } 1238 if (cl == &dev->iamthif_cl) {
1262 if (cl == &dev->iamthif_cl) { 1239 dev_dbg(&dev->pdev->dev, "check iamthif flow control.\n");
1263 dev_dbg(&dev->pdev->dev, "check iamthif flow control.\n"); 1240 if (dev->iamthif_flow_control_pending) {
1264 if (dev->iamthif_flow_control_pending) { 1241 ret = _mei_irq_thread_iamthif_read(
1265 ret = 1242 dev, slots);
1266 _mei_irq_thread_iamthif_read( 1243 if (ret)
1267 dev, slots); 1244 return ret;
1268 if (ret)
1269 return ret;
1270 }
1271 }
1272 } 1245 }
1273
1274 } 1246 }
1275 } 1247 }
1276 1248
@@ -1317,101 +1289,88 @@ static int mei_irq_thread_write_handler(struct mei_io_list *cmpl_list,
1317 return ~ENODEV; 1289 return ~ENODEV;
1318 1290
1319 /* complete control write list CB */ 1291 /* complete control write list CB */
1320 if (!dev->ctrl_wr_list.status) { 1292 dev_dbg(&dev->pdev->dev, "complete control write list cb.\n");
1321 /* complete control write list CB */ 1293 list_for_each_entry_safe(pos, next,
1322 dev_dbg(&dev->pdev->dev, "complete control write list cb.\n");
1323 list_for_each_entry_safe(cb_pos, cb_next,
1324 &dev->ctrl_wr_list.mei_cb.cb_list, cb_list) { 1294 &dev->ctrl_wr_list.mei_cb.cb_list, cb_list) {
1325 cl = (struct mei_cl *) 1295 cl = (struct mei_cl *) pos->file_private;
1326 cb_pos->file_private; 1296 if (!cl) {
1327 if (!cl) { 1297 list_del(&pos->cb_list);
1328 list_del(&cb_pos->cb_list); 1298 return -ENODEV;
1329 return -ENODEV; 1299 }
1330 } 1300 switch (pos->major_file_operations) {
1331 switch (cb_pos->major_file_operations) { 1301 case MEI_CLOSE:
1332 case MEI_CLOSE: 1302 /* send disconnect message */
1333 /* send disconnect message */ 1303 ret = _mei_irq_thread_close(dev, slots, pos, cl, cmpl_list);
1334 ret = _mei_irq_thread_close(dev, slots, 1304 if (ret)
1335 cb_pos, cl, cmpl_list); 1305 return ret;
1336 if (ret)
1337 return ret;
1338
1339 break;
1340 case MEI_READ:
1341 /* send flow control message */
1342 ret = _mei_irq_thread_read(dev, slots,
1343 cb_pos, cl, cmpl_list);
1344 if (ret)
1345 return ret;
1346 1306
1347 break; 1307 break;
1348 case MEI_IOCTL: 1308 case MEI_READ:
1349 /* connect message */ 1309 /* send flow control message */
1350 if (!mei_other_client_is_connecting(dev, 1310 ret = _mei_irq_thread_read(dev, slots, pos, cl, cmpl_list);
1351 cl)) 1311 if (ret)
1352 continue; 1312 return ret;
1353 ret = _mei_irq_thread_ioctl(dev, slots,
1354 cb_pos, cl, cmpl_list);
1355 if (ret)
1356 return ret;
1357 1313
1358 break; 1314 break;
1315 case MEI_IOCTL:
1316 /* connect message */
1317 if (mei_other_client_is_connecting(dev, cl))
1318 continue;
1319 ret = _mei_irq_thread_ioctl(dev, slots, pos, cl, cmpl_list);
1320 if (ret)
1321 return ret;
1359 1322
1360 default: 1323 break;
1361 BUG();
1362 }
1363 1324
1325 default:
1326 BUG();
1364 } 1327 }
1328
1365 } 1329 }
1366 /* complete write list CB */ 1330 /* complete write list CB */
1367 if (!dev->write_list.status && 1331 dev_dbg(&dev->pdev->dev, "complete write list cb.\n");
1368 !list_empty(&dev->write_list.mei_cb.cb_list)) { 1332 list_for_each_entry_safe(pos, next,
1369 dev_dbg(&dev->pdev->dev, "complete write list cb.\n"); 1333 &dev->write_list.mei_cb.cb_list, cb_list) {
1370 list_for_each_entry_safe(cb_pos, cb_next, 1334 cl = (struct mei_cl *)pos->file_private;
1371 &dev->write_list.mei_cb.cb_list, cb_list) { 1335 if (cl == NULL)
1372 cl = (struct mei_cl *)cb_pos->file_private; 1336 continue;
1373 1337
1374 if (cl) { 1338 if (cl != &dev->iamthif_cl) {
1375 if (cl != &dev->iamthif_cl) { 1339 if (!mei_flow_ctrl_creds(dev, cl)) {
1376 if (!mei_flow_ctrl_creds(dev, 1340 dev_dbg(&dev->pdev->dev,
1377 cl)) { 1341 "No flow control"
1378 dev_dbg(&dev->pdev->dev, 1342 " credentials for client"
1379 "No flow control" 1343 " %d, not sending.\n",
1380 " credentials for client" 1344 cl->host_client_id);
1381 " %d, not sending.\n", 1345 continue;
1382 cl->host_client_id); 1346 }
1383 continue; 1347 ret = _mei_irq_thread_cmpl(dev, slots,
1384 } 1348 pos,
1385 ret = _mei_irq_thread_cmpl(dev, slots, 1349 cl, cmpl_list);
1386 cb_pos, 1350 if (ret)
1387 cl, cmpl_list); 1351 return ret;
1388 if (ret) 1352
1389 return ret; 1353 } else if (cl == &dev->iamthif_cl) {
1390 1354 /* IAMTHIF IOCTL */
1391 } else if (cl == &dev->iamthif_cl) { 1355 dev_dbg(&dev->pdev->dev, "complete amthi write cb.\n");
1392 /* IAMTHIF IOCTL */ 1356 if (!mei_flow_ctrl_creds(dev, cl)) {
1393 dev_dbg(&dev->pdev->dev, "complete amthi write cb.\n"); 1357 dev_dbg(&dev->pdev->dev,
1394 if (!mei_flow_ctrl_creds(dev, 1358 "No flow control"
1395 cl)) { 1359 " credentials for amthi"
1396 dev_dbg(&dev->pdev->dev, 1360 " client %d.\n",
1397 "No flow control" 1361 cl->host_client_id);
1398 " credentials for amthi" 1362 continue;
1399 " client %d.\n",
1400 cl->host_client_id);
1401 continue;
1402 }
1403 ret = _mei_irq_thread_cmpl_iamthif(dev,
1404 slots,
1405 cb_pos,
1406 cl,
1407 cmpl_list);
1408 if (ret)
1409 return ret;
1410
1411 }
1412 } 1363 }
1364 ret = _mei_irq_thread_cmpl_iamthif(dev,
1365 slots,
1366 pos,
1367 cl,
1368 cmpl_list);
1369 if (ret)
1370 return ret;
1413 1371
1414 } 1372 }
1373
1415 } 1374 }
1416 return 0; 1375 return 0;
1417} 1376}
@@ -1502,18 +1461,13 @@ void mei_timer(struct work_struct *work)
1502 amthi_complete_list = &dev->amthi_read_complete_list. 1461 amthi_complete_list = &dev->amthi_read_complete_list.
1503 mei_cb.cb_list; 1462 mei_cb.cb_list;
1504 1463
1505 if (!list_empty(amthi_complete_list)) { 1464 list_for_each_entry_safe(cb_pos, cb_next, amthi_complete_list, cb_list) {
1506
1507 list_for_each_entry_safe(cb_pos, cb_next,
1508 amthi_complete_list,
1509 cb_list) {
1510 1465
1511 cl_pos = cb_pos->file_object->private_data; 1466 cl_pos = cb_pos->file_object->private_data;
1512 1467
1513 /* Finding the AMTHI entry. */ 1468 /* Finding the AMTHI entry. */
1514 if (cl_pos == &dev->iamthif_cl) 1469 if (cl_pos == &dev->iamthif_cl)
1515 list_del(&cb_pos->cb_list); 1470 list_del(&cb_pos->cb_list);
1516 }
1517 } 1471 }
1518 if (dev->iamthif_current_cb) 1472 if (dev->iamthif_current_cb)
1519 mei_free_cb_private(dev->iamthif_current_cb); 1473 mei_free_cb_private(dev->iamthif_current_cb);
@@ -1527,8 +1481,8 @@ void mei_timer(struct work_struct *work)
1527 } 1481 }
1528 } 1482 }
1529out: 1483out:
1530 schedule_delayed_work(&dev->timer_work, 2 * HZ); 1484 schedule_delayed_work(&dev->timer_work, 2 * HZ);
1531 mutex_unlock(&dev->device_lock); 1485 mutex_unlock(&dev->device_lock);
1532} 1486}
1533 1487
1534/** 1488/**
@@ -1624,7 +1578,7 @@ end:
1624 wake_up_interruptible(&dev->wait_recvd_msg); 1578 wake_up_interruptible(&dev->wait_recvd_msg);
1625 bus_message_received = false; 1579 bus_message_received = false;
1626 } 1580 }
1627 if (complete_list.status || list_empty(&complete_list.mei_cb.cb_list)) 1581 if (list_empty(&complete_list.mei_cb.cb_list))
1628 return IRQ_HANDLED; 1582 return IRQ_HANDLED;
1629 1583
1630 1584
diff --git a/drivers/staging/mei/iorw.c b/drivers/staging/mei/iorw.c
index 8a61d1266515..0752ead4269a 100644
--- a/drivers/staging/mei/iorw.c
+++ b/drivers/staging/mei/iorw.c
@@ -228,18 +228,15 @@ struct mei_cl_cb *find_amthi_read_list_entry(
228 struct file *file) 228 struct file *file)
229{ 229{
230 struct mei_cl *cl_temp; 230 struct mei_cl *cl_temp;
231 struct mei_cl_cb *cb_pos = NULL; 231 struct mei_cl_cb *pos = NULL;
232 struct mei_cl_cb *cb_next = NULL; 232 struct mei_cl_cb *next = NULL;
233 233
234 if (!dev->amthi_read_complete_list.status && 234 list_for_each_entry_safe(pos, next,
235 !list_empty(&dev->amthi_read_complete_list.mei_cb.cb_list)) { 235 &dev->amthi_read_complete_list.mei_cb.cb_list, cb_list) {
236 list_for_each_entry_safe(cb_pos, cb_next, 236 cl_temp = (struct mei_cl *)pos->file_private;
237 &dev->amthi_read_complete_list.mei_cb.cb_list, cb_list) { 237 if (cl_temp && cl_temp == &dev->iamthif_cl &&
238 cl_temp = (struct mei_cl *)cb_pos->file_private; 238 pos->file_object == file)
239 if (cl_temp && cl_temp == &dev->iamthif_cl && 239 return pos;
240 cb_pos->file_object == file)
241 return cb_pos;
242 }
243 } 240 }
244 return NULL; 241 return NULL;
245} 242}
@@ -262,7 +259,7 @@ struct mei_cl_cb *find_amthi_read_list_entry(
262 * negative on failure. 259 * negative on failure.
263 */ 260 */
264int amthi_read(struct mei_device *dev, struct file *file, 261int amthi_read(struct mei_device *dev, struct file *file,
265 char __user *ubuf, size_t length, loff_t *offset) 262 char __user *ubuf, size_t length, loff_t *offset)
266{ 263{
267 int rets; 264 int rets;
268 int wait_ret; 265 int wait_ret;
@@ -334,8 +331,7 @@ int amthi_read(struct mei_device *dev, struct file *file,
334 } 331 }
335 } 332 }
336 /* if the whole message will fit remove it from the list */ 333 /* if the whole message will fit remove it from the list */
337 if (cb->information >= *offset && 334 if (cb->information >= *offset && length >= (cb->information - *offset))
338 length >= (cb->information - *offset))
339 list_del(&cb->cb_list); 335 list_del(&cb->cb_list);
340 else if (cb->information > 0 && cb->information <= *offset) { 336 else if (cb->information > 0 && cb->information <= *offset) {
341 /* end of the message has been reached */ 337 /* end of the message has been reached */
@@ -356,9 +352,7 @@ int amthi_read(struct mei_device *dev, struct file *file,
356 * the information may be longer */ 352 * the information may be longer */
357 length = min_t(size_t, length, (cb->information - *offset)); 353 length = min_t(size_t, length, (cb->information - *offset));
358 354
359 if (copy_to_user(ubuf, 355 if (copy_to_user(ubuf, cb->response_buffer.data + *offset, length))
360 cb->response_buffer.data + *offset,
361 length))
362 rets = -EFAULT; 356 rets = -EFAULT;
363 else { 357 else {
364 rets = length; 358 rets = length;
@@ -427,7 +421,7 @@ int mei_start_read(struct mei_device *dev, struct mei_cl *cl)
427 421
428 cb->response_buffer.size = dev->me_clients[i].props.max_msg_length; 422 cb->response_buffer.size = dev->me_clients[i].props.max_msg_length;
429 cb->response_buffer.data = 423 cb->response_buffer.data =
430 kmalloc(cb->response_buffer.size, GFP_KERNEL); 424 kmalloc(cb->response_buffer.size, GFP_KERNEL);
431 if (!cb->response_buffer.data) { 425 if (!cb->response_buffer.data) {
432 rets = -ENOMEM; 426 rets = -ENOMEM;
433 goto unlock; 427 goto unlock;
@@ -448,8 +442,7 @@ int mei_start_read(struct mei_device *dev, struct mei_cl *cl)
448 &dev->read_list.mei_cb.cb_list); 442 &dev->read_list.mei_cb.cb_list);
449 } 443 }
450 } else { 444 } else {
451 list_add_tail(&cb->cb_list, 445 list_add_tail(&cb->cb_list, &dev->ctrl_wr_list.mei_cb.cb_list);
452 &dev->ctrl_wr_list.mei_cb.cb_list);
453 } 446 }
454 return rets; 447 return rets;
455unlock: 448unlock:
@@ -482,7 +475,7 @@ int amthi_write(struct mei_device *dev, struct mei_cl_cb *cb)
482 dev->iamthif_ioctl = true; 475 dev->iamthif_ioctl = true;
483 dev->iamthif_msg_buf_size = cb->request_buffer.size; 476 dev->iamthif_msg_buf_size = cb->request_buffer.size;
484 memcpy(dev->iamthif_msg_buf, cb->request_buffer.data, 477 memcpy(dev->iamthif_msg_buf, cb->request_buffer.data,
485 cb->request_buffer.size); 478 cb->request_buffer.size);
486 479
487 ret = mei_flow_ctrl_creds(dev, &dev->iamthif_cl); 480 ret = mei_flow_ctrl_creds(dev, &dev->iamthif_cl);
488 if (ret < 0) 481 if (ret < 0)
@@ -534,8 +527,7 @@ int amthi_write(struct mei_device *dev, struct mei_cl_cb *cb)
534 527
535 dev_dbg(&dev->pdev->dev, "No flow control credentials, " 528 dev_dbg(&dev->pdev->dev, "No flow control credentials, "
536 "so add iamthif cb to write list.\n"); 529 "so add iamthif cb to write list.\n");
537 list_add_tail(&cb->cb_list, 530 list_add_tail(&cb->cb_list, &dev->write_list.mei_cb.cb_list);
538 &dev->write_list.mei_cb.cb_list);
539 } 531 }
540 return 0; 532 return 0;
541} 533}
@@ -550,8 +542,8 @@ int amthi_write(struct mei_device *dev, struct mei_cl_cb *cb)
550void mei_run_next_iamthif_cmd(struct mei_device *dev) 542void mei_run_next_iamthif_cmd(struct mei_device *dev)
551{ 543{
552 struct mei_cl *cl_tmp; 544 struct mei_cl *cl_tmp;
553 struct mei_cl_cb *cb_pos = NULL; 545 struct mei_cl_cb *pos = NULL;
554 struct mei_cl_cb *cb_next = NULL; 546 struct mei_cl_cb *next = NULL;
555 int status; 547 int status;
556 548
557 if (!dev) 549 if (!dev)
@@ -565,25 +557,22 @@ void mei_run_next_iamthif_cmd(struct mei_device *dev)
565 dev->iamthif_timer = 0; 557 dev->iamthif_timer = 0;
566 dev->iamthif_file_object = NULL; 558 dev->iamthif_file_object = NULL;
567 559
568 if (dev->amthi_cmd_list.status == 0 && 560 dev_dbg(&dev->pdev->dev, "complete amthi cmd_list cb.\n");
569 !list_empty(&dev->amthi_cmd_list.mei_cb.cb_list)) { 561
570 dev_dbg(&dev->pdev->dev, "complete amthi cmd_list cb.\n"); 562 list_for_each_entry_safe(pos, next,
571 563 &dev->amthi_cmd_list.mei_cb.cb_list, cb_list) {
572 list_for_each_entry_safe(cb_pos, cb_next, 564 list_del(&pos->cb_list);
573 &dev->amthi_cmd_list.mei_cb.cb_list, cb_list) { 565 cl_tmp = (struct mei_cl *)pos->file_private;
574 list_del(&cb_pos->cb_list); 566
575 cl_tmp = (struct mei_cl *)cb_pos->file_private; 567 if (cl_tmp && cl_tmp == &dev->iamthif_cl) {
576 568 status = amthi_write(dev, pos);
577 if (cl_tmp && cl_tmp == &dev->iamthif_cl) { 569 if (status) {
578 status = amthi_write(dev, cb_pos); 570 dev_dbg(&dev->pdev->dev,
579 if (status) { 571 "amthi write failed status = %d\n",
580 dev_dbg(&dev->pdev->dev, 572 status);
581 "amthi write failed status = %d\n", 573 return;
582 status);
583 return;
584 }
585 break;
586 } 574 }
575 break;
587 } 576 }
588 } 577 }
589} 578}
diff --git a/drivers/staging/mei/main.c b/drivers/staging/mei/main.c
index eb05c36f45d4..1e1a9f996e7c 100644
--- a/drivers/staging/mei/main.c
+++ b/drivers/staging/mei/main.c
@@ -33,6 +33,7 @@
33#include <linux/compat.h> 33#include <linux/compat.h>
34#include <linux/jiffies.h> 34#include <linux/jiffies.h>
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36#include <linux/miscdevice.h>
36 37
37#include "mei_dev.h" 38#include "mei_dev.h"
38#include "mei.h" 39#include "mei.h"
@@ -51,18 +52,10 @@ static char mei_driver_name[] = MEI_DRIVER_NAME;
51static const char mei_driver_string[] = "Intel(R) Management Engine Interface"; 52static const char mei_driver_string[] = "Intel(R) Management Engine Interface";
52static const char mei_driver_version[] = MEI_DRIVER_VERSION; 53static const char mei_driver_version[] = MEI_DRIVER_VERSION;
53 54
54/* mei char device for registration */
55static struct cdev mei_cdev;
56
57/* major number for device */
58static int mei_major;
59/* The device pointer */ 55/* The device pointer */
60/* Currently this driver works as long as there is only a single AMT device. */ 56/* Currently this driver works as long as there is only a single AMT device. */
61struct pci_dev *mei_device; 57struct pci_dev *mei_device;
62 58
63static struct class *mei_class;
64
65
66/* mei_pci_tbl - PCI Device ID Table */ 59/* mei_pci_tbl - PCI Device ID Table */
67static DEFINE_PCI_DEVICE_TABLE(mei_pci_tbl) = { 60static DEFINE_PCI_DEVICE_TABLE(mei_pci_tbl) = {
68 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)}, 61 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
@@ -105,173 +98,6 @@ MODULE_DEVICE_TABLE(pci, mei_pci_tbl);
105 98
106static DEFINE_MUTEX(mei_mutex); 99static DEFINE_MUTEX(mei_mutex);
107 100
108/**
109 * mei_probe - Device Initialization Routine
110 *
111 * @pdev: PCI device structure
112 * @ent: entry in kcs_pci_tbl
113 *
114 * returns 0 on success, <0 on failure.
115 */
116static int __devinit mei_probe(struct pci_dev *pdev,
117 const struct pci_device_id *ent)
118{
119 struct mei_device *dev;
120 int err;
121
122 mutex_lock(&mei_mutex);
123 if (mei_device) {
124 err = -EEXIST;
125 goto end;
126 }
127 /* enable pci dev */
128 err = pci_enable_device(pdev);
129 if (err) {
130 printk(KERN_ERR "mei: Failed to enable pci device.\n");
131 goto end;
132 }
133 /* set PCI host mastering */
134 pci_set_master(pdev);
135 /* pci request regions for mei driver */
136 err = pci_request_regions(pdev, mei_driver_name);
137 if (err) {
138 printk(KERN_ERR "mei: Failed to get pci regions.\n");
139 goto disable_device;
140 }
141 /* allocates and initializes the mei dev structure */
142 dev = mei_device_init(pdev);
143 if (!dev) {
144 err = -ENOMEM;
145 goto release_regions;
146 }
147 /* mapping IO device memory */
148 dev->mem_addr = pci_iomap(pdev, 0, 0);
149 if (!dev->mem_addr) {
150 printk(KERN_ERR "mei: mapping I/O device memory failure.\n");
151 err = -ENOMEM;
152 goto free_device;
153 }
154 pci_enable_msi(pdev);
155
156 /* request and enable interrupt */
157 if (pci_dev_msi_enabled(pdev))
158 err = request_threaded_irq(pdev->irq,
159 NULL,
160 mei_interrupt_thread_handler,
161 0, mei_driver_name, dev);
162 else
163 err = request_threaded_irq(pdev->irq,
164 mei_interrupt_quick_handler,
165 mei_interrupt_thread_handler,
166 IRQF_SHARED, mei_driver_name, dev);
167
168 if (err) {
169 printk(KERN_ERR "mei: request_threaded_irq failure. irq = %d\n",
170 pdev->irq);
171 goto unmap_memory;
172 }
173 INIT_DELAYED_WORK(&dev->timer_work, mei_timer);
174 if (mei_hw_init(dev)) {
175 printk(KERN_ERR "mei: Init hw failure.\n");
176 err = -ENODEV;
177 goto release_irq;
178 }
179 mei_device = pdev;
180 pci_set_drvdata(pdev, dev);
181 schedule_delayed_work(&dev->timer_work, HZ);
182
183 mutex_unlock(&mei_mutex);
184
185 pr_debug("mei: Driver initialization successful.\n");
186
187 return 0;
188
189release_irq:
190 /* disable interrupts */
191 dev->host_hw_state = mei_hcsr_read(dev);
192 mei_disable_interrupts(dev);
193 flush_scheduled_work();
194 free_irq(pdev->irq, dev);
195 pci_disable_msi(pdev);
196unmap_memory:
197 pci_iounmap(pdev, dev->mem_addr);
198free_device:
199 kfree(dev);
200release_regions:
201 pci_release_regions(pdev);
202disable_device:
203 pci_disable_device(pdev);
204end:
205 mutex_unlock(&mei_mutex);
206 printk(KERN_ERR "mei: Driver initialization failed.\n");
207 return err;
208}
209
210/**
211 * mei_remove - Device Removal Routine
212 *
213 * @pdev: PCI device structure
214 *
215 * mei_remove is called by the PCI subsystem to alert the driver
216 * that it should release a PCI device.
217 */
218static void __devexit mei_remove(struct pci_dev *pdev)
219{
220 struct mei_device *dev;
221
222 if (mei_device != pdev)
223 return;
224
225 dev = pci_get_drvdata(pdev);
226 if (!dev)
227 return;
228
229 mutex_lock(&dev->device_lock);
230
231 mei_wd_stop(dev, false);
232
233 mei_device = NULL;
234
235 if (dev->iamthif_cl.state == MEI_FILE_CONNECTED) {
236 dev->iamthif_cl.state = MEI_FILE_DISCONNECTING;
237 mei_disconnect_host_client(dev, &dev->iamthif_cl);
238 }
239 if (dev->wd_cl.state == MEI_FILE_CONNECTED) {
240 dev->wd_cl.state = MEI_FILE_DISCONNECTING;
241 mei_disconnect_host_client(dev, &dev->wd_cl);
242 }
243
244 /* Unregistering watchdog device */
245 if (dev->wd_interface_reg)
246 watchdog_unregister_device(&amt_wd_dev);
247
248 /* remove entry if already in list */
249 dev_dbg(&pdev->dev, "list del iamthif and wd file list.\n");
250 mei_remove_client_from_file_list(dev, dev->wd_cl.host_client_id);
251 mei_remove_client_from_file_list(dev, dev->iamthif_cl.host_client_id);
252
253 dev->iamthif_current_cb = NULL;
254 dev->me_clients_num = 0;
255
256 mutex_unlock(&dev->device_lock);
257
258 flush_scheduled_work();
259
260 /* disable interrupts */
261 mei_disable_interrupts(dev);
262
263 free_irq(pdev->irq, dev);
264 pci_disable_msi(pdev);
265 pci_set_drvdata(pdev, NULL);
266
267 if (dev->mem_addr)
268 pci_iounmap(pdev, dev->mem_addr);
269
270 kfree(dev);
271
272 pci_release_regions(pdev);
273 pci_disable_device(pdev);
274}
275 101
276/** 102/**
277 * mei_clear_list - removes all callbacks associated with file 103 * mei_clear_list - removes all callbacks associated with file
@@ -372,21 +198,17 @@ static struct mei_cl_cb *find_read_list_entry(
372 struct mei_device *dev, 198 struct mei_device *dev,
373 struct mei_cl *cl) 199 struct mei_cl *cl)
374{ 200{
375 struct mei_cl_cb *cb_pos = NULL; 201 struct mei_cl_cb *pos = NULL;
376 struct mei_cl_cb *cb_next = NULL; 202 struct mei_cl_cb *next = NULL;
377
378 if (!dev->read_list.status &&
379 !list_empty(&dev->read_list.mei_cb.cb_list)) {
380 203
381 dev_dbg(&dev->pdev->dev, "remove read_list CB\n"); 204 dev_dbg(&dev->pdev->dev, "remove read_list CB\n");
382 list_for_each_entry_safe(cb_pos, cb_next, 205 list_for_each_entry_safe(pos, next,
383 &dev->read_list.mei_cb.cb_list, cb_list) { 206 &dev->read_list.mei_cb.cb_list, cb_list) {
384 struct mei_cl *cl_temp; 207 struct mei_cl *cl_temp;
385 cl_temp = (struct mei_cl *)cb_pos->file_private; 208 cl_temp = (struct mei_cl *)pos->file_private;
386 209
387 if (mei_cl_cmp_id(cl, cl_temp)) 210 if (mei_cl_cmp_id(cl, cl_temp))
388 return cb_pos; 211 return pos;
389 }
390 } 212 }
391 return NULL; 213 return NULL;
392} 214}
@@ -402,15 +224,16 @@ static struct mei_cl_cb *find_read_list_entry(
402static int mei_open(struct inode *inode, struct file *file) 224static int mei_open(struct inode *inode, struct file *file)
403{ 225{
404 struct mei_cl *cl; 226 struct mei_cl *cl;
405 int if_num = iminor(inode), err;
406 struct mei_device *dev; 227 struct mei_device *dev;
228 unsigned long cl_id;
229 int err;
407 230
408 err = -ENODEV; 231 err = -ENODEV;
409 if (!mei_device) 232 if (!mei_device)
410 goto out; 233 goto out;
411 234
412 dev = pci_get_drvdata(mei_device); 235 dev = pci_get_drvdata(mei_device);
413 if (if_num != MEI_MINOR_NUMBER || !dev) 236 if (!dev)
414 goto out; 237 goto out;
415 238
416 mutex_lock(&dev->device_lock); 239 mutex_lock(&dev->device_lock);
@@ -429,14 +252,16 @@ static int mei_open(struct inode *inode, struct file *file)
429 if (dev->open_handle_count >= MEI_MAX_OPEN_HANDLE_COUNT) 252 if (dev->open_handle_count >= MEI_MAX_OPEN_HANDLE_COUNT)
430 goto out_unlock; 253 goto out_unlock;
431 254
432 cl->host_client_id = find_first_zero_bit(dev->host_clients_map, 255 cl_id = find_first_zero_bit(dev->host_clients_map, MEI_CLIENTS_MAX);
433 MEI_CLIENTS_MAX); 256 if (cl_id >= MEI_CLIENTS_MAX)
434 if (cl->host_client_id > MEI_CLIENTS_MAX)
435 goto out_unlock; 257 goto out_unlock;
436 258
259 cl->host_client_id = cl_id;
260
437 dev_dbg(&dev->pdev->dev, "client_id = %d\n", cl->host_client_id); 261 dev_dbg(&dev->pdev->dev, "client_id = %d\n", cl->host_client_id);
438 262
439 dev->open_handle_count++; 263 dev->open_handle_count++;
264
440 list_add_tail(&cl->link, &dev->file_list); 265 list_add_tail(&cl->link, &dev->file_list);
441 266
442 set_bit(cl->host_client_id, dev->host_clients_map); 267 set_bit(cl->host_client_id, dev->host_clients_map);
@@ -446,7 +271,7 @@ static int mei_open(struct inode *inode, struct file *file)
446 file->private_data = cl; 271 file->private_data = cl;
447 mutex_unlock(&dev->device_lock); 272 mutex_unlock(&dev->device_lock);
448 273
449 return 0; 274 return nonseekable_open(inode, file);
450 275
451out_unlock: 276out_unlock:
452 mutex_unlock(&dev->device_lock); 277 mutex_unlock(&dev->device_lock);
@@ -492,8 +317,7 @@ static int mei_release(struct inode *inode, struct file *file)
492 cl->me_client_id); 317 cl->me_client_id);
493 318
494 if (dev->open_handle_count > 0) { 319 if (dev->open_handle_count > 0) {
495 clear_bit(cl->host_client_id, 320 clear_bit(cl->host_client_id, dev->host_clients_map);
496 dev->host_clients_map);
497 dev->open_handle_count--; 321 dev->open_handle_count--;
498 } 322 }
499 mei_remove_client_from_file_list(dev, cl->host_client_id); 323 mei_remove_client_from_file_list(dev, cl->host_client_id);
@@ -554,7 +378,7 @@ static int mei_release(struct inode *inode, struct file *file)
554 * returns >=0 data length on success , <0 on error 378 * returns >=0 data length on success , <0 on error
555 */ 379 */
556static ssize_t mei_read(struct file *file, char __user *ubuf, 380static ssize_t mei_read(struct file *file, char __user *ubuf,
557 size_t length, loff_t *offset) 381 size_t length, loff_t *offset)
558{ 382{
559 struct mei_cl *cl = file->private_data; 383 struct mei_cl *cl = file->private_data;
560 struct mei_cl_cb *cb_pos = NULL; 384 struct mei_cl_cb *cb_pos = NULL;
@@ -673,9 +497,7 @@ copy_buffer:
673 /* information size may be longer */ 497 /* information size may be longer */
674 length = min_t(size_t, length, (cb->information - *offset)); 498 length = min_t(size_t, length, (cb->information - *offset));
675 499
676 if (copy_to_user(ubuf, 500 if (copy_to_user(ubuf, cb->response_buffer.data + *offset, length)) {
677 cb->response_buffer.data + *offset,
678 length)) {
679 rets = -EFAULT; 501 rets = -EFAULT;
680 goto free; 502 goto free;
681 } 503 }
@@ -711,7 +533,7 @@ out:
711 * returns >=0 data length on success , <0 on error 533 * returns >=0 data length on success , <0 on error
712 */ 534 */
713static ssize_t mei_write(struct file *file, const char __user *ubuf, 535static ssize_t mei_write(struct file *file, const char __user *ubuf,
714 size_t length, loff_t *offset) 536 size_t length, loff_t *offset)
715{ 537{
716 struct mei_cl *cl = file->private_data; 538 struct mei_cl *cl = file->private_data;
717 struct mei_cl_cb *write_cb = NULL; 539 struct mei_cl_cb *write_cb = NULL;
@@ -762,8 +584,7 @@ static ssize_t mei_write(struct file *file, const char __user *ubuf,
762 cl->read_cb = NULL; 584 cl->read_cb = NULL;
763 cl->read_pending = 0; 585 cl->read_pending = 0;
764 } 586 }
765 } else if (cl->reading_state == MEI_IDLE && 587 } else if (cl->reading_state == MEI_IDLE && !cl->read_pending)
766 !cl->read_pending)
767 *offset = 0; 588 *offset = 0;
768 589
769 590
@@ -1034,7 +855,7 @@ out:
1034 */ 855 */
1035#ifdef CONFIG_COMPAT 856#ifdef CONFIG_COMPAT
1036static long mei_compat_ioctl(struct file *file, 857static long mei_compat_ioctl(struct file *file,
1037 unsigned int cmd, unsigned long data) 858 unsigned int cmd, unsigned long data)
1038{ 859{
1039 return mei_ioctl(file, cmd, (unsigned long)compat_ptr(data)); 860 return mei_ioctl(file, cmd, (unsigned long)compat_ptr(data));
1040} 861}
@@ -1090,6 +911,206 @@ out:
1090 return mask; 911 return mask;
1091} 912}
1092 913
914/*
915 * file operations structure will be used for mei char device.
916 */
917static const struct file_operations mei_fops = {
918 .owner = THIS_MODULE,
919 .read = mei_read,
920 .unlocked_ioctl = mei_ioctl,
921#ifdef CONFIG_COMPAT
922 .compat_ioctl = mei_compat_ioctl,
923#endif
924 .open = mei_open,
925 .release = mei_release,
926 .write = mei_write,
927 .poll = mei_poll,
928 .llseek = no_llseek
929};
930
931
932/*
933 * Misc Device Struct
934 */
935static struct miscdevice mei_misc_device = {
936 .name = MEI_DRIVER_NAME,
937 .fops = &mei_fops,
938 .minor = MISC_DYNAMIC_MINOR,
939};
940
941/**
942 * mei_probe - Device Initialization Routine
943 *
944 * @pdev: PCI device structure
945 * @ent: entry in kcs_pci_tbl
946 *
947 * returns 0 on success, <0 on failure.
948 */
949static int __devinit mei_probe(struct pci_dev *pdev,
950 const struct pci_device_id *ent)
951{
952 struct mei_device *dev;
953 int err;
954
955 mutex_lock(&mei_mutex);
956 if (mei_device) {
957 err = -EEXIST;
958 goto end;
959 }
960 /* enable pci dev */
961 err = pci_enable_device(pdev);
962 if (err) {
963 printk(KERN_ERR "mei: Failed to enable pci device.\n");
964 goto end;
965 }
966 /* set PCI host mastering */
967 pci_set_master(pdev);
968 /* pci request regions for mei driver */
969 err = pci_request_regions(pdev, mei_driver_name);
970 if (err) {
971 printk(KERN_ERR "mei: Failed to get pci regions.\n");
972 goto disable_device;
973 }
974 /* allocates and initializes the mei dev structure */
975 dev = mei_device_init(pdev);
976 if (!dev) {
977 err = -ENOMEM;
978 goto release_regions;
979 }
980 /* mapping IO device memory */
981 dev->mem_addr = pci_iomap(pdev, 0, 0);
982 if (!dev->mem_addr) {
983 printk(KERN_ERR "mei: mapping I/O device memory failure.\n");
984 err = -ENOMEM;
985 goto free_device;
986 }
987 pci_enable_msi(pdev);
988
989 /* request and enable interrupt */
990 if (pci_dev_msi_enabled(pdev))
991 err = request_threaded_irq(pdev->irq,
992 NULL,
993 mei_interrupt_thread_handler,
994 0, mei_driver_name, dev);
995 else
996 err = request_threaded_irq(pdev->irq,
997 mei_interrupt_quick_handler,
998 mei_interrupt_thread_handler,
999 IRQF_SHARED, mei_driver_name, dev);
1000
1001 if (err) {
1002 printk(KERN_ERR "mei: request_threaded_irq failure. irq = %d\n",
1003 pdev->irq);
1004 goto unmap_memory;
1005 }
1006 INIT_DELAYED_WORK(&dev->timer_work, mei_timer);
1007 if (mei_hw_init(dev)) {
1008 printk(KERN_ERR "mei: Init hw failure.\n");
1009 err = -ENODEV;
1010 goto release_irq;
1011 }
1012
1013 err = misc_register(&mei_misc_device);
1014 if (err)
1015 goto release_irq;
1016
1017 mei_device = pdev;
1018 pci_set_drvdata(pdev, dev);
1019
1020
1021 schedule_delayed_work(&dev->timer_work, HZ);
1022
1023 mutex_unlock(&mei_mutex);
1024
1025 pr_debug("mei: Driver initialization successful.\n");
1026
1027 return 0;
1028
1029release_irq:
1030 /* disable interrupts */
1031 dev->host_hw_state = mei_hcsr_read(dev);
1032 mei_disable_interrupts(dev);
1033 flush_scheduled_work();
1034 free_irq(pdev->irq, dev);
1035 pci_disable_msi(pdev);
1036unmap_memory:
1037 pci_iounmap(pdev, dev->mem_addr);
1038free_device:
1039 kfree(dev);
1040release_regions:
1041 pci_release_regions(pdev);
1042disable_device:
1043 pci_disable_device(pdev);
1044end:
1045 mutex_unlock(&mei_mutex);
1046 printk(KERN_ERR "mei: Driver initialization failed.\n");
1047 return err;
1048}
1049
1050/**
1051 * mei_remove - Device Removal Routine
1052 *
1053 * @pdev: PCI device structure
1054 *
1055 * mei_remove is called by the PCI subsystem to alert the driver
1056 * that it should release a PCI device.
1057 */
1058static void __devexit mei_remove(struct pci_dev *pdev)
1059{
1060 struct mei_device *dev;
1061
1062 if (mei_device != pdev)
1063 return;
1064
1065 dev = pci_get_drvdata(pdev);
1066 if (!dev)
1067 return;
1068
1069 mutex_lock(&dev->device_lock);
1070
1071 mei_wd_stop(dev, false);
1072
1073 mei_device = NULL;
1074
1075 if (dev->iamthif_cl.state == MEI_FILE_CONNECTED) {
1076 dev->iamthif_cl.state = MEI_FILE_DISCONNECTING;
1077 mei_disconnect_host_client(dev, &dev->iamthif_cl);
1078 }
1079 if (dev->wd_cl.state == MEI_FILE_CONNECTED) {
1080 dev->wd_cl.state = MEI_FILE_DISCONNECTING;
1081 mei_disconnect_host_client(dev, &dev->wd_cl);
1082 }
1083
1084 /* Unregistering watchdog device */
1085 mei_watchdog_unregister(dev);
1086
1087 /* remove entry if already in list */
1088 dev_dbg(&pdev->dev, "list del iamthif and wd file list.\n");
1089 mei_remove_client_from_file_list(dev, dev->wd_cl.host_client_id);
1090 mei_remove_client_from_file_list(dev, dev->iamthif_cl.host_client_id);
1091
1092 dev->iamthif_current_cb = NULL;
1093 dev->me_clients_num = 0;
1094
1095 mutex_unlock(&dev->device_lock);
1096
1097 flush_scheduled_work();
1098
1099 /* disable interrupts */
1100 mei_disable_interrupts(dev);
1101
1102 free_irq(pdev->irq, dev);
1103 pci_disable_msi(pdev);
1104 pci_set_drvdata(pdev, NULL);
1105
1106 if (dev->mem_addr)
1107 pci_iounmap(pdev, dev->mem_addr);
1108
1109 kfree(dev);
1110
1111 pci_release_regions(pdev);
1112 pci_disable_device(pdev);
1113}
1093#ifdef CONFIG_PM 1114#ifdef CONFIG_PM
1094static int mei_pci_suspend(struct device *device) 1115static int mei_pci_suspend(struct device *device)
1095{ 1116{
@@ -1173,131 +1194,6 @@ static struct pci_driver mei_driver = {
1173 .driver.pm = MEI_PM_OPS, 1194 .driver.pm = MEI_PM_OPS,
1174}; 1195};
1175 1196
1176/*
1177 * file operations structure will be used for mei char device.
1178 */
1179static const struct file_operations mei_fops = {
1180 .owner = THIS_MODULE,
1181 .read = mei_read,
1182 .unlocked_ioctl = mei_ioctl,
1183#ifdef CONFIG_COMPAT
1184 .compat_ioctl = mei_compat_ioctl,
1185#endif
1186 .open = mei_open,
1187 .release = mei_release,
1188 .write = mei_write,
1189 .poll = mei_poll,
1190};
1191
1192/**
1193 * mei_registration_cdev - sets up the cdev structure for mei device.
1194 *
1195 * @dev: char device struct
1196 * @hminor: minor number for registration char device
1197 * @fops: file operations structure
1198 *
1199 * returns 0 on success, <0 on failure.
1200 */
1201static int mei_registration_cdev(struct cdev *dev, int hminor,
1202 const struct file_operations *fops)
1203{
1204 int ret, devno = MKDEV(mei_major, hminor);
1205
1206 cdev_init(dev, fops);
1207 dev->owner = THIS_MODULE;
1208 ret = cdev_add(dev, devno, 1);
1209 /* Fail gracefully if need be */
1210 if (ret)
1211 printk(KERN_ERR "mei: Error %d registering mei device %d\n",
1212 ret, hminor);
1213 return ret;
1214}
1215
1216/**
1217 * mei_register_cdev - registers mei char device
1218 *
1219 * returns 0 on success, <0 on failure.
1220 */
1221static int mei_register_cdev(void)
1222{
1223 int ret;
1224 dev_t dev;
1225
1226 /* registration of char devices */
1227 ret = alloc_chrdev_region(&dev, MEI_MINORS_BASE, MEI_MINORS_COUNT,
1228 MEI_DRIVER_NAME);
1229 if (ret) {
1230 printk(KERN_ERR "mei: Error allocating char device region.\n");
1231 return ret;
1232 }
1233
1234 mei_major = MAJOR(dev);
1235
1236 ret = mei_registration_cdev(&mei_cdev, MEI_MINOR_NUMBER,
1237 &mei_fops);
1238 if (ret)
1239 unregister_chrdev_region(MKDEV(mei_major, MEI_MINORS_BASE),
1240 MEI_MINORS_COUNT);
1241
1242 return ret;
1243}
1244
1245/**
1246 * mei_unregister_cdev - unregisters mei char device
1247 */
1248static void mei_unregister_cdev(void)
1249{
1250 cdev_del(&mei_cdev);
1251 unregister_chrdev_region(MKDEV(mei_major, MEI_MINORS_BASE),
1252 MEI_MINORS_COUNT);
1253}
1254
1255/**
1256 * mei_sysfs_device_create - adds device entry to sysfs
1257 *
1258 * returns 0 on success, <0 on failure.
1259 */
1260static int mei_sysfs_device_create(void)
1261{
1262 struct class *class;
1263 void *tmphdev;
1264 int err;
1265
1266 class = class_create(THIS_MODULE, MEI_DRIVER_NAME);
1267 if (IS_ERR(class)) {
1268 err = PTR_ERR(class);
1269 printk(KERN_ERR "mei: Error creating mei class.\n");
1270 goto err_out;
1271 }
1272
1273 tmphdev = device_create(class, NULL, mei_cdev.dev, NULL,
1274 MEI_DEV_NAME);
1275 if (IS_ERR(tmphdev)) {
1276 err = PTR_ERR(tmphdev);
1277 goto err_destroy;
1278 }
1279
1280 mei_class = class;
1281 return 0;
1282
1283err_destroy:
1284 class_destroy(class);
1285err_out:
1286 return err;
1287}
1288
1289/**
1290 * mei_sysfs_device_remove - unregisters the device entry on sysfs
1291 */
1292static void mei_sysfs_device_remove(void)
1293{
1294 if (IS_ERR_OR_NULL(mei_class))
1295 return;
1296
1297 device_destroy(mei_class, mei_cdev.dev);
1298 class_destroy(mei_class);
1299}
1300
1301/** 1197/**
1302 * mei_init_module - Driver Registration Routine 1198 * mei_init_module - Driver Registration Routine
1303 * 1199 *
@@ -1314,26 +1210,9 @@ static int __init mei_init_module(void)
1314 mei_driver_string, mei_driver_version); 1210 mei_driver_string, mei_driver_version);
1315 /* init pci module */ 1211 /* init pci module */
1316 ret = pci_register_driver(&mei_driver); 1212 ret = pci_register_driver(&mei_driver);
1317 if (ret < 0) { 1213 if (ret < 0)
1318 printk(KERN_ERR "mei: Error registering driver.\n"); 1214 printk(KERN_ERR "mei: Error registering driver.\n");
1319 goto end;
1320 }
1321 1215
1322 ret = mei_register_cdev();
1323 if (ret)
1324 goto unregister_pci;
1325
1326 ret = mei_sysfs_device_create();
1327 if (ret)
1328 goto unregister_cdev;
1329
1330 return ret;
1331
1332unregister_cdev:
1333 mei_unregister_cdev();
1334unregister_pci:
1335 pci_unregister_driver(&mei_driver);
1336end:
1337 return ret; 1216 return ret;
1338} 1217}
1339 1218
@@ -1347,8 +1226,7 @@ module_init(mei_init_module);
1347 */ 1226 */
1348static void __exit mei_exit_module(void) 1227static void __exit mei_exit_module(void)
1349{ 1228{
1350 mei_sysfs_device_remove(); 1229 misc_deregister(&mei_misc_device);
1351 mei_unregister_cdev();
1352 pci_unregister_driver(&mei_driver); 1230 pci_unregister_driver(&mei_driver);
1353 1231
1354 pr_debug("mei: Driver unloaded successfully.\n"); 1232 pr_debug("mei: Driver unloaded successfully.\n");
diff --git a/drivers/staging/mei/mei.txt b/drivers/staging/mei/mei.txt
index 17302ad2531f..516bfe7319a6 100644
--- a/drivers/staging/mei/mei.txt
+++ b/drivers/staging/mei/mei.txt
@@ -1,78 +1,74 @@
1Intel MEI 1Intel(R) Management Engine Interface (Intel(R) MEI)
2======================= 2=======================
3 3
4Introduction 4Introduction
5======================= 5=======================
6 6
7The Intel Management Engine (Intel ME) is an isolated and 7The Intel Management Engine (Intel ME) is an isolated andprotected computing
8protected computing resource (Coprocessor) residing inside 8resource (Co-processor) residing inside certain Intel chipsets. The Intel ME
9Intel chipsets. The Intel ME provides support for computer/IT 9provides support for computer/IT management features. The feature set
10management features. 10depends on the Intel chipset SKU.
11The Feature set depends on the Intel chipset SKU.
12 11
13The Intel Management Engine Interface (Intel MEI, previously known 12The Intel Management Engine Interface (Intel MEI, previously known as HECI)
14as HECI) is the interface between the Host and Intel ME. 13is the interface between the Host and Intel ME. This interface is exposed
15This interface is exposed to the host as a PCI device. 14to the host as a PCI device. The Intel MEI Driver is in charge of the
16The Intel MEI Driver is in charge of the communication channel 15communication channel between a host application and the Intel ME feature.
17between a host application and the ME feature.
18 16
19Each Intel ME feature (Intel ME Client) is addressed by 17Each Intel ME feature (Intel ME Client) is addressed by a GUID/UUID and
20GUID/UUID and each feature defines its own protocol. 18each client has its own protocol. The protocol is message-based with a
21The protocol is message-based with a header and payload up to 19header and payload up to 512 bytes.
22512 bytes.
23 20
24[place holder to URL to protocol definitions] 21Prominent usage of the Intel ME Interface is to communicate with Intel(R)
25 22Active Management Technology (Intel AMT)implemented in firmware running on
26Prominent usage of the Interface is to communicate with 23the Intel ME.
27Intel Active Management Technology (Intel AMT)
28implemented in firmware running on the Intel ME.
29 24
30Intel AMT provides the ability to manage a host remotely out-of-band (OOB) 25Intel AMT provides the ability to manage a host remotely out-of-band (OOB)
31even when the host processor has crashed or is in a sleep state. 26even when the operating system running on the host processor has crashed or
27is in a sleep state.
32 28
33Some examples of Intel AMT usage are: 29Some examples of Intel AMT usage are:
34 - Monitoring hardware state and platform components 30 - Monitoring hardware state and platform components
35 - Remote power off/on (useful for green computing or overnight IT maintenance) 31 - Remote power off/on (useful for green computing or overnight IT
32 maintenance)
36 - OS updates 33 - OS updates
37 - Storage of useful platform information such as software assets 34 - Storage of useful platform information such as software assets
38 - built-in hardware KVM 35 - Built-in hardware KVM
39 - selective network isolation of Ethernet and IP protocol flows based on 36 - Selective network isolation of Ethernet and IP protocol flows based
40 policies set by a remote management console 37 on policies set by a remote management console
41 - IDE device redirection from remote management console 38 - IDE device redirection from remote management console
42 39
43Intel AMT (OOB) communication is based on SOAP (deprecated 40Intel AMT (OOB) communication is based on SOAP (deprecated
44starting with Release 6.0) over HTTP/HTTPS or WS-Management protocol 41starting with Release 6.0) over HTTP/S or WS-Management protocol over
45over HTTP and HTTPS that are received from a remote 42HTTP/S that are received from a remote management console application.
46management console application.
47 43
48For more information about Intel AMT: 44For more information about Intel AMT:
49http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/WordDocuments/aboutintelamt.htm 45http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide
50
51 46
52MEI Driver 47Intel MEI Driver
53======================= 48=======================
54 49
55The driver exposes a character device called /dev/mei. 50The driver exposes a misc device called /dev/mei.
56 51
57An application maintains communication with an ME feature while 52An application maintains communication with an Intel ME feature while
58/dev/mei is open. The binding to a specific features is performed 53/dev/mei is open. The binding to a specific features is performed by calling
59by calling MEI_CONNECT_CLIENT_IOCTL, which passes the desired UUID. 54MEI_CONNECT_CLIENT_IOCTL, which passes the desired UUID.
60The number of instances of an ME feature that can be opened 55The number of instances of an Intel ME feature that can be opened
61at the same time depends on the ME feature, but most of the 56at the same time depends on the Intel ME feature, but most of the
62features allow only a single instance. 57features allow only a single instance.
63 58
64 59The Intel AMT Host Interface (Intel AMTHI) feature supports multiple
65The Intel AMT Host Interface (AMTHI) feature requires multiple 60simultaneous user applications. Therefore, the Intel MEI driver handles
66simultaneous user applications, therefore the MEI driver handles
67this internally by maintaining request queues for the applications. 61this internally by maintaining request queues for the applications.
68 62
69The driver is oblivious to data that are passed between 63The driver is oblivious to data that is passed between firmware feature
64and host application.
70 65
71Because some of the ME features can change the system 66Because some of the Intel ME features can change the system
72configuration, the driver by default allows only privileged 67configuration, the driver by default allows only a privileged
73user to access it. 68user to access it.
74 69
75A Code snippet for application communicating with AMTHI client: 70A code snippet for an application communicating with
71Intel AMTHI client:
76 struct mei_connect_client_data data; 72 struct mei_connect_client_data data;
77 fd = open(MEI_DEVICE); 73 fd = open(MEI_DEVICE);
78 74
@@ -80,7 +76,7 @@ A Code snippet for application communicating with AMTHI client:
80 76
81 ioctl(fd, IOCTL_MEI_CONNECT_CLIENT, &data); 77 ioctl(fd, IOCTL_MEI_CONNECT_CLIENT, &data);
82 78
83 printf(Ver=%d, MaxLen=%ld\n, 79 printf("Ver=%d, MaxLen=%ld\n",
84 data.d.in_client_uuid.protocol_version, 80 data.d.in_client_uuid.protocol_version,
85 data.d.in_client_uuid.max_msg_length); 81 data.d.in_client_uuid.max_msg_length);
86 82
@@ -95,76 +91,106 @@ A Code snippet for application communicating with AMTHI client:
95 [...] 91 [...]
96 close(fd); 92 close(fd);
97 93
98ME Applications: 94IOCTL:
95======
96The Intel MEI Driver supports the following IOCTL command:
97 IOCTL_MEI_CONNECT_CLIENT Connect to firmware Feature (client).
98
99 usage:
100 struct mei_connect_client_data clientData;
101 ioctl(fd, IOCTL_MEI_CONNECT_CLIENT, &clientData);
102
103 inputs:
104 mei_connect_client_data struct contain the following
105 input field:
106
107 in_client_uuid - UUID of the FW Feature that needs
108 to connect to.
109 outputs:
110 out_client_properties - Client Properties: MTU and Protocol Version.
111
112 error returns:
113 EINVAL Wrong IOCTL Number
114 ENODEV Device or Connection is not initialized or ready.
115 (e.g. Wrong UUID)
116 ENOMEM Unable to allocate memory to client internal data.
117 EFAULT Fatal Error (e.g. Unable to access user input data)
118 EBUSY Connection Already Open
119
120 Notes:
121 max_msg_length (MTU) in client properties describes the maximum
122 data that can be sent or received. (e.g. if MTU=2K, can send
123 requests up to bytes 2k and received responses upto 2k bytes).
124
125Intel ME Applications:
99============== 126==============
100 127
1011) Intel Local Management Service (Intel LMS) 1281) Intel Local Management Service (Intel LMS)
102 Applications running locally on the platform communicate with 129
103 Intel AMT Release 2.0 and later releases in the same way 130 Applications running locally on the platform communicate with Intel AMT Release
104 that network applications do via SOAP over HTTP (deprecated 131 2.0 and later releases in the same way that network applications do via SOAP
105 starting with Release 6.0) or with WS-Management over SOAP over 132 over HTTP (deprecated starting with Release 6.0) or with WS-Management over
106 HTTP. which means that some Intel AMT feature can be access 133 SOAP over HTTP. This means that some Intel AMT features can be accessed from a
107 from a local application using same Network interface as for 134 local application using the same network interface as a remote application
108 remote application. 135 communicating with Intel AMT over the network.
109 136
110 When a local application sends a message addressed to the local 137 When a local application sends a message addressed to the local Intel AMT host
111 Intel AMT host name, the Local Manageability Service (LMS), 138 name, the Intel LMS, which listens for traffic directed to the host name,
112 which listens for traffic directed to the host name, intercepts 139 intercepts the message and routes it to the Intel MEI.
113 the message and routes it to the Intel Management Engine Interface.
114 For more information: 140 For more information:
115 http://software.intel.com/sites/manageability/AMT_Implementation_and_ 141 http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide
116 Reference_Guide/WordDocuments/localaccess1.htm 142 Under "About Intel AMT" => "Local Access"
117 143
118 The LMS opens a connection using the MEI driver to the LMS 144 For downloading Intel LMS:
119 FW feature using a defined UUID and then communicates with the 145 http://software.intel.com/en-us/articles/download-the-latest-intel-amt-open-source-drivers/
120 feature using a protocol 146
121 called Intel(R) AMT Port Forwarding Protocol (APF protocol). 147 The Intel LMS opens a connection using the Intel MEI driver to the Intel LMS
122 The protocol is used to maintain multiple sessions with 148 firmware feature using a defined UUID and then communicates with the feature
123 Intel AMT from a single application. 149 using a protocol called Intel AMT Port Forwarding Protocol(Intel APF protocol).
124 See the protocol specification in 150 The protocol is used to maintain multiple sessions with Intel AMT from a
125 the Intel(R) AMT Implementation and Reference Guide 151 single application.
126 http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/HTMLDocuments/MPSDocuments/Intel%20AMT%20Port%20Forwarding%20Protocol%20Reference%20Manual.pdf 152
127 153 See the protocol specification in the Intel AMT Software Development Kit(SDK)
128 2) Intel AMT Remote configuration using a Local Agent: 154 http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide
155 Under "SDK Resources" => "Intel(R) vPro(TM) Gateway(MPS)"
156 => "Information for Intel(R) vPro(TM) Gateway Developers"
157 => "Description of the Intel AMT Port Forwarding (APF)Protocol"
158
159 2) Intel AMT Remote configuration using a Local Agent
129 A Local Agent enables IT personnel to configure Intel AMT out-of-the-box 160 A Local Agent enables IT personnel to configure Intel AMT out-of-the-box
130 without requiring installing additional data to enable setup. 161 without requiring installing additional data to enable setup. The remote
131 The remote configuration process may involve an ISV-developed remote 162 configuration process may involve an ISV-developed remote configuration
132 configuration agent that runs on the host. 163 agent that runs on the host.
133 For more information: 164 For more information:
134 http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/WordDocuments/remoteconfigurationwithalocalagent.htm 165 http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide
166 Under "Setup and Configuration of Intel AMT" =>
167 "SDK Tools Supporting Setup and Configuration" =>
168 "Using the Local Agent Sample"
169
170 An open source Intel AMT configuration utility, implementing a local agent
171 that accesses the Intel MEI driver, can be found here:
172 http://software.intel.com/en-us/articles/download-the-latest-intel-amt-open-source-drivers/
135 173
136 How the Local Agent Works (including Command structs):
137 http://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/WordDocuments/howthelocalagentsampleworks.htm
138 174
139Intel AMT OS Health Watchdog: 175Intel AMT OS Health Watchdog:
140============================= 176=============================
141The Intel AMT Watchdog is an OS Health (Hang/Crash) watchdog. 177The Intel AMT Watchdog is an OS Health (Hang/Crash) watchdog.
142Whenever the OS hangs or crashes, Intel AMT will send an event 178Whenever the OS hangs or crashes, Intel AMT will send an event
143to whoever subscribed to this event. This mechanism means that 179to any subsciber to this event. This mechanism means that
144IT knows when a platform crashes even when there is a hard failure 180IT knows when a platform crashes even when there is a hard failureon the host.
145on the host.
146The AMT Watchdog is composed of two parts:
147 1) FW Feature - that receives the heartbeats
148 and sends an event when the heartbeats stop.
149 2) MEI driver – connects to the watchdog (WD) feature,
150 configures the watchdog and sends the heartbeats.
151
152The MEI driver configures the Watchdog to expire by default
153every 120sec unless set by the user using module parameters.
154The Driver then sends heartbeats every 2sec.
155 181
156If WD feature does not exist (i.e. the connection failed), 182The Intel AMT Watchdog is composed of two parts:
157the MEI driver will disable the sending of heartbeats. 183 1) Firmware feature - receives the heartbeats
184 and sends an event when the heartbeats stop.
185 2) Intel MEI driver - connects to the watchdog feature, configures the
186 watchdog and sends the heartbeats.
158 187
159Module Parameters 188The Intel MEI driver uses the kernel watchdog to configure the Intel AMT
160================= 189Watchdog and to send heartbeats to it. The default timeout of the
161watchdog_timeout - the user can use this module parameter 190watchdog is 120 seconds.
162to change the watchdog timeout setting.
163 191
164This value sets the Intel AMT watchdog timeout interval in seconds; 192If the Intel AMT Watchdog feature does not exist (i.e. the connection failed),
165the default value is 120sec. 193the Intel MEI driver will disable the sending of heartbeats.
166in order to disable the watchdog activites set the value to 0.
167Normal values should be between 120 and 65535
168 194
169Supported Chipsets: 195Supported Chipsets:
170================== 196==================
diff --git a/drivers/staging/mei/mei_dev.h b/drivers/staging/mei/mei_dev.h
index af4b1af9eeac..82bacfc624c5 100644
--- a/drivers/staging/mei/mei_dev.h
+++ b/drivers/staging/mei/mei_dev.h
@@ -23,13 +23,6 @@
23#include "hw.h" 23#include "hw.h"
24 24
25/* 25/*
26 * MEI Char Driver Minors
27 */
28#define MEI_MINORS_BASE 1
29#define MEI_MINORS_COUNT 1
30#define MEI_MINOR_NUMBER 1
31
32/*
33 * watch dog definition 26 * watch dog definition
34 */ 27 */
35#define MEI_WATCHDOG_DATA_SIZE 16 28#define MEI_WATCHDOG_DATA_SIZE 16
@@ -42,11 +35,6 @@
42 */ 35 */
43extern struct pci_dev *mei_device; 36extern struct pci_dev *mei_device;
44 37
45/*
46 * AMT Watchdog Device
47 */
48#define INTEL_AMT_WATCHDOG_ID "INTCAMT"
49extern struct watchdog_device amt_wd_dev;
50 38
51/* 39/*
52 * AMTHI Client UUID 40 * AMTHI Client UUID
@@ -175,7 +163,6 @@ struct mei_cl {
175 163
176struct mei_io_list { 164struct mei_io_list {
177 struct mei_cl_cb mei_cb; 165 struct mei_cl_cb mei_cb;
178 int status;
179}; 166};
180 167
181/* MEI private device struct */ 168/* MEI private device struct */
diff --git a/drivers/staging/mei/wd.c b/drivers/staging/mei/wd.c
index ffca7ca32658..8094941a98f1 100644
--- a/drivers/staging/mei/wd.c
+++ b/drivers/staging/mei/wd.c
@@ -35,12 +35,16 @@ const u8 mei_wd_state_independence_msg[3][4] = {
35 {0x07, 0x02, 0x01, 0x10} 35 {0x07, 0x02, 0x01, 0x10}
36}; 36};
37 37
38/*
39 * AMT Watchdog Device
40 */
41#define INTEL_AMT_WATCHDOG_ID "INTCAMT"
42
38/* UUIDs for AMT F/W clients */ 43/* UUIDs for AMT F/W clients */
39const uuid_le mei_wd_guid = UUID_LE(0x05B79A6F, 0x4628, 0x4D7F, 0x89, 44const uuid_le mei_wd_guid = UUID_LE(0x05B79A6F, 0x4628, 0x4D7F, 0x89,
40 0x9D, 0xA9, 0x15, 0x14, 0xCB, 45 0x9D, 0xA9, 0x15, 0x14, 0xCB,
41 0x32, 0xAB); 46 0x32, 0xAB);
42 47
43
44void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout) 48void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout)
45{ 49{
46 dev_dbg(&dev->pdev->dev, "timeout=%d.\n", timeout); 50 dev_dbg(&dev->pdev->dev, "timeout=%d.\n", timeout);
@@ -331,14 +335,14 @@ static int mei_wd_ops_set_timeout(struct watchdog_device *wd_dev, unsigned int t
331/* 335/*
332 * Watchdog Device structs 336 * Watchdog Device structs
333 */ 337 */
334const struct watchdog_ops wd_ops = { 338static const struct watchdog_ops wd_ops = {
335 .owner = THIS_MODULE, 339 .owner = THIS_MODULE,
336 .start = mei_wd_ops_start, 340 .start = mei_wd_ops_start,
337 .stop = mei_wd_ops_stop, 341 .stop = mei_wd_ops_stop,
338 .ping = mei_wd_ops_ping, 342 .ping = mei_wd_ops_ping,
339 .set_timeout = mei_wd_ops_set_timeout, 343 .set_timeout = mei_wd_ops_set_timeout,
340}; 344};
341const struct watchdog_info wd_info = { 345static const struct watchdog_info wd_info = {
342 .identity = INTEL_AMT_WATCHDOG_ID, 346 .identity = INTEL_AMT_WATCHDOG_ID,
343 .options = WDIOF_KEEPALIVEPING, 347 .options = WDIOF_KEEPALIVEPING,
344}; 348};
@@ -352,3 +356,25 @@ struct watchdog_device amt_wd_dev = {
352}; 356};
353 357
354 358
359void mei_watchdog_register(struct mei_device *dev)
360{
361 dev_dbg(&dev->pdev->dev, "dev->wd_timeout =%d.\n", dev->wd_timeout);
362
363 dev->wd_due_counter = !!dev->wd_timeout;
364
365 if (watchdog_register_device(&amt_wd_dev)) {
366 dev_err(&dev->pdev->dev, "unable to register watchdog device.\n");
367 dev->wd_interface_reg = false;
368 } else {
369 dev_dbg(&dev->pdev->dev, "successfully register watchdog interface.\n");
370 dev->wd_interface_reg = true;
371 }
372}
373
374void mei_watchdog_unregister(struct mei_device *dev)
375{
376 if (dev->wd_interface_reg)
377 watchdog_unregister_device(&amt_wd_dev);
378 dev->wd_interface_reg = false;
379}
380
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index e06b867d1e0c..fafdfa25e139 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -27,6 +27,8 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/irq.h> 29#include <linux/irq.h>
30#include <linux/of.h>
31#include <linux/of_gpio.h>
30#include <linux/list.h> 32#include <linux/list.h>
31#include <linux/mfd/core.h> 33#include <linux/mfd/core.h>
32#include <linux/mutex.h> 34#include <linux/mutex.h>
@@ -727,8 +729,24 @@ static int __devinit tegra_nvec_probe(struct platform_device *pdev)
727 } 729 }
728 platform_set_drvdata(pdev, nvec); 730 platform_set_drvdata(pdev, nvec);
729 nvec->dev = &pdev->dev; 731 nvec->dev = &pdev->dev;
730 nvec->gpio = pdata->gpio; 732
731 nvec->i2c_addr = pdata->i2c_addr; 733 if (pdata) {
734 nvec->gpio = pdata->gpio;
735 nvec->i2c_addr = pdata->i2c_addr;
736 } else if (nvec->dev->of_node) {
737 nvec->gpio = of_get_named_gpio(nvec->dev->of_node, "request-gpios", 0);
738 if (nvec->gpio < 0) {
739 dev_err(&pdev->dev, "no gpio specified");
740 goto failed;
741 }
742 if (of_property_read_u32(nvec->dev->of_node, "slave-addr", &nvec->i2c_addr)) {
743 dev_err(&pdev->dev, "no i2c address specified");
744 goto failed;
745 }
746 } else {
747 dev_err(&pdev->dev, "no platform data\n");
748 goto failed;
749 }
732 750
733 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 751 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
734 if (!res) { 752 if (!res) {
@@ -893,6 +911,13 @@ static int tegra_nvec_resume(struct platform_device *pdev)
893#define tegra_nvec_resume NULL 911#define tegra_nvec_resume NULL
894#endif 912#endif
895 913
914/* Match table for of_platform binding */
915static const struct of_device_id nvidia_nvec_of_match[] __devinitconst = {
916 { .compatible = "nvidia,nvec", },
917 {},
918};
919MODULE_DEVICE_TABLE(of, nvidia_nvec_of_match);
920
896static struct platform_driver nvec_device_driver = { 921static struct platform_driver nvec_device_driver = {
897 .probe = tegra_nvec_probe, 922 .probe = tegra_nvec_probe,
898 .remove = __devexit_p(tegra_nvec_remove), 923 .remove = __devexit_p(tegra_nvec_remove),
@@ -901,6 +926,7 @@ static struct platform_driver nvec_device_driver = {
901 .driver = { 926 .driver = {
902 .name = "nvec", 927 .name = "nvec",
903 .owner = THIS_MODULE, 928 .owner = THIS_MODULE,
929 .of_match_table = nvidia_nvec_of_match,
904 } 930 }
905}; 931};
906 932
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c
index af24ddfb58c9..3d9199320d86 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon.c
@@ -34,8 +34,8 @@
34 34
35/* Module definitions */ 35/* Module definitions */
36 36
37static int resumeline = 898; 37static ushort resumeline = 898;
38module_param(resumeline, int, 0444); 38module_param(resumeline, ushort, 0444);
39 39
40/* Default off since it doesn't work on DCON ASIC in B-test OLPC board */ 40/* Default off since it doesn't work on DCON ASIC in B-test OLPC board */
41static int useaa = 1; 41static int useaa = 1;
@@ -456,7 +456,7 @@ static ssize_t dcon_mono_store(struct device *dev,
456 unsigned long enable_mono; 456 unsigned long enable_mono;
457 int rc; 457 int rc;
458 458
459 rc = strict_strtoul(buf, 10, &enable_mono); 459 rc = kstrtoul(buf, 10, &enable_mono);
460 if (rc) 460 if (rc)
461 return rc; 461 return rc;
462 462
@@ -472,7 +472,7 @@ static ssize_t dcon_freeze_store(struct device *dev,
472 unsigned long output; 472 unsigned long output;
473 int ret; 473 int ret;
474 474
475 ret = strict_strtoul(buf, 10, &output); 475 ret = kstrtoul(buf, 10, &output);
476 if (ret) 476 if (ret)
477 return ret; 477 return ret;
478 478
@@ -498,10 +498,10 @@ static ssize_t dcon_freeze_store(struct device *dev,
498static ssize_t dcon_resumeline_store(struct device *dev, 498static ssize_t dcon_resumeline_store(struct device *dev,
499 struct device_attribute *attr, const char *buf, size_t count) 499 struct device_attribute *attr, const char *buf, size_t count)
500{ 500{
501 unsigned long rl; 501 unsigned short rl;
502 int rc; 502 int rc;
503 503
504 rc = strict_strtoul(buf, 10, &rl); 504 rc = kstrtou16(buf, 10, &rl);
505 if (rc) 505 if (rc)
506 return rc; 506 return rc;
507 507
@@ -517,7 +517,7 @@ static ssize_t dcon_sleep_store(struct device *dev,
517 unsigned long output; 517 unsigned long output;
518 int ret; 518 int ret;
519 519
520 ret = strict_strtoul(buf, 10, &output); 520 ret = kstrtoul(buf, 10, &output);
521 if (ret) 521 if (ret)
522 return ret; 522 return ret;
523 523
@@ -755,9 +755,9 @@ static int dcon_resume(struct i2c_client *client)
755irqreturn_t dcon_interrupt(int irq, void *id) 755irqreturn_t dcon_interrupt(int irq, void *id)
756{ 756{
757 struct dcon_priv *dcon = id; 757 struct dcon_priv *dcon = id;
758 int status = pdata->read_status(); 758 u8 status;
759 759
760 if (status == -1) 760 if (pdata->read_status(&status))
761 return IRQ_NONE; 761 return IRQ_NONE;
762 762
763 switch (status & 3) { 763 switch (status & 3) {
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.h b/drivers/staging/olpc_dcon/olpc_dcon.h
index 0264c94375aa..167a41778be6 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.h
+++ b/drivers/staging/olpc_dcon/olpc_dcon.h
@@ -84,7 +84,7 @@ struct dcon_platform_data {
84 int (*init)(struct dcon_priv *); 84 int (*init)(struct dcon_priv *);
85 void (*bus_stabilize_wiggle)(void); 85 void (*bus_stabilize_wiggle)(void);
86 void (*set_dconload)(int); 86 void (*set_dconload)(int);
87 u8 (*read_status)(void); 87 int (*read_status)(u8 *);
88}; 88};
89 89
90#include <linux/interrupt.h> 90#include <linux/interrupt.h>
diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c
index 2245213df607..cb6ce0cf92a0 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c
@@ -183,17 +183,15 @@ static void dcon_set_dconload_1(int val)
183 gpio_set_value(OLPC_GPIO_DCON_LOAD, val); 183 gpio_set_value(OLPC_GPIO_DCON_LOAD, val);
184} 184}
185 185
186static u8 dcon_read_status_xo_1(void) 186static int dcon_read_status_xo_1(u8 *status)
187{ 187{
188 u8 status; 188 *status = gpio_get_value(OLPC_GPIO_DCON_STAT0);
189 189 *status |= gpio_get_value(OLPC_GPIO_DCON_STAT1) << 1;
190 status = gpio_get_value(OLPC_GPIO_DCON_STAT0);
191 status |= gpio_get_value(OLPC_GPIO_DCON_STAT1) << 1;
192 190
193 /* Clear the negative edge status for GPIO7 */ 191 /* Clear the negative edge status for GPIO7 */
194 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS); 192 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS);
195 193
196 return status; 194 return 0;
197} 195}
198 196
199struct dcon_platform_data dcon_pdata_xo_1 = { 197struct dcon_platform_data dcon_pdata_xo_1 = {
diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c
index a6a6cf2adc4d..69415eec425c 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c
@@ -167,20 +167,18 @@ static void dcon_set_dconload_xo_1_5(int val)
167 gpio_set_value(VX855_GPIO(1), val); 167 gpio_set_value(VX855_GPIO(1), val);
168} 168}
169 169
170static u8 dcon_read_status_xo_1_5(void) 170static int dcon_read_status_xo_1_5(u8 *status)
171{ 171{
172 u8 status;
173
174 if (!dcon_was_irq()) 172 if (!dcon_was_irq())
175 return -1; 173 return -1;
176 174
177 /* i believe this is the same as "inb(0x44b) & 3" */ 175 /* i believe this is the same as "inb(0x44b) & 3" */
178 status = gpio_get_value(VX855_GPI(10)); 176 *status = gpio_get_value(VX855_GPI(10));
179 status |= gpio_get_value(VX855_GPI(11)) << 1; 177 *status |= gpio_get_value(VX855_GPI(11)) << 1;
180 178
181 dcon_clear_irq(); 179 dcon_clear_irq();
182 180
183 return status; 181 return 0;
184} 182}
185 183
186struct dcon_platform_data dcon_pdata_xo_1_5 = { 184struct dcon_platform_data dcon_pdata_xo_1_5 = {
diff --git a/drivers/staging/omapdrm/Kconfig b/drivers/staging/omapdrm/Kconfig
new file mode 100644
index 000000000000..81a7cba4a0c5
--- /dev/null
+++ b/drivers/staging/omapdrm/Kconfig
@@ -0,0 +1,25 @@
1
2config DRM_OMAP
3 tristate "OMAP DRM"
4 depends on DRM && !CONFIG_FB_OMAP2
5 depends on ARCH_OMAP2PLUS
6 select DRM_KMS_HELPER
7 select OMAP2_DSS
8 select FB_SYS_FILLRECT
9 select FB_SYS_COPYAREA
10 select FB_SYS_IMAGEBLIT
11 select FB_SYS_FOPS
12 default n
13 help
14 DRM display driver for OMAP2/3/4 based boards.
15
16config DRM_OMAP_NUM_CRTCS
17 int "Number of CRTCs"
18 range 1 10
19 default 1 if ARCH_OMAP2 || ARCH_OMAP3
20 default 2 if ARCH_OMAP4
21 depends on DRM_OMAP
22 help
23 Select the number of video overlays which can be used as framebuffers.
24 The remaining overlays are reserved for video.
25
diff --git a/drivers/staging/omapdrm/Makefile b/drivers/staging/omapdrm/Makefile
new file mode 100644
index 000000000000..592cf69020cd
--- /dev/null
+++ b/drivers/staging/omapdrm/Makefile
@@ -0,0 +1,21 @@
1#
2# Makefile for the drm device driver. This driver provides support for the
3# Direct Rendering Infrastructure (DRI)
4#
5
6ccflags-y := -Iinclude/drm -Werror
7omapdrm-y := omap_drv.o \
8 omap_debugfs.o \
9 omap_crtc.o \
10 omap_encoder.o \
11 omap_connector.o \
12 omap_fb.o \
13 omap_fbdev.o \
14 omap_gem.o \
15 omap_dmm_tiler.o \
16 tcm-sita.o
17
18# temporary:
19omapdrm-y += omap_gem_helpers.o
20
21obj-$(CONFIG_DRM_OMAP) += omapdrm.o
diff --git a/drivers/staging/omapdrm/TODO b/drivers/staging/omapdrm/TODO
new file mode 100644
index 000000000000..55b18377ac4f
--- /dev/null
+++ b/drivers/staging/omapdrm/TODO
@@ -0,0 +1,38 @@
1TODO
2. check error handling/cleanup paths
3. add drm_plane / overlay support
4. add video decode/encode support (via syslink3 + codec-engine)
5. still some rough edges with flipping.. event back to userspace should
6 really come after VSYNC interrupt
7. where should we do eviction (detatch_pages())? We aren't necessarily
8 accessing the pages via a GART, so maybe we need some other threshold
9 to put a cap on the # of pages that can be pin'd. (It is mostly only
10 of interest in case you have a swap partition/file.. which a lot of
11 these devices do not.. but it doesn't hurt for the driver to do the
12 right thing anyways.)
13 . Use mm_shrinker to trigger unpinning pages. Need to figure out how
14 to handle next issue first (I think?)
15 . Note TTM already has some mm_shrinker stuff.. maybe an argument to
16 move to TTM? Or maybe something that could be factored out in common?
17. GEM/shmem backed pages can have existing mappings (kernel linear map,
18 etc..), which isn't really ideal.
19. Revisit GEM sync object infrastructure.. TTM has some framework for this
20 already. Possibly this could be refactored out and made more common?
21 There should be some way to do this with less wheel-reinvention.
22. Review DSS vs KMS mismatches. The omap_dss_device is sort of part encoder,
23 part connector. Which results in a bit of duct tape to fwd calls from
24 encoder to connector. Possibly this could be done a bit better.
25. Solve PM sequencing on resume. DMM/TILER must be reloaded before any
26 access is made from any component in the system. Which means on suspend
27 CRTC's should be disabled, and on resume the LUT should be reprogrammed
28 before CRTC's are re-enabled, to prevent DSS from trying to DMA from a
29 buffer mapped in DMM/TILER before LUT is reloaded.
30. Add debugfs information for DMM/TILER
31
32Userspace:
33. git://github.com/robclark/xf86-video-omap.git
34
35Currently tested on
36. OMAP3530 beagleboard
37. OMAP4430 pandaboard
38. OMAP4460 pandaboard
diff --git a/drivers/staging/omapdrm/omap_connector.c b/drivers/staging/omapdrm/omap_connector.c
new file mode 100644
index 000000000000..5e2856c0e0bb
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_connector.c
@@ -0,0 +1,371 @@
1/*
2 * drivers/staging/omapdrm/omap_connector.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc.h"
23#include "drm_crtc_helper.h"
24
25/*
26 * connector funcs
27 */
28
29#define to_omap_connector(x) container_of(x, struct omap_connector, base)
30
31struct omap_connector {
32 struct drm_connector base;
33 struct omap_dss_device *dssdev;
34};
35
36static inline void copy_timings_omap_to_drm(struct drm_display_mode *mode,
37 struct omap_video_timings *timings)
38{
39 mode->clock = timings->pixel_clock;
40
41 mode->hdisplay = timings->x_res;
42 mode->hsync_start = mode->hdisplay + timings->hfp;
43 mode->hsync_end = mode->hsync_start + timings->hsw;
44 mode->htotal = mode->hsync_end + timings->hbp;
45
46 mode->vdisplay = timings->y_res;
47 mode->vsync_start = mode->vdisplay + timings->vfp;
48 mode->vsync_end = mode->vsync_start + timings->vsw;
49 mode->vtotal = mode->vsync_end + timings->vbp;
50
51 /* note: whether or not it is interlaced, +/- h/vsync, etc,
52 * which should be set in the mode flags, is not exposed in
53 * the omap_video_timings struct.. but hdmi driver tracks
54 * those separately so all we have to have to set the mode
55 * is the way to recover these timings values, and the
56 * omap_dss_driver would do the rest.
57 */
58}
59
60static inline void copy_timings_drm_to_omap(struct omap_video_timings *timings,
61 struct drm_display_mode *mode)
62{
63 timings->pixel_clock = mode->clock;
64
65 timings->x_res = mode->hdisplay;
66 timings->hfp = mode->hsync_start - mode->hdisplay;
67 timings->hsw = mode->hsync_end - mode->hsync_start;
68 timings->hbp = mode->htotal - mode->hsync_end;
69
70 timings->y_res = mode->vdisplay;
71 timings->vfp = mode->vsync_start - mode->vdisplay;
72 timings->vsw = mode->vsync_end - mode->vsync_start;
73 timings->vbp = mode->vtotal - mode->vsync_end;
74}
75
76static void omap_connector_dpms(struct drm_connector *connector, int mode)
77{
78 struct omap_connector *omap_connector = to_omap_connector(connector);
79 struct omap_dss_device *dssdev = omap_connector->dssdev;
80 int old_dpms;
81
82 DBG("%s: %d", dssdev->name, mode);
83
84 old_dpms = connector->dpms;
85
86 /* from off to on, do from crtc to connector */
87 if (mode < old_dpms)
88 drm_helper_connector_dpms(connector, mode);
89
90 if (mode == DRM_MODE_DPMS_ON) {
91 /* store resume info for suspended displays */
92 switch (dssdev->state) {
93 case OMAP_DSS_DISPLAY_SUSPENDED:
94 dssdev->activate_after_resume = true;
95 break;
96 case OMAP_DSS_DISPLAY_DISABLED: {
97 int ret = dssdev->driver->enable(dssdev);
98 if (ret) {
99 DBG("%s: failed to enable: %d",
100 dssdev->name, ret);
101 dssdev->driver->disable(dssdev);
102 }
103 break;
104 }
105 default:
106 break;
107 }
108 } else {
109 /* TODO */
110 }
111
112 /* from on to off, do from connector to crtc */
113 if (mode > old_dpms)
114 drm_helper_connector_dpms(connector, mode);
115}
116
117enum drm_connector_status omap_connector_detect(
118 struct drm_connector *connector, bool force)
119{
120 struct omap_connector *omap_connector = to_omap_connector(connector);
121 struct omap_dss_device *dssdev = omap_connector->dssdev;
122 struct omap_dss_driver *dssdrv = dssdev->driver;
123 enum drm_connector_status ret;
124
125 if (dssdrv->detect) {
126 if (dssdrv->detect(dssdev)) {
127 ret = connector_status_connected;
128 } else {
129 ret = connector_status_disconnected;
130 }
131 } else {
132 ret = connector_status_unknown;
133 }
134
135 VERB("%s: %d (force=%d)", omap_connector->dssdev->name, ret, force);
136
137 return ret;
138}
139
140static void omap_connector_destroy(struct drm_connector *connector)
141{
142 struct omap_connector *omap_connector = to_omap_connector(connector);
143 struct omap_dss_device *dssdev = omap_connector->dssdev;
144
145 dssdev->driver->disable(dssdev);
146
147 DBG("%s", omap_connector->dssdev->name);
148 drm_sysfs_connector_remove(connector);
149 drm_connector_cleanup(connector);
150 kfree(omap_connector);
151
152 omap_dss_put_device(dssdev);
153}
154
155#define MAX_EDID 512
156
157static int omap_connector_get_modes(struct drm_connector *connector)
158{
159 struct omap_connector *omap_connector = to_omap_connector(connector);
160 struct omap_dss_device *dssdev = omap_connector->dssdev;
161 struct omap_dss_driver *dssdrv = dssdev->driver;
162 struct drm_device *dev = connector->dev;
163 int n = 0;
164
165 DBG("%s", omap_connector->dssdev->name);
166
167 /* if display exposes EDID, then we parse that in the normal way to
168 * build table of supported modes.. otherwise (ie. fixed resolution
169 * LCD panels) we just return a single mode corresponding to the
170 * currently configured timings:
171 */
172 if (dssdrv->read_edid) {
173 void *edid = kzalloc(MAX_EDID, GFP_KERNEL);
174
175 if ((dssdrv->read_edid(dssdev, edid, MAX_EDID) > 0) &&
176 drm_edid_is_valid(edid)) {
177 drm_mode_connector_update_edid_property(
178 connector, edid);
179 n = drm_add_edid_modes(connector, edid);
180 kfree(connector->display_info.raw_edid);
181 connector->display_info.raw_edid = edid;
182 } else {
183 drm_mode_connector_update_edid_property(
184 connector, NULL);
185 connector->display_info.raw_edid = NULL;
186 kfree(edid);
187 }
188 } else {
189 struct drm_display_mode *mode = drm_mode_create(dev);
190 struct omap_video_timings timings;
191
192 dssdrv->get_timings(dssdev, &timings);
193
194 copy_timings_omap_to_drm(mode, &timings);
195
196 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
197 drm_mode_set_name(mode);
198 drm_mode_probed_add(connector, mode);
199
200 n = 1;
201 }
202
203 return n;
204}
205
206static int omap_connector_mode_valid(struct drm_connector *connector,
207 struct drm_display_mode *mode)
208{
209 struct omap_connector *omap_connector = to_omap_connector(connector);
210 struct omap_dss_device *dssdev = omap_connector->dssdev;
211 struct omap_dss_driver *dssdrv = dssdev->driver;
212 struct omap_video_timings timings = {0};
213 struct drm_device *dev = connector->dev;
214 struct drm_display_mode *new_mode;
215 int ret = MODE_BAD;
216
217 copy_timings_drm_to_omap(&timings, mode);
218 mode->vrefresh = drm_mode_vrefresh(mode);
219
220 if (!dssdrv->check_timings(dssdev, &timings)) {
221 /* check if vrefresh is still valid */
222 new_mode = drm_mode_duplicate(dev, mode);
223 new_mode->clock = timings.pixel_clock;
224 new_mode->vrefresh = 0;
225 if (mode->vrefresh == drm_mode_vrefresh(new_mode))
226 ret = MODE_OK;
227 drm_mode_destroy(dev, new_mode);
228 }
229
230 DBG("connector: mode %s: "
231 "%d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
232 (ret == MODE_OK) ? "valid" : "invalid",
233 mode->base.id, mode->name, mode->vrefresh, mode->clock,
234 mode->hdisplay, mode->hsync_start,
235 mode->hsync_end, mode->htotal,
236 mode->vdisplay, mode->vsync_start,
237 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
238
239 return ret;
240}
241
242struct drm_encoder *omap_connector_attached_encoder(
243 struct drm_connector *connector)
244{
245 int i;
246 struct omap_connector *omap_connector = to_omap_connector(connector);
247
248 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
249 struct drm_mode_object *obj;
250
251 if (connector->encoder_ids[i] == 0)
252 break;
253
254 obj = drm_mode_object_find(connector->dev,
255 connector->encoder_ids[i],
256 DRM_MODE_OBJECT_ENCODER);
257
258 if (obj) {
259 struct drm_encoder *encoder = obj_to_encoder(obj);
260 struct omap_overlay_manager *mgr =
261 omap_encoder_get_manager(encoder);
262 DBG("%s: found %s", omap_connector->dssdev->name,
263 mgr->name);
264 return encoder;
265 }
266 }
267
268 DBG("%s: no encoder", omap_connector->dssdev->name);
269
270 return NULL;
271}
272
273static const struct drm_connector_funcs omap_connector_funcs = {
274 .dpms = omap_connector_dpms,
275 .detect = omap_connector_detect,
276 .fill_modes = drm_helper_probe_single_connector_modes,
277 .destroy = omap_connector_destroy,
278};
279
280static const struct drm_connector_helper_funcs omap_connector_helper_funcs = {
281 .get_modes = omap_connector_get_modes,
282 .mode_valid = omap_connector_mode_valid,
283 .best_encoder = omap_connector_attached_encoder,
284};
285
286/* called from encoder when mode is set, to propagate settings to the dssdev */
287void omap_connector_mode_set(struct drm_connector *connector,
288 struct drm_display_mode *mode)
289{
290 struct drm_device *dev = connector->dev;
291 struct omap_connector *omap_connector = to_omap_connector(connector);
292 struct omap_dss_device *dssdev = omap_connector->dssdev;
293 struct omap_dss_driver *dssdrv = dssdev->driver;
294 struct omap_video_timings timings;
295
296 copy_timings_drm_to_omap(&timings, mode);
297
298 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
299 omap_connector->dssdev->name,
300 mode->base.id, mode->name, mode->vrefresh, mode->clock,
301 mode->hdisplay, mode->hsync_start,
302 mode->hsync_end, mode->htotal,
303 mode->vdisplay, mode->vsync_start,
304 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
305
306 if (dssdrv->check_timings(dssdev, &timings)) {
307 dev_err(dev->dev, "could not set timings\n");
308 return;
309 }
310
311 dssdrv->set_timings(dssdev, &timings);
312}
313
314/* flush an area of the framebuffer (in case of manual update display that
315 * is not automatically flushed)
316 */
317void omap_connector_flush(struct drm_connector *connector,
318 int x, int y, int w, int h)
319{
320 struct omap_connector *omap_connector = to_omap_connector(connector);
321
322 /* TODO: enable when supported in dss */
323 VERB("%s: %d,%d, %dx%d", omap_connector->dssdev->name, x, y, w, h);
324}
325
326/* initialize connector */
327struct drm_connector *omap_connector_init(struct drm_device *dev,
328 int connector_type, struct omap_dss_device *dssdev)
329{
330 struct drm_connector *connector = NULL;
331 struct omap_connector *omap_connector;
332
333 DBG("%s", dssdev->name);
334
335 omap_dss_get_device(dssdev);
336
337 omap_connector = kzalloc(sizeof(struct omap_connector), GFP_KERNEL);
338 if (!omap_connector) {
339 dev_err(dev->dev, "could not allocate connector\n");
340 goto fail;
341 }
342
343 omap_connector->dssdev = dssdev;
344 connector = &omap_connector->base;
345
346 drm_connector_init(dev, connector, &omap_connector_funcs,
347 connector_type);
348 drm_connector_helper_add(connector, &omap_connector_helper_funcs);
349
350#if 0 /* enable when dss2 supports hotplug */
351 if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_HPD)
352 connector->polled = 0;
353 else
354#endif
355 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
356 DRM_CONNECTOR_POLL_DISCONNECT;
357
358 connector->interlace_allowed = 1;
359 connector->doublescan_allowed = 0;
360
361 drm_sysfs_connector_add(connector);
362
363 return connector;
364
365fail:
366 if (connector) {
367 omap_connector_destroy(connector);
368 }
369
370 return NULL;
371}
diff --git a/drivers/staging/omapdrm/omap_crtc.c b/drivers/staging/omapdrm/omap_crtc.c
new file mode 100644
index 000000000000..cffdf5e12394
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_crtc.c
@@ -0,0 +1,326 @@
1/*
2 * drivers/staging/omapdrm/omap_crtc.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_mode.h"
23#include "drm_crtc.h"
24#include "drm_crtc_helper.h"
25
26#define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
27
28struct omap_crtc {
29 struct drm_crtc base;
30 struct omap_overlay *ovl;
31 struct omap_overlay_info info;
32 int id;
33
34 /* if there is a pending flip, this will be non-null: */
35 struct drm_pending_vblank_event *event;
36};
37
38/* push changes down to dss2 */
39static int commit(struct drm_crtc *crtc)
40{
41 struct drm_device *dev = crtc->dev;
42 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
43 struct omap_overlay *ovl = omap_crtc->ovl;
44 struct omap_overlay_info *info = &omap_crtc->info;
45 int ret;
46
47 DBG("%s", omap_crtc->ovl->name);
48 DBG("%dx%d -> %dx%d (%d)", info->width, info->height, info->out_width,
49 info->out_height, info->screen_width);
50 DBG("%d,%d %08x", info->pos_x, info->pos_y, info->paddr);
51
52 /* NOTE: do we want to do this at all here, or just wait
53 * for dpms(ON) since other CRTC's may not have their mode
54 * set yet, so fb dimensions may still change..
55 */
56 ret = ovl->set_overlay_info(ovl, info);
57 if (ret) {
58 dev_err(dev->dev, "could not set overlay info\n");
59 return ret;
60 }
61
62 /* our encoder doesn't necessarily get a commit() after this, in
63 * particular in the dpms() and mode_set_base() cases, so force the
64 * manager to update:
65 *
66 * could this be in the encoder somehow?
67 */
68 if (ovl->manager) {
69 ret = ovl->manager->apply(ovl->manager);
70 if (ret) {
71 dev_err(dev->dev, "could not apply settings\n");
72 return ret;
73 }
74 }
75
76 if (info->enabled) {
77 omap_framebuffer_flush(crtc->fb, crtc->x, crtc->y,
78 crtc->fb->width, crtc->fb->height);
79 }
80
81 return 0;
82}
83
84/* update parameters that are dependent on the framebuffer dimensions and
85 * position within the fb that this crtc scans out from. This is called
86 * when framebuffer dimensions or x,y base may have changed, either due
87 * to our mode, or a change in another crtc that is scanning out of the
88 * same fb.
89 */
90static void update_scanout(struct drm_crtc *crtc)
91{
92 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
93 dma_addr_t paddr;
94 unsigned int screen_width;
95
96 omap_framebuffer_get_buffer(crtc->fb, crtc->x, crtc->y,
97 NULL, &paddr, &screen_width);
98
99 DBG("%s: %d,%d: %08x (%d)", omap_crtc->ovl->name,
100 crtc->x, crtc->y, (u32)paddr, screen_width);
101
102 omap_crtc->info.paddr = paddr;
103 omap_crtc->info.screen_width = screen_width;
104}
105
106static void omap_crtc_gamma_set(struct drm_crtc *crtc,
107 u16 *red, u16 *green, u16 *blue, uint32_t start, uint32_t size)
108{
109 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
110 DBG("%s", omap_crtc->ovl->name);
111}
112
113static void omap_crtc_destroy(struct drm_crtc *crtc)
114{
115 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
116 DBG("%s", omap_crtc->ovl->name);
117 drm_crtc_cleanup(crtc);
118 kfree(omap_crtc);
119}
120
121static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
122{
123 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
124
125 DBG("%s: %d", omap_crtc->ovl->name, mode);
126
127 if (mode == DRM_MODE_DPMS_ON) {
128 update_scanout(crtc);
129 omap_crtc->info.enabled = true;
130 } else {
131 omap_crtc->info.enabled = false;
132 }
133
134 WARN_ON(commit(crtc));
135}
136
137static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
138 struct drm_display_mode *mode,
139 struct drm_display_mode *adjusted_mode)
140{
141 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
142 DBG("%s", omap_crtc->ovl->name);
143 return true;
144}
145
146static int omap_crtc_mode_set(struct drm_crtc *crtc,
147 struct drm_display_mode *mode,
148 struct drm_display_mode *adjusted_mode,
149 int x, int y,
150 struct drm_framebuffer *old_fb)
151{
152 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
153
154 DBG("%s: %d,%d: %dx%d", omap_crtc->ovl->name, x, y,
155 mode->hdisplay, mode->vdisplay);
156
157 /* just use adjusted mode */
158 mode = adjusted_mode;
159
160 omap_crtc->info.width = mode->hdisplay;
161 omap_crtc->info.height = mode->vdisplay;
162 omap_crtc->info.out_width = mode->hdisplay;
163 omap_crtc->info.out_height = mode->vdisplay;
164 omap_crtc->info.color_mode = OMAP_DSS_COLOR_RGB24U;
165 omap_crtc->info.rotation_type = OMAP_DSS_ROT_DMA;
166 omap_crtc->info.rotation = OMAP_DSS_ROT_0;
167 omap_crtc->info.global_alpha = 0xff;
168 omap_crtc->info.mirror = 0;
169 omap_crtc->info.mirror = 0;
170 omap_crtc->info.pos_x = 0;
171 omap_crtc->info.pos_y = 0;
172#if 0 /* re-enable when these are available in DSS2 driver */
173 omap_crtc->info.zorder = 3; /* GUI in the front, video behind */
174 omap_crtc->info.min_x_decim = 1;
175 omap_crtc->info.max_x_decim = 1;
176 omap_crtc->info.min_y_decim = 1;
177 omap_crtc->info.max_y_decim = 1;
178#endif
179
180 update_scanout(crtc);
181
182 return 0;
183}
184
185static void omap_crtc_prepare(struct drm_crtc *crtc)
186{
187 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
188 struct omap_overlay *ovl = omap_crtc->ovl;
189
190 DBG("%s", omap_crtc->ovl->name);
191
192 ovl->get_overlay_info(ovl, &omap_crtc->info);
193
194 omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
195}
196
197static void omap_crtc_commit(struct drm_crtc *crtc)
198{
199 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
200 DBG("%s", omap_crtc->ovl->name);
201 omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
202}
203
204static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
205 struct drm_framebuffer *old_fb)
206{
207 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
208
209 DBG("%s %d,%d: fb=%p", omap_crtc->ovl->name, x, y, old_fb);
210
211 update_scanout(crtc);
212
213 return commit(crtc);
214}
215
216static void omap_crtc_load_lut(struct drm_crtc *crtc)
217{
218 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
219 DBG("%s", omap_crtc->ovl->name);
220}
221
222static void page_flip_cb(void *arg)
223{
224 struct drm_crtc *crtc = arg;
225 struct drm_device *dev = crtc->dev;
226 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
227 struct drm_pending_vblank_event *event = omap_crtc->event;
228 struct timeval now;
229 unsigned long flags;
230
231 WARN_ON(!event);
232
233 omap_crtc->event = NULL;
234
235 update_scanout(crtc);
236 WARN_ON(commit(crtc));
237
238 /* wakeup userspace */
239 /* TODO: this should happen *after* flip in vsync IRQ handler */
240 if (event) {
241 spin_lock_irqsave(&dev->event_lock, flags);
242 event->event.sequence = drm_vblank_count_and_time(
243 dev, omap_crtc->id, &now);
244 event->event.tv_sec = now.tv_sec;
245 event->event.tv_usec = now.tv_usec;
246 list_add_tail(&event->base.link,
247 &event->base.file_priv->event_list);
248 wake_up_interruptible(&event->base.file_priv->event_wait);
249 spin_unlock_irqrestore(&dev->event_lock, flags);
250 }
251}
252
253static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
254 struct drm_framebuffer *fb,
255 struct drm_pending_vblank_event *event)
256{
257 struct drm_device *dev = crtc->dev;
258 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
259
260 DBG("%d -> %d", crtc->fb ? crtc->fb->base.id : -1, fb->base.id);
261
262 if (omap_crtc->event) {
263 dev_err(dev->dev, "already a pending flip\n");
264 return -EINVAL;
265 }
266
267 crtc->fb = fb;
268 omap_crtc->event = event;
269
270 omap_gem_op_async(omap_framebuffer_bo(fb), OMAP_GEM_READ,
271 page_flip_cb, crtc);
272
273 return 0;
274}
275
276static const struct drm_crtc_funcs omap_crtc_funcs = {
277 .gamma_set = omap_crtc_gamma_set,
278 .set_config = drm_crtc_helper_set_config,
279 .destroy = omap_crtc_destroy,
280 .page_flip = omap_crtc_page_flip_locked,
281};
282
283static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
284 .dpms = omap_crtc_dpms,
285 .mode_fixup = omap_crtc_mode_fixup,
286 .mode_set = omap_crtc_mode_set,
287 .prepare = omap_crtc_prepare,
288 .commit = omap_crtc_commit,
289 .mode_set_base = omap_crtc_mode_set_base,
290 .load_lut = omap_crtc_load_lut,
291};
292
293struct omap_overlay *omap_crtc_get_overlay(struct drm_crtc *crtc)
294{
295 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
296 return omap_crtc->ovl;
297}
298
299/* initialize crtc */
300struct drm_crtc *omap_crtc_init(struct drm_device *dev,
301 struct omap_overlay *ovl, int id)
302{
303 struct drm_crtc *crtc = NULL;
304 struct omap_crtc *omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
305
306 DBG("%s", ovl->name);
307
308 if (!omap_crtc) {
309 dev_err(dev->dev, "could not allocate CRTC\n");
310 goto fail;
311 }
312
313 omap_crtc->ovl = ovl;
314 omap_crtc->id = id;
315 crtc = &omap_crtc->base;
316 drm_crtc_init(dev, crtc, &omap_crtc_funcs);
317 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
318
319 return crtc;
320
321fail:
322 if (crtc) {
323 omap_crtc_destroy(crtc);
324 }
325 return NULL;
326}
diff --git a/drivers/staging/omapdrm/omap_debugfs.c b/drivers/staging/omapdrm/omap_debugfs.c
new file mode 100644
index 000000000000..da920dfdc59c
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_debugfs.c
@@ -0,0 +1,42 @@
1/*
2 * drivers/staging/omapdrm/omap_debugfs.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob.clark@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21#include "omap_dmm_tiler.h"
22
23#ifdef CONFIG_DEBUG_FS
24
25static struct drm_info_list omap_debugfs_list[] = {
26 {"tiler_map", tiler_map_show, 0},
27};
28
29int omap_debugfs_init(struct drm_minor *minor)
30{
31 return drm_debugfs_create_files(omap_debugfs_list,
32 ARRAY_SIZE(omap_debugfs_list),
33 minor->debugfs_root, minor);
34}
35
36void omap_debugfs_cleanup(struct drm_minor *minor)
37{
38 drm_debugfs_remove_files(omap_debugfs_list,
39 ARRAY_SIZE(omap_debugfs_list), minor);
40}
41
42#endif
diff --git a/drivers/staging/omapdrm/omap_dmm_priv.h b/drivers/staging/omapdrm/omap_dmm_priv.h
new file mode 100644
index 000000000000..2f529ab4b7c7
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_dmm_priv.h
@@ -0,0 +1,187 @@
1/*
2 *
3 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * Author: Rob Clark <rob@ti.com>
5 * Andy Gross <andy.gross@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#ifndef OMAP_DMM_PRIV_H
17#define OMAP_DMM_PRIV_H
18
19#define DMM_REVISION 0x000
20#define DMM_HWINFO 0x004
21#define DMM_LISA_HWINFO 0x008
22#define DMM_DMM_SYSCONFIG 0x010
23#define DMM_LISA_LOCK 0x01C
24#define DMM_LISA_MAP__0 0x040
25#define DMM_LISA_MAP__1 0x044
26#define DMM_TILER_HWINFO 0x208
27#define DMM_TILER_OR__0 0x220
28#define DMM_TILER_OR__1 0x224
29#define DMM_PAT_HWINFO 0x408
30#define DMM_PAT_GEOMETRY 0x40C
31#define DMM_PAT_CONFIG 0x410
32#define DMM_PAT_VIEW__0 0x420
33#define DMM_PAT_VIEW__1 0x424
34#define DMM_PAT_VIEW_MAP__0 0x440
35#define DMM_PAT_VIEW_MAP_BASE 0x460
36#define DMM_PAT_IRQ_EOI 0x478
37#define DMM_PAT_IRQSTATUS_RAW 0x480
38#define DMM_PAT_IRQSTATUS 0x490
39#define DMM_PAT_IRQENABLE_SET 0x4A0
40#define DMM_PAT_IRQENABLE_CLR 0x4B0
41#define DMM_PAT_STATUS__0 0x4C0
42#define DMM_PAT_STATUS__1 0x4C4
43#define DMM_PAT_STATUS__2 0x4C8
44#define DMM_PAT_STATUS__3 0x4CC
45#define DMM_PAT_DESCR__0 0x500
46#define DMM_PAT_DESCR__1 0x510
47#define DMM_PAT_DESCR__2 0x520
48#define DMM_PAT_DESCR__3 0x530
49#define DMM_PEG_HWINFO 0x608
50#define DMM_PEG_PRIO 0x620
51#define DMM_PEG_PRIO_PAT 0x640
52
53#define DMM_IRQSTAT_DST (1<<0)
54#define DMM_IRQSTAT_LST (1<<1)
55#define DMM_IRQSTAT_ERR_INV_DSC (1<<2)
56#define DMM_IRQSTAT_ERR_INV_DATA (1<<3)
57#define DMM_IRQSTAT_ERR_UPD_AREA (1<<4)
58#define DMM_IRQSTAT_ERR_UPD_CTRL (1<<5)
59#define DMM_IRQSTAT_ERR_UPD_DATA (1<<6)
60#define DMM_IRQSTAT_ERR_LUT_MISS (1<<7)
61
62#define DMM_IRQSTAT_ERR_MASK (DMM_IRQ_STAT_ERR_INV_DSC | \
63 DMM_IRQ_STAT_ERR_INV_DATA | \
64 DMM_IRQ_STAT_ERR_UPD_AREA | \
65 DMM_IRQ_STAT_ERR_UPD_CTRL | \
66 DMM_IRQ_STAT_ERR_UPD_DATA | \
67 DMM_IRQ_STAT_ERR_LUT_MISS)
68
69#define DMM_PATSTATUS_READY (1<<0)
70#define DMM_PATSTATUS_VALID (1<<1)
71#define DMM_PATSTATUS_RUN (1<<2)
72#define DMM_PATSTATUS_DONE (1<<3)
73#define DMM_PATSTATUS_LINKED (1<<4)
74#define DMM_PATSTATUS_BYPASSED (1<<7)
75#define DMM_PATSTATUS_ERR_INV_DESCR (1<<10)
76#define DMM_PATSTATUS_ERR_INV_DATA (1<<11)
77#define DMM_PATSTATUS_ERR_UPD_AREA (1<<12)
78#define DMM_PATSTATUS_ERR_UPD_CTRL (1<<13)
79#define DMM_PATSTATUS_ERR_UPD_DATA (1<<14)
80#define DMM_PATSTATUS_ERR_ACCESS (1<<15)
81
82/* note: don't treat DMM_PATSTATUS_ERR_ACCESS as an error */
83#define DMM_PATSTATUS_ERR (DMM_PATSTATUS_ERR_INV_DESCR | \
84 DMM_PATSTATUS_ERR_INV_DATA | \
85 DMM_PATSTATUS_ERR_UPD_AREA | \
86 DMM_PATSTATUS_ERR_UPD_CTRL | \
87 DMM_PATSTATUS_ERR_UPD_DATA)
88
89
90
91enum {
92 PAT_STATUS,
93 PAT_DESCR
94};
95
96struct pat_ctrl {
97 u32 start:4;
98 u32 dir:4;
99 u32 lut_id:8;
100 u32 sync:12;
101 u32 ini:4;
102};
103
104struct pat {
105 uint32_t next_pa;
106 struct pat_area area;
107 struct pat_ctrl ctrl;
108 uint32_t data_pa;
109};
110
111#define DMM_FIXED_RETRY_COUNT 1000
112
113/* create refill buffer big enough to refill all slots, plus 3 descriptors..
114 * 3 descriptors is probably the worst-case for # of 2d-slices in a 1d area,
115 * but I guess you don't hit that worst case at the same time as full area
116 * refill
117 */
118#define DESCR_SIZE 128
119#define REFILL_BUFFER_SIZE ((4 * 128 * 256) + (3 * DESCR_SIZE))
120
121struct dmm;
122
123struct dmm_txn {
124 void *engine_handle;
125 struct tcm *tcm;
126
127 uint8_t *current_va;
128 dma_addr_t current_pa;
129
130 struct pat *last_pat;
131};
132
133struct refill_engine {
134 int id;
135 struct dmm *dmm;
136 struct tcm *tcm;
137
138 uint8_t *refill_va;
139 dma_addr_t refill_pa;
140
141 /* only one trans per engine for now */
142 struct dmm_txn txn;
143
144 /* offset to lut associated with container */
145 u32 *lut_offset;
146
147 wait_queue_head_t wait_for_refill;
148
149 struct list_head idle_node;
150};
151
152struct dmm {
153 struct device *dev;
154 void __iomem *base;
155 int irq;
156
157 struct page *dummy_page;
158 dma_addr_t dummy_pa;
159
160 void *refill_va;
161 dma_addr_t refill_pa;
162
163 /* refill engines */
164 struct semaphore engine_sem;
165 struct list_head idle_head;
166 struct refill_engine *engines;
167 int num_engines;
168
169 /* container information */
170 int container_width;
171 int container_height;
172 int lut_width;
173 int lut_height;
174 int num_lut;
175
176 /* array of LUT - TCM containers */
177 struct tcm **tcm;
178
179 /* LUT table storage */
180 u32 *lut;
181
182 /* allocation list and lock */
183 struct list_head alloc_head;
184 spinlock_t list_lock;
185};
186
187#endif
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.c b/drivers/staging/omapdrm/omap_dmm_tiler.c
new file mode 100644
index 000000000000..852d9440f725
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_dmm_tiler.c
@@ -0,0 +1,830 @@
1/*
2 * DMM IOMMU driver support functions for TI OMAP processors.
3 *
4 * Author: Rob Clark <rob@ti.com>
5 * Andy Gross <andy.gross@ti.com>
6 *
7 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18#include <linux/init.h>
19#include <linux/module.h>
20#include <linux/platform_device.h> /* platform_device() */
21#include <linux/errno.h>
22#include <linux/sched.h>
23#include <linux/wait.h>
24#include <linux/interrupt.h>
25#include <linux/dma-mapping.h>
26#include <linux/slab.h>
27#include <linux/vmalloc.h>
28#include <linux/delay.h>
29#include <linux/mm.h>
30#include <linux/time.h>
31#include <linux/list.h>
32#include <linux/semaphore.h>
33
34#include "omap_dmm_tiler.h"
35#include "omap_dmm_priv.h"
36
37/* mappings for associating views to luts */
38static struct tcm *containers[TILFMT_NFORMATS];
39static struct dmm *omap_dmm;
40
41/* Geometry table */
42#define GEOM(xshift, yshift, bytes_per_pixel) { \
43 .x_shft = (xshift), \
44 .y_shft = (yshift), \
45 .cpp = (bytes_per_pixel), \
46 .slot_w = 1 << (SLOT_WIDTH_BITS - (xshift)), \
47 .slot_h = 1 << (SLOT_HEIGHT_BITS - (yshift)), \
48 }
49
50static const struct {
51 uint32_t x_shft; /* unused X-bits (as part of bpp) */
52 uint32_t y_shft; /* unused Y-bits (as part of bpp) */
53 uint32_t cpp; /* bytes/chars per pixel */
54 uint32_t slot_w; /* width of each slot (in pixels) */
55 uint32_t slot_h; /* height of each slot (in pixels) */
56} geom[TILFMT_NFORMATS] = {
57 [TILFMT_8BIT] = GEOM(0, 0, 1),
58 [TILFMT_16BIT] = GEOM(0, 1, 2),
59 [TILFMT_32BIT] = GEOM(1, 1, 4),
60 [TILFMT_PAGE] = GEOM(SLOT_WIDTH_BITS, SLOT_HEIGHT_BITS, 1),
61};
62
63
64/* lookup table for registers w/ per-engine instances */
65static const uint32_t reg[][4] = {
66 [PAT_STATUS] = {DMM_PAT_STATUS__0, DMM_PAT_STATUS__1,
67 DMM_PAT_STATUS__2, DMM_PAT_STATUS__3},
68 [PAT_DESCR] = {DMM_PAT_DESCR__0, DMM_PAT_DESCR__1,
69 DMM_PAT_DESCR__2, DMM_PAT_DESCR__3},
70};
71
72/* simple allocator to grab next 16 byte aligned memory from txn */
73static void *alloc_dma(struct dmm_txn *txn, size_t sz, dma_addr_t *pa)
74{
75 void *ptr;
76 struct refill_engine *engine = txn->engine_handle;
77
78 /* dmm programming requires 16 byte aligned addresses */
79 txn->current_pa = round_up(txn->current_pa, 16);
80 txn->current_va = (void *)round_up((long)txn->current_va, 16);
81
82 ptr = txn->current_va;
83 *pa = txn->current_pa;
84
85 txn->current_pa += sz;
86 txn->current_va += sz;
87
88 BUG_ON((txn->current_va - engine->refill_va) > REFILL_BUFFER_SIZE);
89
90 return ptr;
91}
92
93/* check status and spin until wait_mask comes true */
94static int wait_status(struct refill_engine *engine, uint32_t wait_mask)
95{
96 struct dmm *dmm = engine->dmm;
97 uint32_t r = 0, err, i;
98
99 i = DMM_FIXED_RETRY_COUNT;
100 while (true) {
101 r = readl(dmm->base + reg[PAT_STATUS][engine->id]);
102 err = r & DMM_PATSTATUS_ERR;
103 if (err)
104 return -EFAULT;
105
106 if ((r & wait_mask) == wait_mask)
107 break;
108
109 if (--i == 0)
110 return -ETIMEDOUT;
111
112 udelay(1);
113 }
114
115 return 0;
116}
117
118irqreturn_t omap_dmm_irq_handler(int irq, void *arg)
119{
120 struct dmm *dmm = arg;
121 uint32_t status = readl(dmm->base + DMM_PAT_IRQSTATUS);
122 int i;
123
124 /* ack IRQ */
125 writel(status, dmm->base + DMM_PAT_IRQSTATUS);
126
127 for (i = 0; i < dmm->num_engines; i++) {
128 if (status & DMM_IRQSTAT_LST)
129 wake_up_interruptible(&dmm->engines[i].wait_for_refill);
130
131 status >>= 8;
132 }
133
134 return IRQ_HANDLED;
135}
136
137/**
138 * Get a handle for a DMM transaction
139 */
140static struct dmm_txn *dmm_txn_init(struct dmm *dmm, struct tcm *tcm)
141{
142 struct dmm_txn *txn = NULL;
143 struct refill_engine *engine = NULL;
144
145 down(&dmm->engine_sem);
146
147 /* grab an idle engine */
148 spin_lock(&dmm->list_lock);
149 if (!list_empty(&dmm->idle_head)) {
150 engine = list_entry(dmm->idle_head.next, struct refill_engine,
151 idle_node);
152 list_del(&engine->idle_node);
153 }
154 spin_unlock(&dmm->list_lock);
155
156 BUG_ON(!engine);
157
158 txn = &engine->txn;
159 engine->tcm = tcm;
160 txn->engine_handle = engine;
161 txn->last_pat = NULL;
162 txn->current_va = engine->refill_va;
163 txn->current_pa = engine->refill_pa;
164
165 return txn;
166}
167
168/**
169 * Add region to DMM transaction. If pages or pages[i] is NULL, then the
170 * corresponding slot is cleared (ie. dummy_pa is programmed)
171 */
172static int dmm_txn_append(struct dmm_txn *txn, struct pat_area *area,
173 struct page **pages, uint32_t npages, uint32_t roll)
174{
175 dma_addr_t pat_pa = 0;
176 uint32_t *data;
177 struct pat *pat;
178 struct refill_engine *engine = txn->engine_handle;
179 int columns = (1 + area->x1 - area->x0);
180 int rows = (1 + area->y1 - area->y0);
181 int i = columns*rows;
182 u32 *lut = omap_dmm->lut + (engine->tcm->lut_id * omap_dmm->lut_width *
183 omap_dmm->lut_height) +
184 (area->y0 * omap_dmm->lut_width) + area->x0;
185
186 pat = alloc_dma(txn, sizeof(struct pat), &pat_pa);
187
188 if (txn->last_pat)
189 txn->last_pat->next_pa = (uint32_t)pat_pa;
190
191 pat->area = *area;
192 pat->ctrl = (struct pat_ctrl){
193 .start = 1,
194 .lut_id = engine->tcm->lut_id,
195 };
196
197 data = alloc_dma(txn, 4*i, &pat->data_pa);
198
199 while (i--) {
200 int n = i + roll;
201 if (n >= npages)
202 n -= npages;
203 data[i] = (pages && pages[n]) ?
204 page_to_phys(pages[n]) : engine->dmm->dummy_pa;
205 }
206
207 /* fill in lut with new addresses */
208 for (i = 0; i < rows; i++, lut += omap_dmm->lut_width)
209 memcpy(lut, &data[i*columns], columns * sizeof(u32));
210
211 txn->last_pat = pat;
212
213 return 0;
214}
215
216/**
217 * Commit the DMM transaction.
218 */
219static int dmm_txn_commit(struct dmm_txn *txn, bool wait)
220{
221 int ret = 0;
222 struct refill_engine *engine = txn->engine_handle;
223 struct dmm *dmm = engine->dmm;
224
225 if (!txn->last_pat) {
226 dev_err(engine->dmm->dev, "need at least one txn\n");
227 ret = -EINVAL;
228 goto cleanup;
229 }
230
231 txn->last_pat->next_pa = 0;
232
233 /* write to PAT_DESCR to clear out any pending transaction */
234 writel(0x0, dmm->base + reg[PAT_DESCR][engine->id]);
235
236 /* wait for engine ready: */
237 ret = wait_status(engine, DMM_PATSTATUS_READY);
238 if (ret) {
239 ret = -EFAULT;
240 goto cleanup;
241 }
242
243 /* kick reload */
244 writel(engine->refill_pa,
245 dmm->base + reg[PAT_DESCR][engine->id]);
246
247 if (wait) {
248 if (wait_event_interruptible_timeout(engine->wait_for_refill,
249 wait_status(engine, DMM_PATSTATUS_READY) == 0,
250 msecs_to_jiffies(1)) <= 0) {
251 dev_err(dmm->dev, "timed out waiting for done\n");
252 ret = -ETIMEDOUT;
253 }
254 }
255
256cleanup:
257 spin_lock(&dmm->list_lock);
258 list_add(&engine->idle_node, &dmm->idle_head);
259 spin_unlock(&dmm->list_lock);
260
261 up(&omap_dmm->engine_sem);
262 return ret;
263}
264
265/*
266 * DMM programming
267 */
268static int fill(struct tcm_area *area, struct page **pages,
269 uint32_t npages, uint32_t roll, bool wait)
270{
271 int ret = 0;
272 struct tcm_area slice, area_s;
273 struct dmm_txn *txn;
274
275 txn = dmm_txn_init(omap_dmm, area->tcm);
276 if (IS_ERR_OR_NULL(txn))
277 return PTR_ERR(txn);
278
279 tcm_for_each_slice(slice, *area, area_s) {
280 struct pat_area p_area = {
281 .x0 = slice.p0.x, .y0 = slice.p0.y,
282 .x1 = slice.p1.x, .y1 = slice.p1.y,
283 };
284
285 ret = dmm_txn_append(txn, &p_area, pages, npages, roll);
286 if (ret)
287 goto fail;
288
289 roll += tcm_sizeof(slice);
290 }
291
292 ret = dmm_txn_commit(txn, wait);
293
294fail:
295 return ret;
296}
297
298/*
299 * Pin/unpin
300 */
301
302/* note: slots for which pages[i] == NULL are filled w/ dummy page
303 */
304int tiler_pin(struct tiler_block *block, struct page **pages,
305 uint32_t npages, uint32_t roll, bool wait)
306{
307 int ret;
308
309 ret = fill(&block->area, pages, npages, roll, wait);
310
311 if (ret)
312 tiler_unpin(block);
313
314 return ret;
315}
316
317int tiler_unpin(struct tiler_block *block)
318{
319 return fill(&block->area, NULL, 0, 0, false);
320}
321
322/*
323 * Reserve/release
324 */
325struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w,
326 uint16_t h, uint16_t align)
327{
328 struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL);
329 u32 min_align = 128;
330 int ret;
331
332 BUG_ON(!validfmt(fmt));
333
334 /* convert width/height to slots */
335 w = DIV_ROUND_UP(w, geom[fmt].slot_w);
336 h = DIV_ROUND_UP(h, geom[fmt].slot_h);
337
338 /* convert alignment to slots */
339 min_align = max(min_align, (geom[fmt].slot_w * geom[fmt].cpp));
340 align = ALIGN(align, min_align);
341 align /= geom[fmt].slot_w * geom[fmt].cpp;
342
343 block->fmt = fmt;
344
345 ret = tcm_reserve_2d(containers[fmt], w, h, align, &block->area);
346 if (ret) {
347 kfree(block);
348 return 0;
349 }
350
351 /* add to allocation list */
352 spin_lock(&omap_dmm->list_lock);
353 list_add(&block->alloc_node, &omap_dmm->alloc_head);
354 spin_unlock(&omap_dmm->list_lock);
355
356 return block;
357}
358
359struct tiler_block *tiler_reserve_1d(size_t size)
360{
361 struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL);
362 int num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
363
364 if (!block)
365 return 0;
366
367 block->fmt = TILFMT_PAGE;
368
369 if (tcm_reserve_1d(containers[TILFMT_PAGE], num_pages,
370 &block->area)) {
371 kfree(block);
372 return 0;
373 }
374
375 spin_lock(&omap_dmm->list_lock);
376 list_add(&block->alloc_node, &omap_dmm->alloc_head);
377 spin_unlock(&omap_dmm->list_lock);
378
379 return block;
380}
381
382/* note: if you have pin'd pages, you should have already unpin'd first! */
383int tiler_release(struct tiler_block *block)
384{
385 int ret = tcm_free(&block->area);
386
387 if (block->area.tcm)
388 dev_err(omap_dmm->dev, "failed to release block\n");
389
390 spin_lock(&omap_dmm->list_lock);
391 list_del(&block->alloc_node);
392 spin_unlock(&omap_dmm->list_lock);
393
394 kfree(block);
395 return ret;
396}
397
398/*
399 * Utils
400 */
401
402/* calculate the tiler space address of a pixel in a view orientation */
403static u32 tiler_get_address(u32 orient, enum tiler_fmt fmt, u32 x, u32 y)
404{
405 u32 x_bits, y_bits, tmp, x_mask, y_mask, alignment;
406
407 x_bits = CONT_WIDTH_BITS - geom[fmt].x_shft;
408 y_bits = CONT_HEIGHT_BITS - geom[fmt].y_shft;
409 alignment = geom[fmt].x_shft + geom[fmt].y_shft;
410
411 /* validate coordinate */
412 x_mask = MASK(x_bits);
413 y_mask = MASK(y_bits);
414
415 if (x < 0 || x > x_mask || y < 0 || y > y_mask)
416 return 0;
417
418 /* account for mirroring */
419 if (orient & MASK_X_INVERT)
420 x ^= x_mask;
421 if (orient & MASK_Y_INVERT)
422 y ^= y_mask;
423
424 /* get coordinate address */
425 if (orient & MASK_XY_FLIP)
426 tmp = ((x << y_bits) + y);
427 else
428 tmp = ((y << x_bits) + x);
429
430 return TIL_ADDR((tmp << alignment), orient, fmt);
431}
432
433dma_addr_t tiler_ssptr(struct tiler_block *block)
434{
435 BUG_ON(!validfmt(block->fmt));
436
437 return TILVIEW_8BIT + tiler_get_address(0, block->fmt,
438 block->area.p0.x * geom[block->fmt].slot_w,
439 block->area.p0.y * geom[block->fmt].slot_h);
440}
441
442void tiler_align(enum tiler_fmt fmt, uint16_t *w, uint16_t *h)
443{
444 BUG_ON(!validfmt(fmt));
445 *w = round_up(*w, geom[fmt].slot_w);
446 *h = round_up(*h, geom[fmt].slot_h);
447}
448
449uint32_t tiler_stride(enum tiler_fmt fmt)
450{
451 BUG_ON(!validfmt(fmt));
452
453 return 1 << (CONT_WIDTH_BITS + geom[fmt].y_shft);
454}
455
456size_t tiler_size(enum tiler_fmt fmt, uint16_t w, uint16_t h)
457{
458 tiler_align(fmt, &w, &h);
459 return geom[fmt].cpp * w * h;
460}
461
462size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h)
463{
464 BUG_ON(!validfmt(fmt));
465 return round_up(geom[fmt].cpp * w, PAGE_SIZE) * h;
466}
467
468int omap_dmm_remove(void)
469{
470 struct tiler_block *block, *_block;
471 int i;
472
473 if (omap_dmm) {
474 /* free all area regions */
475 spin_lock(&omap_dmm->list_lock);
476 list_for_each_entry_safe(block, _block, &omap_dmm->alloc_head,
477 alloc_node) {
478 list_del(&block->alloc_node);
479 kfree(block);
480 }
481 spin_unlock(&omap_dmm->list_lock);
482
483 for (i = 0; i < omap_dmm->num_lut; i++)
484 if (omap_dmm->tcm && omap_dmm->tcm[i])
485 omap_dmm->tcm[i]->deinit(omap_dmm->tcm[i]);
486 kfree(omap_dmm->tcm);
487
488 kfree(omap_dmm->engines);
489 if (omap_dmm->refill_va)
490 dma_free_coherent(omap_dmm->dev,
491 REFILL_BUFFER_SIZE * omap_dmm->num_engines,
492 omap_dmm->refill_va,
493 omap_dmm->refill_pa);
494 if (omap_dmm->dummy_page)
495 __free_page(omap_dmm->dummy_page);
496
497 vfree(omap_dmm->lut);
498
499 if (omap_dmm->irq != -1)
500 free_irq(omap_dmm->irq, omap_dmm);
501
502 kfree(omap_dmm);
503 }
504
505 return 0;
506}
507
508int omap_dmm_init(struct drm_device *dev)
509{
510 int ret = -EFAULT, i;
511 struct tcm_area area = {0};
512 u32 hwinfo, pat_geom, lut_table_size;
513 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
514
515 if (!pdata || !pdata->dmm_pdata) {
516 dev_err(dev->dev, "dmm platform data not present, skipping\n");
517 return ret;
518 }
519
520 omap_dmm = kzalloc(sizeof(*omap_dmm), GFP_KERNEL);
521 if (!omap_dmm) {
522 dev_err(dev->dev, "failed to allocate driver data section\n");
523 goto fail;
524 }
525
526 /* lookup hwmod data - base address and irq */
527 omap_dmm->base = pdata->dmm_pdata->base;
528 omap_dmm->irq = pdata->dmm_pdata->irq;
529 omap_dmm->dev = dev->dev;
530
531 if (!omap_dmm->base) {
532 dev_err(dev->dev, "failed to get dmm base address\n");
533 goto fail;
534 }
535
536 hwinfo = readl(omap_dmm->base + DMM_PAT_HWINFO);
537 omap_dmm->num_engines = (hwinfo >> 24) & 0x1F;
538 omap_dmm->num_lut = (hwinfo >> 16) & 0x1F;
539 omap_dmm->container_width = 256;
540 omap_dmm->container_height = 128;
541
542 /* read out actual LUT width and height */
543 pat_geom = readl(omap_dmm->base + DMM_PAT_GEOMETRY);
544 omap_dmm->lut_width = ((pat_geom >> 16) & 0xF) << 5;
545 omap_dmm->lut_height = ((pat_geom >> 24) & 0xF) << 5;
546
547 /* initialize DMM registers */
548 writel(0x88888888, omap_dmm->base + DMM_PAT_VIEW__0);
549 writel(0x88888888, omap_dmm->base + DMM_PAT_VIEW__1);
550 writel(0x80808080, omap_dmm->base + DMM_PAT_VIEW_MAP__0);
551 writel(0x80000000, omap_dmm->base + DMM_PAT_VIEW_MAP_BASE);
552 writel(0x88888888, omap_dmm->base + DMM_TILER_OR__0);
553 writel(0x88888888, omap_dmm->base + DMM_TILER_OR__1);
554
555 ret = request_irq(omap_dmm->irq, omap_dmm_irq_handler, IRQF_SHARED,
556 "omap_dmm_irq_handler", omap_dmm);
557
558 if (ret) {
559 dev_err(dev->dev, "couldn't register IRQ %d, error %d\n",
560 omap_dmm->irq, ret);
561 omap_dmm->irq = -1;
562 goto fail;
563 }
564
565 /* Enable all interrupts for each refill engine except
566 * ERR_LUT_MISS<n> (which is just advisory, and we don't care
567 * about because we want to be able to refill live scanout
568 * buffers for accelerated pan/scroll) and FILL_DSC<n> which
569 * we just generally don't care about.
570 */
571 writel(0x7e7e7e7e, omap_dmm->base + DMM_PAT_IRQENABLE_SET);
572
573 lut_table_size = omap_dmm->lut_width * omap_dmm->lut_height *
574 omap_dmm->num_lut;
575
576 omap_dmm->lut = vmalloc(lut_table_size * sizeof(*omap_dmm->lut));
577 if (!omap_dmm->lut) {
578 dev_err(dev->dev, "could not allocate lut table\n");
579 ret = -ENOMEM;
580 goto fail;
581 }
582
583 omap_dmm->dummy_page = alloc_page(GFP_KERNEL | __GFP_DMA32);
584 if (!omap_dmm->dummy_page) {
585 dev_err(dev->dev, "could not allocate dummy page\n");
586 ret = -ENOMEM;
587 goto fail;
588 }
589 omap_dmm->dummy_pa = page_to_phys(omap_dmm->dummy_page);
590
591 /* alloc refill memory */
592 omap_dmm->refill_va = dma_alloc_coherent(dev->dev,
593 REFILL_BUFFER_SIZE * omap_dmm->num_engines,
594 &omap_dmm->refill_pa, GFP_KERNEL);
595 if (!omap_dmm->refill_va) {
596 dev_err(dev->dev, "could not allocate refill memory\n");
597 goto fail;
598 }
599
600 /* alloc engines */
601 omap_dmm->engines = kzalloc(
602 omap_dmm->num_engines * sizeof(struct refill_engine),
603 GFP_KERNEL);
604 if (!omap_dmm->engines) {
605 dev_err(dev->dev, "could not allocate engines\n");
606 ret = -ENOMEM;
607 goto fail;
608 }
609
610 sema_init(&omap_dmm->engine_sem, omap_dmm->num_engines);
611 INIT_LIST_HEAD(&omap_dmm->idle_head);
612 for (i = 0; i < omap_dmm->num_engines; i++) {
613 omap_dmm->engines[i].id = i;
614 omap_dmm->engines[i].dmm = omap_dmm;
615 omap_dmm->engines[i].refill_va = omap_dmm->refill_va +
616 (REFILL_BUFFER_SIZE * i);
617 omap_dmm->engines[i].refill_pa = omap_dmm->refill_pa +
618 (REFILL_BUFFER_SIZE * i);
619 init_waitqueue_head(&omap_dmm->engines[i].wait_for_refill);
620
621 list_add(&omap_dmm->engines[i].idle_node, &omap_dmm->idle_head);
622 }
623
624 omap_dmm->tcm = kzalloc(omap_dmm->num_lut * sizeof(*omap_dmm->tcm),
625 GFP_KERNEL);
626 if (!omap_dmm->tcm) {
627 dev_err(dev->dev, "failed to allocate lut ptrs\n");
628 ret = -ENOMEM;
629 goto fail;
630 }
631
632 /* init containers */
633 for (i = 0; i < omap_dmm->num_lut; i++) {
634 omap_dmm->tcm[i] = sita_init(omap_dmm->container_width,
635 omap_dmm->container_height,
636 NULL);
637
638 if (!omap_dmm->tcm[i]) {
639 dev_err(dev->dev, "failed to allocate container\n");
640 ret = -ENOMEM;
641 goto fail;
642 }
643
644 omap_dmm->tcm[i]->lut_id = i;
645 }
646
647 /* assign access mode containers to applicable tcm container */
648 /* OMAP 4 has 1 container for all 4 views */
649 containers[TILFMT_8BIT] = omap_dmm->tcm[0];
650 containers[TILFMT_16BIT] = omap_dmm->tcm[0];
651 containers[TILFMT_32BIT] = omap_dmm->tcm[0];
652 containers[TILFMT_PAGE] = omap_dmm->tcm[0];
653
654 INIT_LIST_HEAD(&omap_dmm->alloc_head);
655 spin_lock_init(&omap_dmm->list_lock);
656
657 area = (struct tcm_area) {
658 .is2d = true,
659 .tcm = NULL,
660 .p1.x = omap_dmm->container_width - 1,
661 .p1.y = omap_dmm->container_height - 1,
662 };
663
664 for (i = 0; i < lut_table_size; i++)
665 omap_dmm->lut[i] = omap_dmm->dummy_pa;
666
667 /* initialize all LUTs to dummy page entries */
668 for (i = 0; i < omap_dmm->num_lut; i++) {
669 area.tcm = omap_dmm->tcm[i];
670 if (fill(&area, NULL, 0, 0, true))
671 dev_err(omap_dmm->dev, "refill failed");
672 }
673
674 dev_info(omap_dmm->dev, "initialized all PAT entries\n");
675
676 return 0;
677
678fail:
679 omap_dmm_remove();
680 return ret;
681}
682
683/*
684 * debugfs support
685 */
686
687#ifdef CONFIG_DEBUG_FS
688
689static const char *alphabet = "abcdefghijklmnopqrstuvwxyz"
690 "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789";
691static const char *special = ".,:;'\"`~!^-+";
692
693static void fill_map(char **map, int xdiv, int ydiv, struct tcm_area *a,
694 char c, bool ovw)
695{
696 int x, y;
697 for (y = a->p0.y / ydiv; y <= a->p1.y / ydiv; y++)
698 for (x = a->p0.x / xdiv; x <= a->p1.x / xdiv; x++)
699 if (map[y][x] == ' ' || ovw)
700 map[y][x] = c;
701}
702
703static void fill_map_pt(char **map, int xdiv, int ydiv, struct tcm_pt *p,
704 char c)
705{
706 map[p->y / ydiv][p->x / xdiv] = c;
707}
708
709static char read_map_pt(char **map, int xdiv, int ydiv, struct tcm_pt *p)
710{
711 return map[p->y / ydiv][p->x / xdiv];
712}
713
714static int map_width(int xdiv, int x0, int x1)
715{
716 return (x1 / xdiv) - (x0 / xdiv) + 1;
717}
718
719static void text_map(char **map, int xdiv, char *nice, int yd, int x0, int x1)
720{
721 char *p = map[yd] + (x0 / xdiv);
722 int w = (map_width(xdiv, x0, x1) - strlen(nice)) / 2;
723 if (w >= 0) {
724 p += w;
725 while (*nice)
726 *p++ = *nice++;
727 }
728}
729
730static void map_1d_info(char **map, int xdiv, int ydiv, char *nice,
731 struct tcm_area *a)
732{
733 sprintf(nice, "%dK", tcm_sizeof(*a) * 4);
734 if (a->p0.y + 1 < a->p1.y) {
735 text_map(map, xdiv, nice, (a->p0.y + a->p1.y) / 2 / ydiv, 0,
736 256 - 1);
737 } else if (a->p0.y < a->p1.y) {
738 if (strlen(nice) < map_width(xdiv, a->p0.x, 256 - 1))
739 text_map(map, xdiv, nice, a->p0.y / ydiv,
740 a->p0.x + xdiv, 256 - 1);
741 else if (strlen(nice) < map_width(xdiv, 0, a->p1.x))
742 text_map(map, xdiv, nice, a->p1.y / ydiv,
743 0, a->p1.y - xdiv);
744 } else if (strlen(nice) + 1 < map_width(xdiv, a->p0.x, a->p1.x)) {
745 text_map(map, xdiv, nice, a->p0.y / ydiv, a->p0.x, a->p1.x);
746 }
747}
748
749static void map_2d_info(char **map, int xdiv, int ydiv, char *nice,
750 struct tcm_area *a)
751{
752 sprintf(nice, "(%d*%d)", tcm_awidth(*a), tcm_aheight(*a));
753 if (strlen(nice) + 1 < map_width(xdiv, a->p0.x, a->p1.x))
754 text_map(map, xdiv, nice, (a->p0.y + a->p1.y) / 2 / ydiv,
755 a->p0.x, a->p1.x);
756}
757
758int tiler_map_show(struct seq_file *s, void *arg)
759{
760 int xdiv = 2, ydiv = 1;
761 char **map = NULL, *global_map;
762 struct tiler_block *block;
763 struct tcm_area a, p;
764 int i;
765 const char *m2d = alphabet;
766 const char *a2d = special;
767 const char *m2dp = m2d, *a2dp = a2d;
768 char nice[128];
769 int h_adj = omap_dmm->lut_height / ydiv;
770 int w_adj = omap_dmm->lut_width / xdiv;
771 unsigned long flags;
772
773 map = kzalloc(h_adj * sizeof(*map), GFP_KERNEL);
774 global_map = kzalloc((w_adj + 1) * h_adj, GFP_KERNEL);
775
776 if (!map || !global_map)
777 goto error;
778
779 memset(global_map, ' ', (w_adj + 1) * h_adj);
780 for (i = 0; i < omap_dmm->lut_height; i++) {
781 map[i] = global_map + i * (w_adj + 1);
782 map[i][w_adj] = 0;
783 }
784 spin_lock_irqsave(&omap_dmm->list_lock, flags);
785
786 list_for_each_entry(block, &omap_dmm->alloc_head, alloc_node) {
787 if (block->fmt != TILFMT_PAGE) {
788 fill_map(map, xdiv, ydiv, &block->area, *m2dp, true);
789 if (!*++a2dp)
790 a2dp = a2d;
791 if (!*++m2dp)
792 m2dp = m2d;
793 map_2d_info(map, xdiv, ydiv, nice, &block->area);
794 } else {
795 bool start = read_map_pt(map, xdiv, ydiv,
796 &block->area.p0)
797 == ' ';
798 bool end = read_map_pt(map, xdiv, ydiv, &block->area.p1)
799 == ' ';
800 tcm_for_each_slice(a, block->area, p)
801 fill_map(map, xdiv, ydiv, &a, '=', true);
802 fill_map_pt(map, xdiv, ydiv, &block->area.p0,
803 start ? '<' : 'X');
804 fill_map_pt(map, xdiv, ydiv, &block->area.p1,
805 end ? '>' : 'X');
806 map_1d_info(map, xdiv, ydiv, nice, &block->area);
807 }
808 }
809
810 spin_unlock_irqrestore(&omap_dmm->list_lock, flags);
811
812 if (s) {
813 seq_printf(s, "BEGIN DMM TILER MAP\n");
814 for (i = 0; i < 128; i++)
815 seq_printf(s, "%03d:%s\n", i, map[i]);
816 seq_printf(s, "END TILER MAP\n");
817 } else {
818 dev_dbg(omap_dmm->dev, "BEGIN DMM TILER MAP\n");
819 for (i = 0; i < 128; i++)
820 dev_dbg(omap_dmm->dev, "%03d:%s\n", i, map[i]);
821 dev_dbg(omap_dmm->dev, "END TILER MAP\n");
822 }
823
824error:
825 kfree(map);
826 kfree(global_map);
827
828 return 0;
829}
830#endif
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.h b/drivers/staging/omapdrm/omap_dmm_tiler.h
new file mode 100644
index 000000000000..f87cb657d683
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_dmm_tiler.h
@@ -0,0 +1,135 @@
1/*
2 *
3 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * Author: Rob Clark <rob@ti.com>
5 * Andy Gross <andy.gross@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#ifndef OMAP_DMM_TILER_H
17#define OMAP_DMM_TILER_H
18
19#include "omap_drv.h"
20#include "tcm.h"
21
22enum tiler_fmt {
23 TILFMT_8BIT = 0,
24 TILFMT_16BIT,
25 TILFMT_32BIT,
26 TILFMT_PAGE,
27 TILFMT_NFORMATS
28};
29
30struct pat_area {
31 u32 x0:8;
32 u32 y0:8;
33 u32 x1:8;
34 u32 y1:8;
35};
36
37struct tiler_block {
38 struct list_head alloc_node; /* node for global block list */
39 struct tcm_area area; /* area */
40 enum tiler_fmt fmt; /* format */
41};
42
43/* bits representing the same slot in DMM-TILER hw-block */
44#define SLOT_WIDTH_BITS 6
45#define SLOT_HEIGHT_BITS 6
46
47/* bits reserved to describe coordinates in DMM-TILER hw-block */
48#define CONT_WIDTH_BITS 14
49#define CONT_HEIGHT_BITS 13
50
51/* calculated constants */
52#define TILER_PAGE (1 << (SLOT_WIDTH_BITS + SLOT_HEIGHT_BITS))
53#define TILER_WIDTH (1 << (CONT_WIDTH_BITS - SLOT_WIDTH_BITS))
54#define TILER_HEIGHT (1 << (CONT_HEIGHT_BITS - SLOT_HEIGHT_BITS))
55
56/* tiler space addressing bitfields */
57#define MASK_XY_FLIP (1 << 31)
58#define MASK_Y_INVERT (1 << 30)
59#define MASK_X_INVERT (1 << 29)
60#define SHIFT_ACC_MODE 27
61#define MASK_ACC_MODE 3
62
63#define MASK(bits) ((1 << (bits)) - 1)
64
65#define TILVIEW_8BIT 0x60000000u
66#define TILVIEW_16BIT (TILVIEW_8BIT + VIEW_SIZE)
67#define TILVIEW_32BIT (TILVIEW_16BIT + VIEW_SIZE)
68#define TILVIEW_PAGE (TILVIEW_32BIT + VIEW_SIZE)
69#define TILVIEW_END (TILVIEW_PAGE + VIEW_SIZE)
70
71/* create tsptr by adding view orientation and access mode */
72#define TIL_ADDR(x, orient, a)\
73 ((u32) (x) | (orient) | ((a) << SHIFT_ACC_MODE))
74
75/* externally accessible functions */
76int omap_dmm_init(struct drm_device *dev);
77int omap_dmm_remove(void);
78
79#ifdef CONFIG_DEBUG_FS
80int tiler_map_show(struct seq_file *s, void *arg);
81#endif
82
83/* pin/unpin */
84int tiler_pin(struct tiler_block *block, struct page **pages,
85 uint32_t npages, uint32_t roll, bool wait);
86int tiler_unpin(struct tiler_block *block);
87
88/* reserve/release */
89struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w, uint16_t h,
90 uint16_t align);
91struct tiler_block *tiler_reserve_1d(size_t size);
92int tiler_release(struct tiler_block *block);
93
94/* utilities */
95dma_addr_t tiler_ssptr(struct tiler_block *block);
96uint32_t tiler_stride(enum tiler_fmt fmt);
97size_t tiler_size(enum tiler_fmt fmt, uint16_t w, uint16_t h);
98size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h);
99void tiler_align(enum tiler_fmt fmt, uint16_t *w, uint16_t *h);
100
101
102/* GEM bo flags -> tiler fmt */
103static inline enum tiler_fmt gem2fmt(uint32_t flags)
104{
105 switch (flags & OMAP_BO_TILED) {
106 case OMAP_BO_TILED_8:
107 return TILFMT_8BIT;
108 case OMAP_BO_TILED_16:
109 return TILFMT_16BIT;
110 case OMAP_BO_TILED_32:
111 return TILFMT_32BIT;
112 default:
113 return TILFMT_PAGE;
114 }
115}
116
117static inline bool validfmt(enum tiler_fmt fmt)
118{
119 switch (fmt) {
120 case TILFMT_8BIT:
121 case TILFMT_16BIT:
122 case TILFMT_32BIT:
123 case TILFMT_PAGE:
124 return true;
125 default:
126 return false;
127 }
128}
129
130struct omap_dmm_platform_data {
131 void __iomem *base;
132 int irq;
133};
134
135#endif
diff --git a/drivers/staging/omapdrm/omap_drm.h b/drivers/staging/omapdrm/omap_drm.h
new file mode 100644
index 000000000000..f0ac34a8973e
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_drm.h
@@ -0,0 +1,123 @@
1/*
2 * include/drm/omap_drm.h
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP_DRM_H__
21#define __OMAP_DRM_H__
22
23#include <drm/drm.h>
24
25/* Please note that modifications to all structs defined here are
26 * subject to backwards-compatibility constraints.
27 */
28
29#define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */
30
31struct drm_omap_param {
32 uint64_t param; /* in */
33 uint64_t value; /* in (set_param), out (get_param) */
34};
35
36#define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */
37#define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */
38#define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */
39
40/* cache modes */
41#define OMAP_BO_CACHED 0x00000000 /* default */
42#define OMAP_BO_WC 0x00000002 /* write-combine */
43#define OMAP_BO_UNCACHED 0x00000004 /* strongly-ordered (uncached) */
44
45/* tiled modes */
46#define OMAP_BO_TILED_8 0x00000100
47#define OMAP_BO_TILED_16 0x00000200
48#define OMAP_BO_TILED_32 0x00000300
49#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
50
51union omap_gem_size {
52 uint32_t bytes; /* (for non-tiled formats) */
53 struct {
54 uint16_t width;
55 uint16_t height;
56 } tiled; /* (for tiled formats) */
57};
58
59struct drm_omap_gem_new {
60 union omap_gem_size size; /* in */
61 uint32_t flags; /* in */
62 uint32_t handle; /* out */
63 uint32_t __pad;
64};
65
66/* mask of operations: */
67enum omap_gem_op {
68 OMAP_GEM_READ = 0x01,
69 OMAP_GEM_WRITE = 0x02,
70};
71
72struct drm_omap_gem_cpu_prep {
73 uint32_t handle; /* buffer handle (in) */
74 uint32_t op; /* mask of omap_gem_op (in) */
75};
76
77struct drm_omap_gem_cpu_fini {
78 uint32_t handle; /* buffer handle (in) */
79 uint32_t op; /* mask of omap_gem_op (in) */
80 /* TODO maybe here we pass down info about what regions are touched
81 * by sw so we can be clever about cache ops? For now a placeholder,
82 * set to zero and we just do full buffer flush..
83 */
84 uint32_t nregions;
85 uint32_t __pad;
86};
87
88struct drm_omap_gem_info {
89 uint32_t handle; /* buffer handle (in) */
90 uint32_t pad;
91 uint64_t offset; /* mmap offset (out) */
92 /* note: in case of tiled buffers, the user virtual size can be
93 * different from the physical size (ie. how many pages are needed
94 * to back the object) which is returned in DRM_IOCTL_GEM_OPEN..
95 * This size here is the one that should be used if you want to
96 * mmap() the buffer:
97 */
98 uint32_t size; /* virtual size for mmap'ing (out) */
99 uint32_t __pad;
100};
101
102#define DRM_OMAP_GET_PARAM 0x00
103#define DRM_OMAP_SET_PARAM 0x01
104/* placeholder for plugin-api
105#define DRM_OMAP_GET_BASE 0x02
106*/
107#define DRM_OMAP_GEM_NEW 0x03
108#define DRM_OMAP_GEM_CPU_PREP 0x04
109#define DRM_OMAP_GEM_CPU_FINI 0x05
110#define DRM_OMAP_GEM_INFO 0x06
111#define DRM_OMAP_NUM_IOCTLS 0x07
112
113#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
114#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
115/* placeholder for plugin-api
116#define DRM_IOCTL_OMAP_GET_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_BASE, struct drm_omap_get_base)
117*/
118#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
119#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
120#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
121#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
122
123#endif /* __OMAP_DRM_H__ */
diff --git a/drivers/staging/omapdrm/omap_drv.c b/drivers/staging/omapdrm/omap_drv.c
new file mode 100644
index 000000000000..602aa2dd49c8
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_drv.c
@@ -0,0 +1,821 @@
1/*
2 * drivers/staging/omapdrm/omap_drv.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc_helper.h"
23#include "drm_fb_helper.h"
24
25#define DRIVER_NAME MODULE_NAME
26#define DRIVER_DESC "OMAP DRM"
27#define DRIVER_DATE "20110917"
28#define DRIVER_MAJOR 1
29#define DRIVER_MINOR 0
30#define DRIVER_PATCHLEVEL 0
31
32struct drm_device *drm_device;
33
34static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
35
36MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
37module_param(num_crtc, int, 0600);
38
39/*
40 * mode config funcs
41 */
42
43/* Notes about mapping DSS and DRM entities:
44 * CRTC: overlay
45 * encoder: manager.. with some extension to allow one primary CRTC
46 * and zero or more video CRTC's to be mapped to one encoder?
47 * connector: dssdev.. manager can be attached/detached from different
48 * devices
49 */
50
51static void omap_fb_output_poll_changed(struct drm_device *dev)
52{
53 struct omap_drm_private *priv = dev->dev_private;
54 DBG("dev=%p", dev);
55 if (priv->fbdev) {
56 drm_fb_helper_hotplug_event(priv->fbdev);
57 }
58}
59
60static struct drm_mode_config_funcs omap_mode_config_funcs = {
61 .fb_create = omap_framebuffer_create,
62 .output_poll_changed = omap_fb_output_poll_changed,
63};
64
65static int get_connector_type(struct omap_dss_device *dssdev)
66{
67 switch (dssdev->type) {
68 case OMAP_DISPLAY_TYPE_HDMI:
69 return DRM_MODE_CONNECTOR_HDMIA;
70 case OMAP_DISPLAY_TYPE_DPI:
71 if (!strcmp(dssdev->name, "dvi"))
72 return DRM_MODE_CONNECTOR_DVID;
73 /* fallthrough */
74 default:
75 return DRM_MODE_CONNECTOR_Unknown;
76 }
77}
78
79#if 0 /* enable when dss2 supports hotplug */
80static int omap_drm_notifier(struct notifier_block *nb,
81 unsigned long evt, void *arg)
82{
83 switch (evt) {
84 case OMAP_DSS_SIZE_CHANGE:
85 case OMAP_DSS_HOTPLUG_CONNECT:
86 case OMAP_DSS_HOTPLUG_DISCONNECT: {
87 struct drm_device *dev = drm_device;
88 DBG("hotplug event: evt=%d, dev=%p", evt, dev);
89 if (dev) {
90 drm_sysfs_hotplug_event(dev);
91 }
92 return NOTIFY_OK;
93 }
94 default: /* don't care about other events for now */
95 return NOTIFY_DONE;
96 }
97}
98#endif
99
100static void dump_video_chains(void)
101{
102 int i;
103
104 DBG("dumping video chains: ");
105 for (i = 0; i < omap_dss_get_num_overlays(); i++) {
106 struct omap_overlay *ovl = omap_dss_get_overlay(i);
107 struct omap_overlay_manager *mgr = ovl->manager;
108 struct omap_dss_device *dssdev = mgr ? mgr->device : NULL;
109 if (dssdev) {
110 DBG("%d: %s -> %s -> %s", i, ovl->name, mgr->name,
111 dssdev->name);
112 } else if (mgr) {
113 DBG("%d: %s -> %s", i, ovl->name, mgr->name);
114 } else {
115 DBG("%d: %s", i, ovl->name);
116 }
117 }
118}
119
120/* create encoders for each manager */
121static int create_encoder(struct drm_device *dev,
122 struct omap_overlay_manager *mgr)
123{
124 struct omap_drm_private *priv = dev->dev_private;
125 struct drm_encoder *encoder = omap_encoder_init(dev, mgr);
126
127 if (!encoder) {
128 dev_err(dev->dev, "could not create encoder: %s\n",
129 mgr->name);
130 return -ENOMEM;
131 }
132
133 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
134
135 priv->encoders[priv->num_encoders++] = encoder;
136
137 return 0;
138}
139
140/* create connectors for each display device */
141static int create_connector(struct drm_device *dev,
142 struct omap_dss_device *dssdev)
143{
144 struct omap_drm_private *priv = dev->dev_private;
145 static struct notifier_block *notifier;
146 struct drm_connector *connector;
147 int j;
148
149 if (!dssdev->driver) {
150 dev_warn(dev->dev, "%s has no driver.. skipping it\n",
151 dssdev->name);
152 return 0;
153 }
154
155 if (!(dssdev->driver->get_timings ||
156 dssdev->driver->read_edid)) {
157 dev_warn(dev->dev, "%s driver does not support "
158 "get_timings or read_edid.. skipping it!\n",
159 dssdev->name);
160 return 0;
161 }
162
163 connector = omap_connector_init(dev,
164 get_connector_type(dssdev), dssdev);
165
166 if (!connector) {
167 dev_err(dev->dev, "could not create connector: %s\n",
168 dssdev->name);
169 return -ENOMEM;
170 }
171
172 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
173
174 priv->connectors[priv->num_connectors++] = connector;
175
176#if 0 /* enable when dss2 supports hotplug */
177 notifier = kzalloc(sizeof(struct notifier_block), GFP_KERNEL);
178 notifier->notifier_call = omap_drm_notifier;
179 omap_dss_add_notify(dssdev, notifier);
180#else
181 notifier = NULL;
182#endif
183
184 for (j = 0; j < priv->num_encoders; j++) {
185 struct omap_overlay_manager *mgr =
186 omap_encoder_get_manager(priv->encoders[j]);
187 if (mgr->device == dssdev) {
188 drm_mode_connector_attach_encoder(connector,
189 priv->encoders[j]);
190 }
191 }
192
193 return 0;
194}
195
196/* create up to max_overlays CRTCs mapping to overlays.. by default,
197 * connect the overlays to different managers/encoders, giving priority
198 * to encoders connected to connectors with a detected connection
199 */
200static int create_crtc(struct drm_device *dev, struct omap_overlay *ovl,
201 int *j, unsigned int connected_connectors)
202{
203 struct omap_drm_private *priv = dev->dev_private;
204 struct omap_overlay_manager *mgr = NULL;
205 struct drm_crtc *crtc;
206
207 if (ovl->manager) {
208 DBG("disconnecting %s from %s", ovl->name,
209 ovl->manager->name);
210 ovl->unset_manager(ovl);
211 }
212
213 /* find next best connector, ones with detected connection first
214 */
215 while (*j < priv->num_connectors && !mgr) {
216 if (connected_connectors & (1 << *j)) {
217 struct drm_encoder *encoder =
218 omap_connector_attached_encoder(
219 priv->connectors[*j]);
220 if (encoder) {
221 mgr = omap_encoder_get_manager(encoder);
222 }
223 }
224 (*j)++;
225 }
226
227 /* if we couldn't find another connected connector, lets start
228 * looking at the unconnected connectors:
229 *
230 * note: it might not be immediately apparent, but thanks to
231 * the !mgr check in both this loop and the one above, the only
232 * way to enter this loop is with *j == priv->num_connectors,
233 * so idx can never go negative.
234 */
235 while (*j < 2 * priv->num_connectors && !mgr) {
236 int idx = *j - priv->num_connectors;
237 if (!(connected_connectors & (1 << idx))) {
238 struct drm_encoder *encoder =
239 omap_connector_attached_encoder(
240 priv->connectors[idx]);
241 if (encoder) {
242 mgr = omap_encoder_get_manager(encoder);
243 }
244 }
245 (*j)++;
246 }
247
248 if (mgr) {
249 DBG("connecting %s to %s", ovl->name, mgr->name);
250 ovl->set_manager(ovl, mgr);
251 }
252
253 crtc = omap_crtc_init(dev, ovl, priv->num_crtcs);
254
255 if (!crtc) {
256 dev_err(dev->dev, "could not create CRTC: %s\n",
257 ovl->name);
258 return -ENOMEM;
259 }
260
261 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
262
263 priv->crtcs[priv->num_crtcs++] = crtc;
264
265 return 0;
266}
267
268static int match_dev_name(struct omap_dss_device *dssdev, void *data)
269{
270 return !strcmp(dssdev->name, data);
271}
272
273static unsigned int detect_connectors(struct drm_device *dev)
274{
275 struct omap_drm_private *priv = dev->dev_private;
276 unsigned int connected_connectors = 0;
277 int i;
278
279 for (i = 0; i < priv->num_connectors; i++) {
280 struct drm_connector *connector = priv->connectors[i];
281 if (omap_connector_detect(connector, true) ==
282 connector_status_connected) {
283 connected_connectors |= (1 << i);
284 }
285 }
286
287 return connected_connectors;
288}
289
290static int omap_modeset_init(struct drm_device *dev)
291{
292 const struct omap_drm_platform_data *pdata = dev->dev->platform_data;
293 struct omap_kms_platform_data *kms_pdata = NULL;
294 struct omap_drm_private *priv = dev->dev_private;
295 struct omap_dss_device *dssdev = NULL;
296 int i, j;
297 unsigned int connected_connectors = 0;
298
299 drm_mode_config_init(dev);
300
301 if (pdata && pdata->kms_pdata) {
302 kms_pdata = pdata->kms_pdata;
303
304 /* if platform data is provided by the board file, use it to
305 * control which overlays, managers, and devices we own.
306 */
307 for (i = 0; i < kms_pdata->mgr_cnt; i++) {
308 struct omap_overlay_manager *mgr =
309 omap_dss_get_overlay_manager(
310 kms_pdata->mgr_ids[i]);
311 create_encoder(dev, mgr);
312 }
313
314 for (i = 0; i < kms_pdata->dev_cnt; i++) {
315 struct omap_dss_device *dssdev =
316 omap_dss_find_device(
317 (void *)kms_pdata->dev_names[i],
318 match_dev_name);
319 if (!dssdev) {
320 dev_warn(dev->dev, "no such dssdev: %s\n",
321 kms_pdata->dev_names[i]);
322 continue;
323 }
324 create_connector(dev, dssdev);
325 }
326
327 connected_connectors = detect_connectors(dev);
328
329 j = 0;
330 for (i = 0; i < kms_pdata->ovl_cnt; i++) {
331 struct omap_overlay *ovl =
332 omap_dss_get_overlay(kms_pdata->ovl_ids[i]);
333 create_crtc(dev, ovl, &j, connected_connectors);
334 }
335 } else {
336 /* otherwise just grab up to CONFIG_DRM_OMAP_NUM_CRTCS and try
337 * to make educated guesses about everything else
338 */
339 int max_overlays = min(omap_dss_get_num_overlays(), num_crtc);
340
341 for (i = 0; i < omap_dss_get_num_overlay_managers(); i++) {
342 create_encoder(dev, omap_dss_get_overlay_manager(i));
343 }
344
345 for_each_dss_dev(dssdev) {
346 create_connector(dev, dssdev);
347 }
348
349 connected_connectors = detect_connectors(dev);
350
351 j = 0;
352 for (i = 0; i < max_overlays; i++) {
353 create_crtc(dev, omap_dss_get_overlay(i),
354 &j, connected_connectors);
355 }
356 }
357
358 /* for now keep the mapping of CRTCs and encoders static.. */
359 for (i = 0; i < priv->num_encoders; i++) {
360 struct drm_encoder *encoder = priv->encoders[i];
361 struct omap_overlay_manager *mgr =
362 omap_encoder_get_manager(encoder);
363
364 encoder->possible_crtcs = 0;
365
366 for (j = 0; j < priv->num_crtcs; j++) {
367 struct omap_overlay *ovl =
368 omap_crtc_get_overlay(priv->crtcs[j]);
369 if (ovl->manager == mgr) {
370 encoder->possible_crtcs |= (1 << j);
371 }
372 }
373
374 DBG("%s: possible_crtcs=%08x", mgr->name,
375 encoder->possible_crtcs);
376 }
377
378 dump_video_chains();
379
380 dev->mode_config.min_width = 256;
381 dev->mode_config.min_height = 256;
382
383 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
384 * to fill in these limits properly on different OMAP generations..
385 */
386 dev->mode_config.max_width = 2048;
387 dev->mode_config.max_height = 2048;
388
389 dev->mode_config.funcs = &omap_mode_config_funcs;
390
391 return 0;
392}
393
394static void omap_modeset_free(struct drm_device *dev)
395{
396 drm_mode_config_cleanup(dev);
397}
398
399/*
400 * drm ioctl funcs
401 */
402
403
404static int ioctl_get_param(struct drm_device *dev, void *data,
405 struct drm_file *file_priv)
406{
407 struct drm_omap_param *args = data;
408
409 DBG("%p: param=%llu", dev, args->param);
410
411 switch (args->param) {
412 case OMAP_PARAM_CHIPSET_ID:
413 args->value = GET_OMAP_TYPE;
414 break;
415 default:
416 DBG("unknown parameter %lld", args->param);
417 return -EINVAL;
418 }
419
420 return 0;
421}
422
423static int ioctl_set_param(struct drm_device *dev, void *data,
424 struct drm_file *file_priv)
425{
426 struct drm_omap_param *args = data;
427
428 switch (args->param) {
429 default:
430 DBG("unknown parameter %lld", args->param);
431 return -EINVAL;
432 }
433
434 return 0;
435}
436
437static int ioctl_gem_new(struct drm_device *dev, void *data,
438 struct drm_file *file_priv)
439{
440 struct drm_omap_gem_new *args = data;
441 DBG("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
442 args->size.bytes, args->flags);
443 return omap_gem_new_handle(dev, file_priv, args->size,
444 args->flags, &args->handle);
445}
446
447static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
448 struct drm_file *file_priv)
449{
450 struct drm_omap_gem_cpu_prep *args = data;
451 struct drm_gem_object *obj;
452 int ret;
453
454 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
455
456 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
457 if (!obj) {
458 return -ENOENT;
459 }
460
461 ret = omap_gem_op_sync(obj, args->op);
462
463 if (!ret) {
464 ret = omap_gem_op_start(obj, args->op);
465 }
466
467 drm_gem_object_unreference_unlocked(obj);
468
469 return ret;
470}
471
472static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
473 struct drm_file *file_priv)
474{
475 struct drm_omap_gem_cpu_fini *args = data;
476 struct drm_gem_object *obj;
477 int ret;
478
479 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
480
481 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
482 if (!obj) {
483 return -ENOENT;
484 }
485
486 /* XXX flushy, flushy */
487 ret = 0;
488
489 if (!ret) {
490 ret = omap_gem_op_finish(obj, args->op);
491 }
492
493 drm_gem_object_unreference_unlocked(obj);
494
495 return ret;
496}
497
498static int ioctl_gem_info(struct drm_device *dev, void *data,
499 struct drm_file *file_priv)
500{
501 struct drm_omap_gem_info *args = data;
502 struct drm_gem_object *obj;
503 int ret = 0;
504
505 DBG("%p:%p: handle=%d", dev, file_priv, args->handle);
506
507 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
508 if (!obj) {
509 return -ENOENT;
510 }
511
512 args->size = omap_gem_mmap_size(obj);
513 args->offset = omap_gem_mmap_offset(obj);
514
515 drm_gem_object_unreference_unlocked(obj);
516
517 return ret;
518}
519
520struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
521 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
522 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
523 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
524 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
525 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
526 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
527};
528
529/*
530 * drm driver funcs
531 */
532
533/**
534 * load - setup chip and create an initial config
535 * @dev: DRM device
536 * @flags: startup flags
537 *
538 * The driver load routine has to do several things:
539 * - initialize the memory manager
540 * - allocate initial config memory
541 * - setup the DRM framebuffer with the allocated memory
542 */
543static int dev_load(struct drm_device *dev, unsigned long flags)
544{
545 struct omap_drm_private *priv;
546 int ret;
547
548 DBG("load: dev=%p", dev);
549
550 drm_device = dev;
551
552 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
553 if (!priv) {
554 dev_err(dev->dev, "could not allocate priv\n");
555 return -ENOMEM;
556 }
557
558 dev->dev_private = priv;
559
560 omap_gem_init(dev);
561
562 ret = omap_modeset_init(dev);
563 if (ret) {
564 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
565 dev->dev_private = NULL;
566 kfree(priv);
567 return ret;
568 }
569
570 priv->fbdev = omap_fbdev_init(dev);
571 if (!priv->fbdev) {
572 dev_warn(dev->dev, "omap_fbdev_init failed\n");
573 /* well, limp along without an fbdev.. maybe X11 will work? */
574 }
575
576 drm_kms_helper_poll_init(dev);
577
578 ret = drm_vblank_init(dev, priv->num_crtcs);
579 if (ret) {
580 dev_warn(dev->dev, "could not init vblank\n");
581 }
582
583 return 0;
584}
585
586static int dev_unload(struct drm_device *dev)
587{
588 DBG("unload: dev=%p", dev);
589
590 drm_vblank_cleanup(dev);
591 drm_kms_helper_poll_fini(dev);
592
593 omap_fbdev_free(dev);
594 omap_modeset_free(dev);
595 omap_gem_deinit(dev);
596
597 kfree(dev->dev_private);
598 dev->dev_private = NULL;
599
600 return 0;
601}
602
603static int dev_open(struct drm_device *dev, struct drm_file *file)
604{
605 file->driver_priv = NULL;
606
607 DBG("open: dev=%p, file=%p", dev, file);
608
609 return 0;
610}
611
612static int dev_firstopen(struct drm_device *dev)
613{
614 DBG("firstopen: dev=%p", dev);
615 return 0;
616}
617
618/**
619 * lastclose - clean up after all DRM clients have exited
620 * @dev: DRM device
621 *
622 * Take care of cleaning up after all DRM clients have exited. In the
623 * mode setting case, we want to restore the kernel's initial mode (just
624 * in case the last client left us in a bad state).
625 */
626static void dev_lastclose(struct drm_device *dev)
627{
628 /* we don't support vga-switcheroo.. so just make sure the fbdev
629 * mode is active
630 */
631 struct omap_drm_private *priv = dev->dev_private;
632 int ret;
633
634 DBG("lastclose: dev=%p", dev);
635
636 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
637 if (ret)
638 DBG("failed to restore crtc mode");
639}
640
641static void dev_preclose(struct drm_device *dev, struct drm_file *file)
642{
643 DBG("preclose: dev=%p", dev);
644}
645
646static void dev_postclose(struct drm_device *dev, struct drm_file *file)
647{
648 DBG("postclose: dev=%p, file=%p", dev, file);
649}
650
651/**
652 * enable_vblank - enable vblank interrupt events
653 * @dev: DRM device
654 * @crtc: which irq to enable
655 *
656 * Enable vblank interrupts for @crtc. If the device doesn't have
657 * a hardware vblank counter, this routine should be a no-op, since
658 * interrupts will have to stay on to keep the count accurate.
659 *
660 * RETURNS
661 * Zero on success, appropriate errno if the given @crtc's vblank
662 * interrupt cannot be enabled.
663 */
664static int dev_enable_vblank(struct drm_device *dev, int crtc)
665{
666 DBG("enable_vblank: dev=%p, crtc=%d", dev, crtc);
667 return 0;
668}
669
670/**
671 * disable_vblank - disable vblank interrupt events
672 * @dev: DRM device
673 * @crtc: which irq to enable
674 *
675 * Disable vblank interrupts for @crtc. If the device doesn't have
676 * a hardware vblank counter, this routine should be a no-op, since
677 * interrupts will have to stay on to keep the count accurate.
678 */
679static void dev_disable_vblank(struct drm_device *dev, int crtc)
680{
681 DBG("disable_vblank: dev=%p, crtc=%d", dev, crtc);
682}
683
684static irqreturn_t dev_irq_handler(DRM_IRQ_ARGS)
685{
686 return IRQ_HANDLED;
687}
688
689static void dev_irq_preinstall(struct drm_device *dev)
690{
691 DBG("irq_preinstall: dev=%p", dev);
692}
693
694static int dev_irq_postinstall(struct drm_device *dev)
695{
696 DBG("irq_postinstall: dev=%p", dev);
697 return 0;
698}
699
700static void dev_irq_uninstall(struct drm_device *dev)
701{
702 DBG("irq_uninstall: dev=%p", dev);
703}
704
705static struct vm_operations_struct omap_gem_vm_ops = {
706 .fault = omap_gem_fault,
707 .open = drm_gem_vm_open,
708 .close = drm_gem_vm_close,
709};
710
711static struct drm_driver omap_drm_driver = {
712 .driver_features =
713 DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM,
714 .load = dev_load,
715 .unload = dev_unload,
716 .open = dev_open,
717 .firstopen = dev_firstopen,
718 .lastclose = dev_lastclose,
719 .preclose = dev_preclose,
720 .postclose = dev_postclose,
721 .get_vblank_counter = drm_vblank_count,
722 .enable_vblank = dev_enable_vblank,
723 .disable_vblank = dev_disable_vblank,
724 .irq_preinstall = dev_irq_preinstall,
725 .irq_postinstall = dev_irq_postinstall,
726 .irq_uninstall = dev_irq_uninstall,
727 .irq_handler = dev_irq_handler,
728 .reclaim_buffers = drm_core_reclaim_buffers,
729#ifdef CONFIG_DEBUG_FS
730 .debugfs_init = omap_debugfs_init,
731 .debugfs_cleanup = omap_debugfs_cleanup,
732#endif
733 .gem_init_object = omap_gem_init_object,
734 .gem_free_object = omap_gem_free_object,
735 .gem_vm_ops = &omap_gem_vm_ops,
736 .dumb_create = omap_gem_dumb_create,
737 .dumb_map_offset = omap_gem_dumb_map_offset,
738 .dumb_destroy = omap_gem_dumb_destroy,
739 .ioctls = ioctls,
740 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
741 .fops = {
742 .owner = THIS_MODULE,
743 .open = drm_open,
744 .unlocked_ioctl = drm_ioctl,
745 .release = drm_release,
746 .mmap = omap_gem_mmap,
747 .poll = drm_poll,
748 .fasync = drm_fasync,
749 .read = drm_read,
750 .llseek = noop_llseek,
751 },
752 .name = DRIVER_NAME,
753 .desc = DRIVER_DESC,
754 .date = DRIVER_DATE,
755 .major = DRIVER_MAJOR,
756 .minor = DRIVER_MINOR,
757 .patchlevel = DRIVER_PATCHLEVEL,
758};
759
760static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
761{
762 DBG("");
763 return 0;
764}
765
766static int pdev_resume(struct platform_device *device)
767{
768 DBG("");
769 return 0;
770}
771
772static void pdev_shutdown(struct platform_device *device)
773{
774 DBG("");
775}
776
777static int pdev_probe(struct platform_device *device)
778{
779 DBG("%s", device->name);
780 return drm_platform_init(&omap_drm_driver, device);
781}
782
783static int pdev_remove(struct platform_device *device)
784{
785 DBG("");
786 drm_platform_exit(&omap_drm_driver, device);
787 return 0;
788}
789
790struct platform_driver pdev = {
791 .driver = {
792 .name = DRIVER_NAME,
793 .owner = THIS_MODULE,
794 },
795 .probe = pdev_probe,
796 .remove = pdev_remove,
797 .suspend = pdev_suspend,
798 .resume = pdev_resume,
799 .shutdown = pdev_shutdown,
800};
801
802static int __init omap_drm_init(void)
803{
804 DBG("init");
805 return platform_driver_register(&pdev);
806}
807
808static void __exit omap_drm_fini(void)
809{
810 DBG("fini");
811 platform_driver_unregister(&pdev);
812}
813
814/* need late_initcall() so we load after dss_driver's are loaded */
815late_initcall(omap_drm_init);
816module_exit(omap_drm_fini);
817
818MODULE_AUTHOR("Rob Clark <rob@ti.com>");
819MODULE_DESCRIPTION("OMAP DRM Display Driver");
820MODULE_ALIAS("platform:" DRIVER_NAME);
821MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/omapdrm/omap_drv.h b/drivers/staging/omapdrm/omap_drv.h
new file mode 100644
index 000000000000..76c42515ecc5
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_drv.h
@@ -0,0 +1,135 @@
1/*
2 * drivers/staging/omapdrm/omap_drv.h
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP_DRV_H__
21#define __OMAP_DRV_H__
22
23#include <video/omapdss.h>
24#include <linux/module.h>
25#include <linux/types.h>
26#include <drm/drmP.h>
27#include "omap_drm.h"
28#include "omap_priv.h"
29
30#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
31#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */
32
33#define MODULE_NAME "omapdrm"
34
35/* max # of mapper-id's that can be assigned.. todo, come up with a better
36 * (but still inexpensive) way to store/access per-buffer mapper private
37 * data..
38 */
39#define MAX_MAPPERS 2
40
41struct omap_drm_private {
42 unsigned int num_crtcs;
43 struct drm_crtc *crtcs[8];
44 unsigned int num_encoders;
45 struct drm_encoder *encoders[8];
46 unsigned int num_connectors;
47 struct drm_connector *connectors[8];
48
49 struct drm_fb_helper *fbdev;
50
51 bool has_dmm;
52};
53
54#ifdef CONFIG_DEBUG_FS
55int omap_debugfs_init(struct drm_minor *minor);
56void omap_debugfs_cleanup(struct drm_minor *minor);
57#endif
58
59struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev);
60void omap_fbdev_free(struct drm_device *dev);
61
62struct drm_crtc *omap_crtc_init(struct drm_device *dev,
63 struct omap_overlay *ovl, int id);
64struct omap_overlay *omap_crtc_get_overlay(struct drm_crtc *crtc);
65
66struct drm_encoder *omap_encoder_init(struct drm_device *dev,
67 struct omap_overlay_manager *mgr);
68struct omap_overlay_manager *omap_encoder_get_manager(
69 struct drm_encoder *encoder);
70struct drm_encoder *omap_connector_attached_encoder(
71 struct drm_connector *connector);
72enum drm_connector_status omap_connector_detect(
73 struct drm_connector *connector, bool force);
74
75struct drm_connector *omap_connector_init(struct drm_device *dev,
76 int connector_type, struct omap_dss_device *dssdev);
77void omap_connector_mode_set(struct drm_connector *connector,
78 struct drm_display_mode *mode);
79void omap_connector_flush(struct drm_connector *connector,
80 int x, int y, int w, int h);
81
82struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev,
83 struct drm_file *file, struct drm_mode_fb_cmd *mode_cmd);
84struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
85 struct drm_mode_fb_cmd *mode_cmd, struct drm_gem_object *bo);
86struct drm_gem_object *omap_framebuffer_bo(struct drm_framebuffer *fb);
87int omap_framebuffer_get_buffer(struct drm_framebuffer *fb, int x, int y,
88 void **vaddr, dma_addr_t *paddr, unsigned int *screen_width);
89struct drm_connector *omap_framebuffer_get_next_connector(
90 struct drm_framebuffer *fb, struct drm_connector *from);
91void omap_framebuffer_flush(struct drm_framebuffer *fb,
92 int x, int y, int w, int h);
93
94void omap_gem_init(struct drm_device *dev);
95void omap_gem_deinit(struct drm_device *dev);
96
97struct drm_gem_object *omap_gem_new(struct drm_device *dev,
98 union omap_gem_size gsize, uint32_t flags);
99int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file,
100 union omap_gem_size gsize, uint32_t flags, uint32_t *handle);
101void omap_gem_free_object(struct drm_gem_object *obj);
102int omap_gem_init_object(struct drm_gem_object *obj);
103void *omap_gem_vaddr(struct drm_gem_object *obj);
104int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
105 uint32_t handle, uint64_t *offset);
106int omap_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
107 uint32_t handle);
108int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
109 struct drm_mode_create_dumb *args);
110int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma);
111int omap_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
112int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op);
113int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op);
114int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op);
115int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
116 void (*fxn)(void *arg), void *arg);
117int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll);
118int omap_gem_get_paddr(struct drm_gem_object *obj,
119 dma_addr_t *paddr, bool remap);
120int omap_gem_put_paddr(struct drm_gem_object *obj);
121uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj);
122size_t omap_gem_mmap_size(struct drm_gem_object *obj);
123
124static inline int align_pitch(int pitch, int width, int bpp)
125{
126 int bytespp = (bpp + 7) / 8;
127 /* in case someone tries to feed us a completely bogus stride: */
128 pitch = max(pitch, width * bytespp);
129 /* PVR needs alignment to 8 pixels.. right now that is the most
130 * restrictive stride requirement..
131 */
132 return ALIGN(pitch, 8 * bytespp);
133}
134
135#endif /* __OMAP_DRV_H__ */
diff --git a/drivers/staging/omapdrm/omap_encoder.c b/drivers/staging/omapdrm/omap_encoder.c
new file mode 100644
index 000000000000..06c52cb62d2f
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_encoder.c
@@ -0,0 +1,171 @@
1/*
2 * drivers/staging/omapdrm/omap_encoder.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc.h"
23#include "drm_crtc_helper.h"
24
25/*
26 * encoder funcs
27 */
28
29#define to_omap_encoder(x) container_of(x, struct omap_encoder, base)
30
31struct omap_encoder {
32 struct drm_encoder base;
33 struct omap_overlay_manager *mgr;
34};
35
36static void omap_encoder_destroy(struct drm_encoder *encoder)
37{
38 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
39 DBG("%s", omap_encoder->mgr->name);
40 drm_encoder_cleanup(encoder);
41 kfree(omap_encoder);
42}
43
44static void omap_encoder_dpms(struct drm_encoder *encoder, int mode)
45{
46 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
47 DBG("%s: %d", omap_encoder->mgr->name, mode);
48}
49
50static bool omap_encoder_mode_fixup(struct drm_encoder *encoder,
51 struct drm_display_mode *mode,
52 struct drm_display_mode *adjusted_mode)
53{
54 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
55 DBG("%s", omap_encoder->mgr->name);
56 return true;
57}
58
59static void omap_encoder_mode_set(struct drm_encoder *encoder,
60 struct drm_display_mode *mode,
61 struct drm_display_mode *adjusted_mode)
62{
63 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
64 struct drm_device *dev = encoder->dev;
65 struct omap_drm_private *priv = dev->dev_private;
66 int i;
67
68 mode = adjusted_mode;
69
70 DBG("%s: set mode: %dx%d", omap_encoder->mgr->name,
71 mode->hdisplay, mode->vdisplay);
72
73 for (i = 0; i < priv->num_connectors; i++) {
74 struct drm_connector *connector = priv->connectors[i];
75 if (connector->encoder == encoder) {
76 omap_connector_mode_set(connector, mode);
77 }
78 }
79}
80
81static void omap_encoder_prepare(struct drm_encoder *encoder)
82{
83 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
84 struct drm_encoder_helper_funcs *encoder_funcs =
85 encoder->helper_private;
86 DBG("%s", omap_encoder->mgr->name);
87 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
88}
89
90static void omap_encoder_commit(struct drm_encoder *encoder)
91{
92 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
93 struct drm_encoder_helper_funcs *encoder_funcs =
94 encoder->helper_private;
95 DBG("%s", omap_encoder->mgr->name);
96 omap_encoder->mgr->apply(omap_encoder->mgr);
97 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
98}
99
100static const struct drm_encoder_funcs omap_encoder_funcs = {
101 .destroy = omap_encoder_destroy,
102};
103
104static const struct drm_encoder_helper_funcs omap_encoder_helper_funcs = {
105 .dpms = omap_encoder_dpms,
106 .mode_fixup = omap_encoder_mode_fixup,
107 .mode_set = omap_encoder_mode_set,
108 .prepare = omap_encoder_prepare,
109 .commit = omap_encoder_commit,
110};
111
112struct omap_overlay_manager *omap_encoder_get_manager(
113 struct drm_encoder *encoder)
114{
115 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
116 return omap_encoder->mgr;
117}
118
119/* initialize encoder */
120struct drm_encoder *omap_encoder_init(struct drm_device *dev,
121 struct omap_overlay_manager *mgr)
122{
123 struct drm_encoder *encoder = NULL;
124 struct omap_encoder *omap_encoder;
125 struct omap_overlay_manager_info info;
126 int ret;
127
128 DBG("%s", mgr->name);
129
130 omap_encoder = kzalloc(sizeof(*omap_encoder), GFP_KERNEL);
131 if (!omap_encoder) {
132 dev_err(dev->dev, "could not allocate encoder\n");
133 goto fail;
134 }
135
136 omap_encoder->mgr = mgr;
137 encoder = &omap_encoder->base;
138
139 drm_encoder_init(dev, encoder, &omap_encoder_funcs,
140 DRM_MODE_ENCODER_TMDS);
141 drm_encoder_helper_add(encoder, &omap_encoder_helper_funcs);
142
143 mgr->get_manager_info(mgr, &info);
144
145 /* TODO: fix hard-coded setup.. */
146 info.default_color = 0x00000000;
147 info.trans_key = 0x00000000;
148 info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
149 info.trans_enabled = false;
150
151 ret = mgr->set_manager_info(mgr, &info);
152 if (ret) {
153 dev_err(dev->dev, "could not set manager info\n");
154 goto fail;
155 }
156
157 ret = mgr->apply(mgr);
158 if (ret) {
159 dev_err(dev->dev, "could not apply\n");
160 goto fail;
161 }
162
163 return encoder;
164
165fail:
166 if (encoder) {
167 omap_encoder_destroy(encoder);
168 }
169
170 return NULL;
171}
diff --git a/drivers/staging/omapdrm/omap_fb.c b/drivers/staging/omapdrm/omap_fb.c
new file mode 100644
index 000000000000..0b50c5b3b564
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_fb.c
@@ -0,0 +1,243 @@
1/*
2 * drivers/staging/omapdrm/omap_fb.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc.h"
23#include "drm_crtc_helper.h"
24
25
26/*
27 * framebuffer funcs
28 */
29
30#define to_omap_framebuffer(x) container_of(x, struct omap_framebuffer, base)
31
32struct omap_framebuffer {
33 struct drm_framebuffer base;
34 struct drm_gem_object *bo;
35 int size;
36 dma_addr_t paddr;
37};
38
39static int omap_framebuffer_create_handle(struct drm_framebuffer *fb,
40 struct drm_file *file_priv,
41 unsigned int *handle)
42{
43 struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb);
44 return drm_gem_handle_create(file_priv, omap_fb->bo, handle);
45}
46
47static void omap_framebuffer_destroy(struct drm_framebuffer *fb)
48{
49 struct drm_device *dev = fb->dev;
50 struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb);
51
52 DBG("destroy: FB ID: %d (%p)", fb->base.id, fb);
53
54 drm_framebuffer_cleanup(fb);
55
56 if (omap_fb->bo) {
57 if (omap_fb->paddr && omap_gem_put_paddr(omap_fb->bo))
58 dev_err(dev->dev, "could not unmap!\n");
59 drm_gem_object_unreference_unlocked(omap_fb->bo);
60 }
61
62 kfree(omap_fb);
63}
64
65static int omap_framebuffer_dirty(struct drm_framebuffer *fb,
66 struct drm_file *file_priv, unsigned flags, unsigned color,
67 struct drm_clip_rect *clips, unsigned num_clips)
68{
69 int i;
70
71 for (i = 0; i < num_clips; i++) {
72 omap_framebuffer_flush(fb, clips[i].x1, clips[i].y1,
73 clips[i].x2 - clips[i].x1,
74 clips[i].y2 - clips[i].y1);
75 }
76
77 return 0;
78}
79
80static const struct drm_framebuffer_funcs omap_framebuffer_funcs = {
81 .create_handle = omap_framebuffer_create_handle,
82 .destroy = omap_framebuffer_destroy,
83 .dirty = omap_framebuffer_dirty,
84};
85
86/* returns the buffer size */
87int omap_framebuffer_get_buffer(struct drm_framebuffer *fb, int x, int y,
88 void **vaddr, dma_addr_t *paddr, unsigned int *screen_width)
89{
90 struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb);
91 int bpp = fb->bits_per_pixel / 8;
92 unsigned long offset;
93
94 offset = (x * bpp) + (y * fb->pitch);
95
96 if (vaddr) {
97 void *bo_vaddr = omap_gem_vaddr(omap_fb->bo);
98 /* note: we can only count on having a vaddr for buffers that
99 * are allocated physically contiguously to begin with (ie.
100 * dma_alloc_coherent()). But this should be ok because it
101 * is only used by legacy fbdev
102 */
103 BUG_ON(IS_ERR_OR_NULL(bo_vaddr));
104 *vaddr = bo_vaddr + offset;
105 }
106
107 *paddr = omap_fb->paddr + offset;
108 *screen_width = fb->pitch / bpp;
109
110 return omap_fb->size - offset;
111}
112
113struct drm_gem_object *omap_framebuffer_bo(struct drm_framebuffer *fb)
114{
115 struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb);
116 return omap_fb->bo;
117}
118
119/* iterate thru all the connectors, returning ones that are attached
120 * to the same fb..
121 */
122struct drm_connector *omap_framebuffer_get_next_connector(
123 struct drm_framebuffer *fb, struct drm_connector *from)
124{
125 struct drm_device *dev = fb->dev;
126 struct list_head *connector_list = &dev->mode_config.connector_list;
127 struct drm_connector *connector = from;
128
129 if (!from) {
130 return list_first_entry(connector_list, typeof(*from), head);
131 }
132
133 list_for_each_entry_from(connector, connector_list, head) {
134 if (connector != from) {
135 struct drm_encoder *encoder = connector->encoder;
136 struct drm_crtc *crtc = encoder ? encoder->crtc : NULL;
137 if (crtc && crtc->fb == fb) {
138 return connector;
139 }
140 }
141 }
142
143 return NULL;
144}
145
146/* flush an area of the framebuffer (in case of manual update display that
147 * is not automatically flushed)
148 */
149void omap_framebuffer_flush(struct drm_framebuffer *fb,
150 int x, int y, int w, int h)
151{
152 struct drm_connector *connector = NULL;
153
154 VERB("flush: %d,%d %dx%d, fb=%p", x, y, w, h, fb);
155
156 while ((connector = omap_framebuffer_get_next_connector(fb, connector))) {
157 /* only consider connectors that are part of a chain */
158 if (connector->encoder && connector->encoder->crtc) {
159 /* TODO: maybe this should propagate thru the crtc who
160 * could do the coordinate translation..
161 */
162 struct drm_crtc *crtc = connector->encoder->crtc;
163 int cx = max(0, x - crtc->x);
164 int cy = max(0, y - crtc->y);
165 int cw = w + (x - crtc->x) - cx;
166 int ch = h + (y - crtc->y) - cy;
167
168 omap_connector_flush(connector, cx, cy, cw, ch);
169 }
170 }
171}
172
173struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev,
174 struct drm_file *file, struct drm_mode_fb_cmd *mode_cmd)
175{
176 struct drm_gem_object *bo;
177 struct drm_framebuffer *fb;
178 bo = drm_gem_object_lookup(dev, file, mode_cmd->handle);
179 if (!bo) {
180 return ERR_PTR(-ENOENT);
181 }
182 fb = omap_framebuffer_init(dev, mode_cmd, bo);
183 if (!fb) {
184 return ERR_PTR(-ENOMEM);
185 }
186 return fb;
187}
188
189struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
190 struct drm_mode_fb_cmd *mode_cmd, struct drm_gem_object *bo)
191{
192 struct omap_framebuffer *omap_fb;
193 struct drm_framebuffer *fb = NULL;
194 int size, ret;
195
196 DBG("create framebuffer: dev=%p, mode_cmd=%p (%dx%d@%d)",
197 dev, mode_cmd, mode_cmd->width, mode_cmd->height,
198 mode_cmd->bpp);
199
200 /* in case someone tries to feed us a completely bogus stride: */
201 mode_cmd->pitch = align_pitch(mode_cmd->pitch,
202 mode_cmd->width, mode_cmd->bpp);
203
204 omap_fb = kzalloc(sizeof(*omap_fb), GFP_KERNEL);
205 if (!omap_fb) {
206 dev_err(dev->dev, "could not allocate fb\n");
207 goto fail;
208 }
209
210 fb = &omap_fb->base;
211 ret = drm_framebuffer_init(dev, fb, &omap_framebuffer_funcs);
212 if (ret) {
213 dev_err(dev->dev, "framebuffer init failed: %d\n", ret);
214 goto fail;
215 }
216
217 DBG("create: FB ID: %d (%p)", fb->base.id, fb);
218
219 size = PAGE_ALIGN(mode_cmd->pitch * mode_cmd->height);
220
221 if (size > bo->size) {
222 dev_err(dev->dev, "provided buffer object is too small!\n");
223 goto fail;
224 }
225
226 omap_fb->bo = bo;
227 omap_fb->size = size;
228
229 if (omap_gem_get_paddr(bo, &omap_fb->paddr, true)) {
230 dev_err(dev->dev, "could not map (paddr)!\n");
231 goto fail;
232 }
233
234 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
235
236 return fb;
237
238fail:
239 if (fb) {
240 omap_framebuffer_destroy(fb);
241 }
242 return NULL;
243}
diff --git a/drivers/staging/omapdrm/omap_fbdev.c b/drivers/staging/omapdrm/omap_fbdev.c
new file mode 100644
index 000000000000..093ae2f87b20
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_fbdev.c
@@ -0,0 +1,372 @@
1/*
2 * drivers/staging/omapdrm/omap_fbdev.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc.h"
23#include "drm_fb_helper.h"
24
25MODULE_PARM_DESC(ywrap, "Enable ywrap scrolling (omap44xx and later, default 'y')");
26static bool ywrap_enabled = true;
27module_param_named(ywrap, ywrap_enabled, bool, 0644);
28
29/*
30 * fbdev funcs, to implement legacy fbdev interface on top of drm driver
31 */
32
33#define to_omap_fbdev(x) container_of(x, struct omap_fbdev, base)
34
35struct omap_fbdev {
36 struct drm_fb_helper base;
37 struct drm_framebuffer *fb;
38 struct drm_gem_object *bo;
39 bool ywrap_enabled;
40};
41
42static void omap_fbdev_flush(struct fb_info *fbi, int x, int y, int w, int h);
43static struct drm_fb_helper *get_fb(struct fb_info *fbi);
44
45static ssize_t omap_fbdev_write(struct fb_info *fbi, const char __user *buf,
46 size_t count, loff_t *ppos)
47{
48 ssize_t res;
49
50 res = fb_sys_write(fbi, buf, count, ppos);
51 omap_fbdev_flush(fbi, 0, 0, fbi->var.xres, fbi->var.yres);
52
53 return res;
54}
55
56static void omap_fbdev_fillrect(struct fb_info *fbi,
57 const struct fb_fillrect *rect)
58{
59 sys_fillrect(fbi, rect);
60 omap_fbdev_flush(fbi, rect->dx, rect->dy, rect->width, rect->height);
61}
62
63static void omap_fbdev_copyarea(struct fb_info *fbi,
64 const struct fb_copyarea *area)
65{
66 sys_copyarea(fbi, area);
67 omap_fbdev_flush(fbi, area->dx, area->dy, area->width, area->height);
68}
69
70static void omap_fbdev_imageblit(struct fb_info *fbi,
71 const struct fb_image *image)
72{
73 sys_imageblit(fbi, image);
74 omap_fbdev_flush(fbi, image->dx, image->dy,
75 image->width, image->height);
76}
77
78static int omap_fbdev_pan_display(struct fb_var_screeninfo *var,
79 struct fb_info *fbi)
80{
81 struct drm_fb_helper *helper = get_fb(fbi);
82 struct omap_fbdev *fbdev = to_omap_fbdev(helper);
83 int npages;
84
85 if (!helper)
86 goto fallback;
87
88 if (!fbdev->ywrap_enabled)
89 goto fallback;
90
91 /* DMM roll shifts in 4K pages: */
92 npages = fbi->fix.line_length >> PAGE_SHIFT;
93 omap_gem_roll(fbdev->bo, var->yoffset * npages);
94
95 return 0;
96
97fallback:
98 return drm_fb_helper_pan_display(var, fbi);
99}
100
101static struct fb_ops omap_fb_ops = {
102 .owner = THIS_MODULE,
103
104 /* Note: to properly handle manual update displays, we wrap the
105 * basic fbdev ops which write to the framebuffer
106 */
107 .fb_read = fb_sys_read,
108 .fb_write = omap_fbdev_write,
109 .fb_fillrect = omap_fbdev_fillrect,
110 .fb_copyarea = omap_fbdev_copyarea,
111 .fb_imageblit = omap_fbdev_imageblit,
112
113 .fb_check_var = drm_fb_helper_check_var,
114 .fb_set_par = drm_fb_helper_set_par,
115 .fb_pan_display = omap_fbdev_pan_display,
116 .fb_blank = drm_fb_helper_blank,
117 .fb_setcmap = drm_fb_helper_setcmap,
118
119 .fb_debug_enter = drm_fb_helper_debug_enter,
120 .fb_debug_leave = drm_fb_helper_debug_leave,
121};
122
123static int omap_fbdev_create(struct drm_fb_helper *helper,
124 struct drm_fb_helper_surface_size *sizes)
125{
126 struct omap_fbdev *fbdev = to_omap_fbdev(helper);
127 struct drm_device *dev = helper->dev;
128 struct omap_drm_private *priv = dev->dev_private;
129 struct drm_framebuffer *fb = NULL;
130 union omap_gem_size gsize;
131 struct fb_info *fbi = NULL;
132 struct drm_mode_fb_cmd mode_cmd = {0};
133 dma_addr_t paddr;
134 void __iomem *vaddr;
135 int size, screen_width;
136 int ret;
137
138 /* only doing ARGB32 since this is what is needed to alpha-blend
139 * with video overlays:
140 */
141 sizes->surface_bpp = 32;
142 sizes->surface_depth = 32;
143
144 DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width,
145 sizes->surface_height, sizes->surface_bpp,
146 sizes->fb_width, sizes->fb_height);
147
148 mode_cmd.width = sizes->surface_width;
149 mode_cmd.height = sizes->surface_height;
150
151 mode_cmd.bpp = sizes->surface_bpp;
152 mode_cmd.depth = sizes->surface_depth;
153
154 mode_cmd.pitch = align_pitch(
155 mode_cmd.width * ((mode_cmd.bpp + 7) / 8),
156 mode_cmd.width, mode_cmd.bpp);
157
158 fbdev->ywrap_enabled = priv->has_dmm && ywrap_enabled;
159 if (fbdev->ywrap_enabled) {
160 /* need to align pitch to page size if using DMM scrolling */
161 mode_cmd.pitch = ALIGN(mode_cmd.pitch, PAGE_SIZE);
162 }
163
164 /* allocate backing bo */
165 gsize = (union omap_gem_size){
166 .bytes = PAGE_ALIGN(mode_cmd.pitch * mode_cmd.height),
167 };
168 DBG("allocating %d bytes for fb %d", gsize.bytes, dev->primary->index);
169 fbdev->bo = omap_gem_new(dev, gsize, OMAP_BO_SCANOUT | OMAP_BO_WC);
170 if (!fbdev->bo) {
171 dev_err(dev->dev, "failed to allocate buffer object\n");
172 goto fail;
173 }
174
175 fb = omap_framebuffer_init(dev, &mode_cmd, fbdev->bo);
176 if (!fb) {
177 dev_err(dev->dev, "failed to allocate fb\n");
178 ret = -ENOMEM;
179 goto fail;
180 }
181
182 mutex_lock(&dev->struct_mutex);
183
184 fbi = framebuffer_alloc(0, dev->dev);
185 if (!fbi) {
186 dev_err(dev->dev, "failed to allocate fb info\n");
187 ret = -ENOMEM;
188 goto fail_unlock;
189 }
190
191 DBG("fbi=%p, dev=%p", fbi, dev);
192
193 fbdev->fb = fb;
194 helper->fb = fb;
195 helper->fbdev = fbi;
196
197 fbi->par = helper;
198 fbi->flags = FBINFO_DEFAULT;
199 fbi->fbops = &omap_fb_ops;
200
201 strcpy(fbi->fix.id, MODULE_NAME);
202
203 ret = fb_alloc_cmap(&fbi->cmap, 256, 0);
204 if (ret) {
205 ret = -ENOMEM;
206 goto fail_unlock;
207 }
208
209 drm_fb_helper_fill_fix(fbi, fb->pitch, fb->depth);
210 drm_fb_helper_fill_var(fbi, helper, sizes->fb_width, sizes->fb_height);
211
212 size = omap_framebuffer_get_buffer(fb, 0, 0,
213 &vaddr, &paddr, &screen_width);
214
215 dev->mode_config.fb_base = paddr;
216
217 fbi->screen_base = vaddr;
218 fbi->screen_size = size;
219 fbi->fix.smem_start = paddr;
220 fbi->fix.smem_len = size;
221
222 /* if we have DMM, then we can use it for scrolling by just
223 * shuffling pages around in DMM rather than doing sw blit.
224 */
225 if (fbdev->ywrap_enabled) {
226 DRM_INFO("Enabling DMM ywrap scrolling\n");
227 fbi->flags |= FBINFO_HWACCEL_YWRAP | FBINFO_READS_FAST;
228 fbi->fix.ywrapstep = 1;
229 }
230
231
232 DBG("par=%p, %dx%d", fbi->par, fbi->var.xres, fbi->var.yres);
233 DBG("allocated %dx%d fb", fbdev->fb->width, fbdev->fb->height);
234
235 mutex_unlock(&dev->struct_mutex);
236
237 return 0;
238
239fail_unlock:
240 mutex_unlock(&dev->struct_mutex);
241fail:
242
243 if (ret) {
244 if (fbi)
245 framebuffer_release(fbi);
246 if (fb)
247 fb->funcs->destroy(fb);
248 }
249
250 return ret;
251}
252
253static void omap_crtc_fb_gamma_set(struct drm_crtc *crtc,
254 u16 red, u16 green, u16 blue, int regno)
255{
256 DBG("fbdev: set gamma");
257}
258
259static void omap_crtc_fb_gamma_get(struct drm_crtc *crtc,
260 u16 *red, u16 *green, u16 *blue, int regno)
261{
262 DBG("fbdev: get gamma");
263}
264
265static int omap_fbdev_probe(struct drm_fb_helper *helper,
266 struct drm_fb_helper_surface_size *sizes)
267{
268 int new_fb = 0;
269 int ret;
270
271 if (!helper->fb) {
272 ret = omap_fbdev_create(helper, sizes);
273 if (ret)
274 return ret;
275 new_fb = 1;
276 }
277 return new_fb;
278}
279
280static struct drm_fb_helper_funcs omap_fb_helper_funcs = {
281 .gamma_set = omap_crtc_fb_gamma_set,
282 .gamma_get = omap_crtc_fb_gamma_get,
283 .fb_probe = omap_fbdev_probe,
284};
285
286static struct drm_fb_helper *get_fb(struct fb_info *fbi)
287{
288 if (!fbi || strcmp(fbi->fix.id, MODULE_NAME)) {
289 /* these are not the fb's you're looking for */
290 return NULL;
291 }
292 return fbi->par;
293}
294
295/* flush an area of the framebuffer (in case of manual update display that
296 * is not automatically flushed)
297 */
298static void omap_fbdev_flush(struct fb_info *fbi, int x, int y, int w, int h)
299{
300 struct drm_fb_helper *helper = get_fb(fbi);
301
302 if (!helper)
303 return;
304
305 VERB("flush fbdev: %d,%d %dx%d, fbi=%p", x, y, w, h, fbi);
306
307 omap_framebuffer_flush(helper->fb, x, y, w, h);
308}
309
310/* initialize fbdev helper */
311struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev)
312{
313 struct omap_drm_private *priv = dev->dev_private;
314 struct omap_fbdev *fbdev = NULL;
315 struct drm_fb_helper *helper;
316 int ret = 0;
317
318 fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
319 if (!fbdev) {
320 dev_err(dev->dev, "could not allocate fbdev\n");
321 goto fail;
322 }
323
324 helper = &fbdev->base;
325
326 helper->funcs = &omap_fb_helper_funcs;
327
328 ret = drm_fb_helper_init(dev, helper,
329 priv->num_crtcs, priv->num_connectors);
330 if (ret) {
331 dev_err(dev->dev, "could not init fbdev: ret=%d\n", ret);
332 goto fail;
333 }
334
335 drm_fb_helper_single_add_all_connectors(helper);
336 drm_fb_helper_initial_config(helper, 32);
337
338 priv->fbdev = helper;
339
340 return helper;
341
342fail:
343 kfree(fbdev);
344 return NULL;
345}
346
347void omap_fbdev_free(struct drm_device *dev)
348{
349 struct omap_drm_private *priv = dev->dev_private;
350 struct drm_fb_helper *helper = priv->fbdev;
351 struct omap_fbdev *fbdev;
352 struct fb_info *fbi;
353
354 DBG();
355
356 fbi = helper->fbdev;
357
358 unregister_framebuffer(fbi);
359 framebuffer_release(fbi);
360
361 drm_fb_helper_fini(helper);
362
363 fbdev = to_omap_fbdev(priv->fbdev);
364
365 kfree(fbdev);
366
367 /* this will free the backing object */
368 if (fbdev->fb)
369 fbdev->fb->funcs->destroy(fbdev->fb);
370
371 priv->fbdev = NULL;
372}
diff --git a/drivers/staging/omapdrm/omap_gem.c b/drivers/staging/omapdrm/omap_gem.c
new file mode 100644
index 000000000000..e0ebd1d139f6
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_gem.c
@@ -0,0 +1,1231 @@
1/*
2 * drivers/staging/omapdrm/omap_gem.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob.clark@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20
21#include <linux/spinlock.h>
22#include <linux/shmem_fs.h>
23
24#include "omap_drv.h"
25#include "omap_dmm_tiler.h"
26
27/* remove these once drm core helpers are merged */
28struct page ** _drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
29void _drm_gem_put_pages(struct drm_gem_object *obj, struct page **pages,
30 bool dirty, bool accessed);
31int _drm_gem_create_mmap_offset_size(struct drm_gem_object *obj, size_t size);
32
33/*
34 * GEM buffer object implementation.
35 */
36
37#define to_omap_bo(x) container_of(x, struct omap_gem_object, base)
38
39/* note: we use upper 8 bits of flags for driver-internal flags: */
40#define OMAP_BO_DMA 0x01000000 /* actually is physically contiguous */
41#define OMAP_BO_EXT_SYNC 0x02000000 /* externally allocated sync object */
42#define OMAP_BO_EXT_MEM 0x04000000 /* externally allocated memory */
43
44
45struct omap_gem_object {
46 struct drm_gem_object base;
47
48 uint32_t flags;
49
50 /** width/height for tiled formats (rounded up to slot boundaries) */
51 uint16_t width, height;
52
53 /** roll applied when mapping to DMM */
54 uint32_t roll;
55
56 /**
57 * If buffer is allocated physically contiguous, the OMAP_BO_DMA flag
58 * is set and the paddr is valid. Also if the buffer is remapped in
59 * TILER and paddr_cnt > 0, then paddr is valid. But if you are using
60 * the physical address and OMAP_BO_DMA is not set, then you should
61 * be going thru omap_gem_{get,put}_paddr() to ensure the mapping is
62 * not removed from under your feet.
63 *
64 * Note that OMAP_BO_SCANOUT is a hint from userspace that DMA capable
65 * buffer is requested, but doesn't mean that it is. Use the
66 * OMAP_BO_DMA flag to determine if the buffer has a DMA capable
67 * physical address.
68 */
69 dma_addr_t paddr;
70
71 /**
72 * # of users of paddr
73 */
74 uint32_t paddr_cnt;
75
76 /**
77 * tiler block used when buffer is remapped in DMM/TILER.
78 */
79 struct tiler_block *block;
80
81 /**
82 * Array of backing pages, if allocated. Note that pages are never
83 * allocated for buffers originally allocated from contiguous memory
84 */
85 struct page **pages;
86
87 /** addresses corresponding to pages in above array */
88 dma_addr_t *addrs;
89
90 /**
91 * Virtual address, if mapped.
92 */
93 void *vaddr;
94
95 /**
96 * sync-object allocated on demand (if needed)
97 *
98 * Per-buffer sync-object for tracking pending and completed hw/dma
99 * read and write operations. The layout in memory is dictated by
100 * the SGX firmware, which uses this information to stall the command
101 * stream if a surface is not ready yet.
102 *
103 * Note that when buffer is used by SGX, the sync-object needs to be
104 * allocated from a special heap of sync-objects. This way many sync
105 * objects can be packed in a page, and not waste GPU virtual address
106 * space. Because of this we have to have a omap_gem_set_sync_object()
107 * API to allow replacement of the syncobj after it has (potentially)
108 * already been allocated. A bit ugly but I haven't thought of a
109 * better alternative.
110 */
111 struct {
112 uint32_t write_pending;
113 uint32_t write_complete;
114 uint32_t read_pending;
115 uint32_t read_complete;
116 } *sync;
117};
118
119/* To deal with userspace mmap'ings of 2d tiled buffers, which (a) are
120 * not necessarily pinned in TILER all the time, and (b) when they are
121 * they are not necessarily page aligned, we reserve one or more small
122 * regions in each of the 2d containers to use as a user-GART where we
123 * can create a second page-aligned mapping of parts of the buffer
124 * being accessed from userspace.
125 *
126 * Note that we could optimize slightly when we know that multiple
127 * tiler containers are backed by the same PAT.. but I'll leave that
128 * for later..
129 */
130#define NUM_USERGART_ENTRIES 2
131struct usergart_entry {
132 struct tiler_block *block; /* the reserved tiler block */
133 dma_addr_t paddr;
134 struct drm_gem_object *obj; /* the current pinned obj */
135 pgoff_t obj_pgoff; /* page offset of obj currently
136 mapped in */
137};
138static struct {
139 struct usergart_entry entry[NUM_USERGART_ENTRIES];
140 int height; /* height in rows */
141 int height_shift; /* ilog2(height in rows) */
142 int slot_shift; /* ilog2(width per slot) */
143 int stride_pfn; /* stride in pages */
144 int last; /* index of last used entry */
145} *usergart;
146
147static void evict_entry(struct drm_gem_object *obj,
148 enum tiler_fmt fmt, struct usergart_entry *entry)
149{
150 if (obj->dev->dev_mapping) {
151 size_t size = PAGE_SIZE * usergart[fmt].height;
152 loff_t off = omap_gem_mmap_offset(obj) +
153 (entry->obj_pgoff << PAGE_SHIFT);
154 unmap_mapping_range(obj->dev->dev_mapping, off, size, 1);
155 }
156
157 entry->obj = NULL;
158}
159
160/* Evict a buffer from usergart, if it is mapped there */
161static void evict(struct drm_gem_object *obj)
162{
163 struct omap_gem_object *omap_obj = to_omap_bo(obj);
164
165 if (omap_obj->flags & OMAP_BO_TILED) {
166 enum tiler_fmt fmt = gem2fmt(omap_obj->flags);
167 int i;
168
169 if (!usergart)
170 return;
171
172 for (i = 0; i < NUM_USERGART_ENTRIES; i++) {
173 struct usergart_entry *entry = &usergart[fmt].entry[i];
174 if (entry->obj == obj)
175 evict_entry(obj, fmt, entry);
176 }
177 }
178}
179
180/* GEM objects can either be allocated from contiguous memory (in which
181 * case obj->filp==NULL), or w/ shmem backing (obj->filp!=NULL). But non
182 * contiguous buffers can be remapped in TILER/DMM if they need to be
183 * contiguous... but we don't do this all the time to reduce pressure
184 * on TILER/DMM space when we know at allocation time that the buffer
185 * will need to be scanned out.
186 */
187static inline bool is_shmem(struct drm_gem_object *obj)
188{
189 return obj->filp != NULL;
190}
191
192static int get_pages(struct drm_gem_object *obj, struct page ***pages);
193
194static DEFINE_SPINLOCK(sync_lock);
195
196/** ensure backing pages are allocated */
197static int omap_gem_attach_pages(struct drm_gem_object *obj)
198{
199 struct omap_gem_object *omap_obj = to_omap_bo(obj);
200 struct page **pages;
201
202 WARN_ON(omap_obj->pages);
203
204 /* TODO: __GFP_DMA32 .. but somehow GFP_HIGHMEM is coming from the
205 * mapping_gfp_mask(mapping) which conflicts w/ GFP_DMA32.. probably
206 * we actually want CMA memory for it all anyways..
207 */
208 pages = _drm_gem_get_pages(obj, GFP_KERNEL);
209 if (IS_ERR(pages)) {
210 dev_err(obj->dev->dev, "could not get pages: %ld\n", PTR_ERR(pages));
211 return PTR_ERR(pages);
212 }
213
214 /* for non-cached buffers, ensure the new pages are clean because
215 * DSS, GPU, etc. are not cache coherent:
216 */
217 if (omap_obj->flags & (OMAP_BO_WC|OMAP_BO_UNCACHED)) {
218 int i, npages = obj->size >> PAGE_SHIFT;
219 dma_addr_t *addrs = kmalloc(npages * sizeof(addrs), GFP_KERNEL);
220 for (i = 0; i < npages; i++) {
221 addrs[i] = dma_map_page(obj->dev->dev, pages[i],
222 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
223 }
224 omap_obj->addrs = addrs;
225 }
226
227 omap_obj->pages = pages;
228 return 0;
229}
230
231/** release backing pages */
232static void omap_gem_detach_pages(struct drm_gem_object *obj)
233{
234 struct omap_gem_object *omap_obj = to_omap_bo(obj);
235
236 /* for non-cached buffers, ensure the new pages are clean because
237 * DSS, GPU, etc. are not cache coherent:
238 */
239 if (omap_obj->flags & (OMAP_BO_WC|OMAP_BO_UNCACHED)) {
240 int i, npages = obj->size >> PAGE_SHIFT;
241 for (i = 0; i < npages; i++) {
242 dma_unmap_page(obj->dev->dev, omap_obj->addrs[i],
243 PAGE_SIZE, DMA_BIDIRECTIONAL);
244 }
245 kfree(omap_obj->addrs);
246 omap_obj->addrs = NULL;
247 }
248
249 _drm_gem_put_pages(obj, omap_obj->pages, true, false);
250 omap_obj->pages = NULL;
251}
252
253/** get mmap offset */
254uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj)
255{
256 if (!obj->map_list.map) {
257 /* Make it mmapable */
258 size_t size = omap_gem_mmap_size(obj);
259 int ret = _drm_gem_create_mmap_offset_size(obj, size);
260
261 if (ret) {
262 dev_err(obj->dev->dev, "could not allocate mmap offset");
263 return 0;
264 }
265 }
266
267 return (uint64_t)obj->map_list.hash.key << PAGE_SHIFT;
268}
269
270/** get mmap size */
271size_t omap_gem_mmap_size(struct drm_gem_object *obj)
272{
273 struct omap_gem_object *omap_obj = to_omap_bo(obj);
274 size_t size = obj->size;
275
276 if (omap_obj->flags & OMAP_BO_TILED) {
277 /* for tiled buffers, the virtual size has stride rounded up
278 * to 4kb.. (to hide the fact that row n+1 might start 16kb or
279 * 32kb later!). But we don't back the entire buffer with
280 * pages, only the valid picture part.. so need to adjust for
281 * this in the size used to mmap and generate mmap offset
282 */
283 size = tiler_vsize(gem2fmt(omap_obj->flags),
284 omap_obj->width, omap_obj->height);
285 }
286
287 return size;
288}
289
290
291/* Normal handling for the case of faulting in non-tiled buffers */
292static int fault_1d(struct drm_gem_object *obj,
293 struct vm_area_struct *vma, struct vm_fault *vmf)
294{
295 struct omap_gem_object *omap_obj = to_omap_bo(obj);
296 unsigned long pfn;
297 pgoff_t pgoff;
298
299 /* We don't use vmf->pgoff since that has the fake offset: */
300 pgoff = ((unsigned long)vmf->virtual_address -
301 vma->vm_start) >> PAGE_SHIFT;
302
303 if (omap_obj->pages) {
304 pfn = page_to_pfn(omap_obj->pages[pgoff]);
305 } else {
306 BUG_ON(!(omap_obj->flags & OMAP_BO_DMA));
307 pfn = (omap_obj->paddr >> PAGE_SHIFT) + pgoff;
308 }
309
310 VERB("Inserting %p pfn %lx, pa %lx", vmf->virtual_address,
311 pfn, pfn << PAGE_SHIFT);
312
313 return vm_insert_mixed(vma, (unsigned long)vmf->virtual_address, pfn);
314}
315
316/* Special handling for the case of faulting in 2d tiled buffers */
317static int fault_2d(struct drm_gem_object *obj,
318 struct vm_area_struct *vma, struct vm_fault *vmf)
319{
320 struct omap_gem_object *omap_obj = to_omap_bo(obj);
321 struct usergart_entry *entry;
322 enum tiler_fmt fmt = gem2fmt(omap_obj->flags);
323 struct page *pages[64]; /* XXX is this too much to have on stack? */
324 unsigned long pfn;
325 pgoff_t pgoff, base_pgoff;
326 void __user *vaddr;
327 int i, ret, slots;
328
329 if (!usergart)
330 return -EFAULT;
331
332 /* TODO: this fxn might need a bit tweaking to deal w/ tiled buffers
333 * that are wider than 4kb
334 */
335
336 /* We don't use vmf->pgoff since that has the fake offset: */
337 pgoff = ((unsigned long)vmf->virtual_address -
338 vma->vm_start) >> PAGE_SHIFT;
339
340 /* actual address we start mapping at is rounded down to previous slot
341 * boundary in the y direction:
342 */
343 base_pgoff = round_down(pgoff, usergart[fmt].height);
344 vaddr = vmf->virtual_address - ((pgoff - base_pgoff) << PAGE_SHIFT);
345 entry = &usergart[fmt].entry[usergart[fmt].last];
346
347 slots = omap_obj->width >> usergart[fmt].slot_shift;
348
349 /* evict previous buffer using this usergart entry, if any: */
350 if (entry->obj)
351 evict_entry(entry->obj, fmt, entry);
352
353 entry->obj = obj;
354 entry->obj_pgoff = base_pgoff;
355
356 /* now convert base_pgoff to phys offset from virt offset:
357 */
358 base_pgoff = (base_pgoff >> usergart[fmt].height_shift) * slots;
359
360 /* map in pages. Note the height of the slot is also equal to the
361 * number of pages that need to be mapped in to fill 4kb wide CPU page.
362 * If the height is 64, then 64 pages fill a 4kb wide by 64 row region.
363 * Beyond the valid pixel part of the buffer, we set pages[i] to NULL to
364 * get a dummy page mapped in.. if someone reads/writes it they will get
365 * random/undefined content, but at least it won't be corrupting
366 * whatever other random page used to be mapped in, or other undefined
367 * behavior.
368 */
369 memcpy(pages, &omap_obj->pages[base_pgoff],
370 sizeof(struct page *) * slots);
371 memset(pages + slots, 0,
372 sizeof(struct page *) * (usergart[fmt].height - slots));
373
374 ret = tiler_pin(entry->block, pages, ARRAY_SIZE(pages), 0, true);
375 if (ret) {
376 dev_err(obj->dev->dev, "failed to pin: %d\n", ret);
377 return ret;
378 }
379
380 i = usergart[fmt].height;
381 pfn = entry->paddr >> PAGE_SHIFT;
382
383 VERB("Inserting %p pfn %lx, pa %lx", vmf->virtual_address,
384 pfn, pfn << PAGE_SHIFT);
385
386 while (i--) {
387 vm_insert_mixed(vma, (unsigned long)vaddr, pfn);
388 pfn += usergart[fmt].stride_pfn;
389 vaddr += PAGE_SIZE;
390 }
391
392 /* simple round-robin: */
393 usergart[fmt].last = (usergart[fmt].last + 1) % NUM_USERGART_ENTRIES;
394
395 return 0;
396}
397
398/**
399 * omap_gem_fault - pagefault handler for GEM objects
400 * @vma: the VMA of the GEM object
401 * @vmf: fault detail
402 *
403 * Invoked when a fault occurs on an mmap of a GEM managed area. GEM
404 * does most of the work for us including the actual map/unmap calls
405 * but we need to do the actual page work.
406 *
407 * The VMA was set up by GEM. In doing so it also ensured that the
408 * vma->vm_private_data points to the GEM object that is backing this
409 * mapping.
410 */
411int omap_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
412{
413 struct drm_gem_object *obj = vma->vm_private_data;
414 struct omap_gem_object *omap_obj = to_omap_bo(obj);
415 struct drm_device *dev = obj->dev;
416 struct page **pages;
417 int ret;
418
419 /* Make sure we don't parallel update on a fault, nor move or remove
420 * something from beneath our feet
421 */
422 mutex_lock(&dev->struct_mutex);
423
424 /* if a shmem backed object, make sure we have pages attached now */
425 ret = get_pages(obj, &pages);
426 if (ret) {
427 goto fail;
428 }
429
430 /* where should we do corresponding put_pages().. we are mapping
431 * the original page, rather than thru a GART, so we can't rely
432 * on eviction to trigger this. But munmap() or all mappings should
433 * probably trigger put_pages()?
434 */
435
436 if (omap_obj->flags & OMAP_BO_TILED)
437 ret = fault_2d(obj, vma, vmf);
438 else
439 ret = fault_1d(obj, vma, vmf);
440
441
442fail:
443 mutex_unlock(&dev->struct_mutex);
444 switch (ret) {
445 case 0:
446 case -ERESTARTSYS:
447 case -EINTR:
448 return VM_FAULT_NOPAGE;
449 case -ENOMEM:
450 return VM_FAULT_OOM;
451 default:
452 return VM_FAULT_SIGBUS;
453 }
454}
455
456/** We override mainly to fix up some of the vm mapping flags.. */
457int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma)
458{
459 struct omap_gem_object *omap_obj;
460 int ret;
461
462 ret = drm_gem_mmap(filp, vma);
463 if (ret) {
464 DBG("mmap failed: %d", ret);
465 return ret;
466 }
467
468 /* after drm_gem_mmap(), it is safe to access the obj */
469 omap_obj = to_omap_bo(vma->vm_private_data);
470
471 vma->vm_flags &= ~VM_PFNMAP;
472 vma->vm_flags |= VM_MIXEDMAP;
473
474 if (omap_obj->flags & OMAP_BO_WC) {
475 vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
476 } else if (omap_obj->flags & OMAP_BO_UNCACHED) {
477 vma->vm_page_prot = pgprot_noncached(vm_get_page_prot(vma->vm_flags));
478 } else {
479 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
480 }
481
482 return ret;
483}
484
485/**
486 * omap_gem_dumb_create - create a dumb buffer
487 * @drm_file: our client file
488 * @dev: our device
489 * @args: the requested arguments copied from userspace
490 *
491 * Allocate a buffer suitable for use for a frame buffer of the
492 * form described by user space. Give userspace a handle by which
493 * to reference it.
494 */
495int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
496 struct drm_mode_create_dumb *args)
497{
498 union omap_gem_size gsize;
499
500 /* in case someone tries to feed us a completely bogus stride: */
501 args->pitch = align_pitch(args->pitch, args->width, args->bpp);
502 args->size = PAGE_ALIGN(args->pitch * args->height);
503
504 gsize = (union omap_gem_size){
505 .bytes = args->size,
506 };
507
508 return omap_gem_new_handle(dev, file, gsize,
509 OMAP_BO_SCANOUT | OMAP_BO_WC, &args->handle);
510}
511
512/**
513 * omap_gem_dumb_destroy - destroy a dumb buffer
514 * @file: client file
515 * @dev: our DRM device
516 * @handle: the object handle
517 *
518 * Destroy a handle that was created via omap_gem_dumb_create.
519 */
520int omap_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
521 uint32_t handle)
522{
523 /* No special work needed, drop the reference and see what falls out */
524 return drm_gem_handle_delete(file, handle);
525}
526
527/**
528 * omap_gem_dumb_map - buffer mapping for dumb interface
529 * @file: our drm client file
530 * @dev: drm device
531 * @handle: GEM handle to the object (from dumb_create)
532 *
533 * Do the necessary setup to allow the mapping of the frame buffer
534 * into user memory. We don't have to do much here at the moment.
535 */
536int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
537 uint32_t handle, uint64_t *offset)
538{
539 struct drm_gem_object *obj;
540 int ret = 0;
541
542 /* GEM does all our handle to object mapping */
543 obj = drm_gem_object_lookup(dev, file, handle);
544 if (obj == NULL) {
545 ret = -ENOENT;
546 goto fail;
547 }
548
549 *offset = omap_gem_mmap_offset(obj);
550
551 drm_gem_object_unreference_unlocked(obj);
552
553fail:
554 return ret;
555}
556
557/* Set scrolling position. This allows us to implement fast scrolling
558 * for console.
559 */
560int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll)
561{
562 struct omap_gem_object *omap_obj = to_omap_bo(obj);
563 uint32_t npages = obj->size >> PAGE_SHIFT;
564 int ret = 0;
565
566 if (roll > npages) {
567 dev_err(obj->dev->dev, "invalid roll: %d\n", roll);
568 return -EINVAL;
569 }
570
571 omap_obj->roll = roll;
572
573 if (in_atomic() || mutex_is_locked(&obj->dev->struct_mutex)) {
574 /* this can get called from fbcon in atomic context.. so
575 * just ignore it and wait for next time called from
576 * interruptible context to update the PAT.. the result
577 * may be that user sees wrap-around instead of scrolling
578 * momentarily on the screen. If we wanted to be fancier
579 * we could perhaps schedule some workqueue work at this
580 * point.
581 */
582 return 0;
583 }
584
585 mutex_lock(&obj->dev->struct_mutex);
586
587 /* if we aren't mapped yet, we don't need to do anything */
588 if (omap_obj->block) {
589 struct page **pages;
590 ret = get_pages(obj, &pages);
591 if (ret)
592 goto fail;
593 ret = tiler_pin(omap_obj->block, pages, npages, roll, true);
594 if (ret)
595 dev_err(obj->dev->dev, "could not repin: %d\n", ret);
596 }
597
598fail:
599 mutex_unlock(&obj->dev->struct_mutex);
600
601 return ret;
602}
603
604/* Get physical address for DMA.. if 'remap' is true, and the buffer is not
605 * already contiguous, remap it to pin in physically contiguous memory.. (ie.
606 * map in TILER)
607 */
608int omap_gem_get_paddr(struct drm_gem_object *obj,
609 dma_addr_t *paddr, bool remap)
610{
611 struct omap_drm_private *priv = obj->dev->dev_private;
612 struct omap_gem_object *omap_obj = to_omap_bo(obj);
613 int ret = 0;
614
615 mutex_lock(&obj->dev->struct_mutex);
616
617 if (remap && is_shmem(obj) && priv->has_dmm) {
618 if (omap_obj->paddr_cnt == 0) {
619 struct page **pages;
620 uint32_t npages = obj->size >> PAGE_SHIFT;
621 enum tiler_fmt fmt = gem2fmt(omap_obj->flags);
622 struct tiler_block *block;
623
624 BUG_ON(omap_obj->block);
625
626 ret = get_pages(obj, &pages);
627 if (ret)
628 goto fail;
629
630 if (omap_obj->flags & OMAP_BO_TILED) {
631 block = tiler_reserve_2d(fmt,
632 omap_obj->width,
633 omap_obj->height, 0);
634 } else {
635 block = tiler_reserve_1d(obj->size);
636 }
637
638 if (IS_ERR(block)) {
639 ret = PTR_ERR(block);
640 dev_err(obj->dev->dev,
641 "could not remap: %d (%d)\n", ret, fmt);
642 goto fail;
643 }
644
645 /* TODO: enable async refill.. */
646 ret = tiler_pin(block, pages, npages,
647 omap_obj->roll, true);
648 if (ret) {
649 tiler_release(block);
650 dev_err(obj->dev->dev,
651 "could not pin: %d\n", ret);
652 goto fail;
653 }
654
655 omap_obj->paddr = tiler_ssptr(block);
656 omap_obj->block = block;
657
658 DBG("got paddr: %08x", omap_obj->paddr);
659 }
660
661 omap_obj->paddr_cnt++;
662
663 *paddr = omap_obj->paddr;
664 } else if (omap_obj->flags & OMAP_BO_DMA) {
665 *paddr = omap_obj->paddr;
666 } else {
667 ret = -EINVAL;
668 }
669
670fail:
671 mutex_unlock(&obj->dev->struct_mutex);
672
673 return ret;
674}
675
676/* Release physical address, when DMA is no longer being performed.. this
677 * could potentially unpin and unmap buffers from TILER
678 */
679int omap_gem_put_paddr(struct drm_gem_object *obj)
680{
681 struct omap_gem_object *omap_obj = to_omap_bo(obj);
682 int ret = 0;
683
684 mutex_lock(&obj->dev->struct_mutex);
685 if (omap_obj->paddr_cnt > 0) {
686 omap_obj->paddr_cnt--;
687 if (omap_obj->paddr_cnt == 0) {
688 ret = tiler_unpin(omap_obj->block);
689 if (ret) {
690 dev_err(obj->dev->dev,
691 "could not unpin pages: %d\n", ret);
692 goto fail;
693 }
694 ret = tiler_release(omap_obj->block);
695 if (ret) {
696 dev_err(obj->dev->dev,
697 "could not release unmap: %d\n", ret);
698 }
699 omap_obj->block = NULL;
700 }
701 }
702fail:
703 mutex_unlock(&obj->dev->struct_mutex);
704 return ret;
705}
706
707/* acquire pages when needed (for example, for DMA where physically
708 * contiguous buffer is not required
709 */
710static int get_pages(struct drm_gem_object *obj, struct page ***pages)
711{
712 struct omap_gem_object *omap_obj = to_omap_bo(obj);
713 int ret = 0;
714
715 if (is_shmem(obj) && !omap_obj->pages) {
716 ret = omap_gem_attach_pages(obj);
717 if (ret) {
718 dev_err(obj->dev->dev, "could not attach pages\n");
719 return ret;
720 }
721 }
722
723 /* TODO: even phys-contig.. we should have a list of pages? */
724 *pages = omap_obj->pages;
725
726 return 0;
727}
728
729int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages)
730{
731 int ret;
732 mutex_lock(&obj->dev->struct_mutex);
733 ret = get_pages(obj, pages);
734 mutex_unlock(&obj->dev->struct_mutex);
735 return ret;
736}
737
738/* release pages when DMA no longer being performed */
739int omap_gem_put_pages(struct drm_gem_object *obj)
740{
741 /* do something here if we dynamically attach/detach pages.. at
742 * least they would no longer need to be pinned if everyone has
743 * released the pages..
744 */
745 return 0;
746}
747
748/* Get kernel virtual address for CPU access.. this more or less only
749 * exists for omap_fbdev. This should be called with struct_mutex
750 * held.
751 */
752void *omap_gem_vaddr(struct drm_gem_object *obj)
753{
754 struct omap_gem_object *omap_obj = to_omap_bo(obj);
755 WARN_ON(! mutex_is_locked(&obj->dev->struct_mutex));
756 if (!omap_obj->vaddr) {
757 struct page **pages;
758 int ret = get_pages(obj, &pages);
759 if (ret)
760 return ERR_PTR(ret);
761 omap_obj->vaddr = vmap(pages, obj->size >> PAGE_SHIFT,
762 VM_MAP, pgprot_writecombine(PAGE_KERNEL));
763 }
764 return omap_obj->vaddr;
765}
766
767/* Buffer Synchronization:
768 */
769
770struct omap_gem_sync_waiter {
771 struct list_head list;
772 struct omap_gem_object *omap_obj;
773 enum omap_gem_op op;
774 uint32_t read_target, write_target;
775 /* notify called w/ sync_lock held */
776 void (*notify)(void *arg);
777 void *arg;
778};
779
780/* list of omap_gem_sync_waiter.. the notify fxn gets called back when
781 * the read and/or write target count is achieved which can call a user
782 * callback (ex. to kick 3d and/or 2d), wakeup blocked task (prep for
783 * cpu access), etc.
784 */
785static LIST_HEAD(waiters);
786
787static inline bool is_waiting(struct omap_gem_sync_waiter *waiter)
788{
789 struct omap_gem_object *omap_obj = waiter->omap_obj;
790 if ((waiter->op & OMAP_GEM_READ) &&
791 (omap_obj->sync->read_complete < waiter->read_target))
792 return true;
793 if ((waiter->op & OMAP_GEM_WRITE) &&
794 (omap_obj->sync->write_complete < waiter->write_target))
795 return true;
796 return false;
797}
798
799/* macro for sync debug.. */
800#define SYNCDBG 0
801#define SYNC(fmt, ...) do { if (SYNCDBG) \
802 printk(KERN_ERR "%s:%d: "fmt"\n", \
803 __func__, __LINE__, ##__VA_ARGS__); \
804 } while (0)
805
806
807static void sync_op_update(void)
808{
809 struct omap_gem_sync_waiter *waiter, *n;
810 list_for_each_entry_safe(waiter, n, &waiters, list) {
811 if (!is_waiting(waiter)) {
812 list_del(&waiter->list);
813 SYNC("notify: %p", waiter);
814 waiter->notify(waiter->arg);
815 kfree(waiter);
816 }
817 }
818}
819
820static inline int sync_op(struct drm_gem_object *obj,
821 enum omap_gem_op op, bool start)
822{
823 struct omap_gem_object *omap_obj = to_omap_bo(obj);
824 int ret = 0;
825
826 spin_lock(&sync_lock);
827
828 if (!omap_obj->sync) {
829 omap_obj->sync = kzalloc(sizeof(*omap_obj->sync), GFP_ATOMIC);
830 if (!omap_obj->sync) {
831 ret = -ENOMEM;
832 goto unlock;
833 }
834 }
835
836 if (start) {
837 if (op & OMAP_GEM_READ)
838 omap_obj->sync->read_pending++;
839 if (op & OMAP_GEM_WRITE)
840 omap_obj->sync->write_pending++;
841 } else {
842 if (op & OMAP_GEM_READ)
843 omap_obj->sync->read_complete++;
844 if (op & OMAP_GEM_WRITE)
845 omap_obj->sync->write_complete++;
846 sync_op_update();
847 }
848
849unlock:
850 spin_unlock(&sync_lock);
851
852 return ret;
853}
854
855/* it is a bit lame to handle updates in this sort of polling way, but
856 * in case of PVR, the GPU can directly update read/write complete
857 * values, and not really tell us which ones it updated.. this also
858 * means that sync_lock is not quite sufficient. So we'll need to
859 * do something a bit better when it comes time to add support for
860 * separate 2d hw..
861 */
862void omap_gem_op_update(void)
863{
864 spin_lock(&sync_lock);
865 sync_op_update();
866 spin_unlock(&sync_lock);
867}
868
869/* mark the start of read and/or write operation */
870int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op)
871{
872 return sync_op(obj, op, true);
873}
874
875int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op)
876{
877 return sync_op(obj, op, false);
878}
879
880static DECLARE_WAIT_QUEUE_HEAD(sync_event);
881
882static void sync_notify(void *arg)
883{
884 struct task_struct **waiter_task = arg;
885 *waiter_task = NULL;
886 wake_up_all(&sync_event);
887}
888
889int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op)
890{
891 struct omap_gem_object *omap_obj = to_omap_bo(obj);
892 int ret = 0;
893 if (omap_obj->sync) {
894 struct task_struct *waiter_task = current;
895 struct omap_gem_sync_waiter *waiter =
896 kzalloc(sizeof(*waiter), GFP_KERNEL);
897
898 if (!waiter) {
899 return -ENOMEM;
900 }
901
902 waiter->omap_obj = omap_obj;
903 waiter->op = op;
904 waiter->read_target = omap_obj->sync->read_pending;
905 waiter->write_target = omap_obj->sync->write_pending;
906 waiter->notify = sync_notify;
907 waiter->arg = &waiter_task;
908
909 spin_lock(&sync_lock);
910 if (is_waiting(waiter)) {
911 SYNC("waited: %p", waiter);
912 list_add_tail(&waiter->list, &waiters);
913 spin_unlock(&sync_lock);
914 ret = wait_event_interruptible(sync_event,
915 (waiter_task == NULL));
916 spin_lock(&sync_lock);
917 if (waiter_task) {
918 SYNC("interrupted: %p", waiter);
919 /* we were interrupted */
920 list_del(&waiter->list);
921 waiter_task = NULL;
922 } else {
923 /* freed in sync_op_update() */
924 waiter = NULL;
925 }
926 }
927 spin_unlock(&sync_lock);
928
929 if (waiter) {
930 kfree(waiter);
931 }
932 }
933 return ret;
934}
935
936/* call fxn(arg), either synchronously or asynchronously if the op
937 * is currently blocked.. fxn() can be called from any context
938 *
939 * (TODO for now fxn is called back from whichever context calls
940 * omap_gem_op_update().. but this could be better defined later
941 * if needed)
942 *
943 * TODO more code in common w/ _sync()..
944 */
945int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
946 void (*fxn)(void *arg), void *arg)
947{
948 struct omap_gem_object *omap_obj = to_omap_bo(obj);
949 if (omap_obj->sync) {
950 struct omap_gem_sync_waiter *waiter =
951 kzalloc(sizeof(*waiter), GFP_ATOMIC);
952
953 if (!waiter) {
954 return -ENOMEM;
955 }
956
957 waiter->omap_obj = omap_obj;
958 waiter->op = op;
959 waiter->read_target = omap_obj->sync->read_pending;
960 waiter->write_target = omap_obj->sync->write_pending;
961 waiter->notify = fxn;
962 waiter->arg = arg;
963
964 spin_lock(&sync_lock);
965 if (is_waiting(waiter)) {
966 SYNC("waited: %p", waiter);
967 list_add_tail(&waiter->list, &waiters);
968 spin_unlock(&sync_lock);
969 return 0;
970 }
971
972 spin_unlock(&sync_lock);
973 }
974
975 /* no waiting.. */
976 fxn(arg);
977
978 return 0;
979}
980
981/* special API so PVR can update the buffer to use a sync-object allocated
982 * from it's sync-obj heap. Only used for a newly allocated (from PVR's
983 * perspective) sync-object, so we overwrite the new syncobj w/ values
984 * from the already allocated syncobj (if there is one)
985 */
986int omap_gem_set_sync_object(struct drm_gem_object *obj, void *syncobj)
987{
988 struct omap_gem_object *omap_obj = to_omap_bo(obj);
989 int ret = 0;
990
991 spin_lock(&sync_lock);
992
993 if ((omap_obj->flags & OMAP_BO_EXT_SYNC) && !syncobj) {
994 /* clearing a previously set syncobj */
995 syncobj = kzalloc(sizeof(*omap_obj->sync), GFP_ATOMIC);
996 if (!syncobj) {
997 ret = -ENOMEM;
998 goto unlock;
999 }
1000 memcpy(syncobj, omap_obj->sync, sizeof(*omap_obj->sync));
1001 omap_obj->flags &= ~OMAP_BO_EXT_SYNC;
1002 omap_obj->sync = syncobj;
1003 } else if (syncobj && !(omap_obj->flags & OMAP_BO_EXT_SYNC)) {
1004 /* replacing an existing syncobj */
1005 if (omap_obj->sync) {
1006 memcpy(syncobj, omap_obj->sync, sizeof(*omap_obj->sync));
1007 kfree(omap_obj->sync);
1008 }
1009 omap_obj->flags |= OMAP_BO_EXT_SYNC;
1010 omap_obj->sync = syncobj;
1011 }
1012
1013unlock:
1014 spin_unlock(&sync_lock);
1015 return ret;
1016}
1017
1018int omap_gem_init_object(struct drm_gem_object *obj)
1019{
1020 return -EINVAL; /* unused */
1021}
1022
1023/* don't call directly.. called from GEM core when it is time to actually
1024 * free the object..
1025 */
1026void omap_gem_free_object(struct drm_gem_object *obj)
1027{
1028 struct drm_device *dev = obj->dev;
1029 struct omap_gem_object *omap_obj = to_omap_bo(obj);
1030
1031 evict(obj);
1032
1033 if (obj->map_list.map) {
1034 drm_gem_free_mmap_offset(obj);
1035 }
1036
1037 /* don't free externally allocated backing memory */
1038 if (!(omap_obj->flags & OMAP_BO_EXT_MEM)) {
1039 if (omap_obj->pages) {
1040 omap_gem_detach_pages(obj);
1041 }
1042 if (!is_shmem(obj)) {
1043 dma_free_writecombine(dev->dev, obj->size,
1044 omap_obj->vaddr, omap_obj->paddr);
1045 } else if (omap_obj->vaddr) {
1046 vunmap(omap_obj->vaddr);
1047 }
1048 }
1049
1050 /* don't free externally allocated syncobj */
1051 if (!(omap_obj->flags & OMAP_BO_EXT_SYNC)) {
1052 kfree(omap_obj->sync);
1053 }
1054
1055 drm_gem_object_release(obj);
1056
1057 kfree(obj);
1058}
1059
1060/* convenience method to construct a GEM buffer object, and userspace handle */
1061int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file,
1062 union omap_gem_size gsize, uint32_t flags, uint32_t *handle)
1063{
1064 struct drm_gem_object *obj;
1065 int ret;
1066
1067 obj = omap_gem_new(dev, gsize, flags);
1068 if (!obj)
1069 return -ENOMEM;
1070
1071 ret = drm_gem_handle_create(file, obj, handle);
1072 if (ret) {
1073 drm_gem_object_release(obj);
1074 kfree(obj); /* TODO isn't there a dtor to call? just copying i915 */
1075 return ret;
1076 }
1077
1078 /* drop reference from allocate - handle holds it now */
1079 drm_gem_object_unreference_unlocked(obj);
1080
1081 return 0;
1082}
1083
1084/* GEM buffer object constructor */
1085struct drm_gem_object *omap_gem_new(struct drm_device *dev,
1086 union omap_gem_size gsize, uint32_t flags)
1087{
1088 struct omap_drm_private *priv = dev->dev_private;
1089 struct omap_gem_object *omap_obj;
1090 struct drm_gem_object *obj = NULL;
1091 size_t size;
1092 int ret;
1093
1094 if (flags & OMAP_BO_TILED) {
1095 if (!usergart) {
1096 dev_err(dev->dev, "Tiled buffers require DMM\n");
1097 goto fail;
1098 }
1099
1100 /* tiled buffers are always shmem paged backed.. when they are
1101 * scanned out, they are remapped into DMM/TILER
1102 */
1103 flags &= ~OMAP_BO_SCANOUT;
1104
1105 /* currently don't allow cached buffers.. there is some caching
1106 * stuff that needs to be handled better
1107 */
1108 flags &= ~(OMAP_BO_CACHED|OMAP_BO_UNCACHED);
1109 flags |= OMAP_BO_WC;
1110
1111 /* align dimensions to slot boundaries... */
1112 tiler_align(gem2fmt(flags),
1113 &gsize.tiled.width, &gsize.tiled.height);
1114
1115 /* ...and calculate size based on aligned dimensions */
1116 size = tiler_size(gem2fmt(flags),
1117 gsize.tiled.width, gsize.tiled.height);
1118 } else {
1119 size = PAGE_ALIGN(gsize.bytes);
1120 }
1121
1122 omap_obj = kzalloc(sizeof(*omap_obj), GFP_KERNEL);
1123 if (!omap_obj) {
1124 dev_err(dev->dev, "could not allocate GEM object\n");
1125 goto fail;
1126 }
1127
1128 obj = &omap_obj->base;
1129
1130 if ((flags & OMAP_BO_SCANOUT) && !priv->has_dmm) {
1131 /* attempt to allocate contiguous memory if we don't
1132 * have DMM for remappign discontiguous buffers
1133 */
1134 omap_obj->vaddr = dma_alloc_writecombine(dev->dev, size,
1135 &omap_obj->paddr, GFP_KERNEL);
1136 if (omap_obj->vaddr) {
1137 flags |= OMAP_BO_DMA;
1138 }
1139 }
1140
1141 omap_obj->flags = flags;
1142
1143 if (flags & OMAP_BO_TILED) {
1144 omap_obj->width = gsize.tiled.width;
1145 omap_obj->height = gsize.tiled.height;
1146 }
1147
1148 if (flags & (OMAP_BO_DMA|OMAP_BO_EXT_MEM)) {
1149 ret = drm_gem_private_object_init(dev, obj, size);
1150 } else {
1151 ret = drm_gem_object_init(dev, obj, size);
1152 }
1153
1154 if (ret) {
1155 goto fail;
1156 }
1157
1158 return obj;
1159
1160fail:
1161 if (obj) {
1162 omap_gem_free_object(obj);
1163 }
1164 return NULL;
1165}
1166
1167/* init/cleanup.. if DMM is used, we need to set some stuff up.. */
1168void omap_gem_init(struct drm_device *dev)
1169{
1170 struct omap_drm_private *priv = dev->dev_private;
1171 const enum tiler_fmt fmts[] = {
1172 TILFMT_8BIT, TILFMT_16BIT, TILFMT_32BIT
1173 };
1174 int i, j, ret;
1175
1176 ret = omap_dmm_init(dev);
1177 if (ret) {
1178 /* DMM only supported on OMAP4 and later, so this isn't fatal */
1179 dev_warn(dev->dev, "omap_dmm_init failed, disabling DMM\n");
1180 return;
1181 }
1182
1183 usergart = kzalloc(3 * sizeof(*usergart), GFP_KERNEL);
1184 if (!usergart) {
1185 dev_warn(dev->dev, "could not allocate usergart\n");
1186 return;
1187 }
1188
1189 /* reserve 4k aligned/wide regions for userspace mappings: */
1190 for (i = 0; i < ARRAY_SIZE(fmts); i++) {
1191 uint16_t h = 1, w = PAGE_SIZE >> i;
1192 tiler_align(fmts[i], &w, &h);
1193 /* note: since each region is 1 4kb page wide, and minimum
1194 * number of rows, the height ends up being the same as the
1195 * # of pages in the region
1196 */
1197 usergart[i].height = h;
1198 usergart[i].height_shift = ilog2(h);
1199 usergart[i].stride_pfn = tiler_stride(fmts[i]) >> PAGE_SHIFT;
1200 usergart[i].slot_shift = ilog2((PAGE_SIZE / h) >> i);
1201 for (j = 0; j < NUM_USERGART_ENTRIES; j++) {
1202 struct usergart_entry *entry = &usergart[i].entry[j];
1203 struct tiler_block *block =
1204 tiler_reserve_2d(fmts[i], w, h,
1205 PAGE_SIZE);
1206 if (IS_ERR(block)) {
1207 dev_err(dev->dev,
1208 "reserve failed: %d, %d, %ld\n",
1209 i, j, PTR_ERR(block));
1210 return;
1211 }
1212 entry->paddr = tiler_ssptr(block);
1213 entry->block = block;
1214
1215 DBG("%d:%d: %dx%d: paddr=%08x stride=%d", i, j, w, h,
1216 entry->paddr,
1217 usergart[i].stride_pfn << PAGE_SHIFT);
1218 }
1219 }
1220
1221 priv->has_dmm = true;
1222}
1223
1224void omap_gem_deinit(struct drm_device *dev)
1225{
1226 /* I believe we can rely on there being no more outstanding GEM
1227 * objects which could depend on usergart/dmm at this point.
1228 */
1229 omap_dmm_remove();
1230 kfree(usergart);
1231}
diff --git a/drivers/staging/omapdrm/omap_gem_helpers.c b/drivers/staging/omapdrm/omap_gem_helpers.c
new file mode 100644
index 000000000000..29275c7209e9
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_gem_helpers.c
@@ -0,0 +1,169 @@
1/*
2 * drivers/staging/omapdrm/omap_gem_helpers.c
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob.clark@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20/* temporary copy of drm_gem_{get,put}_pages() until the
21 * "drm/gem: add functions to get/put pages" patch is merged..
22 */
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/shmem_fs.h>
27
28#include <drm/drmP.h>
29
30/**
31 * drm_gem_get_pages - helper to allocate backing pages for a GEM object
32 * @obj: obj in question
33 * @gfpmask: gfp mask of requested pages
34 */
35struct page ** _drm_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask)
36{
37 struct inode *inode;
38 struct address_space *mapping;
39 struct page *p, **pages;
40 int i, npages;
41
42 /* This is the shared memory object that backs the GEM resource */
43 inode = obj->filp->f_path.dentry->d_inode;
44 mapping = inode->i_mapping;
45
46 npages = obj->size >> PAGE_SHIFT;
47
48 pages = drm_malloc_ab(npages, sizeof(struct page *));
49 if (pages == NULL)
50 return ERR_PTR(-ENOMEM);
51
52 gfpmask |= mapping_gfp_mask(mapping);
53
54 for (i = 0; i < npages; i++) {
55 p = shmem_read_mapping_page_gfp(mapping, i, gfpmask);
56 if (IS_ERR(p))
57 goto fail;
58 pages[i] = p;
59
60 /* There is a hypothetical issue w/ drivers that require
61 * buffer memory in the low 4GB.. if the pages are un-
62 * pinned, and swapped out, they can end up swapped back
63 * in above 4GB. If pages are already in memory, then
64 * shmem_read_mapping_page_gfp will ignore the gfpmask,
65 * even if the already in-memory page disobeys the mask.
66 *
67 * It is only a theoretical issue today, because none of
68 * the devices with this limitation can be populated with
69 * enough memory to trigger the issue. But this BUG_ON()
70 * is here as a reminder in case the problem with
71 * shmem_read_mapping_page_gfp() isn't solved by the time
72 * it does become a real issue.
73 *
74 * See this thread: http://lkml.org/lkml/2011/7/11/238
75 */
76 BUG_ON((gfpmask & __GFP_DMA32) &&
77 (page_to_pfn(p) >= 0x00100000UL));
78 }
79
80 return pages;
81
82fail:
83 while (i--) {
84 page_cache_release(pages[i]);
85 }
86 drm_free_large(pages);
87 return ERR_PTR(PTR_ERR(p));
88}
89
90/**
91 * drm_gem_put_pages - helper to free backing pages for a GEM object
92 * @obj: obj in question
93 * @pages: pages to free
94 */
95void _drm_gem_put_pages(struct drm_gem_object *obj, struct page **pages,
96 bool dirty, bool accessed)
97{
98 int i, npages;
99
100 npages = obj->size >> PAGE_SHIFT;
101
102 for (i = 0; i < npages; i++) {
103 if (dirty)
104 set_page_dirty(pages[i]);
105
106 if (accessed)
107 mark_page_accessed(pages[i]);
108
109 /* Undo the reference we took when populating the table */
110 page_cache_release(pages[i]);
111 }
112
113 drm_free_large(pages);
114}
115
116int
117_drm_gem_create_mmap_offset_size(struct drm_gem_object *obj, size_t size)
118{
119 struct drm_device *dev = obj->dev;
120 struct drm_gem_mm *mm = dev->mm_private;
121 struct drm_map_list *list;
122 struct drm_local_map *map;
123 int ret = 0;
124
125 /* Set the object up for mmap'ing */
126 list = &obj->map_list;
127 list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL);
128 if (!list->map)
129 return -ENOMEM;
130
131 map = list->map;
132 map->type = _DRM_GEM;
133 map->size = size;
134 map->handle = obj;
135
136 /* Get a DRM GEM mmap offset allocated... */
137 list->file_offset_node = drm_mm_search_free(&mm->offset_manager,
138 size / PAGE_SIZE, 0, 0);
139
140 if (!list->file_offset_node) {
141 DRM_ERROR("failed to allocate offset for bo %d\n", obj->name);
142 ret = -ENOSPC;
143 goto out_free_list;
144 }
145
146 list->file_offset_node = drm_mm_get_block(list->file_offset_node,
147 size / PAGE_SIZE, 0);
148 if (!list->file_offset_node) {
149 ret = -ENOMEM;
150 goto out_free_list;
151 }
152
153 list->hash.key = list->file_offset_node->start;
154 ret = drm_ht_insert_item(&mm->offset_hash, &list->hash);
155 if (ret) {
156 DRM_ERROR("failed to add to map hash\n");
157 goto out_free_mm;
158 }
159
160 return 0;
161
162out_free_mm:
163 drm_mm_put_block(list->file_offset_node);
164out_free_list:
165 kfree(list->map);
166 list->map = NULL;
167
168 return ret;
169}
diff --git a/drivers/staging/omapdrm/omap_priv.h b/drivers/staging/omapdrm/omap_priv.h
new file mode 100644
index 000000000000..c324709aa9a1
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_priv.h
@@ -0,0 +1,47 @@
1/*
2 * include/drm/omap_priv.h
3 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP_PRIV_H__
21#define __OMAP_PRIV_H__
22
23/* Non-userspace facing APIs
24 */
25
26/* optional platform data to configure the default configuration of which
27 * pipes/overlays/CRTCs are used.. if this is not provided, then instead the
28 * first CONFIG_DRM_OMAP_NUM_CRTCS are used, and they are each connected to
29 * one manager, with priority given to managers that are connected to
30 * detected devices. This should be a good default behavior for most cases,
31 * but yet there still might be times when you wish to do something different.
32 */
33struct omap_kms_platform_data {
34 int ovl_cnt;
35 const int *ovl_ids;
36 int mgr_cnt;
37 const int *mgr_ids;
38 int dev_cnt;
39 const char **dev_names;
40};
41
42struct omap_drm_platform_data {
43 struct omap_kms_platform_data *kms_pdata;
44 struct omap_dmm_platform_data *dmm_pdata;
45};
46
47#endif /* __OMAP_DRM_H__ */
diff --git a/drivers/staging/omapdrm/tcm-sita.c b/drivers/staging/omapdrm/tcm-sita.c
new file mode 100644
index 000000000000..10d5ac3dae4b
--- /dev/null
+++ b/drivers/staging/omapdrm/tcm-sita.c
@@ -0,0 +1,703 @@
1/*
2 * tcm-sita.c
3 *
4 * SImple Tiler Allocator (SiTA): 2D and 1D allocation(reservation) algorithm
5 *
6 * Authors: Ravi Ramachandra <r.ramachandra@ti.com>,
7 * Lajos Molnar <molnar@ti.com>
8 *
9 * Copyright (C) 2009-2010 Texas Instruments, Inc.
10 *
11 * This package is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
17 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
18 *
19 */
20#include <linux/slab.h>
21#include <linux/spinlock.h>
22
23#include "tcm-sita.h"
24
25#define ALIGN_DOWN(value, align) ((value) & ~((align) - 1))
26
27/* Individual selection criteria for different scan areas */
28static s32 CR_L2R_T2B = CR_BIAS_HORIZONTAL;
29static s32 CR_R2L_T2B = CR_DIAGONAL_BALANCE;
30
31/*********************************************
32 * TCM API - Sita Implementation
33 *********************************************/
34static s32 sita_reserve_2d(struct tcm *tcm, u16 h, u16 w, u8 align,
35 struct tcm_area *area);
36static s32 sita_reserve_1d(struct tcm *tcm, u32 slots, struct tcm_area *area);
37static s32 sita_free(struct tcm *tcm, struct tcm_area *area);
38static void sita_deinit(struct tcm *tcm);
39
40/*********************************************
41 * Main Scanner functions
42 *********************************************/
43static s32 scan_areas_and_find_fit(struct tcm *tcm, u16 w, u16 h, u16 align,
44 struct tcm_area *area);
45
46static s32 scan_l2r_t2b(struct tcm *tcm, u16 w, u16 h, u16 align,
47 struct tcm_area *field, struct tcm_area *area);
48
49static s32 scan_r2l_t2b(struct tcm *tcm, u16 w, u16 h, u16 align,
50 struct tcm_area *field, struct tcm_area *area);
51
52static s32 scan_r2l_b2t_one_dim(struct tcm *tcm, u32 num_slots,
53 struct tcm_area *field, struct tcm_area *area);
54
55/*********************************************
56 * Support Infrastructure Methods
57 *********************************************/
58static s32 is_area_free(struct tcm_area ***map, u16 x0, u16 y0, u16 w, u16 h);
59
60static s32 update_candidate(struct tcm *tcm, u16 x0, u16 y0, u16 w, u16 h,
61 struct tcm_area *field, s32 criteria,
62 struct score *best);
63
64static void get_nearness_factor(struct tcm_area *field,
65 struct tcm_area *candidate,
66 struct nearness_factor *nf);
67
68static void get_neighbor_stats(struct tcm *tcm, struct tcm_area *area,
69 struct neighbor_stats *stat);
70
71static void fill_area(struct tcm *tcm,
72 struct tcm_area *area, struct tcm_area *parent);
73
74
75/*********************************************/
76
77/*********************************************
78 * Utility Methods
79 *********************************************/
80struct tcm *sita_init(u16 width, u16 height, struct tcm_pt *attr)
81{
82 struct tcm *tcm;
83 struct sita_pvt *pvt;
84 struct tcm_area area = {0};
85 s32 i;
86
87 if (width == 0 || height == 0)
88 return NULL;
89
90 tcm = kmalloc(sizeof(*tcm), GFP_KERNEL);
91 pvt = kmalloc(sizeof(*pvt), GFP_KERNEL);
92 if (!tcm || !pvt)
93 goto error;
94
95 memset(tcm, 0, sizeof(*tcm));
96 memset(pvt, 0, sizeof(*pvt));
97
98 /* Updating the pointers to SiTA implementation APIs */
99 tcm->height = height;
100 tcm->width = width;
101 tcm->reserve_2d = sita_reserve_2d;
102 tcm->reserve_1d = sita_reserve_1d;
103 tcm->free = sita_free;
104 tcm->deinit = sita_deinit;
105 tcm->pvt = (void *)pvt;
106
107 spin_lock_init(&(pvt->lock));
108
109 /* Creating tam map */
110 pvt->map = kmalloc(sizeof(*pvt->map) * tcm->width, GFP_KERNEL);
111 if (!pvt->map)
112 goto error;
113
114 for (i = 0; i < tcm->width; i++) {
115 pvt->map[i] =
116 kmalloc(sizeof(**pvt->map) * tcm->height,
117 GFP_KERNEL);
118 if (pvt->map[i] == NULL) {
119 while (i--)
120 kfree(pvt->map[i]);
121 kfree(pvt->map);
122 goto error;
123 }
124 }
125
126 if (attr && attr->x <= tcm->width && attr->y <= tcm->height) {
127 pvt->div_pt.x = attr->x;
128 pvt->div_pt.y = attr->y;
129
130 } else {
131 /* Defaulting to 3:1 ratio on width for 2D area split */
132 /* Defaulting to 3:1 ratio on height for 2D and 1D split */
133 pvt->div_pt.x = (tcm->width * 3) / 4;
134 pvt->div_pt.y = (tcm->height * 3) / 4;
135 }
136
137 spin_lock(&(pvt->lock));
138 assign(&area, 0, 0, width - 1, height - 1);
139 fill_area(tcm, &area, NULL);
140 spin_unlock(&(pvt->lock));
141 return tcm;
142
143error:
144 kfree(tcm);
145 kfree(pvt);
146 return NULL;
147}
148
149static void sita_deinit(struct tcm *tcm)
150{
151 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
152 struct tcm_area area = {0};
153 s32 i;
154
155 area.p1.x = tcm->width - 1;
156 area.p1.y = tcm->height - 1;
157
158 spin_lock(&(pvt->lock));
159 fill_area(tcm, &area, NULL);
160 spin_unlock(&(pvt->lock));
161
162 for (i = 0; i < tcm->height; i++)
163 kfree(pvt->map[i]);
164 kfree(pvt->map);
165 kfree(pvt);
166}
167
168/**
169 * Reserve a 1D area in the container
170 *
171 * @param num_slots size of 1D area
172 * @param area pointer to the area that will be populated with the
173 * reserved area
174 *
175 * @return 0 on success, non-0 error value on failure.
176 */
177static s32 sita_reserve_1d(struct tcm *tcm, u32 num_slots,
178 struct tcm_area *area)
179{
180 s32 ret;
181 struct tcm_area field = {0};
182 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
183
184 spin_lock(&(pvt->lock));
185
186 /* Scanning entire container */
187 assign(&field, tcm->width - 1, tcm->height - 1, 0, 0);
188
189 ret = scan_r2l_b2t_one_dim(tcm, num_slots, &field, area);
190 if (!ret)
191 /* update map */
192 fill_area(tcm, area, area);
193
194 spin_unlock(&(pvt->lock));
195 return ret;
196}
197
198/**
199 * Reserve a 2D area in the container
200 *
201 * @param w width
202 * @param h height
203 * @param area pointer to the area that will be populated with the reesrved
204 * area
205 *
206 * @return 0 on success, non-0 error value on failure.
207 */
208static s32 sita_reserve_2d(struct tcm *tcm, u16 h, u16 w, u8 align,
209 struct tcm_area *area)
210{
211 s32 ret;
212 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
213
214 /* not supporting more than 64 as alignment */
215 if (align > 64)
216 return -EINVAL;
217
218 /* we prefer 1, 32 and 64 as alignment */
219 align = align <= 1 ? 1 : align <= 32 ? 32 : 64;
220
221 spin_lock(&(pvt->lock));
222 ret = scan_areas_and_find_fit(tcm, w, h, align, area);
223 if (!ret)
224 /* update map */
225 fill_area(tcm, area, area);
226
227 spin_unlock(&(pvt->lock));
228 return ret;
229}
230
231/**
232 * Unreserve a previously allocated 2D or 1D area
233 * @param area area to be freed
234 * @return 0 - success
235 */
236static s32 sita_free(struct tcm *tcm, struct tcm_area *area)
237{
238 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
239
240 spin_lock(&(pvt->lock));
241
242 /* check that this is in fact an existing area */
243 WARN_ON(pvt->map[area->p0.x][area->p0.y] != area ||
244 pvt->map[area->p1.x][area->p1.y] != area);
245
246 /* Clear the contents of the associated tiles in the map */
247 fill_area(tcm, area, NULL);
248
249 spin_unlock(&(pvt->lock));
250
251 return 0;
252}
253
254/**
255 * Note: In general the cordinates in the scan field area relevant to the can
256 * sweep directions. The scan origin (e.g. top-left corner) will always be
257 * the p0 member of the field. Therfore, for a scan from top-left p0.x <= p1.x
258 * and p0.y <= p1.y; whereas, for a scan from bottom-right p1.x <= p0.x and p1.y
259 * <= p0.y
260 */
261
262/**
263 * Raster scan horizontally right to left from top to bottom to find a place for
264 * a 2D area of given size inside a scan field.
265 *
266 * @param w width of desired area
267 * @param h height of desired area
268 * @param align desired area alignment
269 * @param area pointer to the area that will be set to the best position
270 * @param field area to scan (inclusive)
271 *
272 * @return 0 on success, non-0 error value on failure.
273 */
274static s32 scan_r2l_t2b(struct tcm *tcm, u16 w, u16 h, u16 align,
275 struct tcm_area *field, struct tcm_area *area)
276{
277 s32 x, y;
278 s16 start_x, end_x, start_y, end_y, found_x = -1;
279 struct tcm_area ***map = ((struct sita_pvt *)tcm->pvt)->map;
280 struct score best = {{0}, {0}, {0}, 0};
281
282 start_x = field->p0.x;
283 end_x = field->p1.x;
284 start_y = field->p0.y;
285 end_y = field->p1.y;
286
287 /* check scan area co-ordinates */
288 if (field->p0.x < field->p1.x ||
289 field->p1.y < field->p0.y)
290 return -EINVAL;
291
292 /* check if allocation would fit in scan area */
293 if (w > LEN(start_x, end_x) || h > LEN(end_y, start_y))
294 return -ENOSPC;
295
296 /* adjust start_x and end_y, as allocation would not fit beyond */
297 start_x = ALIGN_DOWN(start_x - w + 1, align); /* - 1 to be inclusive */
298 end_y = end_y - h + 1;
299
300 /* check if allocation would still fit in scan area */
301 if (start_x < end_x)
302 return -ENOSPC;
303
304 /* scan field top-to-bottom, right-to-left */
305 for (y = start_y; y <= end_y; y++) {
306 for (x = start_x; x >= end_x; x -= align) {
307 if (is_area_free(map, x, y, w, h)) {
308 found_x = x;
309
310 /* update best candidate */
311 if (update_candidate(tcm, x, y, w, h, field,
312 CR_R2L_T2B, &best))
313 goto done;
314
315 /* change upper x bound */
316 end_x = x + 1;
317 break;
318 } else if (map[x][y] && map[x][y]->is2d) {
319 /* step over 2D areas */
320 x = ALIGN(map[x][y]->p0.x - w + 1, align);
321 }
322 }
323
324 /* break if you find a free area shouldering the scan field */
325 if (found_x == start_x)
326 break;
327 }
328
329 if (!best.a.tcm)
330 return -ENOSPC;
331done:
332 assign(area, best.a.p0.x, best.a.p0.y, best.a.p1.x, best.a.p1.y);
333 return 0;
334}
335
336/**
337 * Raster scan horizontally left to right from top to bottom to find a place for
338 * a 2D area of given size inside a scan field.
339 *
340 * @param w width of desired area
341 * @param h height of desired area
342 * @param align desired area alignment
343 * @param area pointer to the area that will be set to the best position
344 * @param field area to scan (inclusive)
345 *
346 * @return 0 on success, non-0 error value on failure.
347 */
348static s32 scan_l2r_t2b(struct tcm *tcm, u16 w, u16 h, u16 align,
349 struct tcm_area *field, struct tcm_area *area)
350{
351 s32 x, y;
352 s16 start_x, end_x, start_y, end_y, found_x = -1;
353 struct tcm_area ***map = ((struct sita_pvt *)tcm->pvt)->map;
354 struct score best = {{0}, {0}, {0}, 0};
355
356 start_x = field->p0.x;
357 end_x = field->p1.x;
358 start_y = field->p0.y;
359 end_y = field->p1.y;
360
361 /* check scan area co-ordinates */
362 if (field->p1.x < field->p0.x ||
363 field->p1.y < field->p0.y)
364 return -EINVAL;
365
366 /* check if allocation would fit in scan area */
367 if (w > LEN(end_x, start_x) || h > LEN(end_y, start_y))
368 return -ENOSPC;
369
370 start_x = ALIGN(start_x, align);
371
372 /* check if allocation would still fit in scan area */
373 if (w > LEN(end_x, start_x))
374 return -ENOSPC;
375
376 /* adjust end_x and end_y, as allocation would not fit beyond */
377 end_x = end_x - w + 1; /* + 1 to be inclusive */
378 end_y = end_y - h + 1;
379
380 /* scan field top-to-bottom, left-to-right */
381 for (y = start_y; y <= end_y; y++) {
382 for (x = start_x; x <= end_x; x += align) {
383 if (is_area_free(map, x, y, w, h)) {
384 found_x = x;
385
386 /* update best candidate */
387 if (update_candidate(tcm, x, y, w, h, field,
388 CR_L2R_T2B, &best))
389 goto done;
390 /* change upper x bound */
391 end_x = x - 1;
392
393 break;
394 } else if (map[x][y] && map[x][y]->is2d) {
395 /* step over 2D areas */
396 x = ALIGN_DOWN(map[x][y]->p1.x, align);
397 }
398 }
399
400 /* break if you find a free area shouldering the scan field */
401 if (found_x == start_x)
402 break;
403 }
404
405 if (!best.a.tcm)
406 return -ENOSPC;
407done:
408 assign(area, best.a.p0.x, best.a.p0.y, best.a.p1.x, best.a.p1.y);
409 return 0;
410}
411
412/**
413 * Raster scan horizontally right to left from bottom to top to find a place
414 * for a 1D area of given size inside a scan field.
415 *
416 * @param num_slots size of desired area
417 * @param align desired area alignment
418 * @param area pointer to the area that will be set to the best
419 * position
420 * @param field area to scan (inclusive)
421 *
422 * @return 0 on success, non-0 error value on failure.
423 */
424static s32 scan_r2l_b2t_one_dim(struct tcm *tcm, u32 num_slots,
425 struct tcm_area *field, struct tcm_area *area)
426{
427 s32 found = 0;
428 s16 x, y;
429 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
430 struct tcm_area *p;
431
432 /* check scan area co-ordinates */
433 if (field->p0.y < field->p1.y)
434 return -EINVAL;
435
436 /**
437 * Currently we only support full width 1D scan field, which makes sense
438 * since 1D slot-ordering spans the full container width.
439 */
440 if (tcm->width != field->p0.x - field->p1.x + 1)
441 return -EINVAL;
442
443 /* check if allocation would fit in scan area */
444 if (num_slots > tcm->width * LEN(field->p0.y, field->p1.y))
445 return -ENOSPC;
446
447 x = field->p0.x;
448 y = field->p0.y;
449
450 /* find num_slots consecutive free slots to the left */
451 while (found < num_slots) {
452 if (y < 0)
453 return -ENOSPC;
454
455 /* remember bottom-right corner */
456 if (found == 0) {
457 area->p1.x = x;
458 area->p1.y = y;
459 }
460
461 /* skip busy regions */
462 p = pvt->map[x][y];
463 if (p) {
464 /* move to left of 2D areas, top left of 1D */
465 x = p->p0.x;
466 if (!p->is2d)
467 y = p->p0.y;
468
469 /* start over */
470 found = 0;
471 } else {
472 /* count consecutive free slots */
473 found++;
474 if (found == num_slots)
475 break;
476 }
477
478 /* move to the left */
479 if (x == 0)
480 y--;
481 x = (x ? : tcm->width) - 1;
482
483 }
484
485 /* set top-left corner */
486 area->p0.x = x;
487 area->p0.y = y;
488 return 0;
489}
490
491/**
492 * Find a place for a 2D area of given size inside a scan field based on its
493 * alignment needs.
494 *
495 * @param w width of desired area
496 * @param h height of desired area
497 * @param align desired area alignment
498 * @param area pointer to the area that will be set to the best position
499 *
500 * @return 0 on success, non-0 error value on failure.
501 */
502static s32 scan_areas_and_find_fit(struct tcm *tcm, u16 w, u16 h, u16 align,
503 struct tcm_area *area)
504{
505 s32 ret = 0;
506 struct tcm_area field = {0};
507 u16 boundary_x, boundary_y;
508 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
509
510 if (align > 1) {
511 /* prefer top-left corner */
512 boundary_x = pvt->div_pt.x - 1;
513 boundary_y = pvt->div_pt.y - 1;
514
515 /* expand width and height if needed */
516 if (w > pvt->div_pt.x)
517 boundary_x = tcm->width - 1;
518 if (h > pvt->div_pt.y)
519 boundary_y = tcm->height - 1;
520
521 assign(&field, 0, 0, boundary_x, boundary_y);
522 ret = scan_l2r_t2b(tcm, w, h, align, &field, area);
523
524 /* scan whole container if failed, but do not scan 2x */
525 if (ret != 0 && (boundary_x != tcm->width - 1 ||
526 boundary_y != tcm->height - 1)) {
527 /* scan the entire container if nothing found */
528 assign(&field, 0, 0, tcm->width - 1, tcm->height - 1);
529 ret = scan_l2r_t2b(tcm, w, h, align, &field, area);
530 }
531 } else if (align == 1) {
532 /* prefer top-right corner */
533 boundary_x = pvt->div_pt.x;
534 boundary_y = pvt->div_pt.y - 1;
535
536 /* expand width and height if needed */
537 if (w > (tcm->width - pvt->div_pt.x))
538 boundary_x = 0;
539 if (h > pvt->div_pt.y)
540 boundary_y = tcm->height - 1;
541
542 assign(&field, tcm->width - 1, 0, boundary_x, boundary_y);
543 ret = scan_r2l_t2b(tcm, w, h, align, &field, area);
544
545 /* scan whole container if failed, but do not scan 2x */
546 if (ret != 0 && (boundary_x != 0 ||
547 boundary_y != tcm->height - 1)) {
548 /* scan the entire container if nothing found */
549 assign(&field, tcm->width - 1, 0, 0, tcm->height - 1);
550 ret = scan_r2l_t2b(tcm, w, h, align, &field,
551 area);
552 }
553 }
554
555 return ret;
556}
557
558/* check if an entire area is free */
559static s32 is_area_free(struct tcm_area ***map, u16 x0, u16 y0, u16 w, u16 h)
560{
561 u16 x = 0, y = 0;
562 for (y = y0; y < y0 + h; y++) {
563 for (x = x0; x < x0 + w; x++) {
564 if (map[x][y])
565 return false;
566 }
567 }
568 return true;
569}
570
571/* fills an area with a parent tcm_area */
572static void fill_area(struct tcm *tcm, struct tcm_area *area,
573 struct tcm_area *parent)
574{
575 s32 x, y;
576 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
577 struct tcm_area a, a_;
578
579 /* set area's tcm; otherwise, enumerator considers it invalid */
580 area->tcm = tcm;
581
582 tcm_for_each_slice(a, *area, a_) {
583 for (x = a.p0.x; x <= a.p1.x; ++x)
584 for (y = a.p0.y; y <= a.p1.y; ++y)
585 pvt->map[x][y] = parent;
586
587 }
588}
589
590/**
591 * Compares a candidate area to the current best area, and if it is a better
592 * fit, it updates the best to this one.
593 *
594 * @param x0, y0, w, h top, left, width, height of candidate area
595 * @param field scan field
596 * @param criteria scan criteria
597 * @param best best candidate and its scores
598 *
599 * @return 1 (true) if the candidate area is known to be the final best, so no
600 * more searching should be performed
601 */
602static s32 update_candidate(struct tcm *tcm, u16 x0, u16 y0, u16 w, u16 h,
603 struct tcm_area *field, s32 criteria,
604 struct score *best)
605{
606 struct score me; /* score for area */
607
608 /*
609 * NOTE: For horizontal bias we always give the first found, because our
610 * scan is horizontal-raster-based and the first candidate will always
611 * have the horizontal bias.
612 */
613 bool first = criteria & CR_BIAS_HORIZONTAL;
614
615 assign(&me.a, x0, y0, x0 + w - 1, y0 + h - 1);
616
617 /* calculate score for current candidate */
618 if (!first) {
619 get_neighbor_stats(tcm, &me.a, &me.n);
620 me.neighs = me.n.edge + me.n.busy;
621 get_nearness_factor(field, &me.a, &me.f);
622 }
623
624 /* the 1st candidate is always the best */
625 if (!best->a.tcm)
626 goto better;
627
628 BUG_ON(first);
629
630 /* diagonal balance check */
631 if ((criteria & CR_DIAGONAL_BALANCE) &&
632 best->neighs <= me.neighs &&
633 (best->neighs < me.neighs ||
634 /* this implies that neighs and occupied match */
635 best->n.busy < me.n.busy ||
636 (best->n.busy == me.n.busy &&
637 /* check the nearness factor */
638 best->f.x + best->f.y > me.f.x + me.f.y)))
639 goto better;
640
641 /* not better, keep going */
642 return 0;
643
644better:
645 /* save current area as best */
646 memcpy(best, &me, sizeof(me));
647 best->a.tcm = tcm;
648 return first;
649}
650
651/**
652 * Calculate the nearness factor of an area in a search field. The nearness
653 * factor is smaller if the area is closer to the search origin.
654 */
655static void get_nearness_factor(struct tcm_area *field, struct tcm_area *area,
656 struct nearness_factor *nf)
657{
658 /**
659 * Using signed math as field coordinates may be reversed if
660 * search direction is right-to-left or bottom-to-top.
661 */
662 nf->x = (s32)(area->p0.x - field->p0.x) * 1000 /
663 (field->p1.x - field->p0.x);
664 nf->y = (s32)(area->p0.y - field->p0.y) * 1000 /
665 (field->p1.y - field->p0.y);
666}
667
668/* get neighbor statistics */
669static void get_neighbor_stats(struct tcm *tcm, struct tcm_area *area,
670 struct neighbor_stats *stat)
671{
672 s16 x = 0, y = 0;
673 struct sita_pvt *pvt = (struct sita_pvt *)tcm->pvt;
674
675 /* Clearing any exisiting values */
676 memset(stat, 0, sizeof(*stat));
677
678 /* process top & bottom edges */
679 for (x = area->p0.x; x <= area->p1.x; x++) {
680 if (area->p0.y == 0)
681 stat->edge++;
682 else if (pvt->map[x][area->p0.y - 1])
683 stat->busy++;
684
685 if (area->p1.y == tcm->height - 1)
686 stat->edge++;
687 else if (pvt->map[x][area->p1.y + 1])
688 stat->busy++;
689 }
690
691 /* process left & right edges */
692 for (y = area->p0.y; y <= area->p1.y; ++y) {
693 if (area->p0.x == 0)
694 stat->edge++;
695 else if (pvt->map[area->p0.x - 1][y])
696 stat->busy++;
697
698 if (area->p1.x == tcm->width - 1)
699 stat->edge++;
700 else if (pvt->map[area->p1.x + 1][y])
701 stat->busy++;
702 }
703}
diff --git a/drivers/staging/omapdrm/tcm-sita.h b/drivers/staging/omapdrm/tcm-sita.h
new file mode 100644
index 000000000000..0444f868671c
--- /dev/null
+++ b/drivers/staging/omapdrm/tcm-sita.h
@@ -0,0 +1,95 @@
1/*
2 * tcm_sita.h
3 *
4 * SImple Tiler Allocator (SiTA) private structures.
5 *
6 * Author: Ravi Ramachandra <r.ramachandra@ti.com>
7 *
8 * Copyright (C) 2009-2011 Texas Instruments, Inc.
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * * Neither the name of Texas Instruments Incorporated nor the names of
23 * its contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
28 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
30 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
31 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
33 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
34 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
35 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
36 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#ifndef _TCM_SITA_H
40#define _TCM_SITA_H
41
42#include "tcm.h"
43
44/* length between two coordinates */
45#define LEN(a, b) ((a) > (b) ? (a) - (b) + 1 : (b) - (a) + 1)
46
47enum criteria {
48 CR_MAX_NEIGHS = 0x01,
49 CR_FIRST_FOUND = 0x10,
50 CR_BIAS_HORIZONTAL = 0x20,
51 CR_BIAS_VERTICAL = 0x40,
52 CR_DIAGONAL_BALANCE = 0x80
53};
54
55/* nearness to the beginning of the search field from 0 to 1000 */
56struct nearness_factor {
57 s32 x;
58 s32 y;
59};
60
61/*
62 * Statistics on immediately neighboring slots. Edge is the number of
63 * border segments that are also border segments of the scan field. Busy
64 * refers to the number of neighbors that are occupied.
65 */
66struct neighbor_stats {
67 u16 edge;
68 u16 busy;
69};
70
71/* structure to keep the score of a potential allocation */
72struct score {
73 struct nearness_factor f;
74 struct neighbor_stats n;
75 struct tcm_area a;
76 u16 neighs; /* number of busy neighbors */
77};
78
79struct sita_pvt {
80 spinlock_t lock; /* spinlock to protect access */
81 struct tcm_pt div_pt; /* divider point splitting container */
82 struct tcm_area ***map; /* pointers to the parent area for each slot */
83};
84
85/* assign coordinates to area */
86static inline
87void assign(struct tcm_area *a, u16 x0, u16 y0, u16 x1, u16 y1)
88{
89 a->p0.x = x0;
90 a->p0.y = y0;
91 a->p1.x = x1;
92 a->p1.y = y1;
93}
94
95#endif
diff --git a/drivers/staging/omapdrm/tcm.h b/drivers/staging/omapdrm/tcm.h
new file mode 100644
index 000000000000..d273e3ee0b4c
--- /dev/null
+++ b/drivers/staging/omapdrm/tcm.h
@@ -0,0 +1,326 @@
1/*
2 * tcm.h
3 *
4 * TILER container manager specification and support functions for TI
5 * TILER driver.
6 *
7 * Author: Lajos Molnar <molnar@ti.com>
8 *
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * * Neither the name of Texas Instruments Incorporated nor the names of
23 * its contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
28 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
30 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
31 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
33 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
34 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
35 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
36 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#ifndef TCM_H
40#define TCM_H
41
42struct tcm;
43
44/* point */
45struct tcm_pt {
46 u16 x;
47 u16 y;
48};
49
50/* 1d or 2d area */
51struct tcm_area {
52 bool is2d; /* whether area is 1d or 2d */
53 struct tcm *tcm; /* parent */
54 struct tcm_pt p0;
55 struct tcm_pt p1;
56};
57
58struct tcm {
59 u16 width, height; /* container dimensions */
60 int lut_id; /* Lookup table identifier */
61
62 /* 'pvt' structure shall contain any tcm details (attr) along with
63 linked list of allocated areas and mutex for mutually exclusive access
64 to the list. It may also contain copies of width and height to notice
65 any changes to the publicly available width and height fields. */
66 void *pvt;
67
68 /* function table */
69 s32 (*reserve_2d)(struct tcm *tcm, u16 height, u16 width, u8 align,
70 struct tcm_area *area);
71 s32 (*reserve_1d)(struct tcm *tcm, u32 slots, struct tcm_area *area);
72 s32 (*free) (struct tcm *tcm, struct tcm_area *area);
73 void (*deinit) (struct tcm *tcm);
74};
75
76/*=============================================================================
77 BASIC TILER CONTAINER MANAGER INTERFACE
78=============================================================================*/
79
80/*
81 * NOTE:
82 *
83 * Since some basic parameter checking is done outside the TCM algorithms,
84 * TCM implementation do NOT have to check the following:
85 *
86 * area pointer is NULL
87 * width and height fits within container
88 * number of pages is more than the size of the container
89 *
90 */
91
92struct tcm *sita_init(u16 width, u16 height, struct tcm_pt *attr);
93
94
95/**
96 * Deinitialize tiler container manager.
97 *
98 * @param tcm Pointer to container manager.
99 *
100 * @return 0 on success, non-0 error value on error. The call
101 * should free as much memory as possible and meaningful
102 * even on failure. Some error codes: -ENODEV: invalid
103 * manager.
104 */
105static inline void tcm_deinit(struct tcm *tcm)
106{
107 if (tcm)
108 tcm->deinit(tcm);
109}
110
111/**
112 * Reserves a 2D area in the container.
113 *
114 * @param tcm Pointer to container manager.
115 * @param height Height(in pages) of area to be reserved.
116 * @param width Width(in pages) of area to be reserved.
117 * @param align Alignment requirement for top-left corner of area. Not
118 * all values may be supported by the container manager,
119 * but it must support 0 (1), 32 and 64.
120 * 0 value is equivalent to 1.
121 * @param area Pointer to where the reserved area should be stored.
122 *
123 * @return 0 on success. Non-0 error code on failure. Also,
124 * the tcm field of the area will be set to NULL on
125 * failure. Some error codes: -ENODEV: invalid manager,
126 * -EINVAL: invalid area, -ENOMEM: not enough space for
127 * allocation.
128 */
129static inline s32 tcm_reserve_2d(struct tcm *tcm, u16 width, u16 height,
130 u16 align, struct tcm_area *area)
131{
132 /* perform rudimentary error checking */
133 s32 res = tcm == NULL ? -ENODEV :
134 (area == NULL || width == 0 || height == 0 ||
135 /* align must be a 2 power */
136 (align & (align - 1))) ? -EINVAL :
137 (height > tcm->height || width > tcm->width) ? -ENOMEM : 0;
138
139 if (!res) {
140 area->is2d = true;
141 res = tcm->reserve_2d(tcm, height, width, align, area);
142 area->tcm = res ? NULL : tcm;
143 }
144
145 return res;
146}
147
148/**
149 * Reserves a 1D area in the container.
150 *
151 * @param tcm Pointer to container manager.
152 * @param slots Number of (contiguous) slots to reserve.
153 * @param area Pointer to where the reserved area should be stored.
154 *
155 * @return 0 on success. Non-0 error code on failure. Also,
156 * the tcm field of the area will be set to NULL on
157 * failure. Some error codes: -ENODEV: invalid manager,
158 * -EINVAL: invalid area, -ENOMEM: not enough space for
159 * allocation.
160 */
161static inline s32 tcm_reserve_1d(struct tcm *tcm, u32 slots,
162 struct tcm_area *area)
163{
164 /* perform rudimentary error checking */
165 s32 res = tcm == NULL ? -ENODEV :
166 (area == NULL || slots == 0) ? -EINVAL :
167 slots > (tcm->width * (u32) tcm->height) ? -ENOMEM : 0;
168
169 if (!res) {
170 area->is2d = false;
171 res = tcm->reserve_1d(tcm, slots, area);
172 area->tcm = res ? NULL : tcm;
173 }
174
175 return res;
176}
177
178/**
179 * Free a previously reserved area from the container.
180 *
181 * @param area Pointer to area reserved by a prior call to
182 * tcm_reserve_1d or tcm_reserve_2d call, whether
183 * it was successful or not. (Note: all fields of
184 * the structure must match.)
185 *
186 * @return 0 on success. Non-0 error code on failure. Also, the tcm
187 * field of the area is set to NULL on success to avoid subsequent
188 * freeing. This call will succeed even if supplying
189 * the area from a failed reserved call.
190 */
191static inline s32 tcm_free(struct tcm_area *area)
192{
193 s32 res = 0; /* free succeeds by default */
194
195 if (area && area->tcm) {
196 res = area->tcm->free(area->tcm, area);
197 if (res == 0)
198 area->tcm = NULL;
199 }
200
201 return res;
202}
203
204/*=============================================================================
205 HELPER FUNCTION FOR ANY TILER CONTAINER MANAGER
206=============================================================================*/
207
208/**
209 * This method slices off the topmost 2D slice from the parent area, and stores
210 * it in the 'slice' parameter. The 'parent' parameter will get modified to
211 * contain the remaining portion of the area. If the whole parent area can
212 * fit in a 2D slice, its tcm pointer is set to NULL to mark that it is no
213 * longer a valid area.
214 *
215 * @param parent Pointer to a VALID parent area that will get modified
216 * @param slice Pointer to the slice area that will get modified
217 */
218static inline void tcm_slice(struct tcm_area *parent, struct tcm_area *slice)
219{
220 *slice = *parent;
221
222 /* check if we need to slice */
223 if (slice->tcm && !slice->is2d &&
224 slice->p0.y != slice->p1.y &&
225 (slice->p0.x || (slice->p1.x != slice->tcm->width - 1))) {
226 /* set end point of slice (start always remains) */
227 slice->p1.x = slice->tcm->width - 1;
228 slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1;
229 /* adjust remaining area */
230 parent->p0.x = 0;
231 parent->p0.y = slice->p1.y + 1;
232 } else {
233 /* mark this as the last slice */
234 parent->tcm = NULL;
235 }
236}
237
238/* Verify if a tcm area is logically valid */
239static inline bool tcm_area_is_valid(struct tcm_area *area)
240{
241 return area && area->tcm &&
242 /* coordinate bounds */
243 area->p1.x < area->tcm->width &&
244 area->p1.y < area->tcm->height &&
245 area->p0.y <= area->p1.y &&
246 /* 1D coordinate relationship + p0.x check */
247 ((!area->is2d &&
248 area->p0.x < area->tcm->width &&
249 area->p0.x + area->p0.y * area->tcm->width <=
250 area->p1.x + area->p1.y * area->tcm->width) ||
251 /* 2D coordinate relationship */
252 (area->is2d &&
253 area->p0.x <= area->p1.x));
254}
255
256/* see if a coordinate is within an area */
257static inline bool __tcm_is_in(struct tcm_pt *p, struct tcm_area *a)
258{
259 u16 i;
260
261 if (a->is2d) {
262 return p->x >= a->p0.x && p->x <= a->p1.x &&
263 p->y >= a->p0.y && p->y <= a->p1.y;
264 } else {
265 i = p->x + p->y * a->tcm->width;
266 return i >= a->p0.x + a->p0.y * a->tcm->width &&
267 i <= a->p1.x + a->p1.y * a->tcm->width;
268 }
269}
270
271/* calculate area width */
272static inline u16 __tcm_area_width(struct tcm_area *area)
273{
274 return area->p1.x - area->p0.x + 1;
275}
276
277/* calculate area height */
278static inline u16 __tcm_area_height(struct tcm_area *area)
279{
280 return area->p1.y - area->p0.y + 1;
281}
282
283/* calculate number of slots in an area */
284static inline u16 __tcm_sizeof(struct tcm_area *area)
285{
286 return area->is2d ?
287 __tcm_area_width(area) * __tcm_area_height(area) :
288 (area->p1.x - area->p0.x + 1) + (area->p1.y - area->p0.y) *
289 area->tcm->width;
290}
291#define tcm_sizeof(area) __tcm_sizeof(&(area))
292#define tcm_awidth(area) __tcm_area_width(&(area))
293#define tcm_aheight(area) __tcm_area_height(&(area))
294#define tcm_is_in(pt, area) __tcm_is_in(&(pt), &(area))
295
296/* limit a 1D area to the first N pages */
297static inline s32 tcm_1d_limit(struct tcm_area *a, u32 num_pg)
298{
299 if (__tcm_sizeof(a) < num_pg)
300 return -ENOMEM;
301 if (!num_pg)
302 return -EINVAL;
303
304 a->p1.x = (a->p0.x + num_pg - 1) % a->tcm->width;
305 a->p1.y = a->p0.y + ((a->p0.x + num_pg - 1) / a->tcm->width);
306 return 0;
307}
308
309/**
310 * Iterate through 2D slices of a valid area. Behaves
311 * syntactically as a for(;;) statement.
312 *
313 * @param var Name of a local variable of type 'struct
314 * tcm_area *' that will get modified to
315 * contain each slice.
316 * @param area Pointer to the VALID parent area. This
317 * structure will not get modified
318 * throughout the loop.
319 *
320 */
321#define tcm_for_each_slice(var, area, safe) \
322 for (safe = area, \
323 tcm_slice(&safe, &var); \
324 var.tcm; tcm_slice(&safe, &var))
325
326#endif
diff --git a/drivers/staging/phison/phison.c b/drivers/staging/phison/phison.c
index 683657cb21f5..d77b21f1eb2d 100644
--- a/drivers/staging/phison/phison.c
+++ b/drivers/staging/phison/phison.c
@@ -70,7 +70,7 @@ static int phison_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
70} 70}
71 71
72static DEFINE_PCI_DEVICE_TABLE(phison_pci_tbl) = { 72static DEFINE_PCI_DEVICE_TABLE(phison_pci_tbl) = {
73 { PCI_VENDOR_ID_PHISON, PCI_DEVICE_ID_PS5000, PCI_ANY_ID, PCI_ANY_ID, 73 { PCI_DEVICE(PCI_VENDOR_ID_PHISON, PCI_DEVICE_ID_PS5000),
74 PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 }, 74 PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
75 { 0, }, 75 { 0, },
76}; 76};
diff --git a/drivers/staging/rtl8192e/Kconfig b/drivers/staging/rtl8192e/Kconfig
index 750c347bfbe1..f87e21101857 100644
--- a/drivers/staging/rtl8192e/Kconfig
+++ b/drivers/staging/rtl8192e/Kconfig
@@ -1,9 +1,43 @@
1config RTL8192E 1config RTLLIB
2 tristate "RealTek RTL8192E Wireless LAN NIC driver" 2 tristate "Support for rtllib wireless devices"
3 depends on PCI && WLAN 3 depends on WLAN && m
4 depends on m 4 default n
5 select WIRELESS_EXT 5 select LIB80211
6 select WEXT_PRIV
7 select CRYPTO
8 default N
9 ---help--- 6 ---help---
7 If you have a wireless card that uses rtllib, say
8 Y. Currently the only card is the rtl8192e.
9
10 If unsure, say N.
11
12if RTLLIB
13
14config RTLLIB_CRYPTO_CCMP
15 tristate "Support for rtllib CCMP crypto"
16 depends on RTLLIB
17 default y
18 ---help---
19 CCMP crypto driver for rtllib.
20
21 If you enabled RTLLIB, you want this.
22
23config RTLLIB_CRYPTO_TKIP
24 tristate "Support for rtllib TKIP crypto"
25 depends on RTLLIB
26 default y
27 ---help---
28 TKIP crypto driver for rtllib.
29
30 If you enabled RTLLIB, you want this.
31
32config RTLLIB_CRYPTO_WEP
33 tristate "Support for rtllib WEP crypto"
34 depends on RTLLIB
35 default y
36 ---help---
37 TKIP crypto driver for rtllib.
38
39 If you enabled RTLLIB, you want this.
40
41source "drivers/staging/rtl8192e/rtl8192e/Kconfig"
42
43endif
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile
index a66a9ad33686..cb18db74d78c 100644
--- a/drivers/staging/rtl8192e/Makefile
+++ b/drivers/staging/rtl8192e/Makefile
@@ -1,41 +1,21 @@
1ccflags-y += -DUSE_FW_SOURCE_IMG_FILE 1rtllib-objs := \
2ccflags-y += -DCONFIG_PM_RTL 2 dot11d.o \
3ccflags-y += -DCONFIG_PM 3 rtllib_module.o \
4ccflags-y += -DHAVE_NET_DEVICE_OPS
5ccflags-y += -DENABLE_DOT11D
6
7r8192e_pci-objs := \
8 rtl_core.o \
9 rtl_eeprom.o \
10 rtl_ps.o \
11 rtl_wx.o \
12 rtl_cam.o \
13 rtl_dm.o \
14 rtl_pm.o \
15 rtl_pci.o \
16 rtl_debug.o \
17 rtl_ethtool.o \
18 r8192E_dev.o \
19 r8192E_phy.o \
20 r8192E_firmware.o \
21 r8192E_cmdpkt.o \
22 r8192E_hwimg.o \
23 r8190P_rtl8256.o \
24 rtllib_rx.o \ 4 rtllib_rx.o \
25 rtllib_softmac.o \
26 rtllib_tx.o \ 5 rtllib_tx.o \
27 rtllib_wx.o \ 6 rtllib_wx.o \
28 rtllib_module.o \ 7 rtllib_softmac.o \
29 rtllib_softmac_wx.o \ 8 rtllib_softmac_wx.o \
30 rtl819x_HTProc.o \
31 rtl819x_TSProc.o \
32 rtl819x_BAProc.o \ 9 rtl819x_BAProc.o \
33 dot11d.o \ 10 rtl819x_HTProc.o \
34 rtllib_crypt.o \ 11 rtl819x_TSProc.o
35 rtllib_crypt_tkip.o \ 12
36 rtllib_crypt_ccmp.o \ 13obj-$(CONFIG_RTLLIB) += rtllib.o
37 rtllib_crypt_wep.o 14
15obj-$(CONFIG_RTLLIB_CRYPTO_CCMP) += rtllib_crypt_ccmp.o
16obj-$(CONFIG_RTLLIB_CRYPTO_TKIP) += rtllib_crypt_tkip.o
17obj-$(CONFIG_RTLLIB_CRYPTO_WEP) += rtllib_crypt_wep.o
38 18
39obj-$(CONFIG_RTL8192E) += r8192e_pci.o 19obj-$(CONFIG_RTL8192E) += rtl8192e/
40 20
41ccflags-y += -D__CHECK_ENDIAN__ 21ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/staging/rtl8192e/dot11d.c b/drivers/staging/rtl8192e/dot11d.c
index ee0381e0a81f..f7b14f8b7b83 100644
--- a/drivers/staging/rtl8192e/dot11d.c
+++ b/drivers/staging/rtl8192e/dot11d.c
@@ -46,7 +46,7 @@ static struct channel_list ChannelPlan[] = {
46 56, 60, 64}, 21} 46 56, 60, 64}, 21}
47}; 47};
48 48
49void Dot11d_Init(struct rtllib_device *ieee) 49void dot11d_init(struct rtllib_device *ieee)
50{ 50{
51 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee); 51 struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee);
52 pDot11dInfo->bEnabled = false; 52 pDot11dInfo->bEnabled = false;
@@ -58,6 +58,7 @@ void Dot11d_Init(struct rtllib_device *ieee)
58 RESET_CIE_WATCHDOG(ieee); 58 RESET_CIE_WATCHDOG(ieee);
59 59
60} 60}
61EXPORT_SYMBOL(dot11d_init);
61 62
62void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee) 63void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee)
63{ 64{
@@ -99,6 +100,7 @@ void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee)
99 break; 100 break;
100 } 101 }
101} 102}
103EXPORT_SYMBOL(Dot11d_Channelmap);
102 104
103 105
104void Dot11d_Reset(struct rtllib_device *ieee) 106void Dot11d_Reset(struct rtllib_device *ieee)
diff --git a/drivers/staging/rtl8192e/dot11d.h b/drivers/staging/rtl8192e/dot11d.h
index 032f7004a7f0..71f4549a378f 100644
--- a/drivers/staging/rtl8192e/dot11d.h
+++ b/drivers/staging/rtl8192e/dot11d.h
@@ -93,7 +93,7 @@ static inline void cpMacAddr(unsigned char *des, unsigned char *src)
93#define IS_DOT11D_STATE_DONE(__pIeeeDev) \ 93#define IS_DOT11D_STATE_DONE(__pIeeeDev) \
94 (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE) 94 (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
95 95
96void Dot11d_Init(struct rtllib_device *dev); 96void dot11d_init(struct rtllib_device *dev);
97void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee); 97void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device *ieee);
98void Dot11d_Reset(struct rtllib_device *dev); 98void Dot11d_Reset(struct rtllib_device *dev);
99void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr, 99void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr,
diff --git a/drivers/staging/rtl8192e/rtl8192e/Kconfig b/drivers/staging/rtl8192e/rtl8192e/Kconfig
new file mode 100644
index 000000000000..50e0d91a409a
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl8192e/Kconfig
@@ -0,0 +1,9 @@
1config RTL8192E
2 tristate "RealTek RTL8192E Wireless LAN NIC driver"
3 depends on PCI && WLAN && RTLLIB
4 depends on m
5 select WIRELESS_EXT
6 select WEXT_PRIV
7 select CRYPTO
8 default N
9 ---help---
diff --git a/drivers/staging/rtl8192e/rtl8192e/Makefile b/drivers/staging/rtl8192e/rtl8192e/Makefile
new file mode 100644
index 000000000000..313a92ec6833
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtl8192e/Makefile
@@ -0,0 +1,21 @@
1r8192e_pci-objs := \
2 r8192E_dev.o \
3 r8192E_phy.o \
4 r8192E_firmware.o \
5 r8192E_cmdpkt.o \
6 r8192E_hwimg.o \
7 r8190P_rtl8256.o \
8 rtl_cam.o \
9 rtl_core.o \
10 rtl_debug.o \
11 rtl_dm.o \
12 rtl_eeprom.o \
13 rtl_ethtool.o \
14 rtl_pci.o \
15 rtl_pm.o \
16 rtl_ps.o \
17 rtl_wx.o \
18
19obj-$(CONFIG_RTL8192E) += r8192e_pci.o
20
21ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/staging/rtl8192e/r8190P_def.h b/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h
index b7bb71fa9ecd..b7bb71fa9ecd 100644
--- a/drivers/staging/rtl8192e/r8190P_def.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h
diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.c b/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c
index 0da56c80f088..0da56c80f088 100644
--- a/drivers/staging/rtl8192e/r8190P_rtl8256.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c
diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.h b/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.h
index 64e831d2f4e5..64e831d2f4e5 100644
--- a/drivers/staging/rtl8192e/r8190P_rtl8256.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.h
diff --git a/drivers/staging/rtl8192e/r8192E_cmdpkt.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c
index 58d044ea5524..58d044ea5524 100644
--- a/drivers/staging/rtl8192e/r8192E_cmdpkt.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c
diff --git a/drivers/staging/rtl8192e/r8192E_cmdpkt.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.h
index 23219e17e5a1..23219e17e5a1 100644
--- a/drivers/staging/rtl8192e/r8192E_cmdpkt.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.h
diff --git a/drivers/staging/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
index 808aab6fa5ef..808aab6fa5ef 100644
--- a/drivers/staging/rtl8192e/r8192E_dev.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
diff --git a/drivers/staging/rtl8192e/r8192E_dev.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.h
index b9b3b52f9120..b9b3b52f9120 100644
--- a/drivers/staging/rtl8192e/r8192E_dev.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.h
diff --git a/drivers/staging/rtl8192e/r8192E_firmware.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c
index 37719859bdae..37719859bdae 100644
--- a/drivers/staging/rtl8192e/r8192E_firmware.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c
diff --git a/drivers/staging/rtl8192e/r8192E_firmware.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.h
index caa878833106..caa878833106 100644
--- a/drivers/staging/rtl8192e/r8192E_firmware.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.h
diff --git a/drivers/staging/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h
index 43c3fb859d10..43c3fb859d10 100644
--- a/drivers/staging/rtl8192e/r8192E_hw.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h
diff --git a/drivers/staging/rtl8192e/r8192E_hwimg.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c
index 08e7dbb6694b..08e7dbb6694b 100644
--- a/drivers/staging/rtl8192e/r8192E_hwimg.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c
diff --git a/drivers/staging/rtl8192e/r8192E_hwimg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h
index 019836bb36c2..019836bb36c2 100644
--- a/drivers/staging/rtl8192e/r8192E_hwimg.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h
diff --git a/drivers/staging/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index 7fe69a3348d7..3e705efaaf22 100644
--- a/drivers/staging/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -23,7 +23,6 @@
23#include "r8190P_rtl8256.h" 23#include "r8190P_rtl8256.h"
24#include "r8192E_phy.h" 24#include "r8192E_phy.h"
25#include "rtl_dm.h" 25#include "rtl_dm.h"
26#include "dot11d.h"
27 26
28#include "r8192E_hwimg.h" 27#include "r8192E_hwimg.h"
29 28
@@ -859,7 +858,7 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel,
859 RT_TRACE(COMP_TRACE, "====>%s()====stage:%d, step:%d, channel:%d\n", 858 RT_TRACE(COMP_TRACE, "====>%s()====stage:%d, step:%d, channel:%d\n",
860 __func__, *stage, *step, channel); 859 __func__, *stage, *step, channel);
861 860
862 if (!IsLegalChannel(priv->rtllib, channel)) { 861 if (!rtllib_legal_channel(priv->rtllib, channel)) {
863 RT_TRACE(COMP_ERR, "=============>set to illegal channel:%d\n", 862 RT_TRACE(COMP_ERR, "=============>set to illegal channel:%d\n",
864 channel); 863 channel);
865 return true; 864 return true;
diff --git a/drivers/staging/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
index 7318f8857af2..7318f8857af2 100644
--- a/drivers/staging/rtl8192e/r8192E_phy.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
diff --git a/drivers/staging/rtl8192e/r8192E_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h
index 7899dd538dcd..7899dd538dcd 100644
--- a/drivers/staging/rtl8192e/r8192E_phyreg.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h
diff --git a/drivers/staging/rtl8192e/r819xE_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h
index d5de279f6644..d5de279f6644 100644
--- a/drivers/staging/rtl8192e/r819xE_phyreg.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h
diff --git a/drivers/staging/rtl8192e/rtl_cam.c b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c
index baf3b6342e44..baf3b6342e44 100644
--- a/drivers/staging/rtl8192e/rtl_cam.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c
diff --git a/drivers/staging/rtl8192e/rtl_cam.h b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h
index fa607f98b172..fa607f98b172 100644
--- a/drivers/staging/rtl8192e/rtl_cam.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h
diff --git a/drivers/staging/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
index 5ad96649f407..71adb6b3344d 100644
--- a/drivers/staging/rtl8192e/rtl_core.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
@@ -53,9 +53,7 @@
53#include "rtl_wx.h" 53#include "rtl_wx.h"
54#include "rtl_dm.h" 54#include "rtl_dm.h"
55 55
56#ifdef CONFIG_PM_RTL
57#include "rtl_pm.h" 56#include "rtl_pm.h"
58#endif
59 57
60int hwwep = 1; 58int hwwep = 1;
61static int channels = 0x3fff; 59static int channels = 0x3fff;
@@ -581,7 +579,7 @@ static void rtl8192_update_beacon(void *data)
581 struct rtllib_network *net = &ieee->current_network; 579 struct rtllib_network *net = &ieee->current_network;
582 580
583 if (ieee->pHTInfo->bCurrentHTSupport) 581 if (ieee->pHTInfo->bCurrentHTSupport)
584 HTUpdateSelfAndPeerSetting(ieee, net); 582 HT_update_self_and_peer_setting(ieee, net);
585 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = 583 ieee->pHTInfo->bCurrentRT2RTLongSlotTime =
586 net->bssht.bdRT2RTLongSlotTime; 584 net->bssht.bdRT2RTLongSlotTime;
587 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode; 585 ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
@@ -1289,7 +1287,7 @@ static short rtl8192_get_channel_map(struct net_device *dev)
1289 priv->ChannelPlan = COUNTRY_CODE_FCC; 1287 priv->ChannelPlan = COUNTRY_CODE_FCC;
1290 } 1288 }
1291 RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan); 1289 RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan);
1292 Dot11d_Init(priv->rtllib); 1290 dot11d_init(priv->rtllib);
1293 Dot11d_Channelmap(priv->ChannelPlan, priv->rtllib); 1291 Dot11d_Channelmap(priv->ChannelPlan, priv->rtllib);
1294 for (i = 1; i <= 11; i++) 1292 for (i = 1; i <= 11; i++)
1295 (priv->rtllib->active_channel_map)[i] = 1; 1293 (priv->rtllib->active_channel_map)[i] = 1;
@@ -1305,7 +1303,6 @@ static short rtl8192_init(struct net_device *dev)
1305 1303
1306 memset(&(priv->stats), 0, sizeof(struct rt_stats)); 1304 memset(&(priv->stats), 0, sizeof(struct rt_stats));
1307 1305
1308 rtl8192_dbgp_flag_init(dev);
1309 rtl8192_init_priv_handler(dev); 1306 rtl8192_init_priv_handler(dev);
1310 rtl8192_init_priv_constant(dev); 1307 rtl8192_init_priv_constant(dev);
1311 rtl8192_init_priv_variable(dev); 1308 rtl8192_init_priv_variable(dev);
@@ -2839,7 +2836,6 @@ done:
2839/**************************************************************************** 2836/****************************************************************************
2840 ---------------------------- PCI_STUFF--------------------------- 2837 ---------------------------- PCI_STUFF---------------------------
2841*****************************************************************************/ 2838*****************************************************************************/
2842#ifdef HAVE_NET_DEVICE_OPS
2843static const struct net_device_ops rtl8192_netdev_ops = { 2839static const struct net_device_ops rtl8192_netdev_ops = {
2844 .ndo_open = rtl8192_open, 2840 .ndo_open = rtl8192_open,
2845 .ndo_stop = rtl8192_close, 2841 .ndo_stop = rtl8192_close,
@@ -2851,7 +2847,6 @@ static const struct net_device_ops rtl8192_netdev_ops = {
2851 .ndo_change_mtu = eth_change_mtu, 2847 .ndo_change_mtu = eth_change_mtu,
2852 .ndo_start_xmit = rtllib_xmit, 2848 .ndo_start_xmit = rtllib_xmit,
2853}; 2849};
2854#endif
2855 2850
2856static int __devinit rtl8192_pci_probe(struct pci_dev *pdev, 2851static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
2857 const struct pci_device_id *id) 2852 const struct pci_device_id *id)
@@ -2938,17 +2933,7 @@ static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
2938 dev->irq = pdev->irq; 2933 dev->irq = pdev->irq;
2939 priv->irq = 0; 2934 priv->irq = 0;
2940 2935
2941#ifdef HAVE_NET_DEVICE_OPS
2942 dev->netdev_ops = &rtl8192_netdev_ops; 2936 dev->netdev_ops = &rtl8192_netdev_ops;
2943#else
2944 dev->open = rtl8192_open;
2945 dev->stop = rtl8192_close;
2946 dev->tx_timeout = rtl8192_tx_timeout;
2947 dev->do_ioctl = rtl8192_ioctl;
2948 dev->set_multicast_list = r8192_set_multicast;
2949 dev->set_mac_address = r8192_set_mac_adr;
2950 dev->hard_start_xmit = rtllib_xmit;
2951#endif
2952 2937
2953 dev->wireless_handlers = (struct iw_handler_def *) 2938 dev->wireless_handlers = (struct iw_handler_def *)
2954 &r8192_wx_handlers_def; 2939 &r8192_wx_handlers_def;
@@ -2974,10 +2959,7 @@ static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
2974 2959
2975 register_netdev(dev); 2960 register_netdev(dev);
2976 RT_TRACE(COMP_INIT, "dev name: %s\n", dev->name); 2961 RT_TRACE(COMP_INIT, "dev name: %s\n", dev->name);
2977 err = rtl_debug_module_init(priv, dev->name); 2962
2978 if (err)
2979 RT_TRACE(COMP_DBG, "failed to create debugfs files. Ignoring "
2980 "error: %d\n", err);
2981 rtl8192_proc_init_one(dev); 2963 rtl8192_proc_init_one(dev);
2982 2964
2983 if (priv->polling_timer_on == 0) 2965 if (priv->polling_timer_on == 0)
@@ -3015,7 +2997,6 @@ static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
3015 del_timer_sync(&priv->gpio_polling_timer); 2997 del_timer_sync(&priv->gpio_polling_timer);
3016 cancel_delayed_work(&priv->gpio_change_rf_wq); 2998 cancel_delayed_work(&priv->gpio_change_rf_wq);
3017 priv->polling_timer_on = 0; 2999 priv->polling_timer_on = 0;
3018 rtl_debug_module_remove(priv);
3019 rtl8192_proc_remove_one(dev); 3000 rtl8192_proc_remove_one(dev);
3020 rtl8192_down(dev, true); 3001 rtl8192_down(dev, true);
3021 deinit_hal_dm(dev); 3002 deinit_hal_dm(dev);
@@ -3103,43 +3084,9 @@ bool NicIFDisableNIC(struct net_device *dev)
3103 3084
3104static int __init rtl8192_pci_module_init(void) 3085static int __init rtl8192_pci_module_init(void)
3105{ 3086{
3106 int ret;
3107 int error;
3108
3109 ret = rtllib_init();
3110 if (ret) {
3111 printk(KERN_ERR "rtllib_init() failed %d\n", ret);
3112 return ret;
3113 }
3114 ret = rtllib_crypto_init();
3115 if (ret) {
3116 printk(KERN_ERR "rtllib_crypto_init() failed %d\n", ret);
3117 return ret;
3118 }
3119 ret = rtllib_crypto_tkip_init();
3120 if (ret) {
3121 printk(KERN_ERR "rtllib_crypto_tkip_init() failed %d\n", ret);
3122 return ret;
3123 }
3124 ret = rtllib_crypto_ccmp_init();
3125 if (ret) {
3126 printk(KERN_ERR "rtllib_crypto_ccmp_init() failed %d\n", ret);
3127 return ret;
3128 }
3129 ret = rtllib_crypto_wep_init();
3130 if (ret) {
3131 printk(KERN_ERR "rtllib_crypto_wep_init() failed %d\n", ret);
3132 return ret;
3133 }
3134 printk(KERN_INFO "\nLinux kernel driver for RTL8192E WLAN cards\n"); 3087 printk(KERN_INFO "\nLinux kernel driver for RTL8192E WLAN cards\n");
3135 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan Driver\n"); 3088 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan Driver\n");
3136 3089
3137 error = rtl_create_debugfs_root();
3138 if (error) {
3139 RT_TRACE(COMP_DBG, "Create debugfs root fail: %d\n", error);
3140 goto err_out;
3141 }
3142
3143 rtl8192_proc_module_init(); 3090 rtl8192_proc_module_init();
3144 if (0 != pci_register_driver(&rtl8192_pci_driver)) { 3091 if (0 != pci_register_driver(&rtl8192_pci_driver)) {
3145 DMESG("No device found"); 3092 DMESG("No device found");
@@ -3147,9 +3094,6 @@ static int __init rtl8192_pci_module_init(void)
3147 return -ENODEV; 3094 return -ENODEV;
3148 } 3095 }
3149 return 0; 3096 return 0;
3150err_out:
3151 return error;
3152
3153} 3097}
3154 3098
3155static void __exit rtl8192_pci_module_exit(void) 3099static void __exit rtl8192_pci_module_exit(void)
@@ -3158,12 +3102,6 @@ static void __exit rtl8192_pci_module_exit(void)
3158 3102
3159 RT_TRACE(COMP_DOWN, "Exiting"); 3103 RT_TRACE(COMP_DOWN, "Exiting");
3160 rtl8192_proc_module_remove(); 3104 rtl8192_proc_module_remove();
3161 rtl_remove_debugfs_root();
3162 rtllib_crypto_tkip_exit();
3163 rtllib_crypto_ccmp_exit();
3164 rtllib_crypto_wep_exit();
3165 rtllib_crypto_deinit();
3166 rtllib_exit();
3167} 3105}
3168 3106
3169void check_rfctrl_gpio_timer(unsigned long data) 3107void check_rfctrl_gpio_timer(unsigned long data)
diff --git a/drivers/staging/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
index f9af5153d9cf..2a2519cc284d 100644
--- a/drivers/staging/rtl8192e/rtl_core.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
@@ -44,11 +44,14 @@
44#include <linux/proc_fs.h> 44#include <linux/proc_fs.h>
45#include <linux/if_arp.h> 45#include <linux/if_arp.h>
46#include <linux/random.h> 46#include <linux/random.h>
47#include <linux/version.h>
48#include <linux/io.h> 47#include <linux/io.h>
49#include "rtllib.h"
50 48
51#include "dot11d.h" 49/* Need this defined before including local include files */
50#define DRV_NAME "rtl819xE"
51
52#include "../rtllib.h"
53
54#include "../dot11d.h"
52 55
53#include "r8192E_firmware.h" 56#include "r8192E_firmware.h"
54#include "r8192E_hw.h" 57#include "r8192E_hw.h"
@@ -56,7 +59,6 @@
56#include "r8190P_def.h" 59#include "r8190P_def.h"
57#include "r8192E_dev.h" 60#include "r8192E_dev.h"
58 61
59#include "rtl_debug.h"
60#include "rtl_eeprom.h" 62#include "rtl_eeprom.h"
61#include "rtl_ps.h" 63#include "rtl_ps.h"
62#include "rtl_pci.h" 64#include "rtl_pci.h"
@@ -67,8 +69,6 @@
67#define DRV_AUTHOR "<wlanfae@realtek.com>" 69#define DRV_AUTHOR "<wlanfae@realtek.com>"
68#define DRV_VERSION "0014.0401.2010" 70#define DRV_VERSION "0014.0401.2010"
69 71
70#define DRV_NAME "rtl819xE"
71
72#define IS_HARDWARE_TYPE_819xP(_priv) \ 72#define IS_HARDWARE_TYPE_819xP(_priv) \
73 ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \ 73 ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \
74 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E)) 74 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E))
@@ -215,41 +215,6 @@ enum RTL819x_PHY_PARAM {
215 RTL819X_EFUSE_MAP = 19, 215 RTL819X_EFUSE_MAP = 19,
216}; 216};
217 217
218enum RTL_DEBUG {
219 COMP_TRACE = BIT0,
220 COMP_DBG = BIT1,
221 COMP_INIT = BIT2,
222 COMP_RECV = BIT3,
223 COMP_SEND = BIT4,
224 COMP_CMD = BIT5,
225 COMP_POWER = BIT6,
226 COMP_EPROM = BIT7,
227 COMP_SWBW = BIT8,
228 COMP_SEC = BIT9,
229 COMP_LPS = BIT10,
230 COMP_QOS = BIT11,
231 COMP_RATE = BIT12,
232 COMP_RXDESC = BIT13,
233 COMP_PHY = BIT14,
234 COMP_DIG = BIT15,
235 COMP_TXAGC = BIT16,
236 COMP_HALDM = BIT17,
237 COMP_POWER_TRACKING = BIT18,
238 COMP_CH = BIT19,
239 COMP_RF = BIT20,
240 COMP_FIRMWARE = BIT21,
241 COMP_HT = BIT22,
242 COMP_RESET = BIT23,
243 COMP_CMDPKT = BIT24,
244 COMP_SCAN = BIT25,
245 COMP_PS = BIT26,
246 COMP_DOWN = BIT27,
247 COMP_INTR = BIT28,
248 COMP_LED = BIT29,
249 COMP_MLME = BIT30,
250 COMP_ERR = BIT31
251};
252
253enum nic_t { 218enum nic_t {
254 NIC_UNKNOWN = 0, 219 NIC_UNKNOWN = 0,
255 NIC_8192E = 1, 220 NIC_8192E = 1,
@@ -1121,4 +1086,10 @@ void ActUpdateChannelAccessSetting(struct net_device *dev,
1121 enum wireless_mode WirelessMode, 1086 enum wireless_mode WirelessMode,
1122 struct channel_access_setting *ChnlAccessSetting); 1087 struct channel_access_setting *ChnlAccessSetting);
1123 1088
1089/* proc stuff from rtl_debug.c */
1090void rtl8192_proc_init_one(struct net_device *dev);
1091void rtl8192_proc_remove_one(struct net_device *dev);
1092void rtl8192_proc_module_init(void);
1093void rtl8192_proc_module_remove(void);
1094
1124#endif 1095#endif
diff --git a/drivers/staging/rtl8192e/rtl_crypto.h b/drivers/staging/rtl8192e/rtl8192e/rtl_crypto.h
index ee57c0f4fa69..ee57c0f4fa69 100644
--- a/drivers/staging/rtl8192e/rtl_crypto.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_crypto.h
diff --git a/drivers/staging/rtl8192e/rtl_debug.c b/drivers/staging/rtl8192e/rtl8192e/rtl_debug.c
index 22bc2dd6e438..c19b14cd6f77 100644
--- a/drivers/staging/rtl8192e/rtl_debug.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_debug.c
@@ -22,91 +22,12 @@
22 * Contact Information: 22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com> 23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/ 24******************************************************************************/
25#include "rtl_debug.h"
26#include "rtl_core.h" 25#include "rtl_core.h"
27#include "r8192E_phy.h" 26#include "r8192E_phy.h"
28#include "r8192E_phyreg.h" 27#include "r8192E_phyreg.h"
29#include "r8190P_rtl8256.h" /* RTL8225 Radio frontend */ 28#include "r8190P_rtl8256.h" /* RTL8225 Radio frontend */
30#include "r8192E_cmdpkt.h" 29#include "r8192E_cmdpkt.h"
31 30
32u32 rt_global_debug_component = \
33 COMP_ERR ;
34
35/*------------------Declare variable-----------------------*/
36u32 DBGP_Type[DBGP_TYPE_MAX];
37
38/*-----------------------------------------------------------------------------
39 * Function: DBGP_Flag_Init
40 *
41 * Overview: Refresh all debug print control flag content to zero.
42 *
43 * Input: NONE
44 *
45 * Output: NONE
46 *
47 * Return: NONE
48 *
49 * Revised History:
50 * When Who Remark
51 * 10/20/2006 MHC Create Version 0.
52 *
53 *---------------------------------------------------------------------------*/
54void rtl8192_dbgp_flag_init(struct net_device *dev)
55{
56 u8 i;
57
58 for (i = 0; i < DBGP_TYPE_MAX; i++)
59 DBGP_Type[i] = 0;
60
61
62} /* DBGP_Flag_Init */
63
64/* this is only for debugging */
65void print_buffer(u32 *buffer, int len)
66{
67 int i;
68 u8 *buf = (u8 *)buffer;
69
70 printk(KERN_INFO "ASCII BUFFER DUMP (len: %x):\n", len);
71
72 for (i = 0; i < len; i++)
73 printk(KERN_INFO "%c", buf[i]);
74
75 printk(KERN_INFO "\nBINARY BUFFER DUMP (len: %x):\n", len);
76
77 for (i = 0; i < len; i++)
78 printk(KERN_INFO "%x", buf[i]);
79
80 printk(KERN_INFO "\n");
81}
82
83/* this is only for debug */
84void dump_eprom(struct net_device *dev)
85{
86 int i;
87
88 for (i = 0; i < 0xff; i++)
89 RT_TRACE(COMP_INIT, "EEPROM addr %x : %x", i,
90 eprom_read(dev, i));
91}
92
93/* this is only for debug */
94void rtl8192_dump_reg(struct net_device *dev)
95{
96 int i;
97 int n;
98 int max = 0x5ff;
99
100 RT_TRACE(COMP_INIT, "Dumping NIC register map");
101
102 for (n = 0; n <= max; ) {
103 printk(KERN_INFO "\nD: %2x> ", n);
104 for (i = 0; i < 16 && n <= max; i++, n++)
105 printk(KERN_INFO "%2x ", read_nic_byte(dev, n));
106 }
107 printk(KERN_INFO "\n");
108}
109
110/**************************************************************************** 31/****************************************************************************
111 -----------------------------PROCFS STUFF------------------------- 32 -----------------------------PROCFS STUFF-------------------------
112*****************************************************************************/ 33*****************************************************************************/
diff --git a/drivers/staging/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
index a7fa9aad6f2d..a7fa9aad6f2d 100644
--- a/drivers/staging/rtl8192e/rtl_dm.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
diff --git a/drivers/staging/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
index ab44a9a6927c..ab44a9a6927c 100644
--- a/drivers/staging/rtl8192e/rtl_dm.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h
diff --git a/drivers/staging/rtl8192e/rtl_eeprom.c b/drivers/staging/rtl8192e/rtl8192e/rtl_eeprom.c
index c1ccff4a8321..c1ccff4a8321 100644
--- a/drivers/staging/rtl8192e/rtl_eeprom.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_eeprom.c
diff --git a/drivers/staging/rtl8192e/rtl_eeprom.h b/drivers/staging/rtl8192e/rtl8192e/rtl_eeprom.h
index 9452e1683a72..9452e1683a72 100644
--- a/drivers/staging/rtl8192e/rtl_eeprom.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_eeprom.h
diff --git a/drivers/staging/rtl8192e/rtl_ethtool.c b/drivers/staging/rtl8192e/rtl8192e/rtl_ethtool.c
index 36452fb7cef8..36452fb7cef8 100644
--- a/drivers/staging/rtl8192e/rtl_ethtool.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_ethtool.c
diff --git a/drivers/staging/rtl8192e/rtl_pci.c b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
index ddadcc3e4e7c..ddadcc3e4e7c 100644
--- a/drivers/staging/rtl8192e/rtl_pci.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.c
diff --git a/drivers/staging/rtl8192e/rtl_pci.h b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h
index 7ea5a47dfd2b..28c7da677a80 100644
--- a/drivers/staging/rtl8192e/rtl_pci.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h
@@ -27,7 +27,6 @@
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/pci.h> 29#include <linux/pci.h>
30#include "rtllib.h"
31 30
32static inline void NdisRawWritePortUlong(u32 port, u32 val) 31static inline void NdisRawWritePortUlong(u32 port, u32 val)
33{ 32{
diff --git a/drivers/staging/rtl8192e/rtl_pm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_pm.c
index 92e2fde7f5f4..8e1a5d55dce8 100644
--- a/drivers/staging/rtl8192e/rtl_pm.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pm.c
@@ -17,7 +17,6 @@
17 * wlanfae <wlanfae@realtek.com> 17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/ 18******************************************************************************/
19 19
20#ifdef CONFIG_PM_RTL
21#include "rtl_core.h" 20#include "rtl_core.h"
22#include "r8192E_hw.h" 21#include "r8192E_hw.h"
23#include "r8190P_rtl8256.h" 22#include "r8190P_rtl8256.h"
@@ -133,4 +132,3 @@ int rtl8192E_enable_wake(struct pci_dev *dev, pm_message_t state, int enable)
133 return -EAGAIN; 132 return -EAGAIN;
134} 133}
135 134
136#endif
diff --git a/drivers/staging/rtl8192e/rtl_pm.h b/drivers/staging/rtl8192e/rtl8192e/rtl_pm.h
index 4d7f4067cc78..e5299fc3b34a 100644
--- a/drivers/staging/rtl8192e/rtl_pm.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pm.h
@@ -17,8 +17,6 @@
17 * wlanfae <wlanfae@realtek.com> 17 * wlanfae <wlanfae@realtek.com>
18******************************************************************************/ 18******************************************************************************/
19 19
20#ifdef CONFIG_PM_RTL
21
22#ifndef R8192E_PM_H 20#ifndef R8192E_PM_H
23#define R8192E_PM_H 21#define R8192E_PM_H
24 22
@@ -31,5 +29,3 @@ int rtl8192E_resume(struct pci_dev *dev);
31int rtl8192E_enable_wake(struct pci_dev *dev, pm_message_t state, int enable); 29int rtl8192E_enable_wake(struct pci_dev *dev, pm_message_t state, int enable);
32 30
33#endif 31#endif
34
35#endif
diff --git a/drivers/staging/rtl8192e/rtl_ps.c b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c
index c9a7c563b682..c9a7c563b682 100644
--- a/drivers/staging/rtl8192e/rtl_ps.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c
diff --git a/drivers/staging/rtl8192e/rtl_ps.h b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.h
index a9c2d799c08f..df79d6c4ca03 100644
--- a/drivers/staging/rtl8192e/rtl_ps.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.h
@@ -26,7 +26,7 @@
26#define _RTL_PS_H 26#define _RTL_PS_H
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include "rtllib.h" 29
30struct net_device; 30struct net_device;
31 31
32#define RT_CHECK_FOR_HANG_PERIOD 2 32#define RT_CHECK_FOR_HANG_PERIOD 2
diff --git a/drivers/staging/rtl8192e/rtl_wx.c b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c
index 93b1edbe6bae..4e93669210af 100644
--- a/drivers/staging/rtl8192e/rtl_wx.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c
@@ -19,7 +19,6 @@
19 19
20#include <linux/string.h> 20#include <linux/string.h>
21#include "rtl_core.h" 21#include "rtl_core.h"
22#include "dot11d.h"
23 22
24#define RATE_COUNT 12 23#define RATE_COUNT 12
25static u32 rtl8192_rates[] = { 24static u32 rtl8192_rates[] = {
@@ -803,7 +802,7 @@ static int r8192_wx_set_enc(struct net_device *dev,
803 802
804 switch (wrqu->encoding.flags & IW_ENCODE_INDEX) { 803 switch (wrqu->encoding.flags & IW_ENCODE_INDEX) {
805 case 0: 804 case 0:
806 key_idx = ieee->tx_keyidx; 805 key_idx = ieee->crypt_info.tx_keyidx;
807 break; 806 break;
808 case 1: 807 case 1:
809 key_idx = 0; 808 key_idx = 0;
diff --git a/drivers/staging/rtl8192e/rtl_wx.h b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.h
index 6a51a25ec87d..6a51a25ec87d 100644
--- a/drivers/staging/rtl8192e/rtl_wx.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.h
diff --git a/drivers/staging/rtl8192e/rtl819x_BAProc.c b/drivers/staging/rtl8192e/rtl819x_BAProc.c
index 8b9d85c48be6..32fbbc9d0d92 100644
--- a/drivers/staging/rtl8192e/rtl819x_BAProc.c
+++ b/drivers/staging/rtl8192e/rtl819x_BAProc.c
@@ -18,7 +18,6 @@
18******************************************************************************/ 18******************************************************************************/
19#include "rtllib.h" 19#include "rtllib.h"
20#include "rtl819x_BA.h" 20#include "rtl819x_BA.h"
21#include "rtl_core.h"
22 21
23static void ActivateBAEntry(struct rtllib_device *ieee, struct ba_record *pBA, 22static void ActivateBAEntry(struct rtllib_device *ieee, struct ba_record *pBA,
24 u16 Time) 23 u16 Time)
diff --git a/drivers/staging/rtl8192e/rtl819x_HTProc.c b/drivers/staging/rtl8192e/rtl819x_HTProc.c
index b1c0c566882f..8b7412980ebb 100644
--- a/drivers/staging/rtl8192e/rtl819x_HTProc.c
+++ b/drivers/staging/rtl8192e/rtl819x_HTProc.c
@@ -943,8 +943,8 @@ void HTResetSelfAndSavePeerSetting(struct rtllib_device *ieee,
943 } 943 }
944} 944}
945 945
946void HTUpdateSelfAndPeerSetting(struct rtllib_device *ieee, 946void HT_update_self_and_peer_setting(struct rtllib_device *ieee,
947 struct rtllib_network *pNetwork) 947 struct rtllib_network *pNetwork)
948{ 948{
949 struct rt_hi_throughput *pHTInfo = ieee->pHTInfo; 949 struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
950 struct ht_info_ele *pPeerHTInfo = 950 struct ht_info_ele *pPeerHTInfo =
@@ -955,6 +955,7 @@ void HTUpdateSelfAndPeerSetting(struct rtllib_device *ieee,
955 pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode; 955 pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
956 } 956 }
957} 957}
958EXPORT_SYMBOL(HT_update_self_and_peer_setting);
958 959
959void HTUseDefaultSetting(struct rtllib_device *ieee) 960void HTUseDefaultSetting(struct rtllib_device *ieee)
960{ 961{
diff --git a/drivers/staging/rtl8192e/rtl819x_TSProc.c b/drivers/staging/rtl8192e/rtl819x_TSProc.c
index 09a602f74329..711a096be7a7 100644
--- a/drivers/staging/rtl8192e/rtl819x_TSProc.c
+++ b/drivers/staging/rtl8192e/rtl819x_TSProc.c
@@ -497,6 +497,7 @@ void RemovePeerTS(struct rtllib_device *ieee, u8 *Addr)
497 } 497 }
498 } 498 }
499} 499}
500EXPORT_SYMBOL(RemovePeerTS);
500 501
501void RemoveAllTS(struct rtllib_device *ieee) 502void RemoveAllTS(struct rtllib_device *ieee)
502{ 503{
diff --git a/drivers/staging/rtl8192e/rtl_debug.h b/drivers/staging/rtl8192e/rtl_debug.h
deleted file mode 100644
index 50fb9a9b828a..000000000000
--- a/drivers/staging/rtl8192e/rtl_debug.h
+++ /dev/null
@@ -1,299 +0,0 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#ifndef _RTL_DEBUG_H
26#define _RTL_DEBUG_H
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/version.h>
30#include <linux/debugfs.h>
31
32struct r8192_priv;
33struct _tx_desc_8192se;
34struct _TX_DESC_8192CE;
35struct net_device;
36
37#define DBG_LOUD 4
38
39#define RT_ASSERT(_Exp, Fmt) \
40 if (!(_Exp)) { \
41 printk("Rtl819x: "); \
42 printk Fmt; \
43 }
44
45enum dbgp_flag {
46 FQoS = 0,
47 FTX = 1,
48 FRX = 2,
49 FSEC = 3,
50 FMGNT = 4,
51 FMLME = 5,
52 FRESOURCE = 6,
53 FBEACON = 7,
54 FISR = 8,
55 FPHY = 9,
56 FMP = 10,
57 FEEPROM = 11,
58 FPWR = 12,
59 FDM = 13,
60 FDBGCtrl = 14,
61 FC2H = 15,
62 FBT = 16,
63 FINIT = 17,
64 FIOCTL = 18,
65 DBGP_TYPE_MAX
66};
67
68#define QoS_INIT BIT0
69#define QoS_VISTA BIT1
70
71#define TX_DESC BIT0
72#define TX_DESC_TID BIT1
73
74#define RX_DATA BIT0
75#define RX_PHY_STS BIT1
76#define RX_PHY_SS BIT2
77#define RX_PHY_SQ BIT3
78#define RX_PHY_ASTS BIT4
79#define RX_ERR_LEN BIT5
80#define RX_DEFRAG BIT6
81#define RX_ERR_RATE BIT7
82
83
84
85#define MEDIA_STS BIT0
86#define LINK_STS BIT1
87
88#define OS_CHK BIT0
89
90#define BCN_SHOW BIT0
91#define BCN_PEER BIT1
92
93#define ISR_CHK BIT0
94
95#define PHY_BBR BIT0
96#define PHY_BBW BIT1
97#define PHY_RFR BIT2
98#define PHY_RFW BIT3
99#define PHY_MACR BIT4
100#define PHY_MACW BIT5
101#define PHY_ALLR BIT6
102#define PHY_ALLW BIT7
103#define PHY_TXPWR BIT8
104#define PHY_PWRDIFF BIT9
105
106#define MP_RX BIT0
107#define MP_SWICH_CH BIT1
108
109#define EEPROM_W BIT0
110#define EFUSE_PG BIT1
111#define EFUSE_READ_ALL BIT2
112
113#define LPS BIT0
114#define IPS BIT1
115#define PWRSW BIT2
116#define PWRHW BIT3
117#define PWRHAL BIT4
118
119#define WA_IOT BIT0
120#define DM_PWDB BIT1
121#define DM_Monitor BIT2
122#define DM_DIG BIT3
123#define DM_EDCA_Turbo BIT4
124
125#define DbgCtrl_Trace BIT0
126#define DbgCtrl_InbandNoise BIT1
127
128#define BT_TRACE BIT0
129#define BT_RFPoll BIT1
130
131#define C2H_Summary BIT0
132#define C2H_PacketData BIT1
133#define C2H_ContentData BIT2
134#define BT_TRACE BIT0
135#define BT_RFPoll BIT1
136
137#define INIT_EEPROM BIT0
138#define INIT_TxPower BIT1
139#define INIT_IQK BIT2
140#define INIT_RF BIT3
141
142#define IOCTL_TRACE BIT0
143#define IOCTL_BT_EVENT BIT1
144#define IOCTL_BT_EVENT_DETAIL BIT2
145#define IOCTL_BT_TX_ACLDATA BIT3
146#define IOCTL_BT_TX_ACLDATA_DETAIL BIT4
147#define IOCTL_BT_RX_ACLDATA BIT5
148#define IOCTL_BT_RX_ACLDATA_DETAIL BIT6
149#define IOCTL_BT_HCICMD BIT7
150#define IOCTL_BT_HCICMD_DETAIL BIT8
151#define IOCTL_IRP BIT9
152#define IOCTL_IRP_DETAIL BIT10
153#define IOCTL_CALLBACK_FUN BIT11
154#define IOCTL_STATE BIT12
155#define IOCTL_BT_TP BIT13
156#define IOCTL_BT_LOGO BIT14
157
158/* 2007/07/13 MH ------For DeBuG Print modeue------*/
159/*------------------------------Define structure----------------------------*/
160
161
162/*------------------------Export Marco Definition---------------------------*/
163#define DEBUG_PRINT 1
164
165#if (DEBUG_PRINT == 1)
166#define RTPRINT(dbgtype, dbgflag, printstr) \
167{ \
168 if (DBGP_Type[dbgtype] & dbgflag) { \
169 printk printstr; \
170 } \
171}
172
173#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr) \
174{ \
175 if (DBGP_Type[dbgtype] & dbgflag) { \
176 int __i; \
177 u8 *ptr = (u8 *)_Ptr; \
178 printk printstr; \
179 printk(" "); \
180 for (__i = 0; __i < 6; __i++) \
181 printk("%02X%s", ptr[__i], \
182 (__i == 5) ? "" : "-"); \
183 printk("\n"); \
184 } \
185}
186
187#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
188{ \
189 if (DBGP_Type[dbgtype] & dbgflag) { \
190 int __i; \
191 u8 *ptr = (u8 *)_HexData; \
192 printk(_TitleString); \
193 for (__i = 0; __i < (int)_HexDataLen; __i++) { \
194 printk("%02X%s", ptr[__i], (((__i + 1) \
195 % 4) == 0) ? " " : " "); \
196 if (((__i + 1) % 16) == 0) \
197 printk("\n"); \
198 } \
199 printk("\n"); \
200 } \
201}
202#else
203#define RTPRINT(dbgtype, dbgflag, printstr)
204#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
205#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
206#endif
207
208extern u32 DBGP_Type[DBGP_TYPE_MAX];
209
210#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
211do {\
212 if (((_Comp) & rt_global_debug_component) && \
213 (_Level <= rt_global_debug_component)) { \
214 int __i; \
215 u8* ptr = (u8 *)_HexData; \
216 printk(KERN_INFO "Rtl819x: "); \
217 printk(_TitleString); \
218 for (__i = 0; __i < (int)_HexDataLen; __i++) { \
219 printk("%02X%s", ptr[__i], (((__i + 1) % \
220 4) == 0) ? " " : " "); \
221 if (((__i + 1) % 16) == 0) \
222 printk("\n"); \
223 } \
224 printk("\n"); \
225 } \
226} while (0);
227
228#define DMESG(x, a...)
229#define DMESGW(x, a...)
230#define DMESGE(x, a...)
231extern u32 rt_global_debug_component;
232#define RT_TRACE(component, x, args...) \
233do { \
234 if (rt_global_debug_component & component) \
235 printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
236 ##args);\
237} while (0);
238
239#define assert(expr) \
240 if (!(expr)) { \
241 printk(KERN_INFO "Assertion failed! %s,%s,%s,line=%d\n", \
242 #expr, __FILE__, __func__, __LINE__); \
243 }
244#define RT_DEBUG_DATA(level, data, datalen) \
245 do { \
246 if ((rt_global_debug_component & (level)) == (level)) {\
247 int _i; \
248 u8 *_pdata = (u8 *)data; \
249 printk(KERN_DEBUG DRV_NAME ": %s()\n", __func__); \
250 for (_i = 0; _i < (int)(datalen); _i++) { \
251 printk(KERN_INFO "%2x ", _pdata[_i]); \
252 if ((_i+1) % 16 == 0) \
253 printk("\n"); \
254 } \
255 printk(KERN_INFO "\n"); \
256 } \
257 } while (0)
258
259struct rtl_fs_debug {
260 const char *name;
261 struct dentry *dir_drv;
262 struct dentry *debug_register;
263 u32 hw_type;
264 u32 hw_offset;
265 bool hw_holding;
266};
267
268void print_buffer(u32 *buffer, int len);
269void dump_eprom(struct net_device *dev);
270void rtl8192_dump_reg(struct net_device *dev);
271
272/* debugfs stuff */
273static inline int rtl_debug_module_init(struct r8192_priv *priv,
274 const char *name)
275{
276 return 0;
277}
278
279static inline void rtl_debug_module_remove(struct r8192_priv *priv)
280{
281}
282
283static inline int rtl_create_debugfs_root(void)
284{
285 return 0;
286}
287
288static inline void rtl_remove_debugfs_root(void)
289{
290}
291
292/* proc stuff */
293void rtl8192_proc_init_one(struct net_device *dev);
294void rtl8192_proc_remove_one(struct net_device *dev);
295void rtl8192_proc_module_init(void);
296void rtl8192_proc_module_remove(void);
297void rtl8192_dbgp_flag_init(struct net_device *dev);
298
299#endif
diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h
index de25975ccee4..e26aec86a5c8 100644
--- a/drivers/staging/rtl8192e/rtllib.h
+++ b/drivers/staging/rtl8192e/rtllib.h
@@ -25,7 +25,6 @@
25#define RTLLIB_H 25#define RTLLIB_H
26#include <linux/if_ether.h> /* ETH_ALEN */ 26#include <linux/if_ether.h> /* ETH_ALEN */
27#include <linux/kernel.h> /* ARRAY_SIZE */ 27#include <linux/kernel.h> /* ARRAY_SIZE */
28#include <linux/version.h>
29#include <linux/module.h> 28#include <linux/module.h>
30#include <linux/interrupt.h> 29#include <linux/interrupt.h>
31#include <linux/jiffies.h> 30#include <linux/jiffies.h>
@@ -36,12 +35,14 @@
36#include <linux/delay.h> 35#include <linux/delay.h>
37#include <linux/wireless.h> 36#include <linux/wireless.h>
38 37
38#include "rtllib_debug.h"
39#include "rtl819x_HT.h" 39#include "rtl819x_HT.h"
40#include "rtl819x_BA.h" 40#include "rtl819x_BA.h"
41#include "rtl819x_TS.h" 41#include "rtl819x_TS.h"
42 42
43#include <linux/netdevice.h> 43#include <linux/netdevice.h>
44#include <linux/if_arp.h> /* ARPHRD_ETHER */ 44#include <linux/if_arp.h> /* ARPHRD_ETHER */
45#include <net/lib80211.h>
45 46
46#define MAX_PRECMD_CNT 16 47#define MAX_PRECMD_CNT 16
47#define MAX_RFDEPENDCMD_CNT 16 48#define MAX_RFDEPENDCMD_CNT 16
@@ -870,69 +871,6 @@ enum _REG_PREAMBLE_MODE {
870#define WLAN_ERP_USE_PROTECTION (1<<1) 871#define WLAN_ERP_USE_PROTECTION (1<<1)
871#define WLAN_ERP_BARKER_PREAMBLE (1<<2) 872#define WLAN_ERP_BARKER_PREAMBLE (1<<2)
872 873
873/* Status codes */
874enum rtllib_statuscode {
875 WLAN_STATUS_SUCCESS = 0,
876 WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
877 WLAN_STATUS_CAPS_UNSUPPORTED = 10,
878 WLAN_STATUS_REASSOC_NO_ASSOC = 11,
879 WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
880 WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
881 WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
882 WLAN_STATUS_CHALLENGE_FAIL = 15,
883 WLAN_STATUS_AUTH_TIMEOUT = 16,
884 WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
885 WLAN_STATUS_ASSOC_DENIED_RATES = 18,
886 /* 802.11b */
887 WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
888 WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
889 WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
890 /* 802.11h */
891 WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
892 WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
893 WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
894 /* 802.11g */
895 WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
896 WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
897 /* 802.11i */
898 WLAN_STATUS_INVALID_IE = 40,
899 WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
900 WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
901 WLAN_STATUS_INVALID_AKMP = 43,
902 WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
903 WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
904 WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
905};
906
907/* Reason codes */
908enum rtllib_reasoncode {
909 WLAN_REASON_UNSPECIFIED = 1,
910 WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
911 WLAN_REASON_DEAUTH_LEAVING = 3,
912 WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
913 WLAN_REASON_DISASSOC_AP_BUSY = 5,
914 WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
915 WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
916 WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
917 WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
918 /* 802.11h */
919 WLAN_REASON_DISASSOC_BAD_POWER = 10,
920 WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
921 /* 802.11i */
922 WLAN_REASON_INVALID_IE = 13,
923 WLAN_REASON_MIC_FAILURE = 14,
924 WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
925 WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
926 WLAN_REASON_IE_DIFFERENT = 17,
927 WLAN_REASON_INVALID_GROUP_CIPHER = 18,
928 WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
929 WLAN_REASON_INVALID_AKMP = 20,
930 WLAN_REASON_UNSUPP_RSN_VERSION = 21,
931 WLAN_REASON_INVALID_RSN_IE_CAP = 22,
932 WLAN_REASON_IEEE8021X_FAILED = 23,
933 WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
934};
935
936#define RTLLIB_STATMASK_SIGNAL (1<<0) 874#define RTLLIB_STATMASK_SIGNAL (1<<0)
937#define RTLLIB_STATMASK_RSSI (1<<1) 875#define RTLLIB_STATMASK_RSSI (1<<1)
938#define RTLLIB_STATMASK_NOISE (1<<2) 876#define RTLLIB_STATMASK_NOISE (1<<2)
@@ -1122,8 +1060,6 @@ struct rtllib_stats {
1122 1060
1123struct rtllib_device; 1061struct rtllib_device;
1124 1062
1125#include "rtllib_crypt.h"
1126
1127#define SEC_KEY_1 (1<<0) 1063#define SEC_KEY_1 (1<<0)
1128#define SEC_KEY_2 (1<<1) 1064#define SEC_KEY_2 (1<<1)
1129#define SEC_KEY_3 (1<<2) 1065#define SEC_KEY_3 (1<<2)
@@ -1146,7 +1082,6 @@ struct rtllib_device;
1146#define SEC_ALG_TKIP 2 1082#define SEC_ALG_TKIP 2
1147#define SEC_ALG_CCMP 4 1083#define SEC_ALG_CCMP 4
1148 1084
1149#define WEP_KEYS 4
1150#define WEP_KEY_LEN 13 1085#define WEP_KEY_LEN 13
1151#define SCM_KEY_LEN 32 1086#define SCM_KEY_LEN 32
1152#define SCM_TEMPORAL_KEY_LENGTH 16 1087#define SCM_TEMPORAL_KEY_LENGTH 16
@@ -1158,8 +1093,8 @@ struct rtllib_security {
1158 auth_algo:4, 1093 auth_algo:4,
1159 unicast_uses_group:1, 1094 unicast_uses_group:1,
1160 encrypt:1; 1095 encrypt:1;
1161 u8 key_sizes[WEP_KEYS]; 1096 u8 key_sizes[NUM_WEP_KEYS];
1162 u8 keys[WEP_KEYS][SCM_KEY_LEN]; 1097 u8 keys[NUM_WEP_KEYS][SCM_KEY_LEN];
1163 u8 level; 1098 u8 level;
1164 u16 flags; 1099 u16 flags;
1165} __packed; 1100} __packed;
@@ -2251,14 +2186,10 @@ struct rtllib_device {
2251 u8 ap_mac_addr[6]; 2186 u8 ap_mac_addr[6];
2252 u16 pairwise_key_type; 2187 u16 pairwise_key_type;
2253 u16 group_key_type; 2188 u16 group_key_type;
2254 struct list_head crypt_deinit_list;
2255 struct rtllib_crypt_data *crypt[WEP_KEYS];
2256 2189
2257 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */ 2190 struct lib80211_crypt_info crypt_info;
2258 struct sw_cam_table swcamtable[TOTAL_CAM_ENTRY];
2259 struct timer_list crypt_deinit_timer;
2260 int crypt_quiesced;
2261 2191
2192 struct sw_cam_table swcamtable[TOTAL_CAM_ENTRY];
2262 int bcrx_sta_key; /* use individual keys to override default keys even 2193 int bcrx_sta_key; /* use individual keys to override default keys even
2263 * with RX of broad/multicast frames */ 2194 * with RX of broad/multicast frames */
2264 2195
@@ -2774,7 +2705,7 @@ extern void rtllib_rx_mgt(struct rtllib_device *ieee,
2774 struct rtllib_rx_stats *stats); 2705 struct rtllib_rx_stats *stats);
2775extern void rtllib_rx_probe_rq(struct rtllib_device *ieee, 2706extern void rtllib_rx_probe_rq(struct rtllib_device *ieee,
2776 struct sk_buff *skb); 2707 struct sk_buff *skb);
2777extern int IsLegalChannel(struct rtllib_device *rtllib, u8 channel); 2708extern int rtllib_legal_channel(struct rtllib_device *rtllib, u8 channel);
2778 2709
2779/* rtllib_wx.c */ 2710/* rtllib_wx.c */
2780extern int rtllib_wx_get_scan(struct rtllib_device *ieee, 2711extern int rtllib_wx_get_scan(struct rtllib_device *ieee,
@@ -2804,7 +2735,7 @@ extern int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len);
2804 2735
2805/* rtllib_softmac.c */ 2736/* rtllib_softmac.c */
2806extern short rtllib_is_54g(struct rtllib_network *net); 2737extern short rtllib_is_54g(struct rtllib_network *net);
2807extern short rtllib_is_shortslot(struct rtllib_network net); 2738extern short rtllib_is_shortslot(const struct rtllib_network *net);
2808extern int rtllib_rx_frame_softmac(struct rtllib_device *ieee, 2739extern int rtllib_rx_frame_softmac(struct rtllib_device *ieee,
2809 struct sk_buff *skb, 2740 struct sk_buff *skb,
2810 struct rtllib_rx_stats *rx_stats, u16 type, 2741 struct rtllib_rx_stats *rx_stats, u16 type,
@@ -2971,8 +2902,8 @@ extern void HTInitializeHTInfo(struct rtllib_device *ieee);
2971extern void HTInitializeBssDesc(struct bss_ht *pBssHT); 2902extern void HTInitializeBssDesc(struct bss_ht *pBssHT);
2972extern void HTResetSelfAndSavePeerSetting(struct rtllib_device *ieee, 2903extern void HTResetSelfAndSavePeerSetting(struct rtllib_device *ieee,
2973 struct rtllib_network *pNetwork); 2904 struct rtllib_network *pNetwork);
2974extern void HTUpdateSelfAndPeerSetting(struct rtllib_device *ieee, 2905extern void HT_update_self_and_peer_setting(struct rtllib_device *ieee,
2975 struct rtllib_network *pNetwork); 2906 struct rtllib_network *pNetwork);
2976extern u8 HTGetHighestMCSRate(struct rtllib_device *ieee, u8 *pMCSRateSet, 2907extern u8 HTGetHighestMCSRate(struct rtllib_device *ieee, u8 *pMCSRateSet,
2977 u8 *pMCSFilter); 2908 u8 *pMCSFilter);
2978extern u8 MCS_FILTER_ALL[]; 2909extern u8 MCS_FILTER_ALL[];
@@ -3052,21 +2983,6 @@ static inline const char *escape_essid(const char *essid, u8 essid_len)
3052 (HTMcsToDataRate(_ieee, (u8)_MGN_RATE))) 2983 (HTMcsToDataRate(_ieee, (u8)_MGN_RATE)))
3053 2984
3054/* fun with the built-in rtllib stack... */ 2985/* fun with the built-in rtllib stack... */
3055int rtllib_init(void);
3056void rtllib_exit(void);
3057int rtllib_crypto_init(void);
3058void rtllib_crypto_deinit(void);
3059int rtllib_crypto_tkip_init(void);
3060void rtllib_crypto_tkip_exit(void);
3061int rtllib_crypto_ccmp_init(void);
3062void rtllib_crypto_ccmp_exit(void);
3063int rtllib_crypto_wep_init(void);
3064void rtllib_crypto_wep_exit(void);
3065
3066void rtllib_MgntDisconnectIBSS(struct rtllib_device *rtllib);
3067void rtllib_MlmeDisassociateRequest(struct rtllib_device *rtllib, u8 *asSta,
3068 u8 asRsn);
3069void rtllib_MgntDisconnectAP(struct rtllib_device *rtllib, u8 asRsn);
3070bool rtllib_MgntDisconnect(struct rtllib_device *rtllib, u8 asRsn); 2986bool rtllib_MgntDisconnect(struct rtllib_device *rtllib, u8 asRsn);
3071 2987
3072 2988
@@ -3133,12 +3049,5 @@ extern void rtllib_TURBO_Info(struct rtllib_device *ieee, u8 **tag_p);
3133#define MUTEX_LOCK_PRIV(pmutex) mutex_lock(pmutex) 3049#define MUTEX_LOCK_PRIV(pmutex) mutex_lock(pmutex)
3134#define MUTEX_UNLOCK_PRIV(pmutex) mutex_unlock(pmutex) 3050#define MUTEX_UNLOCK_PRIV(pmutex) mutex_unlock(pmutex)
3135#endif 3051#endif
3136static inline void dump_buf(u8 *buf, u32 len) 3052
3137{
3138 u32 i;
3139 printk(KERN_INFO "-----------------Len %d----------------\n", len);
3140 for (i = 0; i < len; i++)
3141 printk("%2.2x-", *(buf+i));
3142 printk("\n");
3143}
3144#endif /* RTLLIB_H */ 3053#endif /* RTLLIB_H */
diff --git a/drivers/staging/rtl8192e/rtllib_crypt.c b/drivers/staging/rtl8192e/rtllib_crypt.c
index acda37b81848..86152d0e6b5d 100644
--- a/drivers/staging/rtl8192e/rtllib_crypt.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt.c
@@ -11,7 +11,6 @@
11 * 11 *
12 */ 12 */
13 13
14#include <linux/version.h>
15#include <linux/module.h> 14#include <linux/module.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/slab.h> 16#include <linux/slab.h>
@@ -22,7 +21,7 @@
22 21
23struct rtllib_crypto_alg { 22struct rtllib_crypto_alg {
24 struct list_head list; 23 struct list_head list;
25 struct rtllib_crypto_ops *ops; 24 struct lib80211_crypto_ops *ops;
26}; 25};
27 26
28 27
@@ -33,15 +32,15 @@ struct rtllib_crypto {
33 32
34static struct rtllib_crypto *hcrypt; 33static struct rtllib_crypto *hcrypt;
35 34
36void rtllib_crypt_deinit_entries(struct rtllib_device *ieee, 35void rtllib_crypt_deinit_entries(struct lib80211_crypt_info *info,
37 int force) 36 int force)
38{ 37{
39 struct list_head *ptr, *n; 38 struct list_head *ptr, *n;
40 struct rtllib_crypt_data *entry; 39 struct lib80211_crypt_data *entry;
41 40
42 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next; 41 for (ptr = info->crypt_deinit_list.next, n = ptr->next;
43 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) { 42 ptr != &info->crypt_deinit_list; ptr = n, n = ptr->next) {
44 entry = list_entry(ptr, struct rtllib_crypt_data, list); 43 entry = list_entry(ptr, struct lib80211_crypt_data, list);
45 44
46 if (atomic_read(&entry->refcnt) != 0 && !force) 45 if (atomic_read(&entry->refcnt) != 0 && !force)
47 continue; 46 continue;
@@ -53,28 +52,30 @@ void rtllib_crypt_deinit_entries(struct rtllib_device *ieee,
53 kfree(entry); 52 kfree(entry);
54 } 53 }
55} 54}
55EXPORT_SYMBOL(rtllib_crypt_deinit_entries);
56 56
57void rtllib_crypt_deinit_handler(unsigned long data) 57void rtllib_crypt_deinit_handler(unsigned long data)
58{ 58{
59 struct rtllib_device *ieee = (struct rtllib_device *)data; 59 struct lib80211_crypt_info *info = (struct lib80211_crypt_info *)data;
60 unsigned long flags; 60 unsigned long flags;
61 61
62 spin_lock_irqsave(&ieee->lock, flags); 62 spin_lock_irqsave(info->lock, flags);
63 rtllib_crypt_deinit_entries(ieee, 0); 63 rtllib_crypt_deinit_entries(info, 0);
64 if (!list_empty(&ieee->crypt_deinit_list)) { 64 if (!list_empty(&info->crypt_deinit_list)) {
65 printk(KERN_DEBUG "%s: entries remaining in delayed crypt " 65 printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
66 "deletion list\n", ieee->dev->name); 66 "deletion list\n", info->name);
67 ieee->crypt_deinit_timer.expires = jiffies + HZ; 67 info->crypt_deinit_timer.expires = jiffies + HZ;
68 add_timer(&ieee->crypt_deinit_timer); 68 add_timer(&info->crypt_deinit_timer);
69 } 69 }
70 spin_unlock_irqrestore(&ieee->lock, flags); 70 spin_unlock_irqrestore(info->lock, flags);
71 71
72} 72}
73EXPORT_SYMBOL(rtllib_crypt_deinit_handler);
73 74
74void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee, 75void rtllib_crypt_delayed_deinit(struct lib80211_crypt_info *info,
75 struct rtllib_crypt_data **crypt) 76 struct lib80211_crypt_data **crypt)
76{ 77{
77 struct rtllib_crypt_data *tmp; 78 struct lib80211_crypt_data *tmp;
78 unsigned long flags; 79 unsigned long flags;
79 80
80 if (*crypt == NULL) 81 if (*crypt == NULL)
@@ -87,16 +88,17 @@ void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee,
87 * decrypt operations. Use a list of delayed deinits to avoid needing 88 * decrypt operations. Use a list of delayed deinits to avoid needing
88 * locking. */ 89 * locking. */
89 90
90 spin_lock_irqsave(&ieee->lock, flags); 91 spin_lock_irqsave(info->lock, flags);
91 list_add(&tmp->list, &ieee->crypt_deinit_list); 92 list_add(&tmp->list, &info->crypt_deinit_list);
92 if (!timer_pending(&ieee->crypt_deinit_timer)) { 93 if (!timer_pending(&info->crypt_deinit_timer)) {
93 ieee->crypt_deinit_timer.expires = jiffies + HZ; 94 info->crypt_deinit_timer.expires = jiffies + HZ;
94 add_timer(&ieee->crypt_deinit_timer); 95 add_timer(&info->crypt_deinit_timer);
95 } 96 }
96 spin_unlock_irqrestore(&ieee->lock, flags); 97 spin_unlock_irqrestore(info->lock, flags);
97} 98}
99EXPORT_SYMBOL(rtllib_crypt_delayed_deinit);
98 100
99int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops) 101int rtllib_register_crypto_ops(struct lib80211_crypto_ops *ops)
100{ 102{
101 unsigned long flags; 103 unsigned long flags;
102 struct rtllib_crypto_alg *alg; 104 struct rtllib_crypto_alg *alg;
@@ -104,11 +106,10 @@ int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops)
104 if (hcrypt == NULL) 106 if (hcrypt == NULL)
105 return -1; 107 return -1;
106 108
107 alg = kmalloc(sizeof(*alg), GFP_KERNEL); 109 alg = kzalloc(sizeof(*alg), GFP_KERNEL);
108 if (alg == NULL) 110 if (alg == NULL)
109 return -ENOMEM; 111 return -ENOMEM;
110 112
111 memset(alg, 0, sizeof(*alg));
112 alg->ops = ops; 113 alg->ops = ops;
113 114
114 spin_lock_irqsave(&hcrypt->lock, flags); 115 spin_lock_irqsave(&hcrypt->lock, flags);
@@ -120,8 +121,9 @@ int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops)
120 121
121 return 0; 122 return 0;
122} 123}
124EXPORT_SYMBOL(rtllib_register_crypto_ops);
123 125
124int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops) 126int rtllib_unregister_crypto_ops(struct lib80211_crypto_ops *ops)
125{ 127{
126 unsigned long flags; 128 unsigned long flags;
127 struct list_head *ptr; 129 struct list_head *ptr;
@@ -150,9 +152,10 @@ int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops)
150 152
151 return del_alg ? 0 : -1; 153 return del_alg ? 0 : -1;
152} 154}
155EXPORT_SYMBOL(rtllib_unregister_crypto_ops);
153 156
154 157
155struct rtllib_crypto_ops *rtllib_get_crypto_ops(const char *name) 158struct lib80211_crypto_ops *rtllib_get_crypto_ops(const char *name)
156{ 159{
157 unsigned long flags; 160 unsigned long flags;
158 struct list_head *ptr; 161 struct list_head *ptr;
@@ -177,12 +180,13 @@ struct rtllib_crypto_ops *rtllib_get_crypto_ops(const char *name)
177 else 180 else
178 return NULL; 181 return NULL;
179} 182}
183EXPORT_SYMBOL(rtllib_get_crypto_ops);
180 184
181 185
182static void * rtllib_crypt_null_init(int keyidx) { return (void *) 1; } 186static void * rtllib_crypt_null_init(int keyidx) { return (void *) 1; }
183static void rtllib_crypt_null_deinit(void *priv) {} 187static void rtllib_crypt_null_deinit(void *priv) {}
184 188
185static struct rtllib_crypto_ops rtllib_crypt_null = { 189static struct lib80211_crypto_ops rtllib_crypt_null = {
186 .name = "NULL", 190 .name = "NULL",
187 .init = rtllib_crypt_null_init, 191 .init = rtllib_crypt_null_init,
188 .deinit = rtllib_crypt_null_deinit, 192 .deinit = rtllib_crypt_null_deinit,
@@ -192,8 +196,10 @@ static struct rtllib_crypto_ops rtllib_crypt_null = {
192 .decrypt_msdu = NULL, 196 .decrypt_msdu = NULL,
193 .set_key = NULL, 197 .set_key = NULL,
194 .get_key = NULL, 198 .get_key = NULL,
195 .extra_prefix_len = 0, 199 .extra_mpdu_prefix_len = 0,
196 .extra_postfix_len = 0, 200 .extra_mpdu_postfix_len = 0,
201 .extra_msdu_prefix_len = 0,
202 .extra_msdu_postfix_len = 0,
197 .owner = THIS_MODULE, 203 .owner = THIS_MODULE,
198}; 204};
199 205
@@ -202,15 +208,14 @@ int __init rtllib_crypto_init(void)
202{ 208{
203 int ret = -ENOMEM; 209 int ret = -ENOMEM;
204 210
205 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL); 211 hcrypt = kzalloc(sizeof(*hcrypt), GFP_KERNEL);
206 if (!hcrypt) 212 if (!hcrypt)
207 goto out; 213 goto out;
208 214
209 memset(hcrypt, 0, sizeof(*hcrypt));
210 INIT_LIST_HEAD(&hcrypt->algs); 215 INIT_LIST_HEAD(&hcrypt->algs);
211 spin_lock_init(&hcrypt->lock); 216 spin_lock_init(&hcrypt->lock);
212 217
213 ret = rtllib_register_crypto_ops(&rtllib_crypt_null); 218 ret = lib80211_register_crypto_ops(&rtllib_crypt_null);
214 if (ret < 0) { 219 if (ret < 0) {
215 kfree(hcrypt); 220 kfree(hcrypt);
216 hcrypt = NULL; 221 hcrypt = NULL;
@@ -239,3 +244,8 @@ void __exit rtllib_crypto_deinit(void)
239 244
240 kfree(hcrypt); 245 kfree(hcrypt);
241} 246}
247
248module_init(rtllib_crypto_init);
249module_exit(rtllib_crypto_deinit);
250
251MODULE_LICENSE("GPL");
diff --git a/drivers/staging/rtl8192e/rtllib_crypt.h b/drivers/staging/rtl8192e/rtllib_crypt.h
index 49b90b73ed9c..e177c9287b44 100644
--- a/drivers/staging/rtl8192e/rtllib_crypt.h
+++ b/drivers/staging/rtl8192e/rtllib_crypt.h
@@ -25,61 +25,11 @@
25 25
26#include <linux/skbuff.h> 26#include <linux/skbuff.h>
27 27
28struct rtllib_crypto_ops { 28int rtllib_register_crypto_ops(struct lib80211_crypto_ops *ops);
29 const char *name; 29int rtllib_unregister_crypto_ops(struct lib80211_crypto_ops *ops);
30 30struct lib80211_crypto_ops *rtllib_get_crypto_ops(const char *name);
31 /* init new crypto context (e.g., allocate private data space, 31void rtllib_crypt_deinit_entries(struct lib80211_crypt_info *info, int force);
32 * select IV, etc.); returns NULL on failure or pointer to allocated 32void rtllib_crypt_deinit_handler(unsigned long data);
33 * private data on success */ 33void rtllib_crypt_delayed_deinit(struct lib80211_crypt_info *info,
34 void * (*init)(int keyidx); 34 struct lib80211_crypt_data **crypt);
35
36 /* deinitialize crypto context and free allocated private data */
37 void (*deinit)(void *priv);
38
39 /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
40 * value from decrypt_mpdu is passed as the keyidx value for
41 * decrypt_msdu. skb must have enough head and tail room for the
42 * encryption; if not, error will be returned; these functions are
43 * called for all MPDUs (i.e., fragments).
44 */
45 int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
46 int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
47
48 /* These functions are called for full MSDUs, i.e. full frames.
49 * These can be NULL if full MSDU operations are not needed. */
50 int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
51 int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
52 void *priv, struct rtllib_device* ieee);
53
54 int (*set_key)(void *key, int len, u8 *seq, void *priv);
55 int (*get_key)(void *key, int len, u8 *seq, void *priv);
56
57 /* procfs handler for printing out key information and possible
58 * statistics */
59 char * (*print_stats)(char *p, void *priv);
60
61 /* maximum number of bytes added by encryption; encrypt buf is
62 * allocated with extra_prefix_len bytes, copy of in_buf, and
63 * extra_postfix_len; encrypt need not use all this space, but
64 * the result must start at the beginning of the struct buffer and
65 * correct length must be returned */
66 int extra_prefix_len, extra_postfix_len;
67
68 struct module *owner;
69};
70
71struct rtllib_crypt_data {
72 struct list_head list; /* delayed deletion list */
73 struct rtllib_crypto_ops *ops;
74 void *priv;
75 atomic_t refcnt;
76};
77
78int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops);
79int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops);
80struct rtllib_crypto_ops *rtllib_get_crypto_ops(const char *name);
81void rtllib_crypt_deinit_entries(struct rtllib_device *, int);
82void rtllib_crypt_deinit_handler(unsigned long);
83void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee,
84 struct rtllib_crypt_data **crypt);
85#endif 35#endif
diff --git a/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c
index 6196b9aa3a09..4217b88e6fc3 100644
--- a/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c
@@ -9,7 +9,6 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12#include <linux/version.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/slab.h> 14#include <linux/slab.h>
@@ -63,10 +62,9 @@ static void *rtllib_ccmp_init(int key_idx)
63{ 62{
64 struct rtllib_ccmp_data *priv; 63 struct rtllib_ccmp_data *priv;
65 64
66 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 65 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
67 if (priv == NULL) 66 if (priv == NULL)
68 goto fail; 67 goto fail;
69 memset(priv, 0, sizeof(*priv));
70 priv->key_idx = key_idx; 68 priv->key_idx = key_idx;
71 69
72 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 70 priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
@@ -429,13 +427,8 @@ static char *rtllib_ccmp_print_stats(char *p, void *priv)
429 return p; 427 return p;
430} 428}
431 429
432void rtllib_ccmp_null(void) 430static struct lib80211_crypto_ops rtllib_crypt_ccmp = {
433{ 431 .name = "R-CCMP",
434 return;
435}
436
437static struct rtllib_crypto_ops rtllib_crypt_ccmp = {
438 .name = "CCMP",
439 .init = rtllib_ccmp_init, 432 .init = rtllib_ccmp_init,
440 .deinit = rtllib_ccmp_deinit, 433 .deinit = rtllib_ccmp_deinit,
441 .encrypt_mpdu = rtllib_ccmp_encrypt, 434 .encrypt_mpdu = rtllib_ccmp_encrypt,
@@ -445,19 +438,24 @@ static struct rtllib_crypto_ops rtllib_crypt_ccmp = {
445 .set_key = rtllib_ccmp_set_key, 438 .set_key = rtllib_ccmp_set_key,
446 .get_key = rtllib_ccmp_get_key, 439 .get_key = rtllib_ccmp_get_key,
447 .print_stats = rtllib_ccmp_print_stats, 440 .print_stats = rtllib_ccmp_print_stats,
448 .extra_prefix_len = CCMP_HDR_LEN, 441 .extra_mpdu_prefix_len = CCMP_HDR_LEN,
449 .extra_postfix_len = CCMP_MIC_LEN, 442 .extra_mpdu_postfix_len = CCMP_MIC_LEN,
450 .owner = THIS_MODULE, 443 .owner = THIS_MODULE,
451}; 444};
452 445
453 446
454int __init rtllib_crypto_ccmp_init(void) 447int __init rtllib_crypto_ccmp_init(void)
455{ 448{
456 return rtllib_register_crypto_ops(&rtllib_crypt_ccmp); 449 return lib80211_register_crypto_ops(&rtllib_crypt_ccmp);
457} 450}
458 451
459 452
460void __exit rtllib_crypto_ccmp_exit(void) 453void __exit rtllib_crypto_ccmp_exit(void)
461{ 454{
462 rtllib_unregister_crypto_ops(&rtllib_crypt_ccmp); 455 lib80211_unregister_crypto_ops(&rtllib_crypt_ccmp);
463} 456}
457
458module_init(rtllib_crypto_ccmp_init);
459module_exit(rtllib_crypto_ccmp_exit);
460
461MODULE_LICENSE("GPL");
diff --git a/drivers/staging/rtl8192e/rtllib_crypt_tkip.c b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c
index 6a0c87886422..800925053fb0 100644
--- a/drivers/staging/rtl8192e/rtllib_crypt_tkip.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c
@@ -9,7 +9,6 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12#include <linux/version.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/slab.h> 14#include <linux/slab.h>
@@ -60,10 +59,9 @@ static void *rtllib_tkip_init(int key_idx)
60{ 59{
61 struct rtllib_tkip_data *priv; 60 struct rtllib_tkip_data *priv;
62 61
63 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 62 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
64 if (priv == NULL) 63 if (priv == NULL)
65 goto fail; 64 goto fail;
66 memset(priv, 0, sizeof(*priv));
67 priv->key_idx = key_idx; 65 priv->key_idx = key_idx;
68 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 66 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
69 CRYPTO_ALG_ASYNC); 67 CRYPTO_ALG_ASYNC);
@@ -598,8 +596,7 @@ static void rtllib_michael_mic_failure(struct net_device *dev,
598} 596}
599 597
600static int rtllib_michael_mic_verify(struct sk_buff *skb, int keyidx, 598static int rtllib_michael_mic_verify(struct sk_buff *skb, int keyidx,
601 int hdr_len, void *priv, 599 int hdr_len, void *priv)
602 struct rtllib_device *ieee)
603{ 600{
604 struct rtllib_tkip_data *tkey = priv; 601 struct rtllib_tkip_data *tkey = priv;
605 u8 mic[8]; 602 u8 mic[8];
@@ -618,23 +615,20 @@ static int rtllib_michael_mic_verify(struct sk_buff *skb, int keyidx,
618 skb->data + hdr_len, skb->len - 8 - hdr_len, mic)) 615 skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
619 return -1; 616 return -1;
620 617
621 if ((memcmp(mic, skb->data + skb->len - 8, 8) != 0) || 618 if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
622 (ieee->force_mic_error)) {
623 struct rtllib_hdr_4addr *hdr; 619 struct rtllib_hdr_4addr *hdr;
624 hdr = (struct rtllib_hdr_4addr *) skb->data; 620 hdr = (struct rtllib_hdr_4addr *) skb->data;
625 printk(KERN_DEBUG "%s: Michael MIC verification failed for " 621 printk(KERN_DEBUG "%s: Michael MIC verification failed for "
626 "MSDU from %pM keyidx=%d\n", 622 "MSDU from %pM keyidx=%d\n",
627 skb->dev ? skb->dev->name : "N/A", hdr->addr2, 623 skb->dev ? skb->dev->name : "N/A", hdr->addr2,
628 keyidx); 624 keyidx);
629 printk(KERN_DEBUG "%d, force_mic_error = %d\n", 625 printk(KERN_DEBUG "%d\n",
630 (memcmp(mic, skb->data + skb->len - 8, 8) != 0),\ 626 memcmp(mic, skb->data + skb->len - 8, 8) != 0);
631 ieee->force_mic_error);
632 if (skb->dev) { 627 if (skb->dev) {
633 printk(KERN_INFO "skb->dev != NULL\n"); 628 printk(KERN_INFO "skb->dev != NULL\n");
634 rtllib_michael_mic_failure(skb->dev, hdr, keyidx); 629 rtllib_michael_mic_failure(skb->dev, hdr, keyidx);
635 } 630 }
636 tkey->dot11RSNAStatsTKIPLocalMICFailures++; 631 tkey->dot11RSNAStatsTKIPLocalMICFailures++;
637 ieee->force_mic_error = false;
638 return -1; 632 return -1;
639 } 633 }
640 634
@@ -740,9 +734,8 @@ static char *rtllib_tkip_print_stats(char *p, void *priv)
740 return p; 734 return p;
741} 735}
742 736
743 737static struct lib80211_crypto_ops rtllib_crypt_tkip = {
744static struct rtllib_crypto_ops rtllib_crypt_tkip = { 738 .name = "R-TKIP",
745 .name = "TKIP",
746 .init = rtllib_tkip_init, 739 .init = rtllib_tkip_init,
747 .deinit = rtllib_tkip_deinit, 740 .deinit = rtllib_tkip_deinit,
748 .encrypt_mpdu = rtllib_tkip_encrypt, 741 .encrypt_mpdu = rtllib_tkip_encrypt,
@@ -752,24 +745,25 @@ static struct rtllib_crypto_ops rtllib_crypt_tkip = {
752 .set_key = rtllib_tkip_set_key, 745 .set_key = rtllib_tkip_set_key,
753 .get_key = rtllib_tkip_get_key, 746 .get_key = rtllib_tkip_get_key,
754 .print_stats = rtllib_tkip_print_stats, 747 .print_stats = rtllib_tkip_print_stats,
755 .extra_prefix_len = 4 + 4, /* IV + ExtIV */ 748 .extra_mpdu_prefix_len = 4 + 4, /* IV + ExtIV */
756 .extra_postfix_len = 8 + 4, /* MIC + ICV */ 749 .extra_mpdu_postfix_len = 4, /* ICV */
750 .extra_msdu_postfix_len = 8, /* MIC */
757 .owner = THIS_MODULE, 751 .owner = THIS_MODULE,
758}; 752};
759 753
760 754
761int __init rtllib_crypto_tkip_init(void) 755int __init rtllib_crypto_tkip_init(void)
762{ 756{
763 return rtllib_register_crypto_ops(&rtllib_crypt_tkip); 757 return lib80211_register_crypto_ops(&rtllib_crypt_tkip);
764} 758}
765 759
766 760
767void __exit rtllib_crypto_tkip_exit(void) 761void __exit rtllib_crypto_tkip_exit(void)
768{ 762{
769 rtllib_unregister_crypto_ops(&rtllib_crypt_tkip); 763 lib80211_unregister_crypto_ops(&rtllib_crypt_tkip);
770} 764}
771 765
772void rtllib_tkip_null(void) 766module_init(rtllib_crypto_tkip_init);
773{ 767module_exit(rtllib_crypto_tkip_exit);
774 return; 768
775} 769MODULE_LICENSE("GPL");
diff --git a/drivers/staging/rtl8192e/rtllib_crypt_wep.c b/drivers/staging/rtl8192e/rtllib_crypt_wep.c
index c59bf10fe780..8cdf38913a33 100644
--- a/drivers/staging/rtl8192e/rtllib_crypt_wep.c
+++ b/drivers/staging/rtl8192e/rtllib_crypt_wep.c
@@ -9,7 +9,6 @@
9 * more details. 9 * more details.
10 */ 10 */
11 11
12#include <linux/version.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/slab.h> 14#include <linux/slab.h>
@@ -38,10 +37,9 @@ static void *prism2_wep_init(int keyidx)
38{ 37{
39 struct prism2_wep_data *priv; 38 struct prism2_wep_data *priv;
40 39
41 priv = kmalloc(sizeof(*priv), GFP_ATOMIC); 40 priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
42 if (priv == NULL) 41 if (priv == NULL)
43 goto fail; 42 goto fail;
44 memset(priv, 0, sizeof(*priv));
45 priv->key_idx = keyidx; 43 priv->key_idx = keyidx;
46 44
47 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 45 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
@@ -257,9 +255,8 @@ static char *prism2_wep_print_stats(char *p, void *priv)
257 return p; 255 return p;
258} 256}
259 257
260 258static struct lib80211_crypto_ops rtllib_crypt_wep = {
261static struct rtllib_crypto_ops rtllib_crypt_wep = { 259 .name = "R-WEP",
262 .name = "WEP",
263 .init = prism2_wep_init, 260 .init = prism2_wep_init,
264 .deinit = prism2_wep_deinit, 261 .deinit = prism2_wep_deinit,
265 .encrypt_mpdu = prism2_wep_encrypt, 262 .encrypt_mpdu = prism2_wep_encrypt,
@@ -269,24 +266,24 @@ static struct rtllib_crypto_ops rtllib_crypt_wep = {
269 .set_key = prism2_wep_set_key, 266 .set_key = prism2_wep_set_key,
270 .get_key = prism2_wep_get_key, 267 .get_key = prism2_wep_get_key,
271 .print_stats = prism2_wep_print_stats, 268 .print_stats = prism2_wep_print_stats,
272 .extra_prefix_len = 4, /* IV */ 269 .extra_mpdu_prefix_len = 4, /* IV */
273 .extra_postfix_len = 4, /* ICV */ 270 .extra_mpdu_postfix_len = 4, /* ICV */
274 .owner = THIS_MODULE, 271 .owner = THIS_MODULE,
275}; 272};
276 273
277 274
278int __init rtllib_crypto_wep_init(void) 275int __init rtllib_crypto_wep_init(void)
279{ 276{
280 return rtllib_register_crypto_ops(&rtllib_crypt_wep); 277 return lib80211_register_crypto_ops(&rtllib_crypt_wep);
281} 278}
282 279
283 280
284void __exit rtllib_crypto_wep_exit(void) 281void __exit rtllib_crypto_wep_exit(void)
285{ 282{
286 rtllib_unregister_crypto_ops(&rtllib_crypt_wep); 283 lib80211_unregister_crypto_ops(&rtllib_crypt_wep);
287} 284}
288 285
289void rtllib_wep_null(void) 286module_init(rtllib_crypto_wep_init);
290{ 287module_exit(rtllib_crypto_wep_exit);
291 return; 288
292} 289MODULE_LICENSE("GPL");
diff --git a/drivers/staging/rtl8192e/rtllib_debug.h b/drivers/staging/rtl8192e/rtllib_debug.h
new file mode 100644
index 000000000000..2bfc1155f505
--- /dev/null
+++ b/drivers/staging/rtl8192e/rtllib_debug.h
@@ -0,0 +1,86 @@
1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25#ifndef _RTL_DEBUG_H
26#define _RTL_DEBUG_H
27
28/* Allow files to override DRV_NAME */
29#ifndef DRV_NAME
30#define DRV_NAME "rtllib_92e"
31#endif
32
33#define DMESG(x, a...)
34
35extern u32 rt_global_debug_component;
36
37/* These are the defines for rt_global_debug_component */
38enum RTL_DEBUG {
39 COMP_TRACE = (1 << 0),
40 COMP_DBG = (1 << 1),
41 COMP_INIT = (1 << 2),
42 COMP_RECV = (1 << 3),
43 COMP_SEND = (1 << 4),
44 COMP_CMD = (1 << 5),
45 COMP_POWER = (1 << 6),
46 COMP_EPROM = (1 << 7),
47 COMP_SWBW = (1 << 8),
48 COMP_SEC = (1 << 9),
49 COMP_LPS = (1 << 10),
50 COMP_QOS = (1 << 11),
51 COMP_RATE = (1 << 12),
52 COMP_RXDESC = (1 << 13),
53 COMP_PHY = (1 << 14),
54 COMP_DIG = (1 << 15),
55 COMP_TXAGC = (1 << 16),
56 COMP_HALDM = (1 << 17),
57 COMP_POWER_TRACKING = (1 << 18),
58 COMP_CH = (1 << 19),
59 COMP_RF = (1 << 20),
60 COMP_FIRMWARE = (1 << 21),
61 COMP_HT = (1 << 22),
62 COMP_RESET = (1 << 23),
63 COMP_CMDPKT = (1 << 24),
64 COMP_SCAN = (1 << 25),
65 COMP_PS = (1 << 26),
66 COMP_DOWN = (1 << 27),
67 COMP_INTR = (1 << 28),
68 COMP_LED = (1 << 29),
69 COMP_MLME = (1 << 30),
70 COMP_ERR = (1 << 31)
71};
72
73#define RT_TRACE(component, x, args...) \
74do { \
75 if (rt_global_debug_component & component) \
76 printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
77 ##args);\
78} while (0);
79
80#define assert(expr) \
81 if (!(expr)) { \
82 printk(KERN_INFO "Assertion failed! %s,%s,%s,line=%d\n", \
83 #expr, __FILE__, __func__, __LINE__); \
84 }
85
86#endif
diff --git a/drivers/staging/rtl8192e/rtllib_module.c b/drivers/staging/rtl8192e/rtllib_module.c
index c36a140a4568..f9dae958a5d4 100644
--- a/drivers/staging/rtl8192e/rtllib_module.c
+++ b/drivers/staging/rtl8192e/rtllib_module.c
@@ -45,7 +45,6 @@
45#include <linux/slab.h> 45#include <linux/slab.h>
46#include <linux/tcp.h> 46#include <linux/tcp.h>
47#include <linux/types.h> 47#include <linux/types.h>
48#include <linux/version.h>
49#include <linux/wireless.h> 48#include <linux/wireless.h>
50#include <linux/etherdevice.h> 49#include <linux/etherdevice.h>
51#include <linux/uaccess.h> 50#include <linux/uaccess.h>
@@ -54,7 +53,9 @@
54#include "rtllib.h" 53#include "rtllib.h"
55 54
56 55
57#define DRV_NAME "rtllib_92e" 56u32 rt_global_debug_component = COMP_ERR;
57EXPORT_SYMBOL(rt_global_debug_component);
58
58 59
59void _setup_timer(struct timer_list *ptimer, void *fun, unsigned long data) 60void _setup_timer(struct timer_list *ptimer, void *fun, unsigned long data)
60{ 61{
@@ -135,10 +136,6 @@ struct net_device *alloc_rtllib(int sizeof_priv)
135 ieee->host_decrypt = 1; 136 ieee->host_decrypt = 1;
136 ieee->ieee802_1x = 1; /* Default to supporting 802.1x */ 137 ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
137 138
138 INIT_LIST_HEAD(&ieee->crypt_deinit_list);
139 _setup_timer(&ieee->crypt_deinit_timer,
140 rtllib_crypt_deinit_handler,
141 (unsigned long) ieee);
142 ieee->rtllib_ap_sec_type = rtllib_ap_sec_type; 139 ieee->rtllib_ap_sec_type = rtllib_ap_sec_type;
143 140
144 spin_lock_init(&ieee->lock); 141 spin_lock_init(&ieee->lock);
@@ -148,6 +145,9 @@ struct net_device *alloc_rtllib(int sizeof_priv)
148 atomic_set(&(ieee->atm_chnlop), 0); 145 atomic_set(&(ieee->atm_chnlop), 0);
149 atomic_set(&(ieee->atm_swbw), 0); 146 atomic_set(&(ieee->atm_swbw), 0);
150 147
148 /* SAM FIXME */
149 lib80211_crypt_info_init(&ieee->crypt_info, "RTLLIB", &ieee->lock);
150
151 ieee->bHalfNMode = false; 151 ieee->bHalfNMode = false;
152 ieee->wpa_enabled = 0; 152 ieee->wpa_enabled = 0;
153 ieee->tkip_countermeasures = 0; 153 ieee->tkip_countermeasures = 0;
@@ -177,10 +177,6 @@ struct net_device *alloc_rtllib(int sizeof_priv)
177 ieee->last_packet_time[i] = 0; 177 ieee->last_packet_time[i] = 0;
178 } 178 }
179 179
180 rtllib_tkip_null();
181 rtllib_wep_null();
182 rtllib_ccmp_null();
183
184 return dev; 180 return dev;
185 181
186 failed: 182 failed:
@@ -188,32 +184,23 @@ struct net_device *alloc_rtllib(int sizeof_priv)
188 free_netdev(dev); 184 free_netdev(dev);
189 return NULL; 185 return NULL;
190} 186}
187EXPORT_SYMBOL(alloc_rtllib);
191 188
192void free_rtllib(struct net_device *dev) 189void free_rtllib(struct net_device *dev)
193{ 190{
194 struct rtllib_device *ieee = (struct rtllib_device *) 191 struct rtllib_device *ieee = (struct rtllib_device *)
195 netdev_priv_rsl(dev); 192 netdev_priv_rsl(dev);
196 int i;
197 193
198 kfree(ieee->pHTInfo); 194 kfree(ieee->pHTInfo);
199 ieee->pHTInfo = NULL; 195 ieee->pHTInfo = NULL;
200 rtllib_softmac_free(ieee); 196 rtllib_softmac_free(ieee);
201 del_timer_sync(&ieee->crypt_deinit_timer); 197
202 rtllib_crypt_deinit_entries(ieee, 1); 198 lib80211_crypt_info_free(&ieee->crypt_info);
203
204 for (i = 0; i < WEP_KEYS; i++) {
205 struct rtllib_crypt_data *crypt = ieee->crypt[i];
206 if (crypt) {
207 if (crypt->ops)
208 crypt->ops->deinit(crypt->priv);
209 kfree(crypt);
210 ieee->crypt[i] = NULL;
211 }
212 }
213 199
214 rtllib_networks_free(ieee); 200 rtllib_networks_free(ieee);
215 free_netdev(dev); 201 free_netdev(dev);
216} 202}
203EXPORT_SYMBOL(free_rtllib);
217 204
218u32 rtllib_debug_level; 205u32 rtllib_debug_level;
219static int debug = \ 206static int debug = \
@@ -287,3 +274,8 @@ void __exit rtllib_exit(void)
287 rtllib_proc = NULL; 274 rtllib_proc = NULL;
288 } 275 }
289} 276}
277
278module_init(rtllib_init);
279module_exit(rtllib_exit);
280
281MODULE_LICENSE("GPL");
diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c
index 8d0af5ed8ecf..6c5061f12bad 100644
--- a/drivers/staging/rtl8192e/rtllib_rx.c
+++ b/drivers/staging/rtl8192e/rtllib_rx.c
@@ -36,7 +36,6 @@
36#include <linux/slab.h> 36#include <linux/slab.h>
37#include <linux/tcp.h> 37#include <linux/tcp.h>
38#include <linux/types.h> 38#include <linux/types.h>
39#include <linux/version.h>
40#include <linux/wireless.h> 39#include <linux/wireless.h>
41#include <linux/etherdevice.h> 40#include <linux/etherdevice.h>
42#include <linux/uaccess.h> 41#include <linux/uaccess.h>
@@ -281,7 +280,7 @@ static int rtllib_is_eapol_frame(struct rtllib_device *ieee,
281/* Called only as a tasklet (software IRQ), by rtllib_rx */ 280/* Called only as a tasklet (software IRQ), by rtllib_rx */
282static inline int 281static inline int
283rtllib_rx_frame_decrypt(struct rtllib_device *ieee, struct sk_buff *skb, 282rtllib_rx_frame_decrypt(struct rtllib_device *ieee, struct sk_buff *skb,
284 struct rtllib_crypt_data *crypt) 283 struct lib80211_crypt_data *crypt)
285{ 284{
286 struct rtllib_hdr_4addr *hdr; 285 struct rtllib_hdr_4addr *hdr;
287 int res, hdrlen; 286 int res, hdrlen;
@@ -322,7 +321,7 @@ rtllib_rx_frame_decrypt(struct rtllib_device *ieee, struct sk_buff *skb,
322/* Called only as a tasklet (software IRQ), by rtllib_rx */ 321/* Called only as a tasklet (software IRQ), by rtllib_rx */
323static inline int 322static inline int
324rtllib_rx_frame_decrypt_msdu(struct rtllib_device *ieee, struct sk_buff *skb, 323rtllib_rx_frame_decrypt_msdu(struct rtllib_device *ieee, struct sk_buff *skb,
325 int keyidx, struct rtllib_crypt_data *crypt) 324 int keyidx, struct lib80211_crypt_data *crypt)
326{ 325{
327 struct rtllib_hdr_4addr *hdr; 326 struct rtllib_hdr_4addr *hdr;
328 int res, hdrlen; 327 int res, hdrlen;
@@ -341,7 +340,7 @@ rtllib_rx_frame_decrypt_msdu(struct rtllib_device *ieee, struct sk_buff *skb,
341 hdrlen = rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl)); 340 hdrlen = rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
342 341
343 atomic_inc(&crypt->refcnt); 342 atomic_inc(&crypt->refcnt);
344 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv, ieee); 343 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
345 atomic_dec(&crypt->refcnt); 344 atomic_dec(&crypt->refcnt);
346 if (res < 0) { 345 if (res < 0) {
347 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" 346 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
@@ -1010,7 +1009,7 @@ static int rtllib_rx_data_filter(struct rtllib_device *ieee, u16 fc,
1010} 1009}
1011 1010
1012static int rtllib_rx_get_crypt(struct rtllib_device *ieee, struct sk_buff *skb, 1011static int rtllib_rx_get_crypt(struct rtllib_device *ieee, struct sk_buff *skb,
1013 struct rtllib_crypt_data **crypt, size_t hdrlen) 1012 struct lib80211_crypt_data **crypt, size_t hdrlen)
1014{ 1013{
1015 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data; 1014 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1016 u16 fc = le16_to_cpu(hdr->frame_ctl); 1015 u16 fc = le16_to_cpu(hdr->frame_ctl);
@@ -1020,7 +1019,7 @@ static int rtllib_rx_get_crypt(struct rtllib_device *ieee, struct sk_buff *skb,
1020 if (skb->len >= hdrlen + 3) 1019 if (skb->len >= hdrlen + 3)
1021 idx = skb->data[hdrlen + 3] >> 6; 1020 idx = skb->data[hdrlen + 3] >> 6;
1022 1021
1023 *crypt = ieee->crypt[idx]; 1022 *crypt = ieee->crypt_info.crypt[idx];
1024 /* allow NULL decrypt to indicate an station specific override 1023 /* allow NULL decrypt to indicate an station specific override
1025 * for default encryption */ 1024 * for default encryption */
1026 if (*crypt && ((*crypt)->ops == NULL || 1025 if (*crypt && ((*crypt)->ops == NULL ||
@@ -1045,7 +1044,7 @@ static int rtllib_rx_get_crypt(struct rtllib_device *ieee, struct sk_buff *skb,
1045 1044
1046static int rtllib_rx_decrypt(struct rtllib_device *ieee, struct sk_buff *skb, 1045static int rtllib_rx_decrypt(struct rtllib_device *ieee, struct sk_buff *skb,
1047 struct rtllib_rx_stats *rx_stats, 1046 struct rtllib_rx_stats *rx_stats,
1048 struct rtllib_crypt_data *crypt, size_t hdrlen) 1047 struct lib80211_crypt_data *crypt, size_t hdrlen)
1049{ 1048{
1050 struct rtllib_hdr_4addr *hdr; 1049 struct rtllib_hdr_4addr *hdr;
1051 int keyidx = 0; 1050 int keyidx = 0;
@@ -1253,7 +1252,7 @@ static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb,
1253{ 1252{
1254 struct net_device *dev = ieee->dev; 1253 struct net_device *dev = ieee->dev;
1255 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data; 1254 struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
1256 struct rtllib_crypt_data *crypt = NULL; 1255 struct lib80211_crypt_data *crypt = NULL;
1257 struct rtllib_rxb *rxb = NULL; 1256 struct rtllib_rxb *rxb = NULL;
1258 struct rx_ts_record *pTS = NULL; 1257 struct rx_ts_record *pTS = NULL;
1259 u16 fc, sc, SeqNum = 0; 1258 u16 fc, sc, SeqNum = 0;
@@ -1497,6 +1496,7 @@ int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
1497 ieee->stats.rx_dropped++; 1496 ieee->stats.rx_dropped++;
1498 return 0; 1497 return 0;
1499} 1498}
1499EXPORT_SYMBOL(rtllib_rx);
1500 1500
1501static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 }; 1501static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 };
1502 1502
@@ -2492,7 +2492,7 @@ static int IsPassiveChannel(struct rtllib_device *rtllib, u8 channel)
2492 return 0; 2492 return 0;
2493} 2493}
2494 2494
2495int IsLegalChannel(struct rtllib_device *rtllib, u8 channel) 2495int rtllib_legal_channel(struct rtllib_device *rtllib, u8 channel)
2496{ 2496{
2497 if (MAX_CHANNEL_NUMBER < channel) { 2497 if (MAX_CHANNEL_NUMBER < channel) {
2498 printk(KERN_INFO "%s(): Invalid Channel\n", __func__); 2498 printk(KERN_INFO "%s(): Invalid Channel\n", __func__);
@@ -2503,6 +2503,7 @@ int IsLegalChannel(struct rtllib_device *rtllib, u8 channel)
2503 2503
2504 return 0; 2504 return 0;
2505} 2505}
2506EXPORT_SYMBOL(rtllib_legal_channel);
2506 2507
2507static inline void rtllib_process_probe_response( 2508static inline void rtllib_process_probe_response(
2508 struct rtllib_device *ieee, 2509 struct rtllib_device *ieee,
@@ -2553,7 +2554,7 @@ static inline void rtllib_process_probe_response(
2553 } 2554 }
2554 2555
2555 2556
2556 if (!IsLegalChannel(ieee, network->channel)) 2557 if (!rtllib_legal_channel(ieee, network->channel))
2557 goto free_network; 2558 goto free_network;
2558 2559
2559 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == 2560 if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c
index b5086850f0de..1637f1110991 100644
--- a/drivers/staging/rtl8192e/rtllib_softmac.c
+++ b/drivers/staging/rtl8192e/rtllib_softmac.c
@@ -15,11 +15,9 @@
15 15
16 16
17#include "rtllib.h" 17#include "rtllib.h"
18#include "rtl_core.h"
19 18
20#include <linux/random.h> 19#include <linux/random.h>
21#include <linux/delay.h> 20#include <linux/delay.h>
22#include <linux/version.h>
23#include <linux/uaccess.h> 21#include <linux/uaccess.h>
24#include "dot11d.h" 22#include "dot11d.h"
25 23
@@ -28,9 +26,9 @@ short rtllib_is_54g(struct rtllib_network *net)
28 return (net->rates_ex_len > 0) || (net->rates_len > 4); 26 return (net->rates_ex_len > 0) || (net->rates_len > 4);
29} 27}
30 28
31short rtllib_is_shortslot(struct rtllib_network net) 29short rtllib_is_shortslot(const struct rtllib_network *net)
32{ 30{
33 return net.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME; 31 return net->capability & WLAN_CAPABILITY_SHORT_SLOT_TIME;
34} 32}
35 33
36/* returns the total length needed for pleacing the RATE MFIE 34/* returns the total length needed for pleacing the RATE MFIE
@@ -468,6 +466,7 @@ void rtllib_EnableIntelPromiscuousMode(struct net_device *dev,
468 466
469 ieee->bNetPromiscuousMode = true; 467 ieee->bNetPromiscuousMode = true;
470} 468}
469EXPORT_SYMBOL(rtllib_EnableIntelPromiscuousMode);
471 470
472 471
473/* 472/*
@@ -490,6 +489,7 @@ void rtllib_DisableIntelPromiscuousMode(struct net_device *dev,
490 489
491 ieee->bNetPromiscuousMode = false; 490 ieee->bNetPromiscuousMode = false;
492} 491}
492EXPORT_SYMBOL(rtllib_DisableIntelPromiscuousMode);
493 493
494static void rtllib_send_probe(struct rtllib_device *ieee, u8 is_mesh) 494static void rtllib_send_probe(struct rtllib_device *ieee, u8 is_mesh)
495{ 495{
@@ -685,6 +685,7 @@ void rtllib_stop_send_beacons(struct rtllib_device *ieee)
685 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS) 685 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
686 rtllib_beacons_stop(ieee); 686 rtllib_beacons_stop(ieee);
687} 687}
688EXPORT_SYMBOL(rtllib_stop_send_beacons);
688 689
689 690
690void rtllib_start_send_beacons(struct rtllib_device *ieee) 691void rtllib_start_send_beacons(struct rtllib_device *ieee)
@@ -694,6 +695,7 @@ void rtllib_start_send_beacons(struct rtllib_device *ieee)
694 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS) 695 if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
695 rtllib_beacons_start(ieee); 696 rtllib_beacons_start(ieee);
696} 697}
698EXPORT_SYMBOL(rtllib_start_send_beacons);
697 699
698 700
699static void rtllib_softmac_stop_scan(struct rtllib_device *ieee) 701static void rtllib_softmac_stop_scan(struct rtllib_device *ieee)
@@ -719,6 +721,7 @@ void rtllib_stop_scan(struct rtllib_device *ieee)
719 ieee->rtllib_stop_hw_scan(ieee->dev); 721 ieee->rtllib_stop_hw_scan(ieee->dev);
720 } 722 }
721} 723}
724EXPORT_SYMBOL(rtllib_stop_scan);
722 725
723void rtllib_stop_scan_syncro(struct rtllib_device *ieee) 726void rtllib_stop_scan_syncro(struct rtllib_device *ieee)
724{ 727{
@@ -729,6 +732,7 @@ void rtllib_stop_scan_syncro(struct rtllib_device *ieee)
729 ieee->rtllib_stop_hw_scan(ieee->dev); 732 ieee->rtllib_stop_hw_scan(ieee->dev);
730 } 733 }
731} 734}
735EXPORT_SYMBOL(rtllib_stop_scan_syncro);
732 736
733bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan) 737bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan)
734{ 738{
@@ -741,6 +745,7 @@ bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan)
741 return test_bit(STATUS_SCANNING, &ieee->status); 745 return test_bit(STATUS_SCANNING, &ieee->status);
742 } 746 }
743} 747}
748EXPORT_SYMBOL(rtllib_act_scanning);
744 749
745/* called with ieee->lock held */ 750/* called with ieee->lock held */
746static void rtllib_start_scan(struct rtllib_device *ieee) 751static void rtllib_start_scan(struct rtllib_device *ieee)
@@ -781,6 +786,7 @@ void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh)
781 ieee->rtllib_start_hw_scan(ieee->dev); 786 ieee->rtllib_start_hw_scan(ieee->dev);
782 } 787 }
783} 788}
789EXPORT_SYMBOL(rtllib_start_scan_syncro);
784 790
785inline struct sk_buff *rtllib_authentication_req(struct rtllib_network *beacon, 791inline struct sk_buff *rtllib_authentication_req(struct rtllib_network *beacon,
786 struct rtllib_device *ieee, int challengelen, u8 *daddr) 792 struct rtllib_device *ieee, int challengelen, u8 *daddr)
@@ -830,7 +836,7 @@ static struct sk_buff *rtllib_probe_resp(struct rtllib_device *ieee, u8 *dest)
830 struct sk_buff *skb = NULL; 836 struct sk_buff *skb = NULL;
831 int encrypt; 837 int encrypt;
832 int atim_len, erp_len; 838 int atim_len, erp_len;
833 struct rtllib_crypt_data *crypt; 839 struct lib80211_crypt_data *crypt;
834 840
835 char *ssid = ieee->current_network.ssid; 841 char *ssid = ieee->current_network.ssid;
836 int ssid_len = ieee->current_network.ssid_len; 842 int ssid_len = ieee->current_network.ssid_len;
@@ -865,9 +871,9 @@ static struct sk_buff *rtllib_probe_resp(struct rtllib_device *ieee, u8 *dest)
865 } else 871 } else
866 erp_len = 0; 872 erp_len = 0;
867 873
868 crypt = ieee->crypt[ieee->tx_keyidx]; 874 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
869 encrypt = ieee->host_encrypt && crypt && crypt->ops && 875 encrypt = ieee->host_encrypt && crypt && crypt->ops &&
870 ((0 == strcmp(crypt->ops->name, "WEP") || wpa_ie_len)); 876 ((0 == strcmp(crypt->ops->name, "R-WEP") || wpa_ie_len));
871 if (ieee->pHTInfo->bCurrentHTSupport) { 877 if (ieee->pHTInfo->bCurrentHTSupport) {
872 tmp_ht_cap_buf = (u8 *) &(ieee->pHTInfo->SelfHTCap); 878 tmp_ht_cap_buf = (u8 *) &(ieee->pHTInfo->SelfHTCap);
873 tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap); 879 tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
@@ -917,7 +923,7 @@ static struct sk_buff *rtllib_probe_resp(struct rtllib_device *ieee, u8 *dest)
917 cpu_to_le16((beacon_buf->capability |= 923 cpu_to_le16((beacon_buf->capability |=
918 WLAN_CAPABILITY_SHORT_SLOT_TIME)); 924 WLAN_CAPABILITY_SHORT_SLOT_TIME));
919 925
920 crypt = ieee->crypt[ieee->tx_keyidx]; 926 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
921 if (encrypt) 927 if (encrypt)
922 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY); 928 beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
923 929
@@ -976,7 +982,7 @@ static struct sk_buff *rtllib_assoc_resp(struct rtllib_device *ieee, u8 *dest)
976 struct sk_buff *skb; 982 struct sk_buff *skb;
977 u8 *tag; 983 u8 *tag;
978 984
979 struct rtllib_crypt_data *crypt; 985 struct lib80211_crypt_data *crypt;
980 struct rtllib_assoc_response_frame *assoc; 986 struct rtllib_assoc_response_frame *assoc;
981 short encrypt; 987 short encrypt;
982 988
@@ -1007,7 +1013,7 @@ static struct sk_buff *rtllib_assoc_resp(struct rtllib_device *ieee, u8 *dest)
1007 cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME); 1013 cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME);
1008 1014
1009 if (ieee->host_encrypt) 1015 if (ieee->host_encrypt)
1010 crypt = ieee->crypt[ieee->tx_keyidx]; 1016 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
1011 else 1017 else
1012 crypt = NULL; 1018 crypt = NULL;
1013 1019
@@ -1172,7 +1178,7 @@ inline struct sk_buff *rtllib_association_req(struct rtllib_network *beacon,
1172 unsigned int ckip_ie_len = 0; 1178 unsigned int ckip_ie_len = 0;
1173 unsigned int ccxrm_ie_len = 0; 1179 unsigned int ccxrm_ie_len = 0;
1174 unsigned int cxvernum_ie_len = 0; 1180 unsigned int cxvernum_ie_len = 0;
1175 struct rtllib_crypt_data *crypt; 1181 struct lib80211_crypt_data *crypt;
1176 int encrypt; 1182 int encrypt;
1177 int PMKCacheIdx; 1183 int PMKCacheIdx;
1178 1184
@@ -1185,10 +1191,10 @@ inline struct sk_buff *rtllib_association_req(struct rtllib_network *beacon,
1185 unsigned int turbo_info_len = beacon->Turbo_Enable ? 9 : 0; 1191 unsigned int turbo_info_len = beacon->Turbo_Enable ? 9 : 0;
1186 1192
1187 int len = 0; 1193 int len = 0;
1188 crypt = ieee->crypt[ieee->tx_keyidx]; 1194 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
1189 if (crypt != NULL) 1195 if (crypt != NULL)
1190 encrypt = ieee->host_encrypt && crypt && crypt->ops && 1196 encrypt = ieee->host_encrypt && crypt && crypt->ops &&
1191 ((0 == strcmp(crypt->ops->name, "WEP") || 1197 ((0 == strcmp(crypt->ops->name, "R-WEP") ||
1192 wpa_ie_len)); 1198 wpa_ie_len));
1193 else 1199 else
1194 encrypt = 0; 1200 encrypt = 0;
@@ -1956,6 +1962,7 @@ void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr)
1956 if (buf) 1962 if (buf)
1957 softmac_ps_mgmt_xmit(buf, ieee); 1963 softmac_ps_mgmt_xmit(buf, ieee);
1958} 1964}
1965EXPORT_SYMBOL(rtllib_sta_ps_send_null_frame);
1959 1966
1960void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee) 1967void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee)
1961{ 1968{
@@ -2168,6 +2175,7 @@ void rtllib_ps_tx_ack(struct rtllib_device *ieee, short success)
2168 } 2175 }
2169 spin_unlock_irqrestore(&ieee->lock, flags); 2176 spin_unlock_irqrestore(&ieee->lock, flags);
2170} 2177}
2178EXPORT_SYMBOL(rtllib_ps_tx_ack);
2171 2179
2172static void rtllib_process_action(struct rtllib_device *ieee, struct sk_buff *skb) 2180static void rtllib_process_action(struct rtllib_device *ieee, struct sk_buff *skb)
2173{ 2181{
@@ -2540,6 +2548,7 @@ void rtllib_reset_queue(struct rtllib_device *ieee)
2540 spin_unlock_irqrestore(&ieee->lock, flags); 2548 spin_unlock_irqrestore(&ieee->lock, flags);
2541 2549
2542} 2550}
2551EXPORT_SYMBOL(rtllib_reset_queue);
2543 2552
2544void rtllib_wake_queue(struct rtllib_device *ieee) 2553void rtllib_wake_queue(struct rtllib_device *ieee)
2545{ 2554{
@@ -2928,6 +2937,7 @@ struct sk_buff *rtllib_get_beacon(struct rtllib_device *ieee)
2928 2937
2929 return skb; 2938 return skb;
2930} 2939}
2940EXPORT_SYMBOL(rtllib_get_beacon);
2931 2941
2932void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag, 2942void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag,
2933 u8 shutdown) 2943 u8 shutdown)
@@ -2937,6 +2947,7 @@ void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag,
2937 rtllib_stop_protocol(ieee, shutdown); 2947 rtllib_stop_protocol(ieee, shutdown);
2938 up(&ieee->wx_sem); 2948 up(&ieee->wx_sem);
2939} 2949}
2950EXPORT_SYMBOL(rtllib_softmac_stop_protocol);
2940 2951
2941 2952
2942void rtllib_stop_protocol(struct rtllib_device *ieee, u8 shutdown) 2953void rtllib_stop_protocol(struct rtllib_device *ieee, u8 shutdown)
@@ -2985,6 +2996,7 @@ void rtllib_softmac_start_protocol(struct rtllib_device *ieee, u8 mesh_flag)
2985 rtllib_start_protocol(ieee); 2996 rtllib_start_protocol(ieee);
2986 up(&ieee->wx_sem); 2997 up(&ieee->wx_sem);
2987} 2998}
2999EXPORT_SYMBOL(rtllib_softmac_start_protocol);
2988 3000
2989void rtllib_start_protocol(struct rtllib_device *ieee) 3001void rtllib_start_protocol(struct rtllib_device *ieee)
2990{ 3002{
@@ -3048,10 +3060,9 @@ void rtllib_softmac_init(struct rtllib_device *ieee)
3048 ieee->state = RTLLIB_NOLINK; 3060 ieee->state = RTLLIB_NOLINK;
3049 for (i = 0; i < 5; i++) 3061 for (i = 0; i < 5; i++)
3050 ieee->seq_ctrl[i] = 0; 3062 ieee->seq_ctrl[i] = 0;
3051 ieee->pDot11dInfo = kmalloc(sizeof(struct rt_dot11d_info), GFP_ATOMIC); 3063 ieee->pDot11dInfo = kzalloc(sizeof(struct rt_dot11d_info), GFP_ATOMIC);
3052 if (!ieee->pDot11dInfo) 3064 if (!ieee->pDot11dInfo)
3053 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for DOT11D\n"); 3065 RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for DOT11D\n");
3054 memset(ieee->pDot11dInfo, 0, sizeof(struct rt_dot11d_info));
3055 ieee->LinkDetectInfo.SlotIndex = 0; 3066 ieee->LinkDetectInfo.SlotIndex = 0;
3056 ieee->LinkDetectInfo.SlotNum = 2; 3067 ieee->LinkDetectInfo.SlotNum = 2;
3057 ieee->LinkDetectInfo.NumRecvBcnInPeriod = 0; 3068 ieee->LinkDetectInfo.NumRecvBcnInPeriod = 0;
@@ -3207,11 +3218,11 @@ static int rtllib_wpa_set_wpa_ie(struct rtllib_device *ieee,
3207 return -EINVAL; 3218 return -EINVAL;
3208 3219
3209 if (param->u.wpa_ie.len) { 3220 if (param->u.wpa_ie.len) {
3210 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL); 3221 buf = kmemdup(param->u.wpa_ie.data, param->u.wpa_ie.len,
3222 GFP_KERNEL);
3211 if (buf == NULL) 3223 if (buf == NULL)
3212 return -ENOMEM; 3224 return -ENOMEM;
3213 3225
3214 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
3215 kfree(ieee->wpa_ie); 3226 kfree(ieee->wpa_ie);
3216 ieee->wpa_ie = buf; 3227 ieee->wpa_ie = buf;
3217 ieee->wpa_ie_len = param->u.wpa_ie.len; 3228 ieee->wpa_ie_len = param->u.wpa_ie.len;
@@ -3334,8 +3345,8 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3334 u8 is_mesh) 3345 u8 is_mesh)
3335{ 3346{
3336 int ret = 0; 3347 int ret = 0;
3337 struct rtllib_crypto_ops *ops; 3348 struct lib80211_crypto_ops *ops;
3338 struct rtllib_crypt_data **crypt; 3349 struct lib80211_crypt_data **crypt;
3339 3350
3340 struct rtllib_security sec = { 3351 struct rtllib_security sec = {
3341 .flags = 0, 3352 .flags = 0,
@@ -3354,9 +3365,9 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3354 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && 3365 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
3355 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && 3366 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
3356 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { 3367 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
3357 if (param->u.crypt.idx >= WEP_KEYS) 3368 if (param->u.crypt.idx >= NUM_WEP_KEYS)
3358 return -EINVAL; 3369 return -EINVAL;
3359 crypt = &ieee->crypt[param->u.crypt.idx]; 3370 crypt = &ieee->crypt_info.crypt[param->u.crypt.idx];
3360 } else { 3371 } else {
3361 return -EINVAL; 3372 return -EINVAL;
3362 } 3373 }
@@ -3366,7 +3377,7 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3366 sec.enabled = 0; 3377 sec.enabled = 0;
3367 sec.level = SEC_LEVEL_0; 3378 sec.level = SEC_LEVEL_0;
3368 sec.flags |= SEC_ENABLED | SEC_LEVEL; 3379 sec.flags |= SEC_ENABLED | SEC_LEVEL;
3369 rtllib_crypt_delayed_deinit(ieee, crypt); 3380 lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
3370 } 3381 }
3371 goto done; 3382 goto done;
3372 } 3383 }
@@ -3375,19 +3386,19 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3375 3386
3376 /* IPW HW cannot build TKIP MIC, host decryption still needed. */ 3387 /* IPW HW cannot build TKIP MIC, host decryption still needed. */
3377 if (!(ieee->host_encrypt || ieee->host_decrypt) && 3388 if (!(ieee->host_encrypt || ieee->host_decrypt) &&
3378 strcmp(param->u.crypt.alg, "TKIP")) 3389 strcmp(param->u.crypt.alg, "R-TKIP"))
3379 goto skip_host_crypt; 3390 goto skip_host_crypt;
3380 3391
3381 ops = rtllib_get_crypto_ops(param->u.crypt.alg); 3392 ops = lib80211_get_crypto_ops(param->u.crypt.alg);
3382 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { 3393 if (ops == NULL && strcmp(param->u.crypt.alg, "R-WEP") == 0) {
3383 request_module("rtllib_crypt_wep"); 3394 request_module("rtllib_crypt_wep");
3384 ops = rtllib_get_crypto_ops(param->u.crypt.alg); 3395 ops = lib80211_get_crypto_ops(param->u.crypt.alg);
3385 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { 3396 } else if (ops == NULL && strcmp(param->u.crypt.alg, "R-TKIP") == 0) {
3386 request_module("rtllib_crypt_tkip"); 3397 request_module("rtllib_crypt_tkip");
3387 ops = rtllib_get_crypto_ops(param->u.crypt.alg); 3398 ops = lib80211_get_crypto_ops(param->u.crypt.alg);
3388 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { 3399 } else if (ops == NULL && strcmp(param->u.crypt.alg, "R-CCMP") == 0) {
3389 request_module("rtllib_crypt_ccmp"); 3400 request_module("rtllib_crypt_ccmp");
3390 ops = rtllib_get_crypto_ops(param->u.crypt.alg); 3401 ops = lib80211_get_crypto_ops(param->u.crypt.alg);
3391 } 3402 }
3392 if (ops == NULL) { 3403 if (ops == NULL) {
3393 printk(KERN_INFO "unknown crypto alg '%s'\n", 3404 printk(KERN_INFO "unknown crypto alg '%s'\n",
@@ -3397,17 +3408,17 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3397 goto done; 3408 goto done;
3398 } 3409 }
3399 if (*crypt == NULL || (*crypt)->ops != ops) { 3410 if (*crypt == NULL || (*crypt)->ops != ops) {
3400 struct rtllib_crypt_data *new_crypt; 3411 struct lib80211_crypt_data *new_crypt;
3401 3412
3402 rtllib_crypt_delayed_deinit(ieee, crypt); 3413 lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
3403 3414
3404 new_crypt = (struct rtllib_crypt_data *) 3415 new_crypt = (struct lib80211_crypt_data *)
3405 kmalloc(sizeof(*new_crypt), GFP_KERNEL); 3416 kmalloc(sizeof(*new_crypt), GFP_KERNEL);
3406 if (new_crypt == NULL) { 3417 if (new_crypt == NULL) {
3407 ret = -ENOMEM; 3418 ret = -ENOMEM;
3408 goto done; 3419 goto done;
3409 } 3420 }
3410 memset(new_crypt, 0, sizeof(struct rtllib_crypt_data)); 3421 memset(new_crypt, 0, sizeof(struct lib80211_crypt_data));
3411 new_crypt->ops = ops; 3422 new_crypt->ops = ops;
3412 if (new_crypt->ops) 3423 if (new_crypt->ops)
3413 new_crypt->priv = 3424 new_crypt->priv =
@@ -3435,7 +3446,7 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3435 3446
3436 skip_host_crypt: 3447 skip_host_crypt:
3437 if (param->u.crypt.set_tx) { 3448 if (param->u.crypt.set_tx) {
3438 ieee->tx_keyidx = param->u.crypt.idx; 3449 ieee->crypt_info.tx_keyidx = param->u.crypt.idx;
3439 sec.active_key = param->u.crypt.idx; 3450 sec.active_key = param->u.crypt.idx;
3440 sec.flags |= SEC_ACTIVE_KEY; 3451 sec.flags |= SEC_ACTIVE_KEY;
3441 } else 3452 } else
@@ -3448,13 +3459,13 @@ static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
3448 sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len; 3459 sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
3449 sec.flags |= (1 << param->u.crypt.idx); 3460 sec.flags |= (1 << param->u.crypt.idx);
3450 3461
3451 if (strcmp(param->u.crypt.alg, "WEP") == 0) { 3462 if (strcmp(param->u.crypt.alg, "R-WEP") == 0) {
3452 sec.flags |= SEC_LEVEL; 3463 sec.flags |= SEC_LEVEL;
3453 sec.level = SEC_LEVEL_1; 3464 sec.level = SEC_LEVEL_1;
3454 } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) { 3465 } else if (strcmp(param->u.crypt.alg, "R-TKIP") == 0) {
3455 sec.flags |= SEC_LEVEL; 3466 sec.flags |= SEC_LEVEL;
3456 sec.level = SEC_LEVEL_2; 3467 sec.level = SEC_LEVEL_2;
3457 } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { 3468 } else if (strcmp(param->u.crypt.alg, "R-CCMP") == 0) {
3458 sec.flags |= SEC_LEVEL; 3469 sec.flags |= SEC_LEVEL;
3459 sec.level = SEC_LEVEL_3; 3470 sec.level = SEC_LEVEL_3;
3460 } 3471 }
@@ -3551,13 +3562,13 @@ u8 rtllib_ap_sec_type(struct rtllib_device *ieee)
3551 static u8 ccmp_ie[4] = {0x00, 0x50, 0xf2, 0x04}; 3562 static u8 ccmp_ie[4] = {0x00, 0x50, 0xf2, 0x04};
3552 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04}; 3563 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
3553 int wpa_ie_len = ieee->wpa_ie_len; 3564 int wpa_ie_len = ieee->wpa_ie_len;
3554 struct rtllib_crypt_data *crypt; 3565 struct lib80211_crypt_data *crypt;
3555 int encrypt; 3566 int encrypt;
3556 3567
3557 crypt = ieee->crypt[ieee->tx_keyidx]; 3568 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
3558 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) 3569 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY)
3559 || (ieee->host_encrypt && crypt && crypt->ops && 3570 || (ieee->host_encrypt && crypt && crypt->ops &&
3560 (0 == strcmp(crypt->ops->name, "WEP"))); 3571 (0 == strcmp(crypt->ops->name, "R-WEP")));
3561 3572
3562 /* simply judge */ 3573 /* simply judge */
3563 if (encrypt && (wpa_ie_len == 0)) { 3574 if (encrypt && (wpa_ie_len == 0)) {
@@ -3634,6 +3645,7 @@ out:
3634 3645
3635 return ret; 3646 return ret;
3636} 3647}
3648EXPORT_SYMBOL(rtllib_wpa_supplicant_ioctl);
3637 3649
3638void rtllib_MgntDisconnectIBSS(struct rtllib_device *rtllib) 3650void rtllib_MgntDisconnectIBSS(struct rtllib_device *rtllib)
3639{ 3651{
@@ -3719,6 +3731,7 @@ bool rtllib_MgntDisconnect(struct rtllib_device *rtllib, u8 asRsn)
3719 3731
3720 return true; 3732 return true;
3721} 3733}
3734EXPORT_SYMBOL(rtllib_MgntDisconnect);
3722 3735
3723void notify_wx_assoc_event(struct rtllib_device *ieee) 3736void notify_wx_assoc_event(struct rtllib_device *ieee)
3724{ 3737{
@@ -3739,3 +3752,4 @@ void notify_wx_assoc_event(struct rtllib_device *ieee)
3739 } 3752 }
3740 wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL); 3753 wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
3741} 3754}
3755EXPORT_SYMBOL(notify_wx_assoc_event);
diff --git a/drivers/staging/rtl8192e/rtllib_softmac_wx.c b/drivers/staging/rtl8192e/rtllib_softmac_wx.c
index 22988fbd444b..1523bc7a2105 100644
--- a/drivers/staging/rtl8192e/rtllib_softmac_wx.c
+++ b/drivers/staging/rtl8192e/rtllib_softmac_wx.c
@@ -15,7 +15,6 @@
15 15
16 16
17#include "rtllib.h" 17#include "rtllib.h"
18#include "rtl_core.h"
19#include "dot11d.h" 18#include "dot11d.h"
20/* FIXME: add A freqs */ 19/* FIXME: add A freqs */
21 20
@@ -25,6 +24,7 @@ const long rtllib_wlan_frequencies[] = {
25 2452, 2457, 2462, 2467, 24 2452, 2457, 2462, 2467,
26 2472, 2484 25 2472, 2484
27}; 26};
27EXPORT_SYMBOL(rtllib_wlan_frequencies);
28 28
29 29
30int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a, 30int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a,
@@ -82,6 +82,7 @@ out:
82 up(&ieee->wx_sem); 82 up(&ieee->wx_sem);
83 return ret; 83 return ret;
84} 84}
85EXPORT_SYMBOL(rtllib_wx_set_freq);
85 86
86 87
87int rtllib_wx_get_freq(struct rtllib_device *ieee, 88int rtllib_wx_get_freq(struct rtllib_device *ieee,
@@ -97,6 +98,7 @@ int rtllib_wx_get_freq(struct rtllib_device *ieee,
97 fwrq->e = 1; 98 fwrq->e = 1;
98 return 0; 99 return 0;
99} 100}
101EXPORT_SYMBOL(rtllib_wx_get_freq);
100 102
101int rtllib_wx_get_wap(struct rtllib_device *ieee, 103int rtllib_wx_get_wap(struct rtllib_device *ieee,
102 struct iw_request_info *info, 104 struct iw_request_info *info,
@@ -125,6 +127,7 @@ int rtllib_wx_get_wap(struct rtllib_device *ieee,
125 127
126 return 0; 128 return 0;
127} 129}
130EXPORT_SYMBOL(rtllib_wx_get_wap);
128 131
129 132
130int rtllib_wx_set_wap(struct rtllib_device *ieee, 133int rtllib_wx_set_wap(struct rtllib_device *ieee,
@@ -184,6 +187,7 @@ out:
184 up(&ieee->wx_sem); 187 up(&ieee->wx_sem);
185 return ret; 188 return ret;
186} 189}
190EXPORT_SYMBOL(rtllib_wx_set_wap);
187 191
188int rtllib_wx_get_essid(struct rtllib_device *ieee, struct iw_request_info *a, 192int rtllib_wx_get_essid(struct rtllib_device *ieee, struct iw_request_info *a,
189 union iwreq_data *wrqu, char *b) 193 union iwreq_data *wrqu, char *b)
@@ -220,6 +224,7 @@ out:
220 return ret; 224 return ret;
221 225
222} 226}
227EXPORT_SYMBOL(rtllib_wx_get_essid);
223 228
224int rtllib_wx_set_rate(struct rtllib_device *ieee, 229int rtllib_wx_set_rate(struct rtllib_device *ieee,
225 struct iw_request_info *info, 230 struct iw_request_info *info,
@@ -231,6 +236,7 @@ int rtllib_wx_set_rate(struct rtllib_device *ieee,
231 ieee->rate = target_rate/100000; 236 ieee->rate = target_rate/100000;
232 return 0; 237 return 0;
233} 238}
239EXPORT_SYMBOL(rtllib_wx_set_rate);
234 240
235int rtllib_wx_get_rate(struct rtllib_device *ieee, 241int rtllib_wx_get_rate(struct rtllib_device *ieee,
236 struct iw_request_info *info, 242 struct iw_request_info *info,
@@ -243,6 +249,7 @@ int rtllib_wx_get_rate(struct rtllib_device *ieee,
243 249
244 return 0; 250 return 0;
245} 251}
252EXPORT_SYMBOL(rtllib_wx_get_rate);
246 253
247 254
248int rtllib_wx_set_rts(struct rtllib_device *ieee, 255int rtllib_wx_set_rts(struct rtllib_device *ieee,
@@ -259,6 +266,7 @@ int rtllib_wx_set_rts(struct rtllib_device *ieee,
259 } 266 }
260 return 0; 267 return 0;
261} 268}
269EXPORT_SYMBOL(rtllib_wx_set_rts);
262 270
263int rtllib_wx_get_rts(struct rtllib_device *ieee, 271int rtllib_wx_get_rts(struct rtllib_device *ieee,
264 struct iw_request_info *info, 272 struct iw_request_info *info,
@@ -269,6 +277,7 @@ int rtllib_wx_get_rts(struct rtllib_device *ieee,
269 wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); 277 wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
270 return 0; 278 return 0;
271} 279}
280EXPORT_SYMBOL(rtllib_wx_get_rts);
272 281
273int rtllib_wx_set_mode(struct rtllib_device *ieee, struct iw_request_info *a, 282int rtllib_wx_set_mode(struct rtllib_device *ieee, struct iw_request_info *a,
274 union iwreq_data *wrqu, char *b) 283 union iwreq_data *wrqu, char *b)
@@ -314,6 +323,7 @@ out:
314 up(&ieee->wx_sem); 323 up(&ieee->wx_sem);
315 return set_mode_status; 324 return set_mode_status;
316} 325}
326EXPORT_SYMBOL(rtllib_wx_set_mode);
317 327
318void rtllib_wx_sync_scan_wq(void *data) 328void rtllib_wx_sync_scan_wq(void *data)
319{ 329{
@@ -428,6 +438,7 @@ out:
428 up(&ieee->wx_sem); 438 up(&ieee->wx_sem);
429 return ret; 439 return ret;
430} 440}
441EXPORT_SYMBOL(rtllib_wx_set_scan);
431 442
432int rtllib_wx_set_essid(struct rtllib_device *ieee, 443int rtllib_wx_set_essid(struct rtllib_device *ieee,
433 struct iw_request_info *a, 444 struct iw_request_info *a,
@@ -490,6 +501,7 @@ out:
490 up(&ieee->wx_sem); 501 up(&ieee->wx_sem);
491 return ret; 502 return ret;
492} 503}
504EXPORT_SYMBOL(rtllib_wx_set_essid);
493 505
494int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a, 506int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a,
495 union iwreq_data *wrqu, char *b) 507 union iwreq_data *wrqu, char *b)
@@ -497,6 +509,7 @@ int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a,
497 wrqu->mode = ieee->iw_mode; 509 wrqu->mode = ieee->iw_mode;
498 return 0; 510 return 0;
499} 511}
512EXPORT_SYMBOL(rtllib_wx_get_mode);
500 513
501int rtllib_wx_set_rawtx(struct rtllib_device *ieee, 514int rtllib_wx_set_rawtx(struct rtllib_device *ieee,
502 struct iw_request_info *info, 515 struct iw_request_info *info,
@@ -533,6 +546,7 @@ int rtllib_wx_set_rawtx(struct rtllib_device *ieee,
533 546
534 return 0; 547 return 0;
535} 548}
549EXPORT_SYMBOL(rtllib_wx_set_rawtx);
536 550
537int rtllib_wx_get_name(struct rtllib_device *ieee, 551int rtllib_wx_get_name(struct rtllib_device *ieee,
538 struct iw_request_info *info, 552 struct iw_request_info *info,
@@ -548,6 +562,7 @@ int rtllib_wx_get_name(struct rtllib_device *ieee,
548 strcat(wrqu->name, "n"); 562 strcat(wrqu->name, "n");
549 return 0; 563 return 0;
550} 564}
565EXPORT_SYMBOL(rtllib_wx_get_name);
551 566
552 567
553/* this is mostly stolen from hostap */ 568/* this is mostly stolen from hostap */
@@ -605,6 +620,7 @@ exit:
605 return ret; 620 return ret;
606 621
607} 622}
623EXPORT_SYMBOL(rtllib_wx_set_power);
608 624
609/* this is stolen from hostap */ 625/* this is stolen from hostap */
610int rtllib_wx_get_power(struct rtllib_device *ieee, 626int rtllib_wx_get_power(struct rtllib_device *ieee,
@@ -643,3 +659,4 @@ exit:
643 return ret; 659 return ret;
644 660
645} 661}
662EXPORT_SYMBOL(rtllib_wx_get_power);
diff --git a/drivers/staging/rtl8192e/rtllib_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c
index 44e8006bc1af..f451bfc27a86 100644
--- a/drivers/staging/rtl8192e/rtllib_tx.c
+++ b/drivers/staging/rtl8192e/rtllib_tx.c
@@ -46,7 +46,6 @@
46#include <linux/slab.h> 46#include <linux/slab.h>
47#include <linux/tcp.h> 47#include <linux/tcp.h>
48#include <linux/types.h> 48#include <linux/types.h>
49#include <linux/version.h>
50#include <linux/wireless.h> 49#include <linux/wireless.h>
51#include <linux/etherdevice.h> 50#include <linux/etherdevice.h>
52#include <linux/uaccess.h> 51#include <linux/uaccess.h>
@@ -180,10 +179,10 @@ inline int rtllib_put_snap(u8 *data, u16 h_proto)
180int rtllib_encrypt_fragment(struct rtllib_device *ieee, struct sk_buff *frag, 179int rtllib_encrypt_fragment(struct rtllib_device *ieee, struct sk_buff *frag,
181 int hdr_len) 180 int hdr_len)
182{ 181{
183 struct rtllib_crypt_data *crypt = NULL; 182 struct lib80211_crypt_data *crypt = NULL;
184 int res; 183 int res;
185 184
186 crypt = ieee->crypt[ieee->tx_keyidx]; 185 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
187 186
188 if (!(crypt && crypt->ops)) { 187 if (!(crypt && crypt->ops)) {
189 printk(KERN_INFO "=========>%s(), crypt is null\n", __func__); 188 printk(KERN_INFO "=========>%s(), crypt is null\n", __func__);
@@ -569,7 +568,7 @@ int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
569 }; 568 };
570 u8 dest[ETH_ALEN], src[ETH_ALEN]; 569 u8 dest[ETH_ALEN], src[ETH_ALEN];
571 int qos_actived = ieee->current_network.qos_data.active; 570 int qos_actived = ieee->current_network.qos_data.active;
572 struct rtllib_crypt_data *crypt = NULL; 571 struct lib80211_crypt_data *crypt = NULL;
573 struct cb_desc *tcb_desc; 572 struct cb_desc *tcb_desc;
574 u8 bIsMulticast = false; 573 u8 bIsMulticast = false;
575 u8 IsAmsdu = false; 574 u8 IsAmsdu = false;
@@ -646,7 +645,7 @@ int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
646 } 645 }
647 646
648 skb->priority = rtllib_classify(skb, IsAmsdu); 647 skb->priority = rtllib_classify(skb, IsAmsdu);
649 crypt = ieee->crypt[ieee->tx_keyidx]; 648 crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
650 encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) && 649 encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
651 ieee->host_encrypt && crypt && crypt->ops; 650 ieee->host_encrypt && crypt && crypt->ops;
652 if (!encrypt && ieee->ieee802_1x && 651 if (!encrypt && ieee->ieee802_1x &&
@@ -742,8 +741,10 @@ int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
742 /* Each fragment may need to have room for encryptiong 741 /* Each fragment may need to have room for encryptiong
743 * pre/postfix */ 742 * pre/postfix */
744 if (encrypt) { 743 if (encrypt) {
745 bytes_per_frag -= crypt->ops->extra_prefix_len + 744 bytes_per_frag -= crypt->ops->extra_mpdu_prefix_len +
746 crypt->ops->extra_postfix_len; 745 crypt->ops->extra_mpdu_postfix_len +
746 crypt->ops->extra_msdu_prefix_len +
747 crypt->ops->extra_msdu_postfix_len;
747 } 748 }
748 /* Number of fragments is the total bytes_per_frag / 749 /* Number of fragments is the total bytes_per_frag /
749 * payload_per_fragment */ 750 * payload_per_fragment */
@@ -791,7 +792,8 @@ int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
791 else 792 else
792 tcb_desc->bHwSec = 0; 793 tcb_desc->bHwSec = 0;
793 skb_reserve(skb_frag, 794 skb_reserve(skb_frag,
794 crypt->ops->extra_prefix_len); 795 crypt->ops->extra_mpdu_prefix_len +
796 crypt->ops->extra_msdu_prefix_len);
795 } else { 797 } else {
796 tcb_desc->bHwSec = 0; 798 tcb_desc->bHwSec = 0;
797 } 799 }
@@ -965,3 +967,4 @@ int rtllib_xmit(struct sk_buff *skb, struct net_device *dev)
965 memset(skb->cb, 0, sizeof(skb->cb)); 967 memset(skb->cb, 0, sizeof(skb->cb));
966 return rtllib_xmit_inter(skb, dev); 968 return rtllib_xmit_inter(skb, dev);
967} 969}
970EXPORT_SYMBOL(rtllib_xmit);
diff --git a/drivers/staging/rtl8192e/rtllib_wx.c b/drivers/staging/rtl8192e/rtllib_wx.c
index 8cea4a60e1b3..c27ff7edbaf2 100644
--- a/drivers/staging/rtl8192e/rtllib_wx.c
+++ b/drivers/staging/rtl8192e/rtllib_wx.c
@@ -30,7 +30,6 @@
30 30
31******************************************************************************/ 31******************************************************************************/
32#include <linux/wireless.h> 32#include <linux/wireless.h>
33#include <linux/version.h>
34#include <linux/kmod.h> 33#include <linux/kmod.h>
35#include <linux/module.h> 34#include <linux/module.h>
36 35
@@ -295,6 +294,7 @@ int rtllib_wx_get_scan(struct rtllib_device *ieee,
295 294
296 return err; 295 return err;
297} 296}
297EXPORT_SYMBOL(rtllib_wx_get_scan);
298 298
299int rtllib_wx_set_encode(struct rtllib_device *ieee, 299int rtllib_wx_set_encode(struct rtllib_device *ieee,
300 struct iw_request_info *info, 300 struct iw_request_info *info,
@@ -306,44 +306,44 @@ int rtllib_wx_set_encode(struct rtllib_device *ieee,
306 .flags = 0 306 .flags = 0
307 }; 307 };
308 int i, key, key_provided, len; 308 int i, key, key_provided, len;
309 struct rtllib_crypt_data **crypt; 309 struct lib80211_crypt_data **crypt;
310 310
311 RTLLIB_DEBUG_WX("SET_ENCODE\n"); 311 RTLLIB_DEBUG_WX("SET_ENCODE\n");
312 312
313 key = erq->flags & IW_ENCODE_INDEX; 313 key = erq->flags & IW_ENCODE_INDEX;
314 if (key) { 314 if (key) {
315 if (key > WEP_KEYS) 315 if (key > NUM_WEP_KEYS)
316 return -EINVAL; 316 return -EINVAL;
317 key--; 317 key--;
318 key_provided = 1; 318 key_provided = 1;
319 } else { 319 } else {
320 key_provided = 0; 320 key_provided = 0;
321 key = ieee->tx_keyidx; 321 key = ieee->crypt_info.tx_keyidx;
322 } 322 }
323 323
324 RTLLIB_DEBUG_WX("Key: %d [%s]\n", key, key_provided ? 324 RTLLIB_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
325 "provided" : "default"); 325 "provided" : "default");
326 crypt = &ieee->crypt[key]; 326 crypt = &ieee->crypt_info.crypt[key];
327 if (erq->flags & IW_ENCODE_DISABLED) { 327 if (erq->flags & IW_ENCODE_DISABLED) {
328 if (key_provided && *crypt) { 328 if (key_provided && *crypt) {
329 RTLLIB_DEBUG_WX("Disabling encryption on key %d.\n", 329 RTLLIB_DEBUG_WX("Disabling encryption on key %d.\n",
330 key); 330 key);
331 rtllib_crypt_delayed_deinit(ieee, crypt); 331 lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
332 } else 332 } else
333 RTLLIB_DEBUG_WX("Disabling encryption.\n"); 333 RTLLIB_DEBUG_WX("Disabling encryption.\n");
334 334
335 /* Check all the keys to see if any are still configured, 335 /* Check all the keys to see if any are still configured,
336 * and if no key index was provided, de-init them all */ 336 * and if no key index was provided, de-init them all */
337 for (i = 0; i < WEP_KEYS; i++) { 337 for (i = 0; i < NUM_WEP_KEYS; i++) {
338 if (ieee->crypt[i] != NULL) { 338 if (ieee->crypt_info.crypt[i] != NULL) {
339 if (key_provided) 339 if (key_provided)
340 break; 340 break;
341 rtllib_crypt_delayed_deinit(ieee, 341 lib80211_crypt_delayed_deinit(&ieee->crypt_info,
342 &ieee->crypt[i]); 342 &ieee->crypt_info.crypt[i]);
343 } 343 }
344 } 344 }
345 345
346 if (i == WEP_KEYS) { 346 if (i == NUM_WEP_KEYS) {
347 sec.enabled = 0; 347 sec.enabled = 0;
348 sec.level = SEC_LEVEL_0; 348 sec.level = SEC_LEVEL_0;
349 sec.flags |= SEC_ENABLED | SEC_LEVEL; 349 sec.flags |= SEC_ENABLED | SEC_LEVEL;
@@ -358,25 +358,24 @@ int rtllib_wx_set_encode(struct rtllib_device *ieee,
358 sec.flags |= SEC_ENABLED; 358 sec.flags |= SEC_ENABLED;
359 359
360 if (*crypt != NULL && (*crypt)->ops != NULL && 360 if (*crypt != NULL && (*crypt)->ops != NULL &&
361 strcmp((*crypt)->ops->name, "WEP") != 0) { 361 strcmp((*crypt)->ops->name, "R-WEP") != 0) {
362 /* changing to use WEP; deinit previously used algorithm 362 /* changing to use WEP; deinit previously used algorithm
363 * on this key */ 363 * on this key */
364 rtllib_crypt_delayed_deinit(ieee, crypt); 364 lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
365 } 365 }
366 366
367 if (*crypt == NULL) { 367 if (*crypt == NULL) {
368 struct rtllib_crypt_data *new_crypt; 368 struct lib80211_crypt_data *new_crypt;
369 369
370 /* take WEP into use */ 370 /* take WEP into use */
371 new_crypt = kmalloc(sizeof(struct rtllib_crypt_data), 371 new_crypt = kzalloc(sizeof(struct lib80211_crypt_data),
372 GFP_KERNEL); 372 GFP_KERNEL);
373 if (new_crypt == NULL) 373 if (new_crypt == NULL)
374 return -ENOMEM; 374 return -ENOMEM;
375 memset(new_crypt, 0, sizeof(struct rtllib_crypt_data)); 375 new_crypt->ops = lib80211_get_crypto_ops("R-WEP");
376 new_crypt->ops = rtllib_get_crypto_ops("WEP");
377 if (!new_crypt->ops) { 376 if (!new_crypt->ops) {
378 request_module("rtllib_crypt_wep"); 377 request_module("rtllib_crypt_wep");
379 new_crypt->ops = rtllib_get_crypto_ops("WEP"); 378 new_crypt->ops = lib80211_get_crypto_ops("R-WEP");
380 } 379 }
381 380
382 if (new_crypt->ops) 381 if (new_crypt->ops)
@@ -412,7 +411,7 @@ int rtllib_wx_set_encode(struct rtllib_device *ieee,
412 * explicitely set */ 411 * explicitely set */
413 if (key == sec.active_key) 412 if (key == sec.active_key)
414 sec.flags |= SEC_ACTIVE_KEY; 413 sec.flags |= SEC_ACTIVE_KEY;
415 ieee->tx_keyidx = key; 414 ieee->crypt_info.tx_keyidx = key;
416 415
417 } else { 416 } else {
418 len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN, 417 len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
@@ -435,7 +434,7 @@ int rtllib_wx_set_encode(struct rtllib_device *ieee,
435 if (key_provided) { 434 if (key_provided) {
436 RTLLIB_DEBUG_WX( 435 RTLLIB_DEBUG_WX(
437 "Setting key %d to default Tx key.\n", key); 436 "Setting key %d to default Tx key.\n", key);
438 ieee->tx_keyidx = key; 437 ieee->crypt_info.tx_keyidx = key;
439 sec.active_key = key; 438 sec.active_key = key;
440 sec.flags |= SEC_ACTIVE_KEY; 439 sec.flags |= SEC_ACTIVE_KEY;
441 } 440 }
@@ -470,6 +469,7 @@ int rtllib_wx_set_encode(struct rtllib_device *ieee,
470 } 469 }
471 return 0; 470 return 0;
472} 471}
472EXPORT_SYMBOL(rtllib_wx_set_encode);
473 473
474int rtllib_wx_get_encode(struct rtllib_device *ieee, 474int rtllib_wx_get_encode(struct rtllib_device *ieee,
475 struct iw_request_info *info, 475 struct iw_request_info *info,
@@ -477,7 +477,7 @@ int rtllib_wx_get_encode(struct rtllib_device *ieee,
477{ 477{
478 struct iw_point *erq = &(wrqu->encoding); 478 struct iw_point *erq = &(wrqu->encoding);
479 int len, key; 479 int len, key;
480 struct rtllib_crypt_data *crypt; 480 struct lib80211_crypt_data *crypt;
481 481
482 RTLLIB_DEBUG_WX("GET_ENCODE\n"); 482 RTLLIB_DEBUG_WX("GET_ENCODE\n");
483 483
@@ -486,13 +486,13 @@ int rtllib_wx_get_encode(struct rtllib_device *ieee,
486 486
487 key = erq->flags & IW_ENCODE_INDEX; 487 key = erq->flags & IW_ENCODE_INDEX;
488 if (key) { 488 if (key) {
489 if (key > WEP_KEYS) 489 if (key > NUM_WEP_KEYS)
490 return -EINVAL; 490 return -EINVAL;
491 key--; 491 key--;
492 } else { 492 } else {
493 key = ieee->tx_keyidx; 493 key = ieee->crypt_info.tx_keyidx;
494 } 494 }
495 crypt = ieee->crypt[key]; 495 crypt = ieee->crypt_info.crypt[key];
496 496
497 erq->flags = key + 1; 497 erq->flags = key + 1;
498 498
@@ -513,6 +513,7 @@ int rtllib_wx_get_encode(struct rtllib_device *ieee,
513 513
514 return 0; 514 return 0;
515} 515}
516EXPORT_SYMBOL(rtllib_wx_get_encode);
516 517
517int rtllib_wx_set_encode_ext(struct rtllib_device *ieee, 518int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
518 struct iw_request_info *info, 519 struct iw_request_info *info,
@@ -525,29 +526,29 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
525 int i, idx; 526 int i, idx;
526 int group_key = 0; 527 int group_key = 0;
527 const char *alg, *module; 528 const char *alg, *module;
528 struct rtllib_crypto_ops *ops; 529 struct lib80211_crypto_ops *ops;
529 struct rtllib_crypt_data **crypt; 530 struct lib80211_crypt_data **crypt;
530 531
531 struct rtllib_security sec = { 532 struct rtllib_security sec = {
532 .flags = 0, 533 .flags = 0,
533 }; 534 };
534 idx = encoding->flags & IW_ENCODE_INDEX; 535 idx = encoding->flags & IW_ENCODE_INDEX;
535 if (idx) { 536 if (idx) {
536 if (idx < 1 || idx > WEP_KEYS) 537 if (idx < 1 || idx > NUM_WEP_KEYS)
537 return -EINVAL; 538 return -EINVAL;
538 idx--; 539 idx--;
539 } else{ 540 } else{
540 idx = ieee->tx_keyidx; 541 idx = ieee->crypt_info.tx_keyidx;
541 } 542 }
542 if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) { 543 if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
543 crypt = &ieee->crypt[idx]; 544 crypt = &ieee->crypt_info.crypt[idx];
544 group_key = 1; 545 group_key = 1;
545 } else { 546 } else {
546 /* some Cisco APs use idx>0 for unicast in dynamic WEP */ 547 /* some Cisco APs use idx>0 for unicast in dynamic WEP */
547 if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP) 548 if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
548 return -EINVAL; 549 return -EINVAL;
549 if (ieee->iw_mode == IW_MODE_INFRA) 550 if (ieee->iw_mode == IW_MODE_INFRA)
550 crypt = &ieee->crypt[idx]; 551 crypt = &ieee->crypt_info.crypt[idx];
551 else 552 else
552 return -EINVAL; 553 return -EINVAL;
553 } 554 }
@@ -556,13 +557,13 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
556 if ((encoding->flags & IW_ENCODE_DISABLED) || 557 if ((encoding->flags & IW_ENCODE_DISABLED) ||
557 ext->alg == IW_ENCODE_ALG_NONE) { 558 ext->alg == IW_ENCODE_ALG_NONE) {
558 if (*crypt) 559 if (*crypt)
559 rtllib_crypt_delayed_deinit(ieee, crypt); 560 lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
560 561
561 for (i = 0; i < WEP_KEYS; i++) { 562 for (i = 0; i < NUM_WEP_KEYS; i++) {
562 if (ieee->crypt[i] != NULL) 563 if (ieee->crypt_info.crypt[i] != NULL)
563 break; 564 break;
564 } 565 }
565 if (i == WEP_KEYS) { 566 if (i == NUM_WEP_KEYS) {
566 sec.enabled = 0; 567 sec.enabled = 0;
567 sec.level = SEC_LEVEL_0; 568 sec.level = SEC_LEVEL_0;
568 sec.flags |= SEC_LEVEL; 569 sec.flags |= SEC_LEVEL;
@@ -573,15 +574,15 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
573 sec.enabled = 1; 574 sec.enabled = 1;
574 switch (ext->alg) { 575 switch (ext->alg) {
575 case IW_ENCODE_ALG_WEP: 576 case IW_ENCODE_ALG_WEP:
576 alg = "WEP"; 577 alg = "R-WEP";
577 module = "rtllib_crypt_wep"; 578 module = "rtllib_crypt_wep";
578 break; 579 break;
579 case IW_ENCODE_ALG_TKIP: 580 case IW_ENCODE_ALG_TKIP:
580 alg = "TKIP"; 581 alg = "R-TKIP";
581 module = "rtllib_crypt_tkip"; 582 module = "rtllib_crypt_tkip";
582 break; 583 break;
583 case IW_ENCODE_ALG_CCMP: 584 case IW_ENCODE_ALG_CCMP:
584 alg = "CCMP"; 585 alg = "R-CCMP";
585 module = "rtllib_crypt_ccmp"; 586 module = "rtllib_crypt_ccmp";
586 break; 587 break;
587 default: 588 default:
@@ -592,14 +593,14 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
592 } 593 }
593 printk(KERN_INFO "alg name:%s\n", alg); 594 printk(KERN_INFO "alg name:%s\n", alg);
594 595
595 ops = rtllib_get_crypto_ops(alg); 596 ops = lib80211_get_crypto_ops(alg);
596 if (ops == NULL) { 597 if (ops == NULL) {
597 char tempbuf[100]; 598 char tempbuf[100];
598 599
599 memset(tempbuf, 0x00, 100); 600 memset(tempbuf, 0x00, 100);
600 sprintf(tempbuf, "%s", module); 601 sprintf(tempbuf, "%s", module);
601 request_module("%s", tempbuf); 602 request_module("%s", tempbuf);
602 ops = rtllib_get_crypto_ops(alg); 603 ops = lib80211_get_crypto_ops(alg);
603 } 604 }
604 if (ops == NULL) { 605 if (ops == NULL) {
605 RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n", 606 RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
@@ -610,9 +611,9 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
610 } 611 }
611 612
612 if (*crypt == NULL || (*crypt)->ops != ops) { 613 if (*crypt == NULL || (*crypt)->ops != ops) {
613 struct rtllib_crypt_data *new_crypt; 614 struct lib80211_crypt_data *new_crypt;
614 615
615 rtllib_crypt_delayed_deinit(ieee, crypt); 616 lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
616 617
617 new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL); 618 new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
618 if (new_crypt == NULL) { 619 if (new_crypt == NULL) {
@@ -641,7 +642,7 @@ int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
641 goto done; 642 goto done;
642 } 643 }
643 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) { 644 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
644 ieee->tx_keyidx = idx; 645 ieee->crypt_info.tx_keyidx = idx;
645 sec.active_key = idx; 646 sec.active_key = idx;
646 sec.flags |= SEC_ACTIVE_KEY; 647 sec.flags |= SEC_ACTIVE_KEY;
647 } 648 }
@@ -674,6 +675,7 @@ done:
674 } 675 }
675 return ret; 676 return ret;
676} 677}
678EXPORT_SYMBOL(rtllib_wx_set_encode_ext);
677 679
678int rtllib_wx_get_encode_ext(struct rtllib_device *ieee, 680int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
679 struct iw_request_info *info, 681 struct iw_request_info *info,
@@ -681,7 +683,7 @@ int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
681{ 683{
682 struct iw_point *encoding = &wrqu->encoding; 684 struct iw_point *encoding = &wrqu->encoding;
683 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 685 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
684 struct rtllib_crypt_data *crypt; 686 struct lib80211_crypt_data *crypt;
685 int idx, max_key_len; 687 int idx, max_key_len;
686 688
687 max_key_len = encoding->length - sizeof(*ext); 689 max_key_len = encoding->length - sizeof(*ext);
@@ -690,18 +692,18 @@ int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
690 692
691 idx = encoding->flags & IW_ENCODE_INDEX; 693 idx = encoding->flags & IW_ENCODE_INDEX;
692 if (idx) { 694 if (idx) {
693 if (idx < 1 || idx > WEP_KEYS) 695 if (idx < 1 || idx > NUM_WEP_KEYS)
694 return -EINVAL; 696 return -EINVAL;
695 idx--; 697 idx--;
696 } else { 698 } else {
697 idx = ieee->tx_keyidx; 699 idx = ieee->crypt_info.tx_keyidx;
698 } 700 }
699 if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) && 701 if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) &&
700 (ext->alg != IW_ENCODE_ALG_WEP)) 702 (ext->alg != IW_ENCODE_ALG_WEP))
701 if (idx != 0 || (ieee->iw_mode != IW_MODE_INFRA)) 703 if (idx != 0 || (ieee->iw_mode != IW_MODE_INFRA))
702 return -EINVAL; 704 return -EINVAL;
703 705
704 crypt = ieee->crypt[idx]; 706 crypt = ieee->crypt_info.crypt[idx];
705 707
706 encoding->flags = idx + 1; 708 encoding->flags = idx + 1;
707 memset(ext, 0, sizeof(*ext)); 709 memset(ext, 0, sizeof(*ext));
@@ -711,11 +713,11 @@ int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
711 ext->key_len = 0; 713 ext->key_len = 0;
712 encoding->flags |= IW_ENCODE_DISABLED; 714 encoding->flags |= IW_ENCODE_DISABLED;
713 } else { 715 } else {
714 if (strcmp(crypt->ops->name, "WEP") == 0) 716 if (strcmp(crypt->ops->name, "R-WEP") == 0)
715 ext->alg = IW_ENCODE_ALG_WEP; 717 ext->alg = IW_ENCODE_ALG_WEP;
716 else if (strcmp(crypt->ops->name, "TKIP")) 718 else if (strcmp(crypt->ops->name, "R-TKIP"))
717 ext->alg = IW_ENCODE_ALG_TKIP; 719 ext->alg = IW_ENCODE_ALG_TKIP;
718 else if (strcmp(crypt->ops->name, "CCMP")) 720 else if (strcmp(crypt->ops->name, "R-CCMP"))
719 ext->alg = IW_ENCODE_ALG_CCMP; 721 ext->alg = IW_ENCODE_ALG_CCMP;
720 else 722 else
721 return -EINVAL; 723 return -EINVAL;
@@ -778,6 +780,7 @@ int rtllib_wx_set_mlme(struct rtllib_device *ieee,
778 780
779 return 0; 781 return 0;
780} 782}
783EXPORT_SYMBOL(rtllib_wx_set_mlme);
781 784
782int rtllib_wx_set_auth(struct rtllib_device *ieee, 785int rtllib_wx_set_auth(struct rtllib_device *ieee,
783 struct iw_request_info *info, 786 struct iw_request_info *info,
@@ -830,6 +833,7 @@ int rtllib_wx_set_auth(struct rtllib_device *ieee,
830 } 833 }
831 return 0; 834 return 0;
832} 835}
836EXPORT_SYMBOL(rtllib_wx_set_auth);
833 837
834int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len) 838int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len)
835{ 839{
@@ -846,10 +850,9 @@ int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len)
846 850
847 ieee->wps_ie_len = (len < MAX_WZC_IE_LEN) ? (len) : 851 ieee->wps_ie_len = (len < MAX_WZC_IE_LEN) ? (len) :
848 (MAX_WZC_IE_LEN); 852 (MAX_WZC_IE_LEN);
849 buf = kmalloc(ieee->wps_ie_len, GFP_KERNEL); 853 buf = kmemdup(ie, ieee->wps_ie_len, GFP_KERNEL);
850 if (buf == NULL) 854 if (buf == NULL)
851 return -ENOMEM; 855 return -ENOMEM;
852 memcpy(buf, ie, ieee->wps_ie_len);
853 ieee->wps_ie = buf; 856 ieee->wps_ie = buf;
854 return 0; 857 return 0;
855 } 858 }
@@ -860,10 +863,9 @@ int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len)
860 if (len) { 863 if (len) {
861 if (len != ie[1]+2) 864 if (len != ie[1]+2)
862 return -EINVAL; 865 return -EINVAL;
863 buf = kmalloc(len, GFP_KERNEL); 866 buf = kmemdup(ie, len, GFP_KERNEL);
864 if (buf == NULL) 867 if (buf == NULL)
865 return -ENOMEM; 868 return -ENOMEM;
866 memcpy(buf, ie, len);
867 kfree(ieee->wpa_ie); 869 kfree(ieee->wpa_ie);
868 ieee->wpa_ie = buf; 870 ieee->wpa_ie = buf;
869 ieee->wpa_ie_len = len; 871 ieee->wpa_ie_len = len;
@@ -874,3 +876,4 @@ int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len)
874 } 876 }
875 return 0; 877 return 0;
876} 878}
879EXPORT_SYMBOL(rtllib_wx_set_gen_ie);
diff --git a/drivers/staging/rtl8192u/ieee80211/api.c b/drivers/staging/rtl8192u/ieee80211/api.c
deleted file mode 100644
index 5f46e50e586e..000000000000
--- a/drivers/staging/rtl8192u/ieee80211/api.c
+++ /dev/null
@@ -1,244 +0,0 @@
1/*
2 * Scatterlist Cryptographic API.
3 *
4 * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
5 * Copyright (c) 2002 David S. Miller (davem@redhat.com)
6 *
7 * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
8 * and Nettle, by Niels M鰈ler.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the Free
12 * Software Foundation; either version 2 of the License, or (at your option)
13 * any later version.
14 *
15 */
16#include "kmap_types.h"
17
18#include <linux/init.h>
19#include <linux/module.h>
20//#include <linux/crypto.h>
21#include "rtl_crypto.h"
22#include <linux/errno.h>
23#include <linux/rwsem.h>
24#include <linux/slab.h>
25#include "internal.h"
26
27LIST_HEAD(crypto_alg_list);
28DECLARE_RWSEM(crypto_alg_sem);
29
30static inline int crypto_alg_get(struct crypto_alg *alg)
31{
32 return try_inc_mod_count(alg->cra_module);
33}
34
35static inline void crypto_alg_put(struct crypto_alg *alg)
36{
37 if (alg->cra_module)
38 __MOD_DEC_USE_COUNT(alg->cra_module);
39}
40
41struct crypto_alg *crypto_alg_lookup(const char *name)
42{
43 struct crypto_alg *q, *alg = NULL;
44
45 if (!name)
46 return NULL;
47
48 down_read(&crypto_alg_sem);
49
50 list_for_each_entry(q, &crypto_alg_list, cra_list) {
51 if (!(strcmp(q->cra_name, name))) {
52 if (crypto_alg_get(q))
53 alg = q;
54 break;
55 }
56 }
57
58 up_read(&crypto_alg_sem);
59 return alg;
60}
61
62static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags)
63{
64 tfm->crt_flags = 0;
65
66 switch (crypto_tfm_alg_type(tfm)) {
67 case CRYPTO_ALG_TYPE_CIPHER:
68 return crypto_init_cipher_flags(tfm, flags);
69
70 case CRYPTO_ALG_TYPE_DIGEST:
71 return crypto_init_digest_flags(tfm, flags);
72
73 case CRYPTO_ALG_TYPE_COMPRESS:
74 return crypto_init_compress_flags(tfm, flags);
75
76 default:
77 break;
78 }
79
80 BUG();
81 return -EINVAL;
82}
83
84static int crypto_init_ops(struct crypto_tfm *tfm)
85{
86 switch (crypto_tfm_alg_type(tfm)) {
87 case CRYPTO_ALG_TYPE_CIPHER:
88 return crypto_init_cipher_ops(tfm);
89
90 case CRYPTO_ALG_TYPE_DIGEST:
91 return crypto_init_digest_ops(tfm);
92
93 case CRYPTO_ALG_TYPE_COMPRESS:
94 return crypto_init_compress_ops(tfm);
95
96 default:
97 break;
98 }
99
100 BUG();
101 return -EINVAL;
102}
103
104static void crypto_exit_ops(struct crypto_tfm *tfm)
105{
106 switch (crypto_tfm_alg_type(tfm)) {
107 case CRYPTO_ALG_TYPE_CIPHER:
108 crypto_exit_cipher_ops(tfm);
109 break;
110
111 case CRYPTO_ALG_TYPE_DIGEST:
112 crypto_exit_digest_ops(tfm);
113 break;
114
115 case CRYPTO_ALG_TYPE_COMPRESS:
116 crypto_exit_compress_ops(tfm);
117 break;
118
119 default:
120 BUG();
121
122 }
123}
124
125struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
126{
127 struct crypto_tfm *tfm = NULL;
128 struct crypto_alg *alg;
129
130 alg = crypto_alg_mod_lookup(name);
131 if (alg == NULL)
132 goto out;
133
134 tfm = kzalloc(sizeof(*tfm) + alg->cra_ctxsize, GFP_KERNEL);
135 if (tfm == NULL)
136 goto out_put;
137
138 tfm->__crt_alg = alg;
139
140 if (crypto_init_flags(tfm, flags))
141 goto out_free_tfm;
142
143 if (crypto_init_ops(tfm)) {
144 crypto_exit_ops(tfm);
145 goto out_free_tfm;
146 }
147
148 goto out;
149
150out_free_tfm:
151 kfree(tfm);
152 tfm = NULL;
153out_put:
154 crypto_alg_put(alg);
155out:
156 return tfm;
157}
158
159void crypto_free_tfm(struct crypto_tfm *tfm)
160{
161 struct crypto_alg *alg = tfm->__crt_alg;
162 int size = sizeof(*tfm) + alg->cra_ctxsize;
163
164 crypto_exit_ops(tfm);
165 crypto_alg_put(alg);
166 memset(tfm, 0, size);
167 kfree(tfm);
168}
169
170int crypto_register_alg(struct crypto_alg *alg)
171{
172 int ret = 0;
173 struct crypto_alg *q;
174
175 down_write(&crypto_alg_sem);
176
177 list_for_each_entry(q, &crypto_alg_list, cra_list) {
178 if (!(strcmp(q->cra_name, alg->cra_name))) {
179 ret = -EEXIST;
180 goto out;
181 }
182 }
183
184 list_add_tail(&alg->cra_list, &crypto_alg_list);
185out:
186 up_write(&crypto_alg_sem);
187 return ret;
188}
189
190int crypto_unregister_alg(struct crypto_alg *alg)
191{
192 int ret = -ENOENT;
193 struct crypto_alg *q;
194
195 BUG_ON(!alg->cra_module);
196
197 down_write(&crypto_alg_sem);
198 list_for_each_entry(q, &crypto_alg_list, cra_list) {
199 if (alg == q) {
200 list_del(&alg->cra_list);
201 ret = 0;
202 goto out;
203 }
204 }
205out:
206 up_write(&crypto_alg_sem);
207 return ret;
208}
209
210int crypto_alg_available(const char *name, u32 flags)
211{
212 int ret = 0;
213 struct crypto_alg *alg = crypto_alg_mod_lookup(name);
214
215 if (alg) {
216 crypto_alg_put(alg);
217 ret = 1;
218 }
219
220 return ret;
221}
222
223static int __init init_crypto(void)
224{
225 printk(KERN_INFO "Initializing Cryptographic API\n");
226 crypto_init_proc();
227 return 0;
228}
229
230__initcall(init_crypto);
231
232/*
233EXPORT_SYMBOL_GPL(crypto_register_alg);
234EXPORT_SYMBOL_GPL(crypto_unregister_alg);
235EXPORT_SYMBOL_GPL(crypto_alloc_tfm);
236EXPORT_SYMBOL_GPL(crypto_free_tfm);
237EXPORT_SYMBOL_GPL(crypto_alg_available);
238*/
239
240EXPORT_SYMBOL_NOVERS(crypto_register_alg);
241EXPORT_SYMBOL_NOVERS(crypto_unregister_alg);
242EXPORT_SYMBOL_NOVERS(crypto_alloc_tfm);
243EXPORT_SYMBOL_NOVERS(crypto_free_tfm);
244EXPORT_SYMBOL_NOVERS(crypto_alg_available);
diff --git a/drivers/staging/rtl8712/rtl871x_mlme.c b/drivers/staging/rtl8712/rtl871x_mlme.c
index ef8eb6c7ee41..4277d0304b7a 100644
--- a/drivers/staging/rtl8712/rtl871x_mlme.c
+++ b/drivers/staging/rtl8712/rtl871x_mlme.c
@@ -551,7 +551,7 @@ void r8712_survey_event_callback(struct _adapter *adapter, u8 *pbuf)
551 ibss_wlan = r8712_find_network( 551 ibss_wlan = r8712_find_network(
552 &pmlmepriv->scanned_queue, 552 &pmlmepriv->scanned_queue,
553 pnetwork->MacAddress); 553 pnetwork->MacAddress);
554 if (!ibss_wlan) { 554 if (ibss_wlan) {
555 memcpy(ibss_wlan->network.IEs, 555 memcpy(ibss_wlan->network.IEs,
556 pnetwork->IEs, 8); 556 pnetwork->IEs, 8);
557 goto exit; 557 goto exit;
diff --git a/drivers/staging/rts5139/rts51x.h b/drivers/staging/rts5139/rts51x.h
index 9415d5c05502..b2c58390bfc5 100644
--- a/drivers/staging/rts5139/rts51x.h
+++ b/drivers/staging/rts5139/rts51x.h
@@ -34,7 +34,6 @@
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/cdrom.h> 35#include <linux/cdrom.h>
36#include <linux/kernel.h> 36#include <linux/kernel.h>
37#include <linux/version.h>
38 37
39#include <scsi/scsi.h> 38#include <scsi/scsi.h>
40#include <scsi/scsi_cmnd.h> 39#include <scsi/scsi_cmnd.h>
diff --git a/drivers/staging/rts5139/rts51x_transport.h b/drivers/staging/rts5139/rts51x_transport.h
index f7aa87f7f1a9..8464c4836d5b 100644
--- a/drivers/staging/rts5139/rts51x_transport.h
+++ b/drivers/staging/rts5139/rts51x_transport.h
@@ -28,7 +28,6 @@
28#define __RTS51X_TRANSPORT_H 28#define __RTS51X_TRANSPORT_H
29 29
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/version.h>
32 31
33#include "rts51x.h" 32#include "rts51x.h"
34#include "rts51x_chip.h" 33#include "rts51x_chip.h"
diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c
index f47571ea745d..6b3d156d4140 100644
--- a/drivers/staging/sep/sep_driver.c
+++ b/drivers/staging/sep/sep_driver.c
@@ -2120,6 +2120,8 @@ static int sep_prepare_input_output_dma_table_in_dcb(struct sep_device *sep,
2120 } 2120 }
2121 } 2121 }
2122 if (tail_size) { 2122 if (tail_size) {
2123 if (tail_size > sizeof(dcb_table_ptr->tail_data))
2124 return -EINVAL;
2123 if (is_kva == true) { 2125 if (is_kva == true) {
2124 memcpy(dcb_table_ptr->tail_data, 2126 memcpy(dcb_table_ptr->tail_data,
2125 (void *)(app_in_address + data_in_size - 2127 (void *)(app_in_address + data_in_size -
diff --git a/drivers/staging/serial/68360serial.c b/drivers/staging/serial/68360serial.c
index 0a3e8787ed50..daf0b1d0dc28 100644
--- a/drivers/staging/serial/68360serial.c
+++ b/drivers/staging/serial/68360serial.c
@@ -2771,8 +2771,8 @@ static int __init rs_360_init(void)
2771 */ 2771 */
2772 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */ 2772 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2773 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */ 2773 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2774 request_irq(state->irq, rs_360_interrupt, 2774 request_irq(state->irq, rs_360_interrupt, 0, "ttyS",
2775 IRQ_FLG_LOCK, "ttyS", (void *)info); 2775 (void *)info);
2776 2776
2777 /* Set up the baud rate generator. 2777 /* Set up the baud rate generator.
2778 */ 2778 */
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c
index 39dbf339a4fc..ae0035f327e7 100644
--- a/drivers/staging/sm7xx/smtcfb.c
+++ b/drivers/staging/sm7xx/smtcfb.c
@@ -1024,9 +1024,9 @@ failed_free:
1024 1024
1025/* Jason (08/11/2009) PCI_DRV wrapper essential structs */ 1025/* Jason (08/11/2009) PCI_DRV wrapper essential structs */
1026static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = { 1026static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
1027 {0x126f, 0x710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 1027 { PCI_DEVICE(0x126f, 0x710), },
1028 {0x126f, 0x712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 1028 { PCI_DEVICE(0x126f, 0x712), },
1029 {0x126f, 0x720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 1029 { PCI_DEVICE(0x126f, 0x720), },
1030 {0,} 1030 {0,}
1031}; 1031};
1032 1032
diff --git a/drivers/staging/speakup/kobjects.c b/drivers/staging/speakup/kobjects.c
index 07a7f5432597..2093896c546b 100644
--- a/drivers/staging/speakup/kobjects.c
+++ b/drivers/staging/speakup/kobjects.c
@@ -265,12 +265,11 @@ static ssize_t keymap_store(struct kobject *kobj, struct kobj_attribute *attr,
265 unsigned long flags; 265 unsigned long flags;
266 266
267 spk_lock(flags); 267 spk_lock(flags);
268 in_buff = kmalloc(count + 1, GFP_ATOMIC); 268 in_buff = kmemdup(buf, count + 1, GFP_ATOMIC);
269 if (!in_buff) { 269 if (!in_buff) {
270 spk_unlock(flags); 270 spk_unlock(flags);
271 return -ENOMEM; 271 return -ENOMEM;
272 } 272 }
273 memcpy(in_buff, buf, count + 1);
274 if (strchr("dDrR", *in_buff)) { 273 if (strchr("dDrR", *in_buff)) {
275 set_key_info(key_defaults, key_buf); 274 set_key_info(key_defaults, key_buf);
276 pr_info("keymap set to default values\n"); 275 pr_info("keymap set to default values\n");
diff --git a/drivers/staging/speakup/main.c b/drivers/staging/speakup/main.c
index 8be560458977..c7b03f0ef2dd 100644
--- a/drivers/staging/speakup/main.c
+++ b/drivers/staging/speakup/main.c
@@ -2268,8 +2268,6 @@ static int __init speakup_init(void)
2268 set_mask_bits(0, i, 2); 2268 set_mask_bits(0, i, 2);
2269 2269
2270 set_key_info(key_defaults, key_buf); 2270 set_key_info(key_defaults, key_buf);
2271 if (quiet_boot)
2272 spk_shut_up |= 0x01;
2273 2271
2274 /* From here on out, initializations can fail. */ 2272 /* From here on out, initializations can fail. */
2275 err = speakup_add_virtual_keyboard(); 2273 err = speakup_add_virtual_keyboard();
@@ -2292,6 +2290,9 @@ static int __init speakup_init(void)
2292 goto error_kobjects; 2290 goto error_kobjects;
2293 } 2291 }
2294 2292
2293 if (quiet_boot)
2294 spk_shut_up |= 0x01;
2295
2295 err = speakup_kobj_init(); 2296 err = speakup_kobj_init();
2296 if (err) 2297 if (err)
2297 goto error_kobjects; 2298 goto error_kobjects;
diff --git a/drivers/staging/spectra/Kconfig b/drivers/staging/spectra/Kconfig
deleted file mode 100644
index 4fc206484830..000000000000
--- a/drivers/staging/spectra/Kconfig
+++ /dev/null
@@ -1,41 +0,0 @@
1
2menuconfig SPECTRA
3 tristate "Denali Spectra Flash Translation Layer"
4 depends on BLOCK
5 depends on X86_MRST
6 default n
7 ---help---
8 Enable the FTL pseudo-filesystem used with the NAND Flash
9 controller on Intel Moorestown Platform to pretend to be a disk.
10
11choice
12 prompt "Compile for"
13 depends on SPECTRA
14 default SPECTRA_MRST_HW
15
16config SPECTRA_MRST_HW
17 bool "Moorestown hardware mode"
18 help
19 Driver communicates with the Moorestown hardware's register interface.
20 in DMA mode.
21
22config SPECTRA_MTD
23 bool "Linux MTD mode"
24 depends on MTD
25 help
26 Driver communicates with the kernel MTD subsystem instead of its own
27 built-in hardware driver.
28
29config SPECTRA_EMU
30 bool "RAM emulator testing"
31 help
32 Driver emulates Flash on a RAM buffer and / or disk file. Useful to test the behavior of FTL layer.
33
34endchoice
35
36config SPECTRA_MRST_HW_DMA
37 bool
38 default n
39 depends on SPECTRA_MRST_HW
40 help
41 Use DMA for native hardware interface.
diff --git a/drivers/staging/spectra/Makefile b/drivers/staging/spectra/Makefile
deleted file mode 100644
index f777dfba05a5..000000000000
--- a/drivers/staging/spectra/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile of Intel Moorestown NAND controller driver
3#
4
5obj-$(CONFIG_SPECTRA) += spectra.o
6spectra-y := ffsport.o flash.o lld.o
7spectra-$(CONFIG_SPECTRA_MRST_HW) += lld_nand.o
8spectra-$(CONFIG_SPECTRA_MRST_HW_DMA) += lld_cdma.o
9spectra-$(CONFIG_SPECTRA_EMU) += lld_emu.o
10spectra-$(CONFIG_SPECTRA_MTD) += lld_mtd.o
11
diff --git a/drivers/staging/spectra/README b/drivers/staging/spectra/README
deleted file mode 100644
index ecba559b899c..000000000000
--- a/drivers/staging/spectra/README
+++ /dev/null
@@ -1,29 +0,0 @@
1This is a driver for NAND controller of Intel Moorestown platform.
2
3This driver is a standalone linux block device driver, it acts as if it's a normal hard disk.
4It includes three layer:
5 block layer interface - file ffsport.c
6 Flash Translation Layer (FTL) - file flash.c (implement the NAND flash Translation Layer, includs address mapping, garbage collection, wear-leveling and so on)
7 Low level layer - file lld_nand.c/lld_cdma.c/lld_emu.c (which implements actual controller hardware registers access)
8
9This driver can be build as modules or build-in.
10
11Dependency:
12This driver has dependency on IA Firmware of Intel Moorestown platform.
13It need the IA Firmware to create the block table for the first time.
14And to validate this driver code without IA Firmware, you can change the
15macro AUTO_FORMAT_FLASH from 0 to 1 in file spectraswconfig.h. Thus the
16driver will erase the whole nand flash and create a new block table.
17
18TODO:
19 - Enable Command DMA feature support
20 - lower the memory footprint
21 - Remove most of the unnecessary global variables
22 - Change all the upcase variable / functions name to lowercase
23 - Some other misc bugs
24
25Please send patches to:
26 Greg Kroah-Hartman <gregkh@suse.de>
27
28And Cc to: Gao Yunpeng <yunpeng.gao@intel.com>
29
diff --git a/drivers/staging/spectra/ffsdefs.h b/drivers/staging/spectra/ffsdefs.h
deleted file mode 100644
index a9e9cd233d2a..000000000000
--- a/drivers/staging/spectra/ffsdefs.h
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _FFSDEFS_
21#define _FFSDEFS_
22
23#define CLEAR 0 /*use this to clear a field instead of "fail"*/
24#define SET 1 /*use this to set a field instead of "pass"*/
25#define FAIL 1 /*failed flag*/
26#define PASS 0 /*success flag*/
27#define ERR -1 /*error flag*/
28
29#define ERASE_CMD 10
30#define WRITE_MAIN_CMD 11
31#define READ_MAIN_CMD 12
32#define WRITE_SPARE_CMD 13
33#define READ_SPARE_CMD 14
34#define WRITE_MAIN_SPARE_CMD 15
35#define READ_MAIN_SPARE_CMD 16
36#define MEMCOPY_CMD 17
37#define DUMMY_CMD 99
38
39#define EVENT_PASS 0x00
40#define EVENT_CORRECTABLE_DATA_ERROR_FIXED 0x01
41#define EVENT_UNCORRECTABLE_DATA_ERROR 0x02
42#define EVENT_TIME_OUT 0x03
43#define EVENT_PROGRAM_FAILURE 0x04
44#define EVENT_ERASE_FAILURE 0x05
45#define EVENT_MEMCOPY_FAILURE 0x06
46#define EVENT_FAIL 0x07
47
48#define EVENT_NONE 0x22
49#define EVENT_DMA_CMD_COMP 0x77
50#define EVENT_ECC_TRANSACTION_DONE 0x88
51#define EVENT_DMA_CMD_FAIL 0x99
52
53#define CMD_PASS 0
54#define CMD_FAIL 1
55#define CMD_ABORT 2
56#define CMD_NOT_DONE 3
57
58#endif /* _FFSDEFS_ */
diff --git a/drivers/staging/spectra/ffsport.c b/drivers/staging/spectra/ffsport.c
deleted file mode 100644
index 86d556d6cf98..000000000000
--- a/drivers/staging/spectra/ffsport.c
+++ /dev/null
@@ -1,834 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include "ffsport.h"
21#include "flash.h"
22#include <linux/interrupt.h>
23#include <linux/delay.h>
24#include <linux/blkdev.h>
25#include <linux/wait.h>
26#include <linux/mutex.h>
27#include <linux/kthread.h>
28#include <linux/log2.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/async.h>
32
33/**** Helper functions used for Div, Remainder operation on u64 ****/
34
35/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
36* Function: GLOB_Calc_Used_Bits
37* Inputs: Power of 2 number
38* Outputs: Number of Used Bits
39* 0, if the argument is 0
40* Description: Calculate the number of bits used by a given power of 2 number
41* Number can be up to 32 bit
42*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
43int GLOB_Calc_Used_Bits(u32 n)
44{
45 int tot_bits = 0;
46
47 if (n >= 1 << 16) {
48 n >>= 16;
49 tot_bits += 16;
50 }
51
52 if (n >= 1 << 8) {
53 n >>= 8;
54 tot_bits += 8;
55 }
56
57 if (n >= 1 << 4) {
58 n >>= 4;
59 tot_bits += 4;
60 }
61
62 if (n >= 1 << 2) {
63 n >>= 2;
64 tot_bits += 2;
65 }
66
67 if (n >= 1 << 1)
68 tot_bits += 1;
69
70 return ((n == 0) ? (0) : tot_bits);
71}
72
73/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
74* Function: GLOB_u64_Div
75* Inputs: Number of u64
76* A power of 2 number as Division
77* Outputs: Quotient of the Divisor operation
78* Description: It divides the address by divisor by using bit shift operation
79* (essentially without explicitely using "/").
80* Divisor is a power of 2 number and Divided is of u64
81*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
82u64 GLOB_u64_Div(u64 addr, u32 divisor)
83{
84 return (u64)(addr >> GLOB_Calc_Used_Bits(divisor));
85}
86
87/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
88* Function: GLOB_u64_Remainder
89* Inputs: Number of u64
90* Divisor Type (1 -PageAddress, 2- BlockAddress)
91* Outputs: Remainder of the Division operation
92* Description: It calculates the remainder of a number (of u64) by
93* divisor(power of 2 number ) by using bit shifting and multiply
94* operation(essentially without explicitely using "/").
95*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
96u64 GLOB_u64_Remainder(u64 addr, u32 divisor_type)
97{
98 u64 result = 0;
99
100 if (divisor_type == 1) { /* Remainder -- Page */
101 result = (addr >> DeviceInfo.nBitsInPageDataSize);
102 result = result * DeviceInfo.wPageDataSize;
103 } else if (divisor_type == 2) { /* Remainder -- Block */
104 result = (addr >> DeviceInfo.nBitsInBlockDataSize);
105 result = result * DeviceInfo.wBlockDataSize;
106 }
107
108 result = addr - result;
109
110 return result;
111}
112
113#define NUM_DEVICES 1
114#define PARTITIONS 8
115
116#define GLOB_SBD_NAME "nd"
117#define GLOB_SBD_IRQ_NUM (29)
118
119#define GLOB_SBD_IOCTL_GC (0x7701)
120#define GLOB_SBD_IOCTL_WL (0x7702)
121#define GLOB_SBD_IOCTL_FORMAT (0x7703)
122#define GLOB_SBD_IOCTL_ERASE_FLASH (0x7704)
123#define GLOB_SBD_IOCTL_FLUSH_CACHE (0x7705)
124#define GLOB_SBD_IOCTL_COPY_BLK_TABLE (0x7706)
125#define GLOB_SBD_IOCTL_COPY_WEAR_LEVELING_TABLE (0x7707)
126#define GLOB_SBD_IOCTL_GET_NAND_INFO (0x7708)
127#define GLOB_SBD_IOCTL_WRITE_DATA (0x7709)
128#define GLOB_SBD_IOCTL_READ_DATA (0x770A)
129
130static int reserved_mb = 0;
131module_param(reserved_mb, int, 0);
132MODULE_PARM_DESC(reserved_mb, "Reserved space for OS image, in MiB (default 25 MiB)");
133
134int nand_debug_level;
135module_param(nand_debug_level, int, 0644);
136MODULE_PARM_DESC(nand_debug_level, "debug level value: 1-3");
137
138MODULE_LICENSE("GPL");
139
140struct spectra_nand_dev {
141 struct pci_dev *dev;
142 u64 size;
143 u16 users;
144 spinlock_t qlock;
145 void __iomem *ioaddr; /* Mapped address */
146 struct request_queue *queue;
147 struct task_struct *thread;
148 struct gendisk *gd;
149 u8 *tmp_buf;
150};
151
152
153static int GLOB_SBD_majornum;
154
155static char *GLOB_version = GLOB_VERSION;
156
157static struct spectra_nand_dev nand_device[NUM_DEVICES];
158
159static struct mutex spectra_lock;
160
161static int res_blks_os = 1;
162
163struct spectra_indentfy_dev_tag IdentifyDeviceData;
164
165static int force_flush_cache(void)
166{
167 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
168 __FILE__, __LINE__, __func__);
169
170 if (ERR == GLOB_FTL_Flush_Cache()) {
171 printk(KERN_ERR "Fail to Flush FTL Cache!\n");
172 return -EFAULT;
173 }
174#if CMD_DMA
175 if (glob_ftl_execute_cmds())
176 return -EIO;
177 else
178 return 0;
179#endif
180 return 0;
181}
182
183struct ioctl_rw_page_info {
184 u8 *data;
185 unsigned int page;
186};
187
188static int ioctl_read_page_data(unsigned long arg)
189{
190 u8 *buf;
191 struct ioctl_rw_page_info info;
192 int result = PASS;
193
194 if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
195 return -EFAULT;
196
197 buf = kmalloc(IdentifyDeviceData.PageDataSize, GFP_ATOMIC);
198 if (!buf) {
199 printk(KERN_ERR "ioctl_read_page_data: "
200 "failed to allocate memory\n");
201 return -ENOMEM;
202 }
203
204 mutex_lock(&spectra_lock);
205 result = GLOB_FTL_Page_Read(buf,
206 (u64)info.page * IdentifyDeviceData.PageDataSize);
207 mutex_unlock(&spectra_lock);
208
209 if (copy_to_user((void __user *)info.data, buf,
210 IdentifyDeviceData.PageDataSize)) {
211 printk(KERN_ERR "ioctl_read_page_data: "
212 "failed to copy user data\n");
213 kfree(buf);
214 return -EFAULT;
215 }
216
217 kfree(buf);
218 return result;
219}
220
221static int ioctl_write_page_data(unsigned long arg)
222{
223 u8 *buf;
224 struct ioctl_rw_page_info info;
225 int result = PASS;
226
227 if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
228 return -EFAULT;
229
230 buf = memdup_user((void __user *)info.data,
231 IdentifyDeviceData.PageDataSize);
232 if (IS_ERR(buf)) {
233 printk(KERN_ERR "ioctl_write_page_data: "
234 "failed to copy user data\n");
235 return PTR_ERR(buf);
236 }
237
238 mutex_lock(&spectra_lock);
239 result = GLOB_FTL_Page_Write(buf,
240 (u64)info.page * IdentifyDeviceData.PageDataSize);
241 mutex_unlock(&spectra_lock);
242
243 kfree(buf);
244 return result;
245}
246
247/* Return how many blocks should be reserved for bad block replacement */
248static int get_res_blk_num_bad_blk(void)
249{
250 return IdentifyDeviceData.wDataBlockNum / 10;
251}
252
253/* Return how many blocks should be reserved for OS image */
254static int get_res_blk_num_os(void)
255{
256 u32 res_blks, blk_size;
257
258 blk_size = IdentifyDeviceData.PageDataSize *
259 IdentifyDeviceData.PagesPerBlock;
260
261 res_blks = (reserved_mb * 1024 * 1024) / blk_size;
262
263 if ((res_blks < 1) || (res_blks >= IdentifyDeviceData.wDataBlockNum))
264 res_blks = 1; /* Reserved 1 block for block table */
265
266 return res_blks;
267}
268
269/* Transfer a full request. */
270static int do_transfer(struct spectra_nand_dev *tr, struct request *req)
271{
272 u64 start_addr, addr;
273 u32 logical_start_sect, hd_start_sect;
274 u32 nsect, hd_sects;
275 u32 rsect, tsect = 0;
276 char *buf;
277 u32 ratio = IdentifyDeviceData.PageDataSize >> 9;
278
279 start_addr = (u64)(blk_rq_pos(req)) << 9;
280 /* Add a big enough offset to prevent the OS Image from
281 * being accessed or damaged by file system */
282 start_addr += IdentifyDeviceData.PageDataSize *
283 IdentifyDeviceData.PagesPerBlock *
284 res_blks_os;
285
286 if (req->cmd_type & REQ_FLUSH) {
287 if (force_flush_cache()) /* Fail to flush cache */
288 return -EIO;
289 else
290 return 0;
291 }
292
293 if (req->cmd_type != REQ_TYPE_FS)
294 return -EIO;
295
296 if (blk_rq_pos(req) + blk_rq_cur_sectors(req) > get_capacity(tr->gd)) {
297 printk(KERN_ERR "Spectra error: request over the NAND "
298 "capacity!sector %d, current_nr_sectors %d, "
299 "while capacity is %d\n",
300 (int)blk_rq_pos(req),
301 blk_rq_cur_sectors(req),
302 (int)get_capacity(tr->gd));
303 return -EIO;
304 }
305
306 logical_start_sect = start_addr >> 9;
307 hd_start_sect = logical_start_sect / ratio;
308 rsect = logical_start_sect - hd_start_sect * ratio;
309
310 addr = (u64)hd_start_sect * ratio * 512;
311 buf = req->buffer;
312 nsect = blk_rq_cur_sectors(req);
313
314 if (rsect)
315 tsect = (ratio - rsect) < nsect ? (ratio - rsect) : nsect;
316
317 switch (rq_data_dir(req)) {
318 case READ:
319 /* Read the first NAND page */
320 if (rsect) {
321 if (GLOB_FTL_Page_Read(tr->tmp_buf, addr)) {
322 printk(KERN_ERR "Error in %s, Line %d\n",
323 __FILE__, __LINE__);
324 return -EIO;
325 }
326 memcpy(buf, tr->tmp_buf + (rsect << 9), tsect << 9);
327 addr += IdentifyDeviceData.PageDataSize;
328 buf += tsect << 9;
329 nsect -= tsect;
330 }
331
332 /* Read the other NAND pages */
333 for (hd_sects = nsect / ratio; hd_sects > 0; hd_sects--) {
334 if (GLOB_FTL_Page_Read(buf, addr)) {
335 printk(KERN_ERR "Error in %s, Line %d\n",
336 __FILE__, __LINE__);
337 return -EIO;
338 }
339 addr += IdentifyDeviceData.PageDataSize;
340 buf += IdentifyDeviceData.PageDataSize;
341 }
342
343 /* Read the last NAND pages */
344 if (nsect % ratio) {
345 if (GLOB_FTL_Page_Read(tr->tmp_buf, addr)) {
346 printk(KERN_ERR "Error in %s, Line %d\n",
347 __FILE__, __LINE__);
348 return -EIO;
349 }
350 memcpy(buf, tr->tmp_buf, (nsect % ratio) << 9);
351 }
352#if CMD_DMA
353 if (glob_ftl_execute_cmds())
354 return -EIO;
355 else
356 return 0;
357#endif
358 return 0;
359
360 case WRITE:
361 /* Write the first NAND page */
362 if (rsect) {
363 if (GLOB_FTL_Page_Read(tr->tmp_buf, addr)) {
364 printk(KERN_ERR "Error in %s, Line %d\n",
365 __FILE__, __LINE__);
366 return -EIO;
367 }
368 memcpy(tr->tmp_buf + (rsect << 9), buf, tsect << 9);
369 if (GLOB_FTL_Page_Write(tr->tmp_buf, addr)) {
370 printk(KERN_ERR "Error in %s, Line %d\n",
371 __FILE__, __LINE__);
372 return -EIO;
373 }
374 addr += IdentifyDeviceData.PageDataSize;
375 buf += tsect << 9;
376 nsect -= tsect;
377 }
378
379 /* Write the other NAND pages */
380 for (hd_sects = nsect / ratio; hd_sects > 0; hd_sects--) {
381 if (GLOB_FTL_Page_Write(buf, addr)) {
382 printk(KERN_ERR "Error in %s, Line %d\n",
383 __FILE__, __LINE__);
384 return -EIO;
385 }
386 addr += IdentifyDeviceData.PageDataSize;
387 buf += IdentifyDeviceData.PageDataSize;
388 }
389
390 /* Write the last NAND pages */
391 if (nsect % ratio) {
392 if (GLOB_FTL_Page_Read(tr->tmp_buf, addr)) {
393 printk(KERN_ERR "Error in %s, Line %d\n",
394 __FILE__, __LINE__);
395 return -EIO;
396 }
397 memcpy(tr->tmp_buf, buf, (nsect % ratio) << 9);
398 if (GLOB_FTL_Page_Write(tr->tmp_buf, addr)) {
399 printk(KERN_ERR "Error in %s, Line %d\n",
400 __FILE__, __LINE__);
401 return -EIO;
402 }
403 }
404#if CMD_DMA
405 if (glob_ftl_execute_cmds())
406 return -EIO;
407 else
408 return 0;
409#endif
410 return 0;
411
412 default:
413 printk(KERN_NOTICE "Unknown request %u\n", rq_data_dir(req));
414 return -EIO;
415 }
416}
417
418/* This function is copied from drivers/mtd/mtd_blkdevs.c */
419static int spectra_trans_thread(void *arg)
420{
421 struct spectra_nand_dev *tr = arg;
422 struct request_queue *rq = tr->queue;
423 struct request *req = NULL;
424
425 /* we might get involved when memory gets low, so use PF_MEMALLOC */
426 current->flags |= PF_MEMALLOC;
427
428 spin_lock_irq(rq->queue_lock);
429 while (!kthread_should_stop()) {
430 int res;
431
432 if (!req) {
433 req = blk_fetch_request(rq);
434 if (!req) {
435 set_current_state(TASK_INTERRUPTIBLE);
436 spin_unlock_irq(rq->queue_lock);
437 schedule();
438 spin_lock_irq(rq->queue_lock);
439 continue;
440 }
441 }
442
443 spin_unlock_irq(rq->queue_lock);
444
445 mutex_lock(&spectra_lock);
446 res = do_transfer(tr, req);
447 mutex_unlock(&spectra_lock);
448
449 spin_lock_irq(rq->queue_lock);
450
451 if (!__blk_end_request_cur(req, res))
452 req = NULL;
453 }
454
455 if (req)
456 __blk_end_request_all(req, -EIO);
457
458 spin_unlock_irq(rq->queue_lock);
459
460 return 0;
461}
462
463
464/* Request function that "handles clustering". */
465static void GLOB_SBD_request(struct request_queue *rq)
466{
467 struct spectra_nand_dev *pdev = rq->queuedata;
468 wake_up_process(pdev->thread);
469}
470
471static int GLOB_SBD_open(struct block_device *bdev, fmode_t mode)
472
473{
474 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
475 __FILE__, __LINE__, __func__);
476 return 0;
477}
478
479static int GLOB_SBD_release(struct gendisk *disk, fmode_t mode)
480{
481 int ret;
482
483 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
484 __FILE__, __LINE__, __func__);
485
486 mutex_lock(&spectra_lock);
487 ret = force_flush_cache();
488 mutex_unlock(&spectra_lock);
489
490 return 0;
491}
492
493static int GLOB_SBD_getgeo(struct block_device *bdev, struct hd_geometry *geo)
494{
495 geo->heads = 4;
496 geo->sectors = 16;
497 geo->cylinders = get_capacity(bdev->bd_disk) / (4 * 16);
498
499 nand_dbg_print(NAND_DBG_DEBUG,
500 "heads: %d, sectors: %d, cylinders: %d\n",
501 geo->heads, geo->sectors, geo->cylinders);
502
503 return 0;
504}
505
506int GLOB_SBD_ioctl(struct block_device *bdev, fmode_t mode,
507 unsigned int cmd, unsigned long arg)
508{
509 int ret;
510
511 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
512 __FILE__, __LINE__, __func__);
513
514 switch (cmd) {
515 case GLOB_SBD_IOCTL_GC:
516 nand_dbg_print(NAND_DBG_DEBUG,
517 "Spectra IOCTL: Garbage Collection "
518 "being performed\n");
519 if (PASS != GLOB_FTL_Garbage_Collection())
520 return -EFAULT;
521 return 0;
522
523 case GLOB_SBD_IOCTL_WL:
524 nand_dbg_print(NAND_DBG_DEBUG,
525 "Spectra IOCTL: Static Wear Leveling "
526 "being performed\n");
527 if (PASS != GLOB_FTL_Wear_Leveling())
528 return -EFAULT;
529 return 0;
530
531 case GLOB_SBD_IOCTL_FORMAT:
532 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: Flash format "
533 "being performed\n");
534 if (PASS != GLOB_FTL_Flash_Format())
535 return -EFAULT;
536 return 0;
537
538 case GLOB_SBD_IOCTL_FLUSH_CACHE:
539 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: Cache flush "
540 "being performed\n");
541 mutex_lock(&spectra_lock);
542 ret = force_flush_cache();
543 mutex_unlock(&spectra_lock);
544 return ret;
545
546 case GLOB_SBD_IOCTL_COPY_BLK_TABLE:
547 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: "
548 "Copy block table\n");
549 if (copy_to_user((void __user *)arg,
550 get_blk_table_start_addr(),
551 get_blk_table_len()))
552 return -EFAULT;
553 return 0;
554
555 case GLOB_SBD_IOCTL_COPY_WEAR_LEVELING_TABLE:
556 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: "
557 "Copy wear leveling table\n");
558 if (copy_to_user((void __user *)arg,
559 get_wear_leveling_table_start_addr(),
560 get_wear_leveling_table_len()))
561 return -EFAULT;
562 return 0;
563
564 case GLOB_SBD_IOCTL_GET_NAND_INFO:
565 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: "
566 "Get NAND info\n");
567 if (copy_to_user((void __user *)arg, &IdentifyDeviceData,
568 sizeof(IdentifyDeviceData)))
569 return -EFAULT;
570 return 0;
571
572 case GLOB_SBD_IOCTL_WRITE_DATA:
573 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: "
574 "Write one page data\n");
575 return ioctl_write_page_data(arg);
576
577 case GLOB_SBD_IOCTL_READ_DATA:
578 nand_dbg_print(NAND_DBG_DEBUG, "Spectra IOCTL: "
579 "Read one page data\n");
580 return ioctl_read_page_data(arg);
581 }
582
583 return -ENOTTY;
584}
585
586static DEFINE_MUTEX(ffsport_mutex);
587
588int GLOB_SBD_unlocked_ioctl(struct block_device *bdev, fmode_t mode,
589 unsigned int cmd, unsigned long arg)
590{
591 int ret;
592
593 mutex_lock(&ffsport_mutex);
594 ret = GLOB_SBD_ioctl(bdev, mode, cmd, arg);
595 mutex_unlock(&ffsport_mutex);
596
597 return ret;
598}
599
600static struct block_device_operations GLOB_SBD_ops = {
601 .owner = THIS_MODULE,
602 .open = GLOB_SBD_open,
603 .release = GLOB_SBD_release,
604 .ioctl = GLOB_SBD_unlocked_ioctl,
605 .getgeo = GLOB_SBD_getgeo,
606};
607
608static int SBD_setup_device(struct spectra_nand_dev *dev, int which)
609{
610 int res_blks;
611 u32 sects;
612
613 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
614 __FILE__, __LINE__, __func__);
615
616 memset(dev, 0, sizeof(struct spectra_nand_dev));
617
618 nand_dbg_print(NAND_DBG_WARN, "Reserved %d blocks "
619 "for OS image, %d blocks for bad block replacement.\n",
620 get_res_blk_num_os(),
621 get_res_blk_num_bad_blk());
622
623 res_blks = get_res_blk_num_bad_blk() + get_res_blk_num_os();
624
625 dev->size = (u64)IdentifyDeviceData.PageDataSize *
626 IdentifyDeviceData.PagesPerBlock *
627 (IdentifyDeviceData.wDataBlockNum - res_blks);
628
629 res_blks_os = get_res_blk_num_os();
630
631 spin_lock_init(&dev->qlock);
632
633 dev->tmp_buf = kmalloc(IdentifyDeviceData.PageDataSize, GFP_ATOMIC);
634 if (!dev->tmp_buf) {
635 printk(KERN_ERR "Failed to kmalloc memory in %s Line %d, exit.\n",
636 __FILE__, __LINE__);
637 goto out_vfree;
638 }
639
640 dev->queue = blk_init_queue(GLOB_SBD_request, &dev->qlock);
641 if (dev->queue == NULL) {
642 printk(KERN_ERR
643 "Spectra: Request queue could not be initialized."
644 " Aborting\n ");
645 goto out_vfree;
646 }
647 dev->queue->queuedata = dev;
648
649 /* As Linux block layer doesn't support >4KB hardware sector, */
650 /* Here we force report 512 byte hardware sector size to Kernel */
651 blk_queue_logical_block_size(dev->queue, 512);
652
653 blk_queue_flush(dev->queue, REQ_FLUSH);
654
655 dev->thread = kthread_run(spectra_trans_thread, dev, "nand_thd");
656 if (IS_ERR(dev->thread)) {
657 blk_cleanup_queue(dev->queue);
658 unregister_blkdev(GLOB_SBD_majornum, GLOB_SBD_NAME);
659 return PTR_ERR(dev->thread);
660 }
661
662 dev->gd = alloc_disk(PARTITIONS);
663 if (!dev->gd) {
664 printk(KERN_ERR
665 "Spectra: Could not allocate disk. Aborting \n ");
666 goto out_vfree;
667 }
668 dev->gd->major = GLOB_SBD_majornum;
669 dev->gd->first_minor = which * PARTITIONS;
670 dev->gd->fops = &GLOB_SBD_ops;
671 dev->gd->queue = dev->queue;
672 dev->gd->private_data = dev;
673 snprintf(dev->gd->disk_name, 32, "%s%c", GLOB_SBD_NAME, which + 'a');
674
675 sects = dev->size >> 9;
676 nand_dbg_print(NAND_DBG_WARN, "Capacity sects: %d\n", sects);
677 set_capacity(dev->gd, sects);
678
679 add_disk(dev->gd);
680
681 return 0;
682out_vfree:
683 return -ENOMEM;
684}
685
686/*
687static ssize_t show_nand_block_num(struct device *dev,
688 struct device_attribute *attr, char *buf)
689{
690 return snprintf(buf, PAGE_SIZE, "%d\n",
691 (int)IdentifyDeviceData.wDataBlockNum);
692}
693
694static ssize_t show_nand_pages_per_block(struct device *dev,
695 struct device_attribute *attr, char *buf)
696{
697 return snprintf(buf, PAGE_SIZE, "%d\n",
698 (int)IdentifyDeviceData.PagesPerBlock);
699}
700
701static ssize_t show_nand_page_size(struct device *dev,
702 struct device_attribute *attr, char *buf)
703{
704 return snprintf(buf, PAGE_SIZE, "%d\n",
705 (int)IdentifyDeviceData.PageDataSize);
706}
707
708static DEVICE_ATTR(nand_block_num, 0444, show_nand_block_num, NULL);
709static DEVICE_ATTR(nand_pages_per_block, 0444, show_nand_pages_per_block, NULL);
710static DEVICE_ATTR(nand_page_size, 0444, show_nand_page_size, NULL);
711
712static void create_sysfs_entry(struct device *dev)
713{
714 if (device_create_file(dev, &dev_attr_nand_block_num))
715 printk(KERN_ERR "Spectra: "
716 "failed to create sysfs entry nand_block_num.\n");
717 if (device_create_file(dev, &dev_attr_nand_pages_per_block))
718 printk(KERN_ERR "Spectra: "
719 "failed to create sysfs entry nand_pages_per_block.\n");
720 if (device_create_file(dev, &dev_attr_nand_page_size))
721 printk(KERN_ERR "Spectra: "
722 "failed to create sysfs entry nand_page_size.\n");
723}
724*/
725
726static void register_spectra_ftl_async(void *unused, async_cookie_t cookie)
727{
728 int i;
729
730 /* create_sysfs_entry(&dev->dev); */
731
732 if (PASS != GLOB_FTL_IdentifyDevice(&IdentifyDeviceData)) {
733 printk(KERN_ERR "Spectra: Unable to Read Flash Device. "
734 "Aborting\n");
735 return;
736 } else {
737 nand_dbg_print(NAND_DBG_WARN, "In GLOB_SBD_init: "
738 "Num blocks=%d, pagesperblock=%d, "
739 "pagedatasize=%d, ECCBytesPerSector=%d\n",
740 (int)IdentifyDeviceData.NumBlocks,
741 (int)IdentifyDeviceData.PagesPerBlock,
742 (int)IdentifyDeviceData.PageDataSize,
743 (int)IdentifyDeviceData.wECCBytesPerSector);
744 }
745
746 printk(KERN_ALERT "Spectra: searching block table, please wait ...\n");
747 if (GLOB_FTL_Init() != PASS) {
748 printk(KERN_ERR "Spectra: Unable to Initialize FTL Layer. "
749 "Aborting\n");
750 goto out_ftl_flash_register;
751 }
752 printk(KERN_ALERT "Spectra: block table has been found.\n");
753
754 GLOB_SBD_majornum = register_blkdev(0, GLOB_SBD_NAME);
755 if (GLOB_SBD_majornum <= 0) {
756 printk(KERN_ERR "Unable to get the major %d for Spectra",
757 GLOB_SBD_majornum);
758 goto out_ftl_flash_register;
759 }
760
761 for (i = 0; i < NUM_DEVICES; i++)
762 if (SBD_setup_device(&nand_device[i], i) == -ENOMEM)
763 goto out_blk_register;
764
765 nand_dbg_print(NAND_DBG_DEBUG,
766 "Spectra: module loaded with major number %d\n",
767 GLOB_SBD_majornum);
768
769 return;
770
771out_blk_register:
772 unregister_blkdev(GLOB_SBD_majornum, GLOB_SBD_NAME);
773out_ftl_flash_register:
774 GLOB_FTL_Cache_Release();
775 printk(KERN_ERR "Spectra: Module load failed.\n");
776}
777
778int register_spectra_ftl()
779{
780 async_schedule(register_spectra_ftl_async, NULL);
781 return 0;
782}
783EXPORT_SYMBOL_GPL(register_spectra_ftl);
784
785static int GLOB_SBD_init(void)
786{
787 /* Set debug output level (0~3) here. 3 is most verbose */
788 printk(KERN_ALERT "Spectra: %s\n", GLOB_version);
789
790 mutex_init(&spectra_lock);
791
792 if (PASS != GLOB_FTL_Flash_Init()) {
793 printk(KERN_ERR "Spectra: Unable to Initialize Flash Device. "
794 "Aborting\n");
795 return -ENODEV;
796 }
797 return 0;
798}
799
800static void __exit GLOB_SBD_exit(void)
801{
802 int i;
803
804 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
805 __FILE__, __LINE__, __func__);
806
807 for (i = 0; i < NUM_DEVICES; i++) {
808 struct spectra_nand_dev *dev = &nand_device[i];
809 if (dev->gd) {
810 del_gendisk(dev->gd);
811 put_disk(dev->gd);
812 }
813 if (dev->queue)
814 blk_cleanup_queue(dev->queue);
815 kfree(dev->tmp_buf);
816 }
817
818 unregister_blkdev(GLOB_SBD_majornum, GLOB_SBD_NAME);
819
820 mutex_lock(&spectra_lock);
821 force_flush_cache();
822 mutex_unlock(&spectra_lock);
823
824 GLOB_FTL_Cache_Release();
825
826 GLOB_FTL_Flash_Release();
827
828 nand_dbg_print(NAND_DBG_DEBUG,
829 "Spectra FTL module (major number %d) unloaded.\n",
830 GLOB_SBD_majornum);
831}
832
833module_init(GLOB_SBD_init);
834module_exit(GLOB_SBD_exit);
diff --git a/drivers/staging/spectra/ffsport.h b/drivers/staging/spectra/ffsport.h
deleted file mode 100644
index 85c0750612f6..000000000000
--- a/drivers/staging/spectra/ffsport.h
+++ /dev/null
@@ -1,85 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _FFSPORT_
21#define _FFSPORT_
22
23#include "ffsdefs.h"
24
25#if defined __GNUC__
26#define PACKED
27#define PACKED_GNU __attribute__ ((packed))
28#define UNALIGNED
29#endif
30
31#include <linux/semaphore.h>
32#include <linux/string.h> /* for strcpy(), stricmp(), etc */
33#include <linux/mm.h> /* for kmalloc(), kfree() */
34#include <linux/vmalloc.h>
35#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/init.h>
38
39#include <linux/kernel.h> /* printk() */
40#include <linux/fs.h> /* everything... */
41#include <linux/errno.h> /* error codes */
42#include <linux/types.h> /* size_t */
43#include <linux/genhd.h>
44#include <linux/blkdev.h>
45#include <linux/hdreg.h>
46#include <linux/pci.h>
47#include "flash.h"
48
49#define VERBOSE 1
50
51#define NAND_DBG_WARN 1
52#define NAND_DBG_DEBUG 2
53#define NAND_DBG_TRACE 3
54
55extern int nand_debug_level;
56
57#ifdef VERBOSE
58#define nand_dbg_print(level, args...) \
59 do { \
60 if (level <= nand_debug_level) \
61 printk(KERN_ALERT args); \
62 } while (0)
63#else
64#define nand_dbg_print(level, args...)
65#endif
66
67#ifdef SUPPORT_BIG_ENDIAN
68#define INVERTUINT16(w) ((u16)(((u16)(w)) << 8) | \
69 (u16)((u16)(w) >> 8))
70
71#define INVERTUINT32(dw) (((u32)(dw) << 24) | \
72 (((u32)(dw) << 8) & 0x00ff0000) | \
73 (((u32)(dw) >> 8) & 0x0000ff00) | \
74 ((u32)(dw) >> 24))
75#else
76#define INVERTUINT16(w) w
77#define INVERTUINT32(dw) dw
78#endif
79
80extern int GLOB_Calc_Used_Bits(u32 n);
81extern u64 GLOB_u64_Div(u64 addr, u32 divisor);
82extern u64 GLOB_u64_Remainder(u64 addr, u32 divisor_type);
83extern int register_spectra_ftl(void);
84
85#endif /* _FFSPORT_ */
diff --git a/drivers/staging/spectra/flash.c b/drivers/staging/spectra/flash.c
deleted file mode 100644
index aead358e5c2a..000000000000
--- a/drivers/staging/spectra/flash.c
+++ /dev/null
@@ -1,4305 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include <linux/fs.h>
21#include <linux/slab.h>
22
23#include "flash.h"
24#include "ffsdefs.h"
25#include "lld.h"
26#include "lld_nand.h"
27#if CMD_DMA
28#include "lld_cdma.h"
29#endif
30
31#define BLK_FROM_ADDR(addr) ((u32)(addr >> DeviceInfo.nBitsInBlockDataSize))
32#define PAGE_FROM_ADDR(addr, Block) ((u16)((addr - (u64)Block * \
33 DeviceInfo.wBlockDataSize) >> DeviceInfo.nBitsInPageDataSize))
34
35#define IS_SPARE_BLOCK(blk) (BAD_BLOCK != (pbt[blk] &\
36 BAD_BLOCK) && SPARE_BLOCK == (pbt[blk] & SPARE_BLOCK))
37
38#define IS_DATA_BLOCK(blk) (0 == (pbt[blk] & BAD_BLOCK))
39
40#define IS_DISCARDED_BLOCK(blk) (BAD_BLOCK != (pbt[blk] &\
41 BAD_BLOCK) && DISCARD_BLOCK == (pbt[blk] & DISCARD_BLOCK))
42
43#define IS_BAD_BLOCK(blk) (BAD_BLOCK == (pbt[blk] & BAD_BLOCK))
44
45#if DEBUG_BNDRY
46void debug_boundary_lineno_error(int chnl, int limit, int no,
47 int lineno, char *filename)
48{
49 if (chnl >= limit)
50 printk(KERN_ERR "Boundary Check Fail value %d >= limit %d, "
51 "at %s:%d. Other info:%d. Aborting...\n",
52 chnl, limit, filename, lineno, no);
53}
54/* static int globalmemsize; */
55#endif
56
57static u16 FTL_Cache_If_Hit(u64 dwPageAddr);
58static int FTL_Cache_Read(u64 dwPageAddr);
59static void FTL_Cache_Read_Page(u8 *pData, u64 dwPageAddr,
60 u16 cache_blk);
61static void FTL_Cache_Write_Page(u8 *pData, u64 dwPageAddr,
62 u8 cache_blk, u16 flag);
63static int FTL_Cache_Write(void);
64static void FTL_Calculate_LRU(void);
65static u32 FTL_Get_Block_Index(u32 wBlockNum);
66
67static int FTL_Search_Block_Table_IN_Block(u32 BT_Block,
68 u8 BT_Tag, u16 *Page);
69static int FTL_Read_Block_Table(void);
70static int FTL_Write_Block_Table(int wForce);
71static int FTL_Write_Block_Table_Data(void);
72static int FTL_Check_Block_Table(int wOldTable);
73static int FTL_Static_Wear_Leveling(void);
74static u32 FTL_Replace_Block_Table(void);
75static int FTL_Write_IN_Progress_Block_Table_Page(void);
76
77static u32 FTL_Get_Page_Num(u64 length);
78static u64 FTL_Get_Physical_Block_Addr(u64 blk_addr);
79
80static u32 FTL_Replace_OneBlock(u32 wBlockNum,
81 u32 wReplaceNum);
82static u32 FTL_Replace_LWBlock(u32 wBlockNum,
83 int *pGarbageCollect);
84static u32 FTL_Replace_MWBlock(void);
85static int FTL_Replace_Block(u64 blk_addr);
86static int FTL_Adjust_Relative_Erase_Count(u32 Index_of_MAX);
87
88struct device_info_tag DeviceInfo;
89struct flash_cache_tag Cache;
90static struct spectra_l2_cache_info cache_l2;
91
92static u8 *cache_l2_page_buf;
93static u8 *cache_l2_blk_buf;
94
95u8 *g_pBlockTable;
96u8 *g_pWearCounter;
97u16 *g_pReadCounter;
98u32 *g_pBTBlocks;
99static u16 g_wBlockTableOffset;
100static u32 g_wBlockTableIndex;
101static u8 g_cBlockTableStatus;
102
103static u8 *g_pTempBuf;
104static u8 *flag_check_blk_table;
105static u8 *tmp_buf_search_bt_in_block;
106static u8 *spare_buf_search_bt_in_block;
107static u8 *spare_buf_bt_search_bt_in_block;
108static u8 *tmp_buf1_read_blk_table;
109static u8 *tmp_buf2_read_blk_table;
110static u8 *flags_static_wear_leveling;
111static u8 *tmp_buf_write_blk_table_data;
112static u8 *tmp_buf_read_disturbance;
113
114u8 *buf_read_page_main_spare;
115u8 *buf_write_page_main_spare;
116u8 *buf_read_page_spare;
117u8 *buf_get_bad_block;
118
119#if (RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE && CMD_DMA)
120struct flash_cache_delta_list_tag int_cache[MAX_CHANS + MAX_DESCS];
121struct flash_cache_tag cache_start_copy;
122#endif
123
124int g_wNumFreeBlocks;
125u8 g_SBDCmdIndex;
126
127static u8 *g_pIPF;
128static u8 bt_flag = FIRST_BT_ID;
129static u8 bt_block_changed;
130
131static u16 cache_block_to_write;
132static u8 last_erased = FIRST_BT_ID;
133
134static u8 GC_Called;
135static u8 BT_GC_Called;
136
137#if CMD_DMA
138#define COPY_BACK_BUF_NUM 10
139
140static u8 ftl_cmd_cnt; /* Init value is 0 */
141u8 *g_pBTDelta;
142u8 *g_pBTDelta_Free;
143u8 *g_pBTStartingCopy;
144u8 *g_pWearCounterCopy;
145u16 *g_pReadCounterCopy;
146u8 *g_pBlockTableCopies;
147u8 *g_pNextBlockTable;
148static u8 *cp_back_buf_copies[COPY_BACK_BUF_NUM];
149static int cp_back_buf_idx;
150
151static u8 *g_temp_buf;
152
153#pragma pack(push, 1)
154#pragma pack(1)
155struct BTableChangesDelta {
156 u8 ftl_cmd_cnt;
157 u8 ValidFields;
158 u16 g_wBlockTableOffset;
159 u32 g_wBlockTableIndex;
160 u32 BT_Index;
161 u32 BT_Entry_Value;
162 u32 WC_Index;
163 u8 WC_Entry_Value;
164 u32 RC_Index;
165 u16 RC_Entry_Value;
166};
167
168#pragma pack(pop)
169
170struct BTableChangesDelta *p_BTableChangesDelta;
171#endif
172
173
174#define MARK_BLOCK_AS_BAD(blocknode) (blocknode |= BAD_BLOCK)
175#define MARK_BLK_AS_DISCARD(blk) (blk = (blk & ~SPARE_BLOCK) | DISCARD_BLOCK)
176
177#define FTL_Get_LBAPBA_Table_Mem_Size_Bytes() (DeviceInfo.wDataBlockNum *\
178 sizeof(u32))
179#define FTL_Get_WearCounter_Table_Mem_Size_Bytes() (DeviceInfo.wDataBlockNum *\
180 sizeof(u8))
181#define FTL_Get_ReadCounter_Table_Mem_Size_Bytes() (DeviceInfo.wDataBlockNum *\
182 sizeof(u16))
183#if SUPPORT_LARGE_BLOCKNUM
184#define FTL_Get_LBAPBA_Table_Flash_Size_Bytes() (DeviceInfo.wDataBlockNum *\
185 sizeof(u8) * 3)
186#else
187#define FTL_Get_LBAPBA_Table_Flash_Size_Bytes() (DeviceInfo.wDataBlockNum *\
188 sizeof(u16))
189#endif
190#define FTL_Get_WearCounter_Table_Flash_Size_Bytes \
191 FTL_Get_WearCounter_Table_Mem_Size_Bytes
192#define FTL_Get_ReadCounter_Table_Flash_Size_Bytes \
193 FTL_Get_ReadCounter_Table_Mem_Size_Bytes
194
195static u32 FTL_Get_Block_Table_Flash_Size_Bytes(void)
196{
197 u32 byte_num;
198
199 if (DeviceInfo.MLCDevice) {
200 byte_num = FTL_Get_LBAPBA_Table_Flash_Size_Bytes() +
201 DeviceInfo.wDataBlockNum * sizeof(u8) +
202 DeviceInfo.wDataBlockNum * sizeof(u16);
203 } else {
204 byte_num = FTL_Get_LBAPBA_Table_Flash_Size_Bytes() +
205 DeviceInfo.wDataBlockNum * sizeof(u8);
206 }
207
208 byte_num += 4 * sizeof(u8);
209
210 return byte_num;
211}
212
213static u16 FTL_Get_Block_Table_Flash_Size_Pages(void)
214{
215 return (u16)FTL_Get_Page_Num(FTL_Get_Block_Table_Flash_Size_Bytes());
216}
217
218static int FTL_Copy_Block_Table_To_Flash(u8 *flashBuf, u32 sizeToTx,
219 u32 sizeTxed)
220{
221 u32 wBytesCopied, blk_tbl_size, wBytes;
222 u32 *pbt = (u32 *)g_pBlockTable;
223
224 blk_tbl_size = FTL_Get_LBAPBA_Table_Flash_Size_Bytes();
225 for (wBytes = 0;
226 (wBytes < sizeToTx) && ((wBytes + sizeTxed) < blk_tbl_size);
227 wBytes++) {
228#if SUPPORT_LARGE_BLOCKNUM
229 flashBuf[wBytes] = (u8)(pbt[(wBytes + sizeTxed) / 3]
230 >> (((wBytes + sizeTxed) % 3) ?
231 ((((wBytes + sizeTxed) % 3) == 2) ? 0 : 8) : 16)) & 0xFF;
232#else
233 flashBuf[wBytes] = (u8)(pbt[(wBytes + sizeTxed) / 2]
234 >> (((wBytes + sizeTxed) % 2) ? 0 : 8)) & 0xFF;
235#endif
236 }
237
238 sizeTxed = (sizeTxed > blk_tbl_size) ? (sizeTxed - blk_tbl_size) : 0;
239 blk_tbl_size = FTL_Get_WearCounter_Table_Flash_Size_Bytes();
240 wBytesCopied = wBytes;
241 wBytes = ((blk_tbl_size - sizeTxed) > (sizeToTx - wBytesCopied)) ?
242 (sizeToTx - wBytesCopied) : (blk_tbl_size - sizeTxed);
243 memcpy(flashBuf + wBytesCopied, g_pWearCounter + sizeTxed, wBytes);
244
245 sizeTxed = (sizeTxed > blk_tbl_size) ? (sizeTxed - blk_tbl_size) : 0;
246
247 if (DeviceInfo.MLCDevice) {
248 blk_tbl_size = FTL_Get_ReadCounter_Table_Flash_Size_Bytes();
249 wBytesCopied += wBytes;
250 for (wBytes = 0; ((wBytes + wBytesCopied) < sizeToTx) &&
251 ((wBytes + sizeTxed) < blk_tbl_size); wBytes++)
252 flashBuf[wBytes + wBytesCopied] =
253 (g_pReadCounter[(wBytes + sizeTxed) / 2] >>
254 (((wBytes + sizeTxed) % 2) ? 0 : 8)) & 0xFF;
255 }
256
257 return wBytesCopied + wBytes;
258}
259
260static int FTL_Copy_Block_Table_From_Flash(u8 *flashBuf,
261 u32 sizeToTx, u32 sizeTxed)
262{
263 u32 wBytesCopied, blk_tbl_size, wBytes;
264 u32 *pbt = (u32 *)g_pBlockTable;
265
266 blk_tbl_size = FTL_Get_LBAPBA_Table_Flash_Size_Bytes();
267 for (wBytes = 0; (wBytes < sizeToTx) &&
268 ((wBytes + sizeTxed) < blk_tbl_size); wBytes++) {
269#if SUPPORT_LARGE_BLOCKNUM
270 if (!((wBytes + sizeTxed) % 3))
271 pbt[(wBytes + sizeTxed) / 3] = 0;
272 pbt[(wBytes + sizeTxed) / 3] |=
273 (flashBuf[wBytes] << (((wBytes + sizeTxed) % 3) ?
274 ((((wBytes + sizeTxed) % 3) == 2) ? 0 : 8) : 16));
275#else
276 if (!((wBytes + sizeTxed) % 2))
277 pbt[(wBytes + sizeTxed) / 2] = 0;
278 pbt[(wBytes + sizeTxed) / 2] |=
279 (flashBuf[wBytes] << (((wBytes + sizeTxed) % 2) ?
280 0 : 8));
281#endif
282 }
283
284 sizeTxed = (sizeTxed > blk_tbl_size) ? (sizeTxed - blk_tbl_size) : 0;
285 blk_tbl_size = FTL_Get_WearCounter_Table_Flash_Size_Bytes();
286 wBytesCopied = wBytes;
287 wBytes = ((blk_tbl_size - sizeTxed) > (sizeToTx - wBytesCopied)) ?
288 (sizeToTx - wBytesCopied) : (blk_tbl_size - sizeTxed);
289 memcpy(g_pWearCounter + sizeTxed, flashBuf + wBytesCopied, wBytes);
290 sizeTxed = (sizeTxed > blk_tbl_size) ? (sizeTxed - blk_tbl_size) : 0;
291
292 if (DeviceInfo.MLCDevice) {
293 wBytesCopied += wBytes;
294 blk_tbl_size = FTL_Get_ReadCounter_Table_Flash_Size_Bytes();
295 for (wBytes = 0; ((wBytes + wBytesCopied) < sizeToTx) &&
296 ((wBytes + sizeTxed) < blk_tbl_size); wBytes++) {
297 if (((wBytes + sizeTxed) % 2))
298 g_pReadCounter[(wBytes + sizeTxed) / 2] = 0;
299 g_pReadCounter[(wBytes + sizeTxed) / 2] |=
300 (flashBuf[wBytes] <<
301 (((wBytes + sizeTxed) % 2) ? 0 : 8));
302 }
303 }
304
305 return wBytesCopied+wBytes;
306}
307
308static int FTL_Insert_Block_Table_Signature(u8 *buf, u8 tag)
309{
310 int i;
311
312 for (i = 0; i < BTSIG_BYTES; i++)
313 buf[BTSIG_OFFSET + i] =
314 ((tag + (i * BTSIG_DELTA) - FIRST_BT_ID) %
315 (1 + LAST_BT_ID-FIRST_BT_ID)) + FIRST_BT_ID;
316
317 return PASS;
318}
319
320static int FTL_Extract_Block_Table_Tag(u8 *buf, u8 **tagarray)
321{
322 static u8 tag[BTSIG_BYTES >> 1];
323 int i, j, k, tagi, tagtemp, status;
324
325 *tagarray = (u8 *)tag;
326 tagi = 0;
327
328 for (i = 0; i < (BTSIG_BYTES - 1); i++) {
329 for (j = i + 1; (j < BTSIG_BYTES) &&
330 (tagi < (BTSIG_BYTES >> 1)); j++) {
331 tagtemp = buf[BTSIG_OFFSET + j] -
332 buf[BTSIG_OFFSET + i];
333 if (tagtemp && !(tagtemp % BTSIG_DELTA)) {
334 tagtemp = (buf[BTSIG_OFFSET + i] +
335 (1 + LAST_BT_ID - FIRST_BT_ID) -
336 (i * BTSIG_DELTA)) %
337 (1 + LAST_BT_ID - FIRST_BT_ID);
338 status = FAIL;
339 for (k = 0; k < tagi; k++) {
340 if (tagtemp == tag[k])
341 status = PASS;
342 }
343
344 if (status == FAIL) {
345 tag[tagi++] = tagtemp;
346 i = (j == (i + 1)) ? i + 1 : i;
347 j = (j == (i + 1)) ? i + 1 : i;
348 }
349 }
350 }
351 }
352
353 return tagi;
354}
355
356
357static int FTL_Execute_SPL_Recovery(void)
358{
359 u32 j, block, blks;
360 u32 *pbt = (u32 *)g_pBlockTable;
361 int ret;
362
363 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
364 __FILE__, __LINE__, __func__);
365
366 blks = DeviceInfo.wSpectraEndBlock - DeviceInfo.wSpectraStartBlock;
367 for (j = 0; j <= blks; j++) {
368 block = (pbt[j]);
369 if (((block & BAD_BLOCK) != BAD_BLOCK) &&
370 ((block & SPARE_BLOCK) == SPARE_BLOCK)) {
371 ret = GLOB_LLD_Erase_Block(block & ~BAD_BLOCK);
372 if (FAIL == ret) {
373 nand_dbg_print(NAND_DBG_WARN,
374 "NAND Program fail in %s, Line %d, "
375 "Function: %s, new Bad Block %d "
376 "generated!\n",
377 __FILE__, __LINE__, __func__,
378 (int)(block & ~BAD_BLOCK));
379 MARK_BLOCK_AS_BAD(pbt[j]);
380 }
381 }
382 }
383
384 return PASS;
385}
386
387/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
388* Function: GLOB_FTL_IdentifyDevice
389* Inputs: pointer to identify data structure
390* Outputs: PASS / FAIL
391* Description: the identify data structure is filled in with
392* information for the block driver.
393*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
394int GLOB_FTL_IdentifyDevice(struct spectra_indentfy_dev_tag *dev_data)
395{
396 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
397 __FILE__, __LINE__, __func__);
398
399 dev_data->NumBlocks = DeviceInfo.wTotalBlocks;
400 dev_data->PagesPerBlock = DeviceInfo.wPagesPerBlock;
401 dev_data->PageDataSize = DeviceInfo.wPageDataSize;
402 dev_data->wECCBytesPerSector = DeviceInfo.wECCBytesPerSector;
403 dev_data->wDataBlockNum = DeviceInfo.wDataBlockNum;
404
405 return PASS;
406}
407
408/* ..... */
409static int allocate_memory(void)
410{
411 u32 block_table_size, page_size, block_size, mem_size;
412 u32 total_bytes = 0;
413 int i;
414#if CMD_DMA
415 int j;
416#endif
417
418 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
419 __FILE__, __LINE__, __func__);
420
421 page_size = DeviceInfo.wPageSize;
422 block_size = DeviceInfo.wPagesPerBlock * DeviceInfo.wPageDataSize;
423
424 block_table_size = DeviceInfo.wDataBlockNum *
425 (sizeof(u32) + sizeof(u8) + sizeof(u16));
426 block_table_size += (DeviceInfo.wPageDataSize -
427 (block_table_size % DeviceInfo.wPageDataSize)) %
428 DeviceInfo.wPageDataSize;
429
430 /* Malloc memory for block tables */
431 g_pBlockTable = kzalloc(block_table_size, GFP_ATOMIC);
432 if (!g_pBlockTable)
433 goto block_table_fail;
434 total_bytes += block_table_size;
435
436 g_pWearCounter = (u8 *)(g_pBlockTable +
437 DeviceInfo.wDataBlockNum * sizeof(u32));
438
439 if (DeviceInfo.MLCDevice)
440 g_pReadCounter = (u16 *)(g_pBlockTable +
441 DeviceInfo.wDataBlockNum *
442 (sizeof(u32) + sizeof(u8)));
443
444 /* Malloc memory and init for cache items */
445 for (i = 0; i < CACHE_ITEM_NUM; i++) {
446 Cache.array[i].address = NAND_CACHE_INIT_ADDR;
447 Cache.array[i].use_cnt = 0;
448 Cache.array[i].changed = CLEAR;
449 Cache.array[i].buf = kzalloc(Cache.cache_item_size,
450 GFP_ATOMIC);
451 if (!Cache.array[i].buf)
452 goto cache_item_fail;
453 total_bytes += Cache.cache_item_size;
454 }
455
456 /* Malloc memory for IPF */
457 g_pIPF = kzalloc(page_size, GFP_ATOMIC);
458 if (!g_pIPF)
459 goto ipf_fail;
460 total_bytes += page_size;
461
462 /* Malloc memory for data merging during Level2 Cache flush */
463 cache_l2_page_buf = kmalloc(page_size, GFP_ATOMIC);
464 if (!cache_l2_page_buf)
465 goto cache_l2_page_buf_fail;
466 memset(cache_l2_page_buf, 0xff, page_size);
467 total_bytes += page_size;
468
469 cache_l2_blk_buf = kmalloc(block_size, GFP_ATOMIC);
470 if (!cache_l2_blk_buf)
471 goto cache_l2_blk_buf_fail;
472 memset(cache_l2_blk_buf, 0xff, block_size);
473 total_bytes += block_size;
474
475 /* Malloc memory for temp buffer */
476 g_pTempBuf = kzalloc(Cache.cache_item_size, GFP_ATOMIC);
477 if (!g_pTempBuf)
478 goto Temp_buf_fail;
479 total_bytes += Cache.cache_item_size;
480
481 /* Malloc memory for block table blocks */
482 mem_size = (1 + LAST_BT_ID - FIRST_BT_ID) * sizeof(u32);
483 g_pBTBlocks = kmalloc(mem_size, GFP_ATOMIC);
484 if (!g_pBTBlocks)
485 goto bt_blocks_fail;
486 memset(g_pBTBlocks, 0xff, mem_size);
487 total_bytes += mem_size;
488
489 /* Malloc memory for function FTL_Check_Block_Table */
490 flag_check_blk_table = kmalloc(DeviceInfo.wDataBlockNum, GFP_ATOMIC);
491 if (!flag_check_blk_table)
492 goto flag_check_blk_table_fail;
493 total_bytes += DeviceInfo.wDataBlockNum;
494
495 /* Malloc memory for function FTL_Search_Block_Table_IN_Block */
496 tmp_buf_search_bt_in_block = kmalloc(page_size, GFP_ATOMIC);
497 if (!tmp_buf_search_bt_in_block)
498 goto tmp_buf_search_bt_in_block_fail;
499 memset(tmp_buf_search_bt_in_block, 0xff, page_size);
500 total_bytes += page_size;
501
502 mem_size = DeviceInfo.wPageSize - DeviceInfo.wPageDataSize;
503 spare_buf_search_bt_in_block = kmalloc(mem_size, GFP_ATOMIC);
504 if (!spare_buf_search_bt_in_block)
505 goto spare_buf_search_bt_in_block_fail;
506 memset(spare_buf_search_bt_in_block, 0xff, mem_size);
507 total_bytes += mem_size;
508
509 spare_buf_bt_search_bt_in_block = kmalloc(mem_size, GFP_ATOMIC);
510 if (!spare_buf_bt_search_bt_in_block)
511 goto spare_buf_bt_search_bt_in_block_fail;
512 memset(spare_buf_bt_search_bt_in_block, 0xff, mem_size);
513 total_bytes += mem_size;
514
515 /* Malloc memory for function FTL_Read_Block_Table */
516 tmp_buf1_read_blk_table = kmalloc(page_size, GFP_ATOMIC);
517 if (!tmp_buf1_read_blk_table)
518 goto tmp_buf1_read_blk_table_fail;
519 memset(tmp_buf1_read_blk_table, 0xff, page_size);
520 total_bytes += page_size;
521
522 tmp_buf2_read_blk_table = kmalloc(page_size, GFP_ATOMIC);
523 if (!tmp_buf2_read_blk_table)
524 goto tmp_buf2_read_blk_table_fail;
525 memset(tmp_buf2_read_blk_table, 0xff, page_size);
526 total_bytes += page_size;
527
528 /* Malloc memory for function FTL_Static_Wear_Leveling */
529 flags_static_wear_leveling = kmalloc(DeviceInfo.wDataBlockNum,
530 GFP_ATOMIC);
531 if (!flags_static_wear_leveling)
532 goto flags_static_wear_leveling_fail;
533 total_bytes += DeviceInfo.wDataBlockNum;
534
535 /* Malloc memory for function FTL_Write_Block_Table_Data */
536 if (FTL_Get_Block_Table_Flash_Size_Pages() > 3)
537 mem_size = FTL_Get_Block_Table_Flash_Size_Bytes() -
538 2 * DeviceInfo.wPageSize;
539 else
540 mem_size = DeviceInfo.wPageSize;
541 tmp_buf_write_blk_table_data = kmalloc(mem_size, GFP_ATOMIC);
542 if (!tmp_buf_write_blk_table_data)
543 goto tmp_buf_write_blk_table_data_fail;
544 memset(tmp_buf_write_blk_table_data, 0xff, mem_size);
545 total_bytes += mem_size;
546
547 /* Malloc memory for function FTL_Read_Disturbance */
548 tmp_buf_read_disturbance = kmalloc(block_size, GFP_ATOMIC);
549 if (!tmp_buf_read_disturbance)
550 goto tmp_buf_read_disturbance_fail;
551 memset(tmp_buf_read_disturbance, 0xff, block_size);
552 total_bytes += block_size;
553
554 /* Alloc mem for function NAND_Read_Page_Main_Spare of lld_nand.c */
555 buf_read_page_main_spare = kmalloc(DeviceInfo.wPageSize, GFP_ATOMIC);
556 if (!buf_read_page_main_spare)
557 goto buf_read_page_main_spare_fail;
558 total_bytes += DeviceInfo.wPageSize;
559
560 /* Alloc mem for function NAND_Write_Page_Main_Spare of lld_nand.c */
561 buf_write_page_main_spare = kmalloc(DeviceInfo.wPageSize, GFP_ATOMIC);
562 if (!buf_write_page_main_spare)
563 goto buf_write_page_main_spare_fail;
564 total_bytes += DeviceInfo.wPageSize;
565
566 /* Alloc mem for function NAND_Read_Page_Spare of lld_nand.c */
567 buf_read_page_spare = kmalloc(DeviceInfo.wPageSpareSize, GFP_ATOMIC);
568 if (!buf_read_page_spare)
569 goto buf_read_page_spare_fail;
570 memset(buf_read_page_spare, 0xff, DeviceInfo.wPageSpareSize);
571 total_bytes += DeviceInfo.wPageSpareSize;
572
573 /* Alloc mem for function NAND_Get_Bad_Block of lld_nand.c */
574 buf_get_bad_block = kmalloc(DeviceInfo.wPageSpareSize, GFP_ATOMIC);
575 if (!buf_get_bad_block)
576 goto buf_get_bad_block_fail;
577 memset(buf_get_bad_block, 0xff, DeviceInfo.wPageSpareSize);
578 total_bytes += DeviceInfo.wPageSpareSize;
579
580#if CMD_DMA
581 g_temp_buf = kmalloc(block_size, GFP_ATOMIC);
582 if (!g_temp_buf)
583 goto temp_buf_fail;
584 memset(g_temp_buf, 0xff, block_size);
585 total_bytes += block_size;
586
587 /* Malloc memory for copy of block table used in CDMA mode */
588 g_pBTStartingCopy = kzalloc(block_table_size, GFP_ATOMIC);
589 if (!g_pBTStartingCopy)
590 goto bt_starting_copy;
591 total_bytes += block_table_size;
592
593 g_pWearCounterCopy = (u8 *)(g_pBTStartingCopy +
594 DeviceInfo.wDataBlockNum * sizeof(u32));
595
596 if (DeviceInfo.MLCDevice)
597 g_pReadCounterCopy = (u16 *)(g_pBTStartingCopy +
598 DeviceInfo.wDataBlockNum *
599 (sizeof(u32) + sizeof(u8)));
600
601 /* Malloc memory for block table copies */
602 mem_size = 5 * DeviceInfo.wDataBlockNum * sizeof(u32) +
603 5 * DeviceInfo.wDataBlockNum * sizeof(u8);
604 if (DeviceInfo.MLCDevice)
605 mem_size += 5 * DeviceInfo.wDataBlockNum * sizeof(u16);
606 g_pBlockTableCopies = kzalloc(mem_size, GFP_ATOMIC);
607 if (!g_pBlockTableCopies)
608 goto blk_table_copies_fail;
609 total_bytes += mem_size;
610 g_pNextBlockTable = g_pBlockTableCopies;
611
612 /* Malloc memory for Block Table Delta */
613 mem_size = MAX_DESCS * sizeof(struct BTableChangesDelta);
614 g_pBTDelta = kzalloc(mem_size, GFP_ATOMIC);
615 if (!g_pBTDelta)
616 goto bt_delta_fail;
617 total_bytes += mem_size;
618 g_pBTDelta_Free = g_pBTDelta;
619
620 /* Malloc memory for Copy Back Buffers */
621 for (j = 0; j < COPY_BACK_BUF_NUM; j++) {
622 cp_back_buf_copies[j] = kzalloc(block_size, GFP_ATOMIC);
623 if (!cp_back_buf_copies[j])
624 goto cp_back_buf_copies_fail;
625 total_bytes += block_size;
626 }
627 cp_back_buf_idx = 0;
628
629 /* Malloc memory for pending commands list */
630 mem_size = sizeof(struct pending_cmd) * MAX_DESCS;
631 info.pcmds = kzalloc(mem_size, GFP_KERNEL);
632 if (!info.pcmds)
633 goto pending_cmds_buf_fail;
634 total_bytes += mem_size;
635
636 /* Malloc memory for CDMA descripter table */
637 mem_size = sizeof(struct cdma_descriptor) * MAX_DESCS;
638 info.cdma_desc_buf = kzalloc(mem_size, GFP_KERNEL);
639 if (!info.cdma_desc_buf)
640 goto cdma_desc_buf_fail;
641 total_bytes += mem_size;
642
643 /* Malloc memory for Memcpy descripter table */
644 mem_size = sizeof(struct memcpy_descriptor) * MAX_DESCS;
645 info.memcp_desc_buf = kzalloc(mem_size, GFP_KERNEL);
646 if (!info.memcp_desc_buf)
647 goto memcp_desc_buf_fail;
648 total_bytes += mem_size;
649#endif
650
651 nand_dbg_print(NAND_DBG_WARN,
652 "Total memory allocated in FTL layer: %d\n", total_bytes);
653
654 return PASS;
655
656#if CMD_DMA
657memcp_desc_buf_fail:
658 kfree(info.cdma_desc_buf);
659cdma_desc_buf_fail:
660 kfree(info.pcmds);
661pending_cmds_buf_fail:
662cp_back_buf_copies_fail:
663 j--;
664 for (; j >= 0; j--)
665 kfree(cp_back_buf_copies[j]);
666 kfree(g_pBTDelta);
667bt_delta_fail:
668 kfree(g_pBlockTableCopies);
669blk_table_copies_fail:
670 kfree(g_pBTStartingCopy);
671bt_starting_copy:
672 kfree(g_temp_buf);
673temp_buf_fail:
674 kfree(buf_get_bad_block);
675#endif
676
677buf_get_bad_block_fail:
678 kfree(buf_read_page_spare);
679buf_read_page_spare_fail:
680 kfree(buf_write_page_main_spare);
681buf_write_page_main_spare_fail:
682 kfree(buf_read_page_main_spare);
683buf_read_page_main_spare_fail:
684 kfree(tmp_buf_read_disturbance);
685tmp_buf_read_disturbance_fail:
686 kfree(tmp_buf_write_blk_table_data);
687tmp_buf_write_blk_table_data_fail:
688 kfree(flags_static_wear_leveling);
689flags_static_wear_leveling_fail:
690 kfree(tmp_buf2_read_blk_table);
691tmp_buf2_read_blk_table_fail:
692 kfree(tmp_buf1_read_blk_table);
693tmp_buf1_read_blk_table_fail:
694 kfree(spare_buf_bt_search_bt_in_block);
695spare_buf_bt_search_bt_in_block_fail:
696 kfree(spare_buf_search_bt_in_block);
697spare_buf_search_bt_in_block_fail:
698 kfree(tmp_buf_search_bt_in_block);
699tmp_buf_search_bt_in_block_fail:
700 kfree(flag_check_blk_table);
701flag_check_blk_table_fail:
702 kfree(g_pBTBlocks);
703bt_blocks_fail:
704 kfree(g_pTempBuf);
705Temp_buf_fail:
706 kfree(cache_l2_blk_buf);
707cache_l2_blk_buf_fail:
708 kfree(cache_l2_page_buf);
709cache_l2_page_buf_fail:
710 kfree(g_pIPF);
711ipf_fail:
712cache_item_fail:
713 i--;
714 for (; i >= 0; i--)
715 kfree(Cache.array[i].buf);
716 kfree(g_pBlockTable);
717block_table_fail:
718 printk(KERN_ERR "Failed to kmalloc memory in %s Line %d.\n",
719 __FILE__, __LINE__);
720
721 return -ENOMEM;
722}
723
724/* .... */
725static int free_memory(void)
726{
727 int i;
728
729#if CMD_DMA
730 kfree(info.memcp_desc_buf);
731 kfree(info.cdma_desc_buf);
732 kfree(info.pcmds);
733 for (i = COPY_BACK_BUF_NUM - 1; i >= 0; i--)
734 kfree(cp_back_buf_copies[i]);
735 kfree(g_pBTDelta);
736 kfree(g_pBlockTableCopies);
737 kfree(g_pBTStartingCopy);
738 kfree(g_temp_buf);
739 kfree(buf_get_bad_block);
740#endif
741 kfree(buf_read_page_spare);
742 kfree(buf_write_page_main_spare);
743 kfree(buf_read_page_main_spare);
744 kfree(tmp_buf_read_disturbance);
745 kfree(tmp_buf_write_blk_table_data);
746 kfree(flags_static_wear_leveling);
747 kfree(tmp_buf2_read_blk_table);
748 kfree(tmp_buf1_read_blk_table);
749 kfree(spare_buf_bt_search_bt_in_block);
750 kfree(spare_buf_search_bt_in_block);
751 kfree(tmp_buf_search_bt_in_block);
752 kfree(flag_check_blk_table);
753 kfree(g_pBTBlocks);
754 kfree(g_pTempBuf);
755 kfree(g_pIPF);
756 for (i = CACHE_ITEM_NUM - 1; i >= 0; i--)
757 kfree(Cache.array[i].buf);
758 kfree(g_pBlockTable);
759
760 return 0;
761}
762
763static void dump_cache_l2_table(void)
764{
765 struct list_head *p;
766 struct spectra_l2_cache_list *pnd;
767 int n;
768
769 n = 0;
770 list_for_each(p, &cache_l2.table.list) {
771 pnd = list_entry(p, struct spectra_l2_cache_list, list);
772 nand_dbg_print(NAND_DBG_WARN, "dump_cache_l2_table node: %d, logical_blk_num: %d\n", n, pnd->logical_blk_num);
773/*
774 for (i = 0; i < DeviceInfo.wPagesPerBlock; i++) {
775 if (pnd->pages_array[i] != MAX_U32_VALUE)
776 nand_dbg_print(NAND_DBG_WARN, " pages_array[%d]: 0x%x\n", i, pnd->pages_array[i]);
777 }
778*/
779 n++;
780 }
781}
782
783/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
784* Function: GLOB_FTL_Init
785* Inputs: none
786* Outputs: PASS=0 / FAIL=1
787* Description: allocates the memory for cache array,
788* important data structures
789* clears the cache array
790* reads the block table from flash into array
791*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
792int GLOB_FTL_Init(void)
793{
794 int i;
795
796 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
797 __FILE__, __LINE__, __func__);
798
799 Cache.pages_per_item = 1;
800 Cache.cache_item_size = 1 * DeviceInfo.wPageDataSize;
801
802 if (allocate_memory() != PASS)
803 return FAIL;
804
805#if CMD_DMA
806#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
807 memcpy((void *)&cache_start_copy, (void *)&Cache,
808 sizeof(struct flash_cache_tag));
809 memset((void *)&int_cache, -1,
810 sizeof(struct flash_cache_delta_list_tag) *
811 (MAX_CHANS + MAX_DESCS));
812#endif
813 ftl_cmd_cnt = 0;
814#endif
815
816 if (FTL_Read_Block_Table() != PASS)
817 return FAIL;
818
819 /* Init the Level2 Cache data structure */
820 for (i = 0; i < BLK_NUM_FOR_L2_CACHE; i++)
821 cache_l2.blk_array[i] = MAX_U32_VALUE;
822 cache_l2.cur_blk_idx = 0;
823 cache_l2.cur_page_num = 0;
824 INIT_LIST_HEAD(&cache_l2.table.list);
825 cache_l2.table.logical_blk_num = MAX_U32_VALUE;
826
827 dump_cache_l2_table();
828
829 return 0;
830}
831
832
833#if CMD_DMA
834#if 0
835static void save_blk_table_changes(u16 idx)
836{
837 u8 ftl_cmd;
838 u32 *pbt = (u32 *)g_pBTStartingCopy;
839
840#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
841 u16 id;
842 u8 cache_blks;
843
844 id = idx - MAX_CHANS;
845 if (int_cache[id].item != -1) {
846 cache_blks = int_cache[id].item;
847 cache_start_copy.array[cache_blks].address =
848 int_cache[id].cache.address;
849 cache_start_copy.array[cache_blks].changed =
850 int_cache[id].cache.changed;
851 }
852#endif
853
854 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
855
856 while (ftl_cmd <= PendingCMD[idx].Tag) {
857 if (p_BTableChangesDelta->ValidFields == 0x01) {
858 g_wBlockTableOffset =
859 p_BTableChangesDelta->g_wBlockTableOffset;
860 } else if (p_BTableChangesDelta->ValidFields == 0x0C) {
861 pbt[p_BTableChangesDelta->BT_Index] =
862 p_BTableChangesDelta->BT_Entry_Value;
863 debug_boundary_error(((
864 p_BTableChangesDelta->BT_Index)),
865 DeviceInfo.wDataBlockNum, 0);
866 } else if (p_BTableChangesDelta->ValidFields == 0x03) {
867 g_wBlockTableOffset =
868 p_BTableChangesDelta->g_wBlockTableOffset;
869 g_wBlockTableIndex =
870 p_BTableChangesDelta->g_wBlockTableIndex;
871 } else if (p_BTableChangesDelta->ValidFields == 0x30) {
872 g_pWearCounterCopy[p_BTableChangesDelta->WC_Index] =
873 p_BTableChangesDelta->WC_Entry_Value;
874 } else if ((DeviceInfo.MLCDevice) &&
875 (p_BTableChangesDelta->ValidFields == 0xC0)) {
876 g_pReadCounterCopy[p_BTableChangesDelta->RC_Index] =
877 p_BTableChangesDelta->RC_Entry_Value;
878 nand_dbg_print(NAND_DBG_DEBUG,
879 "In event status setting read counter "
880 "GLOB_ftl_cmd_cnt %u Count %u Index %u\n",
881 ftl_cmd,
882 p_BTableChangesDelta->RC_Entry_Value,
883 (unsigned int)p_BTableChangesDelta->RC_Index);
884 } else {
885 nand_dbg_print(NAND_DBG_DEBUG,
886 "This should never occur \n");
887 }
888 p_BTableChangesDelta += 1;
889 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
890 }
891}
892
893static void discard_cmds(u16 n)
894{
895 u32 *pbt = (u32 *)g_pBTStartingCopy;
896 u8 ftl_cmd;
897 unsigned long k;
898#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
899 u8 cache_blks;
900 u16 id;
901#endif
902
903 if ((PendingCMD[n].CMD == WRITE_MAIN_CMD) ||
904 (PendingCMD[n].CMD == WRITE_MAIN_SPARE_CMD)) {
905 for (k = 0; k < DeviceInfo.wDataBlockNum; k++) {
906 if (PendingCMD[n].Block == (pbt[k] & (~BAD_BLOCK)))
907 MARK_BLK_AS_DISCARD(pbt[k]);
908 }
909 }
910
911 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
912 while (ftl_cmd <= PendingCMD[n].Tag) {
913 p_BTableChangesDelta += 1;
914 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
915 }
916
917#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
918 id = n - MAX_CHANS;
919
920 if (int_cache[id].item != -1) {
921 cache_blks = int_cache[id].item;
922 if (PendingCMD[n].CMD == MEMCOPY_CMD) {
923 if ((cache_start_copy.array[cache_blks].buf <=
924 PendingCMD[n].DataDestAddr) &&
925 ((cache_start_copy.array[cache_blks].buf +
926 Cache.cache_item_size) >
927 PendingCMD[n].DataDestAddr)) {
928 cache_start_copy.array[cache_blks].address =
929 NAND_CACHE_INIT_ADDR;
930 cache_start_copy.array[cache_blks].use_cnt =
931 0;
932 cache_start_copy.array[cache_blks].changed =
933 CLEAR;
934 }
935 } else {
936 cache_start_copy.array[cache_blks].address =
937 int_cache[id].cache.address;
938 cache_start_copy.array[cache_blks].changed =
939 int_cache[id].cache.changed;
940 }
941 }
942#endif
943}
944
945static void process_cmd_pass(int *first_failed_cmd, u16 idx)
946{
947 if (0 == *first_failed_cmd)
948 save_blk_table_changes(idx);
949 else
950 discard_cmds(idx);
951}
952
953static void process_cmd_fail_abort(int *first_failed_cmd,
954 u16 idx, int event)
955{
956 u32 *pbt = (u32 *)g_pBTStartingCopy;
957 u8 ftl_cmd;
958 unsigned long i;
959 int erase_fail, program_fail;
960#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
961 u8 cache_blks;
962 u16 id;
963#endif
964
965 if (0 == *first_failed_cmd)
966 *first_failed_cmd = PendingCMD[idx].SBDCmdIndex;
967
968 nand_dbg_print(NAND_DBG_DEBUG, "Uncorrectable error has occurred "
969 "while executing %u Command %u accesing Block %u\n",
970 (unsigned int)p_BTableChangesDelta->ftl_cmd_cnt,
971 PendingCMD[idx].CMD,
972 (unsigned int)PendingCMD[idx].Block);
973
974 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
975 while (ftl_cmd <= PendingCMD[idx].Tag) {
976 p_BTableChangesDelta += 1;
977 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
978 }
979
980#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
981 id = idx - MAX_CHANS;
982
983 if (int_cache[id].item != -1) {
984 cache_blks = int_cache[id].item;
985 if ((PendingCMD[idx].CMD == WRITE_MAIN_CMD)) {
986 cache_start_copy.array[cache_blks].address =
987 int_cache[id].cache.address;
988 cache_start_copy.array[cache_blks].changed = SET;
989 } else if ((PendingCMD[idx].CMD == READ_MAIN_CMD)) {
990 cache_start_copy.array[cache_blks].address =
991 NAND_CACHE_INIT_ADDR;
992 cache_start_copy.array[cache_blks].use_cnt = 0;
993 cache_start_copy.array[cache_blks].changed =
994 CLEAR;
995 } else if (PendingCMD[idx].CMD == ERASE_CMD) {
996 /* ? */
997 } else if (PendingCMD[idx].CMD == MEMCOPY_CMD) {
998 /* ? */
999 }
1000 }
1001#endif
1002
1003 erase_fail = (event == EVENT_ERASE_FAILURE) &&
1004 (PendingCMD[idx].CMD == ERASE_CMD);
1005
1006 program_fail = (event == EVENT_PROGRAM_FAILURE) &&
1007 ((PendingCMD[idx].CMD == WRITE_MAIN_CMD) ||
1008 (PendingCMD[idx].CMD == WRITE_MAIN_SPARE_CMD));
1009
1010 if (erase_fail || program_fail) {
1011 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
1012 if (PendingCMD[idx].Block ==
1013 (pbt[i] & (~BAD_BLOCK)))
1014 MARK_BLOCK_AS_BAD(pbt[i]);
1015 }
1016 }
1017}
1018
1019static void process_cmd(int *first_failed_cmd, u16 idx, int event)
1020{
1021 u8 ftl_cmd;
1022 int cmd_match = 0;
1023
1024 if (p_BTableChangesDelta->ftl_cmd_cnt == PendingCMD[idx].Tag)
1025 cmd_match = 1;
1026
1027 if (PendingCMD[idx].Status == CMD_PASS) {
1028 process_cmd_pass(first_failed_cmd, idx);
1029 } else if ((PendingCMD[idx].Status == CMD_FAIL) ||
1030 (PendingCMD[idx].Status == CMD_ABORT)) {
1031 process_cmd_fail_abort(first_failed_cmd, idx, event);
1032 } else if ((PendingCMD[idx].Status == CMD_NOT_DONE) &&
1033 PendingCMD[idx].Tag) {
1034 nand_dbg_print(NAND_DBG_DEBUG,
1035 " Command no. %hu is not executed\n",
1036 (unsigned int)PendingCMD[idx].Tag);
1037 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
1038 while (ftl_cmd <= PendingCMD[idx].Tag) {
1039 p_BTableChangesDelta += 1;
1040 ftl_cmd = p_BTableChangesDelta->ftl_cmd_cnt;
1041 }
1042 }
1043}
1044#endif
1045
1046static void process_cmd(int *first_failed_cmd, u16 idx, int event)
1047{
1048 printk(KERN_ERR "temporary workaround function. "
1049 "Should not be called! \n");
1050}
1051
1052/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1053* Function: GLOB_FTL_Event_Status
1054* Inputs: none
1055* Outputs: Event Code
1056* Description: It is called by SBD after hardware interrupt signalling
1057* completion of commands chain
1058* It does following things
1059* get event status from LLD
1060* analyze command chain status
1061* determine last command executed
1062* analyze results
1063* rebuild the block table in case of uncorrectable error
1064* return event code
1065*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1066int GLOB_FTL_Event_Status(int *first_failed_cmd)
1067{
1068 int event_code = PASS;
1069 u16 i_P;
1070
1071 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1072 __FILE__, __LINE__, __func__);
1073
1074 *first_failed_cmd = 0;
1075
1076 event_code = GLOB_LLD_Event_Status();
1077
1078 switch (event_code) {
1079 case EVENT_PASS:
1080 nand_dbg_print(NAND_DBG_DEBUG, "Handling EVENT_PASS\n");
1081 break;
1082 case EVENT_UNCORRECTABLE_DATA_ERROR:
1083 nand_dbg_print(NAND_DBG_DEBUG, "Handling Uncorrectable ECC!\n");
1084 break;
1085 case EVENT_PROGRAM_FAILURE:
1086 case EVENT_ERASE_FAILURE:
1087 nand_dbg_print(NAND_DBG_WARN, "Handling Ugly case. "
1088 "Event code: 0x%x\n", event_code);
1089 p_BTableChangesDelta =
1090 (struct BTableChangesDelta *)g_pBTDelta;
1091 for (i_P = MAX_CHANS; i_P < (ftl_cmd_cnt + MAX_CHANS);
1092 i_P++)
1093 process_cmd(first_failed_cmd, i_P, event_code);
1094 memcpy(g_pBlockTable, g_pBTStartingCopy,
1095 DeviceInfo.wDataBlockNum * sizeof(u32));
1096 memcpy(g_pWearCounter, g_pWearCounterCopy,
1097 DeviceInfo.wDataBlockNum * sizeof(u8));
1098 if (DeviceInfo.MLCDevice)
1099 memcpy(g_pReadCounter, g_pReadCounterCopy,
1100 DeviceInfo.wDataBlockNum * sizeof(u16));
1101
1102#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
1103 memcpy((void *)&Cache, (void *)&cache_start_copy,
1104 sizeof(struct flash_cache_tag));
1105 memset((void *)&int_cache, -1,
1106 sizeof(struct flash_cache_delta_list_tag) *
1107 (MAX_DESCS + MAX_CHANS));
1108#endif
1109 break;
1110 default:
1111 nand_dbg_print(NAND_DBG_WARN,
1112 "Handling unexpected event code - 0x%x\n",
1113 event_code);
1114 event_code = ERR;
1115 break;
1116 }
1117
1118 memcpy(g_pBTStartingCopy, g_pBlockTable,
1119 DeviceInfo.wDataBlockNum * sizeof(u32));
1120 memcpy(g_pWearCounterCopy, g_pWearCounter,
1121 DeviceInfo.wDataBlockNum * sizeof(u8));
1122 if (DeviceInfo.MLCDevice)
1123 memcpy(g_pReadCounterCopy, g_pReadCounter,
1124 DeviceInfo.wDataBlockNum * sizeof(u16));
1125
1126 g_pBTDelta_Free = g_pBTDelta;
1127 ftl_cmd_cnt = 0;
1128 g_pNextBlockTable = g_pBlockTableCopies;
1129 cp_back_buf_idx = 0;
1130
1131#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
1132 memcpy((void *)&cache_start_copy, (void *)&Cache,
1133 sizeof(struct flash_cache_tag));
1134 memset((void *)&int_cache, -1,
1135 sizeof(struct flash_cache_delta_list_tag) *
1136 (MAX_DESCS + MAX_CHANS));
1137#endif
1138
1139 return event_code;
1140}
1141
1142/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1143* Function: glob_ftl_execute_cmds
1144* Inputs: none
1145* Outputs: none
1146* Description: pass thru to LLD
1147***************************************************************/
1148u16 glob_ftl_execute_cmds(void)
1149{
1150 nand_dbg_print(NAND_DBG_TRACE,
1151 "glob_ftl_execute_cmds: ftl_cmd_cnt %u\n",
1152 (unsigned int)ftl_cmd_cnt);
1153 g_SBDCmdIndex = 0;
1154 return glob_lld_execute_cmds();
1155}
1156
1157#endif
1158
1159#if !CMD_DMA
1160/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1161* Function: GLOB_FTL_Read Immediate
1162* Inputs: pointer to data
1163* address of data
1164* Outputs: PASS / FAIL
1165* Description: Reads one page of data into RAM directly from flash without
1166* using or disturbing cache.It is assumed this function is called
1167* with CMD-DMA disabled.
1168*****************************************************************/
1169int GLOB_FTL_Read_Immediate(u8 *read_data, u64 addr)
1170{
1171 int wResult = FAIL;
1172 u32 Block;
1173 u16 Page;
1174 u32 phy_blk;
1175 u32 *pbt = (u32 *)g_pBlockTable;
1176
1177 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1178 __FILE__, __LINE__, __func__);
1179
1180 Block = BLK_FROM_ADDR(addr);
1181 Page = PAGE_FROM_ADDR(addr, Block);
1182
1183 if (!IS_SPARE_BLOCK(Block))
1184 return FAIL;
1185
1186 phy_blk = pbt[Block];
1187 wResult = GLOB_LLD_Read_Page_Main(read_data, phy_blk, Page, 1);
1188
1189 if (DeviceInfo.MLCDevice) {
1190 g_pReadCounter[phy_blk - DeviceInfo.wSpectraStartBlock]++;
1191 if (g_pReadCounter[phy_blk - DeviceInfo.wSpectraStartBlock]
1192 >= MAX_READ_COUNTER)
1193 FTL_Read_Disturbance(phy_blk);
1194 if (g_cBlockTableStatus != IN_PROGRESS_BLOCK_TABLE) {
1195 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
1196 FTL_Write_IN_Progress_Block_Table_Page();
1197 }
1198 }
1199
1200 return wResult;
1201}
1202#endif
1203
1204#ifdef SUPPORT_BIG_ENDIAN
1205/*********************************************************************
1206* Function: FTL_Invert_Block_Table
1207* Inputs: none
1208* Outputs: none
1209* Description: Re-format the block table in ram based on BIG_ENDIAN and
1210* LARGE_BLOCKNUM if necessary
1211**********************************************************************/
1212static void FTL_Invert_Block_Table(void)
1213{
1214 u32 i;
1215 u32 *pbt = (u32 *)g_pBlockTable;
1216
1217 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1218 __FILE__, __LINE__, __func__);
1219
1220#ifdef SUPPORT_LARGE_BLOCKNUM
1221 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
1222 pbt[i] = INVERTUINT32(pbt[i]);
1223 g_pWearCounter[i] = INVERTUINT32(g_pWearCounter[i]);
1224 }
1225#else
1226 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
1227 pbt[i] = INVERTUINT16(pbt[i]);
1228 g_pWearCounter[i] = INVERTUINT16(g_pWearCounter[i]);
1229 }
1230#endif
1231}
1232#endif
1233
1234/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1235* Function: GLOB_FTL_Flash_Init
1236* Inputs: none
1237* Outputs: PASS=0 / FAIL=0x01 (based on read ID)
1238* Description: The flash controller is initialized
1239* The flash device is reset
1240* Perform a flash READ ID command to confirm that a
1241* valid device is attached and active.
1242* The DeviceInfo structure gets filled in
1243*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1244int GLOB_FTL_Flash_Init(void)
1245{
1246 int status = FAIL;
1247
1248 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1249 __FILE__, __LINE__, __func__);
1250
1251 g_SBDCmdIndex = 0;
1252
1253 status = GLOB_LLD_Flash_Init();
1254
1255 return status;
1256}
1257
1258/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1259* Inputs: none
1260* Outputs: PASS=0 / FAIL=0x01 (based on read ID)
1261* Description: The flash controller is released
1262*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1263int GLOB_FTL_Flash_Release(void)
1264{
1265 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1266 __FILE__, __LINE__, __func__);
1267
1268 return GLOB_LLD_Flash_Release();
1269}
1270
1271
1272/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1273* Function: GLOB_FTL_Cache_Release
1274* Inputs: none
1275* Outputs: none
1276* Description: release all allocated memory in GLOB_FTL_Init
1277* (allocated in GLOB_FTL_Init)
1278*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1279void GLOB_FTL_Cache_Release(void)
1280{
1281 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1282 __FILE__, __LINE__, __func__);
1283
1284 free_memory();
1285}
1286
1287/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1288* Function: FTL_Cache_If_Hit
1289* Inputs: Page Address
1290* Outputs: Block number/UNHIT BLOCK
1291* Description: Determines if the addressed page is in cache
1292*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1293static u16 FTL_Cache_If_Hit(u64 page_addr)
1294{
1295 u16 item;
1296 u64 addr;
1297 int i;
1298
1299 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1300 __FILE__, __LINE__, __func__);
1301
1302 item = UNHIT_CACHE_ITEM;
1303 for (i = 0; i < CACHE_ITEM_NUM; i++) {
1304 addr = Cache.array[i].address;
1305 if ((page_addr >= addr) &&
1306 (page_addr < (addr + Cache.cache_item_size))) {
1307 item = i;
1308 break;
1309 }
1310 }
1311
1312 return item;
1313}
1314
1315/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1316* Function: FTL_Calculate_LRU
1317* Inputs: None
1318* Outputs: None
1319* Description: Calculate the least recently block in a cache and record its
1320* index in LRU field.
1321*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1322static void FTL_Calculate_LRU(void)
1323{
1324 u16 i, bCurrentLRU, bTempCount;
1325
1326 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1327 __FILE__, __LINE__, __func__);
1328
1329 bCurrentLRU = 0;
1330 bTempCount = MAX_WORD_VALUE;
1331
1332 for (i = 0; i < CACHE_ITEM_NUM; i++) {
1333 if (Cache.array[i].use_cnt < bTempCount) {
1334 bCurrentLRU = i;
1335 bTempCount = Cache.array[i].use_cnt;
1336 }
1337 }
1338
1339 Cache.LRU = bCurrentLRU;
1340}
1341
1342/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1343* Function: FTL_Cache_Read_Page
1344* Inputs: pointer to read buffer, logical address and cache item number
1345* Outputs: None
1346* Description: Read the page from the cached block addressed by blocknumber
1347*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1348static void FTL_Cache_Read_Page(u8 *data_buf, u64 logic_addr, u16 cache_item)
1349{
1350 u8 *start_addr;
1351
1352 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1353 __FILE__, __LINE__, __func__);
1354
1355 start_addr = Cache.array[cache_item].buf;
1356 start_addr += (u32)(((logic_addr - Cache.array[cache_item].address) >>
1357 DeviceInfo.nBitsInPageDataSize) * DeviceInfo.wPageDataSize);
1358
1359#if CMD_DMA
1360 GLOB_LLD_MemCopy_CMD(data_buf, start_addr,
1361 DeviceInfo.wPageDataSize, 0);
1362 ftl_cmd_cnt++;
1363#else
1364 memcpy(data_buf, start_addr, DeviceInfo.wPageDataSize);
1365#endif
1366
1367 if (Cache.array[cache_item].use_cnt < MAX_WORD_VALUE)
1368 Cache.array[cache_item].use_cnt++;
1369}
1370
1371/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1372* Function: FTL_Cache_Read_All
1373* Inputs: pointer to read buffer,block address
1374* Outputs: PASS=0 / FAIL =1
1375* Description: It reads pages in cache
1376*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1377static int FTL_Cache_Read_All(u8 *pData, u64 phy_addr)
1378{
1379 int wResult = PASS;
1380 u32 Block;
1381 u32 lba;
1382 u16 Page;
1383 u16 PageCount;
1384 u32 *pbt = (u32 *)g_pBlockTable;
1385 u32 i;
1386
1387 Block = BLK_FROM_ADDR(phy_addr);
1388 Page = PAGE_FROM_ADDR(phy_addr, Block);
1389 PageCount = Cache.pages_per_item;
1390
1391 nand_dbg_print(NAND_DBG_DEBUG,
1392 "%s, Line %d, Function: %s, Block: 0x%x\n",
1393 __FILE__, __LINE__, __func__, Block);
1394
1395 lba = 0xffffffff;
1396 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
1397 if ((pbt[i] & (~BAD_BLOCK)) == Block) {
1398 lba = i;
1399 if (IS_SPARE_BLOCK(i) || IS_BAD_BLOCK(i) ||
1400 IS_DISCARDED_BLOCK(i)) {
1401 /* Add by yunpeng -2008.12.3 */
1402#if CMD_DMA
1403 GLOB_LLD_MemCopy_CMD(pData, g_temp_buf,
1404 PageCount * DeviceInfo.wPageDataSize, 0);
1405 ftl_cmd_cnt++;
1406#else
1407 memset(pData, 0xFF,
1408 PageCount * DeviceInfo.wPageDataSize);
1409#endif
1410 return wResult;
1411 } else {
1412 continue; /* break ?? */
1413 }
1414 }
1415 }
1416
1417 if (0xffffffff == lba)
1418 printk(KERN_ERR "FTL_Cache_Read_All: Block is not found in BT\n");
1419
1420#if CMD_DMA
1421 wResult = GLOB_LLD_Read_Page_Main_cdma(pData, Block, Page,
1422 PageCount, LLD_CMD_FLAG_MODE_CDMA);
1423 if (DeviceInfo.MLCDevice) {
1424 g_pReadCounter[Block - DeviceInfo.wSpectraStartBlock]++;
1425 nand_dbg_print(NAND_DBG_DEBUG,
1426 "Read Counter modified in ftl_cmd_cnt %u"
1427 " Block %u Counter%u\n",
1428 ftl_cmd_cnt, (unsigned int)Block,
1429 g_pReadCounter[Block -
1430 DeviceInfo.wSpectraStartBlock]);
1431
1432 p_BTableChangesDelta =
1433 (struct BTableChangesDelta *)g_pBTDelta_Free;
1434 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
1435 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
1436 p_BTableChangesDelta->RC_Index =
1437 Block - DeviceInfo.wSpectraStartBlock;
1438 p_BTableChangesDelta->RC_Entry_Value =
1439 g_pReadCounter[Block - DeviceInfo.wSpectraStartBlock];
1440 p_BTableChangesDelta->ValidFields = 0xC0;
1441
1442 ftl_cmd_cnt++;
1443
1444 if (g_pReadCounter[Block - DeviceInfo.wSpectraStartBlock] >=
1445 MAX_READ_COUNTER)
1446 FTL_Read_Disturbance(Block);
1447 if (g_cBlockTableStatus != IN_PROGRESS_BLOCK_TABLE) {
1448 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
1449 FTL_Write_IN_Progress_Block_Table_Page();
1450 }
1451 } else {
1452 ftl_cmd_cnt++;
1453 }
1454#else
1455 wResult = GLOB_LLD_Read_Page_Main(pData, Block, Page, PageCount);
1456 if (wResult == FAIL)
1457 return wResult;
1458
1459 if (DeviceInfo.MLCDevice) {
1460 g_pReadCounter[Block - DeviceInfo.wSpectraStartBlock]++;
1461 if (g_pReadCounter[Block - DeviceInfo.wSpectraStartBlock] >=
1462 MAX_READ_COUNTER)
1463 FTL_Read_Disturbance(Block);
1464 if (g_cBlockTableStatus != IN_PROGRESS_BLOCK_TABLE) {
1465 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
1466 FTL_Write_IN_Progress_Block_Table_Page();
1467 }
1468 }
1469#endif
1470 return wResult;
1471}
1472
1473/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1474* Function: FTL_Cache_Write_All
1475* Inputs: pointer to cache in sys memory
1476* address of free block in flash
1477* Outputs: PASS=0 / FAIL=1
1478* Description: writes all the pages of the block in cache to flash
1479*
1480* NOTE:need to make sure this works ok when cache is limited
1481* to a partial block. This is where copy-back would be
1482* activated. This would require knowing which pages in the
1483* cached block are clean/dirty.Right now we only know if
1484* the whole block is clean/dirty.
1485*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1486static int FTL_Cache_Write_All(u8 *pData, u64 blk_addr)
1487{
1488 u16 wResult = PASS;
1489 u32 Block;
1490 u16 Page;
1491 u16 PageCount;
1492
1493 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1494 __FILE__, __LINE__, __func__);
1495
1496 nand_dbg_print(NAND_DBG_DEBUG, "This block %d going to be written "
1497 "on %d\n", cache_block_to_write,
1498 (u32)(blk_addr >> DeviceInfo.nBitsInBlockDataSize));
1499
1500 Block = BLK_FROM_ADDR(blk_addr);
1501 Page = PAGE_FROM_ADDR(blk_addr, Block);
1502 PageCount = Cache.pages_per_item;
1503
1504#if CMD_DMA
1505 if (FAIL == GLOB_LLD_Write_Page_Main_cdma(pData,
1506 Block, Page, PageCount)) {
1507 nand_dbg_print(NAND_DBG_WARN,
1508 "NAND Program fail in %s, Line %d, "
1509 "Function: %s, new Bad Block %d generated! "
1510 "Need Bad Block replacing.\n",
1511 __FILE__, __LINE__, __func__, Block);
1512 wResult = FAIL;
1513 }
1514 ftl_cmd_cnt++;
1515#else
1516 if (FAIL == GLOB_LLD_Write_Page_Main(pData, Block, Page, PageCount)) {
1517 nand_dbg_print(NAND_DBG_WARN, "NAND Program fail in %s,"
1518 " Line %d, Function %s, new Bad Block %d generated!"
1519 "Need Bad Block replacing.\n",
1520 __FILE__, __LINE__, __func__, Block);
1521 wResult = FAIL;
1522 }
1523#endif
1524 return wResult;
1525}
1526
1527/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1528* Function: FTL_Copy_Block
1529* Inputs: source block address
1530* Destination block address
1531* Outputs: PASS=0 / FAIL=1
1532* Description: used only for static wear leveling to move the block
1533* containing static data to new blocks(more worn)
1534*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1535int FTL_Copy_Block(u64 old_blk_addr, u64 blk_addr)
1536{
1537 int i, r1, r2, wResult = PASS;
1538
1539 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1540 __FILE__, __LINE__, __func__);
1541
1542 for (i = 0; i < DeviceInfo.wPagesPerBlock; i += Cache.pages_per_item) {
1543 r1 = FTL_Cache_Read_All(g_pTempBuf, old_blk_addr +
1544 i * DeviceInfo.wPageDataSize);
1545 r2 = FTL_Cache_Write_All(g_pTempBuf, blk_addr +
1546 i * DeviceInfo.wPageDataSize);
1547 if ((ERR == r1) || (FAIL == r2)) {
1548 wResult = FAIL;
1549 break;
1550 }
1551 }
1552
1553 return wResult;
1554}
1555
1556/* Search the block table to find out the least wear block and then return it */
1557static u32 find_least_worn_blk_for_l2_cache(void)
1558{
1559 int i;
1560 u32 *pbt = (u32 *)g_pBlockTable;
1561 u8 least_wear_cnt = MAX_BYTE_VALUE;
1562 u32 least_wear_blk_idx = MAX_U32_VALUE;
1563 u32 phy_idx;
1564
1565 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
1566 if (IS_SPARE_BLOCK(i)) {
1567 phy_idx = (u32)((~BAD_BLOCK) & pbt[i]);
1568 if (phy_idx > DeviceInfo.wSpectraEndBlock)
1569 printk(KERN_ERR "find_least_worn_blk_for_l2_cache: "
1570 "Too big phy block num (%d)\n", phy_idx);
1571 if (g_pWearCounter[phy_idx -DeviceInfo.wSpectraStartBlock] < least_wear_cnt) {
1572 least_wear_cnt = g_pWearCounter[phy_idx - DeviceInfo.wSpectraStartBlock];
1573 least_wear_blk_idx = i;
1574 }
1575 }
1576 }
1577
1578 nand_dbg_print(NAND_DBG_WARN,
1579 "find_least_worn_blk_for_l2_cache: "
1580 "find block %d with least worn counter (%d)\n",
1581 least_wear_blk_idx, least_wear_cnt);
1582
1583 return least_wear_blk_idx;
1584}
1585
1586
1587
1588/* Get blocks for Level2 Cache */
1589static int get_l2_cache_blks(void)
1590{
1591 int n;
1592 u32 blk;
1593 u32 *pbt = (u32 *)g_pBlockTable;
1594
1595 for (n = 0; n < BLK_NUM_FOR_L2_CACHE; n++) {
1596 blk = find_least_worn_blk_for_l2_cache();
1597 if (blk >= DeviceInfo.wDataBlockNum) {
1598 nand_dbg_print(NAND_DBG_WARN,
1599 "find_least_worn_blk_for_l2_cache: "
1600 "No enough free NAND blocks (n: %d) for L2 Cache!\n", n);
1601 return FAIL;
1602 }
1603 /* Tag the free block as discard in block table */
1604 pbt[blk] = (pbt[blk] & (~BAD_BLOCK)) | DISCARD_BLOCK;
1605 /* Add the free block to the L2 Cache block array */
1606 cache_l2.blk_array[n] = pbt[blk] & (~BAD_BLOCK);
1607 }
1608
1609 return PASS;
1610}
1611
1612static int erase_l2_cache_blocks(void)
1613{
1614 int i, ret = PASS;
1615 u32 pblk, lblk = BAD_BLOCK;
1616 u64 addr;
1617 u32 *pbt = (u32 *)g_pBlockTable;
1618
1619 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1620 __FILE__, __LINE__, __func__);
1621
1622 for (i = 0; i < BLK_NUM_FOR_L2_CACHE; i++) {
1623 pblk = cache_l2.blk_array[i];
1624
1625 /* If the L2 cache block is invalid, then just skip it */
1626 if (MAX_U32_VALUE == pblk)
1627 continue;
1628
1629 BUG_ON(pblk > DeviceInfo.wSpectraEndBlock);
1630
1631 addr = (u64)pblk << DeviceInfo.nBitsInBlockDataSize;
1632 if (PASS == GLOB_FTL_Block_Erase(addr)) {
1633 /* Get logical block number of the erased block */
1634 lblk = FTL_Get_Block_Index(pblk);
1635 BUG_ON(BAD_BLOCK == lblk);
1636 /* Tag it as free in the block table */
1637 pbt[lblk] &= (u32)(~DISCARD_BLOCK);
1638 pbt[lblk] |= (u32)(SPARE_BLOCK);
1639 } else {
1640 MARK_BLOCK_AS_BAD(pbt[lblk]);
1641 ret = ERR;
1642 }
1643 }
1644
1645 return ret;
1646}
1647
1648/*
1649 * Merge the valid data page in the L2 cache blocks into NAND.
1650*/
1651static int flush_l2_cache(void)
1652{
1653 struct list_head *p;
1654 struct spectra_l2_cache_list *pnd, *tmp_pnd;
1655 u32 *pbt = (u32 *)g_pBlockTable;
1656 u32 phy_blk, l2_blk;
1657 u64 addr;
1658 u16 l2_page;
1659 int i, ret = PASS;
1660
1661 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1662 __FILE__, __LINE__, __func__);
1663
1664 if (list_empty(&cache_l2.table.list)) /* No data to flush */
1665 return ret;
1666
1667 //dump_cache_l2_table();
1668
1669 if (IN_PROGRESS_BLOCK_TABLE != g_cBlockTableStatus) {
1670 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
1671 FTL_Write_IN_Progress_Block_Table_Page();
1672 }
1673
1674 list_for_each(p, &cache_l2.table.list) {
1675 pnd = list_entry(p, struct spectra_l2_cache_list, list);
1676 if (IS_SPARE_BLOCK(pnd->logical_blk_num) ||
1677 IS_BAD_BLOCK(pnd->logical_blk_num) ||
1678 IS_DISCARDED_BLOCK(pnd->logical_blk_num)) {
1679 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d\n", __FILE__, __LINE__);
1680 memset(cache_l2_blk_buf, 0xff, DeviceInfo.wPagesPerBlock * DeviceInfo.wPageDataSize);
1681 } else {
1682 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d\n", __FILE__, __LINE__);
1683 phy_blk = pbt[pnd->logical_blk_num] & (~BAD_BLOCK);
1684 ret = GLOB_LLD_Read_Page_Main(cache_l2_blk_buf,
1685 phy_blk, 0, DeviceInfo.wPagesPerBlock);
1686 if (ret == FAIL) {
1687 printk(KERN_ERR "Read NAND page fail in %s, Line %d\n", __FILE__, __LINE__);
1688 }
1689 }
1690
1691 for (i = 0; i < DeviceInfo.wPagesPerBlock; i++) {
1692 if (pnd->pages_array[i] != MAX_U32_VALUE) {
1693 l2_blk = cache_l2.blk_array[(pnd->pages_array[i] >> 16) & 0xffff];
1694 l2_page = pnd->pages_array[i] & 0xffff;
1695 ret = GLOB_LLD_Read_Page_Main(cache_l2_page_buf, l2_blk, l2_page, 1);
1696 if (ret == FAIL) {
1697 printk(KERN_ERR "Read NAND page fail in %s, Line %d\n", __FILE__, __LINE__);
1698 }
1699 memcpy(cache_l2_blk_buf + i * DeviceInfo.wPageDataSize, cache_l2_page_buf, DeviceInfo.wPageDataSize);
1700 }
1701 }
1702
1703 /* Find a free block and tag the original block as discarded */
1704 addr = (u64)pnd->logical_blk_num << DeviceInfo.nBitsInBlockDataSize;
1705 ret = FTL_Replace_Block(addr);
1706 if (ret == FAIL) {
1707 printk(KERN_ERR "FTL_Replace_Block fail in %s, Line %d\n", __FILE__, __LINE__);
1708 }
1709
1710 /* Write back the updated data into NAND */
1711 phy_blk = pbt[pnd->logical_blk_num] & (~BAD_BLOCK);
1712 if (FAIL == GLOB_LLD_Write_Page_Main(cache_l2_blk_buf, phy_blk, 0, DeviceInfo.wPagesPerBlock)) {
1713 nand_dbg_print(NAND_DBG_WARN,
1714 "Program NAND block %d fail in %s, Line %d\n",
1715 phy_blk, __FILE__, __LINE__);
1716 /* This may not be really a bad block. So just tag it as discarded. */
1717 /* Then it has a chance to be erased when garbage collection. */
1718 /* If it is really bad, then the erase will fail and it will be marked */
1719 /* as bad then. Otherwise it will be marked as free and can be used again */
1720 MARK_BLK_AS_DISCARD(pbt[pnd->logical_blk_num]);
1721 /* Find another free block and write it again */
1722 FTL_Replace_Block(addr);
1723 phy_blk = pbt[pnd->logical_blk_num] & (~BAD_BLOCK);
1724 if (FAIL == GLOB_LLD_Write_Page_Main(cache_l2_blk_buf, phy_blk, 0, DeviceInfo.wPagesPerBlock)) {
1725 printk(KERN_ERR "Failed to write back block %d when flush L2 cache."
1726 "Some data will be lost!\n", phy_blk);
1727 MARK_BLOCK_AS_BAD(pbt[pnd->logical_blk_num]);
1728 }
1729 } else {
1730 /* tag the new free block as used block */
1731 pbt[pnd->logical_blk_num] &= (~SPARE_BLOCK);
1732 }
1733 }
1734
1735 /* Destroy the L2 Cache table and free the memory of all nodes */
1736 list_for_each_entry_safe(pnd, tmp_pnd, &cache_l2.table.list, list) {
1737 list_del(&pnd->list);
1738 kfree(pnd);
1739 }
1740
1741 /* Erase discard L2 cache blocks */
1742 if (erase_l2_cache_blocks() != PASS)
1743 nand_dbg_print(NAND_DBG_WARN,
1744 " Erase L2 cache blocks error in %s, Line %d\n",
1745 __FILE__, __LINE__);
1746
1747 /* Init the Level2 Cache data structure */
1748 for (i = 0; i < BLK_NUM_FOR_L2_CACHE; i++)
1749 cache_l2.blk_array[i] = MAX_U32_VALUE;
1750 cache_l2.cur_blk_idx = 0;
1751 cache_l2.cur_page_num = 0;
1752 INIT_LIST_HEAD(&cache_l2.table.list);
1753 cache_l2.table.logical_blk_num = MAX_U32_VALUE;
1754
1755 return ret;
1756}
1757
1758/*
1759 * Write back a changed victim cache item to the Level2 Cache
1760 * and update the L2 Cache table to map the change.
1761 * If the L2 Cache is full, then start to do the L2 Cache flush.
1762*/
1763static int write_back_to_l2_cache(u8 *buf, u64 logical_addr)
1764{
1765 u32 logical_blk_num;
1766 u16 logical_page_num;
1767 struct list_head *p;
1768 struct spectra_l2_cache_list *pnd, *pnd_new;
1769 u32 node_size;
1770 int i, found;
1771
1772 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
1773 __FILE__, __LINE__, __func__);
1774
1775 /*
1776 * If Level2 Cache table is empty, then it means either:
1777 * 1. This is the first time that the function called after FTL_init
1778 * or
1779 * 2. The Level2 Cache has just been flushed
1780 *
1781 * So, 'steal' some free blocks from NAND for L2 Cache using
1782 * by just mask them as discard in the block table
1783 */
1784 if (list_empty(&cache_l2.table.list)) {
1785 BUG_ON(cache_l2.cur_blk_idx != 0);
1786 BUG_ON(cache_l2.cur_page_num!= 0);
1787 BUG_ON(cache_l2.table.logical_blk_num != MAX_U32_VALUE);
1788 if (FAIL == get_l2_cache_blks()) {
1789 GLOB_FTL_Garbage_Collection();
1790 if (FAIL == get_l2_cache_blks()) {
1791 printk(KERN_ALERT "Fail to get L2 cache blks!\n");
1792 return FAIL;
1793 }
1794 }
1795 }
1796
1797 logical_blk_num = BLK_FROM_ADDR(logical_addr);
1798 logical_page_num = PAGE_FROM_ADDR(logical_addr, logical_blk_num);
1799 BUG_ON(logical_blk_num == MAX_U32_VALUE);
1800
1801 /* Write the cache item data into the current position of L2 Cache */
1802#if CMD_DMA
1803 /*
1804 * TODO
1805 */
1806#else
1807 if (FAIL == GLOB_LLD_Write_Page_Main(buf,
1808 cache_l2.blk_array[cache_l2.cur_blk_idx],
1809 cache_l2.cur_page_num, 1)) {
1810 nand_dbg_print(NAND_DBG_WARN, "NAND Program fail in "
1811 "%s, Line %d, new Bad Block %d generated!\n",
1812 __FILE__, __LINE__,
1813 cache_l2.blk_array[cache_l2.cur_blk_idx]);
1814
1815 /* TODO: tag the current block as bad and try again */
1816
1817 return FAIL;
1818 }
1819#endif
1820
1821 /*
1822 * Update the L2 Cache table.
1823 *
1824 * First seaching in the table to see whether the logical block
1825 * has been mapped. If not, then kmalloc a new node for the
1826 * logical block, fill data, and then insert it to the list.
1827 * Otherwise, just update the mapped node directly.
1828 */
1829 found = 0;
1830 list_for_each(p, &cache_l2.table.list) {
1831 pnd = list_entry(p, struct spectra_l2_cache_list, list);
1832 if (pnd->logical_blk_num == logical_blk_num) {
1833 pnd->pages_array[logical_page_num] =
1834 (cache_l2.cur_blk_idx << 16) |
1835 cache_l2.cur_page_num;
1836 found = 1;
1837 break;
1838 }
1839 }
1840 if (!found) { /* Create new node for the logical block here */
1841
1842 /* The logical pages to physical pages map array is
1843 * located at the end of struct spectra_l2_cache_list.
1844 */
1845 node_size = sizeof(struct spectra_l2_cache_list) +
1846 sizeof(u32) * DeviceInfo.wPagesPerBlock;
1847 pnd_new = kmalloc(node_size, GFP_ATOMIC);
1848 if (!pnd_new) {
1849 printk(KERN_ERR "Failed to kmalloc in %s Line %d\n",
1850 __FILE__, __LINE__);
1851 /*
1852 * TODO: Need to flush all the L2 cache into NAND ASAP
1853 * since no memory available here
1854 */
1855 }
1856 pnd_new->logical_blk_num = logical_blk_num;
1857 for (i = 0; i < DeviceInfo.wPagesPerBlock; i++)
1858 pnd_new->pages_array[i] = MAX_U32_VALUE;
1859 pnd_new->pages_array[logical_page_num] =
1860 (cache_l2.cur_blk_idx << 16) | cache_l2.cur_page_num;
1861 list_add(&pnd_new->list, &cache_l2.table.list);
1862 }
1863
1864 /* Increasing the current position pointer of the L2 Cache */
1865 cache_l2.cur_page_num++;
1866 if (cache_l2.cur_page_num >= DeviceInfo.wPagesPerBlock) {
1867 cache_l2.cur_blk_idx++;
1868 if (cache_l2.cur_blk_idx >= BLK_NUM_FOR_L2_CACHE) {
1869 /* The L2 Cache is full. Need to flush it now */
1870 nand_dbg_print(NAND_DBG_WARN,
1871 "L2 Cache is full, will start to flush it\n");
1872 flush_l2_cache();
1873 } else {
1874 cache_l2.cur_page_num = 0;
1875 }
1876 }
1877
1878 return PASS;
1879}
1880
1881/*
1882 * Search in the Level2 Cache table to find the cache item.
1883 * If find, read the data from the NAND page of L2 Cache,
1884 * Otherwise, return FAIL.
1885 */
1886static int search_l2_cache(u8 *buf, u64 logical_addr)
1887{
1888 u32 logical_blk_num;
1889 u16 logical_page_num;
1890 struct list_head *p;
1891 struct spectra_l2_cache_list *pnd;
1892 u32 tmp = MAX_U32_VALUE;
1893 u32 phy_blk;
1894 u16 phy_page;
1895 int ret = FAIL;
1896
1897 logical_blk_num = BLK_FROM_ADDR(logical_addr);
1898 logical_page_num = PAGE_FROM_ADDR(logical_addr, logical_blk_num);
1899
1900 list_for_each(p, &cache_l2.table.list) {
1901 pnd = list_entry(p, struct spectra_l2_cache_list, list);
1902 if (pnd->logical_blk_num == logical_blk_num) {
1903 tmp = pnd->pages_array[logical_page_num];
1904 break;
1905 }
1906 }
1907
1908 if (tmp != MAX_U32_VALUE) { /* Found valid map */
1909 phy_blk = cache_l2.blk_array[(tmp >> 16) & 0xFFFF];
1910 phy_page = tmp & 0xFFFF;
1911#if CMD_DMA
1912 /* TODO */
1913#else
1914 ret = GLOB_LLD_Read_Page_Main(buf, phy_blk, phy_page, 1);
1915#endif
1916 }
1917
1918 return ret;
1919}
1920
1921/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1922* Function: FTL_Cache_Write_Page
1923* Inputs: Pointer to buffer, page address, cache block number
1924* Outputs: PASS=0 / FAIL=1
1925* Description: It writes the data in Cache Block
1926*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1927static void FTL_Cache_Write_Page(u8 *pData, u64 page_addr,
1928 u8 cache_blk, u16 flag)
1929{
1930 u8 *pDest;
1931 u64 addr;
1932
1933 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1934 __FILE__, __LINE__, __func__);
1935
1936 addr = Cache.array[cache_blk].address;
1937 pDest = Cache.array[cache_blk].buf;
1938
1939 pDest += (unsigned long)(page_addr - addr);
1940 Cache.array[cache_blk].changed = SET;
1941#if CMD_DMA
1942#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
1943 int_cache[ftl_cmd_cnt].item = cache_blk;
1944 int_cache[ftl_cmd_cnt].cache.address =
1945 Cache.array[cache_blk].address;
1946 int_cache[ftl_cmd_cnt].cache.changed =
1947 Cache.array[cache_blk].changed;
1948#endif
1949 GLOB_LLD_MemCopy_CMD(pDest, pData, DeviceInfo.wPageDataSize, flag);
1950 ftl_cmd_cnt++;
1951#else
1952 memcpy(pDest, pData, DeviceInfo.wPageDataSize);
1953#endif
1954 if (Cache.array[cache_blk].use_cnt < MAX_WORD_VALUE)
1955 Cache.array[cache_blk].use_cnt++;
1956}
1957
1958/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
1959* Function: FTL_Cache_Write
1960* Inputs: none
1961* Outputs: PASS=0 / FAIL=1
1962* Description: It writes least frequently used Cache block to flash if it
1963* has been changed
1964*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
1965static int FTL_Cache_Write(void)
1966{
1967 int i, bResult = PASS;
1968 u16 bNO, least_count = 0xFFFF;
1969
1970 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
1971 __FILE__, __LINE__, __func__);
1972
1973 FTL_Calculate_LRU();
1974
1975 bNO = Cache.LRU;
1976 nand_dbg_print(NAND_DBG_DEBUG, "FTL_Cache_Write: "
1977 "Least used cache block is %d\n", bNO);
1978
1979 if (Cache.array[bNO].changed != SET)
1980 return bResult;
1981
1982 nand_dbg_print(NAND_DBG_DEBUG, "FTL_Cache_Write: Cache"
1983 " Block %d containing logical block %d is dirty\n",
1984 bNO,
1985 (u32)(Cache.array[bNO].address >>
1986 DeviceInfo.nBitsInBlockDataSize));
1987#if CMD_DMA
1988#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
1989 int_cache[ftl_cmd_cnt].item = bNO;
1990 int_cache[ftl_cmd_cnt].cache.address =
1991 Cache.array[bNO].address;
1992 int_cache[ftl_cmd_cnt].cache.changed = CLEAR;
1993#endif
1994#endif
1995 bResult = write_back_to_l2_cache(Cache.array[bNO].buf,
1996 Cache.array[bNO].address);
1997 if (bResult != ERR)
1998 Cache.array[bNO].changed = CLEAR;
1999
2000 least_count = Cache.array[bNO].use_cnt;
2001
2002 for (i = 0; i < CACHE_ITEM_NUM; i++) {
2003 if (i == bNO)
2004 continue;
2005 if (Cache.array[i].use_cnt > 0)
2006 Cache.array[i].use_cnt -= least_count;
2007 }
2008
2009 return bResult;
2010}
2011
2012/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2013* Function: FTL_Cache_Read
2014* Inputs: Page address
2015* Outputs: PASS=0 / FAIL=1
2016* Description: It reads the block from device in Cache Block
2017* Set the LRU count to 1
2018* Mark the Cache Block as clean
2019*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2020static int FTL_Cache_Read(u64 logical_addr)
2021{
2022 u64 item_addr, phy_addr;
2023 u16 num;
2024 int ret;
2025
2026 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2027 __FILE__, __LINE__, __func__);
2028
2029 num = Cache.LRU; /* The LRU cache item will be overwritten */
2030
2031 item_addr = (u64)GLOB_u64_Div(logical_addr, Cache.cache_item_size) *
2032 Cache.cache_item_size;
2033 Cache.array[num].address = item_addr;
2034 Cache.array[num].use_cnt = 1;
2035 Cache.array[num].changed = CLEAR;
2036
2037#if CMD_DMA
2038#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
2039 int_cache[ftl_cmd_cnt].item = num;
2040 int_cache[ftl_cmd_cnt].cache.address =
2041 Cache.array[num].address;
2042 int_cache[ftl_cmd_cnt].cache.changed =
2043 Cache.array[num].changed;
2044#endif
2045#endif
2046 /*
2047 * Search in L2 Cache. If hit, fill data into L1 Cache item buffer,
2048 * Otherwise, read it from NAND
2049 */
2050 ret = search_l2_cache(Cache.array[num].buf, logical_addr);
2051 if (PASS == ret) /* Hit in L2 Cache */
2052 return ret;
2053
2054 /* Compute the physical start address of NAND device according to */
2055 /* the logical start address of the cache item (LRU cache item) */
2056 phy_addr = FTL_Get_Physical_Block_Addr(item_addr) +
2057 GLOB_u64_Remainder(item_addr, 2);
2058
2059 return FTL_Cache_Read_All(Cache.array[num].buf, phy_addr);
2060}
2061
2062/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2063* Function: FTL_Check_Block_Table
2064* Inputs: ?
2065* Outputs: PASS=0 / FAIL=1
2066* Description: It checks the correctness of each block table entry
2067*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2068static int FTL_Check_Block_Table(int wOldTable)
2069{
2070 u32 i;
2071 int wResult = PASS;
2072 u32 blk_idx;
2073 u32 *pbt = (u32 *)g_pBlockTable;
2074 u8 *pFlag = flag_check_blk_table;
2075
2076 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2077 __FILE__, __LINE__, __func__);
2078
2079 if (NULL != pFlag) {
2080 memset(pFlag, FAIL, DeviceInfo.wDataBlockNum);
2081 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
2082 blk_idx = (u32)(pbt[i] & (~BAD_BLOCK));
2083
2084 /*
2085 * 20081006/KBV - Changed to pFlag[i] reference
2086 * to avoid buffer overflow
2087 */
2088
2089 /*
2090 * 2008-10-20 Yunpeng Note: This change avoid
2091 * buffer overflow, but changed function of
2092 * the code, so it should be re-write later
2093 */
2094 if ((blk_idx > DeviceInfo.wSpectraEndBlock) ||
2095 PASS == pFlag[i]) {
2096 wResult = FAIL;
2097 break;
2098 } else {
2099 pFlag[i] = PASS;
2100 }
2101 }
2102 }
2103
2104 return wResult;
2105}
2106
2107
2108/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2109* Function: FTL_Write_Block_Table
2110* Inputs: flasg
2111* Outputs: 0=Block Table was updated. No write done. 1=Block write needs to
2112* happen. -1 Error
2113* Description: It writes the block table
2114* Block table always mapped to LBA 0 which inturn mapped
2115* to any physical block
2116*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2117static int FTL_Write_Block_Table(int wForce)
2118{
2119 u32 *pbt = (u32 *)g_pBlockTable;
2120 int wSuccess = PASS;
2121 u32 wTempBlockTableIndex;
2122 u16 bt_pages, new_bt_offset;
2123 u8 blockchangeoccured = 0;
2124
2125 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2126 __FILE__, __LINE__, __func__);
2127
2128 bt_pages = FTL_Get_Block_Table_Flash_Size_Pages();
2129
2130 if (IN_PROGRESS_BLOCK_TABLE != g_cBlockTableStatus)
2131 return 0;
2132
2133 if (PASS == wForce) {
2134 g_wBlockTableOffset =
2135 (u16)(DeviceInfo.wPagesPerBlock - bt_pages);
2136#if CMD_DMA
2137 p_BTableChangesDelta =
2138 (struct BTableChangesDelta *)g_pBTDelta_Free;
2139 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
2140
2141 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
2142 p_BTableChangesDelta->g_wBlockTableOffset =
2143 g_wBlockTableOffset;
2144 p_BTableChangesDelta->ValidFields = 0x01;
2145#endif
2146 }
2147
2148 nand_dbg_print(NAND_DBG_DEBUG,
2149 "Inside FTL_Write_Block_Table: block %d Page:%d\n",
2150 g_wBlockTableIndex, g_wBlockTableOffset);
2151
2152 do {
2153 new_bt_offset = g_wBlockTableOffset + bt_pages + 1;
2154 if ((0 == (new_bt_offset % DeviceInfo.wPagesPerBlock)) ||
2155 (new_bt_offset > DeviceInfo.wPagesPerBlock) ||
2156 (FAIL == wSuccess)) {
2157 wTempBlockTableIndex = FTL_Replace_Block_Table();
2158 if (BAD_BLOCK == wTempBlockTableIndex)
2159 return ERR;
2160 if (!blockchangeoccured) {
2161 bt_block_changed = 1;
2162 blockchangeoccured = 1;
2163 }
2164
2165 g_wBlockTableIndex = wTempBlockTableIndex;
2166 g_wBlockTableOffset = 0;
2167 pbt[BLOCK_TABLE_INDEX] = g_wBlockTableIndex;
2168#if CMD_DMA
2169 p_BTableChangesDelta =
2170 (struct BTableChangesDelta *)g_pBTDelta_Free;
2171 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
2172
2173 p_BTableChangesDelta->ftl_cmd_cnt =
2174 ftl_cmd_cnt;
2175 p_BTableChangesDelta->g_wBlockTableOffset =
2176 g_wBlockTableOffset;
2177 p_BTableChangesDelta->g_wBlockTableIndex =
2178 g_wBlockTableIndex;
2179 p_BTableChangesDelta->ValidFields = 0x03;
2180
2181 p_BTableChangesDelta =
2182 (struct BTableChangesDelta *)g_pBTDelta_Free;
2183 g_pBTDelta_Free +=
2184 sizeof(struct BTableChangesDelta);
2185
2186 p_BTableChangesDelta->ftl_cmd_cnt =
2187 ftl_cmd_cnt;
2188 p_BTableChangesDelta->BT_Index =
2189 BLOCK_TABLE_INDEX;
2190 p_BTableChangesDelta->BT_Entry_Value =
2191 pbt[BLOCK_TABLE_INDEX];
2192 p_BTableChangesDelta->ValidFields = 0x0C;
2193#endif
2194 }
2195
2196 wSuccess = FTL_Write_Block_Table_Data();
2197 if (FAIL == wSuccess)
2198 MARK_BLOCK_AS_BAD(pbt[BLOCK_TABLE_INDEX]);
2199 } while (FAIL == wSuccess);
2200
2201 g_cBlockTableStatus = CURRENT_BLOCK_TABLE;
2202
2203 return 1;
2204}
2205
2206static int force_format_nand(void)
2207{
2208 u32 i;
2209
2210 /* Force erase the whole unprotected physical partiton of NAND */
2211 printk(KERN_ALERT "Start to force erase whole NAND device ...\n");
2212 printk(KERN_ALERT "From phyical block %d to %d\n",
2213 DeviceInfo.wSpectraStartBlock, DeviceInfo.wSpectraEndBlock);
2214 for (i = DeviceInfo.wSpectraStartBlock; i <= DeviceInfo.wSpectraEndBlock; i++) {
2215 if (GLOB_LLD_Erase_Block(i))
2216 printk(KERN_ERR "Failed to force erase NAND block %d\n", i);
2217 }
2218 printk(KERN_ALERT "Force Erase ends. Please reboot the system ...\n");
2219 while(1);
2220
2221 return PASS;
2222}
2223
2224int GLOB_FTL_Flash_Format(void)
2225{
2226 //return FTL_Format_Flash(1);
2227 return force_format_nand();
2228
2229}
2230
2231/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2232* Function: FTL_Search_Block_Table_IN_Block
2233* Inputs: Block Number
2234* Pointer to page
2235* Outputs: PASS / FAIL
2236* Page contatining the block table
2237* Description: It searches the block table in the block
2238* passed as an argument.
2239*
2240*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2241static int FTL_Search_Block_Table_IN_Block(u32 BT_Block,
2242 u8 BT_Tag, u16 *Page)
2243{
2244 u16 i, j, k;
2245 u16 Result = PASS;
2246 u16 Last_IPF = 0;
2247 u8 BT_Found = 0;
2248 u8 *tagarray;
2249 u8 *tempbuf = tmp_buf_search_bt_in_block;
2250 u8 *pSpareBuf = spare_buf_search_bt_in_block;
2251 u8 *pSpareBufBTLastPage = spare_buf_bt_search_bt_in_block;
2252 u8 bt_flag_last_page = 0xFF;
2253 u8 search_in_previous_pages = 0;
2254 u16 bt_pages;
2255
2256 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
2257 __FILE__, __LINE__, __func__);
2258
2259 nand_dbg_print(NAND_DBG_DEBUG,
2260 "Searching block table in %u block\n",
2261 (unsigned int)BT_Block);
2262
2263 bt_pages = FTL_Get_Block_Table_Flash_Size_Pages();
2264
2265 for (i = bt_pages; i < DeviceInfo.wPagesPerBlock;
2266 i += (bt_pages + 1)) {
2267 nand_dbg_print(NAND_DBG_DEBUG,
2268 "Searching last IPF: %d\n", i);
2269 Result = GLOB_LLD_Read_Page_Main_Polling(tempbuf,
2270 BT_Block, i, 1);
2271
2272 if (0 == memcmp(tempbuf, g_pIPF, DeviceInfo.wPageDataSize)) {
2273 if ((i + bt_pages + 1) < DeviceInfo.wPagesPerBlock) {
2274 continue;
2275 } else {
2276 search_in_previous_pages = 1;
2277 Last_IPF = i;
2278 }
2279 }
2280
2281 if (!search_in_previous_pages) {
2282 if (i != bt_pages) {
2283 i -= (bt_pages + 1);
2284 Last_IPF = i;
2285 }
2286 }
2287
2288 if (0 == Last_IPF)
2289 break;
2290
2291 if (!search_in_previous_pages) {
2292 i = i + 1;
2293 nand_dbg_print(NAND_DBG_DEBUG,
2294 "Reading the spare area of Block %u Page %u",
2295 (unsigned int)BT_Block, i);
2296 Result = GLOB_LLD_Read_Page_Spare(pSpareBuf,
2297 BT_Block, i, 1);
2298 nand_dbg_print(NAND_DBG_DEBUG,
2299 "Reading the spare area of Block %u Page %u",
2300 (unsigned int)BT_Block, i + bt_pages - 1);
2301 Result = GLOB_LLD_Read_Page_Spare(pSpareBufBTLastPage,
2302 BT_Block, i + bt_pages - 1, 1);
2303
2304 k = 0;
2305 j = FTL_Extract_Block_Table_Tag(pSpareBuf, &tagarray);
2306 if (j) {
2307 for (; k < j; k++) {
2308 if (tagarray[k] == BT_Tag)
2309 break;
2310 }
2311 }
2312
2313 if (k < j)
2314 bt_flag = tagarray[k];
2315 else
2316 Result = FAIL;
2317
2318 if (Result == PASS) {
2319 k = 0;
2320 j = FTL_Extract_Block_Table_Tag(
2321 pSpareBufBTLastPage, &tagarray);
2322 if (j) {
2323 for (; k < j; k++) {
2324 if (tagarray[k] == BT_Tag)
2325 break;
2326 }
2327 }
2328
2329 if (k < j)
2330 bt_flag_last_page = tagarray[k];
2331 else
2332 Result = FAIL;
2333
2334 if (Result == PASS) {
2335 if (bt_flag == bt_flag_last_page) {
2336 nand_dbg_print(NAND_DBG_DEBUG,
2337 "Block table is found"
2338 " in page after IPF "
2339 "at block %d "
2340 "page %d\n",
2341 (int)BT_Block, i);
2342 BT_Found = 1;
2343 *Page = i;
2344 g_cBlockTableStatus =
2345 CURRENT_BLOCK_TABLE;
2346 break;
2347 } else {
2348 Result = FAIL;
2349 }
2350 }
2351 }
2352 }
2353
2354 if (search_in_previous_pages)
2355 i = i - bt_pages;
2356 else
2357 i = i - (bt_pages + 1);
2358
2359 Result = PASS;
2360
2361 nand_dbg_print(NAND_DBG_DEBUG,
2362 "Reading the spare area of Block %d Page %d",
2363 (int)BT_Block, i);
2364
2365 Result = GLOB_LLD_Read_Page_Spare(pSpareBuf, BT_Block, i, 1);
2366 nand_dbg_print(NAND_DBG_DEBUG,
2367 "Reading the spare area of Block %u Page %u",
2368 (unsigned int)BT_Block, i + bt_pages - 1);
2369
2370 Result = GLOB_LLD_Read_Page_Spare(pSpareBufBTLastPage,
2371 BT_Block, i + bt_pages - 1, 1);
2372
2373 k = 0;
2374 j = FTL_Extract_Block_Table_Tag(pSpareBuf, &tagarray);
2375 if (j) {
2376 for (; k < j; k++) {
2377 if (tagarray[k] == BT_Tag)
2378 break;
2379 }
2380 }
2381
2382 if (k < j)
2383 bt_flag = tagarray[k];
2384 else
2385 Result = FAIL;
2386
2387 if (Result == PASS) {
2388 k = 0;
2389 j = FTL_Extract_Block_Table_Tag(pSpareBufBTLastPage,
2390 &tagarray);
2391 if (j) {
2392 for (; k < j; k++) {
2393 if (tagarray[k] == BT_Tag)
2394 break;
2395 }
2396 }
2397
2398 if (k < j) {
2399 bt_flag_last_page = tagarray[k];
2400 } else {
2401 Result = FAIL;
2402 break;
2403 }
2404
2405 if (Result == PASS) {
2406 if (bt_flag == bt_flag_last_page) {
2407 nand_dbg_print(NAND_DBG_DEBUG,
2408 "Block table is found "
2409 "in page prior to IPF "
2410 "at block %u page %d\n",
2411 (unsigned int)BT_Block, i);
2412 BT_Found = 1;
2413 *Page = i;
2414 g_cBlockTableStatus =
2415 IN_PROGRESS_BLOCK_TABLE;
2416 break;
2417 } else {
2418 Result = FAIL;
2419 break;
2420 }
2421 }
2422 }
2423 }
2424
2425 if (Result == FAIL) {
2426 if ((Last_IPF > bt_pages) && (i < Last_IPF) && (!BT_Found)) {
2427 BT_Found = 1;
2428 *Page = i - (bt_pages + 1);
2429 }
2430 if ((Last_IPF == bt_pages) && (i < Last_IPF) && (!BT_Found))
2431 goto func_return;
2432 }
2433
2434 if (Last_IPF == 0) {
2435 i = 0;
2436 Result = PASS;
2437 nand_dbg_print(NAND_DBG_DEBUG, "Reading the spare area of "
2438 "Block %u Page %u", (unsigned int)BT_Block, i);
2439
2440 Result = GLOB_LLD_Read_Page_Spare(pSpareBuf, BT_Block, i, 1);
2441 nand_dbg_print(NAND_DBG_DEBUG,
2442 "Reading the spare area of Block %u Page %u",
2443 (unsigned int)BT_Block, i + bt_pages - 1);
2444 Result = GLOB_LLD_Read_Page_Spare(pSpareBufBTLastPage,
2445 BT_Block, i + bt_pages - 1, 1);
2446
2447 k = 0;
2448 j = FTL_Extract_Block_Table_Tag(pSpareBuf, &tagarray);
2449 if (j) {
2450 for (; k < j; k++) {
2451 if (tagarray[k] == BT_Tag)
2452 break;
2453 }
2454 }
2455
2456 if (k < j)
2457 bt_flag = tagarray[k];
2458 else
2459 Result = FAIL;
2460
2461 if (Result == PASS) {
2462 k = 0;
2463 j = FTL_Extract_Block_Table_Tag(pSpareBufBTLastPage,
2464 &tagarray);
2465 if (j) {
2466 for (; k < j; k++) {
2467 if (tagarray[k] == BT_Tag)
2468 break;
2469 }
2470 }
2471
2472 if (k < j)
2473 bt_flag_last_page = tagarray[k];
2474 else
2475 Result = FAIL;
2476
2477 if (Result == PASS) {
2478 if (bt_flag == bt_flag_last_page) {
2479 nand_dbg_print(NAND_DBG_DEBUG,
2480 "Block table is found "
2481 "in page after IPF at "
2482 "block %u page %u\n",
2483 (unsigned int)BT_Block,
2484 (unsigned int)i);
2485 BT_Found = 1;
2486 *Page = i;
2487 g_cBlockTableStatus =
2488 CURRENT_BLOCK_TABLE;
2489 goto func_return;
2490 } else {
2491 Result = FAIL;
2492 }
2493 }
2494 }
2495
2496 if (Result == FAIL)
2497 goto func_return;
2498 }
2499func_return:
2500 return Result;
2501}
2502
2503u8 *get_blk_table_start_addr(void)
2504{
2505 return g_pBlockTable;
2506}
2507
2508unsigned long get_blk_table_len(void)
2509{
2510 return DeviceInfo.wDataBlockNum * sizeof(u32);
2511}
2512
2513u8 *get_wear_leveling_table_start_addr(void)
2514{
2515 return g_pWearCounter;
2516}
2517
2518unsigned long get_wear_leveling_table_len(void)
2519{
2520 return DeviceInfo.wDataBlockNum * sizeof(u8);
2521}
2522
2523/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2524* Function: FTL_Read_Block_Table
2525* Inputs: none
2526* Outputs: PASS / FAIL
2527* Description: read the flash spare area and find a block containing the
2528* most recent block table(having largest block_table_counter).
2529* Find the last written Block table in this block.
2530* Check the correctness of Block Table
2531* If CDMA is enabled, this function is called in
2532* polling mode.
2533* We don't need to store changes in Block table in this
2534* function as it is called only at initialization
2535*
2536* Note: Currently this function is called at initialization
2537* before any read/erase/write command issued to flash so,
2538* there is no need to wait for CDMA list to complete as of now
2539*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2540static int FTL_Read_Block_Table(void)
2541{
2542 u16 i = 0;
2543 int k, j;
2544 u8 *tempBuf, *tagarray;
2545 int wResult = FAIL;
2546 int status = FAIL;
2547 u8 block_table_found = 0;
2548 int search_result;
2549 u32 Block;
2550 u16 Page = 0;
2551 u16 PageCount;
2552 u16 bt_pages;
2553 int wBytesCopied = 0, tempvar;
2554
2555 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2556 __FILE__, __LINE__, __func__);
2557
2558 tempBuf = tmp_buf1_read_blk_table;
2559 bt_pages = FTL_Get_Block_Table_Flash_Size_Pages();
2560
2561 for (j = DeviceInfo.wSpectraStartBlock;
2562 j <= (int)DeviceInfo.wSpectraEndBlock;
2563 j++) {
2564 status = GLOB_LLD_Read_Page_Spare(tempBuf, j, 0, 1);
2565 k = 0;
2566 i = FTL_Extract_Block_Table_Tag(tempBuf, &tagarray);
2567 if (i) {
2568 status = GLOB_LLD_Read_Page_Main_Polling(tempBuf,
2569 j, 0, 1);
2570 for (; k < i; k++) {
2571 if (tagarray[k] == tempBuf[3])
2572 break;
2573 }
2574 }
2575
2576 if (k < i)
2577 k = tagarray[k];
2578 else
2579 continue;
2580
2581 nand_dbg_print(NAND_DBG_DEBUG,
2582 "Block table is contained in Block %d %d\n",
2583 (unsigned int)j, (unsigned int)k);
2584
2585 if (g_pBTBlocks[k-FIRST_BT_ID] == BTBLOCK_INVAL) {
2586 g_pBTBlocks[k-FIRST_BT_ID] = j;
2587 block_table_found = 1;
2588 } else {
2589 printk(KERN_ERR "FTL_Read_Block_Table -"
2590 "This should never happens. "
2591 "Two block table have same counter %u!\n", k);
2592 }
2593 }
2594
2595 if (block_table_found) {
2596 if (g_pBTBlocks[FIRST_BT_ID - FIRST_BT_ID] != BTBLOCK_INVAL &&
2597 g_pBTBlocks[LAST_BT_ID - FIRST_BT_ID] != BTBLOCK_INVAL) {
2598 j = LAST_BT_ID;
2599 while ((j > FIRST_BT_ID) &&
2600 (g_pBTBlocks[j - FIRST_BT_ID] != BTBLOCK_INVAL))
2601 j--;
2602 if (j == FIRST_BT_ID) {
2603 j = LAST_BT_ID;
2604 last_erased = LAST_BT_ID;
2605 } else {
2606 last_erased = (u8)j + 1;
2607 while ((j > FIRST_BT_ID) && (BTBLOCK_INVAL ==
2608 g_pBTBlocks[j - FIRST_BT_ID]))
2609 j--;
2610 }
2611 } else {
2612 j = FIRST_BT_ID;
2613 while (g_pBTBlocks[j - FIRST_BT_ID] == BTBLOCK_INVAL)
2614 j++;
2615 last_erased = (u8)j;
2616 while ((j < LAST_BT_ID) && (BTBLOCK_INVAL !=
2617 g_pBTBlocks[j - FIRST_BT_ID]))
2618 j++;
2619 if (g_pBTBlocks[j-FIRST_BT_ID] == BTBLOCK_INVAL)
2620 j--;
2621 }
2622
2623 if (last_erased > j)
2624 j += (1 + LAST_BT_ID - FIRST_BT_ID);
2625
2626 for (; (j >= last_erased) && (FAIL == wResult); j--) {
2627 i = (j - FIRST_BT_ID) %
2628 (1 + LAST_BT_ID - FIRST_BT_ID);
2629 search_result =
2630 FTL_Search_Block_Table_IN_Block(g_pBTBlocks[i],
2631 i + FIRST_BT_ID, &Page);
2632 if (g_cBlockTableStatus == IN_PROGRESS_BLOCK_TABLE)
2633 block_table_found = 0;
2634
2635 while ((search_result == PASS) && (FAIL == wResult)) {
2636 nand_dbg_print(NAND_DBG_DEBUG,
2637 "FTL_Read_Block_Table:"
2638 "Block: %u Page: %u "
2639 "contains block table\n",
2640 (unsigned int)g_pBTBlocks[i],
2641 (unsigned int)Page);
2642
2643 tempBuf = tmp_buf2_read_blk_table;
2644
2645 for (k = 0; k < bt_pages; k++) {
2646 Block = g_pBTBlocks[i];
2647 PageCount = 1;
2648
2649 status =
2650 GLOB_LLD_Read_Page_Main_Polling(
2651 tempBuf, Block, Page, PageCount);
2652
2653 tempvar = k ? 0 : 4;
2654
2655 wBytesCopied +=
2656 FTL_Copy_Block_Table_From_Flash(
2657 tempBuf + tempvar,
2658 DeviceInfo.wPageDataSize - tempvar,
2659 wBytesCopied);
2660
2661 Page++;
2662 }
2663
2664 wResult = FTL_Check_Block_Table(FAIL);
2665 if (FAIL == wResult) {
2666 block_table_found = 0;
2667 if (Page > bt_pages)
2668 Page -= ((bt_pages<<1) + 1);
2669 else
2670 search_result = FAIL;
2671 }
2672 }
2673 }
2674 }
2675
2676 if (PASS == wResult) {
2677 if (!block_table_found)
2678 FTL_Execute_SPL_Recovery();
2679
2680 if (g_cBlockTableStatus == IN_PROGRESS_BLOCK_TABLE)
2681 g_wBlockTableOffset = (u16)Page + 1;
2682 else
2683 g_wBlockTableOffset = (u16)Page - bt_pages;
2684
2685 g_wBlockTableIndex = (u32)g_pBTBlocks[i];
2686
2687#if CMD_DMA
2688 if (DeviceInfo.MLCDevice)
2689 memcpy(g_pBTStartingCopy, g_pBlockTable,
2690 DeviceInfo.wDataBlockNum * sizeof(u32)
2691 + DeviceInfo.wDataBlockNum * sizeof(u8)
2692 + DeviceInfo.wDataBlockNum * sizeof(u16));
2693 else
2694 memcpy(g_pBTStartingCopy, g_pBlockTable,
2695 DeviceInfo.wDataBlockNum * sizeof(u32)
2696 + DeviceInfo.wDataBlockNum * sizeof(u8));
2697#endif
2698 }
2699
2700 if (FAIL == wResult)
2701 printk(KERN_ERR "Yunpeng - "
2702 "Can not find valid spectra block table!\n");
2703
2704#if AUTO_FORMAT_FLASH
2705 if (FAIL == wResult) {
2706 nand_dbg_print(NAND_DBG_DEBUG, "doing auto-format\n");
2707 wResult = FTL_Format_Flash(0);
2708 }
2709#endif
2710
2711 return wResult;
2712}
2713
2714/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2715* Function: FTL_Get_Page_Num
2716* Inputs: Size in bytes
2717* Outputs: Size in pages
2718* Description: It calculates the pages required for the length passed
2719*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2720static u32 FTL_Get_Page_Num(u64 length)
2721{
2722 return (u32)((length >> DeviceInfo.nBitsInPageDataSize) +
2723 (GLOB_u64_Remainder(length , 1) > 0 ? 1 : 0));
2724}
2725
2726/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2727* Function: FTL_Get_Physical_Block_Addr
2728* Inputs: Block Address (byte format)
2729* Outputs: Physical address of the block.
2730* Description: It translates LBA to PBA by returning address stored
2731* at the LBA location in the block table
2732*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2733static u64 FTL_Get_Physical_Block_Addr(u64 logical_addr)
2734{
2735 u32 *pbt;
2736 u64 physical_addr;
2737
2738 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2739 __FILE__, __LINE__, __func__);
2740
2741 pbt = (u32 *)g_pBlockTable;
2742 physical_addr = (u64) DeviceInfo.wBlockDataSize *
2743 (pbt[BLK_FROM_ADDR(logical_addr)] & (~BAD_BLOCK));
2744
2745 return physical_addr;
2746}
2747
2748/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2749* Function: FTL_Get_Block_Index
2750* Inputs: Physical Block no.
2751* Outputs: Logical block no. /BAD_BLOCK
2752* Description: It returns the logical block no. for the PBA passed
2753*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2754static u32 FTL_Get_Block_Index(u32 wBlockNum)
2755{
2756 u32 *pbt = (u32 *)g_pBlockTable;
2757 u32 i;
2758
2759 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2760 __FILE__, __LINE__, __func__);
2761
2762 for (i = 0; i < DeviceInfo.wDataBlockNum; i++)
2763 if (wBlockNum == (pbt[i] & (~BAD_BLOCK)))
2764 return i;
2765
2766 return BAD_BLOCK;
2767}
2768
2769/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2770* Function: GLOB_FTL_Wear_Leveling
2771* Inputs: none
2772* Outputs: PASS=0
2773* Description: This is static wear leveling (done by explicit call)
2774* do complete static wear leveling
2775* do complete garbage collection
2776*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2777int GLOB_FTL_Wear_Leveling(void)
2778{
2779 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
2780 __FILE__, __LINE__, __func__);
2781
2782 FTL_Static_Wear_Leveling();
2783 GLOB_FTL_Garbage_Collection();
2784
2785 return PASS;
2786}
2787
2788static void find_least_most_worn(u8 *chg,
2789 u32 *least_idx, u8 *least_cnt,
2790 u32 *most_idx, u8 *most_cnt)
2791{
2792 u32 *pbt = (u32 *)g_pBlockTable;
2793 u32 idx;
2794 u8 cnt;
2795 int i;
2796
2797 for (i = BLOCK_TABLE_INDEX + 1; i < DeviceInfo.wDataBlockNum; i++) {
2798 if (IS_BAD_BLOCK(i) || PASS == chg[i])
2799 continue;
2800
2801 idx = (u32) ((~BAD_BLOCK) & pbt[i]);
2802 cnt = g_pWearCounter[idx - DeviceInfo.wSpectraStartBlock];
2803
2804 if (IS_SPARE_BLOCK(i)) {
2805 if (cnt > *most_cnt) {
2806 *most_cnt = cnt;
2807 *most_idx = idx;
2808 }
2809 }
2810
2811 if (IS_DATA_BLOCK(i)) {
2812 if (cnt < *least_cnt) {
2813 *least_cnt = cnt;
2814 *least_idx = idx;
2815 }
2816 }
2817
2818 if (PASS == chg[*most_idx] || PASS == chg[*least_idx]) {
2819 debug_boundary_error(*most_idx,
2820 DeviceInfo.wDataBlockNum, 0);
2821 debug_boundary_error(*least_idx,
2822 DeviceInfo.wDataBlockNum, 0);
2823 continue;
2824 }
2825 }
2826}
2827
2828static int move_blks_for_wear_leveling(u8 *chg,
2829 u32 *least_idx, u32 *rep_blk_num, int *result)
2830{
2831 u32 *pbt = (u32 *)g_pBlockTable;
2832 u32 rep_blk;
2833 int j, ret_cp_blk, ret_erase;
2834 int ret = PASS;
2835
2836 chg[*least_idx] = PASS;
2837 debug_boundary_error(*least_idx, DeviceInfo.wDataBlockNum, 0);
2838
2839 rep_blk = FTL_Replace_MWBlock();
2840 if (rep_blk != BAD_BLOCK) {
2841 nand_dbg_print(NAND_DBG_DEBUG,
2842 "More than two spare blocks exist so do it\n");
2843 nand_dbg_print(NAND_DBG_DEBUG, "Block Replaced is %d\n",
2844 rep_blk);
2845
2846 chg[rep_blk] = PASS;
2847
2848 if (IN_PROGRESS_BLOCK_TABLE != g_cBlockTableStatus) {
2849 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
2850 FTL_Write_IN_Progress_Block_Table_Page();
2851 }
2852
2853 for (j = 0; j < RETRY_TIMES; j++) {
2854 ret_cp_blk = FTL_Copy_Block((u64)(*least_idx) *
2855 DeviceInfo.wBlockDataSize,
2856 (u64)rep_blk * DeviceInfo.wBlockDataSize);
2857 if (FAIL == ret_cp_blk) {
2858 ret_erase = GLOB_FTL_Block_Erase((u64)rep_blk
2859 * DeviceInfo.wBlockDataSize);
2860 if (FAIL == ret_erase)
2861 MARK_BLOCK_AS_BAD(pbt[rep_blk]);
2862 } else {
2863 nand_dbg_print(NAND_DBG_DEBUG,
2864 "FTL_Copy_Block == OK\n");
2865 break;
2866 }
2867 }
2868
2869 if (j < RETRY_TIMES) {
2870 u32 tmp;
2871 u32 old_idx = FTL_Get_Block_Index(*least_idx);
2872 u32 rep_idx = FTL_Get_Block_Index(rep_blk);
2873 tmp = (u32)(DISCARD_BLOCK | pbt[old_idx]);
2874 pbt[old_idx] = (u32)((~SPARE_BLOCK) &
2875 pbt[rep_idx]);
2876 pbt[rep_idx] = tmp;
2877#if CMD_DMA
2878 p_BTableChangesDelta = (struct BTableChangesDelta *)
2879 g_pBTDelta_Free;
2880 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
2881 p_BTableChangesDelta->ftl_cmd_cnt =
2882 ftl_cmd_cnt;
2883 p_BTableChangesDelta->BT_Index = old_idx;
2884 p_BTableChangesDelta->BT_Entry_Value = pbt[old_idx];
2885 p_BTableChangesDelta->ValidFields = 0x0C;
2886
2887 p_BTableChangesDelta = (struct BTableChangesDelta *)
2888 g_pBTDelta_Free;
2889 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
2890
2891 p_BTableChangesDelta->ftl_cmd_cnt =
2892 ftl_cmd_cnt;
2893 p_BTableChangesDelta->BT_Index = rep_idx;
2894 p_BTableChangesDelta->BT_Entry_Value = pbt[rep_idx];
2895 p_BTableChangesDelta->ValidFields = 0x0C;
2896#endif
2897 } else {
2898 pbt[FTL_Get_Block_Index(rep_blk)] |= BAD_BLOCK;
2899#if CMD_DMA
2900 p_BTableChangesDelta = (struct BTableChangesDelta *)
2901 g_pBTDelta_Free;
2902 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
2903
2904 p_BTableChangesDelta->ftl_cmd_cnt =
2905 ftl_cmd_cnt;
2906 p_BTableChangesDelta->BT_Index =
2907 FTL_Get_Block_Index(rep_blk);
2908 p_BTableChangesDelta->BT_Entry_Value =
2909 pbt[FTL_Get_Block_Index(rep_blk)];
2910 p_BTableChangesDelta->ValidFields = 0x0C;
2911#endif
2912 *result = FAIL;
2913 ret = FAIL;
2914 }
2915
2916 if (((*rep_blk_num)++) > WEAR_LEVELING_BLOCK_NUM)
2917 ret = FAIL;
2918 } else {
2919 printk(KERN_ERR "Less than 3 spare blocks exist so quit\n");
2920 ret = FAIL;
2921 }
2922
2923 return ret;
2924}
2925
2926/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
2927* Function: FTL_Static_Wear_Leveling
2928* Inputs: none
2929* Outputs: PASS=0 / FAIL=1
2930* Description: This is static wear leveling (done by explicit call)
2931* search for most&least used
2932* if difference < GATE:
2933* update the block table with exhange
2934* mark block table in flash as IN_PROGRESS
2935* copy flash block
2936* the caller should handle GC clean up after calling this function
2937*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
2938int FTL_Static_Wear_Leveling(void)
2939{
2940 u8 most_worn_cnt;
2941 u8 least_worn_cnt;
2942 u32 most_worn_idx;
2943 u32 least_worn_idx;
2944 int result = PASS;
2945 int go_on = PASS;
2946 u32 replaced_blks = 0;
2947 u8 *chang_flag = flags_static_wear_leveling;
2948
2949 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
2950 __FILE__, __LINE__, __func__);
2951
2952 if (!chang_flag)
2953 return FAIL;
2954
2955 memset(chang_flag, FAIL, DeviceInfo.wDataBlockNum);
2956 while (go_on == PASS) {
2957 nand_dbg_print(NAND_DBG_DEBUG,
2958 "starting static wear leveling\n");
2959 most_worn_cnt = 0;
2960 least_worn_cnt = 0xFF;
2961 least_worn_idx = BLOCK_TABLE_INDEX;
2962 most_worn_idx = BLOCK_TABLE_INDEX;
2963
2964 find_least_most_worn(chang_flag, &least_worn_idx,
2965 &least_worn_cnt, &most_worn_idx, &most_worn_cnt);
2966
2967 nand_dbg_print(NAND_DBG_DEBUG,
2968 "Used and least worn is block %u, whos count is %u\n",
2969 (unsigned int)least_worn_idx,
2970 (unsigned int)least_worn_cnt);
2971
2972 nand_dbg_print(NAND_DBG_DEBUG,
2973 "Free and most worn is block %u, whos count is %u\n",
2974 (unsigned int)most_worn_idx,
2975 (unsigned int)most_worn_cnt);
2976
2977 if ((most_worn_cnt > least_worn_cnt) &&
2978 (most_worn_cnt - least_worn_cnt > WEAR_LEVELING_GATE))
2979 go_on = move_blks_for_wear_leveling(chang_flag,
2980 &least_worn_idx, &replaced_blks, &result);
2981 else
2982 go_on = FAIL;
2983 }
2984
2985 return result;
2986}
2987
2988#if CMD_DMA
2989static int do_garbage_collection(u32 discard_cnt)
2990{
2991 u32 *pbt = (u32 *)g_pBlockTable;
2992 u32 pba;
2993 u8 bt_block_erased = 0;
2994 int i, cnt, ret = FAIL;
2995 u64 addr;
2996
2997 i = 0;
2998 while ((i < DeviceInfo.wDataBlockNum) && (discard_cnt > 0) &&
2999 ((ftl_cmd_cnt + 28) < 256)) {
3000 if (((pbt[i] & BAD_BLOCK) != BAD_BLOCK) &&
3001 (pbt[i] & DISCARD_BLOCK)) {
3002 if (IN_PROGRESS_BLOCK_TABLE != g_cBlockTableStatus) {
3003 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
3004 FTL_Write_IN_Progress_Block_Table_Page();
3005 }
3006
3007 addr = FTL_Get_Physical_Block_Addr((u64)i *
3008 DeviceInfo.wBlockDataSize);
3009 pba = BLK_FROM_ADDR(addr);
3010
3011 for (cnt = FIRST_BT_ID; cnt <= LAST_BT_ID; cnt++) {
3012 if (pba == g_pBTBlocks[cnt - FIRST_BT_ID]) {
3013 nand_dbg_print(NAND_DBG_DEBUG,
3014 "GC will erase BT block %u\n",
3015 (unsigned int)pba);
3016 discard_cnt--;
3017 i++;
3018 bt_block_erased = 1;
3019 break;
3020 }
3021 }
3022
3023 if (bt_block_erased) {
3024 bt_block_erased = 0;
3025 continue;
3026 }
3027
3028 addr = FTL_Get_Physical_Block_Addr((u64)i *
3029 DeviceInfo.wBlockDataSize);
3030
3031 if (PASS == GLOB_FTL_Block_Erase(addr)) {
3032 pbt[i] &= (u32)(~DISCARD_BLOCK);
3033 pbt[i] |= (u32)(SPARE_BLOCK);
3034 p_BTableChangesDelta =
3035 (struct BTableChangesDelta *)
3036 g_pBTDelta_Free;
3037 g_pBTDelta_Free +=
3038 sizeof(struct BTableChangesDelta);
3039 p_BTableChangesDelta->ftl_cmd_cnt =
3040 ftl_cmd_cnt - 1;
3041 p_BTableChangesDelta->BT_Index = i;
3042 p_BTableChangesDelta->BT_Entry_Value = pbt[i];
3043 p_BTableChangesDelta->ValidFields = 0x0C;
3044 discard_cnt--;
3045 ret = PASS;
3046 } else {
3047 MARK_BLOCK_AS_BAD(pbt[i]);
3048 }
3049 }
3050
3051 i++;
3052 }
3053
3054 return ret;
3055}
3056
3057#else
3058static int do_garbage_collection(u32 discard_cnt)
3059{
3060 u32 *pbt = (u32 *)g_pBlockTable;
3061 u32 pba;
3062 u8 bt_block_erased = 0;
3063 int i, cnt, ret = FAIL;
3064 u64 addr;
3065
3066 i = 0;
3067 while ((i < DeviceInfo.wDataBlockNum) && (discard_cnt > 0)) {
3068 if (((pbt[i] & BAD_BLOCK) != BAD_BLOCK) &&
3069 (pbt[i] & DISCARD_BLOCK)) {
3070 if (IN_PROGRESS_BLOCK_TABLE != g_cBlockTableStatus) {
3071 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
3072 FTL_Write_IN_Progress_Block_Table_Page();
3073 }
3074
3075 addr = FTL_Get_Physical_Block_Addr((u64)i *
3076 DeviceInfo.wBlockDataSize);
3077 pba = BLK_FROM_ADDR(addr);
3078
3079 for (cnt = FIRST_BT_ID; cnt <= LAST_BT_ID; cnt++) {
3080 if (pba == g_pBTBlocks[cnt - FIRST_BT_ID]) {
3081 nand_dbg_print(NAND_DBG_DEBUG,
3082 "GC will erase BT block %d\n",
3083 pba);
3084 discard_cnt--;
3085 i++;
3086 bt_block_erased = 1;
3087 break;
3088 }
3089 }
3090
3091 if (bt_block_erased) {
3092 bt_block_erased = 0;
3093 continue;
3094 }
3095
3096 /* If the discard block is L2 cache block, then just skip it */
3097 for (cnt = 0; cnt < BLK_NUM_FOR_L2_CACHE; cnt++) {
3098 if (cache_l2.blk_array[cnt] == pba) {
3099 nand_dbg_print(NAND_DBG_DEBUG,
3100 "GC will erase L2 cache blk %d\n",
3101 pba);
3102 break;
3103 }
3104 }
3105 if (cnt < BLK_NUM_FOR_L2_CACHE) { /* Skip it */
3106 discard_cnt--;
3107 i++;
3108 continue;
3109 }
3110
3111 addr = FTL_Get_Physical_Block_Addr((u64)i *
3112 DeviceInfo.wBlockDataSize);
3113
3114 if (PASS == GLOB_FTL_Block_Erase(addr)) {
3115 pbt[i] &= (u32)(~DISCARD_BLOCK);
3116 pbt[i] |= (u32)(SPARE_BLOCK);
3117 discard_cnt--;
3118 ret = PASS;
3119 } else {
3120 MARK_BLOCK_AS_BAD(pbt[i]);
3121 }
3122 }
3123
3124 i++;
3125 }
3126
3127 return ret;
3128}
3129#endif
3130
3131/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3132* Function: GLOB_FTL_Garbage_Collection
3133* Inputs: none
3134* Outputs: PASS / FAIL (returns the number of un-erased blocks
3135* Description: search the block table for all discarded blocks to erase
3136* for each discarded block:
3137* set the flash block to IN_PROGRESS
3138* erase the block
3139* update the block table
3140* write the block table to flash
3141*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3142int GLOB_FTL_Garbage_Collection(void)
3143{
3144 u32 i;
3145 u32 wDiscard = 0;
3146 int wResult = FAIL;
3147 u32 *pbt = (u32 *)g_pBlockTable;
3148
3149 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
3150 __FILE__, __LINE__, __func__);
3151
3152 if (GC_Called) {
3153 printk(KERN_ALERT "GLOB_FTL_Garbage_Collection() "
3154 "has been re-entered! Exit.\n");
3155 return PASS;
3156 }
3157
3158 GC_Called = 1;
3159
3160 GLOB_FTL_BT_Garbage_Collection();
3161
3162 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
3163 if (IS_DISCARDED_BLOCK(i))
3164 wDiscard++;
3165 }
3166
3167 if (wDiscard <= 0) {
3168 GC_Called = 0;
3169 return wResult;
3170 }
3171
3172 nand_dbg_print(NAND_DBG_DEBUG,
3173 "Found %d discarded blocks\n", wDiscard);
3174
3175 FTL_Write_Block_Table(FAIL);
3176
3177 wResult = do_garbage_collection(wDiscard);
3178
3179 FTL_Write_Block_Table(FAIL);
3180
3181 GC_Called = 0;
3182
3183 return wResult;
3184}
3185
3186
3187#if CMD_DMA
3188static int do_bt_garbage_collection(void)
3189{
3190 u32 pba, lba;
3191 u32 *pbt = (u32 *)g_pBlockTable;
3192 u32 *pBTBlocksNode = (u32 *)g_pBTBlocks;
3193 u64 addr;
3194 int i, ret = FAIL;
3195
3196 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3197 __FILE__, __LINE__, __func__);
3198
3199 if (BT_GC_Called)
3200 return PASS;
3201
3202 BT_GC_Called = 1;
3203
3204 for (i = last_erased; (i <= LAST_BT_ID) &&
3205 (g_pBTBlocks[((i + 2) % (1 + LAST_BT_ID - FIRST_BT_ID)) +
3206 FIRST_BT_ID - FIRST_BT_ID] != BTBLOCK_INVAL) &&
3207 ((ftl_cmd_cnt + 28)) < 256; i++) {
3208 pba = pBTBlocksNode[i - FIRST_BT_ID];
3209 lba = FTL_Get_Block_Index(pba);
3210 nand_dbg_print(NAND_DBG_DEBUG,
3211 "do_bt_garbage_collection: pba %d, lba %d\n",
3212 pba, lba);
3213 nand_dbg_print(NAND_DBG_DEBUG,
3214 "Block Table Entry: %d", pbt[lba]);
3215
3216 if (((pbt[lba] & BAD_BLOCK) != BAD_BLOCK) &&
3217 (pbt[lba] & DISCARD_BLOCK)) {
3218 nand_dbg_print(NAND_DBG_DEBUG,
3219 "do_bt_garbage_collection_cdma: "
3220 "Erasing Block tables present in block %d\n",
3221 pba);
3222 addr = FTL_Get_Physical_Block_Addr((u64)lba *
3223 DeviceInfo.wBlockDataSize);
3224 if (PASS == GLOB_FTL_Block_Erase(addr)) {
3225 pbt[lba] &= (u32)(~DISCARD_BLOCK);
3226 pbt[lba] |= (u32)(SPARE_BLOCK);
3227
3228 p_BTableChangesDelta =
3229 (struct BTableChangesDelta *)
3230 g_pBTDelta_Free;
3231 g_pBTDelta_Free +=
3232 sizeof(struct BTableChangesDelta);
3233
3234 p_BTableChangesDelta->ftl_cmd_cnt =
3235 ftl_cmd_cnt - 1;
3236 p_BTableChangesDelta->BT_Index = lba;
3237 p_BTableChangesDelta->BT_Entry_Value =
3238 pbt[lba];
3239
3240 p_BTableChangesDelta->ValidFields = 0x0C;
3241
3242 ret = PASS;
3243 pBTBlocksNode[last_erased - FIRST_BT_ID] =
3244 BTBLOCK_INVAL;
3245 nand_dbg_print(NAND_DBG_DEBUG,
3246 "resetting bt entry at index %d "
3247 "value %d\n", i,
3248 pBTBlocksNode[i - FIRST_BT_ID]);
3249 if (last_erased == LAST_BT_ID)
3250 last_erased = FIRST_BT_ID;
3251 else
3252 last_erased++;
3253 } else {
3254 MARK_BLOCK_AS_BAD(pbt[lba]);
3255 }
3256 }
3257 }
3258
3259 BT_GC_Called = 0;
3260
3261 return ret;
3262}
3263
3264#else
3265static int do_bt_garbage_collection(void)
3266{
3267 u32 pba, lba;
3268 u32 *pbt = (u32 *)g_pBlockTable;
3269 u32 *pBTBlocksNode = (u32 *)g_pBTBlocks;
3270 u64 addr;
3271 int i, ret = FAIL;
3272
3273 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3274 __FILE__, __LINE__, __func__);
3275
3276 if (BT_GC_Called)
3277 return PASS;
3278
3279 BT_GC_Called = 1;
3280
3281 for (i = last_erased; (i <= LAST_BT_ID) &&
3282 (g_pBTBlocks[((i + 2) % (1 + LAST_BT_ID - FIRST_BT_ID)) +
3283 FIRST_BT_ID - FIRST_BT_ID] != BTBLOCK_INVAL); i++) {
3284 pba = pBTBlocksNode[i - FIRST_BT_ID];
3285 lba = FTL_Get_Block_Index(pba);
3286 nand_dbg_print(NAND_DBG_DEBUG,
3287 "do_bt_garbage_collection_cdma: pba %d, lba %d\n",
3288 pba, lba);
3289 nand_dbg_print(NAND_DBG_DEBUG,
3290 "Block Table Entry: %d", pbt[lba]);
3291
3292 if (((pbt[lba] & BAD_BLOCK) != BAD_BLOCK) &&
3293 (pbt[lba] & DISCARD_BLOCK)) {
3294 nand_dbg_print(NAND_DBG_DEBUG,
3295 "do_bt_garbage_collection: "
3296 "Erasing Block tables present in block %d\n",
3297 pba);
3298 addr = FTL_Get_Physical_Block_Addr((u64)lba *
3299 DeviceInfo.wBlockDataSize);
3300 if (PASS == GLOB_FTL_Block_Erase(addr)) {
3301 pbt[lba] &= (u32)(~DISCARD_BLOCK);
3302 pbt[lba] |= (u32)(SPARE_BLOCK);
3303 ret = PASS;
3304 pBTBlocksNode[last_erased - FIRST_BT_ID] =
3305 BTBLOCK_INVAL;
3306 nand_dbg_print(NAND_DBG_DEBUG,
3307 "resetting bt entry at index %d "
3308 "value %d\n", i,
3309 pBTBlocksNode[i - FIRST_BT_ID]);
3310 if (last_erased == LAST_BT_ID)
3311 last_erased = FIRST_BT_ID;
3312 else
3313 last_erased++;
3314 } else {
3315 MARK_BLOCK_AS_BAD(pbt[lba]);
3316 }
3317 }
3318 }
3319
3320 BT_GC_Called = 0;
3321
3322 return ret;
3323}
3324
3325#endif
3326
3327/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3328* Function: GLOB_FTL_BT_Garbage_Collection
3329* Inputs: none
3330* Outputs: PASS / FAIL (returns the number of un-erased blocks
3331* Description: Erases discarded blocks containing Block table
3332*
3333*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3334int GLOB_FTL_BT_Garbage_Collection(void)
3335{
3336 return do_bt_garbage_collection();
3337}
3338
3339/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3340* Function: FTL_Replace_OneBlock
3341* Inputs: Block number 1
3342* Block number 2
3343* Outputs: Replaced Block Number
3344* Description: Interchange block table entries at wBlockNum and wReplaceNum
3345*
3346*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3347static u32 FTL_Replace_OneBlock(u32 blk, u32 rep_blk)
3348{
3349 u32 tmp_blk;
3350 u32 replace_node = BAD_BLOCK;
3351 u32 *pbt = (u32 *)g_pBlockTable;
3352
3353 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3354 __FILE__, __LINE__, __func__);
3355
3356 if (rep_blk != BAD_BLOCK) {
3357 if (IS_BAD_BLOCK(blk))
3358 tmp_blk = pbt[blk];
3359 else
3360 tmp_blk = DISCARD_BLOCK | (~SPARE_BLOCK & pbt[blk]);
3361
3362 replace_node = (u32) ((~SPARE_BLOCK) & pbt[rep_blk]);
3363 pbt[blk] = replace_node;
3364 pbt[rep_blk] = tmp_blk;
3365
3366#if CMD_DMA
3367 p_BTableChangesDelta =
3368 (struct BTableChangesDelta *)g_pBTDelta_Free;
3369 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
3370
3371 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
3372 p_BTableChangesDelta->BT_Index = blk;
3373 p_BTableChangesDelta->BT_Entry_Value = pbt[blk];
3374
3375 p_BTableChangesDelta->ValidFields = 0x0C;
3376
3377 p_BTableChangesDelta =
3378 (struct BTableChangesDelta *)g_pBTDelta_Free;
3379 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
3380
3381 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
3382 p_BTableChangesDelta->BT_Index = rep_blk;
3383 p_BTableChangesDelta->BT_Entry_Value = pbt[rep_blk];
3384 p_BTableChangesDelta->ValidFields = 0x0C;
3385#endif
3386 }
3387
3388 return replace_node;
3389}
3390
3391/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3392* Function: FTL_Write_Block_Table_Data
3393* Inputs: Block table size in pages
3394* Outputs: PASS=0 / FAIL=1
3395* Description: Write block table data in flash
3396* If first page and last page
3397* Write data+BT flag
3398* else
3399* Write data
3400* BT flag is a counter. Its value is incremented for block table
3401* write in a new Block
3402*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3403static int FTL_Write_Block_Table_Data(void)
3404{
3405 u64 dwBlockTableAddr, pTempAddr;
3406 u32 Block;
3407 u16 Page, PageCount;
3408 u8 *tempBuf = tmp_buf_write_blk_table_data;
3409 int wBytesCopied;
3410 u16 bt_pages;
3411
3412 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3413 __FILE__, __LINE__, __func__);
3414
3415 dwBlockTableAddr =
3416 (u64)((u64)g_wBlockTableIndex * DeviceInfo.wBlockDataSize +
3417 (u64)g_wBlockTableOffset * DeviceInfo.wPageDataSize);
3418 pTempAddr = dwBlockTableAddr;
3419
3420 bt_pages = FTL_Get_Block_Table_Flash_Size_Pages();
3421
3422 nand_dbg_print(NAND_DBG_DEBUG, "FTL_Write_Block_Table_Data: "
3423 "page= %d BlockTableIndex= %d "
3424 "BlockTableOffset=%d\n", bt_pages,
3425 g_wBlockTableIndex, g_wBlockTableOffset);
3426
3427 Block = BLK_FROM_ADDR(pTempAddr);
3428 Page = PAGE_FROM_ADDR(pTempAddr, Block);
3429 PageCount = 1;
3430
3431 if (bt_block_changed) {
3432 if (bt_flag == LAST_BT_ID) {
3433 bt_flag = FIRST_BT_ID;
3434 g_pBTBlocks[bt_flag - FIRST_BT_ID] = Block;
3435 } else if (bt_flag < LAST_BT_ID) {
3436 bt_flag++;
3437 g_pBTBlocks[bt_flag - FIRST_BT_ID] = Block;
3438 }
3439
3440 if ((bt_flag > (LAST_BT_ID-4)) &&
3441 g_pBTBlocks[FIRST_BT_ID - FIRST_BT_ID] !=
3442 BTBLOCK_INVAL) {
3443 bt_block_changed = 0;
3444 GLOB_FTL_BT_Garbage_Collection();
3445 }
3446
3447 bt_block_changed = 0;
3448 nand_dbg_print(NAND_DBG_DEBUG,
3449 "Block Table Counter is %u Block %u\n",
3450 bt_flag, (unsigned int)Block);
3451 }
3452
3453 memset(tempBuf, 0, 3);
3454 tempBuf[3] = bt_flag;
3455 wBytesCopied = FTL_Copy_Block_Table_To_Flash(tempBuf + 4,
3456 DeviceInfo.wPageDataSize - 4, 0);
3457 memset(&tempBuf[wBytesCopied + 4], 0xff,
3458 DeviceInfo.wPageSize - (wBytesCopied + 4));
3459 FTL_Insert_Block_Table_Signature(&tempBuf[DeviceInfo.wPageDataSize],
3460 bt_flag);
3461
3462#if CMD_DMA
3463 memcpy(g_pNextBlockTable, tempBuf,
3464 DeviceInfo.wPageSize * sizeof(u8));
3465 nand_dbg_print(NAND_DBG_DEBUG, "Writing First Page of Block Table "
3466 "Block %u Page %u\n", (unsigned int)Block, Page);
3467 if (FAIL == GLOB_LLD_Write_Page_Main_Spare_cdma(g_pNextBlockTable,
3468 Block, Page, 1,
3469 LLD_CMD_FLAG_MODE_CDMA | LLD_CMD_FLAG_ORDER_BEFORE_REST)) {
3470 nand_dbg_print(NAND_DBG_WARN, "NAND Program fail in "
3471 "%s, Line %d, Function: %s, "
3472 "new Bad Block %d generated!\n",
3473 __FILE__, __LINE__, __func__, Block);
3474 goto func_return;
3475 }
3476
3477 ftl_cmd_cnt++;
3478 g_pNextBlockTable += ((DeviceInfo.wPageSize * sizeof(u8)));
3479#else
3480 if (FAIL == GLOB_LLD_Write_Page_Main_Spare(tempBuf, Block, Page, 1)) {
3481 nand_dbg_print(NAND_DBG_WARN,
3482 "NAND Program fail in %s, Line %d, Function: %s, "
3483 "new Bad Block %d generated!\n",
3484 __FILE__, __LINE__, __func__, Block);
3485 goto func_return;
3486 }
3487#endif
3488
3489 if (bt_pages > 1) {
3490 PageCount = bt_pages - 1;
3491 if (PageCount > 1) {
3492 wBytesCopied += FTL_Copy_Block_Table_To_Flash(tempBuf,
3493 DeviceInfo.wPageDataSize * (PageCount - 1),
3494 wBytesCopied);
3495
3496#if CMD_DMA
3497 memcpy(g_pNextBlockTable, tempBuf,
3498 (PageCount - 1) * DeviceInfo.wPageDataSize);
3499 if (FAIL == GLOB_LLD_Write_Page_Main_cdma(
3500 g_pNextBlockTable, Block, Page + 1,
3501 PageCount - 1)) {
3502 nand_dbg_print(NAND_DBG_WARN,
3503 "NAND Program fail in %s, Line %d, "
3504 "Function: %s, "
3505 "new Bad Block %d generated!\n",
3506 __FILE__, __LINE__, __func__,
3507 (int)Block);
3508 goto func_return;
3509 }
3510
3511 ftl_cmd_cnt++;
3512 g_pNextBlockTable += (PageCount - 1) *
3513 DeviceInfo.wPageDataSize * sizeof(u8);
3514#else
3515 if (FAIL == GLOB_LLD_Write_Page_Main(tempBuf,
3516 Block, Page + 1, PageCount - 1)) {
3517 nand_dbg_print(NAND_DBG_WARN,
3518 "NAND Program fail in %s, Line %d, "
3519 "Function: %s, "
3520 "new Bad Block %d generated!\n",
3521 __FILE__, __LINE__, __func__,
3522 (int)Block);
3523 goto func_return;
3524 }
3525#endif
3526 }
3527
3528 wBytesCopied = FTL_Copy_Block_Table_To_Flash(tempBuf,
3529 DeviceInfo.wPageDataSize, wBytesCopied);
3530 memset(&tempBuf[wBytesCopied], 0xff,
3531 DeviceInfo.wPageSize-wBytesCopied);
3532 FTL_Insert_Block_Table_Signature(
3533 &tempBuf[DeviceInfo.wPageDataSize], bt_flag);
3534#if CMD_DMA
3535 memcpy(g_pNextBlockTable, tempBuf,
3536 DeviceInfo.wPageSize * sizeof(u8));
3537 nand_dbg_print(NAND_DBG_DEBUG,
3538 "Writing the last Page of Block Table "
3539 "Block %u Page %u\n",
3540 (unsigned int)Block, Page + bt_pages - 1);
3541 if (FAIL == GLOB_LLD_Write_Page_Main_Spare_cdma(
3542 g_pNextBlockTable, Block, Page + bt_pages - 1, 1,
3543 LLD_CMD_FLAG_MODE_CDMA |
3544 LLD_CMD_FLAG_ORDER_BEFORE_REST)) {
3545 nand_dbg_print(NAND_DBG_WARN,
3546 "NAND Program fail in %s, Line %d, "
3547 "Function: %s, new Bad Block %d generated!\n",
3548 __FILE__, __LINE__, __func__, Block);
3549 goto func_return;
3550 }
3551 ftl_cmd_cnt++;
3552#else
3553 if (FAIL == GLOB_LLD_Write_Page_Main_Spare(tempBuf,
3554 Block, Page+bt_pages - 1, 1)) {
3555 nand_dbg_print(NAND_DBG_WARN,
3556 "NAND Program fail in %s, Line %d, "
3557 "Function: %s, "
3558 "new Bad Block %d generated!\n",
3559 __FILE__, __LINE__, __func__, Block);
3560 goto func_return;
3561 }
3562#endif
3563 }
3564
3565 nand_dbg_print(NAND_DBG_DEBUG, "FTL_Write_Block_Table_Data: done\n");
3566
3567func_return:
3568 return PASS;
3569}
3570
3571/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3572* Function: FTL_Replace_Block_Table
3573* Inputs: None
3574* Outputs: PASS=0 / FAIL=1
3575* Description: Get a new block to write block table
3576*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3577static u32 FTL_Replace_Block_Table(void)
3578{
3579 u32 blk;
3580 int gc;
3581
3582 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3583 __FILE__, __LINE__, __func__);
3584
3585 blk = FTL_Replace_LWBlock(BLOCK_TABLE_INDEX, &gc);
3586
3587 if ((BAD_BLOCK == blk) && (PASS == gc)) {
3588 GLOB_FTL_Garbage_Collection();
3589 blk = FTL_Replace_LWBlock(BLOCK_TABLE_INDEX, &gc);
3590 }
3591 if (BAD_BLOCK == blk)
3592 printk(KERN_ERR "%s, %s: There is no spare block. "
3593 "It should never happen\n",
3594 __FILE__, __func__);
3595
3596 nand_dbg_print(NAND_DBG_DEBUG, "New Block table Block is %d\n", blk);
3597
3598 return blk;
3599}
3600
3601/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3602* Function: FTL_Replace_LWBlock
3603* Inputs: Block number
3604* Pointer to Garbage Collect flag
3605* Outputs:
3606* Description: Determine the least weared block by traversing
3607* block table
3608* Set Garbage collection to be called if number of spare
3609* block is less than Free Block Gate count
3610* Change Block table entry to map least worn block for current
3611* operation
3612*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3613static u32 FTL_Replace_LWBlock(u32 wBlockNum, int *pGarbageCollect)
3614{
3615 u32 i;
3616 u32 *pbt = (u32 *)g_pBlockTable;
3617 u8 wLeastWornCounter = 0xFF;
3618 u32 wLeastWornIndex = BAD_BLOCK;
3619 u32 wSpareBlockNum = 0;
3620 u32 wDiscardBlockNum = 0;
3621
3622 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3623 __FILE__, __LINE__, __func__);
3624
3625 if (IS_SPARE_BLOCK(wBlockNum)) {
3626 *pGarbageCollect = FAIL;
3627 pbt[wBlockNum] = (u32)(pbt[wBlockNum] & (~SPARE_BLOCK));
3628#if CMD_DMA
3629 p_BTableChangesDelta =
3630 (struct BTableChangesDelta *)g_pBTDelta_Free;
3631 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
3632 p_BTableChangesDelta->ftl_cmd_cnt =
3633 ftl_cmd_cnt;
3634 p_BTableChangesDelta->BT_Index = (u32)(wBlockNum);
3635 p_BTableChangesDelta->BT_Entry_Value = pbt[wBlockNum];
3636 p_BTableChangesDelta->ValidFields = 0x0C;
3637#endif
3638 return pbt[wBlockNum];
3639 }
3640
3641 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
3642 if (IS_DISCARDED_BLOCK(i))
3643 wDiscardBlockNum++;
3644
3645 if (IS_SPARE_BLOCK(i)) {
3646 u32 wPhysicalIndex = (u32)((~BAD_BLOCK) & pbt[i]);
3647 if (wPhysicalIndex > DeviceInfo.wSpectraEndBlock)
3648 printk(KERN_ERR "FTL_Replace_LWBlock: "
3649 "This should never occur!\n");
3650 if (g_pWearCounter[wPhysicalIndex -
3651 DeviceInfo.wSpectraStartBlock] <
3652 wLeastWornCounter) {
3653 wLeastWornCounter =
3654 g_pWearCounter[wPhysicalIndex -
3655 DeviceInfo.wSpectraStartBlock];
3656 wLeastWornIndex = i;
3657 }
3658 wSpareBlockNum++;
3659 }
3660 }
3661
3662 nand_dbg_print(NAND_DBG_WARN,
3663 "FTL_Replace_LWBlock: Least Worn Counter %d\n",
3664 (int)wLeastWornCounter);
3665
3666 if ((wDiscardBlockNum >= NUM_FREE_BLOCKS_GATE) ||
3667 (wSpareBlockNum <= NUM_FREE_BLOCKS_GATE))
3668 *pGarbageCollect = PASS;
3669 else
3670 *pGarbageCollect = FAIL;
3671
3672 nand_dbg_print(NAND_DBG_DEBUG,
3673 "FTL_Replace_LWBlock: Discarded Blocks %u Spare"
3674 " Blocks %u\n",
3675 (unsigned int)wDiscardBlockNum,
3676 (unsigned int)wSpareBlockNum);
3677
3678 return FTL_Replace_OneBlock(wBlockNum, wLeastWornIndex);
3679}
3680
3681/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3682* Function: FTL_Replace_MWBlock
3683* Inputs: None
3684* Outputs: most worn spare block no./BAD_BLOCK
3685* Description: It finds most worn spare block.
3686*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3687static u32 FTL_Replace_MWBlock(void)
3688{
3689 u32 i;
3690 u32 *pbt = (u32 *)g_pBlockTable;
3691 u8 wMostWornCounter = 0;
3692 u32 wMostWornIndex = BAD_BLOCK;
3693 u32 wSpareBlockNum = 0;
3694
3695 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3696 __FILE__, __LINE__, __func__);
3697
3698 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
3699 if (IS_SPARE_BLOCK(i)) {
3700 u32 wPhysicalIndex = (u32)((~SPARE_BLOCK) & pbt[i]);
3701 if (g_pWearCounter[wPhysicalIndex -
3702 DeviceInfo.wSpectraStartBlock] >
3703 wMostWornCounter) {
3704 wMostWornCounter =
3705 g_pWearCounter[wPhysicalIndex -
3706 DeviceInfo.wSpectraStartBlock];
3707 wMostWornIndex = wPhysicalIndex;
3708 }
3709 wSpareBlockNum++;
3710 }
3711 }
3712
3713 if (wSpareBlockNum <= 2)
3714 return BAD_BLOCK;
3715
3716 return wMostWornIndex;
3717}
3718
3719/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3720* Function: FTL_Replace_Block
3721* Inputs: Block Address
3722* Outputs: PASS=0 / FAIL=1
3723* Description: If block specified by blk_addr parameter is not free,
3724* replace it with the least worn block.
3725*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3726static int FTL_Replace_Block(u64 blk_addr)
3727{
3728 u32 current_blk = BLK_FROM_ADDR(blk_addr);
3729 u32 *pbt = (u32 *)g_pBlockTable;
3730 int wResult = PASS;
3731 int GarbageCollect = FAIL;
3732
3733 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3734 __FILE__, __LINE__, __func__);
3735
3736 if (IS_SPARE_BLOCK(current_blk)) {
3737 pbt[current_blk] = (~SPARE_BLOCK) & pbt[current_blk];
3738#if CMD_DMA
3739 p_BTableChangesDelta =
3740 (struct BTableChangesDelta *)g_pBTDelta_Free;
3741 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
3742 p_BTableChangesDelta->ftl_cmd_cnt =
3743 ftl_cmd_cnt;
3744 p_BTableChangesDelta->BT_Index = current_blk;
3745 p_BTableChangesDelta->BT_Entry_Value = pbt[current_blk];
3746 p_BTableChangesDelta->ValidFields = 0x0C ;
3747#endif
3748 return wResult;
3749 }
3750
3751 FTL_Replace_LWBlock(current_blk, &GarbageCollect);
3752
3753 if (PASS == GarbageCollect)
3754 wResult = GLOB_FTL_Garbage_Collection();
3755
3756 return wResult;
3757}
3758
3759/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3760* Function: GLOB_FTL_Is_BadBlock
3761* Inputs: block number to test
3762* Outputs: PASS (block is BAD) / FAIL (block is not bad)
3763* Description: test if this block number is flagged as bad
3764*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3765int GLOB_FTL_Is_BadBlock(u32 wBlockNum)
3766{
3767 u32 *pbt = (u32 *)g_pBlockTable;
3768
3769 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3770 __FILE__, __LINE__, __func__);
3771
3772 if (wBlockNum >= DeviceInfo.wSpectraStartBlock
3773 && BAD_BLOCK == (pbt[wBlockNum] & BAD_BLOCK))
3774 return PASS;
3775 else
3776 return FAIL;
3777}
3778
3779/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3780* Function: GLOB_FTL_Flush_Cache
3781* Inputs: none
3782* Outputs: PASS=0 / FAIL=1
3783* Description: flush all the cache blocks to flash
3784* if a cache block is not dirty, don't do anything with it
3785* else, write the block and update the block table
3786* Note: This function should be called at shutdown/power down.
3787* to write important data into device
3788*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3789int GLOB_FTL_Flush_Cache(void)
3790{
3791 int i, ret;
3792
3793 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
3794 __FILE__, __LINE__, __func__);
3795
3796 for (i = 0; i < CACHE_ITEM_NUM; i++) {
3797 if (SET == Cache.array[i].changed) {
3798#if CMD_DMA
3799#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
3800 int_cache[ftl_cmd_cnt].item = i;
3801 int_cache[ftl_cmd_cnt].cache.address =
3802 Cache.array[i].address;
3803 int_cache[ftl_cmd_cnt].cache.changed = CLEAR;
3804#endif
3805#endif
3806 ret = write_back_to_l2_cache(Cache.array[i].buf, Cache.array[i].address);
3807 if (PASS == ret) {
3808 Cache.array[i].changed = CLEAR;
3809 } else {
3810 printk(KERN_ALERT "Failed when write back to L2 cache!\n");
3811 /* TODO - How to handle this? */
3812 }
3813 }
3814 }
3815
3816 flush_l2_cache();
3817
3818 return FTL_Write_Block_Table(FAIL);
3819}
3820
3821/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3822* Function: GLOB_FTL_Page_Read
3823* Inputs: pointer to data
3824* logical address of data (u64 is LBA * Bytes/Page)
3825* Outputs: PASS=0 / FAIL=1
3826* Description: reads a page of data into RAM from the cache
3827* if the data is not already in cache, read from flash to cache
3828*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3829int GLOB_FTL_Page_Read(u8 *data, u64 logical_addr)
3830{
3831 u16 cache_item;
3832 int res = PASS;
3833
3834 nand_dbg_print(NAND_DBG_DEBUG, "GLOB_FTL_Page_Read - "
3835 "page_addr: %llu\n", logical_addr);
3836
3837 cache_item = FTL_Cache_If_Hit(logical_addr);
3838
3839 if (UNHIT_CACHE_ITEM == cache_item) {
3840 nand_dbg_print(NAND_DBG_DEBUG,
3841 "GLOB_FTL_Page_Read: Cache not hit\n");
3842 res = FTL_Cache_Write();
3843 if (ERR == FTL_Cache_Read(logical_addr))
3844 res = ERR;
3845 cache_item = Cache.LRU;
3846 }
3847
3848 FTL_Cache_Read_Page(data, logical_addr, cache_item);
3849
3850 return res;
3851}
3852
3853/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3854* Function: GLOB_FTL_Page_Write
3855* Inputs: pointer to data
3856* address of data (ADDRESSTYPE is LBA * Bytes/Page)
3857* Outputs: PASS=0 / FAIL=1
3858* Description: writes a page of data from RAM to the cache
3859* if the data is not already in cache, write back the
3860* least recently used block and read the addressed block
3861* from flash to cache
3862*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3863int GLOB_FTL_Page_Write(u8 *pData, u64 dwPageAddr)
3864{
3865 u16 cache_blk;
3866 u32 *pbt = (u32 *)g_pBlockTable;
3867 int wResult = PASS;
3868
3869 nand_dbg_print(NAND_DBG_TRACE, "GLOB_FTL_Page_Write - "
3870 "dwPageAddr: %llu\n", dwPageAddr);
3871
3872 cache_blk = FTL_Cache_If_Hit(dwPageAddr);
3873
3874 if (UNHIT_CACHE_ITEM == cache_blk) {
3875 wResult = FTL_Cache_Write();
3876 if (IS_BAD_BLOCK(BLK_FROM_ADDR(dwPageAddr))) {
3877 wResult = FTL_Replace_Block(dwPageAddr);
3878 pbt[BLK_FROM_ADDR(dwPageAddr)] |= SPARE_BLOCK;
3879 if (wResult == FAIL)
3880 return FAIL;
3881 }
3882 if (ERR == FTL_Cache_Read(dwPageAddr))
3883 wResult = ERR;
3884 cache_blk = Cache.LRU;
3885 FTL_Cache_Write_Page(pData, dwPageAddr, cache_blk, 0);
3886 } else {
3887#if CMD_DMA
3888 FTL_Cache_Write_Page(pData, dwPageAddr, cache_blk,
3889 LLD_CMD_FLAG_ORDER_BEFORE_REST);
3890#else
3891 FTL_Cache_Write_Page(pData, dwPageAddr, cache_blk, 0);
3892#endif
3893 }
3894
3895 return wResult;
3896}
3897
3898/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3899* Function: GLOB_FTL_Block_Erase
3900* Inputs: address of block to erase (now in byte format, should change to
3901* block format)
3902* Outputs: PASS=0 / FAIL=1
3903* Description: erases the specified block
3904* increments the erase count
3905* If erase count reaches its upper limit,call function to
3906* do the adjustment as per the relative erase count values
3907*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3908int GLOB_FTL_Block_Erase(u64 blk_addr)
3909{
3910 int status;
3911 u32 BlkIdx;
3912
3913 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
3914 __FILE__, __LINE__, __func__);
3915
3916 BlkIdx = (u32)(blk_addr >> DeviceInfo.nBitsInBlockDataSize);
3917
3918 if (BlkIdx < DeviceInfo.wSpectraStartBlock) {
3919 printk(KERN_ERR "GLOB_FTL_Block_Erase: "
3920 "This should never occur\n");
3921 return FAIL;
3922 }
3923
3924#if CMD_DMA
3925 status = GLOB_LLD_Erase_Block_cdma(BlkIdx, LLD_CMD_FLAG_MODE_CDMA);
3926 if (status == FAIL)
3927 nand_dbg_print(NAND_DBG_WARN,
3928 "NAND Program fail in %s, Line %d, "
3929 "Function: %s, new Bad Block %d generated!\n",
3930 __FILE__, __LINE__, __func__, BlkIdx);
3931#else
3932 status = GLOB_LLD_Erase_Block(BlkIdx);
3933 if (status == FAIL) {
3934 nand_dbg_print(NAND_DBG_WARN,
3935 "NAND Program fail in %s, Line %d, "
3936 "Function: %s, new Bad Block %d generated!\n",
3937 __FILE__, __LINE__, __func__, BlkIdx);
3938 return status;
3939 }
3940#endif
3941
3942 if (DeviceInfo.MLCDevice) {
3943 g_pReadCounter[BlkIdx - DeviceInfo.wSpectraStartBlock] = 0;
3944 if (g_cBlockTableStatus != IN_PROGRESS_BLOCK_TABLE) {
3945 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
3946 FTL_Write_IN_Progress_Block_Table_Page();
3947 }
3948 }
3949
3950 g_pWearCounter[BlkIdx - DeviceInfo.wSpectraStartBlock]++;
3951
3952#if CMD_DMA
3953 p_BTableChangesDelta =
3954 (struct BTableChangesDelta *)g_pBTDelta_Free;
3955 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
3956 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
3957 p_BTableChangesDelta->WC_Index =
3958 BlkIdx - DeviceInfo.wSpectraStartBlock;
3959 p_BTableChangesDelta->WC_Entry_Value =
3960 g_pWearCounter[BlkIdx - DeviceInfo.wSpectraStartBlock];
3961 p_BTableChangesDelta->ValidFields = 0x30;
3962
3963 if (DeviceInfo.MLCDevice) {
3964 p_BTableChangesDelta =
3965 (struct BTableChangesDelta *)g_pBTDelta_Free;
3966 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
3967 p_BTableChangesDelta->ftl_cmd_cnt =
3968 ftl_cmd_cnt;
3969 p_BTableChangesDelta->RC_Index =
3970 BlkIdx - DeviceInfo.wSpectraStartBlock;
3971 p_BTableChangesDelta->RC_Entry_Value =
3972 g_pReadCounter[BlkIdx -
3973 DeviceInfo.wSpectraStartBlock];
3974 p_BTableChangesDelta->ValidFields = 0xC0;
3975 }
3976
3977 ftl_cmd_cnt++;
3978#endif
3979
3980 if (g_pWearCounter[BlkIdx - DeviceInfo.wSpectraStartBlock] == 0xFE)
3981 FTL_Adjust_Relative_Erase_Count(BlkIdx);
3982
3983 return status;
3984}
3985
3986
3987/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
3988* Function: FTL_Adjust_Relative_Erase_Count
3989* Inputs: index to block that was just incremented and is at the max
3990* Outputs: PASS=0 / FAIL=1
3991* Description: If any erase counts at MAX, adjusts erase count of every
3992* block by subtracting least worn
3993* counter from counter value of every entry in wear table
3994*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
3995static int FTL_Adjust_Relative_Erase_Count(u32 Index_of_MAX)
3996{
3997 u8 wLeastWornCounter = MAX_BYTE_VALUE;
3998 u8 wWearCounter;
3999 u32 i, wWearIndex;
4000 u32 *pbt = (u32 *)g_pBlockTable;
4001 int wResult = PASS;
4002
4003 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
4004 __FILE__, __LINE__, __func__);
4005
4006 for (i = 0; i < DeviceInfo.wDataBlockNum; i++) {
4007 if (IS_BAD_BLOCK(i))
4008 continue;
4009 wWearIndex = (u32)(pbt[i] & (~BAD_BLOCK));
4010
4011 if ((wWearIndex - DeviceInfo.wSpectraStartBlock) < 0)
4012 printk(KERN_ERR "FTL_Adjust_Relative_Erase_Count:"
4013 "This should never occur\n");
4014 wWearCounter = g_pWearCounter[wWearIndex -
4015 DeviceInfo.wSpectraStartBlock];
4016 if (wWearCounter < wLeastWornCounter)
4017 wLeastWornCounter = wWearCounter;
4018 }
4019
4020 if (wLeastWornCounter == 0) {
4021 nand_dbg_print(NAND_DBG_WARN,
4022 "Adjusting Wear Levelling Counters: Special Case\n");
4023 g_pWearCounter[Index_of_MAX -
4024 DeviceInfo.wSpectraStartBlock]--;
4025#if CMD_DMA
4026 p_BTableChangesDelta =
4027 (struct BTableChangesDelta *)g_pBTDelta_Free;
4028 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
4029 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
4030 p_BTableChangesDelta->WC_Index =
4031 Index_of_MAX - DeviceInfo.wSpectraStartBlock;
4032 p_BTableChangesDelta->WC_Entry_Value =
4033 g_pWearCounter[Index_of_MAX -
4034 DeviceInfo.wSpectraStartBlock];
4035 p_BTableChangesDelta->ValidFields = 0x30;
4036#endif
4037 FTL_Static_Wear_Leveling();
4038 } else {
4039 for (i = 0; i < DeviceInfo.wDataBlockNum; i++)
4040 if (!IS_BAD_BLOCK(i)) {
4041 wWearIndex = (u32)(pbt[i] & (~BAD_BLOCK));
4042 g_pWearCounter[wWearIndex -
4043 DeviceInfo.wSpectraStartBlock] =
4044 (u8)(g_pWearCounter
4045 [wWearIndex -
4046 DeviceInfo.wSpectraStartBlock] -
4047 wLeastWornCounter);
4048#if CMD_DMA
4049 p_BTableChangesDelta =
4050 (struct BTableChangesDelta *)g_pBTDelta_Free;
4051 g_pBTDelta_Free +=
4052 sizeof(struct BTableChangesDelta);
4053
4054 p_BTableChangesDelta->ftl_cmd_cnt =
4055 ftl_cmd_cnt;
4056 p_BTableChangesDelta->WC_Index = wWearIndex -
4057 DeviceInfo.wSpectraStartBlock;
4058 p_BTableChangesDelta->WC_Entry_Value =
4059 g_pWearCounter[wWearIndex -
4060 DeviceInfo.wSpectraStartBlock];
4061 p_BTableChangesDelta->ValidFields = 0x30;
4062#endif
4063 }
4064 }
4065
4066 return wResult;
4067}
4068
4069/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
4070* Function: FTL_Write_IN_Progress_Block_Table_Page
4071* Inputs: None
4072* Outputs: None
4073* Description: It writes in-progress flag page to the page next to
4074* block table
4075***********************************************************************/
4076static int FTL_Write_IN_Progress_Block_Table_Page(void)
4077{
4078 int wResult = PASS;
4079 u16 bt_pages;
4080 u16 dwIPFPageAddr;
4081#if CMD_DMA
4082#else
4083 u32 *pbt = (u32 *)g_pBlockTable;
4084 u32 wTempBlockTableIndex;
4085#endif
4086
4087 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
4088 __FILE__, __LINE__, __func__);
4089
4090 bt_pages = FTL_Get_Block_Table_Flash_Size_Pages();
4091
4092 dwIPFPageAddr = g_wBlockTableOffset + bt_pages;
4093
4094 nand_dbg_print(NAND_DBG_DEBUG, "Writing IPF at "
4095 "Block %d Page %d\n",
4096 g_wBlockTableIndex, dwIPFPageAddr);
4097
4098#if CMD_DMA
4099 wResult = GLOB_LLD_Write_Page_Main_Spare_cdma(g_pIPF,
4100 g_wBlockTableIndex, dwIPFPageAddr, 1,
4101 LLD_CMD_FLAG_MODE_CDMA | LLD_CMD_FLAG_ORDER_BEFORE_REST);
4102 if (wResult == FAIL) {
4103 nand_dbg_print(NAND_DBG_WARN,
4104 "NAND Program fail in %s, Line %d, "
4105 "Function: %s, new Bad Block %d generated!\n",
4106 __FILE__, __LINE__, __func__,
4107 g_wBlockTableIndex);
4108 }
4109 g_wBlockTableOffset = dwIPFPageAddr + 1;
4110 p_BTableChangesDelta = (struct BTableChangesDelta *)g_pBTDelta_Free;
4111 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
4112 p_BTableChangesDelta->ftl_cmd_cnt = ftl_cmd_cnt;
4113 p_BTableChangesDelta->g_wBlockTableOffset = g_wBlockTableOffset;
4114 p_BTableChangesDelta->ValidFields = 0x01;
4115 ftl_cmd_cnt++;
4116#else
4117 wResult = GLOB_LLD_Write_Page_Main_Spare(g_pIPF,
4118 g_wBlockTableIndex, dwIPFPageAddr, 1);
4119 if (wResult == FAIL) {
4120 nand_dbg_print(NAND_DBG_WARN,
4121 "NAND Program fail in %s, Line %d, "
4122 "Function: %s, new Bad Block %d generated!\n",
4123 __FILE__, __LINE__, __func__,
4124 (int)g_wBlockTableIndex);
4125 MARK_BLOCK_AS_BAD(pbt[BLOCK_TABLE_INDEX]);
4126 wTempBlockTableIndex = FTL_Replace_Block_Table();
4127 bt_block_changed = 1;
4128 if (BAD_BLOCK == wTempBlockTableIndex)
4129 return ERR;
4130 g_wBlockTableIndex = wTempBlockTableIndex;
4131 g_wBlockTableOffset = 0;
4132 /* Block table tag is '00'. Means it's used one */
4133 pbt[BLOCK_TABLE_INDEX] = g_wBlockTableIndex;
4134 return FAIL;
4135 }
4136 g_wBlockTableOffset = dwIPFPageAddr + 1;
4137#endif
4138 return wResult;
4139}
4140
4141/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
4142* Function: FTL_Read_Disturbance
4143* Inputs: block address
4144* Outputs: PASS=0 / FAIL=1
4145* Description: used to handle read disturbance. Data in block that
4146* reaches its read limit is moved to new block
4147*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
4148int FTL_Read_Disturbance(u32 blk_addr)
4149{
4150 int wResult = FAIL;
4151 u32 *pbt = (u32 *) g_pBlockTable;
4152 u32 dwOldBlockAddr = blk_addr;
4153 u32 wBlockNum;
4154 u32 i;
4155 u32 wLeastReadCounter = 0xFFFF;
4156 u32 wLeastReadIndex = BAD_BLOCK;
4157 u32 wSpareBlockNum = 0;
4158 u32 wTempNode;
4159 u32 wReplacedNode;
4160 u8 *g_pTempBuf;
4161
4162 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
4163 __FILE__, __LINE__, __func__);
4164
4165#if CMD_DMA
4166 g_pTempBuf = cp_back_buf_copies[cp_back_buf_idx];
4167 cp_back_buf_idx++;
4168 if (cp_back_buf_idx > COPY_BACK_BUF_NUM) {
4169 printk(KERN_ERR "cp_back_buf_copies overflow! Exit."
4170 "Maybe too many pending commands in your CDMA chain.\n");
4171 return FAIL;
4172 }
4173#else
4174 g_pTempBuf = tmp_buf_read_disturbance;
4175#endif
4176
4177 wBlockNum = FTL_Get_Block_Index(blk_addr);
4178
4179 do {
4180 /* This is a bug.Here 'i' should be logical block number
4181 * and start from 1 (0 is reserved for block table).
4182 * Have fixed it. - Yunpeng 2008. 12. 19
4183 */
4184 for (i = 1; i < DeviceInfo.wDataBlockNum; i++) {
4185 if (IS_SPARE_BLOCK(i)) {
4186 u32 wPhysicalIndex =
4187 (u32)((~SPARE_BLOCK) & pbt[i]);
4188 if (g_pReadCounter[wPhysicalIndex -
4189 DeviceInfo.wSpectraStartBlock] <
4190 wLeastReadCounter) {
4191 wLeastReadCounter =
4192 g_pReadCounter[wPhysicalIndex -
4193 DeviceInfo.wSpectraStartBlock];
4194 wLeastReadIndex = i;
4195 }
4196 wSpareBlockNum++;
4197 }
4198 }
4199
4200 if (wSpareBlockNum <= NUM_FREE_BLOCKS_GATE) {
4201 wResult = GLOB_FTL_Garbage_Collection();
4202 if (PASS == wResult)
4203 continue;
4204 else
4205 break;
4206 } else {
4207 wTempNode = (u32)(DISCARD_BLOCK | pbt[wBlockNum]);
4208 wReplacedNode = (u32)((~SPARE_BLOCK) &
4209 pbt[wLeastReadIndex]);
4210#if CMD_DMA
4211 pbt[wBlockNum] = wReplacedNode;
4212 pbt[wLeastReadIndex] = wTempNode;
4213 p_BTableChangesDelta =
4214 (struct BTableChangesDelta *)g_pBTDelta_Free;
4215 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
4216
4217 p_BTableChangesDelta->ftl_cmd_cnt =
4218 ftl_cmd_cnt;
4219 p_BTableChangesDelta->BT_Index = wBlockNum;
4220 p_BTableChangesDelta->BT_Entry_Value = pbt[wBlockNum];
4221 p_BTableChangesDelta->ValidFields = 0x0C;
4222
4223 p_BTableChangesDelta =
4224 (struct BTableChangesDelta *)g_pBTDelta_Free;
4225 g_pBTDelta_Free += sizeof(struct BTableChangesDelta);
4226
4227 p_BTableChangesDelta->ftl_cmd_cnt =
4228 ftl_cmd_cnt;
4229 p_BTableChangesDelta->BT_Index = wLeastReadIndex;
4230 p_BTableChangesDelta->BT_Entry_Value =
4231 pbt[wLeastReadIndex];
4232 p_BTableChangesDelta->ValidFields = 0x0C;
4233
4234 wResult = GLOB_LLD_Read_Page_Main_cdma(g_pTempBuf,
4235 dwOldBlockAddr, 0, DeviceInfo.wPagesPerBlock,
4236 LLD_CMD_FLAG_MODE_CDMA);
4237 if (wResult == FAIL)
4238 return wResult;
4239
4240 ftl_cmd_cnt++;
4241
4242 if (wResult != FAIL) {
4243 if (FAIL == GLOB_LLD_Write_Page_Main_cdma(
4244 g_pTempBuf, pbt[wBlockNum], 0,
4245 DeviceInfo.wPagesPerBlock)) {
4246 nand_dbg_print(NAND_DBG_WARN,
4247 "NAND Program fail in "
4248 "%s, Line %d, Function: %s, "
4249 "new Bad Block %d "
4250 "generated!\n",
4251 __FILE__, __LINE__, __func__,
4252 (int)pbt[wBlockNum]);
4253 wResult = FAIL;
4254 MARK_BLOCK_AS_BAD(pbt[wBlockNum]);
4255 }
4256 ftl_cmd_cnt++;
4257 }
4258#else
4259 wResult = GLOB_LLD_Read_Page_Main(g_pTempBuf,
4260 dwOldBlockAddr, 0, DeviceInfo.wPagesPerBlock);
4261 if (wResult == FAIL)
4262 return wResult;
4263
4264 if (wResult != FAIL) {
4265 /* This is a bug. At this time, pbt[wBlockNum]
4266 is still the physical address of
4267 discard block, and should not be write.
4268 Have fixed it as below.
4269 -- Yunpeng 2008.12.19
4270 */
4271 wResult = GLOB_LLD_Write_Page_Main(g_pTempBuf,
4272 wReplacedNode, 0,
4273 DeviceInfo.wPagesPerBlock);
4274 if (wResult == FAIL) {
4275 nand_dbg_print(NAND_DBG_WARN,
4276 "NAND Program fail in "
4277 "%s, Line %d, Function: %s, "
4278 "new Bad Block %d "
4279 "generated!\n",
4280 __FILE__, __LINE__, __func__,
4281 (int)wReplacedNode);
4282 MARK_BLOCK_AS_BAD(wReplacedNode);
4283 } else {
4284 pbt[wBlockNum] = wReplacedNode;
4285 pbt[wLeastReadIndex] = wTempNode;
4286 }
4287 }
4288
4289 if ((wResult == PASS) && (g_cBlockTableStatus !=
4290 IN_PROGRESS_BLOCK_TABLE)) {
4291 g_cBlockTableStatus = IN_PROGRESS_BLOCK_TABLE;
4292 FTL_Write_IN_Progress_Block_Table_Page();
4293 }
4294#endif
4295 }
4296 } while (wResult != PASS)
4297 ;
4298
4299#if CMD_DMA
4300 /* ... */
4301#endif
4302
4303 return wResult;
4304}
4305
diff --git a/drivers/staging/spectra/flash.h b/drivers/staging/spectra/flash.h
deleted file mode 100644
index e59cf4ede551..000000000000
--- a/drivers/staging/spectra/flash.h
+++ /dev/null
@@ -1,198 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _FLASH_INTERFACE_
21#define _FLASH_INTERFACE_
22
23#include "ffsport.h"
24#include "spectraswconfig.h"
25
26#define MAX_BYTE_VALUE 0xFF
27#define MAX_WORD_VALUE 0xFFFF
28#define MAX_U32_VALUE 0xFFFFFFFF
29
30#define MAX_BLOCKNODE_VALUE 0xFFFFFF
31#define DISCARD_BLOCK 0x800000
32#define SPARE_BLOCK 0x400000
33#define BAD_BLOCK 0xC00000
34
35#define UNHIT_CACHE_ITEM 0xFFFF
36
37#define NAND_CACHE_INIT_ADDR 0xffffffffffffffffULL
38
39#define IN_PROGRESS_BLOCK_TABLE 0x00
40#define CURRENT_BLOCK_TABLE 0x01
41
42#define BTSIG_OFFSET (0)
43#define BTSIG_BYTES (5)
44#define BTSIG_DELTA (3)
45
46#define MAX_READ_COUNTER 0x2710
47
48#define FIRST_BT_ID (1)
49#define LAST_BT_ID (254)
50#define BTBLOCK_INVAL (u32)(0xFFFFFFFF)
51
52struct device_info_tag {
53 u16 wDeviceMaker;
54 u16 wDeviceID;
55 u32 wDeviceType;
56 u32 wSpectraStartBlock;
57 u32 wSpectraEndBlock;
58 u32 wTotalBlocks;
59 u16 wPagesPerBlock;
60 u16 wPageSize;
61 u16 wPageDataSize;
62 u16 wPageSpareSize;
63 u16 wNumPageSpareFlag;
64 u16 wECCBytesPerSector;
65 u32 wBlockSize;
66 u32 wBlockDataSize;
67 u32 wDataBlockNum;
68 u8 bPlaneNum;
69 u16 wDeviceMainAreaSize;
70 u16 wDeviceSpareAreaSize;
71 u16 wDevicesConnected;
72 u16 wDeviceWidth;
73 u16 wHWRevision;
74 u16 wHWFeatures;
75
76 u16 wONFIDevFeatures;
77 u16 wONFIOptCommands;
78 u16 wONFITimingMode;
79 u16 wONFIPgmCacheTimingMode;
80
81 u16 MLCDevice;
82 u16 wSpareSkipBytes;
83
84 u8 nBitsInPageNumber;
85 u8 nBitsInPageDataSize;
86 u8 nBitsInBlockDataSize;
87};
88
89extern struct device_info_tag DeviceInfo;
90
91/* Cache item format */
92struct flash_cache_item_tag {
93 u64 address;
94 u16 use_cnt;
95 u16 changed;
96 u8 *buf;
97};
98
99struct flash_cache_tag {
100 u32 cache_item_size; /* Size in bytes of each cache item */
101 u16 pages_per_item; /* How many NAND pages in each cache item */
102 u16 LRU; /* No. of the least recently used cache item */
103 struct flash_cache_item_tag array[CACHE_ITEM_NUM];
104};
105
106/*
107 *Data structure for each list node of the management table
108 * used for the Level 2 Cache. Each node maps one logical NAND block.
109 */
110struct spectra_l2_cache_list {
111 struct list_head list;
112 u32 logical_blk_num; /* Logical block number */
113 u32 pages_array[]; /* Page map array of this logical block.
114 * Array index is the logical block number,
115 * and for every item of this arry:
116 * high 16 bit is index of the L2 cache block num,
117 * low 16 bit is the phy page num
118 * of the above L2 cache block.
119 * This array will be kmalloc during run time.
120 */
121};
122
123struct spectra_l2_cache_info {
124 u32 blk_array[BLK_NUM_FOR_L2_CACHE];
125 u16 cur_blk_idx; /* idx to the phy block number of current using */
126 u16 cur_page_num; /* pages number of current using */
127 struct spectra_l2_cache_list table; /* First node of the table */
128};
129
130#define RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE 1
131
132#if RESTORE_CACHE_ON_CDMA_CHAIN_FAILURE
133struct flash_cache_mod_item_tag {
134 u64 address;
135 u8 changed;
136};
137
138struct flash_cache_delta_list_tag {
139 u8 item; /* used cache item */
140 struct flash_cache_mod_item_tag cache;
141};
142#endif
143
144extern struct flash_cache_tag Cache;
145
146extern u8 *buf_read_page_main_spare;
147extern u8 *buf_write_page_main_spare;
148extern u8 *buf_read_page_spare;
149extern u8 *buf_get_bad_block;
150extern u8 *cdma_desc_buf;
151extern u8 *memcp_desc_buf;
152
153/* struture used for IndentfyDevice function */
154struct spectra_indentfy_dev_tag {
155 u32 NumBlocks;
156 u16 PagesPerBlock;
157 u16 PageDataSize;
158 u16 wECCBytesPerSector;
159 u32 wDataBlockNum;
160};
161
162int GLOB_FTL_Flash_Init(void);
163int GLOB_FTL_Flash_Release(void);
164/*void GLOB_FTL_Erase_Flash(void);*/
165int GLOB_FTL_Block_Erase(u64 block_addr);
166int GLOB_FTL_Is_BadBlock(u32 block_num);
167int GLOB_FTL_IdentifyDevice(struct spectra_indentfy_dev_tag *dev_data);
168int GLOB_FTL_Event_Status(int *);
169u16 glob_ftl_execute_cmds(void);
170
171/*int FTL_Read_Disturbance(ADDRESSTYPE dwBlockAddr);*/
172int FTL_Read_Disturbance(u32 dwBlockAddr);
173
174/*Flash r/w based on cache*/
175int GLOB_FTL_Page_Read(u8 *read_data, u64 page_addr);
176int GLOB_FTL_Page_Write(u8 *write_data, u64 page_addr);
177int GLOB_FTL_Wear_Leveling(void);
178int GLOB_FTL_Flash_Format(void);
179int GLOB_FTL_Init(void);
180int GLOB_FTL_Flush_Cache(void);
181int GLOB_FTL_Garbage_Collection(void);
182int GLOB_FTL_BT_Garbage_Collection(void);
183void GLOB_FTL_Cache_Release(void);
184u8 *get_blk_table_start_addr(void);
185u8 *get_wear_leveling_table_start_addr(void);
186unsigned long get_blk_table_len(void);
187unsigned long get_wear_leveling_table_len(void);
188
189#if DEBUG_BNDRY
190void debug_boundary_lineno_error(int chnl, int limit, int no, int lineno,
191 char *filename);
192#define debug_boundary_error(chnl, limit, no) debug_boundary_lineno_error(chnl,\
193 limit, no, __LINE__, __FILE__)
194#else
195#define debug_boundary_error(chnl, limit, no) ;
196#endif
197
198#endif /*_FLASH_INTERFACE_*/
diff --git a/drivers/staging/spectra/lld.c b/drivers/staging/spectra/lld.c
deleted file mode 100644
index 5c3b9762dc3e..000000000000
--- a/drivers/staging/spectra/lld.c
+++ /dev/null
@@ -1,339 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include "spectraswconfig.h"
21#include "ffsport.h"
22#include "ffsdefs.h"
23#include "lld.h"
24#include "lld_nand.h"
25
26/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
27#if FLASH_EMU /* vector all the LLD calls to the LLD_EMU code */
28#include "lld_emu.h"
29#include "lld_cdma.h"
30
31/* common functions: */
32u16 GLOB_LLD_Flash_Reset(void)
33{
34 return emu_Flash_Reset();
35}
36
37u16 GLOB_LLD_Read_Device_ID(void)
38{
39 return emu_Read_Device_ID();
40}
41
42int GLOB_LLD_Flash_Release(void)
43{
44 return emu_Flash_Release();
45}
46
47u16 GLOB_LLD_Flash_Init(void)
48{
49 return emu_Flash_Init();
50}
51
52u16 GLOB_LLD_Erase_Block(u32 block_add)
53{
54 return emu_Erase_Block(block_add);
55}
56
57u16 GLOB_LLD_Write_Page_Main(u8 *write_data, u32 block, u16 Page,
58 u16 PageCount)
59{
60 return emu_Write_Page_Main(write_data, block, Page, PageCount);
61}
62
63u16 GLOB_LLD_Read_Page_Main(u8 *read_data, u32 block, u16 Page,
64 u16 PageCount)
65{
66 return emu_Read_Page_Main(read_data, block, Page, PageCount);
67}
68
69u16 GLOB_LLD_Read_Page_Main_Polling(u8 *read_data,
70 u32 block, u16 page, u16 page_count)
71{
72 return emu_Read_Page_Main(read_data, block, page, page_count);
73}
74
75u16 GLOB_LLD_Write_Page_Main_Spare(u8 *write_data, u32 block,
76 u16 Page, u16 PageCount)
77{
78 return emu_Write_Page_Main_Spare(write_data, block, Page, PageCount);
79}
80
81u16 GLOB_LLD_Read_Page_Main_Spare(u8 *read_data, u32 block,
82 u16 Page, u16 PageCount)
83{
84 return emu_Read_Page_Main_Spare(read_data, block, Page, PageCount);
85}
86
87u16 GLOB_LLD_Write_Page_Spare(u8 *write_data, u32 block, u16 Page,
88 u16 PageCount)
89{
90 return emu_Write_Page_Spare(write_data, block, Page, PageCount);
91}
92
93u16 GLOB_LLD_Read_Page_Spare(u8 *read_data, u32 block, u16 Page,
94 u16 PageCount)
95{
96 return emu_Read_Page_Spare(read_data, block, Page, PageCount);
97}
98
99u16 GLOB_LLD_Get_Bad_Block(u32 block)
100{
101 return emu_Get_Bad_Block(block);
102}
103
104#endif /* FLASH_EMU */
105
106/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
107#if FLASH_MTD /* vector all the LLD calls to the LLD_MTD code */
108#include "lld_mtd.h"
109#include "lld_cdma.h"
110
111/* common functions: */
112u16 GLOB_LLD_Flash_Reset(void)
113{
114 return mtd_Flash_Reset();
115}
116
117u16 GLOB_LLD_Read_Device_ID(void)
118{
119 return mtd_Read_Device_ID();
120}
121
122int GLOB_LLD_Flash_Release(void)
123{
124 return mtd_Flash_Release();
125}
126
127u16 GLOB_LLD_Flash_Init(void)
128{
129 return mtd_Flash_Init();
130}
131
132u16 GLOB_LLD_Erase_Block(u32 block_add)
133{
134 return mtd_Erase_Block(block_add);
135}
136
137u16 GLOB_LLD_Write_Page_Main(u8 *write_data, u32 block, u16 Page,
138 u16 PageCount)
139{
140 return mtd_Write_Page_Main(write_data, block, Page, PageCount);
141}
142
143u16 GLOB_LLD_Read_Page_Main(u8 *read_data, u32 block, u16 Page,
144 u16 PageCount)
145{
146 return mtd_Read_Page_Main(read_data, block, Page, PageCount);
147}
148
149u16 GLOB_LLD_Read_Page_Main_Polling(u8 *read_data,
150 u32 block, u16 page, u16 page_count)
151{
152 return mtd_Read_Page_Main(read_data, block, page, page_count);
153}
154
155u16 GLOB_LLD_Write_Page_Main_Spare(u8 *write_data, u32 block,
156 u16 Page, u16 PageCount)
157{
158 return mtd_Write_Page_Main_Spare(write_data, block, Page, PageCount);
159}
160
161u16 GLOB_LLD_Read_Page_Main_Spare(u8 *read_data, u32 block,
162 u16 Page, u16 PageCount)
163{
164 return mtd_Read_Page_Main_Spare(read_data, block, Page, PageCount);
165}
166
167u16 GLOB_LLD_Write_Page_Spare(u8 *write_data, u32 block, u16 Page,
168 u16 PageCount)
169{
170 return mtd_Write_Page_Spare(write_data, block, Page, PageCount);
171}
172
173u16 GLOB_LLD_Read_Page_Spare(u8 *read_data, u32 block, u16 Page,
174 u16 PageCount)
175{
176 return mtd_Read_Page_Spare(read_data, block, Page, PageCount);
177}
178
179u16 GLOB_LLD_Get_Bad_Block(u32 block)
180{
181 return mtd_Get_Bad_Block(block);
182}
183
184#endif /* FLASH_MTD */
185
186/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
187#if FLASH_NAND /* vector all the LLD calls to the NAND controller code */
188#include "lld_nand.h"
189#include "lld_cdma.h"
190#include "flash.h"
191
192/* common functions for LLD_NAND */
193void GLOB_LLD_ECC_Control(int enable)
194{
195 NAND_ECC_Ctrl(enable);
196}
197
198/* common functions for LLD_NAND */
199u16 GLOB_LLD_Flash_Reset(void)
200{
201 return NAND_Flash_Reset();
202}
203
204u16 GLOB_LLD_Read_Device_ID(void)
205{
206 return NAND_Read_Device_ID();
207}
208
209u16 GLOB_LLD_UnlockArrayAll(void)
210{
211 return NAND_UnlockArrayAll();
212}
213
214u16 GLOB_LLD_Flash_Init(void)
215{
216 return NAND_Flash_Init();
217}
218
219int GLOB_LLD_Flash_Release(void)
220{
221 return nand_release_spectra();
222}
223
224u16 GLOB_LLD_Erase_Block(u32 block_add)
225{
226 return NAND_Erase_Block(block_add);
227}
228
229
230u16 GLOB_LLD_Write_Page_Main(u8 *write_data, u32 block, u16 Page,
231 u16 PageCount)
232{
233 return NAND_Write_Page_Main(write_data, block, Page, PageCount);
234}
235
236u16 GLOB_LLD_Read_Page_Main(u8 *read_data, u32 block, u16 page,
237 u16 page_count)
238{
239 if (page_count == 1) /* Using polling to improve read speed */
240 return NAND_Read_Page_Main_Polling(read_data, block, page, 1);
241 else
242 return NAND_Read_Page_Main(read_data, block, page, page_count);
243}
244
245u16 GLOB_LLD_Read_Page_Main_Polling(u8 *read_data,
246 u32 block, u16 page, u16 page_count)
247{
248 return NAND_Read_Page_Main_Polling(read_data,
249 block, page, page_count);
250}
251
252u16 GLOB_LLD_Write_Page_Main_Spare(u8 *write_data, u32 block,
253 u16 Page, u16 PageCount)
254{
255 return NAND_Write_Page_Main_Spare(write_data, block, Page, PageCount);
256}
257
258u16 GLOB_LLD_Write_Page_Spare(u8 *write_data, u32 block, u16 Page,
259 u16 PageCount)
260{
261 return NAND_Write_Page_Spare(write_data, block, Page, PageCount);
262}
263
264u16 GLOB_LLD_Read_Page_Main_Spare(u8 *read_data, u32 block,
265 u16 page, u16 page_count)
266{
267 return NAND_Read_Page_Main_Spare(read_data, block, page, page_count);
268}
269
270u16 GLOB_LLD_Read_Page_Spare(u8 *read_data, u32 block, u16 Page,
271 u16 PageCount)
272{
273 return NAND_Read_Page_Spare(read_data, block, Page, PageCount);
274}
275
276u16 GLOB_LLD_Get_Bad_Block(u32 block)
277{
278 return NAND_Get_Bad_Block(block);
279}
280
281#if CMD_DMA
282u16 GLOB_LLD_Event_Status(void)
283{
284 return CDMA_Event_Status();
285}
286
287u16 glob_lld_execute_cmds(void)
288{
289 return CDMA_Execute_CMDs();
290}
291
292u16 GLOB_LLD_MemCopy_CMD(u8 *dest, u8 *src,
293 u32 ByteCount, u16 flag)
294{
295 /* Replace the hardware memcopy with software memcpy function */
296 if (CDMA_Execute_CMDs())
297 return FAIL;
298 memcpy(dest, src, ByteCount);
299 return PASS;
300
301 /* return CDMA_MemCopy_CMD(dest, src, ByteCount, flag); */
302}
303
304u16 GLOB_LLD_Erase_Block_cdma(u32 block, u16 flags)
305{
306 return CDMA_Data_CMD(ERASE_CMD, 0, block, 0, 0, flags);
307}
308
309u16 GLOB_LLD_Write_Page_Main_cdma(u8 *data, u32 block, u16 page, u16 count)
310{
311 return CDMA_Data_CMD(WRITE_MAIN_CMD, data, block, page, count, 0);
312}
313
314u16 GLOB_LLD_Read_Page_Main_cdma(u8 *data, u32 block, u16 page,
315 u16 count, u16 flags)
316{
317 return CDMA_Data_CMD(READ_MAIN_CMD, data, block, page, count, flags);
318}
319
320u16 GLOB_LLD_Write_Page_Main_Spare_cdma(u8 *data, u32 block, u16 page,
321 u16 count, u16 flags)
322{
323 return CDMA_Data_CMD(WRITE_MAIN_SPARE_CMD,
324 data, block, page, count, flags);
325}
326
327u16 GLOB_LLD_Read_Page_Main_Spare_cdma(u8 *data,
328 u32 block, u16 page, u16 count)
329{
330 return CDMA_Data_CMD(READ_MAIN_SPARE_CMD, data, block, page, count,
331 LLD_CMD_FLAG_MODE_CDMA);
332}
333
334#endif /* CMD_DMA */
335#endif /* FLASH_NAND */
336
337/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
338
339/* end of LLD.c */
diff --git a/drivers/staging/spectra/lld.h b/drivers/staging/spectra/lld.h
deleted file mode 100644
index d3738e0e1fea..000000000000
--- a/drivers/staging/spectra/lld.h
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20
21
22#ifndef _LLD_
23#define _LLD_
24
25#include "ffsport.h"
26#include "spectraswconfig.h"
27#include "flash.h"
28
29#define GOOD_BLOCK 0
30#define DEFECTIVE_BLOCK 1
31#define READ_ERROR 2
32
33#define CLK_X 5
34#define CLK_MULTI 4
35
36/* Typedefs */
37
38/* prototypes: API for LLD */
39/* Currently, Write_Page_Main
40 * MemCopy
41 * Read_Page_Main_Spare
42 * do not have flag because they were not implemented prior to this
43 * They are not being added to keep changes to a minimum for now.
44 * Currently, they are not required (only reqd for Wr_P_M_S.)
45 * Later on, these NEED to be changed.
46 */
47
48extern void GLOB_LLD_ECC_Control(int enable);
49
50extern u16 GLOB_LLD_Flash_Reset(void);
51
52extern u16 GLOB_LLD_Read_Device_ID(void);
53
54extern u16 GLOB_LLD_UnlockArrayAll(void);
55
56extern u16 GLOB_LLD_Flash_Init(void);
57
58extern int GLOB_LLD_Flash_Release(void);
59
60extern u16 GLOB_LLD_Erase_Block(u32 block_add);
61
62extern u16 GLOB_LLD_Write_Page_Main(u8 *write_data,
63 u32 block, u16 Page, u16 PageCount);
64
65extern u16 GLOB_LLD_Read_Page_Main(u8 *read_data,
66 u32 block, u16 page, u16 page_count);
67
68extern u16 GLOB_LLD_Read_Page_Main_Polling(u8 *read_data,
69 u32 block, u16 page, u16 page_count);
70
71extern u16 GLOB_LLD_Write_Page_Main_Spare(u8 *write_data,
72 u32 block, u16 Page, u16 PageCount);
73
74extern u16 GLOB_LLD_Write_Page_Spare(u8 *write_data,
75 u32 block, u16 Page, u16 PageCount);
76
77extern u16 GLOB_LLD_Read_Page_Main_Spare(u8 *read_data,
78 u32 block, u16 page, u16 page_count);
79
80extern u16 GLOB_LLD_Read_Page_Spare(u8 *read_data,
81 u32 block, u16 Page, u16 PageCount);
82
83extern u16 GLOB_LLD_Get_Bad_Block(u32 block);
84
85extern u16 GLOB_LLD_Event_Status(void);
86
87extern u16 GLOB_LLD_MemCopy_CMD(u8 *dest, u8 *src, u32 ByteCount, u16 flag);
88
89extern u16 glob_lld_execute_cmds(void);
90
91extern u16 GLOB_LLD_Erase_Block_cdma(u32 block, u16 flags);
92
93extern u16 GLOB_LLD_Write_Page_Main_cdma(u8 *data,
94 u32 block, u16 page, u16 count);
95
96extern u16 GLOB_LLD_Read_Page_Main_cdma(u8 *data,
97 u32 block, u16 page, u16 count, u16 flags);
98
99extern u16 GLOB_LLD_Write_Page_Main_Spare_cdma(u8 *data,
100 u32 block, u16 page, u16 count, u16 flags);
101
102extern u16 GLOB_LLD_Read_Page_Main_Spare_cdma(u8 *data,
103 u32 block, u16 page, u16 count);
104
105#define LLD_CMD_FLAG_ORDER_BEFORE_REST (0x1)
106#define LLD_CMD_FLAG_MODE_CDMA (0x8)
107
108
109#endif /*_LLD_ */
110
111
diff --git a/drivers/staging/spectra/lld_cdma.c b/drivers/staging/spectra/lld_cdma.c
deleted file mode 100644
index c6e76103d43c..000000000000
--- a/drivers/staging/spectra/lld_cdma.c
+++ /dev/null
@@ -1,910 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include <linux/fs.h>
21#include <linux/slab.h>
22
23#include "spectraswconfig.h"
24#include "lld.h"
25#include "lld_nand.h"
26#include "lld_cdma.h"
27#include "lld_emu.h"
28#include "flash.h"
29#include "nand_regs.h"
30
31#define MAX_PENDING_CMDS 4
32#define MODE_02 (0x2 << 26)
33
34/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
35* Function: CDMA_Data_Cmd
36* Inputs: cmd code (aligned for hw)
37* data: pointer to source or destination
38* block: block address
39* page: page address
40* num: num pages to transfer
41* Outputs: PASS
42* Description: This function takes the parameters and puts them
43* into the "pending commands" array.
44* It does not parse or validate the parameters.
45* The array index is same as the tag.
46*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
47u16 CDMA_Data_CMD(u8 cmd, u8 *data, u32 block, u16 page, u16 num, u16 flags)
48{
49 u8 bank;
50
51 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
52 __FILE__, __LINE__, __func__);
53
54 if (0 == cmd)
55 nand_dbg_print(NAND_DBG_DEBUG,
56 "%s, Line %d, Illegal cmd (0)\n", __FILE__, __LINE__);
57
58 /* If a command of another bank comes, then first execute */
59 /* pending commands of the current bank, then set the new */
60 /* bank as current bank */
61 bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
62 if (bank != info.flash_bank) {
63 nand_dbg_print(NAND_DBG_WARN,
64 "Will access new bank. old bank: %d, new bank: %d\n",
65 info.flash_bank, bank);
66 if (CDMA_Execute_CMDs()) {
67 printk(KERN_ERR "CDMA_Execute_CMDs fail!\n");
68 return FAIL;
69 }
70 info.flash_bank = bank;
71 }
72
73 info.pcmds[info.pcmds_num].CMD = cmd;
74 info.pcmds[info.pcmds_num].DataAddr = data;
75 info.pcmds[info.pcmds_num].Block = block;
76 info.pcmds[info.pcmds_num].Page = page;
77 info.pcmds[info.pcmds_num].PageCount = num;
78 info.pcmds[info.pcmds_num].DataDestAddr = 0;
79 info.pcmds[info.pcmds_num].DataSrcAddr = 0;
80 info.pcmds[info.pcmds_num].MemCopyByteCnt = 0;
81 info.pcmds[info.pcmds_num].Flags = flags;
82 info.pcmds[info.pcmds_num].Status = 0xB0B;
83
84 switch (cmd) {
85 case WRITE_MAIN_SPARE_CMD:
86 Conv_Main_Spare_Data_Log2Phy_Format(data, num);
87 break;
88 case WRITE_SPARE_CMD:
89 Conv_Spare_Data_Log2Phy_Format(data);
90 break;
91 default:
92 break;
93 }
94
95 info.pcmds_num++;
96
97 if (info.pcmds_num >= MAX_PENDING_CMDS) {
98 if (CDMA_Execute_CMDs()) {
99 printk(KERN_ERR "CDMA_Execute_CMDs fail!\n");
100 return FAIL;
101 }
102 }
103
104 return PASS;
105}
106
107/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
108* Function: CDMA_MemCopy_CMD
109* Inputs: dest: pointer to destination
110* src: pointer to source
111* count: num bytes to transfer
112* Outputs: PASS
113* Description: This function takes the parameters and puts them
114* into the "pending commands" array.
115* It does not parse or validate the parameters.
116* The array index is same as the tag.
117*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
118u16 CDMA_MemCopy_CMD(u8 *dest, u8 *src, u32 byte_cnt, u16 flags)
119{
120 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
121 __FILE__, __LINE__, __func__);
122
123 info.pcmds[info.pcmds_num].CMD = MEMCOPY_CMD;
124 info.pcmds[info.pcmds_num].DataAddr = 0;
125 info.pcmds[info.pcmds_num].Block = 0;
126 info.pcmds[info.pcmds_num].Page = 0;
127 info.pcmds[info.pcmds_num].PageCount = 0;
128 info.pcmds[info.pcmds_num].DataDestAddr = dest;
129 info.pcmds[info.pcmds_num].DataSrcAddr = src;
130 info.pcmds[info.pcmds_num].MemCopyByteCnt = byte_cnt;
131 info.pcmds[info.pcmds_num].Flags = flags;
132 info.pcmds[info.pcmds_num].Status = 0xB0B;
133
134 info.pcmds_num++;
135
136 if (info.pcmds_num >= MAX_PENDING_CMDS) {
137 if (CDMA_Execute_CMDs()) {
138 printk(KERN_ERR "CDMA_Execute_CMDs fail!\n");
139 return FAIL;
140 }
141 }
142
143 return PASS;
144}
145
146#if 0
147/* Prints the PendingCMDs array */
148void print_pending_cmds(void)
149{
150 u16 i;
151
152 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
153 __FILE__, __LINE__, __func__);
154
155 for (i = 0; i < info.pcmds_num; i++) {
156 nand_dbg_print(NAND_DBG_DEBUG, "\ni: %d\n", i);
157 switch (info.pcmds[i].CMD) {
158 case ERASE_CMD:
159 nand_dbg_print(NAND_DBG_DEBUG,
160 "Erase Command (0x%x)\n",
161 info.pcmds[i].CMD);
162 break;
163 case WRITE_MAIN_CMD:
164 nand_dbg_print(NAND_DBG_DEBUG,
165 "Write Main Command (0x%x)\n",
166 info.pcmds[i].CMD);
167 break;
168 case WRITE_MAIN_SPARE_CMD:
169 nand_dbg_print(NAND_DBG_DEBUG,
170 "Write Main Spare Command (0x%x)\n",
171 info.pcmds[i].CMD);
172 break;
173 case READ_MAIN_SPARE_CMD:
174 nand_dbg_print(NAND_DBG_DEBUG,
175 "Read Main Spare Command (0x%x)\n",
176 info.pcmds[i].CMD);
177 break;
178 case READ_MAIN_CMD:
179 nand_dbg_print(NAND_DBG_DEBUG,
180 "Read Main Command (0x%x)\n",
181 info.pcmds[i].CMD);
182 break;
183 case MEMCOPY_CMD:
184 nand_dbg_print(NAND_DBG_DEBUG,
185 "Memcopy Command (0x%x)\n",
186 info.pcmds[i].CMD);
187 break;
188 case DUMMY_CMD:
189 nand_dbg_print(NAND_DBG_DEBUG,
190 "Dummy Command (0x%x)\n",
191 info.pcmds[i].CMD);
192 break;
193 default:
194 nand_dbg_print(NAND_DBG_DEBUG,
195 "Illegal Command (0x%x)\n",
196 info.pcmds[i].CMD);
197 break;
198 }
199
200 nand_dbg_print(NAND_DBG_DEBUG, "DataAddr: 0x%x\n",
201 (u32)info.pcmds[i].DataAddr);
202 nand_dbg_print(NAND_DBG_DEBUG, "Block: %d\n",
203 info.pcmds[i].Block);
204 nand_dbg_print(NAND_DBG_DEBUG, "Page: %d\n",
205 info.pcmds[i].Page);
206 nand_dbg_print(NAND_DBG_DEBUG, "PageCount: %d\n",
207 info.pcmds[i].PageCount);
208 nand_dbg_print(NAND_DBG_DEBUG, "DataDestAddr: 0x%x\n",
209 (u32)info.pcmds[i].DataDestAddr);
210 nand_dbg_print(NAND_DBG_DEBUG, "DataSrcAddr: 0x%x\n",
211 (u32)info.pcmds[i].DataSrcAddr);
212 nand_dbg_print(NAND_DBG_DEBUG, "MemCopyByteCnt: %d\n",
213 info.pcmds[i].MemCopyByteCnt);
214 nand_dbg_print(NAND_DBG_DEBUG, "Flags: 0x%x\n",
215 info.pcmds[i].Flags);
216 nand_dbg_print(NAND_DBG_DEBUG, "Status: 0x%x\n",
217 info.pcmds[i].Status);
218 }
219}
220
221/* Print the CDMA descriptors */
222void print_cdma_descriptors(void)
223{
224 struct cdma_descriptor *pc;
225 int i;
226
227 pc = (struct cdma_descriptor *)info.cdma_desc_buf;
228
229 nand_dbg_print(NAND_DBG_DEBUG, "\nWill dump cdma descriptors:\n");
230
231 for (i = 0; i < info.cdma_num; i++) {
232 nand_dbg_print(NAND_DBG_DEBUG, "\ni: %d\n", i);
233 nand_dbg_print(NAND_DBG_DEBUG,
234 "NxtPointerHi: 0x%x, NxtPointerLo: 0x%x\n",
235 pc[i].NxtPointerHi, pc[i].NxtPointerLo);
236 nand_dbg_print(NAND_DBG_DEBUG,
237 "FlashPointerHi: 0x%x, FlashPointerLo: 0x%x\n",
238 pc[i].FlashPointerHi, pc[i].FlashPointerLo);
239 nand_dbg_print(NAND_DBG_DEBUG, "CommandType: 0x%x\n",
240 pc[i].CommandType);
241 nand_dbg_print(NAND_DBG_DEBUG,
242 "MemAddrHi: 0x%x, MemAddrLo: 0x%x\n",
243 pc[i].MemAddrHi, pc[i].MemAddrLo);
244 nand_dbg_print(NAND_DBG_DEBUG, "CommandFlags: 0x%x\n",
245 pc[i].CommandFlags);
246 nand_dbg_print(NAND_DBG_DEBUG, "Channel: %d, Status: 0x%x\n",
247 pc[i].Channel, pc[i].Status);
248 nand_dbg_print(NAND_DBG_DEBUG,
249 "MemCopyPointerHi: 0x%x, MemCopyPointerLo: 0x%x\n",
250 pc[i].MemCopyPointerHi, pc[i].MemCopyPointerLo);
251 nand_dbg_print(NAND_DBG_DEBUG,
252 "Reserved12: 0x%x, Reserved13: 0x%x, "
253 "Reserved14: 0x%x, pcmd: %d\n",
254 pc[i].Reserved12, pc[i].Reserved13,
255 pc[i].Reserved14, pc[i].pcmd);
256 }
257}
258
259/* Print the Memory copy descriptors */
260static void print_memcp_descriptors(void)
261{
262 struct memcpy_descriptor *pm;
263 int i;
264
265 pm = (struct memcpy_descriptor *)info.memcp_desc_buf;
266
267 nand_dbg_print(NAND_DBG_DEBUG, "\nWill dump mem_cpy descriptors:\n");
268
269 for (i = 0; i < info.cdma_num; i++) {
270 nand_dbg_print(NAND_DBG_DEBUG, "\ni: %d\n", i);
271 nand_dbg_print(NAND_DBG_DEBUG,
272 "NxtPointerHi: 0x%x, NxtPointerLo: 0x%x\n",
273 pm[i].NxtPointerHi, pm[i].NxtPointerLo);
274 nand_dbg_print(NAND_DBG_DEBUG,
275 "SrcAddrHi: 0x%x, SrcAddrLo: 0x%x\n",
276 pm[i].SrcAddrHi, pm[i].SrcAddrLo);
277 nand_dbg_print(NAND_DBG_DEBUG,
278 "DestAddrHi: 0x%x, DestAddrLo: 0x%x\n",
279 pm[i].DestAddrHi, pm[i].DestAddrLo);
280 nand_dbg_print(NAND_DBG_DEBUG, "XferSize: %d\n",
281 pm[i].XferSize);
282 nand_dbg_print(NAND_DBG_DEBUG, "MemCopyFlags: 0x%x\n",
283 pm[i].MemCopyFlags);
284 nand_dbg_print(NAND_DBG_DEBUG, "MemCopyStatus: %d\n",
285 pm[i].MemCopyStatus);
286 nand_dbg_print(NAND_DBG_DEBUG, "reserved9: 0x%x\n",
287 pm[i].reserved9);
288 nand_dbg_print(NAND_DBG_DEBUG, "reserved10: 0x%x\n",
289 pm[i].reserved10);
290 nand_dbg_print(NAND_DBG_DEBUG, "reserved11: 0x%x\n",
291 pm[i].reserved11);
292 nand_dbg_print(NAND_DBG_DEBUG, "reserved12: 0x%x\n",
293 pm[i].reserved12);
294 nand_dbg_print(NAND_DBG_DEBUG, "reserved13: 0x%x\n",
295 pm[i].reserved13);
296 nand_dbg_print(NAND_DBG_DEBUG, "reserved14: 0x%x\n",
297 pm[i].reserved14);
298 nand_dbg_print(NAND_DBG_DEBUG, "reserved15: 0x%x\n",
299 pm[i].reserved15);
300 }
301}
302#endif
303
304/* Reset cdma_descriptor chain to 0 */
305static void reset_cdma_desc(int i)
306{
307 struct cdma_descriptor *ptr;
308
309 BUG_ON(i >= MAX_DESCS);
310
311 ptr = (struct cdma_descriptor *)info.cdma_desc_buf;
312
313 ptr[i].NxtPointerHi = 0;
314 ptr[i].NxtPointerLo = 0;
315 ptr[i].FlashPointerHi = 0;
316 ptr[i].FlashPointerLo = 0;
317 ptr[i].CommandType = 0;
318 ptr[i].MemAddrHi = 0;
319 ptr[i].MemAddrLo = 0;
320 ptr[i].CommandFlags = 0;
321 ptr[i].Channel = 0;
322 ptr[i].Status = 0;
323 ptr[i].MemCopyPointerHi = 0;
324 ptr[i].MemCopyPointerLo = 0;
325}
326
327/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
328* Function: CDMA_UpdateEventStatus
329* Inputs: none
330* Outputs: none
331* Description: This function update the event status of all the channels
332* when an error condition is reported.
333*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
334void CDMA_UpdateEventStatus(void)
335{
336 int i, j, active_chan;
337 struct cdma_descriptor *ptr;
338
339 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
340 __FILE__, __LINE__, __func__);
341
342 ptr = (struct cdma_descriptor *)info.cdma_desc_buf;
343
344 for (j = 0; j < info.cdma_num; j++) {
345 /* Check for the descriptor with failure */
346 if ((ptr[j].Status & CMD_DMA_DESC_FAIL))
347 break;
348
349 }
350
351 /* All the previous cmd's status for this channel must be good */
352 for (i = 0; i < j; i++) {
353 if (ptr[i].pcmd != 0xff)
354 info.pcmds[ptr[i].pcmd].Status = CMD_PASS;
355 }
356
357 /* Abort the channel with type 0 reset command. It resets the */
358 /* selected channel after the descriptor completes the flash */
359 /* operation and status has been updated for the descriptor. */
360 /* Memory Copy and Sync associated with this descriptor will */
361 /* not be executed */
362 active_chan = ioread32(FlashReg + CHNL_ACTIVE);
363 if ((active_chan & (1 << info.flash_bank)) == (1 << info.flash_bank)) {
364 iowrite32(MODE_02 | (0 << 4), FlashMem); /* Type 0 reset */
365 iowrite32((0xF << 4) | info.flash_bank, FlashMem + 0x10);
366 } else { /* Should not reached here */
367 printk(KERN_ERR "Error! Used bank is not set in"
368 " reg CHNL_ACTIVE\n");
369 }
370}
371
372static void cdma_trans(u16 chan)
373{
374 u32 addr;
375
376 addr = info.cdma_desc;
377
378 iowrite32(MODE_10 | (chan << 24), FlashMem);
379 iowrite32((1 << 7) | chan, FlashMem + 0x10);
380
381 iowrite32(MODE_10 | (chan << 24) | ((0x0FFFF & (addr >> 16)) << 8),
382 FlashMem);
383 iowrite32((1 << 7) | (1 << 4) | 0, FlashMem + 0x10);
384
385 iowrite32(MODE_10 | (chan << 24) | ((0x0FFFF & addr) << 8), FlashMem);
386 iowrite32((1 << 7) | (1 << 5) | 0, FlashMem + 0x10);
387
388 iowrite32(MODE_10 | (chan << 24), FlashMem);
389 iowrite32((1 << 7) | (1 << 5) | (1 << 4) | 0, FlashMem + 0x10);
390}
391
392/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
393* Function: CDMA_Execute_CMDs (for use with CMD_DMA)
394* Inputs: tag_count: the number of pending cmds to do
395* Outputs: PASS/FAIL
396* Description: Build the SDMA chain(s) by making one CMD-DMA descriptor
397* for each pending command, start the CDMA engine, and return.
398*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
399u16 CDMA_Execute_CMDs(void)
400{
401 int i, ret;
402 u64 flash_add;
403 u32 ptr;
404 dma_addr_t map_addr, next_ptr;
405 u16 status = PASS;
406 u16 tmp_c;
407 struct cdma_descriptor *pc;
408 struct memcpy_descriptor *pm;
409
410 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
411 __FILE__, __LINE__, __func__);
412
413 /* No pending cmds to execute, just exit */
414 if (0 == info.pcmds_num) {
415 nand_dbg_print(NAND_DBG_TRACE,
416 "No pending cmds to execute. Just exit.\n");
417 return PASS;
418 }
419
420 for (i = 0; i < MAX_DESCS; i++)
421 reset_cdma_desc(i);
422
423 pc = (struct cdma_descriptor *)info.cdma_desc_buf;
424 pm = (struct memcpy_descriptor *)info.memcp_desc_buf;
425
426 info.cdma_desc = virt_to_bus(info.cdma_desc_buf);
427 info.memcp_desc = virt_to_bus(info.memcp_desc_buf);
428 next_ptr = info.cdma_desc;
429 info.cdma_num = 0;
430
431 for (i = 0; i < info.pcmds_num; i++) {
432 if (info.pcmds[i].Block >= DeviceInfo.wTotalBlocks) {
433 info.pcmds[i].Status = CMD_NOT_DONE;
434 continue;
435 }
436
437 next_ptr += sizeof(struct cdma_descriptor);
438 pc[info.cdma_num].NxtPointerHi = next_ptr >> 16;
439 pc[info.cdma_num].NxtPointerLo = next_ptr & 0xffff;
440
441 /* Use the Block offset within a bank */
442 tmp_c = info.pcmds[i].Block /
443 (DeviceInfo.wTotalBlocks / totalUsedBanks);
444 flash_add = (u64)(info.pcmds[i].Block - tmp_c *
445 (DeviceInfo.wTotalBlocks / totalUsedBanks)) *
446 DeviceInfo.wBlockDataSize +
447 (u64)(info.pcmds[i].Page) *
448 DeviceInfo.wPageDataSize;
449
450 ptr = MODE_10 | (info.flash_bank << 24) |
451 (u32)GLOB_u64_Div(flash_add,
452 DeviceInfo.wPageDataSize);
453 pc[info.cdma_num].FlashPointerHi = ptr >> 16;
454 pc[info.cdma_num].FlashPointerLo = ptr & 0xffff;
455
456 if ((info.pcmds[i].CMD == WRITE_MAIN_SPARE_CMD) ||
457 (info.pcmds[i].CMD == READ_MAIN_SPARE_CMD)) {
458 /* Descriptor to set Main+Spare Access Mode */
459 pc[info.cdma_num].CommandType = 0x43;
460 pc[info.cdma_num].CommandFlags =
461 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
462 pc[info.cdma_num].MemAddrHi = 0;
463 pc[info.cdma_num].MemAddrLo = 0;
464 pc[info.cdma_num].Channel = 0;
465 pc[info.cdma_num].Status = 0;
466 pc[info.cdma_num].pcmd = i;
467
468 info.cdma_num++;
469 BUG_ON(info.cdma_num >= MAX_DESCS);
470
471 reset_cdma_desc(info.cdma_num);
472 next_ptr += sizeof(struct cdma_descriptor);
473 pc[info.cdma_num].NxtPointerHi = next_ptr >> 16;
474 pc[info.cdma_num].NxtPointerLo = next_ptr & 0xffff;
475 pc[info.cdma_num].FlashPointerHi = ptr >> 16;
476 pc[info.cdma_num].FlashPointerLo = ptr & 0xffff;
477 }
478
479 switch (info.pcmds[i].CMD) {
480 case ERASE_CMD:
481 pc[info.cdma_num].CommandType = 1;
482 pc[info.cdma_num].CommandFlags =
483 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
484 pc[info.cdma_num].MemAddrHi = 0;
485 pc[info.cdma_num].MemAddrLo = 0;
486 break;
487
488 case WRITE_MAIN_CMD:
489 pc[info.cdma_num].CommandType =
490 0x2100 | info.pcmds[i].PageCount;
491 pc[info.cdma_num].CommandFlags =
492 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
493 map_addr = virt_to_bus(info.pcmds[i].DataAddr);
494 pc[info.cdma_num].MemAddrHi = map_addr >> 16;
495 pc[info.cdma_num].MemAddrLo = map_addr & 0xffff;
496 break;
497
498 case READ_MAIN_CMD:
499 pc[info.cdma_num].CommandType =
500 0x2000 | info.pcmds[i].PageCount;
501 pc[info.cdma_num].CommandFlags =
502 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
503 map_addr = virt_to_bus(info.pcmds[i].DataAddr);
504 pc[info.cdma_num].MemAddrHi = map_addr >> 16;
505 pc[info.cdma_num].MemAddrLo = map_addr & 0xffff;
506 break;
507
508 case WRITE_MAIN_SPARE_CMD:
509 pc[info.cdma_num].CommandType =
510 0x2100 | info.pcmds[i].PageCount;
511 pc[info.cdma_num].CommandFlags =
512 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
513 map_addr = virt_to_bus(info.pcmds[i].DataAddr);
514 pc[info.cdma_num].MemAddrHi = map_addr >> 16;
515 pc[info.cdma_num].MemAddrLo = map_addr & 0xffff;
516 break;
517
518 case READ_MAIN_SPARE_CMD:
519 pc[info.cdma_num].CommandType =
520 0x2000 | info.pcmds[i].PageCount;
521 pc[info.cdma_num].CommandFlags =
522 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
523 map_addr = virt_to_bus(info.pcmds[i].DataAddr);
524 pc[info.cdma_num].MemAddrHi = map_addr >> 16;
525 pc[info.cdma_num].MemAddrLo = map_addr & 0xffff;
526 break;
527
528 case MEMCOPY_CMD:
529 pc[info.cdma_num].CommandType = 0xFFFF; /* NOP cmd */
530 /* Set bit 11 to let the CDMA engine continue to */
531 /* execute only after it has finished processing */
532 /* the memcopy descriptor. */
533 /* Also set bit 10 and bit 9 to 1 */
534 pc[info.cdma_num].CommandFlags = 0x0E40;
535 map_addr = info.memcp_desc + info.cdma_num *
536 sizeof(struct memcpy_descriptor);
537 pc[info.cdma_num].MemCopyPointerHi = map_addr >> 16;
538 pc[info.cdma_num].MemCopyPointerLo = map_addr & 0xffff;
539
540 pm[info.cdma_num].NxtPointerHi = 0;
541 pm[info.cdma_num].NxtPointerLo = 0;
542
543 map_addr = virt_to_bus(info.pcmds[i].DataSrcAddr);
544 pm[info.cdma_num].SrcAddrHi = map_addr >> 16;
545 pm[info.cdma_num].SrcAddrLo = map_addr & 0xffff;
546 map_addr = virt_to_bus(info.pcmds[i].DataDestAddr);
547 pm[info.cdma_num].DestAddrHi = map_addr >> 16;
548 pm[info.cdma_num].DestAddrLo = map_addr & 0xffff;
549
550 pm[info.cdma_num].XferSize =
551 info.pcmds[i].MemCopyByteCnt;
552 pm[info.cdma_num].MemCopyFlags =
553 (0 << 15 | 0 << 14 | 27 << 8 | 0x40);
554 pm[info.cdma_num].MemCopyStatus = 0;
555 break;
556
557 case DUMMY_CMD:
558 default:
559 pc[info.cdma_num].CommandType = 0XFFFF;
560 pc[info.cdma_num].CommandFlags =
561 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
562 pc[info.cdma_num].MemAddrHi = 0;
563 pc[info.cdma_num].MemAddrLo = 0;
564 break;
565 }
566
567 pc[info.cdma_num].Channel = 0;
568 pc[info.cdma_num].Status = 0;
569 pc[info.cdma_num].pcmd = i;
570
571 info.cdma_num++;
572 BUG_ON(info.cdma_num >= MAX_DESCS);
573
574 if ((info.pcmds[i].CMD == WRITE_MAIN_SPARE_CMD) ||
575 (info.pcmds[i].CMD == READ_MAIN_SPARE_CMD)) {
576 /* Descriptor to set back Main Area Access Mode */
577 reset_cdma_desc(info.cdma_num);
578 next_ptr += sizeof(struct cdma_descriptor);
579 pc[info.cdma_num].NxtPointerHi = next_ptr >> 16;
580 pc[info.cdma_num].NxtPointerLo = next_ptr & 0xffff;
581
582 pc[info.cdma_num].FlashPointerHi = ptr >> 16;
583 pc[info.cdma_num].FlashPointerLo = ptr & 0xffff;
584
585 pc[info.cdma_num].CommandType = 0x42;
586 pc[info.cdma_num].CommandFlags =
587 (0 << 10) | (1 << 9) | (0 << 8) | 0x40;
588 pc[info.cdma_num].MemAddrHi = 0;
589 pc[info.cdma_num].MemAddrLo = 0;
590
591 pc[info.cdma_num].Channel = 0;
592 pc[info.cdma_num].Status = 0;
593 pc[info.cdma_num].pcmd = i;
594
595 info.cdma_num++;
596 BUG_ON(info.cdma_num >= MAX_DESCS);
597 }
598 }
599
600 /* Add a dummy descriptor at end of the CDMA chain */
601 reset_cdma_desc(info.cdma_num);
602 ptr = MODE_10 | (info.flash_bank << 24);
603 pc[info.cdma_num].FlashPointerHi = ptr >> 16;
604 pc[info.cdma_num].FlashPointerLo = ptr & 0xffff;
605 pc[info.cdma_num].CommandType = 0xFFFF; /* NOP command */
606 /* Set Command Flags for the last CDMA descriptor: */
607 /* set Continue bit (bit 9) to 0 and Interrupt bit (bit 8) to 1 */
608 pc[info.cdma_num].CommandFlags =
609 (0 << 10) | (0 << 9) | (1 << 8) | 0x40;
610 pc[info.cdma_num].pcmd = 0xff; /* Set it to an illegal value */
611 info.cdma_num++;
612 BUG_ON(info.cdma_num >= MAX_DESCS);
613
614 iowrite32(1, FlashReg + GLOBAL_INT_ENABLE); /* Enable Interrupt */
615
616 iowrite32(1, FlashReg + DMA_ENABLE);
617 /* Wait for DMA to be enabled before issuing the next command */
618 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
619 ;
620 cdma_trans(info.flash_bank);
621
622 ret = wait_for_completion_timeout(&info.complete, 50 * HZ);
623 if (!ret)
624 printk(KERN_ERR "Wait for completion timeout "
625 "in %s, Line %d\n", __FILE__, __LINE__);
626 status = info.ret;
627
628 info.pcmds_num = 0; /* Clear the pending cmds number to 0 */
629
630 return status;
631}
632
633int is_cdma_interrupt(void)
634{
635 u32 ints_b0, ints_b1, ints_b2, ints_b3, ints_cdma;
636 u32 int_en_mask;
637 u32 cdma_int_en_mask;
638
639 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
640 __FILE__, __LINE__, __func__);
641
642 /* Set the global Enable masks for only those interrupts
643 * that are supported */
644 cdma_int_en_mask = (DMA_INTR__DESC_COMP_CHANNEL0 |
645 DMA_INTR__DESC_COMP_CHANNEL1 |
646 DMA_INTR__DESC_COMP_CHANNEL2 |
647 DMA_INTR__DESC_COMP_CHANNEL3 |
648 DMA_INTR__MEMCOPY_DESC_COMP);
649
650 int_en_mask = (INTR_STATUS0__ECC_ERR |
651 INTR_STATUS0__PROGRAM_FAIL |
652 INTR_STATUS0__ERASE_FAIL);
653
654 ints_b0 = ioread32(FlashReg + INTR_STATUS0) & int_en_mask;
655 ints_b1 = ioread32(FlashReg + INTR_STATUS1) & int_en_mask;
656 ints_b2 = ioread32(FlashReg + INTR_STATUS2) & int_en_mask;
657 ints_b3 = ioread32(FlashReg + INTR_STATUS3) & int_en_mask;
658 ints_cdma = ioread32(FlashReg + DMA_INTR) & cdma_int_en_mask;
659
660 nand_dbg_print(NAND_DBG_WARN, "ints_bank0 to ints_bank3: "
661 "0x%x, 0x%x, 0x%x, 0x%x, ints_cdma: 0x%x\n",
662 ints_b0, ints_b1, ints_b2, ints_b3, ints_cdma);
663
664 if (ints_b0 || ints_b1 || ints_b2 || ints_b3 || ints_cdma) {
665 return 1;
666 } else {
667 iowrite32(ints_b0, FlashReg + INTR_STATUS0);
668 iowrite32(ints_b1, FlashReg + INTR_STATUS1);
669 iowrite32(ints_b2, FlashReg + INTR_STATUS2);
670 iowrite32(ints_b3, FlashReg + INTR_STATUS3);
671 nand_dbg_print(NAND_DBG_DEBUG,
672 "Not a NAND controller interrupt! Ignore it.\n");
673 return 0;
674 }
675}
676
677static void update_event_status(void)
678{
679 int i;
680 struct cdma_descriptor *ptr;
681
682 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
683 __FILE__, __LINE__, __func__);
684
685 ptr = (struct cdma_descriptor *)info.cdma_desc_buf;
686
687 for (i = 0; i < info.cdma_num; i++) {
688 if (ptr[i].pcmd != 0xff)
689 info.pcmds[ptr[i].pcmd].Status = CMD_PASS;
690 if ((ptr[i].CommandType == 0x41) ||
691 (ptr[i].CommandType == 0x42) ||
692 (ptr[i].CommandType == 0x43))
693 continue;
694
695 switch (info.pcmds[ptr[i].pcmd].CMD) {
696 case READ_MAIN_SPARE_CMD:
697 Conv_Main_Spare_Data_Phy2Log_Format(
698 info.pcmds[ptr[i].pcmd].DataAddr,
699 info.pcmds[ptr[i].pcmd].PageCount);
700 break;
701 case READ_SPARE_CMD:
702 Conv_Spare_Data_Phy2Log_Format(
703 info.pcmds[ptr[i].pcmd].DataAddr);
704 break;
705 }
706 }
707}
708
709static u16 do_ecc_for_desc(u32 ch, u8 *buf, u16 page)
710{
711 u16 event = EVENT_NONE;
712 u16 err_byte;
713 u16 err_page = 0;
714 u8 err_sector;
715 u8 err_device;
716 u16 ecc_correction_info;
717 u16 err_address;
718 u32 eccSectorSize;
719 u8 *err_pos;
720
721 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
722 __FILE__, __LINE__, __func__);
723
724 eccSectorSize = ECC_SECTOR_SIZE * (DeviceInfo.wDevicesConnected);
725
726 do {
727 if (0 == ch)
728 err_page = ioread32(FlashReg + ERR_PAGE_ADDR0);
729 else if (1 == ch)
730 err_page = ioread32(FlashReg + ERR_PAGE_ADDR1);
731 else if (2 == ch)
732 err_page = ioread32(FlashReg + ERR_PAGE_ADDR2);
733 else if (3 == ch)
734 err_page = ioread32(FlashReg + ERR_PAGE_ADDR3);
735
736 err_address = ioread32(FlashReg + ECC_ERROR_ADDRESS);
737 err_byte = err_address & ECC_ERROR_ADDRESS__OFFSET;
738 err_sector = ((err_address &
739 ECC_ERROR_ADDRESS__SECTOR_NR) >> 12);
740
741 ecc_correction_info = ioread32(FlashReg + ERR_CORRECTION_INFO);
742 err_device = ((ecc_correction_info &
743 ERR_CORRECTION_INFO__DEVICE_NR) >> 8);
744
745 if (ecc_correction_info & ERR_CORRECTION_INFO__ERROR_TYPE) {
746 event = EVENT_UNCORRECTABLE_DATA_ERROR;
747 } else {
748 event = EVENT_CORRECTABLE_DATA_ERROR_FIXED;
749 if (err_byte < ECC_SECTOR_SIZE) {
750 err_pos = buf +
751 (err_page - page) *
752 DeviceInfo.wPageDataSize +
753 err_sector * eccSectorSize +
754 err_byte *
755 DeviceInfo.wDevicesConnected +
756 err_device;
757 *err_pos ^= ecc_correction_info &
758 ERR_CORRECTION_INFO__BYTEMASK;
759 }
760 }
761 } while (!(ecc_correction_info & ERR_CORRECTION_INFO__LAST_ERR_INFO));
762
763 return event;
764}
765
766static u16 process_ecc_int(u32 c, u16 *p_desc_num)
767{
768 struct cdma_descriptor *ptr;
769 u16 j;
770 int event = EVENT_PASS;
771
772 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
773 __FILE__, __LINE__, __func__);
774
775 if (c != info.flash_bank)
776 printk(KERN_ERR "Error!info.flash_bank is %d, while c is %d\n",
777 info.flash_bank, c);
778
779 ptr = (struct cdma_descriptor *)info.cdma_desc_buf;
780
781 for (j = 0; j < info.cdma_num; j++)
782 if ((ptr[j].Status & CMD_DMA_DESC_COMP) != CMD_DMA_DESC_COMP)
783 break;
784
785 *p_desc_num = j; /* Pass the descripter number found here */
786
787 if (j >= info.cdma_num) {
788 printk(KERN_ERR "Can not find the correct descriptor number "
789 "when ecc interrupt triggered!"
790 "info.cdma_num: %d, j: %d\n", info.cdma_num, j);
791 return EVENT_UNCORRECTABLE_DATA_ERROR;
792 }
793
794 event = do_ecc_for_desc(c, info.pcmds[ptr[j].pcmd].DataAddr,
795 info.pcmds[ptr[j].pcmd].Page);
796
797 if (EVENT_UNCORRECTABLE_DATA_ERROR == event) {
798 printk(KERN_ERR "Uncorrectable ECC error!"
799 "info.cdma_num: %d, j: %d, "
800 "pending cmd CMD: 0x%x, "
801 "Block: 0x%x, Page: 0x%x, PageCount: 0x%x\n",
802 info.cdma_num, j,
803 info.pcmds[ptr[j].pcmd].CMD,
804 info.pcmds[ptr[j].pcmd].Block,
805 info.pcmds[ptr[j].pcmd].Page,
806 info.pcmds[ptr[j].pcmd].PageCount);
807
808 if (ptr[j].pcmd != 0xff)
809 info.pcmds[ptr[j].pcmd].Status = CMD_FAIL;
810 CDMA_UpdateEventStatus();
811 }
812
813 return event;
814}
815
816static void process_prog_erase_fail_int(u16 desc_num)
817{
818 struct cdma_descriptor *ptr;
819
820 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
821 __FILE__, __LINE__, __func__);
822
823 ptr = (struct cdma_descriptor *)info.cdma_desc_buf;
824
825 if (ptr[desc_num].pcmd != 0xFF)
826 info.pcmds[ptr[desc_num].pcmd].Status = CMD_FAIL;
827
828 CDMA_UpdateEventStatus();
829}
830
831/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
832* Function: CDMA_Event_Status (for use with CMD_DMA)
833* Inputs: none
834* Outputs: Event_Status code
835* Description: This function is called after an interrupt has happened
836* It reads the HW status register and ...tbd
837* It returns the appropriate event status
838*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
839u16 CDMA_Event_Status(void)
840{
841 u32 ints_addr[4] = {INTR_STATUS0, INTR_STATUS1,
842 INTR_STATUS2, INTR_STATUS3};
843 u32 dma_intr_bit[4] = {DMA_INTR__DESC_COMP_CHANNEL0,
844 DMA_INTR__DESC_COMP_CHANNEL1,
845 DMA_INTR__DESC_COMP_CHANNEL2,
846 DMA_INTR__DESC_COMP_CHANNEL3};
847 u32 cdma_int_status, int_status;
848 u32 ecc_enable = 0;
849 u16 event = EVENT_PASS;
850 u16 cur_desc = 0;
851
852 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
853 __FILE__, __LINE__, __func__);
854
855 ecc_enable = ioread32(FlashReg + ECC_ENABLE);
856
857 while (1) {
858 int_status = ioread32(FlashReg + ints_addr[info.flash_bank]);
859 if (ecc_enable && (int_status & INTR_STATUS0__ECC_ERR)) {
860 event = process_ecc_int(info.flash_bank, &cur_desc);
861 iowrite32(INTR_STATUS0__ECC_ERR,
862 FlashReg + ints_addr[info.flash_bank]);
863 if (EVENT_UNCORRECTABLE_DATA_ERROR == event) {
864 nand_dbg_print(NAND_DBG_WARN,
865 "ints_bank0 to ints_bank3: "
866 "0x%x, 0x%x, 0x%x, 0x%x, "
867 "ints_cdma: 0x%x\n",
868 ioread32(FlashReg + INTR_STATUS0),
869 ioread32(FlashReg + INTR_STATUS1),
870 ioread32(FlashReg + INTR_STATUS2),
871 ioread32(FlashReg + INTR_STATUS3),
872 ioread32(FlashReg + DMA_INTR));
873 break;
874 }
875 } else if (int_status & INTR_STATUS0__PROGRAM_FAIL) {
876 printk(KERN_ERR "NAND program fail interrupt!\n");
877 process_prog_erase_fail_int(cur_desc);
878 event = EVENT_PROGRAM_FAILURE;
879 break;
880 } else if (int_status & INTR_STATUS0__ERASE_FAIL) {
881 printk(KERN_ERR "NAND erase fail interrupt!\n");
882 process_prog_erase_fail_int(cur_desc);
883 event = EVENT_ERASE_FAILURE;
884 break;
885 } else {
886 cdma_int_status = ioread32(FlashReg + DMA_INTR);
887 if (cdma_int_status & dma_intr_bit[info.flash_bank]) {
888 iowrite32(dma_intr_bit[info.flash_bank],
889 FlashReg + DMA_INTR);
890 update_event_status();
891 event = EVENT_PASS;
892 break;
893 }
894 }
895 }
896
897 int_status = ioread32(FlashReg + ints_addr[info.flash_bank]);
898 iowrite32(int_status, FlashReg + ints_addr[info.flash_bank]);
899 cdma_int_status = ioread32(FlashReg + DMA_INTR);
900 iowrite32(cdma_int_status, FlashReg + DMA_INTR);
901
902 iowrite32(0, FlashReg + DMA_ENABLE);
903 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
904 ;
905
906 return event;
907}
908
909
910
diff --git a/drivers/staging/spectra/lld_cdma.h b/drivers/staging/spectra/lld_cdma.h
deleted file mode 100644
index 854ea066f0c4..000000000000
--- a/drivers/staging/spectra/lld_cdma.h
+++ /dev/null
@@ -1,123 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20/* header for LLD_CDMA.c module */
21
22#ifndef _LLD_CDMA_
23#define _LLD_CDMA_
24
25#include "flash.h"
26
27#define DEBUG_SYNC 1
28
29/*/////////// CDMA specific MACRO definition */
30#define MAX_DESCS (255)
31#define MAX_CHANS (4)
32#define MAX_SYNC_POINTS (16)
33#define MAX_DESC_PER_CHAN (MAX_DESCS * 3 + MAX_SYNC_POINTS + 2)
34
35#define CHANNEL_SYNC_MASK (0x000F)
36#define CHANNEL_DMA_MASK (0x00F0)
37#define CHANNEL_ID_MASK (0x0300)
38#define CHANNEL_CONT_MASK (0x4000)
39#define CHANNEL_INTR_MASK (0x8000)
40
41#define CHANNEL_SYNC_OFFSET (0)
42#define CHANNEL_DMA_OFFSET (4)
43#define CHANNEL_ID_OFFSET (8)
44#define CHANNEL_CONT_OFFSET (14)
45#define CHANNEL_INTR_OFFSET (15)
46
47u16 CDMA_Data_CMD(u8 cmd, u8 *data, u32 block, u16 page, u16 num, u16 flags);
48u16 CDMA_MemCopy_CMD(u8 *dest, u8 *src, u32 byte_cnt, u16 flags);
49u16 CDMA_Execute_CMDs(void);
50void print_pending_cmds(void);
51void print_cdma_descriptors(void);
52
53extern u8 g_SBDCmdIndex;
54extern struct mrst_nand_info info;
55
56
57/*/////////// prototypes: APIs for LLD_CDMA */
58int is_cdma_interrupt(void);
59u16 CDMA_Event_Status(void);
60
61/* CMD-DMA Descriptor Struct. These are defined by the CMD_DMA HW */
62struct cdma_descriptor {
63 u32 NxtPointerHi;
64 u32 NxtPointerLo;
65 u32 FlashPointerHi;
66 u32 FlashPointerLo;
67 u32 CommandType;
68 u32 MemAddrHi;
69 u32 MemAddrLo;
70 u32 CommandFlags;
71 u32 Channel;
72 u32 Status;
73 u32 MemCopyPointerHi;
74 u32 MemCopyPointerLo;
75 u32 Reserved12;
76 u32 Reserved13;
77 u32 Reserved14;
78 u32 pcmd; /* pending cmd num related to this descriptor */
79};
80
81/* This struct holds one MemCopy descriptor as defined by the HW */
82struct memcpy_descriptor {
83 u32 NxtPointerHi;
84 u32 NxtPointerLo;
85 u32 SrcAddrHi;
86 u32 SrcAddrLo;
87 u32 DestAddrHi;
88 u32 DestAddrLo;
89 u32 XferSize;
90 u32 MemCopyFlags;
91 u32 MemCopyStatus;
92 u32 reserved9;
93 u32 reserved10;
94 u32 reserved11;
95 u32 reserved12;
96 u32 reserved13;
97 u32 reserved14;
98 u32 reserved15;
99};
100
101/* Pending CMD table entries (includes MemCopy parameters */
102struct pending_cmd {
103 u8 CMD;
104 u8 *DataAddr;
105 u32 Block;
106 u16 Page;
107 u16 PageCount;
108 u8 *DataDestAddr;
109 u8 *DataSrcAddr;
110 u32 MemCopyByteCnt;
111 u16 Flags;
112 u16 Status;
113};
114
115#if DEBUG_SYNC
116extern u32 debug_sync_cnt;
117#endif
118
119/* Definitions for CMD DMA descriptor chain fields */
120#define CMD_DMA_DESC_COMP 0x8000
121#define CMD_DMA_DESC_FAIL 0x4000
122
123#endif /*_LLD_CDMA_*/
diff --git a/drivers/staging/spectra/lld_emu.c b/drivers/staging/spectra/lld_emu.c
deleted file mode 100644
index 095f2f0c2e5b..000000000000
--- a/drivers/staging/spectra/lld_emu.c
+++ /dev/null
@@ -1,776 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include <linux/fs.h>
21#include <linux/slab.h>
22#include "flash.h"
23#include "ffsdefs.h"
24#include "lld_emu.h"
25#include "lld.h"
26#if CMD_DMA
27#include "lld_cdma.h"
28#if FLASH_EMU
29u32 totalUsedBanks;
30u32 valid_banks[MAX_CHANS];
31#endif
32#endif
33
34#define GLOB_LLD_PAGES 64
35#define GLOB_LLD_PAGE_SIZE (512+16)
36#define GLOB_LLD_PAGE_DATA_SIZE 512
37#define GLOB_LLD_BLOCKS 2048
38
39#if FLASH_EMU /* This is for entire module */
40
41static u8 *flash_memory[GLOB_LLD_BLOCKS * GLOB_LLD_PAGES];
42
43/* Read nand emu file and then fill it's content to flash_memory */
44int emu_load_file_to_mem(void)
45{
46 mm_segment_t fs;
47 struct file *nef_filp = NULL;
48 struct inode *inode = NULL;
49 loff_t nef_size = 0;
50 loff_t tmp_file_offset, file_offset;
51 ssize_t nread;
52 int i, rc = -EINVAL;
53
54 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
55 __FILE__, __LINE__, __func__);
56
57 fs = get_fs();
58 set_fs(get_ds());
59
60 nef_filp = filp_open("/root/nand_emu_file", O_RDWR | O_LARGEFILE, 0);
61 if (IS_ERR(nef_filp)) {
62 printk(KERN_ERR "filp_open error: "
63 "Unable to open nand emu file!\n");
64 return PTR_ERR(nef_filp);
65 }
66
67 if (nef_filp->f_path.dentry) {
68 inode = nef_filp->f_path.dentry->d_inode;
69 } else {
70 printk(KERN_ERR "Can not get valid inode!\n");
71 goto out;
72 }
73
74 nef_size = i_size_read(inode->i_mapping->host);
75 if (nef_size <= 0) {
76 printk(KERN_ERR "Invalid nand emu file size: "
77 "0x%llx\n", nef_size);
78 goto out;
79 } else {
80 nand_dbg_print(NAND_DBG_DEBUG, "nand emu file size: %lld\n",
81 nef_size);
82 }
83
84 file_offset = 0;
85 for (i = 0; i < GLOB_LLD_BLOCKS * GLOB_LLD_PAGES; i++) {
86 tmp_file_offset = file_offset;
87 nread = vfs_read(nef_filp,
88 (char __user *)flash_memory[i],
89 GLOB_LLD_PAGE_SIZE, &tmp_file_offset);
90 if (nread < GLOB_LLD_PAGE_SIZE) {
91 printk(KERN_ERR "%s, Line %d - "
92 "nand emu file partial read: "
93 "%d bytes\n", __FILE__, __LINE__, (int)nread);
94 goto out;
95 }
96 file_offset += GLOB_LLD_PAGE_SIZE;
97 }
98 rc = 0;
99
100out:
101 filp_close(nef_filp, current->files);
102 set_fs(fs);
103 return rc;
104}
105
106/* Write contents of flash_memory to nand emu file */
107int emu_write_mem_to_file(void)
108{
109 mm_segment_t fs;
110 struct file *nef_filp = NULL;
111 struct inode *inode = NULL;
112 loff_t nef_size = 0;
113 loff_t tmp_file_offset, file_offset;
114 ssize_t nwritten;
115 int i, rc = -EINVAL;
116
117 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
118 __FILE__, __LINE__, __func__);
119
120 fs = get_fs();
121 set_fs(get_ds());
122
123 nef_filp = filp_open("/root/nand_emu_file", O_RDWR | O_LARGEFILE, 0);
124 if (IS_ERR(nef_filp)) {
125 printk(KERN_ERR "filp_open error: "
126 "Unable to open nand emu file!\n");
127 return PTR_ERR(nef_filp);
128 }
129
130 if (nef_filp->f_path.dentry) {
131 inode = nef_filp->f_path.dentry->d_inode;
132 } else {
133 printk(KERN_ERR "Invalid " "nef_filp->f_path.dentry value!\n");
134 goto out;
135 }
136
137 nef_size = i_size_read(inode->i_mapping->host);
138 if (nef_size <= 0) {
139 printk(KERN_ERR "Invalid "
140 "nand emu file size: 0x%llx\n", nef_size);
141 goto out;
142 } else {
143 nand_dbg_print(NAND_DBG_DEBUG, "nand emu file size: "
144 "%lld\n", nef_size);
145 }
146
147 file_offset = 0;
148 for (i = 0; i < GLOB_LLD_BLOCKS * GLOB_LLD_PAGES; i++) {
149 tmp_file_offset = file_offset;
150 nwritten = vfs_write(nef_filp,
151 (char __user *)flash_memory[i],
152 GLOB_LLD_PAGE_SIZE, &tmp_file_offset);
153 if (nwritten < GLOB_LLD_PAGE_SIZE) {
154 printk(KERN_ERR "%s, Line %d - "
155 "nand emu file partial write: "
156 "%d bytes\n", __FILE__, __LINE__, (int)nwritten);
157 goto out;
158 }
159 file_offset += GLOB_LLD_PAGE_SIZE;
160 }
161 rc = 0;
162
163out:
164 filp_close(nef_filp, current->files);
165 set_fs(fs);
166 return rc;
167}
168
169/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
170* Function: emu_Flash_Init
171* Inputs: none
172* Outputs: PASS=0 (notice 0=ok here)
173* Description: Creates & initializes the flash RAM array.
174*
175*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
176u16 emu_Flash_Init(void)
177{
178 int i;
179
180 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
181 __FILE__, __LINE__, __func__);
182
183 flash_memory[0] = vmalloc(GLOB_LLD_PAGE_SIZE * GLOB_LLD_BLOCKS *
184 GLOB_LLD_PAGES * sizeof(u8));
185 if (!flash_memory[0]) {
186 printk(KERN_ERR "Fail to allocate memory "
187 "for nand emulator!\n");
188 return ERR;
189 }
190
191 memset((char *)(flash_memory[0]), 0xFF,
192 GLOB_LLD_PAGE_SIZE * GLOB_LLD_BLOCKS * GLOB_LLD_PAGES *
193 sizeof(u8));
194
195 for (i = 1; i < GLOB_LLD_BLOCKS * GLOB_LLD_PAGES; i++)
196 flash_memory[i] = flash_memory[i - 1] + GLOB_LLD_PAGE_SIZE;
197
198 emu_load_file_to_mem(); /* Load nand emu file to mem */
199
200 return PASS;
201}
202
203/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
204* Function: emu_Flash_Release
205* Inputs: none
206* Outputs: PASS=0 (notice 0=ok here)
207* Description: Releases the flash.
208*
209*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
210int emu_Flash_Release(void)
211{
212 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
213 __FILE__, __LINE__, __func__);
214
215 emu_write_mem_to_file(); /* Write back mem to nand emu file */
216
217 vfree(flash_memory[0]);
218 return PASS;
219}
220
221/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
222* Function: emu_Read_Device_ID
223* Inputs: none
224* Outputs: PASS=1 FAIL=0
225* Description: Reads the info from the controller registers.
226* Sets up DeviceInfo structure with device parameters
227*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
228
229u16 emu_Read_Device_ID(void)
230{
231 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
232 __FILE__, __LINE__, __func__);
233
234 DeviceInfo.wDeviceMaker = 0;
235 DeviceInfo.wDeviceType = 8;
236 DeviceInfo.wSpectraStartBlock = 36;
237 DeviceInfo.wSpectraEndBlock = GLOB_LLD_BLOCKS - 1;
238 DeviceInfo.wTotalBlocks = GLOB_LLD_BLOCKS;
239 DeviceInfo.wPagesPerBlock = GLOB_LLD_PAGES;
240 DeviceInfo.wPageSize = GLOB_LLD_PAGE_SIZE;
241 DeviceInfo.wPageDataSize = GLOB_LLD_PAGE_DATA_SIZE;
242 DeviceInfo.wPageSpareSize = GLOB_LLD_PAGE_SIZE -
243 GLOB_LLD_PAGE_DATA_SIZE;
244 DeviceInfo.wBlockSize = DeviceInfo.wPageSize * GLOB_LLD_PAGES;
245 DeviceInfo.wBlockDataSize = DeviceInfo.wPageDataSize * GLOB_LLD_PAGES;
246 DeviceInfo.wDataBlockNum = (u32) (DeviceInfo.wSpectraEndBlock -
247 DeviceInfo.wSpectraStartBlock
248 + 1);
249 DeviceInfo.MLCDevice = 1; /* Emulate MLC device */
250 DeviceInfo.nBitsInPageNumber =
251 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wPagesPerBlock);
252 DeviceInfo.nBitsInPageDataSize =
253 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wPageDataSize);
254 DeviceInfo.nBitsInBlockDataSize =
255 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wBlockDataSize);
256
257#if CMD_DMA
258 totalUsedBanks = 4;
259 valid_banks[0] = 1;
260 valid_banks[1] = 1;
261 valid_banks[2] = 1;
262 valid_banks[3] = 1;
263#endif
264
265 return PASS;
266}
267
268/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
269* Function: emu_Flash_Reset
270* Inputs: none
271* Outputs: PASS=0 (notice 0=ok here)
272* Description: Reset the flash
273*
274*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
275u16 emu_Flash_Reset(void)
276{
277 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
278 __FILE__, __LINE__, __func__);
279
280 return PASS;
281}
282
283/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
284* Function: emu_Erase_Block
285* Inputs: Address
286* Outputs: PASS=0 (notice 0=ok here)
287* Description: Erase a block
288*
289*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
290u16 emu_Erase_Block(u32 block_add)
291{
292 int i;
293
294 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
295 __FILE__, __LINE__, __func__);
296
297 if (block_add >= DeviceInfo.wTotalBlocks) {
298 printk(KERN_ERR "emu_Erase_Block error! "
299 "Too big block address: %d\n", block_add);
300 return FAIL;
301 }
302
303 nand_dbg_print(NAND_DBG_DEBUG, "Erasing block %d\n",
304 (int)block_add);
305
306 for (i = block_add * GLOB_LLD_PAGES;
307 i < ((block_add + 1) * GLOB_LLD_PAGES); i++) {
308 if (flash_memory[i]) {
309 memset((u8 *)(flash_memory[i]), 0xFF,
310 DeviceInfo.wPageSize * sizeof(u8));
311 }
312 }
313
314 return PASS;
315}
316
317/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
318* Function: emu_Write_Page_Main
319* Inputs: Write buffer address pointer
320* Block number
321* Page number
322* Number of pages to process
323* Outputs: PASS=0 (notice 0=ok here)
324* Description: Write the data in the buffer to main area of flash
325*
326*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
327u16 emu_Write_Page_Main(u8 *write_data, u32 Block,
328 u16 Page, u16 PageCount)
329{
330 int i;
331
332 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
333 __FILE__, __LINE__, __func__);
334
335 if (Block >= DeviceInfo.wTotalBlocks)
336 return FAIL;
337
338 if (Page + PageCount > DeviceInfo.wPagesPerBlock)
339 return FAIL;
340
341 nand_dbg_print(NAND_DBG_DEBUG, "emu_Write_Page_Main: "
342 "lba %u Page %u PageCount %u\n",
343 (unsigned int)Block,
344 (unsigned int)Page, (unsigned int)PageCount);
345
346 for (i = 0; i < PageCount; i++) {
347 if (NULL == flash_memory[Block * GLOB_LLD_PAGES + Page]) {
348 printk(KERN_ERR "Run out of memory\n");
349 return FAIL;
350 }
351 memcpy((u8 *) (flash_memory[Block * GLOB_LLD_PAGES + Page]),
352 write_data, DeviceInfo.wPageDataSize);
353 write_data += DeviceInfo.wPageDataSize;
354 Page++;
355 }
356
357 return PASS;
358}
359
360/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
361* Function: emu_Read_Page_Main
362* Inputs: Read buffer address pointer
363* Block number
364* Page number
365* Number of pages to process
366* Outputs: PASS=0 (notice 0=ok here)
367* Description: Read the data from the flash main area to the buffer
368*
369*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
370u16 emu_Read_Page_Main(u8 *read_data, u32 Block,
371 u16 Page, u16 PageCount)
372{
373 int i;
374
375 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
376 __FILE__, __LINE__, __func__);
377
378 if (Block >= DeviceInfo.wTotalBlocks)
379 return FAIL;
380
381 if (Page + PageCount > DeviceInfo.wPagesPerBlock)
382 return FAIL;
383
384 nand_dbg_print(NAND_DBG_DEBUG, "emu_Read_Page_Main: "
385 "lba %u Page %u PageCount %u\n",
386 (unsigned int)Block,
387 (unsigned int)Page, (unsigned int)PageCount);
388
389 for (i = 0; i < PageCount; i++) {
390 if (NULL == flash_memory[Block * GLOB_LLD_PAGES + Page]) {
391 memset(read_data, 0xFF, DeviceInfo.wPageDataSize);
392 } else {
393 memcpy(read_data,
394 (u8 *) (flash_memory[Block * GLOB_LLD_PAGES
395 + Page]),
396 DeviceInfo.wPageDataSize);
397 }
398 read_data += DeviceInfo.wPageDataSize;
399 Page++;
400 }
401
402 return PASS;
403}
404
405#ifndef ELDORA
406/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
407* Function: emu_Read_Page_Main_Spare
408* Inputs: Write Buffer
409* Address
410* Buffer size
411* Outputs: PASS=0 (notice 0=ok here)
412* Description: Read from flash main+spare area
413*
414*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
415u16 emu_Read_Page_Main_Spare(u8 *read_data, u32 Block,
416 u16 Page, u16 PageCount)
417{
418 int i;
419
420 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
421 __FILE__, __LINE__, __func__);
422
423 if (Block >= DeviceInfo.wTotalBlocks) {
424 printk(KERN_ERR "Read Page Main+Spare "
425 "Error: Block Address too big\n");
426 return FAIL;
427 }
428
429 if (Page + PageCount > DeviceInfo.wPagesPerBlock) {
430 printk(KERN_ERR "Read Page Main+Spare "
431 "Error: Page number too big\n");
432 return FAIL;
433 }
434
435 nand_dbg_print(NAND_DBG_DEBUG, "Read Page Main + Spare - "
436 "No. of pages %u block %u start page %u\n",
437 (unsigned int)PageCount,
438 (unsigned int)Block, (unsigned int)Page);
439
440 for (i = 0; i < PageCount; i++) {
441 if (NULL == flash_memory[Block * GLOB_LLD_PAGES + Page]) {
442 memset(read_data, 0xFF, DeviceInfo.wPageSize);
443 } else {
444 memcpy(read_data, (u8 *) (flash_memory[Block *
445 GLOB_LLD_PAGES
446 + Page]),
447 DeviceInfo.wPageSize);
448 }
449
450 read_data += DeviceInfo.wPageSize;
451 Page++;
452 }
453
454 return PASS;
455}
456
457/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
458* Function: emu_Write_Page_Main_Spare
459* Inputs: Write buffer
460* address
461* buffer length
462* Outputs: PASS=0 (notice 0=ok here)
463* Description: Write the buffer to main+spare area of flash
464*
465*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
466u16 emu_Write_Page_Main_Spare(u8 *write_data, u32 Block,
467 u16 Page, u16 page_count)
468{
469 u16 i;
470
471 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
472 __FILE__, __LINE__, __func__);
473
474 if (Block >= DeviceInfo.wTotalBlocks) {
475 printk(KERN_ERR "Write Page Main + Spare "
476 "Error: Block Address too big\n");
477 return FAIL;
478 }
479
480 if (Page + page_count > DeviceInfo.wPagesPerBlock) {
481 printk(KERN_ERR "Write Page Main + Spare "
482 "Error: Page number too big\n");
483 return FAIL;
484 }
485
486 nand_dbg_print(NAND_DBG_DEBUG, "Write Page Main+Spare - "
487 "No. of pages %u block %u start page %u\n",
488 (unsigned int)page_count,
489 (unsigned int)Block, (unsigned int)Page);
490
491 for (i = 0; i < page_count; i++) {
492 if (NULL == flash_memory[Block * GLOB_LLD_PAGES + Page]) {
493 printk(KERN_ERR "Run out of memory!\n");
494 return FAIL;
495 }
496 memcpy((u8 *) (flash_memory[Block * GLOB_LLD_PAGES + Page]),
497 write_data, DeviceInfo.wPageSize);
498 write_data += DeviceInfo.wPageSize;
499 Page++;
500 }
501
502 return PASS;
503}
504
505/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
506* Function: emu_Write_Page_Spare
507* Inputs: Write buffer
508* Address
509* buffer size
510* Outputs: PASS=0 (notice 0=ok here)
511* Description: Write the buffer in the spare area
512*
513*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
514u16 emu_Write_Page_Spare(u8 *write_data, u32 Block,
515 u16 Page, u16 PageCount)
516{
517 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
518 __FILE__, __LINE__, __func__);
519
520 if (Block >= DeviceInfo.wTotalBlocks) {
521 printk(KERN_ERR "Read Page Spare Error: "
522 "Block Address too big\n");
523 return FAIL;
524 }
525
526 if (Page + PageCount > DeviceInfo.wPagesPerBlock) {
527 printk(KERN_ERR "Read Page Spare Error: "
528 "Page number too big\n");
529 return FAIL;
530 }
531
532 nand_dbg_print(NAND_DBG_DEBUG, "Write Page Spare- "
533 "block %u page %u\n",
534 (unsigned int)Block, (unsigned int)Page);
535
536 if (NULL == flash_memory[Block * GLOB_LLD_PAGES + Page]) {
537 printk(KERN_ERR "Run out of memory!\n");
538 return FAIL;
539 }
540
541 memcpy((u8 *) (flash_memory[Block * GLOB_LLD_PAGES + Page] +
542 DeviceInfo.wPageDataSize), write_data,
543 (DeviceInfo.wPageSize - DeviceInfo.wPageDataSize));
544
545 return PASS;
546}
547
548/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
549* Function: emu_Read_Page_Spare
550* Inputs: Write Buffer
551* Address
552* Buffer size
553* Outputs: PASS=0 (notice 0=ok here)
554* Description: Read data from the spare area
555*
556*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
557u16 emu_Read_Page_Spare(u8 *write_data, u32 Block,
558 u16 Page, u16 PageCount)
559{
560 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
561 __FILE__, __LINE__, __func__);
562
563 if (Block >= DeviceInfo.wTotalBlocks) {
564 printk(KERN_ERR "Read Page Spare "
565 "Error: Block Address too big\n");
566 return FAIL;
567 }
568
569 if (Page + PageCount > DeviceInfo.wPagesPerBlock) {
570 printk(KERN_ERR "Read Page Spare "
571 "Error: Page number too big\n");
572 return FAIL;
573 }
574
575 nand_dbg_print(NAND_DBG_DEBUG, "Read Page Spare- "
576 "block %u page %u\n",
577 (unsigned int)Block, (unsigned int)Page);
578
579 if (NULL == flash_memory[Block * GLOB_LLD_PAGES + Page]) {
580 memset(write_data, 0xFF,
581 (DeviceInfo.wPageSize - DeviceInfo.wPageDataSize));
582 } else {
583 memcpy(write_data,
584 (u8 *) (flash_memory[Block * GLOB_LLD_PAGES + Page]
585 + DeviceInfo.wPageDataSize),
586 (DeviceInfo.wPageSize - DeviceInfo.wPageDataSize));
587 }
588
589 return PASS;
590}
591
592/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
593* Function: emu_Enable_Disable_Interrupts
594* Inputs: enable or disable
595* Outputs: none
596* Description: NOP
597*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
598void emu_Enable_Disable_Interrupts(u16 INT_ENABLE)
599{
600 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
601 __FILE__, __LINE__, __func__);
602}
603
604u16 emu_Get_Bad_Block(u32 block)
605{
606 return 0;
607}
608
609#if CMD_DMA
610/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
611* Support for CDMA functions
612************************************
613* emu_CDMA_Flash_Init
614* CDMA_process_data command (use LLD_CDMA)
615* CDMA_MemCopy_CMD (use LLD_CDMA)
616* emu_CDMA_execute all commands
617* emu_CDMA_Event_Status
618*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
619u16 emu_CDMA_Flash_Init(void)
620{
621 u16 i;
622
623 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
624 __FILE__, __LINE__, __func__);
625
626 for (i = 0; i < MAX_DESCS + MAX_CHANS; i++) {
627 PendingCMD[i].CMD = 0;
628 PendingCMD[i].Tag = 0;
629 PendingCMD[i].DataAddr = 0;
630 PendingCMD[i].Block = 0;
631 PendingCMD[i].Page = 0;
632 PendingCMD[i].PageCount = 0;
633 PendingCMD[i].DataDestAddr = 0;
634 PendingCMD[i].DataSrcAddr = 0;
635 PendingCMD[i].MemCopyByteCnt = 0;
636 PendingCMD[i].ChanSync[0] = 0;
637 PendingCMD[i].ChanSync[1] = 0;
638 PendingCMD[i].ChanSync[2] = 0;
639 PendingCMD[i].ChanSync[3] = 0;
640 PendingCMD[i].ChanSync[4] = 0;
641 PendingCMD[i].Status = 3;
642 }
643
644 return PASS;
645}
646
647static void emu_isr(int irq, void *dev_id)
648{
649 /* TODO: ... */
650}
651
652/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
653* Function: CDMA_Execute_CMDs
654* Inputs: tag_count: the number of pending cmds to do
655* Outputs: PASS/FAIL
656* Description: execute each command in the pending CMD array
657*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
658u16 emu_CDMA_Execute_CMDs(u16 tag_count)
659{
660 u16 i, j;
661 u8 CMD; /* cmd parameter */
662 u8 *data;
663 u32 block;
664 u16 page;
665 u16 count;
666 u16 status = PASS;
667
668 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
669 __FILE__, __LINE__, __func__);
670
671 nand_dbg_print(NAND_DBG_TRACE, "At start of Execute CMDs: "
672 "Tag Count %u\n", tag_count);
673
674 for (i = 0; i < totalUsedBanks; i++) {
675 PendingCMD[i].CMD = DUMMY_CMD;
676 PendingCMD[i].Tag = 0xFF;
677 PendingCMD[i].Block =
678 (DeviceInfo.wTotalBlocks / totalUsedBanks) * i;
679
680 for (j = 0; j <= MAX_CHANS; j++)
681 PendingCMD[i].ChanSync[j] = 0;
682 }
683
684 CDMA_Execute_CMDs(tag_count);
685
686 print_pending_cmds(tag_count);
687
688#if DEBUG_SYNC
689 }
690 debug_sync_cnt++;
691#endif
692
693 for (i = MAX_CHANS;
694 i < tag_count + MAX_CHANS; i++) {
695 CMD = PendingCMD[i].CMD;
696 data = PendingCMD[i].DataAddr;
697 block = PendingCMD[i].Block;
698 page = PendingCMD[i].Page;
699 count = PendingCMD[i].PageCount;
700
701 switch (CMD) {
702 case ERASE_CMD:
703 emu_Erase_Block(block);
704 PendingCMD[i].Status = PASS;
705 break;
706 case WRITE_MAIN_CMD:
707 emu_Write_Page_Main(data, block, page, count);
708 PendingCMD[i].Status = PASS;
709 break;
710 case WRITE_MAIN_SPARE_CMD:
711 emu_Write_Page_Main_Spare(data, block, page, count);
712 PendingCMD[i].Status = PASS;
713 break;
714 case READ_MAIN_CMD:
715 emu_Read_Page_Main(data, block, page, count);
716 PendingCMD[i].Status = PASS;
717 break;
718 case MEMCOPY_CMD:
719 memcpy(PendingCMD[i].DataDestAddr,
720 PendingCMD[i].DataSrcAddr,
721 PendingCMD[i].MemCopyByteCnt);
722 case DUMMY_CMD:
723 PendingCMD[i].Status = PASS;
724 break;
725 default:
726 PendingCMD[i].Status = FAIL;
727 break;
728 }
729 }
730
731 /*
732 * Temperory adding code to reset PendingCMD array for basic testing.
733 * It should be done at the end of event status function.
734 */
735 for (i = tag_count + MAX_CHANS; i < MAX_DESCS; i++) {
736 PendingCMD[i].CMD = 0;
737 PendingCMD[i].Tag = 0;
738 PendingCMD[i].DataAddr = 0;
739 PendingCMD[i].Block = 0;
740 PendingCMD[i].Page = 0;
741 PendingCMD[i].PageCount = 0;
742 PendingCMD[i].DataDestAddr = 0;
743 PendingCMD[i].DataSrcAddr = 0;
744 PendingCMD[i].MemCopyByteCnt = 0;
745 PendingCMD[i].ChanSync[0] = 0;
746 PendingCMD[i].ChanSync[1] = 0;
747 PendingCMD[i].ChanSync[2] = 0;
748 PendingCMD[i].ChanSync[3] = 0;
749 PendingCMD[i].ChanSync[4] = 0;
750 PendingCMD[i].Status = CMD_NOT_DONE;
751 }
752
753 nand_dbg_print(NAND_DBG_TRACE, "At end of Execute CMDs.\n");
754
755 emu_isr(0, 0); /* This is a null isr now. Need fill it in future */
756
757 return status;
758}
759
760/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
761* Function: emu_Event_Status
762* Inputs: none
763* Outputs: Event_Status code
764* Description: This function can also be used to force errors
765*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
766u16 emu_CDMA_Event_Status(void)
767{
768 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
769 __FILE__, __LINE__, __func__);
770
771 return EVENT_PASS;
772}
773
774#endif /* CMD_DMA */
775#endif /* !ELDORA */
776#endif /* FLASH_EMU */
diff --git a/drivers/staging/spectra/lld_emu.h b/drivers/staging/spectra/lld_emu.h
deleted file mode 100644
index 63f84c38d3c1..000000000000
--- a/drivers/staging/spectra/lld_emu.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _LLD_EMU_
21#define _LLD_EMU_
22
23#include "ffsport.h"
24#include "ffsdefs.h"
25
26/* prototypes: emulator API functions */
27extern u16 emu_Flash_Reset(void);
28extern u16 emu_Flash_Init(void);
29extern int emu_Flash_Release(void);
30extern u16 emu_Read_Device_ID(void);
31extern u16 emu_Erase_Block(u32 block_addr);
32extern u16 emu_Write_Page_Main(u8 *write_data, u32 Block,
33 u16 Page, u16 PageCount);
34extern u16 emu_Read_Page_Main(u8 *read_data, u32 Block, u16 Page,
35 u16 PageCount);
36extern u16 emu_Event_Status(void);
37extern void emu_Enable_Disable_Interrupts(u16 INT_ENABLE);
38extern u16 emu_Write_Page_Main_Spare(u8 *write_data, u32 Block,
39 u16 Page, u16 PageCount);
40extern u16 emu_Write_Page_Spare(u8 *write_data, u32 Block,
41 u16 Page, u16 PageCount);
42extern u16 emu_Read_Page_Main_Spare(u8 *read_data, u32 Block,
43 u16 Page, u16 PageCount);
44extern u16 emu_Read_Page_Spare(u8 *read_data, u32 Block, u16 Page,
45 u16 PageCount);
46extern u16 emu_Get_Bad_Block(u32 block);
47
48u16 emu_CDMA_Flash_Init(void);
49u16 emu_CDMA_Execute_CMDs(u16 tag_count);
50u16 emu_CDMA_Event_Status(void);
51#endif /*_LLD_EMU_*/
diff --git a/drivers/staging/spectra/lld_mtd.c b/drivers/staging/spectra/lld_mtd.c
deleted file mode 100644
index a9c309a167c2..000000000000
--- a/drivers/staging/spectra/lld_mtd.c
+++ /dev/null
@@ -1,683 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include <linux/fs.h>
21#include <linux/slab.h>
22#include <linux/mtd/mtd.h>
23#include "flash.h"
24#include "ffsdefs.h"
25#include "lld_emu.h"
26#include "lld.h"
27#if CMD_DMA
28#include "lld_cdma.h"
29u32 totalUsedBanks;
30u32 valid_banks[MAX_CHANS];
31#endif
32
33#define GLOB_LLD_PAGES 64
34#define GLOB_LLD_PAGE_SIZE (512+16)
35#define GLOB_LLD_PAGE_DATA_SIZE 512
36#define GLOB_LLD_BLOCKS 2048
37
38static struct mtd_info *spectra_mtd;
39static int mtddev = -1;
40module_param(mtddev, int, 0);
41
42/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
43* Function: mtd_Flash_Init
44* Inputs: none
45* Outputs: PASS=0 (notice 0=ok here)
46* Description: Creates & initializes the flash RAM array.
47*
48*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
49u16 mtd_Flash_Init(void)
50{
51 if (mtddev == -1) {
52 printk(KERN_ERR "No MTD device specified. Give mtddev parameter\n");
53 return FAIL;
54 }
55
56 spectra_mtd = get_mtd_device(NULL, mtddev);
57 if (!spectra_mtd) {
58 printk(KERN_ERR "Failed to obtain MTD device #%d\n", mtddev);
59 return FAIL;
60 }
61
62 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
63 __FILE__, __LINE__, __func__);
64
65 return PASS;
66}
67
68/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
69* Function: mtd_Flash_Release
70* Inputs: none
71* Outputs: PASS=0 (notice 0=ok here)
72* Description: Releases the flash.
73*
74*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
75int mtd_Flash_Release(void)
76{
77 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
78 __FILE__, __LINE__, __func__);
79 if (!spectra_mtd)
80 return PASS;
81
82 put_mtd_device(spectra_mtd);
83 spectra_mtd = NULL;
84
85 return PASS;
86}
87
88/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
89* Function: mtd_Read_Device_ID
90* Inputs: none
91* Outputs: PASS=1 FAIL=0
92* Description: Reads the info from the controller registers.
93* Sets up DeviceInfo structure with device parameters
94*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
95
96u16 mtd_Read_Device_ID(void)
97{
98 uint64_t tmp;
99 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
100 __FILE__, __LINE__, __func__);
101
102 if (!spectra_mtd)
103 return FAIL;
104
105 DeviceInfo.wDeviceMaker = 0;
106 DeviceInfo.wDeviceType = 8;
107 DeviceInfo.wSpectraStartBlock = SPECTRA_START_BLOCK;
108 tmp = spectra_mtd->size;
109 do_div(tmp, spectra_mtd->erasesize);
110 DeviceInfo.wTotalBlocks = tmp;
111 DeviceInfo.wSpectraEndBlock = DeviceInfo.wTotalBlocks - 1;
112 DeviceInfo.wPagesPerBlock = spectra_mtd->erasesize / spectra_mtd->writesize;
113 DeviceInfo.wPageSize = spectra_mtd->writesize + spectra_mtd->oobsize;
114 DeviceInfo.wPageDataSize = spectra_mtd->writesize;
115 DeviceInfo.wPageSpareSize = spectra_mtd->oobsize;
116 DeviceInfo.wBlockSize = DeviceInfo.wPageSize * DeviceInfo.wPagesPerBlock;
117 DeviceInfo.wBlockDataSize = DeviceInfo.wPageDataSize * DeviceInfo.wPagesPerBlock;
118 DeviceInfo.wDataBlockNum = (u32) (DeviceInfo.wSpectraEndBlock -
119 DeviceInfo.wSpectraStartBlock
120 + 1);
121 DeviceInfo.MLCDevice = 0;//spectra_mtd->celltype & NAND_CI_CELLTYPE_MSK;
122 DeviceInfo.nBitsInPageNumber =
123 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wPagesPerBlock);
124 DeviceInfo.nBitsInPageDataSize =
125 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wPageDataSize);
126 DeviceInfo.nBitsInBlockDataSize =
127 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wBlockDataSize);
128
129#if CMD_DMA
130 totalUsedBanks = 4;
131 valid_banks[0] = 1;
132 valid_banks[1] = 1;
133 valid_banks[2] = 1;
134 valid_banks[3] = 1;
135#endif
136
137 return PASS;
138}
139
140/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
141* Function: mtd_Flash_Reset
142* Inputs: none
143* Outputs: PASS=0 (notice 0=ok here)
144* Description: Reset the flash
145*
146*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
147u16 mtd_Flash_Reset(void)
148{
149 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
150 __FILE__, __LINE__, __func__);
151
152 return PASS;
153}
154
155void erase_callback(struct erase_info *e)
156{
157 complete((void *)e->priv);
158}
159
160/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
161* Function: mtd_Erase_Block
162* Inputs: Address
163* Outputs: PASS=0 (notice 0=ok here)
164* Description: Erase a block
165*
166*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
167u16 mtd_Erase_Block(u32 block_add)
168{
169 struct erase_info erase;
170 DECLARE_COMPLETION_ONSTACK(comp);
171 int ret;
172
173 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
174 __FILE__, __LINE__, __func__);
175
176 if (block_add >= DeviceInfo.wTotalBlocks) {
177 printk(KERN_ERR "mtd_Erase_Block error! "
178 "Too big block address: %d\n", block_add);
179 return FAIL;
180 }
181
182 nand_dbg_print(NAND_DBG_DEBUG, "Erasing block %d\n",
183 (int)block_add);
184
185 erase.mtd = spectra_mtd;
186 erase.callback = erase_callback;
187 erase.addr = block_add * spectra_mtd->erasesize;
188 erase.len = spectra_mtd->erasesize;
189 erase.priv = (unsigned long)&comp;
190
191 ret = spectra_mtd->erase(spectra_mtd, &erase);
192 if (!ret) {
193 wait_for_completion(&comp);
194 if (erase.state != MTD_ERASE_DONE)
195 ret = -EIO;
196 }
197 if (ret) {
198 printk(KERN_WARNING "mtd_Erase_Block error! "
199 "erase of region [0x%llx, 0x%llx] failed\n",
200 erase.addr, erase.len);
201 return FAIL;
202 }
203
204 return PASS;
205}
206
207/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
208* Function: mtd_Write_Page_Main
209* Inputs: Write buffer address pointer
210* Block number
211* Page number
212* Number of pages to process
213* Outputs: PASS=0 (notice 0=ok here)
214* Description: Write the data in the buffer to main area of flash
215*
216*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
217u16 mtd_Write_Page_Main(u8 *write_data, u32 Block,
218 u16 Page, u16 PageCount)
219{
220 size_t retlen;
221 int ret = 0;
222
223 if (Block >= DeviceInfo.wTotalBlocks)
224 return FAIL;
225
226 if (Page + PageCount > DeviceInfo.wPagesPerBlock)
227 return FAIL;
228
229 nand_dbg_print(NAND_DBG_DEBUG, "mtd_Write_Page_Main: "
230 "lba %u Page %u PageCount %u\n",
231 (unsigned int)Block,
232 (unsigned int)Page, (unsigned int)PageCount);
233
234
235 while (PageCount) {
236 ret = spectra_mtd->write(spectra_mtd,
237 (Block * spectra_mtd->erasesize) + (Page * spectra_mtd->writesize),
238 DeviceInfo.wPageDataSize, &retlen, write_data);
239 if (ret) {
240 printk(KERN_ERR "%s failed %d\n", __func__, ret);
241 return FAIL;
242 }
243 write_data += DeviceInfo.wPageDataSize;
244 Page++;
245 PageCount--;
246 }
247
248 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
249 __FILE__, __LINE__, __func__);
250
251 return PASS;
252}
253
254/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
255* Function: mtd_Read_Page_Main
256* Inputs: Read buffer address pointer
257* Block number
258* Page number
259* Number of pages to process
260* Outputs: PASS=0 (notice 0=ok here)
261* Description: Read the data from the flash main area to the buffer
262*
263*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
264u16 mtd_Read_Page_Main(u8 *read_data, u32 Block,
265 u16 Page, u16 PageCount)
266{
267 size_t retlen;
268 int ret = 0;
269
270 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
271 __FILE__, __LINE__, __func__);
272
273 if (Block >= DeviceInfo.wTotalBlocks)
274 return FAIL;
275
276 if (Page + PageCount > DeviceInfo.wPagesPerBlock)
277 return FAIL;
278
279 nand_dbg_print(NAND_DBG_DEBUG, "mtd_Read_Page_Main: "
280 "lba %u Page %u PageCount %u\n",
281 (unsigned int)Block,
282 (unsigned int)Page, (unsigned int)PageCount);
283
284
285 while (PageCount) {
286 ret = spectra_mtd->read(spectra_mtd,
287 (Block * spectra_mtd->erasesize) + (Page * spectra_mtd->writesize),
288 DeviceInfo.wPageDataSize, &retlen, read_data);
289 if (ret) {
290 printk(KERN_ERR "%s failed %d\n", __func__, ret);
291 return FAIL;
292 }
293 read_data += DeviceInfo.wPageDataSize;
294 Page++;
295 PageCount--;
296 }
297
298 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
299 __FILE__, __LINE__, __func__);
300
301 return PASS;
302}
303
304#ifndef ELDORA
305/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
306* Function: mtd_Read_Page_Main_Spare
307* Inputs: Write Buffer
308* Address
309* Buffer size
310* Outputs: PASS=0 (notice 0=ok here)
311* Description: Read from flash main+spare area
312*
313*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
314u16 mtd_Read_Page_Main_Spare(u8 *read_data, u32 Block,
315 u16 Page, u16 PageCount)
316{
317 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
318 __FILE__, __LINE__, __func__);
319
320 if (Block >= DeviceInfo.wTotalBlocks) {
321 printk(KERN_ERR "Read Page Main+Spare "
322 "Error: Block Address too big\n");
323 return FAIL;
324 }
325
326 if (Page + PageCount > DeviceInfo.wPagesPerBlock) {
327 printk(KERN_ERR "Read Page Main+Spare "
328 "Error: Page number %d+%d too big in block %d\n",
329 Page, PageCount, Block);
330 return FAIL;
331 }
332
333 nand_dbg_print(NAND_DBG_DEBUG, "Read Page Main + Spare - "
334 "No. of pages %u block %u start page %u\n",
335 (unsigned int)PageCount,
336 (unsigned int)Block, (unsigned int)Page);
337
338
339 while (PageCount) {
340 struct mtd_oob_ops ops;
341 int ret;
342
343 ops.mode = MTD_OPS_AUTO_OOB;
344 ops.datbuf = read_data;
345 ops.len = DeviceInfo.wPageDataSize;
346 ops.oobbuf = read_data + DeviceInfo.wPageDataSize + BTSIG_OFFSET;
347 ops.ooblen = BTSIG_BYTES;
348 ops.ooboffs = 0;
349
350 ret = spectra_mtd->read_oob(spectra_mtd,
351 (Block * spectra_mtd->erasesize) + (Page * spectra_mtd->writesize),
352 &ops);
353 if (ret) {
354 printk(KERN_ERR "%s failed %d\n", __func__, ret);
355 return FAIL;
356 }
357 read_data += DeviceInfo.wPageSize;
358 Page++;
359 PageCount--;
360 }
361
362 return PASS;
363}
364
365/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
366* Function: mtd_Write_Page_Main_Spare
367* Inputs: Write buffer
368* address
369* buffer length
370* Outputs: PASS=0 (notice 0=ok here)
371* Description: Write the buffer to main+spare area of flash
372*
373*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
374u16 mtd_Write_Page_Main_Spare(u8 *write_data, u32 Block,
375 u16 Page, u16 page_count)
376{
377 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
378 __FILE__, __LINE__, __func__);
379
380 if (Block >= DeviceInfo.wTotalBlocks) {
381 printk(KERN_ERR "Write Page Main + Spare "
382 "Error: Block Address too big\n");
383 return FAIL;
384 }
385
386 if (Page + page_count > DeviceInfo.wPagesPerBlock) {
387 printk(KERN_ERR "Write Page Main + Spare "
388 "Error: Page number %d+%d too big in block %d\n",
389 Page, page_count, Block);
390 WARN_ON(1);
391 return FAIL;
392 }
393
394 nand_dbg_print(NAND_DBG_DEBUG, "Write Page Main+Spare - "
395 "No. of pages %u block %u start page %u\n",
396 (unsigned int)page_count,
397 (unsigned int)Block, (unsigned int)Page);
398
399 while (page_count) {
400 struct mtd_oob_ops ops;
401 int ret;
402
403 ops.mode = MTD_OPS_AUTO_OOB;
404 ops.datbuf = write_data;
405 ops.len = DeviceInfo.wPageDataSize;
406 ops.oobbuf = write_data + DeviceInfo.wPageDataSize + BTSIG_OFFSET;
407 ops.ooblen = BTSIG_BYTES;
408 ops.ooboffs = 0;
409
410 ret = spectra_mtd->write_oob(spectra_mtd,
411 (Block * spectra_mtd->erasesize) + (Page * spectra_mtd->writesize),
412 &ops);
413 if (ret) {
414 printk(KERN_ERR "%s failed %d\n", __func__, ret);
415 return FAIL;
416 }
417 write_data += DeviceInfo.wPageSize;
418 Page++;
419 page_count--;
420 }
421
422 return PASS;
423}
424
425/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
426* Function: mtd_Write_Page_Spare
427* Inputs: Write buffer
428* Address
429* buffer size
430* Outputs: PASS=0 (notice 0=ok here)
431* Description: Write the buffer in the spare area
432*
433*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
434u16 mtd_Write_Page_Spare(u8 *write_data, u32 Block,
435 u16 Page, u16 PageCount)
436{
437 WARN_ON(1);
438 return FAIL;
439}
440
441/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
442* Function: mtd_Read_Page_Spare
443* Inputs: Write Buffer
444* Address
445* Buffer size
446* Outputs: PASS=0 (notice 0=ok here)
447* Description: Read data from the spare area
448*
449*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
450u16 mtd_Read_Page_Spare(u8 *read_data, u32 Block,
451 u16 Page, u16 PageCount)
452{
453 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
454 __FILE__, __LINE__, __func__);
455
456 if (Block >= DeviceInfo.wTotalBlocks) {
457 printk(KERN_ERR "Read Page Spare "
458 "Error: Block Address too big\n");
459 return FAIL;
460 }
461
462 if (Page + PageCount > DeviceInfo.wPagesPerBlock) {
463 printk(KERN_ERR "Read Page Spare "
464 "Error: Page number too big\n");
465 return FAIL;
466 }
467
468 nand_dbg_print(NAND_DBG_DEBUG, "Read Page Spare- "
469 "block %u page %u (%u pages)\n",
470 (unsigned int)Block, (unsigned int)Page, PageCount);
471
472 while (PageCount) {
473 struct mtd_oob_ops ops;
474 int ret;
475
476 ops.mode = MTD_OPS_AUTO_OOB;
477 ops.datbuf = NULL;
478 ops.len = 0;
479 ops.oobbuf = read_data;
480 ops.ooblen = BTSIG_BYTES;
481 ops.ooboffs = 0;
482
483 ret = spectra_mtd->read_oob(spectra_mtd,
484 (Block * spectra_mtd->erasesize) + (Page * spectra_mtd->writesize),
485 &ops);
486 if (ret) {
487 printk(KERN_ERR "%s failed %d\n", __func__, ret);
488 return FAIL;
489 }
490
491 read_data += DeviceInfo.wPageSize;
492 Page++;
493 PageCount--;
494 }
495
496 return PASS;
497}
498
499/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
500* Function: mtd_Enable_Disable_Interrupts
501* Inputs: enable or disable
502* Outputs: none
503* Description: NOP
504*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
505void mtd_Enable_Disable_Interrupts(u16 INT_ENABLE)
506{
507 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
508 __FILE__, __LINE__, __func__);
509}
510
511u16 mtd_Get_Bad_Block(u32 block)
512{
513 return 0;
514}
515
516#if CMD_DMA
517/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
518* Support for CDMA functions
519************************************
520* mtd_CDMA_Flash_Init
521* CDMA_process_data command (use LLD_CDMA)
522* CDMA_MemCopy_CMD (use LLD_CDMA)
523* mtd_CDMA_execute all commands
524* mtd_CDMA_Event_Status
525*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
526u16 mtd_CDMA_Flash_Init(void)
527{
528 u16 i;
529
530 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
531 __FILE__, __LINE__, __func__);
532
533 for (i = 0; i < MAX_DESCS + MAX_CHANS; i++) {
534 PendingCMD[i].CMD = 0;
535 PendingCMD[i].Tag = 0;
536 PendingCMD[i].DataAddr = 0;
537 PendingCMD[i].Block = 0;
538 PendingCMD[i].Page = 0;
539 PendingCMD[i].PageCount = 0;
540 PendingCMD[i].DataDestAddr = 0;
541 PendingCMD[i].DataSrcAddr = 0;
542 PendingCMD[i].MemCopyByteCnt = 0;
543 PendingCMD[i].ChanSync[0] = 0;
544 PendingCMD[i].ChanSync[1] = 0;
545 PendingCMD[i].ChanSync[2] = 0;
546 PendingCMD[i].ChanSync[3] = 0;
547 PendingCMD[i].ChanSync[4] = 0;
548 PendingCMD[i].Status = 3;
549 }
550
551 return PASS;
552}
553
554static void mtd_isr(int irq, void *dev_id)
555{
556 /* TODO: ... */
557}
558
559/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
560* Function: CDMA_Execute_CMDs
561* Inputs: tag_count: the number of pending cmds to do
562* Outputs: PASS/FAIL
563* Description: execute each command in the pending CMD array
564*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
565u16 mtd_CDMA_Execute_CMDs(u16 tag_count)
566{
567 u16 i, j;
568 u8 CMD; /* cmd parameter */
569 u8 *data;
570 u32 block;
571 u16 page;
572 u16 count;
573 u16 status = PASS;
574
575 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
576 __FILE__, __LINE__, __func__);
577
578 nand_dbg_print(NAND_DBG_TRACE, "At start of Execute CMDs: "
579 "Tag Count %u\n", tag_count);
580
581 for (i = 0; i < totalUsedBanks; i++) {
582 PendingCMD[i].CMD = DUMMY_CMD;
583 PendingCMD[i].Tag = 0xFF;
584 PendingCMD[i].Block =
585 (DeviceInfo.wTotalBlocks / totalUsedBanks) * i;
586
587 for (j = 0; j <= MAX_CHANS; j++)
588 PendingCMD[i].ChanSync[j] = 0;
589 }
590
591 CDMA_Execute_CMDs(tag_count);
592
593#ifdef VERBOSE
594 print_pending_cmds(tag_count);
595#endif
596#if DEBUG_SYNC
597 }
598 debug_sync_cnt++;
599#endif
600
601 for (i = MAX_CHANS;
602 i < tag_count + MAX_CHANS; i++) {
603 CMD = PendingCMD[i].CMD;
604 data = PendingCMD[i].DataAddr;
605 block = PendingCMD[i].Block;
606 page = PendingCMD[i].Page;
607 count = PendingCMD[i].PageCount;
608
609 switch (CMD) {
610 case ERASE_CMD:
611 mtd_Erase_Block(block);
612 PendingCMD[i].Status = PASS;
613 break;
614 case WRITE_MAIN_CMD:
615 mtd_Write_Page_Main(data, block, page, count);
616 PendingCMD[i].Status = PASS;
617 break;
618 case WRITE_MAIN_SPARE_CMD:
619 mtd_Write_Page_Main_Spare(data, block, page, count);
620 PendingCMD[i].Status = PASS;
621 break;
622 case READ_MAIN_CMD:
623 mtd_Read_Page_Main(data, block, page, count);
624 PendingCMD[i].Status = PASS;
625 break;
626 case MEMCOPY_CMD:
627 memcpy(PendingCMD[i].DataDestAddr,
628 PendingCMD[i].DataSrcAddr,
629 PendingCMD[i].MemCopyByteCnt);
630 case DUMMY_CMD:
631 PendingCMD[i].Status = PASS;
632 break;
633 default:
634 PendingCMD[i].Status = FAIL;
635 break;
636 }
637 }
638
639 /*
640 * Temperory adding code to reset PendingCMD array for basic testing.
641 * It should be done at the end of event status function.
642 */
643 for (i = tag_count + MAX_CHANS; i < MAX_DESCS; i++) {
644 PendingCMD[i].CMD = 0;
645 PendingCMD[i].Tag = 0;
646 PendingCMD[i].DataAddr = 0;
647 PendingCMD[i].Block = 0;
648 PendingCMD[i].Page = 0;
649 PendingCMD[i].PageCount = 0;
650 PendingCMD[i].DataDestAddr = 0;
651 PendingCMD[i].DataSrcAddr = 0;
652 PendingCMD[i].MemCopyByteCnt = 0;
653 PendingCMD[i].ChanSync[0] = 0;
654 PendingCMD[i].ChanSync[1] = 0;
655 PendingCMD[i].ChanSync[2] = 0;
656 PendingCMD[i].ChanSync[3] = 0;
657 PendingCMD[i].ChanSync[4] = 0;
658 PendingCMD[i].Status = CMD_NOT_DONE;
659 }
660
661 nand_dbg_print(NAND_DBG_TRACE, "At end of Execute CMDs.\n");
662
663 mtd_isr(0, 0); /* This is a null isr now. Need fill it in future */
664
665 return status;
666}
667
668/*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&
669* Function: mtd_Event_Status
670* Inputs: none
671* Outputs: Event_Status code
672* Description: This function can also be used to force errors
673*&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&*/
674u16 mtd_CDMA_Event_Status(void)
675{
676 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
677 __FILE__, __LINE__, __func__);
678
679 return EVENT_PASS;
680}
681
682#endif /* CMD_DMA */
683#endif /* !ELDORA */
diff --git a/drivers/staging/spectra/lld_mtd.h b/drivers/staging/spectra/lld_mtd.h
deleted file mode 100644
index 4e81ee87b53d..000000000000
--- a/drivers/staging/spectra/lld_mtd.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _LLD_MTD_
21#define _LLD_MTD_
22
23#include "ffsport.h"
24#include "ffsdefs.h"
25
26/* prototypes: MTD API functions */
27extern u16 mtd_Flash_Reset(void);
28extern u16 mtd_Flash_Init(void);
29extern int mtd_Flash_Release(void);
30extern u16 mtd_Read_Device_ID(void);
31extern u16 mtd_Erase_Block(u32 block_addr);
32extern u16 mtd_Write_Page_Main(u8 *write_data, u32 Block,
33 u16 Page, u16 PageCount);
34extern u16 mtd_Read_Page_Main(u8 *read_data, u32 Block, u16 Page,
35 u16 PageCount);
36extern u16 mtd_Event_Status(void);
37extern void mtd_Enable_Disable_Interrupts(u16 INT_ENABLE);
38extern u16 mtd_Write_Page_Main_Spare(u8 *write_data, u32 Block,
39 u16 Page, u16 PageCount);
40extern u16 mtd_Write_Page_Spare(u8 *write_data, u32 Block,
41 u16 Page, u16 PageCount);
42extern u16 mtd_Read_Page_Main_Spare(u8 *read_data, u32 Block,
43 u16 Page, u16 PageCount);
44extern u16 mtd_Read_Page_Spare(u8 *read_data, u32 Block, u16 Page,
45 u16 PageCount);
46extern u16 mtd_Get_Bad_Block(u32 block);
47
48u16 mtd_CDMA_Flash_Init(void);
49u16 mtd_CDMA_Execute_CMDs(u16 tag_count);
50u16 mtd_CDMA_Event_Status(void);
51#endif /*_LLD_MTD_*/
diff --git a/drivers/staging/spectra/lld_nand.c b/drivers/staging/spectra/lld_nand.c
deleted file mode 100644
index 60a14ff26c7f..000000000000
--- a/drivers/staging/spectra/lld_nand.c
+++ /dev/null
@@ -1,2619 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#include "lld.h"
21#include "lld_nand.h"
22#include "lld_cdma.h"
23
24#include "spectraswconfig.h"
25#include "flash.h"
26#include "ffsdefs.h"
27
28#include <linux/interrupt.h>
29#include <linux/delay.h>
30#include <linux/wait.h>
31#include <linux/mutex.h>
32
33#include "nand_regs.h"
34
35#define SPECTRA_NAND_NAME "nd"
36
37#define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y)))
38#define MAX_PAGES_PER_RW 128
39
40#define INT_IDLE_STATE 0
41#define INT_READ_PAGE_MAIN 0x01
42#define INT_WRITE_PAGE_MAIN 0x02
43#define INT_PIPELINE_READ_AHEAD 0x04
44#define INT_PIPELINE_WRITE_AHEAD 0x08
45#define INT_MULTI_PLANE_READ 0x10
46#define INT_MULTI_PLANE_WRITE 0x11
47
48static u32 enable_ecc;
49
50struct mrst_nand_info info;
51
52int totalUsedBanks;
53u32 GLOB_valid_banks[LLD_MAX_FLASH_BANKS];
54
55void __iomem *FlashReg;
56void __iomem *FlashMem;
57
58u16 conf_parameters[] = {
59 0x0000,
60 0x0000,
61 0x01F4,
62 0x01F4,
63 0x01F4,
64 0x01F4,
65 0x0000,
66 0x0000,
67 0x0001,
68 0x0000,
69 0x0000,
70 0x0000,
71 0x0000,
72 0x0040,
73 0x0001,
74 0x000A,
75 0x000A,
76 0x000A,
77 0x0000,
78 0x0000,
79 0x0005,
80 0x0012,
81 0x000C
82};
83
84u16 NAND_Get_Bad_Block(u32 block)
85{
86 u32 status = PASS;
87 u32 flag_bytes = 0;
88 u32 skip_bytes = DeviceInfo.wSpareSkipBytes;
89 u32 page, i;
90 u8 *pReadSpareBuf = buf_get_bad_block;
91
92 if (enable_ecc)
93 flag_bytes = DeviceInfo.wNumPageSpareFlag;
94
95 for (page = 0; page < 2; page++) {
96 status = NAND_Read_Page_Spare(pReadSpareBuf, block, page, 1);
97 if (status != PASS)
98 return READ_ERROR;
99 for (i = flag_bytes; i < (flag_bytes + skip_bytes); i++)
100 if (pReadSpareBuf[i] != 0xff)
101 return DEFECTIVE_BLOCK;
102 }
103
104 for (page = 1; page < 3; page++) {
105 status = NAND_Read_Page_Spare(pReadSpareBuf, block,
106 DeviceInfo.wPagesPerBlock - page , 1);
107 if (status != PASS)
108 return READ_ERROR;
109 for (i = flag_bytes; i < (flag_bytes + skip_bytes); i++)
110 if (pReadSpareBuf[i] != 0xff)
111 return DEFECTIVE_BLOCK;
112 }
113
114 return GOOD_BLOCK;
115}
116
117
118u16 NAND_Flash_Reset(void)
119{
120 u32 i;
121 u32 intr_status_rst_comp[4] = {INTR_STATUS0__RST_COMP,
122 INTR_STATUS1__RST_COMP,
123 INTR_STATUS2__RST_COMP,
124 INTR_STATUS3__RST_COMP};
125 u32 intr_status_time_out[4] = {INTR_STATUS0__TIME_OUT,
126 INTR_STATUS1__TIME_OUT,
127 INTR_STATUS2__TIME_OUT,
128 INTR_STATUS3__TIME_OUT};
129 u32 intr_status[4] = {INTR_STATUS0, INTR_STATUS1,
130 INTR_STATUS2, INTR_STATUS3};
131 u32 device_reset_banks[4] = {DEVICE_RESET__BANK0,
132 DEVICE_RESET__BANK1,
133 DEVICE_RESET__BANK2,
134 DEVICE_RESET__BANK3};
135
136 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
137 __FILE__, __LINE__, __func__);
138
139 for (i = 0 ; i < LLD_MAX_FLASH_BANKS; i++)
140 iowrite32(intr_status_rst_comp[i] | intr_status_time_out[i],
141 FlashReg + intr_status[i]);
142
143 for (i = 0 ; i < LLD_MAX_FLASH_BANKS; i++) {
144 iowrite32(device_reset_banks[i], FlashReg + DEVICE_RESET);
145 while (!(ioread32(FlashReg + intr_status[i]) &
146 (intr_status_rst_comp[i] | intr_status_time_out[i])))
147 ;
148 if (ioread32(FlashReg + intr_status[i]) &
149 intr_status_time_out[i])
150 nand_dbg_print(NAND_DBG_WARN,
151 "NAND Reset operation timed out on bank %d\n", i);
152 }
153
154 for (i = 0; i < LLD_MAX_FLASH_BANKS; i++)
155 iowrite32(intr_status_rst_comp[i] | intr_status_time_out[i],
156 FlashReg + intr_status[i]);
157
158 return PASS;
159}
160
161static void NAND_ONFi_Timing_Mode(u16 mode)
162{
163 u16 Trea[6] = {40, 30, 25, 20, 20, 16};
164 u16 Trp[6] = {50, 25, 17, 15, 12, 10};
165 u16 Treh[6] = {30, 15, 15, 10, 10, 7};
166 u16 Trc[6] = {100, 50, 35, 30, 25, 20};
167 u16 Trhoh[6] = {0, 15, 15, 15, 15, 15};
168 u16 Trloh[6] = {0, 0, 0, 0, 5, 5};
169 u16 Tcea[6] = {100, 45, 30, 25, 25, 25};
170 u16 Tadl[6] = {200, 100, 100, 100, 70, 70};
171 u16 Trhw[6] = {200, 100, 100, 100, 100, 100};
172 u16 Trhz[6] = {200, 100, 100, 100, 100, 100};
173 u16 Twhr[6] = {120, 80, 80, 60, 60, 60};
174 u16 Tcs[6] = {70, 35, 25, 25, 20, 15};
175
176 u16 TclsRising = 1;
177 u16 data_invalid_rhoh, data_invalid_rloh, data_invalid;
178 u16 dv_window = 0;
179 u16 en_lo, en_hi;
180 u16 acc_clks;
181 u16 addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
182
183 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
184 __FILE__, __LINE__, __func__);
185
186 en_lo = CEIL_DIV(Trp[mode], CLK_X);
187 en_hi = CEIL_DIV(Treh[mode], CLK_X);
188
189#if ONFI_BLOOM_TIME
190 if ((en_hi * CLK_X) < (Treh[mode] + 2))
191 en_hi++;
192#endif
193
194 if ((en_lo + en_hi) * CLK_X < Trc[mode])
195 en_lo += CEIL_DIV((Trc[mode] - (en_lo + en_hi) * CLK_X), CLK_X);
196
197 if ((en_lo + en_hi) < CLK_MULTI)
198 en_lo += CLK_MULTI - en_lo - en_hi;
199
200 while (dv_window < 8) {
201 data_invalid_rhoh = en_lo * CLK_X + Trhoh[mode];
202
203 data_invalid_rloh = (en_lo + en_hi) * CLK_X + Trloh[mode];
204
205 data_invalid =
206 data_invalid_rhoh <
207 data_invalid_rloh ? data_invalid_rhoh : data_invalid_rloh;
208
209 dv_window = data_invalid - Trea[mode];
210
211 if (dv_window < 8)
212 en_lo++;
213 }
214
215 acc_clks = CEIL_DIV(Trea[mode], CLK_X);
216
217 while (((acc_clks * CLK_X) - Trea[mode]) < 3)
218 acc_clks++;
219
220 if ((data_invalid - acc_clks * CLK_X) < 2)
221 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d: Warning!\n",
222 __FILE__, __LINE__);
223
224 addr_2_data = CEIL_DIV(Tadl[mode], CLK_X);
225 re_2_we = CEIL_DIV(Trhw[mode], CLK_X);
226 re_2_re = CEIL_DIV(Trhz[mode], CLK_X);
227 we_2_re = CEIL_DIV(Twhr[mode], CLK_X);
228 cs_cnt = CEIL_DIV((Tcs[mode] - Trp[mode]), CLK_X);
229 if (!TclsRising)
230 cs_cnt = CEIL_DIV(Tcs[mode], CLK_X);
231 if (cs_cnt == 0)
232 cs_cnt = 1;
233
234 if (Tcea[mode]) {
235 while (((cs_cnt * CLK_X) + Trea[mode]) < Tcea[mode])
236 cs_cnt++;
237 }
238
239#if MODE5_WORKAROUND
240 if (mode == 5)
241 acc_clks = 5;
242#endif
243
244 /* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */
245 if ((ioread32(FlashReg + MANUFACTURER_ID) == 0) &&
246 (ioread32(FlashReg + DEVICE_ID) == 0x88))
247 acc_clks = 6;
248
249 iowrite32(acc_clks, FlashReg + ACC_CLKS);
250 iowrite32(re_2_we, FlashReg + RE_2_WE);
251 iowrite32(re_2_re, FlashReg + RE_2_RE);
252 iowrite32(we_2_re, FlashReg + WE_2_RE);
253 iowrite32(addr_2_data, FlashReg + ADDR_2_DATA);
254 iowrite32(en_lo, FlashReg + RDWR_EN_LO_CNT);
255 iowrite32(en_hi, FlashReg + RDWR_EN_HI_CNT);
256 iowrite32(cs_cnt, FlashReg + CS_SETUP_CNT);
257}
258
259static void index_addr(u32 address, u32 data)
260{
261 iowrite32(address, FlashMem);
262 iowrite32(data, FlashMem + 0x10);
263}
264
265static void index_addr_read_data(u32 address, u32 *pdata)
266{
267 iowrite32(address, FlashMem);
268 *pdata = ioread32(FlashMem + 0x10);
269}
270
271static void set_ecc_config(void)
272{
273#if SUPPORT_8BITECC
274 if ((ioread32(FlashReg + DEVICE_MAIN_AREA_SIZE) < 4096) ||
275 (ioread32(FlashReg + DEVICE_SPARE_AREA_SIZE) <= 128))
276 iowrite32(8, FlashReg + ECC_CORRECTION);
277#endif
278
279 if ((ioread32(FlashReg + ECC_CORRECTION) & ECC_CORRECTION__VALUE)
280 == 1) {
281 DeviceInfo.wECCBytesPerSector = 4;
282 DeviceInfo.wECCBytesPerSector *= DeviceInfo.wDevicesConnected;
283 DeviceInfo.wNumPageSpareFlag =
284 DeviceInfo.wPageSpareSize -
285 DeviceInfo.wPageDataSize /
286 (ECC_SECTOR_SIZE * DeviceInfo.wDevicesConnected) *
287 DeviceInfo.wECCBytesPerSector
288 - DeviceInfo.wSpareSkipBytes;
289 } else {
290 DeviceInfo.wECCBytesPerSector =
291 (ioread32(FlashReg + ECC_CORRECTION) &
292 ECC_CORRECTION__VALUE) * 13 / 8;
293 if ((DeviceInfo.wECCBytesPerSector) % 2 == 0)
294 DeviceInfo.wECCBytesPerSector += 2;
295 else
296 DeviceInfo.wECCBytesPerSector += 1;
297
298 DeviceInfo.wECCBytesPerSector *= DeviceInfo.wDevicesConnected;
299 DeviceInfo.wNumPageSpareFlag = DeviceInfo.wPageSpareSize -
300 DeviceInfo.wPageDataSize /
301 (ECC_SECTOR_SIZE * DeviceInfo.wDevicesConnected) *
302 DeviceInfo.wECCBytesPerSector
303 - DeviceInfo.wSpareSkipBytes;
304 }
305}
306
307static u16 get_onfi_nand_para(void)
308{
309 int i;
310 u16 blks_lun_l, blks_lun_h, n_of_luns;
311 u32 blockperlun, id;
312
313 iowrite32(DEVICE_RESET__BANK0, FlashReg + DEVICE_RESET);
314
315 while (!((ioread32(FlashReg + INTR_STATUS0) &
316 INTR_STATUS0__RST_COMP) |
317 (ioread32(FlashReg + INTR_STATUS0) &
318 INTR_STATUS0__TIME_OUT)))
319 ;
320
321 if (ioread32(FlashReg + INTR_STATUS0) & INTR_STATUS0__RST_COMP) {
322 iowrite32(DEVICE_RESET__BANK1, FlashReg + DEVICE_RESET);
323 while (!((ioread32(FlashReg + INTR_STATUS1) &
324 INTR_STATUS1__RST_COMP) |
325 (ioread32(FlashReg + INTR_STATUS1) &
326 INTR_STATUS1__TIME_OUT)))
327 ;
328
329 if (ioread32(FlashReg + INTR_STATUS1) &
330 INTR_STATUS1__RST_COMP) {
331 iowrite32(DEVICE_RESET__BANK2,
332 FlashReg + DEVICE_RESET);
333 while (!((ioread32(FlashReg + INTR_STATUS2) &
334 INTR_STATUS2__RST_COMP) |
335 (ioread32(FlashReg + INTR_STATUS2) &
336 INTR_STATUS2__TIME_OUT)))
337 ;
338
339 if (ioread32(FlashReg + INTR_STATUS2) &
340 INTR_STATUS2__RST_COMP) {
341 iowrite32(DEVICE_RESET__BANK3,
342 FlashReg + DEVICE_RESET);
343 while (!((ioread32(FlashReg + INTR_STATUS3) &
344 INTR_STATUS3__RST_COMP) |
345 (ioread32(FlashReg + INTR_STATUS3) &
346 INTR_STATUS3__TIME_OUT)))
347 ;
348 } else {
349 printk(KERN_ERR "Getting a time out for bank 2!\n");
350 }
351 } else {
352 printk(KERN_ERR "Getting a time out for bank 1!\n");
353 }
354 }
355
356 iowrite32(INTR_STATUS0__TIME_OUT, FlashReg + INTR_STATUS0);
357 iowrite32(INTR_STATUS1__TIME_OUT, FlashReg + INTR_STATUS1);
358 iowrite32(INTR_STATUS2__TIME_OUT, FlashReg + INTR_STATUS2);
359 iowrite32(INTR_STATUS3__TIME_OUT, FlashReg + INTR_STATUS3);
360
361 DeviceInfo.wONFIDevFeatures =
362 ioread32(FlashReg + ONFI_DEVICE_FEATURES);
363 DeviceInfo.wONFIOptCommands =
364 ioread32(FlashReg + ONFI_OPTIONAL_COMMANDS);
365 DeviceInfo.wONFITimingMode =
366 ioread32(FlashReg + ONFI_TIMING_MODE);
367 DeviceInfo.wONFIPgmCacheTimingMode =
368 ioread32(FlashReg + ONFI_PGM_CACHE_TIMING_MODE);
369
370 n_of_luns = ioread32(FlashReg + ONFI_DEVICE_NO_OF_LUNS) &
371 ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS;
372 blks_lun_l = ioread32(FlashReg + ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L);
373 blks_lun_h = ioread32(FlashReg + ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U);
374
375 blockperlun = (blks_lun_h << 16) | blks_lun_l;
376
377 DeviceInfo.wTotalBlocks = n_of_luns * blockperlun;
378
379 if (!(ioread32(FlashReg + ONFI_TIMING_MODE) &
380 ONFI_TIMING_MODE__VALUE))
381 return FAIL;
382
383 for (i = 5; i > 0; i--) {
384 if (ioread32(FlashReg + ONFI_TIMING_MODE) & (0x01 << i))
385 break;
386 }
387
388 NAND_ONFi_Timing_Mode(i);
389
390 index_addr(MODE_11 | 0, 0x90);
391 index_addr(MODE_11 | 1, 0);
392
393 for (i = 0; i < 3; i++)
394 index_addr_read_data(MODE_11 | 2, &id);
395
396 nand_dbg_print(NAND_DBG_DEBUG, "3rd ID: 0x%x\n", id);
397
398 DeviceInfo.MLCDevice = id & 0x0C;
399
400 /* By now, all the ONFI devices we know support the page cache */
401 /* rw feature. So here we enable the pipeline_rw_ahead feature */
402 /* iowrite32(1, FlashReg + CACHE_WRITE_ENABLE); */
403 /* iowrite32(1, FlashReg + CACHE_READ_ENABLE); */
404
405 return PASS;
406}
407
408static void get_samsung_nand_para(void)
409{
410 u8 no_of_planes;
411 u32 blk_size;
412 u64 plane_size, capacity;
413 u32 id_bytes[5];
414 int i;
415
416 index_addr((u32)(MODE_11 | 0), 0x90);
417 index_addr((u32)(MODE_11 | 1), 0);
418 for (i = 0; i < 5; i++)
419 index_addr_read_data((u32)(MODE_11 | 2), &id_bytes[i]);
420
421 nand_dbg_print(NAND_DBG_DEBUG,
422 "ID bytes: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
423 id_bytes[0], id_bytes[1], id_bytes[2],
424 id_bytes[3], id_bytes[4]);
425
426 if ((id_bytes[1] & 0xff) == 0xd3) { /* Samsung K9WAG08U1A */
427 /* Set timing register values according to datasheet */
428 iowrite32(5, FlashReg + ACC_CLKS);
429 iowrite32(20, FlashReg + RE_2_WE);
430 iowrite32(12, FlashReg + WE_2_RE);
431 iowrite32(14, FlashReg + ADDR_2_DATA);
432 iowrite32(3, FlashReg + RDWR_EN_LO_CNT);
433 iowrite32(2, FlashReg + RDWR_EN_HI_CNT);
434 iowrite32(2, FlashReg + CS_SETUP_CNT);
435 }
436
437 no_of_planes = 1 << ((id_bytes[4] & 0x0c) >> 2);
438 plane_size = (u64)64 << ((id_bytes[4] & 0x70) >> 4);
439 blk_size = 64 << ((ioread32(FlashReg + DEVICE_PARAM_1) & 0x30) >> 4);
440 capacity = (u64)128 * plane_size * no_of_planes;
441
442 DeviceInfo.wTotalBlocks = (u32)GLOB_u64_Div(capacity, blk_size);
443}
444
445static void get_toshiba_nand_para(void)
446{
447 void __iomem *scratch_reg;
448 u32 tmp;
449
450 /* Workaround to fix a controller bug which reports a wrong */
451 /* spare area size for some kind of Toshiba NAND device */
452 if ((ioread32(FlashReg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
453 (ioread32(FlashReg + DEVICE_SPARE_AREA_SIZE) == 64)) {
454 iowrite32(216, FlashReg + DEVICE_SPARE_AREA_SIZE);
455 tmp = ioread32(FlashReg + DEVICES_CONNECTED) *
456 ioread32(FlashReg + DEVICE_SPARE_AREA_SIZE);
457 iowrite32(tmp, FlashReg + LOGICAL_PAGE_SPARE_SIZE);
458#if SUPPORT_15BITECC
459 iowrite32(15, FlashReg + ECC_CORRECTION);
460#elif SUPPORT_8BITECC
461 iowrite32(8, FlashReg + ECC_CORRECTION);
462#endif
463 }
464
465 /* As Toshiba NAND can not provide it's block number, */
466 /* so here we need user to provide the correct block */
467 /* number in a scratch register before the Linux NAND */
468 /* driver is loaded. If no valid value found in the scratch */
469 /* register, then we use default block number value */
470 scratch_reg = ioremap_nocache(SCRATCH_REG_ADDR, SCRATCH_REG_SIZE);
471 if (!scratch_reg) {
472 printk(KERN_ERR "Spectra: ioremap failed in %s, Line %d",
473 __FILE__, __LINE__);
474 DeviceInfo.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
475 } else {
476 nand_dbg_print(NAND_DBG_WARN,
477 "Spectra: ioremap reg address: 0x%p\n", scratch_reg);
478 DeviceInfo.wTotalBlocks = 1 << ioread8(scratch_reg);
479 if (DeviceInfo.wTotalBlocks < 512)
480 DeviceInfo.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
481 iounmap(scratch_reg);
482 }
483}
484
485static void get_hynix_nand_para(void)
486{
487 void __iomem *scratch_reg;
488 u32 main_size, spare_size;
489
490 switch (DeviceInfo.wDeviceID) {
491 case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */
492 case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */
493 iowrite32(128, FlashReg + PAGES_PER_BLOCK);
494 iowrite32(4096, FlashReg + DEVICE_MAIN_AREA_SIZE);
495 iowrite32(224, FlashReg + DEVICE_SPARE_AREA_SIZE);
496 main_size = 4096 * ioread32(FlashReg + DEVICES_CONNECTED);
497 spare_size = 224 * ioread32(FlashReg + DEVICES_CONNECTED);
498 iowrite32(main_size, FlashReg + LOGICAL_PAGE_DATA_SIZE);
499 iowrite32(spare_size, FlashReg + LOGICAL_PAGE_SPARE_SIZE);
500 iowrite32(0, FlashReg + DEVICE_WIDTH);
501#if SUPPORT_15BITECC
502 iowrite32(15, FlashReg + ECC_CORRECTION);
503#elif SUPPORT_8BITECC
504 iowrite32(8, FlashReg + ECC_CORRECTION);
505#endif
506 DeviceInfo.MLCDevice = 1;
507 break;
508 default:
509 nand_dbg_print(NAND_DBG_WARN,
510 "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
511 "Will use default parameter values instead.\n",
512 DeviceInfo.wDeviceID);
513 }
514
515 scratch_reg = ioremap_nocache(SCRATCH_REG_ADDR, SCRATCH_REG_SIZE);
516 if (!scratch_reg) {
517 printk(KERN_ERR "Spectra: ioremap failed in %s, Line %d",
518 __FILE__, __LINE__);
519 DeviceInfo.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
520 } else {
521 nand_dbg_print(NAND_DBG_WARN,
522 "Spectra: ioremap reg address: 0x%p\n", scratch_reg);
523 DeviceInfo.wTotalBlocks = 1 << ioread8(scratch_reg);
524 if (DeviceInfo.wTotalBlocks < 512)
525 DeviceInfo.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
526 iounmap(scratch_reg);
527 }
528}
529
530static void find_valid_banks(void)
531{
532 u32 id[LLD_MAX_FLASH_BANKS];
533 int i;
534
535 totalUsedBanks = 0;
536 for (i = 0; i < LLD_MAX_FLASH_BANKS; i++) {
537 index_addr((u32)(MODE_11 | (i << 24) | 0), 0x90);
538 index_addr((u32)(MODE_11 | (i << 24) | 1), 0);
539 index_addr_read_data((u32)(MODE_11 | (i << 24) | 2), &id[i]);
540
541 nand_dbg_print(NAND_DBG_DEBUG,
542 "Return 1st ID for bank[%d]: %x\n", i, id[i]);
543
544 if (i == 0) {
545 if (id[i] & 0x0ff)
546 GLOB_valid_banks[i] = 1;
547 } else {
548 if ((id[i] & 0x0ff) == (id[0] & 0x0ff))
549 GLOB_valid_banks[i] = 1;
550 }
551
552 totalUsedBanks += GLOB_valid_banks[i];
553 }
554
555 nand_dbg_print(NAND_DBG_DEBUG,
556 "totalUsedBanks: %d\n", totalUsedBanks);
557}
558
559static void detect_partition_feature(void)
560{
561 if (ioread32(FlashReg + FEATURES) & FEATURES__PARTITION) {
562 if ((ioread32(FlashReg + PERM_SRC_ID_1) &
563 PERM_SRC_ID_1__SRCID) == SPECTRA_PARTITION_ID) {
564 DeviceInfo.wSpectraStartBlock =
565 ((ioread32(FlashReg + MIN_MAX_BANK_1) &
566 MIN_MAX_BANK_1__MIN_VALUE) *
567 DeviceInfo.wTotalBlocks)
568 +
569 (ioread32(FlashReg + MIN_BLK_ADDR_1) &
570 MIN_BLK_ADDR_1__VALUE);
571
572 DeviceInfo.wSpectraEndBlock =
573 (((ioread32(FlashReg + MIN_MAX_BANK_1) &
574 MIN_MAX_BANK_1__MAX_VALUE) >> 2) *
575 DeviceInfo.wTotalBlocks)
576 +
577 (ioread32(FlashReg + MAX_BLK_ADDR_1) &
578 MAX_BLK_ADDR_1__VALUE);
579
580 DeviceInfo.wTotalBlocks *= totalUsedBanks;
581
582 if (DeviceInfo.wSpectraEndBlock >=
583 DeviceInfo.wTotalBlocks) {
584 DeviceInfo.wSpectraEndBlock =
585 DeviceInfo.wTotalBlocks - 1;
586 }
587
588 DeviceInfo.wDataBlockNum =
589 DeviceInfo.wSpectraEndBlock -
590 DeviceInfo.wSpectraStartBlock + 1;
591 } else {
592 DeviceInfo.wTotalBlocks *= totalUsedBanks;
593 DeviceInfo.wSpectraStartBlock = SPECTRA_START_BLOCK;
594 DeviceInfo.wSpectraEndBlock =
595 DeviceInfo.wTotalBlocks - 1;
596 DeviceInfo.wDataBlockNum =
597 DeviceInfo.wSpectraEndBlock -
598 DeviceInfo.wSpectraStartBlock + 1;
599 }
600 } else {
601 DeviceInfo.wTotalBlocks *= totalUsedBanks;
602 DeviceInfo.wSpectraStartBlock = SPECTRA_START_BLOCK;
603 DeviceInfo.wSpectraEndBlock = DeviceInfo.wTotalBlocks - 1;
604 DeviceInfo.wDataBlockNum =
605 DeviceInfo.wSpectraEndBlock -
606 DeviceInfo.wSpectraStartBlock + 1;
607 }
608}
609
610static void dump_device_info(void)
611{
612 nand_dbg_print(NAND_DBG_DEBUG, "DeviceInfo:\n");
613 nand_dbg_print(NAND_DBG_DEBUG, "DeviceMaker: 0x%x\n",
614 DeviceInfo.wDeviceMaker);
615 nand_dbg_print(NAND_DBG_DEBUG, "DeviceID: 0x%x\n",
616 DeviceInfo.wDeviceID);
617 nand_dbg_print(NAND_DBG_DEBUG, "DeviceType: 0x%x\n",
618 DeviceInfo.wDeviceType);
619 nand_dbg_print(NAND_DBG_DEBUG, "SpectraStartBlock: %d\n",
620 DeviceInfo.wSpectraStartBlock);
621 nand_dbg_print(NAND_DBG_DEBUG, "SpectraEndBlock: %d\n",
622 DeviceInfo.wSpectraEndBlock);
623 nand_dbg_print(NAND_DBG_DEBUG, "TotalBlocks: %d\n",
624 DeviceInfo.wTotalBlocks);
625 nand_dbg_print(NAND_DBG_DEBUG, "PagesPerBlock: %d\n",
626 DeviceInfo.wPagesPerBlock);
627 nand_dbg_print(NAND_DBG_DEBUG, "PageSize: %d\n",
628 DeviceInfo.wPageSize);
629 nand_dbg_print(NAND_DBG_DEBUG, "PageDataSize: %d\n",
630 DeviceInfo.wPageDataSize);
631 nand_dbg_print(NAND_DBG_DEBUG, "PageSpareSize: %d\n",
632 DeviceInfo.wPageSpareSize);
633 nand_dbg_print(NAND_DBG_DEBUG, "NumPageSpareFlag: %d\n",
634 DeviceInfo.wNumPageSpareFlag);
635 nand_dbg_print(NAND_DBG_DEBUG, "ECCBytesPerSector: %d\n",
636 DeviceInfo.wECCBytesPerSector);
637 nand_dbg_print(NAND_DBG_DEBUG, "BlockSize: %d\n",
638 DeviceInfo.wBlockSize);
639 nand_dbg_print(NAND_DBG_DEBUG, "BlockDataSize: %d\n",
640 DeviceInfo.wBlockDataSize);
641 nand_dbg_print(NAND_DBG_DEBUG, "DataBlockNum: %d\n",
642 DeviceInfo.wDataBlockNum);
643 nand_dbg_print(NAND_DBG_DEBUG, "PlaneNum: %d\n",
644 DeviceInfo.bPlaneNum);
645 nand_dbg_print(NAND_DBG_DEBUG, "DeviceMainAreaSize: %d\n",
646 DeviceInfo.wDeviceMainAreaSize);
647 nand_dbg_print(NAND_DBG_DEBUG, "DeviceSpareAreaSize: %d\n",
648 DeviceInfo.wDeviceSpareAreaSize);
649 nand_dbg_print(NAND_DBG_DEBUG, "DevicesConnected: %d\n",
650 DeviceInfo.wDevicesConnected);
651 nand_dbg_print(NAND_DBG_DEBUG, "DeviceWidth: %d\n",
652 DeviceInfo.wDeviceWidth);
653 nand_dbg_print(NAND_DBG_DEBUG, "HWRevision: 0x%x\n",
654 DeviceInfo.wHWRevision);
655 nand_dbg_print(NAND_DBG_DEBUG, "HWFeatures: 0x%x\n",
656 DeviceInfo.wHWFeatures);
657 nand_dbg_print(NAND_DBG_DEBUG, "ONFIDevFeatures: 0x%x\n",
658 DeviceInfo.wONFIDevFeatures);
659 nand_dbg_print(NAND_DBG_DEBUG, "ONFIOptCommands: 0x%x\n",
660 DeviceInfo.wONFIOptCommands);
661 nand_dbg_print(NAND_DBG_DEBUG, "ONFITimingMode: 0x%x\n",
662 DeviceInfo.wONFITimingMode);
663 nand_dbg_print(NAND_DBG_DEBUG, "ONFIPgmCacheTimingMode: 0x%x\n",
664 DeviceInfo.wONFIPgmCacheTimingMode);
665 nand_dbg_print(NAND_DBG_DEBUG, "MLCDevice: %s\n",
666 DeviceInfo.MLCDevice ? "Yes" : "No");
667 nand_dbg_print(NAND_DBG_DEBUG, "SpareSkipBytes: %d\n",
668 DeviceInfo.wSpareSkipBytes);
669 nand_dbg_print(NAND_DBG_DEBUG, "BitsInPageNumber: %d\n",
670 DeviceInfo.nBitsInPageNumber);
671 nand_dbg_print(NAND_DBG_DEBUG, "BitsInPageDataSize: %d\n",
672 DeviceInfo.nBitsInPageDataSize);
673 nand_dbg_print(NAND_DBG_DEBUG, "BitsInBlockDataSize: %d\n",
674 DeviceInfo.nBitsInBlockDataSize);
675}
676
677u16 NAND_Read_Device_ID(void)
678{
679 u16 status = PASS;
680 u8 no_of_planes;
681
682 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
683 __FILE__, __LINE__, __func__);
684
685 iowrite32(0x02, FlashReg + SPARE_AREA_SKIP_BYTES);
686 iowrite32(0xffff, FlashReg + SPARE_AREA_MARKER);
687 DeviceInfo.wDeviceMaker = ioread32(FlashReg + MANUFACTURER_ID);
688 DeviceInfo.wDeviceID = ioread32(FlashReg + DEVICE_ID);
689 DeviceInfo.MLCDevice = ioread32(FlashReg + DEVICE_PARAM_0) & 0x0c;
690
691 if (ioread32(FlashReg + ONFI_DEVICE_NO_OF_LUNS) &
692 ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE) { /* ONFI 1.0 NAND */
693 if (FAIL == get_onfi_nand_para())
694 return FAIL;
695 } else if (DeviceInfo.wDeviceMaker == 0xEC) { /* Samsung NAND */
696 get_samsung_nand_para();
697 } else if (DeviceInfo.wDeviceMaker == 0x98) { /* Toshiba NAND */
698 get_toshiba_nand_para();
699 } else if (DeviceInfo.wDeviceMaker == 0xAD) { /* Hynix NAND */
700 get_hynix_nand_para();
701 } else {
702 DeviceInfo.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS;
703 }
704
705 nand_dbg_print(NAND_DBG_DEBUG, "Dump timing register values:"
706 "acc_clks: %d, re_2_we: %d, we_2_re: %d,"
707 "addr_2_data: %d, rdwr_en_lo_cnt: %d, "
708 "rdwr_en_hi_cnt: %d, cs_setup_cnt: %d\n",
709 ioread32(FlashReg + ACC_CLKS),
710 ioread32(FlashReg + RE_2_WE),
711 ioread32(FlashReg + WE_2_RE),
712 ioread32(FlashReg + ADDR_2_DATA),
713 ioread32(FlashReg + RDWR_EN_LO_CNT),
714 ioread32(FlashReg + RDWR_EN_HI_CNT),
715 ioread32(FlashReg + CS_SETUP_CNT));
716
717 DeviceInfo.wHWRevision = ioread32(FlashReg + REVISION);
718 DeviceInfo.wHWFeatures = ioread32(FlashReg + FEATURES);
719
720 DeviceInfo.wDeviceMainAreaSize =
721 ioread32(FlashReg + DEVICE_MAIN_AREA_SIZE);
722 DeviceInfo.wDeviceSpareAreaSize =
723 ioread32(FlashReg + DEVICE_SPARE_AREA_SIZE);
724
725 DeviceInfo.wPageDataSize =
726 ioread32(FlashReg + LOGICAL_PAGE_DATA_SIZE);
727
728 /* Note: When using the Micon 4K NAND device, the controller will report
729 * Page Spare Size as 216 bytes. But Micron's Spec say it's 218 bytes.
730 * And if force set it to 218 bytes, the controller can not work
731 * correctly. So just let it be. But keep in mind that this bug may
732 * cause
733 * other problems in future. - Yunpeng 2008-10-10
734 */
735 DeviceInfo.wPageSpareSize =
736 ioread32(FlashReg + LOGICAL_PAGE_SPARE_SIZE);
737
738 DeviceInfo.wPagesPerBlock = ioread32(FlashReg + PAGES_PER_BLOCK);
739
740 DeviceInfo.wPageSize =
741 DeviceInfo.wPageDataSize + DeviceInfo.wPageSpareSize;
742 DeviceInfo.wBlockSize =
743 DeviceInfo.wPageSize * DeviceInfo.wPagesPerBlock;
744 DeviceInfo.wBlockDataSize =
745 DeviceInfo.wPagesPerBlock * DeviceInfo.wPageDataSize;
746
747 DeviceInfo.wDeviceWidth = ioread32(FlashReg + DEVICE_WIDTH);
748 DeviceInfo.wDeviceType =
749 ((ioread32(FlashReg + DEVICE_WIDTH) > 0) ? 16 : 8);
750
751 DeviceInfo.wDevicesConnected = ioread32(FlashReg + DEVICES_CONNECTED);
752
753 DeviceInfo.wSpareSkipBytes =
754 ioread32(FlashReg + SPARE_AREA_SKIP_BYTES) *
755 DeviceInfo.wDevicesConnected;
756
757 DeviceInfo.nBitsInPageNumber =
758 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wPagesPerBlock);
759 DeviceInfo.nBitsInPageDataSize =
760 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wPageDataSize);
761 DeviceInfo.nBitsInBlockDataSize =
762 (u8)GLOB_Calc_Used_Bits(DeviceInfo.wBlockDataSize);
763
764 set_ecc_config();
765
766 no_of_planes = ioread32(FlashReg + NUMBER_OF_PLANES) &
767 NUMBER_OF_PLANES__VALUE;
768
769 switch (no_of_planes) {
770 case 0:
771 case 1:
772 case 3:
773 case 7:
774 DeviceInfo.bPlaneNum = no_of_planes + 1;
775 break;
776 default:
777 status = FAIL;
778 break;
779 }
780
781 find_valid_banks();
782
783 detect_partition_feature();
784
785 dump_device_info();
786
787 return status;
788}
789
790u16 NAND_UnlockArrayAll(void)
791{
792 u64 start_addr, end_addr;
793
794 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
795 __FILE__, __LINE__, __func__);
796
797 start_addr = 0;
798 end_addr = ((u64)DeviceInfo.wBlockSize *
799 (DeviceInfo.wTotalBlocks - 1)) >>
800 DeviceInfo.nBitsInPageDataSize;
801
802 index_addr((u32)(MODE_10 | (u32)start_addr), 0x10);
803 index_addr((u32)(MODE_10 | (u32)end_addr), 0x11);
804
805 return PASS;
806}
807
808void NAND_LLD_Enable_Disable_Interrupts(u16 INT_ENABLE)
809{
810 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
811 __FILE__, __LINE__, __func__);
812
813 if (INT_ENABLE)
814 iowrite32(1, FlashReg + GLOBAL_INT_ENABLE);
815 else
816 iowrite32(0, FlashReg + GLOBAL_INT_ENABLE);
817}
818
819u16 NAND_Erase_Block(u32 block)
820{
821 u16 status = PASS;
822 u64 flash_add;
823 u16 flash_bank;
824 u32 intr_status = 0;
825 u32 intr_status_addresses[4] = {INTR_STATUS0,
826 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
827
828 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
829 __FILE__, __LINE__, __func__);
830
831 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
832 * DeviceInfo.wBlockDataSize;
833
834 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
835
836 if (block >= DeviceInfo.wTotalBlocks)
837 status = FAIL;
838
839 if (status == PASS) {
840 intr_status = intr_status_addresses[flash_bank];
841
842 iowrite32(INTR_STATUS0__ERASE_COMP | INTR_STATUS0__ERASE_FAIL,
843 FlashReg + intr_status);
844
845 index_addr((u32)(MODE_10 | (flash_bank << 24) |
846 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 1);
847
848 while (!(ioread32(FlashReg + intr_status) &
849 (INTR_STATUS0__ERASE_COMP | INTR_STATUS0__ERASE_FAIL)))
850 ;
851
852 if (ioread32(FlashReg + intr_status) &
853 INTR_STATUS0__ERASE_FAIL)
854 status = FAIL;
855
856 iowrite32(INTR_STATUS0__ERASE_COMP | INTR_STATUS0__ERASE_FAIL,
857 FlashReg + intr_status);
858 }
859
860 return status;
861}
862
863static u32 Boundary_Check_Block_Page(u32 block, u16 page,
864 u16 page_count)
865{
866 u32 status = PASS;
867
868 if (block >= DeviceInfo.wTotalBlocks)
869 status = FAIL;
870
871 if (page + page_count > DeviceInfo.wPagesPerBlock)
872 status = FAIL;
873
874 return status;
875}
876
877u16 NAND_Read_Page_Spare(u8 *read_data, u32 block, u16 page,
878 u16 page_count)
879{
880 u32 status = PASS;
881 u32 i;
882 u64 flash_add;
883 u32 PageSpareSize = DeviceInfo.wPageSpareSize;
884 u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
885 u32 flash_bank;
886 u32 intr_status = 0;
887 u32 intr_status_addresses[4] = {INTR_STATUS0,
888 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
889 u8 *page_spare = buf_read_page_spare;
890
891 if (block >= DeviceInfo.wTotalBlocks) {
892 printk(KERN_ERR "block too big: %d\n", (int)block);
893 status = FAIL;
894 }
895
896 if (page >= DeviceInfo.wPagesPerBlock) {
897 printk(KERN_ERR "page too big: %d\n", page);
898 status = FAIL;
899 }
900
901 if (page_count > 1) {
902 printk(KERN_ERR "page count too big: %d\n", page_count);
903 status = FAIL;
904 }
905
906 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
907 * DeviceInfo.wBlockDataSize +
908 (u64)page * DeviceInfo.wPageDataSize;
909
910 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
911
912 if (status == PASS) {
913 intr_status = intr_status_addresses[flash_bank];
914 iowrite32(ioread32(FlashReg + intr_status),
915 FlashReg + intr_status);
916
917 index_addr((u32)(MODE_10 | (flash_bank << 24) |
918 (flash_add >> DeviceInfo.nBitsInPageDataSize)),
919 0x41);
920 index_addr((u32)(MODE_10 | (flash_bank << 24) |
921 (flash_add >> DeviceInfo.nBitsInPageDataSize)),
922 0x2000 | page_count);
923 while (!(ioread32(FlashReg + intr_status) &
924 INTR_STATUS0__LOAD_COMP))
925 ;
926
927 iowrite32((u32)(MODE_01 | (flash_bank << 24) |
928 (flash_add >> DeviceInfo.nBitsInPageDataSize)),
929 FlashMem);
930
931 for (i = 0; i < (PageSpareSize / 4); i++)
932 *((u32 *)page_spare + i) =
933 ioread32(FlashMem + 0x10);
934
935 if (enable_ecc) {
936 for (i = 0; i < spareFlagBytes; i++)
937 read_data[i] =
938 page_spare[PageSpareSize -
939 spareFlagBytes + i];
940 for (i = 0; i < (PageSpareSize - spareFlagBytes); i++)
941 read_data[spareFlagBytes + i] =
942 page_spare[i];
943 } else {
944 for (i = 0; i < PageSpareSize; i++)
945 read_data[i] = page_spare[i];
946 }
947
948 index_addr((u32)(MODE_10 | (flash_bank << 24) |
949 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
950 }
951
952 return status;
953}
954
955/* No use function. Should be removed later */
956u16 NAND_Write_Page_Spare(u8 *write_data, u32 block, u16 page,
957 u16 page_count)
958{
959 printk(KERN_ERR
960 "Error! This function (NAND_Write_Page_Spare) should never"
961 " be called!\n");
962 return ERR;
963}
964
965/* op value: 0 - DDMA read; 1 - DDMA write */
966static void ddma_trans(u8 *data, u64 flash_add,
967 u32 flash_bank, int op, u32 numPages)
968{
969 u32 data_addr;
970
971 /* Map virtual address to bus address for DDMA */
972 data_addr = virt_to_bus(data);
973
974 index_addr((u32)(MODE_10 | (flash_bank << 24) |
975 (flash_add >> DeviceInfo.nBitsInPageDataSize)),
976 (u16)(2 << 12) | (op << 8) | numPages);
977
978 index_addr((u32)(MODE_10 | (flash_bank << 24) |
979 ((u16)(0x0FFFF & (data_addr >> 16)) << 8)),
980 (u16)(2 << 12) | (2 << 8) | 0);
981
982 index_addr((u32)(MODE_10 | (flash_bank << 24) |
983 ((u16)(0x0FFFF & data_addr) << 8)),
984 (u16)(2 << 12) | (3 << 8) | 0);
985
986 index_addr((u32)(MODE_10 | (flash_bank << 24) |
987 (1 << 16) | (0x40 << 8)),
988 (u16)(2 << 12) | (4 << 8) | 0);
989}
990
991/* If data in buf are all 0xff, then return 1; otherwise return 0 */
992static int check_all_1(u8 *buf)
993{
994 int i, j, cnt;
995
996 for (i = 0; i < DeviceInfo.wPageDataSize; i++) {
997 if (buf[i] != 0xff) {
998 cnt = 0;
999 nand_dbg_print(NAND_DBG_WARN,
1000 "the first non-0xff data byte is: %d\n", i);
1001 for (j = i; j < DeviceInfo.wPageDataSize; j++) {
1002 nand_dbg_print(NAND_DBG_WARN, "0x%x ", buf[j]);
1003 cnt++;
1004 if (cnt > 8)
1005 break;
1006 }
1007 nand_dbg_print(NAND_DBG_WARN, "\n");
1008 return 0;
1009 }
1010 }
1011
1012 return 1;
1013}
1014
1015static int do_ecc_new(unsigned long bank, u8 *buf,
1016 u32 block, u16 page)
1017{
1018 int status = PASS;
1019 u16 err_page = 0;
1020 u16 err_byte;
1021 u8 err_sect;
1022 u8 err_dev;
1023 u16 err_fix_info;
1024 u16 err_addr;
1025 u32 ecc_sect_size;
1026 u8 *err_pos;
1027 u32 err_page_addr[4] = {ERR_PAGE_ADDR0,
1028 ERR_PAGE_ADDR1, ERR_PAGE_ADDR2, ERR_PAGE_ADDR3};
1029
1030 ecc_sect_size = ECC_SECTOR_SIZE * (DeviceInfo.wDevicesConnected);
1031
1032 do {
1033 err_page = ioread32(FlashReg + err_page_addr[bank]);
1034 err_addr = ioread32(FlashReg + ECC_ERROR_ADDRESS);
1035 err_byte = err_addr & ECC_ERROR_ADDRESS__OFFSET;
1036 err_sect = ((err_addr & ECC_ERROR_ADDRESS__SECTOR_NR) >> 12);
1037 err_fix_info = ioread32(FlashReg + ERR_CORRECTION_INFO);
1038 err_dev = ((err_fix_info & ERR_CORRECTION_INFO__DEVICE_NR)
1039 >> 8);
1040 if (err_fix_info & ERR_CORRECTION_INFO__ERROR_TYPE) {
1041 nand_dbg_print(NAND_DBG_WARN,
1042 "%s, Line %d Uncorrectable ECC error "
1043 "when read block %d page %d."
1044 "PTN_INTR register: 0x%x "
1045 "err_page: %d, err_sect: %d, err_byte: %d, "
1046 "err_dev: %d, ecc_sect_size: %d, "
1047 "err_fix_info: 0x%x\n",
1048 __FILE__, __LINE__, block, page,
1049 ioread32(FlashReg + PTN_INTR),
1050 err_page, err_sect, err_byte, err_dev,
1051 ecc_sect_size, (u32)err_fix_info);
1052
1053 if (check_all_1(buf))
1054 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d"
1055 "All 0xff!\n",
1056 __FILE__, __LINE__);
1057 else
1058 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d"
1059 "Not all 0xff!\n",
1060 __FILE__, __LINE__);
1061 status = FAIL;
1062 } else {
1063 nand_dbg_print(NAND_DBG_WARN,
1064 "%s, Line %d Found ECC error "
1065 "when read block %d page %d."
1066 "err_page: %d, err_sect: %d, err_byte: %d, "
1067 "err_dev: %d, ecc_sect_size: %d, "
1068 "err_fix_info: 0x%x\n",
1069 __FILE__, __LINE__, block, page,
1070 err_page, err_sect, err_byte, err_dev,
1071 ecc_sect_size, (u32)err_fix_info);
1072 if (err_byte < ECC_SECTOR_SIZE) {
1073 err_pos = buf +
1074 (err_page - page) *
1075 DeviceInfo.wPageDataSize +
1076 err_sect * ecc_sect_size +
1077 err_byte *
1078 DeviceInfo.wDevicesConnected +
1079 err_dev;
1080
1081 *err_pos ^= err_fix_info &
1082 ERR_CORRECTION_INFO__BYTEMASK;
1083 }
1084 }
1085 } while (!(err_fix_info & ERR_CORRECTION_INFO__LAST_ERR_INFO));
1086
1087 return status;
1088}
1089
1090u16 NAND_Read_Page_Main_Polling(u8 *read_data,
1091 u32 block, u16 page, u16 page_count)
1092{
1093 u32 status = PASS;
1094 u64 flash_add;
1095 u32 intr_status = 0;
1096 u32 flash_bank;
1097 u32 intr_status_addresses[4] = {INTR_STATUS0,
1098 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1099 u8 *read_data_l;
1100
1101 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1102 __FILE__, __LINE__, __func__);
1103
1104 status = Boundary_Check_Block_Page(block, page, page_count);
1105 if (status != PASS)
1106 return status;
1107
1108 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
1109 * DeviceInfo.wBlockDataSize +
1110 (u64)page * DeviceInfo.wPageDataSize;
1111 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1112
1113 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1114
1115 intr_status = intr_status_addresses[flash_bank];
1116 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1117
1118 if (page_count > 1) {
1119 read_data_l = read_data;
1120 while (page_count > MAX_PAGES_PER_RW) {
1121 if (ioread32(FlashReg + MULTIPLANE_OPERATION))
1122 status = NAND_Multiplane_Read(read_data_l,
1123 block, page, MAX_PAGES_PER_RW);
1124 else
1125 status = NAND_Pipeline_Read_Ahead_Polling(
1126 read_data_l, block, page,
1127 MAX_PAGES_PER_RW);
1128
1129 if (status == FAIL)
1130 return status;
1131
1132 read_data_l += DeviceInfo.wPageDataSize *
1133 MAX_PAGES_PER_RW;
1134 page_count -= MAX_PAGES_PER_RW;
1135 page += MAX_PAGES_PER_RW;
1136 }
1137 if (ioread32(FlashReg + MULTIPLANE_OPERATION))
1138 status = NAND_Multiplane_Read(read_data_l,
1139 block, page, page_count);
1140 else
1141 status = NAND_Pipeline_Read_Ahead_Polling(
1142 read_data_l, block, page, page_count);
1143
1144 return status;
1145 }
1146
1147 iowrite32(1, FlashReg + DMA_ENABLE);
1148 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1149 ;
1150
1151 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1152 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1153
1154 ddma_trans(read_data, flash_add, flash_bank, 0, 1);
1155
1156 if (enable_ecc) {
1157 while (!(ioread32(FlashReg + intr_status) &
1158 (INTR_STATUS0__ECC_TRANSACTION_DONE |
1159 INTR_STATUS0__ECC_ERR)))
1160 ;
1161
1162 if (ioread32(FlashReg + intr_status) &
1163 INTR_STATUS0__ECC_ERR) {
1164 iowrite32(INTR_STATUS0__ECC_ERR,
1165 FlashReg + intr_status);
1166 status = do_ecc_new(flash_bank, read_data,
1167 block, page);
1168 }
1169
1170 if (ioread32(FlashReg + intr_status) &
1171 INTR_STATUS0__ECC_TRANSACTION_DONE &
1172 INTR_STATUS0__ECC_ERR)
1173 iowrite32(INTR_STATUS0__ECC_TRANSACTION_DONE |
1174 INTR_STATUS0__ECC_ERR,
1175 FlashReg + intr_status);
1176 else if (ioread32(FlashReg + intr_status) &
1177 INTR_STATUS0__ECC_TRANSACTION_DONE)
1178 iowrite32(INTR_STATUS0__ECC_TRANSACTION_DONE,
1179 FlashReg + intr_status);
1180 else if (ioread32(FlashReg + intr_status) &
1181 INTR_STATUS0__ECC_ERR)
1182 iowrite32(INTR_STATUS0__ECC_ERR,
1183 FlashReg + intr_status);
1184 } else {
1185 while (!(ioread32(FlashReg + intr_status) &
1186 INTR_STATUS0__DMA_CMD_COMP))
1187 ;
1188 iowrite32(INTR_STATUS0__DMA_CMD_COMP, FlashReg + intr_status);
1189 }
1190
1191 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1192
1193 iowrite32(0, FlashReg + DMA_ENABLE);
1194 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1195 ;
1196
1197 return status;
1198}
1199
1200u16 NAND_Pipeline_Read_Ahead_Polling(u8 *read_data,
1201 u32 block, u16 page, u16 page_count)
1202{
1203 u32 status = PASS;
1204 u32 NumPages = page_count;
1205 u64 flash_add;
1206 u32 flash_bank;
1207 u32 intr_status = 0;
1208 u32 intr_status_addresses[4] = {INTR_STATUS0,
1209 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1210 u32 ecc_done_OR_dma_comp;
1211
1212 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1213 __FILE__, __LINE__, __func__);
1214
1215 status = Boundary_Check_Block_Page(block, page, page_count);
1216
1217 if (page_count < 2)
1218 status = FAIL;
1219
1220 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
1221 *DeviceInfo.wBlockDataSize +
1222 (u64)page * DeviceInfo.wPageDataSize;
1223
1224 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1225
1226 if (status == PASS) {
1227 intr_status = intr_status_addresses[flash_bank];
1228 iowrite32(ioread32(FlashReg + intr_status),
1229 FlashReg + intr_status);
1230
1231 iowrite32(1, FlashReg + DMA_ENABLE);
1232 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1233 ;
1234
1235 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1236
1237 index_addr((u32)(MODE_10 | (flash_bank << 24) |
1238 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
1239 ddma_trans(read_data, flash_add, flash_bank, 0, NumPages);
1240
1241 ecc_done_OR_dma_comp = 0;
1242 while (1) {
1243 if (enable_ecc) {
1244 while (!ioread32(FlashReg + intr_status))
1245 ;
1246
1247 if (ioread32(FlashReg + intr_status) &
1248 INTR_STATUS0__ECC_ERR) {
1249 iowrite32(INTR_STATUS0__ECC_ERR,
1250 FlashReg + intr_status);
1251 status = do_ecc_new(flash_bank,
1252 read_data, block, page);
1253 } else if (ioread32(FlashReg + intr_status) &
1254 INTR_STATUS0__DMA_CMD_COMP) {
1255 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
1256 FlashReg + intr_status);
1257
1258 if (1 == ecc_done_OR_dma_comp)
1259 break;
1260
1261 ecc_done_OR_dma_comp = 1;
1262 } else if (ioread32(FlashReg + intr_status) &
1263 INTR_STATUS0__ECC_TRANSACTION_DONE) {
1264 iowrite32(
1265 INTR_STATUS0__ECC_TRANSACTION_DONE,
1266 FlashReg + intr_status);
1267
1268 if (1 == ecc_done_OR_dma_comp)
1269 break;
1270
1271 ecc_done_OR_dma_comp = 1;
1272 }
1273 } else {
1274 while (!(ioread32(FlashReg + intr_status) &
1275 INTR_STATUS0__DMA_CMD_COMP))
1276 ;
1277
1278 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
1279 FlashReg + intr_status);
1280 break;
1281 }
1282
1283 iowrite32((~INTR_STATUS0__ECC_ERR) &
1284 (~INTR_STATUS0__ECC_TRANSACTION_DONE) &
1285 (~INTR_STATUS0__DMA_CMD_COMP),
1286 FlashReg + intr_status);
1287
1288 }
1289
1290 iowrite32(ioread32(FlashReg + intr_status),
1291 FlashReg + intr_status);
1292
1293 iowrite32(0, FlashReg + DMA_ENABLE);
1294
1295 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1296 ;
1297 }
1298 return status;
1299}
1300
1301u16 NAND_Read_Page_Main(u8 *read_data, u32 block, u16 page,
1302 u16 page_count)
1303{
1304 u32 status = PASS;
1305 u64 flash_add;
1306 u32 intr_status = 0;
1307 u32 flash_bank;
1308 u32 intr_status_addresses[4] = {INTR_STATUS0,
1309 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1310 int ret;
1311 u8 *read_data_l;
1312
1313 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
1314 __FILE__, __LINE__, __func__);
1315
1316 status = Boundary_Check_Block_Page(block, page, page_count);
1317 if (status != PASS)
1318 return status;
1319
1320 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
1321 * DeviceInfo.wBlockDataSize +
1322 (u64)page * DeviceInfo.wPageDataSize;
1323 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1324
1325 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1326
1327 intr_status = intr_status_addresses[flash_bank];
1328 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1329
1330 if (page_count > 1) {
1331 read_data_l = read_data;
1332 while (page_count > MAX_PAGES_PER_RW) {
1333 if (ioread32(FlashReg + MULTIPLANE_OPERATION))
1334 status = NAND_Multiplane_Read(read_data_l,
1335 block, page, MAX_PAGES_PER_RW);
1336 else
1337 status = NAND_Pipeline_Read_Ahead(
1338 read_data_l, block, page,
1339 MAX_PAGES_PER_RW);
1340
1341 if (status == FAIL)
1342 return status;
1343
1344 read_data_l += DeviceInfo.wPageDataSize *
1345 MAX_PAGES_PER_RW;
1346 page_count -= MAX_PAGES_PER_RW;
1347 page += MAX_PAGES_PER_RW;
1348 }
1349 if (ioread32(FlashReg + MULTIPLANE_OPERATION))
1350 status = NAND_Multiplane_Read(read_data_l,
1351 block, page, page_count);
1352 else
1353 status = NAND_Pipeline_Read_Ahead(
1354 read_data_l, block, page, page_count);
1355
1356 return status;
1357 }
1358
1359 iowrite32(1, FlashReg + DMA_ENABLE);
1360 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1361 ;
1362
1363 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1364 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1365
1366 /* Fill the mrst_nand_info structure */
1367 info.state = INT_READ_PAGE_MAIN;
1368 info.read_data = read_data;
1369 info.flash_bank = flash_bank;
1370 info.block = block;
1371 info.page = page;
1372 info.ret = PASS;
1373
1374 ddma_trans(read_data, flash_add, flash_bank, 0, 1);
1375
1376 iowrite32(1, FlashReg + GLOBAL_INT_ENABLE); /* Enable Interrupt */
1377
1378 ret = wait_for_completion_timeout(&info.complete, 10 * HZ);
1379 if (!ret) {
1380 printk(KERN_ERR "Wait for completion timeout "
1381 "in %s, Line %d\n", __FILE__, __LINE__);
1382 status = ERR;
1383 } else {
1384 status = info.ret;
1385 }
1386
1387 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1388
1389 iowrite32(0, FlashReg + DMA_ENABLE);
1390 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1391 ;
1392
1393 return status;
1394}
1395
1396void Conv_Spare_Data_Log2Phy_Format(u8 *data)
1397{
1398 int i;
1399 const u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
1400 const u32 PageSpareSize = DeviceInfo.wPageSpareSize;
1401
1402 if (enable_ecc) {
1403 for (i = spareFlagBytes - 1; i >= 0; i--)
1404 data[PageSpareSize - spareFlagBytes + i] = data[i];
1405 }
1406}
1407
1408void Conv_Spare_Data_Phy2Log_Format(u8 *data)
1409{
1410 int i;
1411 const u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
1412 const u32 PageSpareSize = DeviceInfo.wPageSpareSize;
1413
1414 if (enable_ecc) {
1415 for (i = 0; i < spareFlagBytes; i++)
1416 data[i] = data[PageSpareSize - spareFlagBytes + i];
1417 }
1418}
1419
1420
1421void Conv_Main_Spare_Data_Log2Phy_Format(u8 *data, u16 page_count)
1422{
1423 const u32 PageSize = DeviceInfo.wPageSize;
1424 const u32 PageDataSize = DeviceInfo.wPageDataSize;
1425 const u32 eccBytes = DeviceInfo.wECCBytesPerSector;
1426 const u32 spareSkipBytes = DeviceInfo.wSpareSkipBytes;
1427 const u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
1428 u32 eccSectorSize;
1429 u32 page_offset;
1430 int i, j;
1431
1432 eccSectorSize = ECC_SECTOR_SIZE * (DeviceInfo.wDevicesConnected);
1433 if (enable_ecc) {
1434 while (page_count > 0) {
1435 page_offset = (page_count - 1) * PageSize;
1436 j = (DeviceInfo.wPageDataSize / eccSectorSize);
1437 for (i = spareFlagBytes - 1; i >= 0; i--)
1438 data[page_offset +
1439 (eccSectorSize + eccBytes) * j + i] =
1440 data[page_offset + PageDataSize + i];
1441 for (j--; j >= 1; j--) {
1442 for (i = eccSectorSize - 1; i >= 0; i--)
1443 data[page_offset +
1444 (eccSectorSize + eccBytes) * j + i] =
1445 data[page_offset +
1446 eccSectorSize * j + i];
1447 }
1448 for (i = (PageSize - spareSkipBytes) - 1;
1449 i >= PageDataSize; i--)
1450 data[page_offset + i + spareSkipBytes] =
1451 data[page_offset + i];
1452 page_count--;
1453 }
1454 }
1455}
1456
1457void Conv_Main_Spare_Data_Phy2Log_Format(u8 *data, u16 page_count)
1458{
1459 const u32 PageSize = DeviceInfo.wPageSize;
1460 const u32 PageDataSize = DeviceInfo.wPageDataSize;
1461 const u32 eccBytes = DeviceInfo.wECCBytesPerSector;
1462 const u32 spareSkipBytes = DeviceInfo.wSpareSkipBytes;
1463 const u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
1464 u32 eccSectorSize;
1465 u32 page_offset;
1466 int i, j;
1467
1468 eccSectorSize = ECC_SECTOR_SIZE * (DeviceInfo.wDevicesConnected);
1469 if (enable_ecc) {
1470 while (page_count > 0) {
1471 page_offset = (page_count - 1) * PageSize;
1472 for (i = PageDataSize;
1473 i < PageSize - spareSkipBytes;
1474 i++)
1475 data[page_offset + i] =
1476 data[page_offset + i +
1477 spareSkipBytes];
1478 for (j = 1;
1479 j < DeviceInfo.wPageDataSize / eccSectorSize;
1480 j++) {
1481 for (i = 0; i < eccSectorSize; i++)
1482 data[page_offset +
1483 eccSectorSize * j + i] =
1484 data[page_offset +
1485 (eccSectorSize + eccBytes) * j
1486 + i];
1487 }
1488 for (i = 0; i < spareFlagBytes; i++)
1489 data[page_offset + PageDataSize + i] =
1490 data[page_offset +
1491 (eccSectorSize + eccBytes) * j + i];
1492 page_count--;
1493 }
1494 }
1495}
1496
1497/* Un-tested function */
1498u16 NAND_Multiplane_Read(u8 *read_data, u32 block, u16 page,
1499 u16 page_count)
1500{
1501 u32 status = PASS;
1502 u32 NumPages = page_count;
1503 u64 flash_add;
1504 u32 flash_bank;
1505 u32 intr_status = 0;
1506 u32 intr_status_addresses[4] = {INTR_STATUS0,
1507 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1508 u32 ecc_done_OR_dma_comp;
1509
1510 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1511 __FILE__, __LINE__, __func__);
1512
1513 status = Boundary_Check_Block_Page(block, page, page_count);
1514
1515 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
1516 * DeviceInfo.wBlockDataSize +
1517 (u64)page * DeviceInfo.wPageDataSize;
1518
1519 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1520
1521 if (status == PASS) {
1522 intr_status = intr_status_addresses[flash_bank];
1523 iowrite32(ioread32(FlashReg + intr_status),
1524 FlashReg + intr_status);
1525
1526 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1527 iowrite32(0x01, FlashReg + MULTIPLANE_OPERATION);
1528
1529 iowrite32(1, FlashReg + DMA_ENABLE);
1530 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1531 ;
1532 index_addr((u32)(MODE_10 | (flash_bank << 24) |
1533 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
1534 ddma_trans(read_data, flash_add, flash_bank, 0, NumPages);
1535
1536 ecc_done_OR_dma_comp = 0;
1537 while (1) {
1538 if (enable_ecc) {
1539 while (!ioread32(FlashReg + intr_status))
1540 ;
1541
1542 if (ioread32(FlashReg + intr_status) &
1543 INTR_STATUS0__ECC_ERR) {
1544 iowrite32(INTR_STATUS0__ECC_ERR,
1545 FlashReg + intr_status);
1546 status = do_ecc_new(flash_bank,
1547 read_data, block, page);
1548 } else if (ioread32(FlashReg + intr_status) &
1549 INTR_STATUS0__DMA_CMD_COMP) {
1550 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
1551 FlashReg + intr_status);
1552
1553 if (1 == ecc_done_OR_dma_comp)
1554 break;
1555
1556 ecc_done_OR_dma_comp = 1;
1557 } else if (ioread32(FlashReg + intr_status) &
1558 INTR_STATUS0__ECC_TRANSACTION_DONE) {
1559 iowrite32(
1560 INTR_STATUS0__ECC_TRANSACTION_DONE,
1561 FlashReg + intr_status);
1562
1563 if (1 == ecc_done_OR_dma_comp)
1564 break;
1565
1566 ecc_done_OR_dma_comp = 1;
1567 }
1568 } else {
1569 while (!(ioread32(FlashReg + intr_status) &
1570 INTR_STATUS0__DMA_CMD_COMP))
1571 ;
1572 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
1573 FlashReg + intr_status);
1574 break;
1575 }
1576
1577 iowrite32((~INTR_STATUS0__ECC_ERR) &
1578 (~INTR_STATUS0__ECC_TRANSACTION_DONE) &
1579 (~INTR_STATUS0__DMA_CMD_COMP),
1580 FlashReg + intr_status);
1581
1582 }
1583
1584 iowrite32(ioread32(FlashReg + intr_status),
1585 FlashReg + intr_status);
1586
1587 iowrite32(0, FlashReg + DMA_ENABLE);
1588
1589 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1590 ;
1591
1592 iowrite32(0, FlashReg + MULTIPLANE_OPERATION);
1593 }
1594
1595 return status;
1596}
1597
1598u16 NAND_Pipeline_Read_Ahead(u8 *read_data, u32 block,
1599 u16 page, u16 page_count)
1600{
1601 u32 status = PASS;
1602 u32 NumPages = page_count;
1603 u64 flash_add;
1604 u32 flash_bank;
1605 u32 intr_status = 0;
1606 u32 intr_status_addresses[4] = {INTR_STATUS0,
1607 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1608 int ret;
1609
1610 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
1611 __FILE__, __LINE__, __func__);
1612
1613 status = Boundary_Check_Block_Page(block, page, page_count);
1614
1615 if (page_count < 2)
1616 status = FAIL;
1617
1618 if (status != PASS)
1619 return status;
1620
1621 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
1622 *DeviceInfo.wBlockDataSize +
1623 (u64)page * DeviceInfo.wPageDataSize;
1624
1625 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1626
1627 intr_status = intr_status_addresses[flash_bank];
1628 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1629
1630 iowrite32(1, FlashReg + DMA_ENABLE);
1631 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1632 ;
1633
1634 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1635
1636 /* Fill the mrst_nand_info structure */
1637 info.state = INT_PIPELINE_READ_AHEAD;
1638 info.read_data = read_data;
1639 info.flash_bank = flash_bank;
1640 info.block = block;
1641 info.page = page;
1642 info.ret = PASS;
1643
1644 index_addr((u32)(MODE_10 | (flash_bank << 24) |
1645 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
1646
1647 ddma_trans(read_data, flash_add, flash_bank, 0, NumPages);
1648
1649 iowrite32(1, FlashReg + GLOBAL_INT_ENABLE); /* Enable Interrupt */
1650
1651 ret = wait_for_completion_timeout(&info.complete, 10 * HZ);
1652 if (!ret) {
1653 printk(KERN_ERR "Wait for completion timeout "
1654 "in %s, Line %d\n", __FILE__, __LINE__);
1655 status = ERR;
1656 } else {
1657 status = info.ret;
1658 }
1659
1660 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1661
1662 iowrite32(0, FlashReg + DMA_ENABLE);
1663
1664 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1665 ;
1666
1667 return status;
1668}
1669
1670
1671u16 NAND_Write_Page_Main(u8 *write_data, u32 block, u16 page,
1672 u16 page_count)
1673{
1674 u32 status = PASS;
1675 u64 flash_add;
1676 u32 intr_status = 0;
1677 u32 flash_bank;
1678 u32 intr_status_addresses[4] = {INTR_STATUS0,
1679 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1680 int ret;
1681 u8 *write_data_l;
1682
1683 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
1684 __FILE__, __LINE__, __func__);
1685
1686 status = Boundary_Check_Block_Page(block, page, page_count);
1687 if (status != PASS)
1688 return status;
1689
1690 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
1691 * DeviceInfo.wBlockDataSize +
1692 (u64)page * DeviceInfo.wPageDataSize;
1693
1694 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1695
1696 intr_status = intr_status_addresses[flash_bank];
1697
1698 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1699
1700 iowrite32(INTR_STATUS0__PROGRAM_COMP |
1701 INTR_STATUS0__PROGRAM_FAIL, FlashReg + intr_status);
1702
1703 if (page_count > 1) {
1704 write_data_l = write_data;
1705 while (page_count > MAX_PAGES_PER_RW) {
1706 if (ioread32(FlashReg + MULTIPLANE_OPERATION))
1707 status = NAND_Multiplane_Write(write_data_l,
1708 block, page, MAX_PAGES_PER_RW);
1709 else
1710 status = NAND_Pipeline_Write_Ahead(
1711 write_data_l, block, page,
1712 MAX_PAGES_PER_RW);
1713 if (status == FAIL)
1714 return status;
1715
1716 write_data_l += DeviceInfo.wPageDataSize *
1717 MAX_PAGES_PER_RW;
1718 page_count -= MAX_PAGES_PER_RW;
1719 page += MAX_PAGES_PER_RW;
1720 }
1721 if (ioread32(FlashReg + MULTIPLANE_OPERATION))
1722 status = NAND_Multiplane_Write(write_data_l,
1723 block, page, page_count);
1724 else
1725 status = NAND_Pipeline_Write_Ahead(write_data_l,
1726 block, page, page_count);
1727
1728 return status;
1729 }
1730
1731 iowrite32(1, FlashReg + DMA_ENABLE);
1732 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1733 ;
1734
1735 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1736
1737 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1738
1739 /* Fill the mrst_nand_info structure */
1740 info.state = INT_WRITE_PAGE_MAIN;
1741 info.write_data = write_data;
1742 info.flash_bank = flash_bank;
1743 info.block = block;
1744 info.page = page;
1745 info.ret = PASS;
1746
1747 ddma_trans(write_data, flash_add, flash_bank, 1, 1);
1748
1749 iowrite32(1, FlashReg + GLOBAL_INT_ENABLE); /* Enable interrupt */
1750
1751 ret = wait_for_completion_timeout(&info.complete, 10 * HZ);
1752 if (!ret) {
1753 printk(KERN_ERR "Wait for completion timeout "
1754 "in %s, Line %d\n", __FILE__, __LINE__);
1755 status = ERR;
1756 } else {
1757 status = info.ret;
1758 }
1759
1760 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
1761
1762 iowrite32(0, FlashReg + DMA_ENABLE);
1763 while (ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG)
1764 ;
1765
1766 return status;
1767}
1768
1769void NAND_ECC_Ctrl(int enable)
1770{
1771 if (enable) {
1772 nand_dbg_print(NAND_DBG_WARN,
1773 "Will enable ECC in %s, Line %d, Function: %s\n",
1774 __FILE__, __LINE__, __func__);
1775 iowrite32(1, FlashReg + ECC_ENABLE);
1776 enable_ecc = 1;
1777 } else {
1778 nand_dbg_print(NAND_DBG_WARN,
1779 "Will disable ECC in %s, Line %d, Function: %s\n",
1780 __FILE__, __LINE__, __func__);
1781 iowrite32(0, FlashReg + ECC_ENABLE);
1782 enable_ecc = 0;
1783 }
1784}
1785
1786u16 NAND_Write_Page_Main_Spare(u8 *write_data, u32 block,
1787 u16 page, u16 page_count)
1788{
1789 u32 status = PASS;
1790 u32 i, j, page_num = 0;
1791 u32 PageSize = DeviceInfo.wPageSize;
1792 u32 PageDataSize = DeviceInfo.wPageDataSize;
1793 u32 eccBytes = DeviceInfo.wECCBytesPerSector;
1794 u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
1795 u32 spareSkipBytes = DeviceInfo.wSpareSkipBytes;
1796 u64 flash_add;
1797 u32 eccSectorSize;
1798 u32 flash_bank;
1799 u32 intr_status = 0;
1800 u32 intr_status_addresses[4] = {INTR_STATUS0,
1801 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1802 u8 *page_main_spare = buf_write_page_main_spare;
1803
1804 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1805 __FILE__, __LINE__, __func__);
1806
1807 eccSectorSize = ECC_SECTOR_SIZE * (DeviceInfo.wDevicesConnected);
1808
1809 status = Boundary_Check_Block_Page(block, page, page_count);
1810
1811 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1812
1813 if (status == PASS) {
1814 intr_status = intr_status_addresses[flash_bank];
1815
1816 iowrite32(1, FlashReg + TRANSFER_SPARE_REG);
1817
1818 while ((status != FAIL) && (page_count > 0)) {
1819 flash_add = (u64)(block %
1820 (DeviceInfo.wTotalBlocks / totalUsedBanks)) *
1821 DeviceInfo.wBlockDataSize +
1822 (u64)page * DeviceInfo.wPageDataSize;
1823
1824 iowrite32(ioread32(FlashReg + intr_status),
1825 FlashReg + intr_status);
1826
1827 iowrite32((u32)(MODE_01 | (flash_bank << 24) |
1828 (flash_add >>
1829 DeviceInfo.nBitsInPageDataSize)),
1830 FlashMem);
1831
1832 if (enable_ecc) {
1833 for (j = 0;
1834 j <
1835 DeviceInfo.wPageDataSize / eccSectorSize;
1836 j++) {
1837 for (i = 0; i < eccSectorSize; i++)
1838 page_main_spare[(eccSectorSize +
1839 eccBytes) * j +
1840 i] =
1841 write_data[eccSectorSize *
1842 j + i];
1843
1844 for (i = 0; i < eccBytes; i++)
1845 page_main_spare[(eccSectorSize +
1846 eccBytes) * j +
1847 eccSectorSize +
1848 i] =
1849 write_data[PageDataSize +
1850 spareFlagBytes +
1851 eccBytes * j +
1852 i];
1853 }
1854
1855 for (i = 0; i < spareFlagBytes; i++)
1856 page_main_spare[(eccSectorSize +
1857 eccBytes) * j + i] =
1858 write_data[PageDataSize + i];
1859
1860 for (i = PageSize - 1; i >= PageDataSize +
1861 spareSkipBytes; i--)
1862 page_main_spare[i] = page_main_spare[i -
1863 spareSkipBytes];
1864
1865 for (i = PageDataSize; i < PageDataSize +
1866 spareSkipBytes; i++)
1867 page_main_spare[i] = 0xff;
1868
1869 for (i = 0; i < PageSize / 4; i++)
1870 iowrite32(
1871 *((u32 *)page_main_spare + i),
1872 FlashMem + 0x10);
1873 } else {
1874
1875 for (i = 0; i < PageSize / 4; i++)
1876 iowrite32(*((u32 *)write_data + i),
1877 FlashMem + 0x10);
1878 }
1879
1880 while (!(ioread32(FlashReg + intr_status) &
1881 (INTR_STATUS0__PROGRAM_COMP |
1882 INTR_STATUS0__PROGRAM_FAIL)))
1883 ;
1884
1885 if (ioread32(FlashReg + intr_status) &
1886 INTR_STATUS0__PROGRAM_FAIL)
1887 status = FAIL;
1888
1889 iowrite32(ioread32(FlashReg + intr_status),
1890 FlashReg + intr_status);
1891
1892 page_num++;
1893 page_count--;
1894 write_data += PageSize;
1895 }
1896
1897 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
1898 }
1899
1900 return status;
1901}
1902
1903u16 NAND_Read_Page_Main_Spare(u8 *read_data, u32 block, u16 page,
1904 u16 page_count)
1905{
1906 u32 status = PASS;
1907 u32 i, j;
1908 u64 flash_add = 0;
1909 u32 PageSize = DeviceInfo.wPageSize;
1910 u32 PageDataSize = DeviceInfo.wPageDataSize;
1911 u32 PageSpareSize = DeviceInfo.wPageSpareSize;
1912 u32 eccBytes = DeviceInfo.wECCBytesPerSector;
1913 u32 spareFlagBytes = DeviceInfo.wNumPageSpareFlag;
1914 u32 spareSkipBytes = DeviceInfo.wSpareSkipBytes;
1915 u32 eccSectorSize;
1916 u32 flash_bank;
1917 u32 intr_status = 0;
1918 u8 *read_data_l = read_data;
1919 u32 intr_status_addresses[4] = {INTR_STATUS0,
1920 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
1921 u8 *page_main_spare = buf_read_page_main_spare;
1922
1923 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
1924 __FILE__, __LINE__, __func__);
1925
1926 eccSectorSize = ECC_SECTOR_SIZE * (DeviceInfo.wDevicesConnected);
1927
1928 status = Boundary_Check_Block_Page(block, page, page_count);
1929
1930 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
1931
1932 if (status == PASS) {
1933 intr_status = intr_status_addresses[flash_bank];
1934
1935 iowrite32(1, FlashReg + TRANSFER_SPARE_REG);
1936
1937 iowrite32(ioread32(FlashReg + intr_status),
1938 FlashReg + intr_status);
1939
1940 while ((status != FAIL) && (page_count > 0)) {
1941 flash_add = (u64)(block %
1942 (DeviceInfo.wTotalBlocks / totalUsedBanks))
1943 * DeviceInfo.wBlockDataSize +
1944 (u64)page * DeviceInfo.wPageDataSize;
1945
1946 index_addr((u32)(MODE_10 | (flash_bank << 24) |
1947 (flash_add >> DeviceInfo.nBitsInPageDataSize)),
1948 0x43);
1949 index_addr((u32)(MODE_10 | (flash_bank << 24) |
1950 (flash_add >> DeviceInfo.nBitsInPageDataSize)),
1951 0x2000 | page_count);
1952
1953 while (!(ioread32(FlashReg + intr_status) &
1954 INTR_STATUS0__LOAD_COMP))
1955 ;
1956
1957 iowrite32((u32)(MODE_01 | (flash_bank << 24) |
1958 (flash_add >>
1959 DeviceInfo.nBitsInPageDataSize)),
1960 FlashMem);
1961
1962 for (i = 0; i < PageSize / 4; i++)
1963 *(((u32 *)page_main_spare) + i) =
1964 ioread32(FlashMem + 0x10);
1965
1966 if (enable_ecc) {
1967 for (i = PageDataSize; i < PageSize -
1968 spareSkipBytes; i++)
1969 page_main_spare[i] = page_main_spare[i +
1970 spareSkipBytes];
1971
1972 for (j = 0;
1973 j < DeviceInfo.wPageDataSize / eccSectorSize;
1974 j++) {
1975
1976 for (i = 0; i < eccSectorSize; i++)
1977 read_data_l[eccSectorSize * j +
1978 i] =
1979 page_main_spare[
1980 (eccSectorSize +
1981 eccBytes) * j + i];
1982
1983 for (i = 0; i < eccBytes; i++)
1984 read_data_l[PageDataSize +
1985 spareFlagBytes +
1986 eccBytes * j + i] =
1987 page_main_spare[
1988 (eccSectorSize +
1989 eccBytes) * j +
1990 eccSectorSize + i];
1991 }
1992
1993 for (i = 0; i < spareFlagBytes; i++)
1994 read_data_l[PageDataSize + i] =
1995 page_main_spare[(eccSectorSize +
1996 eccBytes) * j + i];
1997 } else {
1998 for (i = 0; i < (PageDataSize + PageSpareSize);
1999 i++)
2000 read_data_l[i] = page_main_spare[i];
2001
2002 }
2003
2004 if (enable_ecc) {
2005 while (!(ioread32(FlashReg + intr_status) &
2006 (INTR_STATUS0__ECC_TRANSACTION_DONE |
2007 INTR_STATUS0__ECC_ERR)))
2008 ;
2009
2010 if (ioread32(FlashReg + intr_status) &
2011 INTR_STATUS0__ECC_ERR) {
2012 iowrite32(INTR_STATUS0__ECC_ERR,
2013 FlashReg + intr_status);
2014 status = do_ecc_new(flash_bank,
2015 read_data, block, page);
2016 }
2017
2018 if (ioread32(FlashReg + intr_status) &
2019 INTR_STATUS0__ECC_TRANSACTION_DONE &
2020 INTR_STATUS0__ECC_ERR) {
2021 iowrite32(INTR_STATUS0__ECC_ERR |
2022 INTR_STATUS0__ECC_TRANSACTION_DONE,
2023 FlashReg + intr_status);
2024 } else if (ioread32(FlashReg + intr_status) &
2025 INTR_STATUS0__ECC_TRANSACTION_DONE) {
2026 iowrite32(
2027 INTR_STATUS0__ECC_TRANSACTION_DONE,
2028 FlashReg + intr_status);
2029 } else if (ioread32(FlashReg + intr_status) &
2030 INTR_STATUS0__ECC_ERR) {
2031 iowrite32(INTR_STATUS0__ECC_ERR,
2032 FlashReg + intr_status);
2033 }
2034 }
2035
2036 page++;
2037 page_count--;
2038 read_data_l += PageSize;
2039 }
2040 }
2041
2042 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
2043
2044 index_addr((u32)(MODE_10 | (flash_bank << 24) |
2045 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
2046
2047 return status;
2048}
2049
2050u16 NAND_Pipeline_Write_Ahead(u8 *write_data, u32 block,
2051 u16 page, u16 page_count)
2052{
2053 u16 status = PASS;
2054 u32 NumPages = page_count;
2055 u64 flash_add;
2056 u32 flash_bank;
2057 u32 intr_status = 0;
2058 u32 intr_status_addresses[4] = {INTR_STATUS0,
2059 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
2060 int ret;
2061
2062 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
2063 __FILE__, __LINE__, __func__);
2064
2065 status = Boundary_Check_Block_Page(block, page, page_count);
2066
2067 if (page_count < 2)
2068 status = FAIL;
2069
2070 if (status != PASS)
2071 return status;
2072
2073 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
2074 * DeviceInfo.wBlockDataSize +
2075 (u64)page * DeviceInfo.wPageDataSize;
2076
2077 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
2078
2079 intr_status = intr_status_addresses[flash_bank];
2080 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
2081
2082 iowrite32(1, FlashReg + DMA_ENABLE);
2083 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2084 ;
2085
2086 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
2087
2088 /* Fill the mrst_nand_info structure */
2089 info.state = INT_PIPELINE_WRITE_AHEAD;
2090 info.write_data = write_data;
2091 info.flash_bank = flash_bank;
2092 info.block = block;
2093 info.page = page;
2094 info.ret = PASS;
2095
2096 index_addr((u32)(MODE_10 | (flash_bank << 24) |
2097 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
2098
2099 ddma_trans(write_data, flash_add, flash_bank, 1, NumPages);
2100
2101 iowrite32(1, FlashReg + GLOBAL_INT_ENABLE); /* Enable interrupt */
2102
2103 ret = wait_for_completion_timeout(&info.complete, 10 * HZ);
2104 if (!ret) {
2105 printk(KERN_ERR "Wait for completion timeout "
2106 "in %s, Line %d\n", __FILE__, __LINE__);
2107 status = ERR;
2108 } else {
2109 status = info.ret;
2110 }
2111
2112 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
2113
2114 iowrite32(0, FlashReg + DMA_ENABLE);
2115 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2116 ;
2117
2118 return status;
2119}
2120
2121/* Un-tested function */
2122u16 NAND_Multiplane_Write(u8 *write_data, u32 block, u16 page,
2123 u16 page_count)
2124{
2125 u16 status = PASS;
2126 u32 NumPages = page_count;
2127 u64 flash_add;
2128 u32 flash_bank;
2129 u32 intr_status = 0;
2130 u32 intr_status_addresses[4] = {INTR_STATUS0,
2131 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
2132 u16 status2 = PASS;
2133 u32 t;
2134
2135 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
2136 __FILE__, __LINE__, __func__);
2137
2138 status = Boundary_Check_Block_Page(block, page, page_count);
2139 if (status != PASS)
2140 return status;
2141
2142 flash_add = (u64)(block % (DeviceInfo.wTotalBlocks / totalUsedBanks))
2143 * DeviceInfo.wBlockDataSize +
2144 (u64)page * DeviceInfo.wPageDataSize;
2145
2146 flash_bank = block / (DeviceInfo.wTotalBlocks / totalUsedBanks);
2147
2148 intr_status = intr_status_addresses[flash_bank];
2149 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
2150
2151 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
2152 iowrite32(0x01, FlashReg + MULTIPLANE_OPERATION);
2153
2154 iowrite32(1, FlashReg + DMA_ENABLE);
2155 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2156 ;
2157
2158 iowrite32(0, FlashReg + TRANSFER_SPARE_REG);
2159
2160 index_addr((u32)(MODE_10 | (flash_bank << 24) |
2161 (flash_add >> DeviceInfo.nBitsInPageDataSize)), 0x42);
2162
2163 ddma_trans(write_data, flash_add, flash_bank, 1, NumPages);
2164
2165 while (1) {
2166 while (!ioread32(FlashReg + intr_status))
2167 ;
2168
2169 if (ioread32(FlashReg + intr_status) &
2170 INTR_STATUS0__DMA_CMD_COMP) {
2171 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
2172 FlashReg + intr_status);
2173 status = PASS;
2174 if (status2 == FAIL)
2175 status = FAIL;
2176 break;
2177 } else if (ioread32(FlashReg + intr_status) &
2178 INTR_STATUS0__PROGRAM_FAIL) {
2179 status2 = FAIL;
2180 status = FAIL;
2181 t = ioread32(FlashReg + intr_status) &
2182 INTR_STATUS0__PROGRAM_FAIL;
2183 iowrite32(t, FlashReg + intr_status);
2184 } else {
2185 iowrite32((~INTR_STATUS0__PROGRAM_FAIL) &
2186 (~INTR_STATUS0__DMA_CMD_COMP),
2187 FlashReg + intr_status);
2188 }
2189 }
2190
2191 iowrite32(ioread32(FlashReg + intr_status), FlashReg + intr_status);
2192
2193 iowrite32(0, FlashReg + DMA_ENABLE);
2194
2195 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2196 ;
2197
2198 iowrite32(0, FlashReg + MULTIPLANE_OPERATION);
2199
2200 return status;
2201}
2202
2203
2204#if CMD_DMA
2205static irqreturn_t cdma_isr(int irq, void *dev_id)
2206{
2207 struct mrst_nand_info *dev = dev_id;
2208 int first_failed_cmd;
2209
2210 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
2211 __FILE__, __LINE__, __func__);
2212
2213 if (!is_cdma_interrupt())
2214 return IRQ_NONE;
2215
2216 /* Disable controller interrupts */
2217 iowrite32(0, FlashReg + GLOBAL_INT_ENABLE);
2218 GLOB_FTL_Event_Status(&first_failed_cmd);
2219 complete(&dev->complete);
2220
2221 return IRQ_HANDLED;
2222}
2223#else
2224static void handle_nand_int_read(struct mrst_nand_info *dev)
2225{
2226 u32 intr_status_addresses[4] = {INTR_STATUS0,
2227 INTR_STATUS1, INTR_STATUS2, INTR_STATUS3};
2228 u32 intr_status;
2229 u32 ecc_done_OR_dma_comp = 0;
2230
2231 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
2232 __FILE__, __LINE__, __func__);
2233
2234 dev->ret = PASS;
2235 intr_status = intr_status_addresses[dev->flash_bank];
2236
2237 while (1) {
2238 if (enable_ecc) {
2239 if (ioread32(FlashReg + intr_status) &
2240 INTR_STATUS0__ECC_ERR) {
2241 iowrite32(INTR_STATUS0__ECC_ERR,
2242 FlashReg + intr_status);
2243 dev->ret = do_ecc_new(dev->flash_bank,
2244 dev->read_data,
2245 dev->block, dev->page);
2246 } else if (ioread32(FlashReg + intr_status) &
2247 INTR_STATUS0__DMA_CMD_COMP) {
2248 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
2249 FlashReg + intr_status);
2250 if (1 == ecc_done_OR_dma_comp)
2251 break;
2252 ecc_done_OR_dma_comp = 1;
2253 } else if (ioread32(FlashReg + intr_status) &
2254 INTR_STATUS0__ECC_TRANSACTION_DONE) {
2255 iowrite32(INTR_STATUS0__ECC_TRANSACTION_DONE,
2256 FlashReg + intr_status);
2257 if (1 == ecc_done_OR_dma_comp)
2258 break;
2259 ecc_done_OR_dma_comp = 1;
2260 }
2261 } else {
2262 if (ioread32(FlashReg + intr_status) &
2263 INTR_STATUS0__DMA_CMD_COMP) {
2264 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
2265 FlashReg + intr_status);
2266 break;
2267 } else {
2268 printk(KERN_ERR "Illegal INTS "
2269 "(offset addr 0x%x) value: 0x%x\n",
2270 intr_status,
2271 ioread32(FlashReg + intr_status));
2272 }
2273 }
2274
2275 iowrite32((~INTR_STATUS0__ECC_ERR) &
2276 (~INTR_STATUS0__ECC_TRANSACTION_DONE) &
2277 (~INTR_STATUS0__DMA_CMD_COMP),
2278 FlashReg + intr_status);
2279 }
2280}
2281
2282static void handle_nand_int_write(struct mrst_nand_info *dev)
2283{
2284 u32 intr_status;
2285 u32 intr[4] = {INTR_STATUS0, INTR_STATUS1,
2286 INTR_STATUS2, INTR_STATUS3};
2287 int status = PASS;
2288
2289 nand_dbg_print(NAND_DBG_DEBUG, "%s, Line %d, Function: %s\n",
2290 __FILE__, __LINE__, __func__);
2291
2292 dev->ret = PASS;
2293 intr_status = intr[dev->flash_bank];
2294
2295 while (1) {
2296 while (!ioread32(FlashReg + intr_status))
2297 ;
2298
2299 if (ioread32(FlashReg + intr_status) &
2300 INTR_STATUS0__DMA_CMD_COMP) {
2301 iowrite32(INTR_STATUS0__DMA_CMD_COMP,
2302 FlashReg + intr_status);
2303 if (FAIL == status)
2304 dev->ret = FAIL;
2305 break;
2306 } else if (ioread32(FlashReg + intr_status) &
2307 INTR_STATUS0__PROGRAM_FAIL) {
2308 status = FAIL;
2309 iowrite32(INTR_STATUS0__PROGRAM_FAIL,
2310 FlashReg + intr_status);
2311 } else {
2312 iowrite32((~INTR_STATUS0__PROGRAM_FAIL) &
2313 (~INTR_STATUS0__DMA_CMD_COMP),
2314 FlashReg + intr_status);
2315 }
2316 }
2317}
2318
2319static irqreturn_t ddma_isr(int irq, void *dev_id)
2320{
2321 struct mrst_nand_info *dev = dev_id;
2322 u32 int_mask, ints0, ints1, ints2, ints3, ints_offset;
2323 u32 intr[4] = {INTR_STATUS0, INTR_STATUS1,
2324 INTR_STATUS2, INTR_STATUS3};
2325
2326 int_mask = INTR_STATUS0__DMA_CMD_COMP |
2327 INTR_STATUS0__ECC_TRANSACTION_DONE |
2328 INTR_STATUS0__ECC_ERR |
2329 INTR_STATUS0__PROGRAM_FAIL |
2330 INTR_STATUS0__ERASE_FAIL;
2331
2332 ints0 = ioread32(FlashReg + INTR_STATUS0);
2333 ints1 = ioread32(FlashReg + INTR_STATUS1);
2334 ints2 = ioread32(FlashReg + INTR_STATUS2);
2335 ints3 = ioread32(FlashReg + INTR_STATUS3);
2336
2337 ints_offset = intr[dev->flash_bank];
2338
2339 nand_dbg_print(NAND_DBG_DEBUG,
2340 "INTR0: 0x%x, INTR1: 0x%x, INTR2: 0x%x, INTR3: 0x%x, "
2341 "DMA_INTR: 0x%x, "
2342 "dev->state: 0x%x, dev->flash_bank: %d\n",
2343 ints0, ints1, ints2, ints3,
2344 ioread32(FlashReg + DMA_INTR),
2345 dev->state, dev->flash_bank);
2346
2347 if (!(ioread32(FlashReg + ints_offset) & int_mask)) {
2348 iowrite32(ints0, FlashReg + INTR_STATUS0);
2349 iowrite32(ints1, FlashReg + INTR_STATUS1);
2350 iowrite32(ints2, FlashReg + INTR_STATUS2);
2351 iowrite32(ints3, FlashReg + INTR_STATUS3);
2352 nand_dbg_print(NAND_DBG_WARN,
2353 "ddma_isr: Invalid interrupt for NAND controller. "
2354 "Ignore it\n");
2355 return IRQ_NONE;
2356 }
2357
2358 switch (dev->state) {
2359 case INT_READ_PAGE_MAIN:
2360 case INT_PIPELINE_READ_AHEAD:
2361 /* Disable controller interrupts */
2362 iowrite32(0, FlashReg + GLOBAL_INT_ENABLE);
2363 handle_nand_int_read(dev);
2364 break;
2365 case INT_WRITE_PAGE_MAIN:
2366 case INT_PIPELINE_WRITE_AHEAD:
2367 iowrite32(0, FlashReg + GLOBAL_INT_ENABLE);
2368 handle_nand_int_write(dev);
2369 break;
2370 default:
2371 printk(KERN_ERR "ddma_isr - Illegal state: 0x%x\n",
2372 dev->state);
2373 return IRQ_NONE;
2374 }
2375
2376 dev->state = INT_IDLE_STATE;
2377 complete(&dev->complete);
2378 return IRQ_HANDLED;
2379}
2380#endif
2381
2382static const struct pci_device_id nand_pci_ids[] = {
2383 {
2384 .vendor = 0x8086,
2385 .device = 0x0809,
2386 .subvendor = PCI_ANY_ID,
2387 .subdevice = PCI_ANY_ID,
2388 },
2389 { /* end: all zeroes */ }
2390};
2391
2392static int nand_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
2393{
2394 int ret = -ENODEV;
2395 unsigned long csr_base;
2396 unsigned long csr_len;
2397 struct mrst_nand_info *pndev = &info;
2398 u32 int_mask;
2399
2400 ret = pci_enable_device(dev);
2401 if (ret) {
2402 printk(KERN_ERR "Spectra: pci_enable_device failed.\n");
2403 return ret;
2404 }
2405
2406 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
2407 __FILE__, __LINE__, __func__);
2408
2409 FlashReg = ioremap_nocache(GLOB_HWCTL_REG_BASE,
2410 GLOB_HWCTL_REG_SIZE);
2411 if (!FlashReg) {
2412 printk(KERN_ERR "Spectra: ioremap_nocache failed!");
2413 goto failed_disable;
2414 }
2415 nand_dbg_print(NAND_DBG_WARN,
2416 "Spectra: Remapped reg base address: "
2417 "0x%p, len: %d\n",
2418 FlashReg, GLOB_HWCTL_REG_SIZE);
2419
2420 FlashMem = ioremap_nocache(GLOB_HWCTL_MEM_BASE,
2421 GLOB_HWCTL_MEM_SIZE);
2422 if (!FlashMem) {
2423 printk(KERN_ERR "Spectra: ioremap_nocache failed!");
2424 iounmap(FlashReg);
2425 goto failed_disable;
2426 }
2427 nand_dbg_print(NAND_DBG_WARN,
2428 "Spectra: Remapped flash base address: "
2429 "0x%p, len: %d\n",
2430 (void *)FlashMem, GLOB_HWCTL_MEM_SIZE);
2431
2432 nand_dbg_print(NAND_DBG_DEBUG, "Dump timing register values:"
2433 "acc_clks: %d, re_2_we: %d, we_2_re: %d,"
2434 "addr_2_data: %d, rdwr_en_lo_cnt: %d, "
2435 "rdwr_en_hi_cnt: %d, cs_setup_cnt: %d\n",
2436 ioread32(FlashReg + ACC_CLKS),
2437 ioread32(FlashReg + RE_2_WE),
2438 ioread32(FlashReg + WE_2_RE),
2439 ioread32(FlashReg + ADDR_2_DATA),
2440 ioread32(FlashReg + RDWR_EN_LO_CNT),
2441 ioread32(FlashReg + RDWR_EN_HI_CNT),
2442 ioread32(FlashReg + CS_SETUP_CNT));
2443
2444 NAND_Flash_Reset();
2445
2446 iowrite32(0, FlashReg + GLOBAL_INT_ENABLE);
2447
2448#if CMD_DMA
2449 info.pcmds_num = 0;
2450 info.flash_bank = 0;
2451 info.cdma_num = 0;
2452 int_mask = (DMA_INTR__DESC_COMP_CHANNEL0 |
2453 DMA_INTR__DESC_COMP_CHANNEL1 |
2454 DMA_INTR__DESC_COMP_CHANNEL2 |
2455 DMA_INTR__DESC_COMP_CHANNEL3 |
2456 DMA_INTR__MEMCOPY_DESC_COMP);
2457 iowrite32(int_mask, FlashReg + DMA_INTR_EN);
2458 iowrite32(0xFFFF, FlashReg + DMA_INTR);
2459
2460 int_mask = (INTR_STATUS0__ECC_ERR |
2461 INTR_STATUS0__PROGRAM_FAIL |
2462 INTR_STATUS0__ERASE_FAIL);
2463#else
2464 int_mask = INTR_STATUS0__DMA_CMD_COMP |
2465 INTR_STATUS0__ECC_TRANSACTION_DONE |
2466 INTR_STATUS0__ECC_ERR |
2467 INTR_STATUS0__PROGRAM_FAIL |
2468 INTR_STATUS0__ERASE_FAIL;
2469#endif
2470 iowrite32(int_mask, FlashReg + INTR_EN0);
2471 iowrite32(int_mask, FlashReg + INTR_EN1);
2472 iowrite32(int_mask, FlashReg + INTR_EN2);
2473 iowrite32(int_mask, FlashReg + INTR_EN3);
2474
2475 /* Clear all status bits */
2476 iowrite32(0xFFFF, FlashReg + INTR_STATUS0);
2477 iowrite32(0xFFFF, FlashReg + INTR_STATUS1);
2478 iowrite32(0xFFFF, FlashReg + INTR_STATUS2);
2479 iowrite32(0xFFFF, FlashReg + INTR_STATUS3);
2480
2481 iowrite32(0x0F, FlashReg + RB_PIN_ENABLED);
2482 iowrite32(CHIP_EN_DONT_CARE__FLAG, FlashReg + CHIP_ENABLE_DONT_CARE);
2483
2484 /* Should set value for these registers when init */
2485 iowrite32(0, FlashReg + TWO_ROW_ADDR_CYCLES);
2486 iowrite32(1, FlashReg + ECC_ENABLE);
2487 enable_ecc = 1;
2488
2489 pci_set_master(dev);
2490 pndev->dev = dev;
2491
2492 csr_base = pci_resource_start(dev, 0);
2493 if (!csr_base) {
2494 printk(KERN_ERR "Spectra: pci_resource_start failed!\n");
2495 ret = -ENODEV;
2496 goto failed_req_csr;
2497 }
2498
2499 csr_len = pci_resource_len(dev, 0);
2500 if (!csr_len) {
2501 printk(KERN_ERR "Spectra: pci_resource_len failed!\n");
2502 ret = -ENODEV;
2503 goto failed_req_csr;
2504 }
2505
2506 ret = pci_request_regions(dev, SPECTRA_NAND_NAME);
2507 if (ret) {
2508 printk(KERN_ERR "Spectra: Unable to request "
2509 "memory region\n");
2510 goto failed_req_csr;
2511 }
2512
2513 pndev->ioaddr = ioremap_nocache(csr_base, csr_len);
2514 if (!pndev->ioaddr) {
2515 printk(KERN_ERR "Spectra: Unable to remap memory region\n");
2516 ret = -ENOMEM;
2517 goto failed_remap_csr;
2518 }
2519 nand_dbg_print(NAND_DBG_DEBUG, "Spectra: CSR 0x%08lx -> 0x%p (0x%lx)\n",
2520 csr_base, pndev->ioaddr, csr_len);
2521
2522 init_completion(&pndev->complete);
2523 nand_dbg_print(NAND_DBG_DEBUG, "Spectra: IRQ %d\n", dev->irq);
2524
2525#if CMD_DMA
2526 if (request_irq(dev->irq, cdma_isr, IRQF_SHARED,
2527 SPECTRA_NAND_NAME, &info)) {
2528 printk(KERN_ERR "Spectra: Unable to allocate IRQ\n");
2529 ret = -ENODEV;
2530 iounmap(pndev->ioaddr);
2531 goto failed_remap_csr;
2532 }
2533#else
2534 if (request_irq(dev->irq, ddma_isr, IRQF_SHARED,
2535 SPECTRA_NAND_NAME, &info)) {
2536 printk(KERN_ERR "Spectra: Unable to allocate IRQ\n");
2537 ret = -ENODEV;
2538 iounmap(pndev->ioaddr);
2539 goto failed_remap_csr;
2540 }
2541#endif
2542
2543 pci_set_drvdata(dev, pndev);
2544
2545 ret = GLOB_LLD_Read_Device_ID();
2546 if (ret) {
2547 iounmap(pndev->ioaddr);
2548 goto failed_remap_csr;
2549 }
2550
2551 ret = register_spectra_ftl();
2552 if (ret) {
2553 iounmap(pndev->ioaddr);
2554 goto failed_remap_csr;
2555 }
2556
2557 return 0;
2558
2559failed_remap_csr:
2560 pci_release_regions(dev);
2561failed_req_csr:
2562 iounmap(FlashMem);
2563 iounmap(FlashReg);
2564failed_disable:
2565 pci_disable_device(dev);
2566
2567 return ret;
2568}
2569
2570static void nand_pci_remove(struct pci_dev *dev)
2571{
2572 struct mrst_nand_info *pndev = pci_get_drvdata(dev);
2573
2574 nand_dbg_print(NAND_DBG_WARN, "%s, Line %d, Function: %s\n",
2575 __FILE__, __LINE__, __func__);
2576
2577#if CMD_DMA
2578 free_irq(dev->irq, pndev);
2579#endif
2580 iounmap(pndev->ioaddr);
2581 pci_release_regions(dev);
2582 pci_disable_device(dev);
2583}
2584
2585MODULE_DEVICE_TABLE(pci, nand_pci_ids);
2586
2587static struct pci_driver nand_pci_driver = {
2588 .name = SPECTRA_NAND_NAME,
2589 .id_table = nand_pci_ids,
2590 .probe = nand_pci_probe,
2591 .remove = nand_pci_remove,
2592};
2593
2594int NAND_Flash_Init(void)
2595{
2596 int retval;
2597
2598 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
2599 __FILE__, __LINE__, __func__);
2600
2601 retval = pci_register_driver(&nand_pci_driver);
2602 if (retval)
2603 return -ENOMEM;
2604
2605 return PASS;
2606}
2607
2608/* Free memory */
2609int nand_release_spectra(void)
2610{
2611 pci_unregister_driver(&nand_pci_driver);
2612 iounmap(FlashMem);
2613 iounmap(FlashReg);
2614
2615 return 0;
2616}
2617
2618
2619
diff --git a/drivers/staging/spectra/lld_nand.h b/drivers/staging/spectra/lld_nand.h
deleted file mode 100644
index d08388287da8..000000000000
--- a/drivers/staging/spectra/lld_nand.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _LLD_NAND_
21#define _LLD_NAND_
22
23#ifdef ELDORA
24#include "defs.h"
25#else
26#include "flash.h"
27#include "ffsport.h"
28#endif
29
30#define MODE_00 0x00000000
31#define MODE_01 0x04000000
32#define MODE_10 0x08000000
33#define MODE_11 0x0C000000
34
35
36#define DATA_TRANSFER_MODE 0
37#define PROTECTION_PER_BLOCK 1
38#define LOAD_WAIT_COUNT 2
39#define PROGRAM_WAIT_COUNT 3
40#define ERASE_WAIT_COUNT 4
41#define INT_MONITOR_CYCLE_COUNT 5
42#define READ_BUSY_PIN_ENABLED 6
43#define MULTIPLANE_OPERATION_SUPPORT 7
44#define PRE_FETCH_MODE 8
45#define CE_DONT_CARE_SUPPORT 9
46#define COPYBACK_SUPPORT 10
47#define CACHE_WRITE_SUPPORT 11
48#define CACHE_READ_SUPPORT 12
49#define NUM_PAGES_IN_BLOCK 13
50#define ECC_ENABLE_SELECT 14
51#define WRITE_ENABLE_2_READ_ENABLE 15
52#define ADDRESS_2_DATA 16
53#define READ_ENABLE_2_WRITE_ENABLE 17
54#define TWO_ROW_ADDRESS_CYCLES 18
55#define MULTIPLANE_ADDRESS_RESTRICT 19
56#define ACC_CLOCKS 20
57#define READ_WRITE_ENABLE_LOW_COUNT 21
58#define READ_WRITE_ENABLE_HIGH_COUNT 22
59
60#define ECC_SECTOR_SIZE 512
61#define LLD_MAX_FLASH_BANKS 4
62
63struct mrst_nand_info {
64 struct pci_dev *dev;
65 u32 state;
66 u32 flash_bank;
67 u8 *read_data;
68 u8 *write_data;
69 u32 block;
70 u16 page;
71 u32 use_dma;
72 void __iomem *ioaddr; /* Mapped io reg base address */
73 int ret;
74 u32 pcmds_num;
75 struct pending_cmd *pcmds;
76 int cdma_num; /* CDMA descriptor number in this chan */
77 u8 *cdma_desc_buf; /* CDMA descriptor table */
78 u8 *memcp_desc_buf; /* Memory copy descriptor table */
79 dma_addr_t cdma_desc; /* Mapped CDMA descriptor table */
80 dma_addr_t memcp_desc; /* Mapped memory copy descriptor table */
81 struct completion complete;
82};
83
84int NAND_Flash_Init(void);
85int nand_release_spectra(void);
86u16 NAND_Flash_Reset(void);
87u16 NAND_Read_Device_ID(void);
88u16 NAND_Erase_Block(u32 flash_add);
89u16 NAND_Write_Page_Main(u8 *write_data, u32 block, u16 page,
90 u16 page_count);
91u16 NAND_Read_Page_Main(u8 *read_data, u32 block, u16 page,
92 u16 page_count);
93u16 NAND_UnlockArrayAll(void);
94u16 NAND_Write_Page_Main_Spare(u8 *write_data, u32 block,
95 u16 page, u16 page_count);
96u16 NAND_Write_Page_Spare(u8 *read_data, u32 block, u16 page,
97 u16 page_count);
98u16 NAND_Read_Page_Main_Spare(u8 *read_data, u32 block, u16 page,
99 u16 page_count);
100u16 NAND_Read_Page_Spare(u8 *read_data, u32 block, u16 page,
101 u16 page_count);
102void NAND_LLD_Enable_Disable_Interrupts(u16 INT_ENABLE);
103u16 NAND_Get_Bad_Block(u32 block);
104u16 NAND_Pipeline_Read_Ahead(u8 *read_data, u32 block, u16 page,
105 u16 page_count);
106u16 NAND_Pipeline_Write_Ahead(u8 *write_data, u32 block,
107 u16 page, u16 page_count);
108u16 NAND_Multiplane_Read(u8 *read_data, u32 block, u16 page,
109 u16 page_count);
110u16 NAND_Multiplane_Write(u8 *write_data, u32 block, u16 page,
111 u16 page_count);
112void NAND_ECC_Ctrl(int enable);
113u16 NAND_Read_Page_Main_Polling(u8 *read_data,
114 u32 block, u16 page, u16 page_count);
115u16 NAND_Pipeline_Read_Ahead_Polling(u8 *read_data,
116 u32 block, u16 page, u16 page_count);
117void Conv_Spare_Data_Log2Phy_Format(u8 *data);
118void Conv_Spare_Data_Phy2Log_Format(u8 *data);
119void Conv_Main_Spare_Data_Log2Phy_Format(u8 *data, u16 page_count);
120void Conv_Main_Spare_Data_Phy2Log_Format(u8 *data, u16 page_count);
121
122extern void __iomem *FlashReg;
123extern void __iomem *FlashMem;
124
125extern int totalUsedBanks;
126extern u32 GLOB_valid_banks[LLD_MAX_FLASH_BANKS];
127
128#endif /*_LLD_NAND_*/
129
130
131
diff --git a/drivers/staging/spectra/nand_regs.h b/drivers/staging/spectra/nand_regs.h
deleted file mode 100644
index e192e4ae8c1e..000000000000
--- a/drivers/staging/spectra/nand_regs.h
+++ /dev/null
@@ -1,619 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#define DEVICE_RESET 0x0
21#define DEVICE_RESET__BANK0 0x0001
22#define DEVICE_RESET__BANK1 0x0002
23#define DEVICE_RESET__BANK2 0x0004
24#define DEVICE_RESET__BANK3 0x0008
25
26#define TRANSFER_SPARE_REG 0x10
27#define TRANSFER_SPARE_REG__FLAG 0x0001
28
29#define LOAD_WAIT_CNT 0x20
30#define LOAD_WAIT_CNT__VALUE 0xffff
31
32#define PROGRAM_WAIT_CNT 0x30
33#define PROGRAM_WAIT_CNT__VALUE 0xffff
34
35#define ERASE_WAIT_CNT 0x40
36#define ERASE_WAIT_CNT__VALUE 0xffff
37
38#define INT_MON_CYCCNT 0x50
39#define INT_MON_CYCCNT__VALUE 0xffff
40
41#define RB_PIN_ENABLED 0x60
42#define RB_PIN_ENABLED__BANK0 0x0001
43#define RB_PIN_ENABLED__BANK1 0x0002
44#define RB_PIN_ENABLED__BANK2 0x0004
45#define RB_PIN_ENABLED__BANK3 0x0008
46
47#define MULTIPLANE_OPERATION 0x70
48#define MULTIPLANE_OPERATION__FLAG 0x0001
49
50#define MULTIPLANE_READ_ENABLE 0x80
51#define MULTIPLANE_READ_ENABLE__FLAG 0x0001
52
53#define COPYBACK_DISABLE 0x90
54#define COPYBACK_DISABLE__FLAG 0x0001
55
56#define CACHE_WRITE_ENABLE 0xa0
57#define CACHE_WRITE_ENABLE__FLAG 0x0001
58
59#define CACHE_READ_ENABLE 0xb0
60#define CACHE_READ_ENABLE__FLAG 0x0001
61
62#define PREFETCH_MODE 0xc0
63#define PREFETCH_MODE__PREFETCH_EN 0x0001
64#define PREFETCH_MODE__PREFETCH_BURST_LENGTH 0xfff0
65
66#define CHIP_ENABLE_DONT_CARE 0xd0
67#define CHIP_EN_DONT_CARE__FLAG 0x01
68
69#define ECC_ENABLE 0xe0
70#define ECC_ENABLE__FLAG 0x0001
71
72#define GLOBAL_INT_ENABLE 0xf0
73#define GLOBAL_INT_EN_FLAG 0x01
74
75#define WE_2_RE 0x100
76#define WE_2_RE__VALUE 0x003f
77
78#define ADDR_2_DATA 0x110
79#define ADDR_2_DATA__VALUE 0x003f
80
81#define RE_2_WE 0x120
82#define RE_2_WE__VALUE 0x003f
83
84#define ACC_CLKS 0x130
85#define ACC_CLKS__VALUE 0x000f
86
87#define NUMBER_OF_PLANES 0x140
88#define NUMBER_OF_PLANES__VALUE 0x0007
89
90#define PAGES_PER_BLOCK 0x150
91#define PAGES_PER_BLOCK__VALUE 0xffff
92
93#define DEVICE_WIDTH 0x160
94#define DEVICE_WIDTH__VALUE 0x0003
95
96#define DEVICE_MAIN_AREA_SIZE 0x170
97#define DEVICE_MAIN_AREA_SIZE__VALUE 0xffff
98
99#define DEVICE_SPARE_AREA_SIZE 0x180
100#define DEVICE_SPARE_AREA_SIZE__VALUE 0xffff
101
102#define TWO_ROW_ADDR_CYCLES 0x190
103#define TWO_ROW_ADDR_CYCLES__FLAG 0x0001
104
105#define MULTIPLANE_ADDR_RESTRICT 0x1a0
106#define MULTIPLANE_ADDR_RESTRICT__FLAG 0x0001
107
108#define ECC_CORRECTION 0x1b0
109#define ECC_CORRECTION__VALUE 0x001f
110
111#define READ_MODE 0x1c0
112#define READ_MODE__VALUE 0x000f
113
114#define WRITE_MODE 0x1d0
115#define WRITE_MODE__VALUE 0x000f
116
117#define COPYBACK_MODE 0x1e0
118#define COPYBACK_MODE__VALUE 0x000f
119
120#define RDWR_EN_LO_CNT 0x1f0
121#define RDWR_EN_LO_CNT__VALUE 0x001f
122
123#define RDWR_EN_HI_CNT 0x200
124#define RDWR_EN_HI_CNT__VALUE 0x001f
125
126#define MAX_RD_DELAY 0x210
127#define MAX_RD_DELAY__VALUE 0x000f
128
129#define CS_SETUP_CNT 0x220
130#define CS_SETUP_CNT__VALUE 0x001f
131
132#define SPARE_AREA_SKIP_BYTES 0x230
133#define SPARE_AREA_SKIP_BYTES__VALUE 0x003f
134
135#define SPARE_AREA_MARKER 0x240
136#define SPARE_AREA_MARKER__VALUE 0xffff
137
138#define DEVICES_CONNECTED 0x250
139#define DEVICES_CONNECTED__VALUE 0x0007
140
141#define DIE_MASK 0x260
142#define DIE_MASK__VALUE 0x00ff
143
144#define FIRST_BLOCK_OF_NEXT_PLANE 0x270
145#define FIRST_BLOCK_OF_NEXT_PLANE__VALUE 0xffff
146
147#define WRITE_PROTECT 0x280
148#define WRITE_PROTECT__FLAG 0x0001
149
150#define RE_2_RE 0x290
151#define RE_2_RE__VALUE 0x003f
152
153#define MANUFACTURER_ID 0x300
154#define MANUFACTURER_ID__VALUE 0x00ff
155
156#define DEVICE_ID 0x310
157#define DEVICE_ID__VALUE 0x00ff
158
159#define DEVICE_PARAM_0 0x320
160#define DEVICE_PARAM_0__VALUE 0x00ff
161
162#define DEVICE_PARAM_1 0x330
163#define DEVICE_PARAM_1__VALUE 0x00ff
164
165#define DEVICE_PARAM_2 0x340
166#define DEVICE_PARAM_2__VALUE 0x00ff
167
168#define LOGICAL_PAGE_DATA_SIZE 0x350
169#define LOGICAL_PAGE_DATA_SIZE__VALUE 0xffff
170
171#define LOGICAL_PAGE_SPARE_SIZE 0x360
172#define LOGICAL_PAGE_SPARE_SIZE__VALUE 0xffff
173
174#define REVISION 0x370
175#define REVISION__VALUE 0xffff
176
177#define ONFI_DEVICE_FEATURES 0x380
178#define ONFI_DEVICE_FEATURES__VALUE 0x003f
179
180#define ONFI_OPTIONAL_COMMANDS 0x390
181#define ONFI_OPTIONAL_COMMANDS__VALUE 0x003f
182
183#define ONFI_TIMING_MODE 0x3a0
184#define ONFI_TIMING_MODE__VALUE 0x003f
185
186#define ONFI_PGM_CACHE_TIMING_MODE 0x3b0
187#define ONFI_PGM_CACHE_TIMING_MODE__VALUE 0x003f
188
189#define ONFI_DEVICE_NO_OF_LUNS 0x3c0
190#define ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS 0x00ff
191#define ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE 0x0100
192
193#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L 0x3d0
194#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE 0xffff
195
196#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U 0x3e0
197#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE 0xffff
198
199#define FEATURES 0x3f0
200#define FEATURES__N_BANKS 0x0003
201#define FEATURES__ECC_MAX_ERR 0x003c
202#define FEATURES__DMA 0x0040
203#define FEATURES__CMD_DMA 0x0080
204#define FEATURES__PARTITION 0x0100
205#define FEATURES__XDMA_SIDEBAND 0x0200
206#define FEATURES__GPREG 0x0400
207#define FEATURES__INDEX_ADDR 0x0800
208
209#define TRANSFER_MODE 0x400
210#define TRANSFER_MODE__VALUE 0x0003
211
212#define INTR_STATUS0 0x410
213#define INTR_STATUS0__ECC_TRANSACTION_DONE 0x0001
214#define INTR_STATUS0__ECC_ERR 0x0002
215#define INTR_STATUS0__DMA_CMD_COMP 0x0004
216#define INTR_STATUS0__TIME_OUT 0x0008
217#define INTR_STATUS0__PROGRAM_FAIL 0x0010
218#define INTR_STATUS0__ERASE_FAIL 0x0020
219#define INTR_STATUS0__LOAD_COMP 0x0040
220#define INTR_STATUS0__PROGRAM_COMP 0x0080
221#define INTR_STATUS0__ERASE_COMP 0x0100
222#define INTR_STATUS0__PIPE_CPYBCK_CMD_COMP 0x0200
223#define INTR_STATUS0__LOCKED_BLK 0x0400
224#define INTR_STATUS0__UNSUP_CMD 0x0800
225#define INTR_STATUS0__INT_ACT 0x1000
226#define INTR_STATUS0__RST_COMP 0x2000
227#define INTR_STATUS0__PIPE_CMD_ERR 0x4000
228#define INTR_STATUS0__PAGE_XFER_INC 0x8000
229
230#define INTR_EN0 0x420
231#define INTR_EN0__ECC_TRANSACTION_DONE 0x0001
232#define INTR_EN0__ECC_ERR 0x0002
233#define INTR_EN0__DMA_CMD_COMP 0x0004
234#define INTR_EN0__TIME_OUT 0x0008
235#define INTR_EN0__PROGRAM_FAIL 0x0010
236#define INTR_EN0__ERASE_FAIL 0x0020
237#define INTR_EN0__LOAD_COMP 0x0040
238#define INTR_EN0__PROGRAM_COMP 0x0080
239#define INTR_EN0__ERASE_COMP 0x0100
240#define INTR_EN0__PIPE_CPYBCK_CMD_COMP 0x0200
241#define INTR_EN0__LOCKED_BLK 0x0400
242#define INTR_EN0__UNSUP_CMD 0x0800
243#define INTR_EN0__INT_ACT 0x1000
244#define INTR_EN0__RST_COMP 0x2000
245#define INTR_EN0__PIPE_CMD_ERR 0x4000
246#define INTR_EN0__PAGE_XFER_INC 0x8000
247
248#define PAGE_CNT0 0x430
249#define PAGE_CNT0__VALUE 0x00ff
250
251#define ERR_PAGE_ADDR0 0x440
252#define ERR_PAGE_ADDR0__VALUE 0xffff
253
254#define ERR_BLOCK_ADDR0 0x450
255#define ERR_BLOCK_ADDR0__VALUE 0xffff
256
257#define INTR_STATUS1 0x460
258#define INTR_STATUS1__ECC_TRANSACTION_DONE 0x0001
259#define INTR_STATUS1__ECC_ERR 0x0002
260#define INTR_STATUS1__DMA_CMD_COMP 0x0004
261#define INTR_STATUS1__TIME_OUT 0x0008
262#define INTR_STATUS1__PROGRAM_FAIL 0x0010
263#define INTR_STATUS1__ERASE_FAIL 0x0020
264#define INTR_STATUS1__LOAD_COMP 0x0040
265#define INTR_STATUS1__PROGRAM_COMP 0x0080
266#define INTR_STATUS1__ERASE_COMP 0x0100
267#define INTR_STATUS1__PIPE_CPYBCK_CMD_COMP 0x0200
268#define INTR_STATUS1__LOCKED_BLK 0x0400
269#define INTR_STATUS1__UNSUP_CMD 0x0800
270#define INTR_STATUS1__INT_ACT 0x1000
271#define INTR_STATUS1__RST_COMP 0x2000
272#define INTR_STATUS1__PIPE_CMD_ERR 0x4000
273#define INTR_STATUS1__PAGE_XFER_INC 0x8000
274
275#define INTR_EN1 0x470
276#define INTR_EN1__ECC_TRANSACTION_DONE 0x0001
277#define INTR_EN1__ECC_ERR 0x0002
278#define INTR_EN1__DMA_CMD_COMP 0x0004
279#define INTR_EN1__TIME_OUT 0x0008
280#define INTR_EN1__PROGRAM_FAIL 0x0010
281#define INTR_EN1__ERASE_FAIL 0x0020
282#define INTR_EN1__LOAD_COMP 0x0040
283#define INTR_EN1__PROGRAM_COMP 0x0080
284#define INTR_EN1__ERASE_COMP 0x0100
285#define INTR_EN1__PIPE_CPYBCK_CMD_COMP 0x0200
286#define INTR_EN1__LOCKED_BLK 0x0400
287#define INTR_EN1__UNSUP_CMD 0x0800
288#define INTR_EN1__INT_ACT 0x1000
289#define INTR_EN1__RST_COMP 0x2000
290#define INTR_EN1__PIPE_CMD_ERR 0x4000
291#define INTR_EN1__PAGE_XFER_INC 0x8000
292
293#define PAGE_CNT1 0x480
294#define PAGE_CNT1__VALUE 0x00ff
295
296#define ERR_PAGE_ADDR1 0x490
297#define ERR_PAGE_ADDR1__VALUE 0xffff
298
299#define ERR_BLOCK_ADDR1 0x4a0
300#define ERR_BLOCK_ADDR1__VALUE 0xffff
301
302#define INTR_STATUS2 0x4b0
303#define INTR_STATUS2__ECC_TRANSACTION_DONE 0x0001
304#define INTR_STATUS2__ECC_ERR 0x0002
305#define INTR_STATUS2__DMA_CMD_COMP 0x0004
306#define INTR_STATUS2__TIME_OUT 0x0008
307#define INTR_STATUS2__PROGRAM_FAIL 0x0010
308#define INTR_STATUS2__ERASE_FAIL 0x0020
309#define INTR_STATUS2__LOAD_COMP 0x0040
310#define INTR_STATUS2__PROGRAM_COMP 0x0080
311#define INTR_STATUS2__ERASE_COMP 0x0100
312#define INTR_STATUS2__PIPE_CPYBCK_CMD_COMP 0x0200
313#define INTR_STATUS2__LOCKED_BLK 0x0400
314#define INTR_STATUS2__UNSUP_CMD 0x0800
315#define INTR_STATUS2__INT_ACT 0x1000
316#define INTR_STATUS2__RST_COMP 0x2000
317#define INTR_STATUS2__PIPE_CMD_ERR 0x4000
318#define INTR_STATUS2__PAGE_XFER_INC 0x8000
319
320#define INTR_EN2 0x4c0
321#define INTR_EN2__ECC_TRANSACTION_DONE 0x0001
322#define INTR_EN2__ECC_ERR 0x0002
323#define INTR_EN2__DMA_CMD_COMP 0x0004
324#define INTR_EN2__TIME_OUT 0x0008
325#define INTR_EN2__PROGRAM_FAIL 0x0010
326#define INTR_EN2__ERASE_FAIL 0x0020
327#define INTR_EN2__LOAD_COMP 0x0040
328#define INTR_EN2__PROGRAM_COMP 0x0080
329#define INTR_EN2__ERASE_COMP 0x0100
330#define INTR_EN2__PIPE_CPYBCK_CMD_COMP 0x0200
331#define INTR_EN2__LOCKED_BLK 0x0400
332#define INTR_EN2__UNSUP_CMD 0x0800
333#define INTR_EN2__INT_ACT 0x1000
334#define INTR_EN2__RST_COMP 0x2000
335#define INTR_EN2__PIPE_CMD_ERR 0x4000
336#define INTR_EN2__PAGE_XFER_INC 0x8000
337
338#define PAGE_CNT2 0x4d0
339#define PAGE_CNT2__VALUE 0x00ff
340
341#define ERR_PAGE_ADDR2 0x4e0
342#define ERR_PAGE_ADDR2__VALUE 0xffff
343
344#define ERR_BLOCK_ADDR2 0x4f0
345#define ERR_BLOCK_ADDR2__VALUE 0xffff
346
347#define INTR_STATUS3 0x500
348#define INTR_STATUS3__ECC_TRANSACTION_DONE 0x0001
349#define INTR_STATUS3__ECC_ERR 0x0002
350#define INTR_STATUS3__DMA_CMD_COMP 0x0004
351#define INTR_STATUS3__TIME_OUT 0x0008
352#define INTR_STATUS3__PROGRAM_FAIL 0x0010
353#define INTR_STATUS3__ERASE_FAIL 0x0020
354#define INTR_STATUS3__LOAD_COMP 0x0040
355#define INTR_STATUS3__PROGRAM_COMP 0x0080
356#define INTR_STATUS3__ERASE_COMP 0x0100
357#define INTR_STATUS3__PIPE_CPYBCK_CMD_COMP 0x0200
358#define INTR_STATUS3__LOCKED_BLK 0x0400
359#define INTR_STATUS3__UNSUP_CMD 0x0800
360#define INTR_STATUS3__INT_ACT 0x1000
361#define INTR_STATUS3__RST_COMP 0x2000
362#define INTR_STATUS3__PIPE_CMD_ERR 0x4000
363#define INTR_STATUS3__PAGE_XFER_INC 0x8000
364
365#define INTR_EN3 0x510
366#define INTR_EN3__ECC_TRANSACTION_DONE 0x0001
367#define INTR_EN3__ECC_ERR 0x0002
368#define INTR_EN3__DMA_CMD_COMP 0x0004
369#define INTR_EN3__TIME_OUT 0x0008
370#define INTR_EN3__PROGRAM_FAIL 0x0010
371#define INTR_EN3__ERASE_FAIL 0x0020
372#define INTR_EN3__LOAD_COMP 0x0040
373#define INTR_EN3__PROGRAM_COMP 0x0080
374#define INTR_EN3__ERASE_COMP 0x0100
375#define INTR_EN3__PIPE_CPYBCK_CMD_COMP 0x0200
376#define INTR_EN3__LOCKED_BLK 0x0400
377#define INTR_EN3__UNSUP_CMD 0x0800
378#define INTR_EN3__INT_ACT 0x1000
379#define INTR_EN3__RST_COMP 0x2000
380#define INTR_EN3__PIPE_CMD_ERR 0x4000
381#define INTR_EN3__PAGE_XFER_INC 0x8000
382
383#define PAGE_CNT3 0x520
384#define PAGE_CNT3__VALUE 0x00ff
385
386#define ERR_PAGE_ADDR3 0x530
387#define ERR_PAGE_ADDR3__VALUE 0xffff
388
389#define ERR_BLOCK_ADDR3 0x540
390#define ERR_BLOCK_ADDR3__VALUE 0xffff
391
392#define DATA_INTR 0x550
393#define DATA_INTR__WRITE_SPACE_AV 0x0001
394#define DATA_INTR__READ_DATA_AV 0x0002
395
396#define DATA_INTR_EN 0x560
397#define DATA_INTR_EN__WRITE_SPACE_AV 0x0001
398#define DATA_INTR_EN__READ_DATA_AV 0x0002
399
400#define GPREG_0 0x570
401#define GPREG_0__VALUE 0xffff
402
403#define GPREG_1 0x580
404#define GPREG_1__VALUE 0xffff
405
406#define GPREG_2 0x590
407#define GPREG_2__VALUE 0xffff
408
409#define GPREG_3 0x5a0
410#define GPREG_3__VALUE 0xffff
411
412#define ECC_THRESHOLD 0x600
413#define ECC_THRESHOLD__VALUE 0x03ff
414
415#define ECC_ERROR_BLOCK_ADDRESS 0x610
416#define ECC_ERROR_BLOCK_ADDRESS__VALUE 0xffff
417
418#define ECC_ERROR_PAGE_ADDRESS 0x620
419#define ECC_ERROR_PAGE_ADDRESS__VALUE 0x0fff
420#define ECC_ERROR_PAGE_ADDRESS__BANK 0xf000
421
422#define ECC_ERROR_ADDRESS 0x630
423#define ECC_ERROR_ADDRESS__OFFSET 0x0fff
424#define ECC_ERROR_ADDRESS__SECTOR_NR 0xf000
425
426#define ERR_CORRECTION_INFO 0x640
427#define ERR_CORRECTION_INFO__BYTEMASK 0x00ff
428#define ERR_CORRECTION_INFO__DEVICE_NR 0x0f00
429#define ERR_CORRECTION_INFO__ERROR_TYPE 0x4000
430#define ERR_CORRECTION_INFO__LAST_ERR_INFO 0x8000
431
432#define DMA_ENABLE 0x700
433#define DMA_ENABLE__FLAG 0x0001
434
435#define IGNORE_ECC_DONE 0x710
436#define IGNORE_ECC_DONE__FLAG 0x0001
437
438#define DMA_INTR 0x720
439#define DMA_INTR__TARGET_ERROR 0x0001
440#define DMA_INTR__DESC_COMP_CHANNEL0 0x0002
441#define DMA_INTR__DESC_COMP_CHANNEL1 0x0004
442#define DMA_INTR__DESC_COMP_CHANNEL2 0x0008
443#define DMA_INTR__DESC_COMP_CHANNEL3 0x0010
444#define DMA_INTR__MEMCOPY_DESC_COMP 0x0020
445
446#define DMA_INTR_EN 0x730
447#define DMA_INTR_EN__TARGET_ERROR 0x0001
448#define DMA_INTR_EN__DESC_COMP_CHANNEL0 0x0002
449#define DMA_INTR_EN__DESC_COMP_CHANNEL1 0x0004
450#define DMA_INTR_EN__DESC_COMP_CHANNEL2 0x0008
451#define DMA_INTR_EN__DESC_COMP_CHANNEL3 0x0010
452#define DMA_INTR_EN__MEMCOPY_DESC_COMP 0x0020
453
454#define TARGET_ERR_ADDR_LO 0x740
455#define TARGET_ERR_ADDR_LO__VALUE 0xffff
456
457#define TARGET_ERR_ADDR_HI 0x750
458#define TARGET_ERR_ADDR_HI__VALUE 0xffff
459
460#define CHNL_ACTIVE 0x760
461#define CHNL_ACTIVE__CHANNEL0 0x0001
462#define CHNL_ACTIVE__CHANNEL1 0x0002
463#define CHNL_ACTIVE__CHANNEL2 0x0004
464#define CHNL_ACTIVE__CHANNEL3 0x0008
465
466#define ACTIVE_SRC_ID 0x800
467#define ACTIVE_SRC_ID__VALUE 0x00ff
468
469#define PTN_INTR 0x810
470#define PTN_INTR__CONFIG_ERROR 0x0001
471#define PTN_INTR__ACCESS_ERROR_BANK0 0x0002
472#define PTN_INTR__ACCESS_ERROR_BANK1 0x0004
473#define PTN_INTR__ACCESS_ERROR_BANK2 0x0008
474#define PTN_INTR__ACCESS_ERROR_BANK3 0x0010
475#define PTN_INTR__REG_ACCESS_ERROR 0x0020
476
477#define PTN_INTR_EN 0x820
478#define PTN_INTR_EN__CONFIG_ERROR 0x0001
479#define PTN_INTR_EN__ACCESS_ERROR_BANK0 0x0002
480#define PTN_INTR_EN__ACCESS_ERROR_BANK1 0x0004
481#define PTN_INTR_EN__ACCESS_ERROR_BANK2 0x0008
482#define PTN_INTR_EN__ACCESS_ERROR_BANK3 0x0010
483#define PTN_INTR_EN__REG_ACCESS_ERROR 0x0020
484
485#define PERM_SRC_ID_0 0x830
486#define PERM_SRC_ID_0__SRCID 0x00ff
487#define PERM_SRC_ID_0__DIRECT_ACCESS_ACTIVE 0x0800
488#define PERM_SRC_ID_0__WRITE_ACTIVE 0x2000
489#define PERM_SRC_ID_0__READ_ACTIVE 0x4000
490#define PERM_SRC_ID_0__PARTITION_VALID 0x8000
491
492#define MIN_BLK_ADDR_0 0x840
493#define MIN_BLK_ADDR_0__VALUE 0xffff
494
495#define MAX_BLK_ADDR_0 0x850
496#define MAX_BLK_ADDR_0__VALUE 0xffff
497
498#define MIN_MAX_BANK_0 0x860
499#define MIN_MAX_BANK_0__MIN_VALUE 0x0003
500#define MIN_MAX_BANK_0__MAX_VALUE 0x000c
501
502#define PERM_SRC_ID_1 0x870
503#define PERM_SRC_ID_1__SRCID 0x00ff
504#define PERM_SRC_ID_1__DIRECT_ACCESS_ACTIVE 0x0800
505#define PERM_SRC_ID_1__WRITE_ACTIVE 0x2000
506#define PERM_SRC_ID_1__READ_ACTIVE 0x4000
507#define PERM_SRC_ID_1__PARTITION_VALID 0x8000
508
509#define MIN_BLK_ADDR_1 0x880
510#define MIN_BLK_ADDR_1__VALUE 0xffff
511
512#define MAX_BLK_ADDR_1 0x890
513#define MAX_BLK_ADDR_1__VALUE 0xffff
514
515#define MIN_MAX_BANK_1 0x8a0
516#define MIN_MAX_BANK_1__MIN_VALUE 0x0003
517#define MIN_MAX_BANK_1__MAX_VALUE 0x000c
518
519#define PERM_SRC_ID_2 0x8b0
520#define PERM_SRC_ID_2__SRCID 0x00ff
521#define PERM_SRC_ID_2__DIRECT_ACCESS_ACTIVE 0x0800
522#define PERM_SRC_ID_2__WRITE_ACTIVE 0x2000
523#define PERM_SRC_ID_2__READ_ACTIVE 0x4000
524#define PERM_SRC_ID_2__PARTITION_VALID 0x8000
525
526#define MIN_BLK_ADDR_2 0x8c0
527#define MIN_BLK_ADDR_2__VALUE 0xffff
528
529#define MAX_BLK_ADDR_2 0x8d0
530#define MAX_BLK_ADDR_2__VALUE 0xffff
531
532#define MIN_MAX_BANK_2 0x8e0
533#define MIN_MAX_BANK_2__MIN_VALUE 0x0003
534#define MIN_MAX_BANK_2__MAX_VALUE 0x000c
535
536#define PERM_SRC_ID_3 0x8f0
537#define PERM_SRC_ID_3__SRCID 0x00ff
538#define PERM_SRC_ID_3__DIRECT_ACCESS_ACTIVE 0x0800
539#define PERM_SRC_ID_3__WRITE_ACTIVE 0x2000
540#define PERM_SRC_ID_3__READ_ACTIVE 0x4000
541#define PERM_SRC_ID_3__PARTITION_VALID 0x8000
542
543#define MIN_BLK_ADDR_3 0x900
544#define MIN_BLK_ADDR_3__VALUE 0xffff
545
546#define MAX_BLK_ADDR_3 0x910
547#define MAX_BLK_ADDR_3__VALUE 0xffff
548
549#define MIN_MAX_BANK_3 0x920
550#define MIN_MAX_BANK_3__MIN_VALUE 0x0003
551#define MIN_MAX_BANK_3__MAX_VALUE 0x000c
552
553#define PERM_SRC_ID_4 0x930
554#define PERM_SRC_ID_4__SRCID 0x00ff
555#define PERM_SRC_ID_4__DIRECT_ACCESS_ACTIVE 0x0800
556#define PERM_SRC_ID_4__WRITE_ACTIVE 0x2000
557#define PERM_SRC_ID_4__READ_ACTIVE 0x4000
558#define PERM_SRC_ID_4__PARTITION_VALID 0x8000
559
560#define MIN_BLK_ADDR_4 0x940
561#define MIN_BLK_ADDR_4__VALUE 0xffff
562
563#define MAX_BLK_ADDR_4 0x950
564#define MAX_BLK_ADDR_4__VALUE 0xffff
565
566#define MIN_MAX_BANK_4 0x960
567#define MIN_MAX_BANK_4__MIN_VALUE 0x0003
568#define MIN_MAX_BANK_4__MAX_VALUE 0x000c
569
570#define PERM_SRC_ID_5 0x970
571#define PERM_SRC_ID_5__SRCID 0x00ff
572#define PERM_SRC_ID_5__DIRECT_ACCESS_ACTIVE 0x0800
573#define PERM_SRC_ID_5__WRITE_ACTIVE 0x2000
574#define PERM_SRC_ID_5__READ_ACTIVE 0x4000
575#define PERM_SRC_ID_5__PARTITION_VALID 0x8000
576
577#define MIN_BLK_ADDR_5 0x980
578#define MIN_BLK_ADDR_5__VALUE 0xffff
579
580#define MAX_BLK_ADDR_5 0x990
581#define MAX_BLK_ADDR_5__VALUE 0xffff
582
583#define MIN_MAX_BANK_5 0x9a0
584#define MIN_MAX_BANK_5__MIN_VALUE 0x0003
585#define MIN_MAX_BANK_5__MAX_VALUE 0x000c
586
587#define PERM_SRC_ID_6 0x9b0
588#define PERM_SRC_ID_6__SRCID 0x00ff
589#define PERM_SRC_ID_6__DIRECT_ACCESS_ACTIVE 0x0800
590#define PERM_SRC_ID_6__WRITE_ACTIVE 0x2000
591#define PERM_SRC_ID_6__READ_ACTIVE 0x4000
592#define PERM_SRC_ID_6__PARTITION_VALID 0x8000
593
594#define MIN_BLK_ADDR_6 0x9c0
595#define MIN_BLK_ADDR_6__VALUE 0xffff
596
597#define MAX_BLK_ADDR_6 0x9d0
598#define MAX_BLK_ADDR_6__VALUE 0xffff
599
600#define MIN_MAX_BANK_6 0x9e0
601#define MIN_MAX_BANK_6__MIN_VALUE 0x0003
602#define MIN_MAX_BANK_6__MAX_VALUE 0x000c
603
604#define PERM_SRC_ID_7 0x9f0
605#define PERM_SRC_ID_7__SRCID 0x00ff
606#define PERM_SRC_ID_7__DIRECT_ACCESS_ACTIVE 0x0800
607#define PERM_SRC_ID_7__WRITE_ACTIVE 0x2000
608#define PERM_SRC_ID_7__READ_ACTIVE 0x4000
609#define PERM_SRC_ID_7__PARTITION_VALID 0x8000
610
611#define MIN_BLK_ADDR_7 0xa00
612#define MIN_BLK_ADDR_7__VALUE 0xffff
613
614#define MAX_BLK_ADDR_7 0xa10
615#define MAX_BLK_ADDR_7__VALUE 0xffff
616
617#define MIN_MAX_BANK_7 0xa20
618#define MIN_MAX_BANK_7__MIN_VALUE 0x0003
619#define MIN_MAX_BANK_7__MAX_VALUE 0x000c
diff --git a/drivers/staging/spectra/spectraswconfig.h b/drivers/staging/spectra/spectraswconfig.h
deleted file mode 100644
index 17259469e955..000000000000
--- a/drivers/staging/spectra/spectraswconfig.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * NAND Flash Controller Device Driver
3 * Copyright (c) 2009, Intel Corporation and its suppliers.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 */
19
20#ifndef _SPECTRASWCONFIG_
21#define _SPECTRASWCONFIG_
22
23/* NAND driver version */
24#define GLOB_VERSION "driver version 20100311"
25
26
27/***** Common Parameters *****/
28#define RETRY_TIMES 3
29
30#define READ_BADBLOCK_INFO 1
31#define READBACK_VERIFY 0
32#define AUTO_FORMAT_FLASH 0
33
34/***** Cache Parameters *****/
35#define CACHE_ITEM_NUM 128
36#define BLK_NUM_FOR_L2_CACHE 16
37
38/***** Block Table Parameters *****/
39#define BLOCK_TABLE_INDEX 0
40
41/***** Wear Leveling Parameters *****/
42#define WEAR_LEVELING_GATE 0x10
43#define WEAR_LEVELING_BLOCK_NUM 10
44
45#define DEBUG_BNDRY 0
46
47/***** Product Feature Support *****/
48#define FLASH_EMU defined(CONFIG_SPECTRA_EMU)
49#define FLASH_NAND defined(CONFIG_SPECTRA_MRST_HW)
50#define FLASH_MTD defined(CONFIG_SPECTRA_MTD)
51#define CMD_DMA defined(CONFIG_SPECTRA_MRST_HW_DMA)
52
53#define SPECTRA_PARTITION_ID 0
54
55/* Enable this macro if the number of flash blocks is larger than 16K. */
56#define SUPPORT_LARGE_BLOCKNUM 1
57
58/**** Block Table and Reserved Block Parameters *****/
59#define SPECTRA_START_BLOCK 3
60//#define NUM_FREE_BLOCKS_GATE 30
61#define NUM_FREE_BLOCKS_GATE 60
62
63/**** Hardware Parameters ****/
64#define GLOB_HWCTL_REG_BASE 0xFFA40000
65#define GLOB_HWCTL_REG_SIZE 4096
66
67#define GLOB_HWCTL_MEM_BASE 0xFFA48000
68#define GLOB_HWCTL_MEM_SIZE 4096
69
70/* KBV - Updated to LNW scratch register address */
71#define SCRATCH_REG_ADDR 0xFF108018
72#define SCRATCH_REG_SIZE 64
73
74#define GLOB_HWCTL_DEFAULT_BLKS 2048
75
76#define SUPPORT_15BITECC 1
77#define SUPPORT_8BITECC 1
78
79#define ONFI_BLOOM_TIME 0
80#define MODE5_WORKAROUND 1
81
82#endif /*_SPECTRASWCONFIG_*/
diff --git a/drivers/staging/usbip/stub_dev.c b/drivers/staging/usbip/stub_dev.c
index 55c0b510889c..03420e25d9c6 100644
--- a/drivers/staging/usbip/stub_dev.c
+++ b/drivers/staging/usbip/stub_dev.c
@@ -109,11 +109,6 @@ static ssize_t store_sockfd(struct device *dev, struct device_attribute *attr,
109 spin_unlock(&sdev->ud.lock); 109 spin_unlock(&sdev->ud.lock);
110 return -EINVAL; 110 return -EINVAL;
111 } 111 }
112#if 0
113 setnodelay(socket);
114 setkeepalive(socket);
115 setreuse(socket);
116#endif
117 sdev->ud.tcp_socket = socket; 112 sdev->ud.tcp_socket = socket;
118 113
119 spin_unlock(&sdev->ud.lock); 114 spin_unlock(&sdev->ud.lock);
diff --git a/drivers/staging/usbip/stub_rx.c b/drivers/staging/usbip/stub_rx.c
index 6b4e3e182de8..27ac363d1cfa 100644
--- a/drivers/staging/usbip/stub_rx.c
+++ b/drivers/staging/usbip/stub_rx.c
@@ -564,7 +564,7 @@ static void stub_rx_pdu(struct usbip_device *ud)
564 memset(&pdu, 0, sizeof(pdu)); 564 memset(&pdu, 0, sizeof(pdu));
565 565
566 /* 1. receive a pdu header */ 566 /* 1. receive a pdu header */
567 ret = usbip_xmit(0, ud->tcp_socket, (char *) &pdu, sizeof(pdu), 0); 567 ret = usbip_recv(ud->tcp_socket, &pdu, sizeof(pdu));
568 if (ret != sizeof(pdu)) { 568 if (ret != sizeof(pdu)) {
569 dev_err(dev, "recv a header, %d\n", ret); 569 dev_err(dev, "recv a header, %d\n", ret);
570 usbip_event_add(ud, SDEV_EVENT_ERROR_TCP); 570 usbip_event_add(ud, SDEV_EVENT_ERROR_TCP);
diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c
index 3b7a847f4657..d93e7f1f7973 100644
--- a/drivers/staging/usbip/usbip_common.c
+++ b/drivers/staging/usbip/usbip_common.c
@@ -334,9 +334,8 @@ void usbip_dump_header(struct usbip_header *pdu)
334} 334}
335EXPORT_SYMBOL_GPL(usbip_dump_header); 335EXPORT_SYMBOL_GPL(usbip_dump_header);
336 336
337/* Send/receive messages over TCP/IP. I refer drivers/block/nbd.c */ 337/* Receive data over TCP/IP. */
338int usbip_xmit(int send, struct socket *sock, char *buf, int size, 338int usbip_recv(struct socket *sock, void *buf, int size)
339 int msg_flags)
340{ 339{
341 int result; 340 int result;
342 struct msghdr msg; 341 struct msghdr msg;
@@ -355,19 +354,6 @@ int usbip_xmit(int send, struct socket *sock, char *buf, int size,
355 return -EINVAL; 354 return -EINVAL;
356 } 355 }
357 356
358 if (usbip_dbg_flag_xmit) {
359 if (send) {
360 if (!in_interrupt())
361 pr_debug("%-10s:", current->comm);
362 else
363 pr_debug("interrupt :");
364
365 pr_debug("sending... , sock %p, buf %p, size %d, "
366 "msg_flags %d\n", sock, buf, size, msg_flags);
367 usbip_dump_buffer(buf, size);
368 }
369 }
370
371 do { 357 do {
372 sock->sk->sk_allocation = GFP_NOIO; 358 sock->sk->sk_allocation = GFP_NOIO;
373 iov.iov_base = buf; 359 iov.iov_base = buf;
@@ -377,42 +363,30 @@ int usbip_xmit(int send, struct socket *sock, char *buf, int size,
377 msg.msg_control = NULL; 363 msg.msg_control = NULL;
378 msg.msg_controllen = 0; 364 msg.msg_controllen = 0;
379 msg.msg_namelen = 0; 365 msg.msg_namelen = 0;
380 msg.msg_flags = msg_flags | MSG_NOSIGNAL; 366 msg.msg_flags = MSG_NOSIGNAL;
381
382 if (send)
383 result = kernel_sendmsg(sock, &msg, &iov, 1, size);
384 else
385 result = kernel_recvmsg(sock, &msg, &iov, 1, size,
386 MSG_WAITALL);
387 367
368 result = kernel_recvmsg(sock, &msg, &iov, 1, size, MSG_WAITALL);
388 if (result <= 0) { 369 if (result <= 0) {
389 pr_debug("%s sock %p buf %p size %u ret %d total %d\n", 370 pr_debug("receive sock %p buf %p size %u ret %d total %d\n",
390 send ? "send" : "receive", sock, buf, size, 371 sock, buf, size, result, total);
391 result, total);
392 goto err; 372 goto err;
393 } 373 }
394 374
395 size -= result; 375 size -= result;
396 buf += result; 376 buf += result;
397 total += result; 377 total += result;
398
399 } while (size > 0); 378 } while (size > 0);
400 379
401 if (usbip_dbg_flag_xmit) { 380 if (usbip_dbg_flag_xmit) {
402 if (!send) { 381 if (!in_interrupt())
403 if (!in_interrupt()) 382 pr_debug("%-10s:", current->comm);
404 pr_debug("%-10s:", current->comm); 383 else
405 else 384 pr_debug("interrupt :");
406 pr_debug("interrupt :");
407
408 pr_debug("receiving....\n");
409 usbip_dump_buffer(bp, osize);
410 pr_debug("received, osize %d ret %d size %d total %d\n",
411 osize, result, size, total);
412 }
413 385
414 if (send) 386 pr_debug("receiving....\n");
415 pr_debug("send, total %d\n", total); 387 usbip_dump_buffer(bp, osize);
388 pr_debug("received, osize %d ret %d size %d total %d\n",
389 osize, result, size, total);
416 } 390 }
417 391
418 return total; 392 return total;
@@ -420,7 +394,7 @@ int usbip_xmit(int send, struct socket *sock, char *buf, int size,
420err: 394err:
421 return result; 395 return result;
422} 396}
423EXPORT_SYMBOL_GPL(usbip_xmit); 397EXPORT_SYMBOL_GPL(usbip_recv);
424 398
425struct socket *sockfd_to_socket(unsigned int sockfd) 399struct socket *sockfd_to_socket(unsigned int sockfd)
426{ 400{
@@ -712,7 +686,7 @@ int usbip_recv_iso(struct usbip_device *ud, struct urb *urb)
712 if (!buff) 686 if (!buff)
713 return -ENOMEM; 687 return -ENOMEM;
714 688
715 ret = usbip_xmit(0, ud->tcp_socket, buff, size, 0); 689 ret = usbip_recv(ud->tcp_socket, buff, size);
716 if (ret != size) { 690 if (ret != size) {
717 dev_err(&urb->dev->dev, "recv iso_frame_descriptor, %d\n", 691 dev_err(&urb->dev->dev, "recv iso_frame_descriptor, %d\n",
718 ret); 692 ret);
@@ -823,8 +797,7 @@ int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb)
823 if (!(size > 0)) 797 if (!(size > 0))
824 return 0; 798 return 0;
825 799
826 ret = usbip_xmit(0, ud->tcp_socket, (char *)urb->transfer_buffer, 800 ret = usbip_recv(ud->tcp_socket, urb->transfer_buffer, size);
827 size, 0);
828 if (ret != size) { 801 if (ret != size) {
829 dev_err(&urb->dev->dev, "recv xbuf, %d\n", ret); 802 dev_err(&urb->dev->dev, "recv xbuf, %d\n", ret);
830 if (ud->side == USBIP_STUB) { 803 if (ud->side == USBIP_STUB) {
diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h
index be216175ae87..b8f8c48b8a72 100644
--- a/drivers/staging/usbip/usbip_common.h
+++ b/drivers/staging/usbip/usbip_common.h
@@ -292,21 +292,11 @@ struct usbip_device {
292 } eh_ops; 292 } eh_ops;
293}; 293};
294 294
295#if 0
296int usbip_sendmsg(struct socket *, struct msghdr *, int);
297int set_sockaddr(struct socket *socket, struct sockaddr_storage *ss);
298int setnodelay(struct socket *);
299int setquickack(struct socket *);
300int setkeepalive(struct socket *socket);
301void setreuse(struct socket *);
302#endif
303
304/* usbip_common.c */ 295/* usbip_common.c */
305void usbip_dump_urb(struct urb *purb); 296void usbip_dump_urb(struct urb *purb);
306void usbip_dump_header(struct usbip_header *pdu); 297void usbip_dump_header(struct usbip_header *pdu);
307 298
308int usbip_xmit(int send, struct socket *sock, char *buf, int size, 299int usbip_recv(struct socket *sock, void *buf, int size);
309 int msg_flags);
310struct socket *sockfd_to_socket(unsigned int sockfd); 300struct socket *sockfd_to_socket(unsigned int sockfd);
311 301
312void usbip_pack_pdu(struct usbip_header *pdu, struct urb *urb, int cmd, 302void usbip_pack_pdu(struct usbip_header *pdu, struct urb *urb, int cmd,
@@ -337,9 +327,4 @@ static inline int interface_to_devnum(struct usb_interface *interface)
337 return udev->devnum; 327 return udev->devnum;
338} 328}
339 329
340static inline int interface_to_infnum(struct usb_interface *interface)
341{
342 return interface->cur_altsetting->desc.bInterfaceNumber;
343}
344
345#endif /* __USBIP_COMMON_H */ 330#endif /* __USBIP_COMMON_H */
diff --git a/drivers/staging/usbip/vhci_rx.c b/drivers/staging/usbip/vhci_rx.c
index 3872b8cccdcf..3f511b47563d 100644
--- a/drivers/staging/usbip/vhci_rx.c
+++ b/drivers/staging/usbip/vhci_rx.c
@@ -206,7 +206,7 @@ static void vhci_rx_pdu(struct usbip_device *ud)
206 memset(&pdu, 0, sizeof(pdu)); 206 memset(&pdu, 0, sizeof(pdu));
207 207
208 /* 1. receive a pdu header */ 208 /* 1. receive a pdu header */
209 ret = usbip_xmit(0, ud->tcp_socket, (char *) &pdu, sizeof(pdu), 0); 209 ret = usbip_recv(ud->tcp_socket, &pdu, sizeof(pdu));
210 if (ret < 0) { 210 if (ret < 0) {
211 if (ret == -ECONNRESET) 211 if (ret == -ECONNRESET)
212 pr_info("connection reset by peer\n"); 212 pr_info("connection reset by peer\n");
diff --git a/drivers/staging/vme/TODO b/drivers/staging/vme/TODO
index 82c222b4a146..79f00333e7ef 100644
--- a/drivers/staging/vme/TODO
+++ b/drivers/staging/vme/TODO
@@ -1,70 +1,5 @@
1 TODO 1 TODO
2 ==== 2 ====
3 3
4API 4- Add one or more device drivers which use the VME framework.
5===
6
7Master window broadcast select mask
8-----------------------------------
9
10API currently provides no method to set or get Broadcast Select mask. Suggest
11somthing like:
12
13 int vme_master_bmsk_set (struct vme_resource *res, int mask);
14 int vme_master_bmsk_get (struct vme_resource *res, int *mask);
15
16
17Interrupt Generation
18--------------------
19
20Add optional timeout when waiting for an IACK.
21
22
23CR/CSR Buffer
24-------------
25
26The VME API provides no functions to access the buffer mapped into the CR/CSR
27space.
28
29
30Mailboxes
31---------
32
33Whilst not part of the VME specification, they are provided by a number of
34chips. They are currently not supported at all by the API.
35
36
37Core
38====
39
40- Improve generic sanity checks (Such as does an offset and size fit within a
41 window and parameter checking).
42
43Bridge Support
44==============
45
46Tempe (tsi148)
47--------------
48
49- 2eSST Broadcast mode.
50- Mailboxes unsupported.
51- Improve error detection.
52- Control of prefetch size, threshold.
53- Arbiter control
54- Requestor control
55
56Universe II (ca91c142)
57----------------------
58
59- Mailboxes unsupported.
60- Error Detection.
61- Control of prefetch size, threshold.
62- Arbiter control
63- Requestor control
64- Slot detection
65
66Universe I (ca91x042)
67---------------------
68
69Currently completely unsupported.
70 5
diff --git a/drivers/staging/vme/bridges/vme_ca91cx42.c b/drivers/staging/vme/bridges/vme_ca91cx42.c
index 0e4feac138eb..515b8b8e32a8 100644
--- a/drivers/staging/vme/bridges/vme_ca91cx42.c
+++ b/drivers/staging/vme/bridges/vme_ca91cx42.c
@@ -338,7 +338,7 @@ static int ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level,
338 338
339static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, 339static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
340 unsigned long long vme_base, unsigned long long size, 340 unsigned long long vme_base, unsigned long long size,
341 dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) 341 dma_addr_t pci_base, u32 aspace, u32 cycle)
342{ 342{
343 unsigned int i, addr = 0, granularity; 343 unsigned int i, addr = 0, granularity;
344 unsigned int temp_ctl = 0; 344 unsigned int temp_ctl = 0;
@@ -444,7 +444,7 @@ static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
444 444
445static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, 445static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled,
446 unsigned long long *vme_base, unsigned long long *size, 446 unsigned long long *vme_base, unsigned long long *size,
447 dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) 447 dma_addr_t *pci_base, u32 *aspace, u32 *cycle)
448{ 448{
449 unsigned int i, granularity = 0, ctl = 0; 449 unsigned int i, granularity = 0, ctl = 0;
450 unsigned long long vme_bound, pci_offset; 450 unsigned long long vme_bound, pci_offset;
@@ -595,8 +595,8 @@ static void ca91cx42_free_resource(struct vme_master_resource *image)
595 595
596 596
597static int ca91cx42_master_set(struct vme_master_resource *image, int enabled, 597static int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
598 unsigned long long vme_base, unsigned long long size, 598 unsigned long long vme_base, unsigned long long size, u32 aspace,
599 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 599 u32 cycle, u32 dwidth)
600{ 600{
601 int retval = 0; 601 int retval = 0;
602 unsigned int i, granularity = 0; 602 unsigned int i, granularity = 0;
@@ -753,7 +753,7 @@ err_window:
753 753
754static int __ca91cx42_master_get(struct vme_master_resource *image, 754static int __ca91cx42_master_get(struct vme_master_resource *image,
755 int *enabled, unsigned long long *vme_base, unsigned long long *size, 755 int *enabled, unsigned long long *vme_base, unsigned long long *size,
756 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 756 u32 *aspace, u32 *cycle, u32 *dwidth)
757{ 757{
758 unsigned int i, ctl; 758 unsigned int i, ctl;
759 unsigned long long pci_base, pci_bound, vme_offset; 759 unsigned long long pci_base, pci_bound, vme_offset;
@@ -839,8 +839,8 @@ static int __ca91cx42_master_get(struct vme_master_resource *image,
839} 839}
840 840
841static int ca91cx42_master_get(struct vme_master_resource *image, int *enabled, 841static int ca91cx42_master_get(struct vme_master_resource *image, int *enabled,
842 unsigned long long *vme_base, unsigned long long *size, 842 unsigned long long *vme_base, unsigned long long *size, u32 *aspace,
843 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 843 u32 *cycle, u32 *dwidth)
844{ 844{
845 int retval; 845 int retval;
846 846
@@ -876,13 +876,13 @@ static ssize_t ca91cx42_master_read(struct vme_master_resource *image,
876 * maximal configured data cycle is used and splits it 876 * maximal configured data cycle is used and splits it
877 * automatically for non-aligned addresses. 877 * automatically for non-aligned addresses.
878 */ 878 */
879 if ((int)addr & 0x1) { 879 if ((uintptr_t)addr & 0x1) {
880 *(u8 *)buf = ioread8(addr); 880 *(u8 *)buf = ioread8(addr);
881 done += 1; 881 done += 1;
882 if (done == count) 882 if (done == count)
883 goto out; 883 goto out;
884 } 884 }
885 if ((int)addr & 0x2) { 885 if ((uintptr_t)addr & 0x2) {
886 if ((count - done) < 2) { 886 if ((count - done) < 2) {
887 *(u8 *)(buf + done) = ioread8(addr + done); 887 *(u8 *)(buf + done) = ioread8(addr + done);
888 done += 1; 888 done += 1;
@@ -930,13 +930,13 @@ static ssize_t ca91cx42_master_write(struct vme_master_resource *image,
930 /* Here we apply for the same strategy we do in master_read 930 /* Here we apply for the same strategy we do in master_read
931 * function in order to assure D16 cycle when required. 931 * function in order to assure D16 cycle when required.
932 */ 932 */
933 if ((int)addr & 0x1) { 933 if ((uintptr_t)addr & 0x1) {
934 iowrite8(*(u8 *)buf, addr); 934 iowrite8(*(u8 *)buf, addr);
935 done += 1; 935 done += 1;
936 if (done == count) 936 if (done == count)
937 goto out; 937 goto out;
938 } 938 }
939 if ((int)addr & 0x2) { 939 if ((uintptr_t)addr & 0x2) {
940 if ((count - done) < 2) { 940 if ((count - done) < 2) {
941 iowrite8(*(u8 *)(buf + done), addr + done); 941 iowrite8(*(u8 *)(buf + done), addr + done);
942 done += 1; 942 done += 1;
@@ -973,7 +973,8 @@ static unsigned int ca91cx42_master_rmw(struct vme_master_resource *image,
973 unsigned int mask, unsigned int compare, unsigned int swap, 973 unsigned int mask, unsigned int compare, unsigned int swap,
974 loff_t offset) 974 loff_t offset)
975{ 975{
976 u32 pci_addr, result; 976 u32 result;
977 uintptr_t pci_addr;
977 int i; 978 int i;
978 struct ca91cx42_driver *bridge; 979 struct ca91cx42_driver *bridge;
979 struct device *dev; 980 struct device *dev;
@@ -990,7 +991,7 @@ static unsigned int ca91cx42_master_rmw(struct vme_master_resource *image,
990 /* Lock image */ 991 /* Lock image */
991 spin_lock(&image->lock); 992 spin_lock(&image->lock);
992 993
993 pci_addr = (u32)image->kern_base + offset; 994 pci_addr = (uintptr_t)image->kern_base + offset;
994 995
995 /* Address must be 4-byte aligned */ 996 /* Address must be 4-byte aligned */
996 if (pci_addr & 0x3) { 997 if (pci_addr & 0x3) {
@@ -1291,7 +1292,7 @@ static int ca91cx42_dma_list_empty(struct vme_dma_list *list)
1291 * callback is attached and disabled when the last callback is removed. 1292 * callback is attached and disabled when the last callback is removed.
1292 */ 1293 */
1293static int ca91cx42_lm_set(struct vme_lm_resource *lm, 1294static int ca91cx42_lm_set(struct vme_lm_resource *lm,
1294 unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) 1295 unsigned long long lm_base, u32 aspace, u32 cycle)
1295{ 1296{
1296 u32 temp_base, lm_ctl = 0; 1297 u32 temp_base, lm_ctl = 0;
1297 int i; 1298 int i;
@@ -1359,7 +1360,7 @@ static int ca91cx42_lm_set(struct vme_lm_resource *lm,
1359 * or disabled. 1360 * or disabled.
1360 */ 1361 */
1361static int ca91cx42_lm_get(struct vme_lm_resource *lm, 1362static int ca91cx42_lm_get(struct vme_lm_resource *lm,
1362 unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) 1363 unsigned long long *lm_base, u32 *aspace, u32 *cycle)
1363{ 1364{
1364 u32 lm_ctl, enabled = 0; 1365 u32 lm_ctl, enabled = 0;
1365 struct ca91cx42_driver *bridge; 1366 struct ca91cx42_driver *bridge;
diff --git a/drivers/staging/vme/bridges/vme_tsi148.c b/drivers/staging/vme/bridges/vme_tsi148.c
index 6c1167c2bea9..08a449b4abf9 100644
--- a/drivers/staging/vme/bridges/vme_tsi148.c
+++ b/drivers/staging/vme/bridges/vme_tsi148.c
@@ -483,7 +483,7 @@ static int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level,
483 * Find the first error in this address range 483 * Find the first error in this address range
484 */ 484 */
485static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, 485static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge,
486 vme_address_t aspace, unsigned long long address, size_t count) 486 u32 aspace, unsigned long long address, size_t count)
487{ 487{
488 struct list_head *err_pos; 488 struct list_head *err_pos;
489 struct vme_bus_error *vme_err, *valid = NULL; 489 struct vme_bus_error *vme_err, *valid = NULL;
@@ -517,7 +517,7 @@ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge,
517 * Clear errors in the provided address range. 517 * Clear errors in the provided address range.
518 */ 518 */
519static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, 519static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge,
520 vme_address_t aspace, unsigned long long address, size_t count) 520 u32 aspace, unsigned long long address, size_t count)
521{ 521{
522 struct list_head *err_pos, *temp; 522 struct list_head *err_pos, *temp;
523 struct vme_bus_error *vme_err; 523 struct vme_bus_error *vme_err;
@@ -551,7 +551,7 @@ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge,
551 */ 551 */
552static int tsi148_slave_set(struct vme_slave_resource *image, int enabled, 552static int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
553 unsigned long long vme_base, unsigned long long size, 553 unsigned long long vme_base, unsigned long long size,
554 dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) 554 dma_addr_t pci_base, u32 aspace, u32 cycle)
555{ 555{
556 unsigned int i, addr = 0, granularity = 0; 556 unsigned int i, addr = 0, granularity = 0;
557 unsigned int temp_ctl = 0; 557 unsigned int temp_ctl = 0;
@@ -701,7 +701,7 @@ static int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
701 */ 701 */
702static int tsi148_slave_get(struct vme_slave_resource *image, int *enabled, 702static int tsi148_slave_get(struct vme_slave_resource *image, int *enabled,
703 unsigned long long *vme_base, unsigned long long *size, 703 unsigned long long *vme_base, unsigned long long *size,
704 dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) 704 dma_addr_t *pci_base, u32 *aspace, u32 *cycle)
705{ 705{
706 unsigned int i, granularity = 0, ctl = 0; 706 unsigned int i, granularity = 0, ctl = 0;
707 unsigned int vme_base_low, vme_base_high; 707 unsigned int vme_base_low, vme_base_high;
@@ -893,8 +893,8 @@ static void tsi148_free_resource(struct vme_master_resource *image)
893 * Set the attributes of an outbound window. 893 * Set the attributes of an outbound window.
894 */ 894 */
895static int tsi148_master_set(struct vme_master_resource *image, int enabled, 895static int tsi148_master_set(struct vme_master_resource *image, int enabled,
896 unsigned long long vme_base, unsigned long long size, 896 unsigned long long vme_base, unsigned long long size, u32 aspace,
897 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 897 u32 cycle, u32 dwidth)
898{ 898{
899 int retval = 0; 899 int retval = 0;
900 unsigned int i; 900 unsigned int i;
@@ -1129,8 +1129,8 @@ err_window:
1129 * XXX Not parsing prefetch information. 1129 * XXX Not parsing prefetch information.
1130 */ 1130 */
1131static int __tsi148_master_get(struct vme_master_resource *image, int *enabled, 1131static int __tsi148_master_get(struct vme_master_resource *image, int *enabled,
1132 unsigned long long *vme_base, unsigned long long *size, 1132 unsigned long long *vme_base, unsigned long long *size, u32 *aspace,
1133 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 1133 u32 *cycle, u32 *dwidth)
1134{ 1134{
1135 unsigned int i, ctl; 1135 unsigned int i, ctl;
1136 unsigned int pci_base_low, pci_base_high; 1136 unsigned int pci_base_low, pci_base_high;
@@ -1239,8 +1239,8 @@ static int __tsi148_master_get(struct vme_master_resource *image, int *enabled,
1239 1239
1240 1240
1241static int tsi148_master_get(struct vme_master_resource *image, int *enabled, 1241static int tsi148_master_get(struct vme_master_resource *image, int *enabled,
1242 unsigned long long *vme_base, unsigned long long *size, 1242 unsigned long long *vme_base, unsigned long long *size, u32 *aspace,
1243 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 1243 u32 *cycle, u32 *dwidth)
1244{ 1244{
1245 int retval; 1245 int retval;
1246 1246
@@ -1259,9 +1259,7 @@ static ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf,
1259{ 1259{
1260 int retval, enabled; 1260 int retval, enabled;
1261 unsigned long long vme_base, size; 1261 unsigned long long vme_base, size;
1262 vme_address_t aspace; 1262 u32 aspace, cycle, dwidth;
1263 vme_cycle_t cycle;
1264 vme_width_t dwidth;
1265 struct vme_bus_error *vme_err = NULL; 1263 struct vme_bus_error *vme_err = NULL;
1266 struct vme_bridge *tsi148_bridge; 1264 struct vme_bridge *tsi148_bridge;
1267 1265
@@ -1301,9 +1299,7 @@ static ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf,
1301{ 1299{
1302 int retval = 0, enabled; 1300 int retval = 0, enabled;
1303 unsigned long long vme_base, size; 1301 unsigned long long vme_base, size;
1304 vme_address_t aspace; 1302 u32 aspace, cycle, dwidth;
1305 vme_cycle_t cycle;
1306 vme_width_t dwidth;
1307 1303
1308 struct vme_bus_error *vme_err = NULL; 1304 struct vme_bus_error *vme_err = NULL;
1309 struct vme_bridge *tsi148_bridge; 1305 struct vme_bridge *tsi148_bridge;
@@ -1420,7 +1416,7 @@ static unsigned int tsi148_master_rmw(struct vme_master_resource *image,
1420} 1416}
1421 1417
1422static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, 1418static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr,
1423 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 1419 u32 aspace, u32 cycle, u32 dwidth)
1424{ 1420{
1425 /* Setup 2eSST speeds */ 1421 /* Setup 2eSST speeds */
1426 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { 1422 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
@@ -1514,7 +1510,7 @@ static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr,
1514} 1510}
1515 1511
1516static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr, 1512static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr,
1517 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 1513 u32 aspace, u32 cycle, u32 dwidth)
1518{ 1514{
1519 /* Setup 2eSST speeds */ 1515 /* Setup 2eSST speeds */
1520 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { 1516 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
@@ -1886,7 +1882,7 @@ static int tsi148_dma_list_empty(struct vme_dma_list *list)
1886 * callback is attached and disabled when the last callback is removed. 1882 * callback is attached and disabled when the last callback is removed.
1887 */ 1883 */
1888static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, 1884static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
1889 vme_address_t aspace, vme_cycle_t cycle) 1885 u32 aspace, u32 cycle)
1890{ 1886{
1891 u32 lm_base_high, lm_base_low, lm_ctl = 0; 1887 u32 lm_base_high, lm_base_low, lm_ctl = 0;
1892 int i; 1888 int i;
@@ -1953,7 +1949,7 @@ static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
1953 * or disabled. 1949 * or disabled.
1954 */ 1950 */
1955static int tsi148_lm_get(struct vme_lm_resource *lm, 1951static int tsi148_lm_get(struct vme_lm_resource *lm,
1956 unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) 1952 unsigned long long *lm_base, u32 *aspace, u32 *cycle)
1957{ 1953{
1958 u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0; 1954 u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0;
1959 struct tsi148_driver *bridge; 1955 struct tsi148_driver *bridge;
diff --git a/drivers/staging/vme/devices/Kconfig b/drivers/staging/vme/devices/Kconfig
index ca5ba89e2d8c..55ec30cb1fa2 100644
--- a/drivers/staging/vme/devices/Kconfig
+++ b/drivers/staging/vme/devices/Kconfig
@@ -6,3 +6,16 @@ config VME_USER
6 If you say Y here you want to be able to access a limited number of 6 If you say Y here you want to be able to access a limited number of
7 VME windows in a manner at least semi-compatible with the interface 7 VME windows in a manner at least semi-compatible with the interface
8 provided with the original driver at http://vmelinux.org/. 8 provided with the original driver at http://vmelinux.org/.
9
10config VME_PIO2
11 tristate "GE PIO2 VME"
12 depends on GPIOLIB
13 help
14 Say Y here to include support for the GE PIO2. The PIO2 is a 6U VME
15 slave card, implementing 32 solid-state relay switched IO lines, in
16 4 groups of 8. Each bank of IO lines is built to function as input,
17 output or both depending on the variant of the card.
18
19 To compile this driver as a module, choose M here. The module will
20 be called vme_pio2. If unsure, say N.
21
diff --git a/drivers/staging/vme/devices/Makefile b/drivers/staging/vme/devices/Makefile
index 459742a75283..172512cb5dbf 100644
--- a/drivers/staging/vme/devices/Makefile
+++ b/drivers/staging/vme/devices/Makefile
@@ -3,3 +3,6 @@
3# 3#
4 4
5obj-$(CONFIG_VME_USER) += vme_user.o 5obj-$(CONFIG_VME_USER) += vme_user.o
6
7vme_pio2-objs := vme_pio2_cntr.o vme_pio2_gpio.o vme_pio2_core.o
8obj-$(CONFIG_VME_PIO2) += vme_pio2.o
diff --git a/drivers/staging/vme/devices/vme_pio2.h b/drivers/staging/vme/devices/vme_pio2.h
new file mode 100644
index 000000000000..3c5931364535
--- /dev/null
+++ b/drivers/staging/vme/devices/vme_pio2.h
@@ -0,0 +1,249 @@
1#ifndef _VME_PIO2_H_
2#define _VME_PIO2_H_
3
4#define PIO2_CARDS_MAX 32
5
6#define PIO2_VARIANT_LENGTH 5
7
8#define PIO2_NUM_CHANNELS 32
9#define PIO2_NUM_IRQS 11
10#define PIO2_NUM_CNTRS 6
11
12#define PIO2_REGS_SIZE 0x40
13
14#define PIO2_REGS_DATA0 0x0
15#define PIO2_REGS_DATA1 0x1
16#define PIO2_REGS_DATA2 0x2
17#define PIO2_REGS_DATA3 0x3
18
19static const int PIO2_REGS_DATA[4] = { PIO2_REGS_DATA0, PIO2_REGS_DATA1,
20 PIO2_REGS_DATA2, PIO2_REGS_DATA3 };
21
22#define PIO2_REGS_INT_STAT0 0x8
23#define PIO2_REGS_INT_STAT1 0x9
24#define PIO2_REGS_INT_STAT2 0xa
25#define PIO2_REGS_INT_STAT3 0xb
26
27static const int PIO2_REGS_INT_STAT[4] = { PIO2_REGS_INT_STAT0,
28 PIO2_REGS_INT_STAT1,
29 PIO2_REGS_INT_STAT2,
30 PIO2_REGS_INT_STAT3 };
31
32#define PIO2_REGS_INT_STAT_CNTR 0xc
33#define PIO2_REGS_INT_MASK0 0x10
34#define PIO2_REGS_INT_MASK1 0x11
35#define PIO2_REGS_INT_MASK2 0x12
36#define PIO2_REGS_INT_MASK3 0x13
37#define PIO2_REGS_INT_MASK4 0x14
38#define PIO2_REGS_INT_MASK5 0x15
39#define PIO2_REGS_INT_MASK6 0x16
40#define PIO2_REGS_INT_MASK7 0x17
41
42static const int PIO2_REGS_INT_MASK[8] = { PIO2_REGS_INT_MASK0,
43 PIO2_REGS_INT_MASK1,
44 PIO2_REGS_INT_MASK2,
45 PIO2_REGS_INT_MASK3,
46 PIO2_REGS_INT_MASK4,
47 PIO2_REGS_INT_MASK5,
48 PIO2_REGS_INT_MASK6,
49 PIO2_REGS_INT_MASK7 };
50
51
52
53#define PIO2_REGS_CTRL 0x18
54#define PIO2_REGS_VME_VECTOR 0x19
55#define PIO2_REGS_CNTR0 0x20
56#define PIO2_REGS_CNTR1 0x22
57#define PIO2_REGS_CNTR2 0x24
58#define PIO2_REGS_CTRL_WRD0 0x26
59#define PIO2_REGS_CNTR3 0x28
60#define PIO2_REGS_CNTR4 0x2a
61#define PIO2_REGS_CNTR5 0x2c
62#define PIO2_REGS_CTRL_WRD1 0x2e
63
64#define PIO2_REGS_ID 0x30
65
66
67/* PIO2_REGS_DATAx (0x0 - 0x3) */
68
69static const int PIO2_CHANNEL_BANK[32] = { 0, 0, 0, 0, 0, 0, 0, 0,
70 1, 1, 1, 1, 1, 1, 1, 1,
71 2, 2, 2, 2, 2, 2, 2, 2,
72 3, 3, 3, 3, 3, 3, 3, 3 };
73
74#define PIO2_CHANNEL0_BIT (1 << 0)
75#define PIO2_CHANNEL1_BIT (1 << 1)
76#define PIO2_CHANNEL2_BIT (1 << 2)
77#define PIO2_CHANNEL3_BIT (1 << 3)
78#define PIO2_CHANNEL4_BIT (1 << 4)
79#define PIO2_CHANNEL5_BIT (1 << 5)
80#define PIO2_CHANNEL6_BIT (1 << 6)
81#define PIO2_CHANNEL7_BIT (1 << 7)
82#define PIO2_CHANNEL8_BIT (1 << 0)
83#define PIO2_CHANNEL9_BIT (1 << 1)
84#define PIO2_CHANNEL10_BIT (1 << 2)
85#define PIO2_CHANNEL11_BIT (1 << 3)
86#define PIO2_CHANNEL12_BIT (1 << 4)
87#define PIO2_CHANNEL13_BIT (1 << 5)
88#define PIO2_CHANNEL14_BIT (1 << 6)
89#define PIO2_CHANNEL15_BIT (1 << 7)
90#define PIO2_CHANNEL16_BIT (1 << 0)
91#define PIO2_CHANNEL17_BIT (1 << 1)
92#define PIO2_CHANNEL18_BIT (1 << 2)
93#define PIO2_CHANNEL19_BIT (1 << 3)
94#define PIO2_CHANNEL20_BIT (1 << 4)
95#define PIO2_CHANNEL21_BIT (1 << 5)
96#define PIO2_CHANNEL22_BIT (1 << 6)
97#define PIO2_CHANNEL23_BIT (1 << 7)
98#define PIO2_CHANNEL24_BIT (1 << 0)
99#define PIO2_CHANNEL25_BIT (1 << 1)
100#define PIO2_CHANNEL26_BIT (1 << 2)
101#define PIO2_CHANNEL27_BIT (1 << 3)
102#define PIO2_CHANNEL28_BIT (1 << 4)
103#define PIO2_CHANNEL29_BIT (1 << 5)
104#define PIO2_CHANNEL30_BIT (1 << 6)
105#define PIO2_CHANNEL31_BIT (1 << 7)
106
107static const int PIO2_CHANNEL_BIT[32] = { PIO2_CHANNEL0_BIT, PIO2_CHANNEL1_BIT,
108 PIO2_CHANNEL2_BIT, PIO2_CHANNEL3_BIT,
109 PIO2_CHANNEL4_BIT, PIO2_CHANNEL5_BIT,
110 PIO2_CHANNEL6_BIT, PIO2_CHANNEL7_BIT,
111 PIO2_CHANNEL8_BIT, PIO2_CHANNEL9_BIT,
112 PIO2_CHANNEL10_BIT, PIO2_CHANNEL11_BIT,
113 PIO2_CHANNEL12_BIT, PIO2_CHANNEL13_BIT,
114 PIO2_CHANNEL14_BIT, PIO2_CHANNEL15_BIT,
115 PIO2_CHANNEL16_BIT, PIO2_CHANNEL17_BIT,
116 PIO2_CHANNEL18_BIT, PIO2_CHANNEL19_BIT,
117 PIO2_CHANNEL20_BIT, PIO2_CHANNEL21_BIT,
118 PIO2_CHANNEL22_BIT, PIO2_CHANNEL23_BIT,
119 PIO2_CHANNEL24_BIT, PIO2_CHANNEL25_BIT,
120 PIO2_CHANNEL26_BIT, PIO2_CHANNEL27_BIT,
121 PIO2_CHANNEL28_BIT, PIO2_CHANNEL29_BIT,
122 PIO2_CHANNEL30_BIT, PIO2_CHANNEL31_BIT
123 };
124
125/* PIO2_REGS_INT_STAT_CNTR (0xc) */
126#define PIO2_COUNTER0 (1 << 0)
127#define PIO2_COUNTER1 (1 << 1)
128#define PIO2_COUNTER2 (1 << 2)
129#define PIO2_COUNTER3 (1 << 3)
130#define PIO2_COUNTER4 (1 << 4)
131#define PIO2_COUNTER5 (1 << 5)
132
133static const int PIO2_COUNTER[6] = { PIO2_COUNTER0, PIO2_COUNTER1,
134 PIO2_COUNTER2, PIO2_COUNTER3,
135 PIO2_COUNTER4, PIO2_COUNTER5 };
136
137/* PIO2_REGS_CTRL (0x18) */
138#define PIO2_VME_INT_MASK 0x7
139#define PIO2_LED (1 << 6)
140#define PIO2_LOOP (1 << 7)
141
142/* PIO2_REGS_VME_VECTOR (0x19) */
143#define PIO2_VME_VECTOR_SPUR 0x0
144#define PIO2_VME_VECTOR_BANK0 0x1
145#define PIO2_VME_VECTOR_BANK1 0x2
146#define PIO2_VME_VECTOR_BANK2 0x3
147#define PIO2_VME_VECTOR_BANK3 0x4
148#define PIO2_VME_VECTOR_CNTR0 0x5
149#define PIO2_VME_VECTOR_CNTR1 0x6
150#define PIO2_VME_VECTOR_CNTR2 0x7
151#define PIO2_VME_VECTOR_CNTR3 0x8
152#define PIO2_VME_VECTOR_CNTR4 0x9
153#define PIO2_VME_VECTOR_CNTR5 0xa
154
155#define PIO2_VME_VECTOR_MASK 0xf0
156
157static const int PIO2_VECTOR_BANK[4] = { PIO2_VME_VECTOR_BANK0,
158 PIO2_VME_VECTOR_BANK1,
159 PIO2_VME_VECTOR_BANK2,
160 PIO2_VME_VECTOR_BANK3 };
161
162static const int PIO2_VECTOR_CNTR[6] = { PIO2_VME_VECTOR_CNTR0,
163 PIO2_VME_VECTOR_CNTR1,
164 PIO2_VME_VECTOR_CNTR2,
165 PIO2_VME_VECTOR_CNTR3,
166 PIO2_VME_VECTOR_CNTR4,
167 PIO2_VME_VECTOR_CNTR5 };
168
169/* PIO2_REGS_CNTRx (0x20 - 0x24 & 0x28 - 0x2c) */
170
171static const int PIO2_CNTR_DATA[6] = { PIO2_REGS_CNTR0, PIO2_REGS_CNTR1,
172 PIO2_REGS_CNTR2, PIO2_REGS_CNTR3,
173 PIO2_REGS_CNTR4, PIO2_REGS_CNTR5 };
174
175/* PIO2_REGS_CTRL_WRDx (0x26 & 0x2e) */
176
177static const int PIO2_CNTR_CTRL[6] = { PIO2_REGS_CTRL_WRD0,
178 PIO2_REGS_CTRL_WRD0,
179 PIO2_REGS_CTRL_WRD0,
180 PIO2_REGS_CTRL_WRD1,
181 PIO2_REGS_CTRL_WRD1,
182 PIO2_REGS_CTRL_WRD1 };
183
184#define PIO2_CNTR_SC_DEV0 0
185#define PIO2_CNTR_SC_DEV1 (1 << 6)
186#define PIO2_CNTR_SC_DEV2 (2 << 6)
187#define PIO2_CNTR_SC_RDBACK (3 << 6)
188
189static const int PIO2_CNTR_SC_DEV[6] = { PIO2_CNTR_SC_DEV0, PIO2_CNTR_SC_DEV1,
190 PIO2_CNTR_SC_DEV2, PIO2_CNTR_SC_DEV0,
191 PIO2_CNTR_SC_DEV1, PIO2_CNTR_SC_DEV2 };
192
193#define PIO2_CNTR_RW_LATCH 0
194#define PIO2_CNTR_RW_LSB (1 << 4)
195#define PIO2_CNTR_RW_MSB (2 << 4)
196#define PIO2_CNTR_RW_BOTH (3 << 4)
197
198#define PIO2_CNTR_MODE0 0
199#define PIO2_CNTR_MODE1 (1 << 1)
200#define PIO2_CNTR_MODE2 (2 << 1)
201#define PIO2_CNTR_MODE3 (3 << 1)
202#define PIO2_CNTR_MODE4 (4 << 1)
203#define PIO2_CNTR_MODE5 (5 << 1)
204
205#define PIO2_CNTR_BCD 1
206
207
208
209enum pio2_bank_config { NOFIT, INPUT, OUTPUT, BOTH };
210enum pio2_int_config { NONE = 0, LOW2HIGH = 1, HIGH2LOW = 2, EITHER = 4 };
211
212/* Bank configuration structure */
213struct pio2_io_bank {
214 enum pio2_bank_config config;
215 u8 value;
216 enum pio2_int_config irq[8];
217};
218
219/* Counter configuration structure */
220struct pio2_cntr {
221 int mode;
222 int count;
223};
224
225struct pio2_card {
226 int id;
227 int bus;
228 long base;
229 int irq_vector;
230 int irq_level;
231 char variant[6];
232 int led;
233
234 struct vme_dev *vdev;
235 struct vme_resource *window;
236
237 struct gpio_chip gc;
238 struct pio2_io_bank bank[4];
239
240 struct pio2_cntr cntr[6];
241};
242
243int pio2_cntr_reset(struct pio2_card *);
244
245int pio2_gpio_reset(struct pio2_card *);
246int __init pio2_gpio_init(struct pio2_card *);
247void __exit pio2_gpio_exit(struct pio2_card *);
248
249#endif /* _VME_PIO2_H_ */
diff --git a/drivers/staging/vme/devices/vme_pio2_cntr.c b/drivers/staging/vme/devices/vme_pio2_cntr.c
new file mode 100644
index 000000000000..08e0d59806ca
--- /dev/null
+++ b/drivers/staging/vme/devices/vme_pio2_cntr.c
@@ -0,0 +1,71 @@
1/*
2 * GE PIO2 Counter Driver
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * The PIO-2 has 6 counters, currently this code just disables the interrupts
13 * and leaves them alone.
14 *
15 */
16
17#include <linux/device.h>
18#include <linux/types.h>
19#include <linux/gpio.h>
20
21#include "../vme.h"
22#include "vme_pio2.h"
23
24static int pio2_cntr_irq_set(struct pio2_card *card, int id)
25{
26 int retval;
27 u8 data;
28
29 data = PIO2_CNTR_SC_DEV[id] | PIO2_CNTR_RW_BOTH | card->cntr[id].mode;
30 retval = vme_master_write(card->window, &data, 1, PIO2_CNTR_CTRL[id]);
31 if (retval < 0)
32 return retval;
33
34 data = card->cntr[id].count & 0xFF;
35 retval = vme_master_write(card->window, &data, 1, PIO2_CNTR_DATA[id]);
36 if (retval < 0)
37 return retval;
38
39 data = (card->cntr[id].count >> 8) & 0xFF;
40 retval = vme_master_write(card->window, &data, 1, PIO2_CNTR_DATA[id]);
41 if (retval < 0)
42 return retval;
43
44 return 0;
45}
46
47int pio2_cntr_reset(struct pio2_card *card)
48{
49 int i, retval = 0;
50 u8 reg;
51
52 /* Clear down all timers */
53 for (i = 0; i < 6; i++) {
54 card->cntr[i].mode = PIO2_CNTR_MODE5;
55 card->cntr[i].count = 0;
56 retval = pio2_cntr_irq_set(card, i);
57 if (retval < 0)
58 return retval;
59 }
60
61 /* Ensure all counter interrupts are cleared */
62 do {
63 retval = vme_master_read(card->window, &reg, 1,
64 PIO2_REGS_INT_STAT_CNTR);
65 if (retval < 0)
66 return retval;
67 } while (reg != 0);
68
69 return retval;
70}
71
diff --git a/drivers/staging/vme/devices/vme_pio2_core.c b/drivers/staging/vme/devices/vme_pio2_core.c
new file mode 100644
index 000000000000..9fedc442a779
--- /dev/null
+++ b/drivers/staging/vme/devices/vme_pio2_core.c
@@ -0,0 +1,524 @@
1/*
2 * GE PIO2 6U VME I/O Driver
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/version.h>
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/device.h>
20#include <linux/ctype.h>
21#include <linux/gpio.h>
22#include <linux/slab.h>
23
24#include "../vme.h"
25#include "vme_pio2.h"
26
27
28static const char driver_name[] = "pio2";
29
30static int bus[PIO2_CARDS_MAX];
31static int bus_num;
32static long base[PIO2_CARDS_MAX];
33static int base_num;
34static int vector[PIO2_CARDS_MAX];
35static int vector_num;
36static int level[PIO2_CARDS_MAX];
37static int level_num;
38static const char *variant[PIO2_CARDS_MAX];
39static int variant_num;
40
41static int loopback;
42
43static int pio2_match(struct vme_dev *);
44static int __devinit pio2_probe(struct vme_dev *);
45static int __devexit pio2_remove(struct vme_dev *);
46
47static int pio2_get_led(struct pio2_card *card)
48{
49 /* Can't read hardware, state saved in structure */
50 return card->led;
51}
52
53static int pio2_set_led(struct pio2_card *card, int state)
54{
55 u8 reg;
56 int retval;
57
58 reg = card->irq_level;
59
60 /* Register state inverse of led state */
61 if (!state)
62 reg |= PIO2_LED;
63
64 if (loopback)
65 reg |= PIO2_LOOP;
66
67 retval = vme_master_write(card->window, &reg, 1, PIO2_REGS_CTRL);
68 if (retval < 0)
69 return retval;
70
71 card->led = state ? 1 : 0;
72
73 return 0;
74}
75
76static void pio2_int(int level, int vector, void *ptr)
77{
78 int vec, i, channel, retval;
79 u8 reg;
80 struct pio2_card *card = ptr;
81
82 vec = vector & ~PIO2_VME_VECTOR_MASK;
83
84 switch (vec) {
85 case 0:
86 dev_warn(&card->vdev->dev, "Spurious Interrupt\n");
87 break;
88 case 1:
89 case 2:
90 case 3:
91 case 4:
92 /* Channels 0 to 7 */
93 retval = vme_master_read(card->window, &reg, 1,
94 PIO2_REGS_INT_STAT[vec - 1]);
95 if (retval < 0) {
96 dev_err(&card->vdev->dev,
97 "Unable to read IRQ status register\n");
98 return;
99 }
100 for (i = 0; i < 8; i++) {
101 channel = ((vec - 1) * 8) + i;
102 if (reg & PIO2_CHANNEL_BIT[channel])
103 dev_info(&card->vdev->dev,
104 "Interrupt on I/O channel %d\n",
105 channel);
106 }
107 break;
108 case 5:
109 case 6:
110 case 7:
111 case 8:
112 case 9:
113 case 10:
114 /* Counters are dealt with by their own handler */
115 dev_err(&card->vdev->dev,
116 "Counter interrupt\n");
117 break;
118 }
119}
120
121
122/*
123 * We return whether this has been successful - this is used in the probe to
124 * ensure we have a valid card.
125 */
126static int pio2_reset_card(struct pio2_card *card)
127{
128 int retval = 0;
129 u8 data = 0;
130
131 /* Clear main register*/
132 retval = vme_master_write(card->window, &data, 1, PIO2_REGS_CTRL);
133 if (retval < 0)
134 return retval;
135
136 /* Clear VME vector */
137 retval = vme_master_write(card->window, &data, 1, PIO2_REGS_VME_VECTOR);
138 if (retval < 0)
139 return retval;
140
141 /* Reset GPIO */
142 retval = pio2_gpio_reset(card);
143 if (retval < 0)
144 return retval;
145
146 /* Reset counters */
147 retval = pio2_cntr_reset(card);
148 if (retval < 0)
149 return retval;
150
151 return 0;
152}
153
154static struct vme_driver pio2_driver = {
155 .name = driver_name,
156 .match = pio2_match,
157 .probe = pio2_probe,
158 .remove = __devexit_p(pio2_remove),
159};
160
161
162static int __init pio2_init(void)
163{
164 int retval = 0;
165
166 if (bus_num == 0) {
167 printk(KERN_ERR "%s: No cards, skipping registration\n",
168 driver_name);
169 goto err_nocard;
170 }
171
172 if (bus_num > PIO2_CARDS_MAX) {
173 printk(KERN_ERR
174 "%s: Driver only able to handle %d PIO2 Cards\n",
175 driver_name, PIO2_CARDS_MAX);
176 bus_num = PIO2_CARDS_MAX;
177 }
178
179 /* Register the PIO2 driver */
180 retval = vme_register_driver(&pio2_driver, bus_num);
181 if (retval != 0)
182 goto err_reg;
183
184 return retval;
185
186err_reg:
187err_nocard:
188 return retval;
189}
190
191static int pio2_match(struct vme_dev *vdev)
192{
193
194 if (vdev->num >= bus_num) {
195 dev_err(&vdev->dev,
196 "The enumeration of the VMEbus to which the board is connected must be specified");
197 return 0;
198 }
199
200 if (vdev->num >= base_num) {
201 dev_err(&vdev->dev,
202 "The VME address for the cards registers must be specified");
203 return 0;
204 }
205
206 if (vdev->num >= vector_num) {
207 dev_err(&vdev->dev,
208 "The IRQ vector used by the card must be specified");
209 return 0;
210 }
211
212 if (vdev->num >= level_num) {
213 dev_err(&vdev->dev,
214 "The IRQ level used by the card must be specified");
215 return 0;
216 }
217
218 if (vdev->num >= variant_num) {
219 dev_err(&vdev->dev, "The variant of the card must be specified");
220 return 0;
221 }
222
223 return 1;
224}
225
226static int __devinit pio2_probe(struct vme_dev *vdev)
227{
228 struct pio2_card *card;
229 int retval;
230 int i;
231 u8 reg;
232 int vec;
233
234 card = kzalloc(sizeof(struct pio2_card), GFP_KERNEL);
235 if (card == NULL) {
236 dev_err(&vdev->dev, "Unable to allocate card structure\n");
237 retval = -ENOMEM;
238 goto err_struct;
239 }
240
241 card->id = vdev->num;
242 card->bus = bus[card->id];
243 card->base = base[card->id];
244 card->irq_vector = vector[card->id];
245 card->irq_level = level[card->id] & PIO2_VME_INT_MASK;
246 strncpy(card->variant, variant[card->id], PIO2_VARIANT_LENGTH);
247 card->vdev = vdev;
248
249 for (i = 0; i < PIO2_VARIANT_LENGTH; i++) {
250
251 if (isdigit(card->variant[i]) == 0) {
252 dev_err(&card->vdev->dev, "Variant invalid\n");
253 retval = -EINVAL;
254 goto err_variant;
255 }
256 }
257
258 /*
259 * Bottom 4 bits of VME interrupt vector used to determine source,
260 * provided vector should only use upper 4 bits.
261 */
262 if (card->irq_vector & ~PIO2_VME_VECTOR_MASK) {
263 dev_err(&card->vdev->dev,
264 "Invalid VME IRQ Vector, vector must not use lower 4 bits\n");
265 retval = -EINVAL;
266 goto err_vector;
267 }
268
269 /*
270 * There is no way to determine the build variant or whether each bank
271 * is input, output or both at run time. The inputs are also inverted
272 * if configured as both.
273 *
274 * We pass in the board variant and use that to determine the
275 * configuration of the banks.
276 */
277 for (i = 1; i < PIO2_VARIANT_LENGTH; i++) {
278 switch (card->variant[i]) {
279 case '0':
280 card->bank[i-1].config = NOFIT;
281 break;
282 case '1':
283 case '2':
284 case '3':
285 case '4':
286 card->bank[i-1].config = INPUT;
287 break;
288 case '5':
289 card->bank[i-1].config = OUTPUT;
290 break;
291 case '6':
292 case '7':
293 case '8':
294 case '9':
295 card->bank[i-1].config = BOTH;
296 break;
297 }
298 }
299
300 /* Get a master window and position over regs */
301 card->window = vme_master_request(vdev, VME_A24, VME_SCT, VME_D16);
302 if (card->window == NULL) {
303 dev_err(&card->vdev->dev,
304 "Unable to assign VME master resource\n");
305 retval = -EIO;
306 goto err_window;
307 }
308
309 retval = vme_master_set(card->window, 1, card->base, 0x10000, VME_A24,
310 (VME_SCT | VME_USER | VME_DATA), VME_D16);
311 if (retval) {
312 dev_err(&card->vdev->dev,
313 "Unable to configure VME master resource\n");
314 goto err_set;
315 }
316
317 /*
318 * There is also no obvious register which we can probe to determine
319 * whether the provided base is valid. If we can read the "ID Register"
320 * offset and the reset function doesn't error, assume we have a valid
321 * location.
322 */
323 retval = vme_master_read(card->window, &reg, 1, PIO2_REGS_ID);
324 if (retval < 0) {
325 dev_err(&card->vdev->dev, "Unable to read from device\n");
326 goto err_read;
327 }
328
329 dev_dbg(&card->vdev->dev, "ID Register:%x\n", reg);
330
331 /*
332 * Ensure all the I/O is cleared. We can't read back the states, so
333 * this is the only method we have to ensure that the I/O is in a known
334 * state.
335 */
336 retval = pio2_reset_card(card);
337 if (retval) {
338 dev_err(&card->vdev->dev,
339 "Failed to reset card, is location valid?");
340 retval = -ENODEV;
341 goto err_reset;
342 }
343
344 /* Configure VME Interrupts */
345 reg = card->irq_level;
346 if (pio2_get_led(card))
347 reg |= PIO2_LED;
348 if (loopback)
349 reg |= PIO2_LOOP;
350 retval = vme_master_write(card->window, &reg, 1, PIO2_REGS_CTRL);
351 if (retval < 0)
352 return retval;
353
354 /* Set VME vector */
355 retval = vme_master_write(card->window, &card->irq_vector, 1,
356 PIO2_REGS_VME_VECTOR);
357 if (retval < 0)
358 return retval;
359
360 /* Attach spurious interrupt handler. */
361 vec = card->irq_vector | PIO2_VME_VECTOR_SPUR;
362
363 retval = vme_irq_request(vdev, card->irq_level, vec,
364 &pio2_int, (void *)card);
365 if (retval < 0) {
366 dev_err(&card->vdev->dev,
367 "Unable to attach VME interrupt vector0x%x, level 0x%x\n",
368 vec, card->irq_level);
369 goto err_irq;
370 }
371
372 /* Attach GPIO interrupt handlers. */
373 for (i = 0; i < 4; i++) {
374 vec = card->irq_vector | PIO2_VECTOR_BANK[i];
375
376 retval = vme_irq_request(vdev, card->irq_level, vec,
377 &pio2_int, (void *)card);
378 if (retval < 0) {
379 dev_err(&card->vdev->dev,
380 "Unable to attach VME interrupt vector0x%x, level 0x%x\n",
381 vec, card->irq_level);
382 goto err_gpio_irq;
383 }
384 }
385
386 /* Attach counter interrupt handlers. */
387 for (i = 0; i < 6; i++) {
388 vec = card->irq_vector | PIO2_VECTOR_CNTR[i];
389
390 retval = vme_irq_request(vdev, card->irq_level, vec,
391 &pio2_int, (void *)card);
392 if (retval < 0) {
393 dev_err(&card->vdev->dev,
394 "Unable to attach VME interrupt vector0x%x, level 0x%x\n",
395 vec, card->irq_level);
396 goto err_cntr_irq;
397 }
398 }
399
400 /* Register IO */
401 retval = pio2_gpio_init(card);
402 if (retval < 0) {
403 dev_err(&card->vdev->dev,
404 "Unable to register with GPIO framework\n");
405 goto err_gpio;
406 }
407
408 /* Set LED - This also sets interrupt level */
409 retval = pio2_set_led(card, 0);
410 if (retval < 0) {
411 dev_err(&card->vdev->dev, "Unable to set LED\n");
412 goto err_led;
413 }
414
415 dev_set_drvdata(&card->vdev->dev, card);
416
417 dev_info(&card->vdev->dev,
418 "PIO2 (variant %s) configured at 0x%lx\n", card->variant,
419 card->base);
420
421 return 0;
422
423err_led:
424 pio2_gpio_exit(card);
425err_gpio:
426 i = 6;
427err_cntr_irq:
428 while (i > 0) {
429 i--;
430 vec = card->irq_vector | PIO2_VECTOR_CNTR[i];
431 vme_irq_free(vdev, card->irq_level, vec);
432 }
433
434 i = 4;
435err_gpio_irq:
436 while (i > 0) {
437 i--;
438 vec = card->irq_vector | PIO2_VECTOR_BANK[i];
439 vme_irq_free(vdev, card->irq_level, vec);
440 }
441
442 vec = (card->irq_vector & PIO2_VME_VECTOR_MASK) | PIO2_VME_VECTOR_SPUR;
443 vme_irq_free(vdev, card->irq_level, vec);
444err_irq:
445 pio2_reset_card(card);
446err_reset:
447err_read:
448 vme_master_set(card->window, 0, 0, 0, VME_A16, 0, VME_D16);
449err_set:
450 vme_master_free(card->window);
451err_window:
452err_vector:
453err_variant:
454 kfree(card);
455err_struct:
456 return retval;
457}
458
459static int __devexit pio2_remove(struct vme_dev *vdev)
460{
461 int vec;
462 int i;
463
464 struct pio2_card *card = dev_get_drvdata(&vdev->dev);
465
466 pio2_gpio_exit(card);
467
468 for (i = 0; i < 6; i++) {
469 vec = card->irq_vector | PIO2_VECTOR_CNTR[i];
470 vme_irq_free(vdev, card->irq_level, vec);
471 }
472
473 for (i = 0; i < 4; i++) {
474 vec = card->irq_vector | PIO2_VECTOR_BANK[i];
475 vme_irq_free(vdev, card->irq_level, vec);
476 }
477
478 vec = (card->irq_vector & PIO2_VME_VECTOR_MASK) | PIO2_VME_VECTOR_SPUR;
479 vme_irq_free(vdev, card->irq_level, vec);
480
481 pio2_reset_card(card);
482
483 vme_master_set(card->window, 0, 0, 0, VME_A16, 0, VME_D16);
484
485 vme_master_free(card->window);
486
487 kfree(card);
488
489 return 0;
490}
491
492static void __exit pio2_exit(void)
493{
494 vme_unregister_driver(&pio2_driver);
495}
496
497
498/* These are required for each board */
499MODULE_PARM_DESC(bus, "Enumeration of VMEbus to which the board is connected");
500module_param_array(bus, int, &bus_num, S_IRUGO);
501
502MODULE_PARM_DESC(base, "Base VME address for PIO2 Registers");
503module_param_array(base, long, &base_num, S_IRUGO);
504
505MODULE_PARM_DESC(vector, "VME IRQ Vector (Lower 4 bits masked)");
506module_param_array(vector, int, &vector_num, S_IRUGO);
507
508MODULE_PARM_DESC(level, "VME IRQ Level");
509module_param_array(level, int, &level_num, S_IRUGO);
510
511MODULE_PARM_DESC(variant, "Last 4 characters of PIO2 board variant");
512module_param_array(variant, charp, &variant_num, S_IRUGO);
513
514/* This is for debugging */
515MODULE_PARM_DESC(loopback, "Enable loopback mode on all cards");
516module_param(loopback, bool, S_IRUGO);
517
518MODULE_DESCRIPTION("GE PIO2 6U VME I/O Driver");
519MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
520MODULE_LICENSE("GPL");
521
522module_init(pio2_init);
523module_exit(pio2_exit);
524
diff --git a/drivers/staging/vme/devices/vme_pio2_gpio.c b/drivers/staging/vme/devices/vme_pio2_gpio.c
new file mode 100644
index 000000000000..dc837deb99dd
--- /dev/null
+++ b/drivers/staging/vme/devices/vme_pio2_gpio.c
@@ -0,0 +1,232 @@
1/*
2 * GE PIO2 GPIO Driver
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/version.h>
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/device.h>
20#include <linux/platform_device.h>
21#include <linux/ctype.h>
22#include <linux/gpio.h>
23#include <linux/slab.h>
24
25#include "../vme.h"
26#include "vme_pio2.h"
27
28static const char driver_name[] = "pio2_gpio";
29
30static struct pio2_card *gpio_to_pio2_card(struct gpio_chip *chip)
31{
32 return container_of(chip, struct pio2_card, gc);
33}
34
35static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset)
36{
37 u8 reg;
38 int retval;
39 struct pio2_card *card = gpio_to_pio2_card(chip);
40
41 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
42 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
43
44 dev_err(&card->vdev->dev, "Channel not available as input\n");
45 return 0;
46 }
47
48 retval = vme_master_read(card->window, &reg, 1,
49 PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
50 if (retval < 0) {
51 dev_err(&card->vdev->dev, "Unable to read from GPIO\n");
52 return 0;
53 }
54
55 /*
56 * Remember, input on channels configured as both input and output
57 * are inverted!
58 */
59 if (reg & PIO2_CHANNEL_BIT[offset]) {
60 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH)
61 return 0;
62 else
63 return 1;
64 } else {
65 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH)
66 return 1;
67 else
68 return 0;
69 }
70}
71
72static void pio2_gpio_set(struct gpio_chip *chip, unsigned int offset,
73 int value)
74{
75 u8 reg;
76 int retval;
77 struct pio2_card *card = gpio_to_pio2_card(chip);
78
79 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
80 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
81
82 dev_err(&card->vdev->dev, "Channel not availabe as output\n");
83 return;
84 }
85
86 if (value)
87 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value |
88 PIO2_CHANNEL_BIT[offset];
89 else
90 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value &
91 ~PIO2_CHANNEL_BIT[offset];
92
93 retval = vme_master_write(card->window, &reg, 1,
94 PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
95 if (retval < 0) {
96 dev_err(&card->vdev->dev, "Unable to write to GPIO\n");
97 return;
98 }
99
100 card->bank[PIO2_CHANNEL_BANK[offset]].value = reg;
101}
102
103/* Directionality configured at board build - send appropriate response */
104static int pio2_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
105{
106 int data;
107 struct pio2_card *card = gpio_to_pio2_card(chip);
108
109 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
110 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
111 dev_err(&card->vdev->dev,
112 "Channel directionality not configurable at runtine\n");
113
114 data = -EINVAL;
115 } else {
116 data = 0;
117 }
118
119 return data;
120}
121
122/* Directionality configured at board build - send appropriate response */
123static int pio2_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
124{
125 int data;
126 struct pio2_card *card = gpio_to_pio2_card(chip);
127
128 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
129 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
130 dev_err(&card->vdev->dev,
131 "Channel directionality not configurable at runtine\n");
132
133 data = -EINVAL;
134 } else {
135 data = 0;
136 }
137
138 return data;
139}
140
141/*
142 * We return whether this has been successful - this is used in the probe to
143 * ensure we have a valid card.
144 */
145int pio2_gpio_reset(struct pio2_card *card)
146{
147 int retval = 0;
148 int i, j;
149
150 u8 data = 0;
151
152 /* Zero output registers */
153 for (i = 0; i < 4; i++) {
154 retval = vme_master_write(card->window, &data, 1,
155 PIO2_REGS_DATA[i]);
156 if (retval < 0)
157 return retval;
158 card->bank[i].value = 0;
159 }
160
161 /* Set input interrupt masks */
162 for (i = 0; i < 4; i++) {
163 retval = vme_master_write(card->window, &data, 1,
164 PIO2_REGS_INT_MASK[i * 2]);
165 if (retval < 0)
166 return retval;
167
168 retval = vme_master_write(card->window, &data, 1,
169 PIO2_REGS_INT_MASK[(i * 2) + 1]);
170 if (retval < 0)
171 return retval;
172
173 for (j = 0; j < 8; j++)
174 card->bank[i].irq[j] = NONE;
175 }
176
177 /* Ensure all I/O interrupts are cleared */
178 for (i = 0; i < 4; i++) {
179 do {
180 retval = vme_master_read(card->window, &data, 1,
181 PIO2_REGS_INT_STAT[i]);
182 if (retval < 0)
183 return retval;
184 } while (data != 0);
185 }
186
187 return 0;
188}
189
190int __init pio2_gpio_init(struct pio2_card *card)
191{
192 int retval = 0;
193 char *label;
194
195 label = kmalloc(PIO2_NUM_CHANNELS, GFP_KERNEL);
196 if (label == NULL) {
197 dev_err(&card->vdev->dev, "Unable to allocate GPIO label\n");
198 return -ENOMEM;
199 }
200
201 sprintf(label, "%s@%s", driver_name, dev_name(&card->vdev->dev));
202 card->gc.label = label;
203
204 card->gc.ngpio = PIO2_NUM_CHANNELS;
205 /* Dynamic allocation of base */
206 card->gc.base = -1;
207 /* Setup pointers to chip functions */
208 card->gc.direction_input = pio2_gpio_dir_in;
209 card->gc.direction_output = pio2_gpio_dir_out;
210 card->gc.get = pio2_gpio_get;
211 card->gc.set = pio2_gpio_set;
212
213 /* This function adds a memory mapped GPIO chip */
214 retval = gpiochip_add(&(card->gc));
215 if (retval) {
216 dev_err(&card->vdev->dev, "Unable to register GPIO\n");
217 kfree(card->gc.label);
218 }
219
220 return retval;
221};
222
223void __exit pio2_gpio_exit(struct pio2_card *card)
224{
225 const char *label = card->gc.label;
226
227 if (gpiochip_remove(&(card->gc)))
228 dev_err(&card->vdev->dev, "Failed to remove GPIO");
229
230 kfree(label);
231}
232
diff --git a/drivers/staging/vme/devices/vme_user.h b/drivers/staging/vme/devices/vme_user.h
index d85a1e9dbe3a..7d24cd6343e4 100644
--- a/drivers/staging/vme/devices/vme_user.h
+++ b/drivers/staging/vme/devices/vme_user.h
@@ -10,9 +10,9 @@ struct vme_master {
10 int enable; /* State of Window */ 10 int enable; /* State of Window */
11 unsigned long long vme_addr; /* Starting Address on the VMEbus */ 11 unsigned long long vme_addr; /* Starting Address on the VMEbus */
12 unsigned long long size; /* Window Size */ 12 unsigned long long size; /* Window Size */
13 vme_address_t aspace; /* Address Space */ 13 u32 aspace; /* Address Space */
14 vme_cycle_t cycle; /* Cycle properties */ 14 u32 cycle; /* Cycle properties */
15 vme_width_t dwidth; /* Maximum Data Width */ 15 u32 dwidth; /* Maximum Data Width */
16#if 0 16#if 0
17 char prefetchEnable; /* Prefetch Read Enable State */ 17 char prefetchEnable; /* Prefetch Read Enable State */
18 int prefetchSize; /* Prefetch Read Size (Cache Lines) */ 18 int prefetchSize; /* Prefetch Read Size (Cache Lines) */
@@ -34,8 +34,8 @@ struct vme_slave {
34 int enable; /* State of Window */ 34 int enable; /* State of Window */
35 unsigned long long vme_addr; /* Starting Address on the VMEbus */ 35 unsigned long long vme_addr; /* Starting Address on the VMEbus */
36 unsigned long long size; /* Window Size */ 36 unsigned long long size; /* Window Size */
37 vme_address_t aspace; /* Address Space */ 37 u32 aspace; /* Address Space */
38 vme_cycle_t cycle; /* Cycle properties */ 38 u32 cycle; /* Cycle properties */
39#if 0 39#if 0
40 char wrPostEnable; /* Write Post State */ 40 char wrPostEnable; /* Write Post State */
41 char rmwLock; /* Lock PCI during RMW Cycles */ 41 char rmwLock; /* Lock PCI during RMW Cycles */
diff --git a/drivers/staging/vme/vme.c b/drivers/staging/vme/vme.c
index b04b4688f705..70722ae52321 100644
--- a/drivers/staging/vme/vme.c
+++ b/drivers/staging/vme/vme.c
@@ -153,9 +153,7 @@ size_t vme_get_size(struct vme_resource *resource)
153 int enabled, retval; 153 int enabled, retval;
154 unsigned long long base, size; 154 unsigned long long base, size;
155 dma_addr_t buf_base; 155 dma_addr_t buf_base;
156 vme_address_t aspace; 156 u32 aspace, cycle, dwidth;
157 vme_cycle_t cycle;
158 vme_width_t dwidth;
159 157
160 switch (resource->type) { 158 switch (resource->type) {
161 case VME_MASTER: 159 case VME_MASTER:
@@ -181,7 +179,7 @@ size_t vme_get_size(struct vme_resource *resource)
181} 179}
182EXPORT_SYMBOL(vme_get_size); 180EXPORT_SYMBOL(vme_get_size);
183 181
184static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, 182static int vme_check_window(u32 aspace, unsigned long long vme_base,
185 unsigned long long size) 183 unsigned long long size)
186{ 184{
187 int retval = 0; 185 int retval = 0;
@@ -232,8 +230,8 @@ static int vme_check_window(vme_address_t aspace, unsigned long long vme_base,
232 * Request a slave image with specific attributes, return some unique 230 * Request a slave image with specific attributes, return some unique
233 * identifier. 231 * identifier.
234 */ 232 */
235struct vme_resource *vme_slave_request(struct vme_dev *vdev, 233struct vme_resource *vme_slave_request(struct vme_dev *vdev, u32 address,
236 vme_address_t address, vme_cycle_t cycle) 234 u32 cycle)
237{ 235{
238 struct vme_bridge *bridge; 236 struct vme_bridge *bridge;
239 struct list_head *slave_pos = NULL; 237 struct list_head *slave_pos = NULL;
@@ -298,7 +296,7 @@ EXPORT_SYMBOL(vme_slave_request);
298 296
299int vme_slave_set(struct vme_resource *resource, int enabled, 297int vme_slave_set(struct vme_resource *resource, int enabled,
300 unsigned long long vme_base, unsigned long long size, 298 unsigned long long vme_base, unsigned long long size,
301 dma_addr_t buf_base, vme_address_t aspace, vme_cycle_t cycle) 299 dma_addr_t buf_base, u32 aspace, u32 cycle)
302{ 300{
303 struct vme_bridge *bridge = find_bridge(resource); 301 struct vme_bridge *bridge = find_bridge(resource);
304 struct vme_slave_resource *image; 302 struct vme_slave_resource *image;
@@ -333,7 +331,7 @@ EXPORT_SYMBOL(vme_slave_set);
333 331
334int vme_slave_get(struct vme_resource *resource, int *enabled, 332int vme_slave_get(struct vme_resource *resource, int *enabled,
335 unsigned long long *vme_base, unsigned long long *size, 333 unsigned long long *vme_base, unsigned long long *size,
336 dma_addr_t *buf_base, vme_address_t *aspace, vme_cycle_t *cycle) 334 dma_addr_t *buf_base, u32 *aspace, u32 *cycle)
337{ 335{
338 struct vme_bridge *bridge = find_bridge(resource); 336 struct vme_bridge *bridge = find_bridge(resource);
339 struct vme_slave_resource *image; 337 struct vme_slave_resource *image;
@@ -388,8 +386,8 @@ EXPORT_SYMBOL(vme_slave_free);
388 * Request a master image with specific attributes, return some unique 386 * Request a master image with specific attributes, return some unique
389 * identifier. 387 * identifier.
390 */ 388 */
391struct vme_resource *vme_master_request(struct vme_dev *vdev, 389struct vme_resource *vme_master_request(struct vme_dev *vdev, u32 address,
392 vme_address_t address, vme_cycle_t cycle, vme_width_t dwidth) 390 u32 cycle, u32 dwidth)
393{ 391{
394 struct vme_bridge *bridge; 392 struct vme_bridge *bridge;
395 struct list_head *master_pos = NULL; 393 struct list_head *master_pos = NULL;
@@ -456,8 +454,8 @@ err_bus:
456EXPORT_SYMBOL(vme_master_request); 454EXPORT_SYMBOL(vme_master_request);
457 455
458int vme_master_set(struct vme_resource *resource, int enabled, 456int vme_master_set(struct vme_resource *resource, int enabled,
459 unsigned long long vme_base, unsigned long long size, 457 unsigned long long vme_base, unsigned long long size, u32 aspace,
460 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 458 u32 cycle, u32 dwidth)
461{ 459{
462 struct vme_bridge *bridge = find_bridge(resource); 460 struct vme_bridge *bridge = find_bridge(resource);
463 struct vme_master_resource *image; 461 struct vme_master_resource *image;
@@ -492,8 +490,8 @@ int vme_master_set(struct vme_resource *resource, int enabled,
492EXPORT_SYMBOL(vme_master_set); 490EXPORT_SYMBOL(vme_master_set);
493 491
494int vme_master_get(struct vme_resource *resource, int *enabled, 492int vme_master_get(struct vme_resource *resource, int *enabled,
495 unsigned long long *vme_base, unsigned long long *size, 493 unsigned long long *vme_base, unsigned long long *size, u32 *aspace,
496 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) 494 u32 *cycle, u32 *dwidth)
497{ 495{
498 struct vme_bridge *bridge = find_bridge(resource); 496 struct vme_bridge *bridge = find_bridge(resource);
499 struct vme_master_resource *image; 497 struct vme_master_resource *image;
@@ -646,8 +644,7 @@ EXPORT_SYMBOL(vme_master_free);
646 * Request a DMA controller with specific attributes, return some unique 644 * Request a DMA controller with specific attributes, return some unique
647 * identifier. 645 * identifier.
648 */ 646 */
649struct vme_resource *vme_dma_request(struct vme_dev *vdev, 647struct vme_resource *vme_dma_request(struct vme_dev *vdev, u32 route)
650 vme_dma_route_t route)
651{ 648{
652 struct vme_bridge *bridge; 649 struct vme_bridge *bridge;
653 struct list_head *dma_pos = NULL; 650 struct list_head *dma_pos = NULL;
@@ -743,8 +740,7 @@ EXPORT_SYMBOL(vme_new_dma_list);
743/* 740/*
744 * Create "Pattern" type attributes 741 * Create "Pattern" type attributes
745 */ 742 */
746struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, 743struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, u32 type)
747 vme_pattern_t type)
748{ 744{
749 struct vme_dma_attr *attributes; 745 struct vme_dma_attr *attributes;
750 struct vme_dma_pattern *pattern_attr; 746 struct vme_dma_pattern *pattern_attr;
@@ -822,7 +818,7 @@ EXPORT_SYMBOL(vme_dma_pci_attribute);
822 * Create "VME" type attributes 818 * Create "VME" type attributes
823 */ 819 */
824struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long address, 820struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long address,
825 vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) 821 u32 aspace, u32 cycle, u32 dwidth)
826{ 822{
827 struct vme_dma_attr *attributes; 823 struct vme_dma_attr *attributes;
828 struct vme_dma_vme *vme_attr; 824 struct vme_dma_vme *vme_attr;
@@ -1173,7 +1169,7 @@ int vme_lm_count(struct vme_resource *resource)
1173EXPORT_SYMBOL(vme_lm_count); 1169EXPORT_SYMBOL(vme_lm_count);
1174 1170
1175int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, 1171int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base,
1176 vme_address_t aspace, vme_cycle_t cycle) 1172 u32 aspace, u32 cycle)
1177{ 1173{
1178 struct vme_bridge *bridge = find_bridge(resource); 1174 struct vme_bridge *bridge = find_bridge(resource);
1179 struct vme_lm_resource *lm; 1175 struct vme_lm_resource *lm;
@@ -1195,7 +1191,7 @@ int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base,
1195EXPORT_SYMBOL(vme_lm_set); 1191EXPORT_SYMBOL(vme_lm_set);
1196 1192
1197int vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base, 1193int vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base,
1198 vme_address_t *aspace, vme_cycle_t *cycle) 1194 u32 *aspace, u32 *cycle)
1199{ 1195{
1200 struct vme_bridge *bridge = find_bridge(resource); 1196 struct vme_bridge *bridge = find_bridge(resource);
1201 struct vme_lm_resource *lm; 1197 struct vme_lm_resource *lm;
@@ -1307,7 +1303,12 @@ EXPORT_SYMBOL(vme_slot_get);
1307 1303
1308/* - Bridge Registration --------------------------------------------------- */ 1304/* - Bridge Registration --------------------------------------------------- */
1309 1305
1310static int vme_add_bus(struct vme_bridge *bridge) 1306static void vme_dev_release(struct device *dev)
1307{
1308 kfree(dev_to_vme_dev(dev));
1309}
1310
1311int vme_register_bridge(struct vme_bridge *bridge)
1311{ 1312{
1312 int i; 1313 int i;
1313 int ret = -1; 1314 int ret = -1;
@@ -1327,8 +1328,9 @@ static int vme_add_bus(struct vme_bridge *bridge)
1327 1328
1328 return ret; 1329 return ret;
1329} 1330}
1331EXPORT_SYMBOL(vme_register_bridge);
1330 1332
1331static void vme_remove_bus(struct vme_bridge *bridge) 1333void vme_unregister_bridge(struct vme_bridge *bridge)
1332{ 1334{
1333 struct vme_dev *vdev; 1335 struct vme_dev *vdev;
1334 struct vme_dev *tmp; 1336 struct vme_dev *tmp;
@@ -1343,22 +1345,6 @@ static void vme_remove_bus(struct vme_bridge *bridge)
1343 list_del(&bridge->bus_list); 1345 list_del(&bridge->bus_list);
1344 mutex_unlock(&vme_buses_lock); 1346 mutex_unlock(&vme_buses_lock);
1345} 1347}
1346
1347static void vme_dev_release(struct device *dev)
1348{
1349 kfree(dev_to_vme_dev(dev));
1350}
1351
1352int vme_register_bridge(struct vme_bridge *bridge)
1353{
1354 return vme_add_bus(bridge);
1355}
1356EXPORT_SYMBOL(vme_register_bridge);
1357
1358void vme_unregister_bridge(struct vme_bridge *bridge)
1359{
1360 vme_remove_bus(bridge);
1361}
1362EXPORT_SYMBOL(vme_unregister_bridge); 1348EXPORT_SYMBOL(vme_unregister_bridge);
1363 1349
1364/* - Driver Registration --------------------------------------------------- */ 1350/* - Driver Registration --------------------------------------------------- */
@@ -1421,10 +1407,7 @@ static int __vme_register_driver(struct vme_driver *drv, unsigned int ndevs)
1421 * and if the bridge is removed, it will have to go through 1407 * and if the bridge is removed, it will have to go through
1422 * vme_unregister_bridge() to do it (which calls remove() on 1408 * vme_unregister_bridge() to do it (which calls remove() on
1423 * the bridge which in turn tries to acquire vme_buses_lock and 1409 * the bridge which in turn tries to acquire vme_buses_lock and
1424 * will have to wait). The probe() called after device 1410 * will have to wait).
1425 * registration in __vme_register_driver below will also fail
1426 * as the bridge is being removed (since the probe() calls
1427 * vme_bridge_get()).
1428 */ 1411 */
1429 err = __vme_register_driver_bus(drv, bridge, ndevs); 1412 err = __vme_register_driver_bus(drv, bridge, ndevs);
1430 if (err) 1413 if (err)
diff --git a/drivers/staging/vme/vme.h b/drivers/staging/vme/vme.h
index e3828badca61..9d38ceed60e2 100644
--- a/drivers/staging/vme/vme.h
+++ b/drivers/staging/vme/vme.h
@@ -10,7 +10,6 @@ enum vme_resource_type {
10}; 10};
11 11
12/* VME Address Spaces */ 12/* VME Address Spaces */
13typedef u32 vme_address_t;
14#define VME_A16 0x1 13#define VME_A16 0x1
15#define VME_A24 0x2 14#define VME_A24 0x2
16#define VME_A32 0x4 15#define VME_A32 0x4
@@ -29,7 +28,6 @@ typedef u32 vme_address_t;
29 28
30 29
31/* VME Cycle Types */ 30/* VME Cycle Types */
32typedef u32 vme_cycle_t;
33#define VME_SCT 0x1 31#define VME_SCT 0x1
34#define VME_BLT 0x2 32#define VME_BLT 0x2
35#define VME_MBLT 0x4 33#define VME_MBLT 0x4
@@ -47,28 +45,23 @@ typedef u32 vme_cycle_t;
47#define VME_DATA 0x8000 45#define VME_DATA 0x8000
48 46
49/* VME Data Widths */ 47/* VME Data Widths */
50typedef u32 vme_width_t;
51#define VME_D8 0x1 48#define VME_D8 0x1
52#define VME_D16 0x2 49#define VME_D16 0x2
53#define VME_D32 0x4 50#define VME_D32 0x4
54#define VME_D64 0x8 51#define VME_D64 0x8
55 52
56/* Arbitration Scheduling Modes */ 53/* Arbitration Scheduling Modes */
57typedef u32 vme_arbitration_t;
58#define VME_R_ROBIN_MODE 0x1 54#define VME_R_ROBIN_MODE 0x1
59#define VME_PRIORITY_MODE 0x2 55#define VME_PRIORITY_MODE 0x2
60 56
61typedef u32 vme_dma_t;
62#define VME_DMA_PATTERN (1<<0) 57#define VME_DMA_PATTERN (1<<0)
63#define VME_DMA_PCI (1<<1) 58#define VME_DMA_PCI (1<<1)
64#define VME_DMA_VME (1<<2) 59#define VME_DMA_VME (1<<2)
65 60
66typedef u32 vme_pattern_t;
67#define VME_DMA_PATTERN_BYTE (1<<0) 61#define VME_DMA_PATTERN_BYTE (1<<0)
68#define VME_DMA_PATTERN_WORD (1<<1) 62#define VME_DMA_PATTERN_WORD (1<<1)
69#define VME_DMA_PATTERN_INCREMENT (1<<2) 63#define VME_DMA_PATTERN_INCREMENT (1<<2)
70 64
71typedef u32 vme_dma_route_t;
72#define VME_DMA_VME_TO_MEM (1<<0) 65#define VME_DMA_VME_TO_MEM (1<<0)
73#define VME_DMA_MEM_TO_VME (1<<1) 66#define VME_DMA_MEM_TO_VME (1<<1)
74#define VME_DMA_VME_TO_VME (1<<2) 67#define VME_DMA_VME_TO_VME (1<<2)
@@ -77,7 +70,7 @@ typedef u32 vme_dma_route_t;
77#define VME_DMA_PATTERN_TO_MEM (1<<5) 70#define VME_DMA_PATTERN_TO_MEM (1<<5)
78 71
79struct vme_dma_attr { 72struct vme_dma_attr {
80 vme_dma_t type; 73 u32 type;
81 void *private; 74 void *private;
82}; 75};
83 76
@@ -97,7 +90,7 @@ extern struct bus_type vme_bus_type;
97 90
98/** 91/**
99 * Structure representing a VME device 92 * Structure representing a VME device
100 * @id: The ID of the device (currently the bus and slot number) 93 * @num: The device number
101 * @bridge: Pointer to the bridge device this device is on 94 * @bridge: Pointer to the bridge device this device is on
102 * @dev: Internal device structure 95 * @dev: Internal device structure
103 * @drv_list: List of devices (per driver) 96 * @drv_list: List of devices (per driver)
@@ -128,32 +121,29 @@ void vme_free_consistent(struct vme_resource *, size_t, void *,
128 121
129size_t vme_get_size(struct vme_resource *); 122size_t vme_get_size(struct vme_resource *);
130 123
131struct vme_resource *vme_slave_request(struct vme_dev *, vme_address_t, 124struct vme_resource *vme_slave_request(struct vme_dev *, u32, u32);
132 vme_cycle_t);
133int vme_slave_set(struct vme_resource *, int, unsigned long long, 125int vme_slave_set(struct vme_resource *, int, unsigned long long,
134 unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); 126 unsigned long long, dma_addr_t, u32, u32);
135int vme_slave_get(struct vme_resource *, int *, unsigned long long *, 127int vme_slave_get(struct vme_resource *, int *, unsigned long long *,
136 unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *); 128 unsigned long long *, dma_addr_t *, u32 *, u32 *);
137void vme_slave_free(struct vme_resource *); 129void vme_slave_free(struct vme_resource *);
138 130
139struct vme_resource *vme_master_request(struct vme_dev *, vme_address_t, 131struct vme_resource *vme_master_request(struct vme_dev *, u32, u32, u32);
140 vme_cycle_t, vme_width_t);
141int vme_master_set(struct vme_resource *, int, unsigned long long, 132int vme_master_set(struct vme_resource *, int, unsigned long long,
142 unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); 133 unsigned long long, u32, u32, u32);
143int vme_master_get(struct vme_resource *, int *, unsigned long long *, 134int vme_master_get(struct vme_resource *, int *, unsigned long long *,
144 unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *); 135 unsigned long long *, u32 *, u32 *, u32 *);
145ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t); 136ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t);
146ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t); 137ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t);
147unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int, 138unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int,
148 unsigned int, loff_t); 139 unsigned int, loff_t);
149void vme_master_free(struct vme_resource *); 140void vme_master_free(struct vme_resource *);
150 141
151struct vme_resource *vme_dma_request(struct vme_dev *, vme_dma_route_t); 142struct vme_resource *vme_dma_request(struct vme_dev *, u32);
152struct vme_dma_list *vme_new_dma_list(struct vme_resource *); 143struct vme_dma_list *vme_new_dma_list(struct vme_resource *);
153struct vme_dma_attr *vme_dma_pattern_attribute(u32, vme_pattern_t); 144struct vme_dma_attr *vme_dma_pattern_attribute(u32, u32);
154struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t); 145struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t);
155struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, vme_address_t, 146struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, u32, u32, u32);
156 vme_cycle_t, vme_width_t);
157void vme_dma_free_attribute(struct vme_dma_attr *); 147void vme_dma_free_attribute(struct vme_dma_attr *);
158int vme_dma_list_add(struct vme_dma_list *, struct vme_dma_attr *, 148int vme_dma_list_add(struct vme_dma_list *, struct vme_dma_attr *,
159 struct vme_dma_attr *, size_t); 149 struct vme_dma_attr *, size_t);
@@ -168,10 +158,8 @@ int vme_irq_generate(struct vme_dev *, int, int);
168 158
169struct vme_resource * vme_lm_request(struct vme_dev *); 159struct vme_resource * vme_lm_request(struct vme_dev *);
170int vme_lm_count(struct vme_resource *); 160int vme_lm_count(struct vme_resource *);
171int vme_lm_set(struct vme_resource *, unsigned long long, vme_address_t, 161int vme_lm_set(struct vme_resource *, unsigned long long, u32, u32);
172 vme_cycle_t); 162int vme_lm_get(struct vme_resource *, unsigned long long *, u32 *, u32 *);
173int vme_lm_get(struct vme_resource *, unsigned long long *, vme_address_t *,
174 vme_cycle_t *);
175int vme_lm_attach(struct vme_resource *, int, void (*callback)(int)); 163int vme_lm_attach(struct vme_resource *, int, void (*callback)(int));
176int vme_lm_detach(struct vme_resource *, int); 164int vme_lm_detach(struct vme_resource *, int);
177void vme_lm_free(struct vme_resource *); 165void vme_lm_free(struct vme_resource *);
diff --git a/drivers/staging/vme/vme_api.txt b/drivers/staging/vme/vme_api.txt
index e8ff2151a487..856efa35f6e3 100644
--- a/drivers/staging/vme/vme_api.txt
+++ b/drivers/staging/vme/vme_api.txt
@@ -86,26 +86,26 @@ driver allows a resource to be assigned based on the required attributes of the
86driver in question: 86driver in question:
87 87
88 struct vme_resource * vme_master_request(struct vme_dev *dev, 88 struct vme_resource * vme_master_request(struct vme_dev *dev,
89 vme_address_t aspace, vme_cycle_t cycle, vme_width_t width); 89 u32 aspace, u32 cycle, u32 width);
90 90
91 struct vme_resource * vme_slave_request(struct vme_dev *dev, 91 struct vme_resource * vme_slave_request(struct vme_dev *dev, u32 aspace,
92 vme_address_t aspace, vme_cycle_t cycle); 92 u32 cycle);
93 93
94 struct vme_resource *vme_dma_request(struct vme_dev *dev, 94 struct vme_resource *vme_dma_request(struct vme_dev *dev, u32 route);
95 vme_dma_route_t route); 95
96 96For slave windows these attributes are split into the VME address spaces that
97For slave windows these attributes are split into those of type 'vme_address_t' 97need to be accessed in 'aspace' and VME bus cycle types required in 'cycle'.
98and 'vme_cycle_t'. Master windows add a further set of attributes 98Master windows add a further set of attributes in 'width' specifying the
99'vme_cycle_t'. These attributes are defined as bitmasks and as such any 99required data transfer widths. These attributes are defined as bitmasks and as
100combination of the attributes can be requested for a single window, the core 100such any combination of the attributes can be requested for a single window,
101will assign a window that meets the requirements, returning a pointer of type 101the core will assign a window that meets the requirements, returning a pointer
102vme_resource that should be used to identify the allocated resource when it is 102of type vme_resource that should be used to identify the allocated resource
103used. For DMA controllers, the request function requires the potential 103when it is used. For DMA controllers, the request function requires the
104direction of any transfers to be provided in the route attributes. This is 104potential direction of any transfers to be provided in the route attributes.
105typically VME-to-MEM and/or MEM-to-VME, though some hardware can support 105This is typically VME-to-MEM and/or MEM-to-VME, though some hardware can
106VME-to-VME and MEM-to-MEM transfers as well as test pattern generation. If an 106support VME-to-VME and MEM-to-MEM transfers as well as test pattern generation.
107unallocated window fitting the requirements can not be found a NULL pointer 107If an unallocated window fitting the requirements can not be found a NULL
108will be returned. 108pointer will be returned.
109 109
110Functions are also provided to free window allocations once they are no longer 110Functions are also provided to free window allocations once they are no longer
111required. These functions should be passed the pointer to the resource provided 111required. These functions should be passed the pointer to the resource provided
@@ -133,12 +133,12 @@ Once a master window has been assigned the following functions can be used to
133configure it and retrieve the current settings: 133configure it and retrieve the current settings:
134 134
135 int vme_master_set (struct vme_resource *res, int enabled, 135 int vme_master_set (struct vme_resource *res, int enabled,
136 unsigned long long base, unsigned long long size, 136 unsigned long long base, unsigned long long size, u32 aspace,
137 vme_address_t aspace, vme_cycle_t cycle, vme_width_t width); 137 u32 cycle, u32 width);
138 138
139 int vme_master_get (struct vme_resource *res, int *enabled, 139 int vme_master_get (struct vme_resource *res, int *enabled,
140 unsigned long long *base, unsigned long long *size, 140 unsigned long long *base, unsigned long long *size, u32 *aspace,
141 vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *width); 141 u32 *cycle, u32 *width);
142 142
143The address spaces, transfer widths and cycle types are the same as described 143The address spaces, transfer widths and cycle types are the same as described
144under resource management, however some of the options are mutually exclusive. 144under resource management, however some of the options are mutually exclusive.
@@ -189,11 +189,11 @@ configure it and retrieve the current settings:
189 189
190 int vme_slave_set (struct vme_resource *res, int enabled, 190 int vme_slave_set (struct vme_resource *res, int enabled,
191 unsigned long long base, unsigned long long size, 191 unsigned long long base, unsigned long long size,
192 dma_addr_t mem, vme_address_t aspace, vme_cycle_t cycle); 192 dma_addr_t mem, u32 aspace, u32 cycle);
193 193
194 int vme_slave_get (struct vme_resource *res, int *enabled, 194 int vme_slave_get (struct vme_resource *res, int *enabled,
195 unsigned long long *base, unsigned long long *size, 195 unsigned long long *base, unsigned long long *size,
196 dma_addr_t *mem, vme_address_t *aspace, vme_cycle_t *cycle); 196 dma_addr_t *mem, u32 *aspace, u32 *cycle);
197 197
198The address spaces, transfer widths and cycle types are the same as described 198The address spaces, transfer widths and cycle types are the same as described
199under resource management, however some of the options are mutually exclusive. 199under resource management, however some of the options are mutually exclusive.
@@ -273,8 +273,7 @@ and pattern sources and destinations (where appropriate):
273 273
274Pattern source: 274Pattern source:
275 275
276 struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, 276 struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, u32 type);
277 vme_pattern_t type);
278 277
279PCI source or destination: 278PCI source or destination:
280 279
@@ -283,7 +282,7 @@ PCI source or destination:
283VME source or destination: 282VME source or destination:
284 283
285 struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long base, 284 struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long base,
286 vme_address_t aspace, vme_cycle_t cycle, vme_width_t width); 285 u32 aspace, u32 cycle, u32 width);
287 286
288The following function should be used to free an attribute: 287The following function should be used to free an attribute:
289 288
@@ -366,10 +365,10 @@ Once a bank of location monitors has been allocated, the following functions
366are provided to configure the location and mode of the location monitor: 365are provided to configure the location and mode of the location monitor:
367 366
368 int vme_lm_set(struct vme_resource *res, unsigned long long base, 367 int vme_lm_set(struct vme_resource *res, unsigned long long base,
369 vme_address_t aspace, vme_cycle_t cycle); 368 u32 aspace, u32 cycle);
370 369
371 int vme_lm_get(struct vme_resource *res, unsigned long long *base, 370 int vme_lm_get(struct vme_resource *res, unsigned long long *base,
372 vme_address_t *aspace, vme_cycle_t *cycle); 371 u32 *aspace, u32 *cycle);
373 372
374 373
375Location Monitor Use 374Location Monitor Use
diff --git a/drivers/staging/vme/vme_bridge.h b/drivers/staging/vme/vme_bridge.h
index c2deda2c38df..934949abd745 100644
--- a/drivers/staging/vme/vme_bridge.h
+++ b/drivers/staging/vme/vme_bridge.h
@@ -15,9 +15,9 @@ struct vme_master_resource {
15 spinlock_t lock; 15 spinlock_t lock;
16 int locked; 16 int locked;
17 int number; 17 int number;
18 vme_address_t address_attr; 18 u32 address_attr;
19 vme_cycle_t cycle_attr; 19 u32 cycle_attr;
20 vme_width_t width_attr; 20 u32 width_attr;
21 struct resource bus_resource; 21 struct resource bus_resource;
22 void __iomem *kern_base; 22 void __iomem *kern_base;
23}; 23};
@@ -28,13 +28,13 @@ struct vme_slave_resource {
28 struct mutex mtx; 28 struct mutex mtx;
29 int locked; 29 int locked;
30 int number; 30 int number;
31 vme_address_t address_attr; 31 u32 address_attr;
32 vme_cycle_t cycle_attr; 32 u32 cycle_attr;
33}; 33};
34 34
35struct vme_dma_pattern { 35struct vme_dma_pattern {
36 u32 pattern; 36 u32 pattern;
37 vme_pattern_t type; 37 u32 type;
38}; 38};
39 39
40struct vme_dma_pci { 40struct vme_dma_pci {
@@ -43,9 +43,9 @@ struct vme_dma_pci {
43 43
44struct vme_dma_vme { 44struct vme_dma_vme {
45 unsigned long long address; 45 unsigned long long address;
46 vme_address_t aspace; 46 u32 aspace;
47 vme_cycle_t cycle; 47 u32 cycle;
48 vme_width_t dwidth; 48 u32 dwidth;
49}; 49};
50 50
51struct vme_dma_list { 51struct vme_dma_list {
@@ -63,7 +63,7 @@ struct vme_dma_resource {
63 int number; 63 int number;
64 struct list_head pending; 64 struct list_head pending;
65 struct list_head running; 65 struct list_head running;
66 vme_dma_route_t route_attr; 66 u32 route_attr;
67}; 67};
68 68
69struct vme_lm_resource { 69struct vme_lm_resource {
@@ -122,17 +122,16 @@ struct vme_bridge {
122 /* Slave Functions */ 122 /* Slave Functions */
123 int (*slave_get) (struct vme_slave_resource *, int *, 123 int (*slave_get) (struct vme_slave_resource *, int *,
124 unsigned long long *, unsigned long long *, dma_addr_t *, 124 unsigned long long *, unsigned long long *, dma_addr_t *,
125 vme_address_t *, vme_cycle_t *); 125 u32 *, u32 *);
126 int (*slave_set) (struct vme_slave_resource *, int, unsigned long long, 126 int (*slave_set) (struct vme_slave_resource *, int, unsigned long long,
127 unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); 127 unsigned long long, dma_addr_t, u32, u32);
128 128
129 /* Master Functions */ 129 /* Master Functions */
130 int (*master_get) (struct vme_master_resource *, int *, 130 int (*master_get) (struct vme_master_resource *, int *,
131 unsigned long long *, unsigned long long *, vme_address_t *, 131 unsigned long long *, unsigned long long *, u32 *, u32 *,
132 vme_cycle_t *, vme_width_t *); 132 u32 *);
133 int (*master_set) (struct vme_master_resource *, int, 133 int (*master_set) (struct vme_master_resource *, int,
134 unsigned long long, unsigned long long, vme_address_t, 134 unsigned long long, unsigned long long, u32, u32, u32);
135 vme_cycle_t, vme_width_t);
136 ssize_t (*master_read) (struct vme_master_resource *, void *, size_t, 135 ssize_t (*master_read) (struct vme_master_resource *, void *, size_t,
137 loff_t); 136 loff_t);
138 ssize_t (*master_write) (struct vme_master_resource *, void *, size_t, 137 ssize_t (*master_write) (struct vme_master_resource *, void *, size_t,
@@ -151,10 +150,9 @@ struct vme_bridge {
151 int (*irq_generate) (struct vme_bridge *, int, int); 150 int (*irq_generate) (struct vme_bridge *, int, int);
152 151
153 /* Location monitor functions */ 152 /* Location monitor functions */
154 int (*lm_set) (struct vme_lm_resource *, unsigned long long, 153 int (*lm_set) (struct vme_lm_resource *, unsigned long long, u32, u32);
155 vme_address_t, vme_cycle_t); 154 int (*lm_get) (struct vme_lm_resource *, unsigned long long *, u32 *,
156 int (*lm_get) (struct vme_lm_resource *, unsigned long long *, 155 u32 *);
157 vme_address_t *, vme_cycle_t *);
158 int (*lm_attach) (struct vme_lm_resource *, int, void (*callback)(int)); 156 int (*lm_attach) (struct vme_lm_resource *, int, void (*callback)(int));
159 int (*lm_detach) (struct vme_lm_resource *, int); 157 int (*lm_detach) (struct vme_lm_resource *, int);
160 158
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c
index d8dd7846447d..3e8283c2dc73 100644
--- a/drivers/staging/vt6655/device_main.c
+++ b/drivers/staging/vt6655/device_main.c
@@ -3153,11 +3153,7 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
3153 break; 3153 break;
3154 3154
3155 case SIOCGIWNWID: //0x8b03 support 3155 case SIOCGIWNWID: //0x8b03 support
3156 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 3156 rc = -EOPNOTSUPP;
3157 rc = iwctl_giwnwid(dev, NULL, &(wrq->u.nwid), NULL);
3158 #else
3159 rc = -EOPNOTSUPP;
3160 #endif
3161 break; 3157 break;
3162 3158
3163 // Set frequency/channel 3159 // Set frequency/channel
diff --git a/drivers/staging/vt6655/ioctl.c b/drivers/staging/vt6655/ioctl.c
index 432a20993c6e..7fd5cc5a55f6 100644
--- a/drivers/staging/vt6655/ioctl.c
+++ b/drivers/staging/vt6655/ioctl.c
@@ -300,6 +300,10 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq)
300 result = -EFAULT; 300 result = -EFAULT;
301 break; 301 break;
302 } 302 }
303 if (sList.uItem > (ULONG_MAX - sizeof(SBSSIDList)) / sizeof(SBSSIDItem)) {
304 result = -EINVAL;
305 break;
306 }
303 pList = (PSBSSIDList)kmalloc(sizeof(SBSSIDList) + (sList.uItem * sizeof(SBSSIDItem)), (int)GFP_ATOMIC); 307 pList = (PSBSSIDList)kmalloc(sizeof(SBSSIDList) + (sList.uItem * sizeof(SBSSIDItem)), (int)GFP_ATOMIC);
304 if (pList == NULL) { 308 if (pList == NULL) {
305 result = -ENOMEM; 309 result = -ENOMEM;
@@ -571,6 +575,10 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq)
571 result = -EFAULT; 575 result = -EFAULT;
572 break; 576 break;
573 } 577 }
578 if (sNodeList.uItem > (ULONG_MAX - sizeof(SNodeList)) / sizeof(SNodeItem)) {
579 result = -EINVAL;
580 break;
581 }
574 pNodeList = (PSNodeList)kmalloc(sizeof(SNodeList) + (sNodeList.uItem * sizeof(SNodeItem)), (int)GFP_ATOMIC); 582 pNodeList = (PSNodeList)kmalloc(sizeof(SNodeList) + (sNodeList.uItem * sizeof(SNodeItem)), (int)GFP_ATOMIC);
575 if (pNodeList == NULL) { 583 if (pNodeList == NULL) {
576 result = -ENOMEM; 584 result = -ENOMEM;
diff --git a/drivers/staging/vt6655/iwctl.c b/drivers/staging/vt6655/iwctl.c
index 5e425d1476b8..87288db21785 100644
--- a/drivers/staging/vt6655/iwctl.c
+++ b/drivers/staging/vt6655/iwctl.c
@@ -151,18 +151,6 @@ int iwctl_giwname(struct net_device *dev,
151 return 0; 151 return 0;
152} 152}
153 153
154int iwctl_giwnwid(struct net_device *dev,
155 struct iw_request_info *info,
156 struct iw_param *wrq,
157 char *extra)
158{
159 //wrq->value = 0x100;
160 //wrq->disabled = 0;
161 //wrq->fixed = 1;
162 //return 0;
163 return -EOPNOTSUPP;
164}
165
166/* 154/*
167 * Wireless Handler : set scan 155 * Wireless Handler : set scan
168 */ 156 */
diff --git a/drivers/staging/vt6655/iwctl.h b/drivers/staging/vt6655/iwctl.h
index 3096de0ba1bd..d224f913a624 100644
--- a/drivers/staging/vt6655/iwctl.h
+++ b/drivers/staging/vt6655/iwctl.h
@@ -79,11 +79,6 @@ int iwctl_giwname(struct net_device *dev,
79 char *wrq, 79 char *wrq,
80 char *extra); 80 char *extra);
81 81
82int iwctl_giwnwid(struct net_device *dev,
83 struct iw_request_info *info,
84 struct iw_param *wrq,
85 char *extra) ;
86
87int iwctl_giwsens(struct net_device *dev, 82int iwctl_giwsens(struct net_device *dev,
88 struct iw_request_info *info, 83 struct iw_request_info *info,
89 struct iw_param *wrq, 84 struct iw_param *wrq,
diff --git a/drivers/staging/vt6656/80211mgr.c b/drivers/staging/vt6656/80211mgr.c
index fceec4999c36..39f98423dc02 100644
--- a/drivers/staging/vt6656/80211mgr.c
+++ b/drivers/staging/vt6656/80211mgr.c
@@ -224,8 +224,6 @@ vMgrDecodeBeacon(
224 } 224 }
225 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len); 225 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len);
226 } 226 }
227
228 return;
229} 227}
230 228
231 229
@@ -248,8 +246,6 @@ vMgrEncodeIBSSATIM(
248{ 246{
249 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 247 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
250 pFrame->len = WLAN_HDR_ADDR3_LEN; 248 pFrame->len = WLAN_HDR_ADDR3_LEN;
251
252 return;
253} 249}
254 250
255 251
@@ -270,8 +266,6 @@ vMgrDecodeIBSSATIM(
270 ) 266 )
271{ 267{
272 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 268 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
273
274 return;
275} 269}
276 270
277 271
@@ -298,8 +292,6 @@ vMgrEncodeDisassociation(
298 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 292 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
299 + WLAN_DISASSOC_OFF_REASON); 293 + WLAN_DISASSOC_OFF_REASON);
300 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_DISASSOC_OFF_REASON + sizeof(*(pFrame->pwReason)); 294 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_DISASSOC_OFF_REASON + sizeof(*(pFrame->pwReason));
301
302 return;
303} 295}
304 296
305 297
@@ -324,8 +316,6 @@ vMgrDecodeDisassociation(
324 /* Fixed Fields */ 316 /* Fixed Fields */
325 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 317 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
326 + WLAN_DISASSOC_OFF_REASON); 318 + WLAN_DISASSOC_OFF_REASON);
327
328 return;
329} 319}
330 320
331/*+ 321/*+
@@ -352,7 +342,6 @@ vMgrEncodeAssocRequest(
352 pFrame->pwListenInterval = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 342 pFrame->pwListenInterval = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
353 + WLAN_ASSOCREQ_OFF_LISTEN_INT); 343 + WLAN_ASSOCREQ_OFF_LISTEN_INT);
354 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_ASSOCREQ_OFF_LISTEN_INT + sizeof(*(pFrame->pwListenInterval)); 344 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_ASSOCREQ_OFF_LISTEN_INT + sizeof(*(pFrame->pwListenInterval));
355 return;
356} 345}
357 346
358 347
@@ -418,7 +407,6 @@ vMgrDecodeAssocRequest(
418 } 407 }
419 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len); 408 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len);
420 } 409 }
421 return;
422} 410}
423 411
424/*+ 412/*+
@@ -448,8 +436,6 @@ vMgrEncodeAssocResponse(
448 + WLAN_ASSOCRESP_OFF_AID); 436 + WLAN_ASSOCRESP_OFF_AID);
449 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_ASSOCRESP_OFF_AID 437 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_ASSOCRESP_OFF_AID
450 + sizeof(*(pFrame->pwAid)); 438 + sizeof(*(pFrame->pwAid));
451
452 return;
453} 439}
454 440
455 441
@@ -491,10 +477,8 @@ vMgrDecodeAssocResponse(
491 if ((((PBYTE)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_EXTSUPP_RATES)) { 477 if ((((PBYTE)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_EXTSUPP_RATES)) {
492 pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem; 478 pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
493 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pFrame->pExtSuppRates=[%p].\n", pItem); 479 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pFrame->pExtSuppRates=[%p].\n", pItem);
494 } else { 480 } else
495 pFrame->pExtSuppRates = NULL; 481 pFrame->pExtSuppRates = NULL;
496 }
497 return;
498} 482}
499 483
500 484
@@ -524,8 +508,6 @@ vMgrEncodeReassocRequest(
524 pFrame->pAddrCurrAP = (PIEEE_ADDR)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 508 pFrame->pAddrCurrAP = (PIEEE_ADDR)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
525 + WLAN_REASSOCREQ_OFF_CURR_AP); 509 + WLAN_REASSOCREQ_OFF_CURR_AP);
526 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_REASSOCREQ_OFF_CURR_AP + sizeof(*(pFrame->pAddrCurrAP)); 510 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_REASSOCREQ_OFF_CURR_AP + sizeof(*(pFrame->pAddrCurrAP));
527
528 return;
529} 511}
530 512
531 513
@@ -578,10 +560,9 @@ vMgrDecodeReassocRequest(
578 pFrame->pRSN = (PWLAN_IE_RSN)pItem; 560 pFrame->pRSN = (PWLAN_IE_RSN)pItem;
579 break; 561 break;
580 case WLAN_EID_RSN_WPA: 562 case WLAN_EID_RSN_WPA:
581 if (pFrame->pRSNWPA == NULL) { 563 if (pFrame->pRSNWPA == NULL)
582 if (WPAb_Is_RSN((PWLAN_IE_RSN_EXT)pItem) == TRUE) 564 if (WPAb_Is_RSN((PWLAN_IE_RSN_EXT)pItem) == TRUE)
583 pFrame->pRSNWPA = (PWLAN_IE_RSN_EXT)pItem; 565 pFrame->pRSNWPA = (PWLAN_IE_RSN_EXT)pItem;
584 }
585 break; 566 break;
586 567
587 case WLAN_EID_EXTSUPP_RATES: 568 case WLAN_EID_EXTSUPP_RATES:
@@ -595,7 +576,6 @@ vMgrDecodeReassocRequest(
595 } 576 }
596 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len); 577 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len);
597 } 578 }
598 return;
599} 579}
600 580
601 581
@@ -619,7 +599,6 @@ vMgrEncodeProbeRequest(
619{ 599{
620 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf; 600 pFrame->pHdr = (PUWLAN_80211HDR)pFrame->pBuf;
621 pFrame->len = WLAN_HDR_ADDR3_LEN; 601 pFrame->len = WLAN_HDR_ADDR3_LEN;
622 return;
623} 602}
624 603
625/*+ 604/*+
@@ -670,7 +649,6 @@ vMgrDecodeProbeRequest(
670 649
671 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len); 650 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len);
672 } 651 }
673 return;
674} 652}
675 653
676 654
@@ -703,8 +681,6 @@ vMgrEncodeProbeResponse(
703 681
704 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_PROBERESP_OFF_CAP_INFO + 682 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_PROBERESP_OFF_CAP_INFO +
705 sizeof(*(pFrame->pwCapInfo)); 683 sizeof(*(pFrame->pwCapInfo));
706
707 return;
708} 684}
709 685
710 686
@@ -818,7 +794,6 @@ vMgrDecodeProbeResponse(
818 794
819 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len); 795 pItem = (PWLAN_IE)(((PBYTE)pItem) + 2 + pItem->len);
820 } 796 }
821 return;
822} 797}
823 798
824 799
@@ -848,7 +823,6 @@ vMgrEncodeAuthen(
848 pFrame->pwStatus = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 823 pFrame->pwStatus = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
849 + WLAN_AUTHEN_OFF_STATUS); 824 + WLAN_AUTHEN_OFF_STATUS);
850 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_AUTHEN_OFF_STATUS + sizeof(*(pFrame->pwStatus)); 825 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_AUTHEN_OFF_STATUS + sizeof(*(pFrame->pwStatus));
851 return;
852} 826}
853 827
854 828
@@ -886,7 +860,6 @@ vMgrDecodeAuthen(
886 860
887 if ((((PBYTE)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_CHALLENGE)) 861 if ((((PBYTE)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_CHALLENGE))
888 pFrame->pChallenge = (PWLAN_IE_CHALLENGE)pItem; 862 pFrame->pChallenge = (PWLAN_IE_CHALLENGE)pItem;
889 return;
890} 863}
891 864
892 865
@@ -912,7 +885,6 @@ vMgrEncodeDeauthen(
912 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 885 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
913 + WLAN_DEAUTHEN_OFF_REASON); 886 + WLAN_DEAUTHEN_OFF_REASON);
914 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_DEAUTHEN_OFF_REASON + sizeof(*(pFrame->pwReason)); 887 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_DEAUTHEN_OFF_REASON + sizeof(*(pFrame->pwReason));
915 return;
916} 888}
917 889
918 890
@@ -937,7 +909,6 @@ vMgrDecodeDeauthen(
937 /* Fixed Fields */ 909 /* Fixed Fields */
938 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3)) 910 pFrame->pwReason = (PWORD)(WLAN_HDR_A3_DATA_PTR(&(pFrame->pHdr->sA3))
939 + WLAN_DEAUTHEN_OFF_REASON); 911 + WLAN_DEAUTHEN_OFF_REASON);
940 return;
941} 912}
942 913
943 914
@@ -968,7 +939,6 @@ vMgrEncodeReassocResponse(
968 + WLAN_REASSOCRESP_OFF_AID); 939 + WLAN_REASSOCRESP_OFF_AID);
969 940
970 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_REASSOCRESP_OFF_AID + sizeof(*(pFrame->pwAid)); 941 pFrame->len = WLAN_HDR_ADDR3_LEN + WLAN_REASSOCRESP_OFF_AID + sizeof(*(pFrame->pwAid));
971 return;
972} 942}
973 943
974 944
@@ -1010,5 +980,4 @@ vMgrDecodeReassocResponse(
1010 980
1011 if ((((PBYTE)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_EXTSUPP_RATES)) 981 if ((((PBYTE)pItem) < (pFrame->pBuf + pFrame->len)) && (pItem->byElementID == WLAN_EID_EXTSUPP_RATES))
1012 pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem; 982 pFrame->pExtSuppRates = (PWLAN_IE_SUPP_RATES)pItem;
1013 return;
1014} 983}
diff --git a/drivers/staging/vt6656/baseband.c b/drivers/staging/vt6656/baseband.c
index 0d11147f91c1..06f27f624db4 100644
--- a/drivers/staging/vt6656/baseband.c
+++ b/drivers/staging/vt6656/baseband.c
@@ -932,30 +932,8 @@ BBvCaculateParameter (
932void 932void
933BBvSetAntennaMode (PSDevice pDevice, BYTE byAntennaMode) 933BBvSetAntennaMode (PSDevice pDevice, BYTE byAntennaMode)
934{ 934{
935 //{{ RobertYu: 20041124, ABG Mode, VC1/VC2 define, make the ANT_A, ANT_B inverted
936 /*if ( (pDevice->byRFType == RF_MAXIM2829) ||
937 (pDevice->byRFType == RF_UW2452) ||
938 (pDevice->byRFType == RF_AIROHA7230) ) { // RobertYu: 20041210, 20050104
939
940 switch (byAntennaMode) {
941 case ANT_TXA:
942 byAntennaMode = ANT_TXB;
943 break;
944 case ANT_TXB:
945 byAntennaMode = ANT_TXA;
946 break;
947 case ANT_RXA:
948 byAntennaMode = ANT_RXB;
949 break;
950 case ANT_RXB:
951 byAntennaMode = ANT_RXA;
952 break;
953 }
954 }*/
955
956 switch (byAntennaMode) { 935 switch (byAntennaMode) {
957 case ANT_TXA: 936 case ANT_TXA:
958 break;
959 case ANT_TXB: 937 case ANT_TXB:
960 break; 938 break;
961 case ANT_RXA: 939 case ANT_RXA:
@@ -1249,8 +1227,7 @@ void BBvLoopbackOff (PSDevice pDevice)
1249 // Set the CR33 Bit2 to disable internal Loopback. 1227 // Set the CR33 Bit2 to disable internal Loopback.
1250 ControlvReadByte (pDevice, MESSAGE_REQUEST_BBREG, 0x21, &byData);//CR33 1228 ControlvReadByte (pDevice, MESSAGE_REQUEST_BBREG, 0x21, &byData);//CR33
1251 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x21, (BYTE)(byData & 0xFE));//CR33 1229 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x21, (BYTE)(byData & 0xFE));//CR33
1252 } 1230 } else { /* OFDM */
1253 else { // OFDM
1254 ControlvReadByte (pDevice, MESSAGE_REQUEST_BBREG, 0x9A, &byData);//CR154 1231 ControlvReadByte (pDevice, MESSAGE_REQUEST_BBREG, 0x9A, &byData);//CR154
1255 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x9A, (BYTE)(byData & 0xFE));//CR154 1232 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x9A, (BYTE)(byData & 0xFE));//CR154
1256 } 1233 }
@@ -1277,19 +1254,16 @@ BBvSetShortSlotTime (PSDevice pDevice)
1277{ 1254{
1278 BYTE byBBVGA=0; 1255 BYTE byBBVGA=0;
1279 1256
1280 if (pDevice->bShortSlotTime) { 1257 if (pDevice->bShortSlotTime)
1281 pDevice->byBBRxConf &= 0xDF;//1101 1111 1258 pDevice->byBBRxConf &= 0xDF;//1101 1111
1282 } else { 1259 else
1283 pDevice->byBBRxConf |= 0x20;//0010 0000 1260 pDevice->byBBRxConf |= 0x20;//0010 0000
1284 }
1285 1261
1286 ControlvReadByte (pDevice, MESSAGE_REQUEST_BBREG, 0xE7, &byBBVGA); 1262 ControlvReadByte (pDevice, MESSAGE_REQUEST_BBREG, 0xE7, &byBBVGA);
1287 if (byBBVGA == pDevice->abyBBVGA[0]) { 1263 if (byBBVGA == pDevice->abyBBVGA[0])
1288 pDevice->byBBRxConf |= 0x20;//0010 0000 1264 pDevice->byBBRxConf |= 0x20;//0010 0000
1289 }
1290 1265
1291 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0A, pDevice->byBBRxConf); 1266 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0A, pDevice->byBBRxConf);
1292
1293} 1267}
1294 1268
1295 1269
@@ -1299,13 +1273,11 @@ void BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
1299 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0xE7, byData); 1273 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0xE7, byData);
1300 1274
1301 // patch for 3253B0 Baseband with Cardbus module 1275 // patch for 3253B0 Baseband with Cardbus module
1302 if (byData == pDevice->abyBBVGA[0]) { 1276 if (pDevice->bShortSlotTime)
1303 pDevice->byBBRxConf |= 0x20;//0010 0000 1277 pDevice->byBBRxConf &= 0xDF; /* 1101 1111 */
1304 } else if (pDevice->bShortSlotTime) { 1278 else
1305 pDevice->byBBRxConf &= 0xDF;//1101 1111 1279 pDevice->byBBRxConf |= 0x20; /* 0010 0000 */
1306 } else { 1280
1307 pDevice->byBBRxConf |= 0x20;//0010 0000
1308 }
1309 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0A, pDevice->byBBRxConf);//CR10 1281 ControlvWriteByte(pDevice, MESSAGE_REQUEST_BBREG, 0x0A, pDevice->byBBRxConf);//CR10
1310} 1282}
1311 1283
@@ -1365,15 +1337,14 @@ static unsigned long s_ulGetLowSQ3(PSDevice pDevice)
1365 unsigned long ulMaxPacket; 1337 unsigned long ulMaxPacket;
1366 1338
1367 ulMaxPacket = pDevice->aulPktNum[RATE_54M]; 1339 ulMaxPacket = pDevice->aulPktNum[RATE_54M];
1368 if ( pDevice->aulPktNum[RATE_54M] != 0 ) { 1340 if (pDevice->aulPktNum[RATE_54M] != 0)
1369 ulSQ3 = pDevice->aulSQ3Val[RATE_54M] / pDevice->aulPktNum[RATE_54M]; 1341 ulSQ3 = pDevice->aulSQ3Val[RATE_54M] / pDevice->aulPktNum[RATE_54M];
1370 } 1342
1371 for ( ii=RATE_48M;ii>=RATE_6M;ii-- ) { 1343 for (ii = RATE_48M; ii >= RATE_6M; ii--)
1372 if ( pDevice->aulPktNum[ii] > ulMaxPacket ) { 1344 if (pDevice->aulPktNum[ii] > ulMaxPacket) {
1373 ulMaxPacket = pDevice->aulPktNum[ii]; 1345 ulMaxPacket = pDevice->aulPktNum[ii];
1374 ulSQ3 = pDevice->aulSQ3Val[ii] / pDevice->aulPktNum[ii]; 1346 ulSQ3 = pDevice->aulSQ3Val[ii] / pDevice->aulPktNum[ii];
1375 } 1347 }
1376 }
1377 1348
1378 return ulSQ3; 1349 return ulSQ3;
1379} 1350}
@@ -1392,7 +1363,7 @@ static unsigned long s_ulGetRatio(PSDevice pDevice)
1392 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt); 1363 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
1393 ulRatio += TOP_RATE_54M; 1364 ulRatio += TOP_RATE_54M;
1394 } 1365 }
1395 for ( ii=RATE_48M;ii>=RATE_1M;ii-- ) { 1366 for (ii = RATE_48M; ii >= RATE_1M; ii--)
1396 if ( pDevice->aulPktNum[ii] > ulMaxPacket ) { 1367 if ( pDevice->aulPktNum[ii] > ulMaxPacket ) {
1397 ulPacketNum = 0; 1368 ulPacketNum = 0;
1398 for ( jj=RATE_54M;jj>=ii;jj--) 1369 for ( jj=RATE_54M;jj>=ii;jj--)
@@ -1402,8 +1373,6 @@ static unsigned long s_ulGetRatio(PSDevice pDevice)
1402 ulMaxPacket = pDevice->aulPktNum[ii]; 1373 ulMaxPacket = pDevice->aulPktNum[ii];
1403 } 1374 }
1404 1375
1405 }
1406
1407 return ulRatio; 1376 return ulRatio;
1408} 1377}
1409 1378
@@ -1589,7 +1558,6 @@ void TimerSQ3CallBack(void *hDeviceContext)
1589 1558
1590 1559
1591 spin_unlock_irq(&pDevice->lock); 1560 spin_unlock_irq(&pDevice->lock);
1592 return;
1593} 1561}
1594 1562
1595 1563
@@ -1637,7 +1605,6 @@ void TimerSQ3Tmax3CallBack(void *hDeviceContext)
1637 add_timer(&pDevice->TimerSQ3Tmax1); 1605 add_timer(&pDevice->TimerSQ3Tmax1);
1638 1606
1639 spin_unlock_irq(&pDevice->lock); 1607 spin_unlock_irq(&pDevice->lock);
1640 return;
1641} 1608}
1642 1609
1643void 1610void
diff --git a/drivers/staging/vt6656/bssdb.c b/drivers/staging/vt6656/bssdb.c
index af006df4c8e9..32c67ed8435a 100644
--- a/drivers/staging/vt6656/bssdb.c
+++ b/drivers/staging/vt6656/bssdb.c
@@ -216,26 +216,6 @@ PKnownBSS BSSpSearchBSSList(void *hDeviceContext,
216 continue; 216 continue;
217 } 217 }
218 } 218 }
219/*
220 if (pMgmt->eAuthenMode < WMAC_AUTH_WPA) {
221 if (pCurrBSS->bWPAValid == TRUE) {
222 // WPA AP will reject connection of station without WPA enable.
223 continue;
224 }
225 } else if ((pMgmt->eAuthenMode == WMAC_AUTH_WPA) ||
226 (pMgmt->eAuthenMode == WMAC_AUTH_WPAPSK)) {
227 if (pCurrBSS->bWPAValid == FALSE) {
228 // station with WPA enable can't join NonWPA AP.
229 continue;
230 }
231 } else if ((pMgmt->eAuthenMode == WMAC_AUTH_WPA2) ||
232 (pMgmt->eAuthenMode == WMAC_AUTH_WPA2PSK)) {
233 if (pCurrBSS->bWPA2Valid == FALSE) {
234 // station with WPA2 enable can't join NonWPA2 AP.
235 continue;
236 }
237 }
238*/
239 219
240 pMgmt->pSameBSS[jj].uChannel = pCurrBSS->uChannel; 220 pMgmt->pSameBSS[jj].uChannel = pCurrBSS->uChannel;
241 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BSSpSearchBSSList pSelect1[%02X %02X %02X-%02X %02X %02X]\n",*pCurrBSS->abyBSSID,*(pCurrBSS->abyBSSID+1),*(pCurrBSS->abyBSSID+2),*(pCurrBSS->abyBSSID+3),*(pCurrBSS->abyBSSID+4),*(pCurrBSS->abyBSSID+5)); 221 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BSSpSearchBSSList pSelect1[%02X %02X %02X-%02X %02X %02X]\n",*pCurrBSS->abyBSSID,*(pCurrBSS->abyBSSID+1),*(pCurrBSS->abyBSSID+2),*(pCurrBSS->abyBSSID+3),*(pCurrBSS->abyBSSID+4),*(pCurrBSS->abyBSSID+5));
@@ -300,18 +280,11 @@ void BSSvClearBSSList(void *hDeviceContext, BOOL bKeepCurrBSSID)
300 continue; 280 continue;
301 } 281 }
302 } 282 }
303/* 283
304 if ((pMgmt->sBSSList[ii].bActive) && (pMgmt->sBSSList[ii].uClearCount < BSS_CLEAR_COUNT)) { 284 pMgmt->sBSSList[ii].bActive = FALSE;
305 pMgmt->sBSSList[ii].uClearCount ++;
306 continue;
307 }
308*/
309 pMgmt->sBSSList[ii].bActive = FALSE;
310 memset(&pMgmt->sBSSList[ii], 0, sizeof(KnownBSS)); 285 memset(&pMgmt->sBSSList[ii], 0, sizeof(KnownBSS));
311 } 286 }
312 BSSvClearAnyBSSJoinRecord(pDevice); 287 BSSvClearAnyBSSJoinRecord(pDevice);
313
314 return;
315} 288}
316 289
317 290
@@ -524,46 +497,6 @@ BOOL BSSbInsertToBSSList(void *hDeviceContext,
524 pBSSList->ldBmAverage[ii] = 0; 497 pBSSList->ldBmAverage[ii] = 0;
525 } 498 }
526 499
527/*
528 if ((pIE_Country != NULL) &&
529 (pMgmt->b11hEnable == TRUE)) {
530 CARDvSetCountryInfo(pMgmt->pAdapter,
531 pBSSList->eNetworkTypeInUse,
532 pIE_Country);
533 }
534
535 if ((bParsingQuiet == TRUE) && (pIE_Quiet != NULL)) {
536 if ((((PWLAN_IE_QUIET)pIE_Quiet)->len == 8) &&
537 (((PWLAN_IE_QUIET)pIE_Quiet)->byQuietCount != 0)) {
538 // valid EID
539 if (pQuiet == NULL) {
540 pQuiet = (PWLAN_IE_QUIET)pIE_Quiet;
541 CARDbSetQuiet( pMgmt->pAdapter,
542 TRUE,
543 pQuiet->byQuietCount,
544 pQuiet->byQuietPeriod,
545 *((PWORD)pQuiet->abyQuietDuration),
546 *((PWORD)pQuiet->abyQuietOffset)
547 );
548 } else {
549 pQuiet = (PWLAN_IE_QUIET)pIE_Quiet;
550 CARDbSetQuiet( pMgmt->pAdapter,
551 FALSE,
552 pQuiet->byQuietCount,
553 pQuiet->byQuietPeriod,
554 *((PWORD)pQuiet->abyQuietDuration),
555 *((PWORD)pQuiet->abyQuietOffset)
556 );
557 }
558 }
559 }
560
561 if ((bParsingQuiet == TRUE) &&
562 (pQuiet != NULL)) {
563 CARDbStartQuiet(pMgmt->pAdapter);
564 }
565*/
566
567 pBSSList->uIELength = uIELength; 500 pBSSList->uIELength = uIELength;
568 if (pBSSList->uIELength > WLAN_BEACON_FR_MAXLEN) 501 if (pBSSList->uIELength > WLAN_BEACON_FR_MAXLEN)
569 pBSSList->uIELength = WLAN_BEACON_FR_MAXLEN; 502 pBSSList->uIELength = WLAN_BEACON_FR_MAXLEN;
@@ -609,8 +542,6 @@ BOOL BSSbUpdateToBSSList(void *hDeviceContext,
609 PSRxMgmtPacket pRxPacket = (PSRxMgmtPacket)pRxPacketContext; 542 PSRxMgmtPacket pRxPacket = (PSRxMgmtPacket)pRxPacketContext;
610 signed long ldBm, ldBmSum; 543 signed long ldBm, ldBmSum;
611 BOOL bParsingQuiet = FALSE; 544 BOOL bParsingQuiet = FALSE;
612 // BYTE abyTmpSSID[WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN + 1];
613
614 545
615 if (pBSSList == NULL) 546 if (pBSSList == NULL)
616 return FALSE; 547 return FALSE;
@@ -622,7 +553,6 @@ BOOL BSSbUpdateToBSSList(void *hDeviceContext,
622 pBSSList->wCapInfo = cpu_to_le16(wCapInfo); 553 pBSSList->wCapInfo = cpu_to_le16(wCapInfo);
623 pBSSList->uClearCount = 0; 554 pBSSList->uClearCount = 0;
624 pBSSList->uChannel = byCurrChannel; 555 pBSSList->uChannel = byCurrChannel;
625// DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"BSSbUpdateToBSSList: pBSSList->uChannel: %d\n", pBSSList->uChannel);
626 556
627 if (pSSID->len > WLAN_SSID_MAXLEN) 557 if (pSSID->len > WLAN_SSID_MAXLEN)
628 pSSID->len = WLAN_SSID_MAXLEN; 558 pSSID->len = WLAN_SSID_MAXLEN;
@@ -809,7 +739,6 @@ void BSSvCreateOneNode(void *hDeviceContext, unsigned int *puNodeIndex)
809 pMgmt->sNodeDBTable[*puNodeIndex].byAuthSequence = 0; 739 pMgmt->sNodeDBTable[*puNodeIndex].byAuthSequence = 0;
810 pMgmt->sNodeDBTable[*puNodeIndex].wEnQueueCnt = 0; 740 pMgmt->sNodeDBTable[*puNodeIndex].wEnQueueCnt = 0;
811 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Create node index = %d\n", ii); 741 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Create node index = %d\n", ii);
812 return;
813}; 742};
814 743
815 744
@@ -840,8 +769,6 @@ void BSSvRemoveOneNode(void *hDeviceContext, unsigned int uNodeIndex)
840 memset(&pMgmt->sNodeDBTable[uNodeIndex], 0, sizeof(KnownNodeDB)); 769 memset(&pMgmt->sNodeDBTable[uNodeIndex], 0, sizeof(KnownNodeDB));
841 // clear tx bit map 770 // clear tx bit map
842 pMgmt->abyPSTxMap[pMgmt->sNodeDBTable[uNodeIndex].wAID >> 3] &= ~byMask[pMgmt->sNodeDBTable[uNodeIndex].wAID & 7]; 771 pMgmt->abyPSTxMap[pMgmt->sNodeDBTable[uNodeIndex].wAID >> 3] &= ~byMask[pMgmt->sNodeDBTable[uNodeIndex].wAID & 7];
843
844 return;
845}; 772};
846/*+ 773/*+
847 * 774 *
@@ -1054,10 +981,6 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1054 981
1055 // Rate fallback check 982 // Rate fallback check
1056 if (!pDevice->bFixRate) { 983 if (!pDevice->bFixRate) {
1057/*
1058 if ((pMgmt->eCurrMode == WMAC_MODE_ESS_STA) && (ii == 0))
1059 RATEvTxRateFallBack(pDevice, &(pMgmt->sNodeDBTable[ii]));
1060*/
1061 if (ii > 0) { 984 if (ii > 0) {
1062 // ii = 0 for multicast node (AP & Adhoc) 985 // ii = 0 for multicast node (AP & Adhoc)
1063 RATEvTxRateFallBack((void *)pDevice, 986 RATEvTxRateFallBack((void *)pDevice,
@@ -1152,7 +1075,6 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1152 (pMgmt->eCurrMode == WMAC_MODE_ESS_STA)) { 1075 (pMgmt->eCurrMode == WMAC_MODE_ESS_STA)) {
1153 1076
1154 if (pMgmt->sNodeDBTable[0].bActive) { // Assoc with BSS 1077 if (pMgmt->sNodeDBTable[0].bActive) { // Assoc with BSS
1155 // DBG_PRT(MSG_LEVEL_INFO, KERN_INFO "Callback inactive Count = [%d]\n", pMgmt->sNodeDBTable[0].uInActiveCount);
1156 1078
1157 if (pDevice->bUpdateBBVGA) { 1079 if (pDevice->bUpdateBBVGA) {
1158 /* s_vCheckSensitivity((void *) pDevice); */ 1080 /* s_vCheckSensitivity((void *) pDevice); */
@@ -1194,7 +1116,6 @@ if((pMgmt->eCurrState!=WMAC_STATE_ASSOC) &&
1194 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz); 1116 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1195 } 1117 }
1196 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 1118 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
1197 // if(pDevice->bWPASuppWextEnabled == TRUE)
1198 { 1119 {
1199 union iwreq_data wrqu; 1120 union iwreq_data wrqu;
1200 memset(&wrqu, 0, sizeof (wrqu)); 1121 memset(&wrqu, 0, sizeof (wrqu));
@@ -1223,7 +1144,6 @@ DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bIsRoaming %d, !\n", pDevice->bIsRoaming );
1223 pDevice->uIsroamingTime = 0; 1144 pDevice->uIsroamingTime = 0;
1224 pDevice->bRoaming = FALSE; 1145 pDevice->bRoaming = FALSE;
1225 1146
1226// if ((pDevice->bWPADEVUp) && (pDevice->skb != NULL)) {
1227 wpahdr = (viawget_wpa_header *)pDevice->skb->data; 1147 wpahdr = (viawget_wpa_header *)pDevice->skb->data;
1228 wpahdr->type = VIAWGET_CCKM_ROAM_MSG; 1148 wpahdr->type = VIAWGET_CCKM_ROAM_MSG;
1229 wpahdr->resp_ie_len = 0; 1149 wpahdr->resp_ie_len = 0;
@@ -1237,7 +1157,6 @@ DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bIsRoaming %d, !\n", pDevice->bIsRoaming );
1237 netif_rx(pDevice->skb); 1157 netif_rx(pDevice->skb);
1238 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz); 1158 pDevice->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
1239 1159
1240// }
1241 } 1160 }
1242 else if ((pDevice->bRoaming == FALSE)&&(pDevice->bIsRoaming == TRUE)) { 1161 else if ((pDevice->bRoaming == FALSE)&&(pDevice->bIsRoaming == TRUE)) {
1243 pDevice->uIsroamingTime++; 1162 pDevice->uIsroamingTime++;
@@ -1315,7 +1234,6 @@ else {
1315 1234
1316 pMgmt->sTimerSecondCallback.expires = RUN_AT(HZ); 1235 pMgmt->sTimerSecondCallback.expires = RUN_AT(HZ);
1317 add_timer(&pMgmt->sTimerSecondCallback); 1236 add_timer(&pMgmt->sTimerSecondCallback);
1318 return;
1319} 1237}
1320 1238
1321/*+ 1239/*+
@@ -1364,7 +1282,6 @@ void BSSvUpdateNodeTxCounter(void *hDeviceContext,
1364 1282
1365 // Only Unicast using support rates 1283 // Only Unicast using support rates
1366 if (wFIFOCtl & FIFOCTL_NEEDACK) { 1284 if (wFIFOCtl & FIFOCTL_NEEDACK) {
1367 //DBG_PRN_GRP21(("Device %08X, wRate %04X, byTSR %02X\n", hDeviceContext, wRate, byTSR));
1368 if (pMgmt->eCurrMode == WMAC_MODE_ESS_STA) { 1285 if (pMgmt->eCurrMode == WMAC_MODE_ESS_STA) {
1369 pMgmt->sNodeDBTable[0].uTxAttempts += 1; 1286 pMgmt->sNodeDBTable[0].uTxAttempts += 1;
1370 if ( !(byTSR & (TSR_TMO | TSR_RETRYTMO))) { 1287 if ( !(byTSR & (TSR_TMO | TSR_RETRYTMO))) {
@@ -1475,10 +1392,6 @@ void BSSvUpdateNodeTxCounter(void *hDeviceContext,
1475 } 1392 }
1476 } 1393 }
1477 } 1394 }
1478
1479 return;
1480
1481
1482} 1395}
1483 1396
1484/*+ 1397/*+
@@ -1519,8 +1432,6 @@ void BSSvClearNodeDBTable(void *hDeviceContext,
1519 memset(&pMgmt->sNodeDBTable[ii], 0, sizeof(KnownNodeDB)); 1432 memset(&pMgmt->sNodeDBTable[ii], 0, sizeof(KnownNodeDB));
1520 } 1433 }
1521 } 1434 }
1522
1523 return;
1524}; 1435};
1525 1436
1526void s_vCheckSensitivity(void *hDeviceContext) 1437void s_vCheckSensitivity(void *hDeviceContext)
@@ -1584,7 +1495,6 @@ RxOkRatio = (RxCnt < 6) ? 2000:((pDevice->scStatistic.RxOkCnt * 2000) / RxCnt);
1584//decide link quality 1495//decide link quality
1585if(pDevice->bLinkPass !=TRUE) 1496if(pDevice->bLinkPass !=TRUE)
1586{ 1497{
1587 // printk("s_uCalculateLinkQual-->Link disconnect and Poor quality**\n");
1588 pDevice->scStatistic.LinkQuality = 0; 1498 pDevice->scStatistic.LinkQuality = 0;
1589 pDevice->scStatistic.SignalStren = 0; 1499 pDevice->scStatistic.SignalStren = 0;
1590} 1500}
@@ -1608,7 +1518,6 @@ else
1608 pDevice->scStatistic.TxFailCount = 0; 1518 pDevice->scStatistic.TxFailCount = 0;
1609 pDevice->scStatistic.TxNoRetryOkCount = 0; 1519 pDevice->scStatistic.TxNoRetryOkCount = 0;
1610 pDevice->scStatistic.TxRetryOkCount = 0; 1520 pDevice->scStatistic.TxRetryOkCount = 0;
1611 return;
1612} 1521}
1613 1522
1614void BSSvClearAnyBSSJoinRecord(void *hDeviceContext) 1523void BSSvClearAnyBSSJoinRecord(void *hDeviceContext)
@@ -1617,10 +1526,8 @@ void BSSvClearAnyBSSJoinRecord(void *hDeviceContext)
1617 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 1526 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
1618 unsigned int ii; 1527 unsigned int ii;
1619 1528
1620 for (ii = 0; ii < MAX_BSS_NUM; ii++) { 1529 for (ii = 0; ii < MAX_BSS_NUM; ii++)
1621 pMgmt->sBSSList[ii].bSelected = FALSE; 1530 pMgmt->sBSSList[ii].bSelected = FALSE;
1622 }
1623 return;
1624} 1531}
1625 1532
1626void s_vCheckPreEDThreshold(void *hDeviceContext) 1533void s_vCheckPreEDThreshold(void *hDeviceContext)
@@ -1637,6 +1544,5 @@ void s_vCheckPreEDThreshold(void *hDeviceContext)
1637 BBvUpdatePreEDThreshold(pDevice, FALSE); 1544 BBvUpdatePreEDThreshold(pDevice, FALSE);
1638 } 1545 }
1639 } 1546 }
1640 return;
1641} 1547}
1642 1548
diff --git a/drivers/staging/vt6656/card.c b/drivers/staging/vt6656/card.c
index a49053bd7c65..9d09e9fd8e18 100644
--- a/drivers/staging/vt6656/card.c
+++ b/drivers/staging/vt6656/card.c
@@ -91,15 +91,10 @@ const WORD cwRXBCNTSFOff[MAX_RATE] =
91 * uConnectionChannel - Channel to be set 91 * uConnectionChannel - Channel to be set
92 * Out: 92 * Out:
93 * none 93 * none
94 *
95 * Return Value: TRUE if succeeded; FALSE if failed.
96 *
97 */ 94 */
98BOOL CARDbSetMediaChannel(void *pDeviceHandler, unsigned int uConnectionChannel) 95void CARDbSetMediaChannel(void *pDeviceHandler, unsigned int uConnectionChannel)
99{ 96{
100PSDevice pDevice = (PSDevice) pDeviceHandler; 97PSDevice pDevice = (PSDevice) pDeviceHandler;
101BOOL bResult = TRUE;
102
103 98
104 if (pDevice->byBBType == BB_TYPE_11A) { // 15 ~ 38 99 if (pDevice->byBBType == BB_TYPE_11A) { // 15 ~ 38
105 if ((uConnectionChannel < (CB_MAX_CHANNEL_24G+1)) || (uConnectionChannel > CB_MAX_CHANNEL)) 100 if ((uConnectionChannel < (CB_MAX_CHANNEL_24G+1)) || (uConnectionChannel > CB_MAX_CHANNEL))
@@ -140,7 +135,6 @@ BOOL bResult = TRUE;
140 RFbRawSetPower(pDevice, pDevice->abyCCKPwrTbl[uConnectionChannel-1], RATE_1M); 135 RFbRawSetPower(pDevice, pDevice->abyCCKPwrTbl[uConnectionChannel-1], RATE_1M);
141 } 136 }
142 ControlvWriteByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_CHANNEL,(BYTE)(uConnectionChannel|0x80)); 137 ControlvWriteByte(pDevice,MESSAGE_REQUEST_MACREG,MAC_REG_CHANNEL,(BYTE)(uConnectionChannel|0x80));
143 return(bResult);
144} 138}
145 139
146/* 140/*
@@ -607,7 +601,7 @@ BYTE ii;
607 * Return Value: TRUE if succeeded; FALSE if failed. 601 * Return Value: TRUE if succeeded; FALSE if failed.
608 * 602 *
609 */ 603 */
610BOOL CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx) 604void CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx)
611{ 605{
612PSDevice pDevice = (PSDevice) pDeviceHandler; 606PSDevice pDevice = (PSDevice) pDeviceHandler;
613WORD wRate = (WORD)(1<<wRateIdx); 607WORD wRate = (WORD)(1<<wRateIdx);
@@ -616,8 +610,6 @@ WORD wRate = (WORD)(1<<wRateIdx);
616 610
617 //Determines the highest basic rate. 611 //Determines the highest basic rate.
618 CARDvUpdateBasicTopRate(pDevice); 612 CARDvUpdateBasicTopRate(pDevice);
619
620 return(TRUE);
621} 613}
622 614
623BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler) 615BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler)
@@ -1090,7 +1082,7 @@ CARDbChannelSwitch (
1090 1082
1091 if (byCount == 0) { 1083 if (byCount == 0) {
1092 pDevice->sMgmtObj.uCurrChannel = byNewChannel; 1084 pDevice->sMgmtObj.uCurrChannel = byNewChannel;
1093 bResult = CARDbSetMediaChannel(pDevice, byNewChannel); 1085 CARDbSetMediaChannel(pDevice, byNewChannel);
1094 1086
1095 return bResult; 1087 return bResult;
1096 } 1088 }
diff --git a/drivers/staging/vt6656/card.h b/drivers/staging/vt6656/card.h
index 6c91343d0d14..9cf71a3d8801 100644
--- a/drivers/staging/vt6656/card.h
+++ b/drivers/staging/vt6656/card.h
@@ -60,12 +60,12 @@ typedef enum _CARD_OP_MODE {
60 60
61/*--------------------- Export Functions --------------------------*/ 61/*--------------------- Export Functions --------------------------*/
62 62
63BOOL CARDbSetMediaChannel(void *pDeviceHandler, 63void CARDbSetMediaChannel(void *pDeviceHandler,
64 unsigned int uConnectionChannel); 64 unsigned int uConnectionChannel);
65void CARDvSetRSPINF(void *pDeviceHandler, BYTE byBBType); 65void CARDvSetRSPINF(void *pDeviceHandler, BYTE byBBType);
66void vUpdateIFS(void *pDeviceHandler); 66void vUpdateIFS(void *pDeviceHandler);
67void CARDvUpdateBasicTopRate(void *pDeviceHandler); 67void CARDvUpdateBasicTopRate(void *pDeviceHandler);
68BOOL CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx); 68void CARDbAddBasicRate(void *pDeviceHandler, WORD wRateIdx);
69BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler); 69BOOL CARDbIsOFDMinBasicRate(void *pDeviceHandler);
70void CARDvAdjustTSF(void *pDeviceHandler, BYTE byRxRate, 70void CARDvAdjustTSF(void *pDeviceHandler, BYTE byRxRate,
71 QWORD qwBSSTimestamp, QWORD qwLocalTSF); 71 QWORD qwBSSTimestamp, QWORD qwLocalTSF);
diff --git a/drivers/staging/vt6656/int.c b/drivers/staging/vt6656/int.c
index c95833ac58e0..0a114231145f 100644
--- a/drivers/staging/vt6656/int.c
+++ b/drivers/staging/vt6656/int.c
@@ -92,9 +92,8 @@ void INTvWorkItem(void *Context)
92 spin_unlock_irq(&pDevice->lock); 92 spin_unlock_irq(&pDevice->lock);
93} 93}
94 94
95int INTnsProcessData(PSDevice pDevice) 95void INTnsProcessData(PSDevice pDevice)
96{ 96{
97 int status = STATUS_SUCCESS;
98 PSINTData pINTData; 97 PSINTData pINTData;
99 PSMgmtObject pMgmt = &(pDevice->sMgmtObj); 98 PSMgmtObject pMgmt = &(pDevice->sMgmtObj);
100 struct net_device_stats *pStats = &pDevice->stats; 99 struct net_device_stats *pStats = &pDevice->stats;
@@ -218,6 +217,4 @@ int INTnsProcessData(PSDevice pDevice)
218 pDevice->scStatistic.ullTxBroadcastBytes; 217 pDevice->scStatistic.ullTxBroadcastBytes;
219 pStats->tx_errors = pDevice->scStatistic.dwTsrErr; 218 pStats->tx_errors = pDevice->scStatistic.dwTsrErr;
220 pStats->tx_dropped = pDevice->scStatistic.dwTsrErr; 219 pStats->tx_dropped = pDevice->scStatistic.dwTsrErr;
221
222 return status;
223} 220}
diff --git a/drivers/staging/vt6656/int.h b/drivers/staging/vt6656/int.h
index 3176c8d08d6d..a5d96b968176 100644
--- a/drivers/staging/vt6656/int.h
+++ b/drivers/staging/vt6656/int.h
@@ -68,6 +68,6 @@ SINTData, *PSINTData;
68/*--------------------- Export Functions --------------------------*/ 68/*--------------------- Export Functions --------------------------*/
69 69
70void INTvWorkItem(void *Context); 70void INTvWorkItem(void *Context);
71int INTnsProcessData(PSDevice pDevice); 71void INTnsProcessData(PSDevice pDevice);
72 72
73#endif /* __INT_H__ */ 73#endif /* __INT_H__ */
diff --git a/drivers/staging/vt6656/ioctl.c b/drivers/staging/vt6656/ioctl.c
index 49390026dea3..1463d76895f0 100644
--- a/drivers/staging/vt6656/ioctl.c
+++ b/drivers/staging/vt6656/ioctl.c
@@ -295,6 +295,10 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq)
295 result = -EFAULT; 295 result = -EFAULT;
296 break; 296 break;
297 } 297 }
298 if (sList.uItem > (ULONG_MAX - sizeof(SBSSIDList)) / sizeof(SBSSIDItem)) {
299 result = -EINVAL;
300 break;
301 }
298 pList = (PSBSSIDList)kmalloc(sizeof(SBSSIDList) + (sList.uItem * sizeof(SBSSIDItem)), (int)GFP_ATOMIC); 302 pList = (PSBSSIDList)kmalloc(sizeof(SBSSIDList) + (sList.uItem * sizeof(SBSSIDItem)), (int)GFP_ATOMIC);
299 if (pList == NULL) { 303 if (pList == NULL) {
300 result = -ENOMEM; 304 result = -ENOMEM;
@@ -557,6 +561,10 @@ int private_ioctl(PSDevice pDevice, struct ifreq *rq)
557 result = -EFAULT; 561 result = -EFAULT;
558 break; 562 break;
559 } 563 }
564 if (sNodeList.uItem > (ULONG_MAX - sizeof(SNodeList)) / sizeof(SNodeItem)) {
565 result = -ENOMEM;
566 break;
567 }
560 pNodeList = (PSNodeList)kmalloc(sizeof(SNodeList) + (sNodeList.uItem * sizeof(SNodeItem)), (int)GFP_ATOMIC); 568 pNodeList = (PSNodeList)kmalloc(sizeof(SNodeList) + (sNodeList.uItem * sizeof(SNodeItem)), (int)GFP_ATOMIC);
561 if (pNodeList == NULL) { 569 if (pNodeList == NULL) {
562 result = -ENOMEM; 570 result = -ENOMEM;
diff --git a/drivers/staging/vt6656/iwctl.c b/drivers/staging/vt6656/iwctl.c
index 2121205a912b..ecfda5272fa1 100644
--- a/drivers/staging/vt6656/iwctl.c
+++ b/drivers/staging/vt6656/iwctl.c
@@ -128,17 +128,6 @@ int iwctl_giwname(struct net_device *dev,
128 return 0; 128 return 0;
129} 129}
130 130
131int iwctl_giwnwid(struct net_device *dev,
132 struct iw_request_info *info,
133 struct iw_param *wrq,
134 char *extra)
135{
136 //wrq->value = 0x100;
137 //wrq->disabled = 0;
138 //wrq->fixed = 1;
139 //return 0;
140 return -EOPNOTSUPP;
141}
142/* 131/*
143 * Wireless Handler : set scan 132 * Wireless Handler : set scan
144 */ 133 */
@@ -1939,7 +1928,6 @@ static const iw_handler iwctl_handler[] =
1939 (iw_handler) iwctl_commit, // SIOCSIWCOMMIT 1928 (iw_handler) iwctl_commit, // SIOCSIWCOMMIT
1940 (iw_handler) iwctl_giwname, // SIOCGIWNAME 1929 (iw_handler) iwctl_giwname, // SIOCGIWNAME
1941 (iw_handler) NULL, // SIOCSIWNWID 1930 (iw_handler) NULL, // SIOCSIWNWID
1942 (iw_handler) NULL, // SIOCGIWNWID
1943 (iw_handler) iwctl_siwfreq, // SIOCSIWFREQ 1931 (iw_handler) iwctl_siwfreq, // SIOCSIWFREQ
1944 (iw_handler) iwctl_giwfreq, // SIOCGIWFREQ 1932 (iw_handler) iwctl_giwfreq, // SIOCGIWFREQ
1945 (iw_handler) iwctl_siwmode, // SIOCSIWMODE 1933 (iw_handler) iwctl_siwmode, // SIOCSIWMODE
diff --git a/drivers/staging/vt6656/iwctl.h b/drivers/staging/vt6656/iwctl.h
index cc48954783fc..10a240e65012 100644
--- a/drivers/staging/vt6656/iwctl.h
+++ b/drivers/staging/vt6656/iwctl.h
@@ -77,11 +77,6 @@ int iwctl_giwname(struct net_device *dev,
77 char *wrq, 77 char *wrq,
78 char *extra); 78 char *extra);
79 79
80int iwctl_giwnwid(struct net_device *dev,
81 struct iw_request_info *info,
82 struct iw_param *wrq,
83 char *extra) ;
84
85int iwctl_giwsens(struct net_device *dev, 80int iwctl_giwsens(struct net_device *dev,
86 struct iw_request_info *info, 81 struct iw_request_info *info,
87 struct iw_param *wrq, 82 struct iw_param *wrq,
diff --git a/drivers/staging/vt6656/mac.c b/drivers/staging/vt6656/mac.c
index 26c19d1408c4..af4a29d14775 100644
--- a/drivers/staging/vt6656/mac.c
+++ b/drivers/staging/vt6656/mac.c
@@ -133,10 +133,9 @@ void MACvWriteMultiAddr(PSDevice pDevice, unsigned int uByteIdx, BYTE byData)
133 * Out: 133 * Out:
134 * none 134 * none
135 * 135 *
136 * Return Value: TRUE if success; otherwise FALSE
137 * 136 *
138 */ 137 */
139BOOL MACbShutdown (PSDevice pDevice) 138void MACbShutdown(PSDevice pDevice)
140{ 139{
141 CONTROLnsRequestOutAsyn(pDevice, 140 CONTROLnsRequestOutAsyn(pDevice,
142 MESSAGE_TYPE_MACSHUTDOWN, 141 MESSAGE_TYPE_MACSHUTDOWN,
@@ -145,7 +144,6 @@ BOOL MACbShutdown (PSDevice pDevice)
145 0, 144 0,
146 NULL 145 NULL
147 ); 146 );
148 return TRUE;
149} 147}
150 148
151void MACvSetBBType(PSDevice pDevice,BYTE byType) 149void MACvSetBBType(PSDevice pDevice,BYTE byType)
diff --git a/drivers/staging/vt6656/mac.h b/drivers/staging/vt6656/mac.h
index 491ff5ecd04b..147ac50218d3 100644
--- a/drivers/staging/vt6656/mac.h
+++ b/drivers/staging/vt6656/mac.h
@@ -422,7 +422,7 @@
422 422
423void MACvSetMultiAddrByHash(PSDevice pDevice, BYTE byHashIdx); 423void MACvSetMultiAddrByHash(PSDevice pDevice, BYTE byHashIdx);
424void MACvWriteMultiAddr(PSDevice pDevice, unsigned int uByteIdx, BYTE byData); 424void MACvWriteMultiAddr(PSDevice pDevice, unsigned int uByteIdx, BYTE byData);
425BOOL MACbShutdown(PSDevice pDevice); 425void MACbShutdown(PSDevice pDevice);
426void MACvSetBBType(PSDevice pDevice, BYTE byType); 426void MACvSetBBType(PSDevice pDevice, BYTE byType);
427void MACvSetMISCFifo(PSDevice pDevice, WORD wOffset, DWORD dwData); 427void MACvSetMISCFifo(PSDevice pDevice, WORD wOffset, DWORD dwData);
428void MACvDisableKeyEntry(PSDevice pDevice, unsigned int uEntryIdx); 428void MACvDisableKeyEntry(PSDevice pDevice, unsigned int uEntryIdx);
diff --git a/drivers/staging/vt6656/main_usb.c b/drivers/staging/vt6656/main_usb.c
index 541f9aa8ef6d..6a708f447651 100644
--- a/drivers/staging/vt6656/main_usb.c
+++ b/drivers/staging/vt6656/main_usb.c
@@ -900,7 +900,7 @@ static BOOL device_alloc_bufs(PSDevice pDevice) {
900 } 900 }
901 901
902 // allocate rcb mem 902 // allocate rcb mem
903 pDevice->pRCBMem = kmalloc((sizeof(RCB) * pDevice->cbRD), GFP_KERNEL); 903 pDevice->pRCBMem = kzalloc((sizeof(RCB) * pDevice->cbRD), GFP_KERNEL);
904 if (pDevice->pRCBMem == NULL) { 904 if (pDevice->pRCBMem == NULL) {
905 DBG_PRT(MSG_LEVEL_ERR,KERN_ERR "%s : alloc rx usb context failed\n", pDevice->dev->name); 905 DBG_PRT(MSG_LEVEL_ERR,KERN_ERR "%s : alloc rx usb context failed\n", pDevice->dev->name);
906 goto free_tx; 906 goto free_tx;
@@ -912,7 +912,6 @@ static BOOL device_alloc_bufs(PSDevice pDevice) {
912 pDevice->FirstRecvMngList = NULL; 912 pDevice->FirstRecvMngList = NULL;
913 pDevice->LastRecvMngList = NULL; 913 pDevice->LastRecvMngList = NULL;
914 pDevice->NumRecvFreeList = 0; 914 pDevice->NumRecvFreeList = 0;
915 memset(pDevice->pRCBMem, 0, (sizeof(RCB) * pDevice->cbRD));
916 pRCB = (PRCB) pDevice->pRCBMem; 915 pRCB = (PRCB) pDevice->pRCBMem;
917 916
918 for (ii = 0; ii < pDevice->cbRD; ii++) { 917 for (ii = 0; ii < pDevice->cbRD; ii++) {
@@ -1618,15 +1617,8 @@ static int device_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) {
1618 break; 1617 break;
1619 1618
1620 case SIOCSIWNWID: 1619 case SIOCSIWNWID:
1621 rc = -EOPNOTSUPP;
1622 break;
1623
1624 case SIOCGIWNWID: //0x8b03 support 1620 case SIOCGIWNWID: //0x8b03 support
1625 #ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 1621 rc = -EOPNOTSUPP;
1626 rc = iwctl_giwnwid(dev, NULL, &(wrq->u.nwid), NULL);
1627 #else
1628 rc = -EOPNOTSUPP;
1629 #endif
1630 break; 1622 break;
1631 1623
1632 // Set frequency/channel 1624 // Set frequency/channel
diff --git a/drivers/staging/wlags49_h2/wl_pci.c b/drivers/staging/wlags49_h2/wl_pci.c
index 1f1d98679171..2bd9b84ace8e 100644
--- a/drivers/staging/wlags49_h2/wl_pci.c
+++ b/drivers/staging/wlags49_h2/wl_pci.c
@@ -112,17 +112,10 @@ extern dbg_info_t *DbgInfo;
112#endif // DBG 112#endif // DBG
113 113
114/* define the PCI device Table Cardname and id tables */ 114/* define the PCI device Table Cardname and id tables */
115enum hermes_pci_versions {
116 CH_Agere_Systems_Mini_PCI_V1 = 0,
117};
118
119static struct pci_device_id wl_pci_tbl[] __devinitdata = { 115static struct pci_device_id wl_pci_tbl[] __devinitdata = {
120 { PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_0, 116 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_0), },
121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Agere_Systems_Mini_PCI_V1 }, 117 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_1), },
122 { PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_1, 118 { PCI_DEVICE(PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_2), },
123 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Agere_Systems_Mini_PCI_V1 },
124 { PCI_VENDOR_ID_WL_LKM, PCI_DEVICE_ID_WL_LKM_2,
125 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Agere_Systems_Mini_PCI_V1 },
126 119
127 { } /* Terminating entry */ 120 { } /* Terminating entry */
128}; 121};
diff --git a/drivers/staging/xgifb/Makefile b/drivers/staging/xgifb/Makefile
index 3c8c7de9eadd..55e519905346 100644
--- a/drivers/staging/xgifb/Makefile
+++ b/drivers/staging/xgifb/Makefile
@@ -1,4 +1,4 @@
1obj-$(CONFIG_FB_XGI) += xgifb.o 1obj-$(CONFIG_FB_XGI) += xgifb.o
2 2
3xgifb-y := XGI_main_26.o vb_init.o vb_setmode.o vb_util.o vb_ext.o 3xgifb-y := XGI_main_26.o vb_init.o vb_setmode.o vb_util.o
4 4
diff --git a/drivers/staging/xgifb/XGI_main.h b/drivers/staging/xgifb/XGI_main.h
index 71aebe3e84d8..35f7b2a485e1 100644
--- a/drivers/staging/xgifb/XGI_main.h
+++ b/drivers/staging/xgifb/XGI_main.h
@@ -32,14 +32,10 @@
32#endif 32#endif
33 33
34static DEFINE_PCI_DEVICE_TABLE(xgifb_pci_table) = { 34static DEFINE_PCI_DEVICE_TABLE(xgifb_pci_table) = {
35 {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_20, PCI_ANY_ID, PCI_ANY_ID, 35 {PCI_DEVICE(PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_20)},
36 0, 0, 0}, 36 {PCI_DEVICE(PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_27)},
37 {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_27, PCI_ANY_ID, PCI_ANY_ID, 37 {PCI_DEVICE(PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_40)},
38 0, 0, 1}, 38 {PCI_DEVICE(PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_42)},
39 {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_40, PCI_ANY_ID, PCI_ANY_ID,
40 0, 0, 2},
41 {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_42, PCI_ANY_ID, PCI_ANY_ID,
42 0, 0, 3},
43 {0} 39 {0}
44}; 40};
45 41
@@ -128,7 +124,6 @@ MODULE_DEVICE_TABLE(pci, xgifb_pci_table);
128/* display status */ 124/* display status */
129static int XGIfb_crt1off; 125static int XGIfb_crt1off;
130static int XGIfb_forcecrt1 = -1; 126static int XGIfb_forcecrt1 = -1;
131static int XGIfb_userom ;
132 127
133/* global flags */ 128/* global flags */
134static int XGIfb_tvmode; 129static int XGIfb_tvmode;
diff --git a/drivers/staging/xgifb/XGI_main_26.c b/drivers/staging/xgifb/XGI_main_26.c
index 277e408c39c5..2502c49c9c5b 100644
--- a/drivers/staging/xgifb/XGI_main_26.c
+++ b/drivers/staging/xgifb/XGI_main_26.c
@@ -21,7 +21,6 @@
21#include <linux/ioport.h> 21#include <linux/ioport.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/vmalloc.h>
25#include <linux/vt_kern.h> 24#include <linux/vt_kern.h>
26#include <linux/capability.h> 25#include <linux/capability.h>
27#include <linux/fs.h> 26#include <linux/fs.h>
@@ -46,8 +45,7 @@
46#define GPIOG_EN (1<<6) 45#define GPIOG_EN (1<<6)
47#define GPIOG_READ (1<<1) 46#define GPIOG_READ (1<<1)
48 47
49#define XGIFB_ROM_SIZE 65536 48static char *forcecrt2type;
50
51static char *mode; 49static char *mode;
52static int vesa = -1; 50static int vesa = -1;
53static unsigned int refresh_rate; 51static unsigned int refresh_rate;
@@ -159,7 +157,6 @@ static int XGIfb_mode_rate_to_dclock(struct vb_device_info *XGI_Pr,
159 157
160 /* unsigned long temp = 0; */ 158 /* unsigned long temp = 0; */
161 int Clock; 159 int Clock;
162 XGI_Pr->ROMAddr = HwDeviceExtension->pjVirtualRomBase;
163 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr); 160 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
164 161
165 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, 162 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
@@ -199,7 +196,6 @@ static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
199 unsigned char sr_data, cr_data, cr_data2; 196 unsigned char sr_data, cr_data, cr_data2;
200 unsigned long cr_data3; 197 unsigned long cr_data3;
201 int A, B, C, D, E, F, temp, j; 198 int A, B, C, D, E, F, temp, j;
202 XGI_Pr->ROMAddr = HwDeviceExtension->pjVirtualRomBase;
203 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr); 199 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
204 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, 200 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
205 ModeIdIndex, XGI_Pr); 201 ModeIdIndex, XGI_Pr);
@@ -387,7 +383,7 @@ static void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr)
387 383
388/* ------------------ Internal helper routines ----------------- */ 384/* ------------------ Internal helper routines ----------------- */
389 385
390static int XGIfb_GetXG21DefaultLVDSModeIdx(void) 386static int XGIfb_GetXG21DefaultLVDSModeIdx(struct xgifb_video_info *xgifb_info)
391{ 387{
392 388
393 int found_mode = 0; 389 int found_mode = 0;
@@ -396,11 +392,11 @@ static int XGIfb_GetXG21DefaultLVDSModeIdx(void)
396 found_mode = 0; 392 found_mode = 0;
397 while ((XGIbios_mode[XGIfb_mode_idx].mode_no != 0) 393 while ((XGIbios_mode[XGIfb_mode_idx].mode_no != 0)
398 && (XGIbios_mode[XGIfb_mode_idx].xres 394 && (XGIbios_mode[XGIfb_mode_idx].xres
399 <= XGI21_LCDCapList[0].LVDSHDE)) { 395 <= xgifb_info->lvds_data.LVDSHDE)) {
400 if ((XGIbios_mode[XGIfb_mode_idx].xres 396 if ((XGIbios_mode[XGIfb_mode_idx].xres
401 == XGI21_LCDCapList[0].LVDSHDE) 397 == xgifb_info->lvds_data.LVDSHDE)
402 && (XGIbios_mode[XGIfb_mode_idx].yres 398 && (XGIbios_mode[XGIfb_mode_idx].yres
403 == XGI21_LCDCapList[0].LVDSVDE) 399 == xgifb_info->lvds_data.LVDSVDE)
404 && (XGIbios_mode[XGIfb_mode_idx].bpp == 8)) { 400 && (XGIbios_mode[XGIfb_mode_idx].bpp == 8)) {
405 found_mode = 1; 401 found_mode = 1;
406 break; 402 break;
@@ -456,51 +452,6 @@ invalid:
456 printk(KERN_INFO "XGIfb: Invalid VESA mode 0x%x'\n", vesamode); 452 printk(KERN_INFO "XGIfb: Invalid VESA mode 0x%x'\n", vesamode);
457} 453}
458 454
459static int XGIfb_GetXG21LVDSData(struct xgifb_video_info *xgifb_info)
460{
461 u8 tmp;
462 void __iomem *data = xgifb_info->mmio_vbase + 0x20000;
463 int i, j, k;
464
465 tmp = xgifb_reg_get(XGISR, 0x1e);
466 xgifb_reg_set(XGISR, 0x1e, tmp | 4);
467
468 if ((readb(data) == 0x55) &&
469 (readb(data + 1) == 0xAA) &&
470 (readb(data + 0x65) & 0x1)) {
471 i = readw(data + 0x316);
472 j = readb(data + i - 1);
473 if (j == 0xff)
474 j = 1;
475
476 k = 0;
477 do {
478 XGI21_LCDCapList[k].LVDS_Capability = readw(data + i);
479 XGI21_LCDCapList[k].LVDSHT = readw(data + i + 2);
480 XGI21_LCDCapList[k].LVDSVT = readw(data + i + 4);
481 XGI21_LCDCapList[k].LVDSHDE = readw(data + i + 6);
482 XGI21_LCDCapList[k].LVDSVDE = readw(data + i + 8);
483 XGI21_LCDCapList[k].LVDSHFP = readw(data + i + 10);
484 XGI21_LCDCapList[k].LVDSVFP = readw(data + i + 12);
485 XGI21_LCDCapList[k].LVDSHSYNC = readw(data + i + 14);
486 XGI21_LCDCapList[k].LVDSVSYNC = readw(data + i + 16);
487 XGI21_LCDCapList[k].VCLKData1 = readb(data + i + 18);
488 XGI21_LCDCapList[k].VCLKData2 = readb(data + i + 19);
489 XGI21_LCDCapList[k].PSC_S1 = readb(data + i + 20);
490 XGI21_LCDCapList[k].PSC_S2 = readb(data + i + 21);
491 XGI21_LCDCapList[k].PSC_S3 = readb(data + i + 22);
492 XGI21_LCDCapList[k].PSC_S4 = readb(data + i + 23);
493 XGI21_LCDCapList[k].PSC_S5 = readb(data + i + 24);
494 i += 25;
495 j--;
496 k++;
497 } while ((j > 0) && (k < (sizeof(XGI21_LCDCapList)
498 / sizeof(struct XGI21_LVDSCapStruct))));
499 return 1;
500 }
501 return 0;
502}
503
504static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex) 455static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex)
505{ 456{
506 u16 xres, yres; 457 u16 xres, yres;
@@ -508,8 +459,8 @@ static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex)
508 459
509 if (xgifb_info->chip == XG21) { 460 if (xgifb_info->chip == XG21) {
510 if (xgifb_info->display2 == XGIFB_DISP_LCD) { 461 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
511 xres = XGI21_LCDCapList[0].LVDSHDE; 462 xres = xgifb_info->lvds_data.LVDSHDE;
512 yres = XGI21_LCDCapList[0].LVDSVDE; 463 yres = xgifb_info->lvds_data.LVDSVDE;
513 if (XGIbios_mode[myindex].xres > xres) 464 if (XGIbios_mode[myindex].xres > xres)
514 return -1; 465 return -1;
515 if (XGIbios_mode[myindex].yres > yres) 466 if (XGIbios_mode[myindex].yres > yres)
@@ -1223,7 +1174,7 @@ static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
1223 if (isactive) { 1174 if (isactive) {
1224 1175
1225 XGIfb_pre_setmode(xgifb_info); 1176 XGIfb_pre_setmode(xgifb_info);
1226 if (XGISetModeNew(hw_info, 1177 if (XGISetModeNew(xgifb_info, hw_info,
1227 XGIbios_mode[xgifb_info->mode_idx].mode_no) 1178 XGIbios_mode[xgifb_info->mode_idx].mode_no)
1228 == 0) { 1179 == 0) {
1229 printk(KERN_ERR "XGIfb: Setting mode[0x%x] failed\n", 1180 printk(KERN_ERR "XGIfb: Setting mode[0x%x] failed\n",
@@ -1794,17 +1745,16 @@ static void XGIfb_detect_VB(struct xgifb_video_info *xgifb_info)
1794 XGIfb_crt1off = 0; 1745 XGIfb_crt1off = 0;
1795 } 1746 }
1796 1747
1797 if (XGIfb_crt2type != -1) 1748 if (!xgifb_info->display2_force) {
1798 /* TW: Override with option */ 1749 if (cr32 & XGI_VB_TV)
1799 xgifb_info->display2 = XGIfb_crt2type; 1750 xgifb_info->display2 = XGIFB_DISP_TV;
1800 else if (cr32 & XGI_VB_TV) 1751 else if (cr32 & XGI_VB_LCD)
1801 xgifb_info->display2 = XGIFB_DISP_TV; 1752 xgifb_info->display2 = XGIFB_DISP_LCD;
1802 else if (cr32 & XGI_VB_LCD) 1753 else if (cr32 & XGI_VB_CRT2)
1803 xgifb_info->display2 = XGIFB_DISP_LCD; 1754 xgifb_info->display2 = XGIFB_DISP_CRT;
1804 else if (cr32 & XGI_VB_CRT2) 1755 else
1805 xgifb_info->display2 = XGIFB_DISP_CRT; 1756 xgifb_info->display2 = XGIFB_DISP_NONE;
1806 else 1757 }
1807 xgifb_info->display2 = XGIFB_DISP_NONE;
1808 1758
1809 if (XGIfb_tvplug != -1) 1759 if (XGIfb_tvplug != -1)
1810 /* PR/TW: Override with option */ 1760 /* PR/TW: Override with option */
@@ -1925,8 +1875,6 @@ static int __init XGIfb_setup(char *options)
1925 XGIfb_crt2type = XGIFB_DISP_LCD; 1875 XGIfb_crt2type = XGIFB_DISP_LCD;
1926 } else if (!strncmp(this_opt, "noypan", 6)) { 1876 } else if (!strncmp(this_opt, "noypan", 6)) {
1927 XGIfb_ypan = 0; 1877 XGIfb_ypan = 0;
1928 } else if (!strncmp(this_opt, "userom:", 7)) {
1929 XGIfb_userom = xgifb_optval(this_opt, 7);
1930 } else { 1878 } else {
1931 mode = this_opt; 1879 mode = this_opt;
1932 } 1880 }
@@ -1934,35 +1882,12 @@ static int __init XGIfb_setup(char *options)
1934 return 0; 1882 return 0;
1935} 1883}
1936 1884
1937static unsigned char *xgifb_copy_rom(struct pci_dev *dev)
1938{
1939 void __iomem *rom_address;
1940 unsigned char *rom_copy;
1941 size_t rom_size;
1942
1943 rom_address = pci_map_rom(dev, &rom_size);
1944 if (rom_address == NULL)
1945 return NULL;
1946
1947 rom_copy = vzalloc(XGIFB_ROM_SIZE);
1948 if (rom_copy == NULL)
1949 goto done;
1950
1951 rom_size = min_t(size_t, rom_size, XGIFB_ROM_SIZE);
1952 memcpy_fromio(rom_copy, rom_address, rom_size);
1953
1954done:
1955 pci_unmap_rom(dev, rom_address);
1956 return rom_copy;
1957}
1958
1959static int __devinit xgifb_probe(struct pci_dev *pdev, 1885static int __devinit xgifb_probe(struct pci_dev *pdev,
1960 const struct pci_device_id *ent) 1886 const struct pci_device_id *ent)
1961{ 1887{
1962 u8 reg, reg1; 1888 u8 reg, reg1;
1963 u8 CR48, CR38; 1889 u8 CR48, CR38;
1964 int ret; 1890 int ret;
1965 bool xgi21_drvlcdcaplist = false;
1966 struct fb_info *fb_info; 1891 struct fb_info *fb_info;
1967 struct xgifb_video_info *xgifb_info; 1892 struct xgifb_video_info *xgifb_info;
1968 struct xgi_hw_device_info *hw_info; 1893 struct xgi_hw_device_info *hw_info;
@@ -2001,6 +1926,11 @@ static int __devinit xgifb_probe(struct pci_dev *pdev,
2001 goto error; 1926 goto error;
2002 } 1927 }
2003 1928
1929 if (XGIfb_crt2type != -1) {
1930 xgifb_info->display2 = XGIfb_crt2type;
1931 xgifb_info->display2_force = true;
1932 }
1933
2004 XGIRegInit(&xgifb_info->dev_info, (unsigned long)hw_info->pjIOAddress); 1934 XGIRegInit(&xgifb_info->dev_info, (unsigned long)hw_info->pjIOAddress);
2005 1935
2006 xgifb_reg_set(XGISR, IND_XGI_PASSWORD, XGI_PASSWORD); 1936 xgifb_reg_set(XGISR, IND_XGI_PASSWORD, XGI_PASSWORD);
@@ -2041,18 +1971,6 @@ static int __devinit xgifb_probe(struct pci_dev *pdev,
2041 printk("XGIfb:chipid = %x\n", xgifb_info->chip); 1971 printk("XGIfb:chipid = %x\n", xgifb_info->chip);
2042 hw_info->jChipType = xgifb_info->chip; 1972 hw_info->jChipType = xgifb_info->chip;
2043 1973
2044 if ((xgifb_info->chip == XG21) || (XGIfb_userom)) {
2045 hw_info->pjVirtualRomBase = xgifb_copy_rom(pdev);
2046 if (hw_info->pjVirtualRomBase)
2047 printk(KERN_INFO "XGIfb: Video ROM found and mapped to %p\n",
2048 hw_info->pjVirtualRomBase);
2049 else
2050 printk(KERN_INFO "XGIfb: Video ROM not found\n");
2051 } else {
2052 hw_info->pjVirtualRomBase = NULL;
2053 printk(KERN_INFO "XGIfb: Video ROM usage disabled\n");
2054 }
2055
2056 if (XGIfb_get_dram_size(xgifb_info)) { 1974 if (XGIfb_get_dram_size(xgifb_info)) {
2057 printk(KERN_INFO "XGIfb: Fatal error: Unable to determine RAM size.\n"); 1975 printk(KERN_INFO "XGIfb: Fatal error: Unable to determine RAM size.\n");
2058 ret = -ENODEV; 1976 ret = -ENODEV;
@@ -2117,8 +2035,6 @@ static int __devinit xgifb_probe(struct pci_dev *pdev,
2117 CR38 = xgifb_reg_get(XGICR, 0x38); 2035 CR38 = xgifb_reg_get(XGICR, 0x38);
2118 if ((CR38&0xE0) == 0xC0) { 2036 if ((CR38&0xE0) == 0xC0) {
2119 xgifb_info->display2 = XGIFB_DISP_LCD; 2037 xgifb_info->display2 = XGIFB_DISP_LCD;
2120 if (!XGIfb_GetXG21LVDSData(xgifb_info))
2121 xgi21_drvlcdcaplist = true;
2122 } else if ((CR38&0xE0) == 0x60) { 2038 } else if ((CR38&0xE0) == 0x60) {
2123 xgifb_info->hasVB = HASVB_CHRONTEL; 2039 xgifb_info->hasVB = HASVB_CHRONTEL;
2124 } else { 2040 } else {
@@ -2193,6 +2109,8 @@ static int __devinit xgifb_probe(struct pci_dev *pdev,
2193 2109
2194 if (xgifb_info->hasVB != HASVB_NONE) 2110 if (xgifb_info->hasVB != HASVB_NONE)
2195 XGIfb_detect_VB(xgifb_info); 2111 XGIfb_detect_VB(xgifb_info);
2112 else if (xgifb_info->chip != XG21)
2113 xgifb_info->display2 = XGIFB_DISP_NONE;
2196 2114
2197 if (xgifb_info->display2 == XGIFB_DISP_LCD) { 2115 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
2198 if (!enable_dstn) { 2116 if (!enable_dstn) {
@@ -2254,7 +2172,7 @@ static int __devinit xgifb_probe(struct pci_dev *pdev,
2254 if (xgifb_info->display2 == XGIFB_DISP_LCD && 2172 if (xgifb_info->display2 == XGIFB_DISP_LCD &&
2255 xgifb_info->chip == XG21) 2173 xgifb_info->chip == XG21)
2256 xgifb_info->mode_idx = 2174 xgifb_info->mode_idx =
2257 XGIfb_GetXG21DefaultLVDSModeIdx(); 2175 XGIfb_GetXG21DefaultLVDSModeIdx(xgifb_info);
2258 else 2176 else
2259 xgifb_info->mode_idx = DEFAULT_MODE; 2177 xgifb_info->mode_idx = DEFAULT_MODE;
2260 } 2178 }
@@ -2264,21 +2182,6 @@ static int __devinit xgifb_probe(struct pci_dev *pdev,
2264 goto error_1; 2182 goto error_1;
2265 } 2183 }
2266 2184
2267 if (xgi21_drvlcdcaplist) {
2268 int m;
2269
2270 for (m = 0; m < ARRAY_SIZE(XGI21_LCDCapList); m++)
2271 if ((XGI21_LCDCapList[m].LVDSHDE ==
2272 XGIbios_mode[xgifb_info->mode_idx].xres) &&
2273 (XGI21_LCDCapList[m].LVDSVDE ==
2274 XGIbios_mode[xgifb_info->mode_idx].yres)) {
2275 xgifb_reg_set(xgifb_info->dev_info.P3d4,
2276 0x36,
2277 m);
2278 break;
2279 }
2280 }
2281
2282 /* yilin set default refresh rate */ 2185 /* yilin set default refresh rate */
2283 xgifb_info->refresh_rate = refresh_rate; 2186 xgifb_info->refresh_rate = refresh_rate;
2284 if (xgifb_info->refresh_rate == 0) 2187 if (xgifb_info->refresh_rate == 0)
@@ -2418,7 +2321,6 @@ error_1:
2418error_0: 2321error_0:
2419 release_mem_region(xgifb_info->video_base, xgifb_info->video_size); 2322 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
2420error: 2323error:
2421 vfree(hw_info->pjVirtualRomBase);
2422 framebuffer_release(fb_info); 2324 framebuffer_release(fb_info);
2423 return ret; 2325 return ret;
2424} 2326}
@@ -2442,7 +2344,6 @@ static void __devexit xgifb_remove(struct pci_dev *pdev)
2442 iounmap(xgifb_info->video_vbase); 2344 iounmap(xgifb_info->video_vbase);
2443 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size); 2345 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
2444 release_mem_region(xgifb_info->video_base, xgifb_info->video_size); 2346 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
2445 vfree(xgifb_info->hw_info.pjVirtualRomBase);
2446 framebuffer_release(fb_info); 2347 framebuffer_release(fb_info);
2447 pci_set_drvdata(pdev, NULL); 2348 pci_set_drvdata(pdev, NULL);
2448} 2349}
@@ -2458,6 +2359,8 @@ static int __init xgifb_init(void)
2458{ 2359{
2459 char *option = NULL; 2360 char *option = NULL;
2460 2361
2362 if (forcecrt2type != NULL)
2363 XGIfb_search_crt2type(forcecrt2type);
2461 if (fb_get_options("xgifb", &option)) 2364 if (fb_get_options("xgifb", &option))
2462 return -ENODEV; 2365 return -ENODEV;
2463 XGIfb_setup(option); 2366 XGIfb_setup(option);
@@ -2480,6 +2383,11 @@ MODULE_AUTHOR("XGITECH , Others");
2480module_param(mode, charp, 0); 2383module_param(mode, charp, 0);
2481module_param(vesa, int, 0); 2384module_param(vesa, int, 0);
2482module_param(filter, int, 0); 2385module_param(filter, int, 0);
2386module_param(forcecrt2type, charp, 0);
2387
2388MODULE_PARM_DESC(forcecrt2type,
2389 "\nForce the second display output type. Possible values are NONE,\n"
2390 "LCD, TV, VGA, SVIDEO or COMPOSITE.\n");
2483 2391
2484MODULE_PARM_DESC(mode, 2392MODULE_PARM_DESC(mode,
2485 "\nSelects the desired default display mode in the format XxYxDepth,\n" 2393 "\nSelects the desired default display mode in the format XxYxDepth,\n"
diff --git a/drivers/staging/xgifb/XGIfb.h b/drivers/staging/xgifb/XGIfb.h
index 7611846a7039..2c866bb65a00 100644
--- a/drivers/staging/xgifb/XGIfb.h
+++ b/drivers/staging/xgifb/XGIfb.h
@@ -86,10 +86,13 @@ struct xgifb_video_info {
86 unsigned int refresh_rate; 86 unsigned int refresh_rate;
87 87
88 enum xgifb_display_type display2; /* the second display output type */ 88 enum xgifb_display_type display2; /* the second display output type */
89 bool display2_force;
89 unsigned char hasVB; 90 unsigned char hasVB;
90 unsigned char TV_type; 91 unsigned char TV_type;
91 unsigned char TV_plug; 92 unsigned char TV_plug;
92 93
94 struct XGI21_LVDSCapStruct lvds_data;
95
93 enum XGI_CHIP_TYPE chip; 96 enum XGI_CHIP_TYPE chip;
94 unsigned char revision_id; 97 unsigned char revision_id;
95 98
diff --git a/drivers/staging/xgifb/vb_ext.c b/drivers/staging/xgifb/vb_ext.c
deleted file mode 100644
index b1a25730b7ca..000000000000
--- a/drivers/staging/xgifb/vb_ext.c
+++ /dev/null
@@ -1,444 +0,0 @@
1#include <linux/io.h>
2#include <linux/types.h>
3#include "XGIfb.h"
4
5#include "vb_def.h"
6#include "vgatypes.h"
7#include "vb_struct.h"
8#include "vb_util.h"
9#include "vb_setmode.h"
10#include "vb_ext.h"
11
12/**************************************************************
13 *********************** Dynamic Sense ************************
14 *************************************************************/
15
16static unsigned char XGINew_Is301B(struct vb_device_info *pVBInfo)
17{
18 unsigned short flag;
19
20 flag = xgifb_reg_get(pVBInfo->Part4Port, 0x01);
21
22 if (flag > 0x0B0)
23 return 0; /* 301b */
24 else
25 return 1;
26}
27
28static unsigned char XGINew_Sense(unsigned short tempbx,
29 unsigned short tempcx,
30 struct vb_device_info *pVBInfo)
31{
32 unsigned short temp, i, tempch;
33
34 temp = tempbx & 0xFF;
35 xgifb_reg_set(pVBInfo->Part4Port, 0x11, temp);
36 temp = (tempbx & 0xFF00) >> 8;
37 temp |= (tempcx & 0x00FF);
38 xgifb_reg_and_or(pVBInfo->Part4Port, 0x10, ~0x1F, temp);
39
40 for (i = 0; i < 10; i++)
41 XGI_LongWait(pVBInfo);
42
43 tempch = (tempcx & 0x7F00) >> 8;
44 temp = xgifb_reg_get(pVBInfo->Part4Port, 0x03);
45 temp = temp ^ (0x0E);
46 temp &= tempch;
47
48 if (temp > 0)
49 return 1;
50 else
51 return 0;
52}
53
54static unsigned char
55XGINew_GetLCDDDCInfo(struct xgi_hw_device_info *HwDeviceExtension,
56 struct vb_device_info *pVBInfo)
57{
58 unsigned short temp;
59
60 /* add lcd sense */
61 if (HwDeviceExtension->ulCRT2LCDType == LCD_UNKNOWN) {
62 return 0;
63 } else {
64 temp = (unsigned short) HwDeviceExtension->ulCRT2LCDType;
65 switch (HwDeviceExtension->ulCRT2LCDType) {
66 case LCD_INVALID:
67 case LCD_800x600:
68 case LCD_1024x768:
69 case LCD_1280x1024:
70 break;
71
72 case LCD_640x480:
73 case LCD_1024x600:
74 case LCD_1152x864:
75 case LCD_1280x960:
76 case LCD_1152x768:
77 temp = 0;
78 break;
79
80 case LCD_1400x1050:
81 case LCD_1280x768:
82 case LCD_1600x1200:
83 break;
84
85 case LCD_1920x1440:
86 case LCD_2048x1536:
87 temp = 0;
88 break;
89
90 default:
91 break;
92 }
93 xgifb_reg_and_or(pVBInfo->P3d4, 0x36, 0xF0, temp);
94 return 1;
95 }
96}
97
98static unsigned char XGINew_GetPanelID(struct vb_device_info *pVBInfo)
99{
100 unsigned short PanelTypeTable[16] = { SyncNN | PanelRGB18Bit
101 | Panel800x600 | _PanelType00, SyncNN | PanelRGB18Bit
102 | Panel1024x768 | _PanelType01, SyncNN | PanelRGB18Bit
103 | Panel800x600 | _PanelType02, SyncNN | PanelRGB18Bit
104 | Panel640x480 | _PanelType03, SyncNN | PanelRGB18Bit
105 | Panel1024x768 | _PanelType04, SyncNN | PanelRGB18Bit
106 | Panel1024x768 | _PanelType05, SyncNN | PanelRGB18Bit
107 | Panel1024x768 | _PanelType06, SyncNN | PanelRGB24Bit
108 | Panel1024x768 | _PanelType07, SyncNN | PanelRGB18Bit
109 | Panel800x600 | _PanelType08, SyncNN | PanelRGB18Bit
110 | Panel1024x768 | _PanelType09, SyncNN | PanelRGB18Bit
111 | Panel800x600 | _PanelType0A, SyncNN | PanelRGB18Bit
112 | Panel1024x768 | _PanelType0B, SyncNN | PanelRGB18Bit
113 | Panel1024x768 | _PanelType0C, SyncNN | PanelRGB24Bit
114 | Panel1024x768 | _PanelType0D, SyncNN | PanelRGB18Bit
115 | Panel1024x768 | _PanelType0E, SyncNN | PanelRGB18Bit
116 | Panel1024x768 | _PanelType0F };
117 unsigned short tempax, tempbx, temp;
118 /* unsigned short return_flag; */
119
120 tempax = xgifb_reg_get(pVBInfo->P3c4, 0x1A);
121 tempbx = tempax & 0x1E;
122
123 if (tempax == 0)
124 return 0;
125 else {
126 /*
127 if (!(tempax & 0x10)) {
128 if (pVBInfo->IF_DEF_LVDS == 1) {
129 tempbx = 0;
130 temp = xgifb_reg_get(pVBInfo->P3c4, 0x38);
131 if (temp & 0x40)
132 tempbx |= 0x08;
133 if (temp & 0x20)
134 tempbx |= 0x02;
135 if (temp & 0x01)
136 tempbx |= 0x01;
137
138 temp = xgifb_reg_get(pVBInfo->P3c4, 0x39);
139 if (temp & 0x80)
140 tempbx |= 0x04;
141 } else {
142 return(0);
143 }
144 }
145 */
146
147 tempbx = tempbx >> 1;
148 temp = tempbx & 0x00F;
149 xgifb_reg_set(pVBInfo->P3d4, 0x36, temp);
150 tempbx--;
151 tempbx = PanelTypeTable[tempbx];
152
153 temp = (tempbx & 0xFF00) >> 8;
154 xgifb_reg_and_or(pVBInfo->P3d4, 0x37, ~(LCDSyncBit
155 | LCDRGB18Bit), temp);
156 return 1;
157 }
158}
159
160static unsigned char
161XGINew_BridgeIsEnable(struct xgi_hw_device_info *HwDeviceExtension,
162 struct vb_device_info *pVBInfo)
163{
164 unsigned short flag;
165
166 if (XGI_BridgeIsOn(pVBInfo) == 0) {
167 flag = xgifb_reg_get(pVBInfo->Part1Port, 0x0);
168
169 if (flag & 0x050)
170 return 1;
171 else
172 return 0;
173
174 }
175 return 0;
176}
177
178static unsigned char
179XGINew_SenseHiTV(struct xgi_hw_device_info *HwDeviceExtension,
180 struct vb_device_info *pVBInfo)
181{
182 unsigned short tempbx, tempcx, temp, i, tempch;
183
184 tempbx = *pVBInfo->pYCSenseData2;
185
186 tempcx = 0x0604;
187
188 temp = tempbx & 0xFF;
189 xgifb_reg_set(pVBInfo->Part4Port, 0x11, temp);
190 temp = (tempbx & 0xFF00) >> 8;
191 temp |= (tempcx & 0x00FF);
192 xgifb_reg_and_or(pVBInfo->Part4Port, 0x10, ~0x1F, temp);
193
194 for (i = 0; i < 10; i++)
195 XGI_LongWait(pVBInfo);
196
197 tempch = (tempcx & 0xFF00) >> 8;
198 temp = xgifb_reg_get(pVBInfo->Part4Port, 0x03);
199 temp = temp ^ (0x0E);
200 temp &= tempch;
201
202 if (temp != tempch)
203 return 0;
204
205 tempbx = *pVBInfo->pVideoSenseData2;
206
207 tempcx = 0x0804;
208 temp = tempbx & 0xFF;
209 xgifb_reg_set(pVBInfo->Part4Port, 0x11, temp);
210 temp = (tempbx & 0xFF00) >> 8;
211 temp |= (tempcx & 0x00FF);
212 xgifb_reg_and_or(pVBInfo->Part4Port, 0x10, ~0x1F, temp);
213
214 for (i = 0; i < 10; i++)
215 XGI_LongWait(pVBInfo);
216
217 tempch = (tempcx & 0xFF00) >> 8;
218 temp = xgifb_reg_get(pVBInfo->Part4Port, 0x03);
219 temp = temp ^ (0x0E);
220 temp &= tempch;
221
222 if (temp != tempch) {
223 return 0;
224 } else {
225 tempbx = 0x3FF;
226 tempcx = 0x0804;
227 temp = tempbx & 0xFF;
228 xgifb_reg_set(pVBInfo->Part4Port, 0x11, temp);
229 temp = (tempbx & 0xFF00) >> 8;
230 temp |= (tempcx & 0x00FF);
231 xgifb_reg_and_or(pVBInfo->Part4Port, 0x10, ~0x1F, temp);
232
233 for (i = 0; i < 10; i++)
234 XGI_LongWait(pVBInfo);
235
236 tempch = (tempcx & 0xFF00) >> 8;
237 temp = xgifb_reg_get(pVBInfo->Part4Port, 0x03);
238 temp = temp ^ (0x0E);
239 temp &= tempch;
240
241 if (temp != tempch)
242 return 1;
243 else
244 return 0;
245 }
246}
247
248void XGI_GetSenseStatus(struct xgi_hw_device_info *HwDeviceExtension,
249 struct vb_device_info *pVBInfo)
250{
251 unsigned short tempax = 0, tempbx, tempcx, temp,
252 P2reg0 = 0, SenseModeNo = 0,
253 OutputSelect = *pVBInfo->pOutputSelect,
254 ModeIdIndex, i;
255 pVBInfo->BaseAddr = (unsigned long) HwDeviceExtension->pjIOAddress;
256
257 if (pVBInfo->IF_DEF_LVDS == 1) {
258 /* ynlai 02/27/2002 */
259 tempax = xgifb_reg_get(pVBInfo->P3c4, 0x1A);
260 tempbx = xgifb_reg_get(pVBInfo->P3c4, 0x1B);
261 tempax = ((tempax & 0xFE) >> 1) | (tempbx << 8);
262 if (tempax == 0x00) { /* Get Panel id from DDC */
263 temp = XGINew_GetLCDDDCInfo(HwDeviceExtension, pVBInfo);
264 if (temp == 1) { /* LCD connect */
265 /* set CR39 bit0="1" */
266 xgifb_reg_and_or(pVBInfo->P3d4,
267 0x39, 0xFF, 0x01);
268 /* clean CR37 bit4="0" */
269 xgifb_reg_and_or(pVBInfo->P3d4,
270 0x37, 0xEF, 0x00);
271 temp = LCDSense;
272 } else { /* LCD don't connect */
273 temp = 0;
274 }
275 } else {
276 XGINew_GetPanelID(pVBInfo);
277 temp = LCDSense;
278 }
279
280 tempbx = ~(LCDSense | AVIDEOSense | SVIDEOSense);
281 xgifb_reg_and_or(pVBInfo->P3d4, 0x32, tempbx, temp);
282 } else { /* for 301 */
283 if (pVBInfo->VBInfo & SetCRT2ToHiVisionTV) { /* for HiVision */
284 tempax = xgifb_reg_get(pVBInfo->P3c4, 0x38);
285 temp = tempax & 0x01;
286 tempax = xgifb_reg_get(pVBInfo->P3c4, 0x3A);
287 temp = temp | (tempax & 0x02);
288 xgifb_reg_and_or(pVBInfo->P3d4, 0x32, 0xA0, temp);
289 } else {
290 if (XGI_BridgeIsOn(pVBInfo)) {
291 P2reg0 = xgifb_reg_get(pVBInfo->Part2Port,
292 0x00);
293 if (!XGINew_BridgeIsEnable(HwDeviceExtension,
294 pVBInfo)) {
295 SenseModeNo = 0x2e;
296 /* xgifb_reg_set(pVBInfo->P3d4, 0x30, 0x41);
297 * XGISetModeNew(HwDeviceExtension, 0x2e);
298 * // ynlai InitMode */
299
300 temp = XGI_SearchModeID(SenseModeNo,
301 &ModeIdIndex,
302 pVBInfo);
303 XGI_GetVGAType(HwDeviceExtension,
304 pVBInfo);
305 XGI_GetVBType(pVBInfo);
306 pVBInfo->SetFlag = 0x00;
307 pVBInfo->ModeType = ModeVGA;
308 pVBInfo->VBInfo = SetCRT2ToRAMDAC |
309 LoadDACFlag |
310 SetInSlaveMode;
311 XGI_GetLCDInfo(0x2e,
312 ModeIdIndex,
313 pVBInfo);
314 XGI_GetTVInfo(0x2e,
315 ModeIdIndex,
316 pVBInfo);
317 XGI_EnableBridge(HwDeviceExtension,
318 pVBInfo);
319 XGI_SetCRT2Group301(SenseModeNo,
320 HwDeviceExtension,
321 pVBInfo);
322 XGI_SetCRT2ModeRegs(0x2e,
323 HwDeviceExtension,
324 pVBInfo);
325 /* XGI_DisableBridge(HwDeviceExtension,
326 * pVBInfo ) ; */
327 /* Display Off 0212 */
328 xgifb_reg_and_or(pVBInfo->P3c4,
329 0x01,
330 0xDF,
331 0x20);
332 for (i = 0; i < 20; i++)
333 XGI_LongWait(pVBInfo);
334 }
335 xgifb_reg_set(pVBInfo->Part2Port, 0x00, 0x1c);
336 tempax = 0;
337 tempbx = *pVBInfo->pRGBSenseData;
338
339 if (!(XGINew_Is301B(pVBInfo)))
340 tempbx = *pVBInfo->pRGBSenseData2;
341
342 tempcx = 0x0E08;
343 if (XGINew_Sense(tempbx, tempcx, pVBInfo)) {
344 if (XGINew_Sense(tempbx,
345 tempcx,
346 pVBInfo))
347 tempax |= Monitor2Sense;
348 }
349
350 if (pVBInfo->VBType & VB_XGI301C)
351 xgifb_reg_or(pVBInfo->Part4Port,
352 0x0d,
353 0x04);
354
355 /* add by kuku for Multi-adapter sense HiTV */
356 if (XGINew_SenseHiTV(HwDeviceExtension,
357 pVBInfo)) {
358 tempax |= HiTVSense;
359 if ((pVBInfo->VBType & VB_XGI301C))
360 tempax ^= (HiTVSense |
361 YPbPrSense);
362 }
363
364 /* start */
365 if (!(tempax & (HiTVSense | YPbPrSense))) {
366 tempbx = *pVBInfo->pYCSenseData;
367 if (!(XGINew_Is301B(pVBInfo)))
368 tempbx = *pVBInfo->pYCSenseData2;
369 tempcx = 0x0604;
370 if (XGINew_Sense(tempbx,
371 tempcx,
372 pVBInfo)) {
373 if (XGINew_Sense(tempbx,
374 tempcx,
375 pVBInfo))
376 tempax |= SVIDEOSense;
377 }
378
379 if (OutputSelect & BoardTVType) {
380 tempbx = *pVBInfo->pVideoSenseData;
381
382 if (!(XGINew_Is301B(pVBInfo)))
383 tempbx = *pVBInfo->pVideoSenseData2;
384
385 tempcx = 0x0804;
386 if (XGINew_Sense(tempbx,
387 tempcx,
388 pVBInfo)) {
389 if (XGINew_Sense(tempbx,
390 tempcx,
391 pVBInfo))
392 tempax |= AVIDEOSense;
393 }
394 } else {
395 if (!(tempax & SVIDEOSense)) {
396 tempbx = *pVBInfo->pVideoSenseData;
397
398 if (!(XGINew_Is301B(pVBInfo)))
399 tempbx = *pVBInfo->pVideoSenseData2;
400
401 tempcx = 0x0804;
402 if (XGINew_Sense(tempbx,
403 tempcx,
404 pVBInfo)) {
405 if (XGINew_Sense(tempbx, tempcx, pVBInfo))
406 tempax |= AVIDEOSense;
407 }
408 }
409 }
410 }
411 } /* end */
412 if (!(tempax & Monitor2Sense)) {
413 if (XGINew_SenseLCD(HwDeviceExtension, pVBInfo))
414 tempax |= LCDSense;
415 }
416 tempbx = 0;
417 tempcx = 0;
418 XGINew_Sense(tempbx, tempcx, pVBInfo);
419
420 xgifb_reg_and_or(pVBInfo->P3d4, 0x32, ~0xDF, tempax);
421 xgifb_reg_set(pVBInfo->Part2Port, 0x00, P2reg0);
422
423 if (!(P2reg0 & 0x20)) {
424 pVBInfo->VBInfo = DisableCRT2Display;
425 /* XGI_SetCRT2Group301(SenseModeNo,
426 * HwDeviceExtension,
427 * pVBInfo); */
428 }
429 }
430 }
431 XGI_DisableBridge(HwDeviceExtension, pVBInfo); /* shampoo 0226 */
432
433}
434
435unsigned short XGINew_SenseLCD(struct xgi_hw_device_info *HwDeviceExtension,
436 struct vb_device_info *pVBInfo)
437{
438 /* unsigned short SoftSetting ; */
439 unsigned short temp;
440
441 temp = XGINew_GetLCDDDCInfo(HwDeviceExtension, pVBInfo);
442
443 return temp;
444}
diff --git a/drivers/staging/xgifb/vb_ext.h b/drivers/staging/xgifb/vb_ext.h
deleted file mode 100644
index 0b1f55b4242f..000000000000
--- a/drivers/staging/xgifb/vb_ext.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _VBEXT_
2#define _VBEXT_
3
4extern void XGI_GetSenseStatus(struct xgi_hw_device_info *HwDeviceExtension,
5 struct vb_device_info *pVBInfo);
6extern unsigned short XGINew_SenseLCD(struct xgi_hw_device_info *,
7 struct vb_device_info *pVBInfo);
8
9#endif
diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c
index 9e890a17fbc2..4ccd988ffd7c 100644
--- a/drivers/staging/xgifb/vb_init.c
+++ b/drivers/staging/xgifb/vb_init.c
@@ -1,6 +1,7 @@
1#include <linux/types.h> 1#include <linux/types.h>
2#include <linux/delay.h> /* udelay */ 2#include <linux/delay.h> /* udelay */
3#include <linux/pci.h> 3#include <linux/pci.h>
4#include <linux/vmalloc.h>
4 5
5#include "vgatypes.h" 6#include "vgatypes.h"
6#include "XGIfb.h" 7#include "XGIfb.h"
@@ -10,7 +11,6 @@
10#include "vb_util.h" 11#include "vb_util.h"
11#include "vb_setmode.h" 12#include "vb_setmode.h"
12#include "vb_init.h" 13#include "vb_init.h"
13#include "vb_ext.h"
14 14
15 15
16#include <linux/io.h> 16#include <linux/io.h>
@@ -35,6 +35,8 @@ static const unsigned short XGINew_DDRDRAM_TYPE20[12][5] = {
35 { 2, 12, 9, 8, 0x35}, 35 { 2, 12, 9, 8, 0x35},
36 { 2, 12, 8, 4, 0x31} }; 36 { 2, 12, 8, 4, 0x31} };
37 37
38#define XGIFB_ROM_SIZE 65536
39
38static unsigned char 40static unsigned char
39XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension, 41XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension,
40 struct vb_device_info *pVBInfo) 42 struct vb_device_info *pVBInfo)
@@ -1068,20 +1070,20 @@ static int XGINew_DDRSizing340(struct xgi_hw_device_info *HwDeviceExtension,
1068 return 0; 1070 return 0;
1069} 1071}
1070 1072
1071static void XGINew_SetDRAMSize_340(struct xgi_hw_device_info *HwDeviceExtension, 1073static void XGINew_SetDRAMSize_340(struct xgifb_video_info *xgifb_info,
1074 struct xgi_hw_device_info *HwDeviceExtension,
1072 struct vb_device_info *pVBInfo) 1075 struct vb_device_info *pVBInfo)
1073{ 1076{
1074 unsigned short data; 1077 unsigned short data;
1075 1078
1076 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase;
1077 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress; 1079 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress;
1078 1080
1079 XGISetModeNew(HwDeviceExtension, 0x2e); 1081 XGISetModeNew(xgifb_info, HwDeviceExtension, 0x2e);
1080 1082
1081 data = xgifb_reg_get(pVBInfo->P3c4, 0x21); 1083 data = xgifb_reg_get(pVBInfo->P3c4, 0x21);
1082 /* disable read cache */ 1084 /* disable read cache */
1083 xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data & 0xDF)); 1085 xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data & 0xDF));
1084 XGI_DisplayOff(HwDeviceExtension, pVBInfo); 1086 XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo);
1085 1087
1086 /* data = xgifb_reg_get(pVBInfo->P3c4, 0x1); */ 1088 /* data = xgifb_reg_get(pVBInfo->P3c4, 0x1); */
1087 /* data |= 0x20 ; */ 1089 /* data |= 0x20 ; */
@@ -1092,118 +1094,100 @@ static void XGINew_SetDRAMSize_340(struct xgi_hw_device_info *HwDeviceExtension,
1092 xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data | 0x20)); 1094 xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data | 0x20));
1093} 1095}
1094 1096
1095static void ReadVBIOSTablData(unsigned char ChipType, 1097static u8 *xgifb_copy_rom(struct pci_dev *dev, size_t *rom_size)
1098{
1099 void __iomem *rom_address;
1100 u8 *rom_copy;
1101
1102 rom_address = pci_map_rom(dev, rom_size);
1103 if (rom_address == NULL)
1104 return NULL;
1105
1106 rom_copy = vzalloc(XGIFB_ROM_SIZE);
1107 if (rom_copy == NULL)
1108 goto done;
1109
1110 *rom_size = min_t(size_t, *rom_size, XGIFB_ROM_SIZE);
1111 memcpy_fromio(rom_copy, rom_address, *rom_size);
1112
1113done:
1114 pci_unmap_rom(dev, rom_address);
1115 return rom_copy;
1116}
1117
1118static void xgifb_read_vbios(struct pci_dev *pdev,
1096 struct vb_device_info *pVBInfo) 1119 struct vb_device_info *pVBInfo)
1097{ 1120{
1098 volatile unsigned char *pVideoMemory = 1121 struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev);
1099 (unsigned char *) pVBInfo->ROMAddr; 1122 u8 *vbios;
1100 unsigned long i; 1123 unsigned long i;
1101 unsigned char j, k; 1124 unsigned char j;
1102 /* Volari customize data area end */ 1125 struct XGI21_LVDSCapStruct *lvds;
1103 1126 size_t vbios_size;
1104 if (ChipType == XG21) { 1127 int entry;
1105 pVBInfo->IF_DEF_LVDS = 0; 1128
1106 if (pVideoMemory[0x65] & 0x1) { 1129 if (xgifb_info->chip != XG21)
1107 pVBInfo->IF_DEF_LVDS = 1; 1130 return;
1108 i = pVideoMemory[0x316] | (pVideoMemory[0x317] << 8); 1131 pVBInfo->IF_DEF_LVDS = 0;
1109 j = pVideoMemory[i - 1]; 1132 vbios = xgifb_copy_rom(pdev, &vbios_size);
1110 if (j != 0xff) { 1133 if (vbios == NULL) {
1111 k = 0; 1134 dev_err(&pdev->dev, "video BIOS not available\n");
1112 do { 1135 return;
1113 pVBInfo->XG21_LVDSCapList[k]. 1136 }
1114 LVDS_Capability 1137 if (vbios_size <= 0x65)
1115 = pVideoMemory[i] | 1138 goto error;
1116 (pVideoMemory[i + 1] << 8); 1139 /*
1117 pVBInfo->XG21_LVDSCapList[k].LVDSHT 1140 * The user can ignore the LVDS bit in the BIOS and force the display
1118 = pVideoMemory[i + 2] | 1141 * type.
1119 (pVideoMemory[i + 3] << 8); 1142 */
1120 pVBInfo->XG21_LVDSCapList[k].LVDSVT 1143 if (!(vbios[0x65] & 0x1) &&
1121 = pVideoMemory[i + 4] | 1144 (!xgifb_info->display2_force ||
1122 (pVideoMemory[i + 5] << 8); 1145 xgifb_info->display2 != XGIFB_DISP_LCD)) {
1123 pVBInfo->XG21_LVDSCapList[k].LVDSHDE 1146 vfree(vbios);
1124 = pVideoMemory[i + 6] | 1147 return;
1125 (pVideoMemory[i + 7] << 8);
1126 pVBInfo->XG21_LVDSCapList[k].LVDSVDE
1127 = pVideoMemory[i + 8] |
1128 (pVideoMemory[i + 9] << 8);
1129 pVBInfo->XG21_LVDSCapList[k].LVDSHFP
1130 = pVideoMemory[i + 10] |
1131 (pVideoMemory[i + 11] << 8);
1132 pVBInfo->XG21_LVDSCapList[k].LVDSVFP
1133 = pVideoMemory[i + 12] |
1134 (pVideoMemory[i + 13] << 8);
1135 pVBInfo->XG21_LVDSCapList[k].LVDSHSYNC
1136 = pVideoMemory[i + 14] |
1137 (pVideoMemory[i + 15] << 8);
1138 pVBInfo->XG21_LVDSCapList[k].LVDSVSYNC
1139 = pVideoMemory[i + 16] |
1140 (pVideoMemory[i + 17] << 8);
1141 pVBInfo->XG21_LVDSCapList[k].VCLKData1
1142 = pVideoMemory[i + 18];
1143 pVBInfo->XG21_LVDSCapList[k].VCLKData2
1144 = pVideoMemory[i + 19];
1145 pVBInfo->XG21_LVDSCapList[k].PSC_S1
1146 = pVideoMemory[i + 20];
1147 pVBInfo->XG21_LVDSCapList[k].PSC_S2
1148 = pVideoMemory[i + 21];
1149 pVBInfo->XG21_LVDSCapList[k].PSC_S3
1150 = pVideoMemory[i + 22];
1151 pVBInfo->XG21_LVDSCapList[k].PSC_S4
1152 = pVideoMemory[i + 23];
1153 pVBInfo->XG21_LVDSCapList[k].PSC_S5
1154 = pVideoMemory[i + 24];
1155 i += 25;
1156 j--;
1157 k++;
1158 } while ((j > 0) &&
1159 (k < (sizeof(XGI21_LCDCapList) /
1160 sizeof(struct
1161 XGI21_LVDSCapStruct))));
1162 } else {
1163 pVBInfo->XG21_LVDSCapList[0].LVDS_Capability
1164 = pVideoMemory[i] |
1165 (pVideoMemory[i + 1] << 8);
1166 pVBInfo->XG21_LVDSCapList[0].LVDSHT
1167 = pVideoMemory[i + 2] |
1168 (pVideoMemory[i + 3] << 8);
1169 pVBInfo->XG21_LVDSCapList[0].LVDSVT
1170 = pVideoMemory[i + 4] |
1171 (pVideoMemory[i + 5] << 8);
1172 pVBInfo->XG21_LVDSCapList[0].LVDSHDE
1173 = pVideoMemory[i + 6] |
1174 (pVideoMemory[i + 7] << 8);
1175 pVBInfo->XG21_LVDSCapList[0].LVDSVDE
1176 = pVideoMemory[i + 8] |
1177 (pVideoMemory[i + 9] << 8);
1178 pVBInfo->XG21_LVDSCapList[0].LVDSHFP
1179 = pVideoMemory[i + 10] |
1180 (pVideoMemory[i + 11] << 8);
1181 pVBInfo->XG21_LVDSCapList[0].LVDSVFP
1182 = pVideoMemory[i + 12] |
1183 (pVideoMemory[i + 13] << 8);
1184 pVBInfo->XG21_LVDSCapList[0].LVDSHSYNC
1185 = pVideoMemory[i + 14] |
1186 (pVideoMemory[i + 15] << 8);
1187 pVBInfo->XG21_LVDSCapList[0].LVDSVSYNC
1188 = pVideoMemory[i + 16] |
1189 (pVideoMemory[i + 17] << 8);
1190 pVBInfo->XG21_LVDSCapList[0].VCLKData1
1191 = pVideoMemory[i + 18];
1192 pVBInfo->XG21_LVDSCapList[0].VCLKData2
1193 = pVideoMemory[i + 19];
1194 pVBInfo->XG21_LVDSCapList[0].PSC_S1
1195 = pVideoMemory[i + 20];
1196 pVBInfo->XG21_LVDSCapList[0].PSC_S2
1197 = pVideoMemory[i + 21];
1198 pVBInfo->XG21_LVDSCapList[0].PSC_S3
1199 = pVideoMemory[i + 22];
1200 pVBInfo->XG21_LVDSCapList[0].PSC_S4
1201 = pVideoMemory[i + 23];
1202 pVBInfo->XG21_LVDSCapList[0].PSC_S5
1203 = pVideoMemory[i + 24];
1204 }
1205 }
1206 } 1148 }
1149 if (vbios_size <= 0x317)
1150 goto error;
1151 i = vbios[0x316] | (vbios[0x317] << 8);
1152 if (vbios_size <= i - 1)
1153 goto error;
1154 j = vbios[i - 1];
1155 if (j == 0)
1156 goto error;
1157 if (j == 0xff)
1158 j = 1;
1159 /*
1160 * Read the LVDS table index scratch register set by the BIOS.
1161 */
1162 entry = xgifb_reg_get(xgifb_info->dev_info.P3d4, 0x36);
1163 if (entry >= j)
1164 entry = 0;
1165 i += entry * 25;
1166 lvds = &xgifb_info->lvds_data;
1167 if (vbios_size <= i + 24)
1168 goto error;
1169 lvds->LVDS_Capability = vbios[i] | (vbios[i + 1] << 8);
1170 lvds->LVDSHT = vbios[i + 2] | (vbios[i + 3] << 8);
1171 lvds->LVDSVT = vbios[i + 4] | (vbios[i + 5] << 8);
1172 lvds->LVDSHDE = vbios[i + 6] | (vbios[i + 7] << 8);
1173 lvds->LVDSVDE = vbios[i + 8] | (vbios[i + 9] << 8);
1174 lvds->LVDSHFP = vbios[i + 10] | (vbios[i + 11] << 8);
1175 lvds->LVDSVFP = vbios[i + 12] | (vbios[i + 13] << 8);
1176 lvds->LVDSHSYNC = vbios[i + 14] | (vbios[i + 15] << 8);
1177 lvds->LVDSVSYNC = vbios[i + 16] | (vbios[i + 17] << 8);
1178 lvds->VCLKData1 = vbios[i + 18];
1179 lvds->VCLKData2 = vbios[i + 19];
1180 lvds->PSC_S1 = vbios[i + 20];
1181 lvds->PSC_S2 = vbios[i + 21];
1182 lvds->PSC_S3 = vbios[i + 22];
1183 lvds->PSC_S4 = vbios[i + 23];
1184 lvds->PSC_S5 = vbios[i + 24];
1185 vfree(vbios);
1186 pVBInfo->IF_DEF_LVDS = 1;
1187 return;
1188error:
1189 dev_err(&pdev->dev, "video BIOS corrupted\n");
1190 vfree(vbios);
1207} 1191}
1208 1192
1209static void XGINew_ChkSenseStatus(struct xgi_hw_device_info *HwDeviceExtension, 1193static void XGINew_ChkSenseStatus(struct xgi_hw_device_info *HwDeviceExtension,
@@ -1336,18 +1320,57 @@ static void XGINew_SetModeScratch(struct xgi_hw_device_info *HwDeviceExtension,
1336 1320
1337} 1321}
1338 1322
1323static unsigned short XGINew_SenseLCD(struct xgi_hw_device_info
1324 *HwDeviceExtension,
1325 struct vb_device_info *pVBInfo)
1326{
1327 unsigned short temp;
1328
1329 /* add lcd sense */
1330 if (HwDeviceExtension->ulCRT2LCDType == LCD_UNKNOWN) {
1331 return 0;
1332 } else {
1333 temp = (unsigned short) HwDeviceExtension->ulCRT2LCDType;
1334 switch (HwDeviceExtension->ulCRT2LCDType) {
1335 case LCD_INVALID:
1336 case LCD_800x600:
1337 case LCD_1024x768:
1338 case LCD_1280x1024:
1339 break;
1340
1341 case LCD_640x480:
1342 case LCD_1024x600:
1343 case LCD_1152x864:
1344 case LCD_1280x960:
1345 case LCD_1152x768:
1346 temp = 0;
1347 break;
1348
1349 case LCD_1400x1050:
1350 case LCD_1280x768:
1351 case LCD_1600x1200:
1352 break;
1353
1354 case LCD_1920x1440:
1355 case LCD_2048x1536:
1356 temp = 0;
1357 break;
1358
1359 default:
1360 break;
1361 }
1362 xgifb_reg_and_or(pVBInfo->P3d4, 0x36, 0xF0, temp);
1363 return 1;
1364 }
1365}
1366
1339static void XGINew_GetXG21Sense(struct xgi_hw_device_info *HwDeviceExtension, 1367static void XGINew_GetXG21Sense(struct xgi_hw_device_info *HwDeviceExtension,
1340 struct vb_device_info *pVBInfo) 1368 struct vb_device_info *pVBInfo)
1341{ 1369{
1342 unsigned char Temp; 1370 unsigned char Temp;
1343 volatile unsigned char *pVideoMemory =
1344 (unsigned char *) pVBInfo->ROMAddr;
1345
1346 pVBInfo->IF_DEF_LVDS = 0;
1347 1371
1348#if 1 1372#if 1
1349 if ((pVideoMemory[0x65] & 0x01)) { /* For XG21 LVDS */ 1373 if (pVBInfo->IF_DEF_LVDS) { /* For XG21 LVDS */
1350 pVBInfo->IF_DEF_LVDS = 1;
1351 xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense); 1374 xgifb_reg_or(pVBInfo->P3d4, 0x32, LCDSense);
1352 /* LVDS on chip */ 1375 /* LVDS on chip */
1353 xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0); 1376 xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0);
@@ -1393,7 +1416,6 @@ static void XGINew_GetXG27Sense(struct xgi_hw_device_info *HwDeviceExtension,
1393 xgifb_reg_set(pVBInfo->P3d4, 0x4A, bCR4A); 1416 xgifb_reg_set(pVBInfo->P3d4, 0x4A, bCR4A);
1394 1417
1395 if (Temp <= 0x02) { 1418 if (Temp <= 0x02) {
1396 pVBInfo->IF_DEF_LVDS = 1;
1397 /* LVDS setting */ 1419 /* LVDS setting */
1398 xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0); 1420 xgifb_reg_and_or(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0);
1399 xgifb_reg_set(pVBInfo->P3d4, 0x30, 0x21); 1421 xgifb_reg_set(pVBInfo->P3d4, 0x30, 0x21);
@@ -1451,24 +1473,15 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
1451 struct vb_device_info *pVBInfo = &VBINF; 1473 struct vb_device_info *pVBInfo = &VBINF;
1452 unsigned char i, temp = 0, temp1; 1474 unsigned char i, temp = 0, temp1;
1453 /* VBIOSVersion[5]; */ 1475 /* VBIOSVersion[5]; */
1454 volatile unsigned char *pVideoMemory;
1455 1476
1456 /* unsigned long j, k; */ 1477 /* unsigned long j, k; */
1457 1478
1458 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase;
1459
1460 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress; 1479 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress;
1461 1480
1462 pVBInfo->BaseAddr = (unsigned long) HwDeviceExtension->pjIOAddress; 1481 pVBInfo->BaseAddr = (unsigned long) HwDeviceExtension->pjIOAddress;
1463 1482
1464 pVideoMemory = (unsigned char *) pVBInfo->ROMAddr;
1465
1466 /* Newdebugcode(0x99); */ 1483 /* Newdebugcode(0x99); */
1467 1484
1468
1469 /* if (pVBInfo->ROMAddr == 0) */
1470 /* return(0); */
1471
1472 if (pVBInfo->FBAddr == NULL) { 1485 if (pVBInfo->FBAddr == NULL) {
1473 printk("\n pVBInfo->FBAddr == 0 "); 1486 printk("\n pVBInfo->FBAddr == 0 ");
1474 return 0; 1487 return 0;
@@ -1516,8 +1529,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
1516 1529
1517 InitTo330Pointer(HwDeviceExtension->jChipType, pVBInfo); 1530 InitTo330Pointer(HwDeviceExtension->jChipType, pVBInfo);
1518 1531
1519 /* ReadVBIOSData */ 1532 xgifb_read_vbios(pdev, pVBInfo);
1520 ReadVBIOSTablData(HwDeviceExtension->jChipType, pVBInfo);
1521 1533
1522 /* 1.Openkey */ 1534 /* 1.Openkey */
1523 xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); 1535 xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86);
@@ -1774,7 +1786,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
1774 pVBInfo); 1786 pVBInfo);
1775 1787
1776 printk("20"); 1788 printk("20");
1777 XGINew_SetDRAMSize_340(HwDeviceExtension, pVBInfo); 1789 XGINew_SetDRAMSize_340(xgifb_info, HwDeviceExtension, pVBInfo);
1778 printk("21"); 1790 printk("21");
1779 1791
1780 printk("22"); 1792 printk("22");
diff --git a/drivers/staging/xgifb/vb_setmode.c b/drivers/staging/xgifb/vb_setmode.c
index 81c0cc41bb42..67a316c3c108 100644
--- a/drivers/staging/xgifb/vb_setmode.c
+++ b/drivers/staging/xgifb/vb_setmode.c
@@ -67,11 +67,6 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
67 pVBInfo->XGINEWUB_CRT1Table 67 pVBInfo->XGINEWUB_CRT1Table
68 = (struct XGI_CRT1TableStruct *) XGI_CRT1Table; 68 = (struct XGI_CRT1TableStruct *) XGI_CRT1Table;
69 69
70 /* add for new UNIVGABIOS */
71 /* XGINew_UBLCDDataTable =
72 * (struct XGI_LCDDataTablStruct *) XGI_LCDDataTable; */
73 /* XGINew_UBTVDataTable = (XGI_TVDataTablStruct *) XGI_TVDataTable; */
74
75 pVBInfo->MCLKData = (struct XGI_MCLKDataStruct *) XGI340New_MCLKData; 70 pVBInfo->MCLKData = (struct XGI_MCLKDataStruct *) XGI340New_MCLKData;
76 pVBInfo->ECLKData = (struct XGI_ECLKDataStruct *) XGI340_ECLKData; 71 pVBInfo->ECLKData = (struct XGI_ECLKDataStruct *) XGI340_ECLKData;
77 pVBInfo->VCLKData = (struct XGI_VCLKDataStruct *) XGI_VCLKData; 72 pVBInfo->VCLKData = (struct XGI_VCLKDataStruct *) XGI_VCLKData;
@@ -148,9 +143,6 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
148 else 143 else
149 pVBInfo->LCDCapList = XGI_LCDCapList; 144 pVBInfo->LCDCapList = XGI_LCDCapList;
150 145
151 if ((ChipType == XG21) || (ChipType == XG27))
152 pVBInfo->XG21_LVDSCapList = XGI21_LCDCapList;
153
154 pVBInfo->XGI_TVDelayList = XGI301TVDelayList; 146 pVBInfo->XGI_TVDelayList = XGI301TVDelayList;
155 pVBInfo->XGI_TVDelayList2 = XGI301TVDelayList2; 147 pVBInfo->XGI_TVDelayList2 = XGI301TVDelayList2;
156 148
@@ -236,28 +228,6 @@ static void XGI_SetSeqRegs(unsigned short ModeNo,
236 } 228 }
237} 229}
238 230
239static void XGI_SetMiscRegs(unsigned short StandTableIndex,
240 struct vb_device_info *pVBInfo)
241{
242 unsigned char Miscdata;
243
244 /* Get Misc from file */
245 Miscdata = pVBInfo->StandTable[StandTableIndex].MISC;
246 /*
247 if (pVBInfo->VBType & (VB_XGI301B |
248 VB_XGI302B |
249 VB_XGI301LV |
250 VB_XGI302LV |
251 VB_XGI301C)) {
252 if (pVBInfo->VBInfo & SetCRT2ToLCDA) {
253 Miscdata |= 0x0C;
254 }
255 }
256 */
257
258 outb(Miscdata, pVBInfo->P3c2); /* Set Misc(3c2) */
259}
260
261static void XGI_SetCRTCRegs(struct xgi_hw_device_info *HwDeviceExtension, 231static void XGI_SetCRTCRegs(struct xgi_hw_device_info *HwDeviceExtension,
262 unsigned short StandTableIndex, 232 unsigned short StandTableIndex,
263 struct vb_device_info *pVBInfo) 233 struct vb_device_info *pVBInfo)
@@ -274,16 +244,6 @@ static void XGI_SetCRTCRegs(struct xgi_hw_device_info *HwDeviceExtension,
274 CRTCdata = pVBInfo->StandTable[StandTableIndex].CRTC[i]; 244 CRTCdata = pVBInfo->StandTable[StandTableIndex].CRTC[i];
275 xgifb_reg_set(pVBInfo->P3d4, i, CRTCdata); /* Set CRTC(3d4) */ 245 xgifb_reg_set(pVBInfo->P3d4, i, CRTCdata); /* Set CRTC(3d4) */
276 } 246 }
277 /*
278 if ((HwDeviceExtension->jChipType == XGI_630) &&
279 (HwDeviceExtension->jChipRevision == 0x30)) {
280 if (pVBInfo->VBInfo & SetInSlaveMode) {
281 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
282 xgifb_reg_set(pVBInfo->P3d4, 0x18, 0xFE);
283 }
284 }
285 }
286 */
287} 247}
288 248
289static void XGI_SetATTRegs(unsigned short ModeNo, 249static void XGI_SetATTRegs(unsigned short ModeNo,
@@ -530,10 +490,6 @@ static void XGI_SetCRT1Timing_H(struct vb_device_info *pVBInfo,
530 unsigned char data, data1, pushax; 490 unsigned char data, data1, pushax;
531 unsigned short i, j; 491 unsigned short i, j;
532 492
533 /* xgifb_reg_set(pVBInfo->P3d4, 0x51, 0); */
534 /* xgifb_reg_set(pVBInfo->P3d4, 0x56, 0); */
535 /* xgifb_reg_and_or(pVBInfo->P3d4, 0x11, 0x7f, 0x00); */
536
537 /* unlock cr0-7 */ 493 /* unlock cr0-7 */
538 data = (unsigned char) xgifb_reg_get(pVBInfo->P3d4, 0x11); 494 data = (unsigned char) xgifb_reg_get(pVBInfo->P3d4, 0x11);
539 data &= 0x7F; 495 data &= 0x7F;
@@ -595,10 +551,6 @@ static void XGI_SetCRT1Timing_V(unsigned short ModeIdIndex,
595 unsigned char data; 551 unsigned char data;
596 unsigned short i, j; 552 unsigned short i, j;
597 553
598 /* xgifb_reg_set(pVBInfo->P3d4, 0x51, 0); */
599 /* xgifb_reg_set(pVBInfo->P3d4, 0x56, 0); */
600 /* xgifb_reg_and_or(pVBInfo->P3d4, 0x11, 0x7f, 0x00); */
601
602 for (i = 0x00; i <= 0x01; i++) { 554 for (i = 0x00; i <= 0x01; i++) {
603 data = pVBInfo->TimingV[0].data[i]; 555 data = pVBInfo->TimingV[0].data[i];
604 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 6), data); 556 xgifb_reg_set(pVBInfo->P3d4, (unsigned short) (i + 6), data);
@@ -976,6 +928,20 @@ static void XGI_SetXG27CRTC(unsigned short ModeNo,
976 } 928 }
977} 929}
978 930
931static void XGI_SetXG27FPBits(struct vb_device_info *pVBInfo)
932{
933 unsigned char temp;
934
935 /* D[1:0] 01: 18bit, 00: dual 12, 10: single 24 */
936 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37);
937 temp = (temp & 3) << 6;
938 /* SR06[7]0: dual 12/1: single 24 [6] 18bit Dither <= 0 h/w recommend */
939 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0xc0, temp & 0x80);
940 /* SR09[7] enable FP output, SR09[6] 1: sigle 18bits, 0: 24bits */
941 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80);
942
943}
944
979static void xgifb_set_lcd(int chip_id, 945static void xgifb_set_lcd(int chip_id,
980 struct vb_device_info *pVBInfo, 946 struct vb_device_info *pVBInfo,
981 unsigned short RefreshRateTableIndex, 947 unsigned short RefreshRateTableIndex,
@@ -1088,6 +1054,20 @@ static void XGI_UpdateXG21CRTC(unsigned short ModeNo,
1088 } 1054 }
1089} 1055}
1090 1056
1057static unsigned short XGI_GetResInfo(unsigned short ModeNo,
1058 unsigned short ModeIdIndex, struct vb_device_info *pVBInfo)
1059{
1060 unsigned short resindex;
1061
1062 if (ModeNo <= 0x13)
1063 /* si+St_ResInfo */
1064 resindex = pVBInfo->SModeIDTable[ModeIdIndex].St_ResInfo;
1065 else
1066 /* si+Ext_ResInfo */
1067 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO;
1068 return resindex;
1069}
1070
1091static void XGI_SetCRT1DE(struct xgi_hw_device_info *HwDeviceExtension, 1071static void XGI_SetCRT1DE(struct xgi_hw_device_info *HwDeviceExtension,
1092 unsigned short ModeNo, unsigned short ModeIdIndex, 1072 unsigned short ModeNo, unsigned short ModeIdIndex,
1093 unsigned short RefreshRateTableIndex, 1073 unsigned short RefreshRateTableIndex,
@@ -1127,9 +1107,6 @@ static void XGI_SetCRT1DE(struct xgi_hw_device_info *HwDeviceExtension,
1127 1107
1128 tempcx = 8; 1108 tempcx = 8;
1129 1109
1130 /* if (!(modeflag & Charx8Dot)) */
1131 /* tempcx = 9; */
1132
1133 tempax /= tempcx; 1110 tempax /= tempcx;
1134 tempax -= 1; 1111 tempax -= 1;
1135 tempbx -= 1; 1112 tempbx -= 1;
@@ -1163,20 +1140,6 @@ static void XGI_SetCRT1DE(struct xgi_hw_device_info *HwDeviceExtension,
1163 xgifb_reg_set(pVBInfo->P3d4, 0x11, temp); 1140 xgifb_reg_set(pVBInfo->P3d4, 0x11, temp);
1164} 1141}
1165 1142
1166unsigned short XGI_GetResInfo(unsigned short ModeNo,
1167 unsigned short ModeIdIndex, struct vb_device_info *pVBInfo)
1168{
1169 unsigned short resindex;
1170
1171 if (ModeNo <= 0x13)
1172 /* si+St_ResInfo */
1173 resindex = pVBInfo->SModeIDTable[ModeIdIndex].St_ResInfo;
1174 else
1175 /* si+Ext_ResInfo */
1176 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO;
1177 return resindex;
1178}
1179
1180static void XGI_SetCRT1Offset(unsigned short ModeNo, 1143static void XGI_SetCRT1Offset(unsigned short ModeNo,
1181 unsigned short ModeIdIndex, 1144 unsigned short ModeIdIndex,
1182 unsigned short RefreshRateTableIndex, 1145 unsigned short RefreshRateTableIndex,
@@ -1308,77 +1271,55 @@ static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeNo,
1308 VCLKIndex = LCDXlat2VCLK[CRT2Index]; 1271 VCLKIndex = LCDXlat2VCLK[CRT2Index];
1309 else 1272 else
1310 VCLKIndex = LCDXlat1VCLK[CRT2Index]; 1273 VCLKIndex = LCDXlat1VCLK[CRT2Index];
1311 } else { /* for TV */ 1274 } else if (pVBInfo->VBInfo & SetCRT2ToHiVisionTV) {
1312 if (pVBInfo->VBInfo & SetCRT2ToTV) { 1275 if (pVBInfo->SetFlag & RPLLDIV2XO) {
1313 if (pVBInfo->VBInfo & SetCRT2ToHiVisionTV) { 1276 VCLKIndex = HiTVVCLKDIV2;
1314 if (pVBInfo->SetFlag & RPLLDIV2XO) { 1277 VCLKIndex += 25;
1315 VCLKIndex = HiTVVCLKDIV2; 1278 } else {
1316 VCLKIndex += 25; 1279 VCLKIndex = HiTVVCLK;
1317 } else { 1280 VCLKIndex += 25;
1318 VCLKIndex = HiTVVCLK; 1281 }
1319 VCLKIndex += 25;
1320 }
1321
1322 if (pVBInfo->SetFlag & TVSimuMode) {
1323 if (modeflag & Charx8Dot) {
1324 VCLKIndex =
1325 HiTVSimuVCLK;
1326 VCLKIndex += 25;
1327 } else {
1328 VCLKIndex =
1329 HiTVTextVCLK;
1330 VCLKIndex += 25;
1331 }
1332 }
1333 1282
1334 /* 301lv */ 1283 if (pVBInfo->SetFlag & TVSimuMode) {
1335 if (pVBInfo->VBType & VB_XGI301LV) { 1284 if (modeflag & Charx8Dot) {
1336 if (!(pVBInfo->VBExtInfo == 1285 VCLKIndex = HiTVSimuVCLK;
1337 VB_YPbPr1080i)) { 1286 VCLKIndex += 25;
1338 VCLKIndex =
1339 YPbPr750pVCLK;
1340 if (!(pVBInfo->VBExtInfo
1341 ==
1342 VB_YPbPr750p)) {
1343 VCLKIndex =
1344 YPbPr525pVCLK;
1345 if (!(pVBInfo->VBExtInfo
1346 == VB_YPbPr525p)) {
1347 VCLKIndex
1348 = YPbPr525iVCLK_2;
1349 if (!(pVBInfo->SetFlag
1350 & RPLLDIV2XO))
1351 VCLKIndex
1352 = YPbPr525iVCLK;
1353 }
1354 }
1355 }
1356 }
1357 } else { 1287 } else {
1358 if (pVBInfo->VBInfo & SetCRT2ToTV) { 1288 VCLKIndex = HiTVTextVCLK;
1359 if (pVBInfo->SetFlag & 1289 VCLKIndex += 25;
1360 RPLLDIV2XO) {
1361 VCLKIndex = TVVCLKDIV2;
1362 VCLKIndex += 25;
1363 } else {
1364 VCLKIndex = TVVCLK;
1365 VCLKIndex += 25;
1366 }
1367 }
1368 } 1290 }
1369 } else { /* for CRT2 */ 1291 }
1370 /* Port 3cch */ 1292
1371 VCLKIndex = (unsigned char) inb( 1293 /* 301lv */
1372 (pVBInfo->P3ca + 0x02)); 1294 if ((pVBInfo->VBType & VB_XGI301LV) &&
1373 VCLKIndex = ((VCLKIndex >> 2) & 0x03); 1295 !(pVBInfo->VBExtInfo == VB_YPbPr1080i)) {
1374 if (ModeNo > 0x13) { 1296 if (pVBInfo->VBExtInfo == VB_YPbPr750p)
1375 /* di+Ext_CRTVCLK */ 1297 VCLKIndex = YPbPr750pVCLK;
1376 VCLKIndex = 1298 else if (pVBInfo->VBExtInfo == VB_YPbPr525p)
1377 pVBInfo->RefIndex[ 1299 VCLKIndex = YPbPr525pVCLK;
1300 else if (pVBInfo->SetFlag & RPLLDIV2XO)
1301 VCLKIndex = YPbPr525iVCLK_2;
1302 else
1303 VCLKIndex = YPbPr525iVCLK;
1304 }
1305 } else if (pVBInfo->VBInfo & SetCRT2ToTV) {
1306 if (pVBInfo->SetFlag & RPLLDIV2XO) {
1307 VCLKIndex = TVVCLKDIV2;
1308 VCLKIndex += 25;
1309 } else {
1310 VCLKIndex = TVVCLK;
1311 VCLKIndex += 25;
1312 }
1313 } else { /* for CRT2 */
1314 /* Port 3cch */
1315 VCLKIndex = (unsigned char) inb((pVBInfo->P3ca + 0x02));
1316 VCLKIndex = ((VCLKIndex >> 2) & 0x03);
1317 if (ModeNo > 0x13) {
1318 /* di+Ext_CRTVCLK */
1319 VCLKIndex = pVBInfo->RefIndex[
1378 RefreshRateTableIndex]. 1320 RefreshRateTableIndex].
1379 Ext_CRTVCLK; 1321 Ext_CRTVCLK;
1380 VCLKIndex &= IndexMask; 1322 VCLKIndex &= IndexMask;
1381 }
1382 } 1323 }
1383 } 1324 }
1384 } else { /* LVDS */ 1325 } else { /* LVDS */
@@ -1397,7 +1338,6 @@ static unsigned short XGI_GetVCLK2Ptr(unsigned short ModeNo,
1397 else 1338 else
1398 VCLKIndex = LVDSXlat3VCLK[VCLKIndex]; 1339 VCLKIndex = LVDSXlat3VCLK[VCLKIndex];
1399 } 1340 }
1400 /* VCLKIndex = VCLKIndex&IndexMask; */
1401 1341
1402 return VCLKIndex; 1342 return VCLKIndex;
1403} 1343}
@@ -1461,6 +1401,19 @@ static void XGI_SetCRT1VCLK(unsigned short ModeNo,
1461 } 1401 }
1462} 1402}
1463 1403
1404static void XGI_SetXG21FPBits(struct vb_device_info *pVBInfo)
1405{
1406 unsigned char temp;
1407
1408 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); /* D[0] 1: 18bit */
1409 temp = (temp & 1) << 6;
1410 /* SR06[6] 18bit Dither */
1411 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x40, temp);
1412 /* SR09[7] enable FP output, SR09[6] 1: sigle 18bits, 0: dual 12bits */
1413 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80);
1414
1415}
1416
1464static void XGI_SetCRT1FIFO(unsigned short ModeNo, 1417static void XGI_SetCRT1FIFO(unsigned short ModeNo,
1465 struct xgi_hw_device_info *HwDeviceExtension, 1418 struct xgi_hw_device_info *HwDeviceExtension,
1466 struct vb_device_info *pVBInfo) 1419 struct vb_device_info *pVBInfo)
@@ -1532,16 +1485,6 @@ static void XGI_SetVCLKState(struct xgi_hw_device_info *HwDeviceExtension,
1532 xgifb_reg_set(pVBInfo->P3c4, 0x1F, data); 1485 xgifb_reg_set(pVBInfo->P3c4, 0x1F, data);
1533 } 1486 }
1534 1487
1535 /* Jong for Adavantech LCD ripple issue
1536 if ((VCLK >= 0) && (VCLK < 135))
1537 data2 = 0x03;
1538 else if ((VCLK >= 135) && (VCLK < 160))
1539 data2 = 0x02;
1540 else if ((VCLK >= 160) && (VCLK < 260))
1541 data2 = 0x01;
1542 else if (VCLK > 260)
1543 data2 = 0x00;
1544 */
1545 data2 = 0x00; 1488 data2 = 0x00;
1546 1489
1547 xgifb_reg_and_or(pVBInfo->P3c4, 0x07, 0xFC, data2); 1490 xgifb_reg_and_or(pVBInfo->P3c4, 0x07, 0xFC, data2);
@@ -1591,7 +1534,6 @@ static void XGI_SetCRT1ModeRegs(struct xgi_hw_device_info *HwDeviceExtension,
1591 data2 |= 0x20; 1534 data2 |= 0x20;
1592 1535
1593 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x3F, data2); 1536 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x3F, data2);
1594 /* xgifb_reg_set(pVBInfo->P3c4,0x06,data2); */
1595 resindex = XGI_GetResInfo(ModeNo, ModeIdIndex, pVBInfo); 1537 resindex = XGI_GetResInfo(ModeNo, ModeIdIndex, pVBInfo);
1596 if (ModeNo <= 0x13) 1538 if (ModeNo <= 0x13)
1597 xres = pVBInfo->StResInfo[resindex].HTotal; 1539 xres = pVBInfo->StResInfo[resindex].HTotal;
@@ -1636,11 +1578,6 @@ static void XGI_SetCRT1ModeRegs(struct xgi_hw_device_info *HwDeviceExtension,
1636 XGI_SetVCLKState(HwDeviceExtension, ModeNo, RefreshRateTableIndex, 1578 XGI_SetVCLKState(HwDeviceExtension, ModeNo, RefreshRateTableIndex,
1637 pVBInfo); 1579 pVBInfo);
1638 1580
1639 /* if (modeflag&HalfDCLK) //030305 fix lowresolution bug */
1640 /* if (XGINew_IF_DEF_NEW_LOWRES) */
1641 /* XGI_VesaLowResolution(ModeNo, ModeIdIndex);
1642 * //030305 fix lowresolution bug */
1643
1644 data = xgifb_reg_get(pVBInfo->P3d4, 0x31); 1581 data = xgifb_reg_get(pVBInfo->P3d4, 0x31);
1645 1582
1646 if (HwDeviceExtension->jChipType == XG27) { 1583 if (HwDeviceExtension->jChipType == XG27) {
@@ -1803,11 +1740,6 @@ static void XGI_GetLVDSResInfo(unsigned short ModeNo,
1803 /* si+Ext_ResInfo */ 1740 /* si+Ext_ResInfo */
1804 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 1741 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO;
1805 1742
1806 /* if (ModeNo > 0x13) */
1807 /* modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; */
1808 /* else */
1809 /* modeflag = pVBInfo->SModeIDTable[ModeIdIndex].St_ModeFlag; */
1810
1811 if (ModeNo <= 0x13) 1743 if (ModeNo <= 0x13)
1812 /* si+St_ResInfo */ 1744 /* si+St_ResInfo */
1813 resindex = pVBInfo->SModeIDTable[ModeIdIndex].St_ResInfo; 1745 resindex = pVBInfo->SModeIDTable[ModeIdIndex].St_ResInfo;
@@ -1815,8 +1747,6 @@ static void XGI_GetLVDSResInfo(unsigned short ModeNo,
1815 /* si+Ext_ResInfo */ 1747 /* si+Ext_ResInfo */
1816 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO; 1748 resindex = pVBInfo->EModeIDTable[ModeIdIndex].Ext_RESINFO;
1817 1749
1818 /* resindex = XGI_GetResInfo(ModeNo, ModeIdIndex, pVBInfo); */
1819
1820 if (ModeNo <= 0x13) { 1750 if (ModeNo <= 0x13) {
1821 xres = pVBInfo->StResInfo[resindex].HTotal; 1751 xres = pVBInfo->StResInfo[resindex].HTotal;
1822 yres = pVBInfo->StResInfo[resindex].VTotal; 1752 yres = pVBInfo->StResInfo[resindex].VTotal;
@@ -1831,13 +1761,10 @@ static void XGI_GetLVDSResInfo(unsigned short ModeNo,
1831 if (modeflag & DoubleScanMode) 1761 if (modeflag & DoubleScanMode)
1832 yres = yres << 1; 1762 yres = yres << 1;
1833 } 1763 }
1834 /* if (modeflag & Charx8Dot) */
1835 /* { */
1836 1764
1837 if (xres == 720) 1765 if (xres == 720)
1838 xres = 640; 1766 xres = 640;
1839 1767
1840 /* } */
1841 pVBInfo->VGAHDE = xres; 1768 pVBInfo->VGAHDE = xres;
1842 pVBInfo->HDE = xres; 1769 pVBInfo->HDE = xres;
1843 pVBInfo->VGAVDE = yres; 1770 pVBInfo->VGAVDE = yres;
@@ -1890,7 +1817,7 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo,
1890 tempal = (tempal & 0x0f); 1817 tempal = (tempal & 0x0f);
1891 } 1818 }
1892 1819
1893 tempcx = LCDLenList[tempbx]; /* mov cl,byte ptr cs:LCDLenList[bx] */ 1820 tempcx = LCDLenList[tempbx];
1894 1821
1895 if (pVBInfo->LCDInfo & EnableScalingLCD) { /* ScaleLCD */ 1822 if (pVBInfo->LCDInfo & EnableScalingLCD) { /* ScaleLCD */
1896 if ((tempbx == 5) || (tempbx) == 7) 1823 if ((tempbx == 5) || (tempbx) == 7)
@@ -1898,9 +1825,6 @@ static void *XGI_GetLcdPtr(unsigned short BX, unsigned short ModeNo,
1898 else if ((tempbx == 3) || (tempbx == 8)) 1825 else if ((tempbx == 3) || (tempbx == 8))
1899 tempcx = LVDSDesDataLen2; 1826 tempcx = LVDSDesDataLen2;
1900 } 1827 }
1901 /* mov di, word ptr cs:LCDDataList[bx] */
1902 /* tempdi = pVideoMemory[LCDDataList + tempbx * 2] |
1903 (pVideoMemory[LCDDataList + tempbx * 2 + 1] << 8); */
1904 1828
1905 switch (tempbx) { 1829 switch (tempbx) {
1906 case 0: 1830 case 0:
@@ -2321,10 +2245,10 @@ static void *XGI_GetTVPtr(unsigned short BX, unsigned short ModeNo,
2321 2245
2322 switch (tempbx) { 2246 switch (tempbx) {
2323 case 0: 2247 case 0:
2324 tempdi = NULL; /*EPLCHTVCRT1Ptr_H;*/ 2248 tempdi = NULL;
2325 break; 2249 break;
2326 case 1: 2250 case 1:
2327 tempdi = NULL; /*EPLCHTVCRT1Ptr_V;*/ 2251 tempdi = NULL;
2328 break; 2252 break;
2329 case 2: 2253 case 2:
2330 case 6: 2254 case 6:
@@ -2363,9 +2287,7 @@ static void *XGI_GetTVPtr(unsigned short BX, unsigned short ModeNo,
2363 } 2287 }
2364 2288
2365 /* 07/05/22 */ 2289 /* 07/05/22 */
2366 if (table == 0x00) { 2290 if (table == 0x04) {
2367 } else if (table == 0x01) {
2368 } else if (table == 0x04) {
2369 switch (tempdi[i].DATAPTR) { 2291 switch (tempdi[i].DATAPTR) {
2370 case 0: 2292 case 0:
2371 return &XGI_ExtPALData[tempal]; 2293 return &XGI_ExtPALData[tempal];
@@ -2429,7 +2351,6 @@ static void *XGI_GetTVPtr(unsigned short BX, unsigned short ModeNo,
2429 default: 2351 default:
2430 break; 2352 break;
2431 } 2353 }
2432 } else if (table == 0x06) {
2433 } 2354 }
2434 return NULL; 2355 return NULL;
2435} 2356}
@@ -2741,7 +2662,6 @@ static void XGI_SetLVDSRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
2741 else 2662 else
2742 tempbx = LCDPtr->LCDVRS; 2663 tempbx = LCDPtr->LCDVRS;
2743 2664
2744 /* tempbx = tempbx >> 4; */
2745 tempcx = push1; 2665 tempcx = push1;
2746 2666
2747 if (pVBInfo->LCDInfo & EnableScalingLCD) 2667 if (pVBInfo->LCDInfo & EnableScalingLCD)
@@ -2881,7 +2801,6 @@ static void XGI_GetLCDVCLKPtr(unsigned char *di_0, unsigned char *di_1,
2881 unsigned short index; 2801 unsigned short index;
2882 2802
2883 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 2803 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
2884 /* index = XGI_GetLCDCapPtr(pVBInfo); */
2885 index = XGI_GetLCDCapPtr1(pVBInfo); 2804 index = XGI_GetLCDCapPtr1(pVBInfo);
2886 2805
2887 if (pVBInfo->VBInfo & SetCRT2ToLCD) { /* LCDB */ 2806 if (pVBInfo->VBInfo & SetCRT2ToLCD) { /* LCDB */
@@ -3105,19 +3024,6 @@ static void XGI_UpdateModeInfo(struct xgi_hw_device_info *HwDeviceExtension,
3105 } 3024 }
3106} 3025}
3107 3026
3108void XGI_GetVGAType(struct xgi_hw_device_info *HwDeviceExtension,
3109 struct vb_device_info *pVBInfo)
3110{
3111 /*
3112 if ( HwDeviceExtension->jChipType >= XG20 ) {
3113 pVBInfo->Set_VGAType = XG20;
3114 } else {
3115 pVBInfo->Set_VGAType = VGA_XGI340;
3116 }
3117 */
3118 pVBInfo->Set_VGAType = HwDeviceExtension->jChipType;
3119}
3120
3121void XGI_GetVBType(struct vb_device_info *pVBInfo) 3027void XGI_GetVBType(struct vb_device_info *pVBInfo)
3122{ 3028{
3123 unsigned short flag, tempbx, tempah; 3029 unsigned short flag, tempbx, tempah;
@@ -3160,7 +3066,7 @@ void XGI_GetVBType(struct vb_device_info *pVBInfo)
3160 } 3066 }
3161} 3067}
3162 3068
3163void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex, 3069static void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3164 struct xgi_hw_device_info *HwDeviceExtension, 3070 struct xgi_hw_device_info *HwDeviceExtension,
3165 struct vb_device_info *pVBInfo) 3071 struct vb_device_info *pVBInfo)
3166{ 3072{
@@ -3193,14 +3099,9 @@ void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3193 3099
3194 if (pVBInfo->IF_DEF_LCDA == 1) { 3100 if (pVBInfo->IF_DEF_LCDA == 1) {
3195 3101
3196 if ((pVBInfo->Set_VGAType >= XG20) 3102 if ((HwDeviceExtension->jChipType >= XG20) ||
3197 || (pVBInfo->Set_VGAType >= XG40)) { 3103 (HwDeviceExtension->jChipType >= XG40)) {
3198 if (pVBInfo->IF_DEF_LVDS == 0) { 3104 if (pVBInfo->IF_DEF_LVDS == 0) {
3199 /* if ((pVBInfo->VBType & VB_XGI302B)
3200 || (pVBInfo->VBType & VB_XGI301LV)
3201 || (pVBInfo->VBType & VB_XGI302LV)
3202 || (pVBInfo->VBType & VB_XGI301C))
3203 */
3204 if (pVBInfo->VBType & 3105 if (pVBInfo->VBType &
3205 (VB_XGI302B | 3106 (VB_XGI302B |
3206 VB_XGI301LV | 3107 VB_XGI301LV |
@@ -3225,7 +3126,7 @@ void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3225 ((pVBInfo->VBType & VB_XGI301LV) || 3126 ((pVBInfo->VBType & VB_XGI301LV) ||
3226 (pVBInfo->VBType & VB_XGI302LV) || 3127 (pVBInfo->VBType & VB_XGI302LV) ||
3227 (pVBInfo->VBType & VB_XGI301C)))) { 3128 (pVBInfo->VBType & VB_XGI301C)))) {
3228 if (temp & SetYPbPr) { /* temp = CR38 */ 3129 if (temp & SetYPbPr) {
3229 if (pVBInfo->IF_DEF_HiVision == 1) { 3130 if (pVBInfo->IF_DEF_HiVision == 1) {
3230 /* shampoo add for new 3131 /* shampoo add for new
3231 * scratch */ 3132 * scratch */
@@ -3242,8 +3143,6 @@ void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3242 SetCRT2ToYPbPr; 3143 SetCRT2ToYPbPr;
3243 } 3144 }
3244 } 3145 }
3245
3246 /* tempbx |= SetCRT2ToYPbPr; */
3247 } 3146 }
3248 } 3147 }
3249 } 3148 }
@@ -3368,7 +3267,7 @@ void XGI_GetVBInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3368 pVBInfo->VBInfo = tempbx; 3267 pVBInfo->VBInfo = tempbx;
3369} 3268}
3370 3269
3371void XGI_GetTVInfo(unsigned short ModeNo, unsigned short ModeIdIndex, 3270static void XGI_GetTVInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3372 struct vb_device_info *pVBInfo) 3271 struct vb_device_info *pVBInfo)
3373{ 3272{
3374 unsigned short temp, tempbx = 0, resinfo = 0, modeflag, index1; 3273 unsigned short temp, tempbx = 0, resinfo = 0, modeflag, index1;
@@ -3404,17 +3303,6 @@ void XGI_GetTVInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3404 tempbx &= (SetCHTVOverScan | 3303 tempbx &= (SetCHTVOverScan |
3405 SetNTSCJ | 3304 SetNTSCJ |
3406 SetPALTV); 3305 SetPALTV);
3407 /*
3408 if (pVBInfo->IF_DEF_LVDS == 0) {
3409 //PAL-M/PAL-N Info
3410 index1 = xgifb_reg_get(pVBInfo->P3d4, 0x38);
3411 //00:PAL, 01:PAL-M, 10:PAL-N
3412 temp2 = (index1 & 0xC0) >> 5;
3413 tempbx |= temp2;
3414 if (temp2 & 0x02) //PAL-M
3415 tempbx &= (~SetPALTV);
3416 }
3417 */
3418 } 3306 }
3419 3307
3420 if (pVBInfo->IF_DEF_LVDS == 0) { 3308 if (pVBInfo->IF_DEF_LVDS == 0) {
@@ -3476,8 +3364,8 @@ void XGI_GetTVInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3476 pVBInfo->TVInfo = tempbx; 3364 pVBInfo->TVInfo = tempbx;
3477} 3365}
3478 3366
3479unsigned char XGI_GetLCDInfo(unsigned short ModeNo, unsigned short ModeIdIndex, 3367static unsigned char XGI_GetLCDInfo(unsigned short ModeNo,
3480 struct vb_device_info *pVBInfo) 3368 unsigned short ModeIdIndex, struct vb_device_info *pVBInfo)
3481{ 3369{
3482 unsigned short temp, tempax, tempbx, modeflag, resinfo = 0, LCDIdIndex; 3370 unsigned short temp, tempax, tempbx, modeflag, resinfo = 0, LCDIdIndex;
3483 3371
@@ -3553,15 +3441,8 @@ unsigned char XGI_GetLCDInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3553 tempbx |= SetLCDtoNonExpanding; 3441 tempbx |= SetLCDtoNonExpanding;
3554 } 3442 }
3555 3443
3556 /*
3557 if (tempax & LCDBToA) {
3558 tempbx |= SetLCDBToA;
3559 }
3560 */
3561
3562 if (pVBInfo->IF_DEF_ExpLink == 1) { 3444 if (pVBInfo->IF_DEF_ExpLink == 1) {
3563 if (modeflag & HalfDCLK) { 3445 if (modeflag & HalfDCLK) {
3564 /* if (!(pVBInfo->LCDInfo&LCDNonExpanding)) */
3565 if (!(tempbx & SetLCDtoNonExpanding)) { 3446 if (!(tempbx & SetLCDtoNonExpanding)) {
3566 tempbx |= EnableLVDSDDA; 3447 tempbx |= EnableLVDSDDA;
3567 } else { 3448 } else {
@@ -3604,25 +3485,6 @@ unsigned char XGI_GetLCDInfo(unsigned short ModeNo, unsigned short ModeIdIndex,
3604 } 3485 }
3605 } 3486 }
3606 3487
3607 /*
3608 if (pVBInfo->IF_DEF_LVDS == 0) {
3609 if (tempax & (LockLCDBToA | StLCDBToA)) {
3610 if (pVBInfo->VBInfo & SetInSlaveMode) {
3611 if (!((!(tempax & LockLCDBToA)) &&
3612 (ModeNo > 0x13))) {
3613 pVBInfo->VBInfo &=
3614 ~(SetSimuScanMode |
3615 SetInSlaveMode |
3616 SetCRT2ToLCD);
3617 pVBInfo->VBInfo |=
3618 SetCRT2ToLCDA |
3619 SetCRT2ToDualEdge;
3620 }
3621 }
3622 }
3623 }
3624 */
3625
3626 return 1; 3488 return 1;
3627} 3489}
3628 3490
@@ -3632,10 +3494,6 @@ unsigned char XGI_SearchModeID(unsigned short ModeNo,
3632 if (ModeNo <= 5) 3494 if (ModeNo <= 5)
3633 ModeNo |= 1; 3495 ModeNo |= 1;
3634 if (ModeNo <= 0x13) { 3496 if (ModeNo <= 0x13) {
3635 /* for (*ModeIdIndex=0;
3636 *ModeIdIndex < sizeof(pVBInfo->SModeIDTable)
3637 / sizeof(struct XGI_StStruct);
3638 (*ModeIdIndex)++) */
3639 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) { 3497 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
3640 if (pVBInfo->SModeIDTable[*ModeIdIndex].St_ModeID == 3498 if (pVBInfo->SModeIDTable[*ModeIdIndex].St_ModeID ==
3641 ModeNo) 3499 ModeNo)
@@ -3651,10 +3509,6 @@ unsigned char XGI_SearchModeID(unsigned short ModeNo,
3651 (*ModeIdIndex) += 2; /* 400 lines */ 3509 (*ModeIdIndex) += 2; /* 400 lines */
3652 /* else 350 lines */ 3510 /* else 350 lines */
3653 } else { 3511 } else {
3654 /* for (*ModeIdIndex=0;
3655 *ModeIdIndex < sizeof(pVBInfo->EModeIDTable)
3656 / sizeof(struct XGI_ExtStruct);
3657 (*ModeIdIndex)++) */
3658 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) { 3512 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
3659 if (pVBInfo->EModeIDTable[*ModeIdIndex].Ext_ModeID == 3513 if (pVBInfo->EModeIDTable[*ModeIdIndex].Ext_ModeID ==
3660 ModeNo) 3514 ModeNo)
@@ -3675,7 +3529,6 @@ static unsigned char XG21GPIODataTransfer(unsigned char ujDate)
3675 3529
3676 for (i = 0; i < 8; i++) { 3530 for (i = 0; i < 8; i++) {
3677 ujRet = ujRet << 1; 3531 ujRet = ujRet << 1;
3678 /* ujRet |= GETBITS(ujDate >> i, 0:0); */
3679 ujRet |= (ujDate >> i) & 1; 3532 ujRet |= (ujDate >> i) & 1;
3680 } 3533 }
3681 3534
@@ -3726,7 +3579,101 @@ static unsigned char XGI_XG27GetPSCValue(struct vb_device_info *pVBInfo)
3726 return temp; 3579 return temp;
3727} 3580}
3728 3581
3729void XGI_DisplayOn(struct xgi_hw_device_info *pXGIHWDE, 3582/*----------------------------------------------------------------------------*/
3583/* input */
3584/* bl[5] : 1;LVDS signal on */
3585/* bl[1] : 1;LVDS backlight on */
3586/* bl[0] : 1:LVDS VDD on */
3587/* bh: 100000b : clear bit 5, to set bit5 */
3588/* 000010b : clear bit 1, to set bit1 */
3589/* 000001b : clear bit 0, to set bit0 */
3590/*----------------------------------------------------------------------------*/
3591static void XGI_XG21BLSignalVDD(unsigned short tempbh, unsigned short tempbl,
3592 struct vb_device_info *pVBInfo)
3593{
3594 unsigned char CR4A, temp;
3595
3596 CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A);
3597 tempbh &= 0x23;
3598 tempbl &= 0x23;
3599 xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~tempbh); /* enable GPIO write */
3600
3601 if (tempbh & 0x20) {
3602 temp = (tempbl >> 4) & 0x02;
3603
3604 /* CR B4[1] */
3605 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp);
3606
3607 }
3608
3609 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48);
3610
3611 temp = XG21GPIODataTransfer(temp);
3612 temp &= ~tempbh;
3613 temp |= tempbl;
3614 xgifb_reg_set(pVBInfo->P3d4, 0x48, temp);
3615}
3616
3617static void XGI_XG27BLSignalVDD(unsigned short tempbh, unsigned short tempbl,
3618 struct vb_device_info *pVBInfo)
3619{
3620 unsigned char CR4A, temp;
3621 unsigned short tempbh0, tempbl0;
3622
3623 tempbh0 = tempbh;
3624 tempbl0 = tempbl;
3625 tempbh0 &= 0x20;
3626 tempbl0 &= 0x20;
3627 tempbh0 >>= 3;
3628 tempbl0 >>= 3;
3629
3630 if (tempbh & 0x20) {
3631 temp = (tempbl >> 4) & 0x02;
3632
3633 /* CR B4[1] */
3634 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp);
3635
3636 }
3637 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~tempbh0, tempbl0);
3638
3639 CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A);
3640 tempbh &= 0x03;
3641 tempbl &= 0x03;
3642 tempbh <<= 2;
3643 tempbl <<= 2; /* GPIOC,GPIOD */
3644 xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~tempbh); /* enable GPIO write */
3645 xgifb_reg_and_or(pVBInfo->P3d4, 0x48, ~tempbh, tempbl);
3646}
3647
3648/* --------------------------------------------------------------------- */
3649/* Function : XGI_XG21SetPanelDelay */
3650/* Input : */
3651/* Output : */
3652/* Description : */
3653/* I/P : bl : 1 ; T1 : the duration between CPL on and signal on */
3654/* : bl : 2 ; T2 : the duration signal on and Vdd on */
3655/* : bl : 3 ; T3 : the duration between CPL off and signal off */
3656/* : bl : 4 ; T4 : the duration signal off and Vdd off */
3657/* --------------------------------------------------------------------- */
3658static void XGI_XG21SetPanelDelay(struct xgifb_video_info *xgifb_info,
3659 unsigned short tempbl,
3660 struct vb_device_info *pVBInfo)
3661{
3662 if (tempbl == 1)
3663 mdelay(xgifb_info->lvds_data.PSC_S1);
3664
3665 if (tempbl == 2)
3666 mdelay(xgifb_info->lvds_data.PSC_S2);
3667
3668 if (tempbl == 3)
3669 mdelay(xgifb_info->lvds_data.PSC_S3);
3670
3671 if (tempbl == 4)
3672 mdelay(xgifb_info->lvds_data.PSC_S4);
3673}
3674
3675static void XGI_DisplayOn(struct xgifb_video_info *xgifb_info,
3676 struct xgi_hw_device_info *pXGIHWDE,
3730 struct vb_device_info *pVBInfo) 3677 struct vb_device_info *pVBInfo)
3731{ 3678{
3732 3679
@@ -3736,12 +3683,12 @@ void XGI_DisplayOn(struct xgi_hw_device_info *pXGIHWDE,
3736 if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x1)) { 3683 if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x1)) {
3737 /* LVDS VDD on */ 3684 /* LVDS VDD on */
3738 XGI_XG21BLSignalVDD(0x01, 0x01, pVBInfo); 3685 XGI_XG21BLSignalVDD(0x01, 0x01, pVBInfo);
3739 XGI_XG21SetPanelDelay(2, pVBInfo); 3686 XGI_XG21SetPanelDelay(xgifb_info, 2, pVBInfo);
3740 } 3687 }
3741 if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x20)) 3688 if (!(XGI_XG21GetPSCValue(pVBInfo) & 0x20))
3742 /* LVDS signal on */ 3689 /* LVDS signal on */
3743 XGI_XG21BLSignalVDD(0x20, 0x20, pVBInfo); 3690 XGI_XG21BLSignalVDD(0x20, 0x20, pVBInfo);
3744 XGI_XG21SetPanelDelay(3, pVBInfo); 3691 XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo);
3745 /* LVDS backlight on */ 3692 /* LVDS backlight on */
3746 XGI_XG21BLSignalVDD(0x02, 0x02, pVBInfo); 3693 XGI_XG21BLSignalVDD(0x02, 0x02, pVBInfo);
3747 } else { 3694 } else {
@@ -3756,12 +3703,12 @@ void XGI_DisplayOn(struct xgi_hw_device_info *pXGIHWDE,
3756 if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x1)) { 3703 if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x1)) {
3757 /* LVDS VDD on */ 3704 /* LVDS VDD on */
3758 XGI_XG27BLSignalVDD(0x01, 0x01, pVBInfo); 3705 XGI_XG27BLSignalVDD(0x01, 0x01, pVBInfo);
3759 XGI_XG21SetPanelDelay(2, pVBInfo); 3706 XGI_XG21SetPanelDelay(xgifb_info, 2, pVBInfo);
3760 } 3707 }
3761 if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x20)) 3708 if (!(XGI_XG27GetPSCValue(pVBInfo) & 0x20))
3762 /* LVDS signal on */ 3709 /* LVDS signal on */
3763 XGI_XG27BLSignalVDD(0x20, 0x20, pVBInfo); 3710 XGI_XG27BLSignalVDD(0x20, 0x20, pVBInfo);
3764 XGI_XG21SetPanelDelay(3, pVBInfo); 3711 XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo);
3765 /* LVDS backlight on */ 3712 /* LVDS backlight on */
3766 XGI_XG27BLSignalVDD(0x02, 0x02, pVBInfo); 3713 XGI_XG27BLSignalVDD(0x02, 0x02, pVBInfo);
3767 } else { 3714 } else {
@@ -3772,7 +3719,8 @@ void XGI_DisplayOn(struct xgi_hw_device_info *pXGIHWDE,
3772 } 3719 }
3773} 3720}
3774 3721
3775void XGI_DisplayOff(struct xgi_hw_device_info *pXGIHWDE, 3722void XGI_DisplayOff(struct xgifb_video_info *xgifb_info,
3723 struct xgi_hw_device_info *pXGIHWDE,
3776 struct vb_device_info *pVBInfo) 3724 struct vb_device_info *pVBInfo)
3777{ 3725{
3778 3726
@@ -3780,7 +3728,7 @@ void XGI_DisplayOff(struct xgi_hw_device_info *pXGIHWDE,
3780 if (pVBInfo->IF_DEF_LVDS == 1) { 3728 if (pVBInfo->IF_DEF_LVDS == 1) {
3781 /* LVDS backlight off */ 3729 /* LVDS backlight off */
3782 XGI_XG21BLSignalVDD(0x02, 0x00, pVBInfo); 3730 XGI_XG21BLSignalVDD(0x02, 0x00, pVBInfo);
3783 XGI_XG21SetPanelDelay(3, pVBInfo); 3731 XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo);
3784 } else { 3732 } else {
3785 /* DVO/DVI signal off */ 3733 /* DVO/DVI signal off */
3786 XGI_XG21BLSignalVDD(0x20, 0x00, pVBInfo); 3734 XGI_XG21BLSignalVDD(0x20, 0x00, pVBInfo);
@@ -3791,7 +3739,7 @@ void XGI_DisplayOff(struct xgi_hw_device_info *pXGIHWDE,
3791 if ((XGI_XG27GetPSCValue(pVBInfo) & 0x2)) { 3739 if ((XGI_XG27GetPSCValue(pVBInfo) & 0x2)) {
3792 /* LVDS backlight off */ 3740 /* LVDS backlight off */
3793 XGI_XG27BLSignalVDD(0x02, 0x00, pVBInfo); 3741 XGI_XG27BLSignalVDD(0x02, 0x00, pVBInfo);
3794 XGI_XG21SetPanelDelay(3, pVBInfo); 3742 XGI_XG21SetPanelDelay(xgifb_info, 3, pVBInfo);
3795 } 3743 }
3796 3744
3797 if (pVBInfo->IF_DEF_LVDS == 0) 3745 if (pVBInfo->IF_DEF_LVDS == 0)
@@ -3838,26 +3786,17 @@ static void XGI_GetCRT2ResInfo(unsigned short ModeNo,
3838 if (ModeNo <= 0x13) { 3786 if (ModeNo <= 0x13) {
3839 xres = pVBInfo->StResInfo[resindex].HTotal; 3787 xres = pVBInfo->StResInfo[resindex].HTotal;
3840 yres = pVBInfo->StResInfo[resindex].VTotal; 3788 yres = pVBInfo->StResInfo[resindex].VTotal;
3841 /* si+St_ResInfo */
3842 /* modeflag = pVBInfo->SModeIDTable[ModeIdIndex].St_ModeFlag;*/
3843 } else { 3789 } else {
3844 xres = pVBInfo->ModeResInfo[resindex].HTotal; /* xres->ax */ 3790 xres = pVBInfo->ModeResInfo[resindex].HTotal; /* xres->ax */
3845 yres = pVBInfo->ModeResInfo[resindex].VTotal; /* yres->bx */ 3791 yres = pVBInfo->ModeResInfo[resindex].VTotal; /* yres->bx */
3846 /* si+St_ModeFlag */ 3792 /* si+St_ModeFlag */
3847 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3793 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3848 3794
3849 /*
3850 if (pVBInfo->IF_DEF_FSTN) {
3851 xres *= 2;
3852 yres *= 2;
3853 } else {
3854 */
3855 if (modeflag & HalfDCLK) 3795 if (modeflag & HalfDCLK)
3856 xres *= 2; 3796 xres *= 2;
3857 3797
3858 if (modeflag & DoubleScanMode) 3798 if (modeflag & DoubleScanMode)
3859 yres *= 2; 3799 yres *= 2;
3860 /* } */
3861 } 3800 }
3862 3801
3863 if (pVBInfo->VBInfo & SetCRT2ToLCD) { 3802 if (pVBInfo->VBInfo & SetCRT2ToLCD) {
@@ -4028,8 +3967,6 @@ static void XGI_GetCRT2Data(unsigned short ModeNo, unsigned short ModeIdIndex,
4028 tempbx = 775; 3967 tempbx = 775;
4029 else if (pVBInfo->VGAVDE == 600) 3968 else if (pVBInfo->VGAVDE == 600)
4030 tempbx = 775; 3969 tempbx = 775;
4031 /* else if (pVBInfo->VGAVDE==350) tempbx=560; */
4032 /* else if (pVBInfo->VGAVDE==400) tempbx=640; */
4033 else 3970 else
4034 tempbx = 768; 3971 tempbx = 768;
4035 } else 3972 } else
@@ -4294,7 +4231,6 @@ static void XGI_PreSetGroup1(unsigned short ModeNo, unsigned short ModeIdIndex,
4294 XGI_SetCRT2Offset(ModeNo, ModeIdIndex, RefreshRateTableIndex, 4231 XGI_SetCRT2Offset(ModeNo, ModeIdIndex, RefreshRateTableIndex,
4295 HwDeviceExtension, pVBInfo); 4232 HwDeviceExtension, pVBInfo);
4296 XGI_SetCRT2FIFO(pVBInfo); 4233 XGI_SetCRT2FIFO(pVBInfo);
4297 /* XGI_SetCRT2Sync(ModeNo,RefreshRateTableIndex); */
4298 4234
4299 for (tempcx = 4; tempcx < 7; tempcx++) 4235 for (tempcx = 4; tempcx < 7; tempcx++)
4300 xgifb_reg_set(pVBInfo->Part1Port, tempcx, 0x0); 4236 xgifb_reg_set(pVBInfo->Part1Port, tempcx, 0x0);
@@ -4497,9 +4433,6 @@ static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
4497 4433
4498 temp = 0xFF; /* set MAX HT */ 4434 temp = 0xFF; /* set MAX HT */
4499 xgifb_reg_set(pVBInfo->Part1Port, 0x03, temp); 4435 xgifb_reg_set(pVBInfo->Part1Port, 0x03, temp);
4500 /* if (modeflag & Charx8Dot) */
4501 /* tempcx = 0x08; */
4502 /* else */
4503 tempcx = 0x08; 4436 tempcx = 0x08;
4504 4437
4505 if (pVBInfo->VBType & (VB_XGI301LV | VB_XGI302LV | VB_XGI301C)) 4438 if (pVBInfo->VBType & (VB_XGI301LV | VB_XGI302LV | VB_XGI301C))
@@ -4565,7 +4498,6 @@ static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
4565 } 4498 }
4566 } 4499 }
4567 } else { 4500 } else {
4568 /* tempcx = tempbx & 0x00FF ; */
4569 tempbx = (tempbx & 0xFF00) >> 8; 4501 tempbx = (tempbx & 0xFF00) >> 8;
4570 tempcx = (tempcx + tempbx) >> 1; 4502 tempcx = (tempcx + tempbx) >> 1;
4571 temp = (tempcx & 0x00FF) + 2; 4503 temp = (tempcx & 0x00FF) + 2;
@@ -4579,36 +4511,23 @@ static void XGI_SetLockRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
4579 temp -= 6; 4511 temp -= 6;
4580 } 4512 }
4581 } 4513 }
4582 } else { 4514 } else if (!(modeflag & HalfDCLK)) {
4583 if (!(modeflag & HalfDCLK)) { 4515 temp -= 4;
4584 temp -= 4; 4516 if (pVBInfo->LCDResInfo != Panel1280x960 &&
4585 if (pVBInfo->LCDResInfo != Panel1280x960) { 4517 pVBInfo->VGAHDE >= 800) {
4586 if (pVBInfo->VGAHDE >= 800) { 4518 temp -= 7;
4587 temp -= 7; 4519 if (pVBInfo->ModeType == ModeEGA &&
4588 if (pVBInfo->ModeType == 4520 pVBInfo->VGAVDE == 1024) {
4589 ModeEGA) { 4521 temp += 15;
4590 if (pVBInfo->VGAVDE == 4522 if (pVBInfo->LCDResInfo !=
4591 1024) { 4523 Panel1280x1024)
4592 temp += 15; 4524 temp += 7;
4593 if (pVBInfo->LCDResInfo != Panel1280x1024) {
4594 temp +=
4595 7;
4596 }
4597 }
4598 }
4599
4600 if (pVBInfo->VGAHDE >= 1280) {
4601 if (pVBInfo->LCDResInfo
4602 != Panel1280x960) {
4603 if (pVBInfo->LCDInfo
4604 & LCDNonExpanding) {
4605 temp
4606 += 28;
4607 }
4608 }
4609 }
4610 }
4611 } 4525 }
4526
4527 if (pVBInfo->VGAHDE >= 1280 &&
4528 pVBInfo->LCDResInfo != Panel1280x960 &&
4529 (pVBInfo->LCDInfo & LCDNonExpanding))
4530 temp += 28;
4612 } 4531 }
4613 } 4532 }
4614 } 4533 }
@@ -5297,7 +5216,6 @@ static void XGI_SetGroup2(unsigned short ModeNo, unsigned short ModeIdIndex,
5297 tempax--; 5216 tempax--;
5298 xgifb_reg_and(pVBInfo->Part2Port, 0x01, tempax); 5217 xgifb_reg_and(pVBInfo->Part2Port, 0x01, tempax);
5299 5218
5300 /* if ( !( pVBInfo->VBType & VB_XGI301C ) ) */
5301 xgifb_reg_and(pVBInfo->Part2Port, 0x00, 0xEF); 5219 xgifb_reg_and(pVBInfo->Part2Port, 0x00, 0xEF);
5302 } 5220 }
5303 5221
@@ -5436,7 +5354,6 @@ static void XGI_SetLCDRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
5436 tempax = pVBInfo->VT; 5354 tempax = pVBInfo->VT;
5437 tempbx = pVBInfo->LCDVRS; 5355 tempbx = pVBInfo->LCDVRS;
5438 5356
5439 /* if (SetLCD_Info & EnableScalingLCD) */
5440 tempcx += tempbx; 5357 tempcx += tempbx;
5441 if (tempcx >= tempax) 5358 if (tempcx >= tempax)
5442 tempcx -= tempax; 5359 tempcx -= tempax;
@@ -5478,12 +5395,10 @@ static void XGI_SetLCDRegs(unsigned short ModeNo, unsigned short ModeIdIndex,
5478 temp = (tempcx & 0xFF00) >> 8; 5395 temp = (tempcx & 0xFF00) >> 8;
5479 xgifb_reg_set(pVBInfo->Part2Port, 0x25, temp); 5396 xgifb_reg_set(pVBInfo->Part2Port, 0x25, temp);
5480 5397
5481 /* getlcdsync() */
5482 XGI_GetLCDSync(&tempax, &tempbx, pVBInfo); 5398 XGI_GetLCDSync(&tempax, &tempbx, pVBInfo);
5483 tempcx = tempax; 5399 tempcx = tempax;
5484 tempax = pVBInfo->HT; 5400 tempax = pVBInfo->HT;
5485 tempbx = pVBInfo->LCDHRS; 5401 tempbx = pVBInfo->LCDHRS;
5486 /* if ( SetLCD_Info & EnableScalingLCD) */
5487 if (XGI_IsLCDDualLink(pVBInfo)) { 5402 if (XGI_IsLCDDualLink(pVBInfo)) {
5488 tempax = tempax >> 1; 5403 tempax = tempax >> 1;
5489 tempbx = tempbx >> 1; 5404 tempbx = tempbx >> 1;
@@ -5801,9 +5716,6 @@ static void XGI_SetGroup4(unsigned short ModeNo, unsigned short ModeIdIndex,
5801 if (XGI_IsLCDDualLink(pVBInfo)) 5716 if (XGI_IsLCDDualLink(pVBInfo))
5802 tempax = tempax >> 1; 5717 tempax = tempax >> 1;
5803 5718
5804 /* if((pVBInfo->VBInfo&(SetCRT2ToLCD)) ||
5805 ((pVBInfo->TVInfo&SetYPbPrMode525p) ||
5806 (pVBInfo->TVInfo&SetYPbPrMode750p))) { */
5807 if (pVBInfo->VBInfo & SetCRT2ToLCD) { 5719 if (pVBInfo->VBInfo & SetCRT2ToLCD) {
5808 if (tempax > 800) 5720 if (tempax > 800)
5809 tempax -= 800; 5721 tempax -= 800;
@@ -5817,33 +5729,6 @@ static void XGI_SetGroup4(unsigned short ModeNo, unsigned short ModeIdIndex,
5817 } 5729 }
5818 tempax -= 1; 5730 tempax -= 1;
5819 5731
5820 /*
5821 if (pVBInfo->VBInfo & (SetCRT2ToTV | SetCRT2ToHiVisionTV)) {
5822 if (pVBInfo->VBType & VB_XGI301LV) {
5823 if (!(pVBInfo->TVInfo &
5824 (SetYPbPrMode525p |
5825 SetYPbPrMode750p |
5826 SetYPbPrMode1080i))) {
5827 if (pVBInfo->VGAHDE > 800) {
5828 if (pVBInfo->VGAHDE == 1024)
5829 tempax =(tempax * 25 /
5830 32) - 1;
5831 else
5832 tempax = (tempax * 20 /
5833 32) - 1;
5834 }
5835 }
5836 } else {
5837 if (pVBInfo->VGAHDE > 800) {
5838 if (pVBInfo->VGAHDE == 1024)
5839 tempax = (tempax * 25 / 32) - 1;
5840 else
5841 tempax = (tempax * 20 / 32) - 1;
5842 }
5843 }
5844 }
5845 */
5846
5847 temp = (tempax & 0xFF00) >> 8; 5732 temp = (tempax & 0xFF00) >> 8;
5848 temp = ((temp & 0x0003) << 4); 5733 temp = ((temp & 0x0003) << 4);
5849 xgifb_reg_set(pVBInfo->Part4Port, 0x1E, temp); 5734 xgifb_reg_set(pVBInfo->Part4Port, 0x1E, temp);
@@ -5902,7 +5787,6 @@ static void XGI_SetGroup5(unsigned short ModeNo, unsigned short ModeIdIndex,
5902 if (!(pVBInfo->VBInfo & (SetInSlaveMode | LoadDACFlag 5787 if (!(pVBInfo->VBInfo & (SetInSlaveMode | LoadDACFlag
5903 | CRT2DisplayFlag))) { 5788 | CRT2DisplayFlag))) {
5904 XGINew_EnableCRT2(pVBInfo); 5789 XGINew_EnableCRT2(pVBInfo);
5905 /* LoadDAC2(pVBInfo->Part5Port, ModeNo, ModeIdIndex); */
5906 } 5790 }
5907 } 5791 }
5908 return; 5792 return;
@@ -5921,118 +5805,11 @@ static void XGI_DisableGatingCRT(struct xgi_hw_device_info *HwDeviceExtension,
5921 xgifb_reg_and_or(pVBInfo->P3d4, 0x63, 0xBF, 0x00); 5805 xgifb_reg_and_or(pVBInfo->P3d4, 0x63, 0xBF, 0x00);
5922} 5806}
5923 5807
5924/*----------------------------------------------------------------------------*/ 5808static unsigned char XGI_XG21CheckLVDSMode(struct xgifb_video_info *xgifb_info,
5925/* input */ 5809 unsigned short ModeNo, unsigned short ModeIdIndex,
5926/* bl[5] : 1;LVDS signal on */
5927/* bl[1] : 1;LVDS backlight on */
5928/* bl[0] : 1:LVDS VDD on */
5929/* bh: 100000b : clear bit 5, to set bit5 */
5930/* 000010b : clear bit 1, to set bit1 */
5931/* 000001b : clear bit 0, to set bit0 */
5932/*----------------------------------------------------------------------------*/
5933void XGI_XG21BLSignalVDD(unsigned short tempbh, unsigned short tempbl,
5934 struct vb_device_info *pVBInfo)
5935{
5936 unsigned char CR4A, temp;
5937
5938 CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A);
5939 tempbh &= 0x23;
5940 tempbl &= 0x23;
5941 xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~tempbh); /* enable GPIO write */
5942
5943 if (tempbh & 0x20) {
5944 temp = (tempbl >> 4) & 0x02;
5945
5946 /* CR B4[1] */
5947 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp);
5948
5949 }
5950
5951 temp = xgifb_reg_get(pVBInfo->P3d4, 0x48);
5952
5953 temp = XG21GPIODataTransfer(temp);
5954 temp &= ~tempbh;
5955 temp |= tempbl;
5956 xgifb_reg_set(pVBInfo->P3d4, 0x48, temp);
5957}
5958
5959void XGI_XG27BLSignalVDD(unsigned short tempbh, unsigned short tempbl,
5960 struct vb_device_info *pVBInfo)
5961{
5962 unsigned char CR4A, temp;
5963 unsigned short tempbh0, tempbl0;
5964
5965 tempbh0 = tempbh;
5966 tempbl0 = tempbl;
5967 tempbh0 &= 0x20;
5968 tempbl0 &= 0x20;
5969 tempbh0 >>= 3;
5970 tempbl0 >>= 3;
5971
5972 if (tempbh & 0x20) {
5973 temp = (tempbl >> 4) & 0x02;
5974
5975 /* CR B4[1] */
5976 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~0x02, temp);
5977
5978 }
5979 xgifb_reg_and_or(pVBInfo->P3d4, 0xB4, ~tempbh0, tempbl0);
5980
5981 CR4A = xgifb_reg_get(pVBInfo->P3d4, 0x4A);
5982 tempbh &= 0x03;
5983 tempbl &= 0x03;
5984 tempbh <<= 2;
5985 tempbl <<= 2; /* GPIOC,GPIOD */
5986 xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~tempbh); /* enable GPIO write */
5987 xgifb_reg_and_or(pVBInfo->P3d4, 0x48, ~tempbh, tempbl);
5988}
5989
5990/* --------------------------------------------------------------------- */
5991unsigned short XGI_GetLVDSOEMTableIndex(struct vb_device_info *pVBInfo)
5992{
5993 unsigned short index;
5994
5995 index = xgifb_reg_get(pVBInfo->P3d4, 0x36);
5996 if (index < sizeof(XGI21_LCDCapList)
5997 / sizeof(struct XGI21_LVDSCapStruct))
5998 return index;
5999 return 0;
6000}
6001
6002/* --------------------------------------------------------------------- */
6003/* Function : XGI_XG21SetPanelDelay */
6004/* Input : */
6005/* Output : */
6006/* Description : */
6007/* I/P : bl : 1 ; T1 : the duration between CPL on and signal on */
6008/* : bl : 2 ; T2 : the duration signal on and Vdd on */
6009/* : bl : 3 ; T3 : the duration between CPL off and signal off */
6010/* : bl : 4 ; T4 : the duration signal off and Vdd off */
6011/* --------------------------------------------------------------------- */
6012void XGI_XG21SetPanelDelay(unsigned short tempbl,
6013 struct vb_device_info *pVBInfo) 5810 struct vb_device_info *pVBInfo)
6014{ 5811{
6015 unsigned short index; 5812 unsigned short xres, yres, colordepth, modeflag, resindex;
6016
6017 index = XGI_GetLVDSOEMTableIndex(pVBInfo);
6018 if (tempbl == 1)
6019 mdelay(pVBInfo->XG21_LVDSCapList[index].PSC_S1);
6020
6021 if (tempbl == 2)
6022 mdelay(pVBInfo->XG21_LVDSCapList[index].PSC_S2);
6023
6024 if (tempbl == 3)
6025 mdelay(pVBInfo->XG21_LVDSCapList[index].PSC_S3);
6026
6027 if (tempbl == 4)
6028 mdelay(pVBInfo->XG21_LVDSCapList[index].PSC_S4);
6029}
6030
6031unsigned char XGI_XG21CheckLVDSMode(unsigned short ModeNo,
6032 unsigned short ModeIdIndex, struct vb_device_info *pVBInfo)
6033{
6034 unsigned short xres, yres, colordepth, modeflag, resindex,
6035 lvdstableindex;
6036 5813
6037 resindex = XGI_GetResInfo(ModeNo, ModeIdIndex, pVBInfo); 5814 resindex = XGI_GetResInfo(ModeNo, ModeIdIndex, pVBInfo);
6038 if (ModeNo <= 0x13) { 5815 if (ModeNo <= 0x13) {
@@ -6061,18 +5838,15 @@ unsigned char XGI_XG21CheckLVDSMode(unsigned short ModeNo,
6061 5838
6062 } 5839 }
6063 5840
6064 lvdstableindex = XGI_GetLVDSOEMTableIndex(pVBInfo); 5841 if (xres > xgifb_info->lvds_data.LVDSHDE)
6065 if (xres > (pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSHDE))
6066 return 0; 5842 return 0;
6067 5843
6068 if (yres > (pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSVDE)) 5844 if (yres > xgifb_info->lvds_data.LVDSVDE)
6069 return 0; 5845 return 0;
6070 5846
6071 if (ModeNo > 0x13) { 5847 if (ModeNo > 0x13) {
6072 if ((xres != (pVBInfo->XG21_LVDSCapList[lvdstableindex]. 5848 if (xres != xgifb_info->lvds_data.LVDSHDE ||
6073 LVDSHDE)) || 5849 yres != xgifb_info->lvds_data.LVDSVDE) {
6074 (yres != (pVBInfo->XG21_LVDSCapList[lvdstableindex].
6075 LVDSVDE))) {
6076 colordepth = XGI_GetColorDepth(ModeNo, 5850 colordepth = XGI_GetColorDepth(ModeNo,
6077 ModeIdIndex, 5851 ModeIdIndex,
6078 pVBInfo); 5852 pVBInfo);
@@ -6084,55 +5858,26 @@ unsigned char XGI_XG21CheckLVDSMode(unsigned short ModeNo,
6084 return 1; 5858 return 1;
6085} 5859}
6086 5860
6087void XGI_SetXG21FPBits(struct vb_device_info *pVBInfo) 5861static void xgifb_set_lvds(struct xgifb_video_info *xgifb_info,
6088{ 5862 int chip_id,
6089 unsigned char temp;
6090
6091 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37); /* D[0] 1: 18bit */
6092 temp = (temp & 1) << 6;
6093 /* SR06[6] 18bit Dither */
6094 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0x40, temp);
6095 /* SR09[7] enable FP output, SR09[6] 1: sigle 18bits, 0: dual 12bits */
6096 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80);
6097
6098}
6099
6100void XGI_SetXG27FPBits(struct vb_device_info *pVBInfo)
6101{
6102 unsigned char temp;
6103
6104 /* D[1:0] 01: 18bit, 00: dual 12, 10: single 24 */
6105 temp = xgifb_reg_get(pVBInfo->P3d4, 0x37);
6106 temp = (temp & 3) << 6;
6107 /* SR06[7]0: dual 12/1: single 24 [6] 18bit Dither <= 0 h/w recommend */
6108 xgifb_reg_and_or(pVBInfo->P3c4, 0x06, ~0xc0, temp & 0x80);
6109 /* SR09[7] enable FP output, SR09[6] 1: sigle 18bits, 0: 24bits */
6110 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0xc0, temp | 0x80);
6111
6112}
6113
6114static void xgifb_set_lvds(int chip_id,
6115 unsigned short ModeNo, 5863 unsigned short ModeNo,
6116 unsigned short ModeIdIndex, 5864 unsigned short ModeIdIndex,
6117 struct vb_device_info *pVBInfo) 5865 struct vb_device_info *pVBInfo)
6118{ 5866{
6119 unsigned char temp, Miscdata; 5867 unsigned char temp, Miscdata;
6120 unsigned short xres, yres, modeflag, resindex, lvdstableindex; 5868 unsigned short xres, yres, modeflag, resindex;
6121 unsigned short LVDSHT, LVDSHBS, LVDSHRS, LVDSHRE, LVDSHBE; 5869 unsigned short LVDSHT, LVDSHBS, LVDSHRS, LVDSHRE, LVDSHBE;
6122 unsigned short LVDSVT, LVDSVBS, LVDSVRS, LVDSVRE, LVDSVBE; 5870 unsigned short LVDSVT, LVDSVBS, LVDSVRS, LVDSVRE, LVDSVBE;
6123 unsigned short value; 5871 unsigned short value;
6124 5872
6125 lvdstableindex = XGI_GetLVDSOEMTableIndex(pVBInfo); 5873 temp = (unsigned char) ((xgifb_info->lvds_data.LVDS_Capability &
6126 temp = (unsigned char) ((pVBInfo->XG21_LVDSCapList[lvdstableindex].
6127 LVDS_Capability &
6128 (LCDPolarity << 8)) >> 8); 5874 (LCDPolarity << 8)) >> 8);
6129 temp &= LCDPolarity; 5875 temp &= LCDPolarity;
6130 Miscdata = (unsigned char) inb(pVBInfo->P3cc); 5876 Miscdata = (unsigned char) inb(pVBInfo->P3cc);
6131 5877
6132 outb((Miscdata & 0x3F) | temp, pVBInfo->P3c2); 5878 outb((Miscdata & 0x3F) | temp, pVBInfo->P3c2);
6133 5879
6134 temp = (unsigned char) (pVBInfo->XG21_LVDSCapList[lvdstableindex]. 5880 temp = xgifb_info->lvds_data.LVDS_Capability & LCDPolarity;
6135 LVDS_Capability & LCDPolarity);
6136 /* SR35[7] FP VSync polarity */ 5881 /* SR35[7] FP VSync polarity */
6137 xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x80, temp & 0x80); 5882 xgifb_reg_and_or(pVBInfo->P3c4, 0x35, ~0x80, temp & 0x80);
6138 /* SR30[5] FP HSync polarity */ 5883 /* SR30[5] FP HSync polarity */
@@ -6159,48 +5904,43 @@ static void xgifb_set_lvds(int chip_id,
6159 if (!(modeflag & Charx8Dot)) 5904 if (!(modeflag & Charx8Dot))
6160 xres = xres * 8 / 9; 5905 xres = xres * 8 / 9;
6161 5906
6162 LVDSHT = pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSHT; 5907 LVDSHT = xgifb_info->lvds_data.LVDSHT;
6163 5908
6164 LVDSHBS = xres + (pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSHDE 5909 LVDSHBS = xres + (xgifb_info->lvds_data.LVDSHDE - xres) / 2;
6165 - xres) / 2;
6166 if ((ModeNo <= 0x13) && (modeflag & HalfDCLK)) 5910 if ((ModeNo <= 0x13) && (modeflag & HalfDCLK))
6167 LVDSHBS -= xres / 4; 5911 LVDSHBS -= xres / 4;
6168 5912
6169 if (LVDSHBS > LVDSHT) 5913 if (LVDSHBS > LVDSHT)
6170 LVDSHBS -= LVDSHT; 5914 LVDSHBS -= LVDSHT;
6171 5915
6172 LVDSHRS = LVDSHBS + pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSHFP; 5916 LVDSHRS = LVDSHBS + xgifb_info->lvds_data.LVDSHFP;
6173 if (LVDSHRS > LVDSHT) 5917 if (LVDSHRS > LVDSHT)
6174 LVDSHRS -= LVDSHT; 5918 LVDSHRS -= LVDSHT;
6175 5919
6176 LVDSHRE = LVDSHRS + pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSHSYNC; 5920 LVDSHRE = LVDSHRS + xgifb_info->lvds_data.LVDSHSYNC;
6177 if (LVDSHRE > LVDSHT) 5921 if (LVDSHRE > LVDSHT)
6178 LVDSHRE -= LVDSHT; 5922 LVDSHRE -= LVDSHT;
6179 5923
6180 LVDSHBE = LVDSHBS + LVDSHT 5924 LVDSHBE = LVDSHBS + LVDSHT - xgifb_info->lvds_data.LVDSHDE;
6181 - pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSHDE;
6182 5925
6183 LVDSVT = pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSVT; 5926 LVDSVT = xgifb_info->lvds_data.LVDSVT;
6184 5927
6185 LVDSVBS = yres + (pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSVDE 5928 LVDSVBS = yres + (xgifb_info->lvds_data.LVDSVDE - yres) / 2;
6186 - yres) / 2;
6187 if ((ModeNo > 0x13) && (modeflag & DoubleScanMode)) 5929 if ((ModeNo > 0x13) && (modeflag & DoubleScanMode))
6188 LVDSVBS += yres / 2; 5930 LVDSVBS += yres / 2;
6189 5931
6190 if (LVDSVBS > LVDSVT) 5932 if (LVDSVBS > LVDSVT)
6191 LVDSVBS -= LVDSVT; 5933 LVDSVBS -= LVDSVT;
6192 5934
6193 LVDSVRS = LVDSVBS + pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSVFP; 5935 LVDSVRS = LVDSVBS + xgifb_info->lvds_data.LVDSVFP;
6194 if (LVDSVRS > LVDSVT) 5936 if (LVDSVRS > LVDSVT)
6195 LVDSVRS -= LVDSVT; 5937 LVDSVRS -= LVDSVT;
6196 5938
6197 LVDSVRE = LVDSVRS + pVBInfo->XG21_LVDSCapList[lvdstableindex]. 5939 LVDSVRE = LVDSVRS + xgifb_info->lvds_data.LVDSVSYNC;
6198 LVDSVSYNC;
6199 if (LVDSVRE > LVDSVT) 5940 if (LVDSVRE > LVDSVT)
6200 LVDSVRE -= LVDSVT; 5941 LVDSVRE -= LVDSVT;
6201 5942
6202 LVDSVBE = LVDSVBS + LVDSVT 5943 LVDSVBE = LVDSVBS + LVDSVT - xgifb_info->lvds_data.LVDSVDE;
6203 - pVBInfo->XG21_LVDSCapList[lvdstableindex].LVDSVDE;
6204 5944
6205 temp = (unsigned char) xgifb_reg_get(pVBInfo->P3d4, 0x11); 5945 temp = (unsigned char) xgifb_reg_get(pVBInfo->P3d4, 0x11);
6206 xgifb_reg_set(pVBInfo->P3d4, 0x11, temp & 0x7f); /* Unlock CRTC */ 5946 xgifb_reg_set(pVBInfo->P3d4, 0x11, temp & 0x7f); /* Unlock CRTC */
@@ -6300,13 +6040,9 @@ static void xgifb_set_lvds(int chip_id,
6300 6040
6301 xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, value); 6041 xgifb_reg_and_or(pVBInfo->P3c4, 0x31, ~0x30, value);
6302 xgifb_reg_set(pVBInfo->P3c4, 6042 xgifb_reg_set(pVBInfo->P3c4,
6303 0x2B, 6043 0x2B, xgifb_info->lvds_data.VCLKData1);
6304 pVBInfo->XG21_LVDSCapList[lvdstableindex].
6305 VCLKData1);
6306 xgifb_reg_set(pVBInfo->P3c4, 6044 xgifb_reg_set(pVBInfo->P3c4,
6307 0x2C, 6045 0x2C, xgifb_info->lvds_data.VCLKData2);
6308 pVBInfo->XG21_LVDSCapList[lvdstableindex].
6309 VCLKData2);
6310 value += 0x10; 6046 value += 0x10;
6311 } 6047 }
6312 6048
@@ -6398,7 +6134,8 @@ static unsigned char XGI_EnableChISLCD(struct vb_device_info *pVBInfo)
6398 return 0; 6134 return 0;
6399} 6135}
6400 6136
6401void XGI_DisableBridge(struct xgi_hw_device_info *HwDeviceExtension, 6137static void XGI_DisableBridge(struct xgifb_video_info *xgifb_info,
6138 struct xgi_hw_device_info *HwDeviceExtension,
6402 struct vb_device_info *pVBInfo) 6139 struct vb_device_info *pVBInfo)
6403{ 6140{
6404 unsigned short tempah = 0; 6141 unsigned short tempah = 0;
@@ -6442,7 +6179,7 @@ void XGI_DisableBridge(struct xgi_hw_device_info *HwDeviceExtension,
6442 | SetSimuScanMode))) { 6179 | SetSimuScanMode))) {
6443 if (pVBInfo->SetFlag & GatingCRT) 6180 if (pVBInfo->SetFlag & GatingCRT)
6444 XGI_EnableGatingCRT(HwDeviceExtension, pVBInfo); 6181 XGI_EnableGatingCRT(HwDeviceExtension, pVBInfo);
6445 XGI_DisplayOff(HwDeviceExtension, pVBInfo); 6182 XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo);
6446 } 6183 }
6447 6184
6448 if (pVBInfo->VBInfo & SetCRT2ToLCDA) { 6185 if (pVBInfo->VBInfo & SetCRT2ToLCDA) {
@@ -6464,7 +6201,6 @@ void XGI_DisableBridge(struct xgi_hw_device_info *HwDeviceExtension,
6464 ((!(pVBInfo->VBInfo & SetCRT2ToLCDA)) && 6201 ((!(pVBInfo->VBInfo & SetCRT2ToLCDA)) &&
6465 (pVBInfo->VBInfo & 6202 (pVBInfo->VBInfo &
6466 (SetCRT2ToRAMDAC | SetCRT2ToLCD | SetCRT2ToTV)))) 6203 (SetCRT2ToRAMDAC | SetCRT2ToLCD | SetCRT2ToTV))))
6467 /* BScreenOff=1 */
6468 xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x80); 6204 xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x80);
6469 6205
6470 if ((pVBInfo->SetFlag & DisableChB) || 6206 if ((pVBInfo->SetFlag & DisableChB) ||
@@ -6484,7 +6220,6 @@ void XGI_DisableBridge(struct xgi_hw_device_info *HwDeviceExtension,
6484 } 6220 }
6485 } else { /* {301} */ 6221 } else { /* {301} */
6486 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) { 6222 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
6487 /* BScreenOff=1 */
6488 xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x80); 6223 xgifb_reg_or(pVBInfo->Part1Port, 0x00, 0x80);
6489 /* Disable CRT2 */ 6224 /* Disable CRT2 */
6490 xgifb_reg_and(pVBInfo->Part1Port, 0x1E, 0xDF); 6225 xgifb_reg_and(pVBInfo->Part1Port, 0x1E, 0xDF);
@@ -6494,7 +6229,7 @@ void XGI_DisableBridge(struct xgi_hw_device_info *HwDeviceExtension,
6494 6229
6495 if (pVBInfo->VBInfo & (DisableCRT2Display | SetCRT2ToLCDA 6230 if (pVBInfo->VBInfo & (DisableCRT2Display | SetCRT2ToLCDA
6496 | SetSimuScanMode)) 6231 | SetSimuScanMode))
6497 XGI_DisplayOff(HwDeviceExtension, pVBInfo); 6232 XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo);
6498 } 6233 }
6499} 6234}
6500 6235
@@ -6610,17 +6345,6 @@ static void XGI_SetDelayComp(struct vb_device_info *pVBInfo)
6610 6345
6611 if (pVBInfo->VBInfo & SetCRT2ToDualEdge) 6346 if (pVBInfo->VBInfo & SetCRT2ToDualEdge)
6612 tempbl = tempbl >> 4; 6347 tempbl = tempbl >> 4;
6613 /*
6614 if (pVBInfo->VBInfo & SetCRT2ToRAMDAC)
6615 tempbl = CRT2Delay1; // Get CRT2 Delay
6616 if (pVBInfo->VBType &
6617 (VB_XGI301B |
6618 VB_XGI302B |
6619 VB_XGI301LV |
6620 VB_XGI302LV |
6621 VB_XGI301C))
6622 tempbl = CRT2Delay2;
6623 */
6624 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 6348 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
6625 /* Get LCD Delay */ 6349 /* Get LCD Delay */
6626 index = XGI_GetLCDCapPtr(pVBInfo); 6350 index = XGI_GetLCDCapPtr(pVBInfo);
@@ -6680,23 +6404,6 @@ static void XGI_SetLCDCap_A(unsigned short tempcx,
6680 (unsigned short) (0x30 | (tempcx & 0x00C0))); 6404 (unsigned short) (0x30 | (tempcx & 0x00C0)));
6681 xgifb_reg_and_or(pVBInfo->Part1Port, 0x1A, 0x7F, 0x00); 6405 xgifb_reg_and_or(pVBInfo->Part1Port, 0x1A, 0x7F, 0x00);
6682 } 6406 }
6683
6684 /*
6685 if (tempcx & EnableLCD24bpp) { // 24bits
6686 xgifb_reg_and_or(pVBInfo->Part1Port,
6687 0x19,
6688 0x0F,
6689 (unsigned short)(0x30 | (tempcx&0x00C0)));
6690 xgifb_reg_and_or(pVBInfo->Part1Port, 0x1A, 0x7F, 0x00);
6691 } else {
6692 xgifb_reg_and_or(pVBInfo->Part1Port,
6693 0x19,
6694 0x0F,
6695 // Enable Dither
6696 (unsigned short)(0x20 | (tempcx&0x00C0)));
6697 xgifb_reg_and_or(pVBInfo->Part1Port, 0x1A, 0x7F, 0x80);
6698 }
6699 */
6700} 6407}
6701 6408
6702/* --------------------------------------------------------------------- */ 6409/* --------------------------------------------------------------------- */
@@ -6718,6 +6425,25 @@ static void XGI_SetLCDCap_B(unsigned short tempcx,
6718 | 0x18)); /* Enable Dither */ 6425 | 0x18)); /* Enable Dither */
6719} 6426}
6720 6427
6428static void XGI_LongWait(struct vb_device_info *pVBInfo)
6429{
6430 unsigned short i;
6431
6432 i = xgifb_reg_get(pVBInfo->P3c4, 0x1F);
6433
6434 if (!(i & 0xC0)) {
6435 for (i = 0; i < 0xFFFF; i++) {
6436 if (!(inb(pVBInfo->P3da) & 0x08))
6437 break;
6438 }
6439
6440 for (i = 0; i < 0xFFFF; i++) {
6441 if ((inb(pVBInfo->P3da) & 0x08))
6442 break;
6443 }
6444 }
6445}
6446
6721static void SetSpectrum(struct vb_device_info *pVBInfo) 6447static void SetSpectrum(struct vb_device_info *pVBInfo)
6722{ 6448{
6723 unsigned short index; 6449 unsigned short index;
@@ -6940,14 +6666,12 @@ static void XGI_OEM310Setting(unsigned short ModeNo,
6940 unsigned short ModeIdIndex, 6666 unsigned short ModeIdIndex,
6941 struct vb_device_info *pVBInfo) 6667 struct vb_device_info *pVBInfo)
6942{ 6668{
6943 /* GetPart1IO(); */
6944 XGI_SetDelayComp(pVBInfo); 6669 XGI_SetDelayComp(pVBInfo);
6945 6670
6946 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) 6671 if (pVBInfo->VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))
6947 XGI_SetLCDCap(pVBInfo); 6672 XGI_SetLCDCap(pVBInfo);
6948 6673
6949 if (pVBInfo->VBInfo & SetCRT2ToTV) { 6674 if (pVBInfo->VBInfo & SetCRT2ToTV) {
6950 /* GetPart2IO() */
6951 XGI_SetPhaseIncr(pVBInfo); 6675 XGI_SetPhaseIncr(pVBInfo);
6952 XGI_SetYFilter(ModeNo, ModeIdIndex, pVBInfo); 6676 XGI_SetYFilter(ModeNo, ModeIdIndex, pVBInfo);
6953 XGI_SetAntiFlicker(ModeNo, ModeIdIndex, pVBInfo); 6677 XGI_SetAntiFlicker(ModeNo, ModeIdIndex, pVBInfo);
@@ -6963,7 +6687,7 @@ static void XGI_OEM310Setting(unsigned short ModeNo,
6963/* Output : */ 6687/* Output : */
6964/* Description : Origin code for crt2group */ 6688/* Description : Origin code for crt2group */
6965/* --------------------------------------------------------------------- */ 6689/* --------------------------------------------------------------------- */
6966void XGI_SetCRT2ModeRegs(unsigned short ModeNo, 6690static void XGI_SetCRT2ModeRegs(unsigned short ModeNo,
6967 struct xgi_hw_device_info *HwDeviceExtension, 6691 struct xgi_hw_device_info *HwDeviceExtension,
6968 struct vb_device_info *pVBInfo) 6692 struct vb_device_info *pVBInfo)
6969{ 6693{
@@ -6972,8 +6696,6 @@ void XGI_SetCRT2ModeRegs(unsigned short ModeNo,
6972 6696
6973 unsigned char tempah; 6697 unsigned char tempah;
6974 6698
6975 /* // fix write part1 index 0 BTDRAM bit Bug
6976 * xgifb_reg_set(pVBInfo->Part1Port, 0x03, 0x00); */
6977 tempah = 0; 6699 tempah = 0;
6978 if (!(pVBInfo->VBInfo & DisableCRT2Display)) { 6700 if (!(pVBInfo->VBInfo & DisableCRT2Display)) {
6979 tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x00); 6701 tempah = xgifb_reg_get(pVBInfo->Part1Port, 0x00);
@@ -6999,32 +6721,6 @@ void XGI_SetCRT2ModeRegs(unsigned short ModeNo,
6999 } 6721 }
7000 } 6722 }
7001 6723
7002 /* 0210 shampoo
7003 if (pVBInfo->VBInfo & DisableCRT2Display) {
7004 tempah = 0;
7005 }
7006
7007 xgifb_reg_set(pVBInfo->Part1Port, 0x00, tempah);
7008 if (pVBInfo->VBInfo & (SetCRT2ToRAMDAC | SetCRT2ToTV | SetCRT2ToLCD)) {
7009 tempcl = pVBInfo->ModeType;
7010 if (ModeNo > 0x13) {
7011 tempcl -= ModeVGA;
7012 if ((tempcl > 0) || (tempcl == 0)) {
7013 tempah=(0x008>>tempcl) ;
7014 if (tempah == 0)
7015 tempah = 1;
7016 tempah |= 0x040;
7017 }
7018 } else {
7019 tempah = 0x040;
7020 }
7021
7022 if (pVBInfo->VBInfo & SetInSlaveMode) {
7023 tempah = (tempah ^ 0x050);
7024 }
7025 }
7026 */
7027
7028 xgifb_reg_set(pVBInfo->Part1Port, 0x00, tempah); 6724 xgifb_reg_set(pVBInfo->Part1Port, 0x00, tempah);
7029 tempah = 0x08; 6725 tempah = 0x08;
7030 tempbl = 0xf0; 6726 tempbl = 0xf0;
@@ -7093,14 +6789,11 @@ void XGI_SetCRT2ModeRegs(unsigned short ModeNo,
7093 tempah |= 0x080; 6789 tempah |= 0x080;
7094 6790
7095 if (pVBInfo->VBInfo & SetCRT2ToTV) { 6791 if (pVBInfo->VBInfo & SetCRT2ToTV) {
7096 /* if (!(pVBInfo->TVInfo &
7097 (SetYPbPrMode525p | SetYPbPrMode750p))) { */
7098 tempah |= 0x020; 6792 tempah |= 0x020;
7099 if (ModeNo > 0x13) { 6793 if (ModeNo > 0x13) {
7100 if (pVBInfo->VBInfo & DriverMode) 6794 if (pVBInfo->VBInfo & DriverMode)
7101 tempah = tempah ^ 0x20; 6795 tempah = tempah ^ 0x20;
7102 } 6796 }
7103 /* } */
7104 } 6797 }
7105 6798
7106 xgifb_reg_and_or(pVBInfo->Part4Port, 0x0D, ~0x0BF, tempah); 6799 xgifb_reg_and_or(pVBInfo->Part4Port, 0x0D, ~0x0BF, tempah);
@@ -7110,12 +6803,8 @@ void XGI_SetCRT2ModeRegs(unsigned short ModeNo,
7110 tempah |= 0x40; 6803 tempah |= 0x40;
7111 6804
7112 if (pVBInfo->VBInfo & SetCRT2ToTV) { 6805 if (pVBInfo->VBInfo & SetCRT2ToTV) {
7113 /* if ((!(pVBInfo->VBInfo & SetCRT2ToHiVisionTV)) &&
7114 (!(pVBInfo->TVInfo &
7115 (SetYPbPrMode525p | SetYPbPrMode750p)))) { */
7116 if (pVBInfo->TVInfo & RPLLDIV2XO) 6806 if (pVBInfo->TVInfo & RPLLDIV2XO)
7117 tempah |= 0x40; 6807 tempah |= 0x40;
7118 /* } */
7119 } 6808 }
7120 6809
7121 if ((pVBInfo->LCDResInfo == Panel1280x1024) 6810 if ((pVBInfo->LCDResInfo == Panel1280x1024)
@@ -7219,57 +6908,6 @@ unsigned char XGI_BridgeIsOn(struct vb_device_info *pVBInfo)
7219 } 6908 }
7220} 6909}
7221 6910
7222void XGI_LongWait(struct vb_device_info *pVBInfo)
7223{
7224 unsigned short i;
7225
7226 i = xgifb_reg_get(pVBInfo->P3c4, 0x1F);
7227
7228 if (!(i & 0xC0)) {
7229 for (i = 0; i < 0xFFFF; i++) {
7230 if (!(inb(pVBInfo->P3da) & 0x08))
7231 break;
7232 }
7233
7234 for (i = 0; i < 0xFFFF; i++) {
7235 if ((inb(pVBInfo->P3da) & 0x08))
7236 break;
7237 }
7238 }
7239}
7240
7241static void XGI_VBLongWait(struct vb_device_info *pVBInfo)
7242{
7243 unsigned short tempal, temp, i, j;
7244 return;
7245 if (!(pVBInfo->VBInfo & SetCRT2ToTV)) {
7246 temp = 0;
7247 for (i = 0; i < 3; i++) {
7248 for (j = 0; j < 100; j++) {
7249 tempal = inb(pVBInfo->P3da);
7250 if (temp & 0x01) { /* VBWaitMode2 */
7251 if ((tempal & 0x08))
7252 continue;
7253
7254 if (!(tempal & 0x08))
7255 break;
7256
7257 } else { /* VBWaitMode1 */
7258 if (!(tempal & 0x08))
7259 continue;
7260
7261 if ((tempal & 0x08))
7262 break;
7263 }
7264 }
7265 temp = temp ^ 0x01;
7266 }
7267 } else {
7268 XGI_LongWait(pVBInfo);
7269 }
7270 return;
7271}
7272
7273unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE, 6911unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
7274 unsigned short ModeNo, unsigned short ModeIdIndex, 6912 unsigned short ModeNo, unsigned short ModeIdIndex,
7275 struct vb_device_info *pVBInfo) 6913 struct vb_device_info *pVBInfo)
@@ -7322,12 +6960,6 @@ unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
7322 RefreshRateTableIndex = pVBInfo->EModeIDTable[ModeIdIndex].REFindex; 6960 RefreshRateTableIndex = pVBInfo->EModeIDTable[ModeIdIndex].REFindex;
7323 ModeNo = pVBInfo->RefIndex[RefreshRateTableIndex].ModeID; 6961 ModeNo = pVBInfo->RefIndex[RefreshRateTableIndex].ModeID;
7324 if (pXGIHWDE->jChipType >= XG20) { /* for XG20, XG21, XG27 */ 6962 if (pXGIHWDE->jChipType >= XG20) { /* for XG20, XG21, XG27 */
7325 /*
7326 if (pVBInfo->RefIndex[RefreshRateTableIndex].Ext_InfoFlag &
7327 XG2xNotSupport) {
7328 index++;
7329 }
7330 */
7331 if ((pVBInfo->RefIndex[RefreshRateTableIndex].XRes == 800) && 6963 if ((pVBInfo->RefIndex[RefreshRateTableIndex].XRes == 800) &&
7332 (pVBInfo->RefIndex[RefreshRateTableIndex].YRes == 600)) { 6964 (pVBInfo->RefIndex[RefreshRateTableIndex].YRes == 600)) {
7333 index++; 6965 index++;
@@ -7371,7 +7003,7 @@ unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
7371 temp = XGI_AjustCRT2Rate(ModeNo, ModeIdIndex, 7003 temp = XGI_AjustCRT2Rate(ModeNo, ModeIdIndex,
7372 RefreshRateTableIndex, &i, pVBInfo); 7004 RefreshRateTableIndex, &i, pVBInfo);
7373 } 7005 }
7374 return RefreshRateTableIndex + i; /* return (0x01 | (temp1<<1)); */ 7006 return RefreshRateTableIndex + i;
7375} 7007}
7376 7008
7377static void XGI_SetLCDAGroup(unsigned short ModeNo, unsigned short ModeIdIndex, 7009static void XGI_SetLCDAGroup(unsigned short ModeNo, unsigned short ModeIdIndex,
@@ -7379,9 +7011,6 @@ static void XGI_SetLCDAGroup(unsigned short ModeNo, unsigned short ModeIdIndex,
7379 struct vb_device_info *pVBInfo) 7011 struct vb_device_info *pVBInfo)
7380{ 7012{
7381 unsigned short RefreshRateTableIndex; 7013 unsigned short RefreshRateTableIndex;
7382 /* unsigned short temp ; */
7383
7384 /* pVBInfo->SelectCRT2Rate = 0; */
7385 7014
7386 pVBInfo->SetFlag |= ProgrammingCRT2; 7015 pVBInfo->SetFlag |= ProgrammingCRT2;
7387 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo, 7016 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
@@ -7394,7 +7023,7 @@ static void XGI_SetLCDAGroup(unsigned short ModeNo, unsigned short ModeIdIndex,
7394 XGI_SetCRT2ECLK(ModeNo, ModeIdIndex, RefreshRateTableIndex, pVBInfo); 7023 XGI_SetCRT2ECLK(ModeNo, ModeIdIndex, RefreshRateTableIndex, pVBInfo);
7395} 7024}
7396 7025
7397unsigned char XGI_SetCRT2Group301(unsigned short ModeNo, 7026static unsigned char XGI_SetCRT2Group301(unsigned short ModeNo,
7398 struct xgi_hw_device_info *HwDeviceExtension, 7027 struct xgi_hw_device_info *HwDeviceExtension,
7399 struct vb_device_info *pVBInfo) 7028 struct vb_device_info *pVBInfo)
7400{ 7029{
@@ -7499,10 +7128,6 @@ void XGI_SenseCRT1(struct vb_device_info *pVBInfo)
7499 outb((unsigned char) DAC_TEST_PARMS[2], (pVBInfo->P3c8 + 1)); 7128 outb((unsigned char) DAC_TEST_PARMS[2], (pVBInfo->P3c8 + 1));
7500 } 7129 }
7501 7130
7502 XGI_VBLongWait(pVBInfo);
7503 XGI_VBLongWait(pVBInfo);
7504 XGI_VBLongWait(pVBInfo);
7505
7506 mdelay(1); 7131 mdelay(1);
7507 7132
7508 XGI_WaitDisply(pVBInfo); 7133 XGI_WaitDisply(pVBInfo);
@@ -7532,7 +7157,8 @@ void XGI_SenseCRT1(struct vb_device_info *pVBInfo)
7532 xgifb_reg_set(pVBInfo->P3c4, 0x1F, (unsigned char) SR1F); 7157 xgifb_reg_set(pVBInfo->P3c4, 0x1F, (unsigned char) SR1F);
7533} 7158}
7534 7159
7535void XGI_EnableBridge(struct xgi_hw_device_info *HwDeviceExtension, 7160static void XGI_EnableBridge(struct xgifb_video_info *xgifb_info,
7161 struct xgi_hw_device_info *HwDeviceExtension,
7536 struct vb_device_info *pVBInfo) 7162 struct vb_device_info *pVBInfo)
7537{ 7163{
7538 unsigned short tempah; 7164 unsigned short tempah;
@@ -7544,7 +7170,6 @@ void XGI_EnableBridge(struct xgi_hw_device_info *HwDeviceExtension,
7544 /* Power on */ 7170 /* Power on */
7545 xgifb_reg_set(pVBInfo->Part1Port, 0x1E, 0x20); 7171 xgifb_reg_set(pVBInfo->Part1Port, 0x1E, 0x20);
7546 } else { 7172 } else {
7547 /* SetCRT2ToLCDA ) */
7548 if (pVBInfo->VBInfo & SetCRT2ToDualEdge) { 7173 if (pVBInfo->VBInfo & SetCRT2ToDualEdge) {
7549 /* Power on */ 7174 /* Power on */
7550 xgifb_reg_set(pVBInfo->Part1Port, 7175 xgifb_reg_set(pVBInfo->Part1Port,
@@ -7572,10 +7197,8 @@ void XGI_EnableBridge(struct xgi_hw_device_info *HwDeviceExtension,
7572 pVBInfo->Part1Port, 0x2E); 7197 pVBInfo->Part1Port, 0x2E);
7573 7198
7574 if (!(tempah & 0x80)) 7199 if (!(tempah & 0x80))
7575 /* BVBDOENABLE = 1 */
7576 xgifb_reg_or(pVBInfo->Part1Port, 7200 xgifb_reg_or(pVBInfo->Part1Port,
7577 0x2E, 0x80); 7201 0x2E, 0x80);
7578 /* BScreenOFF = 0 */
7579 xgifb_reg_and(pVBInfo->Part1Port, 0x00, 0x7F); 7202 xgifb_reg_and(pVBInfo->Part1Port, 0x00, 0x7F);
7580 } 7203 }
7581 } 7204 }
@@ -7638,12 +7261,11 @@ void XGI_EnableBridge(struct xgi_hw_device_info *HwDeviceExtension,
7638 xgifb_reg_or(pVBInfo->Part4Port, 0x1F, tempah); 7261 xgifb_reg_or(pVBInfo->Part4Port, 0x1F, tempah);
7639 7262
7640 if (!(pVBInfo->SetFlag & DisableChA)) { 7263 if (!(pVBInfo->SetFlag & DisableChA)) {
7641 XGI_VBLongWait(pVBInfo);
7642 if (!(pVBInfo->SetFlag & GatingCRT)) { 7264 if (!(pVBInfo->SetFlag & GatingCRT)) {
7643 XGI_DisableGatingCRT(HwDeviceExtension, 7265 XGI_DisableGatingCRT(HwDeviceExtension,
7644 pVBInfo); 7266 pVBInfo);
7645 XGI_DisplayOn(HwDeviceExtension, pVBInfo); 7267 XGI_DisplayOn(xgifb_info, HwDeviceExtension,
7646 XGI_VBLongWait(pVBInfo); 7268 pVBInfo);
7647 } 7269 }
7648 } 7270 }
7649 } /* 301 */ 7271 } /* 301 */
@@ -7656,15 +7278,15 @@ void XGI_EnableBridge(struct xgi_hw_device_info *HwDeviceExtension,
7656 tempah = (unsigned char) xgifb_reg_get(pVBInfo->Part1Port, 7278 tempah = (unsigned char) xgifb_reg_get(pVBInfo->Part1Port,
7657 0x2E); 7279 0x2E);
7658 if (!(tempah & 0x80)) 7280 if (!(tempah & 0x80))
7659 /* BVBDOENABLE = 1 */
7660 xgifb_reg_or(pVBInfo->Part1Port, 0x2E, 0x80); 7281 xgifb_reg_or(pVBInfo->Part1Port, 0x2E, 0x80);
7661 7282
7662 xgifb_reg_and(pVBInfo->Part1Port, 0x00, 0x7F); 7283 xgifb_reg_and(pVBInfo->Part1Port, 0x00, 0x7F);
7663 XGI_DisplayOn(HwDeviceExtension, pVBInfo); 7284 XGI_DisplayOn(xgifb_info, HwDeviceExtension, pVBInfo);
7664 } /* End of VB */ 7285 } /* End of VB */
7665} 7286}
7666 7287
7667static void XGI_SetCRT1Group(struct xgi_hw_device_info *HwDeviceExtension, 7288static void XGI_SetCRT1Group(struct xgifb_video_info *xgifb_info,
7289 struct xgi_hw_device_info *HwDeviceExtension,
7668 unsigned short ModeNo, unsigned short ModeIdIndex, 7290 unsigned short ModeNo, unsigned short ModeIdIndex,
7669 struct vb_device_info *pVBInfo) 7291 struct vb_device_info *pVBInfo)
7670{ 7292{
@@ -7672,18 +7294,14 @@ static void XGI_SetCRT1Group(struct xgi_hw_device_info *HwDeviceExtension,
7672 7294
7673 unsigned short XGINew_P3cc = pVBInfo->P3cc; 7295 unsigned short XGINew_P3cc = pVBInfo->P3cc;
7674 7296
7675 /* XGINew_CRT1Mode = ModeNo; // SaveModeID */
7676 StandTableIndex = XGI_GetModePtr(ModeNo, ModeIdIndex, pVBInfo); 7297 StandTableIndex = XGI_GetModePtr(ModeNo, ModeIdIndex, pVBInfo);
7677 /* XGI_SetBIOSData(ModeNo, ModeIdIndex); */
7678 /* XGI_ClearBankRegs(ModeNo, ModeIdIndex); */
7679 XGI_SetSeqRegs(ModeNo, StandTableIndex, ModeIdIndex, pVBInfo); 7298 XGI_SetSeqRegs(ModeNo, StandTableIndex, ModeIdIndex, pVBInfo);
7680 XGI_SetMiscRegs(StandTableIndex, pVBInfo); 7299 outb(pVBInfo->StandTable[StandTableIndex].MISC, pVBInfo->P3c2);
7681 XGI_SetCRTCRegs(HwDeviceExtension, StandTableIndex, pVBInfo); 7300 XGI_SetCRTCRegs(HwDeviceExtension, StandTableIndex, pVBInfo);
7682 XGI_SetATTRegs(ModeNo, StandTableIndex, ModeIdIndex, pVBInfo); 7301 XGI_SetATTRegs(ModeNo, StandTableIndex, ModeIdIndex, pVBInfo);
7683 XGI_SetGRCRegs(StandTableIndex, pVBInfo); 7302 XGI_SetGRCRegs(StandTableIndex, pVBInfo);
7684 XGI_ClearExt1Regs(pVBInfo); 7303 XGI_ClearExt1Regs(pVBInfo);
7685 7304
7686 /* if (pVBInfo->IF_DEF_ExpLink) */
7687 if (HwDeviceExtension->jChipType == XG27) { 7305 if (HwDeviceExtension->jChipType == XG27) {
7688 if (pVBInfo->IF_DEF_LVDS == 0) 7306 if (pVBInfo->IF_DEF_LVDS == 0)
7689 XGI_SetDefaultVCLK(pVBInfo); 7307 XGI_SetDefaultVCLK(pVBInfo);
@@ -7735,11 +7353,6 @@ static void XGI_SetCRT1Group(struct xgi_hw_device_info *HwDeviceExtension,
7735 temp = xgifb_reg_get(pVBInfo->P3d4, 0x38); 7353 temp = xgifb_reg_get(pVBInfo->P3d4, 0x38);
7736 if (temp & 0xA0) { 7354 if (temp & 0xA0) {
7737 7355
7738 /* Enable write GPIOF */
7739 /* xgifb_reg_and(pVBInfo->P3d4, 0x4A, ~0x20); */
7740 /* P. DWN */
7741 /* xgifb_reg_and(pVBInfo->P3d4, 0x48, ~0x20); */
7742 /* XG21 CRT1 Timing */
7743 if (HwDeviceExtension->jChipType == XG27) 7356 if (HwDeviceExtension->jChipType == XG27)
7744 XGI_SetXG27CRTC(ModeNo, ModeIdIndex, 7357 XGI_SetXG27CRTC(ModeNo, ModeIdIndex,
7745 RefreshRateTableIndex, pVBInfo); 7358 RefreshRateTableIndex, pVBInfo);
@@ -7754,10 +7367,9 @@ static void XGI_SetCRT1Group(struct xgi_hw_device_info *HwDeviceExtension,
7754 pVBInfo, RefreshRateTableIndex, ModeNo); 7367 pVBInfo, RefreshRateTableIndex, ModeNo);
7755 7368
7756 if (pVBInfo->IF_DEF_LVDS == 1) 7369 if (pVBInfo->IF_DEF_LVDS == 1)
7757 xgifb_set_lvds(HwDeviceExtension->jChipType, 7370 xgifb_set_lvds(xgifb_info,
7371 HwDeviceExtension->jChipType,
7758 ModeNo, ModeIdIndex, pVBInfo); 7372 ModeNo, ModeIdIndex, pVBInfo);
7759 /* P. ON */
7760 /* xgifb_reg_or(pVBInfo->P3d4, 0x48, 0x20); */
7761 } 7373 }
7762 } 7374 }
7763 7375
@@ -7765,22 +7377,16 @@ static void XGI_SetCRT1Group(struct xgi_hw_device_info *HwDeviceExtension,
7765 XGI_SetCRT1FIFO(ModeNo, HwDeviceExtension, pVBInfo); 7377 XGI_SetCRT1FIFO(ModeNo, HwDeviceExtension, pVBInfo);
7766 XGI_SetCRT1ModeRegs(HwDeviceExtension, ModeNo, ModeIdIndex, 7378 XGI_SetCRT1ModeRegs(HwDeviceExtension, ModeNo, ModeIdIndex,
7767 RefreshRateTableIndex, pVBInfo); 7379 RefreshRateTableIndex, pVBInfo);
7768
7769 /* XGI_LoadCharacter(); //dif ifdef TVFont */
7770
7771 XGI_LoadDAC(ModeNo, ModeIdIndex, pVBInfo); 7380 XGI_LoadDAC(ModeNo, ModeIdIndex, pVBInfo);
7772 /* XGI_ClearBuffer(HwDeviceExtension, ModeNo, pVBInfo); */
7773} 7381}
7774 7382
7775unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension, 7383unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info,
7384 struct xgi_hw_device_info *HwDeviceExtension,
7776 unsigned short ModeNo) 7385 unsigned short ModeNo)
7777{ 7386{
7778 unsigned short ModeIdIndex; 7387 unsigned short ModeIdIndex;
7779 /* unsigned char *pVBInfo->FBAddr =
7780 HwDeviceExtension->pjVideoMemoryAddress; */
7781 struct vb_device_info VBINF; 7388 struct vb_device_info VBINF;
7782 struct vb_device_info *pVBInfo = &VBINF; 7389 struct vb_device_info *pVBInfo = &VBINF;
7783 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase;
7784 pVBInfo->BaseAddr = (unsigned long) HwDeviceExtension->pjIOAddress; 7390 pVBInfo->BaseAddr = (unsigned long) HwDeviceExtension->pjIOAddress;
7785 pVBInfo->IF_DEF_LVDS = 0; 7391 pVBInfo->IF_DEF_LVDS = 0;
7786 pVBInfo->IF_DEF_LCDA = 1; 7392 pVBInfo->IF_DEF_LCDA = 1;
@@ -7831,14 +7437,8 @@ unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
7831 XGI_GetVBType(pVBInfo); 7437 XGI_GetVBType(pVBInfo);
7832 7438
7833 InitTo330Pointer(HwDeviceExtension->jChipType, pVBInfo); 7439 InitTo330Pointer(HwDeviceExtension->jChipType, pVBInfo);
7834 if (ModeNo & 0x80) { 7440 if (ModeNo & 0x80)
7835 ModeNo = ModeNo & 0x7F; 7441 ModeNo = ModeNo & 0x7F;
7836 /* XGINew_flag_clearbuffer = 0; */
7837 }
7838 /* else {
7839 XGINew_flag_clearbuffer = 1;
7840 }
7841 */
7842 xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); 7442 xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86);
7843 7443
7844 if (HwDeviceExtension->jChipType < XG20) /* kuku 2004/06/25 1.Openkey */ 7444 if (HwDeviceExtension->jChipType < XG20) /* kuku 2004/06/25 1.Openkey */
@@ -7846,16 +7446,14 @@ unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
7846 7446
7847 XGI_SearchModeID(ModeNo, &ModeIdIndex, pVBInfo); 7447 XGI_SearchModeID(ModeNo, &ModeIdIndex, pVBInfo);
7848 7448
7849 XGI_GetVGAType(HwDeviceExtension, pVBInfo);
7850
7851 if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */ 7449 if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */
7852 XGI_GetVBInfo(ModeNo, ModeIdIndex, HwDeviceExtension, pVBInfo); 7450 XGI_GetVBInfo(ModeNo, ModeIdIndex, HwDeviceExtension, pVBInfo);
7853 XGI_GetTVInfo(ModeNo, ModeIdIndex, pVBInfo); 7451 XGI_GetTVInfo(ModeNo, ModeIdIndex, pVBInfo);
7854 XGI_GetLCDInfo(ModeNo, ModeIdIndex, pVBInfo); 7452 XGI_GetLCDInfo(ModeNo, ModeIdIndex, pVBInfo);
7855 XGI_DisableBridge(HwDeviceExtension, pVBInfo); 7453 XGI_DisableBridge(xgifb_info, HwDeviceExtension, pVBInfo);
7856 7454
7857 if (pVBInfo->VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) { 7455 if (pVBInfo->VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) {
7858 XGI_SetCRT1Group(HwDeviceExtension, ModeNo, 7456 XGI_SetCRT1Group(xgifb_info, HwDeviceExtension, ModeNo,
7859 ModeIdIndex, pVBInfo); 7457 ModeIdIndex, pVBInfo);
7860 7458
7861 if (pVBInfo->VBInfo & SetCRT2ToLCDA) { 7459 if (pVBInfo->VBInfo & SetCRT2ToLCDA) {
@@ -7864,7 +7462,8 @@ unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
7864 } 7462 }
7865 } else { 7463 } else {
7866 if (!(pVBInfo->VBInfo & SwitchToCRT2)) { 7464 if (!(pVBInfo->VBInfo & SwitchToCRT2)) {
7867 XGI_SetCRT1Group(HwDeviceExtension, ModeNo, 7465 XGI_SetCRT1Group(xgifb_info,
7466 HwDeviceExtension, ModeNo,
7868 ModeIdIndex, pVBInfo); 7467 ModeIdIndex, pVBInfo);
7869 if (pVBInfo->VBInfo & SetCRT2ToLCDA) { 7468 if (pVBInfo->VBInfo & SetCRT2ToLCDA) {
7870 XGI_SetLCDAGroup(ModeNo, ModeIdIndex, 7469 XGI_SetLCDAGroup(ModeNo, ModeIdIndex,
@@ -7894,11 +7493,11 @@ unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
7894 XGI_SetCRT2ModeRegs(ModeNo, HwDeviceExtension, pVBInfo); 7493 XGI_SetCRT2ModeRegs(ModeNo, HwDeviceExtension, pVBInfo);
7895 XGI_OEM310Setting(ModeNo, ModeIdIndex, pVBInfo); /*0212*/ 7494 XGI_OEM310Setting(ModeNo, ModeIdIndex, pVBInfo); /*0212*/
7896 XGI_CloseCRTC(HwDeviceExtension, pVBInfo); 7495 XGI_CloseCRTC(HwDeviceExtension, pVBInfo);
7897 XGI_EnableBridge(HwDeviceExtension, pVBInfo); 7496 XGI_EnableBridge(xgifb_info, HwDeviceExtension, pVBInfo);
7898 } /* !XG20 */ 7497 } /* !XG20 */
7899 else { 7498 else {
7900 if (pVBInfo->IF_DEF_LVDS == 1) 7499 if (pVBInfo->IF_DEF_LVDS == 1)
7901 if (!XGI_XG21CheckLVDSMode(ModeNo, 7500 if (!XGI_XG21CheckLVDSMode(xgifb_info, ModeNo,
7902 ModeIdIndex, 7501 ModeIdIndex,
7903 pVBInfo)) 7502 pVBInfo))
7904 return 0; 7503 return 0;
@@ -7914,39 +7513,13 @@ unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
7914 pVBInfo->SetFlag = 0; 7513 pVBInfo->SetFlag = 0;
7915 pVBInfo->VBInfo = DisableCRT2Display; 7514 pVBInfo->VBInfo = DisableCRT2Display;
7916 7515
7917 XGI_DisplayOff(HwDeviceExtension, pVBInfo); 7516 XGI_DisplayOff(xgifb_info, HwDeviceExtension, pVBInfo);
7918 7517
7919 XGI_SetCRT1Group(HwDeviceExtension, ModeNo, ModeIdIndex, 7518 XGI_SetCRT1Group(xgifb_info, HwDeviceExtension, ModeNo,
7920 pVBInfo); 7519 ModeIdIndex, pVBInfo);
7921 7520
7922 XGI_DisplayOn(HwDeviceExtension, pVBInfo); 7521 XGI_DisplayOn(xgifb_info, HwDeviceExtension, pVBInfo);
7923 /*
7924 if (HwDeviceExtension->jChipType == XG21)
7925 xgifb_reg_and_or(pVBInfo->P3c4, 0x09, ~0x80, 0x80);
7926 */
7927 }
7928
7929 /*
7930 if (ModeNo <= 0x13) {
7931 modeflag = pVBInfo->SModeIDTable[ModeIdIndex].St_ModeFlag;
7932 } else {
7933 modeflag = pVBInfo->EModeIDTable[ModeIdIndex].Ext_ModeFlag;
7934 } 7522 }
7935 pVBInfo->ModeType = modeflag&ModeInfoFlag;
7936 pVBInfo->SetFlag = 0x00;
7937 pVBInfo->VBInfo = DisableCRT2Display;
7938 temp = XGINew_CheckMemorySize(HwDeviceExtension,
7939 ModeNo,
7940 ModeIdIndex,
7941 pVBInfo);
7942
7943 if (temp == 0)
7944 return (0);
7945
7946 XGI_DisplayOff(HwDeviceExtension, pVBInfo) ;
7947 XGI_SetCRT1Group(HwDeviceExtension, ModeNo, ModeIdIndex, pVBInfo);
7948 XGI_DisplayOn(HwDeviceExtension, pVBInfo);
7949 */
7950 7523
7951 XGI_UpdateModeInfo(HwDeviceExtension, pVBInfo); 7524 XGI_UpdateModeInfo(HwDeviceExtension, pVBInfo);
7952 7525
diff --git a/drivers/staging/xgifb/vb_setmode.h b/drivers/staging/xgifb/vb_setmode.h
index 1bd8667ff5cf..552482858c1c 100644
--- a/drivers/staging/xgifb/vb_setmode.h
+++ b/drivers/staging/xgifb/vb_setmode.h
@@ -6,66 +6,22 @@ extern void XGI_UnLockCRT2(struct xgi_hw_device_info *HwDeviceExtension,
6 struct vb_device_info *); 6 struct vb_device_info *);
7extern void XGI_LockCRT2(struct xgi_hw_device_info *HwDeviceExtension, 7extern void XGI_LockCRT2(struct xgi_hw_device_info *HwDeviceExtension,
8 struct vb_device_info *); 8 struct vb_device_info *);
9extern void XGI_LongWait(struct vb_device_info *); 9extern void XGI_DisplayOff(struct xgifb_video_info *,
10extern void XGI_SetCRT2ModeRegs(unsigned short ModeNo, 10 struct xgi_hw_device_info *,
11 struct xgi_hw_device_info *,
12 struct vb_device_info *);
13extern void XGI_DisableBridge(struct xgi_hw_device_info *HwDeviceExtension,
14 struct vb_device_info *);
15extern void XGI_EnableBridge(struct xgi_hw_device_info *HwDeviceExtension,
16 struct vb_device_info *);
17extern void XGI_DisplayOff(struct xgi_hw_device_info *,
18 struct vb_device_info *); 11 struct vb_device_info *);
19extern void XGI_DisplayOn(struct xgi_hw_device_info *,
20 struct vb_device_info *);
21extern void XGI_GetVBType(struct vb_device_info *); 12extern void XGI_GetVBType(struct vb_device_info *);
22extern void XGI_SenseCRT1(struct vb_device_info *); 13extern void XGI_SenseCRT1(struct vb_device_info *);
23extern void XGI_GetVGAType(struct xgi_hw_device_info *HwDeviceExtension, 14extern unsigned char XGISetModeNew(struct xgifb_video_info *xgifb_info,
24 struct vb_device_info *); 15 struct xgi_hw_device_info *HwDeviceExtension,
25extern void XGI_GetVBInfo(unsigned short ModeNo,
26 unsigned short ModeIdIndex,
27 struct xgi_hw_device_info *HwDeviceExtension,
28 struct vb_device_info *);
29extern void XGI_GetTVInfo(unsigned short ModeNo,
30 unsigned short ModeIdIndex,
31 struct vb_device_info *);
32extern unsigned short XGI_GetResInfo(unsigned short ModeNo,
33 unsigned short ModeIdIndex,
34 struct vb_device_info *pVBInfo);
35
36extern unsigned char XGISetModeNew(struct xgi_hw_device_info *HwDeviceExtension,
37 unsigned short ModeNo) ; 16 unsigned short ModeNo) ;
38 17
39extern unsigned char XGI_SearchModeID(unsigned short ModeNo, 18extern unsigned char XGI_SearchModeID(unsigned short ModeNo,
40 unsigned short *ModeIdIndex, 19 unsigned short *ModeIdIndex,
41 struct vb_device_info *); 20 struct vb_device_info *);
42extern unsigned char XGI_GetLCDInfo(unsigned short ModeNo,
43 unsigned short ModeIdIndex,
44 struct vb_device_info *);
45extern unsigned char XGI_BridgeIsOn(struct vb_device_info *); 21extern unsigned char XGI_BridgeIsOn(struct vb_device_info *);
46
47extern unsigned char
48XGI_SetCRT2Group301(unsigned short ModeNo,
49 struct xgi_hw_device_info *HwDeviceExtension,
50 struct vb_device_info *);
51extern unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE, 22extern unsigned short XGI_GetRatePtrCRT2(struct xgi_hw_device_info *pXGIHWDE,
52 unsigned short ModeNo, 23 unsigned short ModeNo,
53 unsigned short ModeIdIndex, 24 unsigned short ModeIdIndex,
54 struct vb_device_info *); 25 struct vb_device_info *);
55 26
56extern void XGI_SetXG21FPBits(struct vb_device_info *pVBInfo);
57extern void XGI_SetXG27FPBits(struct vb_device_info *pVBInfo);
58extern void XGI_XG21BLSignalVDD(unsigned short tempbh,
59 unsigned short tempbl,
60 struct vb_device_info *pVBInfo);
61extern void XGI_XG27BLSignalVDD(unsigned short tempbh,
62 unsigned short tempbl,
63 struct vb_device_info *pVBInfo);
64extern void XGI_XG21SetPanelDelay(unsigned short tempbl,
65 struct vb_device_info *pVBInfo);
66extern unsigned char XGI_XG21CheckLVDSMode(unsigned short ModeNo,
67 unsigned short ModeIdIndex,
68 struct vb_device_info *pVBInfo);
69extern unsigned short XGI_GetLVDSOEMTableIndex(struct vb_device_info *pVBInfo);
70
71#endif 27#endif
diff --git a/drivers/staging/xgifb/vb_struct.h b/drivers/staging/xgifb/vb_struct.h
index f9ade6f9f7ee..6556a0d6ff82 100644
--- a/drivers/staging/xgifb/vb_struct.h
+++ b/drivers/staging/xgifb/vb_struct.h
@@ -293,13 +293,12 @@ struct vb_device_info {
293 unsigned short IF_DEF_ExpLink; 293 unsigned short IF_DEF_ExpLink;
294 unsigned short IF_DEF_HiVision; 294 unsigned short IF_DEF_HiVision;
295 unsigned short LCDResInfo, LCDTypeInfo, VBType;/*301b*/ 295 unsigned short LCDResInfo, LCDTypeInfo, VBType;/*301b*/
296 unsigned short VBInfo, TVInfo, LCDInfo, Set_VGAType; 296 unsigned short VBInfo, TVInfo, LCDInfo;
297 unsigned short VBExtInfo;/*301lv*/ 297 unsigned short VBExtInfo;/*301lv*/
298 unsigned short SetFlag; 298 unsigned short SetFlag;
299 unsigned short NewFlickerMode; 299 unsigned short NewFlickerMode;
300 unsigned short SelectCRT2Rate; 300 unsigned short SelectCRT2Rate;
301 301
302 unsigned char *ROMAddr;
303 void __iomem *FBAddr; 302 void __iomem *FBAddr;
304 unsigned long BaseAddr; 303 unsigned long BaseAddr;
305 unsigned long RelIO; 304 unsigned long RelIO;
@@ -376,7 +375,6 @@ struct vb_device_info {
376 unsigned char *pXGINew_CR97 ; 375 unsigned char *pXGINew_CR97 ;
377 376
378 struct XGI330_LCDCapStruct *LCDCapList; 377 struct XGI330_LCDCapStruct *LCDCapList;
379 struct XGI21_LVDSCapStruct *XG21_LVDSCapList;
380 378
381 struct XGI_TimingHStruct *TimingH; 379 struct XGI_TimingHStruct *TimingH;
382 struct XGI_TimingVStruct *TimingV; 380 struct XGI_TimingVStruct *TimingV;
diff --git a/drivers/staging/xgifb/vb_table.h b/drivers/staging/xgifb/vb_table.h
index b81ac7726d1c..e7946f1c1143 100644
--- a/drivers/staging/xgifb/vb_table.h
+++ b/drivers/staging/xgifb/vb_table.h
@@ -2569,33 +2569,6 @@ static struct XGI330_LCDCapStruct XGI_LCDCapList[] = {
2569 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} 2569 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}
2570}; 2570};
2571 2571
2572struct XGI21_LVDSCapStruct XGI21_LCDCapList[] = {
2573 {DisableLCD24bpp + LCDPolarity,
2574 2160, 1250, 1600, 1200, 64, 1, 192, 3,
2575 0x70, 0x24, 0x20, 0x04, 0x0A, 0x02, 0xC8
2576 },
2577 {DisableLCD24bpp + LCDPolarity,
2578 1688, 1066, 1280, 1024, 48, 1, 112, 3,
2579 0x70, 0x44, 0x20, 0x04, 0x0A, 0x02, 0xC8
2580 },
2581 {DisableLCD24bpp + LCDPolarity + (LCDPolarity << 8),
2582 1344, 806, 1024, 768, 24, 3, 136, 6,
2583 0x6C, 0x65, 0x20, 0x04, 0x0A, 0x02, 0xC8
2584 },
2585 {DisableLCD24bpp + LCDPolarity,
2586 1056, 628, 800, 600, 40, 1, 128, 4,
2587 0x42, 0xE2, 0x20, 0x14, 0x0A, 0x02, 0x00
2588 },
2589 {DisableLCD24bpp + LCDPolarity,
2590 928, 525, 800, 480, 40, 13, 48, 3,
2591 0x52, 0xC5, 0x20, 0x14, 0x0A, 0x02, 0x00
2592 },
2593 {DisableLCD24bpp + LCDPolarity + (LCDPolarity << 8),
2594 800, 525, 640, 480, 16, 10, 96, 2,
2595 0x1B, 0xE1, 0x20, 0x04, 0x0A, 0x02, 0xC8
2596 }
2597};
2598
2599static struct XGI_Ext2Struct XGI330_RefIndex[] = { 2572static struct XGI_Ext2Struct XGI330_RefIndex[] = {
2600 {Support32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, 2573 {Support32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175,
2601 0x00, 0x10, 0x59, 320, 200},/* 00 */ 2574 0x00, 0x10, 0x59, 320, 200},/* 00 */
diff --git a/drivers/staging/xgifb/vgatypes.h b/drivers/staging/xgifb/vgatypes.h
index 9b939b75c309..9e166bbb00c4 100644
--- a/drivers/staging/xgifb/vgatypes.h
+++ b/drivers/staging/xgifb/vgatypes.h
@@ -51,8 +51,6 @@ struct xgi_hw_device_info {
51 unsigned long ulExternalChip; /* NO VB or other video bridge*/ 51 unsigned long ulExternalChip; /* NO VB or other video bridge*/
52 /* if ujVBChipID = VB_CHIP_UNKNOWN, */ 52 /* if ujVBChipID = VB_CHIP_UNKNOWN, */
53 53
54 unsigned char *pjVirtualRomBase; /* ROM image */
55
56 void __iomem *pjVideoMemoryAddress;/* base virtual memory address */ 54 void __iomem *pjVideoMemoryAddress;/* base virtual memory address */
57 /* of Linear VGA memory */ 55 /* of Linear VGA memory */
58 56
diff --git a/drivers/staging/zcache/zcache-main.c b/drivers/staging/zcache/zcache-main.c
index 56c1f9c80dc1..642840c612ac 100644
--- a/drivers/staging/zcache/zcache-main.c
+++ b/drivers/staging/zcache/zcache-main.c
@@ -787,7 +787,7 @@ static ssize_t zv_max_zsize_store(struct kobject *kobj,
787 if (!capable(CAP_SYS_ADMIN)) 787 if (!capable(CAP_SYS_ADMIN))
788 return -EPERM; 788 return -EPERM;
789 789
790 err = strict_strtoul(buf, 10, &val); 790 err = kstrtoul(buf, 10, &val);
791 if (err || (val == 0) || (val > (PAGE_SIZE / 8) * 7)) 791 if (err || (val == 0) || (val > (PAGE_SIZE / 8) * 7))
792 return -EINVAL; 792 return -EINVAL;
793 zv_max_zsize = val; 793 zv_max_zsize = val;
@@ -819,7 +819,7 @@ static ssize_t zv_max_mean_zsize_store(struct kobject *kobj,
819 if (!capable(CAP_SYS_ADMIN)) 819 if (!capable(CAP_SYS_ADMIN))
820 return -EPERM; 820 return -EPERM;
821 821
822 err = strict_strtoul(buf, 10, &val); 822 err = kstrtoul(buf, 10, &val);
823 if (err || (val == 0) || (val > (PAGE_SIZE / 8) * 7)) 823 if (err || (val == 0) || (val > (PAGE_SIZE / 8) * 7))
824 return -EINVAL; 824 return -EINVAL;
825 zv_max_mean_zsize = val; 825 zv_max_mean_zsize = val;
@@ -853,7 +853,7 @@ static ssize_t zv_page_count_policy_percent_store(struct kobject *kobj,
853 if (!capable(CAP_SYS_ADMIN)) 853 if (!capable(CAP_SYS_ADMIN))
854 return -EPERM; 854 return -EPERM;
855 855
856 err = strict_strtoul(buf, 10, &val); 856 err = kstrtoul(buf, 10, &val);
857 if (err || (val == 0) || (val > 150)) 857 if (err || (val == 0) || (val > 150))
858 return -EINVAL; 858 return -EINVAL;
859 zv_page_count_policy_percent = val; 859 zv_page_count_policy_percent = val;
diff --git a/drivers/staging/zram/zram_drv.c b/drivers/staging/zram/zram_drv.c
index 09de99fbb7e0..2a2a92d389e6 100644
--- a/drivers/staging/zram/zram_drv.c
+++ b/drivers/staging/zram/zram_drv.c
@@ -653,7 +653,8 @@ int zram_init_device(struct zram *zram)
653 goto fail_no_table; 653 goto fail_no_table;
654 } 654 }
655 655
656 zram->compress_buffer = (void *)__get_free_pages(__GFP_ZERO, 1); 656 zram->compress_buffer =
657 (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 1);
657 if (!zram->compress_buffer) { 658 if (!zram->compress_buffer) {
658 pr_err("Error allocating compressor buffer space\n"); 659 pr_err("Error allocating compressor buffer space\n");
659 ret = -ENOMEM; 660 ret = -ENOMEM;
diff --git a/drivers/staging/zram/zram_sysfs.c b/drivers/staging/zram/zram_sysfs.c
index 0ea8ed296a9d..d521122826f6 100644
--- a/drivers/staging/zram/zram_sysfs.c
+++ b/drivers/staging/zram/zram_sysfs.c
@@ -58,7 +58,7 @@ static ssize_t disksize_store(struct device *dev,
58 u64 disksize; 58 u64 disksize;
59 struct zram *zram = dev_to_zram(dev); 59 struct zram *zram = dev_to_zram(dev);
60 60
61 ret = strict_strtoull(buf, 10, &disksize); 61 ret = kstrtoull(buf, 10, &disksize);
62 if (ret) 62 if (ret)
63 return ret; 63 return ret;
64 64
@@ -88,7 +88,7 @@ static ssize_t reset_store(struct device *dev,
88 struct device_attribute *attr, const char *buf, size_t len) 88 struct device_attribute *attr, const char *buf, size_t len)
89{ 89{
90 int ret; 90 int ret;
91 unsigned long do_reset; 91 unsigned short do_reset;
92 struct zram *zram; 92 struct zram *zram;
93 struct block_device *bdev; 93 struct block_device *bdev;
94 94
@@ -99,7 +99,7 @@ static ssize_t reset_store(struct device *dev,
99 if (bdev->bd_holders) 99 if (bdev->bd_holders)
100 return -EBUSY; 100 return -EBUSY;
101 101
102 ret = strict_strtoul(buf, 10, &do_reset); 102 ret = kstrtou16(buf, 10, &do_reset);
103 if (ret) 103 if (ret)
104 return ret; 104 return ret;
105 105
diff --git a/drivers/tty/n_hdlc.c b/drivers/tty/n_hdlc.c
index cea56033b34c..a09ce3ef5d74 100644
--- a/drivers/tty/n_hdlc.c
+++ b/drivers/tty/n_hdlc.c
@@ -417,7 +417,7 @@ static void n_hdlc_send_frames(struct n_hdlc *n_hdlc, struct tty_struct *tty)
417 __FILE__,__LINE__,tbuf,tbuf->count); 417 __FILE__,__LINE__,tbuf,tbuf->count);
418 418
419 /* Send the next block of data to device */ 419 /* Send the next block of data to device */
420 tty->flags |= (1 << TTY_DO_WRITE_WAKEUP); 420 set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
421 actual = tty->ops->write(tty, tbuf->buf, tbuf->count); 421 actual = tty->ops->write(tty, tbuf->buf, tbuf->count);
422 422
423 /* rollback was possible and has been done */ 423 /* rollback was possible and has been done */
@@ -459,7 +459,7 @@ static void n_hdlc_send_frames(struct n_hdlc *n_hdlc, struct tty_struct *tty)
459 } 459 }
460 460
461 if (!tbuf) 461 if (!tbuf)
462 tty->flags &= ~(1 << TTY_DO_WRITE_WAKEUP); 462 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
463 463
464 /* Clear the re-entry flag */ 464 /* Clear the re-entry flag */
465 spin_lock_irqsave(&n_hdlc->tx_buf_list.spinlock, flags); 465 spin_lock_irqsave(&n_hdlc->tx_buf_list.spinlock, flags);
@@ -491,7 +491,7 @@ static void n_hdlc_tty_wakeup(struct tty_struct *tty)
491 return; 491 return;
492 492
493 if (tty != n_hdlc->tty) { 493 if (tty != n_hdlc->tty) {
494 tty->flags &= ~(1 << TTY_DO_WRITE_WAKEUP); 494 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
495 return; 495 return;
496 } 496 }
497 497
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 39d6ab6551e0..d2256d08ee7e 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -61,7 +61,7 @@
61 * controlling the space in the read buffer. 61 * controlling the space in the read buffer.
62 */ 62 */
63#define TTY_THRESHOLD_THROTTLE 128 /* now based on remaining room */ 63#define TTY_THRESHOLD_THROTTLE 128 /* now based on remaining room */
64#define TTY_THRESHOLD_UNTHROTTLE 128 64#define TTY_THRESHOLD_UNTHROTTLE 128
65 65
66/* 66/*
67 * Special byte codes used in the echo buffer to represent operations 67 * Special byte codes used in the echo buffer to represent operations
@@ -405,7 +405,7 @@ static ssize_t process_output_block(struct tty_struct *tty,
405 const unsigned char *buf, unsigned int nr) 405 const unsigned char *buf, unsigned int nr)
406{ 406{
407 int space; 407 int space;
408 int i; 408 int i;
409 const unsigned char *cp; 409 const unsigned char *cp;
410 410
411 mutex_lock(&tty->output_lock); 411 mutex_lock(&tty->output_lock);
@@ -1607,7 +1607,7 @@ static inline int input_available_p(struct tty_struct *tty, int amt)
1607} 1607}
1608 1608
1609/** 1609/**
1610 * copy_from_read_buf - copy read data directly 1610 * copy_from_read_buf - copy read data directly
1611 * @tty: terminal device 1611 * @tty: terminal device
1612 * @b: user data 1612 * @b: user data
1613 * @nr: size of data 1613 * @nr: size of data
@@ -1909,7 +1909,7 @@ do_it_again:
1909 if (nr) 1909 if (nr)
1910 clear_bit(TTY_PUSH, &tty->flags); 1910 clear_bit(TTY_PUSH, &tty->flags);
1911 } else if (test_and_clear_bit(TTY_PUSH, &tty->flags)) 1911 } else if (test_and_clear_bit(TTY_PUSH, &tty->flags))
1912 goto do_it_again; 1912 goto do_it_again;
1913 1913
1914 n_tty_set_room(tty); 1914 n_tty_set_room(tty);
1915 return retval; 1915 return retval;
diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c
index e18604b3fc7d..d8653ab6f498 100644
--- a/drivers/tty/pty.c
+++ b/drivers/tty/pty.c
@@ -446,19 +446,8 @@ static inline void legacy_pty_init(void) { }
446int pty_limit = NR_UNIX98_PTY_DEFAULT; 446int pty_limit = NR_UNIX98_PTY_DEFAULT;
447static int pty_limit_min; 447static int pty_limit_min;
448static int pty_limit_max = NR_UNIX98_PTY_MAX; 448static int pty_limit_max = NR_UNIX98_PTY_MAX;
449static int tty_count;
450static int pty_count; 449static int pty_count;
451 450
452static inline void pty_inc_count(void)
453{
454 pty_count = (++tty_count) / 2;
455}
456
457static inline void pty_dec_count(void)
458{
459 pty_count = (--tty_count) / 2;
460}
461
462static struct cdev ptmx_cdev; 451static struct cdev ptmx_cdev;
463 452
464static struct ctl_table pty_table[] = { 453static struct ctl_table pty_table[] = {
@@ -600,8 +589,7 @@ static int pty_unix98_install(struct tty_driver *driver, struct tty_struct *tty)
600 */ 589 */
601 tty_driver_kref_get(driver); 590 tty_driver_kref_get(driver);
602 tty->count++; 591 tty->count++;
603 pty_inc_count(); /* tty */ 592 pty_count++;
604 pty_inc_count(); /* tty->link */
605 return 0; 593 return 0;
606err_free_mem: 594err_free_mem:
607 deinitialize_tty_struct(o_tty); 595 deinitialize_tty_struct(o_tty);
@@ -613,15 +601,19 @@ err_free_tty:
613 return -ENOMEM; 601 return -ENOMEM;
614} 602}
615 603
616static void pty_unix98_remove(struct tty_driver *driver, struct tty_struct *tty) 604static void ptm_unix98_remove(struct tty_driver *driver, struct tty_struct *tty)
605{
606 pty_count--;
607}
608
609static void pts_unix98_remove(struct tty_driver *driver, struct tty_struct *tty)
617{ 610{
618 pty_dec_count();
619} 611}
620 612
621static const struct tty_operations ptm_unix98_ops = { 613static const struct tty_operations ptm_unix98_ops = {
622 .lookup = ptm_unix98_lookup, 614 .lookup = ptm_unix98_lookup,
623 .install = pty_unix98_install, 615 .install = pty_unix98_install,
624 .remove = pty_unix98_remove, 616 .remove = ptm_unix98_remove,
625 .open = pty_open, 617 .open = pty_open,
626 .close = pty_close, 618 .close = pty_close,
627 .write = pty_write, 619 .write = pty_write,
@@ -638,7 +630,7 @@ static const struct tty_operations ptm_unix98_ops = {
638static const struct tty_operations pty_unix98_ops = { 630static const struct tty_operations pty_unix98_ops = {
639 .lookup = pts_unix98_lookup, 631 .lookup = pts_unix98_lookup,
640 .install = pty_unix98_install, 632 .install = pty_unix98_install,
641 .remove = pty_unix98_remove, 633 .remove = pts_unix98_remove,
642 .open = pty_open, 634 .open = pty_open,
643 .close = pty_close, 635 .close = pty_close,
644 .write = pty_write, 636 .write = pty_write,
diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c
index eeadf1b8e093..9f50c4e3c2be 100644
--- a/drivers/tty/serial/8250.c
+++ b/drivers/tty/serial/8250.c
@@ -129,32 +129,6 @@ static unsigned long probe_rsa[PORT_RSA_MAX];
129static unsigned int probe_rsa_count; 129static unsigned int probe_rsa_count;
130#endif /* CONFIG_SERIAL_8250_RSA */ 130#endif /* CONFIG_SERIAL_8250_RSA */
131 131
132struct uart_8250_port {
133 struct uart_port port;
134 struct timer_list timer; /* "no irq" timer */
135 struct list_head list; /* ports on this IRQ */
136 unsigned short capabilities; /* port capabilities */
137 unsigned short bugs; /* port bugs */
138 unsigned int tx_loadsz; /* transmit fifo load size */
139 unsigned char acr;
140 unsigned char ier;
141 unsigned char lcr;
142 unsigned char mcr;
143 unsigned char mcr_mask; /* mask of user bits */
144 unsigned char mcr_force; /* mask of forced bits */
145 unsigned char cur_iotype; /* Running I/O type */
146
147 /*
148 * Some bits in registers are cleared on a read, so they must
149 * be saved whenever the register is read but the bits will not
150 * be immediately processed.
151 */
152#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
153 unsigned char lsr_saved_flags;
154#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
155 unsigned char msr_saved_flags;
156};
157
158struct irq_info { 132struct irq_info {
159 struct hlist_node node; 133 struct hlist_node node;
160 int irq; 134 int irq;
@@ -1326,8 +1300,6 @@ static void serial8250_stop_tx(struct uart_port *port)
1326 } 1300 }
1327} 1301}
1328 1302
1329static void transmit_chars(struct uart_8250_port *up);
1330
1331static void serial8250_start_tx(struct uart_port *port) 1303static void serial8250_start_tx(struct uart_port *port)
1332{ 1304{
1333 struct uart_8250_port *up = 1305 struct uart_8250_port *up =
@@ -1344,7 +1316,7 @@ static void serial8250_start_tx(struct uart_port *port)
1344 if ((up->port.type == PORT_RM9000) ? 1316 if ((up->port.type == PORT_RM9000) ?
1345 (lsr & UART_LSR_THRE) : 1317 (lsr & UART_LSR_THRE) :
1346 (lsr & UART_LSR_TEMT)) 1318 (lsr & UART_LSR_TEMT))
1347 transmit_chars(up); 1319 serial8250_tx_chars(up);
1348 } 1320 }
1349 } 1321 }
1350 1322
@@ -1401,11 +1373,16 @@ static void clear_rx_fifo(struct uart_8250_port *up)
1401 } while (1); 1373 } while (1);
1402} 1374}
1403 1375
1404static void 1376/*
1405receive_chars(struct uart_8250_port *up, unsigned int *status) 1377 * serial8250_rx_chars: processes according to the passed in LSR
1378 * value, and returns the remaining LSR bits not handled
1379 * by this Rx routine.
1380 */
1381unsigned char
1382serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1406{ 1383{
1407 struct tty_struct *tty = up->port.state->port.tty; 1384 struct tty_struct *tty = up->port.state->port.tty;
1408 unsigned char ch, lsr = *status; 1385 unsigned char ch;
1409 int max_count = 256; 1386 int max_count = 256;
1410 char flag; 1387 char flag;
1411 1388
@@ -1481,10 +1458,11 @@ ignore_char:
1481 spin_unlock(&up->port.lock); 1458 spin_unlock(&up->port.lock);
1482 tty_flip_buffer_push(tty); 1459 tty_flip_buffer_push(tty);
1483 spin_lock(&up->port.lock); 1460 spin_lock(&up->port.lock);
1484 *status = lsr; 1461 return lsr;
1485} 1462}
1463EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1486 1464
1487static void transmit_chars(struct uart_8250_port *up) 1465void serial8250_tx_chars(struct uart_8250_port *up)
1488{ 1466{
1489 struct circ_buf *xmit = &up->port.state->xmit; 1467 struct circ_buf *xmit = &up->port.state->xmit;
1490 int count; 1468 int count;
@@ -1521,8 +1499,9 @@ static void transmit_chars(struct uart_8250_port *up)
1521 if (uart_circ_empty(xmit)) 1499 if (uart_circ_empty(xmit))
1522 __stop_tx(up); 1500 __stop_tx(up);
1523} 1501}
1502EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1524 1503
1525static unsigned int check_modem_status(struct uart_8250_port *up) 1504unsigned int serial8250_modem_status(struct uart_8250_port *up)
1526{ 1505{
1527 unsigned int status = serial_in(up, UART_MSR); 1506 unsigned int status = serial_in(up, UART_MSR);
1528 1507
@@ -1544,14 +1523,20 @@ static unsigned int check_modem_status(struct uart_8250_port *up)
1544 1523
1545 return status; 1524 return status;
1546} 1525}
1526EXPORT_SYMBOL_GPL(serial8250_modem_status);
1547 1527
1548/* 1528/*
1549 * This handles the interrupt from one port. 1529 * This handles the interrupt from one port.
1550 */ 1530 */
1551static void serial8250_handle_port(struct uart_8250_port *up) 1531int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1552{ 1532{
1553 unsigned int status; 1533 unsigned char status;
1554 unsigned long flags; 1534 unsigned long flags;
1535 struct uart_8250_port *up =
1536 container_of(port, struct uart_8250_port, port);
1537
1538 if (iir & UART_IIR_NO_INT)
1539 return 0;
1555 1540
1556 spin_lock_irqsave(&up->port.lock, flags); 1541 spin_lock_irqsave(&up->port.lock, flags);
1557 1542
@@ -1560,25 +1545,13 @@ static void serial8250_handle_port(struct uart_8250_port *up)
1560 DEBUG_INTR("status = %x...", status); 1545 DEBUG_INTR("status = %x...", status);
1561 1546
1562 if (status & (UART_LSR_DR | UART_LSR_BI)) 1547 if (status & (UART_LSR_DR | UART_LSR_BI))
1563 receive_chars(up, &status); 1548 status = serial8250_rx_chars(up, status);
1564 check_modem_status(up); 1549 serial8250_modem_status(up);
1565 if (status & UART_LSR_THRE) 1550 if (status & UART_LSR_THRE)
1566 transmit_chars(up); 1551 serial8250_tx_chars(up);
1567 1552
1568 spin_unlock_irqrestore(&up->port.lock, flags); 1553 spin_unlock_irqrestore(&up->port.lock, flags);
1569} 1554 return 1;
1570
1571int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1572{
1573 struct uart_8250_port *up =
1574 container_of(port, struct uart_8250_port, port);
1575
1576 if (!(iir & UART_IIR_NO_INT)) {
1577 serial8250_handle_port(up);
1578 return 1;
1579 }
1580
1581 return 0;
1582} 1555}
1583EXPORT_SYMBOL_GPL(serial8250_handle_irq); 1556EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1584 1557
@@ -1619,11 +1592,13 @@ static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1619 do { 1592 do {
1620 struct uart_8250_port *up; 1593 struct uart_8250_port *up;
1621 struct uart_port *port; 1594 struct uart_port *port;
1595 bool skip;
1622 1596
1623 up = list_entry(l, struct uart_8250_port, list); 1597 up = list_entry(l, struct uart_8250_port, list);
1624 port = &up->port; 1598 port = &up->port;
1599 skip = pass_counter && up->port.flags & UPF_IIR_ONCE;
1625 1600
1626 if (port->handle_irq(port)) { 1601 if (!skip && port->handle_irq(port)) {
1627 handled = 1; 1602 handled = 1;
1628 end = NULL; 1603 end = NULL;
1629 } else if (end == NULL) 1604 } else if (end == NULL)
@@ -1758,11 +1733,8 @@ static void serial_unlink_irq_chain(struct uart_8250_port *up)
1758static void serial8250_timeout(unsigned long data) 1733static void serial8250_timeout(unsigned long data)
1759{ 1734{
1760 struct uart_8250_port *up = (struct uart_8250_port *)data; 1735 struct uart_8250_port *up = (struct uart_8250_port *)data;
1761 unsigned int iir;
1762 1736
1763 iir = serial_in(up, UART_IIR); 1737 up->port.handle_irq(&up->port);
1764 if (!(iir & UART_IIR_NO_INT))
1765 serial8250_handle_port(up);
1766 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port)); 1738 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1767} 1739}
1768 1740
@@ -1801,7 +1773,7 @@ static void serial8250_backup_timeout(unsigned long data)
1801 } 1773 }
1802 1774
1803 if (!(iir & UART_IIR_NO_INT)) 1775 if (!(iir & UART_IIR_NO_INT))
1804 transmit_chars(up); 1776 serial8250_tx_chars(up);
1805 1777
1806 if (is_real_interrupt(up->port.irq)) 1778 if (is_real_interrupt(up->port.irq))
1807 serial_out(up, UART_IER, ier); 1779 serial_out(up, UART_IER, ier);
@@ -1835,7 +1807,7 @@ static unsigned int serial8250_get_mctrl(struct uart_port *port)
1835 unsigned int status; 1807 unsigned int status;
1836 unsigned int ret; 1808 unsigned int ret;
1837 1809
1838 status = check_modem_status(up); 1810 status = serial8250_modem_status(up);
1839 1811
1840 ret = 0; 1812 ret = 0;
1841 if (status & UART_MSR_DCD) 1813 if (status & UART_MSR_DCD)
@@ -2000,7 +1972,7 @@ static int serial8250_startup(struct uart_port *port)
2000 serial_outp(up, UART_IER, 0); 1972 serial_outp(up, UART_IER, 0);
2001 serial_outp(up, UART_LCR, 0); 1973 serial_outp(up, UART_LCR, 0);
2002 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ 1974 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2003 serial_outp(up, UART_LCR, 0xBF); 1975 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
2004 serial_outp(up, UART_EFR, UART_EFR_ECB); 1976 serial_outp(up, UART_EFR, UART_EFR_ECB);
2005 serial_outp(up, UART_LCR, 0); 1977 serial_outp(up, UART_LCR, 0);
2006 } 1978 }
@@ -2848,7 +2820,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2848 2820
2849 local_irq_save(flags); 2821 local_irq_save(flags);
2850 if (up->port.sysrq) { 2822 if (up->port.sysrq) {
2851 /* serial8250_handle_port() already took the lock */ 2823 /* serial8250_handle_irq() already took the lock */
2852 locked = 0; 2824 locked = 0;
2853 } else if (oops_in_progress) { 2825 } else if (oops_in_progress) {
2854 locked = spin_trylock(&up->port.lock); 2826 locked = spin_trylock(&up->port.lock);
@@ -2882,7 +2854,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2882 * while processing with interrupts off. 2854 * while processing with interrupts off.
2883 */ 2855 */
2884 if (up->msr_saved_flags) 2856 if (up->msr_saved_flags)
2885 check_modem_status(up); 2857 serial8250_modem_status(up);
2886 2858
2887 if (locked) 2859 if (locked)
2888 spin_unlock(&up->port.lock); 2860 spin_unlock(&up->port.lock);
diff --git a/drivers/tty/serial/8250.h b/drivers/tty/serial/8250.h
index 6edf4a6a22d4..ae027be57e25 100644
--- a/drivers/tty/serial/8250.h
+++ b/drivers/tty/serial/8250.h
@@ -13,6 +13,32 @@
13 13
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15 15
16struct uart_8250_port {
17 struct uart_port port;
18 struct timer_list timer; /* "no irq" timer */
19 struct list_head list; /* ports on this IRQ */
20 unsigned short capabilities; /* port capabilities */
21 unsigned short bugs; /* port bugs */
22 unsigned int tx_loadsz; /* transmit fifo load size */
23 unsigned char acr;
24 unsigned char ier;
25 unsigned char lcr;
26 unsigned char mcr;
27 unsigned char mcr_mask; /* mask of user bits */
28 unsigned char mcr_force; /* mask of forced bits */
29 unsigned char cur_iotype; /* Running I/O type */
30
31 /*
32 * Some bits in registers are cleared on a read, so they must
33 * be saved whenever the register is read but the bits will not
34 * be immediately processed.
35 */
36#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
37 unsigned char lsr_saved_flags;
38#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
39 unsigned char msr_saved_flags;
40};
41
16struct old_serial_port { 42struct old_serial_port {
17 unsigned int uart; 43 unsigned int uart;
18 unsigned int baud_base; 44 unsigned int baud_base;
diff --git a/drivers/tty/serial/8250_dw.c b/drivers/tty/serial/8250_dw.c
index bf1fba640c2d..f574eef3075f 100644
--- a/drivers/tty/serial/8250_dw.c
+++ b/drivers/tty/serial/8250_dw.c
@@ -177,17 +177,7 @@ static struct platform_driver dw8250_platform_driver = {
177 .remove = __devexit_p(dw8250_remove), 177 .remove = __devexit_p(dw8250_remove),
178}; 178};
179 179
180static int __init dw8250_init(void) 180module_platform_driver(dw8250_platform_driver);
181{
182 return platform_driver_register(&dw8250_platform_driver);
183}
184module_init(dw8250_init);
185
186static void __exit dw8250_exit(void)
187{
188 platform_driver_unregister(&dw8250_platform_driver);
189}
190module_exit(dw8250_exit);
191 181
192MODULE_AUTHOR("Jamie Iles"); 182MODULE_AUTHOR("Jamie Iles");
193MODULE_LICENSE("GPL"); 183MODULE_LICENSE("GPL");
diff --git a/drivers/tty/serial/8250_fsl.c b/drivers/tty/serial/8250_fsl.c
new file mode 100644
index 000000000000..f4d3c47b88e8
--- /dev/null
+++ b/drivers/tty/serial/8250_fsl.c
@@ -0,0 +1,63 @@
1#include <linux/serial_reg.h>
2#include <linux/serial_8250.h>
3
4#include "8250.h"
5
6/*
7 * Freescale 16550 UART "driver", Copyright (C) 2011 Paul Gortmaker.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This isn't a full driver; it just provides an alternate IRQ
14 * handler to deal with an errata. Everything else is just
15 * using the bog standard 8250 support.
16 *
17 * We follow code flow of serial8250_default_handle_irq() but add
18 * a check for a break and insert a dummy read on the Rx for the
19 * immediately following IRQ event.
20 *
21 * We re-use the already existing "bug handling" lsr_saved_flags
22 * field to carry the "what we just did" information from the one
23 * IRQ event to the next one.
24 */
25
26int fsl8250_handle_irq(struct uart_port *port)
27{
28 unsigned char lsr, orig_lsr;
29 unsigned long flags;
30 unsigned int iir;
31 struct uart_8250_port *up =
32 container_of(port, struct uart_8250_port, port);
33
34 spin_lock_irqsave(&up->port.lock, flags);
35
36 iir = port->serial_in(port, UART_IIR);
37 if (iir & UART_IIR_NO_INT) {
38 spin_unlock_irqrestore(&up->port.lock, flags);
39 return 0;
40 }
41
42 /* This is the WAR; if last event was BRK, then read and return */
43 if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) {
44 up->lsr_saved_flags &= ~UART_LSR_BI;
45 port->serial_in(port, UART_RX);
46 spin_unlock_irqrestore(&up->port.lock, flags);
47 return 1;
48 }
49
50 lsr = orig_lsr = up->port.serial_in(&up->port, UART_LSR);
51
52 if (lsr & (UART_LSR_DR | UART_LSR_BI))
53 lsr = serial8250_rx_chars(up, lsr);
54
55 serial8250_modem_status(up);
56
57 if (lsr & UART_LSR_THRE)
58 serial8250_tx_chars(up);
59
60 up->lsr_saved_flags = orig_lsr;
61 spin_unlock_irqrestore(&up->port.lock, flags);
62 return 1;
63}
diff --git a/drivers/tty/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c
index 825937a5f210..da2b0b0a183f 100644
--- a/drivers/tty/serial/8250_pci.c
+++ b/drivers/tty/serial/8250_pci.c
@@ -1092,6 +1092,14 @@ static int skip_tx_en_setup(struct serial_private *priv,
1092 return pci_default_setup(priv, board, port, idx); 1092 return pci_default_setup(priv, board, port, idx);
1093} 1093}
1094 1094
1095static int kt_serial_setup(struct serial_private *priv,
1096 const struct pciserial_board *board,
1097 struct uart_port *port, int idx)
1098{
1099 port->flags |= UPF_IIR_ONCE;
1100 return skip_tx_en_setup(priv, board, port, idx);
1101}
1102
1095static int pci_eg20t_init(struct pci_dev *dev) 1103static int pci_eg20t_init(struct pci_dev *dev)
1096{ 1104{
1097#if defined(CONFIG_SERIAL_PCH_UART) || defined(CONFIG_SERIAL_PCH_UART_MODULE) 1105#if defined(CONFIG_SERIAL_PCH_UART) || defined(CONFIG_SERIAL_PCH_UART_MODULE)
@@ -1110,7 +1118,18 @@ pci_xr17c154_setup(struct serial_private *priv,
1110 return pci_default_setup(priv, board, port, idx); 1118 return pci_default_setup(priv, board, port, idx);
1111} 1119}
1112 1120
1113/* This should be in linux/pci_ids.h */ 1121static int try_enable_msi(struct pci_dev *dev)
1122{
1123 /* use msi if available, but fallback to legacy otherwise */
1124 pci_enable_msi(dev);
1125 return 0;
1126}
1127
1128static void disable_msi(struct pci_dev *dev)
1129{
1130 pci_disable_msi(dev);
1131}
1132
1114#define PCI_VENDOR_ID_SBSMODULARIO 0x124B 1133#define PCI_VENDOR_ID_SBSMODULARIO 0x124B
1115#define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B 1134#define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B
1116#define PCI_DEVICE_ID_OCTPRO 0x0001 1135#define PCI_DEVICE_ID_OCTPRO 0x0001
@@ -1133,9 +1152,14 @@ pci_xr17c154_setup(struct serial_private *priv,
1133#define PCI_DEVICE_ID_TITAN_800E 0xA014 1152#define PCI_DEVICE_ID_TITAN_800E 0xA014
1134#define PCI_DEVICE_ID_TITAN_200EI 0xA016 1153#define PCI_DEVICE_ID_TITAN_200EI 0xA016
1135#define PCI_DEVICE_ID_TITAN_200EISI 0xA017 1154#define PCI_DEVICE_ID_TITAN_200EISI 0xA017
1155#define PCI_DEVICE_ID_TITAN_400V3 0xA310
1156#define PCI_DEVICE_ID_TITAN_410V3 0xA312
1157#define PCI_DEVICE_ID_TITAN_800V3 0xA314
1158#define PCI_DEVICE_ID_TITAN_800V3B 0xA315
1136#define PCI_DEVICE_ID_OXSEMI_16PCI958 0x9538 1159#define PCI_DEVICE_ID_OXSEMI_16PCI958 0x9538
1137#define PCIE_DEVICE_ID_NEO_2_OX_IBM 0x00F6 1160#define PCIE_DEVICE_ID_NEO_2_OX_IBM 0x00F6
1138#define PCI_DEVICE_ID_PLX_CRONYX_OMEGA 0xc001 1161#define PCI_DEVICE_ID_PLX_CRONYX_OMEGA 0xc001
1162#define PCI_DEVICE_ID_INTEL_PATSBURG_KT 0x1d3d
1139 1163
1140/* Unknown vendors/cards - this should not be in linux/pci_ids.h */ 1164/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
1141#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 1165#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
@@ -1220,6 +1244,15 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1220 .subdevice = PCI_ANY_ID, 1244 .subdevice = PCI_ANY_ID,
1221 .setup = ce4100_serial_setup, 1245 .setup = ce4100_serial_setup,
1222 }, 1246 },
1247 {
1248 .vendor = PCI_VENDOR_ID_INTEL,
1249 .device = PCI_DEVICE_ID_INTEL_PATSBURG_KT,
1250 .subvendor = PCI_ANY_ID,
1251 .subdevice = PCI_ANY_ID,
1252 .init = try_enable_msi,
1253 .setup = kt_serial_setup,
1254 .exit = disable_msi,
1255 },
1223 /* 1256 /*
1224 * ITE 1257 * ITE
1225 */ 1258 */
@@ -3414,6 +3447,18 @@ static struct pci_device_id serial_pci_tbl[] = {
3414 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200EISI, 3447 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200EISI,
3415 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3448 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3416 pbn_oxsemi_2_4000000 }, 3449 pbn_oxsemi_2_4000000 },
3450 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400V3,
3451 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3452 pbn_b0_4_921600 },
3453 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_410V3,
3454 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3455 pbn_b0_4_921600 },
3456 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800V3,
3457 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3458 pbn_b0_4_921600 },
3459 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800V3B,
3460 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3461 pbn_b0_4_921600 },
3417 3462
3418 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_550, 3463 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S_10x_550,
3419 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3464 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 95b21a619900..f32a2ea70100 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -97,6 +97,11 @@ config SERIAL_8250_PNP
97 This builds standard PNP serial support. You may be able to 97 This builds standard PNP serial support. You may be able to
98 disable this feature if you only need legacy serial support. 98 disable this feature if you only need legacy serial support.
99 99
100config SERIAL_8250_FSL
101 bool
102 depends on SERIAL_8250_CONSOLE && PPC_UDBG_16550
103 default PPC
104
100config SERIAL_8250_HP300 105config SERIAL_8250_HP300
101 tristate 106 tristate
102 depends on SERIAL_8250 && HP300 107 depends on SERIAL_8250 && HP300
@@ -457,7 +462,7 @@ config SERIAL_SAMSUNG
457config SERIAL_SAMSUNG_UARTS_4 462config SERIAL_SAMSUNG_UARTS_4
458 bool 463 bool
459 depends on ARM && PLAT_SAMSUNG 464 depends on ARM && PLAT_SAMSUNG
460 default y if CPU_S3C2443 465 default y if !(CPU_S3C2410 || SERIAL_S3C2412 || CPU_S3C2440 || CPU_S3C2442)
461 help 466 help
462 Internal node for the common case of 4 Samsung compatible UARTs 467 Internal node for the common case of 4 Samsung compatible UARTs
463 468
@@ -465,7 +470,7 @@ config SERIAL_SAMSUNG_UARTS
465 int 470 int
466 depends on ARM && PLAT_SAMSUNG 471 depends on ARM && PLAT_SAMSUNG
467 default 6 if ARCH_S5P6450 472 default 6 if ARCH_S5P6450
468 default 4 if SERIAL_SAMSUNG_UARTS_4 473 default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416
469 default 3 474 default 3
470 help 475 help
471 Select the number of available UART ports for the Samsung S3C 476 Select the number of available UART ports for the Samsung S3C
@@ -495,46 +500,27 @@ config SERIAL_SAMSUNG_CONSOLE
495 your boot loader about how to pass options to the kernel at 500 your boot loader about how to pass options to the kernel at
496 boot time.) 501 boot time.)
497 502
498config SERIAL_S3C2410 503config SERIAL_SIRFSOC
499 tristate "Samsung S3C2410 Serial port support" 504 tristate "SiRF SoC Platform Serial port support"
500 depends on SERIAL_SAMSUNG && CPU_S3C2410 505 depends on ARM && ARCH_PRIMA2
501 default y if CPU_S3C2410 506 select SERIAL_CORE
502 help 507 help
503 Serial port support for the Samsung S3C2410 SoC 508 Support for the on-chip UART on the CSR SiRFprimaII series,
504 509 providing /dev/ttySiRF0, 1 and 2 (note, some machines may not
505config SERIAL_S3C2412 510 provide all of these ports, depending on how the serial port
506 tristate "Samsung S3C2412/S3C2413 Serial port support" 511 pins are configured).
507 depends on SERIAL_SAMSUNG && CPU_S3C2412 512
508 default y if CPU_S3C2412 513config SERIAL_SIRFSOC_CONSOLE
509 help 514 bool "Support for console on SiRF SoC serial port"
510 Serial port support for the Samsung S3C2412 and S3C2413 SoC 515 depends on SERIAL_SIRFSOC=y
511 516 select SERIAL_CORE_CONSOLE
512config SERIAL_S3C2440 517 help
513 tristate "Samsung S3C2440/S3C2442/S3C2416 Serial port support" 518 Even if you say Y here, the currently visible virtual console
514 depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442 || CPU_S3C2416) 519 (/dev/tty0) will still be used as the system console by default, but
515 default y if CPU_S3C2440 520 you can alter that using a kernel command line option such as
516 default y if CPU_S3C2442 521 "console=ttySiRFx". (Try "man bootparam" or see the documentation of
517 select SERIAL_SAMSUNG_UARTS_4 if CPU_S3C2416 522 your boot loader about how to pass options to the kernel at
518 help 523 boot time.)
519 Serial port support for the Samsung S3C2440, S3C2416 and S3C2442 SoC
520
521config SERIAL_S3C6400
522 tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
523 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
524 select SERIAL_SAMSUNG_UARTS_4
525 default y
526 help
527 Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450
528 and S5PC100 SoCs
529
530config SERIAL_S5PV210
531 tristate "Samsung S5PV210 Serial port support"
532 depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_EXYNOS4210 || SOC_EXYNOS4212)
533 select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_EXYNOS4210 || SOC_EXYNOS4212)
534 default y
535 help
536 Serial port support for Samsung's S5P Family of SoC's
537
538 524
539config SERIAL_MAX3100 525config SERIAL_MAX3100
540 tristate "MAX3100 support" 526 tristate "MAX3100 support"
@@ -1324,7 +1310,7 @@ config SERIAL_OF_PLATFORM
1324 1310
1325config SERIAL_OMAP 1311config SERIAL_OMAP
1326 tristate "OMAP serial port support" 1312 tristate "OMAP serial port support"
1327 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4 1313 depends on ARCH_OMAP2PLUS
1328 select SERIAL_CORE 1314 select SERIAL_CORE
1329 help 1315 help
1330 If you have a machine based on an Texas Instruments OMAP CPU you 1316 If you have a machine based on an Texas Instruments OMAP CPU you
@@ -1575,6 +1561,15 @@ config SERIAL_PCH_UART
1575 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. 1561 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
1576 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. 1562 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
1577 1563
1564config SERIAL_PCH_UART_CONSOLE
1565 bool "Support for console on Intel EG20T PCH UART/OKI SEMICONDUCTOR ML7213 IOH"
1566 depends on SERIAL_PCH_UART=y
1567 select SERIAL_CORE_CONSOLE
1568 help
1569 Say Y here if you wish to use the PCH UART as the system console
1570 (the system console is the device which receives all kernel messages and
1571 warnings and which allows logins in single user mode).
1572
1578config SERIAL_MSM_SMD 1573config SERIAL_MSM_SMD
1579 bool "Enable tty device interface for some SMD ports" 1574 bool "Enable tty device interface for some SMD ports"
1580 default n 1575 default n
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index e10cf5b54b6d..07e0494c6830 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o
28obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o 28obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o
29obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o 29obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
30obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o 30obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o
31obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o
31obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o 32obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o
32obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o 33obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o
33obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o 34obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o
@@ -39,11 +40,6 @@ obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
39obj-$(CONFIG_SERIAL_BFIN) += bfin_uart.o 40obj-$(CONFIG_SERIAL_BFIN) += bfin_uart.o
40obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o 41obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o
41obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o 42obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o
42obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
43obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
44obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
45obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
46obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
47obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 43obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
48obj-$(CONFIG_SERIAL_MAX3107) += max3107.o 44obj-$(CONFIG_SERIAL_MAX3107) += max3107.o
49obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o 45obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o
@@ -94,3 +90,4 @@ obj-$(CONFIG_SERIAL_MSM_SMD) += msm_smd_tty.o
94obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o 90obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o
95obj-$(CONFIG_SERIAL_LANTIQ) += lantiq.o 91obj-$(CONFIG_SERIAL_LANTIQ) += lantiq.o
96obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o 92obj-$(CONFIG_SERIAL_XILINX_PS_UART) += xilinx_uartps.o
93obj-$(CONFIG_SERIAL_SIRFSOC) += sirfsoc_uart.o
diff --git a/drivers/tty/serial/apbuart.c b/drivers/tty/serial/apbuart.c
index 77554fd68d1f..7162f70d9260 100644
--- a/drivers/tty/serial/apbuart.c
+++ b/drivers/tty/serial/apbuart.c
@@ -577,7 +577,7 @@ static int __devinit apbuart_probe(struct platform_device *op)
577 return 0; 577 return 0;
578} 578}
579 579
580static struct of_device_id __initdata apbuart_match[] = { 580static struct of_device_id apbuart_match[] = {
581 { 581 {
582 .name = "GAISLER_APBUART", 582 .name = "GAISLER_APBUART",
583 }, 583 },
@@ -597,7 +597,7 @@ static struct platform_driver grlib_apbuart_of_driver = {
597}; 597};
598 598
599 599
600static int grlib_apbuart_configure(void) 600static int __init grlib_apbuart_configure(void)
601{ 601{
602 struct device_node *np; 602 struct device_node *np;
603 int line = 0; 603 int line = 0;
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 4c823f341d98..10605ecc99ab 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -212,8 +212,9 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
212{ 212{
213 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 213 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
214 unsigned int mode; 214 unsigned int mode;
215 unsigned long flags;
215 216
216 spin_lock(&port->lock); 217 spin_lock_irqsave(&port->lock, flags);
217 218
218 /* Disable interrupts */ 219 /* Disable interrupts */
219 UART_PUT_IDR(port, atmel_port->tx_done_mask); 220 UART_PUT_IDR(port, atmel_port->tx_done_mask);
@@ -244,7 +245,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
244 /* Enable interrupts */ 245 /* Enable interrupts */
245 UART_PUT_IER(port, atmel_port->tx_done_mask); 246 UART_PUT_IER(port, atmel_port->tx_done_mask);
246 247
247 spin_unlock(&port->lock); 248 spin_unlock_irqrestore(&port->lock, flags);
248 249
249} 250}
250 251
@@ -1256,12 +1257,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1256 1257
1257static void atmel_set_ldisc(struct uart_port *port, int new) 1258static void atmel_set_ldisc(struct uart_port *port, int new)
1258{ 1259{
1259 int line = port->line; 1260 if (new == N_PPS) {
1260
1261 if (line >= port->state->port.tty->driver->num)
1262 return;
1263
1264 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
1265 port->flags |= UPF_HARDPPS_CD; 1261 port->flags |= UPF_HARDPPS_CD;
1266 atmel_enable_ms(port); 1262 atmel_enable_ms(port);
1267 } else { 1263 } else {
diff --git a/drivers/tty/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c
index ee101c0d358f..7fbc3a08f10d 100644
--- a/drivers/tty/serial/bfin_sport_uart.c
+++ b/drivers/tty/serial/bfin_sport_uart.c
@@ -299,8 +299,13 @@ static int sport_startup(struct uart_port *port)
299 dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n"); 299 dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n");
300 } 300 }
301 } 301 }
302 if (up->rts_pin >= 0) 302 if (up->rts_pin >= 0) {
303 gpio_direction_output(up->rts_pin, 0); 303 if (gpio_request(up->rts_pin, DRV_NAME)) {
304 dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin);
305 up->rts_pin = -1;
306 } else
307 gpio_direction_output(up->rts_pin, 0);
308 }
304#endif 309#endif
305 310
306 return 0; 311 return 0;
@@ -445,6 +450,8 @@ static void sport_shutdown(struct uart_port *port)
445#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS 450#ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
446 if (up->cts_pin >= 0) 451 if (up->cts_pin >= 0)
447 free_irq(gpio_to_irq(up->cts_pin), up); 452 free_irq(gpio_to_irq(up->cts_pin), up);
453 if (up->rts_pin >= 0)
454 gpio_free(up->rts_pin);
448#endif 455#endif
449} 456}
450 457
@@ -803,17 +810,16 @@ static int __devinit sport_uart_probe(struct platform_device *pdev)
803 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 810 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
804 if (res == NULL) 811 if (res == NULL)
805 sport->cts_pin = -1; 812 sport->cts_pin = -1;
806 else 813 else {
807 sport->cts_pin = res->start; 814 sport->cts_pin = res->start;
815 sport->port.flags |= ASYNC_CTS_FLOW;
816 }
808 817
809 res = platform_get_resource(pdev, IORESOURCE_IO, 1); 818 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
810 if (res == NULL) 819 if (res == NULL)
811 sport->rts_pin = -1; 820 sport->rts_pin = -1;
812 else 821 else
813 sport->rts_pin = res->start; 822 sport->rts_pin = res->start;
814
815 if (sport->rts_pin >= 0)
816 gpio_request(sport->rts_pin, DRV_NAME);
817#endif 823#endif
818 } 824 }
819 825
@@ -853,10 +859,6 @@ static int __devexit sport_uart_remove(struct platform_device *pdev)
853 859
854 if (sport) { 860 if (sport) {
855 uart_remove_one_port(&sport_uart_reg, &sport->port); 861 uart_remove_one_port(&sport_uart_reg, &sport->port);
856#ifdef CONFIG_SERIAL_BFIN_CTSRTS
857 if (sport->rts_pin >= 0)
858 gpio_free(sport->rts_pin);
859#endif
860 iounmap(sport->port.membase); 862 iounmap(sport->port.membase);
861 peripheral_free_list( 863 peripheral_free_list(
862 (unsigned short *)pdev->dev.platform_data); 864 (unsigned short *)pdev->dev.platform_data);
diff --git a/drivers/tty/serial/bfin_sport_uart.h b/drivers/tty/serial/bfin_sport_uart.h
index 6d06ce1d5675..e4510ea135ce 100644
--- a/drivers/tty/serial/bfin_sport_uart.h
+++ b/drivers/tty/serial/bfin_sport_uart.h
@@ -45,11 +45,12 @@
45#define SPORT_GET_RX32(sport) \ 45#define SPORT_GET_RX32(sport) \
46({ \ 46({ \
47 unsigned int __ret; \ 47 unsigned int __ret; \
48 unsigned long flags; \
48 if (ANOMALY_05000473) \ 49 if (ANOMALY_05000473) \
49 local_irq_disable(); \ 50 local_irq_save(flags); \
50 __ret = bfin_read32((sport)->port.membase + OFFSET_RX); \ 51 __ret = bfin_read32((sport)->port.membase + OFFSET_RX); \
51 if (ANOMALY_05000473) \ 52 if (ANOMALY_05000473) \
52 local_irq_enable(); \ 53 local_irq_restore(flags); \
53 __ret; \ 54 __ret; \
54}) 55})
55#define SPORT_GET_RCR1(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR1)) 56#define SPORT_GET_RCR1(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR1))
diff --git a/drivers/tty/serial/bfin_uart.c b/drivers/tty/serial/bfin_uart.c
index 66afb98b77b5..26953bfa6922 100644
--- a/drivers/tty/serial/bfin_uart.c
+++ b/drivers/tty/serial/bfin_uart.c
@@ -116,15 +116,22 @@ static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
116static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id) 116static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
117{ 117{
118 struct bfin_serial_port *uart = dev_id; 118 struct bfin_serial_port *uart = dev_id;
119 unsigned int status; 119 unsigned int status = bfin_serial_get_mctrl(&uart->port);
120
121 status = bfin_serial_get_mctrl(&uart->port);
122 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
123#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 120#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
124 uart->scts = 1; 121 struct tty_struct *tty = uart->port.state->port.tty;
122
125 UART_CLEAR_SCTS(uart); 123 UART_CLEAR_SCTS(uart);
126 UART_CLEAR_IER(uart, EDSSI); 124 if (tty->hw_stopped) {
125 if (status) {
126 tty->hw_stopped = 0;
127 uart_write_wakeup(&uart->port);
128 }
129 } else {
130 if (!status)
131 tty->hw_stopped = 1;
132 }
127#endif 133#endif
134 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
128 135
129 return IRQ_HANDLED; 136 return IRQ_HANDLED;
130} 137}
@@ -175,13 +182,6 @@ static void bfin_serial_start_tx(struct uart_port *port)
175 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 182 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
176 struct tty_struct *tty = uart->port.state->port.tty; 183 struct tty_struct *tty = uart->port.state->port.tty;
177 184
178#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
179 if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
180 uart->scts = 0;
181 uart_handle_cts_change(&uart->port, uart->scts);
182 }
183#endif
184
185 /* 185 /*
186 * To avoid losting RX interrupt, we reset IR function 186 * To avoid losting RX interrupt, we reset IR function
187 * before sending data. 187 * before sending data.
@@ -380,12 +380,6 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
380{ 380{
381 struct bfin_serial_port *uart = dev_id; 381 struct bfin_serial_port *uart = dev_id;
382 382
383#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
384 if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
385 uart->scts = 0;
386 uart_handle_cts_change(&uart->port, uart->scts);
387 }
388#endif
389 spin_lock(&uart->port.lock); 383 spin_lock(&uart->port.lock);
390 if (UART_GET_LSR(uart) & THRE) 384 if (UART_GET_LSR(uart) & THRE)
391 bfin_serial_tx_chars(uart); 385 bfin_serial_tx_chars(uart);
@@ -531,13 +525,6 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
531 struct bfin_serial_port *uart = dev_id; 525 struct bfin_serial_port *uart = dev_id;
532 struct circ_buf *xmit = &uart->port.state->xmit; 526 struct circ_buf *xmit = &uart->port.state->xmit;
533 527
534#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
535 if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
536 uart->scts = 0;
537 uart_handle_cts_change(&uart->port, uart->scts);
538 }
539#endif
540
541 spin_lock(&uart->port.lock); 528 spin_lock(&uart->port.lock);
542 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { 529 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
543 disable_dma(uart->tx_dma_channel); 530 disable_dma(uart->tx_dma_channel);
@@ -739,20 +726,26 @@ static int bfin_serial_startup(struct uart_port *port)
739 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n"); 726 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
740 } 727 }
741 } 728 }
742 if (uart->rts_pin >= 0) 729 if (uart->rts_pin >= 0) {
743 gpio_direction_output(uart->rts_pin, 0); 730 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
731 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
732 uart->rts_pin = -1;
733 } else
734 gpio_direction_output(uart->rts_pin, 0);
735 }
744#endif 736#endif
745#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 737#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
746 if (uart->cts_pin >= 0 && request_irq(uart->status_irq, 738 if (uart->cts_pin >= 0) {
747 bfin_serial_mctrl_cts_int, 739 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
748 0, "BFIN_UART_MODEM_STATUS", uart)) { 740 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
749 uart->cts_pin = -1; 741 uart->cts_pin = -1;
750 pr_info("Unable to attach BlackFin UART Modem Status interrupt.\n"); 742 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
751 } 743 }
752 744
753 /* CTS RTS PINs are negative assertive. */ 745 /* CTS RTS PINs are negative assertive. */
754 UART_PUT_MCR(uart, ACTS); 746 UART_PUT_MCR(uart, ACTS);
755 UART_SET_IER(uart, EDSSI); 747 UART_SET_IER(uart, EDSSI);
748 }
756#endif 749#endif
757 750
758 UART_SET_IER(uart, ERBFI); 751 UART_SET_IER(uart, ERBFI);
@@ -792,6 +785,8 @@ static void bfin_serial_shutdown(struct uart_port *port)
792#ifdef CONFIG_SERIAL_BFIN_CTSRTS 785#ifdef CONFIG_SERIAL_BFIN_CTSRTS
793 if (uart->cts_pin >= 0) 786 if (uart->cts_pin >= 0)
794 free_irq(gpio_to_irq(uart->cts_pin), uart); 787 free_irq(gpio_to_irq(uart->cts_pin), uart);
788 if (uart->rts_pin >= 0)
789 gpio_free(uart->rts_pin);
795#endif 790#endif
796#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 791#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
797 if (uart->cts_pin >= 0) 792 if (uart->cts_pin >= 0)
@@ -1370,18 +1365,18 @@ static int bfin_serial_probe(struct platform_device *pdev)
1370 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1365 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1371 if (res == NULL) 1366 if (res == NULL)
1372 uart->cts_pin = -1; 1367 uart->cts_pin = -1;
1373 else 1368 else {
1374 uart->cts_pin = res->start; 1369 uart->cts_pin = res->start;
1370#ifdef CONFIG_SERIAL_BFIN_CTSRTS
1371 uart->port.flags |= ASYNC_CTS_FLOW;
1372#endif
1373 }
1375 1374
1376 res = platform_get_resource(pdev, IORESOURCE_IO, 1); 1375 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1377 if (res == NULL) 1376 if (res == NULL)
1378 uart->rts_pin = -1; 1377 uart->rts_pin = -1;
1379 else 1378 else
1380 uart->rts_pin = res->start; 1379 uart->rts_pin = res->start;
1381# if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1382 if (uart->rts_pin >= 0)
1383 gpio_request(uart->rts_pin, DRIVER_NAME);
1384# endif
1385#endif 1380#endif
1386 } 1381 }
1387 1382
@@ -1421,10 +1416,6 @@ static int __devexit bfin_serial_remove(struct platform_device *pdev)
1421 1416
1422 if (uart) { 1417 if (uart) {
1423 uart_remove_one_port(&bfin_serial_reg, &uart->port); 1418 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1424#ifdef CONFIG_SERIAL_BFIN_CTSRTS
1425 if (uart->rts_pin >= 0)
1426 gpio_free(uart->rts_pin);
1427#endif
1428 iounmap(uart->port.membase); 1419 iounmap(uart->port.membase);
1429 peripheral_free_list( 1420 peripheral_free_list(
1430 (unsigned short *)pdev->dev.platform_data); 1421 (unsigned short *)pdev->dev.platform_data);
diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
index 426434e5eb7c..7e925e20cbaa 100644
--- a/drivers/tty/serial/ifx6x60.c
+++ b/drivers/tty/serial/ifx6x60.c
@@ -1334,7 +1334,6 @@ MODULE_DEVICE_TABLE(spi, ifx_id_table);
1334static const struct spi_driver ifx_spi_driver = { 1334static const struct spi_driver ifx_spi_driver = {
1335 .driver = { 1335 .driver = {
1336 .name = DRVNAME, 1336 .name = DRVNAME,
1337 .bus = &spi_bus_type,
1338 .pm = &ifx_spi_pm, 1337 .pm = &ifx_spi_pm,
1339 .owner = THIS_MODULE}, 1338 .owner = THIS_MODULE},
1340 .probe = ifx_spi_spi_probe, 1339 .probe = ifx_spi_spi_probe,
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 163fc9021f5a..0b7fed746b27 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -102,6 +102,7 @@
102#define UCR2_STPB (1<<6) /* Stop */ 102#define UCR2_STPB (1<<6) /* Stop */
103#define UCR2_WS (1<<5) /* Word size */ 103#define UCR2_WS (1<<5) /* Word size */
104#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ 104#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */
105#define UCR2_ATEN (1<<3) /* Aging Timer Enable */
105#define UCR2_TXEN (1<<2) /* Transmitter enabled */ 106#define UCR2_TXEN (1<<2) /* Transmitter enabled */
106#define UCR2_RXEN (1<<1) /* Receiver enabled */ 107#define UCR2_RXEN (1<<1) /* Receiver enabled */
107#define UCR2_SRST (1<<0) /* SW reset */ 108#define UCR2_SRST (1<<0) /* SW reset */
@@ -207,6 +208,12 @@ struct imx_port {
207 struct imx_uart_data *devdata; 208 struct imx_uart_data *devdata;
208}; 209};
209 210
211struct imx_port_ucrs {
212 unsigned int ucr1;
213 unsigned int ucr2;
214 unsigned int ucr3;
215};
216
210#ifdef CONFIG_IRDA 217#ifdef CONFIG_IRDA
211#define USE_IRDA(sport) ((sport)->use_irda) 218#define USE_IRDA(sport) ((sport)->use_irda)
212#else 219#else
@@ -260,6 +267,27 @@ static inline int is_imx21_uart(struct imx_port *sport)
260} 267}
261 268
262/* 269/*
270 * Save and restore functions for UCR1, UCR2 and UCR3 registers
271 */
272static void imx_port_ucrs_save(struct uart_port *port,
273 struct imx_port_ucrs *ucr)
274{
275 /* save control registers */
276 ucr->ucr1 = readl(port->membase + UCR1);
277 ucr->ucr2 = readl(port->membase + UCR2);
278 ucr->ucr3 = readl(port->membase + UCR3);
279}
280
281static void imx_port_ucrs_restore(struct uart_port *port,
282 struct imx_port_ucrs *ucr)
283{
284 /* restore control registers */
285 writel(ucr->ucr1, port->membase + UCR1);
286 writel(ucr->ucr2, port->membase + UCR2);
287 writel(ucr->ucr3, port->membase + UCR3);
288}
289
290/*
263 * Handle any change of modem status signal since we were last called. 291 * Handle any change of modem status signal since we were last called.
264 */ 292 */
265static void imx_mctrl_check(struct imx_port *sport) 293static void imx_mctrl_check(struct imx_port *sport)
@@ -566,6 +594,9 @@ static irqreturn_t imx_int(int irq, void *dev_id)
566 if (sts & USR1_RTSD) 594 if (sts & USR1_RTSD)
567 imx_rtsint(irq, dev_id); 595 imx_rtsint(irq, dev_id);
568 596
597 if (sts & USR1_AWAKE)
598 writel(USR1_AWAKE, sport->port.membase + USR1);
599
569 return IRQ_HANDLED; 600 return IRQ_HANDLED;
570} 601}
571 602
@@ -901,6 +932,8 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
901 ucr2 |= UCR2_PROE; 932 ucr2 |= UCR2_PROE;
902 } 933 }
903 934
935 del_timer_sync(&sport->timer);
936
904 /* 937 /*
905 * Ask the core to calculate the divisor for us. 938 * Ask the core to calculate the divisor for us.
906 */ 939 */
@@ -931,8 +964,6 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
931 sport->port.ignore_status_mask |= URXD_OVRRUN; 964 sport->port.ignore_status_mask |= URXD_OVRRUN;
932 } 965 }
933 966
934 del_timer_sync(&sport->timer);
935
936 /* 967 /*
937 * Update the per-port timeout. 968 * Update the per-port timeout.
938 */ 969 */
@@ -1079,6 +1110,70 @@ imx_verify_port(struct uart_port *port, struct serial_struct *ser)
1079 return ret; 1110 return ret;
1080} 1111}
1081 1112
1113#if defined(CONFIG_CONSOLE_POLL)
1114static int imx_poll_get_char(struct uart_port *port)
1115{
1116 struct imx_port_ucrs old_ucr;
1117 unsigned int status;
1118 unsigned char c;
1119
1120 /* save control registers */
1121 imx_port_ucrs_save(port, &old_ucr);
1122
1123 /* disable interrupts */
1124 writel(UCR1_UARTEN, port->membase + UCR1);
1125 writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
1126 port->membase + UCR2);
1127 writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
1128 port->membase + UCR3);
1129
1130 /* poll */
1131 do {
1132 status = readl(port->membase + USR2);
1133 } while (~status & USR2_RDR);
1134
1135 /* read */
1136 c = readl(port->membase + URXD0);
1137
1138 /* restore control registers */
1139 imx_port_ucrs_restore(port, &old_ucr);
1140
1141 return c;
1142}
1143
1144static void imx_poll_put_char(struct uart_port *port, unsigned char c)
1145{
1146 struct imx_port_ucrs old_ucr;
1147 unsigned int status;
1148
1149 /* save control registers */
1150 imx_port_ucrs_save(port, &old_ucr);
1151
1152 /* disable interrupts */
1153 writel(UCR1_UARTEN, port->membase + UCR1);
1154 writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
1155 port->membase + UCR2);
1156 writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
1157 port->membase + UCR3);
1158
1159 /* drain */
1160 do {
1161 status = readl(port->membase + USR1);
1162 } while (~status & USR1_TRDY);
1163
1164 /* write */
1165 writel(c, port->membase + URTX0);
1166
1167 /* flush */
1168 do {
1169 status = readl(port->membase + USR2);
1170 } while (~status & USR2_TXDC);
1171
1172 /* restore control registers */
1173 imx_port_ucrs_restore(port, &old_ucr);
1174}
1175#endif
1176
1082static struct uart_ops imx_pops = { 1177static struct uart_ops imx_pops = {
1083 .tx_empty = imx_tx_empty, 1178 .tx_empty = imx_tx_empty,
1084 .set_mctrl = imx_set_mctrl, 1179 .set_mctrl = imx_set_mctrl,
@@ -1096,6 +1191,10 @@ static struct uart_ops imx_pops = {
1096 .request_port = imx_request_port, 1191 .request_port = imx_request_port,
1097 .config_port = imx_config_port, 1192 .config_port = imx_config_port,
1098 .verify_port = imx_verify_port, 1193 .verify_port = imx_verify_port,
1194#if defined(CONFIG_CONSOLE_POLL)
1195 .poll_get_char = imx_poll_get_char,
1196 .poll_put_char = imx_poll_put_char,
1197#endif
1099}; 1198};
1100 1199
1101static struct imx_port *imx_ports[UART_NR]; 1200static struct imx_port *imx_ports[UART_NR];
@@ -1118,13 +1217,14 @@ static void
1118imx_console_write(struct console *co, const char *s, unsigned int count) 1217imx_console_write(struct console *co, const char *s, unsigned int count)
1119{ 1218{
1120 struct imx_port *sport = imx_ports[co->index]; 1219 struct imx_port *sport = imx_ports[co->index];
1121 unsigned int old_ucr1, old_ucr2, ucr1; 1220 struct imx_port_ucrs old_ucr;
1221 unsigned int ucr1;
1122 1222
1123 /* 1223 /*
1124 * First, save UCR1/2 and then disable interrupts 1224 * First, save UCR1/2/3 and then disable interrupts
1125 */ 1225 */
1126 ucr1 = old_ucr1 = readl(sport->port.membase + UCR1); 1226 imx_port_ucrs_save(&sport->port, &old_ucr);
1127 old_ucr2 = readl(sport->port.membase + UCR2); 1227 ucr1 = old_ucr.ucr1;
1128 1228
1129 if (is_imx1_uart(sport)) 1229 if (is_imx1_uart(sport))
1130 ucr1 |= IMX1_UCR1_UARTCLKEN; 1230 ucr1 |= IMX1_UCR1_UARTCLKEN;
@@ -1133,18 +1233,17 @@ imx_console_write(struct console *co, const char *s, unsigned int count)
1133 1233
1134 writel(ucr1, sport->port.membase + UCR1); 1234 writel(ucr1, sport->port.membase + UCR1);
1135 1235
1136 writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); 1236 writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2);
1137 1237
1138 uart_console_write(&sport->port, s, count, imx_console_putchar); 1238 uart_console_write(&sport->port, s, count, imx_console_putchar);
1139 1239
1140 /* 1240 /*
1141 * Finally, wait for transmitter to become empty 1241 * Finally, wait for transmitter to become empty
1142 * and restore UCR1/2 1242 * and restore UCR1/2/3
1143 */ 1243 */
1144 while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); 1244 while (!(readl(sport->port.membase + USR2) & USR2_TXDC));
1145 1245
1146 writel(old_ucr1, sport->port.membase + UCR1); 1246 imx_port_ucrs_restore(&sport->port, &old_ucr);
1147 writel(old_ucr2, sport->port.membase + UCR2);
1148} 1247}
1149 1248
1150/* 1249/*
@@ -1269,6 +1368,12 @@ static struct uart_driver imx_reg = {
1269static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) 1368static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
1270{ 1369{
1271 struct imx_port *sport = platform_get_drvdata(dev); 1370 struct imx_port *sport = platform_get_drvdata(dev);
1371 unsigned int val;
1372
1373 /* enable wakeup from i.MX UART */
1374 val = readl(sport->port.membase + UCR3);
1375 val |= UCR3_AWAKEN;
1376 writel(val, sport->port.membase + UCR3);
1272 1377
1273 if (sport) 1378 if (sport)
1274 uart_suspend_port(&imx_reg, &sport->port); 1379 uart_suspend_port(&imx_reg, &sport->port);
@@ -1279,6 +1384,12 @@ static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
1279static int serial_imx_resume(struct platform_device *dev) 1384static int serial_imx_resume(struct platform_device *dev)
1280{ 1385{
1281 struct imx_port *sport = platform_get_drvdata(dev); 1386 struct imx_port *sport = platform_get_drvdata(dev);
1387 unsigned int val;
1388
1389 /* disable wakeup from i.MX UART */
1390 val = readl(sport->port.membase + UCR3);
1391 val &= ~UCR3_AWAKEN;
1392 writel(val, sport->port.membase + UCR3);
1282 1393
1283 if (sport) 1394 if (sport)
1284 uart_resume_port(&imx_reg, &sport->port); 1395 uart_resume_port(&imx_reg, &sport->port);
@@ -1287,6 +1398,10 @@ static int serial_imx_resume(struct platform_device *dev)
1287} 1398}
1288 1399
1289#ifdef CONFIG_OF 1400#ifdef CONFIG_OF
1401/*
1402 * This function returns 1 iff pdev isn't a device instatiated by dt, 0 iff it
1403 * could successfully get all information from dt or a negative errno.
1404 */
1290static int serial_imx_probe_dt(struct imx_port *sport, 1405static int serial_imx_probe_dt(struct imx_port *sport,
1291 struct platform_device *pdev) 1406 struct platform_device *pdev)
1292{ 1407{
@@ -1296,12 +1411,13 @@ static int serial_imx_probe_dt(struct imx_port *sport,
1296 int ret; 1411 int ret;
1297 1412
1298 if (!np) 1413 if (!np)
1299 return -ENODEV; 1414 /* no device tree device */
1415 return 1;
1300 1416
1301 ret = of_alias_get_id(np, "serial"); 1417 ret = of_alias_get_id(np, "serial");
1302 if (ret < 0) { 1418 if (ret < 0) {
1303 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 1419 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
1304 return -ENODEV; 1420 return ret;
1305 } 1421 }
1306 sport->port.line = ret; 1422 sport->port.line = ret;
1307 1423
@@ -1319,7 +1435,7 @@ static int serial_imx_probe_dt(struct imx_port *sport,
1319static inline int serial_imx_probe_dt(struct imx_port *sport, 1435static inline int serial_imx_probe_dt(struct imx_port *sport,
1320 struct platform_device *pdev) 1436 struct platform_device *pdev)
1321{ 1437{
1322 return -ENODEV; 1438 return 1;
1323} 1439}
1324#endif 1440#endif
1325 1441
@@ -1354,8 +1470,10 @@ static int serial_imx_probe(struct platform_device *pdev)
1354 return -ENOMEM; 1470 return -ENOMEM;
1355 1471
1356 ret = serial_imx_probe_dt(sport, pdev); 1472 ret = serial_imx_probe_dt(sport, pdev);
1357 if (ret == -ENODEV) 1473 if (ret > 0)
1358 serial_imx_probe_pdata(sport, pdev); 1474 serial_imx_probe_pdata(sport, pdev);
1475 else if (ret < 0)
1476 goto free;
1359 1477
1360 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1478 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1361 if (!res) { 1479 if (!res) {
@@ -1476,7 +1594,7 @@ static int __init imx_serial_init(void)
1476 if (ret != 0) 1594 if (ret != 0)
1477 uart_unregister_driver(&imx_reg); 1595 uart_unregister_driver(&imx_reg);
1478 1596
1479 return 0; 1597 return ret;
1480} 1598}
1481 1599
1482static void __exit imx_serial_exit(void) 1600static void __exit imx_serial_exit(void)
diff --git a/drivers/tty/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c
index 08018934e013..94a6792bf97b 100644
--- a/drivers/tty/serial/m32r_sio.c
+++ b/drivers/tty/serial/m32r_sio.c
@@ -1000,11 +1000,8 @@ static void __init m32r_sio_register_ports(struct uart_driver *drv)
1000 init_timer(&up->timer); 1000 init_timer(&up->timer);
1001 up->timer.function = m32r_sio_timeout; 1001 up->timer.function = m32r_sio_timeout;
1002 1002
1003 /* 1003 up->mcr_mask = ~0;
1004 * ALPHA_KLUDGE_MCR needs to be killed. 1004 up->mcr_force = 0;
1005 */
1006 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1007 up->mcr_force = ALPHA_KLUDGE_MCR;
1008 1005
1009 uart_add_one_port(drv, &up->port); 1006 uart_add_one_port(drv, &up->port);
1010 } 1007 }
diff --git a/drivers/tty/serial/max3100.c b/drivers/tty/serial/max3100.c
index 8a6cc8c30b5a..b4902b99cfd2 100644
--- a/drivers/tty/serial/max3100.c
+++ b/drivers/tty/serial/max3100.c
@@ -901,7 +901,6 @@ static int max3100_resume(struct spi_device *spi)
901static struct spi_driver max3100_driver = { 901static struct spi_driver max3100_driver = {
902 .driver = { 902 .driver = {
903 .name = "max3100", 903 .name = "max3100",
904 .bus = &spi_bus_type,
905 .owner = THIS_MODULE, 904 .owner = THIS_MODULE,
906 }, 905 },
907 906
diff --git a/drivers/tty/serial/max3107-aava.c b/drivers/tty/serial/max3107-aava.c
index 90c40f22ec70..aae772a71de6 100644
--- a/drivers/tty/serial/max3107-aava.c
+++ b/drivers/tty/serial/max3107-aava.c
@@ -315,7 +315,6 @@ static int __devinit max3107_probe_aava(struct spi_device *spi)
315static struct spi_driver max3107_driver = { 315static struct spi_driver max3107_driver = {
316 .driver = { 316 .driver = {
317 .name = "aava-max3107", 317 .name = "aava-max3107",
318 .bus = &spi_bus_type,
319 .owner = THIS_MODULE, 318 .owner = THIS_MODULE,
320 }, 319 },
321 .probe = max3107_probe_aava, 320 .probe = max3107_probe_aava,
diff --git a/drivers/tty/serial/max3107.c b/drivers/tty/serial/max3107.c
index 7827000db4f5..17c7ba805d98 100644
--- a/drivers/tty/serial/max3107.c
+++ b/drivers/tty/serial/max3107.c
@@ -1181,7 +1181,6 @@ static int max3107_probe_generic(struct spi_device *spi)
1181static struct spi_driver max3107_driver = { 1181static struct spi_driver max3107_driver = {
1182 .driver = { 1182 .driver = {
1183 .name = "max3107", 1183 .name = "max3107",
1184 .bus = &spi_bus_type,
1185 .owner = THIS_MODULE, 1184 .owner = THIS_MODULE,
1186 }, 1185 },
1187 .probe = max3107_probe_generic, 1186 .probe = max3107_probe_generic,
diff --git a/drivers/tty/serial/mfd.c b/drivers/tty/serial/mfd.c
index e272d3919c67..a9234ba8f8d5 100644
--- a/drivers/tty/serial/mfd.c
+++ b/drivers/tty/serial/mfd.c
@@ -1154,7 +1154,6 @@ serial_hsu_console_setup(struct console *co, char *options)
1154 int bits = 8; 1154 int bits = 8;
1155 int parity = 'n'; 1155 int parity = 'n';
1156 int flow = 'n'; 1156 int flow = 'n';
1157 int ret;
1158 1157
1159 if (co->index == -1 || co->index >= serial_hsu_reg.nr) 1158 if (co->index == -1 || co->index >= serial_hsu_reg.nr)
1160 co->index = 0; 1159 co->index = 0;
@@ -1165,9 +1164,7 @@ serial_hsu_console_setup(struct console *co, char *options)
1165 if (options) 1164 if (options)
1166 uart_parse_options(options, &baud, &parity, &bits, &flow); 1165 uart_parse_options(options, &baud, &parity, &bits, &flow);
1167 1166
1168 ret = uart_set_options(&up->port, co, baud, parity, bits, flow); 1167 return uart_set_options(&up->port, co, baud, parity, bits, flow);
1169
1170 return ret;
1171} 1168}
1172 1169
1173static struct console serial_hsu_console = { 1170static struct console serial_hsu_console = {
@@ -1176,9 +1173,13 @@ static struct console serial_hsu_console = {
1176 .device = uart_console_device, 1173 .device = uart_console_device,
1177 .setup = serial_hsu_console_setup, 1174 .setup = serial_hsu_console_setup,
1178 .flags = CON_PRINTBUFFER, 1175 .flags = CON_PRINTBUFFER,
1179 .index = 2, 1176 .index = -1,
1180 .data = &serial_hsu_reg, 1177 .data = &serial_hsu_reg,
1181}; 1178};
1179
1180#define SERIAL_HSU_CONSOLE (&serial_hsu_console)
1181#else
1182#define SERIAL_HSU_CONSOLE NULL
1182#endif 1183#endif
1183 1184
1184struct uart_ops serial_hsu_pops = { 1185struct uart_ops serial_hsu_pops = {
@@ -1208,6 +1209,7 @@ static struct uart_driver serial_hsu_reg = {
1208 .major = TTY_MAJOR, 1209 .major = TTY_MAJOR,
1209 .minor = 128, 1210 .minor = 128,
1210 .nr = 3, 1211 .nr = 3,
1212 .cons = SERIAL_HSU_CONSOLE,
1211}; 1213};
1212 1214
1213#ifdef CONFIG_PM 1215#ifdef CONFIG_PM
@@ -1342,12 +1344,6 @@ static int serial_hsu_probe(struct pci_dev *pdev,
1342 } 1344 }
1343 uart_add_one_port(&serial_hsu_reg, &uport->port); 1345 uart_add_one_port(&serial_hsu_reg, &uport->port);
1344 1346
1345#ifdef CONFIG_SERIAL_MFD_HSU_CONSOLE
1346 if (index == 2) {
1347 register_console(&serial_hsu_console);
1348 uport->port.cons = &serial_hsu_console;
1349 }
1350#endif
1351 pci_set_drvdata(pdev, uport); 1347 pci_set_drvdata(pdev, uport);
1352 } 1348 }
1353 1349
diff --git a/drivers/tty/serial/mrst_max3110.c b/drivers/tty/serial/mrst_max3110.c
index 4c309e869903..df2a2240a3ae 100644
--- a/drivers/tty/serial/mrst_max3110.c
+++ b/drivers/tty/serial/mrst_max3110.c
@@ -876,7 +876,6 @@ static int __devexit serial_m3110_remove(struct spi_device *dev)
876static struct spi_driver uart_max3110_driver = { 876static struct spi_driver uart_max3110_driver = {
877 .driver = { 877 .driver = {
878 .name = "spi_max3111", 878 .name = "spi_max3111",
879 .bus = &spi_bus_type,
880 .owner = THIS_MODULE, 879 .owner = THIS_MODULE,
881 }, 880 },
882 .probe = serial_m3110_probe, 881 .probe = serial_m3110_probe,
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
index 60c6eb850265..5e85e1e14c44 100644
--- a/drivers/tty/serial/msm_serial_hs.c
+++ b/drivers/tty/serial/msm_serial_hs.c
@@ -422,9 +422,9 @@ static int __devexit msm_hs_remove(struct platform_device *pdev)
422 msm_uport->rx.rbuffer); 422 msm_uport->rx.rbuffer);
423 dma_pool_destroy(msm_uport->rx.pool); 423 dma_pool_destroy(msm_uport->rx.pool);
424 424
425 dma_unmap_single(dev, msm_uport->rx.cmdptr_dmaaddr, sizeof(u32 *), 425 dma_unmap_single(dev, msm_uport->rx.cmdptr_dmaaddr, sizeof(u32),
426 DMA_TO_DEVICE); 426 DMA_TO_DEVICE);
427 dma_unmap_single(dev, msm_uport->tx.mapped_cmd_ptr_ptr, sizeof(u32 *), 427 dma_unmap_single(dev, msm_uport->tx.mapped_cmd_ptr_ptr, sizeof(u32),
428 DMA_TO_DEVICE); 428 DMA_TO_DEVICE);
429 dma_unmap_single(dev, msm_uport->tx.mapped_cmd_ptr, sizeof(dmov_box), 429 dma_unmap_single(dev, msm_uport->tx.mapped_cmd_ptr, sizeof(dmov_box),
430 DMA_TO_DEVICE); 430 DMA_TO_DEVICE);
@@ -812,7 +812,7 @@ static void msm_hs_submit_tx_locked(struct uart_port *uport)
812 *tx->command_ptr_ptr = CMD_PTR_LP | DMOV_CMD_ADDR(tx->mapped_cmd_ptr); 812 *tx->command_ptr_ptr = CMD_PTR_LP | DMOV_CMD_ADDR(tx->mapped_cmd_ptr);
813 813
814 dma_sync_single_for_device(uport->dev, tx->mapped_cmd_ptr_ptr, 814 dma_sync_single_for_device(uport->dev, tx->mapped_cmd_ptr_ptr,
815 sizeof(u32 *), DMA_TO_DEVICE); 815 sizeof(u32), DMA_TO_DEVICE);
816 816
817 /* Save tx_count to use in Callback */ 817 /* Save tx_count to use in Callback */
818 tx->tx_count = tx_count; 818 tx->tx_count = tx_count;
@@ -1087,12 +1087,10 @@ static void msm_hs_config_port(struct uart_port *uport, int cfg_flags)
1087} 1087}
1088 1088
1089/* Handle CTS changes (Called from interrupt handler) */ 1089/* Handle CTS changes (Called from interrupt handler) */
1090static void msm_hs_handle_delta_cts(struct uart_port *uport) 1090static void msm_hs_handle_delta_cts_locked(struct uart_port *uport)
1091{ 1091{
1092 unsigned long flags;
1093 struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport); 1092 struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
1094 1093
1095 spin_lock_irqsave(&uport->lock, flags);
1096 clk_enable(msm_uport->clk); 1094 clk_enable(msm_uport->clk);
1097 1095
1098 /* clear interrupt */ 1096 /* clear interrupt */
@@ -1100,7 +1098,6 @@ static void msm_hs_handle_delta_cts(struct uart_port *uport)
1100 uport->icount.cts++; 1098 uport->icount.cts++;
1101 1099
1102 clk_disable(msm_uport->clk); 1100 clk_disable(msm_uport->clk);
1103 spin_unlock_irqrestore(&uport->lock, flags);
1104 1101
1105 /* clear the IOCTL TIOCMIWAIT if called */ 1102 /* clear the IOCTL TIOCMIWAIT if called */
1106 wake_up_interruptible(&uport->state->port.delta_msr_wait); 1103 wake_up_interruptible(&uport->state->port.delta_msr_wait);
@@ -1248,7 +1245,7 @@ static irqreturn_t msm_hs_isr(int irq, void *dev)
1248 1245
1249 /* Change in CTS interrupt */ 1246 /* Change in CTS interrupt */
1250 if (isr_status & UARTDM_ISR_DELTA_CTS_BMSK) 1247 if (isr_status & UARTDM_ISR_DELTA_CTS_BMSK)
1251 msm_hs_handle_delta_cts(uport); 1248 msm_hs_handle_delta_cts_locked(uport);
1252 1249
1253 spin_unlock_irqrestore(&uport->lock, flags); 1250 spin_unlock_irqrestore(&uport->lock, flags);
1254 1251
@@ -1537,7 +1534,7 @@ static int __devinit uartdm_init_port(struct uart_port *uport)
1537 if (!tx->command_ptr) 1534 if (!tx->command_ptr)
1538 return -ENOMEM; 1535 return -ENOMEM;
1539 1536
1540 tx->command_ptr_ptr = kmalloc(sizeof(u32 *), GFP_KERNEL | __GFP_DMA); 1537 tx->command_ptr_ptr = kmalloc(sizeof(u32), GFP_KERNEL | __GFP_DMA);
1541 if (!tx->command_ptr_ptr) { 1538 if (!tx->command_ptr_ptr) {
1542 ret = -ENOMEM; 1539 ret = -ENOMEM;
1543 goto err_tx_command_ptr_ptr; 1540 goto err_tx_command_ptr_ptr;
@@ -1547,7 +1544,7 @@ static int __devinit uartdm_init_port(struct uart_port *uport)
1547 sizeof(dmov_box), DMA_TO_DEVICE); 1544 sizeof(dmov_box), DMA_TO_DEVICE);
1548 tx->mapped_cmd_ptr_ptr = dma_map_single(uport->dev, 1545 tx->mapped_cmd_ptr_ptr = dma_map_single(uport->dev,
1549 tx->command_ptr_ptr, 1546 tx->command_ptr_ptr,
1550 sizeof(u32 *), DMA_TO_DEVICE); 1547 sizeof(u32), DMA_TO_DEVICE);
1551 tx->xfer.cmdptr = DMOV_CMD_ADDR(tx->mapped_cmd_ptr_ptr); 1548 tx->xfer.cmdptr = DMOV_CMD_ADDR(tx->mapped_cmd_ptr_ptr);
1552 1549
1553 init_waitqueue_head(&rx->wait); 1550 init_waitqueue_head(&rx->wait);
@@ -1575,7 +1572,7 @@ static int __devinit uartdm_init_port(struct uart_port *uport)
1575 goto err_rx_command_ptr; 1572 goto err_rx_command_ptr;
1576 } 1573 }
1577 1574
1578 rx->command_ptr_ptr = kmalloc(sizeof(u32 *), GFP_KERNEL | __GFP_DMA); 1575 rx->command_ptr_ptr = kmalloc(sizeof(u32), GFP_KERNEL | __GFP_DMA);
1579 if (!rx->command_ptr_ptr) { 1576 if (!rx->command_ptr_ptr) {
1580 pr_err("%s(): cannot allocate rx->command_ptr_ptr", __func__); 1577 pr_err("%s(): cannot allocate rx->command_ptr_ptr", __func__);
1581 ret = -ENOMEM; 1578 ret = -ENOMEM;
@@ -1593,7 +1590,7 @@ static int __devinit uartdm_init_port(struct uart_port *uport)
1593 *rx->command_ptr_ptr = CMD_PTR_LP | DMOV_CMD_ADDR(rx->mapped_cmd_ptr); 1590 *rx->command_ptr_ptr = CMD_PTR_LP | DMOV_CMD_ADDR(rx->mapped_cmd_ptr);
1594 1591
1595 rx->cmdptr_dmaaddr = dma_map_single(uport->dev, rx->command_ptr_ptr, 1592 rx->cmdptr_dmaaddr = dma_map_single(uport->dev, rx->command_ptr_ptr,
1596 sizeof(u32 *), DMA_TO_DEVICE); 1593 sizeof(u32), DMA_TO_DEVICE);
1597 rx->xfer.cmdptr = DMOV_CMD_ADDR(rx->cmdptr_dmaaddr); 1594 rx->xfer.cmdptr = DMOV_CMD_ADDR(rx->cmdptr_dmaaddr);
1598 1595
1599 INIT_WORK(&rx->tty_work, msm_hs_tty_flip_buffer_work); 1596 INIT_WORK(&rx->tty_work, msm_hs_tty_flip_buffer_work);
@@ -1609,7 +1606,7 @@ err_dma_pool_alloc:
1609 dma_pool_destroy(msm_uport->rx.pool); 1606 dma_pool_destroy(msm_uport->rx.pool);
1610err_dma_pool_create: 1607err_dma_pool_create:
1611 dma_unmap_single(uport->dev, msm_uport->tx.mapped_cmd_ptr_ptr, 1608 dma_unmap_single(uport->dev, msm_uport->tx.mapped_cmd_ptr_ptr,
1612 sizeof(u32 *), DMA_TO_DEVICE); 1609 sizeof(u32), DMA_TO_DEVICE);
1613 dma_unmap_single(uport->dev, msm_uport->tx.mapped_cmd_ptr, 1610 dma_unmap_single(uport->dev, msm_uport->tx.mapped_cmd_ptr,
1614 sizeof(dmov_box), DMA_TO_DEVICE); 1611 sizeof(dmov_box), DMA_TO_DEVICE);
1615 kfree(msm_uport->tx.command_ptr_ptr); 1612 kfree(msm_uport->tx.command_ptr_ptr);
diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
index 7e02c9c344fe..55fd362b9879 100644
--- a/drivers/tty/serial/mxs-auart.c
+++ b/drivers/tty/serial/mxs-auart.c
@@ -145,11 +145,12 @@ static inline void mxs_auart_tx_chars(struct mxs_auart_port *s)
145 writel(xmit->buf[xmit->tail], 145 writel(xmit->buf[xmit->tail],
146 s->port.membase + AUART_DATA); 146 s->port.membase + AUART_DATA);
147 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 147 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
148 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
149 uart_write_wakeup(&s->port);
150 } else 148 } else
151 break; 149 break;
152 } 150 }
151 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
152 uart_write_wakeup(&s->port);
153
153 if (uart_circ_empty(&(s->port.state->xmit))) 154 if (uart_circ_empty(&(s->port.state->xmit)))
154 writel(AUART_INTR_TXIEN, 155 writel(AUART_INTR_TXIEN,
155 s->port.membase + AUART_INTR_CLR); 156 s->port.membase + AUART_INTR_CLR);
@@ -424,7 +425,7 @@ static int mxs_auart_startup(struct uart_port *u)
424{ 425{
425 struct mxs_auart_port *s = to_auart_port(u); 426 struct mxs_auart_port *s = to_auart_port(u);
426 427
427 clk_enable(s->clk); 428 clk_prepare_enable(s->clk);
428 429
429 writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR); 430 writel(AUART_CTRL0_CLKGATE, u->membase + AUART_CTRL0_CLR);
430 431
@@ -453,7 +454,7 @@ static void mxs_auart_shutdown(struct uart_port *u)
453 writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN, 454 writel(AUART_INTR_RXIEN | AUART_INTR_RTIEN | AUART_INTR_CTSMIEN,
454 u->membase + AUART_INTR_CLR); 455 u->membase + AUART_INTR_CLR);
455 456
456 clk_disable(s->clk); 457 clk_disable_unprepare(s->clk);
457} 458}
458 459
459static unsigned int mxs_auart_tx_empty(struct uart_port *u) 460static unsigned int mxs_auart_tx_empty(struct uart_port *u)
@@ -634,7 +635,7 @@ auart_console_setup(struct console *co, char *options)
634 if (!s) 635 if (!s)
635 return -ENODEV; 636 return -ENODEV;
636 637
637 clk_enable(s->clk); 638 clk_prepare_enable(s->clk);
638 639
639 if (options) 640 if (options)
640 uart_parse_options(options, &baud, &parity, &bits, &flow); 641 uart_parse_options(options, &baud, &parity, &bits, &flow);
@@ -643,7 +644,7 @@ auart_console_setup(struct console *co, char *options)
643 644
644 ret = uart_set_options(&s->port, co, baud, parity, bits, flow); 645 ret = uart_set_options(&s->port, co, baud, parity, bits, flow);
645 646
646 clk_disable(s->clk); 647 clk_disable_unprepare(s->clk);
647 648
648 return ret; 649 return ret;
649} 650}
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 5e713d3ef1f4..d192dcbb82f5 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -37,17 +37,24 @@
37#include <linux/clk.h> 37#include <linux/clk.h>
38#include <linux/serial_core.h> 38#include <linux/serial_core.h>
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/pm_runtime.h>
41#include <linux/of.h>
40 42
41#include <plat/dma.h> 43#include <plat/dma.h>
42#include <plat/dmtimer.h> 44#include <plat/dmtimer.h>
43#include <plat/omap-serial.h> 45#include <plat/omap-serial.h>
44 46
47#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
48
45static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 49static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
46 50
47/* Forward declaration of functions */ 51/* Forward declaration of functions */
48static void uart_tx_dma_callback(int lch, u16 ch_status, void *data); 52static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
49static void serial_omap_rx_timeout(unsigned long uart_no); 53static void serial_omap_rxdma_poll(unsigned long uart_no);
50static int serial_omap_start_rxdma(struct uart_omap_port *up); 54static int serial_omap_start_rxdma(struct uart_omap_port *up);
55static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
56
57static struct workqueue_struct *serial_omap_uart_wq;
51 58
52static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 59static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
53{ 60{
@@ -102,6 +109,8 @@ static void serial_omap_stop_rxdma(struct uart_omap_port *up)
102 omap_free_dma(up->uart_dma.rx_dma_channel); 109 omap_free_dma(up->uart_dma.rx_dma_channel);
103 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE; 110 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
104 up->uart_dma.rx_dma_used = false; 111 up->uart_dma.rx_dma_used = false;
112 pm_runtime_mark_last_busy(&up->pdev->dev);
113 pm_runtime_put_autosuspend(&up->pdev->dev);
105 } 114 }
106} 115}
107 116
@@ -109,9 +118,12 @@ static void serial_omap_enable_ms(struct uart_port *port)
109{ 118{
110 struct uart_omap_port *up = (struct uart_omap_port *)port; 119 struct uart_omap_port *up = (struct uart_omap_port *)port;
111 120
112 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id); 121 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
122
123 pm_runtime_get_sync(&up->pdev->dev);
113 up->ier |= UART_IER_MSI; 124 up->ier |= UART_IER_MSI;
114 serial_out(up, UART_IER, up->ier); 125 serial_out(up, UART_IER, up->ier);
126 pm_runtime_put(&up->pdev->dev);
115} 127}
116 128
117static void serial_omap_stop_tx(struct uart_port *port) 129static void serial_omap_stop_tx(struct uart_port *port)
@@ -129,30 +141,40 @@ static void serial_omap_stop_tx(struct uart_port *port)
129 omap_stop_dma(up->uart_dma.tx_dma_channel); 141 omap_stop_dma(up->uart_dma.tx_dma_channel);
130 omap_free_dma(up->uart_dma.tx_dma_channel); 142 omap_free_dma(up->uart_dma.tx_dma_channel);
131 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE; 143 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
144 pm_runtime_mark_last_busy(&up->pdev->dev);
145 pm_runtime_put_autosuspend(&up->pdev->dev);
132 } 146 }
133 147
148 pm_runtime_get_sync(&up->pdev->dev);
134 if (up->ier & UART_IER_THRI) { 149 if (up->ier & UART_IER_THRI) {
135 up->ier &= ~UART_IER_THRI; 150 up->ier &= ~UART_IER_THRI;
136 serial_out(up, UART_IER, up->ier); 151 serial_out(up, UART_IER, up->ier);
137 } 152 }
153
154 pm_runtime_mark_last_busy(&up->pdev->dev);
155 pm_runtime_put_autosuspend(&up->pdev->dev);
138} 156}
139 157
140static void serial_omap_stop_rx(struct uart_port *port) 158static void serial_omap_stop_rx(struct uart_port *port)
141{ 159{
142 struct uart_omap_port *up = (struct uart_omap_port *)port; 160 struct uart_omap_port *up = (struct uart_omap_port *)port;
143 161
162 pm_runtime_get_sync(&up->pdev->dev);
144 if (up->use_dma) 163 if (up->use_dma)
145 serial_omap_stop_rxdma(up); 164 serial_omap_stop_rxdma(up);
146 up->ier &= ~UART_IER_RLSI; 165 up->ier &= ~UART_IER_RLSI;
147 up->port.read_status_mask &= ~UART_LSR_DR; 166 up->port.read_status_mask &= ~UART_LSR_DR;
148 serial_out(up, UART_IER, up->ier); 167 serial_out(up, UART_IER, up->ier);
168 pm_runtime_mark_last_busy(&up->pdev->dev);
169 pm_runtime_put_autosuspend(&up->pdev->dev);
149} 170}
150 171
151static inline void receive_chars(struct uart_omap_port *up, int *status) 172static inline void receive_chars(struct uart_omap_port *up,
173 unsigned int *status)
152{ 174{
153 struct tty_struct *tty = up->port.state->port.tty; 175 struct tty_struct *tty = up->port.state->port.tty;
154 unsigned int flag; 176 unsigned int flag, lsr = *status;
155 unsigned char ch, lsr = *status; 177 unsigned char ch = 0;
156 int max_count = 256; 178 int max_count = 256;
157 179
158 do { 180 do {
@@ -262,7 +284,10 @@ static void serial_omap_start_tx(struct uart_port *port)
262 int ret = 0; 284 int ret = 0;
263 285
264 if (!up->use_dma) { 286 if (!up->use_dma) {
287 pm_runtime_get_sync(&up->pdev->dev);
265 serial_omap_enable_ier_thri(up); 288 serial_omap_enable_ier_thri(up);
289 pm_runtime_mark_last_busy(&up->pdev->dev);
290 pm_runtime_put_autosuspend(&up->pdev->dev);
266 return; 291 return;
267 } 292 }
268 293
@@ -272,6 +297,7 @@ static void serial_omap_start_tx(struct uart_port *port)
272 xmit = &up->port.state->xmit; 297 xmit = &up->port.state->xmit;
273 298
274 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) { 299 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
300 pm_runtime_get_sync(&up->pdev->dev);
275 ret = omap_request_dma(up->uart_dma.uart_dma_tx, 301 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
276 "UART Tx DMA", 302 "UART Tx DMA",
277 (void *)uart_tx_dma_callback, up, 303 (void *)uart_tx_dma_callback, up,
@@ -354,9 +380,13 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
354 unsigned int iir, lsr; 380 unsigned int iir, lsr;
355 unsigned long flags; 381 unsigned long flags;
356 382
383 pm_runtime_get_sync(&up->pdev->dev);
357 iir = serial_in(up, UART_IIR); 384 iir = serial_in(up, UART_IIR);
358 if (iir & UART_IIR_NO_INT) 385 if (iir & UART_IIR_NO_INT) {
386 pm_runtime_mark_last_busy(&up->pdev->dev);
387 pm_runtime_put_autosuspend(&up->pdev->dev);
359 return IRQ_NONE; 388 return IRQ_NONE;
389 }
360 390
361 spin_lock_irqsave(&up->port.lock, flags); 391 spin_lock_irqsave(&up->port.lock, flags);
362 lsr = serial_in(up, UART_LSR); 392 lsr = serial_in(up, UART_LSR);
@@ -378,6 +408,9 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
378 transmit_chars(up); 408 transmit_chars(up);
379 409
380 spin_unlock_irqrestore(&up->port.lock, flags); 410 spin_unlock_irqrestore(&up->port.lock, flags);
411 pm_runtime_mark_last_busy(&up->pdev->dev);
412 pm_runtime_put_autosuspend(&up->pdev->dev);
413
381 up->port_activity = jiffies; 414 up->port_activity = jiffies;
382 return IRQ_HANDLED; 415 return IRQ_HANDLED;
383} 416}
@@ -388,22 +421,26 @@ static unsigned int serial_omap_tx_empty(struct uart_port *port)
388 unsigned long flags = 0; 421 unsigned long flags = 0;
389 unsigned int ret = 0; 422 unsigned int ret = 0;
390 423
391 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id); 424 pm_runtime_get_sync(&up->pdev->dev);
425 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
392 spin_lock_irqsave(&up->port.lock, flags); 426 spin_lock_irqsave(&up->port.lock, flags);
393 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 427 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
394 spin_unlock_irqrestore(&up->port.lock, flags); 428 spin_unlock_irqrestore(&up->port.lock, flags);
395 429 pm_runtime_put(&up->pdev->dev);
396 return ret; 430 return ret;
397} 431}
398 432
399static unsigned int serial_omap_get_mctrl(struct uart_port *port) 433static unsigned int serial_omap_get_mctrl(struct uart_port *port)
400{ 434{
401 struct uart_omap_port *up = (struct uart_omap_port *)port; 435 struct uart_omap_port *up = (struct uart_omap_port *)port;
402 unsigned char status; 436 unsigned int status;
403 unsigned int ret = 0; 437 unsigned int ret = 0;
404 438
439 pm_runtime_get_sync(&up->pdev->dev);
405 status = check_modem_status(up); 440 status = check_modem_status(up);
406 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id); 441 pm_runtime_put(&up->pdev->dev);
442
443 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
407 444
408 if (status & UART_MSR_DCD) 445 if (status & UART_MSR_DCD)
409 ret |= TIOCM_CAR; 446 ret |= TIOCM_CAR;
@@ -421,7 +458,7 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
421 struct uart_omap_port *up = (struct uart_omap_port *)port; 458 struct uart_omap_port *up = (struct uart_omap_port *)port;
422 unsigned char mcr = 0; 459 unsigned char mcr = 0;
423 460
424 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id); 461 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
425 if (mctrl & TIOCM_RTS) 462 if (mctrl & TIOCM_RTS)
426 mcr |= UART_MCR_RTS; 463 mcr |= UART_MCR_RTS;
427 if (mctrl & TIOCM_DTR) 464 if (mctrl & TIOCM_DTR)
@@ -433,8 +470,11 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
433 if (mctrl & TIOCM_LOOP) 470 if (mctrl & TIOCM_LOOP)
434 mcr |= UART_MCR_LOOP; 471 mcr |= UART_MCR_LOOP;
435 472
436 mcr |= up->mcr; 473 pm_runtime_get_sync(&up->pdev->dev);
437 serial_out(up, UART_MCR, mcr); 474 up->mcr = serial_in(up, UART_MCR);
475 up->mcr |= mcr;
476 serial_out(up, UART_MCR, up->mcr);
477 pm_runtime_put(&up->pdev->dev);
438} 478}
439 479
440static void serial_omap_break_ctl(struct uart_port *port, int break_state) 480static void serial_omap_break_ctl(struct uart_port *port, int break_state)
@@ -442,7 +482,8 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
442 struct uart_omap_port *up = (struct uart_omap_port *)port; 482 struct uart_omap_port *up = (struct uart_omap_port *)port;
443 unsigned long flags = 0; 483 unsigned long flags = 0;
444 484
445 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id); 485 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
486 pm_runtime_get_sync(&up->pdev->dev);
446 spin_lock_irqsave(&up->port.lock, flags); 487 spin_lock_irqsave(&up->port.lock, flags);
447 if (break_state == -1) 488 if (break_state == -1)
448 up->lcr |= UART_LCR_SBC; 489 up->lcr |= UART_LCR_SBC;
@@ -450,6 +491,7 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
450 up->lcr &= ~UART_LCR_SBC; 491 up->lcr &= ~UART_LCR_SBC;
451 serial_out(up, UART_LCR, up->lcr); 492 serial_out(up, UART_LCR, up->lcr);
452 spin_unlock_irqrestore(&up->port.lock, flags); 493 spin_unlock_irqrestore(&up->port.lock, flags);
494 pm_runtime_put(&up->pdev->dev);
453} 495}
454 496
455static int serial_omap_startup(struct uart_port *port) 497static int serial_omap_startup(struct uart_port *port)
@@ -466,8 +508,9 @@ static int serial_omap_startup(struct uart_port *port)
466 if (retval) 508 if (retval)
467 return retval; 509 return retval;
468 510
469 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id); 511 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
470 512
513 pm_runtime_get_sync(&up->pdev->dev);
471 /* 514 /*
472 * Clear the FIFO buffers and disable them. 515 * Clear the FIFO buffers and disable them.
473 * (they will be reenabled in set_termios()) 516 * (they will be reenabled in set_termios())
@@ -505,8 +548,8 @@ static int serial_omap_startup(struct uart_port *port)
505 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys), 548 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
506 0); 549 0);
507 init_timer(&(up->uart_dma.rx_timer)); 550 init_timer(&(up->uart_dma.rx_timer));
508 up->uart_dma.rx_timer.function = serial_omap_rx_timeout; 551 up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
509 up->uart_dma.rx_timer.data = up->pdev->id; 552 up->uart_dma.rx_timer.data = up->port.line;
510 /* Currently the buffer size is 4KB. Can increase it */ 553 /* Currently the buffer size is 4KB. Can increase it */
511 up->uart_dma.rx_buf = dma_alloc_coherent(NULL, 554 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
512 up->uart_dma.rx_buf_size, 555 up->uart_dma.rx_buf_size,
@@ -523,6 +566,8 @@ static int serial_omap_startup(struct uart_port *port)
523 /* Enable module level wake up */ 566 /* Enable module level wake up */
524 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 567 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
525 568
569 pm_runtime_mark_last_busy(&up->pdev->dev);
570 pm_runtime_put_autosuspend(&up->pdev->dev);
526 up->port_activity = jiffies; 571 up->port_activity = jiffies;
527 return 0; 572 return 0;
528} 573}
@@ -532,7 +577,9 @@ static void serial_omap_shutdown(struct uart_port *port)
532 struct uart_omap_port *up = (struct uart_omap_port *)port; 577 struct uart_omap_port *up = (struct uart_omap_port *)port;
533 unsigned long flags = 0; 578 unsigned long flags = 0;
534 579
535 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id); 580 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
581
582 pm_runtime_get_sync(&up->pdev->dev);
536 /* 583 /*
537 * Disable interrupts from this port 584 * Disable interrupts from this port
538 */ 585 */
@@ -566,6 +613,8 @@ static void serial_omap_shutdown(struct uart_port *port)
566 up->uart_dma.rx_buf_dma_phys); 613 up->uart_dma.rx_buf_dma_phys);
567 up->uart_dma.rx_buf = NULL; 614 up->uart_dma.rx_buf = NULL;
568 } 615 }
616
617 pm_runtime_put(&up->pdev->dev);
569 free_irq(up->port.irq, up); 618 free_irq(up->port.irq, up);
570} 619}
571 620
@@ -573,8 +622,6 @@ static inline void
573serial_omap_configure_xonxoff 622serial_omap_configure_xonxoff
574 (struct uart_omap_port *up, struct ktermios *termios) 623 (struct uart_omap_port *up, struct ktermios *termios)
575{ 624{
576 unsigned char efr = 0;
577
578 up->lcr = serial_in(up, UART_LCR); 625 up->lcr = serial_in(up, UART_LCR);
579 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 626 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
580 up->efr = serial_in(up, UART_EFR); 627 up->efr = serial_in(up, UART_EFR);
@@ -584,8 +631,7 @@ serial_omap_configure_xonxoff
584 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 631 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
585 632
586 /* clear SW control mode bits */ 633 /* clear SW control mode bits */
587 efr = up->efr; 634 up->efr &= OMAP_UART_SW_CLR;
588 efr &= OMAP_UART_SW_CLR;
589 635
590 /* 636 /*
591 * IXON Flag: 637 * IXON Flag:
@@ -593,7 +639,7 @@ serial_omap_configure_xonxoff
593 * Transmit XON1, XOFF1 639 * Transmit XON1, XOFF1
594 */ 640 */
595 if (termios->c_iflag & IXON) 641 if (termios->c_iflag & IXON)
596 efr |= OMAP_UART_SW_TX; 642 up->efr |= OMAP_UART_SW_TX;
597 643
598 /* 644 /*
599 * IXOFF Flag: 645 * IXOFF Flag:
@@ -601,7 +647,7 @@ serial_omap_configure_xonxoff
601 * Receiver compares XON1, XOFF1. 647 * Receiver compares XON1, XOFF1.
602 */ 648 */
603 if (termios->c_iflag & IXOFF) 649 if (termios->c_iflag & IXOFF)
604 efr |= OMAP_UART_SW_RX; 650 up->efr |= OMAP_UART_SW_RX;
605 651
606 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 652 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
607 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 653 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
@@ -624,13 +670,21 @@ serial_omap_configure_xonxoff
624 * load the new software flow control mode IXON or IXOFF 670 * load the new software flow control mode IXON or IXOFF
625 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. 671 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
626 */ 672 */
627 serial_out(up, UART_EFR, efr | UART_EFR_SCD); 673 serial_out(up, UART_EFR, up->efr | UART_EFR_SCD);
628 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 674 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
629 675
630 serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); 676 serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
631 serial_out(up, UART_LCR, up->lcr); 677 serial_out(up, UART_LCR, up->lcr);
632} 678}
633 679
680static void serial_omap_uart_qos_work(struct work_struct *work)
681{
682 struct uart_omap_port *up = container_of(work, struct uart_omap_port,
683 qos_work);
684
685 pm_qos_update_request(&up->pm_qos_request, up->latency);
686}
687
634static void 688static void
635serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 689serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
636 struct ktermios *old) 690 struct ktermios *old)
@@ -671,6 +725,16 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
671 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 725 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
672 quot = serial_omap_get_divisor(port, baud); 726 quot = serial_omap_get_divisor(port, baud);
673 727
728 /* calculate wakeup latency constraint */
729 up->calc_latency = (1000000 * up->port.fifosize) /
730 (1000 * baud / 8);
731 up->latency = up->calc_latency;
732 schedule_work(&up->qos_work);
733
734 up->dll = quot & 0xff;
735 up->dlh = quot >> 8;
736 up->mdr1 = UART_OMAP_MDR1_DISABLE;
737
674 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 738 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
675 UART_FCR_ENABLE_FIFO; 739 UART_FCR_ENABLE_FIFO;
676 if (up->use_dma) 740 if (up->use_dma)
@@ -680,6 +744,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
680 * Ok, we're now changing the port state. Do it with 744 * Ok, we're now changing the port state. Do it with
681 * interrupts disabled. 745 * interrupts disabled.
682 */ 746 */
747 pm_runtime_get_sync(&up->pdev->dev);
683 spin_lock_irqsave(&up->port.lock, flags); 748 spin_lock_irqsave(&up->port.lock, flags);
684 749
685 /* 750 /*
@@ -723,6 +788,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
723 up->ier |= UART_IER_MSI; 788 up->ier |= UART_IER_MSI;
724 serial_out(up, UART_IER, up->ier); 789 serial_out(up, UART_IER, up->ier);
725 serial_out(up, UART_LCR, cval); /* reset DLAB */ 790 serial_out(up, UART_LCR, cval); /* reset DLAB */
791 up->lcr = cval;
792 up->scr = OMAP_UART_SCR_TX_EMPTY;
726 793
727 /* FIFOs and DMA Settings */ 794 /* FIFOs and DMA Settings */
728 795
@@ -749,17 +816,22 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
749 816
750 if (up->use_dma) { 817 if (up->use_dma) {
751 serial_out(up, UART_TI752_TLR, 0); 818 serial_out(up, UART_TI752_TLR, 0);
752 serial_out(up, UART_OMAP_SCR, 819 up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8);
753 (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8));
754 } 820 }
755 821
822 serial_out(up, UART_OMAP_SCR, up->scr);
823
756 serial_out(up, UART_EFR, up->efr); 824 serial_out(up, UART_EFR, up->efr);
757 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 825 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
758 serial_out(up, UART_MCR, up->mcr); 826 serial_out(up, UART_MCR, up->mcr);
759 827
760 /* Protocol, Baud Rate, and Interrupt Settings */ 828 /* Protocol, Baud Rate, and Interrupt Settings */
761 829
762 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 830 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
831 serial_omap_mdr1_errataset(up, up->mdr1);
832 else
833 serial_out(up, UART_OMAP_MDR1, up->mdr1);
834
763 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 835 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
764 836
765 up->efr = serial_in(up, UART_EFR); 837 up->efr = serial_in(up, UART_EFR);
@@ -769,8 +841,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
769 serial_out(up, UART_IER, 0); 841 serial_out(up, UART_IER, 0);
770 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 842 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
771 843
772 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 844 serial_out(up, UART_DLL, up->dll); /* LS of divisor */
773 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 845 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
774 846
775 serial_out(up, UART_LCR, 0); 847 serial_out(up, UART_LCR, 0);
776 serial_out(up, UART_IER, up->ier); 848 serial_out(up, UART_IER, up->ier);
@@ -780,9 +852,14 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
780 serial_out(up, UART_LCR, cval); 852 serial_out(up, UART_LCR, cval);
781 853
782 if (baud > 230400 && baud != 3000000) 854 if (baud > 230400 && baud != 3000000)
783 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE); 855 up->mdr1 = UART_OMAP_MDR1_13X_MODE;
784 else 856 else
785 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); 857 up->mdr1 = UART_OMAP_MDR1_16X_MODE;
858
859 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
860 serial_omap_mdr1_errataset(up, up->mdr1);
861 else
862 serial_out(up, UART_OMAP_MDR1, up->mdr1);
786 863
787 /* Hardware Flow Control Configuration */ 864 /* Hardware Flow Control Configuration */
788 865
@@ -809,7 +886,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
809 serial_omap_configure_xonxoff(up, termios); 886 serial_omap_configure_xonxoff(up, termios);
810 887
811 spin_unlock_irqrestore(&up->port.lock, flags); 888 spin_unlock_irqrestore(&up->port.lock, flags);
812 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id); 889 pm_runtime_put(&up->pdev->dev);
890 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
813} 891}
814 892
815static void 893static void
@@ -819,7 +897,9 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
819 struct uart_omap_port *up = (struct uart_omap_port *)port; 897 struct uart_omap_port *up = (struct uart_omap_port *)port;
820 unsigned char efr; 898 unsigned char efr;
821 899
822 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id); 900 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
901
902 pm_runtime_get_sync(&up->pdev->dev);
823 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 903 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
824 efr = serial_in(up, UART_EFR); 904 efr = serial_in(up, UART_EFR);
825 serial_out(up, UART_EFR, efr | UART_EFR_ECB); 905 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
@@ -829,6 +909,15 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
829 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 909 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
830 serial_out(up, UART_EFR, efr); 910 serial_out(up, UART_EFR, efr);
831 serial_out(up, UART_LCR, 0); 911 serial_out(up, UART_LCR, 0);
912
913 if (!device_may_wakeup(&up->pdev->dev)) {
914 if (!state)
915 pm_runtime_forbid(&up->pdev->dev);
916 else
917 pm_runtime_allow(&up->pdev->dev);
918 }
919
920 pm_runtime_put(&up->pdev->dev);
832} 921}
833 922
834static void serial_omap_release_port(struct uart_port *port) 923static void serial_omap_release_port(struct uart_port *port)
@@ -847,7 +936,7 @@ static void serial_omap_config_port(struct uart_port *port, int flags)
847 struct uart_omap_port *up = (struct uart_omap_port *)port; 936 struct uart_omap_port *up = (struct uart_omap_port *)port;
848 937
849 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 938 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
850 up->pdev->id); 939 up->port.line);
851 up->port.type = PORT_OMAP; 940 up->port.type = PORT_OMAP;
852} 941}
853 942
@@ -864,7 +953,7 @@ serial_omap_type(struct uart_port *port)
864{ 953{
865 struct uart_omap_port *up = (struct uart_omap_port *)port; 954 struct uart_omap_port *up = (struct uart_omap_port *)port;
866 955
867 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id); 956 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
868 return up->name; 957 return up->name;
869} 958}
870 959
@@ -906,19 +995,26 @@ static inline void wait_for_xmitr(struct uart_omap_port *up)
906static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 995static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
907{ 996{
908 struct uart_omap_port *up = (struct uart_omap_port *)port; 997 struct uart_omap_port *up = (struct uart_omap_port *)port;
998
999 pm_runtime_get_sync(&up->pdev->dev);
909 wait_for_xmitr(up); 1000 wait_for_xmitr(up);
910 serial_out(up, UART_TX, ch); 1001 serial_out(up, UART_TX, ch);
1002 pm_runtime_put(&up->pdev->dev);
911} 1003}
912 1004
913static int serial_omap_poll_get_char(struct uart_port *port) 1005static int serial_omap_poll_get_char(struct uart_port *port)
914{ 1006{
915 struct uart_omap_port *up = (struct uart_omap_port *)port; 1007 struct uart_omap_port *up = (struct uart_omap_port *)port;
916 unsigned int status = serial_in(up, UART_LSR); 1008 unsigned int status;
917 1009
1010 pm_runtime_get_sync(&up->pdev->dev);
1011 status = serial_in(up, UART_LSR);
918 if (!(status & UART_LSR_DR)) 1012 if (!(status & UART_LSR_DR))
919 return NO_POLL_CHAR; 1013 return NO_POLL_CHAR;
920 1014
921 return serial_in(up, UART_RX); 1015 status = serial_in(up, UART_RX);
1016 pm_runtime_put(&up->pdev->dev);
1017 return status;
922} 1018}
923 1019
924#endif /* CONFIG_CONSOLE_POLL */ 1020#endif /* CONFIG_CONSOLE_POLL */
@@ -946,6 +1042,8 @@ serial_omap_console_write(struct console *co, const char *s,
946 unsigned int ier; 1042 unsigned int ier;
947 int locked = 1; 1043 int locked = 1;
948 1044
1045 pm_runtime_get_sync(&up->pdev->dev);
1046
949 local_irq_save(flags); 1047 local_irq_save(flags);
950 if (up->port.sysrq) 1048 if (up->port.sysrq)
951 locked = 0; 1049 locked = 0;
@@ -978,6 +1076,8 @@ serial_omap_console_write(struct console *co, const char *s,
978 if (up->msr_saved_flags) 1076 if (up->msr_saved_flags)
979 check_modem_status(up); 1077 check_modem_status(up);
980 1078
1079 pm_runtime_mark_last_busy(&up->pdev->dev);
1080 pm_runtime_put_autosuspend(&up->pdev->dev);
981 if (locked) 1081 if (locked)
982 spin_unlock(&up->port.lock); 1082 spin_unlock(&up->port.lock);
983 local_irq_restore(flags); 1083 local_irq_restore(flags);
@@ -1014,7 +1114,7 @@ static struct console serial_omap_console = {
1014 1114
1015static void serial_omap_add_console_port(struct uart_omap_port *up) 1115static void serial_omap_add_console_port(struct uart_omap_port *up)
1016{ 1116{
1017 serial_omap_console_ports[up->pdev->id] = up; 1117 serial_omap_console_ports[up->port.line] = up;
1018} 1118}
1019 1119
1020#define OMAP_CONSOLE (&serial_omap_console) 1120#define OMAP_CONSOLE (&serial_omap_console)
@@ -1060,26 +1160,30 @@ static struct uart_driver serial_omap_reg = {
1060 .cons = OMAP_CONSOLE, 1160 .cons = OMAP_CONSOLE,
1061}; 1161};
1062 1162
1063static int 1163#ifdef CONFIG_SUSPEND
1064serial_omap_suspend(struct platform_device *pdev, pm_message_t state) 1164static int serial_omap_suspend(struct device *dev)
1065{ 1165{
1066 struct uart_omap_port *up = platform_get_drvdata(pdev); 1166 struct uart_omap_port *up = dev_get_drvdata(dev);
1067 1167
1068 if (up) 1168 if (up) {
1069 uart_suspend_port(&serial_omap_reg, &up->port); 1169 uart_suspend_port(&serial_omap_reg, &up->port);
1170 flush_work_sync(&up->qos_work);
1171 }
1172
1070 return 0; 1173 return 0;
1071} 1174}
1072 1175
1073static int serial_omap_resume(struct platform_device *dev) 1176static int serial_omap_resume(struct device *dev)
1074{ 1177{
1075 struct uart_omap_port *up = platform_get_drvdata(dev); 1178 struct uart_omap_port *up = dev_get_drvdata(dev);
1076 1179
1077 if (up) 1180 if (up)
1078 uart_resume_port(&serial_omap_reg, &up->port); 1181 uart_resume_port(&serial_omap_reg, &up->port);
1079 return 0; 1182 return 0;
1080} 1183}
1184#endif
1081 1185
1082static void serial_omap_rx_timeout(unsigned long uart_no) 1186static void serial_omap_rxdma_poll(unsigned long uart_no)
1083{ 1187{
1084 struct uart_omap_port *up = ui[uart_no]; 1188 struct uart_omap_port *up = ui[uart_no];
1085 unsigned int curr_dma_pos, curr_transmitted_size; 1189 unsigned int curr_dma_pos, curr_transmitted_size;
@@ -1089,9 +1193,9 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
1089 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) || 1193 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1090 (curr_dma_pos == 0)) { 1194 (curr_dma_pos == 0)) {
1091 if (jiffies_to_msecs(jiffies - up->port_activity) < 1195 if (jiffies_to_msecs(jiffies - up->port_activity) <
1092 RX_TIMEOUT) { 1196 up->uart_dma.rx_timeout) {
1093 mod_timer(&up->uart_dma.rx_timer, jiffies + 1197 mod_timer(&up->uart_dma.rx_timer, jiffies +
1094 usecs_to_jiffies(up->uart_dma.rx_timeout)); 1198 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1095 } else { 1199 } else {
1096 serial_omap_stop_rxdma(up); 1200 serial_omap_stop_rxdma(up);
1097 up->ier |= (UART_IER_RDI | UART_IER_RLSI); 1201 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
@@ -1120,7 +1224,7 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
1120 } 1224 }
1121 } else { 1225 } else {
1122 mod_timer(&up->uart_dma.rx_timer, jiffies + 1226 mod_timer(&up->uart_dma.rx_timer, jiffies +
1123 usecs_to_jiffies(up->uart_dma.rx_timeout)); 1227 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1124 } 1228 }
1125 up->port_activity = jiffies; 1229 up->port_activity = jiffies;
1126} 1230}
@@ -1135,6 +1239,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
1135 int ret = 0; 1239 int ret = 0;
1136 1240
1137 if (up->uart_dma.rx_dma_channel == -1) { 1241 if (up->uart_dma.rx_dma_channel == -1) {
1242 pm_runtime_get_sync(&up->pdev->dev);
1138 ret = omap_request_dma(up->uart_dma.uart_dma_rx, 1243 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1139 "UART Rx DMA", 1244 "UART Rx DMA",
1140 (void *)uart_rx_dma_callback, up, 1245 (void *)uart_rx_dma_callback, up,
@@ -1158,7 +1263,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
1158 /* FIXME: Cache maintenance needed here? */ 1263 /* FIXME: Cache maintenance needed here? */
1159 omap_start_dma(up->uart_dma.rx_dma_channel); 1264 omap_start_dma(up->uart_dma.rx_dma_channel);
1160 mod_timer(&up->uart_dma.rx_timer, jiffies + 1265 mod_timer(&up->uart_dma.rx_timer, jiffies +
1161 usecs_to_jiffies(up->uart_dma.rx_timeout)); 1266 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1162 up->uart_dma.rx_dma_used = true; 1267 up->uart_dma.rx_dma_used = true;
1163 return ret; 1268 return ret;
1164} 1269}
@@ -1221,6 +1326,19 @@ static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1221 return; 1326 return;
1222} 1327}
1223 1328
1329static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1330{
1331 struct omap_uart_port_info *omap_up_info;
1332
1333 omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL);
1334 if (!omap_up_info)
1335 return NULL; /* out of memory */
1336
1337 of_property_read_u32(dev->of_node, "clock-frequency",
1338 &omap_up_info->uartclk);
1339 return omap_up_info;
1340}
1341
1224static int serial_omap_probe(struct platform_device *pdev) 1342static int serial_omap_probe(struct platform_device *pdev)
1225{ 1343{
1226 struct uart_omap_port *up; 1344 struct uart_omap_port *up;
@@ -1228,6 +1346,9 @@ static int serial_omap_probe(struct platform_device *pdev)
1228 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 1346 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1229 int ret = -ENOSPC; 1347 int ret = -ENOSPC;
1230 1348
1349 if (pdev->dev.of_node)
1350 omap_up_info = of_get_uart_port_info(&pdev->dev);
1351
1231 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1352 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1232 if (!mem) { 1353 if (!mem) {
1233 dev_err(&pdev->dev, "no mem resource?\n"); 1354 dev_err(&pdev->dev, "no mem resource?\n");
@@ -1263,7 +1384,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1263 ret = -ENOMEM; 1384 ret = -ENOMEM;
1264 goto do_release_region; 1385 goto do_release_region;
1265 } 1386 }
1266 sprintf(up->name, "OMAP UART%d", pdev->id);
1267 up->pdev = pdev; 1387 up->pdev = pdev;
1268 up->port.dev = &pdev->dev; 1388 up->port.dev = &pdev->dev;
1269 up->port.type = PORT_OMAP; 1389 up->port.type = PORT_OMAP;
@@ -1273,34 +1393,74 @@ static int serial_omap_probe(struct platform_device *pdev)
1273 up->port.regshift = 2; 1393 up->port.regshift = 2;
1274 up->port.fifosize = 64; 1394 up->port.fifosize = 64;
1275 up->port.ops = &serial_omap_pops; 1395 up->port.ops = &serial_omap_pops;
1276 up->port.line = pdev->id;
1277 1396
1278 up->port.membase = omap_up_info->membase; 1397 if (pdev->dev.of_node)
1279 up->port.mapbase = omap_up_info->mapbase; 1398 up->port.line = of_alias_get_id(pdev->dev.of_node, "serial");
1399 else
1400 up->port.line = pdev->id;
1401
1402 if (up->port.line < 0) {
1403 dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n",
1404 up->port.line);
1405 ret = -ENODEV;
1406 goto err;
1407 }
1408
1409 sprintf(up->name, "OMAP UART%d", up->port.line);
1410 up->port.mapbase = mem->start;
1411 up->port.membase = ioremap(mem->start, resource_size(mem));
1412 if (!up->port.membase) {
1413 dev_err(&pdev->dev, "can't ioremap UART\n");
1414 ret = -ENOMEM;
1415 goto err;
1416 }
1417
1280 up->port.flags = omap_up_info->flags; 1418 up->port.flags = omap_up_info->flags;
1281 up->port.irqflags = omap_up_info->irqflags;
1282 up->port.uartclk = omap_up_info->uartclk; 1419 up->port.uartclk = omap_up_info->uartclk;
1420 if (!up->port.uartclk) {
1421 up->port.uartclk = DEFAULT_CLK_SPEED;
1422 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1423 "%d\n", DEFAULT_CLK_SPEED);
1424 }
1283 up->uart_dma.uart_base = mem->start; 1425 up->uart_dma.uart_base = mem->start;
1426 up->errata = omap_up_info->errata;
1284 1427
1285 if (omap_up_info->dma_enabled) { 1428 if (omap_up_info->dma_enabled) {
1286 up->uart_dma.uart_dma_tx = dma_tx->start; 1429 up->uart_dma.uart_dma_tx = dma_tx->start;
1287 up->uart_dma.uart_dma_rx = dma_rx->start; 1430 up->uart_dma.uart_dma_rx = dma_rx->start;
1288 up->use_dma = 1; 1431 up->use_dma = 1;
1289 up->uart_dma.rx_buf_size = 4096; 1432 up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
1290 up->uart_dma.rx_timeout = 2; 1433 up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
1434 up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
1291 spin_lock_init(&(up->uart_dma.tx_lock)); 1435 spin_lock_init(&(up->uart_dma.tx_lock));
1292 spin_lock_init(&(up->uart_dma.rx_lock)); 1436 spin_lock_init(&(up->uart_dma.rx_lock));
1293 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE; 1437 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1294 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE; 1438 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1295 } 1439 }
1296 1440
1297 ui[pdev->id] = up; 1441 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1442 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1443 pm_qos_add_request(&up->pm_qos_request,
1444 PM_QOS_CPU_DMA_LATENCY, up->latency);
1445 serial_omap_uart_wq = create_singlethread_workqueue(up->name);
1446 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
1447
1448 pm_runtime_use_autosuspend(&pdev->dev);
1449 pm_runtime_set_autosuspend_delay(&pdev->dev,
1450 omap_up_info->autosuspend_timeout);
1451
1452 pm_runtime_irq_safe(&pdev->dev);
1453 pm_runtime_enable(&pdev->dev);
1454 pm_runtime_get_sync(&pdev->dev);
1455
1456 ui[up->port.line] = up;
1298 serial_omap_add_console_port(up); 1457 serial_omap_add_console_port(up);
1299 1458
1300 ret = uart_add_one_port(&serial_omap_reg, &up->port); 1459 ret = uart_add_one_port(&serial_omap_reg, &up->port);
1301 if (ret != 0) 1460 if (ret != 0)
1302 goto do_release_region; 1461 goto do_release_region;
1303 1462
1463 pm_runtime_put(&pdev->dev);
1304 platform_set_drvdata(pdev, up); 1464 platform_set_drvdata(pdev, up);
1305 return 0; 1465 return 0;
1306err: 1466err:
@@ -1315,22 +1475,168 @@ static int serial_omap_remove(struct platform_device *dev)
1315{ 1475{
1316 struct uart_omap_port *up = platform_get_drvdata(dev); 1476 struct uart_omap_port *up = platform_get_drvdata(dev);
1317 1477
1318 platform_set_drvdata(dev, NULL);
1319 if (up) { 1478 if (up) {
1479 pm_runtime_disable(&up->pdev->dev);
1320 uart_remove_one_port(&serial_omap_reg, &up->port); 1480 uart_remove_one_port(&serial_omap_reg, &up->port);
1481 pm_qos_remove_request(&up->pm_qos_request);
1482
1321 kfree(up); 1483 kfree(up);
1322 } 1484 }
1485
1486 platform_set_drvdata(dev, NULL);
1323 return 0; 1487 return 0;
1324} 1488}
1325 1489
1490/*
1491 * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
1492 * The access to uart register after MDR1 Access
1493 * causes UART to corrupt data.
1494 *
1495 * Need a delay =
1496 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
1497 * give 10 times as much
1498 */
1499static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
1500{
1501 u8 timeout = 255;
1502
1503 serial_out(up, UART_OMAP_MDR1, mdr1);
1504 udelay(2);
1505 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
1506 UART_FCR_CLEAR_RCVR);
1507 /*
1508 * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
1509 * TX_FIFO_E bit is 1.
1510 */
1511 while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
1512 (UART_LSR_THRE | UART_LSR_DR))) {
1513 timeout--;
1514 if (!timeout) {
1515 /* Should *never* happen. we warn and carry on */
1516 dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n",
1517 serial_in(up, UART_LSR));
1518 break;
1519 }
1520 udelay(1);
1521 }
1522}
1523
1524static void serial_omap_restore_context(struct uart_omap_port *up)
1525{
1526 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1527 serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE);
1528 else
1529 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
1530
1531 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1532 serial_out(up, UART_EFR, UART_EFR_ECB);
1533 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1534 serial_out(up, UART_IER, 0x0);
1535 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1536 serial_out(up, UART_DLL, up->dll);
1537 serial_out(up, UART_DLM, up->dlh);
1538 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1539 serial_out(up, UART_IER, up->ier);
1540 serial_out(up, UART_FCR, up->fcr);
1541 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1542 serial_out(up, UART_MCR, up->mcr);
1543 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1544 serial_out(up, UART_OMAP_SCR, up->scr);
1545 serial_out(up, UART_EFR, up->efr);
1546 serial_out(up, UART_LCR, up->lcr);
1547 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1548 serial_omap_mdr1_errataset(up, up->mdr1);
1549 else
1550 serial_out(up, UART_OMAP_MDR1, up->mdr1);
1551}
1552
1553#ifdef CONFIG_PM_RUNTIME
1554static int serial_omap_runtime_suspend(struct device *dev)
1555{
1556 struct uart_omap_port *up = dev_get_drvdata(dev);
1557 struct omap_uart_port_info *pdata = dev->platform_data;
1558
1559 if (!up)
1560 return -EINVAL;
1561
1562 if (!pdata || !pdata->enable_wakeup)
1563 return 0;
1564
1565 if (pdata->get_context_loss_count)
1566 up->context_loss_cnt = pdata->get_context_loss_count(dev);
1567
1568 if (device_may_wakeup(dev)) {
1569 if (!up->wakeups_enabled) {
1570 pdata->enable_wakeup(up->pdev, true);
1571 up->wakeups_enabled = true;
1572 }
1573 } else {
1574 if (up->wakeups_enabled) {
1575 pdata->enable_wakeup(up->pdev, false);
1576 up->wakeups_enabled = false;
1577 }
1578 }
1579
1580 /* Errata i291 */
1581 if (up->use_dma && pdata->set_forceidle &&
1582 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1583 pdata->set_forceidle(up->pdev);
1584
1585 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1586 schedule_work(&up->qos_work);
1587
1588 return 0;
1589}
1590
1591static int serial_omap_runtime_resume(struct device *dev)
1592{
1593 struct uart_omap_port *up = dev_get_drvdata(dev);
1594 struct omap_uart_port_info *pdata = dev->platform_data;
1595
1596 if (up) {
1597 if (pdata->get_context_loss_count) {
1598 u32 loss_cnt = pdata->get_context_loss_count(dev);
1599
1600 if (up->context_loss_cnt != loss_cnt)
1601 serial_omap_restore_context(up);
1602 }
1603
1604 /* Errata i291 */
1605 if (up->use_dma && pdata->set_noidle &&
1606 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1607 pdata->set_noidle(up->pdev);
1608
1609 up->latency = up->calc_latency;
1610 schedule_work(&up->qos_work);
1611 }
1612
1613 return 0;
1614}
1615#endif
1616
1617static const struct dev_pm_ops serial_omap_dev_pm_ops = {
1618 SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume)
1619 SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend,
1620 serial_omap_runtime_resume, NULL)
1621};
1622
1623#if defined(CONFIG_OF)
1624static const struct of_device_id omap_serial_of_match[] = {
1625 { .compatible = "ti,omap2-uart" },
1626 { .compatible = "ti,omap3-uart" },
1627 { .compatible = "ti,omap4-uart" },
1628 {},
1629};
1630MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1631#endif
1632
1326static struct platform_driver serial_omap_driver = { 1633static struct platform_driver serial_omap_driver = {
1327 .probe = serial_omap_probe, 1634 .probe = serial_omap_probe,
1328 .remove = serial_omap_remove, 1635 .remove = serial_omap_remove,
1329
1330 .suspend = serial_omap_suspend,
1331 .resume = serial_omap_resume,
1332 .driver = { 1636 .driver = {
1333 .name = DRIVER_NAME, 1637 .name = DRIVER_NAME,
1638 .pm = &serial_omap_dev_pm_ops,
1639 .of_match_table = of_match_ptr(omap_serial_of_match),
1334 }, 1640 },
1335}; 1641};
1336 1642
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index d6aba8c087e4..de0f613ed6f5 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -25,6 +25,9 @@
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/dmi.h> 27#include <linux/dmi.h>
28#include <linux/console.h>
29#include <linux/nmi.h>
30#include <linux/delay.h>
28 31
29#include <linux/dmaengine.h> 32#include <linux/dmaengine.h>
30#include <linux/pch_dma.h> 33#include <linux/pch_dma.h>
@@ -198,6 +201,10 @@ enum {
198 201
199#define PCI_VENDOR_ID_ROHM 0x10DB 202#define PCI_VENDOR_ID_ROHM 0x10DB
200 203
204#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
205
206#define DEFAULT_BAUD_RATE 1843200 /* 1.8432MHz */
207
201struct pch_uart_buffer { 208struct pch_uart_buffer {
202 unsigned char *buf; 209 unsigned char *buf;
203 int size; 210 int size;
@@ -276,6 +283,9 @@ static struct pch_uart_driver_data drv_dat[] = {
276 [pch_ml7831_uart1] = {PCH_UART_2LINE, 1}, 283 [pch_ml7831_uart1] = {PCH_UART_2LINE, 1},
277}; 284};
278 285
286#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
287static struct eg20t_port *pch_uart_ports[PCH_UART_NR];
288#endif
279static unsigned int default_baud = 9600; 289static unsigned int default_baud = 9600;
280static const int trigger_level_256[4] = { 1, 64, 128, 224 }; 290static const int trigger_level_256[4] = { 1, 64, 128, 224 };
281static const int trigger_level_64[4] = { 1, 16, 32, 56 }; 291static const int trigger_level_64[4] = { 1, 16, 32, 56 };
@@ -1385,6 +1395,143 @@ static struct uart_ops pch_uart_ops = {
1385 .verify_port = pch_uart_verify_port 1395 .verify_port = pch_uart_verify_port
1386}; 1396};
1387 1397
1398#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
1399
1400/*
1401 * Wait for transmitter & holding register to empty
1402 */
1403static void wait_for_xmitr(struct eg20t_port *up, int bits)
1404{
1405 unsigned int status, tmout = 10000;
1406
1407 /* Wait up to 10ms for the character(s) to be sent. */
1408 for (;;) {
1409 status = ioread8(up->membase + UART_LSR);
1410
1411 if ((status & bits) == bits)
1412 break;
1413 if (--tmout == 0)
1414 break;
1415 udelay(1);
1416 }
1417
1418 /* Wait up to 1s for flow control if necessary */
1419 if (up->port.flags & UPF_CONS_FLOW) {
1420 unsigned int tmout;
1421 for (tmout = 1000000; tmout; tmout--) {
1422 unsigned int msr = ioread8(up->membase + UART_MSR);
1423 if (msr & UART_MSR_CTS)
1424 break;
1425 udelay(1);
1426 touch_nmi_watchdog();
1427 }
1428 }
1429}
1430
1431static void pch_console_putchar(struct uart_port *port, int ch)
1432{
1433 struct eg20t_port *priv =
1434 container_of(port, struct eg20t_port, port);
1435
1436 wait_for_xmitr(priv, UART_LSR_THRE);
1437 iowrite8(ch, priv->membase + PCH_UART_THR);
1438}
1439
1440/*
1441 * Print a string to the serial port trying not to disturb
1442 * any possible real use of the port...
1443 *
1444 * The console_lock must be held when we get here.
1445 */
1446static void
1447pch_console_write(struct console *co, const char *s, unsigned int count)
1448{
1449 struct eg20t_port *priv;
1450
1451 unsigned long flags;
1452 u8 ier;
1453 int locked = 1;
1454
1455 priv = pch_uart_ports[co->index];
1456
1457 touch_nmi_watchdog();
1458
1459 local_irq_save(flags);
1460 if (priv->port.sysrq) {
1461 /* serial8250_handle_port() already took the lock */
1462 locked = 0;
1463 } else if (oops_in_progress) {
1464 locked = spin_trylock(&priv->port.lock);
1465 } else
1466 spin_lock(&priv->port.lock);
1467
1468 /*
1469 * First save the IER then disable the interrupts
1470 */
1471 ier = ioread8(priv->membase + UART_IER);
1472
1473 pch_uart_hal_disable_interrupt(priv, PCH_UART_HAL_ALL_INT);
1474
1475 uart_console_write(&priv->port, s, count, pch_console_putchar);
1476
1477 /*
1478 * Finally, wait for transmitter to become empty
1479 * and restore the IER
1480 */
1481 wait_for_xmitr(priv, BOTH_EMPTY);
1482 iowrite8(ier, priv->membase + UART_IER);
1483
1484 if (locked)
1485 spin_unlock(&priv->port.lock);
1486 local_irq_restore(flags);
1487}
1488
1489static int __init pch_console_setup(struct console *co, char *options)
1490{
1491 struct uart_port *port;
1492 int baud = 9600;
1493 int bits = 8;
1494 int parity = 'n';
1495 int flow = 'n';
1496
1497 /*
1498 * Check whether an invalid uart number has been specified, and
1499 * if so, search for the first available port that does have
1500 * console support.
1501 */
1502 if (co->index >= PCH_UART_NR)
1503 co->index = 0;
1504 port = &pch_uart_ports[co->index]->port;
1505
1506 if (!port || (!port->iobase && !port->membase))
1507 return -ENODEV;
1508
1509 /* setup uartclock */
1510 port->uartclk = DEFAULT_BAUD_RATE;
1511
1512 if (options)
1513 uart_parse_options(options, &baud, &parity, &bits, &flow);
1514
1515 return uart_set_options(port, co, baud, parity, bits, flow);
1516}
1517
1518static struct uart_driver pch_uart_driver;
1519
1520static struct console pch_console = {
1521 .name = PCH_UART_DRIVER_DEVICE,
1522 .write = pch_console_write,
1523 .device = uart_console_device,
1524 .setup = pch_console_setup,
1525 .flags = CON_PRINTBUFFER | CON_ANYTIME,
1526 .index = -1,
1527 .data = &pch_uart_driver,
1528};
1529
1530#define PCH_CONSOLE (&pch_console)
1531#else
1532#define PCH_CONSOLE NULL
1533#endif
1534
1388static struct uart_driver pch_uart_driver = { 1535static struct uart_driver pch_uart_driver = {
1389 .owner = THIS_MODULE, 1536 .owner = THIS_MODULE,
1390 .driver_name = KBUILD_MODNAME, 1537 .driver_name = KBUILD_MODNAME,
@@ -1392,6 +1539,7 @@ static struct uart_driver pch_uart_driver = {
1392 .major = 0, 1539 .major = 0,
1393 .minor = 0, 1540 .minor = 0,
1394 .nr = PCH_UART_NR, 1541 .nr = PCH_UART_NR,
1542 .cons = PCH_CONSOLE,
1395}; 1543};
1396 1544
1397static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, 1545static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
@@ -1418,7 +1566,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1418 if (!rxbuf) 1566 if (!rxbuf)
1419 goto init_port_free_txbuf; 1567 goto init_port_free_txbuf;
1420 1568
1421 base_baud = 1843200; /* 1.8432MHz */ 1569 base_baud = DEFAULT_BAUD_RATE;
1422 1570
1423 /* quirk for CM-iTC board */ 1571 /* quirk for CM-iTC board */
1424 board_name = dmi_get_system_info(DMI_BOARD_NAME); 1572 board_name = dmi_get_system_info(DMI_BOARD_NAME);
@@ -1468,6 +1616,9 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1468 pci_set_drvdata(pdev, priv); 1616 pci_set_drvdata(pdev, priv);
1469 pch_uart_hal_request(pdev, fifosize, base_baud); 1617 pch_uart_hal_request(pdev, fifosize, base_baud);
1470 1618
1619#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
1620 pch_uart_ports[board->line_no] = priv;
1621#endif
1471 ret = uart_add_one_port(&pch_uart_driver, &priv->port); 1622 ret = uart_add_one_port(&pch_uart_driver, &priv->port);
1472 if (ret < 0) 1623 if (ret < 0)
1473 goto init_port_hal_free; 1624 goto init_port_hal_free;
@@ -1475,6 +1626,9 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1475 return priv; 1626 return priv;
1476 1627
1477init_port_hal_free: 1628init_port_hal_free:
1629#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
1630 pch_uart_ports[board->line_no] = NULL;
1631#endif
1478 free_page((unsigned long)rxbuf); 1632 free_page((unsigned long)rxbuf);
1479init_port_free_txbuf: 1633init_port_free_txbuf:
1480 kfree(priv); 1634 kfree(priv);
@@ -1497,6 +1651,10 @@ static void pch_uart_pci_remove(struct pci_dev *pdev)
1497 priv = (struct eg20t_port *)pci_get_drvdata(pdev); 1651 priv = (struct eg20t_port *)pci_get_drvdata(pdev);
1498 1652
1499 pci_disable_msi(pdev); 1653 pci_disable_msi(pdev);
1654
1655#ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
1656 pch_uart_ports[priv->port.line] = NULL;
1657#endif
1500 pch_uart_exit_port(priv); 1658 pch_uart_exit_port(priv);
1501 pci_disable_device(pdev); 1659 pci_disable_device(pdev);
1502 kfree(priv); 1660 kfree(priv);
diff --git a/drivers/tty/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c
deleted file mode 100644
index b1d7e7c1849d..000000000000
--- a/drivers/tty/serial/s3c2410.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * Driver for Samsung S3C2410 SoC onboard UARTs.
3 *
4 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/module.h>
13#include <linux/ioport.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19
20#include <asm/irq.h>
21#include <mach/hardware.h>
22
23#include <plat/regs-serial.h>
24#include <mach/regs-gpio.h>
25
26#include "samsung.h"
27
28static int s3c2410_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 if (strcmp(clk->name, "uclk") == 0)
34 ucon |= S3C2410_UCON_UCLK;
35 else
36 ucon &= ~S3C2410_UCON_UCLK;
37
38 wr_regl(port, S3C2410_UCON, ucon);
39 return 0;
40}
41
42static int s3c2410_serial_getsource(struct uart_port *port,
43 struct s3c24xx_uart_clksrc *clk)
44{
45 unsigned long ucon = rd_regl(port, S3C2410_UCON);
46
47 clk->divisor = 1;
48 clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk";
49
50 return 0;
51}
52
53static int s3c2410_serial_resetport(struct uart_port *port,
54 struct s3c2410_uartcfg *cfg)
55{
56 dbg("s3c2410_serial_resetport: port=%p (%08lx), cfg=%p\n",
57 port, port->mapbase, cfg);
58
59 wr_regl(port, S3C2410_UCON, cfg->ucon);
60 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
61
62 /* reset both fifos */
63
64 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
65 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
66
67 return 0;
68}
69
70static struct s3c24xx_uart_info s3c2410_uart_inf = {
71 .name = "Samsung S3C2410 UART",
72 .type = PORT_S3C2410,
73 .fifosize = 16,
74 .rx_fifomask = S3C2410_UFSTAT_RXMASK,
75 .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
76 .rx_fifofull = S3C2410_UFSTAT_RXFULL,
77 .tx_fifofull = S3C2410_UFSTAT_TXFULL,
78 .tx_fifomask = S3C2410_UFSTAT_TXMASK,
79 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
80 .get_clksrc = s3c2410_serial_getsource,
81 .set_clksrc = s3c2410_serial_setsource,
82 .reset_port = s3c2410_serial_resetport,
83};
84
85static int s3c2410_serial_probe(struct platform_device *dev)
86{
87 return s3c24xx_serial_probe(dev, &s3c2410_uart_inf);
88}
89
90static struct platform_driver s3c2410_serial_driver = {
91 .probe = s3c2410_serial_probe,
92 .remove = __devexit_p(s3c24xx_serial_remove),
93 .driver = {
94 .name = "s3c2410-uart",
95 .owner = THIS_MODULE,
96 },
97};
98
99static int __init s3c2410_serial_init(void)
100{
101 return s3c24xx_serial_init(&s3c2410_serial_driver, &s3c2410_uart_inf);
102}
103
104static void __exit s3c2410_serial_exit(void)
105{
106 platform_driver_unregister(&s3c2410_serial_driver);
107}
108
109module_init(s3c2410_serial_init);
110module_exit(s3c2410_serial_exit);
111
112MODULE_LICENSE("GPL v2");
113MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
114MODULE_DESCRIPTION("Samsung S3C2410 SoC Serial port driver");
115MODULE_ALIAS("platform:s3c2410-uart");
diff --git a/drivers/tty/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c
deleted file mode 100644
index 2234bf9ced45..000000000000
--- a/drivers/tty/serial/s3c2412.c
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs.
3 *
4 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/module.h>
13#include <linux/ioport.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19
20#include <asm/irq.h>
21#include <mach/hardware.h>
22
23#include <plat/regs-serial.h>
24#include <mach/regs-gpio.h>
25
26#include "samsung.h"
27
28static int s3c2412_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 ucon &= ~S3C2412_UCON_CLKMASK;
34
35 if (strcmp(clk->name, "uclk") == 0)
36 ucon |= S3C2440_UCON_UCLK;
37 else if (strcmp(clk->name, "pclk") == 0)
38 ucon |= S3C2440_UCON_PCLK;
39 else if (strcmp(clk->name, "usysclk") == 0)
40 ucon |= S3C2412_UCON_USYSCLK;
41 else {
42 printk(KERN_ERR "unknown clock source %s\n", clk->name);
43 return -EINVAL;
44 }
45
46 wr_regl(port, S3C2410_UCON, ucon);
47 return 0;
48}
49
50
51static int s3c2412_serial_getsource(struct uart_port *port,
52 struct s3c24xx_uart_clksrc *clk)
53{
54 unsigned long ucon = rd_regl(port, S3C2410_UCON);
55
56 switch (ucon & S3C2412_UCON_CLKMASK) {
57 case S3C2412_UCON_UCLK:
58 clk->divisor = 1;
59 clk->name = "uclk";
60 break;
61
62 case S3C2412_UCON_PCLK:
63 case S3C2412_UCON_PCLK2:
64 clk->divisor = 1;
65 clk->name = "pclk";
66 break;
67
68 case S3C2412_UCON_USYSCLK:
69 clk->divisor = 1;
70 clk->name = "usysclk";
71 break;
72 }
73
74 return 0;
75}
76
77static int s3c2412_serial_resetport(struct uart_port *port,
78 struct s3c2410_uartcfg *cfg)
79{
80 unsigned long ucon = rd_regl(port, S3C2410_UCON);
81
82 dbg("%s: port=%p (%08lx), cfg=%p\n",
83 __func__, port, port->mapbase, cfg);
84
85 /* ensure we don't change the clock settings... */
86
87 ucon &= S3C2412_UCON_CLKMASK;
88
89 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
90 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
91
92 /* reset both fifos */
93
94 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
95 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
96
97 return 0;
98}
99
100static struct s3c24xx_uart_info s3c2412_uart_inf = {
101 .name = "Samsung S3C2412 UART",
102 .type = PORT_S3C2412,
103 .fifosize = 64,
104 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
108 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
109 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
110 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
111 .get_clksrc = s3c2412_serial_getsource,
112 .set_clksrc = s3c2412_serial_setsource,
113 .reset_port = s3c2412_serial_resetport,
114};
115
116/* device management */
117
118static int s3c2412_serial_probe(struct platform_device *dev)
119{
120 dbg("s3c2440_serial_probe: dev=%p\n", dev);
121 return s3c24xx_serial_probe(dev, &s3c2412_uart_inf);
122}
123
124static struct platform_driver s3c2412_serial_driver = {
125 .probe = s3c2412_serial_probe,
126 .remove = __devexit_p(s3c24xx_serial_remove),
127 .driver = {
128 .name = "s3c2412-uart",
129 .owner = THIS_MODULE,
130 },
131};
132
133static inline int s3c2412_serial_init(void)
134{
135 return s3c24xx_serial_init(&s3c2412_serial_driver, &s3c2412_uart_inf);
136}
137
138static inline void s3c2412_serial_exit(void)
139{
140 platform_driver_unregister(&s3c2412_serial_driver);
141}
142
143module_init(s3c2412_serial_init);
144module_exit(s3c2412_serial_exit);
145
146MODULE_DESCRIPTION("Samsung S3C2412,S3C2413 SoC Serial port driver");
147MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
148MODULE_LICENSE("GPL v2");
149MODULE_ALIAS("platform:s3c2412-uart");
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
deleted file mode 100644
index 1d0c324b813f..000000000000
--- a/drivers/tty/serial/s3c2440.c
+++ /dev/null
@@ -1,178 +0,0 @@
1/*
2 * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs.
3 *
4 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/module.h>
13#include <linux/ioport.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19
20#include <asm/irq.h>
21#include <mach/hardware.h>
22
23#include <plat/regs-serial.h>
24#include <mach/regs-gpio.h>
25
26#include "samsung.h"
27
28
29static int s3c2440_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 /* todo - proper fclk<>nonfclk switch. */
35
36 ucon &= ~S3C2440_UCON_CLKMASK;
37
38 if (strcmp(clk->name, "uclk") == 0)
39 ucon |= S3C2440_UCON_UCLK;
40 else if (strcmp(clk->name, "pclk") == 0)
41 ucon |= S3C2440_UCON_PCLK;
42 else if (strcmp(clk->name, "fclk") == 0)
43 ucon |= S3C2440_UCON_FCLK;
44 else {
45 printk(KERN_ERR "unknown clock source %s\n", clk->name);
46 return -EINVAL;
47 }
48
49 wr_regl(port, S3C2410_UCON, ucon);
50 return 0;
51}
52
53
54static int s3c2440_serial_getsource(struct uart_port *port,
55 struct s3c24xx_uart_clksrc *clk)
56{
57 unsigned long ucon = rd_regl(port, S3C2410_UCON);
58 unsigned long ucon0, ucon1, ucon2;
59
60 switch (ucon & S3C2440_UCON_CLKMASK) {
61 case S3C2440_UCON_UCLK:
62 clk->divisor = 1;
63 clk->name = "uclk";
64 break;
65
66 case S3C2440_UCON_PCLK:
67 case S3C2440_UCON_PCLK2:
68 clk->divisor = 1;
69 clk->name = "pclk";
70 break;
71
72 case S3C2440_UCON_FCLK:
73 /* the fun of calculating the uart divisors on
74 * the s3c2440 */
75
76 ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
77 ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
78 ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
79
80 printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2);
81
82 ucon0 &= S3C2440_UCON0_DIVMASK;
83 ucon1 &= S3C2440_UCON1_DIVMASK;
84 ucon2 &= S3C2440_UCON2_DIVMASK;
85
86 if (ucon0 != 0) {
87 clk->divisor = ucon0 >> S3C2440_UCON_DIVSHIFT;
88 clk->divisor += 6;
89 } else if (ucon1 != 0) {
90 clk->divisor = ucon1 >> S3C2440_UCON_DIVSHIFT;
91 clk->divisor += 21;
92 } else if (ucon2 != 0) {
93 clk->divisor = ucon2 >> S3C2440_UCON_DIVSHIFT;
94 clk->divisor += 36;
95 } else {
96 /* manual calims 44, seems to be 9 */
97 clk->divisor = 9;
98 }
99
100 clk->name = "fclk";
101 break;
102 }
103
104 return 0;
105}
106
107static int s3c2440_serial_resetport(struct uart_port *port,
108 struct s3c2410_uartcfg *cfg)
109{
110 unsigned long ucon = rd_regl(port, S3C2410_UCON);
111
112 dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n",
113 port, port->mapbase, cfg);
114
115 /* ensure we don't change the clock settings... */
116
117 ucon &= (S3C2440_UCON0_DIVMASK | (3<<10));
118
119 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
120 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
121
122 /* reset both fifos */
123
124 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
125 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
126
127 return 0;
128}
129
130static struct s3c24xx_uart_info s3c2440_uart_inf = {
131 .name = "Samsung S3C2440 UART",
132 .type = PORT_S3C2440,
133 .fifosize = 64,
134 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
135 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
136 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
137 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
138 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
139 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
140 .get_clksrc = s3c2440_serial_getsource,
141 .set_clksrc = s3c2440_serial_setsource,
142 .reset_port = s3c2440_serial_resetport,
143};
144
145/* device management */
146
147static int s3c2440_serial_probe(struct platform_device *dev)
148{
149 dbg("s3c2440_serial_probe: dev=%p\n", dev);
150 return s3c24xx_serial_probe(dev, &s3c2440_uart_inf);
151}
152
153static struct platform_driver s3c2440_serial_driver = {
154 .probe = s3c2440_serial_probe,
155 .remove = __devexit_p(s3c24xx_serial_remove),
156 .driver = {
157 .name = "s3c2440-uart",
158 .owner = THIS_MODULE,
159 },
160};
161
162static int __init s3c2440_serial_init(void)
163{
164 return s3c24xx_serial_init(&s3c2440_serial_driver, &s3c2440_uart_inf);
165}
166
167static void __exit s3c2440_serial_exit(void)
168{
169 platform_driver_unregister(&s3c2440_serial_driver);
170}
171
172module_init(s3c2440_serial_init);
173module_exit(s3c2440_serial_exit);
174
175MODULE_DESCRIPTION("Samsung S3C2440,S3C2442 SoC Serial port driver");
176MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
177MODULE_LICENSE("GPL v2");
178MODULE_ALIAS("platform:s3c2440-uart");
diff --git a/drivers/tty/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c
deleted file mode 100644
index e2f6913d84d5..000000000000
--- a/drivers/tty/serial/s3c6400.c
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * Driver for Samsung S3C6400 and S3C6410 SoC onboard UARTs.
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/module.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/serial.h>
21
22#include <asm/irq.h>
23#include <mach/hardware.h>
24
25#include <plat/regs-serial.h>
26
27#include "samsung.h"
28
29static int s3c6400_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 if (strcmp(clk->name, "uclk0") == 0) {
35 ucon &= ~S3C6400_UCON_CLKMASK;
36 ucon |= S3C6400_UCON_UCLK0;
37 } else if (strcmp(clk->name, "uclk1") == 0)
38 ucon |= S3C6400_UCON_UCLK1;
39 else if (strcmp(clk->name, "pclk") == 0) {
40 /* See notes about transitioning from UCLK to PCLK */
41 ucon &= ~S3C6400_UCON_UCLK0;
42 } else {
43 printk(KERN_ERR "unknown clock source %s\n", clk->name);
44 return -EINVAL;
45 }
46
47 wr_regl(port, S3C2410_UCON, ucon);
48 return 0;
49}
50
51
52static int s3c6400_serial_getsource(struct uart_port *port,
53 struct s3c24xx_uart_clksrc *clk)
54{
55 u32 ucon = rd_regl(port, S3C2410_UCON);
56
57 clk->divisor = 1;
58
59 switch (ucon & S3C6400_UCON_CLKMASK) {
60 case S3C6400_UCON_UCLK0:
61 clk->name = "uclk0";
62 break;
63
64 case S3C6400_UCON_UCLK1:
65 clk->name = "uclk1";
66 break;
67
68 case S3C6400_UCON_PCLK:
69 case S3C6400_UCON_PCLK2:
70 clk->name = "pclk";
71 break;
72 }
73
74 return 0;
75}
76
77static int s3c6400_serial_resetport(struct uart_port *port,
78 struct s3c2410_uartcfg *cfg)
79{
80 unsigned long ucon = rd_regl(port, S3C2410_UCON);
81
82 dbg("s3c6400_serial_resetport: port=%p (%08lx), cfg=%p\n",
83 port, port->mapbase, cfg);
84
85 /* ensure we don't change the clock settings... */
86
87 ucon &= S3C6400_UCON_CLKMASK;
88
89 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
90 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
91
92 /* reset both fifos */
93
94 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
95 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
96
97 return 0;
98}
99
100static struct s3c24xx_uart_info s3c6400_uart_inf = {
101 .name = "Samsung S3C6400 UART",
102 .type = PORT_S3C6400,
103 .fifosize = 64,
104 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
108 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
109 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
110 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
111 .get_clksrc = s3c6400_serial_getsource,
112 .set_clksrc = s3c6400_serial_setsource,
113 .reset_port = s3c6400_serial_resetport,
114};
115
116/* device management */
117
118static int s3c6400_serial_probe(struct platform_device *dev)
119{
120 dbg("s3c6400_serial_probe: dev=%p\n", dev);
121 return s3c24xx_serial_probe(dev, &s3c6400_uart_inf);
122}
123
124static struct platform_driver s3c6400_serial_driver = {
125 .probe = s3c6400_serial_probe,
126 .remove = __devexit_p(s3c24xx_serial_remove),
127 .driver = {
128 .name = "s3c6400-uart",
129 .owner = THIS_MODULE,
130 },
131};
132
133static int __init s3c6400_serial_init(void)
134{
135 return s3c24xx_serial_init(&s3c6400_serial_driver, &s3c6400_uart_inf);
136}
137
138static void __exit s3c6400_serial_exit(void)
139{
140 platform_driver_unregister(&s3c6400_serial_driver);
141}
142
143module_init(s3c6400_serial_init);
144module_exit(s3c6400_serial_exit);
145
146MODULE_DESCRIPTION("Samsung S3C6400,S3C6410 SoC Serial port driver");
147MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
148MODULE_LICENSE("GPL v2");
149MODULE_ALIAS("platform:s3c6400-uart");
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
deleted file mode 100644
index 8b0b888a1b76..000000000000
--- a/drivers/tty/serial/s5pv210.c
+++ /dev/null
@@ -1,158 +0,0 @@
1/*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * Based on drivers/serial/s3c6400.c
6 *
7 * Driver for Samsung S5PV210 SoC UARTs.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/module.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/serial.h>
21#include <linux/delay.h>
22
23#include <asm/irq.h>
24#include <mach/hardware.h>
25#include <plat/regs-serial.h>
26#include "samsung.h"
27
28static int s5pv210_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
35 return 0;
36
37 if (strcmp(clk->name, "pclk") == 0)
38 ucon &= ~S5PV210_UCON_CLKMASK;
39 else if (strcmp(clk->name, "uclk1") == 0)
40 ucon |= S5PV210_UCON_CLKMASK;
41 else {
42 printk(KERN_ERR "unknown clock source %s\n", clk->name);
43 return -EINVAL;
44 }
45
46 wr_regl(port, S3C2410_UCON, ucon);
47 return 0;
48}
49
50
51static int s5pv210_serial_getsource(struct uart_port *port,
52 struct s3c24xx_uart_clksrc *clk)
53{
54 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
55 u32 ucon = rd_regl(port, S3C2410_UCON);
56
57 clk->divisor = 1;
58
59 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
60 return 0;
61
62 switch (ucon & S5PV210_UCON_CLKMASK) {
63 case S5PV210_UCON_PCLK:
64 clk->name = "pclk";
65 break;
66 case S5PV210_UCON_UCLK:
67 clk->name = "uclk1";
68 break;
69 }
70
71 return 0;
72}
73
74static int s5pv210_serial_resetport(struct uart_port *port,
75 struct s3c2410_uartcfg *cfg)
76{
77 unsigned long ucon = rd_regl(port, S3C2410_UCON);
78
79 ucon &= S5PV210_UCON_CLKMASK;
80 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
81 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
82
83 /* reset both fifos */
84 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
85 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
86
87 /* It is need to delay When reset FIFO register */
88 udelay(1);
89
90 return 0;
91}
92
93#define S5PV210_UART_DEFAULT_INFO(fifo_size) \
94 .name = "Samsung S5PV210 UART0", \
95 .type = PORT_S3C6400, \
96 .fifosize = fifo_size, \
97 .has_divslot = 1, \
98 .rx_fifomask = S5PV210_UFSTAT_RXMASK, \
99 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \
100 .rx_fifofull = S5PV210_UFSTAT_RXFULL, \
101 .tx_fifofull = S5PV210_UFSTAT_TXFULL, \
102 .tx_fifomask = S5PV210_UFSTAT_TXMASK, \
103 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
104 .get_clksrc = s5pv210_serial_getsource, \
105 .set_clksrc = s5pv210_serial_setsource, \
106 .reset_port = s5pv210_serial_resetport
107
108static struct s3c24xx_uart_info s5p_port_fifo256 = {
109 S5PV210_UART_DEFAULT_INFO(256),
110};
111
112static struct s3c24xx_uart_info s5p_port_fifo64 = {
113 S5PV210_UART_DEFAULT_INFO(64),
114};
115
116static struct s3c24xx_uart_info s5p_port_fifo16 = {
117 S5PV210_UART_DEFAULT_INFO(16),
118};
119
120static struct s3c24xx_uart_info *s5p_uart_inf[] = {
121 [0] = &s5p_port_fifo256,
122 [1] = &s5p_port_fifo64,
123 [2] = &s5p_port_fifo16,
124 [3] = &s5p_port_fifo16,
125};
126
127/* device management */
128static int s5p_serial_probe(struct platform_device *pdev)
129{
130 return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
131}
132
133static struct platform_driver s5p_serial_driver = {
134 .probe = s5p_serial_probe,
135 .remove = __devexit_p(s3c24xx_serial_remove),
136 .driver = {
137 .name = "s5pv210-uart",
138 .owner = THIS_MODULE,
139 },
140};
141
142static int __init s5p_serial_init(void)
143{
144 return s3c24xx_serial_init(&s5p_serial_driver, *s5p_uart_inf);
145}
146
147static void __exit s5p_serial_exit(void)
148{
149 platform_driver_unregister(&s5p_serial_driver);
150}
151
152module_init(s5p_serial_init);
153module_exit(s5p_serial_exit);
154
155MODULE_LICENSE("GPL");
156MODULE_ALIAS("platform:s5pv210-uart");
157MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
158MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index b31f1c3a2c4c..f96f37b5fec6 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -42,6 +42,7 @@
42#include <linux/delay.h> 42#include <linux/delay.h>
43#include <linux/clk.h> 43#include <linux/clk.h>
44#include <linux/cpufreq.h> 44#include <linux/cpufreq.h>
45#include <linux/of.h>
45 46
46#include <asm/irq.h> 47#include <asm/irq.h>
47 48
@@ -49,6 +50,7 @@
49#include <mach/map.h> 50#include <mach/map.h>
50 51
51#include <plat/regs-serial.h> 52#include <plat/regs-serial.h>
53#include <plat/clock.h>
52 54
53#include "samsung.h" 55#include "samsung.h"
54 56
@@ -190,10 +192,13 @@ static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *p
190 192
191static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) 193static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port)
192{ 194{
195 struct s3c24xx_uart_port *ourport;
196
193 if (port->dev == NULL) 197 if (port->dev == NULL)
194 return NULL; 198 return NULL;
195 199
196 return (struct s3c2410_uartcfg *)port->dev->platform_data; 200 ourport = container_of(port, struct s3c24xx_uart_port, port);
201 return ourport->cfg;
197} 202}
198 203
199static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, 204static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
@@ -202,7 +207,7 @@ static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
202 struct s3c24xx_uart_info *info = ourport->info; 207 struct s3c24xx_uart_info *info = ourport->info;
203 208
204 if (ufstat & info->rx_fifofull) 209 if (ufstat & info->rx_fifofull)
205 return info->fifosize; 210 return ourport->port.fifosize;
206 211
207 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; 212 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift;
208} 213}
@@ -555,154 +560,98 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
555 * 560 *
556*/ 561*/
557 562
563#define MAX_CLK_NAME_LENGTH 15
558 564
559#define MAX_CLKS (8) 565static inline int s3c24xx_serial_getsource(struct uart_port *port)
560
561static struct s3c24xx_uart_clksrc tmp_clksrc = {
562 .name = "pclk",
563 .min_baud = 0,
564 .max_baud = 0,
565 .divisor = 1,
566};
567
568static inline int
569s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
570{ 566{
571 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); 567 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
568 unsigned int ucon;
572 569
573 return (info->get_clksrc)(port, c); 570 if (info->num_clks == 1)
574} 571 return 0;
575
576static inline int
577s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
578{
579 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
580 572
581 return (info->set_clksrc)(port, c); 573 ucon = rd_regl(port, S3C2410_UCON);
574 ucon &= info->clksel_mask;
575 return ucon >> info->clksel_shift;
582} 576}
583 577
584struct baud_calc { 578static void s3c24xx_serial_setsource(struct uart_port *port,
585 struct s3c24xx_uart_clksrc *clksrc; 579 unsigned int clk_sel)
586 unsigned int calc;
587 unsigned int divslot;
588 unsigned int quot;
589 struct clk *src;
590};
591
592static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
593 struct uart_port *port,
594 struct s3c24xx_uart_clksrc *clksrc,
595 unsigned int baud)
596{ 580{
597 struct s3c24xx_uart_port *ourport = to_ourport(port); 581 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
598 unsigned long rate; 582 unsigned int ucon;
599
600 calc->src = clk_get(port->dev, clksrc->name);
601 if (calc->src == NULL || IS_ERR(calc->src))
602 return 0;
603
604 rate = clk_get_rate(calc->src);
605 rate /= clksrc->divisor;
606 583
607 calc->clksrc = clksrc; 584 if (info->num_clks == 1)
585 return;
608 586
609 if (ourport->info->has_divslot) { 587 ucon = rd_regl(port, S3C2410_UCON);
610 unsigned long div = rate / baud; 588 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel)
611 589 return;
612 /* The UDIVSLOT register on the newer UARTs allows us to
613 * get a divisor adjustment of 1/16th on the baud clock.
614 *
615 * We don't keep the UDIVSLOT value (the 16ths we calculated
616 * by not multiplying the baud by 16) as it is easy enough
617 * to recalculate.
618 */
619
620 calc->quot = div / 16;
621 calc->calc = rate / div;
622 } else {
623 calc->quot = (rate + (8 * baud)) / (16 * baud);
624 calc->calc = (rate / (calc->quot * 16));
625 }
626 590
627 calc->quot--; 591 ucon &= ~info->clksel_mask;
628 return 1; 592 ucon |= clk_sel << info->clksel_shift;
593 wr_regl(port, S3C2410_UCON, ucon);
629} 594}
630 595
631static unsigned int s3c24xx_serial_getclk(struct uart_port *port, 596static unsigned int s3c24xx_serial_getclk(struct s3c24xx_uart_port *ourport,
632 struct s3c24xx_uart_clksrc **clksrc, 597 unsigned int req_baud, struct clk **best_clk,
633 struct clk **clk, 598 unsigned int *clk_num)
634 unsigned int baud)
635{ 599{
636 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); 600 struct s3c24xx_uart_info *info = ourport->info;
637 struct s3c24xx_uart_clksrc *clkp; 601 struct clk *clk;
638 struct baud_calc res[MAX_CLKS]; 602 unsigned long rate;
639 struct baud_calc *resptr, *best, *sptr; 603 unsigned int cnt, baud, quot, clk_sel, best_quot = 0;
640 int i; 604 char clkname[MAX_CLK_NAME_LENGTH];
641 605 int calc_deviation, deviation = (1 << 30) - 1;
642 clkp = cfg->clocks; 606
643 best = NULL; 607 *best_clk = NULL;
644 608 clk_sel = (ourport->cfg->clk_sel) ? ourport->cfg->clk_sel :
645 if (cfg->clocks_size < 2) { 609 ourport->info->def_clk_sel;
646 if (cfg->clocks_size == 0) 610 for (cnt = 0; cnt < info->num_clks; cnt++) {
647 clkp = &tmp_clksrc; 611 if (!(clk_sel & (1 << cnt)))
648 612 continue;
649 /* check to see if we're sourcing fclk, and if so we're 613
650 * going to have to update the clock source 614 sprintf(clkname, "clk_uart_baud%d", cnt);
651 */ 615 clk = clk_get(ourport->port.dev, clkname);
652 616 if (IS_ERR_OR_NULL(clk))
653 if (strcmp(clkp->name, "fclk") == 0) { 617 continue;
654 struct s3c24xx_uart_clksrc src; 618
655 619 rate = clk_get_rate(clk);
656 s3c24xx_serial_getsource(port, &src); 620 if (!rate)
657 621 continue;
658 /* check that the port already using fclk, and if 622
659 * not, then re-select fclk 623 if (ourport->info->has_divslot) {
624 unsigned long div = rate / req_baud;
625
626 /* The UDIVSLOT register on the newer UARTs allows us to
627 * get a divisor adjustment of 1/16th on the baud clock.
628 *
629 * We don't keep the UDIVSLOT value (the 16ths we
630 * calculated by not multiplying the baud by 16) as it
631 * is easy enough to recalculate.
660 */ 632 */
661 633
662 if (strcmp(src.name, clkp->name) == 0) { 634 quot = div / 16;
663 s3c24xx_serial_setsource(port, clkp); 635 baud = rate / div;
664 s3c24xx_serial_getsource(port, &src); 636 } else {
665 } 637 quot = (rate + (8 * req_baud)) / (16 * req_baud);
666 638 baud = rate / (quot * 16);
667 clkp->divisor = src.divisor;
668 }
669
670 s3c24xx_serial_calcbaud(res, port, clkp, baud);
671 best = res;
672 resptr = best + 1;
673 } else {
674 resptr = res;
675
676 for (i = 0; i < cfg->clocks_size; i++, clkp++) {
677 if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud))
678 resptr++;
679 } 639 }
680 } 640 quot--;
681
682 /* ok, we now need to select the best clock we found */
683
684 if (!best) {
685 unsigned int deviation = (1<<30)|((1<<30)-1);
686 int calc_deviation;
687 641
688 for (sptr = res; sptr < resptr; sptr++) { 642 calc_deviation = req_baud - baud;
689 calc_deviation = baud - sptr->calc; 643 if (calc_deviation < 0)
690 if (calc_deviation < 0) 644 calc_deviation = -calc_deviation;
691 calc_deviation = -calc_deviation;
692 645
693 if (calc_deviation < deviation) { 646 if (calc_deviation < deviation) {
694 best = sptr; 647 *best_clk = clk;
695 deviation = calc_deviation; 648 best_quot = quot;
696 } 649 *clk_num = cnt;
650 deviation = calc_deviation;
697 } 651 }
698 } 652 }
699 653
700 /* store results to pass back */ 654 return best_quot;
701
702 *clksrc = best->clksrc;
703 *clk = best->src;
704
705 return best->quot;
706} 655}
707 656
708/* udivslot_table[] 657/* udivslot_table[]
@@ -735,10 +684,9 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
735{ 684{
736 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); 685 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
737 struct s3c24xx_uart_port *ourport = to_ourport(port); 686 struct s3c24xx_uart_port *ourport = to_ourport(port);
738 struct s3c24xx_uart_clksrc *clksrc = NULL;
739 struct clk *clk = NULL; 687 struct clk *clk = NULL;
740 unsigned long flags; 688 unsigned long flags;
741 unsigned int baud, quot; 689 unsigned int baud, quot, clk_sel = 0;
742 unsigned int ulcon; 690 unsigned int ulcon;
743 unsigned int umcon; 691 unsigned int umcon;
744 unsigned int udivslot = 0; 692 unsigned int udivslot = 0;
@@ -754,17 +702,16 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
754 */ 702 */
755 703
756 baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); 704 baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
757 705 quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
758 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) 706 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
759 quot = port->custom_divisor; 707 quot = port->custom_divisor;
760 else 708 if (!clk)
761 quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud); 709 return;
762 710
763 /* check to see if we need to change clock source */ 711 /* check to see if we need to change clock source */
764 712
765 if (ourport->clksrc != clksrc || ourport->baudclk != clk) { 713 if (ourport->baudclk != clk) {
766 dbg("selecting clock %p\n", clk); 714 s3c24xx_serial_setsource(port, clk_sel);
767 s3c24xx_serial_setsource(port, clksrc);
768 715
769 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { 716 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
770 clk_disable(ourport->baudclk); 717 clk_disable(ourport->baudclk);
@@ -773,7 +720,6 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
773 720
774 clk_enable(clk); 721 clk_enable(clk);
775 722
776 ourport->clksrc = clksrc;
777 ourport->baudclk = clk; 723 ourport->baudclk = clk;
778 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; 724 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
779 } 725 }
@@ -1020,16 +966,29 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
1020 966
1021/* s3c24xx_serial_resetport 967/* s3c24xx_serial_resetport
1022 * 968 *
1023 * wrapper to call the specific reset for this port (reset the fifos 969 * reset the fifos and other the settings.
1024 * and the settings)
1025*/ 970*/
1026 971
1027static inline int s3c24xx_serial_resetport(struct uart_port *port, 972static void s3c24xx_serial_resetport(struct uart_port *port,
1028 struct s3c2410_uartcfg *cfg) 973 struct s3c2410_uartcfg *cfg)
1029{ 974{
1030 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); 975 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
976 unsigned long ucon = rd_regl(port, S3C2410_UCON);
977 unsigned int ucon_mask;
978
979 ucon_mask = info->clksel_mask;
980 if (info->type == PORT_S3C2440)
981 ucon_mask |= S3C2440_UCON0_DIVMASK;
1031 982
1032 return (info->reset_port)(port, cfg); 983 ucon &= ucon_mask;
984 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
985
986 /* reset both fifos */
987 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
988 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
989
990 /* some delay is required after fifo reset */
991 udelay(1);
1033} 992}
1034 993
1035 994
@@ -1121,11 +1080,10 @@ static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *p
1121 */ 1080 */
1122 1081
1123static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, 1082static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1124 struct s3c24xx_uart_info *info,
1125 struct platform_device *platdev) 1083 struct platform_device *platdev)
1126{ 1084{
1127 struct uart_port *port = &ourport->port; 1085 struct uart_port *port = &ourport->port;
1128 struct s3c2410_uartcfg *cfg; 1086 struct s3c2410_uartcfg *cfg = ourport->cfg;
1129 struct resource *res; 1087 struct resource *res;
1130 int ret; 1088 int ret;
1131 1089
@@ -1134,30 +1092,16 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1134 if (platdev == NULL) 1092 if (platdev == NULL)
1135 return -ENODEV; 1093 return -ENODEV;
1136 1094
1137 cfg = s3c24xx_dev_to_cfg(&platdev->dev);
1138
1139 if (port->mapbase != 0) 1095 if (port->mapbase != 0)
1140 return 0; 1096 return 0;
1141 1097
1142 if (cfg->hwport > CONFIG_SERIAL_SAMSUNG_UARTS) {
1143 printk(KERN_ERR "%s: port %d bigger than %d\n", __func__,
1144 cfg->hwport, CONFIG_SERIAL_SAMSUNG_UARTS);
1145 return -ERANGE;
1146 }
1147
1148 /* setup info for port */ 1098 /* setup info for port */
1149 port->dev = &platdev->dev; 1099 port->dev = &platdev->dev;
1150 ourport->info = info;
1151 1100
1152 /* Startup sequence is different for s3c64xx and higher SoC's */ 1101 /* Startup sequence is different for s3c64xx and higher SoC's */
1153 if (s3c24xx_serial_has_interrupt_mask(port)) 1102 if (s3c24xx_serial_has_interrupt_mask(port))
1154 s3c24xx_serial_ops.startup = s3c64xx_serial_startup; 1103 s3c24xx_serial_ops.startup = s3c64xx_serial_startup;
1155 1104
1156 /* copy the info in from provided structure */
1157 ourport->port.fifosize = info->fifosize;
1158
1159 dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport);
1160
1161 port->uartclk = 1; 1105 port->uartclk = 1;
1162 1106
1163 if (cfg->uart_flags & UPF_CONS_FLOW) { 1107 if (cfg->uart_flags & UPF_CONS_FLOW) {
@@ -1215,43 +1159,74 @@ static ssize_t s3c24xx_serial_show_clksrc(struct device *dev,
1215 struct uart_port *port = s3c24xx_dev_to_port(dev); 1159 struct uart_port *port = s3c24xx_dev_to_port(dev);
1216 struct s3c24xx_uart_port *ourport = to_ourport(port); 1160 struct s3c24xx_uart_port *ourport = to_ourport(port);
1217 1161
1218 return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name); 1162 return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->baudclk->name);
1219} 1163}
1220 1164
1221static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL); 1165static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
1222 1166
1167
1223/* Device driver serial port probe */ 1168/* Device driver serial port probe */
1224 1169
1170static const struct of_device_id s3c24xx_uart_dt_match[];
1225static int probe_index; 1171static int probe_index;
1226 1172
1227int s3c24xx_serial_probe(struct platform_device *dev, 1173static inline struct s3c24xx_serial_drv_data *s3c24xx_get_driver_data(
1228 struct s3c24xx_uart_info *info) 1174 struct platform_device *pdev)
1175{
1176#ifdef CONFIG_OF
1177 if (pdev->dev.of_node) {
1178 const struct of_device_id *match;
1179 match = of_match_node(s3c24xx_uart_dt_match, pdev->dev.of_node);
1180 return (struct s3c24xx_serial_drv_data *)match->data;
1181 }
1182#endif
1183 return (struct s3c24xx_serial_drv_data *)
1184 platform_get_device_id(pdev)->driver_data;
1185}
1186
1187static int s3c24xx_serial_probe(struct platform_device *pdev)
1229{ 1188{
1230 struct s3c24xx_uart_port *ourport; 1189 struct s3c24xx_uart_port *ourport;
1231 int ret; 1190 int ret;
1232 1191
1233 dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); 1192 dbg("s3c24xx_serial_probe(%p) %d\n", pdev, probe_index);
1234 1193
1235 ourport = &s3c24xx_serial_ports[probe_index]; 1194 ourport = &s3c24xx_serial_ports[probe_index];
1195
1196 ourport->drv_data = s3c24xx_get_driver_data(pdev);
1197 if (!ourport->drv_data) {
1198 dev_err(&pdev->dev, "could not find driver data\n");
1199 return -ENODEV;
1200 }
1201
1202 ourport->info = ourport->drv_data->info;
1203 ourport->cfg = (pdev->dev.platform_data) ?
1204 (struct s3c2410_uartcfg *)pdev->dev.platform_data :
1205 ourport->drv_data->def_cfg;
1206
1207 ourport->port.fifosize = (ourport->info->fifosize) ?
1208 ourport->info->fifosize :
1209 ourport->drv_data->fifosize[probe_index];
1210
1236 probe_index++; 1211 probe_index++;
1237 1212
1238 dbg("%s: initialising port %p...\n", __func__, ourport); 1213 dbg("%s: initialising port %p...\n", __func__, ourport);
1239 1214
1240 ret = s3c24xx_serial_init_port(ourport, info, dev); 1215 ret = s3c24xx_serial_init_port(ourport, pdev);
1241 if (ret < 0) 1216 if (ret < 0)
1242 goto probe_err; 1217 goto probe_err;
1243 1218
1244 dbg("%s: adding port\n", __func__); 1219 dbg("%s: adding port\n", __func__);
1245 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); 1220 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1246 platform_set_drvdata(dev, &ourport->port); 1221 platform_set_drvdata(pdev, &ourport->port);
1247 1222
1248 ret = device_create_file(&dev->dev, &dev_attr_clock_source); 1223 ret = device_create_file(&pdev->dev, &dev_attr_clock_source);
1249 if (ret < 0) 1224 if (ret < 0)
1250 printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__); 1225 dev_err(&pdev->dev, "failed to add clock source attr.\n");
1251 1226
1252 ret = s3c24xx_serial_cpufreq_register(ourport); 1227 ret = s3c24xx_serial_cpufreq_register(ourport);
1253 if (ret < 0) 1228 if (ret < 0)
1254 dev_err(&dev->dev, "failed to add cpufreq notifier\n"); 1229 dev_err(&pdev->dev, "failed to add cpufreq notifier\n");
1255 1230
1256 return 0; 1231 return 0;
1257 1232
@@ -1259,9 +1234,7 @@ int s3c24xx_serial_probe(struct platform_device *dev,
1259 return ret; 1234 return ret;
1260} 1235}
1261 1236
1262EXPORT_SYMBOL_GPL(s3c24xx_serial_probe); 1237static int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1263
1264int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1265{ 1238{
1266 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); 1239 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1267 1240
@@ -1274,8 +1247,6 @@ int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1274 return 0; 1247 return 0;
1275} 1248}
1276 1249
1277EXPORT_SYMBOL_GPL(s3c24xx_serial_remove);
1278
1279/* UART power management code */ 1250/* UART power management code */
1280#ifdef CONFIG_PM_SLEEP 1251#ifdef CONFIG_PM_SLEEP
1281static int s3c24xx_serial_suspend(struct device *dev) 1252static int s3c24xx_serial_suspend(struct device *dev)
@@ -1315,41 +1286,6 @@ static const struct dev_pm_ops s3c24xx_serial_pm_ops = {
1315#define SERIAL_SAMSUNG_PM_OPS NULL 1286#define SERIAL_SAMSUNG_PM_OPS NULL
1316#endif /* CONFIG_PM_SLEEP */ 1287#endif /* CONFIG_PM_SLEEP */
1317 1288
1318int s3c24xx_serial_init(struct platform_driver *drv,
1319 struct s3c24xx_uart_info *info)
1320{
1321 dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
1322
1323 drv->driver.pm = SERIAL_SAMSUNG_PM_OPS;
1324
1325 return platform_driver_register(drv);
1326}
1327
1328EXPORT_SYMBOL_GPL(s3c24xx_serial_init);
1329
1330/* module initialisation code */
1331
1332static int __init s3c24xx_serial_modinit(void)
1333{
1334 int ret;
1335
1336 ret = uart_register_driver(&s3c24xx_uart_drv);
1337 if (ret < 0) {
1338 printk(KERN_ERR "failed to register UART driver\n");
1339 return -1;
1340 }
1341
1342 return 0;
1343}
1344
1345static void __exit s3c24xx_serial_modexit(void)
1346{
1347 uart_unregister_driver(&s3c24xx_uart_drv);
1348}
1349
1350module_init(s3c24xx_serial_modinit);
1351module_exit(s3c24xx_serial_modexit);
1352
1353/* Console code */ 1289/* Console code */
1354 1290
1355#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE 1291#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
@@ -1395,12 +1331,13 @@ static void __init
1395s3c24xx_serial_get_options(struct uart_port *port, int *baud, 1331s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1396 int *parity, int *bits) 1332 int *parity, int *bits)
1397{ 1333{
1398 struct s3c24xx_uart_clksrc clksrc;
1399 struct clk *clk; 1334 struct clk *clk;
1400 unsigned int ulcon; 1335 unsigned int ulcon;
1401 unsigned int ucon; 1336 unsigned int ucon;
1402 unsigned int ubrdiv; 1337 unsigned int ubrdiv;
1403 unsigned long rate; 1338 unsigned long rate;
1339 unsigned int clk_sel;
1340 char clk_name[MAX_CLK_NAME_LENGTH];
1404 1341
1405 ulcon = rd_regl(port, S3C2410_ULCON); 1342 ulcon = rd_regl(port, S3C2410_ULCON);
1406 ucon = rd_regl(port, S3C2410_UCON); 1343 ucon = rd_regl(port, S3C2410_UCON);
@@ -1445,44 +1382,21 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1445 1382
1446 /* now calculate the baud rate */ 1383 /* now calculate the baud rate */
1447 1384
1448 s3c24xx_serial_getsource(port, &clksrc); 1385 clk_sel = s3c24xx_serial_getsource(port);
1386 sprintf(clk_name, "clk_uart_baud%d", clk_sel);
1449 1387
1450 clk = clk_get(port->dev, clksrc.name); 1388 clk = clk_get(port->dev, clk_name);
1451 if (!IS_ERR(clk) && clk != NULL) 1389 if (!IS_ERR(clk) && clk != NULL)
1452 rate = clk_get_rate(clk) / clksrc.divisor; 1390 rate = clk_get_rate(clk);
1453 else 1391 else
1454 rate = 1; 1392 rate = 1;
1455 1393
1456
1457 *baud = rate / (16 * (ubrdiv + 1)); 1394 *baud = rate / (16 * (ubrdiv + 1));
1458 dbg("calculated baud %d\n", *baud); 1395 dbg("calculated baud %d\n", *baud);
1459 } 1396 }
1460 1397
1461} 1398}
1462 1399
1463/* s3c24xx_serial_init_ports
1464 *
1465 * initialise the serial ports from the machine provided initialisation
1466 * data.
1467*/
1468
1469static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
1470{
1471 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1472 struct platform_device **platdev_ptr;
1473 int i;
1474
1475 dbg("s3c24xx_serial_init_ports: initialising ports...\n");
1476
1477 platdev_ptr = s3c24xx_uart_devs;
1478
1479 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
1480 s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
1481 }
1482
1483 return 0;
1484}
1485
1486static int __init 1400static int __init
1487s3c24xx_serial_console_setup(struct console *co, char *options) 1401s3c24xx_serial_console_setup(struct console *co, char *options)
1488{ 1402{
@@ -1526,11 +1440,6 @@ s3c24xx_serial_console_setup(struct console *co, char *options)
1526 return uart_set_options(port, co, baud, parity, bits, flow); 1440 return uart_set_options(port, co, baud, parity, bits, flow);
1527} 1441}
1528 1442
1529/* s3c24xx_serial_initconsole
1530 *
1531 * initialise the console from one of the uart drivers
1532*/
1533
1534static struct console s3c24xx_serial_console = { 1443static struct console s3c24xx_serial_console = {
1535 .name = S3C24XX_SERIAL_NAME, 1444 .name = S3C24XX_SERIAL_NAME,
1536 .device = uart_console_device, 1445 .device = uart_console_device,
@@ -1540,34 +1449,250 @@ static struct console s3c24xx_serial_console = {
1540 .setup = s3c24xx_serial_console_setup, 1449 .setup = s3c24xx_serial_console_setup,
1541 .data = &s3c24xx_uart_drv, 1450 .data = &s3c24xx_uart_drv,
1542}; 1451};
1452#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */
1543 1453
1544int s3c24xx_serial_initconsole(struct platform_driver *drv, 1454#ifdef CONFIG_CPU_S3C2410
1545 struct s3c24xx_uart_info **info) 1455static struct s3c24xx_serial_drv_data s3c2410_serial_drv_data = {
1456 .info = &(struct s3c24xx_uart_info) {
1457 .name = "Samsung S3C2410 UART",
1458 .type = PORT_S3C2410,
1459 .fifosize = 16,
1460 .rx_fifomask = S3C2410_UFSTAT_RXMASK,
1461 .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
1462 .rx_fifofull = S3C2410_UFSTAT_RXFULL,
1463 .tx_fifofull = S3C2410_UFSTAT_TXFULL,
1464 .tx_fifomask = S3C2410_UFSTAT_TXMASK,
1465 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
1466 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1467 .num_clks = 2,
1468 .clksel_mask = S3C2410_UCON_CLKMASK,
1469 .clksel_shift = S3C2410_UCON_CLKSHIFT,
1470 },
1471 .def_cfg = &(struct s3c2410_uartcfg) {
1472 .ucon = S3C2410_UCON_DEFAULT,
1473 .ufcon = S3C2410_UFCON_DEFAULT,
1474 },
1475};
1476#define S3C2410_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2410_serial_drv_data)
1477#else
1478#define S3C2410_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1479#endif
1546 1480
1547{ 1481#ifdef CONFIG_CPU_S3C2412
1548 struct platform_device *dev = s3c24xx_uart_devs[0]; 1482static struct s3c24xx_serial_drv_data s3c2412_serial_drv_data = {
1483 .info = &(struct s3c24xx_uart_info) {
1484 .name = "Samsung S3C2412 UART",
1485 .type = PORT_S3C2412,
1486 .fifosize = 64,
1487 .has_divslot = 1,
1488 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1489 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1490 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1491 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1492 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1493 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1494 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1495 .num_clks = 4,
1496 .clksel_mask = S3C2412_UCON_CLKMASK,
1497 .clksel_shift = S3C2412_UCON_CLKSHIFT,
1498 },
1499 .def_cfg = &(struct s3c2410_uartcfg) {
1500 .ucon = S3C2410_UCON_DEFAULT,
1501 .ufcon = S3C2410_UFCON_DEFAULT,
1502 },
1503};
1504#define S3C2412_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2412_serial_drv_data)
1505#else
1506#define S3C2412_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1507#endif
1549 1508
1550 dbg("s3c24xx_serial_initconsole\n"); 1509#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \
1510 defined(CONFIG_CPU_S3C2443)
1511static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = {
1512 .info = &(struct s3c24xx_uart_info) {
1513 .name = "Samsung S3C2440 UART",
1514 .type = PORT_S3C2440,
1515 .fifosize = 64,
1516 .has_divslot = 1,
1517 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1518 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1519 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1520 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1521 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1522 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1523 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1524 .num_clks = 4,
1525 .clksel_mask = S3C2412_UCON_CLKMASK,
1526 .clksel_shift = S3C2412_UCON_CLKSHIFT,
1527 },
1528 .def_cfg = &(struct s3c2410_uartcfg) {
1529 .ucon = S3C2410_UCON_DEFAULT,
1530 .ufcon = S3C2410_UFCON_DEFAULT,
1531 },
1532};
1533#define S3C2440_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2440_serial_drv_data)
1534#else
1535#define S3C2440_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1536#endif
1551 1537
1552 /* select driver based on the cpu */ 1538#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) || \
1539 defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) || \
1540 defined(CONFIG_CPU_S5PC100)
1541static struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = {
1542 .info = &(struct s3c24xx_uart_info) {
1543 .name = "Samsung S3C6400 UART",
1544 .type = PORT_S3C6400,
1545 .fifosize = 64,
1546 .has_divslot = 1,
1547 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1548 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1549 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1550 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1551 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1552 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1553 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1554 .num_clks = 4,
1555 .clksel_mask = S3C6400_UCON_CLKMASK,
1556 .clksel_shift = S3C6400_UCON_CLKSHIFT,
1557 },
1558 .def_cfg = &(struct s3c2410_uartcfg) {
1559 .ucon = S3C2410_UCON_DEFAULT,
1560 .ufcon = S3C2410_UFCON_DEFAULT,
1561 },
1562};
1563#define S3C6400_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c6400_serial_drv_data)
1564#else
1565#define S3C6400_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1566#endif
1553 1567
1554 if (dev == NULL) { 1568#ifdef CONFIG_CPU_S5PV210
1555 printk(KERN_ERR "s3c24xx: no devices for console init\n"); 1569static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
1556 return 0; 1570 .info = &(struct s3c24xx_uart_info) {
1557 } 1571 .name = "Samsung S5PV210 UART",
1572 .type = PORT_S3C6400,
1573 .has_divslot = 1,
1574 .rx_fifomask = S5PV210_UFSTAT_RXMASK,
1575 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
1576 .rx_fifofull = S5PV210_UFSTAT_RXFULL,
1577 .tx_fifofull = S5PV210_UFSTAT_TXFULL,
1578 .tx_fifomask = S5PV210_UFSTAT_TXMASK,
1579 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT,
1580 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1581 .num_clks = 2,
1582 .clksel_mask = S5PV210_UCON_CLKMASK,
1583 .clksel_shift = S5PV210_UCON_CLKSHIFT,
1584 },
1585 .def_cfg = &(struct s3c2410_uartcfg) {
1586 .ucon = S5PV210_UCON_DEFAULT,
1587 .ufcon = S5PV210_UFCON_DEFAULT,
1588 },
1589 .fifosize = { 256, 64, 16, 16 },
1590};
1591#define S5PV210_SERIAL_DRV_DATA ((kernel_ulong_t)&s5pv210_serial_drv_data)
1592#else
1593#define S5PV210_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1594#endif
1558 1595
1559 if (strcmp(dev->name, drv->driver.name) != 0) 1596#ifdef CONFIG_CPU_EXYNOS4210
1560 return 0; 1597static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
1598 .info = &(struct s3c24xx_uart_info) {
1599 .name = "Samsung Exynos4 UART",
1600 .type = PORT_S3C6400,
1601 .has_divslot = 1,
1602 .rx_fifomask = S5PV210_UFSTAT_RXMASK,
1603 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
1604 .rx_fifofull = S5PV210_UFSTAT_RXFULL,
1605 .tx_fifofull = S5PV210_UFSTAT_TXFULL,
1606 .tx_fifomask = S5PV210_UFSTAT_TXMASK,
1607 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT,
1608 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1609 .num_clks = 1,
1610 .clksel_mask = 0,
1611 .clksel_shift = 0,
1612 },
1613 .def_cfg = &(struct s3c2410_uartcfg) {
1614 .ucon = S5PV210_UCON_DEFAULT,
1615 .ufcon = S5PV210_UFCON_DEFAULT,
1616 .has_fracval = 1,
1617 },
1618 .fifosize = { 256, 64, 16, 16 },
1619};
1620#define EXYNOS4210_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos4210_serial_drv_data)
1621#else
1622#define EXYNOS4210_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1623#endif
1561 1624
1562 s3c24xx_serial_console.data = &s3c24xx_uart_drv; 1625static struct platform_device_id s3c24xx_serial_driver_ids[] = {
1563 s3c24xx_serial_init_ports(info); 1626 {
1627 .name = "s3c2410-uart",
1628 .driver_data = S3C2410_SERIAL_DRV_DATA,
1629 }, {
1630 .name = "s3c2412-uart",
1631 .driver_data = S3C2412_SERIAL_DRV_DATA,
1632 }, {
1633 .name = "s3c2440-uart",
1634 .driver_data = S3C2440_SERIAL_DRV_DATA,
1635 }, {
1636 .name = "s3c6400-uart",
1637 .driver_data = S3C6400_SERIAL_DRV_DATA,
1638 }, {
1639 .name = "s5pv210-uart",
1640 .driver_data = S5PV210_SERIAL_DRV_DATA,
1641 }, {
1642 .name = "exynos4210-uart",
1643 .driver_data = EXYNOS4210_SERIAL_DRV_DATA,
1644 },
1645 { },
1646};
1647MODULE_DEVICE_TABLE(platform, s3c24xx_serial_driver_ids);
1564 1648
1565 register_console(&s3c24xx_serial_console); 1649#ifdef CONFIG_OF
1566 return 0; 1650static const struct of_device_id s3c24xx_uart_dt_match[] = {
1651 { .compatible = "samsung,exynos4210-uart",
1652 .data = (void *)EXYNOS4210_SERIAL_DRV_DATA },
1653 {},
1654};
1655MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match);
1656#else
1657#define s3c24xx_uart_dt_match NULL
1658#endif
1659
1660static struct platform_driver samsung_serial_driver = {
1661 .probe = s3c24xx_serial_probe,
1662 .remove = __devexit_p(s3c24xx_serial_remove),
1663 .id_table = s3c24xx_serial_driver_ids,
1664 .driver = {
1665 .name = "samsung-uart",
1666 .owner = THIS_MODULE,
1667 .pm = SERIAL_SAMSUNG_PM_OPS,
1668 .of_match_table = s3c24xx_uart_dt_match,
1669 },
1670};
1671
1672/* module initialisation code */
1673
1674static int __init s3c24xx_serial_modinit(void)
1675{
1676 int ret;
1677
1678 ret = uart_register_driver(&s3c24xx_uart_drv);
1679 if (ret < 0) {
1680 printk(KERN_ERR "failed to register UART driver\n");
1681 return -1;
1682 }
1683
1684 return platform_driver_register(&samsung_serial_driver);
1567} 1685}
1568 1686
1569#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ 1687static void __exit s3c24xx_serial_modexit(void)
1688{
1689 uart_unregister_driver(&s3c24xx_uart_drv);
1690}
1691
1692module_init(s3c24xx_serial_modinit);
1693module_exit(s3c24xx_serial_modexit);
1570 1694
1695MODULE_ALIAS("platform:samsung-uart");
1571MODULE_DESCRIPTION("Samsung SoC Serial port driver"); 1696MODULE_DESCRIPTION("Samsung SoC Serial port driver");
1572MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 1697MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1573MODULE_LICENSE("GPL v2"); 1698MODULE_LICENSE("GPL v2");
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index 8e87b788e5c6..1a4bca3e4179 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -19,20 +19,25 @@ struct s3c24xx_uart_info {
19 unsigned long tx_fifomask; 19 unsigned long tx_fifomask;
20 unsigned long tx_fifoshift; 20 unsigned long tx_fifoshift;
21 unsigned long tx_fifofull; 21 unsigned long tx_fifofull;
22 unsigned int def_clk_sel;
23 unsigned long num_clks;
24 unsigned long clksel_mask;
25 unsigned long clksel_shift;
22 26
23 /* uart port features */ 27 /* uart port features */
24 28
25 unsigned int has_divslot:1; 29 unsigned int has_divslot:1;
26 30
27 /* clock source control */
28
29 int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
30 int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
31
32 /* uart controls */ 31 /* uart controls */
33 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); 32 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
34}; 33};
35 34
35struct s3c24xx_serial_drv_data {
36 struct s3c24xx_uart_info *info;
37 struct s3c2410_uartcfg *def_cfg;
38 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
39};
40
36struct s3c24xx_uart_port { 41struct s3c24xx_uart_port {
37 unsigned char rx_claimed; 42 unsigned char rx_claimed;
38 unsigned char tx_claimed; 43 unsigned char tx_claimed;
@@ -43,10 +48,13 @@ struct s3c24xx_uart_port {
43 unsigned int tx_irq; 48 unsigned int tx_irq;
44 49
45 struct s3c24xx_uart_info *info; 50 struct s3c24xx_uart_info *info;
46 struct s3c24xx_uart_clksrc *clksrc;
47 struct clk *clk; 51 struct clk *clk;
48 struct clk *baudclk; 52 struct clk *baudclk;
49 struct uart_port port; 53 struct uart_port port;
54 struct s3c24xx_serial_drv_data *drv_data;
55
56 /* reference to platform data */
57 struct s3c2410_uartcfg *cfg;
50 58
51#ifdef CONFIG_CPU_FREQ 59#ifdef CONFIG_CPU_FREQ
52 struct notifier_block freq_transition; 60 struct notifier_block freq_transition;
@@ -56,7 +64,6 @@ struct s3c24xx_uart_port {
56/* conversion functions */ 64/* conversion functions */
57 65
58#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) 66#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev)
59#define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data)
60 67
61/* register access controls */ 68/* register access controls */
62 69
@@ -69,17 +76,6 @@ struct s3c24xx_uart_port {
69#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) 76#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
70#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) 77#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
71 78
72extern int s3c24xx_serial_probe(struct platform_device *dev,
73 struct s3c24xx_uart_info *uart);
74
75extern int __devexit s3c24xx_serial_remove(struct platform_device *dev);
76
77extern int s3c24xx_serial_initconsole(struct platform_driver *drv,
78 struct s3c24xx_uart_info **uart);
79
80extern int s3c24xx_serial_init(struct platform_driver *drv,
81 struct s3c24xx_uart_info *info);
82
83#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG 79#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG
84 80
85extern void printascii(const char *); 81extern void printascii(const char *);
diff --git a/drivers/tty/serial/sc26xx.c b/drivers/tty/serial/sc26xx.c
index 75038ad2b242..e0b4b0a30a5a 100644
--- a/drivers/tty/serial/sc26xx.c
+++ b/drivers/tty/serial/sc26xx.c
@@ -736,19 +736,7 @@ static struct platform_driver sc26xx_driver = {
736 }, 736 },
737}; 737};
738 738
739static int __init sc26xx_init(void) 739module_platform_driver(sc26xx_driver);
740{
741 return platform_driver_register(&sc26xx_driver);
742}
743
744static void __exit sc26xx_exit(void)
745{
746 platform_driver_unregister(&sc26xx_driver);
747}
748
749module_init(sc26xx_init);
750module_exit(sc26xx_exit);
751
752 740
753MODULE_AUTHOR("Thomas Bogendörfer"); 741MODULE_AUTHOR("Thomas Bogendörfer");
754MODULE_DESCRIPTION("SC681/SC2692 serial driver"); 742MODULE_DESCRIPTION("SC681/SC2692 serial driver");
diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 0406d7ff505e..c7bf31a6a7e7 100644
--- a/drivers/tty/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
@@ -22,6 +22,7 @@
22 */ 22 */
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/tty.h> 24#include <linux/tty.h>
25#include <linux/tty_flip.h>
25#include <linux/slab.h> 26#include <linux/slab.h>
26#include <linux/init.h> 27#include <linux/init.h>
27#include <linux/console.h> 28#include <linux/console.h>
@@ -60,6 +61,8 @@ static void uart_change_speed(struct tty_struct *tty, struct uart_state *state,
60static void uart_wait_until_sent(struct tty_struct *tty, int timeout); 61static void uart_wait_until_sent(struct tty_struct *tty, int timeout);
61static void uart_change_pm(struct uart_state *state, int pm_state); 62static void uart_change_pm(struct uart_state *state, int pm_state);
62 63
64static void uart_port_shutdown(struct tty_port *port);
65
63/* 66/*
64 * This routine is used by the interrupt handler to schedule processing in 67 * This routine is used by the interrupt handler to schedule processing in
65 * the software interrupt portion of the driver. 68 * the software interrupt portion of the driver.
@@ -128,25 +131,16 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear)
128 * Startup the port. This will be called once per open. All calls 131 * Startup the port. This will be called once per open. All calls
129 * will be serialised by the per-port mutex. 132 * will be serialised by the per-port mutex.
130 */ 133 */
131static int uart_startup(struct tty_struct *tty, struct uart_state *state, int init_hw) 134static int uart_port_startup(struct tty_struct *tty, struct uart_state *state,
135 int init_hw)
132{ 136{
133 struct uart_port *uport = state->uart_port; 137 struct uart_port *uport = state->uart_port;
134 struct tty_port *port = &state->port; 138 struct tty_port *port = &state->port;
135 unsigned long page; 139 unsigned long page;
136 int retval = 0; 140 int retval = 0;
137 141
138 if (port->flags & ASYNC_INITIALIZED)
139 return 0;
140
141 /*
142 * Set the TTY IO error marker - we will only clear this
143 * once we have successfully opened the port. Also set
144 * up the tty->alt_speed kludge
145 */
146 set_bit(TTY_IO_ERROR, &tty->flags);
147
148 if (uport->type == PORT_UNKNOWN) 142 if (uport->type == PORT_UNKNOWN)
149 return 0; 143 return 1;
150 144
151 /* 145 /*
152 * Initialise and allocate the transmit and temporary 146 * Initialise and allocate the transmit and temporary
@@ -188,10 +182,6 @@ static int uart_startup(struct tty_struct *tty, struct uart_state *state, int in
188 tty->hw_stopped = 1; 182 tty->hw_stopped = 1;
189 spin_unlock_irq(&uport->lock); 183 spin_unlock_irq(&uport->lock);
190 } 184 }
191
192 set_bit(ASYNCB_INITIALIZED, &port->flags);
193
194 clear_bit(TTY_IO_ERROR, &tty->flags);
195 } 185 }
196 186
197 /* 187 /*
@@ -200,6 +190,31 @@ static int uart_startup(struct tty_struct *tty, struct uart_state *state, int in
200 * now. 190 * now.
201 */ 191 */
202 if (retval && capable(CAP_SYS_ADMIN)) 192 if (retval && capable(CAP_SYS_ADMIN))
193 return 1;
194
195 return retval;
196}
197
198static int uart_startup(struct tty_struct *tty, struct uart_state *state,
199 int init_hw)
200{
201 struct tty_port *port = &state->port;
202 int retval;
203
204 if (port->flags & ASYNC_INITIALIZED)
205 return 0;
206
207 /*
208 * Set the TTY IO error marker - we will only clear this
209 * once we have successfully opened the port.
210 */
211 set_bit(TTY_IO_ERROR, &tty->flags);
212
213 retval = uart_port_startup(tty, state, init_hw);
214 if (!retval) {
215 set_bit(ASYNCB_INITIALIZED, &port->flags);
216 clear_bit(TTY_IO_ERROR, &tty->flags);
217 } else if (retval > 0)
203 retval = 0; 218 retval = 0;
204 219
205 return retval; 220 return retval;
@@ -228,24 +243,7 @@ static void uart_shutdown(struct tty_struct *tty, struct uart_state *state)
228 if (!tty || (tty->termios->c_cflag & HUPCL)) 243 if (!tty || (tty->termios->c_cflag & HUPCL))
229 uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS); 244 uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
230 245
231 /* 246 uart_port_shutdown(port);
232 * clear delta_msr_wait queue to avoid mem leaks: we may free
233 * the irq here so the queue might never be woken up. Note
234 * that we won't end up waiting on delta_msr_wait again since
235 * any outstanding file descriptors should be pointing at
236 * hung_up_tty_fops now.
237 */
238 wake_up_interruptible(&port->delta_msr_wait);
239
240 /*
241 * Free the IRQ and disable the port.
242 */
243 uport->ops->shutdown(uport);
244
245 /*
246 * Ensure that the IRQ handler isn't running on another CPU.
247 */
248 synchronize_irq(uport->irq);
249 } 247 }
250 248
251 /* 249 /*
@@ -423,7 +421,7 @@ uart_get_divisor(struct uart_port *port, unsigned int baud)
423 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) 421 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
424 quot = port->custom_divisor; 422 quot = port->custom_divisor;
425 else 423 else
426 quot = (port->uartclk + (8 * baud)) / (16 * baud); 424 quot = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud);
427 425
428 return quot; 426 return quot;
429} 427}
@@ -658,10 +656,10 @@ static int uart_get_info(struct uart_state *state,
658 tmp.flags = uport->flags; 656 tmp.flags = uport->flags;
659 tmp.xmit_fifo_size = uport->fifosize; 657 tmp.xmit_fifo_size = uport->fifosize;
660 tmp.baud_base = uport->uartclk / 16; 658 tmp.baud_base = uport->uartclk / 16;
661 tmp.close_delay = port->close_delay / 10; 659 tmp.close_delay = jiffies_to_msecs(port->close_delay) / 10;
662 tmp.closing_wait = port->closing_wait == ASYNC_CLOSING_WAIT_NONE ? 660 tmp.closing_wait = port->closing_wait == ASYNC_CLOSING_WAIT_NONE ?
663 ASYNC_CLOSING_WAIT_NONE : 661 ASYNC_CLOSING_WAIT_NONE :
664 port->closing_wait / 10; 662 jiffies_to_msecs(port->closing_wait) / 10;
665 tmp.custom_divisor = uport->custom_divisor; 663 tmp.custom_divisor = uport->custom_divisor;
666 tmp.hub6 = uport->hub6; 664 tmp.hub6 = uport->hub6;
667 tmp.io_type = uport->iotype; 665 tmp.io_type = uport->iotype;
@@ -695,9 +693,10 @@ static int uart_set_info(struct tty_struct *tty, struct uart_state *state,
695 new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET; 693 new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
696 694
697 new_serial.irq = irq_canonicalize(new_serial.irq); 695 new_serial.irq = irq_canonicalize(new_serial.irq);
698 close_delay = new_serial.close_delay * 10; 696 close_delay = msecs_to_jiffies(new_serial.close_delay * 10);
699 closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ? 697 closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ?
700 ASYNC_CLOSING_WAIT_NONE : new_serial.closing_wait * 10; 698 ASYNC_CLOSING_WAIT_NONE :
699 msecs_to_jiffies(new_serial.closing_wait * 10);
701 700
702 /* 701 /*
703 * This semaphore protects port->count. It is also 702 * This semaphore protects port->count. It is also
@@ -1265,47 +1264,8 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1265 1264
1266 pr_debug("uart_close(%d) called\n", uport->line); 1265 pr_debug("uart_close(%d) called\n", uport->line);
1267 1266
1268 spin_lock_irqsave(&port->lock, flags); 1267 if (tty_port_close_start(port, tty, filp) == 0)
1269
1270 if (tty_hung_up_p(filp)) {
1271 spin_unlock_irqrestore(&port->lock, flags);
1272 return; 1268 return;
1273 }
1274
1275 if ((tty->count == 1) && (port->count != 1)) {
1276 /*
1277 * Uh, oh. tty->count is 1, which means that the tty
1278 * structure will be freed. port->count should always
1279 * be one in these conditions. If it's greater than
1280 * one, we've got real problems, since it means the
1281 * serial port won't be shutdown.
1282 */
1283 printk(KERN_ERR "uart_close: bad serial port count; tty->count is 1, "
1284 "port->count is %d\n", port->count);
1285 port->count = 1;
1286 }
1287 if (--port->count < 0) {
1288 printk(KERN_ERR "uart_close: bad serial port count for %s: %d\n",
1289 tty->name, port->count);
1290 port->count = 0;
1291 }
1292 if (port->count) {
1293 spin_unlock_irqrestore(&port->lock, flags);
1294 return;
1295 }
1296
1297 /*
1298 * Now we wait for the transmit buffer to clear; and we notify
1299 * the line discipline to only process XON/XOFF characters by
1300 * setting tty->closing.
1301 */
1302 set_bit(ASYNCB_CLOSING, &port->flags);
1303 tty->closing = 1;
1304 spin_unlock_irqrestore(&port->lock, flags);
1305
1306 if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1307 tty_wait_until_sent_from_close(tty,
1308 msecs_to_jiffies(port->closing_wait));
1309 1269
1310 /* 1270 /*
1311 * At this point, we stop accepting input. To do this, we 1271 * At this point, we stop accepting input. To do this, we
@@ -1337,7 +1297,8 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1337 if (port->blocked_open) { 1297 if (port->blocked_open) {
1338 spin_unlock_irqrestore(&port->lock, flags); 1298 spin_unlock_irqrestore(&port->lock, flags);
1339 if (port->close_delay) 1299 if (port->close_delay)
1340 msleep_interruptible(port->close_delay); 1300 msleep_interruptible(
1301 jiffies_to_msecs(port->close_delay));
1341 spin_lock_irqsave(&port->lock, flags); 1302 spin_lock_irqsave(&port->lock, flags);
1342 } else if (!uart_console(uport)) { 1303 } else if (!uart_console(uport)) {
1343 spin_unlock_irqrestore(&port->lock, flags); 1304 spin_unlock_irqrestore(&port->lock, flags);
@@ -1441,6 +1402,36 @@ static void uart_hangup(struct tty_struct *tty)
1441 mutex_unlock(&port->mutex); 1402 mutex_unlock(&port->mutex);
1442} 1403}
1443 1404
1405static int uart_port_activate(struct tty_port *port, struct tty_struct *tty)
1406{
1407 return 0;
1408}
1409
1410static void uart_port_shutdown(struct tty_port *port)
1411{
1412 struct uart_state *state = container_of(port, struct uart_state, port);
1413 struct uart_port *uport = state->uart_port;
1414
1415 /*
1416 * clear delta_msr_wait queue to avoid mem leaks: we may free
1417 * the irq here so the queue might never be woken up. Note
1418 * that we won't end up waiting on delta_msr_wait again since
1419 * any outstanding file descriptors should be pointing at
1420 * hung_up_tty_fops now.
1421 */
1422 wake_up_interruptible(&port->delta_msr_wait);
1423
1424 /*
1425 * Free the IRQ and disable the port.
1426 */
1427 uport->ops->shutdown(uport);
1428
1429 /*
1430 * Ensure that the IRQ handler isn't running on another CPU.
1431 */
1432 synchronize_irq(uport->irq);
1433}
1434
1444static int uart_carrier_raised(struct tty_port *port) 1435static int uart_carrier_raised(struct tty_port *port)
1445{ 1436{
1446 struct uart_state *state = container_of(port, struct uart_state, port); 1437 struct uart_state *state = container_of(port, struct uart_state, port);
@@ -1466,33 +1457,6 @@ static void uart_dtr_rts(struct tty_port *port, int onoff)
1466 uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS); 1457 uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
1467} 1458}
1468 1459
1469static struct uart_state *uart_get(struct uart_driver *drv, int line)
1470{
1471 struct uart_state *state;
1472 struct tty_port *port;
1473 int ret = 0;
1474
1475 state = drv->state + line;
1476 port = &state->port;
1477 if (mutex_lock_interruptible(&port->mutex)) {
1478 ret = -ERESTARTSYS;
1479 goto err;
1480 }
1481
1482 port->count++;
1483 if (!state->uart_port || state->uart_port->flags & UPF_DEAD) {
1484 ret = -ENXIO;
1485 goto err_unlock;
1486 }
1487 return state;
1488
1489 err_unlock:
1490 port->count--;
1491 mutex_unlock(&port->mutex);
1492 err:
1493 return ERR_PTR(ret);
1494}
1495
1496/* 1460/*
1497 * calls to uart_open are serialised by the BKL in 1461 * calls to uart_open are serialised by the BKL in
1498 * fs/char_dev.c:chrdev_open() 1462 * fs/char_dev.c:chrdev_open()
@@ -1506,26 +1470,29 @@ static struct uart_state *uart_get(struct uart_driver *drv, int line)
1506static int uart_open(struct tty_struct *tty, struct file *filp) 1470static int uart_open(struct tty_struct *tty, struct file *filp)
1507{ 1471{
1508 struct uart_driver *drv = (struct uart_driver *)tty->driver->driver_state; 1472 struct uart_driver *drv = (struct uart_driver *)tty->driver->driver_state;
1509 struct uart_state *state;
1510 struct tty_port *port;
1511 int retval, line = tty->index; 1473 int retval, line = tty->index;
1474 struct uart_state *state = drv->state + line;
1475 struct tty_port *port = &state->port;
1512 1476
1513 pr_debug("uart_open(%d) called\n", line); 1477 pr_debug("uart_open(%d) called\n", line);
1514 1478
1515 /* 1479 /*
1516 * We take the semaphore inside uart_get to guarantee that we won't 1480 * We take the semaphore here to guarantee that we won't be re-entered
1517 * be re-entered while allocating the state structure, or while we 1481 * while allocating the state structure, or while we request any IRQs
1518 * request any IRQs that the driver may need. This also has the nice 1482 * that the driver may need. This also has the nice side-effect that
1519 * side-effect that it delays the action of uart_hangup, so we can 1483 * it delays the action of uart_hangup, so we can guarantee that
1520 * guarantee that state->port.tty will always contain something 1484 * state->port.tty will always contain something reasonable.
1521 * reasonable.
1522 */ 1485 */
1523 state = uart_get(drv, line); 1486 if (mutex_lock_interruptible(&port->mutex)) {
1524 if (IS_ERR(state)) { 1487 retval = -ERESTARTSYS;
1525 retval = PTR_ERR(state); 1488 goto end;
1526 goto fail; 1489 }
1490
1491 port->count++;
1492 if (!state->uart_port || state->uart_port->flags & UPF_DEAD) {
1493 retval = -ENXIO;
1494 goto err_dec_count;
1527 } 1495 }
1528 port = &state->port;
1529 1496
1530 /* 1497 /*
1531 * Once we set tty->driver_data here, we are guaranteed that 1498 * Once we set tty->driver_data here, we are guaranteed that
@@ -1535,7 +1502,6 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
1535 tty->driver_data = state; 1502 tty->driver_data = state;
1536 state->uart_port->state = state; 1503 state->uart_port->state = state;
1537 tty->low_latency = (state->uart_port->flags & UPF_LOW_LATENCY) ? 1 : 0; 1504 tty->low_latency = (state->uart_port->flags & UPF_LOW_LATENCY) ? 1 : 0;
1538 tty->alt_speed = 0;
1539 tty_port_tty_set(port, tty); 1505 tty_port_tty_set(port, tty);
1540 1506
1541 /* 1507 /*
@@ -1543,9 +1509,7 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
1543 */ 1509 */
1544 if (tty_hung_up_p(filp)) { 1510 if (tty_hung_up_p(filp)) {
1545 retval = -EAGAIN; 1511 retval = -EAGAIN;
1546 port->count--; 1512 goto err_dec_count;
1547 mutex_unlock(&port->mutex);
1548 goto fail;
1549 } 1513 }
1550 1514
1551 /* 1515 /*
@@ -1566,8 +1530,12 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
1566 if (retval == 0) 1530 if (retval == 0)
1567 retval = tty_port_block_til_ready(port, tty, filp); 1531 retval = tty_port_block_til_ready(port, tty, filp);
1568 1532
1569fail: 1533end:
1570 return retval; 1534 return retval;
1535err_dec_count:
1536 port->count--;
1537 mutex_unlock(&port->mutex);
1538 goto end;
1571} 1539}
1572 1540
1573static const char *uart_type(struct uart_port *port) 1541static const char *uart_type(struct uart_port *port)
@@ -1858,6 +1826,14 @@ uart_set_options(struct uart_port *port, struct console *co,
1858EXPORT_SYMBOL_GPL(uart_set_options); 1826EXPORT_SYMBOL_GPL(uart_set_options);
1859#endif /* CONFIG_SERIAL_CORE_CONSOLE */ 1827#endif /* CONFIG_SERIAL_CORE_CONSOLE */
1860 1828
1829/**
1830 * uart_change_pm - set power state of the port
1831 *
1832 * @state: port descriptor
1833 * @pm_state: new state
1834 *
1835 * Locking: port->mutex has to be held
1836 */
1861static void uart_change_pm(struct uart_state *state, int pm_state) 1837static void uart_change_pm(struct uart_state *state, int pm_state)
1862{ 1838{
1863 struct uart_port *port = state->uart_port; 1839 struct uart_port *port = state->uart_port;
@@ -2214,6 +2190,8 @@ static const struct tty_operations uart_ops = {
2214}; 2190};
2215 2191
2216static const struct tty_port_operations uart_port_ops = { 2192static const struct tty_port_operations uart_port_ops = {
2193 .activate = uart_port_activate,
2194 .shutdown = uart_port_shutdown,
2217 .carrier_raised = uart_carrier_raised, 2195 .carrier_raised = uart_carrier_raised,
2218 .dtr_rts = uart_dtr_rts, 2196 .dtr_rts = uart_dtr_rts,
2219}; 2197};
@@ -2275,8 +2253,8 @@ int uart_register_driver(struct uart_driver *drv)
2275 2253
2276 tty_port_init(port); 2254 tty_port_init(port);
2277 port->ops = &uart_port_ops; 2255 port->ops = &uart_port_ops;
2278 port->close_delay = 500; /* .5 seconds */ 2256 port->close_delay = HZ / 2; /* .5 seconds */
2279 port->closing_wait = 30000; /* 30 seconds */ 2257 port->closing_wait = 30 * HZ;/* 30 seconds */
2280 } 2258 }
2281 2259
2282 retval = tty_register_driver(normal); 2260 retval = tty_register_driver(normal);
@@ -2467,6 +2445,99 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
2467} 2445}
2468EXPORT_SYMBOL(uart_match_port); 2446EXPORT_SYMBOL(uart_match_port);
2469 2447
2448/**
2449 * uart_handle_dcd_change - handle a change of carrier detect state
2450 * @uport: uart_port structure for the open port
2451 * @status: new carrier detect status, nonzero if active
2452 */
2453void uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
2454{
2455 struct uart_state *state = uport->state;
2456 struct tty_port *port = &state->port;
2457 struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
2458 struct pps_event_time ts;
2459
2460 if (ld && ld->ops->dcd_change)
2461 pps_get_ts(&ts);
2462
2463 uport->icount.dcd++;
2464#ifdef CONFIG_HARD_PPS
2465 if ((uport->flags & UPF_HARDPPS_CD) && status)
2466 hardpps();
2467#endif
2468
2469 if (port->flags & ASYNC_CHECK_CD) {
2470 if (status)
2471 wake_up_interruptible(&port->open_wait);
2472 else if (port->tty)
2473 tty_hangup(port->tty);
2474 }
2475
2476 if (ld && ld->ops->dcd_change)
2477 ld->ops->dcd_change(port->tty, status, &ts);
2478 if (ld)
2479 tty_ldisc_deref(ld);
2480}
2481EXPORT_SYMBOL_GPL(uart_handle_dcd_change);
2482
2483/**
2484 * uart_handle_cts_change - handle a change of clear-to-send state
2485 * @uport: uart_port structure for the open port
2486 * @status: new clear to send status, nonzero if active
2487 */
2488void uart_handle_cts_change(struct uart_port *uport, unsigned int status)
2489{
2490 struct tty_port *port = &uport->state->port;
2491 struct tty_struct *tty = port->tty;
2492
2493 uport->icount.cts++;
2494
2495 if (port->flags & ASYNC_CTS_FLOW) {
2496 if (tty->hw_stopped) {
2497 if (status) {
2498 tty->hw_stopped = 0;
2499 uport->ops->start_tx(uport);
2500 uart_write_wakeup(uport);
2501 }
2502 } else {
2503 if (!status) {
2504 tty->hw_stopped = 1;
2505 uport->ops->stop_tx(uport);
2506 }
2507 }
2508 }
2509}
2510EXPORT_SYMBOL_GPL(uart_handle_cts_change);
2511
2512/**
2513 * uart_insert_char - push a char to the uart layer
2514 *
2515 * User is responsible to call tty_flip_buffer_push when they are done with
2516 * insertion.
2517 *
2518 * @port: corresponding port
2519 * @status: state of the serial port RX buffer (LSR for 8250)
2520 * @overrun: mask of overrun bits in @status
2521 * @ch: character to push
2522 * @flag: flag for the character (see TTY_NORMAL and friends)
2523 */
2524void uart_insert_char(struct uart_port *port, unsigned int status,
2525 unsigned int overrun, unsigned int ch, unsigned int flag)
2526{
2527 struct tty_struct *tty = port->state->port.tty;
2528
2529 if ((status & port->ignore_status_mask & ~overrun) == 0)
2530 tty_insert_flip_char(tty, ch, flag);
2531
2532 /*
2533 * Overrun is special. Since it's reported immediately,
2534 * it doesn't affect the current character.
2535 */
2536 if (status & ~port->ignore_status_mask & overrun)
2537 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
2538}
2539EXPORT_SYMBOL_GPL(uart_insert_char);
2540
2470EXPORT_SYMBOL(uart_write_wakeup); 2541EXPORT_SYMBOL(uart_write_wakeup);
2471EXPORT_SYMBOL(uart_register_driver); 2542EXPORT_SYMBOL(uart_register_driver);
2472EXPORT_SYMBOL(uart_unregister_driver); 2543EXPORT_SYMBOL(uart_unregister_driver);
diff --git a/drivers/tty/serial/serial_cs.c b/drivers/tty/serial/serial_cs.c
index eef736ff810a..86090605a84e 100644
--- a/drivers/tty/serial/serial_cs.c
+++ b/drivers/tty/serial/serial_cs.c
@@ -317,7 +317,7 @@ static int serial_probe(struct pcmcia_device *link)
317 info->p_dev = link; 317 info->p_dev = link;
318 link->priv = info; 318 link->priv = info;
319 319
320 link->config_flags |= CONF_ENABLE_IRQ; 320 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
321 if (do_sound) 321 if (do_sound)
322 link->config_flags |= CONF_ENABLE_SPKR; 322 link->config_flags |= CONF_ENABLE_SPKR;
323 323
@@ -445,7 +445,7 @@ static int simple_config(struct pcmcia_device *link)
445 445
446 /* First pass: look for a config entry that looks normal. 446 /* First pass: look for a config entry that looks normal.
447 * Two tries: without IO aliases, then with aliases */ 447 * Two tries: without IO aliases, then with aliases */
448 link->config_flags |= CONF_AUTO_SET_VPP | CONF_AUTO_SET_IO; 448 link->config_flags |= CONF_AUTO_SET_VPP;
449 for (try = 0; try < 4; try++) 449 for (try = 0; try < 4; try++)
450 if (!pcmcia_loop_config(link, simple_config_check, &try)) 450 if (!pcmcia_loop_config(link, simple_config_check, &try))
451 goto found_port; 451 goto found_port;
@@ -501,7 +501,8 @@ static int multi_config_check_notpicky(struct pcmcia_device *p_dev,
501{ 501{
502 int *base2 = priv_data; 502 int *base2 = priv_data;
503 503
504 if (!p_dev->resource[0]->end || !p_dev->resource[1]->end) 504 if (!p_dev->resource[0]->end || !p_dev->resource[1]->end ||
505 p_dev->resource[0]->start + 8 != p_dev->resource[1]->start)
505 return -ENODEV; 506 return -ENODEV;
506 507
507 p_dev->resource[0]->end = p_dev->resource[1]->end = 8; 508 p_dev->resource[0]->end = p_dev->resource[1]->end = 8;
@@ -520,7 +521,6 @@ static int multi_config(struct pcmcia_device *link)
520 struct serial_info *info = link->priv; 521 struct serial_info *info = link->priv;
521 int i, base2 = 0; 522 int i, base2 = 0;
522 523
523 link->config_flags |= CONF_AUTO_SET_IO;
524 /* First, look for a generic full-sized window */ 524 /* First, look for a generic full-sized window */
525 if (!pcmcia_loop_config(link, multi_config_check, &info->multi)) 525 if (!pcmcia_loop_config(link, multi_config_check, &info->multi))
526 base2 = link->resource[0]->start + 8; 526 base2 = link->resource[0]->start + 8;
diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
new file mode 100644
index 000000000000..a60523fee11b
--- /dev/null
+++ b/drivers/tty/serial/sirfsoc_uart.c
@@ -0,0 +1,783 @@
1/*
2 * Driver for CSR SiRFprimaII onboard UARTs.
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/module.h>
10#include <linux/ioport.h>
11#include <linux/platform_device.h>
12#include <linux/init.h>
13#include <linux/sysrq.h>
14#include <linux/console.h>
15#include <linux/tty.h>
16#include <linux/tty_flip.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19#include <linux/clk.h>
20#include <linux/of.h>
21#include <linux/slab.h>
22#include <linux/io.h>
23#include <asm/irq.h>
24#include <asm/mach/irq.h>
25#include <linux/pinctrl/pinmux.h>
26
27#include "sirfsoc_uart.h"
28
29static unsigned int
30sirfsoc_uart_pio_tx_chars(struct sirfsoc_uart_port *sirfport, int count);
31static unsigned int
32sirfsoc_uart_pio_rx_chars(struct uart_port *port, unsigned int max_rx_count);
33static struct uart_driver sirfsoc_uart_drv;
34
35static const struct sirfsoc_baudrate_to_regv baudrate_to_regv[] = {
36 {4000000, 2359296},
37 {3500000, 1310721},
38 {3000000, 1572865},
39 {2500000, 1245186},
40 {2000000, 1572866},
41 {1500000, 1245188},
42 {1152000, 1638404},
43 {1000000, 1572869},
44 {921600, 1114120},
45 {576000, 1245196},
46 {500000, 1245198},
47 {460800, 1572876},
48 {230400, 1310750},
49 {115200, 1310781},
50 {57600, 1310843},
51 {38400, 1114328},
52 {19200, 1114545},
53 {9600, 1114979},
54};
55
56static struct sirfsoc_uart_port sirfsoc_uart_ports[SIRFSOC_UART_NR] = {
57 [0] = {
58 .port = {
59 .iotype = UPIO_MEM,
60 .flags = UPF_BOOT_AUTOCONF,
61 .line = 0,
62 },
63 },
64 [1] = {
65 .port = {
66 .iotype = UPIO_MEM,
67 .flags = UPF_BOOT_AUTOCONF,
68 .line = 1,
69 },
70 },
71 [2] = {
72 .port = {
73 .iotype = UPIO_MEM,
74 .flags = UPF_BOOT_AUTOCONF,
75 .line = 2,
76 },
77 },
78};
79
80static inline struct sirfsoc_uart_port *to_sirfport(struct uart_port *port)
81{
82 return container_of(port, struct sirfsoc_uart_port, port);
83}
84
85static inline unsigned int sirfsoc_uart_tx_empty(struct uart_port *port)
86{
87 unsigned long reg;
88 reg = rd_regl(port, SIRFUART_TX_FIFO_STATUS);
89 if (reg & SIRFUART_FIFOEMPTY_MASK(port))
90 return TIOCSER_TEMT;
91 else
92 return 0;
93}
94
95static unsigned int sirfsoc_uart_get_mctrl(struct uart_port *port)
96{
97 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
98 if (!(sirfport->ms_enabled)) {
99 goto cts_asserted;
100 } else if (sirfport->hw_flow_ctrl) {
101 if (!(rd_regl(port, SIRFUART_AFC_CTRL) &
102 SIRFUART_CTS_IN_STATUS))
103 goto cts_asserted;
104 else
105 goto cts_deasserted;
106 }
107cts_deasserted:
108 return TIOCM_CAR | TIOCM_DSR;
109cts_asserted:
110 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
111}
112
113static void sirfsoc_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
114{
115 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
116 unsigned int assert = mctrl & TIOCM_RTS;
117 unsigned int val = assert ? SIRFUART_AFC_CTRL_RX_THD : 0x0;
118 unsigned int current_val;
119 if (sirfport->hw_flow_ctrl) {
120 current_val = rd_regl(port, SIRFUART_AFC_CTRL) & ~0xFF;
121 val |= current_val;
122 wr_regl(port, SIRFUART_AFC_CTRL, val);
123 }
124}
125
126static void sirfsoc_uart_stop_tx(struct uart_port *port)
127{
128 unsigned int regv;
129 regv = rd_regl(port, SIRFUART_INT_EN);
130 wr_regl(port, SIRFUART_INT_EN, regv & ~SIRFUART_TX_INT_EN);
131}
132
133void sirfsoc_uart_start_tx(struct uart_port *port)
134{
135 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
136 unsigned long regv;
137 sirfsoc_uart_pio_tx_chars(sirfport, 1);
138 wr_regl(port, SIRFUART_TX_FIFO_OP, SIRFUART_TX_FIFO_START);
139 regv = rd_regl(port, SIRFUART_INT_EN);
140 wr_regl(port, SIRFUART_INT_EN, regv | SIRFUART_TX_INT_EN);
141}
142
143static void sirfsoc_uart_stop_rx(struct uart_port *port)
144{
145 unsigned long regv;
146 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
147 regv = rd_regl(port, SIRFUART_INT_EN);
148 wr_regl(port, SIRFUART_INT_EN, regv & ~SIRFUART_RX_IO_INT_EN);
149}
150
151static void sirfsoc_uart_disable_ms(struct uart_port *port)
152{
153 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
154 unsigned long reg;
155 sirfport->ms_enabled = 0;
156 if (!sirfport->hw_flow_ctrl)
157 return;
158 reg = rd_regl(port, SIRFUART_AFC_CTRL);
159 wr_regl(port, SIRFUART_AFC_CTRL, reg & ~0x3FF);
160 reg = rd_regl(port, SIRFUART_INT_EN);
161 wr_regl(port, SIRFUART_INT_EN, reg & ~SIRFUART_CTS_INT_EN);
162}
163
164static void sirfsoc_uart_enable_ms(struct uart_port *port)
165{
166 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
167 unsigned long reg;
168 unsigned long flg;
169 if (!sirfport->hw_flow_ctrl)
170 return;
171 flg = SIRFUART_AFC_RX_EN | SIRFUART_AFC_TX_EN;
172 reg = rd_regl(port, SIRFUART_AFC_CTRL);
173 wr_regl(port, SIRFUART_AFC_CTRL, reg | flg);
174 reg = rd_regl(port, SIRFUART_INT_EN);
175 wr_regl(port, SIRFUART_INT_EN, reg | SIRFUART_CTS_INT_EN);
176 uart_handle_cts_change(port,
177 !(rd_regl(port, SIRFUART_AFC_CTRL) & SIRFUART_CTS_IN_STATUS));
178 sirfport->ms_enabled = 1;
179}
180
181static void sirfsoc_uart_break_ctl(struct uart_port *port, int break_state)
182{
183 unsigned long ulcon = rd_regl(port, SIRFUART_LINE_CTRL);
184 if (break_state)
185 ulcon |= SIRFUART_SET_BREAK;
186 else
187 ulcon &= ~SIRFUART_SET_BREAK;
188 wr_regl(port, SIRFUART_LINE_CTRL, ulcon);
189}
190
191static unsigned int
192sirfsoc_uart_pio_rx_chars(struct uart_port *port, unsigned int max_rx_count)
193{
194 unsigned int ch, rx_count = 0;
195 struct tty_struct *tty;
196
197 tty = tty_port_tty_get(&port->state->port);
198 if (!tty)
199 return -ENODEV;
200
201 while (!(rd_regl(port, SIRFUART_RX_FIFO_STATUS) &
202 SIRFUART_FIFOEMPTY_MASK(port))) {
203 ch = rd_regl(port, SIRFUART_RX_FIFO_DATA) | SIRFUART_DUMMY_READ;
204 if (unlikely(uart_handle_sysrq_char(port, ch)))
205 continue;
206 uart_insert_char(port, 0, 0, ch, TTY_NORMAL);
207 rx_count++;
208 if (rx_count >= max_rx_count)
209 break;
210 }
211
212 port->icount.rx += rx_count;
213 tty_flip_buffer_push(tty);
214 tty_kref_put(tty);
215
216 return rx_count;
217}
218
219static unsigned int
220sirfsoc_uart_pio_tx_chars(struct sirfsoc_uart_port *sirfport, int count)
221{
222 struct uart_port *port = &sirfport->port;
223 struct circ_buf *xmit = &port->state->xmit;
224 unsigned int num_tx = 0;
225 while (!uart_circ_empty(xmit) &&
226 !(rd_regl(port, SIRFUART_TX_FIFO_STATUS) &
227 SIRFUART_FIFOFULL_MASK(port)) &&
228 count--) {
229 wr_regl(port, SIRFUART_TX_FIFO_DATA, xmit->buf[xmit->tail]);
230 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
231 port->icount.tx++;
232 num_tx++;
233 }
234 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
235 uart_write_wakeup(port);
236 return num_tx;
237}
238
239static irqreturn_t sirfsoc_uart_isr(int irq, void *dev_id)
240{
241 unsigned long intr_status;
242 unsigned long cts_status;
243 unsigned long flag = TTY_NORMAL;
244 struct sirfsoc_uart_port *sirfport = (struct sirfsoc_uart_port *)dev_id;
245 struct uart_port *port = &sirfport->port;
246 struct uart_state *state = port->state;
247 struct circ_buf *xmit = &port->state->xmit;
248 intr_status = rd_regl(port, SIRFUART_INT_STATUS);
249 wr_regl(port, SIRFUART_INT_STATUS, intr_status);
250 intr_status &= rd_regl(port, SIRFUART_INT_EN);
251 if (unlikely(intr_status & (SIRFUART_ERR_INT_STAT))) {
252 if (intr_status & SIRFUART_RXD_BREAK) {
253 if (uart_handle_break(port))
254 goto recv_char;
255 uart_insert_char(port, intr_status,
256 SIRFUART_RX_OFLOW, 0, TTY_BREAK);
257 return IRQ_HANDLED;
258 }
259 if (intr_status & SIRFUART_RX_OFLOW)
260 port->icount.overrun++;
261 if (intr_status & SIRFUART_FRM_ERR) {
262 port->icount.frame++;
263 flag = TTY_FRAME;
264 }
265 if (intr_status & SIRFUART_PARITY_ERR)
266 flag = TTY_PARITY;
267 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_RESET);
268 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
269 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_START);
270 intr_status &= port->read_status_mask;
271 uart_insert_char(port, intr_status,
272 SIRFUART_RX_OFLOW_INT, 0, flag);
273 }
274recv_char:
275 if (intr_status & SIRFUART_CTS_INT_EN) {
276 cts_status = !(rd_regl(port, SIRFUART_AFC_CTRL) &
277 SIRFUART_CTS_IN_STATUS);
278 if (cts_status != 0) {
279 uart_handle_cts_change(port, 1);
280 } else {
281 uart_handle_cts_change(port, 0);
282 wake_up_interruptible(&state->port.delta_msr_wait);
283 }
284 }
285 if (intr_status & SIRFUART_RX_IO_INT_EN)
286 sirfsoc_uart_pio_rx_chars(port, SIRFSOC_UART_IO_RX_MAX_CNT);
287 if (intr_status & SIRFUART_TX_INT_EN) {
288 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
289 return IRQ_HANDLED;
290 } else {
291 sirfsoc_uart_pio_tx_chars(sirfport,
292 SIRFSOC_UART_IO_TX_REASONABLE_CNT);
293 if ((uart_circ_empty(xmit)) &&
294 (rd_regl(port, SIRFUART_TX_FIFO_STATUS) &
295 SIRFUART_FIFOEMPTY_MASK(port)))
296 sirfsoc_uart_stop_tx(port);
297 }
298 }
299 return IRQ_HANDLED;
300}
301
302static void sirfsoc_uart_start_rx(struct uart_port *port)
303{
304 unsigned long regv;
305 regv = rd_regl(port, SIRFUART_INT_EN);
306 wr_regl(port, SIRFUART_INT_EN, regv | SIRFUART_RX_IO_INT_EN);
307 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_RESET);
308 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
309 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_START);
310}
311
312static unsigned int
313sirfsoc_calc_sample_div(unsigned long baud_rate,
314 unsigned long ioclk_rate, unsigned long *setted_baud)
315{
316 unsigned long min_delta = ~0UL;
317 unsigned short sample_div;
318 unsigned int regv = 0;
319 unsigned long ioclk_div;
320 unsigned long baud_tmp;
321 int temp_delta;
322
323 for (sample_div = SIRF_MIN_SAMPLE_DIV;
324 sample_div <= SIRF_MAX_SAMPLE_DIV; sample_div++) {
325 ioclk_div = (ioclk_rate / (baud_rate * (sample_div + 1))) - 1;
326 if (ioclk_div > SIRF_IOCLK_DIV_MAX)
327 continue;
328 baud_tmp = ioclk_rate / ((ioclk_div + 1) * (sample_div + 1));
329 temp_delta = baud_tmp - baud_rate;
330 temp_delta = (temp_delta > 0) ? temp_delta : -temp_delta;
331 if (temp_delta < min_delta) {
332 regv = regv & (~SIRF_IOCLK_DIV_MASK);
333 regv = regv | ioclk_div;
334 regv = regv & (~SIRF_SAMPLE_DIV_MASK);
335 regv = regv | (sample_div << SIRF_SAMPLE_DIV_SHIFT);
336 min_delta = temp_delta;
337 *setted_baud = baud_tmp;
338 }
339 }
340 return regv;
341}
342
343static void sirfsoc_uart_set_termios(struct uart_port *port,
344 struct ktermios *termios,
345 struct ktermios *old)
346{
347 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
348 unsigned long ioclk_rate;
349 unsigned long config_reg = 0;
350 unsigned long baud_rate;
351 unsigned long setted_baud;
352 unsigned long flags;
353 unsigned long ic;
354 unsigned int clk_div_reg = 0;
355 unsigned long temp_reg_val;
356 unsigned long rx_time_out;
357 int threshold_div;
358 int temp;
359
360 ioclk_rate = 150000000;
361 switch (termios->c_cflag & CSIZE) {
362 default:
363 case CS8:
364 config_reg |= SIRFUART_DATA_BIT_LEN_8;
365 break;
366 case CS7:
367 config_reg |= SIRFUART_DATA_BIT_LEN_7;
368 break;
369 case CS6:
370 config_reg |= SIRFUART_DATA_BIT_LEN_6;
371 break;
372 case CS5:
373 config_reg |= SIRFUART_DATA_BIT_LEN_5;
374 break;
375 }
376 if (termios->c_cflag & CSTOPB)
377 config_reg |= SIRFUART_STOP_BIT_LEN_2;
378 baud_rate = uart_get_baud_rate(port, termios, old, 0, 4000000);
379 spin_lock_irqsave(&port->lock, flags);
380 port->read_status_mask = SIRFUART_RX_OFLOW_INT;
381 port->ignore_status_mask = 0;
382 /* read flags */
383 if (termios->c_iflag & INPCK)
384 port->read_status_mask |=
385 SIRFUART_FRM_ERR_INT | SIRFUART_PARITY_ERR_INT;
386 if (termios->c_iflag & (BRKINT | PARMRK))
387 port->read_status_mask |= SIRFUART_RXD_BREAK_INT;
388 /* ignore flags */
389 if (termios->c_iflag & IGNPAR)
390 port->ignore_status_mask |=
391 SIRFUART_FRM_ERR_INT | SIRFUART_PARITY_ERR_INT;
392 if ((termios->c_cflag & CREAD) == 0)
393 port->ignore_status_mask |= SIRFUART_DUMMY_READ;
394 /* enable parity if PARENB is set*/
395 if (termios->c_cflag & PARENB) {
396 if (termios->c_cflag & CMSPAR) {
397 if (termios->c_cflag & PARODD)
398 config_reg |= SIRFUART_STICK_BIT_MARK;
399 else
400 config_reg |= SIRFUART_STICK_BIT_SPACE;
401 } else if (termios->c_cflag & PARODD) {
402 config_reg |= SIRFUART_STICK_BIT_ODD;
403 } else {
404 config_reg |= SIRFUART_STICK_BIT_EVEN;
405 }
406 }
407 /* Hardware Flow Control Settings */
408 if (UART_ENABLE_MS(port, termios->c_cflag)) {
409 if (!sirfport->ms_enabled)
410 sirfsoc_uart_enable_ms(port);
411 } else {
412 if (sirfport->ms_enabled)
413 sirfsoc_uart_disable_ms(port);
414 }
415
416 /* common rate: fast calculation */
417 for (ic = 0; ic < SIRF_BAUD_RATE_SUPPORT_NR; ic++)
418 if (baud_rate == baudrate_to_regv[ic].baud_rate)
419 clk_div_reg = baudrate_to_regv[ic].reg_val;
420 setted_baud = baud_rate;
421 /* arbitary rate setting */
422 if (unlikely(clk_div_reg == 0))
423 clk_div_reg = sirfsoc_calc_sample_div(baud_rate, ioclk_rate,
424 &setted_baud);
425 wr_regl(port, SIRFUART_DIVISOR, clk_div_reg);
426
427 if (tty_termios_baud_rate(termios))
428 tty_termios_encode_baud_rate(termios, setted_baud, setted_baud);
429
430 /* set receive timeout */
431 rx_time_out = SIRFSOC_UART_RX_TIMEOUT(baud_rate, 20000);
432 rx_time_out = (rx_time_out > 0xFFFF) ? 0xFFFF : rx_time_out;
433 config_reg |= SIRFUART_RECV_TIMEOUT(rx_time_out);
434 temp_reg_val = rd_regl(port, SIRFUART_TX_FIFO_OP);
435 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
436 wr_regl(port, SIRFUART_TX_FIFO_OP,
437 temp_reg_val & ~SIRFUART_TX_FIFO_START);
438 wr_regl(port, SIRFUART_TX_DMA_IO_CTRL, SIRFUART_TX_MODE_IO);
439 wr_regl(port, SIRFUART_RX_DMA_IO_CTRL, SIRFUART_RX_MODE_IO);
440 wr_regl(port, SIRFUART_LINE_CTRL, config_reg);
441
442 /* Reset Rx/Tx FIFO Threshold level for proper baudrate */
443 if (baud_rate < 1000000)
444 threshold_div = 1;
445 else
446 threshold_div = 2;
447 temp = port->line == 1 ? 16 : 64;
448 wr_regl(port, SIRFUART_TX_FIFO_CTRL, temp / threshold_div);
449 wr_regl(port, SIRFUART_RX_FIFO_CTRL, temp / threshold_div);
450 temp_reg_val |= SIRFUART_TX_FIFO_START;
451 wr_regl(port, SIRFUART_TX_FIFO_OP, temp_reg_val);
452 uart_update_timeout(port, termios->c_cflag, baud_rate);
453 sirfsoc_uart_start_rx(port);
454 wr_regl(port, SIRFUART_TX_RX_EN, SIRFUART_TX_EN | SIRFUART_RX_EN);
455 spin_unlock_irqrestore(&port->lock, flags);
456}
457
458static void startup_uart_controller(struct uart_port *port)
459{
460 unsigned long temp_regv;
461 int temp;
462 temp_regv = rd_regl(port, SIRFUART_TX_DMA_IO_CTRL);
463 wr_regl(port, SIRFUART_TX_DMA_IO_CTRL, temp_regv | SIRFUART_TX_MODE_IO);
464 temp_regv = rd_regl(port, SIRFUART_RX_DMA_IO_CTRL);
465 wr_regl(port, SIRFUART_RX_DMA_IO_CTRL, temp_regv | SIRFUART_RX_MODE_IO);
466 wr_regl(port, SIRFUART_TX_DMA_IO_LEN, 0);
467 wr_regl(port, SIRFUART_RX_DMA_IO_LEN, 0);
468 wr_regl(port, SIRFUART_TX_RX_EN, SIRFUART_RX_EN | SIRFUART_TX_EN);
469 wr_regl(port, SIRFUART_TX_FIFO_OP, SIRFUART_TX_FIFO_RESET);
470 wr_regl(port, SIRFUART_TX_FIFO_OP, 0);
471 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_RESET);
472 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
473 temp = port->line == 1 ? 16 : 64;
474 wr_regl(port, SIRFUART_TX_FIFO_CTRL, temp);
475 wr_regl(port, SIRFUART_RX_FIFO_CTRL, temp);
476}
477
478static int sirfsoc_uart_startup(struct uart_port *port)
479{
480 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
481 unsigned int index = port->line;
482 int ret;
483 set_irq_flags(port->irq, IRQF_VALID | IRQF_NOAUTOEN);
484 ret = request_irq(port->irq,
485 sirfsoc_uart_isr,
486 0,
487 SIRFUART_PORT_NAME,
488 sirfport);
489 if (ret != 0) {
490 dev_err(port->dev, "UART%d request IRQ line (%d) failed.\n",
491 index, port->irq);
492 goto irq_err;
493 }
494 startup_uart_controller(port);
495 enable_irq(port->irq);
496irq_err:
497 return ret;
498}
499
500static void sirfsoc_uart_shutdown(struct uart_port *port)
501{
502 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
503 wr_regl(port, SIRFUART_INT_EN, 0);
504 free_irq(port->irq, sirfport);
505 if (sirfport->ms_enabled) {
506 sirfsoc_uart_disable_ms(port);
507 sirfport->ms_enabled = 0;
508 }
509}
510
511static const char *sirfsoc_uart_type(struct uart_port *port)
512{
513 return port->type == SIRFSOC_PORT_TYPE ? SIRFUART_PORT_NAME : NULL;
514}
515
516static int sirfsoc_uart_request_port(struct uart_port *port)
517{
518 void *ret;
519 ret = request_mem_region(port->mapbase,
520 SIRFUART_MAP_SIZE, SIRFUART_PORT_NAME);
521 return ret ? 0 : -EBUSY;
522}
523
524static void sirfsoc_uart_release_port(struct uart_port *port)
525{
526 release_mem_region(port->mapbase, SIRFUART_MAP_SIZE);
527}
528
529static void sirfsoc_uart_config_port(struct uart_port *port, int flags)
530{
531 if (flags & UART_CONFIG_TYPE) {
532 port->type = SIRFSOC_PORT_TYPE;
533 sirfsoc_uart_request_port(port);
534 }
535}
536
537static struct uart_ops sirfsoc_uart_ops = {
538 .tx_empty = sirfsoc_uart_tx_empty,
539 .get_mctrl = sirfsoc_uart_get_mctrl,
540 .set_mctrl = sirfsoc_uart_set_mctrl,
541 .stop_tx = sirfsoc_uart_stop_tx,
542 .start_tx = sirfsoc_uart_start_tx,
543 .stop_rx = sirfsoc_uart_stop_rx,
544 .enable_ms = sirfsoc_uart_enable_ms,
545 .break_ctl = sirfsoc_uart_break_ctl,
546 .startup = sirfsoc_uart_startup,
547 .shutdown = sirfsoc_uart_shutdown,
548 .set_termios = sirfsoc_uart_set_termios,
549 .type = sirfsoc_uart_type,
550 .release_port = sirfsoc_uart_release_port,
551 .request_port = sirfsoc_uart_request_port,
552 .config_port = sirfsoc_uart_config_port,
553};
554
555#ifdef CONFIG_SERIAL_SIRFSOC_CONSOLE
556static int __init sirfsoc_uart_console_setup(struct console *co, char *options)
557{
558 unsigned int baud = 115200;
559 unsigned int bits = 8;
560 unsigned int parity = 'n';
561 unsigned int flow = 'n';
562 struct uart_port *port = &sirfsoc_uart_ports[co->index].port;
563
564 if (co->index < 0 || co->index >= SIRFSOC_UART_NR)
565 return -EINVAL;
566
567 if (!port->mapbase)
568 return -ENODEV;
569
570 if (options)
571 uart_parse_options(options, &baud, &parity, &bits, &flow);
572 port->cons = co;
573 return uart_set_options(port, co, baud, parity, bits, flow);
574}
575
576static void sirfsoc_uart_console_putchar(struct uart_port *port, int ch)
577{
578 while (rd_regl(port,
579 SIRFUART_TX_FIFO_STATUS) & SIRFUART_FIFOFULL_MASK(port))
580 cpu_relax();
581 wr_regb(port, SIRFUART_TX_FIFO_DATA, ch);
582}
583
584static void sirfsoc_uart_console_write(struct console *co, const char *s,
585 unsigned int count)
586{
587 struct uart_port *port = &sirfsoc_uart_ports[co->index].port;
588 uart_console_write(port, s, count, sirfsoc_uart_console_putchar);
589}
590
591static struct console sirfsoc_uart_console = {
592 .name = SIRFSOC_UART_NAME,
593 .device = uart_console_device,
594 .flags = CON_PRINTBUFFER,
595 .index = -1,
596 .write = sirfsoc_uart_console_write,
597 .setup = sirfsoc_uart_console_setup,
598 .data = &sirfsoc_uart_drv,
599};
600
601static int __init sirfsoc_uart_console_init(void)
602{
603 register_console(&sirfsoc_uart_console);
604 return 0;
605}
606console_initcall(sirfsoc_uart_console_init);
607#endif
608
609static struct uart_driver sirfsoc_uart_drv = {
610 .owner = THIS_MODULE,
611 .driver_name = SIRFUART_PORT_NAME,
612 .nr = SIRFSOC_UART_NR,
613 .dev_name = SIRFSOC_UART_NAME,
614 .major = SIRFSOC_UART_MAJOR,
615 .minor = SIRFSOC_UART_MINOR,
616#ifdef CONFIG_SERIAL_SIRFSOC_CONSOLE
617 .cons = &sirfsoc_uart_console,
618#else
619 .cons = NULL,
620#endif
621};
622
623int sirfsoc_uart_probe(struct platform_device *pdev)
624{
625 struct sirfsoc_uart_port *sirfport;
626 struct uart_port *port;
627 struct resource *res;
628 int ret;
629
630 if (of_property_read_u32(pdev->dev.of_node, "cell-index", &pdev->id)) {
631 dev_err(&pdev->dev,
632 "Unable to find cell-index in uart node.\n");
633 ret = -EFAULT;
634 goto err;
635 }
636
637 sirfport = &sirfsoc_uart_ports[pdev->id];
638 port = &sirfport->port;
639 port->dev = &pdev->dev;
640 port->private_data = sirfport;
641
642 if (of_find_property(pdev->dev.of_node, "hw_flow_ctrl", NULL))
643 sirfport->hw_flow_ctrl = 1;
644
645 if (of_property_read_u32(pdev->dev.of_node,
646 "fifosize",
647 &port->fifosize)) {
648 dev_err(&pdev->dev,
649 "Unable to find fifosize in uart node.\n");
650 ret = -EFAULT;
651 goto err;
652 }
653
654 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
655 if (res == NULL) {
656 dev_err(&pdev->dev, "Insufficient resources.\n");
657 ret = -EFAULT;
658 goto err;
659 }
660 port->mapbase = res->start;
661 port->membase = devm_ioremap(&pdev->dev, res->start, resource_size(res));
662 if (!port->membase) {
663 dev_err(&pdev->dev, "Cannot remap resource.\n");
664 ret = -ENOMEM;
665 goto err;
666 }
667 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
668 if (res == NULL) {
669 dev_err(&pdev->dev, "Insufficient resources.\n");
670 ret = -EFAULT;
671 goto irq_err;
672 }
673 port->irq = res->start;
674
675 if (sirfport->hw_flow_ctrl) {
676 sirfport->pmx = pinmux_get(&pdev->dev, NULL);
677 ret = IS_ERR(sirfport->pmx);
678 if (ret)
679 goto pmx_err;
680
681 pinmux_enable(sirfport->pmx);
682 }
683
684 port->ops = &sirfsoc_uart_ops;
685 spin_lock_init(&port->lock);
686
687 platform_set_drvdata(pdev, sirfport);
688 ret = uart_add_one_port(&sirfsoc_uart_drv, port);
689 if (ret != 0) {
690 dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id);
691 goto port_err;
692 }
693
694 return 0;
695
696port_err:
697 platform_set_drvdata(pdev, NULL);
698 if (sirfport->hw_flow_ctrl) {
699 pinmux_disable(sirfport->pmx);
700 pinmux_put(sirfport->pmx);
701 }
702pmx_err:
703irq_err:
704 devm_iounmap(&pdev->dev, port->membase);
705err:
706 return ret;
707}
708
709static int sirfsoc_uart_remove(struct platform_device *pdev)
710{
711 struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev);
712 struct uart_port *port = &sirfport->port;
713 platform_set_drvdata(pdev, NULL);
714 if (sirfport->hw_flow_ctrl) {
715 pinmux_disable(sirfport->pmx);
716 pinmux_put(sirfport->pmx);
717 }
718 devm_iounmap(&pdev->dev, port->membase);
719 uart_remove_one_port(&sirfsoc_uart_drv, port);
720 return 0;
721}
722
723static int
724sirfsoc_uart_suspend(struct platform_device *pdev, pm_message_t state)
725{
726 struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev);
727 struct uart_port *port = &sirfport->port;
728 uart_suspend_port(&sirfsoc_uart_drv, port);
729 return 0;
730}
731
732static int sirfsoc_uart_resume(struct platform_device *pdev)
733{
734 struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev);
735 struct uart_port *port = &sirfport->port;
736 uart_resume_port(&sirfsoc_uart_drv, port);
737 return 0;
738}
739
740static struct of_device_id sirfsoc_uart_ids[] __devinitdata = {
741 { .compatible = "sirf,prima2-uart", },
742 {}
743};
744MODULE_DEVICE_TABLE(of, sirfsoc_serial_of_match);
745
746static struct platform_driver sirfsoc_uart_driver = {
747 .probe = sirfsoc_uart_probe,
748 .remove = __devexit_p(sirfsoc_uart_remove),
749 .suspend = sirfsoc_uart_suspend,
750 .resume = sirfsoc_uart_resume,
751 .driver = {
752 .name = SIRFUART_PORT_NAME,
753 .owner = THIS_MODULE,
754 .of_match_table = sirfsoc_uart_ids,
755 },
756};
757
758static int __init sirfsoc_uart_init(void)
759{
760 int ret = 0;
761
762 ret = uart_register_driver(&sirfsoc_uart_drv);
763 if (ret)
764 goto out;
765
766 ret = platform_driver_register(&sirfsoc_uart_driver);
767 if (ret)
768 uart_unregister_driver(&sirfsoc_uart_drv);
769out:
770 return ret;
771}
772module_init(sirfsoc_uart_init);
773
774static void __exit sirfsoc_uart_exit(void)
775{
776 platform_driver_unregister(&sirfsoc_uart_driver);
777 uart_unregister_driver(&sirfsoc_uart_drv);
778}
779module_exit(sirfsoc_uart_exit);
780
781MODULE_LICENSE("GPL v2");
782MODULE_AUTHOR("Bin Shi <Bin.Shi@csr.com>, Rong Wang<Rong.Wang@csr.com>");
783MODULE_DESCRIPTION("CSR SiRFprimaII Uart Driver");
diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h
new file mode 100644
index 000000000000..fc64260fa93c
--- /dev/null
+++ b/drivers/tty/serial/sirfsoc_uart.h
@@ -0,0 +1,185 @@
1/*
2 * Drivers for CSR SiRFprimaII onboard UARTs.
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8#include <linux/bitops.h>
9
10/* UART Register Offset Define */
11#define SIRFUART_LINE_CTRL 0x0040
12#define SIRFUART_TX_RX_EN 0x004c
13#define SIRFUART_DIVISOR 0x0050
14#define SIRFUART_INT_EN 0x0054
15#define SIRFUART_INT_STATUS 0x0058
16#define SIRFUART_TX_DMA_IO_CTRL 0x0100
17#define SIRFUART_TX_DMA_IO_LEN 0x0104
18#define SIRFUART_TX_FIFO_CTRL 0x0108
19#define SIRFUART_TX_FIFO_LEVEL_CHK 0x010C
20#define SIRFUART_TX_FIFO_OP 0x0110
21#define SIRFUART_TX_FIFO_STATUS 0x0114
22#define SIRFUART_TX_FIFO_DATA 0x0118
23#define SIRFUART_RX_DMA_IO_CTRL 0x0120
24#define SIRFUART_RX_DMA_IO_LEN 0x0124
25#define SIRFUART_RX_FIFO_CTRL 0x0128
26#define SIRFUART_RX_FIFO_LEVEL_CHK 0x012C
27#define SIRFUART_RX_FIFO_OP 0x0130
28#define SIRFUART_RX_FIFO_STATUS 0x0134
29#define SIRFUART_RX_FIFO_DATA 0x0138
30#define SIRFUART_AFC_CTRL 0x0140
31#define SIRFUART_SWH_DMA_IO 0x0148
32
33/* UART Line Control Register */
34#define SIRFUART_DATA_BIT_LEN_MASK 0x3
35#define SIRFUART_DATA_BIT_LEN_5 BIT(0)
36#define SIRFUART_DATA_BIT_LEN_6 1
37#define SIRFUART_DATA_BIT_LEN_7 2
38#define SIRFUART_DATA_BIT_LEN_8 3
39#define SIRFUART_STOP_BIT_LEN_1 0
40#define SIRFUART_STOP_BIT_LEN_2 BIT(2)
41#define SIRFUART_PARITY_EN BIT(3)
42#define SIRFUART_EVEN_BIT BIT(4)
43#define SIRFUART_STICK_BIT_MASK (7 << 3)
44#define SIRFUART_STICK_BIT_NONE (0 << 3)
45#define SIRFUART_STICK_BIT_EVEN BIT(3)
46#define SIRFUART_STICK_BIT_ODD (3 << 3)
47#define SIRFUART_STICK_BIT_MARK (5 << 3)
48#define SIRFUART_STICK_BIT_SPACE (7 << 3)
49#define SIRFUART_SET_BREAK BIT(6)
50#define SIRFUART_LOOP_BACK BIT(7)
51#define SIRFUART_PARITY_MASK (7 << 3)
52#define SIRFUART_DUMMY_READ BIT(16)
53
54#define SIRFSOC_UART_RX_TIMEOUT(br, to) (((br) * (((to) + 999) / 1000)) / 1000)
55#define SIRFUART_RECV_TIMEOUT_MASK (0xFFFF << 16)
56#define SIRFUART_RECV_TIMEOUT(x) (((x) & 0xFFFF) << 16)
57
58/* UART Auto Flow Control */
59#define SIRFUART_AFC_RX_THD_MASK 0x000000FF
60#define SIRFUART_AFC_RX_EN BIT(8)
61#define SIRFUART_AFC_TX_EN BIT(9)
62#define SIRFUART_CTS_CTRL BIT(10)
63#define SIRFUART_RTS_CTRL BIT(11)
64#define SIRFUART_CTS_IN_STATUS BIT(12)
65#define SIRFUART_RTS_OUT_STATUS BIT(13)
66
67/* UART Interrupt Enable Register */
68#define SIRFUART_RX_DONE_INT BIT(0)
69#define SIRFUART_TX_DONE_INT BIT(1)
70#define SIRFUART_RX_OFLOW_INT BIT(2)
71#define SIRFUART_TX_ALLOUT_INT BIT(3)
72#define SIRFUART_RX_IO_DMA_INT BIT(4)
73#define SIRFUART_TX_IO_DMA_INT BIT(5)
74#define SIRFUART_RXFIFO_FULL_INT BIT(6)
75#define SIRFUART_TXFIFO_EMPTY_INT BIT(7)
76#define SIRFUART_RXFIFO_THD_INT BIT(8)
77#define SIRFUART_TXFIFO_THD_INT BIT(9)
78#define SIRFUART_FRM_ERR_INT BIT(10)
79#define SIRFUART_RXD_BREAK_INT BIT(11)
80#define SIRFUART_RX_TIMEOUT_INT BIT(12)
81#define SIRFUART_PARITY_ERR_INT BIT(13)
82#define SIRFUART_CTS_INT_EN BIT(14)
83#define SIRFUART_RTS_INT_EN BIT(15)
84
85/* UART Interrupt Status Register */
86#define SIRFUART_RX_DONE BIT(0)
87#define SIRFUART_TX_DONE BIT(1)
88#define SIRFUART_RX_OFLOW BIT(2)
89#define SIRFUART_TX_ALL_EMPTY BIT(3)
90#define SIRFUART_DMA_IO_RX_DONE BIT(4)
91#define SIRFUART_DMA_IO_TX_DONE BIT(5)
92#define SIRFUART_RXFIFO_FULL BIT(6)
93#define SIRFUART_TXFIFO_EMPTY BIT(7)
94#define SIRFUART_RXFIFO_THD_REACH BIT(8)
95#define SIRFUART_TXFIFO_THD_REACH BIT(9)
96#define SIRFUART_FRM_ERR BIT(10)
97#define SIRFUART_RXD_BREAK BIT(11)
98#define SIRFUART_RX_TIMEOUT BIT(12)
99#define SIRFUART_PARITY_ERR BIT(13)
100#define SIRFUART_CTS_CHANGE BIT(14)
101#define SIRFUART_RTS_CHANGE BIT(15)
102#define SIRFUART_PLUG_IN BIT(16)
103
104#define SIRFUART_ERR_INT_STAT \
105 (SIRFUART_RX_OFLOW | \
106 SIRFUART_FRM_ERR | \
107 SIRFUART_RXD_BREAK | \
108 SIRFUART_PARITY_ERR)
109#define SIRFUART_ERR_INT_EN \
110 (SIRFUART_RX_OFLOW_INT | \
111 SIRFUART_FRM_ERR_INT | \
112 SIRFUART_RXD_BREAK_INT | \
113 SIRFUART_PARITY_ERR_INT)
114#define SIRFUART_TX_INT_EN SIRFUART_TXFIFO_EMPTY_INT
115#define SIRFUART_RX_IO_INT_EN \
116 (SIRFUART_RX_TIMEOUT_INT | \
117 SIRFUART_RXFIFO_THD_INT | \
118 SIRFUART_RXFIFO_FULL_INT | \
119 SIRFUART_ERR_INT_EN)
120
121/* UART FIFO Register */
122#define SIRFUART_TX_FIFO_STOP 0x0
123#define SIRFUART_TX_FIFO_RESET 0x1
124#define SIRFUART_TX_FIFO_START 0x2
125#define SIRFUART_RX_FIFO_STOP 0x0
126#define SIRFUART_RX_FIFO_RESET 0x1
127#define SIRFUART_RX_FIFO_START 0x2
128#define SIRFUART_TX_MODE_DMA 0
129#define SIRFUART_TX_MODE_IO 1
130#define SIRFUART_RX_MODE_DMA 0
131#define SIRFUART_RX_MODE_IO 1
132
133#define SIRFUART_RX_EN 0x1
134#define SIRFUART_TX_EN 0x2
135
136/* Generic Definitions */
137#define SIRFSOC_UART_NAME "ttySiRF"
138#define SIRFSOC_UART_MAJOR 0
139#define SIRFSOC_UART_MINOR 0
140#define SIRFUART_PORT_NAME "sirfsoc-uart"
141#define SIRFUART_MAP_SIZE 0x200
142#define SIRFSOC_UART_NR 3
143#define SIRFSOC_PORT_TYPE 0xa5
144
145/* Baud Rate Calculation */
146#define SIRF_MIN_SAMPLE_DIV 0xf
147#define SIRF_MAX_SAMPLE_DIV 0x3f
148#define SIRF_IOCLK_DIV_MAX 0xffff
149#define SIRF_SAMPLE_DIV_SHIFT 16
150#define SIRF_IOCLK_DIV_MASK 0xffff
151#define SIRF_SAMPLE_DIV_MASK 0x3f0000
152#define SIRF_BAUD_RATE_SUPPORT_NR 18
153
154/* For Fast Baud Rate Calculation */
155struct sirfsoc_baudrate_to_regv {
156 unsigned int baud_rate;
157 unsigned int reg_val;
158};
159
160struct sirfsoc_uart_port {
161 unsigned char hw_flow_ctrl;
162 unsigned char ms_enabled;
163
164 struct uart_port port;
165 struct pinmux *pmx;
166};
167
168/* Hardware Flow Control */
169#define SIRFUART_AFC_CTRL_RX_THD 0x70
170
171/* Register Access Control */
172#define portaddr(port, reg) ((port)->membase + (reg))
173#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg)))
174#define rd_regl(port, reg) (__raw_readl(portaddr(port, reg)))
175#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
176#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
177
178/* UART Port Mask */
179#define SIRFUART_FIFOLEVEL_MASK(port) ((port->line == 1) ? (0x1f) : (0x7f))
180#define SIRFUART_FIFOFULL_MASK(port) ((port->line == 1) ? (0x20) : (0x80))
181#define SIRFUART_FIFOEMPTY_MASK(port) ((port->line == 1) ? (0x40) : (0x100))
182
183/* I/O Mode */
184#define SIRFSOC_UART_IO_RX_MAX_CNT 256
185#define SIRFSOC_UART_IO_TX_REASONABLE_CNT 6
diff --git a/drivers/tty/serial/timbuart.c b/drivers/tty/serial/timbuart.c
index e76c8b747fb8..70f97491d8f2 100644
--- a/drivers/tty/serial/timbuart.c
+++ b/drivers/tty/serial/timbuart.c
@@ -513,20 +513,7 @@ static struct platform_driver timbuart_platform_driver = {
513 .remove = __devexit_p(timbuart_remove), 513 .remove = __devexit_p(timbuart_remove),
514}; 514};
515 515
516/*--------------------------------------------------------------------------*/ 516module_platform_driver(timbuart_platform_driver);
517
518static int __init timbuart_init(void)
519{
520 return platform_driver_register(&timbuart_platform_driver);
521}
522
523static void __exit timbuart_exit(void)
524{
525 platform_driver_unregister(&timbuart_platform_driver);
526}
527
528module_init(timbuart_init);
529module_exit(timbuart_exit);
530 517
531MODULE_DESCRIPTION("Timberdale UART driver"); 518MODULE_DESCRIPTION("Timberdale UART driver");
532MODULE_LICENSE("GPL v2"); 519MODULE_LICENSE("GPL v2");
diff --git a/drivers/tty/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c
index 3beb6ab4fa68..83148e79ca13 100644
--- a/drivers/tty/serial/vr41xx_siu.c
+++ b/drivers/tty/serial/vr41xx_siu.c
@@ -961,18 +961,7 @@ static struct platform_driver siu_device_driver = {
961 }, 961 },
962}; 962};
963 963
964static int __init vr41xx_siu_init(void) 964module_platform_driver(siu_device_driver);
965{
966 return platform_driver_register(&siu_device_driver);
967}
968
969static void __exit vr41xx_siu_exit(void)
970{
971 platform_driver_unregister(&siu_device_driver);
972}
973
974module_init(vr41xx_siu_init);
975module_exit(vr41xx_siu_exit);
976 965
977MODULE_LICENSE("GPL"); 966MODULE_LICENSE("GPL");
978MODULE_ALIAS("platform:SIU"); 967MODULE_ALIAS("platform:SIU");
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 3fdebd306b94..e41b9bbc107d 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -790,19 +790,24 @@ static void session_clear_tty(struct pid *session)
790void disassociate_ctty(int on_exit) 790void disassociate_ctty(int on_exit)
791{ 791{
792 struct tty_struct *tty; 792 struct tty_struct *tty;
793 struct pid *tty_pgrp = NULL;
794 793
795 if (!current->signal->leader) 794 if (!current->signal->leader)
796 return; 795 return;
797 796
798 tty = get_current_tty(); 797 tty = get_current_tty();
799 if (tty) { 798 if (tty) {
800 tty_pgrp = get_pid(tty->pgrp); 799 struct pid *tty_pgrp = get_pid(tty->pgrp);
801 if (on_exit) { 800 if (on_exit) {
802 if (tty->driver->type != TTY_DRIVER_TYPE_PTY) 801 if (tty->driver->type != TTY_DRIVER_TYPE_PTY)
803 tty_vhangup(tty); 802 tty_vhangup(tty);
804 } 803 }
805 tty_kref_put(tty); 804 tty_kref_put(tty);
805 if (tty_pgrp) {
806 kill_pgrp(tty_pgrp, SIGHUP, on_exit);
807 if (!on_exit)
808 kill_pgrp(tty_pgrp, SIGCONT, on_exit);
809 put_pid(tty_pgrp);
810 }
806 } else if (on_exit) { 811 } else if (on_exit) {
807 struct pid *old_pgrp; 812 struct pid *old_pgrp;
808 spin_lock_irq(&current->sighand->siglock); 813 spin_lock_irq(&current->sighand->siglock);
@@ -816,12 +821,6 @@ void disassociate_ctty(int on_exit)
816 } 821 }
817 return; 822 return;
818 } 823 }
819 if (tty_pgrp) {
820 kill_pgrp(tty_pgrp, SIGHUP, on_exit);
821 if (!on_exit)
822 kill_pgrp(tty_pgrp, SIGCONT, on_exit);
823 put_pid(tty_pgrp);
824 }
825 824
826 spin_lock_irq(&current->sighand->siglock); 825 spin_lock_irq(&current->sighand->siglock);
827 put_pid(current->signal->tty_old_pgrp); 826 put_pid(current->signal->tty_old_pgrp);
@@ -1558,6 +1557,59 @@ static void release_tty(struct tty_struct *tty, int idx)
1558} 1557}
1559 1558
1560/** 1559/**
1560 * tty_release_checks - check a tty before real release
1561 * @tty: tty to check
1562 * @o_tty: link of @tty (if any)
1563 * @idx: index of the tty
1564 *
1565 * Performs some paranoid checking before true release of the @tty.
1566 * This is a no-op unless TTY_PARANOIA_CHECK is defined.
1567 */
1568static int tty_release_checks(struct tty_struct *tty, struct tty_struct *o_tty,
1569 int idx)
1570{
1571#ifdef TTY_PARANOIA_CHECK
1572 if (idx < 0 || idx >= tty->driver->num) {
1573 printk(KERN_DEBUG "%s: bad idx when trying to free (%s)\n",
1574 __func__, tty->name);
1575 return -1;
1576 }
1577
1578 /* not much to check for devpts */
1579 if (tty->driver->flags & TTY_DRIVER_DEVPTS_MEM)
1580 return 0;
1581
1582 if (tty != tty->driver->ttys[idx]) {
1583 printk(KERN_DEBUG "%s: driver.table[%d] not tty for (%s)\n",
1584 __func__, idx, tty->name);
1585 return -1;
1586 }
1587 if (tty->termios != tty->driver->termios[idx]) {
1588 printk(KERN_DEBUG "%s: driver.termios[%d] not termios for (%s)\n",
1589 __func__, idx, tty->name);
1590 return -1;
1591 }
1592 if (tty->driver->other) {
1593 if (o_tty != tty->driver->other->ttys[idx]) {
1594 printk(KERN_DEBUG "%s: other->table[%d] not o_tty for (%s)\n",
1595 __func__, idx, tty->name);
1596 return -1;
1597 }
1598 if (o_tty->termios != tty->driver->other->termios[idx]) {
1599 printk(KERN_DEBUG "%s: other->termios[%d] not o_termios for (%s)\n",
1600 __func__, idx, tty->name);
1601 return -1;
1602 }
1603 if (o_tty->link != tty) {
1604 printk(KERN_DEBUG "%s: bad pty pointers\n", __func__);
1605 return -1;
1606 }
1607 }
1608#endif
1609 return 0;
1610}
1611
1612/**
1561 * tty_release - vfs callback for close 1613 * tty_release - vfs callback for close
1562 * @inode: inode of tty 1614 * @inode: inode of tty
1563 * @filp: file pointer for handle to tty 1615 * @filp: file pointer for handle to tty
@@ -1585,11 +1637,11 @@ int tty_release(struct inode *inode, struct file *filp)
1585 int idx; 1637 int idx;
1586 char buf[64]; 1638 char buf[64];
1587 1639
1588 if (tty_paranoia_check(tty, inode, "tty_release_dev")) 1640 if (tty_paranoia_check(tty, inode, __func__))
1589 return 0; 1641 return 0;
1590 1642
1591 tty_lock(); 1643 tty_lock();
1592 check_tty_count(tty, "tty_release_dev"); 1644 check_tty_count(tty, __func__);
1593 1645
1594 __tty_fasync(-1, filp, 0); 1646 __tty_fasync(-1, filp, 0);
1595 1647
@@ -1599,59 +1651,16 @@ int tty_release(struct inode *inode, struct file *filp)
1599 devpts = (tty->driver->flags & TTY_DRIVER_DEVPTS_MEM) != 0; 1651 devpts = (tty->driver->flags & TTY_DRIVER_DEVPTS_MEM) != 0;
1600 o_tty = tty->link; 1652 o_tty = tty->link;
1601 1653
1602#ifdef TTY_PARANOIA_CHECK 1654 if (tty_release_checks(tty, o_tty, idx)) {
1603 if (idx < 0 || idx >= tty->driver->num) {
1604 printk(KERN_DEBUG "tty_release_dev: bad idx when trying to "
1605 "free (%s)\n", tty->name);
1606 tty_unlock(); 1655 tty_unlock();
1607 return 0; 1656 return 0;
1608 } 1657 }
1609 if (!devpts) {
1610 if (tty != tty->driver->ttys[idx]) {
1611 tty_unlock();
1612 printk(KERN_DEBUG "tty_release_dev: driver.table[%d] not tty "
1613 "for (%s)\n", idx, tty->name);
1614 return 0;
1615 }
1616 if (tty->termios != tty->driver->termios[idx]) {
1617 tty_unlock();
1618 printk(KERN_DEBUG "tty_release_dev: driver.termios[%d] not termios "
1619 "for (%s)\n",
1620 idx, tty->name);
1621 return 0;
1622 }
1623 }
1624#endif
1625 1658
1626#ifdef TTY_DEBUG_HANGUP 1659#ifdef TTY_DEBUG_HANGUP
1627 printk(KERN_DEBUG "tty_release_dev of %s (tty count=%d)...", 1660 printk(KERN_DEBUG "%s: %s (tty count=%d)...\n", __func__,
1628 tty_name(tty, buf), tty->count); 1661 tty_name(tty, buf), tty->count);
1629#endif 1662#endif
1630 1663
1631#ifdef TTY_PARANOIA_CHECK
1632 if (tty->driver->other &&
1633 !(tty->driver->flags & TTY_DRIVER_DEVPTS_MEM)) {
1634 if (o_tty != tty->driver->other->ttys[idx]) {
1635 tty_unlock();
1636 printk(KERN_DEBUG "tty_release_dev: other->table[%d] "
1637 "not o_tty for (%s)\n",
1638 idx, tty->name);
1639 return 0 ;
1640 }
1641 if (o_tty->termios != tty->driver->other->termios[idx]) {
1642 tty_unlock();
1643 printk(KERN_DEBUG "tty_release_dev: other->termios[%d] "
1644 "not o_termios for (%s)\n",
1645 idx, tty->name);
1646 return 0;
1647 }
1648 if (o_tty->link != tty) {
1649 tty_unlock();
1650 printk(KERN_DEBUG "tty_release_dev: bad pty pointers\n");
1651 return 0;
1652 }
1653 }
1654#endif
1655 if (tty->ops->close) 1664 if (tty->ops->close)
1656 tty->ops->close(tty, filp); 1665 tty->ops->close(tty, filp);
1657 1666
@@ -1707,8 +1716,8 @@ int tty_release(struct inode *inode, struct file *filp)
1707 if (!do_sleep) 1716 if (!do_sleep)
1708 break; 1717 break;
1709 1718
1710 printk(KERN_WARNING "tty_release_dev: %s: read/write wait queue " 1719 printk(KERN_WARNING "%s: %s: read/write wait queue active!\n",
1711 "active!\n", tty_name(tty, buf)); 1720 __func__, tty_name(tty, buf));
1712 tty_unlock(); 1721 tty_unlock();
1713 mutex_unlock(&tty_mutex); 1722 mutex_unlock(&tty_mutex);
1714 schedule(); 1723 schedule();
@@ -1721,15 +1730,14 @@ int tty_release(struct inode *inode, struct file *filp)
1721 */ 1730 */
1722 if (pty_master) { 1731 if (pty_master) {
1723 if (--o_tty->count < 0) { 1732 if (--o_tty->count < 0) {
1724 printk(KERN_WARNING "tty_release_dev: bad pty slave count " 1733 printk(KERN_WARNING "%s: bad pty slave count (%d) for %s\n",
1725 "(%d) for %s\n", 1734 __func__, o_tty->count, tty_name(o_tty, buf));
1726 o_tty->count, tty_name(o_tty, buf));
1727 o_tty->count = 0; 1735 o_tty->count = 0;
1728 } 1736 }
1729 } 1737 }
1730 if (--tty->count < 0) { 1738 if (--tty->count < 0) {
1731 printk(KERN_WARNING "tty_release_dev: bad tty->count (%d) for %s\n", 1739 printk(KERN_WARNING "%s: bad tty->count (%d) for %s\n",
1732 tty->count, tty_name(tty, buf)); 1740 __func__, tty->count, tty_name(tty, buf));
1733 tty->count = 0; 1741 tty->count = 0;
1734 } 1742 }
1735 1743
@@ -1778,7 +1786,7 @@ int tty_release(struct inode *inode, struct file *filp)
1778 } 1786 }
1779 1787
1780#ifdef TTY_DEBUG_HANGUP 1788#ifdef TTY_DEBUG_HANGUP
1781 printk(KERN_DEBUG "freeing tty structure..."); 1789 printk(KERN_DEBUG "%s: freeing tty structure...\n", __func__);
1782#endif 1790#endif
1783 /* 1791 /*
1784 * Ask the line discipline code to release its structures 1792 * Ask the line discipline code to release its structures
@@ -1798,6 +1806,83 @@ int tty_release(struct inode *inode, struct file *filp)
1798} 1806}
1799 1807
1800/** 1808/**
1809 * tty_open_current_tty - get tty of current task for open
1810 * @device: device number
1811 * @filp: file pointer to tty
1812 * @return: tty of the current task iff @device is /dev/tty
1813 *
1814 * We cannot return driver and index like for the other nodes because
1815 * devpts will not work then. It expects inodes to be from devpts FS.
1816 */
1817static struct tty_struct *tty_open_current_tty(dev_t device, struct file *filp)
1818{
1819 struct tty_struct *tty;
1820
1821 if (device != MKDEV(TTYAUX_MAJOR, 0))
1822 return NULL;
1823
1824 tty = get_current_tty();
1825 if (!tty)
1826 return ERR_PTR(-ENXIO);
1827
1828 filp->f_flags |= O_NONBLOCK; /* Don't let /dev/tty block */
1829 /* noctty = 1; */
1830 tty_kref_put(tty);
1831 /* FIXME: we put a reference and return a TTY! */
1832 return tty;
1833}
1834
1835/**
1836 * tty_lookup_driver - lookup a tty driver for a given device file
1837 * @device: device number
1838 * @filp: file pointer to tty
1839 * @noctty: set if the device should not become a controlling tty
1840 * @index: index for the device in the @return driver
1841 * @return: driver for this inode (with increased refcount)
1842 *
1843 * If @return is not erroneous, the caller is responsible to decrement the
1844 * refcount by tty_driver_kref_put.
1845 *
1846 * Locking: tty_mutex protects get_tty_driver
1847 */
1848static struct tty_driver *tty_lookup_driver(dev_t device, struct file *filp,
1849 int *noctty, int *index)
1850{
1851 struct tty_driver *driver;
1852
1853 switch (device) {
1854#ifdef CONFIG_VT
1855 case MKDEV(TTY_MAJOR, 0): {
1856 extern struct tty_driver *console_driver;
1857 driver = tty_driver_kref_get(console_driver);
1858 *index = fg_console;
1859 *noctty = 1;
1860 break;
1861 }
1862#endif
1863 case MKDEV(TTYAUX_MAJOR, 1): {
1864 struct tty_driver *console_driver = console_device(index);
1865 if (console_driver) {
1866 driver = tty_driver_kref_get(console_driver);
1867 if (driver) {
1868 /* Don't let /dev/console block */
1869 filp->f_flags |= O_NONBLOCK;
1870 *noctty = 1;
1871 break;
1872 }
1873 }
1874 return ERR_PTR(-ENODEV);
1875 }
1876 default:
1877 driver = get_tty_driver(device, index);
1878 if (!driver)
1879 return ERR_PTR(-ENODEV);
1880 break;
1881 }
1882 return driver;
1883}
1884
1885/**
1801 * tty_open - open a tty device 1886 * tty_open - open a tty device
1802 * @inode: inode of device file 1887 * @inode: inode of device file
1803 * @filp: file pointer to tty 1888 * @filp: file pointer to tty
@@ -1813,16 +1898,16 @@ int tty_release(struct inode *inode, struct file *filp)
1813 * The termios state of a pty is reset on first open so that 1898 * The termios state of a pty is reset on first open so that
1814 * settings don't persist across reuse. 1899 * settings don't persist across reuse.
1815 * 1900 *
1816 * Locking: tty_mutex protects tty, get_tty_driver and tty_init_dev work. 1901 * Locking: tty_mutex protects tty, tty_lookup_driver and tty_init_dev.
1817 * tty->count should protect the rest. 1902 * tty->count should protect the rest.
1818 * ->siglock protects ->signal/->sighand 1903 * ->siglock protects ->signal/->sighand
1819 */ 1904 */
1820 1905
1821static int tty_open(struct inode *inode, struct file *filp) 1906static int tty_open(struct inode *inode, struct file *filp)
1822{ 1907{
1823 struct tty_struct *tty = NULL; 1908 struct tty_struct *tty;
1824 int noctty, retval; 1909 int noctty, retval;
1825 struct tty_driver *driver; 1910 struct tty_driver *driver = NULL;
1826 int index; 1911 int index;
1827 dev_t device = inode->i_rdev; 1912 dev_t device = inode->i_rdev;
1828 unsigned saved_flags = filp->f_flags; 1913 unsigned saved_flags = filp->f_flags;
@@ -1841,66 +1926,22 @@ retry_open:
1841 mutex_lock(&tty_mutex); 1926 mutex_lock(&tty_mutex);
1842 tty_lock(); 1927 tty_lock();
1843 1928
1844 if (device == MKDEV(TTYAUX_MAJOR, 0)) { 1929 tty = tty_open_current_tty(device, filp);
1845 tty = get_current_tty(); 1930 if (IS_ERR(tty)) {
1846 if (!tty) { 1931 retval = PTR_ERR(tty);
1847 tty_unlock(); 1932 goto err_unlock;
1848 mutex_unlock(&tty_mutex); 1933 } else if (!tty) {
1849 tty_free_file(filp); 1934 driver = tty_lookup_driver(device, filp, &noctty, &index);
1850 return -ENXIO; 1935 if (IS_ERR(driver)) {
1851 } 1936 retval = PTR_ERR(driver);
1852 driver = tty_driver_kref_get(tty->driver); 1937 goto err_unlock;
1853 index = tty->index;
1854 filp->f_flags |= O_NONBLOCK; /* Don't let /dev/tty block */
1855 /* noctty = 1; */
1856 /* FIXME: Should we take a driver reference ? */
1857 tty_kref_put(tty);
1858 goto got_driver;
1859 }
1860#ifdef CONFIG_VT
1861 if (device == MKDEV(TTY_MAJOR, 0)) {
1862 extern struct tty_driver *console_driver;
1863 driver = tty_driver_kref_get(console_driver);
1864 index = fg_console;
1865 noctty = 1;
1866 goto got_driver;
1867 }
1868#endif
1869 if (device == MKDEV(TTYAUX_MAJOR, 1)) {
1870 struct tty_driver *console_driver = console_device(&index);
1871 if (console_driver) {
1872 driver = tty_driver_kref_get(console_driver);
1873 if (driver) {
1874 /* Don't let /dev/console block */
1875 filp->f_flags |= O_NONBLOCK;
1876 noctty = 1;
1877 goto got_driver;
1878 }
1879 } 1938 }
1880 tty_unlock();
1881 mutex_unlock(&tty_mutex);
1882 tty_free_file(filp);
1883 return -ENODEV;
1884 }
1885 1939
1886 driver = get_tty_driver(device, &index);
1887 if (!driver) {
1888 tty_unlock();
1889 mutex_unlock(&tty_mutex);
1890 tty_free_file(filp);
1891 return -ENODEV;
1892 }
1893got_driver:
1894 if (!tty) {
1895 /* check whether we're reopening an existing tty */ 1940 /* check whether we're reopening an existing tty */
1896 tty = tty_driver_lookup_tty(driver, inode, index); 1941 tty = tty_driver_lookup_tty(driver, inode, index);
1897
1898 if (IS_ERR(tty)) { 1942 if (IS_ERR(tty)) {
1899 tty_unlock(); 1943 retval = PTR_ERR(tty);
1900 mutex_unlock(&tty_mutex); 1944 goto err_unlock;
1901 tty_driver_kref_put(driver);
1902 tty_free_file(filp);
1903 return PTR_ERR(tty);
1904 } 1945 }
1905 } 1946 }
1906 1947
@@ -1912,21 +1953,22 @@ got_driver:
1912 tty = tty_init_dev(driver, index, 0); 1953 tty = tty_init_dev(driver, index, 0);
1913 1954
1914 mutex_unlock(&tty_mutex); 1955 mutex_unlock(&tty_mutex);
1915 tty_driver_kref_put(driver); 1956 if (driver)
1957 tty_driver_kref_put(driver);
1916 if (IS_ERR(tty)) { 1958 if (IS_ERR(tty)) {
1917 tty_unlock(); 1959 tty_unlock();
1918 tty_free_file(filp); 1960 retval = PTR_ERR(tty);
1919 return PTR_ERR(tty); 1961 goto err_file;
1920 } 1962 }
1921 1963
1922 tty_add_file(tty, filp); 1964 tty_add_file(tty, filp);
1923 1965
1924 check_tty_count(tty, "tty_open"); 1966 check_tty_count(tty, __func__);
1925 if (tty->driver->type == TTY_DRIVER_TYPE_PTY && 1967 if (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
1926 tty->driver->subtype == PTY_TYPE_MASTER) 1968 tty->driver->subtype == PTY_TYPE_MASTER)
1927 noctty = 1; 1969 noctty = 1;
1928#ifdef TTY_DEBUG_HANGUP 1970#ifdef TTY_DEBUG_HANGUP
1929 printk(KERN_DEBUG "opening %s...", tty->name); 1971 printk(KERN_DEBUG "%s: opening %s...\n", __func__, tty->name);
1930#endif 1972#endif
1931 if (tty->ops->open) 1973 if (tty->ops->open)
1932 retval = tty->ops->open(tty, filp); 1974 retval = tty->ops->open(tty, filp);
@@ -1940,8 +1982,8 @@ got_driver:
1940 1982
1941 if (retval) { 1983 if (retval) {
1942#ifdef TTY_DEBUG_HANGUP 1984#ifdef TTY_DEBUG_HANGUP
1943 printk(KERN_DEBUG "error %d in opening %s...", retval, 1985 printk(KERN_DEBUG "%s: error %d in opening %s...\n", __func__,
1944 tty->name); 1986 retval, tty->name);
1945#endif 1987#endif
1946 tty_unlock(); /* need to call tty_release without BTM */ 1988 tty_unlock(); /* need to call tty_release without BTM */
1947 tty_release(inode, filp); 1989 tty_release(inode, filp);
@@ -1976,6 +2018,15 @@ got_driver:
1976 tty_unlock(); 2018 tty_unlock();
1977 mutex_unlock(&tty_mutex); 2019 mutex_unlock(&tty_mutex);
1978 return 0; 2020 return 0;
2021err_unlock:
2022 tty_unlock();
2023 mutex_unlock(&tty_mutex);
2024 /* after locks to avoid deadlock */
2025 if (!IS_ERR_OR_NULL(driver))
2026 tty_driver_kref_put(driver);
2027err_file:
2028 tty_free_file(filp);
2029 return retval;
1979} 2030}
1980 2031
1981 2032
diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c
index 8e0924f55446..24b95db75d84 100644
--- a/drivers/tty/tty_ldisc.c
+++ b/drivers/tty/tty_ldisc.c
@@ -1,19 +1,11 @@
1#include <linux/types.h> 1#include <linux/types.h>
2#include <linux/major.h>
3#include <linux/errno.h> 2#include <linux/errno.h>
4#include <linux/signal.h> 3#include <linux/kmod.h>
5#include <linux/fcntl.h>
6#include <linux/sched.h> 4#include <linux/sched.h>
7#include <linux/interrupt.h> 5#include <linux/interrupt.h>
8#include <linux/tty.h> 6#include <linux/tty.h>
9#include <linux/tty_driver.h> 7#include <linux/tty_driver.h>
10#include <linux/tty_flip.h>
11#include <linux/devpts_fs.h>
12#include <linux/file.h> 8#include <linux/file.h>
13#include <linux/console.h>
14#include <linux/timer.h>
15#include <linux/ctype.h>
16#include <linux/kd.h>
17#include <linux/mm.h> 9#include <linux/mm.h>
18#include <linux/string.h> 10#include <linux/string.h>
19#include <linux/slab.h> 11#include <linux/slab.h>
@@ -24,18 +16,8 @@
24#include <linux/device.h> 16#include <linux/device.h>
25#include <linux/wait.h> 17#include <linux/wait.h>
26#include <linux/bitops.h> 18#include <linux/bitops.h>
27#include <linux/delay.h>
28#include <linux/seq_file.h> 19#include <linux/seq_file.h>
29
30#include <linux/uaccess.h> 20#include <linux/uaccess.h>
31#include <asm/system.h>
32
33#include <linux/kbd_kern.h>
34#include <linux/vt_kern.h>
35#include <linux/selection.h>
36
37#include <linux/kmod.h>
38#include <linux/nsproxy.h>
39#include <linux/ratelimit.h> 21#include <linux/ratelimit.h>
40 22
41/* 23/*
@@ -558,8 +540,6 @@ static int tty_ldisc_wait_idle(struct tty_struct *tty, long timeout)
558 long ret; 540 long ret;
559 ret = wait_event_timeout(tty_ldisc_idle, 541 ret = wait_event_timeout(tty_ldisc_idle,
560 atomic_read(&tty->ldisc->users) == 1, timeout); 542 atomic_read(&tty->ldisc->users) == 1, timeout);
561 if (ret < 0)
562 return ret;
563 return ret > 0 ? 0 : -EBUSY; 543 return ret > 0 ? 0 : -EBUSY;
564} 544}
565 545
diff --git a/drivers/tty/vt/consolemap.c b/drivers/tty/vt/consolemap.c
index 45d3e80156d4..a0f3d6c4d39d 100644
--- a/drivers/tty/vt/consolemap.c
+++ b/drivers/tty/vt/consolemap.c
@@ -584,7 +584,7 @@ int con_set_default_unimap(struct vc_data *vc)
584 return 0; 584 return 0;
585 dflt->refcount++; 585 dflt->refcount++;
586 *vc->vc_uni_pagedir_loc = (unsigned long)dflt; 586 *vc->vc_uni_pagedir_loc = (unsigned long)dflt;
587 if (p && --p->refcount) { 587 if (p && !--p->refcount) {
588 con_release_unimap(p); 588 con_release_unimap(p);
589 kfree(p); 589 kfree(p);
590 } 590 }
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 791f11bed606..75823a1abeb6 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -48,6 +48,7 @@ config USB_ARCH_HAS_OHCI
48 default y if ARCH_DAVINCI_DA8XX 48 default y if ARCH_DAVINCI_DA8XX
49 default y if ARCH_CNS3XXX 49 default y if ARCH_CNS3XXX
50 default y if PLAT_SPEAR 50 default y if PLAT_SPEAR
51 default y if ARCH_EXYNOS
51 # PPC: 52 # PPC:
52 default y if STB03xxx 53 default y if STB03xxx
53 default y if PPC_MPC52xx 54 default y if PPC_MPC52xx
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index 75eca7645227..53a7bc07dd8d 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -6,6 +6,8 @@
6 6
7obj-$(CONFIG_USB) += core/ 7obj-$(CONFIG_USB) += core/
8 8
9obj-$(CONFIG_USB_OTG_UTILS) += otg/
10
9obj-$(CONFIG_USB_DWC3) += dwc3/ 11obj-$(CONFIG_USB_DWC3) += dwc3/
10 12
11obj-$(CONFIG_USB_MON) += mon/ 13obj-$(CONFIG_USB_MON) += mon/
@@ -51,7 +53,6 @@ obj-$(CONFIG_USB_SPEEDTOUCH) += atm/
51 53
52obj-$(CONFIG_USB_MUSB_HDRC) += musb/ 54obj-$(CONFIG_USB_MUSB_HDRC) += musb/
53obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs/ 55obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs/
54obj-$(CONFIG_USB_OTG_UTILS) += otg/
55obj-$(CONFIG_USB_GADGET) += gadget/ 56obj-$(CONFIG_USB_GADGET) += gadget/
56 57
57obj-$(CONFIG_USB_COMMON) += usb-common.o 58obj-$(CONFIG_USB_COMMON) += usb-common.o
diff --git a/drivers/usb/c67x00/c67x00-drv.c b/drivers/usb/c67x00/c67x00-drv.c
index 57ae44cd0b88..6f3b6e267398 100644
--- a/drivers/usb/c67x00/c67x00-drv.c
+++ b/drivers/usb/c67x00/c67x00-drv.c
@@ -225,21 +225,10 @@ static struct platform_driver c67x00_driver = {
225 .name = "c67x00", 225 .name = "c67x00",
226 }, 226 },
227}; 227};
228MODULE_ALIAS("platform:c67x00");
229
230static int __init c67x00_init(void)
231{
232 return platform_driver_register(&c67x00_driver);
233}
234 228
235static void __exit c67x00_exit(void) 229module_platform_driver(c67x00_driver);
236{
237 platform_driver_unregister(&c67x00_driver);
238}
239
240module_init(c67x00_init);
241module_exit(c67x00_exit);
242 230
243MODULE_AUTHOR("Peter Korsgaard, Jan Veldeman, Grant Likely"); 231MODULE_AUTHOR("Peter Korsgaard, Jan Veldeman, Grant Likely");
244MODULE_DESCRIPTION("Cypress C67X00 USB Controller Driver"); 232MODULE_DESCRIPTION("Cypress C67X00 USB Controller Driver");
245MODULE_LICENSE("GPL"); 233MODULE_LICENSE("GPL");
234MODULE_ALIAS("platform:c67x00");
diff --git a/drivers/usb/c67x00/c67x00-hcd.c b/drivers/usb/c67x00/c67x00-hcd.c
index d3e1356d091e..75e47b860a53 100644
--- a/drivers/usb/c67x00/c67x00-hcd.c
+++ b/drivers/usb/c67x00/c67x00-hcd.c
@@ -271,7 +271,6 @@ static void c67x00_hcd_irq(struct c67x00_sie *sie, u16 int_status, u16 msg)
271 if (int_status & SOFEOP_FLG(sie->sie_num)) { 271 if (int_status & SOFEOP_FLG(sie->sie_num)) {
272 c67x00_ll_usb_clear_status(sie, SOF_EOP_IRQ_FLG); 272 c67x00_ll_usb_clear_status(sie, SOF_EOP_IRQ_FLG);
273 c67x00_sched_kick(c67x00); 273 c67x00_sched_kick(c67x00);
274 set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
275 } 274 }
276} 275}
277 276
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index a8078d0638fa..9543b19d410c 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -58,12 +58,62 @@ static struct usb_driver acm_driver;
58static struct tty_driver *acm_tty_driver; 58static struct tty_driver *acm_tty_driver;
59static struct acm *acm_table[ACM_TTY_MINORS]; 59static struct acm *acm_table[ACM_TTY_MINORS];
60 60
61static DEFINE_MUTEX(open_mutex); 61static DEFINE_MUTEX(acm_table_lock);
62 62
63#define ACM_READY(acm) (acm && acm->dev && acm->port.count) 63/*
64 * acm_table accessors
65 */
64 66
65static const struct tty_port_operations acm_port_ops = { 67/*
66}; 68 * Look up an ACM structure by index. If found and not disconnected, increment
69 * its refcount and return it with its mutex held.
70 */
71static struct acm *acm_get_by_index(unsigned index)
72{
73 struct acm *acm;
74
75 mutex_lock(&acm_table_lock);
76 acm = acm_table[index];
77 if (acm) {
78 mutex_lock(&acm->mutex);
79 if (acm->disconnected) {
80 mutex_unlock(&acm->mutex);
81 acm = NULL;
82 } else {
83 tty_port_get(&acm->port);
84 mutex_unlock(&acm->mutex);
85 }
86 }
87 mutex_unlock(&acm_table_lock);
88 return acm;
89}
90
91/*
92 * Try to find an available minor number and if found, associate it with 'acm'.
93 */
94static int acm_alloc_minor(struct acm *acm)
95{
96 int minor;
97
98 mutex_lock(&acm_table_lock);
99 for (minor = 0; minor < ACM_TTY_MINORS; minor++) {
100 if (!acm_table[minor]) {
101 acm_table[minor] = acm;
102 break;
103 }
104 }
105 mutex_unlock(&acm_table_lock);
106
107 return minor;
108}
109
110/* Release the minor number associated with 'acm'. */
111static void acm_release_minor(struct acm *acm)
112{
113 mutex_lock(&acm_table_lock);
114 acm_table[acm->minor] = NULL;
115 mutex_unlock(&acm_table_lock);
116}
67 117
68/* 118/*
69 * Functions for ACM control messages. 119 * Functions for ACM control messages.
@@ -267,9 +317,6 @@ static void acm_ctrl_irq(struct urb *urb)
267 goto exit; 317 goto exit;
268 } 318 }
269 319
270 if (!ACM_READY(acm))
271 goto exit;
272
273 usb_mark_last_busy(acm->dev); 320 usb_mark_last_busy(acm->dev);
274 321
275 data = (unsigned char *)(dr + 1); 322 data = (unsigned char *)(dr + 1);
@@ -429,8 +476,7 @@ static void acm_write_bulk(struct urb *urb)
429 spin_lock_irqsave(&acm->write_lock, flags); 476 spin_lock_irqsave(&acm->write_lock, flags);
430 acm_write_done(acm, wb); 477 acm_write_done(acm, wb);
431 spin_unlock_irqrestore(&acm->write_lock, flags); 478 spin_unlock_irqrestore(&acm->write_lock, flags);
432 if (ACM_READY(acm)) 479 schedule_work(&acm->work);
433 schedule_work(&acm->work);
434} 480}
435 481
436static void acm_softint(struct work_struct *work) 482static void acm_softint(struct work_struct *work)
@@ -440,8 +486,6 @@ static void acm_softint(struct work_struct *work)
440 486
441 dev_vdbg(&acm->data->dev, "%s\n", __func__); 487 dev_vdbg(&acm->data->dev, "%s\n", __func__);
442 488
443 if (!ACM_READY(acm))
444 return;
445 tty = tty_port_tty_get(&acm->port); 489 tty = tty_port_tty_get(&acm->port);
446 if (!tty) 490 if (!tty)
447 return; 491 return;
@@ -453,93 +497,122 @@ static void acm_softint(struct work_struct *work)
453 * TTY handlers 497 * TTY handlers
454 */ 498 */
455 499
456static int acm_tty_open(struct tty_struct *tty, struct file *filp) 500static int acm_tty_install(struct tty_driver *driver, struct tty_struct *tty)
457{ 501{
458 struct acm *acm; 502 struct acm *acm;
459 int rv = -ENODEV; 503 int retval;
460
461 mutex_lock(&open_mutex);
462 504
463 acm = acm_table[tty->index]; 505 dev_dbg(tty->dev, "%s\n", __func__);
464 if (!acm || !acm->dev)
465 goto out;
466 else
467 rv = 0;
468 506
469 dev_dbg(&acm->control->dev, "%s\n", __func__); 507 acm = acm_get_by_index(tty->index);
508 if (!acm)
509 return -ENODEV;
470 510
471 set_bit(TTY_NO_WRITE_SPLIT, &tty->flags); 511 retval = tty_init_termios(tty);
512 if (retval)
513 goto error_init_termios;
472 514
473 tty->driver_data = acm; 515 tty->driver_data = acm;
474 tty_port_tty_set(&acm->port, tty);
475 516
476 if (usb_autopm_get_interface(acm->control) < 0) 517 /* Final install (we use the default method) */
477 goto early_bail; 518 tty_driver_kref_get(driver);
478 else 519 tty->count++;
479 acm->control->needs_remote_wakeup = 1; 520 driver->ttys[tty->index] = tty;
521
522 return 0;
523
524error_init_termios:
525 tty_port_put(&acm->port);
526 return retval;
527}
528
529static int acm_tty_open(struct tty_struct *tty, struct file *filp)
530{
531 struct acm *acm = tty->driver_data;
532
533 dev_dbg(tty->dev, "%s\n", __func__);
534
535 return tty_port_open(&acm->port, tty, filp);
536}
537
538static int acm_port_activate(struct tty_port *port, struct tty_struct *tty)
539{
540 struct acm *acm = container_of(port, struct acm, port);
541 int retval = -ENODEV;
542
543 dev_dbg(&acm->control->dev, "%s\n", __func__);
480 544
481 mutex_lock(&acm->mutex); 545 mutex_lock(&acm->mutex);
482 if (acm->port.count++) { 546 if (acm->disconnected)
483 mutex_unlock(&acm->mutex); 547 goto disconnected;
484 usb_autopm_put_interface(acm->control); 548
485 goto out; 549 retval = usb_autopm_get_interface(acm->control);
486 } 550 if (retval)
551 goto error_get_interface;
552
553 /*
554 * FIXME: Why do we need this? Allocating 64K of physically contiguous
555 * memory is really nasty...
556 */
557 set_bit(TTY_NO_WRITE_SPLIT, &tty->flags);
558 acm->control->needs_remote_wakeup = 1;
487 559
488 acm->ctrlurb->dev = acm->dev; 560 acm->ctrlurb->dev = acm->dev;
489 if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) { 561 if (usb_submit_urb(acm->ctrlurb, GFP_KERNEL)) {
490 dev_err(&acm->control->dev, 562 dev_err(&acm->control->dev,
491 "%s - usb_submit_urb(ctrl irq) failed\n", __func__); 563 "%s - usb_submit_urb(ctrl irq) failed\n", __func__);
492 goto bail_out; 564 goto error_submit_urb;
493 } 565 }
494 566
495 if (0 > acm_set_control(acm, acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS) && 567 acm->ctrlout = ACM_CTRL_DTR | ACM_CTRL_RTS;
568 if (acm_set_control(acm, acm->ctrlout) < 0 &&
496 (acm->ctrl_caps & USB_CDC_CAP_LINE)) 569 (acm->ctrl_caps & USB_CDC_CAP_LINE))
497 goto bail_out; 570 goto error_set_control;
498 571
499 usb_autopm_put_interface(acm->control); 572 usb_autopm_put_interface(acm->control);
500 573
501 if (acm_submit_read_urbs(acm, GFP_KERNEL)) 574 if (acm_submit_read_urbs(acm, GFP_KERNEL))
502 goto bail_out; 575 goto error_submit_read_urbs;
503
504 set_bit(ASYNCB_INITIALIZED, &acm->port.flags);
505 rv = tty_port_block_til_ready(&acm->port, tty, filp);
506 576
507 mutex_unlock(&acm->mutex); 577 mutex_unlock(&acm->mutex);
508out:
509 mutex_unlock(&open_mutex);
510 return rv;
511 578
512bail_out: 579 return 0;
513 acm->port.count--; 580
514 mutex_unlock(&acm->mutex); 581error_submit_read_urbs:
582 acm->ctrlout = 0;
583 acm_set_control(acm, acm->ctrlout);
584error_set_control:
585 usb_kill_urb(acm->ctrlurb);
586error_submit_urb:
515 usb_autopm_put_interface(acm->control); 587 usb_autopm_put_interface(acm->control);
516early_bail: 588error_get_interface:
517 mutex_unlock(&open_mutex); 589disconnected:
518 tty_port_tty_set(&acm->port, NULL); 590 mutex_unlock(&acm->mutex);
519 return -EIO; 591 return retval;
520} 592}
521 593
522static void acm_tty_unregister(struct acm *acm) 594static void acm_port_destruct(struct tty_port *port)
523{ 595{
524 int i; 596 struct acm *acm = container_of(port, struct acm, port);
597
598 dev_dbg(&acm->control->dev, "%s\n", __func__);
525 599
526 tty_unregister_device(acm_tty_driver, acm->minor); 600 tty_unregister_device(acm_tty_driver, acm->minor);
601 acm_release_minor(acm);
527 usb_put_intf(acm->control); 602 usb_put_intf(acm->control);
528 acm_table[acm->minor] = NULL;
529 usb_free_urb(acm->ctrlurb);
530 for (i = 0; i < ACM_NW; i++)
531 usb_free_urb(acm->wb[i].urb);
532 for (i = 0; i < acm->rx_buflimit; i++)
533 usb_free_urb(acm->read_urbs[i]);
534 kfree(acm->country_codes); 603 kfree(acm->country_codes);
535 kfree(acm); 604 kfree(acm);
536} 605}
537 606
538static void acm_port_down(struct acm *acm) 607static void acm_port_shutdown(struct tty_port *port)
539{ 608{
609 struct acm *acm = container_of(port, struct acm, port);
540 int i; 610 int i;
541 611
542 if (acm->dev) { 612 dev_dbg(&acm->control->dev, "%s\n", __func__);
613
614 mutex_lock(&acm->mutex);
615 if (!acm->disconnected) {
543 usb_autopm_get_interface(acm->control); 616 usb_autopm_get_interface(acm->control);
544 acm_set_control(acm, acm->ctrlout = 0); 617 acm_set_control(acm, acm->ctrlout = 0);
545 usb_kill_urb(acm->ctrlurb); 618 usb_kill_urb(acm->ctrlurb);
@@ -550,40 +623,28 @@ static void acm_port_down(struct acm *acm)
550 acm->control->needs_remote_wakeup = 0; 623 acm->control->needs_remote_wakeup = 0;
551 usb_autopm_put_interface(acm->control); 624 usb_autopm_put_interface(acm->control);
552 } 625 }
626 mutex_unlock(&acm->mutex);
627}
628
629static void acm_tty_cleanup(struct tty_struct *tty)
630{
631 struct acm *acm = tty->driver_data;
632 dev_dbg(&acm->control->dev, "%s\n", __func__);
633 tty_port_put(&acm->port);
553} 634}
554 635
555static void acm_tty_hangup(struct tty_struct *tty) 636static void acm_tty_hangup(struct tty_struct *tty)
556{ 637{
557 struct acm *acm = tty->driver_data; 638 struct acm *acm = tty->driver_data;
639 dev_dbg(&acm->control->dev, "%s\n", __func__);
558 tty_port_hangup(&acm->port); 640 tty_port_hangup(&acm->port);
559 mutex_lock(&open_mutex);
560 acm_port_down(acm);
561 mutex_unlock(&open_mutex);
562} 641}
563 642
564static void acm_tty_close(struct tty_struct *tty, struct file *filp) 643static void acm_tty_close(struct tty_struct *tty, struct file *filp)
565{ 644{
566 struct acm *acm = tty->driver_data; 645 struct acm *acm = tty->driver_data;
567 646 dev_dbg(&acm->control->dev, "%s\n", __func__);
568 /* Perform the closing process and see if we need to do the hardware 647 tty_port_close(&acm->port, tty, filp);
569 shutdown */
570 if (!acm)
571 return;
572
573 mutex_lock(&open_mutex);
574 if (tty_port_close_start(&acm->port, tty, filp) == 0) {
575 if (!acm->dev) {
576 tty_port_tty_set(&acm->port, NULL);
577 acm_tty_unregister(acm);
578 tty->driver_data = NULL;
579 }
580 mutex_unlock(&open_mutex);
581 return;
582 }
583 acm_port_down(acm);
584 tty_port_close_end(&acm->port, tty);
585 tty_port_tty_set(&acm->port, NULL);
586 mutex_unlock(&open_mutex);
587} 648}
588 649
589static int acm_tty_write(struct tty_struct *tty, 650static int acm_tty_write(struct tty_struct *tty,
@@ -595,8 +656,6 @@ static int acm_tty_write(struct tty_struct *tty,
595 int wbn; 656 int wbn;
596 struct acm_wb *wb; 657 struct acm_wb *wb;
597 658
598 if (!ACM_READY(acm))
599 return -EINVAL;
600 if (!count) 659 if (!count)
601 return 0; 660 return 0;
602 661
@@ -625,8 +684,6 @@ static int acm_tty_write(struct tty_struct *tty,
625static int acm_tty_write_room(struct tty_struct *tty) 684static int acm_tty_write_room(struct tty_struct *tty)
626{ 685{
627 struct acm *acm = tty->driver_data; 686 struct acm *acm = tty->driver_data;
628 if (!ACM_READY(acm))
629 return -EINVAL;
630 /* 687 /*
631 * Do not let the line discipline to know that we have a reserve, 688 * Do not let the line discipline to know that we have a reserve,
632 * or it might get too enthusiastic. 689 * or it might get too enthusiastic.
@@ -637,7 +694,11 @@ static int acm_tty_write_room(struct tty_struct *tty)
637static int acm_tty_chars_in_buffer(struct tty_struct *tty) 694static int acm_tty_chars_in_buffer(struct tty_struct *tty)
638{ 695{
639 struct acm *acm = tty->driver_data; 696 struct acm *acm = tty->driver_data;
640 if (!ACM_READY(acm)) 697 /*
698 * if the device was unplugged then any remaining characters fell out
699 * of the connector ;)
700 */
701 if (acm->disconnected)
641 return 0; 702 return 0;
642 /* 703 /*
643 * This is inaccurate (overcounts), but it works. 704 * This is inaccurate (overcounts), but it works.
@@ -649,9 +710,6 @@ static void acm_tty_throttle(struct tty_struct *tty)
649{ 710{
650 struct acm *acm = tty->driver_data; 711 struct acm *acm = tty->driver_data;
651 712
652 if (!ACM_READY(acm))
653 return;
654
655 spin_lock_irq(&acm->read_lock); 713 spin_lock_irq(&acm->read_lock);
656 acm->throttle_req = 1; 714 acm->throttle_req = 1;
657 spin_unlock_irq(&acm->read_lock); 715 spin_unlock_irq(&acm->read_lock);
@@ -662,9 +720,6 @@ static void acm_tty_unthrottle(struct tty_struct *tty)
662 struct acm *acm = tty->driver_data; 720 struct acm *acm = tty->driver_data;
663 unsigned int was_throttled; 721 unsigned int was_throttled;
664 722
665 if (!ACM_READY(acm))
666 return;
667
668 spin_lock_irq(&acm->read_lock); 723 spin_lock_irq(&acm->read_lock);
669 was_throttled = acm->throttled; 724 was_throttled = acm->throttled;
670 acm->throttled = 0; 725 acm->throttled = 0;
@@ -679,8 +734,7 @@ static int acm_tty_break_ctl(struct tty_struct *tty, int state)
679{ 734{
680 struct acm *acm = tty->driver_data; 735 struct acm *acm = tty->driver_data;
681 int retval; 736 int retval;
682 if (!ACM_READY(acm)) 737
683 return -EINVAL;
684 retval = acm_send_break(acm, state ? 0xffff : 0); 738 retval = acm_send_break(acm, state ? 0xffff : 0);
685 if (retval < 0) 739 if (retval < 0)
686 dev_dbg(&acm->control->dev, "%s - send break failed\n", 740 dev_dbg(&acm->control->dev, "%s - send break failed\n",
@@ -692,9 +746,6 @@ static int acm_tty_tiocmget(struct tty_struct *tty)
692{ 746{
693 struct acm *acm = tty->driver_data; 747 struct acm *acm = tty->driver_data;
694 748
695 if (!ACM_READY(acm))
696 return -EINVAL;
697
698 return (acm->ctrlout & ACM_CTRL_DTR ? TIOCM_DTR : 0) | 749 return (acm->ctrlout & ACM_CTRL_DTR ? TIOCM_DTR : 0) |
699 (acm->ctrlout & ACM_CTRL_RTS ? TIOCM_RTS : 0) | 750 (acm->ctrlout & ACM_CTRL_RTS ? TIOCM_RTS : 0) |
700 (acm->ctrlin & ACM_CTRL_DSR ? TIOCM_DSR : 0) | 751 (acm->ctrlin & ACM_CTRL_DSR ? TIOCM_DSR : 0) |
@@ -709,9 +760,6 @@ static int acm_tty_tiocmset(struct tty_struct *tty,
709 struct acm *acm = tty->driver_data; 760 struct acm *acm = tty->driver_data;
710 unsigned int newctrl; 761 unsigned int newctrl;
711 762
712 if (!ACM_READY(acm))
713 return -EINVAL;
714
715 newctrl = acm->ctrlout; 763 newctrl = acm->ctrlout;
716 set = (set & TIOCM_DTR ? ACM_CTRL_DTR : 0) | 764 set = (set & TIOCM_DTR ? ACM_CTRL_DTR : 0) |
717 (set & TIOCM_RTS ? ACM_CTRL_RTS : 0); 765 (set & TIOCM_RTS ? ACM_CTRL_RTS : 0);
@@ -728,11 +776,6 @@ static int acm_tty_tiocmset(struct tty_struct *tty,
728static int acm_tty_ioctl(struct tty_struct *tty, 776static int acm_tty_ioctl(struct tty_struct *tty,
729 unsigned int cmd, unsigned long arg) 777 unsigned int cmd, unsigned long arg)
730{ 778{
731 struct acm *acm = tty->driver_data;
732
733 if (!ACM_READY(acm))
734 return -EINVAL;
735
736 return -ENOIOCTLCMD; 779 return -ENOIOCTLCMD;
737} 780}
738 781
@@ -756,9 +799,6 @@ static void acm_tty_set_termios(struct tty_struct *tty,
756 struct usb_cdc_line_coding newline; 799 struct usb_cdc_line_coding newline;
757 int newctrl = acm->ctrlout; 800 int newctrl = acm->ctrlout;
758 801
759 if (!ACM_READY(acm))
760 return;
761
762 newline.dwDTERate = cpu_to_le32(tty_get_baud_rate(tty)); 802 newline.dwDTERate = cpu_to_le32(tty_get_baud_rate(tty));
763 newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 0; 803 newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 0;
764 newline.bParityType = termios->c_cflag & PARENB ? 804 newline.bParityType = termios->c_cflag & PARENB ?
@@ -788,6 +828,12 @@ static void acm_tty_set_termios(struct tty_struct *tty,
788 } 828 }
789} 829}
790 830
831static const struct tty_port_operations acm_port_ops = {
832 .shutdown = acm_port_shutdown,
833 .activate = acm_port_activate,
834 .destruct = acm_port_destruct,
835};
836
791/* 837/*
792 * USB probe and disconnect routines. 838 * USB probe and disconnect routines.
793 */ 839 */
@@ -1047,12 +1093,6 @@ skip_normal_probe:
1047 } 1093 }
1048made_compressed_probe: 1094made_compressed_probe:
1049 dev_dbg(&intf->dev, "interfaces are valid\n"); 1095 dev_dbg(&intf->dev, "interfaces are valid\n");
1050 for (minor = 0; minor < ACM_TTY_MINORS && acm_table[minor]; minor++);
1051
1052 if (minor == ACM_TTY_MINORS) {
1053 dev_err(&intf->dev, "no more free acm devices\n");
1054 return -ENODEV;
1055 }
1056 1096
1057 acm = kzalloc(sizeof(struct acm), GFP_KERNEL); 1097 acm = kzalloc(sizeof(struct acm), GFP_KERNEL);
1058 if (acm == NULL) { 1098 if (acm == NULL) {
@@ -1060,6 +1100,13 @@ made_compressed_probe:
1060 goto alloc_fail; 1100 goto alloc_fail;
1061 } 1101 }
1062 1102
1103 minor = acm_alloc_minor(acm);
1104 if (minor == ACM_TTY_MINORS) {
1105 dev_err(&intf->dev, "no more free acm devices\n");
1106 kfree(acm);
1107 return -ENODEV;
1108 }
1109
1063 ctrlsize = usb_endpoint_maxp(epctrl); 1110 ctrlsize = usb_endpoint_maxp(epctrl);
1064 readsize = usb_endpoint_maxp(epread) * 1111 readsize = usb_endpoint_maxp(epread) *
1065 (quirks == SINGLE_RX_URB ? 1 : 2); 1112 (quirks == SINGLE_RX_URB ? 1 : 2);
@@ -1183,6 +1230,8 @@ made_compressed_probe:
1183 i = device_create_file(&intf->dev, &dev_attr_wCountryCodes); 1230 i = device_create_file(&intf->dev, &dev_attr_wCountryCodes);
1184 if (i < 0) { 1231 if (i < 0) {
1185 kfree(acm->country_codes); 1232 kfree(acm->country_codes);
1233 acm->country_codes = NULL;
1234 acm->country_code_size = 0;
1186 goto skip_countries; 1235 goto skip_countries;
1187 } 1236 }
1188 1237
@@ -1191,6 +1240,8 @@ made_compressed_probe:
1191 if (i < 0) { 1240 if (i < 0) {
1192 device_remove_file(&intf->dev, &dev_attr_wCountryCodes); 1241 device_remove_file(&intf->dev, &dev_attr_wCountryCodes);
1193 kfree(acm->country_codes); 1242 kfree(acm->country_codes);
1243 acm->country_codes = NULL;
1244 acm->country_code_size = 0;
1194 goto skip_countries; 1245 goto skip_countries;
1195 } 1246 }
1196 } 1247 }
@@ -1218,8 +1269,6 @@ skip_countries:
1218 usb_get_intf(control_interface); 1269 usb_get_intf(control_interface);
1219 tty_register_device(acm_tty_driver, minor, &control_interface->dev); 1270 tty_register_device(acm_tty_driver, minor, &control_interface->dev);
1220 1271
1221 acm_table[minor] = acm;
1222
1223 return 0; 1272 return 0;
1224alloc_fail7: 1273alloc_fail7:
1225 for (i = 0; i < ACM_NW; i++) 1274 for (i = 0; i < ACM_NW; i++)
@@ -1234,6 +1283,7 @@ alloc_fail5:
1234alloc_fail4: 1283alloc_fail4:
1235 usb_free_coherent(usb_dev, ctrlsize, acm->ctrl_buffer, acm->ctrl_dma); 1284 usb_free_coherent(usb_dev, ctrlsize, acm->ctrl_buffer, acm->ctrl_dma);
1236alloc_fail2: 1285alloc_fail2:
1286 acm_release_minor(acm);
1237 kfree(acm); 1287 kfree(acm);
1238alloc_fail: 1288alloc_fail:
1239 return -ENOMEM; 1289 return -ENOMEM;
@@ -1259,12 +1309,16 @@ static void acm_disconnect(struct usb_interface *intf)
1259 struct acm *acm = usb_get_intfdata(intf); 1309 struct acm *acm = usb_get_intfdata(intf);
1260 struct usb_device *usb_dev = interface_to_usbdev(intf); 1310 struct usb_device *usb_dev = interface_to_usbdev(intf);
1261 struct tty_struct *tty; 1311 struct tty_struct *tty;
1312 int i;
1313
1314 dev_dbg(&intf->dev, "%s\n", __func__);
1262 1315
1263 /* sibling interface is already cleaning up */ 1316 /* sibling interface is already cleaning up */
1264 if (!acm) 1317 if (!acm)
1265 return; 1318 return;
1266 1319
1267 mutex_lock(&open_mutex); 1320 mutex_lock(&acm->mutex);
1321 acm->disconnected = true;
1268 if (acm->country_codes) { 1322 if (acm->country_codes) {
1269 device_remove_file(&acm->control->dev, 1323 device_remove_file(&acm->control->dev,
1270 &dev_attr_wCountryCodes); 1324 &dev_attr_wCountryCodes);
@@ -1272,33 +1326,32 @@ static void acm_disconnect(struct usb_interface *intf)
1272 &dev_attr_iCountryCodeRelDate); 1326 &dev_attr_iCountryCodeRelDate);
1273 } 1327 }
1274 device_remove_file(&acm->control->dev, &dev_attr_bmCapabilities); 1328 device_remove_file(&acm->control->dev, &dev_attr_bmCapabilities);
1275 acm->dev = NULL;
1276 usb_set_intfdata(acm->control, NULL); 1329 usb_set_intfdata(acm->control, NULL);
1277 usb_set_intfdata(acm->data, NULL); 1330 usb_set_intfdata(acm->data, NULL);
1331 mutex_unlock(&acm->mutex);
1332
1333 tty = tty_port_tty_get(&acm->port);
1334 if (tty) {
1335 tty_vhangup(tty);
1336 tty_kref_put(tty);
1337 }
1278 1338
1279 stop_data_traffic(acm); 1339 stop_data_traffic(acm);
1280 1340
1341 usb_free_urb(acm->ctrlurb);
1342 for (i = 0; i < ACM_NW; i++)
1343 usb_free_urb(acm->wb[i].urb);
1344 for (i = 0; i < acm->rx_buflimit; i++)
1345 usb_free_urb(acm->read_urbs[i]);
1281 acm_write_buffers_free(acm); 1346 acm_write_buffers_free(acm);
1282 usb_free_coherent(usb_dev, acm->ctrlsize, acm->ctrl_buffer, 1347 usb_free_coherent(usb_dev, acm->ctrlsize, acm->ctrl_buffer, acm->ctrl_dma);
1283 acm->ctrl_dma);
1284 acm_read_buffers_free(acm); 1348 acm_read_buffers_free(acm);
1285 1349
1286 if (!acm->combined_interfaces) 1350 if (!acm->combined_interfaces)
1287 usb_driver_release_interface(&acm_driver, intf == acm->control ? 1351 usb_driver_release_interface(&acm_driver, intf == acm->control ?
1288 acm->data : acm->control); 1352 acm->data : acm->control);
1289 1353
1290 if (acm->port.count == 0) { 1354 tty_port_put(&acm->port);
1291 acm_tty_unregister(acm);
1292 mutex_unlock(&open_mutex);
1293 return;
1294 }
1295
1296 mutex_unlock(&open_mutex);
1297 tty = tty_port_tty_get(&acm->port);
1298 if (tty) {
1299 tty_hangup(tty);
1300 tty_kref_put(tty);
1301 }
1302} 1355}
1303 1356
1304#ifdef CONFIG_PM 1357#ifdef CONFIG_PM
@@ -1325,16 +1378,10 @@ static int acm_suspend(struct usb_interface *intf, pm_message_t message)
1325 1378
1326 if (cnt) 1379 if (cnt)
1327 return 0; 1380 return 0;
1328 /*
1329 we treat opened interfaces differently,
1330 we must guard against open
1331 */
1332 mutex_lock(&acm->mutex);
1333 1381
1334 if (acm->port.count) 1382 if (test_bit(ASYNCB_INITIALIZED, &acm->port.flags))
1335 stop_data_traffic(acm); 1383 stop_data_traffic(acm);
1336 1384
1337 mutex_unlock(&acm->mutex);
1338 return 0; 1385 return 0;
1339} 1386}
1340 1387
@@ -1353,8 +1400,7 @@ static int acm_resume(struct usb_interface *intf)
1353 if (cnt) 1400 if (cnt)
1354 return 0; 1401 return 0;
1355 1402
1356 mutex_lock(&acm->mutex); 1403 if (test_bit(ASYNCB_INITIALIZED, &acm->port.flags)) {
1357 if (acm->port.count) {
1358 rv = usb_submit_urb(acm->ctrlurb, GFP_NOIO); 1404 rv = usb_submit_urb(acm->ctrlurb, GFP_NOIO);
1359 1405
1360 spin_lock_irq(&acm->write_lock); 1406 spin_lock_irq(&acm->write_lock);
@@ -1378,7 +1424,6 @@ static int acm_resume(struct usb_interface *intf)
1378 } 1424 }
1379 1425
1380err_out: 1426err_out:
1381 mutex_unlock(&acm->mutex);
1382 return rv; 1427 return rv;
1383} 1428}
1384 1429
@@ -1387,15 +1432,14 @@ static int acm_reset_resume(struct usb_interface *intf)
1387 struct acm *acm = usb_get_intfdata(intf); 1432 struct acm *acm = usb_get_intfdata(intf);
1388 struct tty_struct *tty; 1433 struct tty_struct *tty;
1389 1434
1390 mutex_lock(&acm->mutex); 1435 if (test_bit(ASYNCB_INITIALIZED, &acm->port.flags)) {
1391 if (acm->port.count) {
1392 tty = tty_port_tty_get(&acm->port); 1436 tty = tty_port_tty_get(&acm->port);
1393 if (tty) { 1437 if (tty) {
1394 tty_hangup(tty); 1438 tty_hangup(tty);
1395 tty_kref_put(tty); 1439 tty_kref_put(tty);
1396 } 1440 }
1397 } 1441 }
1398 mutex_unlock(&acm->mutex); 1442
1399 return acm_resume(intf); 1443 return acm_resume(intf);
1400} 1444}
1401 1445
@@ -1604,8 +1648,10 @@ static struct usb_driver acm_driver = {
1604 */ 1648 */
1605 1649
1606static const struct tty_operations acm_ops = { 1650static const struct tty_operations acm_ops = {
1651 .install = acm_tty_install,
1607 .open = acm_tty_open, 1652 .open = acm_tty_open,
1608 .close = acm_tty_close, 1653 .close = acm_tty_close,
1654 .cleanup = acm_tty_cleanup,
1609 .hangup = acm_tty_hangup, 1655 .hangup = acm_tty_hangup,
1610 .write = acm_tty_write, 1656 .write = acm_tty_write,
1611 .write_room = acm_tty_write_room, 1657 .write_room = acm_tty_write_room,
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index ca7937f26e27..35ef887b7417 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -101,6 +101,7 @@ struct acm {
101 int transmitting; 101 int transmitting;
102 spinlock_t write_lock; 102 spinlock_t write_lock;
103 struct mutex mutex; 103 struct mutex mutex;
104 bool disconnected;
104 struct usb_cdc_line_coding line; /* bits, stop, parity */ 105 struct usb_cdc_line_coding line; /* bits, stop, parity */
105 struct work_struct work; /* work queue entry for line discipline waking up */ 106 struct work_struct work; /* work queue entry for line discipline waking up */
106 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */ 107 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index e3beaf229ee3..3af5e2dd1d82 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -86,6 +86,7 @@ struct async {
86 void __user *userbuffer; 86 void __user *userbuffer;
87 void __user *userurb; 87 void __user *userurb;
88 struct urb *urb; 88 struct urb *urb;
89 unsigned int mem_usage;
89 int status; 90 int status;
90 u32 secid; 91 u32 secid;
91 u8 bulk_addr; 92 u8 bulk_addr;
@@ -108,8 +109,44 @@ enum snoop_when {
108 109
109#define USB_DEVICE_DEV MKDEV(USB_DEVICE_MAJOR, 0) 110#define USB_DEVICE_DEV MKDEV(USB_DEVICE_MAJOR, 0)
110 111
111#define MAX_USBFS_BUFFER_SIZE 16384 112/* Limit on the total amount of memory we can allocate for transfers */
113static unsigned usbfs_memory_mb = 16;
114module_param(usbfs_memory_mb, uint, 0644);
115MODULE_PARM_DESC(usbfs_memory_mb,
116 "maximum MB allowed for usbfs buffers (0 = no limit)");
112 117
118/* Hard limit, necessary to avoid aithmetic overflow */
119#define USBFS_XFER_MAX (UINT_MAX / 2 - 1000000)
120
121static atomic_t usbfs_memory_usage; /* Total memory currently allocated */
122
123/* Check whether it's okay to allocate more memory for a transfer */
124static int usbfs_increase_memory_usage(unsigned amount)
125{
126 unsigned lim;
127
128 /*
129 * Convert usbfs_memory_mb to bytes, avoiding overflows.
130 * 0 means use the hard limit (effectively unlimited).
131 */
132 lim = ACCESS_ONCE(usbfs_memory_mb);
133 if (lim == 0 || lim > (USBFS_XFER_MAX >> 20))
134 lim = USBFS_XFER_MAX;
135 else
136 lim <<= 20;
137
138 atomic_add(amount, &usbfs_memory_usage);
139 if (atomic_read(&usbfs_memory_usage) <= lim)
140 return 0;
141 atomic_sub(amount, &usbfs_memory_usage);
142 return -ENOMEM;
143}
144
145/* Memory for a transfer is being deallocated */
146static void usbfs_decrease_memory_usage(unsigned amount)
147{
148 atomic_sub(amount, &usbfs_memory_usage);
149}
113 150
114static int connected(struct dev_state *ps) 151static int connected(struct dev_state *ps)
115{ 152{
@@ -249,10 +286,12 @@ static struct async *alloc_async(unsigned int numisoframes)
249static void free_async(struct async *as) 286static void free_async(struct async *as)
250{ 287{
251 put_pid(as->pid); 288 put_pid(as->pid);
252 put_cred(as->cred); 289 if (as->cred)
290 put_cred(as->cred);
253 kfree(as->urb->transfer_buffer); 291 kfree(as->urb->transfer_buffer);
254 kfree(as->urb->setup_packet); 292 kfree(as->urb->setup_packet);
255 usb_free_urb(as->urb); 293 usb_free_urb(as->urb);
294 usbfs_decrease_memory_usage(as->mem_usage);
256 kfree(as); 295 kfree(as);
257} 296}
258 297
@@ -792,9 +831,15 @@ static int proc_control(struct dev_state *ps, void __user *arg)
792 wLength = ctrl.wLength; /* To suppress 64k PAGE_SIZE warning */ 831 wLength = ctrl.wLength; /* To suppress 64k PAGE_SIZE warning */
793 if (wLength > PAGE_SIZE) 832 if (wLength > PAGE_SIZE)
794 return -EINVAL; 833 return -EINVAL;
834 ret = usbfs_increase_memory_usage(PAGE_SIZE + sizeof(struct urb) +
835 sizeof(struct usb_ctrlrequest));
836 if (ret)
837 return ret;
795 tbuf = (unsigned char *)__get_free_page(GFP_KERNEL); 838 tbuf = (unsigned char *)__get_free_page(GFP_KERNEL);
796 if (!tbuf) 839 if (!tbuf) {
797 return -ENOMEM; 840 ret = -ENOMEM;
841 goto done;
842 }
798 tmo = ctrl.timeout; 843 tmo = ctrl.timeout;
799 snoop(&dev->dev, "control urb: bRequestType=%02x " 844 snoop(&dev->dev, "control urb: bRequestType=%02x "
800 "bRequest=%02x wValue=%04x " 845 "bRequest=%02x wValue=%04x "
@@ -806,8 +851,8 @@ static int proc_control(struct dev_state *ps, void __user *arg)
806 if (ctrl.bRequestType & 0x80) { 851 if (ctrl.bRequestType & 0x80) {
807 if (ctrl.wLength && !access_ok(VERIFY_WRITE, ctrl.data, 852 if (ctrl.wLength && !access_ok(VERIFY_WRITE, ctrl.data,
808 ctrl.wLength)) { 853 ctrl.wLength)) {
809 free_page((unsigned long)tbuf); 854 ret = -EINVAL;
810 return -EINVAL; 855 goto done;
811 } 856 }
812 pipe = usb_rcvctrlpipe(dev, 0); 857 pipe = usb_rcvctrlpipe(dev, 0);
813 snoop_urb(dev, NULL, pipe, ctrl.wLength, tmo, SUBMIT, NULL, 0); 858 snoop_urb(dev, NULL, pipe, ctrl.wLength, tmo, SUBMIT, NULL, 0);
@@ -821,15 +866,15 @@ static int proc_control(struct dev_state *ps, void __user *arg)
821 tbuf, max(i, 0)); 866 tbuf, max(i, 0));
822 if ((i > 0) && ctrl.wLength) { 867 if ((i > 0) && ctrl.wLength) {
823 if (copy_to_user(ctrl.data, tbuf, i)) { 868 if (copy_to_user(ctrl.data, tbuf, i)) {
824 free_page((unsigned long)tbuf); 869 ret = -EFAULT;
825 return -EFAULT; 870 goto done;
826 } 871 }
827 } 872 }
828 } else { 873 } else {
829 if (ctrl.wLength) { 874 if (ctrl.wLength) {
830 if (copy_from_user(tbuf, ctrl.data, ctrl.wLength)) { 875 if (copy_from_user(tbuf, ctrl.data, ctrl.wLength)) {
831 free_page((unsigned long)tbuf); 876 ret = -EFAULT;
832 return -EFAULT; 877 goto done;
833 } 878 }
834 } 879 }
835 pipe = usb_sndctrlpipe(dev, 0); 880 pipe = usb_sndctrlpipe(dev, 0);
@@ -843,14 +888,18 @@ static int proc_control(struct dev_state *ps, void __user *arg)
843 usb_lock_device(dev); 888 usb_lock_device(dev);
844 snoop_urb(dev, NULL, pipe, max(i, 0), min(i, 0), COMPLETE, NULL, 0); 889 snoop_urb(dev, NULL, pipe, max(i, 0), min(i, 0), COMPLETE, NULL, 0);
845 } 890 }
846 free_page((unsigned long)tbuf);
847 if (i < 0 && i != -EPIPE) { 891 if (i < 0 && i != -EPIPE) {
848 dev_printk(KERN_DEBUG, &dev->dev, "usbfs: USBDEVFS_CONTROL " 892 dev_printk(KERN_DEBUG, &dev->dev, "usbfs: USBDEVFS_CONTROL "
849 "failed cmd %s rqt %u rq %u len %u ret %d\n", 893 "failed cmd %s rqt %u rq %u len %u ret %d\n",
850 current->comm, ctrl.bRequestType, ctrl.bRequest, 894 current->comm, ctrl.bRequestType, ctrl.bRequest,
851 ctrl.wLength, i); 895 ctrl.wLength, i);
852 } 896 }
853 return i; 897 ret = i;
898 done:
899 free_page((unsigned long) tbuf);
900 usbfs_decrease_memory_usage(PAGE_SIZE + sizeof(struct urb) +
901 sizeof(struct usb_ctrlrequest));
902 return ret;
854} 903}
855 904
856static int proc_bulk(struct dev_state *ps, void __user *arg) 905static int proc_bulk(struct dev_state *ps, void __user *arg)
@@ -877,15 +926,20 @@ static int proc_bulk(struct dev_state *ps, void __user *arg)
877 if (!usb_maxpacket(dev, pipe, !(bulk.ep & USB_DIR_IN))) 926 if (!usb_maxpacket(dev, pipe, !(bulk.ep & USB_DIR_IN)))
878 return -EINVAL; 927 return -EINVAL;
879 len1 = bulk.len; 928 len1 = bulk.len;
880 if (len1 > MAX_USBFS_BUFFER_SIZE) 929 if (len1 >= USBFS_XFER_MAX)
881 return -EINVAL; 930 return -EINVAL;
882 if (!(tbuf = kmalloc(len1, GFP_KERNEL))) 931 ret = usbfs_increase_memory_usage(len1 + sizeof(struct urb));
883 return -ENOMEM; 932 if (ret)
933 return ret;
934 if (!(tbuf = kmalloc(len1, GFP_KERNEL))) {
935 ret = -ENOMEM;
936 goto done;
937 }
884 tmo = bulk.timeout; 938 tmo = bulk.timeout;
885 if (bulk.ep & 0x80) { 939 if (bulk.ep & 0x80) {
886 if (len1 && !access_ok(VERIFY_WRITE, bulk.data, len1)) { 940 if (len1 && !access_ok(VERIFY_WRITE, bulk.data, len1)) {
887 kfree(tbuf); 941 ret = -EINVAL;
888 return -EINVAL; 942 goto done;
889 } 943 }
890 snoop_urb(dev, NULL, pipe, len1, tmo, SUBMIT, NULL, 0); 944 snoop_urb(dev, NULL, pipe, len1, tmo, SUBMIT, NULL, 0);
891 945
@@ -896,15 +950,15 @@ static int proc_bulk(struct dev_state *ps, void __user *arg)
896 950
897 if (!i && len2) { 951 if (!i && len2) {
898 if (copy_to_user(bulk.data, tbuf, len2)) { 952 if (copy_to_user(bulk.data, tbuf, len2)) {
899 kfree(tbuf); 953 ret = -EFAULT;
900 return -EFAULT; 954 goto done;
901 } 955 }
902 } 956 }
903 } else { 957 } else {
904 if (len1) { 958 if (len1) {
905 if (copy_from_user(tbuf, bulk.data, len1)) { 959 if (copy_from_user(tbuf, bulk.data, len1)) {
906 kfree(tbuf); 960 ret = -EFAULT;
907 return -EFAULT; 961 goto done;
908 } 962 }
909 } 963 }
910 snoop_urb(dev, NULL, pipe, len1, tmo, SUBMIT, tbuf, len1); 964 snoop_urb(dev, NULL, pipe, len1, tmo, SUBMIT, tbuf, len1);
@@ -914,10 +968,11 @@ static int proc_bulk(struct dev_state *ps, void __user *arg)
914 usb_lock_device(dev); 968 usb_lock_device(dev);
915 snoop_urb(dev, NULL, pipe, len2, i, COMPLETE, NULL, 0); 969 snoop_urb(dev, NULL, pipe, len2, i, COMPLETE, NULL, 0);
916 } 970 }
971 ret = (i < 0 ? i : len2);
972 done:
917 kfree(tbuf); 973 kfree(tbuf);
918 if (i < 0) 974 usbfs_decrease_memory_usage(len1 + sizeof(struct urb));
919 return i; 975 return ret;
920 return len2;
921} 976}
922 977
923static int proc_resetep(struct dev_state *ps, void __user *arg) 978static int proc_resetep(struct dev_state *ps, void __user *arg)
@@ -1062,7 +1117,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1062{ 1117{
1063 struct usbdevfs_iso_packet_desc *isopkt = NULL; 1118 struct usbdevfs_iso_packet_desc *isopkt = NULL;
1064 struct usb_host_endpoint *ep; 1119 struct usb_host_endpoint *ep;
1065 struct async *as; 1120 struct async *as = NULL;
1066 struct usb_ctrlrequest *dr = NULL; 1121 struct usb_ctrlrequest *dr = NULL;
1067 unsigned int u, totlen, isofrmlen; 1122 unsigned int u, totlen, isofrmlen;
1068 int ret, ifnum = -1; 1123 int ret, ifnum = -1;
@@ -1095,32 +1150,30 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1095 } 1150 }
1096 if (!ep) 1151 if (!ep)
1097 return -ENOENT; 1152 return -ENOENT;
1153
1154 u = 0;
1098 switch(uurb->type) { 1155 switch(uurb->type) {
1099 case USBDEVFS_URB_TYPE_CONTROL: 1156 case USBDEVFS_URB_TYPE_CONTROL:
1100 if (!usb_endpoint_xfer_control(&ep->desc)) 1157 if (!usb_endpoint_xfer_control(&ep->desc))
1101 return -EINVAL; 1158 return -EINVAL;
1102 /* min 8 byte setup packet, 1159 /* min 8 byte setup packet */
1103 * max 8 byte setup plus an arbitrary data stage */ 1160 if (uurb->buffer_length < 8)
1104 if (uurb->buffer_length < 8 ||
1105 uurb->buffer_length > (8 + MAX_USBFS_BUFFER_SIZE))
1106 return -EINVAL; 1161 return -EINVAL;
1107 dr = kmalloc(sizeof(struct usb_ctrlrequest), GFP_KERNEL); 1162 dr = kmalloc(sizeof(struct usb_ctrlrequest), GFP_KERNEL);
1108 if (!dr) 1163 if (!dr)
1109 return -ENOMEM; 1164 return -ENOMEM;
1110 if (copy_from_user(dr, uurb->buffer, 8)) { 1165 if (copy_from_user(dr, uurb->buffer, 8)) {
1111 kfree(dr); 1166 ret = -EFAULT;
1112 return -EFAULT; 1167 goto error;
1113 } 1168 }
1114 if (uurb->buffer_length < (le16_to_cpup(&dr->wLength) + 8)) { 1169 if (uurb->buffer_length < (le16_to_cpup(&dr->wLength) + 8)) {
1115 kfree(dr); 1170 ret = -EINVAL;
1116 return -EINVAL; 1171 goto error;
1117 } 1172 }
1118 ret = check_ctrlrecip(ps, dr->bRequestType, dr->bRequest, 1173 ret = check_ctrlrecip(ps, dr->bRequestType, dr->bRequest,
1119 le16_to_cpup(&dr->wIndex)); 1174 le16_to_cpup(&dr->wIndex));
1120 if (ret) { 1175 if (ret)
1121 kfree(dr); 1176 goto error;
1122 return ret;
1123 }
1124 uurb->number_of_packets = 0; 1177 uurb->number_of_packets = 0;
1125 uurb->buffer_length = le16_to_cpup(&dr->wLength); 1178 uurb->buffer_length = le16_to_cpup(&dr->wLength);
1126 uurb->buffer += 8; 1179 uurb->buffer += 8;
@@ -1138,6 +1191,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1138 __le16_to_cpup(&dr->wValue), 1191 __le16_to_cpup(&dr->wValue),
1139 __le16_to_cpup(&dr->wIndex), 1192 __le16_to_cpup(&dr->wIndex),
1140 __le16_to_cpup(&dr->wLength)); 1193 __le16_to_cpup(&dr->wLength));
1194 u = sizeof(struct usb_ctrlrequest);
1141 break; 1195 break;
1142 1196
1143 case USBDEVFS_URB_TYPE_BULK: 1197 case USBDEVFS_URB_TYPE_BULK:
@@ -1151,8 +1205,6 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1151 goto interrupt_urb; 1205 goto interrupt_urb;
1152 } 1206 }
1153 uurb->number_of_packets = 0; 1207 uurb->number_of_packets = 0;
1154 if (uurb->buffer_length > MAX_USBFS_BUFFER_SIZE)
1155 return -EINVAL;
1156 break; 1208 break;
1157 1209
1158 case USBDEVFS_URB_TYPE_INTERRUPT: 1210 case USBDEVFS_URB_TYPE_INTERRUPT:
@@ -1160,8 +1212,6 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1160 return -EINVAL; 1212 return -EINVAL;
1161 interrupt_urb: 1213 interrupt_urb:
1162 uurb->number_of_packets = 0; 1214 uurb->number_of_packets = 0;
1163 if (uurb->buffer_length > MAX_USBFS_BUFFER_SIZE)
1164 return -EINVAL;
1165 break; 1215 break;
1166 1216
1167 case USBDEVFS_URB_TYPE_ISO: 1217 case USBDEVFS_URB_TYPE_ISO:
@@ -1176,50 +1226,53 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1176 if (!(isopkt = kmalloc(isofrmlen, GFP_KERNEL))) 1226 if (!(isopkt = kmalloc(isofrmlen, GFP_KERNEL)))
1177 return -ENOMEM; 1227 return -ENOMEM;
1178 if (copy_from_user(isopkt, iso_frame_desc, isofrmlen)) { 1228 if (copy_from_user(isopkt, iso_frame_desc, isofrmlen)) {
1179 kfree(isopkt); 1229 ret = -EFAULT;
1180 return -EFAULT; 1230 goto error;
1181 } 1231 }
1182 for (totlen = u = 0; u < uurb->number_of_packets; u++) { 1232 for (totlen = u = 0; u < uurb->number_of_packets; u++) {
1183 /* arbitrary limit, 1233 /* arbitrary limit,
1184 * sufficient for USB 2.0 high-bandwidth iso */ 1234 * sufficient for USB 2.0 high-bandwidth iso */
1185 if (isopkt[u].length > 8192) { 1235 if (isopkt[u].length > 8192) {
1186 kfree(isopkt); 1236 ret = -EINVAL;
1187 return -EINVAL; 1237 goto error;
1188 } 1238 }
1189 totlen += isopkt[u].length; 1239 totlen += isopkt[u].length;
1190 } 1240 }
1191 /* 3072 * 64 microframes */ 1241 u *= sizeof(struct usb_iso_packet_descriptor);
1192 if (totlen > 196608) {
1193 kfree(isopkt);
1194 return -EINVAL;
1195 }
1196 uurb->buffer_length = totlen; 1242 uurb->buffer_length = totlen;
1197 break; 1243 break;
1198 1244
1199 default: 1245 default:
1200 return -EINVAL; 1246 return -EINVAL;
1201 } 1247 }
1248
1249 if (uurb->buffer_length >= USBFS_XFER_MAX) {
1250 ret = -EINVAL;
1251 goto error;
1252 }
1202 if (uurb->buffer_length > 0 && 1253 if (uurb->buffer_length > 0 &&
1203 !access_ok(is_in ? VERIFY_WRITE : VERIFY_READ, 1254 !access_ok(is_in ? VERIFY_WRITE : VERIFY_READ,
1204 uurb->buffer, uurb->buffer_length)) { 1255 uurb->buffer, uurb->buffer_length)) {
1205 kfree(isopkt); 1256 ret = -EFAULT;
1206 kfree(dr); 1257 goto error;
1207 return -EFAULT;
1208 } 1258 }
1209 as = alloc_async(uurb->number_of_packets); 1259 as = alloc_async(uurb->number_of_packets);
1210 if (!as) { 1260 if (!as) {
1211 kfree(isopkt); 1261 ret = -ENOMEM;
1212 kfree(dr); 1262 goto error;
1213 return -ENOMEM;
1214 } 1263 }
1264 u += sizeof(struct async) + sizeof(struct urb) + uurb->buffer_length;
1265 ret = usbfs_increase_memory_usage(u);
1266 if (ret)
1267 goto error;
1268 as->mem_usage = u;
1269
1215 if (uurb->buffer_length > 0) { 1270 if (uurb->buffer_length > 0) {
1216 as->urb->transfer_buffer = kmalloc(uurb->buffer_length, 1271 as->urb->transfer_buffer = kmalloc(uurb->buffer_length,
1217 GFP_KERNEL); 1272 GFP_KERNEL);
1218 if (!as->urb->transfer_buffer) { 1273 if (!as->urb->transfer_buffer) {
1219 kfree(isopkt); 1274 ret = -ENOMEM;
1220 kfree(dr); 1275 goto error;
1221 free_async(as);
1222 return -ENOMEM;
1223 } 1276 }
1224 /* Isochronous input data may end up being discontiguous 1277 /* Isochronous input data may end up being discontiguous
1225 * if some of the packets are short. Clear the buffer so 1278 * if some of the packets are short. Clear the buffer so
@@ -1253,6 +1306,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1253 1306
1254 as->urb->transfer_buffer_length = uurb->buffer_length; 1307 as->urb->transfer_buffer_length = uurb->buffer_length;
1255 as->urb->setup_packet = (unsigned char *)dr; 1308 as->urb->setup_packet = (unsigned char *)dr;
1309 dr = NULL;
1256 as->urb->start_frame = uurb->start_frame; 1310 as->urb->start_frame = uurb->start_frame;
1257 as->urb->number_of_packets = uurb->number_of_packets; 1311 as->urb->number_of_packets = uurb->number_of_packets;
1258 if (uurb->type == USBDEVFS_URB_TYPE_ISO || 1312 if (uurb->type == USBDEVFS_URB_TYPE_ISO ||
@@ -1268,6 +1322,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1268 totlen += isopkt[u].length; 1322 totlen += isopkt[u].length;
1269 } 1323 }
1270 kfree(isopkt); 1324 kfree(isopkt);
1325 isopkt = NULL;
1271 as->ps = ps; 1326 as->ps = ps;
1272 as->userurb = arg; 1327 as->userurb = arg;
1273 if (is_in && uurb->buffer_length > 0) 1328 if (is_in && uurb->buffer_length > 0)
@@ -1282,8 +1337,8 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1282 if (!is_in && uurb->buffer_length > 0) { 1337 if (!is_in && uurb->buffer_length > 0) {
1283 if (copy_from_user(as->urb->transfer_buffer, uurb->buffer, 1338 if (copy_from_user(as->urb->transfer_buffer, uurb->buffer,
1284 uurb->buffer_length)) { 1339 uurb->buffer_length)) {
1285 free_async(as); 1340 ret = -EFAULT;
1286 return -EFAULT; 1341 goto error;
1287 } 1342 }
1288 } 1343 }
1289 snoop_urb(ps->dev, as->userurb, as->urb->pipe, 1344 snoop_urb(ps->dev, as->userurb, as->urb->pipe,
@@ -1329,10 +1384,16 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1329 snoop_urb(ps->dev, as->userurb, as->urb->pipe, 1384 snoop_urb(ps->dev, as->userurb, as->urb->pipe,
1330 0, ret, COMPLETE, NULL, 0); 1385 0, ret, COMPLETE, NULL, 0);
1331 async_removepending(as); 1386 async_removepending(as);
1332 free_async(as); 1387 goto error;
1333 return ret;
1334 } 1388 }
1335 return 0; 1389 return 0;
1390
1391 error:
1392 kfree(isopkt);
1393 kfree(dr);
1394 if (as)
1395 free_async(as);
1396 return ret;
1336} 1397}
1337 1398
1338static int proc_submiturb(struct dev_state *ps, void __user *arg) 1399static int proc_submiturb(struct dev_state *ps, void __user *arg)
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index 45887a0ff873..d40ff9568813 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -45,10 +45,12 @@ ssize_t usb_store_new_id(struct usb_dynids *dynids,
45 struct usb_dynid *dynid; 45 struct usb_dynid *dynid;
46 u32 idVendor = 0; 46 u32 idVendor = 0;
47 u32 idProduct = 0; 47 u32 idProduct = 0;
48 unsigned int bInterfaceClass = 0;
48 int fields = 0; 49 int fields = 0;
49 int retval = 0; 50 int retval = 0;
50 51
51 fields = sscanf(buf, "%x %x", &idVendor, &idProduct); 52 fields = sscanf(buf, "%x %x %x", &idVendor, &idProduct,
53 &bInterfaceClass);
52 if (fields < 2) 54 if (fields < 2)
53 return -EINVAL; 55 return -EINVAL;
54 56
@@ -60,6 +62,10 @@ ssize_t usb_store_new_id(struct usb_dynids *dynids,
60 dynid->id.idVendor = idVendor; 62 dynid->id.idVendor = idVendor;
61 dynid->id.idProduct = idProduct; 63 dynid->id.idProduct = idProduct;
62 dynid->id.match_flags = USB_DEVICE_ID_MATCH_DEVICE; 64 dynid->id.match_flags = USB_DEVICE_ID_MATCH_DEVICE;
65 if (fields == 3) {
66 dynid->id.bInterfaceClass = (u8)bInterfaceClass;
67 dynid->id.match_flags |= USB_DEVICE_ID_MATCH_INT_CLASS;
68 }
63 69
64 spin_lock(&dynids->lock); 70 spin_lock(&dynids->lock);
65 list_add_tail(&dynid->node, &dynids->list); 71 list_add_tail(&dynid->node, &dynids->list);
@@ -1073,17 +1079,10 @@ static int usb_suspend_interface(struct usb_device *udev,
1073 goto done; 1079 goto done;
1074 driver = to_usb_driver(intf->dev.driver); 1080 driver = to_usb_driver(intf->dev.driver);
1075 1081
1076 if (driver->suspend) { 1082 /* at this time we know the driver supports suspend */
1077 status = driver->suspend(intf, msg); 1083 status = driver->suspend(intf, msg);
1078 if (status && !PMSG_IS_AUTO(msg)) 1084 if (status && !PMSG_IS_AUTO(msg))
1079 dev_err(&intf->dev, "%s error %d\n", 1085 dev_err(&intf->dev, "suspend error %d\n", status);
1080 "suspend", status);
1081 } else {
1082 /* Later we will unbind the driver and reprobe */
1083 intf->needs_binding = 1;
1084 dev_warn(&intf->dev, "no %s for driver %s?\n",
1085 "suspend", driver->name);
1086 }
1087 1086
1088 done: 1087 done:
1089 dev_vdbg(&intf->dev, "%s: status %d\n", __func__, status); 1088 dev_vdbg(&intf->dev, "%s: status %d\n", __func__, status);
@@ -1132,16 +1131,9 @@ static int usb_resume_interface(struct usb_device *udev,
1132 "reset_resume", driver->name); 1131 "reset_resume", driver->name);
1133 } 1132 }
1134 } else { 1133 } else {
1135 if (driver->resume) { 1134 status = driver->resume(intf);
1136 status = driver->resume(intf); 1135 if (status)
1137 if (status) 1136 dev_err(&intf->dev, "resume error %d\n", status);
1138 dev_err(&intf->dev, "%s error %d\n",
1139 "resume", status);
1140 } else {
1141 intf->needs_binding = 1;
1142 dev_warn(&intf->dev, "no %s for driver %s?\n",
1143 "resume", driver->name);
1144 }
1145 } 1137 }
1146 1138
1147done: 1139done:
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
index a004db35f6d0..d136b8f4c8a7 100644
--- a/drivers/usb/core/hcd-pci.c
+++ b/drivers/usb/core/hcd-pci.c
@@ -453,10 +453,6 @@ static int resume_common(struct device *dev, int event)
453 453
454 pci_set_master(pci_dev); 454 pci_set_master(pci_dev);
455 455
456 clear_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
457 if (hcd->shared_hcd)
458 clear_bit(HCD_FLAG_SAW_IRQ, &hcd->shared_hcd->flags);
459
460 if (hcd->driver->pci_resume && !HCD_DEAD(hcd)) { 456 if (hcd->driver->pci_resume && !HCD_DEAD(hcd)) {
461 if (event != PM_EVENT_AUTO_RESUME) 457 if (event != PM_EVENT_AUTO_RESUME)
462 wait_for_companions(pci_dev, hcd); 458 wait_for_companions(pci_dev, hcd);
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 13222d352a61..eb19cba34ac9 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -658,7 +658,7 @@ error:
658 len > offsetof(struct usb_device_descriptor, 658 len > offsetof(struct usb_device_descriptor,
659 bDeviceProtocol)) 659 bDeviceProtocol))
660 ((struct usb_device_descriptor *) ubuf)-> 660 ((struct usb_device_descriptor *) ubuf)->
661 bDeviceProtocol = 1; 661 bDeviceProtocol = USB_HUB_PR_HS_SINGLE_TT;
662 } 662 }
663 663
664 /* any errors get returned through the urb completion */ 664 /* any errors get returned through the urb completion */
@@ -1168,20 +1168,6 @@ int usb_hcd_check_unlink_urb(struct usb_hcd *hcd, struct urb *urb,
1168 if (urb->unlinked) 1168 if (urb->unlinked)
1169 return -EBUSY; 1169 return -EBUSY;
1170 urb->unlinked = status; 1170 urb->unlinked = status;
1171
1172 /* IRQ setup can easily be broken so that USB controllers
1173 * never get completion IRQs ... maybe even the ones we need to
1174 * finish unlinking the initial failed usb_set_address()
1175 * or device descriptor fetch.
1176 */
1177 if (!HCD_SAW_IRQ(hcd) && !is_root_hub(urb->dev)) {
1178 dev_warn(hcd->self.controller, "Unlink after no-IRQ? "
1179 "Controller is probably using the wrong IRQ.\n");
1180 set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
1181 if (hcd->shared_hcd)
1182 set_bit(HCD_FLAG_SAW_IRQ, &hcd->shared_hcd->flags);
1183 }
1184
1185 return 0; 1171 return 0;
1186} 1172}
1187EXPORT_SYMBOL_GPL(usb_hcd_check_unlink_urb); 1173EXPORT_SYMBOL_GPL(usb_hcd_check_unlink_urb);
@@ -1412,11 +1398,10 @@ int usb_hcd_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
1412 ret = -EAGAIN; 1398 ret = -EAGAIN;
1413 else 1399 else
1414 urb->transfer_flags |= URB_DMA_MAP_SG; 1400 urb->transfer_flags |= URB_DMA_MAP_SG;
1415 if (n != urb->num_sgs) { 1401 urb->num_mapped_sgs = n;
1416 urb->num_sgs = n; 1402 if (n != urb->num_sgs)
1417 urb->transfer_flags |= 1403 urb->transfer_flags |=
1418 URB_DMA_SG_COMBINED; 1404 URB_DMA_SG_COMBINED;
1419 }
1420 } else if (urb->sg) { 1405 } else if (urb->sg) {
1421 struct scatterlist *sg = urb->sg; 1406 struct scatterlist *sg = urb->sg;
1422 urb->transfer_dma = dma_map_page( 1407 urb->transfer_dma = dma_map_page(
@@ -2148,16 +2133,12 @@ irqreturn_t usb_hcd_irq (int irq, void *__hcd)
2148 */ 2133 */
2149 local_irq_save(flags); 2134 local_irq_save(flags);
2150 2135
2151 if (unlikely(HCD_DEAD(hcd) || !HCD_HW_ACCESSIBLE(hcd))) { 2136 if (unlikely(HCD_DEAD(hcd) || !HCD_HW_ACCESSIBLE(hcd)))
2152 rc = IRQ_NONE; 2137 rc = IRQ_NONE;
2153 } else if (hcd->driver->irq(hcd) == IRQ_NONE) { 2138 else if (hcd->driver->irq(hcd) == IRQ_NONE)
2154 rc = IRQ_NONE; 2139 rc = IRQ_NONE;
2155 } else { 2140 else
2156 set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
2157 if (hcd->shared_hcd)
2158 set_bit(HCD_FLAG_SAW_IRQ, &hcd->shared_hcd->flags);
2159 rc = IRQ_HANDLED; 2141 rc = IRQ_HANDLED;
2160 }
2161 2142
2162 local_irq_restore(flags); 2143 local_irq_restore(flags);
2163 return rc; 2144 return rc;
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 79781461eec9..79d339e2e700 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -84,7 +84,7 @@ struct usb_hub {
84 84
85static inline int hub_is_superspeed(struct usb_device *hdev) 85static inline int hub_is_superspeed(struct usb_device *hdev)
86{ 86{
87 return (hdev->descriptor.bDeviceProtocol == 3); 87 return (hdev->descriptor.bDeviceProtocol == USB_HUB_PR_SS);
88} 88}
89 89
90/* Protect struct usb_device->state and ->children members 90/* Protect struct usb_device->state and ->children members
@@ -1041,58 +1041,58 @@ static int hub_configure(struct usb_hub *hub,
1041 dev_dbg(hub_dev, "standalone hub\n"); 1041 dev_dbg(hub_dev, "standalone hub\n");
1042 1042
1043 switch (wHubCharacteristics & HUB_CHAR_LPSM) { 1043 switch (wHubCharacteristics & HUB_CHAR_LPSM) {
1044 case 0x00: 1044 case HUB_CHAR_COMMON_LPSM:
1045 dev_dbg(hub_dev, "ganged power switching\n"); 1045 dev_dbg(hub_dev, "ganged power switching\n");
1046 break; 1046 break;
1047 case 0x01: 1047 case HUB_CHAR_INDV_PORT_LPSM:
1048 dev_dbg(hub_dev, "individual port power switching\n"); 1048 dev_dbg(hub_dev, "individual port power switching\n");
1049 break; 1049 break;
1050 case 0x02: 1050 case HUB_CHAR_NO_LPSM:
1051 case 0x03: 1051 case HUB_CHAR_LPSM:
1052 dev_dbg(hub_dev, "no power switching (usb 1.0)\n"); 1052 dev_dbg(hub_dev, "no power switching (usb 1.0)\n");
1053 break; 1053 break;
1054 } 1054 }
1055 1055
1056 switch (wHubCharacteristics & HUB_CHAR_OCPM) { 1056 switch (wHubCharacteristics & HUB_CHAR_OCPM) {
1057 case 0x00: 1057 case HUB_CHAR_COMMON_OCPM:
1058 dev_dbg(hub_dev, "global over-current protection\n"); 1058 dev_dbg(hub_dev, "global over-current protection\n");
1059 break; 1059 break;
1060 case 0x08: 1060 case HUB_CHAR_INDV_PORT_OCPM:
1061 dev_dbg(hub_dev, "individual port over-current protection\n"); 1061 dev_dbg(hub_dev, "individual port over-current protection\n");
1062 break; 1062 break;
1063 case 0x10: 1063 case HUB_CHAR_NO_OCPM:
1064 case 0x18: 1064 case HUB_CHAR_OCPM:
1065 dev_dbg(hub_dev, "no over-current protection\n"); 1065 dev_dbg(hub_dev, "no over-current protection\n");
1066 break; 1066 break;
1067 } 1067 }
1068 1068
1069 spin_lock_init (&hub->tt.lock); 1069 spin_lock_init (&hub->tt.lock);
1070 INIT_LIST_HEAD (&hub->tt.clear_list); 1070 INIT_LIST_HEAD (&hub->tt.clear_list);
1071 INIT_WORK(&hub->tt.clear_work, hub_tt_work); 1071 INIT_WORK(&hub->tt.clear_work, hub_tt_work);
1072 switch (hdev->descriptor.bDeviceProtocol) { 1072 switch (hdev->descriptor.bDeviceProtocol) {
1073 case 0: 1073 case USB_HUB_PR_FS:
1074 break; 1074 break;
1075 case 1: 1075 case USB_HUB_PR_HS_SINGLE_TT:
1076 dev_dbg(hub_dev, "Single TT\n"); 1076 dev_dbg(hub_dev, "Single TT\n");
1077 hub->tt.hub = hdev; 1077 hub->tt.hub = hdev;
1078 break; 1078 break;
1079 case 2: 1079 case USB_HUB_PR_HS_MULTI_TT:
1080 ret = usb_set_interface(hdev, 0, 1); 1080 ret = usb_set_interface(hdev, 0, 1);
1081 if (ret == 0) { 1081 if (ret == 0) {
1082 dev_dbg(hub_dev, "TT per port\n"); 1082 dev_dbg(hub_dev, "TT per port\n");
1083 hub->tt.multi = 1; 1083 hub->tt.multi = 1;
1084 } else 1084 } else
1085 dev_err(hub_dev, "Using single TT (err %d)\n", 1085 dev_err(hub_dev, "Using single TT (err %d)\n",
1086 ret); 1086 ret);
1087 hub->tt.hub = hdev; 1087 hub->tt.hub = hdev;
1088 break; 1088 break;
1089 case 3: 1089 case USB_HUB_PR_SS:
1090 /* USB 3.0 hubs don't have a TT */ 1090 /* USB 3.0 hubs don't have a TT */
1091 break; 1091 break;
1092 default: 1092 default:
1093 dev_dbg(hub_dev, "Unrecognized hub protocol %d\n", 1093 dev_dbg(hub_dev, "Unrecognized hub protocol %d\n",
1094 hdev->descriptor.bDeviceProtocol); 1094 hdev->descriptor.bDeviceProtocol);
1095 break; 1095 break;
1096 } 1096 }
1097 1097
1098 /* Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns */ 1098 /* Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns */
@@ -1360,7 +1360,6 @@ descriptor_error:
1360 return -ENODEV; 1360 return -ENODEV;
1361} 1361}
1362 1362
1363/* No BKL needed */
1364static int 1363static int
1365hub_ioctl(struct usb_interface *intf, unsigned int code, void *user_data) 1364hub_ioctl(struct usb_interface *intf, unsigned int code, void *user_data)
1366{ 1365{
diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
index ecf12e15a7ef..4c65eb6a867a 100644
--- a/drivers/usb/core/quirks.c
+++ b/drivers/usb/core/quirks.c
@@ -117,9 +117,12 @@ static const struct usb_device_id usb_quirk_list[] = {
117 { USB_DEVICE(0x06a3, 0x0006), .driver_info = 117 { USB_DEVICE(0x06a3, 0x0006), .driver_info =
118 USB_QUIRK_CONFIG_INTF_STRINGS }, 118 USB_QUIRK_CONFIG_INTF_STRINGS },
119 119
120 /* Guillemot Webcam Hercules Dualpix Exchange*/ 120 /* Guillemot Webcam Hercules Dualpix Exchange (2nd ID) */
121 { USB_DEVICE(0x06f8, 0x0804), .driver_info = USB_QUIRK_RESET_RESUME }, 121 { USB_DEVICE(0x06f8, 0x0804), .driver_info = USB_QUIRK_RESET_RESUME },
122 122
123 /* Guillemot Webcam Hercules Dualpix Exchange*/
124 { USB_DEVICE(0x06f8, 0x3005), .driver_info = USB_QUIRK_RESET_RESUME },
125
123 /* M-Systems Flash Disk Pioneers */ 126 /* M-Systems Flash Disk Pioneers */
124 { USB_DEVICE(0x08ec, 0x1000), .driver_info = USB_QUIRK_RESET_RESUME }, 127 { USB_DEVICE(0x08ec, 0x1000), .driver_info = USB_QUIRK_RESET_RESUME },
125 128
diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
index 3888778582c4..45e8479c377d 100644
--- a/drivers/usb/core/usb.h
+++ b/drivers/usb/core/usb.h
@@ -132,20 +132,6 @@ static inline int is_usb_device_driver(struct device_driver *drv)
132 for_devices; 132 for_devices;
133} 133}
134 134
135/* translate USB error codes to codes user space understands */
136static inline int usb_translate_errors(int error_code)
137{
138 switch (error_code) {
139 case 0:
140 case -ENOMEM:
141 case -ENODEV:
142 return error_code;
143 default:
144 return -EIO;
145 }
146}
147
148
149/* for labeling diagnostics */ 135/* for labeling diagnostics */
150extern const char *usbcore_name; 136extern const char *usbcore_name;
151 137
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 3c1d67d324fd..d8f741f9e56e 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -1,7 +1,10 @@
1config USB_DWC3 1config USB_DWC3
2 tristate "DesignWare USB3 DRD Core Support" 2 tristate "DesignWare USB3 DRD Core Support"
3 depends on (USB || USB_GADGET) 3 depends on (USB && USB_GADGET)
4 select USB_OTG_UTILS 4 select USB_OTG_UTILS
5 select USB_GADGET_DUALSPEED
6 select USB_GADGET_SUPERSPEED
7 select USB_XHCI_PLATFORM
5 help 8 help
6 Say Y or M here if your system has a Dual Role SuperSpeed 9 Say Y or M here if your system has a Dual Role SuperSpeed
7 USB controller based on the DesignWare USB3 IP Core. 10 USB controller based on the DesignWare USB3 IP Core.
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 593d1dbc465b..900ae74357f1 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -4,10 +4,8 @@ ccflags-$(CONFIG_USB_DWC3_VERBOSE) += -DVERBOSE_DEBUG
4obj-$(CONFIG_USB_DWC3) += dwc3.o 4obj-$(CONFIG_USB_DWC3) += dwc3.o
5 5
6dwc3-y := core.o 6dwc3-y := core.o
7 7dwc3-y += host.o
8ifneq ($(CONFIG_USB_GADGET_DWC3),) 8dwc3-y += gadget.o ep0.o
9 dwc3-y += gadget.o ep0.o
10endif
11 9
12ifneq ($(CONFIG_DEBUG_FS),) 10ifneq ($(CONFIG_DEBUG_FS),)
13 dwc3-y += debugfs.o 11 dwc3-y += debugfs.o
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 600d82348511..7c9df630dbe4 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -59,6 +59,60 @@
59 59
60#include "debug.h" 60#include "debug.h"
61 61
62static char *maximum_speed = "super";
63module_param(maximum_speed, charp, 0);
64MODULE_PARM_DESC(maximum_speed, "Maximum supported speed.");
65
66/* -------------------------------------------------------------------------- */
67
68#define DWC3_DEVS_POSSIBLE 32
69
70static DECLARE_BITMAP(dwc3_devs, DWC3_DEVS_POSSIBLE);
71
72int dwc3_get_device_id(void)
73{
74 int id;
75
76again:
77 id = find_first_zero_bit(dwc3_devs, DWC3_DEVS_POSSIBLE);
78 if (id < DWC3_DEVS_POSSIBLE) {
79 int old;
80
81 old = test_and_set_bit(id, dwc3_devs);
82 if (old)
83 goto again;
84 } else {
85 pr_err("dwc3: no space for new device\n");
86 id = -ENOMEM;
87 }
88
89 return 0;
90}
91EXPORT_SYMBOL_GPL(dwc3_get_device_id);
92
93void dwc3_put_device_id(int id)
94{
95 int ret;
96
97 if (id < 0)
98 return;
99
100 ret = test_bit(id, dwc3_devs);
101 WARN(!ret, "dwc3: ID %d not in use\n", id);
102 clear_bit(id, dwc3_devs);
103}
104EXPORT_SYMBOL_GPL(dwc3_put_device_id);
105
106void dwc3_set_mode(struct dwc3 *dwc, u32 mode)
107{
108 u32 reg;
109
110 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
111 reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG));
112 reg |= DWC3_GCTL_PRTCAPDIR(mode);
113 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
114}
115
62/** 116/**
63 * dwc3_core_soft_reset - Issues core soft reset and PHY reset 117 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
64 * @dwc: pointer to our context structure 118 * @dwc: pointer to our context structure
@@ -150,7 +204,7 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
150 struct dwc3_event_buffer *evt; 204 struct dwc3_event_buffer *evt;
151 int i; 205 int i;
152 206
153 for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) { 207 for (i = 0; i < dwc->num_event_buffers; i++) {
154 evt = dwc->ev_buffs[i]; 208 evt = dwc->ev_buffs[i];
155 if (evt) { 209 if (evt) {
156 dwc3_free_one_event_buffer(dwc, evt); 210 dwc3_free_one_event_buffer(dwc, evt);
@@ -162,17 +216,25 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
162/** 216/**
163 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length 217 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
164 * @dwc: Pointer to out controller context structure 218 * @dwc: Pointer to out controller context structure
165 * @num: number of event buffers to allocate
166 * @length: size of event buffer 219 * @length: size of event buffer
167 * 220 *
168 * Returns 0 on success otherwise negative errno. In error the case, dwc 221 * Returns 0 on success otherwise negative errno. In error the case, dwc
169 * may contain some buffers allocated but not all which were requested. 222 * may contain some buffers allocated but not all which were requested.
170 */ 223 */
171static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned num, 224static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
172 unsigned length)
173{ 225{
226 int num;
174 int i; 227 int i;
175 228
229 num = DWC3_NUM_INT(dwc->hwparams.hwparams1);
230 dwc->num_event_buffers = num;
231
232 dwc->ev_buffs = kzalloc(sizeof(*dwc->ev_buffs) * num, GFP_KERNEL);
233 if (!dwc->ev_buffs) {
234 dev_err(dwc->dev, "can't allocate event buffers array\n");
235 return -ENOMEM;
236 }
237
176 for (i = 0; i < num; i++) { 238 for (i = 0; i < num; i++) {
177 struct dwc3_event_buffer *evt; 239 struct dwc3_event_buffer *evt;
178 240
@@ -198,7 +260,7 @@ static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc)
198 struct dwc3_event_buffer *evt; 260 struct dwc3_event_buffer *evt;
199 int n; 261 int n;
200 262
201 for (n = 0; n < DWC3_EVENT_BUFFERS_NUM; n++) { 263 for (n = 0; n < dwc->num_event_buffers; n++) {
202 evt = dwc->ev_buffs[n]; 264 evt = dwc->ev_buffs[n];
203 dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n", 265 dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n",
204 evt->buf, (unsigned long long) evt->dma, 266 evt->buf, (unsigned long long) evt->dma,
@@ -221,7 +283,7 @@ static void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
221 struct dwc3_event_buffer *evt; 283 struct dwc3_event_buffer *evt;
222 int n; 284 int n;
223 285
224 for (n = 0; n < DWC3_EVENT_BUFFERS_NUM; n++) { 286 for (n = 0; n < dwc->num_event_buffers; n++) {
225 evt = dwc->ev_buffs[n]; 287 evt = dwc->ev_buffs[n];
226 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0); 288 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0);
227 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0); 289 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0);
@@ -285,8 +347,32 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
285 cpu_relax(); 347 cpu_relax();
286 } while (true); 348 } while (true);
287 349
288 ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_NUM, 350 dwc3_cache_hwparams(dwc);
289 DWC3_EVENT_BUFFERS_SIZE); 351
352 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
353 reg &= ~DWC3_GCTL_SCALEDOWN(3);
354 reg &= ~DWC3_GCTL_DISSCRAMBLE;
355
356 switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) {
357 case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
358 reg &= ~DWC3_GCTL_DSBLCLKGTNG;
359 break;
360 default:
361 dev_dbg(dwc->dev, "No power optimization available\n");
362 }
363
364 /*
365 * WORKAROUND: DWC3 revisions <1.90a have a bug
366 * when The device fails to connect at SuperSpeed
367 * and falls back to high-speed mode which causes
368 * the device to enter in a Connect/Disconnect loop
369 */
370 if (dwc->revision < DWC3_REVISION_190A)
371 reg |= DWC3_GCTL_U2RSTECN;
372
373 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
374
375 ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
290 if (ret) { 376 if (ret) {
291 dev_err(dwc->dev, "failed to allocate event buffers\n"); 377 dev_err(dwc->dev, "failed to allocate event buffers\n");
292 ret = -ENOMEM; 378 ret = -ENOMEM;
@@ -299,8 +385,6 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
299 goto err1; 385 goto err1;
300 } 386 }
301 387
302 dwc3_cache_hwparams(dwc);
303
304 return 0; 388 return 0;
305 389
306err1: 390err1:
@@ -320,15 +404,17 @@ static void dwc3_core_exit(struct dwc3 *dwc)
320 404
321static int __devinit dwc3_probe(struct platform_device *pdev) 405static int __devinit dwc3_probe(struct platform_device *pdev)
322{ 406{
323 const struct platform_device_id *id = platform_get_device_id(pdev);
324 struct resource *res; 407 struct resource *res;
325 struct dwc3 *dwc; 408 struct dwc3 *dwc;
326 void __iomem *regs; 409
327 unsigned int features = id->driver_data;
328 int ret = -ENOMEM; 410 int ret = -ENOMEM;
329 int irq; 411 int irq;
412
413 void __iomem *regs;
330 void *mem; 414 void *mem;
331 415
416 u8 mode;
417
332 mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); 418 mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
333 if (!mem) { 419 if (!mem) {
334 dev_err(&pdev->dev, "not enough memory\n"); 420 dev_err(&pdev->dev, "not enough memory\n");
@@ -343,6 +429,8 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
343 goto err1; 429 goto err1;
344 } 430 }
345 431
432 dwc->res = res;
433
346 res = request_mem_region(res->start, resource_size(res), 434 res = request_mem_region(res->start, resource_size(res),
347 dev_name(&pdev->dev)); 435 dev_name(&pdev->dev));
348 if (!res) { 436 if (!res) {
@@ -370,6 +458,17 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
370 dwc->dev = &pdev->dev; 458 dwc->dev = &pdev->dev;
371 dwc->irq = irq; 459 dwc->irq = irq;
372 460
461 if (!strncmp("super", maximum_speed, 5))
462 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
463 else if (!strncmp("high", maximum_speed, 4))
464 dwc->maximum_speed = DWC3_DCFG_HIGHSPEED;
465 else if (!strncmp("full", maximum_speed, 4))
466 dwc->maximum_speed = DWC3_DCFG_FULLSPEED1;
467 else if (!strncmp("low", maximum_speed, 3))
468 dwc->maximum_speed = DWC3_DCFG_LOWSPEED;
469 else
470 dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
471
373 pm_runtime_enable(&pdev->dev); 472 pm_runtime_enable(&pdev->dev);
374 pm_runtime_get_sync(&pdev->dev); 473 pm_runtime_get_sync(&pdev->dev);
375 pm_runtime_forbid(&pdev->dev); 474 pm_runtime_forbid(&pdev->dev);
@@ -380,13 +479,44 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
380 goto err3; 479 goto err3;
381 } 480 }
382 481
383 if (features & DWC3_HAS_PERIPHERAL) { 482 mode = DWC3_MODE(dwc->hwparams.hwparams0);
483
484 switch (mode) {
485 case DWC3_MODE_DEVICE:
486 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
384 ret = dwc3_gadget_init(dwc); 487 ret = dwc3_gadget_init(dwc);
385 if (ret) { 488 if (ret) {
386 dev_err(&pdev->dev, "failed to initialized gadget\n"); 489 dev_err(&pdev->dev, "failed to initialize gadget\n");
387 goto err4; 490 goto err4;
388 } 491 }
492 break;
493 case DWC3_MODE_HOST:
494 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
495 ret = dwc3_host_init(dwc);
496 if (ret) {
497 dev_err(&pdev->dev, "failed to initialize host\n");
498 goto err4;
499 }
500 break;
501 case DWC3_MODE_DRD:
502 dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
503 ret = dwc3_host_init(dwc);
504 if (ret) {
505 dev_err(&pdev->dev, "failed to initialize host\n");
506 goto err4;
507 }
508
509 ret = dwc3_gadget_init(dwc);
510 if (ret) {
511 dev_err(&pdev->dev, "failed to initialize gadget\n");
512 goto err4;
513 }
514 break;
515 default:
516 dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode);
517 goto err4;
389 } 518 }
519 dwc->mode = mode;
390 520
391 ret = dwc3_debugfs_init(dwc); 521 ret = dwc3_debugfs_init(dwc);
392 if (ret) { 522 if (ret) {
@@ -399,8 +529,21 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
399 return 0; 529 return 0;
400 530
401err5: 531err5:
402 if (features & DWC3_HAS_PERIPHERAL) 532 switch (mode) {
533 case DWC3_MODE_DEVICE:
534 dwc3_gadget_exit(dwc);
535 break;
536 case DWC3_MODE_HOST:
537 dwc3_host_exit(dwc);
538 break;
539 case DWC3_MODE_DRD:
540 dwc3_host_exit(dwc);
403 dwc3_gadget_exit(dwc); 541 dwc3_gadget_exit(dwc);
542 break;
543 default:
544 /* do nothing */
545 break;
546 }
404 547
405err4: 548err4:
406 dwc3_core_exit(dwc); 549 dwc3_core_exit(dwc);
@@ -420,10 +563,8 @@ err0:
420 563
421static int __devexit dwc3_remove(struct platform_device *pdev) 564static int __devexit dwc3_remove(struct platform_device *pdev)
422{ 565{
423 const struct platform_device_id *id = platform_get_device_id(pdev);
424 struct dwc3 *dwc = platform_get_drvdata(pdev); 566 struct dwc3 *dwc = platform_get_drvdata(pdev);
425 struct resource *res; 567 struct resource *res;
426 unsigned int features = id->driver_data;
427 568
428 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 569 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
429 570
@@ -432,8 +573,21 @@ static int __devexit dwc3_remove(struct platform_device *pdev)
432 573
433 dwc3_debugfs_exit(dwc); 574 dwc3_debugfs_exit(dwc);
434 575
435 if (features & DWC3_HAS_PERIPHERAL) 576 switch (dwc->mode) {
577 case DWC3_MODE_DEVICE:
578 dwc3_gadget_exit(dwc);
579 break;
580 case DWC3_MODE_HOST:
581 dwc3_host_exit(dwc);
582 break;
583 case DWC3_MODE_DRD:
584 dwc3_host_exit(dwc);
436 dwc3_gadget_exit(dwc); 585 dwc3_gadget_exit(dwc);
586 break;
587 default:
588 /* do nothing */
589 break;
590 }
437 591
438 dwc3_core_exit(dwc); 592 dwc3_core_exit(dwc);
439 release_mem_region(res->start, resource_size(res)); 593 release_mem_region(res->start, resource_size(res));
@@ -443,30 +597,15 @@ static int __devexit dwc3_remove(struct platform_device *pdev)
443 return 0; 597 return 0;
444} 598}
445 599
446static const struct platform_device_id dwc3_id_table[] __devinitconst = {
447 {
448 .name = "dwc3-omap",
449 .driver_data = (DWC3_HAS_PERIPHERAL
450 | DWC3_HAS_XHCI
451 | DWC3_HAS_OTG),
452 },
453 {
454 .name = "dwc3-pci",
455 .driver_data = DWC3_HAS_PERIPHERAL,
456 },
457 { }, /* Terminating Entry */
458};
459MODULE_DEVICE_TABLE(platform, dwc3_id_table);
460
461static struct platform_driver dwc3_driver = { 600static struct platform_driver dwc3_driver = {
462 .probe = dwc3_probe, 601 .probe = dwc3_probe,
463 .remove = __devexit_p(dwc3_remove), 602 .remove = __devexit_p(dwc3_remove),
464 .driver = { 603 .driver = {
465 .name = "dwc3", 604 .name = "dwc3",
466 }, 605 },
467 .id_table = dwc3_id_table,
468}; 606};
469 607
608MODULE_ALIAS("platform:dwc3");
470MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 609MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
471MODULE_LICENSE("Dual BSD/GPL"); 610MODULE_LICENSE("Dual BSD/GPL");
472MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); 611MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 29a8e1679e12..9e57f8e9bf17 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -41,6 +41,7 @@
41 41
42#include <linux/device.h> 42#include <linux/device.h>
43#include <linux/spinlock.h> 43#include <linux/spinlock.h>
44#include <linux/ioport.h>
44#include <linux/list.h> 45#include <linux/list.h>
45#include <linux/dma-mapping.h> 46#include <linux/dma-mapping.h>
46#include <linux/mm.h> 47#include <linux/mm.h>
@@ -52,7 +53,6 @@
52/* Global constants */ 53/* Global constants */
53#define DWC3_ENDPOINTS_NUM 32 54#define DWC3_ENDPOINTS_NUM 32
54 55
55#define DWC3_EVENT_BUFFERS_NUM 2
56#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE 56#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE
57#define DWC3_EVENT_TYPE_MASK 0xfe 57#define DWC3_EVENT_TYPE_MASK 0xfe
58 58
@@ -153,6 +153,7 @@
153#define DWC3_GCTL_CLK_PIPEHALF (2) 153#define DWC3_GCTL_CLK_PIPEHALF (2)
154#define DWC3_GCTL_CLK_MASK (3) 154#define DWC3_GCTL_CLK_MASK (3)
155 155
156#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
156#define DWC3_GCTL_PRTCAPDIR(n) (n << 12) 157#define DWC3_GCTL_PRTCAPDIR(n) (n << 12)
157#define DWC3_GCTL_PRTCAP_HOST 1 158#define DWC3_GCTL_PRTCAP_HOST 1
158#define DWC3_GCTL_PRTCAP_DEVICE 2 159#define DWC3_GCTL_PRTCAP_DEVICE 2
@@ -347,6 +348,7 @@ struct dwc3_ep {
347 u32 free_slot; 348 u32 free_slot;
348 u32 busy_slot; 349 u32 busy_slot;
349 const struct usb_endpoint_descriptor *desc; 350 const struct usb_endpoint_descriptor *desc;
351 const struct usb_ss_ep_comp_descriptor *comp_desc;
350 struct dwc3 *dwc; 352 struct dwc3 *dwc;
351 353
352 unsigned flags; 354 unsigned flags;
@@ -536,6 +538,31 @@ struct dwc3_hwparams {
536 u32 hwparams8; 538 u32 hwparams8;
537}; 539};
538 540
541/* HWPARAMS0 */
542#define DWC3_MODE(n) ((n) & 0x7)
543
544#define DWC3_MODE_DEVICE 0
545#define DWC3_MODE_HOST 1
546#define DWC3_MODE_DRD 2
547#define DWC3_MODE_HUB 3
548
549/* HWPARAMS1 */
550#define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15)
551
552struct dwc3_request {
553 struct usb_request request;
554 struct list_head list;
555 struct dwc3_ep *dep;
556
557 u8 epnum;
558 struct dwc3_trb_hw *trb;
559 dma_addr_t trb_dma;
560
561 unsigned direction:1;
562 unsigned mapped:1;
563 unsigned queued:1;
564};
565
539/** 566/**
540 * struct dwc3 - representation of our controller 567 * struct dwc3 - representation of our controller
541 * @ctrl_req: usb control request which is used for ep0 568 * @ctrl_req: usb control request which is used for ep0
@@ -549,19 +576,24 @@ struct dwc3_hwparams {
549 * @ep0_bounce_addr: dma address of ep0_bounce 576 * @ep0_bounce_addr: dma address of ep0_bounce
550 * @lock: for synchronizing 577 * @lock: for synchronizing
551 * @dev: pointer to our struct device 578 * @dev: pointer to our struct device
579 * @xhci: pointer to our xHCI child
552 * @event_buffer_list: a list of event buffers 580 * @event_buffer_list: a list of event buffers
553 * @gadget: device side representation of the peripheral controller 581 * @gadget: device side representation of the peripheral controller
554 * @gadget_driver: pointer to the gadget driver 582 * @gadget_driver: pointer to the gadget driver
555 * @regs: base address for our registers 583 * @regs: base address for our registers
556 * @regs_size: address space size 584 * @regs_size: address space size
557 * @irq: IRQ number 585 * @irq: IRQ number
586 * @num_event_buffers: calculated number of event buffers
587 * @u1u2: only used on revisions <1.83a for workaround
588 * @maximum_speed: maximum speed requested (mainly for testing purposes)
558 * @revision: revision register contents 589 * @revision: revision register contents
590 * @mode: mode of operation
559 * @is_selfpowered: true when we are selfpowered 591 * @is_selfpowered: true when we are selfpowered
560 * @three_stage_setup: set if we perform a three phase setup 592 * @three_stage_setup: set if we perform a three phase setup
561 * @ep0_status_pending: ep0 status response without a req is pending
562 * @ep0_bounced: true when we used bounce buffer 593 * @ep0_bounced: true when we used bounce buffer
563 * @ep0_expect_in: true when we expect a DATA IN transfer 594 * @ep0_expect_in: true when we expect a DATA IN transfer
564 * @start_config_issued: true when StartConfig command has been issued 595 * @start_config_issued: true when StartConfig command has been issued
596 * @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround
565 * @ep0_next_event: hold the next expected event 597 * @ep0_next_event: hold the next expected event
566 * @ep0state: state of endpoint zero 598 * @ep0state: state of endpoint zero
567 * @link_state: link state 599 * @link_state: link state
@@ -579,12 +611,15 @@ struct dwc3 {
579 dma_addr_t ep0_trb_addr; 611 dma_addr_t ep0_trb_addr;
580 dma_addr_t setup_buf_addr; 612 dma_addr_t setup_buf_addr;
581 dma_addr_t ep0_bounce_addr; 613 dma_addr_t ep0_bounce_addr;
582 struct usb_request ep0_usb_req; 614 struct dwc3_request ep0_usb_req;
583 /* device lock */ 615 /* device lock */
584 spinlock_t lock; 616 spinlock_t lock;
585 struct device *dev; 617 struct device *dev;
586 618
587 struct dwc3_event_buffer *ev_buffs[DWC3_EVENT_BUFFERS_NUM]; 619 struct platform_device *xhci;
620 struct resource *res;
621
622 struct dwc3_event_buffer **ev_buffs;
588 struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM]; 623 struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM];
589 624
590 struct usb_gadget gadget; 625 struct usb_gadget gadget;
@@ -595,7 +630,11 @@ struct dwc3 {
595 630
596 int irq; 631 int irq;
597 632
633 u32 num_event_buffers;
634 u32 u1u2;
635 u32 maximum_speed;
598 u32 revision; 636 u32 revision;
637 u32 mode;
599 638
600#define DWC3_REVISION_173A 0x5533173a 639#define DWC3_REVISION_173A 0x5533173a
601#define DWC3_REVISION_175A 0x5533175a 640#define DWC3_REVISION_175A 0x5533175a
@@ -607,10 +646,11 @@ struct dwc3 {
607 646
608 unsigned is_selfpowered:1; 647 unsigned is_selfpowered:1;
609 unsigned three_stage_setup:1; 648 unsigned three_stage_setup:1;
610 unsigned ep0_status_pending:1;
611 unsigned ep0_bounced:1; 649 unsigned ep0_bounced:1;
612 unsigned ep0_expect_in:1; 650 unsigned ep0_expect_in:1;
613 unsigned start_config_issued:1; 651 unsigned start_config_issued:1;
652 unsigned setup_packet_pending:1;
653 unsigned delayed_status:1;
614 654
615 enum dwc3_ep0_next ep0_next_event; 655 enum dwc3_ep0_next ep0_next_event;
616 enum dwc3_ep0_state ep0state; 656 enum dwc3_ep0_state ep0state;
@@ -765,4 +805,16 @@ union dwc3_event {
765#define DWC3_HAS_XHCI BIT(1) 805#define DWC3_HAS_XHCI BIT(1)
766#define DWC3_HAS_OTG BIT(3) 806#define DWC3_HAS_OTG BIT(3)
767 807
808/* prototypes */
809void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
810
811int dwc3_host_init(struct dwc3 *dwc);
812void dwc3_host_exit(struct dwc3 *dwc);
813
814int dwc3_gadget_init(struct dwc3 *dwc);
815void dwc3_gadget_exit(struct dwc3 *dwc);
816
817extern int dwc3_get_device_id(void);
818extern void dwc3_put_device_id(int id);
819
768#endif /* __DRIVERS_USB_DWC3_CORE_H */ 820#endif /* __DRIVERS_USB_DWC3_CORE_H */
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
index fcfa91517ea1..433c97c15fc5 100644
--- a/drivers/usb/dwc3/debugfs.c
+++ b/drivers/usb/dwc3/debugfs.c
@@ -44,12 +44,12 @@
44#include <linux/debugfs.h> 44#include <linux/debugfs.h>
45#include <linux/seq_file.h> 45#include <linux/seq_file.h>
46#include <linux/delay.h> 46#include <linux/delay.h>
47 47#include <linux/uaccess.h>
48#include <asm/uaccess.h>
49 48
50#include "core.h" 49#include "core.h"
51#include "gadget.h" 50#include "gadget.h"
52#include "io.h" 51#include "io.h"
52#include "debug.h"
53 53
54#define dump_register(nm) \ 54#define dump_register(nm) \
55{ \ 55{ \
@@ -395,6 +395,75 @@ static const struct file_operations dwc3_regdump_fops = {
395 .release = single_release, 395 .release = single_release,
396}; 396};
397 397
398static int dwc3_mode_show(struct seq_file *s, void *unused)
399{
400 struct dwc3 *dwc = s->private;
401 unsigned long flags;
402 u32 reg;
403
404 spin_lock_irqsave(&dwc->lock, flags);
405 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
406 spin_unlock_irqrestore(&dwc->lock, flags);
407
408 switch (DWC3_GCTL_PRTCAP(reg)) {
409 case DWC3_GCTL_PRTCAP_HOST:
410 seq_printf(s, "host\n");
411 break;
412 case DWC3_GCTL_PRTCAP_DEVICE:
413 seq_printf(s, "device\n");
414 break;
415 case DWC3_GCTL_PRTCAP_OTG:
416 seq_printf(s, "OTG\n");
417 break;
418 default:
419 seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg));
420 }
421
422 return 0;
423}
424
425static int dwc3_mode_open(struct inode *inode, struct file *file)
426{
427 return single_open(file, dwc3_mode_show, inode->i_private);
428}
429
430static ssize_t dwc3_mode_write(struct file *file,
431 const char __user *ubuf, size_t count, loff_t *ppos)
432{
433 struct seq_file *s = file->private_data;
434 struct dwc3 *dwc = s->private;
435 unsigned long flags;
436 u32 mode = 0;
437 char buf[32];
438
439 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
440 return -EFAULT;
441
442 if (!strncmp(buf, "host", 4))
443 mode |= DWC3_GCTL_PRTCAP_HOST;
444
445 if (!strncmp(buf, "device", 6))
446 mode |= DWC3_GCTL_PRTCAP_DEVICE;
447
448 if (!strncmp(buf, "otg", 3))
449 mode |= DWC3_GCTL_PRTCAP_OTG;
450
451 if (mode) {
452 spin_lock_irqsave(&dwc->lock, flags);
453 dwc3_set_mode(dwc, mode);
454 spin_unlock_irqrestore(&dwc->lock, flags);
455 }
456 return count;
457}
458
459static const struct file_operations dwc3_mode_fops = {
460 .open = dwc3_mode_open,
461 .write = dwc3_mode_write,
462 .read = seq_read,
463 .llseek = seq_lseek,
464 .release = single_release,
465};
466
398int __devinit dwc3_debugfs_init(struct dwc3 *dwc) 467int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
399{ 468{
400 struct dentry *root; 469 struct dentry *root;
@@ -402,7 +471,7 @@ int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
402 int ret; 471 int ret;
403 472
404 root = debugfs_create_dir(dev_name(dwc->dev), NULL); 473 root = debugfs_create_dir(dev_name(dwc->dev), NULL);
405 if (IS_ERR(root)){ 474 if (IS_ERR(root)) {
406 ret = PTR_ERR(root); 475 ret = PTR_ERR(root);
407 goto err0; 476 goto err0;
408 } 477 }
@@ -415,6 +484,14 @@ int __devinit dwc3_debugfs_init(struct dwc3 *dwc)
415 ret = PTR_ERR(file); 484 ret = PTR_ERR(file);
416 goto err1; 485 goto err1;
417 } 486 }
487
488 file = debugfs_create_file("mode", S_IRUGO | S_IWUSR, root,
489 dwc, &dwc3_mode_fops);
490 if (IS_ERR(file)) {
491 ret = PTR_ERR(file);
492 goto err1;
493 }
494
418 return 0; 495 return 0;
419 496
420err1: 497err1:
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 062552b5fc8a..3274ac8f1200 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -48,6 +48,7 @@
48#include <linux/io.h> 48#include <linux/io.h>
49#include <linux/module.h> 49#include <linux/module.h>
50 50
51#include "core.h"
51#include "io.h" 52#include "io.h"
52 53
53/* 54/*
@@ -200,6 +201,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
200 struct dwc3_omap *omap; 201 struct dwc3_omap *omap;
201 struct resource *res; 202 struct resource *res;
202 203
204 int devid;
203 int ret = -ENOMEM; 205 int ret = -ENOMEM;
204 int irq; 206 int irq;
205 207
@@ -236,16 +238,20 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
236 goto err1; 238 goto err1;
237 } 239 }
238 240
239 dwc3 = platform_device_alloc("dwc3-omap", -1); 241 devid = dwc3_get_device_id();
242 if (devid < 0)
243 goto err2;
244
245 dwc3 = platform_device_alloc("dwc3", devid);
240 if (!dwc3) { 246 if (!dwc3) {
241 dev_err(&pdev->dev, "couldn't allocate dwc3 device\n"); 247 dev_err(&pdev->dev, "couldn't allocate dwc3 device\n");
242 goto err2; 248 goto err3;
243 } 249 }
244 250
245 context = kzalloc(resource_size(res), GFP_KERNEL); 251 context = kzalloc(resource_size(res), GFP_KERNEL);
246 if (!context) { 252 if (!context) {
247 dev_err(&pdev->dev, "couldn't allocate dwc3 context memory\n"); 253 dev_err(&pdev->dev, "couldn't allocate dwc3 context memory\n");
248 goto err3; 254 goto err4;
249 } 255 }
250 256
251 spin_lock_init(&omap->lock); 257 spin_lock_init(&omap->lock);
@@ -299,7 +305,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
299 if (ret) { 305 if (ret) {
300 dev_err(&pdev->dev, "failed to request IRQ #%d --> %d\n", 306 dev_err(&pdev->dev, "failed to request IRQ #%d --> %d\n",
301 omap->irq, ret); 307 omap->irq, ret);
302 goto err4; 308 goto err5;
303 } 309 }
304 310
305 /* enable all IRQs */ 311 /* enable all IRQs */
@@ -322,26 +328,29 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
322 pdev->num_resources); 328 pdev->num_resources);
323 if (ret) { 329 if (ret) {
324 dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n"); 330 dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n");
325 goto err5; 331 goto err6;
326 } 332 }
327 333
328 ret = platform_device_add(dwc3); 334 ret = platform_device_add(dwc3);
329 if (ret) { 335 if (ret) {
330 dev_err(&pdev->dev, "failed to register dwc3 device\n"); 336 dev_err(&pdev->dev, "failed to register dwc3 device\n");
331 goto err5; 337 goto err6;
332 } 338 }
333 339
334 return 0; 340 return 0;
335 341
336err5: 342err6:
337 free_irq(omap->irq, omap); 343 free_irq(omap->irq, omap);
338 344
339err4: 345err5:
340 kfree(omap->context); 346 kfree(omap->context);
341 347
342err3: 348err4:
343 platform_device_put(dwc3); 349 platform_device_put(dwc3);
344 350
351err3:
352 dwc3_put_device_id(devid);
353
345err2: 354err2:
346 iounmap(base); 355 iounmap(base);
347 356
@@ -358,6 +367,7 @@ static int __devexit dwc3_omap_remove(struct platform_device *pdev)
358 367
359 platform_device_unregister(omap->dwc3); 368 platform_device_unregister(omap->dwc3);
360 369
370 dwc3_put_device_id(omap->dwc3->id);
361 free_irq(omap->irq, omap); 371 free_irq(omap->irq, omap);
362 iounmap(omap->base); 372 iounmap(omap->base);
363 373
@@ -384,18 +394,9 @@ static struct platform_driver dwc3_omap_driver = {
384 }, 394 },
385}; 395};
386 396
397module_platform_driver(dwc3_omap_driver);
398
399MODULE_ALIAS("platform:omap-dwc3");
387MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 400MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
388MODULE_LICENSE("Dual BSD/GPL"); 401MODULE_LICENSE("Dual BSD/GPL");
389MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer"); 402MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer");
390
391static int __devinit dwc3_omap_init(void)
392{
393 return platform_driver_register(&dwc3_omap_driver);
394}
395module_init(dwc3_omap_init);
396
397static void __exit dwc3_omap_exit(void)
398{
399 platform_driver_unregister(&dwc3_omap_driver);
400}
401module_exit(dwc3_omap_exit);
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index f77c00042685..64e1f7c67b08 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -42,52 +42,17 @@
42#include <linux/pci.h> 42#include <linux/pci.h>
43#include <linux/platform_device.h> 43#include <linux/platform_device.h>
44 44
45#include "core.h"
46
45/* FIXME define these in <linux/pci_ids.h> */ 47/* FIXME define these in <linux/pci_ids.h> */
46#define PCI_VENDOR_ID_SYNOPSYS 0x16c3 48#define PCI_VENDOR_ID_SYNOPSYS 0x16c3
47#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd 49#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
48 50
49#define DWC3_PCI_DEVS_POSSIBLE 32
50
51struct dwc3_pci { 51struct dwc3_pci {
52 struct device *dev; 52 struct device *dev;
53 struct platform_device *dwc3; 53 struct platform_device *dwc3;
54}; 54};
55 55
56static DECLARE_BITMAP(dwc3_pci_devs, DWC3_PCI_DEVS_POSSIBLE);
57
58static int dwc3_pci_get_device_id(struct dwc3_pci *glue)
59{
60 int id;
61
62again:
63 id = find_first_zero_bit(dwc3_pci_devs, DWC3_PCI_DEVS_POSSIBLE);
64 if (id < DWC3_PCI_DEVS_POSSIBLE) {
65 int old;
66
67 old = test_and_set_bit(id, dwc3_pci_devs);
68 if (old)
69 goto again;
70 } else {
71 dev_err(glue->dev, "no space for new device\n");
72 id = -ENOMEM;
73 }
74
75 return 0;
76}
77
78static void dwc3_pci_put_device_id(struct dwc3_pci *glue, int id)
79{
80 int ret;
81
82 if (id < 0)
83 return;
84
85 ret = test_bit(id, dwc3_pci_devs);
86 WARN(!ret, "Device: %s\nID %d not in use\n",
87 dev_driver_string(glue->dev), id);
88 clear_bit(id, dwc3_pci_devs);
89}
90
91static int __devinit dwc3_pci_probe(struct pci_dev *pci, 56static int __devinit dwc3_pci_probe(struct pci_dev *pci,
92 const struct pci_device_id *id) 57 const struct pci_device_id *id)
93{ 58{
@@ -114,11 +79,11 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci,
114 pci_set_power_state(pci, PCI_D0); 79 pci_set_power_state(pci, PCI_D0);
115 pci_set_master(pci); 80 pci_set_master(pci);
116 81
117 devid = dwc3_pci_get_device_id(glue); 82 devid = dwc3_get_device_id();
118 if (devid < 0) 83 if (devid < 0)
119 goto err2; 84 goto err2;
120 85
121 dwc3 = platform_device_alloc("dwc3-pci", devid); 86 dwc3 = platform_device_alloc("dwc3", devid);
122 if (!dwc3) { 87 if (!dwc3) {
123 dev_err(&pci->dev, "couldn't allocate dwc3 device\n"); 88 dev_err(&pci->dev, "couldn't allocate dwc3 device\n");
124 goto err3; 89 goto err3;
@@ -163,13 +128,13 @@ err4:
163 platform_device_put(dwc3); 128 platform_device_put(dwc3);
164 129
165err3: 130err3:
166 dwc3_pci_put_device_id(glue, devid); 131 dwc3_put_device_id(devid);
167 132
168err2: 133err2:
169 pci_disable_device(pci); 134 pci_disable_device(pci);
170 135
171err1: 136err1:
172 kfree(pci); 137 kfree(glue);
173 138
174err0: 139err0:
175 return ret; 140 return ret;
@@ -179,7 +144,7 @@ static void __devexit dwc3_pci_remove(struct pci_dev *pci)
179{ 144{
180 struct dwc3_pci *glue = pci_get_drvdata(pci); 145 struct dwc3_pci *glue = pci_get_drvdata(pci);
181 146
182 dwc3_pci_put_device_id(glue, glue->dwc3->id); 147 dwc3_put_device_id(glue->dwc3->id);
183 platform_device_unregister(glue->dwc3); 148 platform_device_unregister(glue->dwc3);
184 pci_set_drvdata(pci, NULL); 149 pci_set_drvdata(pci, NULL);
185 pci_disable_device(pci); 150 pci_disable_device(pci);
@@ -196,7 +161,7 @@ static DEFINE_PCI_DEVICE_TABLE(dwc3_pci_id_table) = {
196MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 161MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
197 162
198static struct pci_driver dwc3_pci_driver = { 163static struct pci_driver dwc3_pci_driver = {
199 .name = "pci-dwc3", 164 .name = "dwc3-pci",
200 .id_table = dwc3_pci_id_table, 165 .id_table = dwc3_pci_id_table,
201 .probe = dwc3_pci_probe, 166 .probe = dwc3_pci_probe,
202 .remove = __devexit_p(dwc3_pci_remove), 167 .remove = __devexit_p(dwc3_pci_remove),
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 69a4e43ddf59..2f51de57593a 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -48,13 +48,13 @@
48 48
49#include <linux/usb/ch9.h> 49#include <linux/usb/ch9.h>
50#include <linux/usb/gadget.h> 50#include <linux/usb/gadget.h>
51#include <linux/usb/composite.h>
51 52
52#include "core.h" 53#include "core.h"
53#include "gadget.h" 54#include "gadget.h"
54#include "io.h" 55#include "io.h"
55 56
56static void dwc3_ep0_inspect_setup(struct dwc3 *dwc, 57static void dwc3_ep0_do_control_status(struct dwc3 *dwc, u32 epnum);
57 const struct dwc3_event_depevt *event);
58 58
59static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state) 59static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
60{ 60{
@@ -125,6 +125,8 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
125static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, 125static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
126 struct dwc3_request *req) 126 struct dwc3_request *req)
127{ 127{
128 struct dwc3 *dwc = dep->dwc;
129 u32 type;
128 int ret = 0; 130 int ret = 0;
129 131
130 req->request.actual = 0; 132 req->request.actual = 0;
@@ -143,9 +145,7 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
143 * IRQ we were waiting for is long gone. 145 * IRQ we were waiting for is long gone.
144 */ 146 */
145 if (dep->flags & DWC3_EP_PENDING_REQUEST) { 147 if (dep->flags & DWC3_EP_PENDING_REQUEST) {
146 struct dwc3 *dwc = dep->dwc;
147 unsigned direction; 148 unsigned direction;
148 u32 type;
149 149
150 direction = !!(dep->flags & DWC3_EP0_DIR_IN); 150 direction = !!(dep->flags & DWC3_EP0_DIR_IN);
151 151
@@ -165,6 +165,13 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
165 req->request.dma, req->request.length, type); 165 req->request.dma, req->request.length, type);
166 dep->flags &= ~(DWC3_EP_PENDING_REQUEST | 166 dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
167 DWC3_EP0_DIR_IN); 167 DWC3_EP0_DIR_IN);
168 } else if (dwc->delayed_status) {
169 dwc->delayed_status = false;
170
171 if (dwc->ep0state == EP0_STATUS_PHASE)
172 dwc3_ep0_do_control_status(dwc, 1);
173 else
174 dev_dbg(dwc->dev, "too early for delayed status\n");
168 } 175 }
169 176
170 return ret; 177 return ret;
@@ -190,9 +197,7 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
190 } 197 }
191 198
192 /* we share one TRB for ep0/1 */ 199 /* we share one TRB for ep0/1 */
193 if (!list_empty(&dwc->eps[0]->request_list) || 200 if (!list_empty(&dep->request_list)) {
194 !list_empty(&dwc->eps[1]->request_list) ||
195 dwc->ep0_status_pending) {
196 ret = -EBUSY; 201 ret = -EBUSY;
197 goto out; 202 goto out;
198 } 203 }
@@ -214,8 +219,9 @@ static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)
214 struct dwc3_ep *dep = dwc->eps[0]; 219 struct dwc3_ep *dep = dwc->eps[0];
215 220
216 /* stall is always issued on EP0 */ 221 /* stall is always issued on EP0 */
217 __dwc3_gadget_ep_set_halt(dwc->eps[0], 1); 222 __dwc3_gadget_ep_set_halt(dep, 1);
218 dwc->eps[0]->flags = DWC3_EP_ENABLED; 223 dep->flags = DWC3_EP_ENABLED;
224 dwc->delayed_status = false;
219 225
220 if (!list_empty(&dep->request_list)) { 226 if (!list_empty(&dep->request_list)) {
221 struct dwc3_request *req; 227 struct dwc3_request *req;
@@ -254,17 +260,14 @@ static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)
254 return NULL; 260 return NULL;
255} 261}
256 262
257static void dwc3_ep0_send_status_response(struct dwc3 *dwc) 263static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req)
258{ 264{
259 dwc3_ep0_start_trans(dwc, 1, dwc->setup_buf_addr,
260 dwc->ep0_usb_req.length,
261 DWC3_TRBCTL_CONTROL_DATA);
262} 265}
263
264/* 266/*
265 * ch 9.4.5 267 * ch 9.4.5
266 */ 268 */
267static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) 269static int dwc3_ep0_handle_status(struct dwc3 *dwc,
270 struct usb_ctrlrequest *ctrl)
268{ 271{
269 struct dwc3_ep *dep; 272 struct dwc3_ep *dep;
270 u32 recip; 273 u32 recip;
@@ -291,7 +294,7 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl
291 case USB_RECIP_ENDPOINT: 294 case USB_RECIP_ENDPOINT:
292 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex); 295 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
293 if (!dep) 296 if (!dep)
294 return -EINVAL; 297 return -EINVAL;
295 298
296 if (dep->flags & DWC3_EP_STALL) 299 if (dep->flags & DWC3_EP_STALL)
297 usb_status = 1 << USB_ENDPOINT_HALT; 300 usb_status = 1 << USB_ENDPOINT_HALT;
@@ -302,10 +305,14 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl
302 305
303 response_pkt = (__le16 *) dwc->setup_buf; 306 response_pkt = (__le16 *) dwc->setup_buf;
304 *response_pkt = cpu_to_le16(usb_status); 307 *response_pkt = cpu_to_le16(usb_status);
305 dwc->ep0_usb_req.length = sizeof(*response_pkt);
306 dwc->ep0_status_pending = 1;
307 308
308 return 0; 309 dep = dwc->eps[0];
310 dwc->ep0_usb_req.dep = dep;
311 dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
312 dwc->ep0_usb_req.request.dma = dwc->setup_buf_addr;
313 dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
314
315 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
309} 316}
310 317
311static int dwc3_ep0_handle_feature(struct dwc3 *dwc, 318static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
@@ -396,8 +403,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
396 case USB_RECIP_ENDPOINT: 403 case USB_RECIP_ENDPOINT:
397 switch (wValue) { 404 switch (wValue) {
398 case USB_ENDPOINT_HALT: 405 case USB_ENDPOINT_HALT:
399 406 dep = dwc3_wIndex_to_dep(dwc, wIndex);
400 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
401 if (!dep) 407 if (!dep)
402 return -EINVAL; 408 return -EINVAL;
403 ret = __dwc3_gadget_ep_set_halt(dep, set); 409 ret = __dwc3_gadget_ep_set_halt(dep, set);
@@ -422,8 +428,15 @@ static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
422 u32 reg; 428 u32 reg;
423 429
424 addr = le16_to_cpu(ctrl->wValue); 430 addr = le16_to_cpu(ctrl->wValue);
425 if (addr > 127) 431 if (addr > 127) {
432 dev_dbg(dwc->dev, "invalid device address %d\n", addr);
426 return -EINVAL; 433 return -EINVAL;
434 }
435
436 if (dwc->dev_state == DWC3_CONFIGURED_STATE) {
437 dev_dbg(dwc->dev, "trying to set address when configured\n");
438 return -EINVAL;
439 }
427 440
428 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 441 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
429 reg &= ~(DWC3_DCFG_DEVADDR_MASK); 442 reg &= ~(DWC3_DCFG_DEVADDR_MASK);
@@ -473,8 +486,10 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
473 if (!cfg) 486 if (!cfg)
474 dwc->dev_state = DWC3_ADDRESS_STATE; 487 dwc->dev_state = DWC3_ADDRESS_STATE;
475 break; 488 break;
489 default:
490 ret = -EINVAL;
476 } 491 }
477 return 0; 492 return ret;
478} 493}
479 494
480static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) 495static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
@@ -537,6 +552,9 @@ static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
537 else 552 else
538 ret = dwc3_ep0_delegate_req(dwc, ctrl); 553 ret = dwc3_ep0_delegate_req(dwc, ctrl);
539 554
555 if (ret == USB_GADGET_DELAYED_STATUS)
556 dwc->delayed_status = true;
557
540 if (ret >= 0) 558 if (ret >= 0)
541 return; 559 return;
542 560
@@ -550,27 +568,21 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
550 struct dwc3_request *r = NULL; 568 struct dwc3_request *r = NULL;
551 struct usb_request *ur; 569 struct usb_request *ur;
552 struct dwc3_trb trb; 570 struct dwc3_trb trb;
553 struct dwc3_ep *dep; 571 struct dwc3_ep *ep0;
554 u32 transferred; 572 u32 transferred;
555 u8 epnum; 573 u8 epnum;
556 574
557 epnum = event->endpoint_number; 575 epnum = event->endpoint_number;
558 dep = dwc->eps[epnum]; 576 ep0 = dwc->eps[0];
559 577
560 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; 578 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
561 579
562 if (!dwc->ep0_status_pending) { 580 r = next_request(&ep0->request_list);
563 r = next_request(&dwc->eps[0]->request_list); 581 ur = &r->request;
564 ur = &r->request;
565 } else {
566 ur = &dwc->ep0_usb_req;
567 dwc->ep0_status_pending = 0;
568 }
569 582
570 dwc3_trb_to_nat(dwc->ep0_trb, &trb); 583 dwc3_trb_to_nat(dwc->ep0_trb, &trb);
571 584
572 if (dwc->ep0_bounced) { 585 if (dwc->ep0_bounced) {
573 struct dwc3_ep *ep0 = dwc->eps[0];
574 586
575 transferred = min_t(u32, ur->length, 587 transferred = min_t(u32, ur->length,
576 ep0->endpoint.maxpacket - trb.length); 588 ep0->endpoint.maxpacket - trb.length);
@@ -591,7 +603,7 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
591 * seems to be case when req.length > maxpacket. Could it be? 603 * seems to be case when req.length > maxpacket. Could it be?
592 */ 604 */
593 if (r) 605 if (r)
594 dwc3_gadget_giveback(dep, r, 0); 606 dwc3_gadget_giveback(ep0, r, 0);
595 } 607 }
596} 608}
597 609
@@ -619,6 +631,7 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
619 struct dwc3_ep *dep = dwc->eps[event->endpoint_number]; 631 struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
620 632
621 dep->flags &= ~DWC3_EP_BUSY; 633 dep->flags &= ~DWC3_EP_BUSY;
634 dwc->setup_packet_pending = false;
622 635
623 switch (dwc->ep0state) { 636 switch (dwc->ep0state) {
624 case EP0_SETUP_PHASE: 637 case EP0_SETUP_PHASE:
@@ -643,7 +656,6 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
643static void dwc3_ep0_do_control_setup(struct dwc3 *dwc, 656static void dwc3_ep0_do_control_setup(struct dwc3 *dwc,
644 const struct dwc3_event_depevt *event) 657 const struct dwc3_event_depevt *event)
645{ 658{
646 dwc->ep0state = EP0_SETUP_PHASE;
647 dwc3_ep0_out_start(dwc); 659 dwc3_ep0_out_start(dwc);
648} 660}
649 661
@@ -655,12 +667,6 @@ static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
655 int ret; 667 int ret;
656 668
657 dep = dwc->eps[0]; 669 dep = dwc->eps[0];
658 dwc->ep0state = EP0_DATA_PHASE;
659
660 if (dwc->ep0_status_pending) {
661 dwc3_ep0_send_status_response(dwc);
662 return;
663 }
664 670
665 if (list_empty(&dep->request_list)) { 671 if (list_empty(&dep->request_list)) {
666 dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n"); 672 dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n");
@@ -674,7 +680,6 @@ static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
674 req = next_request(&dep->request_list); 680 req = next_request(&dep->request_list);
675 req->direction = !!event->endpoint_number; 681 req->direction = !!event->endpoint_number;
676 682
677 dwc->ep0state = EP0_DATA_PHASE;
678 if (req->request.length == 0) { 683 if (req->request.length == 0) {
679 ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, 684 ret = dwc3_ep0_start_trans(dwc, event->endpoint_number,
680 dwc->ctrl_req_addr, 0, 685 dwc->ctrl_req_addr, 0,
@@ -706,35 +711,79 @@ static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
706 WARN_ON(ret < 0); 711 WARN_ON(ret < 0);
707} 712}
708 713
709static void dwc3_ep0_do_control_status(struct dwc3 *dwc, 714static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)
710 const struct dwc3_event_depevt *event)
711{ 715{
716 struct dwc3 *dwc = dep->dwc;
712 u32 type; 717 u32 type;
713 int ret;
714
715 dwc->ep0state = EP0_STATUS_PHASE;
716 718
717 type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3 719 type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3
718 : DWC3_TRBCTL_CONTROL_STATUS2; 720 : DWC3_TRBCTL_CONTROL_STATUS2;
719 721
720 ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, 722 return dwc3_ep0_start_trans(dwc, dep->number,
721 dwc->ctrl_req_addr, 0, type); 723 dwc->ctrl_req_addr, 0, type);
724}
722 725
723 WARN_ON(ret < 0); 726static void dwc3_ep0_do_control_status(struct dwc3 *dwc, u32 epnum)
727{
728 struct dwc3_ep *dep = dwc->eps[epnum];
729
730 WARN_ON(dwc3_ep0_start_control_status(dep));
724} 731}
725 732
726static void dwc3_ep0_xfernotready(struct dwc3 *dwc, 733static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
727 const struct dwc3_event_depevt *event) 734 const struct dwc3_event_depevt *event)
728{ 735{
736 dwc->setup_packet_pending = true;
737
738 /*
739 * This part is very tricky: If we has just handled
740 * XferNotReady(Setup) and we're now expecting a
741 * XferComplete but, instead, we receive another
742 * XferNotReady(Setup), we should STALL and restart
743 * the state machine.
744 *
745 * In all other cases, we just continue waiting
746 * for the XferComplete event.
747 *
748 * We are a little bit unsafe here because we're
749 * not trying to ensure that last event was, indeed,
750 * XferNotReady(Setup).
751 *
752 * Still, we don't expect any condition where that
753 * should happen and, even if it does, it would be
754 * another error condition.
755 */
756 if (dwc->ep0_next_event == DWC3_EP0_COMPLETE) {
757 switch (event->status) {
758 case DEPEVT_STATUS_CONTROL_SETUP:
759 dev_vdbg(dwc->dev, "Unexpected XferNotReady(Setup)\n");
760 dwc3_ep0_stall_and_restart(dwc);
761 break;
762 case DEPEVT_STATUS_CONTROL_DATA:
763 /* FALLTHROUGH */
764 case DEPEVT_STATUS_CONTROL_STATUS:
765 /* FALLTHROUGH */
766 default:
767 dev_vdbg(dwc->dev, "waiting for XferComplete\n");
768 }
769
770 return;
771 }
772
729 switch (event->status) { 773 switch (event->status) {
730 case DEPEVT_STATUS_CONTROL_SETUP: 774 case DEPEVT_STATUS_CONTROL_SETUP:
731 dev_vdbg(dwc->dev, "Control Setup\n"); 775 dev_vdbg(dwc->dev, "Control Setup\n");
776
777 dwc->ep0state = EP0_SETUP_PHASE;
778
732 dwc3_ep0_do_control_setup(dwc, event); 779 dwc3_ep0_do_control_setup(dwc, event);
733 break; 780 break;
734 781
735 case DEPEVT_STATUS_CONTROL_DATA: 782 case DEPEVT_STATUS_CONTROL_DATA:
736 dev_vdbg(dwc->dev, "Control Data\n"); 783 dev_vdbg(dwc->dev, "Control Data\n");
737 784
785 dwc->ep0state = EP0_DATA_PHASE;
786
738 if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) { 787 if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) {
739 dev_vdbg(dwc->dev, "Expected %d got %d\n", 788 dev_vdbg(dwc->dev, "Expected %d got %d\n",
740 dwc->ep0_next_event, 789 dwc->ep0_next_event,
@@ -764,6 +813,8 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
764 case DEPEVT_STATUS_CONTROL_STATUS: 813 case DEPEVT_STATUS_CONTROL_STATUS:
765 dev_vdbg(dwc->dev, "Control Status\n"); 814 dev_vdbg(dwc->dev, "Control Status\n");
766 815
816 dwc->ep0state = EP0_STATUS_PHASE;
817
767 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) { 818 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) {
768 dev_vdbg(dwc->dev, "Expected %d got %d\n", 819 dev_vdbg(dwc->dev, "Expected %d got %d\n",
769 dwc->ep0_next_event, 820 dwc->ep0_next_event,
@@ -772,12 +823,19 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
772 dwc3_ep0_stall_and_restart(dwc); 823 dwc3_ep0_stall_and_restart(dwc);
773 return; 824 return;
774 } 825 }
775 dwc3_ep0_do_control_status(dwc, event); 826
827 if (dwc->delayed_status) {
828 WARN_ON_ONCE(event->endpoint_number != 1);
829 dev_vdbg(dwc->dev, "Mass Storage delayed status\n");
830 return;
831 }
832
833 dwc3_ep0_do_control_status(dwc, event->endpoint_number);
776 } 834 }
777} 835}
778 836
779void dwc3_ep0_interrupt(struct dwc3 *dwc, 837void dwc3_ep0_interrupt(struct dwc3 *dwc,
780 const const struct dwc3_event_depevt *event) 838 const struct dwc3_event_depevt *event)
781{ 839{
782 u8 epnum = event->endpoint_number; 840 u8 epnum = event->endpoint_number;
783 841
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 25dbd8614e72..a696bde53222 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -65,6 +65,22 @@ void dwc3_map_buffer_to_dma(struct dwc3_request *req)
65 return; 65 return;
66 } 66 }
67 67
68 if (req->request.num_sgs) {
69 int mapped;
70
71 mapped = dma_map_sg(dwc->dev, req->request.sg,
72 req->request.num_sgs,
73 req->direction ? DMA_TO_DEVICE
74 : DMA_FROM_DEVICE);
75 if (mapped < 0) {
76 dev_err(dwc->dev, "failed to map SGs\n");
77 return;
78 }
79
80 req->request.num_mapped_sgs = mapped;
81 return;
82 }
83
68 if (req->request.dma == DMA_ADDR_INVALID) { 84 if (req->request.dma == DMA_ADDR_INVALID) {
69 req->request.dma = dma_map_single(dwc->dev, req->request.buf, 85 req->request.dma = dma_map_single(dwc->dev, req->request.buf,
70 req->request.length, req->direction 86 req->request.length, req->direction
@@ -82,6 +98,17 @@ void dwc3_unmap_buffer_from_dma(struct dwc3_request *req)
82 return; 98 return;
83 } 99 }
84 100
101 if (req->request.num_mapped_sgs) {
102 req->request.dma = DMA_ADDR_INVALID;
103 dma_unmap_sg(dwc->dev, req->request.sg,
104 req->request.num_sgs,
105 req->direction ? DMA_TO_DEVICE
106 : DMA_FROM_DEVICE);
107
108 req->request.num_mapped_sgs = 0;
109 return;
110 }
111
85 if (req->mapped) { 112 if (req->mapped) {
86 dma_unmap_single(dwc->dev, req->request.dma, 113 dma_unmap_single(dwc->dev, req->request.dma,
87 req->request.length, req->direction 114 req->request.length, req->direction
@@ -97,7 +124,11 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
97 struct dwc3 *dwc = dep->dwc; 124 struct dwc3 *dwc = dep->dwc;
98 125
99 if (req->queued) { 126 if (req->queued) {
100 dep->busy_slot++; 127 if (req->request.num_mapped_sgs)
128 dep->busy_slot += req->request.num_mapped_sgs;
129 else
130 dep->busy_slot++;
131
101 /* 132 /*
102 * Skip LINK TRB. We can't use req->trb and check for 133 * Skip LINK TRB. We can't use req->trb and check for
103 * DWC3_TRBCTL_LINK_TRB because it points the TRB we just 134 * DWC3_TRBCTL_LINK_TRB because it points the TRB we just
@@ -108,6 +139,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
108 dep->busy_slot++; 139 dep->busy_slot++;
109 } 140 }
110 list_del(&req->list); 141 list_del(&req->list);
142 req->trb = NULL;
111 143
112 if (req->request.status == -EINPROGRESS) 144 if (req->request.status == -EINPROGRESS)
113 req->request.status = status; 145 req->request.status = status;
@@ -251,7 +283,8 @@ static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
251} 283}
252 284
253static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, 285static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
254 const struct usb_endpoint_descriptor *desc) 286 const struct usb_endpoint_descriptor *desc,
287 const struct usb_ss_ep_comp_descriptor *comp_desc)
255{ 288{
256 struct dwc3_gadget_ep_cmd_params params; 289 struct dwc3_gadget_ep_cmd_params params;
257 290
@@ -264,7 +297,7 @@ static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
264 params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN 297 params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
265 | DWC3_DEPCFG_XFER_NOT_READY_EN; 298 | DWC3_DEPCFG_XFER_NOT_READY_EN;
266 299
267 if (usb_endpoint_xfer_bulk(desc) && dep->endpoint.max_streams) { 300 if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
268 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE 301 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
269 | DWC3_DEPCFG_STREAM_EVENT_EN; 302 | DWC3_DEPCFG_STREAM_EVENT_EN;
270 dep->stream_capable = true; 303 dep->stream_capable = true;
@@ -317,7 +350,8 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
317 * Caller should take care of locking 350 * Caller should take care of locking
318 */ 351 */
319static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, 352static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
320 const struct usb_endpoint_descriptor *desc) 353 const struct usb_endpoint_descriptor *desc,
354 const struct usb_ss_ep_comp_descriptor *comp_desc)
321{ 355{
322 struct dwc3 *dwc = dep->dwc; 356 struct dwc3 *dwc = dep->dwc;
323 u32 reg; 357 u32 reg;
@@ -329,7 +363,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
329 return ret; 363 return ret;
330 } 364 }
331 365
332 ret = dwc3_gadget_set_ep_config(dwc, dep, desc); 366 ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc);
333 if (ret) 367 if (ret)
334 return ret; 368 return ret;
335 369
@@ -343,6 +377,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
343 return ret; 377 return ret;
344 378
345 dep->desc = desc; 379 dep->desc = desc;
380 dep->comp_desc = comp_desc;
346 dep->type = usb_endpoint_type(desc); 381 dep->type = usb_endpoint_type(desc);
347 dep->flags |= DWC3_EP_ENABLED; 382 dep->flags |= DWC3_EP_ENABLED;
348 383
@@ -405,6 +440,7 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
405 440
406 dep->stream_capable = false; 441 dep->stream_capable = false;
407 dep->desc = NULL; 442 dep->desc = NULL;
443 dep->comp_desc = NULL;
408 dep->type = 0; 444 dep->type = 0;
409 dep->flags = 0; 445 dep->flags = 0;
410 446
@@ -473,7 +509,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
473 dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); 509 dev_vdbg(dwc->dev, "Enabling %s\n", dep->name);
474 510
475 spin_lock_irqsave(&dwc->lock, flags); 511 spin_lock_irqsave(&dwc->lock, flags);
476 ret = __dwc3_gadget_ep_enable(dep, desc); 512 ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc);
477 spin_unlock_irqrestore(&dwc->lock, flags); 513 spin_unlock_irqrestore(&dwc->lock, flags);
478 514
479 return ret; 515 return ret;
@@ -539,6 +575,85 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
539 kfree(req); 575 kfree(req);
540} 576}
541 577
578/**
579 * dwc3_prepare_one_trb - setup one TRB from one request
580 * @dep: endpoint for which this request is prepared
581 * @req: dwc3_request pointer
582 */
583static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
584 struct dwc3_request *req, dma_addr_t dma,
585 unsigned length, unsigned last, unsigned chain)
586{
587 struct dwc3 *dwc = dep->dwc;
588 struct dwc3_trb_hw *trb_hw;
589 struct dwc3_trb trb;
590
591 unsigned int cur_slot;
592
593 dev_vdbg(dwc->dev, "%s: req %p dma %08llx length %d%s%s\n",
594 dep->name, req, (unsigned long long) dma,
595 length, last ? " last" : "",
596 chain ? " chain" : "");
597
598 trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
599 cur_slot = dep->free_slot;
600 dep->free_slot++;
601
602 /* Skip the LINK-TRB on ISOC */
603 if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) &&
604 usb_endpoint_xfer_isoc(dep->desc))
605 return;
606
607 memset(&trb, 0, sizeof(trb));
608 if (!req->trb) {
609 dwc3_gadget_move_request_queued(req);
610 req->trb = trb_hw;
611 req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw);
612 }
613
614 if (usb_endpoint_xfer_isoc(dep->desc)) {
615 trb.isp_imi = true;
616 trb.csp = true;
617 } else {
618 trb.chn = chain;
619 trb.lst = last;
620 }
621
622 if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable)
623 trb.sid_sofn = req->request.stream_id;
624
625 switch (usb_endpoint_type(dep->desc)) {
626 case USB_ENDPOINT_XFER_CONTROL:
627 trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP;
628 break;
629
630 case USB_ENDPOINT_XFER_ISOC:
631 trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
632
633 /* IOC every DWC3_TRB_NUM / 4 so we can refill */
634 if (!(cur_slot % (DWC3_TRB_NUM / 4)))
635 trb.ioc = last;
636 break;
637
638 case USB_ENDPOINT_XFER_BULK:
639 case USB_ENDPOINT_XFER_INT:
640 trb.trbctl = DWC3_TRBCTL_NORMAL;
641 break;
642 default:
643 /*
644 * This is only possible with faulty memory because we
645 * checked it already :)
646 */
647 BUG();
648 }
649
650 trb.length = length;
651 trb.bplh = dma;
652 trb.hwo = true;
653
654 dwc3_trb_to_hw(&trb, trb_hw);
655}
656
542/* 657/*
543 * dwc3_prepare_trbs - setup TRBs from requests 658 * dwc3_prepare_trbs - setup TRBs from requests
544 * @dep: endpoint for which requests are being prepared 659 * @dep: endpoint for which requests are being prepared
@@ -548,18 +663,17 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
548 * transfers. The functions returns once there are not more TRBs available or 663 * transfers. The functions returns once there are not more TRBs available or
549 * it run out of requests. 664 * it run out of requests.
550 */ 665 */
551static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep, 666static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
552 bool starting)
553{ 667{
554 struct dwc3_request *req, *n, *ret = NULL; 668 struct dwc3_request *req, *n;
555 struct dwc3_trb_hw *trb_hw;
556 struct dwc3_trb trb;
557 u32 trbs_left; 669 u32 trbs_left;
670 unsigned int last_one = 0;
558 671
559 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM); 672 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
560 673
561 /* the first request must not be queued */ 674 /* the first request must not be queued */
562 trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; 675 trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
676
563 /* 677 /*
564 * if busy & slot are equal than it is either full or empty. If we are 678 * if busy & slot are equal than it is either full or empty. If we are
565 * starting to proceed requests then we are empty. Otherwise we ar 679 * starting to proceed requests then we are empty. Otherwise we ar
@@ -567,7 +681,7 @@ static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep,
567 */ 681 */
568 if (!trbs_left) { 682 if (!trbs_left) {
569 if (!starting) 683 if (!starting)
570 return NULL; 684 return;
571 trbs_left = DWC3_TRB_NUM; 685 trbs_left = DWC3_TRB_NUM;
572 /* 686 /*
573 * In case we start from scratch, we queue the ISOC requests 687 * In case we start from scratch, we queue the ISOC requests
@@ -591,94 +705,62 @@ static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep,
591 705
592 /* The last TRB is a link TRB, not used for xfer */ 706 /* The last TRB is a link TRB, not used for xfer */
593 if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc)) 707 if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc))
594 return NULL; 708 return;
595 709
596 list_for_each_entry_safe(req, n, &dep->request_list, list) { 710 list_for_each_entry_safe(req, n, &dep->request_list, list) {
597 unsigned int last_one = 0; 711 unsigned length;
598 unsigned int cur_slot; 712 dma_addr_t dma;
599 713
600 trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK]; 714 if (req->request.num_mapped_sgs > 0) {
601 cur_slot = dep->free_slot; 715 struct usb_request *request = &req->request;
602 dep->free_slot++; 716 struct scatterlist *sg = request->sg;
717 struct scatterlist *s;
718 int i;
603 719
604 /* Skip the LINK-TRB on ISOC */ 720 for_each_sg(sg, s, request->num_mapped_sgs, i) {
605 if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) && 721 unsigned chain = true;
606 usb_endpoint_xfer_isoc(dep->desc))
607 continue;
608 722
609 dwc3_gadget_move_request_queued(req); 723 length = sg_dma_len(s);
610 memset(&trb, 0, sizeof(trb)); 724 dma = sg_dma_address(s);
611 trbs_left--;
612 725
613 /* Is our TRB pool empty? */ 726 if (i == (request->num_mapped_sgs - 1)
614 if (!trbs_left) 727 || sg_is_last(s)) {
615 last_one = 1; 728 last_one = true;
616 /* Is this the last request? */ 729 chain = false;
617 if (list_empty(&dep->request_list)) 730 }
618 last_one = 1;
619 731
620 /* 732 trbs_left--;
621 * FIXME we shouldn't need to set LST bit always but we are 733 if (!trbs_left)
622 * facing some weird problem with the Hardware where it doesn't 734 last_one = true;
623 * complete even though it has been previously started.
624 *
625 * While we're debugging the problem, as a workaround to
626 * multiple TRBs handling, use only one TRB at a time.
627 */
628 last_one = 1;
629 735
630 req->trb = trb_hw; 736 if (last_one)
631 if (!ret) 737 chain = false;
632 ret = req;
633 738
634 trb.bplh = req->request.dma; 739 dwc3_prepare_one_trb(dep, req, dma, length,
740 last_one, chain);
635 741
636 if (usb_endpoint_xfer_isoc(dep->desc)) { 742 if (last_one)
637 trb.isp_imi = true; 743 break;
638 trb.csp = true; 744 }
639 } else { 745 } else {
640 trb.lst = last_one; 746 dma = req->request.dma;
641 } 747 length = req->request.length;
748 trbs_left--;
642 749
643 if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable) 750 if (!trbs_left)
644 trb.sid_sofn = req->request.stream_id; 751 last_one = 1;
645
646 switch (usb_endpoint_type(dep->desc)) {
647 case USB_ENDPOINT_XFER_CONTROL:
648 trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP;
649 break;
650 752
651 case USB_ENDPOINT_XFER_ISOC: 753 /* Is this the last request? */
652 trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; 754 if (list_is_last(&req->list, &dep->request_list))
755 last_one = 1;
653 756
654 /* IOC every DWC3_TRB_NUM / 4 so we can refill */ 757 dwc3_prepare_one_trb(dep, req, dma, length,
655 if (!(cur_slot % (DWC3_TRB_NUM / 4))) 758 last_one, false);
656 trb.ioc = last_one;
657 break;
658 759
659 case USB_ENDPOINT_XFER_BULK: 760 if (last_one)
660 case USB_ENDPOINT_XFER_INT: 761 break;
661 trb.trbctl = DWC3_TRBCTL_NORMAL;
662 break;
663 default:
664 /*
665 * This is only possible with faulty memory because we
666 * checked it already :)
667 */
668 BUG();
669 } 762 }
670
671 trb.length = req->request.length;
672 trb.hwo = true;
673
674 dwc3_trb_to_hw(&trb, trb_hw);
675 req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw);
676
677 if (last_one)
678 break;
679 } 763 }
680
681 return ret;
682} 764}
683 765
684static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, 766static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
@@ -707,11 +789,13 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
707 /* req points to the first request which will be sent */ 789 /* req points to the first request which will be sent */
708 req = next_request(&dep->req_queued); 790 req = next_request(&dep->req_queued);
709 } else { 791 } else {
792 dwc3_prepare_trbs(dep, start_new);
793
710 /* 794 /*
711 * req points to the first request where HWO changed 795 * req points to the first request where HWO changed
712 * from 0 to 1 796 * from 0 to 1
713 */ 797 */
714 req = dwc3_prepare_trbs(dep, start_new); 798 req = next_request(&dep->req_queued);
715 } 799 }
716 if (!req) { 800 if (!req) {
717 dep->flags |= DWC3_EP_PENDING_REQUEST; 801 dep->flags |= DWC3_EP_PENDING_REQUEST;
@@ -745,8 +829,9 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
745 dep->flags |= DWC3_EP_BUSY; 829 dep->flags |= DWC3_EP_BUSY;
746 dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc, 830 dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc,
747 dep->number); 831 dep->number);
748 if (!dep->res_trans_idx) 832
749 printk_once(KERN_ERR "%s() res_trans_idx is invalid\n", __func__); 833 WARN_ON_ONCE(!dep->res_trans_idx);
834
750 return 0; 835 return 0;
751} 836}
752 837
@@ -1155,35 +1240,9 @@ static int dwc3_gadget_start(struct usb_gadget *g,
1155 dwc->gadget_driver = driver; 1240 dwc->gadget_driver = driver;
1156 dwc->gadget.dev.driver = &driver->driver; 1241 dwc->gadget.dev.driver = &driver->driver;
1157 1242
1158 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
1159
1160 reg &= ~DWC3_GCTL_SCALEDOWN(3);
1161 reg &= ~DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG);
1162 reg &= ~DWC3_GCTL_DISSCRAMBLE;
1163 reg |= DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_DEVICE);
1164
1165 switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams0)) {
1166 case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
1167 reg &= ~DWC3_GCTL_DSBLCLKGTNG;
1168 break;
1169 default:
1170 dev_dbg(dwc->dev, "No power optimization available\n");
1171 }
1172
1173 /*
1174 * WORKAROUND: DWC3 revisions <1.90a have a bug
1175 * when The device fails to connect at SuperSpeed
1176 * and falls back to high-speed mode which causes
1177 * the device to enter in a Connect/Disconnect loop
1178 */
1179 if (dwc->revision < DWC3_REVISION_190A)
1180 reg |= DWC3_GCTL_U2RSTECN;
1181
1182 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1183
1184 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 1243 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1185 reg &= ~(DWC3_DCFG_SPEED_MASK); 1244 reg &= ~(DWC3_DCFG_SPEED_MASK);
1186 reg |= DWC3_DCFG_SUPERSPEED; 1245 reg |= dwc->maximum_speed;
1187 dwc3_writel(dwc->regs, DWC3_DCFG, reg); 1246 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1188 1247
1189 dwc->start_config_issued = false; 1248 dwc->start_config_issued = false;
@@ -1192,14 +1251,14 @@ static int dwc3_gadget_start(struct usb_gadget *g,
1192 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); 1251 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1193 1252
1194 dep = dwc->eps[0]; 1253 dep = dwc->eps[0];
1195 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1254 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1196 if (ret) { 1255 if (ret) {
1197 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1256 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1198 goto err0; 1257 goto err0;
1199 } 1258 }
1200 1259
1201 dep = dwc->eps[1]; 1260 dep = dwc->eps[1];
1202 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1261 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1203 if (ret) { 1262 if (ret) {
1204 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1263 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1205 goto err1; 1264 goto err1;
@@ -1290,11 +1349,10 @@ static int __devinit dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1290 &dwc->gadget.ep_list); 1349 &dwc->gadget.ep_list);
1291 1350
1292 ret = dwc3_alloc_trb_pool(dep); 1351 ret = dwc3_alloc_trb_pool(dep);
1293 if (ret) { 1352 if (ret)
1294 dev_err(dwc->dev, "%s: failed to allocate TRB pool\n", dep->name);
1295 return ret; 1353 return ret;
1296 }
1297 } 1354 }
1355
1298 INIT_LIST_HEAD(&dep->request_list); 1356 INIT_LIST_HEAD(&dep->request_list);
1299 INIT_LIST_HEAD(&dep->req_queued); 1357 INIT_LIST_HEAD(&dep->req_queued);
1300 } 1358 }
@@ -1334,8 +1392,10 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1334 1392
1335 do { 1393 do {
1336 req = next_request(&dep->req_queued); 1394 req = next_request(&dep->req_queued);
1337 if (!req) 1395 if (!req) {
1338 break; 1396 WARN_ON_ONCE(1);
1397 return 1;
1398 }
1339 1399
1340 dwc3_trb_to_nat(req->trb, &trb); 1400 dwc3_trb_to_nat(req->trb, &trb);
1341 1401
@@ -1400,6 +1460,31 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
1400 dep->flags &= ~DWC3_EP_BUSY; 1460 dep->flags &= ~DWC3_EP_BUSY;
1401 dep->res_trans_idx = 0; 1461 dep->res_trans_idx = 0;
1402 } 1462 }
1463
1464 /*
1465 * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
1466 * See dwc3_gadget_linksts_change_interrupt() for 1st half.
1467 */
1468 if (dwc->revision < DWC3_REVISION_183A) {
1469 u32 reg;
1470 int i;
1471
1472 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
1473 struct dwc3_ep *dep = dwc->eps[i];
1474
1475 if (!(dep->flags & DWC3_EP_ENABLED))
1476 continue;
1477
1478 if (!list_empty(&dep->req_queued))
1479 return;
1480 }
1481
1482 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1483 reg |= dwc->u1u2;
1484 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1485
1486 dwc->u1u2 = 0;
1487 }
1403} 1488}
1404 1489
1405static void dwc3_gadget_start_isoc(struct dwc3 *dwc, 1490static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
@@ -1639,6 +1724,7 @@ static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
1639 dwc->start_config_issued = false; 1724 dwc->start_config_issued = false;
1640 1725
1641 dwc->gadget.speed = USB_SPEED_UNKNOWN; 1726 dwc->gadget.speed = USB_SPEED_UNKNOWN;
1727 dwc->setup_packet_pending = false;
1642} 1728}
1643 1729
1644static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on) 1730static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on)
@@ -1675,6 +1761,40 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
1675 1761
1676 dev_vdbg(dwc->dev, "%s\n", __func__); 1762 dev_vdbg(dwc->dev, "%s\n", __func__);
1677 1763
1764 /*
1765 * WORKAROUND: DWC3 revisions <1.88a have an issue which
1766 * would cause a missing Disconnect Event if there's a
1767 * pending Setup Packet in the FIFO.
1768 *
1769 * There's no suggested workaround on the official Bug
1770 * report, which states that "unless the driver/application
1771 * is doing any special handling of a disconnect event,
1772 * there is no functional issue".
1773 *
1774 * Unfortunately, it turns out that we _do_ some special
1775 * handling of a disconnect event, namely complete all
1776 * pending transfers, notify gadget driver of the
1777 * disconnection, and so on.
1778 *
1779 * Our suggested workaround is to follow the Disconnect
1780 * Event steps here, instead, based on a setup_packet_pending
1781 * flag. Such flag gets set whenever we have a XferNotReady
1782 * event on EP0 and gets cleared on XferComplete for the
1783 * same endpoint.
1784 *
1785 * Refers to:
1786 *
1787 * STAR#9000466709: RTL: Device : Disconnect event not
1788 * generated if setup packet pending in FIFO
1789 */
1790 if (dwc->revision < DWC3_REVISION_188A) {
1791 if (dwc->setup_packet_pending)
1792 dwc3_gadget_disconnect_interrupt(dwc);
1793 }
1794
1795 /* after reset -> Default State */
1796 dwc->dev_state = DWC3_DEFAULT_STATE;
1797
1678 /* Enable PHYs */ 1798 /* Enable PHYs */
1679 dwc3_gadget_usb2_phy_power(dwc, true); 1799 dwc3_gadget_usb2_phy_power(dwc, true);
1680 dwc3_gadget_usb3_phy_power(dwc, true); 1800 dwc3_gadget_usb3_phy_power(dwc, true);
@@ -1755,6 +1875,22 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
1755 1875
1756 switch (speed) { 1876 switch (speed) {
1757 case DWC3_DCFG_SUPERSPEED: 1877 case DWC3_DCFG_SUPERSPEED:
1878 /*
1879 * WORKAROUND: DWC3 revisions <1.90a have an issue which
1880 * would cause a missing USB3 Reset event.
1881 *
1882 * In such situations, we should force a USB3 Reset
1883 * event by calling our dwc3_gadget_reset_interrupt()
1884 * routine.
1885 *
1886 * Refers to:
1887 *
1888 * STAR#9000483510: RTL: SS : USB3 reset event may
1889 * not be generated always when the link enters poll
1890 */
1891 if (dwc->revision < DWC3_REVISION_190A)
1892 dwc3_gadget_reset_interrupt(dwc);
1893
1758 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); 1894 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1759 dwc->gadget.ep0->maxpacket = 512; 1895 dwc->gadget.ep0->maxpacket = 512;
1760 dwc->gadget.speed = USB_SPEED_SUPER; 1896 dwc->gadget.speed = USB_SPEED_SUPER;
@@ -1781,14 +1917,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
1781 dwc3_gadget_disable_phy(dwc, dwc->gadget.speed); 1917 dwc3_gadget_disable_phy(dwc, dwc->gadget.speed);
1782 1918
1783 dep = dwc->eps[0]; 1919 dep = dwc->eps[0];
1784 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1920 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1785 if (ret) { 1921 if (ret) {
1786 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1922 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1787 return; 1923 return;
1788 } 1924 }
1789 1925
1790 dep = dwc->eps[1]; 1926 dep = dwc->eps[1];
1791 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); 1927 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL);
1792 if (ret) { 1928 if (ret) {
1793 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1929 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1794 return; 1930 return;
@@ -1818,8 +1954,55 @@ static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
1818static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, 1954static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
1819 unsigned int evtinfo) 1955 unsigned int evtinfo)
1820{ 1956{
1821 /* The fith bit says SuperSpeed yes or no. */ 1957 enum dwc3_link_state next = evtinfo & DWC3_LINK_STATE_MASK;
1822 dwc->link_state = evtinfo & DWC3_LINK_STATE_MASK; 1958
1959 /*
1960 * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
1961 * on the link partner, the USB session might do multiple entry/exit
1962 * of low power states before a transfer takes place.
1963 *
1964 * Due to this problem, we might experience lower throughput. The
1965 * suggested workaround is to disable DCTL[12:9] bits if we're
1966 * transitioning from U1/U2 to U0 and enable those bits again
1967 * after a transfer completes and there are no pending transfers
1968 * on any of the enabled endpoints.
1969 *
1970 * This is the first half of that workaround.
1971 *
1972 * Refers to:
1973 *
1974 * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
1975 * core send LGO_Ux entering U0
1976 */
1977 if (dwc->revision < DWC3_REVISION_183A) {
1978 if (next == DWC3_LINK_STATE_U0) {
1979 u32 u1u2;
1980 u32 reg;
1981
1982 switch (dwc->link_state) {
1983 case DWC3_LINK_STATE_U1:
1984 case DWC3_LINK_STATE_U2:
1985 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1986 u1u2 = reg & (DWC3_DCTL_INITU2ENA
1987 | DWC3_DCTL_ACCEPTU2ENA
1988 | DWC3_DCTL_INITU1ENA
1989 | DWC3_DCTL_ACCEPTU1ENA);
1990
1991 if (!dwc->u1u2)
1992 dwc->u1u2 = reg & u1u2;
1993
1994 reg &= ~u1u2;
1995
1996 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1997 break;
1998 default:
1999 /* do nothing */
2000 break;
2001 }
2002 }
2003 }
2004
2005 dwc->link_state = next;
1823 2006
1824 dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state); 2007 dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state);
1825} 2008}
@@ -1925,7 +2108,7 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
1925 2108
1926 spin_lock(&dwc->lock); 2109 spin_lock(&dwc->lock);
1927 2110
1928 for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) { 2111 for (i = 0; i < dwc->num_event_buffers; i++) {
1929 irqreturn_t status; 2112 irqreturn_t status;
1930 2113
1931 status = dwc3_process_event_buf(dwc, i); 2114 status = dwc3_process_event_buf(dwc, i);
@@ -1986,9 +2169,10 @@ int __devinit dwc3_gadget_init(struct dwc3 *dwc)
1986 dev_set_name(&dwc->gadget.dev, "gadget"); 2169 dev_set_name(&dwc->gadget.dev, "gadget");
1987 2170
1988 dwc->gadget.ops = &dwc3_gadget_ops; 2171 dwc->gadget.ops = &dwc3_gadget_ops;
1989 dwc->gadget.is_dualspeed = true; 2172 dwc->gadget.max_speed = USB_SPEED_SUPER;
1990 dwc->gadget.speed = USB_SPEED_UNKNOWN; 2173 dwc->gadget.speed = USB_SPEED_UNKNOWN;
1991 dwc->gadget.dev.parent = dwc->dev; 2174 dwc->gadget.dev.parent = dwc->dev;
2175 dwc->gadget.sg_supported = true;
1992 2176
1993 dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask); 2177 dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask);
1994 2178
@@ -2076,7 +2260,6 @@ err0:
2076void dwc3_gadget_exit(struct dwc3 *dwc) 2260void dwc3_gadget_exit(struct dwc3 *dwc)
2077{ 2261{
2078 int irq; 2262 int irq;
2079 int i;
2080 2263
2081 usb_del_gadget_udc(&dwc->gadget); 2264 usb_del_gadget_udc(&dwc->gadget);
2082 irq = platform_get_irq(to_platform_device(dwc->dev), 0); 2265 irq = platform_get_irq(to_platform_device(dwc->dev), 0);
@@ -2084,9 +2267,6 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
2084 dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); 2267 dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
2085 free_irq(irq, dwc); 2268 free_irq(irq, dwc);
2086 2269
2087 for (i = 0; i < ARRAY_SIZE(dwc->eps); i++)
2088 __dwc3_gadget_ep_disable(dwc->eps[i]);
2089
2090 dwc3_gadget_free_endpoints(dwc); 2270 dwc3_gadget_free_endpoints(dwc);
2091 2271
2092 dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, 2272 dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce,
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
index 71145a449d99..d97f467d41cc 100644
--- a/drivers/usb/dwc3/gadget.h
+++ b/drivers/usb/dwc3/gadget.h
@@ -79,19 +79,6 @@ struct dwc3_gadget_ep_cmd_params {
79 79
80/* -------------------------------------------------------------------------- */ 80/* -------------------------------------------------------------------------- */
81 81
82struct dwc3_request {
83 struct usb_request request;
84 struct list_head list;
85 struct dwc3_ep *dep;
86
87 u8 epnum;
88 struct dwc3_trb_hw *trb;
89 dma_addr_t trb_dma;
90
91 unsigned direction:1;
92 unsigned mapped:1;
93 unsigned queued:1;
94};
95#define to_dwc3_request(r) (container_of(r, struct dwc3_request, request)) 82#define to_dwc3_request(r) (container_of(r, struct dwc3_request, request))
96 83
97static inline struct dwc3_request *next_request(struct list_head *list) 84static inline struct dwc3_request *next_request(struct list_head *list)
@@ -110,23 +97,11 @@ static inline void dwc3_gadget_move_request_queued(struct dwc3_request *req)
110 list_move_tail(&req->list, &dep->req_queued); 97 list_move_tail(&req->list, &dep->req_queued);
111} 98}
112 99
113#if defined(CONFIG_USB_GADGET_DWC3) || defined(CONFIG_USB_GADGET_DWC3_MODULE)
114int dwc3_gadget_init(struct dwc3 *dwc);
115void dwc3_gadget_exit(struct dwc3 *dwc);
116#else
117static inline int dwc3_gadget_init(struct dwc3 *dwc) { return 0; }
118static inline void dwc3_gadget_exit(struct dwc3 *dwc) { }
119static inline int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
120 unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
121{
122 return 0;
123}
124#endif
125
126void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, 100void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
127 int status); 101 int status);
128 102
129void dwc3_ep0_interrupt(struct dwc3 *dwc, const struct dwc3_event_depevt *event); 103void dwc3_ep0_interrupt(struct dwc3 *dwc,
104 const struct dwc3_event_depevt *event);
130void dwc3_ep0_out_start(struct dwc3 *dwc); 105void dwc3_ep0_out_start(struct dwc3 *dwc);
131int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, 106int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
132 gfp_t gfp_flags); 107 gfp_t gfp_flags);
diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
new file mode 100644
index 000000000000..7cfe211b6c37
--- /dev/null
+++ b/drivers/usb/dwc3/host.c
@@ -0,0 +1,102 @@
1/**
2 * host.c - DesignWare USB3 DRD Controller Host Glue
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions, and the following disclaimer,
13 * without modification.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The names of the above-listed copyright holders may not be used
18 * to endorse or promote products derived from this software without
19 * specific prior written permission.
20 *
21 * ALTERNATIVELY, this software may be distributed under the terms of the
22 * GNU General Public License ("GPL") version 2, as published by the Free
23 * Software Foundation.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
26 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
33 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
34 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include <linux/platform_device.h>
39
40#include "core.h"
41
42static struct resource generic_resources[] = {
43 {
44 .flags = IORESOURCE_IRQ,
45 },
46 {
47 .flags = IORESOURCE_MEM,
48 },
49};
50
51int dwc3_host_init(struct dwc3 *dwc)
52{
53 struct platform_device *xhci;
54 int ret;
55
56 xhci = platform_device_alloc("xhci", -1);
57 if (!xhci) {
58 dev_err(dwc->dev, "couldn't allocate xHCI device\n");
59 ret = -ENOMEM;
60 goto err0;
61 }
62
63 dma_set_coherent_mask(&xhci->dev, dwc->dev->coherent_dma_mask);
64
65 xhci->dev.parent = dwc->dev;
66 xhci->dev.dma_mask = dwc->dev->dma_mask;
67 xhci->dev.dma_parms = dwc->dev->dma_parms;
68
69 dwc->xhci = xhci;
70
71 /* setup resources */
72 generic_resources[0].start = dwc->irq;
73
74 generic_resources[1].start = dwc->res->start;
75 generic_resources[1].end = dwc->res->start + 0x7fff;
76
77 ret = platform_device_add_resources(xhci, generic_resources,
78 ARRAY_SIZE(generic_resources));
79 if (ret) {
80 dev_err(dwc->dev, "couldn't add resources to xHCI device\n");
81 goto err1;
82 }
83
84 ret = platform_device_add(xhci);
85 if (ret) {
86 dev_err(dwc->dev, "failed to register xHCI device\n");
87 goto err1;
88 }
89
90 return 0;
91
92err1:
93 platform_device_put(xhci);
94
95err0:
96 return ret;
97}
98
99void dwc3_host_exit(struct dwc3 *dwc)
100{
101 platform_device_unregister(dwc->xhci);
102}
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
index bc957db1ea4b..071d561f3e68 100644
--- a/drivers/usb/dwc3/io.h
+++ b/drivers/usb/dwc3/io.h
@@ -39,7 +39,7 @@
39#ifndef __DRIVERS_USB_DWC3_IO_H 39#ifndef __DRIVERS_USB_DWC3_IO_H
40#define __DRIVERS_USB_DWC3_IO_H 40#define __DRIVERS_USB_DWC3_IO_H
41 41
42#include <asm/io.h> 42#include <linux/io.h>
43 43
44static inline u32 dwc3_readl(void __iomem *base, u32 offset) 44static inline u32 dwc3_readl(void __iomem *base, u32 offset)
45{ 45{
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 12a401a144b7..7ecb68a67411 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -15,6 +15,7 @@
15 15
16menuconfig USB_GADGET 16menuconfig USB_GADGET
17 tristate "USB Gadget Support" 17 tristate "USB Gadget Support"
18 select NLS
18 help 19 help
19 USB is a master/slave protocol, organized with one master 20 USB is a master/slave protocol, organized with one master
20 host (such as a PC) controlling up to 127 peripheral devices. 21 host (such as a PC) controlling up to 127 peripheral devices.
@@ -124,7 +125,6 @@ config USB_GADGET_STORAGE_NUM_BUFFERS
124# 125#
125choice 126choice
126 prompt "USB Peripheral Controller" 127 prompt "USB Peripheral Controller"
127 depends on USB_GADGET
128 help 128 help
129 A USB device uses a controller to talk to its host. 129 A USB device uses a controller to talk to its host.
130 Systems should have only one such upstream link. 130 Systems should have only one such upstream link.
@@ -234,7 +234,6 @@ config USB_R8A66597
234 234
235config USB_RENESAS_USBHS_UDC 235config USB_RENESAS_USBHS_UDC
236 tristate 'Renesas USBHS controller' 236 tristate 'Renesas USBHS controller'
237 depends on SUPERH || ARCH_SHMOBILE
238 depends on USB_RENESAS_USBHS 237 depends on USB_RENESAS_USBHS
239 select USB_GADGET_DUALSPEED 238 select USB_GADGET_DUALSPEED
240 help 239 help
@@ -309,25 +308,13 @@ config USB_S3C_HSUDC
309 308
310 This driver has been tested on S3C2416 and S3C2450 processors. 309 This driver has been tested on S3C2416 and S3C2450 processors.
311 310
312config USB_PXA_U2O 311config USB_MV_UDC
313 tristate "PXA9xx Processor USB2.0 controller" 312 tristate "Marvell USB2.0 Device Controller"
314 depends on ARCH_MMP
315 select USB_GADGET_DUALSPEED 313 select USB_GADGET_DUALSPEED
316 help 314 help
317 PXA9xx Processor series include a high speed USB2.0 device 315 Marvell Socs (including PXA and MMP series) include a high speed
318 controller, which support high speed and full speed USB peripheral. 316 USB2.0 OTG controller, which can be configured as high speed or
319 317 full speed USB peripheral.
320config USB_GADGET_DWC3
321 tristate "DesignWare USB3.0 (DRD) Controller"
322 depends on USB_DWC3
323 select USB_GADGET_DUALSPEED
324 select USB_GADGET_SUPERSPEED
325 help
326 DesignWare USB3.0 controller is a SuperSpeed USB3.0 Controller
327 which can be configured for peripheral-only, host-only, hub-only
328 and Dual-Role operation. This Controller was first integrated into
329 the OMAP5 series of processors. More information about the OMAP5
330 version of this controller, refer to http://www.ti.com/omap5.
331 318
332# 319#
333# Controllers available in both integrated and discrete versions 320# Controllers available in both integrated and discrete versions
@@ -543,12 +530,10 @@ endchoice
543# Selected by UDC drivers that support high-speed operation. 530# Selected by UDC drivers that support high-speed operation.
544config USB_GADGET_DUALSPEED 531config USB_GADGET_DUALSPEED
545 bool 532 bool
546 depends on USB_GADGET
547 533
548# Selected by UDC drivers that support super-speed opperation 534# Selected by UDC drivers that support super-speed opperation
549config USB_GADGET_SUPERSPEED 535config USB_GADGET_SUPERSPEED
550 bool 536 bool
551 depends on USB_GADGET
552 depends on USB_GADGET_DUALSPEED 537 depends on USB_GADGET_DUALSPEED
553 538
554# 539#
@@ -556,7 +541,6 @@ config USB_GADGET_SUPERSPEED
556# 541#
557choice 542choice
558 tristate "USB Gadget Drivers" 543 tristate "USB Gadget Drivers"
559 depends on USB_GADGET
560 default USB_ETH 544 default USB_ETH
561 help 545 help
562 A Linux "Gadget Driver" talks to the USB Peripheral Controller 546 A Linux "Gadget Driver" talks to the USB Peripheral Controller
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index b54ac6190890..b7f6eefc3927 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -27,7 +27,7 @@ obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o
27obj-$(CONFIG_USB_S3C_HSUDC) += s3c-hsudc.o 27obj-$(CONFIG_USB_S3C_HSUDC) += s3c-hsudc.o
28obj-$(CONFIG_USB_LANGWELL) += langwell_udc.o 28obj-$(CONFIG_USB_LANGWELL) += langwell_udc.o
29obj-$(CONFIG_USB_EG20T) += pch_udc.o 29obj-$(CONFIG_USB_EG20T) += pch_udc.o
30obj-$(CONFIG_USB_PXA_U2O) += mv_udc.o 30obj-$(CONFIG_USB_MV_UDC) += mv_udc.o
31mv_udc-y := mv_udc_core.o 31mv_udc-y := mv_udc_core.o
32obj-$(CONFIG_USB_CI13XXX_MSM) += ci13xxx_msm.o 32obj-$(CONFIG_USB_CI13XXX_MSM) += ci13xxx_msm.o
33obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o 33obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o
diff --git a/drivers/usb/gadget/amd5536udc.c b/drivers/usb/gadget/amd5536udc.c
index 45f422ac103f..e9a2c5c44454 100644
--- a/drivers/usb/gadget/amd5536udc.c
+++ b/drivers/usb/gadget/amd5536udc.c
@@ -1959,7 +1959,7 @@ static int amd5536_start(struct usb_gadget_driver *driver,
1959 u32 tmp; 1959 u32 tmp;
1960 1960
1961 if (!driver || !bind || !driver->setup 1961 if (!driver || !bind || !driver->setup
1962 || driver->speed < USB_SPEED_HIGH) 1962 || driver->max_speed < USB_SPEED_HIGH)
1963 return -EINVAL; 1963 return -EINVAL;
1964 if (!dev) 1964 if (!dev)
1965 return -ENODEV; 1965 return -ENODEV;
@@ -3349,7 +3349,7 @@ static int udc_probe(struct udc *dev)
3349 dev_set_name(&dev->gadget.dev, "gadget"); 3349 dev_set_name(&dev->gadget.dev, "gadget");
3350 dev->gadget.dev.release = gadget_release; 3350 dev->gadget.dev.release = gadget_release;
3351 dev->gadget.name = name; 3351 dev->gadget.name = name;
3352 dev->gadget.is_dualspeed = 1; 3352 dev->gadget.max_speed = USB_SPEED_HIGH;
3353 3353
3354 /* init registers, interrupts, ... */ 3354 /* init registers, interrupts, ... */
3355 startup_registers(dev); 3355 startup_registers(dev);
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 8efe0fa9228d..143a7256b598 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1633,7 +1633,7 @@ static int at91_start(struct usb_gadget_driver *driver,
1633 unsigned long flags; 1633 unsigned long flags;
1634 1634
1635 if (!driver 1635 if (!driver
1636 || driver->speed < USB_SPEED_FULL 1636 || driver->max_speed < USB_SPEED_FULL
1637 || !bind 1637 || !bind
1638 || !driver->setup) { 1638 || !driver->setup) {
1639 DBG("bad parameter.\n"); 1639 DBG("bad parameter.\n");
@@ -1748,7 +1748,7 @@ static int __init at91udc_probe(struct platform_device *pdev)
1748 1748
1749 /* rm9200 needs manual D+ pullup; off by default */ 1749 /* rm9200 needs manual D+ pullup; off by default */
1750 if (cpu_is_at91rm9200()) { 1750 if (cpu_is_at91rm9200()) {
1751 if (udc->board.pullup_pin <= 0) { 1751 if (gpio_is_valid(udc->board.pullup_pin)) {
1752 DBG("no D+ pullup?\n"); 1752 DBG("no D+ pullup?\n");
1753 retval = -ENODEV; 1753 retval = -ENODEV;
1754 goto fail0; 1754 goto fail0;
@@ -1815,7 +1815,7 @@ static int __init at91udc_probe(struct platform_device *pdev)
1815 DBG("request irq %d failed\n", udc->udp_irq); 1815 DBG("request irq %d failed\n", udc->udp_irq);
1816 goto fail1; 1816 goto fail1;
1817 } 1817 }
1818 if (udc->board.vbus_pin > 0) { 1818 if (gpio_is_valid(udc->board.vbus_pin)) {
1819 retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); 1819 retval = gpio_request(udc->board.vbus_pin, "udc_vbus");
1820 if (retval < 0) { 1820 if (retval < 0) {
1821 DBG("request vbus pin failed\n"); 1821 DBG("request vbus pin failed\n");
@@ -1859,10 +1859,10 @@ static int __init at91udc_probe(struct platform_device *pdev)
1859 INFO("%s version %s\n", driver_name, DRIVER_VERSION); 1859 INFO("%s version %s\n", driver_name, DRIVER_VERSION);
1860 return 0; 1860 return 0;
1861fail4: 1861fail4:
1862 if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled) 1862 if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled)
1863 free_irq(udc->board.vbus_pin, udc); 1863 free_irq(udc->board.vbus_pin, udc);
1864fail3: 1864fail3:
1865 if (udc->board.vbus_pin > 0) 1865 if (gpio_is_valid(udc->board.vbus_pin))
1866 gpio_free(udc->board.vbus_pin); 1866 gpio_free(udc->board.vbus_pin);
1867fail2: 1867fail2:
1868 free_irq(udc->udp_irq, udc); 1868 free_irq(udc->udp_irq, udc);
@@ -1897,7 +1897,7 @@ static int __exit at91udc_remove(struct platform_device *pdev)
1897 1897
1898 device_init_wakeup(&pdev->dev, 0); 1898 device_init_wakeup(&pdev->dev, 0);
1899 remove_debug_file(udc); 1899 remove_debug_file(udc);
1900 if (udc->board.vbus_pin > 0) { 1900 if (gpio_is_valid(udc->board.vbus_pin)) {
1901 free_irq(udc->board.vbus_pin, udc); 1901 free_irq(udc->board.vbus_pin, udc);
1902 gpio_free(udc->board.vbus_pin); 1902 gpio_free(udc->board.vbus_pin);
1903 } 1903 }
@@ -1941,7 +1941,7 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg)
1941 enable_irq_wake(udc->udp_irq); 1941 enable_irq_wake(udc->udp_irq);
1942 1942
1943 udc->active_suspend = wake; 1943 udc->active_suspend = wake;
1944 if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && wake) 1944 if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake)
1945 enable_irq_wake(udc->board.vbus_pin); 1945 enable_irq_wake(udc->board.vbus_pin);
1946 return 0; 1946 return 0;
1947} 1947}
@@ -1951,7 +1951,7 @@ static int at91udc_resume(struct platform_device *pdev)
1951 struct at91_udc *udc = platform_get_drvdata(pdev); 1951 struct at91_udc *udc = platform_get_drvdata(pdev);
1952 unsigned long flags; 1952 unsigned long flags;
1953 1953
1954 if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && 1954 if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled &&
1955 udc->active_suspend) 1955 udc->active_suspend)
1956 disable_irq_wake(udc->board.vbus_pin); 1956 disable_irq_wake(udc->board.vbus_pin);
1957 1957
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index 271a9d873608..e2fb6d583bd9 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1038,7 +1038,7 @@ static struct usba_udc the_udc = {
1038 .gadget = { 1038 .gadget = {
1039 .ops = &usba_udc_ops, 1039 .ops = &usba_udc_ops,
1040 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), 1040 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
1041 .is_dualspeed = 1, 1041 .max_speed = USB_SPEED_HIGH,
1042 .name = "atmel_usba_udc", 1042 .name = "atmel_usba_udc",
1043 .dev = { 1043 .dev = {
1044 .init_name = "gadget", 1044 .init_name = "gadget",
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 9a0c3979ff43..27e313718422 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -182,6 +182,16 @@ static inline int hw_ep_bit(int num, int dir)
182 return num + (dir ? 16 : 0); 182 return num + (dir ? 16 : 0);
183} 183}
184 184
185static int ep_to_bit(int n)
186{
187 int fill = 16 - hw_ep_max / 2;
188
189 if (n >= hw_ep_max / 2)
190 n += fill;
191
192 return n;
193}
194
185/** 195/**
186 * hw_aread: reads from register bitfield 196 * hw_aread: reads from register bitfield
187 * @addr: address relative to bus map 197 * @addr: address relative to bus map
@@ -440,12 +450,13 @@ static int hw_ep_get_halt(int num, int dir)
440/** 450/**
441 * hw_test_and_clear_setup_status: test & clear setup status (execute without 451 * hw_test_and_clear_setup_status: test & clear setup status (execute without
442 * interruption) 452 * interruption)
443 * @n: bit number (endpoint) 453 * @n: endpoint number
444 * 454 *
445 * This function returns setup status 455 * This function returns setup status
446 */ 456 */
447static int hw_test_and_clear_setup_status(int n) 457static int hw_test_and_clear_setup_status(int n)
448{ 458{
459 n = ep_to_bit(n);
449 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n)); 460 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
450} 461}
451 462
@@ -641,12 +652,13 @@ static int hw_register_write(u16 addr, u32 data)
641/** 652/**
642 * hw_test_and_clear_complete: test & clear complete status (execute without 653 * hw_test_and_clear_complete: test & clear complete status (execute without
643 * interruption) 654 * interruption)
644 * @n: bit number (endpoint) 655 * @n: endpoint number
645 * 656 *
646 * This function returns complete status 657 * This function returns complete status
647 */ 658 */
648static int hw_test_and_clear_complete(int n) 659static int hw_test_and_clear_complete(int n)
649{ 660{
661 n = ep_to_bit(n);
650 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n)); 662 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
651} 663}
652 664
@@ -754,8 +766,11 @@ static ssize_t show_device(struct device *dev, struct device_attribute *attr,
754 766
755 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n", 767 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
756 gadget->speed); 768 gadget->speed);
769 n += scnprintf(buf + n, PAGE_SIZE - n, "max_speed = %d\n",
770 gadget->max_speed);
771 /* TODO: Scheduled for removal in 3.8. */
757 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n", 772 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
758 gadget->is_dualspeed); 773 gadget_is_dualspeed(gadget));
759 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n", 774 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
760 gadget->is_otg); 775 gadget->is_otg);
761 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n", 776 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
@@ -798,7 +813,7 @@ static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
798 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n", 813 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
799 (driver->function ? driver->function : "")); 814 (driver->function ? driver->function : ""));
800 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n", 815 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
801 driver->speed); 816 driver->max_speed);
802 817
803 return n; 818 return n;
804} 819}
@@ -2563,9 +2578,7 @@ static int ci13xxx_start(struct usb_gadget_driver *driver,
2563 if (driver == NULL || 2578 if (driver == NULL ||
2564 bind == NULL || 2579 bind == NULL ||
2565 driver->setup == NULL || 2580 driver->setup == NULL ||
2566 driver->disconnect == NULL || 2581 driver->disconnect == NULL)
2567 driver->suspend == NULL ||
2568 driver->resume == NULL)
2569 return -EINVAL; 2582 return -EINVAL;
2570 else if (udc == NULL) 2583 else if (udc == NULL)
2571 return -ENODEV; 2584 return -ENODEV;
@@ -2693,8 +2706,6 @@ static int ci13xxx_stop(struct usb_gadget_driver *driver)
2693 driver->unbind == NULL || 2706 driver->unbind == NULL ||
2694 driver->setup == NULL || 2707 driver->setup == NULL ||
2695 driver->disconnect == NULL || 2708 driver->disconnect == NULL ||
2696 driver->suspend == NULL ||
2697 driver->resume == NULL ||
2698 driver != udc->driver) 2709 driver != udc->driver)
2699 return -EINVAL; 2710 return -EINVAL;
2700 2711
@@ -2793,7 +2804,7 @@ static irqreturn_t udc_irq(void)
2793 isr_statistics.pci++; 2804 isr_statistics.pci++;
2794 udc->gadget.speed = hw_port_is_high_speed() ? 2805 udc->gadget.speed = hw_port_is_high_speed() ?
2795 USB_SPEED_HIGH : USB_SPEED_FULL; 2806 USB_SPEED_HIGH : USB_SPEED_FULL;
2796 if (udc->suspended) { 2807 if (udc->suspended && udc->driver->resume) {
2797 spin_unlock(udc->lock); 2808 spin_unlock(udc->lock);
2798 udc->driver->resume(&udc->gadget); 2809 udc->driver->resume(&udc->gadget);
2799 spin_lock(udc->lock); 2810 spin_lock(udc->lock);
@@ -2807,7 +2818,8 @@ static irqreturn_t udc_irq(void)
2807 isr_tr_complete_handler(udc); 2818 isr_tr_complete_handler(udc);
2808 } 2819 }
2809 if (USBi_SLI & intr) { 2820 if (USBi_SLI & intr) {
2810 if (udc->gadget.speed != USB_SPEED_UNKNOWN) { 2821 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
2822 udc->driver->suspend) {
2811 udc->suspended = 1; 2823 udc->suspended = 1;
2812 spin_unlock(udc->lock); 2824 spin_unlock(udc->lock);
2813 udc->driver->suspend(&udc->gadget); 2825 udc->driver->suspend(&udc->gadget);
@@ -2871,7 +2883,7 @@ static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2871 2883
2872 udc->gadget.ops = &usb_gadget_ops; 2884 udc->gadget.ops = &usb_gadget_ops;
2873 udc->gadget.speed = USB_SPEED_UNKNOWN; 2885 udc->gadget.speed = USB_SPEED_UNKNOWN;
2874 udc->gadget.is_dualspeed = 1; 2886 udc->gadget.max_speed = USB_SPEED_HIGH;
2875 udc->gadget.is_otg = 0; 2887 udc->gadget.is_otg = 0;
2876 udc->gadget.name = driver->name; 2888 udc->gadget.name = driver->name;
2877 2889
diff --git a/drivers/usb/gadget/ci13xxx_udc.h b/drivers/usb/gadget/ci13xxx_udc.h
index 23707775cb43..f4871e1fac59 100644
--- a/drivers/usb/gadget/ci13xxx_udc.h
+++ b/drivers/usb/gadget/ci13xxx_udc.h
@@ -127,7 +127,7 @@ struct ci13xxx {
127 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */ 127 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
128 u32 ep0_dir; /* ep0 direction */ 128 u32 ep0_dir; /* ep0 direction */
129#define ep0out ci13xxx_ep[0] 129#define ep0out ci13xxx_ep[0]
130#define ep0in ci13xxx_ep[16] 130#define ep0in ci13xxx_ep[hw_ep_max / 2]
131 u8 remote_wakeup; /* Is remote wakeup feature 131 u8 remote_wakeup; /* Is remote wakeup feature
132 enabled by the host? */ 132 enabled by the host? */
133 u8 suspended; /* suspended by the host */ 133 u8 suspended; /* suspended by the host */
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index f71b0787983f..a95de6a4a134 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1535,9 +1535,9 @@ composite_resume(struct usb_gadget *gadget)
1535 1535
1536static struct usb_gadget_driver composite_driver = { 1536static struct usb_gadget_driver composite_driver = {
1537#ifdef CONFIG_USB_GADGET_SUPERSPEED 1537#ifdef CONFIG_USB_GADGET_SUPERSPEED
1538 .speed = USB_SPEED_SUPER, 1538 .max_speed = USB_SPEED_SUPER,
1539#else 1539#else
1540 .speed = USB_SPEED_HIGH, 1540 .max_speed = USB_SPEED_HIGH,
1541#endif 1541#endif
1542 1542
1543 .unbind = composite_unbind, 1543 .unbind = composite_unbind,
@@ -1584,8 +1584,8 @@ int usb_composite_probe(struct usb_composite_driver *driver,
1584 driver->iProduct = driver->name; 1584 driver->iProduct = driver->name;
1585 composite_driver.function = (char *) driver->name; 1585 composite_driver.function = (char *) driver->name;
1586 composite_driver.driver.name = driver->name; 1586 composite_driver.driver.name = driver->name;
1587 composite_driver.speed = min((u8)composite_driver.speed, 1587 composite_driver.max_speed =
1588 (u8)driver->max_speed); 1588 min_t(u8, composite_driver.max_speed, driver->max_speed);
1589 composite = driver; 1589 composite = driver;
1590 composite_gadget_bind = bind; 1590 composite_gadget_bind = bind;
1591 1591
diff --git a/drivers/usb/gadget/dbgp.c b/drivers/usb/gadget/dbgp.c
index 6256420089f3..19d7bb0df75a 100644
--- a/drivers/usb/gadget/dbgp.c
+++ b/drivers/usb/gadget/dbgp.c
@@ -404,7 +404,7 @@ fail:
404 404
405static struct usb_gadget_driver dbgp_driver = { 405static struct usb_gadget_driver dbgp_driver = {
406 .function = "dbgp", 406 .function = "dbgp",
407 .speed = USB_SPEED_HIGH, 407 .max_speed = USB_SPEED_HIGH,
408 .unbind = dbgp_unbind, 408 .unbind = dbgp_unbind,
409 .setup = dbgp_setup, 409 .setup = dbgp_setup,
410 .disconnect = dbgp_disconnect, 410 .disconnect = dbgp_disconnect,
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c
index ab8f1b488d54..db815c2da7ed 100644
--- a/drivers/usb/gadget/dummy_hcd.c
+++ b/drivers/usb/gadget/dummy_hcd.c
@@ -823,19 +823,18 @@ static int dummy_pullup (struct usb_gadget *_gadget, int value)
823 823
824 if (value && dum->driver) { 824 if (value && dum->driver) {
825 if (mod_data.is_super_speed) 825 if (mod_data.is_super_speed)
826 dum->gadget.speed = dum->driver->speed; 826 dum->gadget.speed = dum->driver->max_speed;
827 else if (mod_data.is_high_speed) 827 else if (mod_data.is_high_speed)
828 dum->gadget.speed = min_t(u8, USB_SPEED_HIGH, 828 dum->gadget.speed = min_t(u8, USB_SPEED_HIGH,
829 dum->driver->speed); 829 dum->driver->max_speed);
830 else 830 else
831 dum->gadget.speed = USB_SPEED_FULL; 831 dum->gadget.speed = USB_SPEED_FULL;
832 dummy_udc_udpate_ep0(dum); 832 dummy_udc_udpate_ep0(dum);
833 833
834 if (dum->gadget.speed < dum->driver->speed) 834 if (dum->gadget.speed < dum->driver->max_speed)
835 dev_dbg(udc_dev(dum), "This device can perform faster" 835 dev_dbg(udc_dev(dum), "This device can perform faster"
836 " if you connect it to a %s port...\n", 836 " if you connect it to a %s port...\n",
837 (dum->driver->speed == USB_SPEED_SUPER ? 837 usb_speed_string(dum->driver->max_speed));
838 "SuperSpeed" : "HighSpeed"));
839 } 838 }
840 dum_hcd = gadget_to_dummy_hcd(_gadget); 839 dum_hcd = gadget_to_dummy_hcd(_gadget);
841 840
@@ -898,7 +897,7 @@ static int dummy_udc_start(struct usb_gadget *g,
898 struct dummy_hcd *dum_hcd = gadget_to_dummy_hcd(g); 897 struct dummy_hcd *dum_hcd = gadget_to_dummy_hcd(g);
899 struct dummy *dum = dum_hcd->dum; 898 struct dummy *dum = dum_hcd->dum;
900 899
901 if (driver->speed == USB_SPEED_UNKNOWN) 900 if (driver->max_speed == USB_SPEED_UNKNOWN)
902 return -EINVAL; 901 return -EINVAL;
903 902
904 /* 903 /*
@@ -977,7 +976,7 @@ static int dummy_udc_probe (struct platform_device *pdev)
977 976
978 dum->gadget.name = gadget_name; 977 dum->gadget.name = gadget_name;
979 dum->gadget.ops = &dummy_ops; 978 dum->gadget.ops = &dummy_ops;
980 dum->gadget.is_dualspeed = 1; 979 dum->gadget.max_speed = USB_SPEED_SUPER;
981 980
982 dev_set_name(&dum->gadget.dev, "gadget"); 981 dev_set_name(&dum->gadget.dev, "gadget");
983 dum->gadget.dev.parent = &pdev->dev; 982 dum->gadget.dev.parent = &pdev->dev;
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index 4dff83d2f265..753aa0683ac1 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -149,7 +149,7 @@ ep_matches (
149 switch (type) { 149 switch (type) {
150 case USB_ENDPOINT_XFER_INT: 150 case USB_ENDPOINT_XFER_INT:
151 /* INT: limit 64 bytes full speed, 1024 high/super speed */ 151 /* INT: limit 64 bytes full speed, 1024 high/super speed */
152 if (!gadget->is_dualspeed && max > 64) 152 if (!gadget_is_dualspeed(gadget) && max > 64)
153 return 0; 153 return 0;
154 /* FALLTHROUGH */ 154 /* FALLTHROUGH */
155 155
@@ -157,12 +157,12 @@ ep_matches (
157 /* ISO: limit 1023 bytes full speed, 1024 high/super speed */ 157 /* ISO: limit 1023 bytes full speed, 1024 high/super speed */
158 if (ep->maxpacket < max) 158 if (ep->maxpacket < max)
159 return 0; 159 return 0;
160 if (!gadget->is_dualspeed && max > 1023) 160 if (!gadget_is_dualspeed(gadget) && max > 1023)
161 return 0; 161 return 0;
162 162
163 /* BOTH: "high bandwidth" works only at high speed */ 163 /* BOTH: "high bandwidth" works only at high speed */
164 if ((desc->wMaxPacketSize & cpu_to_le16(3<<11))) { 164 if ((desc->wMaxPacketSize & cpu_to_le16(3<<11))) {
165 if (!gadget->is_dualspeed) 165 if (!gadget_is_dualspeed(gadget))
166 return 0; 166 return 0;
167 /* configure your hardware with enough buffering!! */ 167 /* configure your hardware with enough buffering!! */
168 } 168 }
diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c
index b5f6f9fef9c7..f63dc6c150d2 100644
--- a/drivers/usb/gadget/f_fs.c
+++ b/drivers/usb/gadget/f_fs.c
@@ -1399,7 +1399,7 @@ static int ffs_epfiles_create(struct ffs_data *ffs)
1399 ENTER(); 1399 ENTER();
1400 1400
1401 count = ffs->eps_count; 1401 count = ffs->eps_count;
1402 epfiles = kzalloc(count * sizeof *epfiles, GFP_KERNEL); 1402 epfiles = kcalloc(count, sizeof(*epfiles), GFP_KERNEL);
1403 if (!epfiles) 1403 if (!epfiles)
1404 return -ENOMEM; 1404 return -ENOMEM;
1405 1405
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1a6f415c0d02..6353eca1e852 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -1873,17 +1873,14 @@ static int check_command(struct fsg_common *common, int cmnd_size,
1873 common->lun, lun); 1873 common->lun, lun);
1874 1874
1875 /* Check the LUN */ 1875 /* Check the LUN */
1876 if (common->lun < common->nluns) { 1876 curlun = common->curlun;
1877 curlun = &common->luns[common->lun]; 1877 if (curlun) {
1878 common->curlun = curlun;
1879 if (common->cmnd[0] != REQUEST_SENSE) { 1878 if (common->cmnd[0] != REQUEST_SENSE) {
1880 curlun->sense_data = SS_NO_SENSE; 1879 curlun->sense_data = SS_NO_SENSE;
1881 curlun->sense_data_info = 0; 1880 curlun->sense_data_info = 0;
1882 curlun->info_valid = 0; 1881 curlun->info_valid = 0;
1883 } 1882 }
1884 } else { 1883 } else {
1885 common->curlun = NULL;
1886 curlun = NULL;
1887 common->bad_lun_okay = 0; 1884 common->bad_lun_okay = 0;
1888 1885
1889 /* 1886 /*
@@ -1929,6 +1926,17 @@ static int check_command(struct fsg_common *common, int cmnd_size,
1929 return 0; 1926 return 0;
1930} 1927}
1931 1928
1929/* wrapper of check_command for data size in blocks handling */
1930static int check_command_size_in_blocks(struct fsg_common *common,
1931 int cmnd_size, enum data_direction data_dir,
1932 unsigned int mask, int needs_medium, const char *name)
1933{
1934 if (common->curlun)
1935 common->data_size_from_cmnd <<= common->curlun->blkbits;
1936 return check_command(common, cmnd_size, data_dir,
1937 mask, needs_medium, name);
1938}
1939
1932static int do_scsi_command(struct fsg_common *common) 1940static int do_scsi_command(struct fsg_common *common)
1933{ 1941{
1934 struct fsg_buffhd *bh; 1942 struct fsg_buffhd *bh;
@@ -2011,9 +2019,9 @@ static int do_scsi_command(struct fsg_common *common)
2011 2019
2012 case READ_6: 2020 case READ_6:
2013 i = common->cmnd[4]; 2021 i = common->cmnd[4];
2014 common->data_size_from_cmnd = (i == 0 ? 256 : i) << 2022 common->data_size_from_cmnd = (i == 0) ? 256 : i;
2015 common->curlun->blkbits; 2023 reply = check_command_size_in_blocks(common, 6,
2016 reply = check_command(common, 6, DATA_DIR_TO_HOST, 2024 DATA_DIR_TO_HOST,
2017 (7<<1) | (1<<4), 1, 2025 (7<<1) | (1<<4), 1,
2018 "READ(6)"); 2026 "READ(6)");
2019 if (reply == 0) 2027 if (reply == 0)
@@ -2022,9 +2030,9 @@ static int do_scsi_command(struct fsg_common *common)
2022 2030
2023 case READ_10: 2031 case READ_10:
2024 common->data_size_from_cmnd = 2032 common->data_size_from_cmnd =
2025 get_unaligned_be16(&common->cmnd[7]) << 2033 get_unaligned_be16(&common->cmnd[7]);
2026 common->curlun->blkbits; 2034 reply = check_command_size_in_blocks(common, 10,
2027 reply = check_command(common, 10, DATA_DIR_TO_HOST, 2035 DATA_DIR_TO_HOST,
2028 (1<<1) | (0xf<<2) | (3<<7), 1, 2036 (1<<1) | (0xf<<2) | (3<<7), 1,
2029 "READ(10)"); 2037 "READ(10)");
2030 if (reply == 0) 2038 if (reply == 0)
@@ -2033,9 +2041,9 @@ static int do_scsi_command(struct fsg_common *common)
2033 2041
2034 case READ_12: 2042 case READ_12:
2035 common->data_size_from_cmnd = 2043 common->data_size_from_cmnd =
2036 get_unaligned_be32(&common->cmnd[6]) << 2044 get_unaligned_be32(&common->cmnd[6]);
2037 common->curlun->blkbits; 2045 reply = check_command_size_in_blocks(common, 12,
2038 reply = check_command(common, 12, DATA_DIR_TO_HOST, 2046 DATA_DIR_TO_HOST,
2039 (1<<1) | (0xf<<2) | (0xf<<6), 1, 2047 (1<<1) | (0xf<<2) | (0xf<<6), 1,
2040 "READ(12)"); 2048 "READ(12)");
2041 if (reply == 0) 2049 if (reply == 0)
@@ -2134,9 +2142,9 @@ static int do_scsi_command(struct fsg_common *common)
2134 2142
2135 case WRITE_6: 2143 case WRITE_6:
2136 i = common->cmnd[4]; 2144 i = common->cmnd[4];
2137 common->data_size_from_cmnd = (i == 0 ? 256 : i) << 2145 common->data_size_from_cmnd = (i == 0) ? 256 : i;
2138 common->curlun->blkbits; 2146 reply = check_command_size_in_blocks(common, 6,
2139 reply = check_command(common, 6, DATA_DIR_FROM_HOST, 2147 DATA_DIR_FROM_HOST,
2140 (7<<1) | (1<<4), 1, 2148 (7<<1) | (1<<4), 1,
2141 "WRITE(6)"); 2149 "WRITE(6)");
2142 if (reply == 0) 2150 if (reply == 0)
@@ -2145,9 +2153,9 @@ static int do_scsi_command(struct fsg_common *common)
2145 2153
2146 case WRITE_10: 2154 case WRITE_10:
2147 common->data_size_from_cmnd = 2155 common->data_size_from_cmnd =
2148 get_unaligned_be16(&common->cmnd[7]) << 2156 get_unaligned_be16(&common->cmnd[7]);
2149 common->curlun->blkbits; 2157 reply = check_command_size_in_blocks(common, 10,
2150 reply = check_command(common, 10, DATA_DIR_FROM_HOST, 2158 DATA_DIR_FROM_HOST,
2151 (1<<1) | (0xf<<2) | (3<<7), 1, 2159 (1<<1) | (0xf<<2) | (3<<7), 1,
2152 "WRITE(10)"); 2160 "WRITE(10)");
2153 if (reply == 0) 2161 if (reply == 0)
@@ -2156,9 +2164,9 @@ static int do_scsi_command(struct fsg_common *common)
2156 2164
2157 case WRITE_12: 2165 case WRITE_12:
2158 common->data_size_from_cmnd = 2166 common->data_size_from_cmnd =
2159 get_unaligned_be32(&common->cmnd[6]) << 2167 get_unaligned_be32(&common->cmnd[6]);
2160 common->curlun->blkbits; 2168 reply = check_command_size_in_blocks(common, 12,
2161 reply = check_command(common, 12, DATA_DIR_FROM_HOST, 2169 DATA_DIR_FROM_HOST,
2162 (1<<1) | (0xf<<2) | (0xf<<6), 1, 2170 (1<<1) | (0xf<<2) | (0xf<<6), 1,
2163 "WRITE(12)"); 2171 "WRITE(12)");
2164 if (reply == 0) 2172 if (reply == 0)
@@ -2273,6 +2281,10 @@ static int received_cbw(struct fsg_dev *fsg, struct fsg_buffhd *bh)
2273 if (common->data_size == 0) 2281 if (common->data_size == 0)
2274 common->data_dir = DATA_DIR_NONE; 2282 common->data_dir = DATA_DIR_NONE;
2275 common->lun = cbw->Lun; 2283 common->lun = cbw->Lun;
2284 if (common->lun >= 0 && common->lun < common->nluns)
2285 common->curlun = &common->luns[common->lun];
2286 else
2287 common->curlun = NULL;
2276 common->tag = cbw->Tag; 2288 common->tag = cbw->Tag;
2277 return 0; 2289 return 0;
2278} 2290}
@@ -2763,7 +2775,7 @@ static struct fsg_common *fsg_common_init(struct fsg_common *common,
2763 * Create the LUNs, open their backing files, and register the 2775 * Create the LUNs, open their backing files, and register the
2764 * LUN devices in sysfs. 2776 * LUN devices in sysfs.
2765 */ 2777 */
2766 curlun = kzalloc(nluns * sizeof *curlun, GFP_KERNEL); 2778 curlun = kcalloc(nluns, sizeof(*curlun), GFP_KERNEL);
2767 if (unlikely(!curlun)) { 2779 if (unlikely(!curlun)) {
2768 rc = -ENOMEM; 2780 rc = -ENOMEM;
2769 goto error_release; 2781 goto error_release;
diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c
index 11b5196284ae..e0f30fc70e45 100644
--- a/drivers/usb/gadget/file_storage.c
+++ b/drivers/usb/gadget/file_storage.c
@@ -2297,19 +2297,17 @@ static int check_command(struct fsg_dev *fsg, int cmnd_size,
2297 DBG(fsg, "using LUN %d from CBW, " 2297 DBG(fsg, "using LUN %d from CBW, "
2298 "not LUN %d from CDB\n", 2298 "not LUN %d from CDB\n",
2299 fsg->lun, lun); 2299 fsg->lun, lun);
2300 } else 2300 }
2301 fsg->lun = lun; // Use LUN from the command
2302 2301
2303 /* Check the LUN */ 2302 /* Check the LUN */
2304 if (fsg->lun < fsg->nluns) { 2303 curlun = fsg->curlun;
2305 fsg->curlun = curlun = &fsg->luns[fsg->lun]; 2304 if (curlun) {
2306 if (fsg->cmnd[0] != REQUEST_SENSE) { 2305 if (fsg->cmnd[0] != REQUEST_SENSE) {
2307 curlun->sense_data = SS_NO_SENSE; 2306 curlun->sense_data = SS_NO_SENSE;
2308 curlun->sense_data_info = 0; 2307 curlun->sense_data_info = 0;
2309 curlun->info_valid = 0; 2308 curlun->info_valid = 0;
2310 } 2309 }
2311 } else { 2310 } else {
2312 fsg->curlun = curlun = NULL;
2313 fsg->bad_lun_okay = 0; 2311 fsg->bad_lun_okay = 0;
2314 2312
2315 /* INQUIRY and REQUEST SENSE commands are explicitly allowed 2313 /* INQUIRY and REQUEST SENSE commands are explicitly allowed
@@ -2351,6 +2349,16 @@ static int check_command(struct fsg_dev *fsg, int cmnd_size,
2351 return 0; 2349 return 0;
2352} 2350}
2353 2351
2352/* wrapper of check_command for data size in blocks handling */
2353static int check_command_size_in_blocks(struct fsg_dev *fsg, int cmnd_size,
2354 enum data_direction data_dir, unsigned int mask,
2355 int needs_medium, const char *name)
2356{
2357 if (fsg->curlun)
2358 fsg->data_size_from_cmnd <<= fsg->curlun->blkbits;
2359 return check_command(fsg, cmnd_size, data_dir,
2360 mask, needs_medium, name);
2361}
2354 2362
2355static int do_scsi_command(struct fsg_dev *fsg) 2363static int do_scsi_command(struct fsg_dev *fsg)
2356{ 2364{
@@ -2425,26 +2433,27 @@ static int do_scsi_command(struct fsg_dev *fsg)
2425 2433
2426 case READ_6: 2434 case READ_6:
2427 i = fsg->cmnd[4]; 2435 i = fsg->cmnd[4];
2428 fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << fsg->curlun->blkbits; 2436 fsg->data_size_from_cmnd = (i == 0) ? 256 : i;
2429 if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST, 2437 if ((reply = check_command_size_in_blocks(fsg, 6,
2438 DATA_DIR_TO_HOST,
2430 (7<<1) | (1<<4), 1, 2439 (7<<1) | (1<<4), 1,
2431 "READ(6)")) == 0) 2440 "READ(6)")) == 0)
2432 reply = do_read(fsg); 2441 reply = do_read(fsg);
2433 break; 2442 break;
2434 2443
2435 case READ_10: 2444 case READ_10:
2436 fsg->data_size_from_cmnd = 2445 fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]);
2437 get_unaligned_be16(&fsg->cmnd[7]) << fsg->curlun->blkbits; 2446 if ((reply = check_command_size_in_blocks(fsg, 10,
2438 if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST, 2447 DATA_DIR_TO_HOST,
2439 (1<<1) | (0xf<<2) | (3<<7), 1, 2448 (1<<1) | (0xf<<2) | (3<<7), 1,
2440 "READ(10)")) == 0) 2449 "READ(10)")) == 0)
2441 reply = do_read(fsg); 2450 reply = do_read(fsg);
2442 break; 2451 break;
2443 2452
2444 case READ_12: 2453 case READ_12:
2445 fsg->data_size_from_cmnd = 2454 fsg->data_size_from_cmnd = get_unaligned_be32(&fsg->cmnd[6]);
2446 get_unaligned_be32(&fsg->cmnd[6]) << fsg->curlun->blkbits; 2455 if ((reply = check_command_size_in_blocks(fsg, 12,
2447 if ((reply = check_command(fsg, 12, DATA_DIR_TO_HOST, 2456 DATA_DIR_TO_HOST,
2448 (1<<1) | (0xf<<2) | (0xf<<6), 1, 2457 (1<<1) | (0xf<<2) | (0xf<<6), 1,
2449 "READ(12)")) == 0) 2458 "READ(12)")) == 0)
2450 reply = do_read(fsg); 2459 reply = do_read(fsg);
@@ -2529,26 +2538,27 @@ static int do_scsi_command(struct fsg_dev *fsg)
2529 2538
2530 case WRITE_6: 2539 case WRITE_6:
2531 i = fsg->cmnd[4]; 2540 i = fsg->cmnd[4];
2532 fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << fsg->curlun->blkbits; 2541 fsg->data_size_from_cmnd = (i == 0) ? 256 : i;
2533 if ((reply = check_command(fsg, 6, DATA_DIR_FROM_HOST, 2542 if ((reply = check_command_size_in_blocks(fsg, 6,
2543 DATA_DIR_FROM_HOST,
2534 (7<<1) | (1<<4), 1, 2544 (7<<1) | (1<<4), 1,
2535 "WRITE(6)")) == 0) 2545 "WRITE(6)")) == 0)
2536 reply = do_write(fsg); 2546 reply = do_write(fsg);
2537 break; 2547 break;
2538 2548
2539 case WRITE_10: 2549 case WRITE_10:
2540 fsg->data_size_from_cmnd = 2550 fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]);
2541 get_unaligned_be16(&fsg->cmnd[7]) << fsg->curlun->blkbits; 2551 if ((reply = check_command_size_in_blocks(fsg, 10,
2542 if ((reply = check_command(fsg, 10, DATA_DIR_FROM_HOST, 2552 DATA_DIR_FROM_HOST,
2543 (1<<1) | (0xf<<2) | (3<<7), 1, 2553 (1<<1) | (0xf<<2) | (3<<7), 1,
2544 "WRITE(10)")) == 0) 2554 "WRITE(10)")) == 0)
2545 reply = do_write(fsg); 2555 reply = do_write(fsg);
2546 break; 2556 break;
2547 2557
2548 case WRITE_12: 2558 case WRITE_12:
2549 fsg->data_size_from_cmnd = 2559 fsg->data_size_from_cmnd = get_unaligned_be32(&fsg->cmnd[6]);
2550 get_unaligned_be32(&fsg->cmnd[6]) << fsg->curlun->blkbits; 2560 if ((reply = check_command_size_in_blocks(fsg, 12,
2551 if ((reply = check_command(fsg, 12, DATA_DIR_FROM_HOST, 2561 DATA_DIR_FROM_HOST,
2552 (1<<1) | (0xf<<2) | (0xf<<6), 1, 2562 (1<<1) | (0xf<<2) | (0xf<<6), 1,
2553 "WRITE(12)")) == 0) 2563 "WRITE(12)")) == 0)
2554 reply = do_write(fsg); 2564 reply = do_write(fsg);
@@ -2715,7 +2725,17 @@ static int get_next_command(struct fsg_dev *fsg)
2715 memcpy(fsg->cmnd, fsg->cbbuf_cmnd, fsg->cmnd_size); 2725 memcpy(fsg->cmnd, fsg->cbbuf_cmnd, fsg->cmnd_size);
2716 fsg->cbbuf_cmnd_size = 0; 2726 fsg->cbbuf_cmnd_size = 0;
2717 spin_unlock_irq(&fsg->lock); 2727 spin_unlock_irq(&fsg->lock);
2728
2729 /* Use LUN from the command */
2730 fsg->lun = fsg->cmnd[1] >> 5;
2718 } 2731 }
2732
2733 /* Update current lun */
2734 if (fsg->lun >= 0 && fsg->lun < fsg->nluns)
2735 fsg->curlun = &fsg->luns[fsg->lun];
2736 else
2737 fsg->curlun = NULL;
2738
2719 return rc; 2739 return rc;
2720} 2740}
2721 2741
@@ -3584,7 +3604,7 @@ static void fsg_resume(struct usb_gadget *gadget)
3584/*-------------------------------------------------------------------------*/ 3604/*-------------------------------------------------------------------------*/
3585 3605
3586static struct usb_gadget_driver fsg_driver = { 3606static struct usb_gadget_driver fsg_driver = {
3587 .speed = USB_SPEED_SUPER, 3607 .max_speed = USB_SPEED_SUPER,
3588 .function = (char *) fsg_string_product, 3608 .function = (char *) fsg_string_product,
3589 .unbind = fsg_unbind, 3609 .unbind = fsg_unbind,
3590 .disconnect = fsg_disconnect, 3610 .disconnect = fsg_disconnect,
diff --git a/drivers/usb/gadget/fsl_qe_udc.c b/drivers/usb/gadget/fsl_qe_udc.c
index e00cf92409ce..b95697c03d07 100644
--- a/drivers/usb/gadget/fsl_qe_udc.c
+++ b/drivers/usb/gadget/fsl_qe_udc.c
@@ -2336,7 +2336,7 @@ static int fsl_qe_start(struct usb_gadget_driver *driver,
2336 if (!udc_controller) 2336 if (!udc_controller)
2337 return -ENODEV; 2337 return -ENODEV;
2338 2338
2339 if (!driver || driver->speed < USB_SPEED_FULL 2339 if (!driver || driver->max_speed < USB_SPEED_FULL
2340 || !bind || !driver->disconnect || !driver->setup) 2340 || !bind || !driver->disconnect || !driver->setup)
2341 return -EINVAL; 2341 return -EINVAL;
2342 2342
@@ -2350,7 +2350,7 @@ static int fsl_qe_start(struct usb_gadget_driver *driver,
2350 /* hook up the driver */ 2350 /* hook up the driver */
2351 udc_controller->driver = driver; 2351 udc_controller->driver = driver;
2352 udc_controller->gadget.dev.driver = &driver->driver; 2352 udc_controller->gadget.dev.driver = &driver->driver;
2353 udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed); 2353 udc_controller->gadget.speed = driver->max_speed;
2354 spin_unlock_irqrestore(&udc_controller->lock, flags); 2354 spin_unlock_irqrestore(&udc_controller->lock, flags);
2355 2355
2356 retval = bind(&udc_controller->gadget); 2356 retval = bind(&udc_controller->gadget);
@@ -2814,20 +2814,7 @@ static struct platform_driver udc_driver = {
2814#endif 2814#endif
2815}; 2815};
2816 2816
2817static int __init qe_udc_init(void) 2817module_platform_driver(udc_driver);
2818{
2819 printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
2820 DRIVER_VERSION);
2821 return platform_driver_register(&udc_driver);
2822}
2823
2824static void __exit qe_udc_exit(void)
2825{
2826 platform_driver_unregister(&udc_driver);
2827}
2828
2829module_init(qe_udc_init);
2830module_exit(qe_udc_exit);
2831 2818
2832MODULE_DESCRIPTION(DRIVER_DESC); 2819MODULE_DESCRIPTION(DRIVER_DESC);
2833MODULE_AUTHOR(DRIVER_AUTHOR); 2820MODULE_AUTHOR(DRIVER_AUTHOR);
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index dd28ef3def71..d7ea6c076ce9 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -1934,7 +1934,7 @@ static int fsl_start(struct usb_gadget_driver *driver,
1934 if (!udc_controller) 1934 if (!udc_controller)
1935 return -ENODEV; 1935 return -ENODEV;
1936 1936
1937 if (!driver || driver->speed < USB_SPEED_FULL 1937 if (!driver || driver->max_speed < USB_SPEED_FULL
1938 || !bind || !driver->disconnect || !driver->setup) 1938 || !bind || !driver->disconnect || !driver->setup)
1939 return -EINVAL; 1939 return -EINVAL;
1940 1940
@@ -2525,7 +2525,7 @@ static int __init fsl_udc_probe(struct platform_device *pdev)
2525 2525
2526 /* Setup gadget structure */ 2526 /* Setup gadget structure */
2527 udc_controller->gadget.ops = &fsl_gadget_ops; 2527 udc_controller->gadget.ops = &fsl_gadget_ops;
2528 udc_controller->gadget.is_dualspeed = 1; 2528 udc_controller->gadget.max_speed = USB_SPEED_HIGH;
2529 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep; 2529 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2530 INIT_LIST_HEAD(&udc_controller->gadget.ep_list); 2530 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2531 udc_controller->gadget.speed = USB_SPEED_UNKNOWN; 2531 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
diff --git a/drivers/usb/gadget/fusb300_udc.c b/drivers/usb/gadget/fusb300_udc.c
index 74da206c8406..5831cb4a0b35 100644
--- a/drivers/usb/gadget/fusb300_udc.c
+++ b/drivers/usb/gadget/fusb300_udc.c
@@ -1317,7 +1317,7 @@ static int fusb300_udc_start(struct usb_gadget_driver *driver,
1317 int retval; 1317 int retval;
1318 1318
1319 if (!driver 1319 if (!driver
1320 || driver->speed < USB_SPEED_FULL 1320 || driver->max_speed < USB_SPEED_FULL
1321 || !bind 1321 || !bind
1322 || !driver->setup) 1322 || !driver->setup)
1323 return -EINVAL; 1323 return -EINVAL;
@@ -1463,7 +1463,7 @@ static int __init fusb300_probe(struct platform_device *pdev)
1463 1463
1464 dev_set_name(&fusb300->gadget.dev, "gadget"); 1464 dev_set_name(&fusb300->gadget.dev, "gadget");
1465 1465
1466 fusb300->gadget.is_dualspeed = 1; 1466 fusb300->gadget.max_speed = USB_SPEED_HIGH;
1467 fusb300->gadget.dev.parent = &pdev->dev; 1467 fusb300->gadget.dev.parent = &pdev->dev;
1468 fusb300->gadget.dev.dma_mask = pdev->dev.dma_mask; 1468 fusb300->gadget.dev.dma_mask = pdev->dev.dma_mask;
1469 fusb300->gadget.dev.release = pdev->dev.release; 1469 fusb300->gadget.dev.release = pdev->dev.release;
diff --git a/drivers/usb/gadget/goku_udc.c b/drivers/usb/gadget/goku_udc.c
index 7f87805cddc4..5af70fcce139 100644
--- a/drivers/usb/gadget/goku_udc.c
+++ b/drivers/usb/gadget/goku_udc.c
@@ -1357,7 +1357,7 @@ static int goku_start(struct usb_gadget_driver *driver,
1357 int retval; 1357 int retval;
1358 1358
1359 if (!driver 1359 if (!driver
1360 || driver->speed < USB_SPEED_FULL 1360 || driver->max_speed < USB_SPEED_FULL
1361 || !bind 1361 || !bind
1362 || !driver->disconnect 1362 || !driver->disconnect
1363 || !driver->setup) 1363 || !driver->setup)
@@ -1796,6 +1796,7 @@ static int goku_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1796 spin_lock_init(&dev->lock); 1796 spin_lock_init(&dev->lock);
1797 dev->pdev = pdev; 1797 dev->pdev = pdev;
1798 dev->gadget.ops = &goku_ops; 1798 dev->gadget.ops = &goku_ops;
1799 dev->gadget.max_speed = USB_SPEED_FULL;
1799 1800
1800 /* the "gadget" abstracts/virtualizes the controller */ 1801 /* the "gadget" abstracts/virtualizes the controller */
1801 dev_set_name(&dev->gadget.dev, "gadget"); 1802 dev_set_name(&dev->gadget.dev, "gadget");
diff --git a/drivers/usb/gadget/imx_udc.c b/drivers/usb/gadget/imx_udc.c
index 2d978c0e7ced..8d1c75abd73d 100644
--- a/drivers/usb/gadget/imx_udc.c
+++ b/drivers/usb/gadget/imx_udc.c
@@ -1336,7 +1336,7 @@ static int imx_udc_start(struct usb_gadget_driver *driver,
1336 int retval; 1336 int retval;
1337 1337
1338 if (!driver 1338 if (!driver
1339 || driver->speed < USB_SPEED_FULL 1339 || driver->max_speed < USB_SPEED_FULL
1340 || !bind 1340 || !bind
1341 || !driver->disconnect 1341 || !driver->disconnect
1342 || !driver->setup) 1342 || !driver->setup)
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c
index 6b7ea25af0fe..ae04266dba1b 100644
--- a/drivers/usb/gadget/inode.c
+++ b/drivers/usb/gadget/inode.c
@@ -1766,9 +1766,9 @@ gadgetfs_suspend (struct usb_gadget *gadget)
1766 1766
1767static struct usb_gadget_driver gadgetfs_driver = { 1767static struct usb_gadget_driver gadgetfs_driver = {
1768#ifdef CONFIG_USB_GADGET_DUALSPEED 1768#ifdef CONFIG_USB_GADGET_DUALSPEED
1769 .speed = USB_SPEED_HIGH, 1769 .max_speed = USB_SPEED_HIGH,
1770#else 1770#else
1771 .speed = USB_SPEED_FULL, 1771 .max_speed = USB_SPEED_FULL,
1772#endif 1772#endif
1773 .function = (char *) driver_desc, 1773 .function = (char *) driver_desc,
1774 .unbind = gadgetfs_unbind, 1774 .unbind = gadgetfs_unbind,
@@ -1792,7 +1792,7 @@ static int gadgetfs_probe (struct usb_gadget *gadget)
1792} 1792}
1793 1793
1794static struct usb_gadget_driver probe_driver = { 1794static struct usb_gadget_driver probe_driver = {
1795 .speed = USB_SPEED_HIGH, 1795 .max_speed = USB_SPEED_HIGH,
1796 .unbind = gadgetfs_nop, 1796 .unbind = gadgetfs_nop,
1797 .setup = (void *)gadgetfs_nop, 1797 .setup = (void *)gadgetfs_nop,
1798 .disconnect = gadgetfs_nop, 1798 .disconnect = gadgetfs_nop,
diff --git a/drivers/usb/gadget/langwell_udc.c b/drivers/usb/gadget/langwell_udc.c
index c9fa3bf5b377..fa0fcc11263f 100644
--- a/drivers/usb/gadget/langwell_udc.c
+++ b/drivers/usb/gadget/langwell_udc.c
@@ -3267,7 +3267,7 @@ static int langwell_udc_probe(struct pci_dev *pdev,
3267 dev->gadget.ep0 = &dev->ep[0].ep; /* gadget ep0 */ 3267 dev->gadget.ep0 = &dev->ep[0].ep; /* gadget ep0 */
3268 INIT_LIST_HEAD(&dev->gadget.ep_list); /* ep_list */ 3268 INIT_LIST_HEAD(&dev->gadget.ep_list); /* ep_list */
3269 dev->gadget.speed = USB_SPEED_UNKNOWN; /* speed */ 3269 dev->gadget.speed = USB_SPEED_UNKNOWN; /* speed */
3270 dev->gadget.is_dualspeed = 1; /* support dual speed */ 3270 dev->gadget.max_speed = USB_SPEED_HIGH; /* support dual speed */
3271#ifdef OTG_TRANSCEIVER 3271#ifdef OTG_TRANSCEIVER
3272 dev->gadget.is_otg = 1; /* support otg mode */ 3272 dev->gadget.is_otg = 1; /* support otg mode */
3273#endif 3273#endif
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 9aa1cbbee45b..3608b3bd5732 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -1472,7 +1472,7 @@ static int m66592_start(struct usb_gadget_driver *driver,
1472 int retval; 1472 int retval;
1473 1473
1474 if (!driver 1474 if (!driver
1475 || driver->speed < USB_SPEED_HIGH 1475 || driver->max_speed < USB_SPEED_HIGH
1476 || !bind 1476 || !bind
1477 || !driver->setup) 1477 || !driver->setup)
1478 return -EINVAL; 1478 return -EINVAL;
@@ -1653,7 +1653,7 @@ static int __init m66592_probe(struct platform_device *pdev)
1653 m66592->gadget.ops = &m66592_gadget_ops; 1653 m66592->gadget.ops = &m66592_gadget_ops;
1654 device_initialize(&m66592->gadget.dev); 1654 device_initialize(&m66592->gadget.dev);
1655 dev_set_name(&m66592->gadget.dev, "gadget"); 1655 dev_set_name(&m66592->gadget.dev, "gadget");
1656 m66592->gadget.is_dualspeed = 1; 1656 m66592->gadget.max_speed = USB_SPEED_HIGH;
1657 m66592->gadget.dev.parent = &pdev->dev; 1657 m66592->gadget.dev.parent = &pdev->dev;
1658 m66592->gadget.dev.dma_mask = pdev->dev.dma_mask; 1658 m66592->gadget.dev.dma_mask = pdev->dev.dma_mask;
1659 m66592->gadget.dev.release = pdev->dev.release; 1659 m66592->gadget.dev.release = pdev->dev.release;
diff --git a/drivers/usb/gadget/mv_udc.h b/drivers/usb/gadget/mv_udc.h
index daa75c12f336..34aadfae723d 100644
--- a/drivers/usb/gadget/mv_udc.h
+++ b/drivers/usb/gadget/mv_udc.h
@@ -180,7 +180,7 @@ struct mv_udc {
180 180
181 struct mv_cap_regs __iomem *cap_regs; 181 struct mv_cap_regs __iomem *cap_regs;
182 struct mv_op_regs __iomem *op_regs; 182 struct mv_op_regs __iomem *op_regs;
183 unsigned int phy_regs; 183 void __iomem *phy_regs;
184 unsigned int max_eps; 184 unsigned int max_eps;
185 struct mv_dqh *ep_dqh; 185 struct mv_dqh *ep_dqh;
186 size_t ep_dqh_size; 186 size_t ep_dqh_size;
@@ -211,11 +211,14 @@ struct mv_udc {
211 softconnected:1, 211 softconnected:1,
212 force_fs:1, 212 force_fs:1,
213 clock_gating:1, 213 clock_gating:1,
214 active:1; 214 active:1,
215 stopped:1; /* stop bit is setted */
215 216
216 struct work_struct vbus_work; 217 struct work_struct vbus_work;
217 struct workqueue_struct *qwork; 218 struct workqueue_struct *qwork;
218 219
220 struct otg_transceiver *transceiver;
221
219 struct mv_usb_platform_data *pdata; 222 struct mv_usb_platform_data *pdata;
220 223
221 /* some SOC has mutiple clock sources for USB*/ 224 /* some SOC has mutiple clock sources for USB*/
diff --git a/drivers/usb/gadget/mv_udc_core.c b/drivers/usb/gadget/mv_udc_core.c
index 892412103dd8..f97e737d26f7 100644
--- a/drivers/usb/gadget/mv_udc_core.c
+++ b/drivers/usb/gadget/mv_udc_core.c
@@ -276,11 +276,12 @@ static void done(struct mv_ep *ep, struct mv_req *req, int status)
276 276
277static int queue_dtd(struct mv_ep *ep, struct mv_req *req) 277static int queue_dtd(struct mv_ep *ep, struct mv_req *req)
278{ 278{
279 u32 tmp, epstatus, bit_pos, direction;
280 struct mv_udc *udc; 279 struct mv_udc *udc;
281 struct mv_dqh *dqh; 280 struct mv_dqh *dqh;
281 u32 bit_pos, direction;
282 u32 usbcmd, epstatus;
282 unsigned int loops; 283 unsigned int loops;
283 int readsafe, retval = 0; 284 int retval = 0;
284 285
285 udc = ep->udc; 286 udc = ep->udc;
286 direction = ep_dir(ep); 287 direction = ep_dir(ep);
@@ -293,30 +294,18 @@ static int queue_dtd(struct mv_ep *ep, struct mv_req *req)
293 lastreq = list_entry(ep->queue.prev, struct mv_req, queue); 294 lastreq = list_entry(ep->queue.prev, struct mv_req, queue);
294 lastreq->tail->dtd_next = 295 lastreq->tail->dtd_next =
295 req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK; 296 req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
296 if (readl(&udc->op_regs->epprime) & bit_pos) { 297
297 loops = LOOPS(PRIME_TIMEOUT); 298 wmb();
298 while (readl(&udc->op_regs->epprime) & bit_pos) { 299
299 if (loops == 0) { 300 if (readl(&udc->op_regs->epprime) & bit_pos)
300 retval = -ETIME; 301 goto done;
301 goto done; 302
302 }
303 udelay(LOOPS_USEC);
304 loops--;
305 }
306 if (readl(&udc->op_regs->epstatus) & bit_pos)
307 goto done;
308 }
309 readsafe = 0;
310 loops = LOOPS(READSAFE_TIMEOUT); 303 loops = LOOPS(READSAFE_TIMEOUT);
311 while (readsafe == 0) { 304 while (1) {
312 if (loops == 0) {
313 retval = -ETIME;
314 goto done;
315 }
316 /* start with setting the semaphores */ 305 /* start with setting the semaphores */
317 tmp = readl(&udc->op_regs->usbcmd); 306 usbcmd = readl(&udc->op_regs->usbcmd);
318 tmp |= USBCMD_ATDTW_TRIPWIRE_SET; 307 usbcmd |= USBCMD_ATDTW_TRIPWIRE_SET;
319 writel(tmp, &udc->op_regs->usbcmd); 308 writel(usbcmd, &udc->op_regs->usbcmd);
320 309
321 /* read the endpoint status */ 310 /* read the endpoint status */
322 epstatus = readl(&udc->op_regs->epstatus) & bit_pos; 311 epstatus = readl(&udc->op_regs->epstatus) & bit_pos;
@@ -329,98 +318,46 @@ static int queue_dtd(struct mv_ep *ep, struct mv_req *req)
329 * primed. 318 * primed.
330 */ 319 */
331 if (readl(&udc->op_regs->usbcmd) 320 if (readl(&udc->op_regs->usbcmd)
332 & USBCMD_ATDTW_TRIPWIRE_SET) { 321 & USBCMD_ATDTW_TRIPWIRE_SET)
333 readsafe = 1; 322 break;
334 } 323
335 loops--; 324 loops--;
325 if (loops == 0) {
326 dev_err(&udc->dev->dev,
327 "Timeout for ATDTW_TRIPWIRE...\n");
328 retval = -ETIME;
329 goto done;
330 }
336 udelay(LOOPS_USEC); 331 udelay(LOOPS_USEC);
337 } 332 }
338 333
339 /* Clear the semaphore */ 334 /* Clear the semaphore */
340 tmp = readl(&udc->op_regs->usbcmd); 335 usbcmd = readl(&udc->op_regs->usbcmd);
341 tmp &= USBCMD_ATDTW_TRIPWIRE_CLEAR; 336 usbcmd &= USBCMD_ATDTW_TRIPWIRE_CLEAR;
342 writel(tmp, &udc->op_regs->usbcmd); 337 writel(usbcmd, &udc->op_regs->usbcmd);
343
344 /* If endpoint is not active, we activate it now. */
345 if (!epstatus) {
346 if (direction == EP_DIR_IN) {
347 struct mv_dtd *curr_dtd = dma_to_virt(
348 &udc->dev->dev, dqh->curr_dtd_ptr);
349
350 loops = LOOPS(DTD_TIMEOUT);
351 while (curr_dtd->size_ioc_sts
352 & DTD_STATUS_ACTIVE) {
353 if (loops == 0) {
354 retval = -ETIME;
355 goto done;
356 }
357 loops--;
358 udelay(LOOPS_USEC);
359 }
360 }
361 /* No other transfers on the queue */
362 338
363 /* Write dQH next pointer and terminate bit to 0 */ 339 if (epstatus)
364 dqh->next_dtd_ptr = req->head->td_dma 340 goto done;
365 & EP_QUEUE_HEAD_NEXT_POINTER_MASK; 341 }
366 dqh->size_ioc_int_sts = 0;
367 342
368 /* 343 /* Write dQH next pointer and terminate bit to 0 */
369 * Ensure that updates to the QH will 344 dqh->next_dtd_ptr = req->head->td_dma
370 * occur before priming. 345 & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
371 */
372 wmb();
373 346
374 /* Prime the Endpoint */ 347 /* clear active and halt bit, in case set from a previous error */
375 writel(bit_pos, &udc->op_regs->epprime); 348 dqh->size_ioc_int_sts &= ~(DTD_STATUS_ACTIVE | DTD_STATUS_HALTED);
376 }
377 } else {
378 /* Write dQH next pointer and terminate bit to 0 */
379 dqh->next_dtd_ptr = req->head->td_dma
380 & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
381 dqh->size_ioc_int_sts = 0;
382 349
383 /* Ensure that updates to the QH will occur before priming. */ 350 /* Ensure that updates to the QH will occure before priming. */
384 wmb(); 351 wmb();
385 352
386 /* Prime the Endpoint */ 353 /* Prime the Endpoint */
387 writel(bit_pos, &udc->op_regs->epprime); 354 writel(bit_pos, &udc->op_regs->epprime);
388 355
389 if (direction == EP_DIR_IN) {
390 /* FIXME add status check after prime the IN ep */
391 int prime_again;
392 u32 curr_dtd_ptr = dqh->curr_dtd_ptr;
393
394 loops = LOOPS(DTD_TIMEOUT);
395 prime_again = 0;
396 while ((curr_dtd_ptr != req->head->td_dma)) {
397 curr_dtd_ptr = dqh->curr_dtd_ptr;
398 if (loops == 0) {
399 dev_err(&udc->dev->dev,
400 "failed to prime %s\n",
401 ep->name);
402 retval = -ETIME;
403 goto done;
404 }
405 loops--;
406 udelay(LOOPS_USEC);
407
408 if (loops == (LOOPS(DTD_TIMEOUT) >> 2)) {
409 if (prime_again)
410 goto done;
411 dev_info(&udc->dev->dev,
412 "prime again\n");
413 writel(bit_pos,
414 &udc->op_regs->epprime);
415 prime_again = 1;
416 }
417 }
418 }
419 }
420done: 356done:
421 return retval; 357 return retval;
422} 358}
423 359
360
424static struct mv_dtd *build_dtd(struct mv_req *req, unsigned *length, 361static struct mv_dtd *build_dtd(struct mv_req *req, unsigned *length,
425 dma_addr_t *dma, int *is_last) 362 dma_addr_t *dma, int *is_last)
426{ 363{
@@ -841,6 +778,27 @@ mv_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
841 return 0; 778 return 0;
842} 779}
843 780
781static void mv_prime_ep(struct mv_ep *ep, struct mv_req *req)
782{
783 struct mv_dqh *dqh = ep->dqh;
784 u32 bit_pos;
785
786 /* Write dQH next pointer and terminate bit to 0 */
787 dqh->next_dtd_ptr = req->head->td_dma
788 & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
789
790 /* clear active and halt bit, in case set from a previous error */
791 dqh->size_ioc_int_sts &= ~(DTD_STATUS_ACTIVE | DTD_STATUS_HALTED);
792
793 /* Ensure that updates to the QH will occure before priming. */
794 wmb();
795
796 bit_pos = 1 << (((ep_dir(ep) == EP_DIR_OUT) ? 0 : 16) + ep->ep_num);
797
798 /* Prime the Endpoint */
799 writel(bit_pos, &ep->udc->op_regs->epprime);
800}
801
844/* dequeues (cancels, unlinks) an I/O request from an endpoint */ 802/* dequeues (cancels, unlinks) an I/O request from an endpoint */
845static int mv_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 803static int mv_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
846{ 804{
@@ -883,15 +841,13 @@ static int mv_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
883 841
884 /* The request isn't the last request in this ep queue */ 842 /* The request isn't the last request in this ep queue */
885 if (req->queue.next != &ep->queue) { 843 if (req->queue.next != &ep->queue) {
886 struct mv_dqh *qh;
887 struct mv_req *next_req; 844 struct mv_req *next_req;
888 845
889 qh = ep->dqh; 846 next_req = list_entry(req->queue.next,
890 next_req = list_entry(req->queue.next, struct mv_req, 847 struct mv_req, queue);
891 queue);
892 848
893 /* Point the QH to the first TD of next request */ 849 /* Point the QH to the first TD of next request */
894 writel((u32) next_req->head, &qh->curr_dtd_ptr); 850 mv_prime_ep(ep, next_req);
895 } else { 851 } else {
896 struct mv_dqh *qh; 852 struct mv_dqh *qh;
897 853
@@ -1056,6 +1012,8 @@ static void udc_stop(struct mv_udc *udc)
1056 USBINTR_PORT_CHANGE_DETECT_EN | USBINTR_RESET_EN); 1012 USBINTR_PORT_CHANGE_DETECT_EN | USBINTR_RESET_EN);
1057 writel(tmp, &udc->op_regs->usbintr); 1013 writel(tmp, &udc->op_regs->usbintr);
1058 1014
1015 udc->stopped = 1;
1016
1059 /* Reset the Run the bit in the command register to stop VUSB */ 1017 /* Reset the Run the bit in the command register to stop VUSB */
1060 tmp = readl(&udc->op_regs->usbcmd); 1018 tmp = readl(&udc->op_regs->usbcmd);
1061 tmp &= ~USBCMD_RUN_STOP; 1019 tmp &= ~USBCMD_RUN_STOP;
@@ -1072,6 +1030,8 @@ static void udc_start(struct mv_udc *udc)
1072 /* Enable interrupts */ 1030 /* Enable interrupts */
1073 writel(usbintr, &udc->op_regs->usbintr); 1031 writel(usbintr, &udc->op_regs->usbintr);
1074 1032
1033 udc->stopped = 0;
1034
1075 /* Set the Run bit in the command register */ 1035 /* Set the Run bit in the command register */
1076 writel(USBCMD_RUN_STOP, &udc->op_regs->usbcmd); 1036 writel(USBCMD_RUN_STOP, &udc->op_regs->usbcmd);
1077} 1037}
@@ -1134,11 +1094,11 @@ static int udc_reset(struct mv_udc *udc)
1134 return 0; 1094 return 0;
1135} 1095}
1136 1096
1137static int mv_udc_enable(struct mv_udc *udc) 1097static int mv_udc_enable_internal(struct mv_udc *udc)
1138{ 1098{
1139 int retval; 1099 int retval;
1140 1100
1141 if (udc->clock_gating == 0 || udc->active) 1101 if (udc->active)
1142 return 0; 1102 return 0;
1143 1103
1144 dev_dbg(&udc->dev->dev, "enable udc\n"); 1104 dev_dbg(&udc->dev->dev, "enable udc\n");
@@ -1157,9 +1117,17 @@ static int mv_udc_enable(struct mv_udc *udc)
1157 return 0; 1117 return 0;
1158} 1118}
1159 1119
1160static void mv_udc_disable(struct mv_udc *udc) 1120static int mv_udc_enable(struct mv_udc *udc)
1161{ 1121{
1162 if (udc->clock_gating && udc->active) { 1122 if (udc->clock_gating)
1123 return mv_udc_enable_internal(udc);
1124
1125 return 0;
1126}
1127
1128static void mv_udc_disable_internal(struct mv_udc *udc)
1129{
1130 if (udc->active) {
1163 dev_dbg(&udc->dev->dev, "disable udc\n"); 1131 dev_dbg(&udc->dev->dev, "disable udc\n");
1164 if (udc->pdata->phy_deinit) 1132 if (udc->pdata->phy_deinit)
1165 udc->pdata->phy_deinit(udc->phy_regs); 1133 udc->pdata->phy_deinit(udc->phy_regs);
@@ -1168,6 +1136,12 @@ static void mv_udc_disable(struct mv_udc *udc)
1168 } 1136 }
1169} 1137}
1170 1138
1139static void mv_udc_disable(struct mv_udc *udc)
1140{
1141 if (udc->clock_gating)
1142 mv_udc_disable_internal(udc);
1143}
1144
1171static int mv_udc_get_frame(struct usb_gadget *gadget) 1145static int mv_udc_get_frame(struct usb_gadget *gadget)
1172{ 1146{
1173 struct mv_udc *udc; 1147 struct mv_udc *udc;
@@ -1178,7 +1152,7 @@ static int mv_udc_get_frame(struct usb_gadget *gadget)
1178 1152
1179 udc = container_of(gadget, struct mv_udc, gadget); 1153 udc = container_of(gadget, struct mv_udc, gadget);
1180 1154
1181 retval = readl(udc->op_regs->frindex) & USB_FRINDEX_MASKS; 1155 retval = readl(&udc->op_regs->frindex) & USB_FRINDEX_MASKS;
1182 1156
1183 return retval; 1157 return retval;
1184} 1158}
@@ -1212,10 +1186,11 @@ static int mv_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1212 udc = container_of(gadget, struct mv_udc, gadget); 1186 udc = container_of(gadget, struct mv_udc, gadget);
1213 spin_lock_irqsave(&udc->lock, flags); 1187 spin_lock_irqsave(&udc->lock, flags);
1214 1188
1189 udc->vbus_active = (is_active != 0);
1190
1215 dev_dbg(&udc->dev->dev, "%s: softconnect %d, vbus_active %d\n", 1191 dev_dbg(&udc->dev->dev, "%s: softconnect %d, vbus_active %d\n",
1216 __func__, udc->softconnect, udc->vbus_active); 1192 __func__, udc->softconnect, udc->vbus_active);
1217 1193
1218 udc->vbus_active = (is_active != 0);
1219 if (udc->driver && udc->softconnect && udc->vbus_active) { 1194 if (udc->driver && udc->softconnect && udc->vbus_active) {
1220 retval = mv_udc_enable(udc); 1195 retval = mv_udc_enable(udc);
1221 if (retval == 0) { 1196 if (retval == 0) {
@@ -1244,10 +1219,11 @@ static int mv_udc_pullup(struct usb_gadget *gadget, int is_on)
1244 udc = container_of(gadget, struct mv_udc, gadget); 1219 udc = container_of(gadget, struct mv_udc, gadget);
1245 spin_lock_irqsave(&udc->lock, flags); 1220 spin_lock_irqsave(&udc->lock, flags);
1246 1221
1222 udc->softconnect = (is_on != 0);
1223
1247 dev_dbg(&udc->dev->dev, "%s: softconnect %d, vbus_active %d\n", 1224 dev_dbg(&udc->dev->dev, "%s: softconnect %d, vbus_active %d\n",
1248 __func__, udc->softconnect, udc->vbus_active); 1225 __func__, udc->softconnect, udc->vbus_active);
1249 1226
1250 udc->softconnect = (is_on != 0);
1251 if (udc->driver && udc->softconnect && udc->vbus_active) { 1227 if (udc->driver && udc->softconnect && udc->vbus_active) {
1252 retval = mv_udc_enable(udc); 1228 retval = mv_udc_enable(udc);
1253 if (retval == 0) { 1229 if (retval == 0) {
@@ -1407,6 +1383,20 @@ static int mv_udc_start(struct usb_gadget_driver *driver,
1407 return retval; 1383 return retval;
1408 } 1384 }
1409 1385
1386 if (udc->transceiver) {
1387 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
1388 if (retval) {
1389 dev_err(&udc->dev->dev,
1390 "unable to register peripheral to otg\n");
1391 if (driver->unbind) {
1392 driver->unbind(&udc->gadget);
1393 udc->gadget.dev.driver = NULL;
1394 udc->driver = NULL;
1395 }
1396 return retval;
1397 }
1398 }
1399
1410 /* pullup is always on */ 1400 /* pullup is always on */
1411 mv_udc_pullup(&udc->gadget, 1); 1401 mv_udc_pullup(&udc->gadget, 1);
1412 1402
@@ -2026,6 +2016,10 @@ static irqreturn_t mv_udc_irq(int irq, void *dev)
2026 struct mv_udc *udc = (struct mv_udc *)dev; 2016 struct mv_udc *udc = (struct mv_udc *)dev;
2027 u32 status, intr; 2017 u32 status, intr;
2028 2018
2019 /* Disable ISR when stopped bit is set */
2020 if (udc->stopped)
2021 return IRQ_NONE;
2022
2029 spin_lock(&udc->lock); 2023 spin_lock(&udc->lock);
2030 2024
2031 status = readl(&udc->op_regs->usbsts); 2025 status = readl(&udc->op_regs->usbsts);
@@ -2109,7 +2103,12 @@ static int __devexit mv_udc_remove(struct platform_device *dev)
2109 destroy_workqueue(udc->qwork); 2103 destroy_workqueue(udc->qwork);
2110 } 2104 }
2111 2105
2112 if (udc->pdata && udc->pdata->vbus && udc->clock_gating) 2106 /*
2107 * If we have transceiver inited,
2108 * then vbus irq will not be requested in udc driver.
2109 */
2110 if (udc->pdata && udc->pdata->vbus
2111 && udc->clock_gating && udc->transceiver == NULL)
2113 free_irq(udc->pdata->vbus->irq, &dev->dev); 2112 free_irq(udc->pdata->vbus->irq, &dev->dev);
2114 2113
2115 /* free memory allocated in probe */ 2114 /* free memory allocated in probe */
@@ -2129,11 +2128,9 @@ static int __devexit mv_udc_remove(struct platform_device *dev)
2129 2128
2130 if (udc->cap_regs) 2129 if (udc->cap_regs)
2131 iounmap(udc->cap_regs); 2130 iounmap(udc->cap_regs);
2132 udc->cap_regs = NULL;
2133 2131
2134 if (udc->phy_regs) 2132 if (udc->phy_regs)
2135 iounmap((void *)udc->phy_regs); 2133 iounmap(udc->phy_regs);
2136 udc->phy_regs = 0;
2137 2134
2138 if (udc->status_req) { 2135 if (udc->status_req) {
2139 kfree(udc->status_req->req.buf); 2136 kfree(udc->status_req->req.buf);
@@ -2182,6 +2179,11 @@ static int __devinit mv_udc_probe(struct platform_device *dev)
2182 2179
2183 udc->dev = dev; 2180 udc->dev = dev;
2184 2181
2182#ifdef CONFIG_USB_OTG_UTILS
2183 if (pdata->mode == MV_USB_MODE_OTG)
2184 udc->transceiver = otg_get_transceiver();
2185#endif
2186
2185 udc->clknum = pdata->clknum; 2187 udc->clknum = pdata->clknum;
2186 for (clk_i = 0; clk_i < udc->clknum; clk_i++) { 2188 for (clk_i = 0; clk_i < udc->clknum; clk_i++) {
2187 udc->clk[clk_i] = clk_get(&dev->dev, pdata->clkname[clk_i]); 2189 udc->clk[clk_i] = clk_get(&dev->dev, pdata->clkname[clk_i]);
@@ -2213,24 +2215,20 @@ static int __devinit mv_udc_probe(struct platform_device *dev)
2213 goto err_iounmap_capreg; 2215 goto err_iounmap_capreg;
2214 } 2216 }
2215 2217
2216 udc->phy_regs = (unsigned int)ioremap(r->start, resource_size(r)); 2218 udc->phy_regs = ioremap(r->start, resource_size(r));
2217 if (udc->phy_regs == 0) { 2219 if (udc->phy_regs == NULL) {
2218 dev_err(&dev->dev, "failed to map phy I/O memory\n"); 2220 dev_err(&dev->dev, "failed to map phy I/O memory\n");
2219 retval = -EBUSY; 2221 retval = -EBUSY;
2220 goto err_iounmap_capreg; 2222 goto err_iounmap_capreg;
2221 } 2223 }
2222 2224
2223 /* we will acces controller register, so enable the clk */ 2225 /* we will acces controller register, so enable the clk */
2224 udc_clock_enable(udc); 2226 retval = mv_udc_enable_internal(udc);
2225 if (pdata->phy_init) { 2227 if (retval)
2226 retval = pdata->phy_init(udc->phy_regs); 2228 goto err_iounmap_phyreg;
2227 if (retval) {
2228 dev_err(&dev->dev, "phy init error %d\n", retval);
2229 goto err_iounmap_phyreg;
2230 }
2231 }
2232 2229
2233 udc->op_regs = (struct mv_op_regs __iomem *)((u32)udc->cap_regs 2230 udc->op_regs =
2231 (struct mv_op_regs __iomem *)((unsigned long)udc->cap_regs
2234 + (readl(&udc->cap_regs->caplength_hciversion) 2232 + (readl(&udc->cap_regs->caplength_hciversion)
2235 & CAPLENGTH_MASK)); 2233 & CAPLENGTH_MASK));
2236 udc->max_eps = readl(&udc->cap_regs->dccparams) & DCCPARAMS_DEN_MASK; 2234 udc->max_eps = readl(&udc->cap_regs->dccparams) & DCCPARAMS_DEN_MASK;
@@ -2312,7 +2310,7 @@ static int __devinit mv_udc_probe(struct platform_device *dev)
2312 udc->gadget.ep0 = &udc->eps[0].ep; /* gadget ep0 */ 2310 udc->gadget.ep0 = &udc->eps[0].ep; /* gadget ep0 */
2313 INIT_LIST_HEAD(&udc->gadget.ep_list); /* ep_list */ 2311 INIT_LIST_HEAD(&udc->gadget.ep_list); /* ep_list */
2314 udc->gadget.speed = USB_SPEED_UNKNOWN; /* speed */ 2312 udc->gadget.speed = USB_SPEED_UNKNOWN; /* speed */
2315 udc->gadget.is_dualspeed = 1; /* support dual speed */ 2313 udc->gadget.max_speed = USB_SPEED_HIGH; /* support dual speed */
2316 2314
2317 /* the "gadget" abstracts/virtualizes the controller */ 2315 /* the "gadget" abstracts/virtualizes the controller */
2318 dev_set_name(&udc->gadget.dev, "gadget"); 2316 dev_set_name(&udc->gadget.dev, "gadget");
@@ -2328,7 +2326,9 @@ static int __devinit mv_udc_probe(struct platform_device *dev)
2328 eps_init(udc); 2326 eps_init(udc);
2329 2327
2330 /* VBUS detect: we can disable/enable clock on demand.*/ 2328 /* VBUS detect: we can disable/enable clock on demand.*/
2331 if (pdata->vbus) { 2329 if (udc->transceiver)
2330 udc->clock_gating = 1;
2331 else if (pdata->vbus) {
2332 udc->clock_gating = 1; 2332 udc->clock_gating = 1;
2333 retval = request_threaded_irq(pdata->vbus->irq, NULL, 2333 retval = request_threaded_irq(pdata->vbus->irq, NULL,
2334 mv_udc_vbus_irq, IRQF_ONESHOT, "vbus", udc); 2334 mv_udc_vbus_irq, IRQF_ONESHOT, "vbus", udc);
@@ -2354,11 +2354,9 @@ static int __devinit mv_udc_probe(struct platform_device *dev)
2354 * If not, it means that VBUS detection is not supported, we 2354 * If not, it means that VBUS detection is not supported, we
2355 * have to enable vbus active all the time to let controller work. 2355 * have to enable vbus active all the time to let controller work.
2356 */ 2356 */
2357 if (udc->clock_gating) { 2357 if (udc->clock_gating)
2358 if (udc->pdata->phy_deinit) 2358 mv_udc_disable_internal(udc);
2359 udc->pdata->phy_deinit(udc->phy_regs); 2359 else
2360 udc_clock_disable(udc);
2361 } else
2362 udc->vbus_active = 1; 2360 udc->vbus_active = 1;
2363 2361
2364 retval = usb_add_gadget_udc(&dev->dev, &udc->gadget); 2362 retval = usb_add_gadget_udc(&dev->dev, &udc->gadget);
@@ -2371,7 +2369,8 @@ static int __devinit mv_udc_probe(struct platform_device *dev)
2371 return 0; 2369 return 0;
2372 2370
2373err_unregister: 2371err_unregister:
2374 if (udc->pdata && udc->pdata->vbus && udc->clock_gating) 2372 if (udc->pdata && udc->pdata->vbus
2373 && udc->clock_gating && udc->transceiver == NULL)
2375 free_irq(pdata->vbus->irq, &dev->dev); 2374 free_irq(pdata->vbus->irq, &dev->dev);
2376 device_unregister(&udc->gadget.dev); 2375 device_unregister(&udc->gadget.dev);
2377err_free_irq: 2376err_free_irq:
@@ -2387,11 +2386,9 @@ err_free_dma:
2387 dma_free_coherent(&dev->dev, udc->ep_dqh_size, 2386 dma_free_coherent(&dev->dev, udc->ep_dqh_size,
2388 udc->ep_dqh, udc->ep_dqh_dma); 2387 udc->ep_dqh, udc->ep_dqh_dma);
2389err_disable_clock: 2388err_disable_clock:
2390 if (udc->pdata->phy_deinit) 2389 mv_udc_disable_internal(udc);
2391 udc->pdata->phy_deinit(udc->phy_regs);
2392 udc_clock_disable(udc);
2393err_iounmap_phyreg: 2390err_iounmap_phyreg:
2394 iounmap((void *)udc->phy_regs); 2391 iounmap(udc->phy_regs);
2395err_iounmap_capreg: 2392err_iounmap_capreg:
2396 iounmap(udc->cap_regs); 2393 iounmap(udc->cap_regs);
2397err_put_clk: 2394err_put_clk:
@@ -2407,7 +2404,30 @@ static int mv_udc_suspend(struct device *_dev)
2407{ 2404{
2408 struct mv_udc *udc = the_controller; 2405 struct mv_udc *udc = the_controller;
2409 2406
2410 udc_stop(udc); 2407 /* if OTG is enabled, the following will be done in OTG driver*/
2408 if (udc->transceiver)
2409 return 0;
2410
2411 if (udc->pdata->vbus && udc->pdata->vbus->poll)
2412 if (udc->pdata->vbus->poll() == VBUS_HIGH) {
2413 dev_info(&udc->dev->dev, "USB cable is connected!\n");
2414 return -EAGAIN;
2415 }
2416
2417 /*
2418 * only cable is unplugged, udc can suspend.
2419 * So do not care about clock_gating == 1.
2420 */
2421 if (!udc->clock_gating) {
2422 udc_stop(udc);
2423
2424 spin_lock_irq(&udc->lock);
2425 /* stop all usb activities */
2426 stop_activity(udc, udc->driver);
2427 spin_unlock_irq(&udc->lock);
2428
2429 mv_udc_disable_internal(udc);
2430 }
2411 2431
2412 return 0; 2432 return 0;
2413} 2433}
@@ -2417,20 +2437,22 @@ static int mv_udc_resume(struct device *_dev)
2417 struct mv_udc *udc = the_controller; 2437 struct mv_udc *udc = the_controller;
2418 int retval; 2438 int retval;
2419 2439
2420 if (udc->pdata->phy_init) { 2440 /* if OTG is enabled, the following will be done in OTG driver*/
2421 retval = udc->pdata->phy_init(udc->phy_regs); 2441 if (udc->transceiver)
2422 if (retval) { 2442 return 0;
2423 dev_err(&udc->dev->dev, 2443
2424 "init phy error %d when resume back\n", 2444 if (!udc->clock_gating) {
2425 retval); 2445 retval = mv_udc_enable_internal(udc);
2446 if (retval)
2426 return retval; 2447 return retval;
2448
2449 if (udc->driver && udc->softconnect) {
2450 udc_reset(udc);
2451 ep0_reset(udc);
2452 udc_start(udc);
2427 } 2453 }
2428 } 2454 }
2429 2455
2430 udc_reset(udc);
2431 ep0_reset(udc);
2432 udc_start(udc);
2433
2434 return 0; 2456 return 0;
2435} 2457}
2436 2458
@@ -2457,30 +2479,16 @@ static struct platform_driver udc_driver = {
2457 .shutdown = mv_udc_shutdown, 2479 .shutdown = mv_udc_shutdown,
2458 .driver = { 2480 .driver = {
2459 .owner = THIS_MODULE, 2481 .owner = THIS_MODULE,
2460 .name = "pxa-u2o", 2482 .name = "mv-udc",
2461#ifdef CONFIG_PM 2483#ifdef CONFIG_PM
2462 .pm = &mv_udc_pm_ops, 2484 .pm = &mv_udc_pm_ops,
2463#endif 2485#endif
2464 }, 2486 },
2465}; 2487};
2466MODULE_ALIAS("platform:pxa-u2o");
2467 2488
2489module_platform_driver(udc_driver);
2490MODULE_ALIAS("platform:mv-udc");
2468MODULE_DESCRIPTION(DRIVER_DESC); 2491MODULE_DESCRIPTION(DRIVER_DESC);
2469MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>"); 2492MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>");
2470MODULE_VERSION(DRIVER_VERSION); 2493MODULE_VERSION(DRIVER_VERSION);
2471MODULE_LICENSE("GPL"); 2494MODULE_LICENSE("GPL");
2472
2473
2474static int __init init(void)
2475{
2476 return platform_driver_register(&udc_driver);
2477}
2478module_init(init);
2479
2480
2481static void __exit cleanup(void)
2482{
2483 platform_driver_unregister(&udc_driver);
2484}
2485module_exit(cleanup);
2486
diff --git a/drivers/usb/gadget/net2272.c b/drivers/usb/gadget/net2272.c
index d1b76368472f..4c81d540bc26 100644
--- a/drivers/usb/gadget/net2272.c
+++ b/drivers/usb/gadget/net2272.c
@@ -1459,7 +1459,7 @@ static int net2272_start(struct usb_gadget *_gadget,
1459 unsigned i; 1459 unsigned i;
1460 1460
1461 if (!driver || !driver->unbind || !driver->setup || 1461 if (!driver || !driver->unbind || !driver->setup ||
1462 driver->speed != USB_SPEED_HIGH) 1462 driver->max_speed != USB_SPEED_HIGH)
1463 return -EINVAL; 1463 return -EINVAL;
1464 1464
1465 dev = container_of(_gadget, struct net2272, gadget); 1465 dev = container_of(_gadget, struct net2272, gadget);
@@ -2235,7 +2235,7 @@ net2272_probe_init(struct device *dev, unsigned int irq)
2235 ret->irq = irq; 2235 ret->irq = irq;
2236 ret->dev = dev; 2236 ret->dev = dev;
2237 ret->gadget.ops = &net2272_ops; 2237 ret->gadget.ops = &net2272_ops;
2238 ret->gadget.is_dualspeed = 1; 2238 ret->gadget.max_speed = USB_SPEED_HIGH;
2239 2239
2240 /* the "gadget" abstracts/virtualizes the controller */ 2240 /* the "gadget" abstracts/virtualizes the controller */
2241 dev_set_name(&ret->gadget.dev, "gadget"); 2241 dev_set_name(&ret->gadget.dev, "gadget");
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c
index da2b9d0be3ca..cf1f36454d08 100644
--- a/drivers/usb/gadget/net2280.c
+++ b/drivers/usb/gadget/net2280.c
@@ -1881,7 +1881,7 @@ static int net2280_start(struct usb_gadget *_gadget,
1881 * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE) 1881 * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
1882 * "must not be used in normal operation" 1882 * "must not be used in normal operation"
1883 */ 1883 */
1884 if (!driver || driver->speed < USB_SPEED_HIGH 1884 if (!driver || driver->max_speed < USB_SPEED_HIGH
1885 || !driver->setup) 1885 || !driver->setup)
1886 return -EINVAL; 1886 return -EINVAL;
1887 1887
@@ -2698,7 +2698,7 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id)
2698 spin_lock_init (&dev->lock); 2698 spin_lock_init (&dev->lock);
2699 dev->pdev = pdev; 2699 dev->pdev = pdev;
2700 dev->gadget.ops = &net2280_ops; 2700 dev->gadget.ops = &net2280_ops;
2701 dev->gadget.is_dualspeed = 1; 2701 dev->gadget.max_speed = USB_SPEED_HIGH;
2702 2702
2703 /* the "gadget" abstracts/virtualizes the controller */ 2703 /* the "gadget" abstracts/virtualizes the controller */
2704 dev_set_name(&dev->gadget.dev, "gadget"); 2704 dev_set_name(&dev->gadget.dev, "gadget");
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 788989a10223..7db5bbe6251b 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -2110,7 +2110,7 @@ static int omap_udc_start(struct usb_gadget_driver *driver,
2110 return -ENODEV; 2110 return -ENODEV;
2111 if (!driver 2111 if (!driver
2112 // FIXME if otg, check: driver->is_otg 2112 // FIXME if otg, check: driver->is_otg
2113 || driver->speed < USB_SPEED_FULL 2113 || driver->max_speed < USB_SPEED_FULL
2114 || !bind || !driver->setup) 2114 || !bind || !driver->setup)
2115 return -EINVAL; 2115 return -EINVAL;
2116 2116
@@ -2676,6 +2676,7 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2676 INIT_LIST_HEAD(&udc->gadget.ep_list); 2676 INIT_LIST_HEAD(&udc->gadget.ep_list);
2677 INIT_LIST_HEAD(&udc->iso); 2677 INIT_LIST_HEAD(&udc->iso);
2678 udc->gadget.speed = USB_SPEED_UNKNOWN; 2678 udc->gadget.speed = USB_SPEED_UNKNOWN;
2679 udc->gadget.max_speed = USB_SPEED_FULL;
2679 udc->gadget.name = driver_name; 2680 udc->gadget.name = driver_name;
2680 2681
2681 device_initialize(&udc->gadget.dev); 2682 device_initialize(&udc->gadget.dev);
diff --git a/drivers/usb/gadget/pch_udc.c b/drivers/usb/gadget/pch_udc.c
index 5048a0c07640..dd2313cce1d3 100644
--- a/drivers/usb/gadget/pch_udc.c
+++ b/drivers/usb/gadget/pch_udc.c
@@ -2693,7 +2693,7 @@ static int pch_udc_start(struct usb_gadget_driver *driver,
2693 struct pch_udc_dev *dev = pch_udc; 2693 struct pch_udc_dev *dev = pch_udc;
2694 int retval; 2694 int retval;
2695 2695
2696 if (!driver || (driver->speed == USB_SPEED_UNKNOWN) || !bind || 2696 if (!driver || (driver->max_speed == USB_SPEED_UNKNOWN) || !bind ||
2697 !driver->setup || !driver->unbind || !driver->disconnect) { 2697 !driver->setup || !driver->unbind || !driver->disconnect) {
2698 dev_err(&dev->pdev->dev, 2698 dev_err(&dev->pdev->dev,
2699 "%s: invalid driver parameter\n", __func__); 2699 "%s: invalid driver parameter\n", __func__);
@@ -2941,7 +2941,7 @@ static int pch_udc_probe(struct pci_dev *pdev,
2941 dev->gadget.dev.dma_mask = pdev->dev.dma_mask; 2941 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2942 dev->gadget.dev.release = gadget_release; 2942 dev->gadget.dev.release = gadget_release;
2943 dev->gadget.name = KBUILD_MODNAME; 2943 dev->gadget.name = KBUILD_MODNAME;
2944 dev->gadget.is_dualspeed = 1; 2944 dev->gadget.max_speed = USB_SPEED_HIGH;
2945 2945
2946 retval = device_register(&dev->gadget.dev); 2946 retval = device_register(&dev->gadget.dev);
2947 if (retval) 2947 if (retval)
diff --git a/drivers/usb/gadget/printer.c b/drivers/usb/gadget/printer.c
index 65a8834f274b..d83134b0f78a 100644
--- a/drivers/usb/gadget/printer.c
+++ b/drivers/usb/gadget/printer.c
@@ -1141,7 +1141,7 @@ printer_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1141 break; 1141 break;
1142#ifdef CONFIG_USB_GADGET_DUALSPEED 1142#ifdef CONFIG_USB_GADGET_DUALSPEED
1143 case USB_DT_DEVICE_QUALIFIER: 1143 case USB_DT_DEVICE_QUALIFIER:
1144 if (!gadget->is_dualspeed) 1144 if (!gadget_is_dualspeed(gadget))
1145 break; 1145 break;
1146 /* 1146 /*
1147 * assumes ep0 uses the same value for both 1147 * assumes ep0 uses the same value for both
@@ -1155,7 +1155,7 @@ printer_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1155 break; 1155 break;
1156 1156
1157 case USB_DT_OTHER_SPEED_CONFIG: 1157 case USB_DT_OTHER_SPEED_CONFIG:
1158 if (!gadget->is_dualspeed) 1158 if (!gadget_is_dualspeed(gadget))
1159 break; 1159 break;
1160 /* FALLTHROUGH */ 1160 /* FALLTHROUGH */
1161#endif /* CONFIG_USB_GADGET_DUALSPEED */ 1161#endif /* CONFIG_USB_GADGET_DUALSPEED */
@@ -1535,7 +1535,7 @@ fail:
1535/*-------------------------------------------------------------------------*/ 1535/*-------------------------------------------------------------------------*/
1536 1536
1537static struct usb_gadget_driver printer_driver = { 1537static struct usb_gadget_driver printer_driver = {
1538 .speed = DEVSPEED, 1538 .max_speed = DEVSPEED,
1539 1539
1540 .function = (char *) driver_desc, 1540 .function = (char *) driver_desc,
1541 .unbind = printer_unbind, 1541 .unbind = printer_unbind,
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index c090a7e3ecf8..dd470635f4f7 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -1264,7 +1264,7 @@ static int pxa25x_start(struct usb_gadget_driver *driver,
1264 int retval; 1264 int retval;
1265 1265
1266 if (!driver 1266 if (!driver
1267 || driver->speed < USB_SPEED_FULL 1267 || driver->max_speed < USB_SPEED_FULL
1268 || !bind 1268 || !bind
1269 || !driver->disconnect 1269 || !driver->disconnect
1270 || !driver->setup) 1270 || !driver->setup)
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index 18b6b091f2a6..f4c44eb806c3 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -1807,7 +1807,7 @@ static int pxa27x_udc_start(struct usb_gadget_driver *driver,
1807 struct pxa_udc *udc = the_controller; 1807 struct pxa_udc *udc = the_controller;
1808 int retval; 1808 int retval;
1809 1809
1810 if (!driver || driver->speed < USB_SPEED_FULL || !bind 1810 if (!driver || driver->max_speed < USB_SPEED_FULL || !bind
1811 || !driver->disconnect || !driver->setup) 1811 || !driver->disconnect || !driver->setup)
1812 return -EINVAL; 1812 return -EINVAL;
1813 if (!udc) 1813 if (!udc)
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c
index fc719a3f8557..f5b8d215e1d5 100644
--- a/drivers/usb/gadget/r8a66597-udc.c
+++ b/drivers/usb/gadget/r8a66597-udc.c
@@ -1746,7 +1746,7 @@ static int r8a66597_start(struct usb_gadget *gadget,
1746 struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget); 1746 struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget);
1747 1747
1748 if (!driver 1748 if (!driver
1749 || driver->speed < USB_SPEED_HIGH 1749 || driver->max_speed < USB_SPEED_HIGH
1750 || !driver->setup) 1750 || !driver->setup)
1751 return -EINVAL; 1751 return -EINVAL;
1752 if (!r8a66597) 1752 if (!r8a66597)
@@ -1911,7 +1911,7 @@ static int __init r8a66597_probe(struct platform_device *pdev)
1911 1911
1912 r8a66597->gadget.ops = &r8a66597_gadget_ops; 1912 r8a66597->gadget.ops = &r8a66597_gadget_ops;
1913 dev_set_name(&r8a66597->gadget.dev, "gadget"); 1913 dev_set_name(&r8a66597->gadget.dev, "gadget");
1914 r8a66597->gadget.is_dualspeed = 1; 1914 r8a66597->gadget.max_speed = USB_SPEED_HIGH;
1915 r8a66597->gadget.dev.parent = &pdev->dev; 1915 r8a66597->gadget.dev.parent = &pdev->dev;
1916 r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; 1916 r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask;
1917 r8a66597->gadget.dev.release = pdev->dev.release; 1917 r8a66597->gadget.dev.release = pdev->dev.release;
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index b31448229f0b..69295ba9d99a 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -2586,7 +2586,7 @@ static int s3c_hsotg_start(struct usb_gadget_driver *driver,
2586 return -EINVAL; 2586 return -EINVAL;
2587 } 2587 }
2588 2588
2589 if (driver->speed < USB_SPEED_FULL) 2589 if (driver->max_speed < USB_SPEED_FULL)
2590 dev_err(hsotg->dev, "%s: bad speed\n", __func__); 2590 dev_err(hsotg->dev, "%s: bad speed\n", __func__);
2591 2591
2592 if (!bind || !driver->setup) { 2592 if (!bind || !driver->setup) {
@@ -3362,7 +3362,7 @@ static int __devinit s3c_hsotg_probe(struct platform_device *pdev)
3362 3362
3363 dev_set_name(&hsotg->gadget.dev, "gadget"); 3363 dev_set_name(&hsotg->gadget.dev, "gadget");
3364 3364
3365 hsotg->gadget.is_dualspeed = 1; 3365 hsotg->gadget.max_speed = USB_SPEED_HIGH;
3366 hsotg->gadget.ops = &s3c_hsotg_gadget_ops; 3366 hsotg->gadget.ops = &s3c_hsotg_gadget_ops;
3367 hsotg->gadget.name = dev_name(dev); 3367 hsotg->gadget.name = dev_name(dev);
3368 3368
@@ -3467,18 +3467,7 @@ static struct platform_driver s3c_hsotg_driver = {
3467 .resume = s3c_hsotg_resume, 3467 .resume = s3c_hsotg_resume,
3468}; 3468};
3469 3469
3470static int __init s3c_hsotg_modinit(void) 3470module_platform_driver(s3c_hsotg_driver);
3471{
3472 return platform_driver_register(&s3c_hsotg_driver);
3473}
3474
3475static void __exit s3c_hsotg_modexit(void)
3476{
3477 platform_driver_unregister(&s3c_hsotg_driver);
3478}
3479
3480module_init(s3c_hsotg_modinit);
3481module_exit(s3c_hsotg_modexit);
3482 3471
3483MODULE_DESCRIPTION("Samsung S3C USB High-speed/OtG device"); 3472MODULE_DESCRIPTION("Samsung S3C USB High-speed/OtG device");
3484MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 3473MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
diff --git a/drivers/usb/gadget/s3c-hsudc.c b/drivers/usb/gadget/s3c-hsudc.c
index 20a553b46aed..df8661d266cb 100644
--- a/drivers/usb/gadget/s3c-hsudc.c
+++ b/drivers/usb/gadget/s3c-hsudc.c
@@ -28,9 +28,10 @@
28#include <linux/usb/gadget.h> 28#include <linux/usb/gadget.h>
29#include <linux/usb/otg.h> 29#include <linux/usb/otg.h>
30#include <linux/prefetch.h> 30#include <linux/prefetch.h>
31#include <linux/platform_data/s3c-hsudc.h>
32#include <linux/regulator/consumer.h>
31 33
32#include <mach/regs-s3c2443-clock.h> 34#include <mach/regs-s3c2443-clock.h>
33#include <plat/udc.h>
34 35
35#define S3C_HSUDC_REG(x) (x) 36#define S3C_HSUDC_REG(x) (x)
36 37
@@ -87,6 +88,12 @@
87#define DATA_STATE_XMIT (1) 88#define DATA_STATE_XMIT (1)
88#define DATA_STATE_RECV (2) 89#define DATA_STATE_RECV (2)
89 90
91static const char * const s3c_hsudc_supply_names[] = {
92 "vdda", /* analog phy supply, 3.3V */
93 "vddi", /* digital phy supply, 1.2V */
94 "vddosc", /* oscillator supply, 1.8V - 3.3V */
95};
96
90/** 97/**
91 * struct s3c_hsudc_ep - Endpoint representation used by driver. 98 * struct s3c_hsudc_ep - Endpoint representation used by driver.
92 * @ep: USB gadget layer representation of device endpoint. 99 * @ep: USB gadget layer representation of device endpoint.
@@ -139,6 +146,7 @@ struct s3c_hsudc {
139 struct device *dev; 146 struct device *dev;
140 struct s3c24xx_hsudc_platdata *pd; 147 struct s3c24xx_hsudc_platdata *pd;
141 struct otg_transceiver *transceiver; 148 struct otg_transceiver *transceiver;
149 struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsudc_supply_names)];
142 spinlock_t lock; 150 spinlock_t lock;
143 void __iomem *regs; 151 void __iomem *regs;
144 struct resource *mem_rsrc; 152 struct resource *mem_rsrc;
@@ -153,7 +161,6 @@ struct s3c_hsudc {
153#define ep_index(_ep) ((_ep)->bEndpointAddress & \ 161#define ep_index(_ep) ((_ep)->bEndpointAddress & \
154 USB_ENDPOINT_NUMBER_MASK) 162 USB_ENDPOINT_NUMBER_MASK)
155 163
156static struct s3c_hsudc *the_controller;
157static const char driver_name[] = "s3c-udc"; 164static const char driver_name[] = "s3c-udc";
158static const char ep0name[] = "ep0-control"; 165static const char ep0name[] = "ep0-control";
159 166
@@ -282,8 +289,7 @@ static void s3c_hsudc_nuke_ep(struct s3c_hsudc_ep *hsep, int status)
282 * All the endpoints are stopped and any pending transfer requests if any on 289 * All the endpoints are stopped and any pending transfer requests if any on
283 * the endpoint are terminated. 290 * the endpoint are terminated.
284 */ 291 */
285static void s3c_hsudc_stop_activity(struct s3c_hsudc *hsudc, 292static void s3c_hsudc_stop_activity(struct s3c_hsudc *hsudc)
286 struct usb_gadget_driver *driver)
287{ 293{
288 struct s3c_hsudc_ep *hsep; 294 struct s3c_hsudc_ep *hsep;
289 int epnum; 295 int epnum;
@@ -295,10 +301,6 @@ static void s3c_hsudc_stop_activity(struct s3c_hsudc *hsudc,
295 hsep->stopped = 1; 301 hsep->stopped = 1;
296 s3c_hsudc_nuke_ep(hsep, -ESHUTDOWN); 302 s3c_hsudc_nuke_ep(hsep, -ESHUTDOWN);
297 } 303 }
298
299 spin_unlock(&hsudc->lock);
300 driver->disconnect(&hsudc->gadget);
301 spin_lock(&hsudc->lock);
302} 304}
303 305
304/** 306/**
@@ -1135,16 +1137,15 @@ static irqreturn_t s3c_hsudc_irq(int irq, void *_dev)
1135 return IRQ_HANDLED; 1137 return IRQ_HANDLED;
1136} 1138}
1137 1139
1138static int s3c_hsudc_start(struct usb_gadget_driver *driver, 1140static int s3c_hsudc_start(struct usb_gadget *gadget,
1139 int (*bind)(struct usb_gadget *)) 1141 struct usb_gadget_driver *driver)
1140{ 1142{
1141 struct s3c_hsudc *hsudc = the_controller; 1143 struct s3c_hsudc *hsudc = to_hsudc(gadget);
1142 int ret; 1144 int ret;
1143 1145
1144 if (!driver 1146 if (!driver
1145 || driver->speed < USB_SPEED_FULL 1147 || driver->max_speed < USB_SPEED_FULL
1146 || !bind 1148 || !driver->setup)
1147 || !driver->unbind || !driver->disconnect || !driver->setup)
1148 return -EINVAL; 1149 return -EINVAL;
1149 1150
1150 if (!hsudc) 1151 if (!hsudc)
@@ -1155,21 +1156,12 @@ static int s3c_hsudc_start(struct usb_gadget_driver *driver,
1155 1156
1156 hsudc->driver = driver; 1157 hsudc->driver = driver;
1157 hsudc->gadget.dev.driver = &driver->driver; 1158 hsudc->gadget.dev.driver = &driver->driver;
1158 hsudc->gadget.speed = USB_SPEED_UNKNOWN;
1159 ret = device_add(&hsudc->gadget.dev);
1160 if (ret) {
1161 dev_err(hsudc->dev, "failed to probe gadget device");
1162 return ret;
1163 }
1164 1159
1165 ret = bind(&hsudc->gadget); 1160 ret = regulator_bulk_enable(ARRAY_SIZE(hsudc->supplies),
1166 if (ret) { 1161 hsudc->supplies);
1167 dev_err(hsudc->dev, "%s: bind failed\n", hsudc->gadget.name); 1162 if (ret != 0) {
1168 device_del(&hsudc->gadget.dev); 1163 dev_err(hsudc->dev, "failed to enable supplies: %d\n", ret);
1169 1164 goto err_supplies;
1170 hsudc->driver = NULL;
1171 hsudc->gadget.dev.driver = NULL;
1172 return ret;
1173 } 1165 }
1174 1166
1175 /* connect to bus through transceiver */ 1167 /* connect to bus through transceiver */
@@ -1178,13 +1170,7 @@ static int s3c_hsudc_start(struct usb_gadget_driver *driver,
1178 if (ret) { 1170 if (ret) {
1179 dev_err(hsudc->dev, "%s: can't bind to transceiver\n", 1171 dev_err(hsudc->dev, "%s: can't bind to transceiver\n",
1180 hsudc->gadget.name); 1172 hsudc->gadget.name);
1181 driver->unbind(&hsudc->gadget); 1173 goto err_otg;
1182
1183 device_del(&hsudc->gadget.dev);
1184
1185 hsudc->driver = NULL;
1186 hsudc->gadget.dev.driver = NULL;
1187 return ret;
1188 } 1174 }
1189 } 1175 }
1190 1176
@@ -1197,34 +1183,43 @@ static int s3c_hsudc_start(struct usb_gadget_driver *driver,
1197 hsudc->pd->gpio_init(); 1183 hsudc->pd->gpio_init();
1198 1184
1199 return 0; 1185 return 0;
1186err_otg:
1187 regulator_bulk_disable(ARRAY_SIZE(hsudc->supplies), hsudc->supplies);
1188err_supplies:
1189 hsudc->driver = NULL;
1190 hsudc->gadget.dev.driver = NULL;
1191 return ret;
1200} 1192}
1201 1193
1202static int s3c_hsudc_stop(struct usb_gadget_driver *driver) 1194static int s3c_hsudc_stop(struct usb_gadget *gadget,
1195 struct usb_gadget_driver *driver)
1203{ 1196{
1204 struct s3c_hsudc *hsudc = the_controller; 1197 struct s3c_hsudc *hsudc = to_hsudc(gadget);
1205 unsigned long flags; 1198 unsigned long flags;
1206 1199
1207 if (!hsudc) 1200 if (!hsudc)
1208 return -ENODEV; 1201 return -ENODEV;
1209 1202
1210 if (!driver || driver != hsudc->driver || !driver->unbind) 1203 if (!driver || driver != hsudc->driver)
1211 return -EINVAL; 1204 return -EINVAL;
1212 1205
1213 spin_lock_irqsave(&hsudc->lock, flags); 1206 spin_lock_irqsave(&hsudc->lock, flags);
1214 hsudc->driver = 0; 1207 hsudc->driver = NULL;
1208 hsudc->gadget.dev.driver = NULL;
1209 hsudc->gadget.speed = USB_SPEED_UNKNOWN;
1215 s3c_hsudc_uninit_phy(); 1210 s3c_hsudc_uninit_phy();
1216 if (hsudc->pd->gpio_uninit) 1211 if (hsudc->pd->gpio_uninit)
1217 hsudc->pd->gpio_uninit(); 1212 hsudc->pd->gpio_uninit();
1218 s3c_hsudc_stop_activity(hsudc, driver); 1213 s3c_hsudc_stop_activity(hsudc);
1219 spin_unlock_irqrestore(&hsudc->lock, flags); 1214 spin_unlock_irqrestore(&hsudc->lock, flags);
1220 1215
1221 if (hsudc->transceiver) 1216 if (hsudc->transceiver)
1222 (void) otg_set_peripheral(hsudc->transceiver, NULL); 1217 (void) otg_set_peripheral(hsudc->transceiver, NULL);
1223 1218
1224 driver->unbind(&hsudc->gadget);
1225 device_del(&hsudc->gadget.dev);
1226 disable_irq(hsudc->irq); 1219 disable_irq(hsudc->irq);
1227 1220
1221 regulator_bulk_disable(ARRAY_SIZE(hsudc->supplies), hsudc->supplies);
1222
1228 dev_info(hsudc->dev, "unregistered gadget driver '%s'\n", 1223 dev_info(hsudc->dev, "unregistered gadget driver '%s'\n",
1229 driver->driver.name); 1224 driver->driver.name);
1230 return 0; 1225 return 0;
@@ -1242,7 +1237,7 @@ static int s3c_hsudc_gadget_getframe(struct usb_gadget *gadget)
1242 1237
1243static int s3c_hsudc_vbus_draw(struct usb_gadget *gadget, unsigned mA) 1238static int s3c_hsudc_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1244{ 1239{
1245 struct s3c_hsudc *hsudc = the_controller; 1240 struct s3c_hsudc *hsudc = to_hsudc(gadget);
1246 1241
1247 if (!hsudc) 1242 if (!hsudc)
1248 return -ENODEV; 1243 return -ENODEV;
@@ -1255,18 +1250,18 @@ static int s3c_hsudc_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1255 1250
1256static struct usb_gadget_ops s3c_hsudc_gadget_ops = { 1251static struct usb_gadget_ops s3c_hsudc_gadget_ops = {
1257 .get_frame = s3c_hsudc_gadget_getframe, 1252 .get_frame = s3c_hsudc_gadget_getframe,
1258 .start = s3c_hsudc_start, 1253 .udc_start = s3c_hsudc_start,
1259 .stop = s3c_hsudc_stop, 1254 .udc_stop = s3c_hsudc_stop,
1260 .vbus_draw = s3c_hsudc_vbus_draw, 1255 .vbus_draw = s3c_hsudc_vbus_draw,
1261}; 1256};
1262 1257
1263static int s3c_hsudc_probe(struct platform_device *pdev) 1258static int __devinit s3c_hsudc_probe(struct platform_device *pdev)
1264{ 1259{
1265 struct device *dev = &pdev->dev; 1260 struct device *dev = &pdev->dev;
1266 struct resource *res; 1261 struct resource *res;
1267 struct s3c_hsudc *hsudc; 1262 struct s3c_hsudc *hsudc;
1268 struct s3c24xx_hsudc_platdata *pd = pdev->dev.platform_data; 1263 struct s3c24xx_hsudc_platdata *pd = pdev->dev.platform_data;
1269 int ret; 1264 int ret, i;
1270 1265
1271 hsudc = kzalloc(sizeof(struct s3c_hsudc) + 1266 hsudc = kzalloc(sizeof(struct s3c_hsudc) +
1272 sizeof(struct s3c_hsudc_ep) * pd->epnum, 1267 sizeof(struct s3c_hsudc_ep) * pd->epnum,
@@ -1276,13 +1271,22 @@ static int s3c_hsudc_probe(struct platform_device *pdev)
1276 return -ENOMEM; 1271 return -ENOMEM;
1277 } 1272 }
1278 1273
1279 the_controller = hsudc;
1280 platform_set_drvdata(pdev, dev); 1274 platform_set_drvdata(pdev, dev);
1281 hsudc->dev = dev; 1275 hsudc->dev = dev;
1282 hsudc->pd = pdev->dev.platform_data; 1276 hsudc->pd = pdev->dev.platform_data;
1283 1277
1284 hsudc->transceiver = otg_get_transceiver(); 1278 hsudc->transceiver = otg_get_transceiver();
1285 1279
1280 for (i = 0; i < ARRAY_SIZE(hsudc->supplies); i++)
1281 hsudc->supplies[i].supply = s3c_hsudc_supply_names[i];
1282
1283 ret = regulator_bulk_get(dev, ARRAY_SIZE(hsudc->supplies),
1284 hsudc->supplies);
1285 if (ret != 0) {
1286 dev_err(dev, "failed to request supplies: %d\n", ret);
1287 goto err_supplies;
1288 }
1289
1286 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1290 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1287 if (!res) { 1291 if (!res) {
1288 dev_err(dev, "unable to obtain driver resource data\n"); 1292 dev_err(dev, "unable to obtain driver resource data\n");
@@ -1307,10 +1311,9 @@ static int s3c_hsudc_probe(struct platform_device *pdev)
1307 1311
1308 spin_lock_init(&hsudc->lock); 1312 spin_lock_init(&hsudc->lock);
1309 1313
1310 device_initialize(&hsudc->gadget.dev);
1311 dev_set_name(&hsudc->gadget.dev, "gadget"); 1314 dev_set_name(&hsudc->gadget.dev, "gadget");
1312 1315
1313 hsudc->gadget.is_dualspeed = 1; 1316 hsudc->gadget.max_speed = USB_SPEED_HIGH;
1314 hsudc->gadget.ops = &s3c_hsudc_gadget_ops; 1317 hsudc->gadget.ops = &s3c_hsudc_gadget_ops;
1315 hsudc->gadget.name = dev_name(dev); 1318 hsudc->gadget.name = dev_name(dev);
1316 hsudc->gadget.dev.parent = dev; 1319 hsudc->gadget.dev.parent = dev;
@@ -1319,6 +1322,7 @@ static int s3c_hsudc_probe(struct platform_device *pdev)
1319 1322
1320 hsudc->gadget.is_otg = 0; 1323 hsudc->gadget.is_otg = 0;
1321 hsudc->gadget.is_a_peripheral = 0; 1324 hsudc->gadget.is_a_peripheral = 0;
1325 hsudc->gadget.speed = USB_SPEED_UNKNOWN;
1322 1326
1323 s3c_hsudc_setup_ep(hsudc); 1327 s3c_hsudc_setup_ep(hsudc);
1324 1328
@@ -1348,12 +1352,20 @@ static int s3c_hsudc_probe(struct platform_device *pdev)
1348 disable_irq(hsudc->irq); 1352 disable_irq(hsudc->irq);
1349 local_irq_enable(); 1353 local_irq_enable();
1350 1354
1355 ret = device_register(&hsudc->gadget.dev);
1356 if (ret) {
1357 put_device(&hsudc->gadget.dev);
1358 goto err_add_device;
1359 }
1360
1351 ret = usb_add_gadget_udc(&pdev->dev, &hsudc->gadget); 1361 ret = usb_add_gadget_udc(&pdev->dev, &hsudc->gadget);
1352 if (ret) 1362 if (ret)
1353 goto err_add_udc; 1363 goto err_add_udc;
1354 1364
1355 return 0; 1365 return 0;
1356err_add_udc: 1366err_add_udc:
1367 device_unregister(&hsudc->gadget.dev);
1368err_add_device:
1357 clk_disable(hsudc->uclk); 1369 clk_disable(hsudc->uclk);
1358 clk_put(hsudc->uclk); 1370 clk_put(hsudc->uclk);
1359err_clk: 1371err_clk:
@@ -1362,10 +1374,13 @@ err_irq:
1362 iounmap(hsudc->regs); 1374 iounmap(hsudc->regs);
1363 1375
1364err_remap: 1376err_remap:
1365 release_resource(hsudc->mem_rsrc); 1377 release_mem_region(res->start, resource_size(res));
1366 kfree(hsudc->mem_rsrc);
1367
1368err_res: 1378err_res:
1379 if (hsudc->transceiver)
1380 otg_put_transceiver(hsudc->transceiver);
1381
1382 regulator_bulk_free(ARRAY_SIZE(hsudc->supplies), hsudc->supplies);
1383err_supplies:
1369 kfree(hsudc); 1384 kfree(hsudc);
1370 return ret; 1385 return ret;
1371} 1386}
@@ -1377,21 +1392,10 @@ static struct platform_driver s3c_hsudc_driver = {
1377 }, 1392 },
1378 .probe = s3c_hsudc_probe, 1393 .probe = s3c_hsudc_probe,
1379}; 1394};
1380MODULE_ALIAS("platform:s3c-hsudc");
1381
1382static int __init s3c_hsudc_modinit(void)
1383{
1384 return platform_driver_register(&s3c_hsudc_driver);
1385}
1386 1395
1387static void __exit s3c_hsudc_modexit(void) 1396module_platform_driver(s3c_hsudc_driver);
1388{
1389 platform_driver_unregister(&s3c_hsudc_driver);
1390}
1391
1392module_init(s3c_hsudc_modinit);
1393module_exit(s3c_hsudc_modexit);
1394 1397
1395MODULE_DESCRIPTION("Samsung S3C24XX USB high-speed controller driver"); 1398MODULE_DESCRIPTION("Samsung S3C24XX USB high-speed controller driver");
1396MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); 1399MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
1397MODULE_LICENSE("GPL"); 1400MODULE_LICENSE("GPL");
1401MODULE_ALIAS("platform:s3c-hsudc");
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c
index fac4c650d4bb..3f87cb9344bb 100644
--- a/drivers/usb/gadget/s3c2410_udc.c
+++ b/drivers/usb/gadget/s3c2410_udc.c
@@ -1683,9 +1683,9 @@ static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1683 if (udc->driver) 1683 if (udc->driver)
1684 return -EBUSY; 1684 return -EBUSY;
1685 1685
1686 if (!bind || !driver->setup || driver->speed < USB_SPEED_FULL) { 1686 if (!bind || !driver->setup || driver->max_speed < USB_SPEED_FULL) {
1687 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n", 1687 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1688 bind, driver->setup, driver->speed); 1688 bind, driver->setup, driver->max_speed);
1689 return -EINVAL; 1689 return -EINVAL;
1690 } 1690 }
1691#if defined(MODULE) 1691#if defined(MODULE)
diff --git a/drivers/usb/gadget/udc-core.c b/drivers/usb/gadget/udc-core.c
index 6939e17f4580..0b0d12ccc487 100644
--- a/drivers/usb/gadget/udc-core.c
+++ b/drivers/usb/gadget/udc-core.c
@@ -371,14 +371,28 @@ static ssize_t usb_udc_softconn_store(struct device *dev,
371} 371}
372static DEVICE_ATTR(soft_connect, S_IWUSR, NULL, usb_udc_softconn_store); 372static DEVICE_ATTR(soft_connect, S_IWUSR, NULL, usb_udc_softconn_store);
373 373
374static ssize_t usb_udc_speed_show(struct device *dev, 374#define USB_UDC_SPEED_ATTR(name, param) \
375ssize_t usb_udc_##param##_show(struct device *dev, \
376 struct device_attribute *attr, char *buf) \
377{ \
378 struct usb_udc *udc = container_of(dev, struct usb_udc, dev); \
379 return snprintf(buf, PAGE_SIZE, "%s\n", \
380 usb_speed_string(udc->gadget->param)); \
381} \
382static DEVICE_ATTR(name, S_IRUSR, usb_udc_##param##_show, NULL)
383
384static USB_UDC_SPEED_ATTR(current_speed, speed);
385static USB_UDC_SPEED_ATTR(maximum_speed, max_speed);
386
387/* TODO: Scheduled for removal in 3.8. */
388static ssize_t usb_udc_is_dualspeed_show(struct device *dev,
375 struct device_attribute *attr, char *buf) 389 struct device_attribute *attr, char *buf)
376{ 390{
377 struct usb_udc *udc = container_of(dev, struct usb_udc, dev); 391 struct usb_udc *udc = container_of(dev, struct usb_udc, dev);
378 return snprintf(buf, PAGE_SIZE, "%s\n", 392 return snprintf(buf, PAGE_SIZE, "%d\n",
379 usb_speed_string(udc->gadget->speed)); 393 gadget_is_dualspeed(udc->gadget));
380} 394}
381static DEVICE_ATTR(speed, S_IRUGO, usb_udc_speed_show, NULL); 395static DEVICE_ATTR(is_dualspeed, S_IRUSR, usb_udc_is_dualspeed_show, NULL);
382 396
383#define USB_UDC_ATTR(name) \ 397#define USB_UDC_ATTR(name) \
384ssize_t usb_udc_##name##_show(struct device *dev, \ 398ssize_t usb_udc_##name##_show(struct device *dev, \
@@ -391,7 +405,6 @@ ssize_t usb_udc_##name##_show(struct device *dev, \
391} \ 405} \
392static DEVICE_ATTR(name, S_IRUGO, usb_udc_##name##_show, NULL) 406static DEVICE_ATTR(name, S_IRUGO, usb_udc_##name##_show, NULL)
393 407
394static USB_UDC_ATTR(is_dualspeed);
395static USB_UDC_ATTR(is_otg); 408static USB_UDC_ATTR(is_otg);
396static USB_UDC_ATTR(is_a_peripheral); 409static USB_UDC_ATTR(is_a_peripheral);
397static USB_UDC_ATTR(b_hnp_enable); 410static USB_UDC_ATTR(b_hnp_enable);
@@ -401,7 +414,8 @@ static USB_UDC_ATTR(a_alt_hnp_support);
401static struct attribute *usb_udc_attrs[] = { 414static struct attribute *usb_udc_attrs[] = {
402 &dev_attr_srp.attr, 415 &dev_attr_srp.attr,
403 &dev_attr_soft_connect.attr, 416 &dev_attr_soft_connect.attr,
404 &dev_attr_speed.attr, 417 &dev_attr_current_speed.attr,
418 &dev_attr_maximum_speed.attr,
405 419
406 &dev_attr_is_dualspeed.attr, 420 &dev_attr_is_dualspeed.attr,
407 &dev_attr_is_otg.attr, 421 &dev_attr_is_otg.attr,
diff --git a/drivers/usb/gadget/usbstring.c b/drivers/usb/gadget/usbstring.c
index 58c4d37d312a..4d25b9009edf 100644
--- a/drivers/usb/gadget/usbstring.c
+++ b/drivers/usb/gadget/usbstring.c
@@ -13,82 +13,17 @@
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/nls.h>
16 17
17#include <linux/usb/ch9.h> 18#include <linux/usb/ch9.h>
18#include <linux/usb/gadget.h> 19#include <linux/usb/gadget.h>
19 20
20#include <asm/unaligned.h>
21
22
23static int utf8_to_utf16le(const char *s, __le16 *cp, unsigned len)
24{
25 int count = 0;
26 u8 c;
27 u16 uchar;
28
29 /* this insists on correct encodings, though not minimal ones.
30 * BUT it currently rejects legit 4-byte UTF-8 code points,
31 * which need surrogate pairs. (Unicode 3.1 can use them.)
32 */
33 while (len != 0 && (c = (u8) *s++) != 0) {
34 if (unlikely(c & 0x80)) {
35 // 2-byte sequence:
36 // 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx
37 if ((c & 0xe0) == 0xc0) {
38 uchar = (c & 0x1f) << 6;
39
40 c = (u8) *s++;
41 if ((c & 0xc0) != 0x80)
42 goto fail;
43 c &= 0x3f;
44 uchar |= c;
45
46 // 3-byte sequence (most CJKV characters):
47 // zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx
48 } else if ((c & 0xf0) == 0xe0) {
49 uchar = (c & 0x0f) << 12;
50
51 c = (u8) *s++;
52 if ((c & 0xc0) != 0x80)
53 goto fail;
54 c &= 0x3f;
55 uchar |= c << 6;
56
57 c = (u8) *s++;
58 if ((c & 0xc0) != 0x80)
59 goto fail;
60 c &= 0x3f;
61 uchar |= c;
62
63 /* no bogus surrogates */
64 if (0xd800 <= uchar && uchar <= 0xdfff)
65 goto fail;
66
67 // 4-byte sequence (surrogate pairs, currently rare):
68 // 11101110wwwwzzzzyy + 110111yyyyxxxxxx
69 // = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx
70 // (uuuuu = wwww + 1)
71 // FIXME accept the surrogate code points (only)
72
73 } else
74 goto fail;
75 } else
76 uchar = c;
77 put_unaligned_le16(uchar, cp++);
78 count++;
79 len--;
80 }
81 return count;
82fail:
83 return -1;
84}
85
86 21
87/** 22/**
88 * usb_gadget_get_string - fill out a string descriptor 23 * usb_gadget_get_string - fill out a string descriptor
89 * @table: of c strings encoded using UTF-8 24 * @table: of c strings encoded using UTF-8
90 * @id: string id, from low byte of wValue in get string descriptor 25 * @id: string id, from low byte of wValue in get string descriptor
91 * @buf: at least 256 bytes 26 * @buf: at least 256 bytes, must be 16-bit aligned
92 * 27 *
93 * Finds the UTF-8 string matching the ID, and converts it into a 28 * Finds the UTF-8 string matching the ID, and converts it into a
94 * string descriptor in utf16-le. 29 * string descriptor in utf16-le.
@@ -125,8 +60,8 @@ usb_gadget_get_string (struct usb_gadget_strings *table, int id, u8 *buf)
125 60
126 /* string descriptors have length, tag, then UTF16-LE text */ 61 /* string descriptors have length, tag, then UTF16-LE text */
127 len = min ((size_t) 126, strlen (s->s)); 62 len = min ((size_t) 126, strlen (s->s));
128 memset (buf + 2, 0, 2 * len); /* zero all the bytes */ 63 len = utf8s_to_utf16s(s->s, len, UTF16_LITTLE_ENDIAN,
129 len = utf8_to_utf16le(s->s, (__le16 *)&buf[2], len); 64 (wchar_t *) &buf[2], 126);
130 if (len < 0) 65 if (len < 0)
131 return -EINVAL; 66 return -EINVAL;
132 buf [0] = (len + 1) * 2; 67 buf [0] = (len + 1) * 2;
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 060e0e2b1ae6..4c0c9734251d 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -194,6 +194,15 @@ config USB_EHCI_S5P
194 help 194 help
195 Enable support for the S5P SOC's on-chip EHCI controller. 195 Enable support for the S5P SOC's on-chip EHCI controller.
196 196
197config USB_EHCI_MV
198 bool "EHCI support for Marvell on-chip controller"
199 depends on USB_EHCI_HCD
200 select USB_EHCI_ROOT_HUB_TT
201 ---help---
202 Enables support for Marvell (including PXA and MMP series) on-chip
203 USB SPH and OTG controller. SPH is a single port host, and it can
204 only be EHCI host. OTG is controller that can switch to host mode.
205
197config USB_W90X900_EHCI 206config USB_W90X900_EHCI
198 bool "W90X900(W90P910) EHCI support" 207 bool "W90X900(W90P910) EHCI support"
199 depends on USB_EHCI_HCD && ARCH_W90X900 208 depends on USB_EHCI_HCD && ARCH_W90X900
@@ -371,6 +380,12 @@ config USB_OHCI_SH
371 Enables support for the on-chip OHCI controller on the SuperH. 380 Enables support for the on-chip OHCI controller on the SuperH.
372 If you use the PCI OHCI controller, this option is not necessary. 381 If you use the PCI OHCI controller, this option is not necessary.
373 382
383config USB_OHCI_EXYNOS
384 boolean "OHCI support for Samsung EXYNOS SoC Series"
385 depends on USB_OHCI_HCD && ARCH_EXYNOS
386 help
387 Enable support for the Samsung Exynos SOC's on-chip OHCI controller.
388
374config USB_CNS3XXX_OHCI 389config USB_CNS3XXX_OHCI
375 bool "Cavium CNS3XXX OHCI Module" 390 bool "Cavium CNS3XXX OHCI Module"
376 depends on USB_OHCI_HCD && ARCH_CNS3XXX 391 depends on USB_OHCI_HCD && ARCH_CNS3XXX
diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c
index 18bafa99fe57..bf7441afed16 100644
--- a/drivers/usb/host/ehci-au1xxx.c
+++ b/drivers/usb/host/ehci-au1xxx.c
@@ -23,6 +23,7 @@ static int au1xxx_ehci_setup(struct usb_hcd *hcd)
23 int ret = ehci_init(hcd); 23 int ret = ehci_init(hcd);
24 24
25 ehci->need_io_watchdog = 0; 25 ehci->need_io_watchdog = 0;
26 ehci_reset(ehci);
26 return ret; 27 return ret;
27} 28}
28 29
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 3ff9f82f7263..e311a511529b 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -48,6 +48,10 @@
48#include <asm/system.h> 48#include <asm/system.h>
49#include <asm/unaligned.h> 49#include <asm/unaligned.h>
50 50
51#if defined(CONFIG_PPC_PS3)
52#include <asm/firmware.h>
53#endif
54
51/*-------------------------------------------------------------------------*/ 55/*-------------------------------------------------------------------------*/
52 56
53/* 57/*
@@ -230,12 +234,58 @@ static int ehci_halt (struct ehci_hcd *ehci)
230 STS_HALT, STS_HALT, 16 * 125); 234 STS_HALT, STS_HALT, 16 * 125);
231} 235}
232 236
237#if defined(CONFIG_USB_SUSPEND) && defined(CONFIG_PPC_PS3)
238
239/*
240 * The EHCI controller of the Cell Super Companion Chip used in the
241 * PS3 will stop the root hub after all root hub ports are suspended.
242 * When in this condition handshake will return -ETIMEDOUT. The
243 * STS_HLT bit will not be set, so inspection of the frame index is
244 * used here to test for the condition. If the condition is found
245 * return success to allow the USB suspend to complete.
246 */
247
248static int handshake_for_broken_root_hub(struct ehci_hcd *ehci,
249 void __iomem *ptr, u32 mask, u32 done,
250 int usec)
251{
252 unsigned int old_index;
253 int error;
254
255 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
256 return -ETIMEDOUT;
257
258 old_index = ehci_read_frame_index(ehci);
259
260 error = handshake(ehci, ptr, mask, done, usec);
261
262 if (error == -ETIMEDOUT && ehci_read_frame_index(ehci) == old_index)
263 return 0;
264
265 return error;
266}
267
268#else
269
270static int handshake_for_broken_root_hub(struct ehci_hcd *ehci,
271 void __iomem *ptr, u32 mask, u32 done,
272 int usec)
273{
274 return -ETIMEDOUT;
275}
276
277#endif
278
233static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr, 279static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
234 u32 mask, u32 done, int usec) 280 u32 mask, u32 done, int usec)
235{ 281{
236 int error; 282 int error;
237 283
238 error = handshake(ehci, ptr, mask, done, usec); 284 error = handshake(ehci, ptr, mask, done, usec);
285 if (error == -ETIMEDOUT)
286 error = handshake_for_broken_root_hub(ehci, ptr, mask, done,
287 usec);
288
239 if (error) { 289 if (error) {
240 ehci_halt(ehci); 290 ehci_halt(ehci);
241 ehci->rh_state = EHCI_RH_HALTED; 291 ehci->rh_state = EHCI_RH_HALTED;
@@ -620,6 +670,7 @@ static int ehci_init(struct usb_hcd *hcd)
620 hw = ehci->async->hw; 670 hw = ehci->async->hw;
621 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); 671 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
622 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); 672 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
673 hw->hw_info1 |= cpu_to_hc32(ehci, (1 << 7)); /* I = 1 */
623 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); 674 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
624 hw->hw_qtd_next = EHCI_LIST_END(ehci); 675 hw->hw_qtd_next = EHCI_LIST_END(ehci);
625 ehci->async->qh_state = QH_STATE_LINKED; 676 ehci->async->qh_state = QH_STATE_LINKED;
@@ -677,22 +728,13 @@ static int ehci_init(struct usb_hcd *hcd)
677static int ehci_run (struct usb_hcd *hcd) 728static int ehci_run (struct usb_hcd *hcd)
678{ 729{
679 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 730 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
680 int retval;
681 u32 temp; 731 u32 temp;
682 u32 hcc_params; 732 u32 hcc_params;
683 733
684 hcd->uses_new_polling = 1; 734 hcd->uses_new_polling = 1;
685 735
686 /* EHCI spec section 4.1 */ 736 /* EHCI spec section 4.1 */
687 /* 737
688 * TDI driver does the ehci_reset in their reset callback.
689 * Don't reset here, because configuration settings will
690 * vanish.
691 */
692 if (!ehci_is_TDI(ehci) && (retval = ehci_reset(ehci)) != 0) {
693 ehci_mem_cleanup(ehci);
694 return retval;
695 }
696 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); 738 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
697 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); 739 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
698 740
@@ -1324,11 +1366,16 @@ MODULE_LICENSE ("GPL");
1324#define PLATFORM_DRIVER ehci_pxa168_driver 1366#define PLATFORM_DRIVER ehci_pxa168_driver
1325#endif 1367#endif
1326 1368
1327#ifdef CONFIG_NLM_XLR 1369#ifdef CONFIG_CPU_XLR
1328#include "ehci-xls.c" 1370#include "ehci-xls.c"
1329#define PLATFORM_DRIVER ehci_xls_driver 1371#define PLATFORM_DRIVER ehci_xls_driver
1330#endif 1372#endif
1331 1373
1374#ifdef CONFIG_USB_EHCI_MV
1375#include "ehci-mv.c"
1376#define PLATFORM_DRIVER ehci_mv_driver
1377#endif
1378
1332#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ 1379#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1333 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \ 1380 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1334 !defined(XILINX_OF_PLATFORM_DRIVER) 1381 !defined(XILINX_OF_PLATFORM_DRIVER)
diff --git a/drivers/usb/host/ehci-mv.c b/drivers/usb/host/ehci-mv.c
new file mode 100644
index 000000000000..52a604fb9321
--- /dev/null
+++ b/drivers/usb/host/ehci-mv.c
@@ -0,0 +1,391 @@
1/*
2 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
3 * Author: Chao Xie <chao.xie@marvell.com>
4 * Neil Zhang <zhangwm@marvell.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/clk.h>
16#include <linux/usb/otg.h>
17#include <linux/platform_data/mv_usb.h>
18
19#define CAPLENGTH_MASK (0xff)
20
21struct ehci_hcd_mv {
22 struct usb_hcd *hcd;
23
24 /* Which mode does this ehci running OTG/Host ? */
25 int mode;
26
27 void __iomem *phy_regs;
28 void __iomem *cap_regs;
29 void __iomem *op_regs;
30
31 struct otg_transceiver *otg;
32
33 struct mv_usb_platform_data *pdata;
34
35 /* clock source and total clock number */
36 unsigned int clknum;
37 struct clk *clk[0];
38};
39
40static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
41{
42 unsigned int i;
43
44 for (i = 0; i < ehci_mv->clknum; i++)
45 clk_enable(ehci_mv->clk[i]);
46}
47
48static void ehci_clock_disable(struct ehci_hcd_mv *ehci_mv)
49{
50 unsigned int i;
51
52 for (i = 0; i < ehci_mv->clknum; i++)
53 clk_disable(ehci_mv->clk[i]);
54}
55
56static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
57{
58 int retval;
59
60 ehci_clock_enable(ehci_mv);
61 if (ehci_mv->pdata->phy_init) {
62 retval = ehci_mv->pdata->phy_init(ehci_mv->phy_regs);
63 if (retval)
64 return retval;
65 }
66
67 return 0;
68}
69
70static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
71{
72 if (ehci_mv->pdata->phy_deinit)
73 ehci_mv->pdata->phy_deinit(ehci_mv->phy_regs);
74 ehci_clock_disable(ehci_mv);
75}
76
77static int mv_ehci_reset(struct usb_hcd *hcd)
78{
79 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
80 struct device *dev = hcd->self.controller;
81 struct ehci_hcd_mv *ehci_mv = dev_get_drvdata(dev);
82 int retval;
83
84 if (ehci_mv == NULL) {
85 dev_err(dev, "Can not find private ehci data\n");
86 return -ENODEV;
87 }
88
89 /*
90 * data structure init
91 */
92 retval = ehci_init(hcd);
93 if (retval) {
94 dev_err(dev, "ehci_init failed %d\n", retval);
95 return retval;
96 }
97
98 hcd->has_tt = 1;
99 ehci->sbrn = 0x20;
100
101 retval = ehci_reset(ehci);
102 if (retval) {
103 dev_err(dev, "ehci_reset failed %d\n", retval);
104 return retval;
105 }
106
107 return 0;
108}
109
110static const struct hc_driver mv_ehci_hc_driver = {
111 .description = hcd_name,
112 .product_desc = "Marvell EHCI",
113 .hcd_priv_size = sizeof(struct ehci_hcd),
114
115 /*
116 * generic hardware linkage
117 */
118 .irq = ehci_irq,
119 .flags = HCD_MEMORY | HCD_USB2,
120
121 /*
122 * basic lifecycle operations
123 */
124 .reset = mv_ehci_reset,
125 .start = ehci_run,
126 .stop = ehci_stop,
127 .shutdown = ehci_shutdown,
128
129 /*
130 * managing i/o requests and associated device resources
131 */
132 .urb_enqueue = ehci_urb_enqueue,
133 .urb_dequeue = ehci_urb_dequeue,
134 .endpoint_disable = ehci_endpoint_disable,
135 .endpoint_reset = ehci_endpoint_reset,
136 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
137
138 /*
139 * scheduling support
140 */
141 .get_frame_number = ehci_get_frame,
142
143 /*
144 * root hub support
145 */
146 .hub_status_data = ehci_hub_status_data,
147 .hub_control = ehci_hub_control,
148 .bus_suspend = ehci_bus_suspend,
149 .bus_resume = ehci_bus_resume,
150};
151
152static int mv_ehci_probe(struct platform_device *pdev)
153{
154 struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
155 struct usb_hcd *hcd;
156 struct ehci_hcd *ehci;
157 struct ehci_hcd_mv *ehci_mv;
158 struct resource *r;
159 int clk_i, retval = -ENODEV;
160 u32 offset;
161 size_t size;
162
163 if (!pdata) {
164 dev_err(&pdev->dev, "missing platform_data\n");
165 return -ENODEV;
166 }
167
168 if (usb_disabled())
169 return -ENODEV;
170
171 hcd = usb_create_hcd(&mv_ehci_hc_driver, &pdev->dev, "mv ehci");
172 if (!hcd)
173 return -ENOMEM;
174
175 size = sizeof(*ehci_mv) + sizeof(struct clk *) * pdata->clknum;
176 ehci_mv = kzalloc(size, GFP_KERNEL);
177 if (ehci_mv == NULL) {
178 dev_err(&pdev->dev, "cannot allocate ehci_hcd_mv\n");
179 retval = -ENOMEM;
180 goto err_put_hcd;
181 }
182
183 platform_set_drvdata(pdev, ehci_mv);
184 ehci_mv->pdata = pdata;
185 ehci_mv->hcd = hcd;
186
187 ehci_mv->clknum = pdata->clknum;
188 for (clk_i = 0; clk_i < ehci_mv->clknum; clk_i++) {
189 ehci_mv->clk[clk_i] =
190 clk_get(&pdev->dev, pdata->clkname[clk_i]);
191 if (IS_ERR(ehci_mv->clk[clk_i])) {
192 dev_err(&pdev->dev, "error get clck \"%s\"\n",
193 pdata->clkname[clk_i]);
194 retval = PTR_ERR(ehci_mv->clk[clk_i]);
195 goto err_put_clk;
196 }
197 }
198
199 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phyregs");
200 if (r == NULL) {
201 dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
202 retval = -ENODEV;
203 goto err_put_clk;
204 }
205
206 ehci_mv->phy_regs = ioremap(r->start, resource_size(r));
207 if (ehci_mv->phy_regs == 0) {
208 dev_err(&pdev->dev, "failed to map phy I/O memory\n");
209 retval = -EFAULT;
210 goto err_put_clk;
211 }
212
213 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "capregs");
214 if (!r) {
215 dev_err(&pdev->dev, "no I/O memory resource defined\n");
216 retval = -ENODEV;
217 goto err_iounmap_phyreg;
218 }
219
220 ehci_mv->cap_regs = ioremap(r->start, resource_size(r));
221 if (ehci_mv->cap_regs == NULL) {
222 dev_err(&pdev->dev, "failed to map I/O memory\n");
223 retval = -EFAULT;
224 goto err_iounmap_phyreg;
225 }
226
227 retval = mv_ehci_enable(ehci_mv);
228 if (retval) {
229 dev_err(&pdev->dev, "init phy error %d\n", retval);
230 goto err_iounmap_capreg;
231 }
232
233 offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
234 ehci_mv->op_regs =
235 (void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
236
237 hcd->rsrc_start = r->start;
238 hcd->rsrc_len = r->end - r->start + 1;
239 hcd->regs = ehci_mv->op_regs;
240
241 hcd->irq = platform_get_irq(pdev, 0);
242 if (!hcd->irq) {
243 dev_err(&pdev->dev, "Cannot get irq.");
244 retval = -ENODEV;
245 goto err_disable_clk;
246 }
247
248 ehci = hcd_to_ehci(hcd);
249 ehci->caps = (struct ehci_caps *) ehci_mv->cap_regs;
250 ehci->regs = (struct ehci_regs *) ehci_mv->op_regs;
251 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
252
253 ehci_mv->mode = pdata->mode;
254 if (ehci_mv->mode == MV_USB_MODE_OTG) {
255#ifdef CONFIG_USB_OTG_UTILS
256 ehci_mv->otg = otg_get_transceiver();
257 if (!ehci_mv->otg) {
258 dev_err(&pdev->dev,
259 "unable to find transceiver\n");
260 retval = -ENODEV;
261 goto err_disable_clk;
262 }
263
264 retval = otg_set_host(ehci_mv->otg, &hcd->self);
265 if (retval < 0) {
266 dev_err(&pdev->dev,
267 "unable to register with transceiver\n");
268 retval = -ENODEV;
269 goto err_put_transceiver;
270 }
271 /* otg will enable clock before use as host */
272 mv_ehci_disable(ehci_mv);
273#else
274 dev_info(&pdev->dev, "MV_USB_MODE_OTG "
275 "must have CONFIG_USB_OTG_UTILS enabled\n");
276 goto err_disable_clk;
277#endif
278 } else {
279 if (pdata->set_vbus)
280 pdata->set_vbus(1);
281
282 retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
283 if (retval) {
284 dev_err(&pdev->dev,
285 "failed to add hcd with err %d\n", retval);
286 goto err_set_vbus;
287 }
288 }
289
290 if (pdata->private_init)
291 pdata->private_init(ehci_mv->op_regs, ehci_mv->phy_regs);
292
293 dev_info(&pdev->dev,
294 "successful find EHCI device with regs 0x%p irq %d"
295 " working in %s mode\n", hcd->regs, hcd->irq,
296 ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
297
298 return 0;
299
300err_set_vbus:
301 if (pdata->set_vbus)
302 pdata->set_vbus(0);
303#ifdef CONFIG_USB_OTG_UTILS
304err_put_transceiver:
305 if (ehci_mv->otg)
306 otg_put_transceiver(ehci_mv->otg);
307#endif
308err_disable_clk:
309 mv_ehci_disable(ehci_mv);
310err_iounmap_capreg:
311 iounmap(ehci_mv->cap_regs);
312err_iounmap_phyreg:
313 iounmap(ehci_mv->phy_regs);
314err_put_clk:
315 for (clk_i--; clk_i >= 0; clk_i--)
316 clk_put(ehci_mv->clk[clk_i]);
317 platform_set_drvdata(pdev, NULL);
318 kfree(ehci_mv);
319err_put_hcd:
320 usb_put_hcd(hcd);
321
322 return retval;
323}
324
325static int mv_ehci_remove(struct platform_device *pdev)
326{
327 struct ehci_hcd_mv *ehci_mv = platform_get_drvdata(pdev);
328 struct usb_hcd *hcd = ehci_mv->hcd;
329 int clk_i;
330
331 if (hcd->rh_registered)
332 usb_remove_hcd(hcd);
333
334 if (ehci_mv->otg) {
335 otg_set_host(ehci_mv->otg, NULL);
336 otg_put_transceiver(ehci_mv->otg);
337 }
338
339 if (ehci_mv->mode == MV_USB_MODE_HOST) {
340 if (ehci_mv->pdata->set_vbus)
341 ehci_mv->pdata->set_vbus(0);
342
343 mv_ehci_disable(ehci_mv);
344 }
345
346 iounmap(ehci_mv->cap_regs);
347 iounmap(ehci_mv->phy_regs);
348
349 for (clk_i = 0; clk_i < ehci_mv->clknum; clk_i++)
350 clk_put(ehci_mv->clk[clk_i]);
351
352 platform_set_drvdata(pdev, NULL);
353
354 kfree(ehci_mv);
355 usb_put_hcd(hcd);
356
357 return 0;
358}
359
360MODULE_ALIAS("mv-ehci");
361
362static const struct platform_device_id ehci_id_table[] = {
363 {"pxa-u2oehci", PXA_U2OEHCI},
364 {"pxa-sph", PXA_SPH},
365 {"mmp3-hsic", MMP3_HSIC},
366 {"mmp3-fsic", MMP3_FSIC},
367 {},
368};
369
370static void mv_ehci_shutdown(struct platform_device *pdev)
371{
372 struct ehci_hcd_mv *ehci_mv = platform_get_drvdata(pdev);
373 struct usb_hcd *hcd = ehci_mv->hcd;
374
375 if (!hcd->rh_registered)
376 return;
377
378 if (hcd->driver->shutdown)
379 hcd->driver->shutdown(hcd);
380}
381
382static struct platform_driver ehci_mv_driver = {
383 .probe = mv_ehci_probe,
384 .remove = mv_ehci_remove,
385 .shutdown = mv_ehci_shutdown,
386 .driver = {
387 .name = "mv-ehci",
388 .bus = &platform_bus_type,
389 },
390 .id_table = ehci_id_table,
391};
diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c
index ba1f51361134..c0104882c72d 100644
--- a/drivers/usb/host/ehci-octeon.c
+++ b/drivers/usb/host/ehci-octeon.c
@@ -155,6 +155,8 @@ static int ehci_octeon_drv_probe(struct platform_device *pdev)
155 /* cache this readonly data; minimize chip reads */ 155 /* cache this readonly data; minimize chip reads */
156 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 156 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
157 157
158 ehci_reset(ehci);
159
158 ret = usb_add_hcd(hcd, irq, IRQF_SHARED); 160 ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
159 if (ret) { 161 if (ret) {
160 dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret); 162 dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index e39b0297bad1..bba9850f32f0 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -41,6 +41,7 @@
41#include <linux/usb/ulpi.h> 41#include <linux/usb/ulpi.h>
42#include <plat/usb.h> 42#include <plat/usb.h>
43#include <linux/regulator/consumer.h> 43#include <linux/regulator/consumer.h>
44#include <linux/pm_runtime.h>
44 45
45/* EHCI Register Set */ 46/* EHCI Register Set */
46#define EHCI_INSNREG04 (0xA0) 47#define EHCI_INSNREG04 (0xA0)
@@ -190,11 +191,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
190 } 191 }
191 } 192 }
192 193
193 ret = omap_usbhs_enable(dev); 194 pm_runtime_enable(dev);
194 if (ret) { 195 pm_runtime_get_sync(dev);
195 dev_err(dev, "failed to start usbhs with err %d\n", ret);
196 goto err_enable;
197 }
198 196
199 /* 197 /*
200 * An undocumented "feature" in the OMAP3 EHCI controller, 198 * An undocumented "feature" in the OMAP3 EHCI controller,
@@ -228,6 +226,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
228 /* cache this readonly data; minimize chip reads */ 226 /* cache this readonly data; minimize chip reads */
229 omap_ehci->hcs_params = readl(&omap_ehci->caps->hcs_params); 227 omap_ehci->hcs_params = readl(&omap_ehci->caps->hcs_params);
230 228
229 ehci_reset(omap_ehci);
230
231 ret = usb_add_hcd(hcd, irq, IRQF_SHARED); 231 ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
232 if (ret) { 232 if (ret) {
233 dev_err(dev, "failed to add hcd with err %d\n", ret); 233 dev_err(dev, "failed to add hcd with err %d\n", ret);
@@ -240,11 +240,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
240 return 0; 240 return 0;
241 241
242err_add_hcd: 242err_add_hcd:
243 omap_usbhs_disable(dev);
244
245err_enable:
246 disable_put_regulator(pdata); 243 disable_put_regulator(pdata);
247 usb_put_hcd(hcd); 244 pm_runtime_put_sync(dev);
248 245
249err_io: 246err_io:
250 iounmap(regs); 247 iounmap(regs);
@@ -266,10 +263,12 @@ static int ehci_hcd_omap_remove(struct platform_device *pdev)
266 struct usb_hcd *hcd = dev_get_drvdata(dev); 263 struct usb_hcd *hcd = dev_get_drvdata(dev);
267 264
268 usb_remove_hcd(hcd); 265 usb_remove_hcd(hcd);
269 omap_usbhs_disable(dev);
270 disable_put_regulator(dev->platform_data); 266 disable_put_regulator(dev->platform_data);
271 iounmap(hcd->regs); 267 iounmap(hcd->regs);
272 usb_put_hcd(hcd); 268 usb_put_hcd(hcd);
269 pm_runtime_put_sync(dev);
270 pm_runtime_disable(dev);
271
273 return 0; 272 return 0;
274} 273}
275 274
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index a68a2a5c4b83..6c6a5a3b4ea7 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -172,7 +172,7 @@ static const struct hc_driver ehci_orion_hc_driver = {
172 172
173static void __init 173static void __init
174ehci_orion_conf_mbus_windows(struct usb_hcd *hcd, 174ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
175 struct mbus_dram_target_info *dram) 175 const struct mbus_dram_target_info *dram)
176{ 176{
177 int i; 177 int i;
178 178
@@ -182,7 +182,7 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
182 } 182 }
183 183
184 for (i = 0; i < dram->num_cs; i++) { 184 for (i = 0; i < dram->num_cs; i++) {
185 struct mbus_dram_window *cs = dram->cs + i; 185 const struct mbus_dram_window *cs = dram->cs + i;
186 186
187 wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) | 187 wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
188 (cs->mbus_attr << 8) | 188 (cs->mbus_attr << 8) |
@@ -194,6 +194,7 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
194static int __devinit ehci_orion_drv_probe(struct platform_device *pdev) 194static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
195{ 195{
196 struct orion_ehci_data *pd = pdev->dev.platform_data; 196 struct orion_ehci_data *pd = pdev->dev.platform_data;
197 const struct mbus_dram_target_info *dram;
197 struct resource *res; 198 struct resource *res;
198 struct usb_hcd *hcd; 199 struct usb_hcd *hcd;
199 struct ehci_hcd *ehci; 200 struct ehci_hcd *ehci;
@@ -259,8 +260,9 @@ static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
259 /* 260 /*
260 * (Re-)program MBUS remapping windows if we are asked to. 261 * (Re-)program MBUS remapping windows if we are asked to.
261 */ 262 */
262 if (pd != NULL && pd->dram != NULL) 263 dram = mv_mbus_dram_info();
263 ehci_orion_conf_mbus_windows(hcd, pd->dram); 264 if (dram)
265 ehci_orion_conf_mbus_windows(hcd, dram);
264 266
265 /* 267 /*
266 * setup Orion USB controller. 268 * setup Orion USB controller.
diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c
index 2dc32da75cfc..a20e496eb479 100644
--- a/drivers/usb/host/ehci-ps3.c
+++ b/drivers/usb/host/ehci-ps3.c
@@ -21,6 +21,34 @@
21#include <asm/firmware.h> 21#include <asm/firmware.h>
22#include <asm/ps3.h> 22#include <asm/ps3.h>
23 23
24static void ps3_ehci_setup_insnreg(struct ehci_hcd *ehci)
25{
26 /* PS3 HC internal setup register offsets. */
27
28 enum ps3_ehci_hc_insnreg {
29 ps3_ehci_hc_insnreg01 = 0x084,
30 ps3_ehci_hc_insnreg02 = 0x088,
31 ps3_ehci_hc_insnreg03 = 0x08c,
32 };
33
34 /* PS3 EHCI HC errata fix 316 - The PS3 EHCI HC will reset its
35 * internal INSNREGXX setup regs back to the chip default values
36 * on Host Controller Reset (CMD_RESET) or Light Host Controller
37 * Reset (CMD_LRESET). The work-around for this is for the HC
38 * driver to re-initialise these regs when ever the HC is reset.
39 */
40
41 /* Set burst transfer counts to 256 out, 32 in. */
42
43 writel_be(0x01000020, (void __iomem *)ehci->regs +
44 ps3_ehci_hc_insnreg01);
45
46 /* Enable burst transfer counts. */
47
48 writel_be(0x00000001, (void __iomem *)ehci->regs +
49 ps3_ehci_hc_insnreg03);
50}
51
24static int ps3_ehci_hc_reset(struct usb_hcd *hcd) 52static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
25{ 53{
26 int result; 54 int result;
@@ -49,6 +77,8 @@ static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
49 77
50 ehci_reset(ehci); 78 ehci_reset(ehci);
51 79
80 ps3_ehci_setup_insnreg(ehci);
81
52 return result; 82 return result;
53} 83}
54 84
diff --git a/drivers/usb/host/ehci-pxa168.c b/drivers/usb/host/ehci-pxa168.c
index ac0c16e8f539..8d0e7a22e711 100644
--- a/drivers/usb/host/ehci-pxa168.c
+++ b/drivers/usb/host/ehci-pxa168.c
@@ -299,7 +299,7 @@ static int __devinit ehci_pxa168_drv_probe(struct platform_device *pdev)
299 ehci = hcd_to_ehci(hcd); 299 ehci = hcd_to_ehci(hcd);
300 ehci->caps = hcd->regs + 0x100; 300 ehci->caps = hcd->regs + 0x100;
301 ehci->regs = hcd->regs + 0x100 + 301 ehci->regs = hcd->regs + 0x100 +
302 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 302 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
303 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 303 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
304 hcd->has_tt = 1; 304 hcd->has_tt = 1;
305 ehci->sbrn = 0x20; 305 ehci->sbrn = 0x20;
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 4e4066c35a09..36ca5077cdf7 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -373,6 +373,17 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
373 retry_xacterr: 373 retry_xacterr:
374 if ((token & QTD_STS_ACTIVE) == 0) { 374 if ((token & QTD_STS_ACTIVE) == 0) {
375 375
376 /* Report Data Buffer Error: non-fatal but useful */
377 if (token & QTD_STS_DBE)
378 ehci_dbg(ehci,
379 "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
380 urb,
381 usb_endpoint_num(&urb->ep->desc),
382 usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
383 urb->transfer_buffer_length,
384 qtd,
385 qh);
386
376 /* on STALL, error, and short reads this urb must 387 /* on STALL, error, and short reads this urb must
377 * complete and all its qtds must be recycled. 388 * complete and all its qtds must be recycled.
378 */ 389 */
@@ -647,7 +658,7 @@ qh_urb_transaction (
647 /* 658 /*
648 * data transfer stage: buffer setup 659 * data transfer stage: buffer setup
649 */ 660 */
650 i = urb->num_sgs; 661 i = urb->num_mapped_sgs;
651 if (len > 0 && i > 0) { 662 if (len > 0 && i > 0) {
652 sg = urb->sg; 663 sg = urb->sg;
653 buf = sg_dma_address(sg); 664 buf = sg_dma_address(sg);
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
index 024b65c4990d..293f7412992e 100644
--- a/drivers/usb/host/ehci-s5p.c
+++ b/drivers/usb/host/ehci-s5p.c
@@ -14,8 +14,6 @@
14 14
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <mach/regs-pmu.h>
18#include <plat/cpu.h>
19#include <plat/ehci.h> 17#include <plat/ehci.h>
20#include <plat/usb-phy.h> 18#include <plat/usb-phy.h>
21 19
@@ -136,6 +134,8 @@ static int __devinit s5p_ehci_probe(struct platform_device *pdev)
136 /* cache this readonly data; minimize chip reads */ 134 /* cache this readonly data; minimize chip reads */
137 ehci->hcs_params = readl(&ehci->caps->hcs_params); 135 ehci->hcs_params = readl(&ehci->caps->hcs_params);
138 136
137 ehci_reset(ehci);
138
139 err = usb_add_hcd(hcd, irq, IRQF_SHARED); 139 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
140 if (err) { 140 if (err) {
141 dev_err(&pdev->dev, "Failed to add USB HCD\n"); 141 dev_err(&pdev->dev, "Failed to add USB HCD\n");
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index db9d1b4bfbdc..dbc7fe8ca9e7 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -21,7 +21,12 @@
21#include <linux/platform_data/tegra_usb.h> 21#include <linux/platform_data/tegra_usb.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/usb/otg.h> 23#include <linux/usb/otg.h>
24#include <linux/gpio.h>
25#include <linux/of.h>
26#include <linux/of_gpio.h>
27
24#include <mach/usb_phy.h> 28#include <mach/usb_phy.h>
29#include <mach/iomap.h>
25 30
26#define TEGRA_USB_DMA_ALIGN 32 31#define TEGRA_USB_DMA_ALIGN 32
27 32
@@ -574,6 +579,35 @@ static const struct hc_driver tegra_ehci_hc_driver = {
574 .port_handed_over = ehci_port_handed_over, 579 .port_handed_over = ehci_port_handed_over,
575}; 580};
576 581
582static int setup_vbus_gpio(struct platform_device *pdev)
583{
584 int err = 0;
585 int gpio;
586
587 if (!pdev->dev.of_node)
588 return 0;
589
590 gpio = of_get_named_gpio(pdev->dev.of_node, "nvidia,vbus-gpio", 0);
591 if (!gpio_is_valid(gpio))
592 return 0;
593
594 err = gpio_request(gpio, "vbus_gpio");
595 if (err) {
596 dev_err(&pdev->dev, "can't request vbus gpio %d", gpio);
597 return err;
598 }
599 err = gpio_direction_output(gpio, 1);
600 if (err) {
601 dev_err(&pdev->dev, "can't enable vbus\n");
602 return err;
603 }
604 gpio_set_value(gpio, 1);
605
606 return err;
607}
608
609static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
610
577static int tegra_ehci_probe(struct platform_device *pdev) 611static int tegra_ehci_probe(struct platform_device *pdev)
578{ 612{
579 struct resource *res; 613 struct resource *res;
@@ -590,6 +624,15 @@ static int tegra_ehci_probe(struct platform_device *pdev)
590 return -EINVAL; 624 return -EINVAL;
591 } 625 }
592 626
627 /* Right now device-tree probed devices don't get dma_mask set.
628 * Since shared usb code relies on it, set it here for now.
629 * Once we have dma capability bindings this can go away.
630 */
631 if (!pdev->dev.dma_mask)
632 pdev->dev.dma_mask = &tegra_ehci_dma_mask;
633
634 setup_vbus_gpio(pdev);
635
593 tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL); 636 tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL);
594 if (!tegra) 637 if (!tegra)
595 return -ENOMEM; 638 return -ENOMEM;
@@ -640,6 +683,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
640 goto fail_io; 683 goto fail_io;
641 } 684 }
642 685
686 /* This is pretty ugly and needs to be fixed when we do only
687 * device-tree probing. Old code relies on the platform_device
688 * numbering that we lack for device-tree-instantiated devices.
689 */
690 if (instance < 0) {
691 switch (res->start) {
692 case TEGRA_USB_BASE:
693 instance = 0;
694 break;
695 case TEGRA_USB2_BASE:
696 instance = 1;
697 break;
698 case TEGRA_USB3_BASE:
699 instance = 2;
700 break;
701 default:
702 err = -ENODEV;
703 dev_err(&pdev->dev, "unknown usb instance\n");
704 goto fail_phy;
705 }
706 }
707
643 tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config, 708 tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config,
644 TEGRA_USB_PHY_MODE_HOST); 709 TEGRA_USB_PHY_MODE_HOST);
645 if (IS_ERR(tegra->phy)) { 710 if (IS_ERR(tegra->phy)) {
@@ -773,6 +838,11 @@ static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
773 hcd->driver->shutdown(hcd); 838 hcd->driver->shutdown(hcd);
774} 839}
775 840
841static struct of_device_id tegra_ehci_of_match[] __devinitdata = {
842 { .compatible = "nvidia,tegra20-ehci", },
843 { },
844};
845
776static struct platform_driver tegra_ehci_driver = { 846static struct platform_driver tegra_ehci_driver = {
777 .probe = tegra_ehci_probe, 847 .probe = tegra_ehci_probe,
778 .remove = tegra_ehci_remove, 848 .remove = tegra_ehci_remove,
@@ -783,5 +853,6 @@ static struct platform_driver tegra_ehci_driver = {
783 .shutdown = tegra_ehci_hcd_shutdown, 853 .shutdown = tegra_ehci_hcd_shutdown,
784 .driver = { 854 .driver = {
785 .name = "tegra-ehci", 855 .name = "tegra-ehci",
856 .of_match_table = tegra_ehci_of_match,
786 } 857 }
787}; 858};
diff --git a/drivers/usb/host/ehci-vt8500.c b/drivers/usb/host/ehci-vt8500.c
index 54d1ab8aec49..c1eda73916cd 100644
--- a/drivers/usb/host/ehci-vt8500.c
+++ b/drivers/usb/host/ehci-vt8500.c
@@ -132,6 +132,8 @@ static int vt8500_ehci_drv_probe(struct platform_device *pdev)
132 132
133 ehci_port_power(ehci, 1); 133 ehci_port_power(ehci, 1);
134 134
135 ehci_reset(ehci);
136
135 ret = usb_add_hcd(hcd, pdev->resource[1].start, 137 ret = usb_add_hcd(hcd, pdev->resource[1].start,
136 IRQF_SHARED); 138 IRQF_SHARED);
137 if (ret == 0) { 139 if (ret == 0) {
diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c
index d661cf7de140..3d2e26cbb34c 100644
--- a/drivers/usb/host/ehci-w90x900.c
+++ b/drivers/usb/host/ehci-w90x900.c
@@ -78,6 +78,8 @@ static int __devinit usb_w90x900_probe(const struct hc_driver *driver,
78 if (irq < 0) 78 if (irq < 0)
79 goto err4; 79 goto err4;
80 80
81 ehci_reset(ehci);
82
81 retval = usb_add_hcd(hcd, irq, IRQF_SHARED); 83 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
82 if (retval != 0) 84 if (retval != 0)
83 goto err4; 85 goto err4;
diff --git a/drivers/usb/host/ehci-xls.c b/drivers/usb/host/ehci-xls.c
index b4fb511d24bc..72f08196f8cd 100644
--- a/drivers/usb/host/ehci-xls.c
+++ b/drivers/usb/host/ehci-xls.c
@@ -69,7 +69,7 @@ int ehci_xls_probe_internal(const struct hc_driver *driver,
69 } 69 }
70 70
71 hcd->rsrc_start = res->start; 71 hcd->rsrc_start = res->start;
72 hcd->rsrc_len = res->end - res->start + 1; 72 hcd->rsrc_len = resource_size(res);
73 73
74 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, 74 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
75 driver->description)) { 75 driver->description)) {
diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c
index 4ed6d19f2a54..d2623747b489 100644
--- a/drivers/usb/host/fhci-hcd.c
+++ b/drivers/usb/host/fhci-hcd.c
@@ -824,17 +824,7 @@ static struct platform_driver of_fhci_driver = {
824 .remove = __devexit_p(of_fhci_remove), 824 .remove = __devexit_p(of_fhci_remove),
825}; 825};
826 826
827static int __init fhci_module_init(void) 827module_platform_driver(of_fhci_driver);
828{
829 return platform_driver_register(&of_fhci_driver);
830}
831module_init(fhci_module_init);
832
833static void __exit fhci_module_exit(void)
834{
835 platform_driver_unregister(&of_fhci_driver);
836}
837module_exit(fhci_module_exit);
838 828
839MODULE_DESCRIPTION("USB Freescale Host Controller Interface Driver"); 829MODULE_DESCRIPTION("USB Freescale Host Controller Interface Driver");
840MODULE_AUTHOR("Shlomi Gridish <gridish@freescale.com>, " 830MODULE_AUTHOR("Shlomi Gridish <gridish@freescale.com>, "
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 9037035ad1e4..7916e56a725e 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -297,17 +297,7 @@ static struct platform_driver fsl_usb2_mph_dr_driver = {
297 .remove = __devexit_p(fsl_usb2_mph_dr_of_remove), 297 .remove = __devexit_p(fsl_usb2_mph_dr_of_remove),
298}; 298};
299 299
300static int __init fsl_usb2_mph_dr_init(void) 300module_platform_driver(fsl_usb2_mph_dr_driver);
301{
302 return platform_driver_register(&fsl_usb2_mph_dr_driver);
303}
304module_init(fsl_usb2_mph_dr_init);
305
306static void __exit fsl_usb2_mph_dr_exit(void)
307{
308 platform_driver_unregister(&fsl_usb2_mph_dr_driver);
309}
310module_exit(fsl_usb2_mph_dr_exit);
311 301
312MODULE_DESCRIPTION("FSL MPH DR OF devices driver"); 302MODULE_DESCRIPTION("FSL MPH DR OF devices driver");
313MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>"); 303MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
diff --git a/drivers/usb/host/hwa-hc.c b/drivers/usb/host/hwa-hc.c
index 43b3ca48d753..104730dabd2d 100644
--- a/drivers/usb/host/hwa-hc.c
+++ b/drivers/usb/host/hwa-hc.c
@@ -776,7 +776,6 @@ static int hwahc_probe(struct usb_interface *usb_iface,
776 goto error_alloc; 776 goto error_alloc;
777 } 777 }
778 usb_hcd->wireless = 1; 778 usb_hcd->wireless = 1;
779 set_bit(HCD_FLAG_SAW_IRQ, &usb_hcd->flags);
780 wusbhc = usb_hcd_to_wusbhc(usb_hcd); 779 wusbhc = usb_hcd_to_wusbhc(usb_hcd);
781 hwahc = container_of(wusbhc, struct hwahc, wusbhc); 780 hwahc = container_of(wusbhc, struct hwahc, wusbhc);
782 hwahc_init(hwahc); 781 hwahc_init(hwahc);
diff --git a/drivers/usb/host/imx21-hcd.c b/drivers/usb/host/imx21-hcd.c
index dbf0f156ed9e..ff471c1c165e 100644
--- a/drivers/usb/host/imx21-hcd.c
+++ b/drivers/usb/host/imx21-hcd.c
@@ -1924,18 +1924,7 @@ static struct platform_driver imx21_hcd_driver = {
1924 .resume = NULL, 1924 .resume = NULL,
1925}; 1925};
1926 1926
1927static int __init imx21_hcd_init(void) 1927module_platform_driver(imx21_hcd_driver);
1928{
1929 return platform_driver_register(&imx21_hcd_driver);
1930}
1931
1932static void __exit imx21_hcd_cleanup(void)
1933{
1934 platform_driver_unregister(&imx21_hcd_driver);
1935}
1936
1937module_init(imx21_hcd_init);
1938module_exit(imx21_hcd_cleanup);
1939 1928
1940MODULE_DESCRIPTION("i.MX21 USB Host controller"); 1929MODULE_DESCRIPTION("i.MX21 USB Host controller");
1941MODULE_AUTHOR("Martin Fuzzey"); 1930MODULE_AUTHOR("Martin Fuzzey");
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index 27dfab80ed8f..fc72d44bf787 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -32,6 +32,13 @@ static struct kmem_cache *qtd_cachep;
32static struct kmem_cache *qh_cachep; 32static struct kmem_cache *qh_cachep;
33static struct kmem_cache *urb_listitem_cachep; 33static struct kmem_cache *urb_listitem_cachep;
34 34
35enum queue_head_types {
36 QH_CONTROL,
37 QH_BULK,
38 QH_INTERRUPT,
39 QH_END
40};
41
35struct isp1760_hcd { 42struct isp1760_hcd {
36 u32 hcs_params; 43 u32 hcs_params;
37 spinlock_t lock; 44 spinlock_t lock;
@@ -40,7 +47,7 @@ struct isp1760_hcd {
40 struct slotinfo int_slots[32]; 47 struct slotinfo int_slots[32];
41 int int_done_map; 48 int int_done_map;
42 struct memory_chunk memory_pool[BLOCKS]; 49 struct memory_chunk memory_pool[BLOCKS];
43 struct list_head controlqhs, bulkqhs, interruptqhs; 50 struct list_head qh_list[QH_END];
44 51
45 /* periodic schedule support */ 52 /* periodic schedule support */
46#define DEFAULT_I_TDPS 1024 53#define DEFAULT_I_TDPS 1024
@@ -406,12 +413,12 @@ static int priv_init(struct usb_hcd *hcd)
406{ 413{
407 struct isp1760_hcd *priv = hcd_to_priv(hcd); 414 struct isp1760_hcd *priv = hcd_to_priv(hcd);
408 u32 hcc_params; 415 u32 hcc_params;
416 int i;
409 417
410 spin_lock_init(&priv->lock); 418 spin_lock_init(&priv->lock);
411 419
412 INIT_LIST_HEAD(&priv->interruptqhs); 420 for (i = 0; i < QH_END; i++)
413 INIT_LIST_HEAD(&priv->controlqhs); 421 INIT_LIST_HEAD(&priv->qh_list[i]);
414 INIT_LIST_HEAD(&priv->bulkqhs);
415 422
416 /* 423 /*
417 * hw default: 1K periodic list heads, one per frame. 424 * hw default: 1K periodic list heads, one per frame.
@@ -930,9 +937,9 @@ void schedule_ptds(struct usb_hcd *hcd)
930 struct isp1760_hcd *priv; 937 struct isp1760_hcd *priv;
931 struct isp1760_qh *qh, *qh_next; 938 struct isp1760_qh *qh, *qh_next;
932 struct list_head *ep_queue; 939 struct list_head *ep_queue;
933 struct usb_host_endpoint *ep;
934 LIST_HEAD(urb_list); 940 LIST_HEAD(urb_list);
935 struct urb_listitem *urb_listitem, *urb_listitem_next; 941 struct urb_listitem *urb_listitem, *urb_listitem_next;
942 int i;
936 943
937 if (!hcd) { 944 if (!hcd) {
938 WARN_ON(1); 945 WARN_ON(1);
@@ -944,28 +951,13 @@ void schedule_ptds(struct usb_hcd *hcd)
944 /* 951 /*
945 * check finished/retired xfers, transfer payloads, call urb_done() 952 * check finished/retired xfers, transfer payloads, call urb_done()
946 */ 953 */
947 ep_queue = &priv->interruptqhs; 954 for (i = 0; i < QH_END; i++) {
948 while (ep_queue) { 955 ep_queue = &priv->qh_list[i];
949 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) { 956 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) {
950 ep = list_entry(qh->qtd_list.next, struct isp1760_qtd,
951 qtd_list)->urb->ep;
952 collect_qtds(hcd, qh, &urb_list); 957 collect_qtds(hcd, qh, &urb_list);
953 if (list_empty(&qh->qtd_list)) { 958 if (list_empty(&qh->qtd_list))
954 list_del(&qh->qh_list); 959 list_del(&qh->qh_list);
955 if (ep->hcpriv == NULL) {
956 /* Endpoint has been disabled, so we
957 can free the associated queue head. */
958 qh_free(qh);
959 }
960 }
961 } 960 }
962
963 if (ep_queue == &priv->interruptqhs)
964 ep_queue = &priv->controlqhs;
965 else if (ep_queue == &priv->controlqhs)
966 ep_queue = &priv->bulkqhs;
967 else
968 ep_queue = NULL;
969 } 961 }
970 962
971 list_for_each_entry_safe(urb_listitem, urb_listitem_next, &urb_list, 963 list_for_each_entry_safe(urb_listitem, urb_listitem_next, &urb_list,
@@ -998,17 +990,10 @@ void schedule_ptds(struct usb_hcd *hcd)
998 * 990 *
999 * I'm sure this scheme could be improved upon! 991 * I'm sure this scheme could be improved upon!
1000 */ 992 */
1001 ep_queue = &priv->controlqhs; 993 for (i = 0; i < QH_END; i++) {
1002 while (ep_queue) { 994 ep_queue = &priv->qh_list[i];
1003 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list) 995 list_for_each_entry_safe(qh, qh_next, ep_queue, qh_list)
1004 enqueue_qtds(hcd, qh); 996 enqueue_qtds(hcd, qh);
1005
1006 if (ep_queue == &priv->controlqhs)
1007 ep_queue = &priv->interruptqhs;
1008 else if (ep_queue == &priv->interruptqhs)
1009 ep_queue = &priv->bulkqhs;
1010 else
1011 ep_queue = NULL;
1012 } 997 }
1013} 998}
1014 999
@@ -1543,16 +1528,16 @@ static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1543 1528
1544 switch (usb_pipetype(urb->pipe)) { 1529 switch (usb_pipetype(urb->pipe)) {
1545 case PIPE_CONTROL: 1530 case PIPE_CONTROL:
1546 ep_queue = &priv->controlqhs; 1531 ep_queue = &priv->qh_list[QH_CONTROL];
1547 break; 1532 break;
1548 case PIPE_BULK: 1533 case PIPE_BULK:
1549 ep_queue = &priv->bulkqhs; 1534 ep_queue = &priv->qh_list[QH_BULK];
1550 break; 1535 break;
1551 case PIPE_INTERRUPT: 1536 case PIPE_INTERRUPT:
1552 if (urb->interval < 0) 1537 if (urb->interval < 0)
1553 return -EINVAL; 1538 return -EINVAL;
1554 /* FIXME: Check bandwidth */ 1539 /* FIXME: Check bandwidth */
1555 ep_queue = &priv->interruptqhs; 1540 ep_queue = &priv->qh_list[QH_INTERRUPT];
1556 break; 1541 break;
1557 case PIPE_ISOCHRONOUS: 1542 case PIPE_ISOCHRONOUS:
1558 dev_err(hcd->self.controller, "%s: isochronous USB packets " 1543 dev_err(hcd->self.controller, "%s: isochronous USB packets "
@@ -1714,8 +1699,8 @@ static void isp1760_endpoint_disable(struct usb_hcd *hcd,
1714{ 1699{
1715 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1700 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1716 unsigned long spinflags; 1701 unsigned long spinflags;
1717 struct isp1760_qh *qh; 1702 struct isp1760_qh *qh, *qh_iter;
1718 struct isp1760_qtd *qtd; 1703 int i;
1719 1704
1720 spin_lock_irqsave(&priv->lock, spinflags); 1705 spin_lock_irqsave(&priv->lock, spinflags);
1721 1706
@@ -1723,14 +1708,17 @@ static void isp1760_endpoint_disable(struct usb_hcd *hcd,
1723 if (!qh) 1708 if (!qh)
1724 goto out; 1709 goto out;
1725 1710
1726 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) 1711 WARN_ON(!list_empty(&qh->qtd_list));
1727 if (qtd->status != QTD_RETIRE) {
1728 dequeue_urb_from_qtd(hcd, qh, qtd);
1729 qtd->urb->status = -ECONNRESET;
1730 }
1731 1712
1713 for (i = 0; i < QH_END; i++)
1714 list_for_each_entry(qh_iter, &priv->qh_list[i], qh_list)
1715 if (qh_iter == qh) {
1716 list_del(&qh_iter->qh_list);
1717 i = QH_END;
1718 break;
1719 }
1720 qh_free(qh);
1732 ep->hcpriv = NULL; 1721 ep->hcpriv = NULL;
1733 /* Cannot free qh here since it will be parsed by schedule_ptds() */
1734 1722
1735 schedule_ptds(hcd); 1723 schedule_ptds(hcd);
1736 1724
diff --git a/drivers/usb/host/isp1760-if.c b/drivers/usb/host/isp1760-if.c
index 2ac4ac2e4ef9..4592dc17a9f9 100644
--- a/drivers/usb/host/isp1760-if.c
+++ b/drivers/usb/host/isp1760-if.c
@@ -47,23 +47,27 @@ static int of_isp1760_probe(struct platform_device *dev)
47 int virq; 47 int virq;
48 resource_size_t res_len; 48 resource_size_t res_len;
49 int ret; 49 int ret;
50 const unsigned int *prop;
51 unsigned int devflags = 0; 50 unsigned int devflags = 0;
52 enum of_gpio_flags gpio_flags; 51 enum of_gpio_flags gpio_flags;
52 u32 bus_width = 0;
53 53
54 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); 54 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
55 if (!drvdata) 55 if (!drvdata)
56 return -ENOMEM; 56 return -ENOMEM;
57 57
58 ret = of_address_to_resource(dp, 0, &memory); 58 ret = of_address_to_resource(dp, 0, &memory);
59 if (ret) 59 if (ret) {
60 return -ENXIO; 60 ret = -ENXIO;
61 goto free_data;
62 }
61 63
62 res_len = resource_size(&memory); 64 res_len = resource_size(&memory);
63 65
64 res = request_mem_region(memory.start, res_len, dev_name(&dev->dev)); 66 res = request_mem_region(memory.start, res_len, dev_name(&dev->dev));
65 if (!res) 67 if (!res) {
66 return -EBUSY; 68 ret = -EBUSY;
69 goto free_data;
70 }
67 71
68 if (of_irq_map_one(dp, 0, &oirq)) { 72 if (of_irq_map_one(dp, 0, &oirq)) {
69 ret = -ENODEV; 73 ret = -ENODEV;
@@ -77,8 +81,8 @@ static int of_isp1760_probe(struct platform_device *dev)
77 devflags |= ISP1760_FLAG_ISP1761; 81 devflags |= ISP1760_FLAG_ISP1761;
78 82
79 /* Some systems wire up only 16 of the 32 data lines */ 83 /* Some systems wire up only 16 of the 32 data lines */
80 prop = of_get_property(dp, "bus-width", NULL); 84 of_property_read_u32(dp, "bus-width", &bus_width);
81 if (prop && *prop == 16) 85 if (bus_width == 16)
82 devflags |= ISP1760_FLAG_BUS_WIDTH_16; 86 devflags |= ISP1760_FLAG_BUS_WIDTH_16;
83 87
84 if (of_get_property(dp, "port1-otg", NULL) != NULL) 88 if (of_get_property(dp, "port1-otg", NULL) != NULL)
@@ -125,6 +129,7 @@ free_gpio:
125 gpio_free(drvdata->rst_gpio); 129 gpio_free(drvdata->rst_gpio);
126release_reg: 130release_reg:
127 release_mem_region(memory.start, res_len); 131 release_mem_region(memory.start, res_len);
132free_data:
128 kfree(drvdata); 133 kfree(drvdata);
129 return ret; 134 return ret;
130} 135}
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 95a9fec38e89..5df0b0e3392b 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -223,7 +223,7 @@ static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int
223 if (port < 0 || port >= 2) 223 if (port < 0 || port >= 2)
224 return; 224 return;
225 225
226 if (pdata->vbus_pin[port] <= 0) 226 if (!gpio_is_valid(pdata->vbus_pin[port]))
227 return; 227 return;
228 228
229 gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable); 229 gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable);
@@ -234,7 +234,7 @@ static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port)
234 if (port < 0 || port >= 2) 234 if (port < 0 || port >= 2)
235 return -EINVAL; 235 return -EINVAL;
236 236
237 if (pdata->vbus_pin[port] <= 0) 237 if (!gpio_is_valid(pdata->vbus_pin[port]))
238 return -EINVAL; 238 return -EINVAL;
239 239
240 return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted; 240 return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted;
@@ -465,7 +465,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
465 465
466 if (pdata) { 466 if (pdata) {
467 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { 467 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
468 if (pdata->vbus_pin[i] <= 0) 468 if (!gpio_is_valid(pdata->vbus_pin[i]))
469 continue; 469 continue;
470 gpio_request(pdata->vbus_pin[i], "ohci_vbus"); 470 gpio_request(pdata->vbus_pin[i], "ohci_vbus");
471 ohci_at91_usb_set_power(pdata, i, 1); 471 ohci_at91_usb_set_power(pdata, i, 1);
@@ -474,7 +474,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
474 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { 474 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) {
475 int ret; 475 int ret;
476 476
477 if (pdata->overcurrent_pin[i] <= 0) 477 if (!gpio_is_valid(pdata->overcurrent_pin[i]))
478 continue; 478 continue;
479 gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent"); 479 gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent");
480 480
@@ -499,14 +499,14 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev)
499 499
500 if (pdata) { 500 if (pdata) {
501 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { 501 for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
502 if (pdata->vbus_pin[i] <= 0) 502 if (!gpio_is_valid(pdata->vbus_pin[i]))
503 continue; 503 continue;
504 ohci_at91_usb_set_power(pdata, i, 0); 504 ohci_at91_usb_set_power(pdata, i, 0);
505 gpio_free(pdata->vbus_pin[i]); 505 gpio_free(pdata->vbus_pin[i]);
506 } 506 }
507 507
508 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { 508 for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) {
509 if (pdata->overcurrent_pin[i] <= 0) 509 if (!gpio_is_valid(pdata->overcurrent_pin[i]))
510 continue; 510 continue;
511 free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev); 511 free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev);
512 gpio_free(pdata->overcurrent_pin[i]); 512 gpio_free(pdata->overcurrent_pin[i]);
diff --git a/drivers/usb/host/ohci-au1xxx.c b/drivers/usb/host/ohci-au1xxx.c
index 9b66df8278f3..40d886adff53 100644
--- a/drivers/usb/host/ohci-au1xxx.c
+++ b/drivers/usb/host/ohci-au1xxx.c
@@ -173,12 +173,9 @@ static int ohci_hcd_au1xxx_drv_suspend(struct device *dev)
173 * mark HW unaccessible, bail out if RH has been resumed. Use 173 * mark HW unaccessible, bail out if RH has been resumed. Use
174 * the spinlock to properly synchronize with possible pending 174 * the spinlock to properly synchronize with possible pending
175 * RH suspend or resume activity. 175 * RH suspend or resume activity.
176 *
177 * This is still racy as hcd->state is manipulated outside of
178 * any locks =P But that will be a different fix.
179 */ 176 */
180 spin_lock_irqsave(&ohci->lock, flags); 177 spin_lock_irqsave(&ohci->lock, flags);
181 if (hcd->state != HC_STATE_SUSPENDED) { 178 if (ohci->rh_state != OHCI_RH_SUSPENDED) {
182 rc = -EINVAL; 179 rc = -EINVAL;
183 goto bail; 180 goto bail;
184 } 181 }
diff --git a/drivers/usb/host/ohci-dbg.c b/drivers/usb/host/ohci-dbg.c
index d7d34492934a..5179fcd73d8a 100644
--- a/drivers/usb/host/ohci-dbg.c
+++ b/drivers/usb/host/ohci-dbg.c
@@ -127,6 +127,19 @@ static char *hcfs2string (int state)
127 return "?"; 127 return "?";
128} 128}
129 129
130static const char *rh_state_string(struct ohci_hcd *ohci)
131{
132 switch (ohci->rh_state) {
133 case OHCI_RH_HALTED:
134 return "halted";
135 case OHCI_RH_SUSPENDED:
136 return "suspended";
137 case OHCI_RH_RUNNING:
138 return "running";
139 }
140 return "?";
141}
142
130// dump control and status registers 143// dump control and status registers
131static void 144static void
132ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size) 145ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
@@ -136,9 +149,10 @@ ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
136 149
137 temp = ohci_readl (controller, &regs->revision) & 0xff; 150 temp = ohci_readl (controller, &regs->revision) & 0xff;
138 ohci_dbg_sw (controller, next, size, 151 ohci_dbg_sw (controller, next, size,
139 "OHCI %d.%d, %s legacy support registers\n", 152 "OHCI %d.%d, %s legacy support registers, rh state %s\n",
140 0x03 & (temp >> 4), (temp & 0x0f), 153 0x03 & (temp >> 4), (temp & 0x0f),
141 (temp & 0x0100) ? "with" : "NO"); 154 (temp & 0x0100) ? "with" : "NO",
155 rh_state_string(controller));
142 156
143 temp = ohci_readl (controller, &regs->control); 157 temp = ohci_readl (controller, &regs->control);
144 ohci_dbg_sw (controller, next, size, 158 ohci_dbg_sw (controller, next, size,
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index dc45d489d00e..3d63574d2c7e 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -179,8 +179,6 @@ static int ohci_hcd_ep93xx_drv_suspend(struct platform_device *pdev, pm_message_
179 ohci->next_statechange = jiffies; 179 ohci->next_statechange = jiffies;
180 180
181 ep93xx_stop_hc(&pdev->dev); 181 ep93xx_stop_hc(&pdev->dev);
182 hcd->state = HC_STATE_SUSPENDED;
183
184 return 0; 182 return 0;
185} 183}
186 184
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
new file mode 100644
index 000000000000..55aa35aa3d7b
--- /dev/null
+++ b/drivers/usb/host/ohci-exynos.c
@@ -0,0 +1,274 @@
1/*
2 * SAMSUNG EXYNOS USB HOST OHCI Controller
3 *
4 * Copyright (C) 2011 Samsung Electronics Co.Ltd
5 * Author: Jingoo Han <jg1.han@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/clk.h>
15#include <linux/platform_device.h>
16#include <mach/ohci.h>
17#include <plat/usb-phy.h>
18
19struct exynos_ohci_hcd {
20 struct device *dev;
21 struct usb_hcd *hcd;
22 struct clk *clk;
23};
24
25static int ohci_exynos_start(struct usb_hcd *hcd)
26{
27 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
28 int ret;
29
30 ohci_dbg(ohci, "ohci_exynos_start, ohci:%p", ohci);
31
32 ret = ohci_init(ohci);
33 if (ret < 0)
34 return ret;
35
36 ret = ohci_run(ohci);
37 if (ret < 0) {
38 err("can't start %s", hcd->self.bus_name);
39 ohci_stop(hcd);
40 return ret;
41 }
42
43 return 0;
44}
45
46static const struct hc_driver exynos_ohci_hc_driver = {
47 .description = hcd_name,
48 .product_desc = "EXYNOS OHCI Host Controller",
49 .hcd_priv_size = sizeof(struct ohci_hcd),
50
51 .irq = ohci_irq,
52 .flags = HCD_MEMORY|HCD_USB11,
53
54 .start = ohci_exynos_start,
55 .stop = ohci_stop,
56 .shutdown = ohci_shutdown,
57
58 .get_frame_number = ohci_get_frame,
59
60 .urb_enqueue = ohci_urb_enqueue,
61 .urb_dequeue = ohci_urb_dequeue,
62 .endpoint_disable = ohci_endpoint_disable,
63
64 .hub_status_data = ohci_hub_status_data,
65 .hub_control = ohci_hub_control,
66#ifdef CONFIG_PM
67 .bus_suspend = ohci_bus_suspend,
68 .bus_resume = ohci_bus_resume,
69#endif
70 .start_port_reset = ohci_start_port_reset,
71};
72
73static int __devinit exynos_ohci_probe(struct platform_device *pdev)
74{
75 struct exynos4_ohci_platdata *pdata;
76 struct exynos_ohci_hcd *exynos_ohci;
77 struct usb_hcd *hcd;
78 struct ohci_hcd *ohci;
79 struct resource *res;
80 int irq;
81 int err;
82
83 pdata = pdev->dev.platform_data;
84 if (!pdata) {
85 dev_err(&pdev->dev, "No platform data defined\n");
86 return -EINVAL;
87 }
88
89 exynos_ohci = kzalloc(sizeof(struct exynos_ohci_hcd), GFP_KERNEL);
90 if (!exynos_ohci)
91 return -ENOMEM;
92
93 exynos_ohci->dev = &pdev->dev;
94
95 hcd = usb_create_hcd(&exynos_ohci_hc_driver, &pdev->dev,
96 dev_name(&pdev->dev));
97 if (!hcd) {
98 dev_err(&pdev->dev, "Unable to create HCD\n");
99 err = -ENOMEM;
100 goto fail_hcd;
101 }
102
103 exynos_ohci->hcd = hcd;
104 exynos_ohci->clk = clk_get(&pdev->dev, "usbhost");
105
106 if (IS_ERR(exynos_ohci->clk)) {
107 dev_err(&pdev->dev, "Failed to get usbhost clock\n");
108 err = PTR_ERR(exynos_ohci->clk);
109 goto fail_clk;
110 }
111
112 err = clk_enable(exynos_ohci->clk);
113 if (err)
114 goto fail_clken;
115
116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
117 if (!res) {
118 dev_err(&pdev->dev, "Failed to get I/O memory\n");
119 err = -ENXIO;
120 goto fail_io;
121 }
122
123 hcd->rsrc_start = res->start;
124 hcd->rsrc_len = resource_size(res);
125 hcd->regs = ioremap(res->start, resource_size(res));
126 if (!hcd->regs) {
127 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
128 err = -ENOMEM;
129 goto fail_io;
130 }
131
132 irq = platform_get_irq(pdev, 0);
133 if (!irq) {
134 dev_err(&pdev->dev, "Failed to get IRQ\n");
135 err = -ENODEV;
136 goto fail;
137 }
138
139 if (pdata->phy_init)
140 pdata->phy_init(pdev, S5P_USB_PHY_HOST);
141
142 ohci = hcd_to_ohci(hcd);
143 ohci_hcd_init(ohci);
144
145 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
146 if (err) {
147 dev_err(&pdev->dev, "Failed to add USB HCD\n");
148 goto fail;
149 }
150
151 platform_set_drvdata(pdev, exynos_ohci);
152
153 return 0;
154
155fail:
156 iounmap(hcd->regs);
157fail_io:
158 clk_disable(exynos_ohci->clk);
159fail_clken:
160 clk_put(exynos_ohci->clk);
161fail_clk:
162 usb_put_hcd(hcd);
163fail_hcd:
164 kfree(exynos_ohci);
165 return err;
166}
167
168static int __devexit exynos_ohci_remove(struct platform_device *pdev)
169{
170 struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data;
171 struct exynos_ohci_hcd *exynos_ohci = platform_get_drvdata(pdev);
172 struct usb_hcd *hcd = exynos_ohci->hcd;
173
174 usb_remove_hcd(hcd);
175
176 if (pdata && pdata->phy_exit)
177 pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
178
179 iounmap(hcd->regs);
180
181 clk_disable(exynos_ohci->clk);
182 clk_put(exynos_ohci->clk);
183
184 usb_put_hcd(hcd);
185 kfree(exynos_ohci);
186
187 return 0;
188}
189
190static void exynos_ohci_shutdown(struct platform_device *pdev)
191{
192 struct exynos_ohci_hcd *exynos_ohci = platform_get_drvdata(pdev);
193 struct usb_hcd *hcd = exynos_ohci->hcd;
194
195 if (hcd->driver->shutdown)
196 hcd->driver->shutdown(hcd);
197}
198
199#ifdef CONFIG_PM
200static int exynos_ohci_suspend(struct device *dev)
201{
202 struct exynos_ohci_hcd *exynos_ohci = dev_get_drvdata(dev);
203 struct usb_hcd *hcd = exynos_ohci->hcd;
204 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
205 struct platform_device *pdev = to_platform_device(dev);
206 struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data;
207 unsigned long flags;
208 int rc = 0;
209
210 /*
211 * Root hub was already suspended. Disable irq emission and
212 * mark HW unaccessible, bail out if RH has been resumed. Use
213 * the spinlock to properly synchronize with possible pending
214 * RH suspend or resume activity.
215 *
216 * This is still racy as hcd->state is manipulated outside of
217 * any locks =P But that will be a different fix.
218 */
219 spin_lock_irqsave(&ohci->lock, flags);
220 if (hcd->state != HC_STATE_SUSPENDED && hcd->state != HC_STATE_HALT) {
221 rc = -EINVAL;
222 goto fail;
223 }
224
225 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
226
227 if (pdata && pdata->phy_exit)
228 pdata->phy_exit(pdev, S5P_USB_PHY_HOST);
229fail:
230 spin_unlock_irqrestore(&ohci->lock, flags);
231
232 return rc;
233}
234
235static int exynos_ohci_resume(struct device *dev)
236{
237 struct exynos_ohci_hcd *exynos_ohci = dev_get_drvdata(dev);
238 struct usb_hcd *hcd = exynos_ohci->hcd;
239 struct platform_device *pdev = to_platform_device(dev);
240 struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data;
241
242 if (pdata && pdata->phy_init)
243 pdata->phy_init(pdev, S5P_USB_PHY_HOST);
244
245 /* Mark hardware accessible again as we are out of D3 state by now */
246 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
247
248 ohci_finish_controller_resume(hcd);
249
250 return 0;
251}
252#else
253#define exynos_ohci_suspend NULL
254#define exynos_ohci_resume NULL
255#endif
256
257static const struct dev_pm_ops exynos_ohci_pm_ops = {
258 .suspend = exynos_ohci_suspend,
259 .resume = exynos_ohci_resume,
260};
261
262static struct platform_driver exynos_ohci_driver = {
263 .probe = exynos_ohci_probe,
264 .remove = __devexit_p(exynos_ohci_remove),
265 .shutdown = exynos_ohci_shutdown,
266 .driver = {
267 .name = "exynos-ohci",
268 .owner = THIS_MODULE,
269 .pm = &exynos_ohci_pm_ops,
270 }
271};
272
273MODULE_ALIAS("platform:exynos-ohci");
274MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index b2639191549e..5f5a63241436 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -209,7 +209,7 @@ static int ohci_urb_enqueue (
209 retval = -ENODEV; 209 retval = -ENODEV;
210 goto fail; 210 goto fail;
211 } 211 }
212 if (!HC_IS_RUNNING(hcd->state)) { 212 if (ohci->rh_state != OHCI_RH_RUNNING) {
213 retval = -ENODEV; 213 retval = -ENODEV;
214 goto fail; 214 goto fail;
215 } 215 }
@@ -274,7 +274,7 @@ static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
274 rc = usb_hcd_check_unlink_urb(hcd, urb, status); 274 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
275 if (rc) { 275 if (rc) {
276 ; /* Do nothing */ 276 ; /* Do nothing */
277 } else if (HC_IS_RUNNING(hcd->state)) { 277 } else if (ohci->rh_state == OHCI_RH_RUNNING) {
278 urb_priv_t *urb_priv; 278 urb_priv_t *urb_priv;
279 279
280 /* Unless an IRQ completed the unlink while it was being 280 /* Unless an IRQ completed the unlink while it was being
@@ -321,7 +321,7 @@ ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
321rescan: 321rescan:
322 spin_lock_irqsave (&ohci->lock, flags); 322 spin_lock_irqsave (&ohci->lock, flags);
323 323
324 if (!HC_IS_RUNNING (hcd->state)) { 324 if (ohci->rh_state != OHCI_RH_RUNNING) {
325sanitize: 325sanitize:
326 ed->state = ED_IDLE; 326 ed->state = ED_IDLE;
327 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT) 327 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
@@ -377,6 +377,7 @@ static void ohci_usb_reset (struct ohci_hcd *ohci)
377 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); 377 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
378 ohci->hc_control &= OHCI_CTRL_RWC; 378 ohci->hc_control &= OHCI_CTRL_RWC;
379 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 379 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
380 ohci->rh_state = OHCI_RH_HALTED;
380} 381}
381 382
382/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and 383/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
@@ -500,7 +501,7 @@ static int ohci_init (struct ohci_hcd *ohci)
500 if (distrust_firmware) 501 if (distrust_firmware)
501 ohci->flags |= OHCI_QUIRK_HUB_POWER; 502 ohci->flags |= OHCI_QUIRK_HUB_POWER;
502 503
503 disable (ohci); 504 ohci->rh_state = OHCI_RH_HALTED;
504 ohci->regs = hcd->regs; 505 ohci->regs = hcd->regs;
505 506
506 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and 507 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
@@ -575,7 +576,7 @@ static int ohci_run (struct ohci_hcd *ohci)
575 int first = ohci->fminterval == 0; 576 int first = ohci->fminterval == 0;
576 struct usb_hcd *hcd = ohci_to_hcd(ohci); 577 struct usb_hcd *hcd = ohci_to_hcd(ohci);
577 578
578 disable (ohci); 579 ohci->rh_state = OHCI_RH_HALTED;
579 580
580 /* boot firmware should have set this up (5.1.1.3.1) */ 581 /* boot firmware should have set this up (5.1.1.3.1) */
581 if (first) { 582 if (first) {
@@ -688,7 +689,7 @@ retry:
688 ohci->hc_control &= OHCI_CTRL_RWC; 689 ohci->hc_control &= OHCI_CTRL_RWC;
689 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; 690 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
690 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 691 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
691 hcd->state = HC_STATE_RUNNING; 692 ohci->rh_state = OHCI_RH_RUNNING;
692 693
693 /* wake on ConnectStatusChange, matching external hubs */ 694 /* wake on ConnectStatusChange, matching external hubs */
694 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); 695 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
@@ -725,7 +726,6 @@ retry:
725 726
726 // POTPGT delay is bits 24-31, in 2 ms units. 727 // POTPGT delay is bits 24-31, in 2 ms units.
727 mdelay ((val >> 23) & 0x1fe); 728 mdelay ((val >> 23) & 0x1fe);
728 hcd->state = HC_STATE_RUNNING;
729 729
730 if (quirk_zfmicro(ohci)) { 730 if (quirk_zfmicro(ohci)) {
731 /* Create timer to watch for bad queue state on ZF Micro */ 731 /* Create timer to watch for bad queue state on ZF Micro */
@@ -761,7 +761,7 @@ static irqreturn_t ohci_irq (struct usb_hcd *hcd)
761 * of dead, unclocked, or unplugged (CardBus...) devices 761 * of dead, unclocked, or unplugged (CardBus...) devices
762 */ 762 */
763 if (ints == ~(u32)0) { 763 if (ints == ~(u32)0) {
764 disable (ohci); 764 ohci->rh_state = OHCI_RH_HALTED;
765 ohci_dbg (ohci, "device removed!\n"); 765 ohci_dbg (ohci, "device removed!\n");
766 usb_hc_died(hcd); 766 usb_hc_died(hcd);
767 return IRQ_HANDLED; 767 return IRQ_HANDLED;
@@ -771,7 +771,7 @@ static irqreturn_t ohci_irq (struct usb_hcd *hcd)
771 ints &= ohci_readl(ohci, &regs->intrenable); 771 ints &= ohci_readl(ohci, &regs->intrenable);
772 772
773 /* interrupt for some other device? */ 773 /* interrupt for some other device? */
774 if (ints == 0 || unlikely(hcd->state == HC_STATE_HALT)) 774 if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
775 return IRQ_NOTMINE; 775 return IRQ_NOTMINE;
776 776
777 if (ints & OHCI_INTR_UE) { 777 if (ints & OHCI_INTR_UE) {
@@ -786,8 +786,8 @@ static irqreturn_t ohci_irq (struct usb_hcd *hcd)
786 786
787 schedule_work (&ohci->nec_work); 787 schedule_work (&ohci->nec_work);
788 } else { 788 } else {
789 disable (ohci);
790 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n"); 789 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
790 ohci->rh_state = OHCI_RH_HALTED;
791 usb_hc_died(hcd); 791 usb_hc_died(hcd);
792 } 792 }
793 793
@@ -871,11 +871,11 @@ static irqreturn_t ohci_irq (struct usb_hcd *hcd)
871 if ((ints & OHCI_INTR_SF) != 0 871 if ((ints & OHCI_INTR_SF) != 0
872 && !ohci->ed_rm_list 872 && !ohci->ed_rm_list
873 && !ohci->ed_to_check 873 && !ohci->ed_to_check
874 && HC_IS_RUNNING(hcd->state)) 874 && ohci->rh_state == OHCI_RH_RUNNING)
875 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable); 875 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
876 spin_unlock (&ohci->lock); 876 spin_unlock (&ohci->lock);
877 877
878 if (HC_IS_RUNNING(hcd->state)) { 878 if (ohci->rh_state == OHCI_RH_RUNNING) {
879 ohci_writel (ohci, ints, &regs->intrstatus); 879 ohci_writel (ohci, ints, &regs->intrstatus);
880 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable); 880 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
881 // flush those writes 881 // flush those writes
@@ -929,7 +929,7 @@ static int ohci_restart (struct ohci_hcd *ohci)
929 struct urb_priv *priv; 929 struct urb_priv *priv;
930 930
931 spin_lock_irq(&ohci->lock); 931 spin_lock_irq(&ohci->lock);
932 disable (ohci); 932 ohci->rh_state = OHCI_RH_HALTED;
933 933
934 /* Recycle any "live" eds/tds (and urbs). */ 934 /* Recycle any "live" eds/tds (and urbs). */
935 if (!list_empty (&ohci->pending)) 935 if (!list_empty (&ohci->pending))
@@ -1005,6 +1005,11 @@ MODULE_LICENSE ("GPL");
1005#define PLATFORM_DRIVER ohci_hcd_s3c2410_driver 1005#define PLATFORM_DRIVER ohci_hcd_s3c2410_driver
1006#endif 1006#endif
1007 1007
1008#ifdef CONFIG_USB_OHCI_EXYNOS
1009#include "ohci-exynos.c"
1010#define PLATFORM_DRIVER exynos_ohci_driver
1011#endif
1012
1008#ifdef CONFIG_USB_OHCI_HCD_OMAP1 1013#ifdef CONFIG_USB_OHCI_HCD_OMAP1
1009#include "ohci-omap.c" 1014#include "ohci-omap.c"
1010#define OMAP1_PLATFORM_DRIVER ohci_hcd_omap_driver 1015#define OMAP1_PLATFORM_DRIVER ohci_hcd_omap_driver
@@ -1111,7 +1116,7 @@ MODULE_LICENSE ("GPL");
1111#define PLATFORM_DRIVER ohci_hcd_ath79_driver 1116#define PLATFORM_DRIVER ohci_hcd_ath79_driver
1112#endif 1117#endif
1113 1118
1114#ifdef CONFIG_NLM_XLR 1119#ifdef CONFIG_CPU_XLR
1115#include "ohci-xls.c" 1120#include "ohci-xls.c"
1116#define PLATFORM_DRIVER ohci_xls_driver 1121#define PLATFORM_DRIVER ohci_xls_driver
1117#endif 1122#endif
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
index 2f00040fc408..836772dfabd3 100644
--- a/drivers/usb/host/ohci-hub.c
+++ b/drivers/usb/host/ohci-hub.c
@@ -111,6 +111,7 @@ __acquires(ohci->lock)
111 if (!autostop) { 111 if (!autostop) {
112 ohci->next_statechange = jiffies + msecs_to_jiffies (5); 112 ohci->next_statechange = jiffies + msecs_to_jiffies (5);
113 ohci->autostop = 0; 113 ohci->autostop = 0;
114 ohci->rh_state = OHCI_RH_SUSPENDED;
114 } 115 }
115 116
116done: 117done:
@@ -140,7 +141,7 @@ __acquires(ohci->lock)
140 141
141 if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) { 142 if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
142 /* this can happen after resuming a swsusp snapshot */ 143 /* this can happen after resuming a swsusp snapshot */
143 if (hcd->state == HC_STATE_RESUMING) { 144 if (ohci->rh_state != OHCI_RH_RUNNING) {
144 ohci_dbg (ohci, "BIOS/SMM active, control %03x\n", 145 ohci_dbg (ohci, "BIOS/SMM active, control %03x\n",
145 ohci->hc_control); 146 ohci->hc_control);
146 status = -EBUSY; 147 status = -EBUSY;
@@ -274,6 +275,7 @@ skip_resume:
274 (void) ohci_readl (ohci, &ohci->regs->control); 275 (void) ohci_readl (ohci, &ohci->regs->control);
275 } 276 }
276 277
278 ohci->rh_state = OHCI_RH_RUNNING;
277 return 0; 279 return 0;
278} 280}
279 281
@@ -336,11 +338,8 @@ static void ohci_finish_controller_resume(struct usb_hcd *hcd)
336 /* If needed, reinitialize and suspend the root hub */ 338 /* If needed, reinitialize and suspend the root hub */
337 if (need_reinit) { 339 if (need_reinit) {
338 spin_lock_irq(&ohci->lock); 340 spin_lock_irq(&ohci->lock);
339 hcd->state = HC_STATE_RESUMING;
340 ohci_rh_resume(ohci); 341 ohci_rh_resume(ohci);
341 hcd->state = HC_STATE_QUIESCING;
342 ohci_rh_suspend(ohci, 0); 342 ohci_rh_suspend(ohci, 0);
343 hcd->state = HC_STATE_SUSPENDED;
344 spin_unlock_irq(&ohci->lock); 343 spin_unlock_irq(&ohci->lock);
345 } 344 }
346 345
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index e4b8782cc6e2..db3968656d21 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -516,7 +516,6 @@ static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
516 ohci->next_statechange = jiffies; 516 ohci->next_statechange = jiffies;
517 517
518 omap_ohci_clock_power(0); 518 omap_ohci_clock_power(0);
519 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
520 return 0; 519 return 0;
521} 520}
522 521
diff --git a/drivers/usb/host/ohci-omap3.c b/drivers/usb/host/ohci-omap3.c
index 516ebc4d6cc2..1b8133b6e451 100644
--- a/drivers/usb/host/ohci-omap3.c
+++ b/drivers/usb/host/ohci-omap3.c
@@ -31,6 +31,7 @@
31 31
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <plat/usb.h> 33#include <plat/usb.h>
34#include <linux/pm_runtime.h>
34 35
35/*-------------------------------------------------------------------------*/ 36/*-------------------------------------------------------------------------*/
36 37
@@ -134,7 +135,7 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev)
134 int irq; 135 int irq;
135 136
136 if (usb_disabled()) 137 if (usb_disabled())
137 goto err_end; 138 return -ENODEV;
138 139
139 if (!dev->parent) { 140 if (!dev->parent) {
140 dev_err(dev, "Missing parent device\n"); 141 dev_err(dev, "Missing parent device\n");
@@ -172,11 +173,8 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev)
172 hcd->rsrc_len = resource_size(res); 173 hcd->rsrc_len = resource_size(res);
173 hcd->regs = regs; 174 hcd->regs = regs;
174 175
175 ret = omap_usbhs_enable(dev); 176 pm_runtime_enable(dev);
176 if (ret) { 177 pm_runtime_get_sync(dev);
177 dev_dbg(dev, "failed to start ohci\n");
178 goto err_end;
179 }
180 178
181 ohci_hcd_init(hcd_to_ohci(hcd)); 179 ohci_hcd_init(hcd_to_ohci(hcd));
182 180
@@ -189,9 +187,7 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev)
189 return 0; 187 return 0;
190 188
191err_add_hcd: 189err_add_hcd:
192 omap_usbhs_disable(dev); 190 pm_runtime_put_sync(dev);
193
194err_end:
195 usb_put_hcd(hcd); 191 usb_put_hcd(hcd);
196 192
197err_io: 193err_io:
@@ -220,9 +216,9 @@ static int __devexit ohci_hcd_omap3_remove(struct platform_device *pdev)
220 216
221 iounmap(hcd->regs); 217 iounmap(hcd->regs);
222 usb_remove_hcd(hcd); 218 usb_remove_hcd(hcd);
223 omap_usbhs_disable(dev); 219 pm_runtime_put_sync(dev);
220 pm_runtime_disable(dev);
224 usb_put_hcd(hcd); 221 usb_put_hcd(hcd);
225
226 return 0; 222 return 0;
227} 223}
228 224
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index bc01b064585a..6109810cc2d3 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -308,12 +308,9 @@ static int ohci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
308 * mark HW unaccessible, bail out if RH has been resumed. Use 308 * mark HW unaccessible, bail out if RH has been resumed. Use
309 * the spinlock to properly synchronize with possible pending 309 * the spinlock to properly synchronize with possible pending
310 * RH suspend or resume activity. 310 * RH suspend or resume activity.
311 *
312 * This is still racy as hcd->state is manipulated outside of
313 * any locks =P But that will be a different fix.
314 */ 311 */
315 spin_lock_irqsave (&ohci->lock, flags); 312 spin_lock_irqsave (&ohci->lock, flags);
316 if (hcd->state != HC_STATE_SUSPENDED) { 313 if (ohci->rh_state != OHCI_RH_SUSPENDED) {
317 rc = -EINVAL; 314 rc = -EINVAL;
318 goto bail; 315 goto bail;
319 } 316 }
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index 29dfefe1c726..6313e4439f37 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -502,8 +502,6 @@ static int ohci_hcd_pxa27x_drv_suspend(struct device *dev)
502 ohci->ohci.next_statechange = jiffies; 502 ohci->ohci.next_statechange = jiffies;
503 503
504 pxa27x_stop_hc(ohci, dev); 504 pxa27x_stop_hc(ohci, dev);
505 hcd->state = HC_STATE_SUSPENDED;
506
507 return 0; 505 return 0;
508} 506}
509 507
diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c
index 15dc51ded61a..c5a1ea9145fa 100644
--- a/drivers/usb/host/ohci-q.c
+++ b/drivers/usb/host/ohci-q.c
@@ -912,7 +912,7 @@ rescan_all:
912 /* only take off EDs that the HC isn't using, accounting for 912 /* only take off EDs that the HC isn't using, accounting for
913 * frame counter wraps and EDs with partially retired TDs 913 * frame counter wraps and EDs with partially retired TDs
914 */ 914 */
915 if (likely (HC_IS_RUNNING(ohci_to_hcd(ohci)->state))) { 915 if (likely(ohci->rh_state == OHCI_RH_RUNNING)) {
916 if (tick_before (tick, ed->tick)) { 916 if (tick_before (tick, ed->tick)) {
917skip_ed: 917skip_ed:
918 last = &ed->ed_next; 918 last = &ed->ed_next;
@@ -1012,7 +1012,7 @@ rescan_this:
1012 1012
1013 /* but if there's work queued, reschedule */ 1013 /* but if there's work queued, reschedule */
1014 if (!list_empty (&ed->td_list)) { 1014 if (!list_empty (&ed->td_list)) {
1015 if (HC_IS_RUNNING(ohci_to_hcd(ohci)->state)) 1015 if (ohci->rh_state == OHCI_RH_RUNNING)
1016 ed_schedule (ohci, ed); 1016 ed_schedule (ohci, ed);
1017 } 1017 }
1018 1018
@@ -1021,9 +1021,7 @@ rescan_this:
1021 } 1021 }
1022 1022
1023 /* maybe reenable control and bulk lists */ 1023 /* maybe reenable control and bulk lists */
1024 if (HC_IS_RUNNING(ohci_to_hcd(ohci)->state) 1024 if (ohci->rh_state == OHCI_RH_RUNNING && !ohci->ed_rm_list) {
1025 && ohci_to_hcd(ohci)->state != HC_STATE_QUIESCING
1026 && !ohci->ed_rm_list) {
1027 u32 command = 0, control = 0; 1025 u32 command = 0, control = 0;
1028 1026
1029 if (ohci->ed_controltail) { 1027 if (ohci->ed_controltail) {
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
index a1877c47601e..56dcf069246d 100644
--- a/drivers/usb/host/ohci-s3c2410.c
+++ b/drivers/usb/host/ohci-s3c2410.c
@@ -486,15 +486,66 @@ static int __devexit ohci_hcd_s3c2410_drv_remove(struct platform_device *pdev)
486 return 0; 486 return 0;
487} 487}
488 488
489#ifdef CONFIG_PM
490static int ohci_hcd_s3c2410_drv_suspend(struct device *dev)
491{
492 struct usb_hcd *hcd = dev_get_drvdata(dev);
493 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
494 struct platform_device *pdev = to_platform_device(dev);
495 unsigned long flags;
496 int rc = 0;
497
498 /*
499 * Root hub was already suspended. Disable irq emission and
500 * mark HW unaccessible, bail out if RH has been resumed. Use
501 * the spinlock to properly synchronize with possible pending
502 * RH suspend or resume activity.
503 */
504 spin_lock_irqsave(&ohci->lock, flags);
505 if (ohci->rh_state != OHCI_RH_SUSPENDED) {
506 rc = -EINVAL;
507 goto bail;
508 }
509
510 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
511
512 s3c2410_stop_hc(pdev);
513bail:
514 spin_unlock_irqrestore(&ohci->lock, flags);
515
516 return rc;
517}
518
519static int ohci_hcd_s3c2410_drv_resume(struct device *dev)
520{
521 struct usb_hcd *hcd = dev_get_drvdata(dev);
522 struct platform_device *pdev = to_platform_device(dev);
523
524 s3c2410_start_hc(pdev, hcd);
525
526 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
527 ohci_finish_controller_resume(hcd);
528
529 return 0;
530}
531#else
532#define ohci_hcd_s3c2410_drv_suspend NULL
533#define ohci_hcd_s3c2410_drv_resume NULL
534#endif
535
536static const struct dev_pm_ops ohci_hcd_s3c2410_pm_ops = {
537 .suspend = ohci_hcd_s3c2410_drv_suspend,
538 .resume = ohci_hcd_s3c2410_drv_resume,
539};
540
489static struct platform_driver ohci_hcd_s3c2410_driver = { 541static struct platform_driver ohci_hcd_s3c2410_driver = {
490 .probe = ohci_hcd_s3c2410_drv_probe, 542 .probe = ohci_hcd_s3c2410_drv_probe,
491 .remove = __devexit_p(ohci_hcd_s3c2410_drv_remove), 543 .remove = __devexit_p(ohci_hcd_s3c2410_drv_remove),
492 .shutdown = usb_hcd_platform_shutdown, 544 .shutdown = usb_hcd_platform_shutdown,
493 /*.suspend = ohci_hcd_s3c2410_drv_suspend, */
494 /*.resume = ohci_hcd_s3c2410_drv_resume, */
495 .driver = { 545 .driver = {
496 .owner = THIS_MODULE, 546 .owner = THIS_MODULE,
497 .name = "s3c2410-ohci", 547 .name = "s3c2410-ohci",
548 .pm = &ohci_hcd_s3c2410_pm_ops,
498 }, 549 },
499}; 550};
500 551
diff --git a/drivers/usb/host/ohci-sh.c b/drivers/usb/host/ohci-sh.c
index afc4eb6bb9d0..84686d90805b 100644
--- a/drivers/usb/host/ohci-sh.c
+++ b/drivers/usb/host/ohci-sh.c
@@ -29,7 +29,6 @@ static int ohci_sh_start(struct usb_hcd *hcd)
29 ohci_hcd_init(ohci); 29 ohci_hcd_init(ohci);
30 ohci_init(ohci); 30 ohci_init(ohci);
31 ohci_run(ohci); 31 ohci_run(ohci);
32 hcd->state = HC_STATE_RUNNING;
33 return 0; 32 return 0;
34} 33}
35 34
diff --git a/drivers/usb/host/ohci-sm501.c b/drivers/usb/host/ohci-sm501.c
index 968cea2b6d4e..5596ac2ba1ca 100644
--- a/drivers/usb/host/ohci-sm501.c
+++ b/drivers/usb/host/ohci-sm501.c
@@ -224,7 +224,6 @@ static int ohci_sm501_suspend(struct platform_device *pdev, pm_message_t msg)
224 ohci->next_statechange = jiffies; 224 ohci->next_statechange = jiffies;
225 225
226 sm501_unit_power(dev->parent, SM501_GATE_USB_HOST, 0); 226 sm501_unit_power(dev->parent, SM501_GATE_USB_HOST, 0);
227 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
228 return 0; 227 return 0;
229} 228}
230 229
diff --git a/drivers/usb/host/ohci-spear.c b/drivers/usb/host/ohci-spear.c
index 69874654f3b5..95c16489e883 100644
--- a/drivers/usb/host/ohci-spear.c
+++ b/drivers/usb/host/ohci-spear.c
@@ -203,7 +203,6 @@ static int spear_ohci_hcd_drv_suspend(struct platform_device *dev,
203 ohci->next_statechange = jiffies; 203 ohci->next_statechange = jiffies;
204 204
205 spear_stop_ohci(ohci_p); 205 spear_stop_ohci(ohci_p);
206 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
207 return 0; 206 return 0;
208} 207}
209 208
diff --git a/drivers/usb/host/ohci-tmio.c b/drivers/usb/host/ohci-tmio.c
index 06331d931171..120bfe6ede38 100644
--- a/drivers/usb/host/ohci-tmio.c
+++ b/drivers/usb/host/ohci-tmio.c
@@ -318,9 +318,6 @@ static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t s
318 if (ret) 318 if (ret)
319 return ret; 319 return ret;
320 } 320 }
321
322 hcd->state = HC_STATE_SUSPENDED;
323
324 return 0; 321 return 0;
325} 322}
326 323
diff --git a/drivers/usb/host/ohci-xls.c b/drivers/usb/host/ohci-xls.c
index a3a9c6f45b91..a2247867af86 100644
--- a/drivers/usb/host/ohci-xls.c
+++ b/drivers/usb/host/ohci-xls.c
@@ -40,7 +40,7 @@ static int ohci_xls_probe_internal(const struct hc_driver *driver,
40 goto err1; 40 goto err1;
41 } 41 }
42 hcd->rsrc_start = res->start; 42 hcd->rsrc_start = res->start;
43 hcd->rsrc_len = res->end - res->start + 1; 43 hcd->rsrc_len = resource_size(res);
44 44
45 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, 45 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
46 driver->description)) { 46 driver->description)) {
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 0795b934d00c..8ff6f7ea96fd 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -344,6 +344,12 @@ typedef struct urb_priv {
344 * a subset of what the full implementation needs. (Linus) 344 * a subset of what the full implementation needs. (Linus)
345 */ 345 */
346 346
347enum ohci_rh_state {
348 OHCI_RH_HALTED,
349 OHCI_RH_SUSPENDED,
350 OHCI_RH_RUNNING
351};
352
347struct ohci_hcd { 353struct ohci_hcd {
348 spinlock_t lock; 354 spinlock_t lock;
349 355
@@ -384,6 +390,7 @@ struct ohci_hcd {
384 /* 390 /*
385 * driver state 391 * driver state
386 */ 392 */
393 enum ohci_rh_state rh_state;
387 int num_ports; 394 int num_ports;
388 int load [NUM_INTS]; 395 int load [NUM_INTS];
389 u32 hc_control; /* copy of hc control reg */ 396 u32 hc_control; /* copy of hc control reg */
@@ -679,11 +686,6 @@ static inline u16 ohci_hwPSW(const struct ohci_hcd *ohci,
679 686
680/*-------------------------------------------------------------------------*/ 687/*-------------------------------------------------------------------------*/
681 688
682static inline void disable (struct ohci_hcd *ohci)
683{
684 ohci_to_hcd(ohci)->state = HC_STATE_HALT;
685}
686
687#define FI 0x2edf /* 12000 bits per frame (-1) */ 689#define FI 0x2edf /* 12000 bits per frame (-1) */
688#define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7)) 690#define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
689#define FIT (1 << 31) 691#define FIT (1 << 31)
@@ -707,7 +709,7 @@ static inline void periodic_reinit (struct ohci_hcd *ohci)
707#define read_roothub(hc, register, mask) ({ \ 709#define read_roothub(hc, register, mask) ({ \
708 u32 temp = ohci_readl (hc, &hc->regs->roothub.register); \ 710 u32 temp = ohci_readl (hc, &hc->regs->roothub.register); \
709 if (temp == -1) \ 711 if (temp == -1) \
710 disable (hc); \ 712 hc->rh_state = OHCI_RH_HALTED; \
711 else if (hc->flags & OHCI_QUIRK_AMD756) \ 713 else if (hc->flags & OHCI_QUIRK_AMD756) \
712 while (temp & mask) \ 714 while (temp & mask) \
713 temp = ohci_readl (hc, &hc->regs->roothub.register); \ 715 temp = ohci_readl (hc, &hc->regs->roothub.register); \
diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c
index dcd889803f0f..6f62de5c6e35 100644
--- a/drivers/usb/host/oxu210hp-hcd.c
+++ b/drivers/usb/host/oxu210hp-hcd.c
@@ -3951,24 +3951,7 @@ static struct platform_driver oxu_driver = {
3951 } 3951 }
3952}; 3952};
3953 3953
3954static int __init oxu_module_init(void) 3954module_platform_driver(oxu_driver);
3955{
3956 int retval = 0;
3957
3958 retval = platform_driver_register(&oxu_driver);
3959 if (retval < 0)
3960 return retval;
3961
3962 return retval;
3963}
3964
3965static void __exit oxu_module_cleanup(void)
3966{
3967 platform_driver_unregister(&oxu_driver);
3968}
3969
3970module_init(oxu_module_init);
3971module_exit(oxu_module_cleanup);
3972 3955
3973MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION); 3956MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3974MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); 3957MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c
index f6ca80ee4cec..d2c6f5ac4626 100644
--- a/drivers/usb/host/uhci-q.c
+++ b/drivers/usb/host/uhci-q.c
@@ -943,7 +943,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
943 if (usb_pipein(urb->pipe)) 943 if (usb_pipein(urb->pipe))
944 status |= TD_CTRL_SPD; 944 status |= TD_CTRL_SPD;
945 945
946 i = urb->num_sgs; 946 i = urb->num_mapped_sgs;
947 if (len > 0 && i > 0) { 947 if (len > 0 && i > 0) {
948 sg = urb->sg; 948 sg = urb->sg;
949 data = sg_dma_address(sg); 949 data = sg_dma_address(sg);
diff --git a/drivers/usb/host/whci/qset.c b/drivers/usb/host/whci/qset.c
index a403b53e86b9..76083ae92138 100644
--- a/drivers/usb/host/whci/qset.c
+++ b/drivers/usb/host/whci/qset.c
@@ -443,7 +443,7 @@ static int qset_add_urb_sg(struct whc *whc, struct whc_qset *qset, struct urb *u
443 443
444 remaining = urb->transfer_buffer_length; 444 remaining = urb->transfer_buffer_length;
445 445
446 for_each_sg(urb->sg, sg, urb->num_sgs, i) { 446 for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) {
447 dma_addr_t dma_addr; 447 dma_addr_t dma_addr;
448 size_t dma_remaining; 448 size_t dma_remaining;
449 dma_addr_t sp, ep; 449 dma_addr_t sp, ep;
@@ -561,7 +561,7 @@ static int qset_add_urb_sg_linearize(struct whc *whc, struct whc_qset *qset,
561 561
562 remaining = urb->transfer_buffer_length; 562 remaining = urb->transfer_buffer_length;
563 563
564 for_each_sg(urb->sg, sg, urb->num_sgs, i) { 564 for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) {
565 size_t len; 565 size_t len;
566 size_t sg_remaining; 566 size_t sg_remaining;
567 void *orig; 567 void *orig;
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 430e88fd3f6c..35e257f79c7b 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -57,17 +57,15 @@ static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
57 desc->bHubContrCurrent = 0; 57 desc->bHubContrCurrent = 0;
58 58
59 desc->bNbrPorts = ports; 59 desc->bNbrPorts = ports;
60 /* Ugh, these should be #defines, FIXME */
61 /* Using table 11-13 in USB 2.0 spec. */
62 temp = 0; 60 temp = 0;
63 /* Bits 1:0 - support port power switching, or power always on */ 61 /* Bits 1:0 - support per-port power switching, or power always on */
64 if (HCC_PPC(xhci->hcc_params)) 62 if (HCC_PPC(xhci->hcc_params))
65 temp |= 0x0001; 63 temp |= HUB_CHAR_INDV_PORT_LPSM;
66 else 64 else
67 temp |= 0x0002; 65 temp |= HUB_CHAR_NO_LPSM;
68 /* Bit 2 - root hubs are not part of a compound device */ 66 /* Bit 2 - root hubs are not part of a compound device */
69 /* Bits 4:3 - individual port over current protection */ 67 /* Bits 4:3 - individual port over current protection */
70 temp |= 0x0008; 68 temp |= HUB_CHAR_INDV_PORT_OCPM;
71 /* Bits 6:5 - no TTs in root ports */ 69 /* Bits 6:5 - no TTs in root ports */
72 /* Bit 7 - no port indicators */ 70 /* Bit 7 - no port indicators */
73 desc->wHubCharacteristics = cpu_to_le16(temp); 71 desc->wHubCharacteristics = cpu_to_le16(temp);
@@ -86,9 +84,9 @@ static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
86 ports = xhci->num_usb2_ports; 84 ports = xhci->num_usb2_ports;
87 85
88 xhci_common_hub_descriptor(xhci, desc, ports); 86 xhci_common_hub_descriptor(xhci, desc, ports);
89 desc->bDescriptorType = 0x29; 87 desc->bDescriptorType = USB_DT_HUB;
90 temp = 1 + (ports / 8); 88 temp = 1 + (ports / 8);
91 desc->bDescLength = 7 + 2 * temp; 89 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
92 90
93 /* The Device Removable bits are reported on a byte granularity. 91 /* The Device Removable bits are reported on a byte granularity.
94 * If the port doesn't exist within that byte, the bit is set to 0. 92 * If the port doesn't exist within that byte, the bit is set to 0.
@@ -137,8 +135,8 @@ static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
137 135
138 ports = xhci->num_usb3_ports; 136 ports = xhci->num_usb3_ports;
139 xhci_common_hub_descriptor(xhci, desc, ports); 137 xhci_common_hub_descriptor(xhci, desc, ports);
140 desc->bDescriptorType = 0x2a; 138 desc->bDescriptorType = USB_DT_SS_HUB;
141 desc->bDescLength = 12; 139 desc->bDescLength = USB_DT_SS_HUB_SIZE;
142 140
143 /* header decode latency should be zero for roothubs, 141 /* header decode latency should be zero for roothubs,
144 * see section 4.23.5.2. 142 * see section 4.23.5.2.
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 0e4b25fa3bcd..36cbe2226a44 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -42,15 +42,12 @@ static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flag
42 seg = kzalloc(sizeof *seg, flags); 42 seg = kzalloc(sizeof *seg, flags);
43 if (!seg) 43 if (!seg)
44 return NULL; 44 return NULL;
45 xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg);
46 45
47 seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma); 46 seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma);
48 if (!seg->trbs) { 47 if (!seg->trbs) {
49 kfree(seg); 48 kfree(seg);
50 return NULL; 49 return NULL;
51 } 50 }
52 xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n",
53 seg->trbs, (unsigned long long)dma);
54 51
55 memset(seg->trbs, 0, SEGMENT_SIZE); 52 memset(seg->trbs, 0, SEGMENT_SIZE);
56 seg->dma = dma; 53 seg->dma = dma;
@@ -62,12 +59,9 @@ static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flag
62static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) 59static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
63{ 60{
64 if (seg->trbs) { 61 if (seg->trbs) {
65 xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n",
66 seg->trbs, (unsigned long long)seg->dma);
67 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); 62 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
68 seg->trbs = NULL; 63 seg->trbs = NULL;
69 } 64 }
70 xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg);
71 kfree(seg); 65 kfree(seg);
72} 66}
73 67
@@ -101,9 +95,6 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
101 val |= TRB_CHAIN; 95 val |= TRB_CHAIN;
102 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val); 96 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);
103 } 97 }
104 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
105 (unsigned long long)prev->dma,
106 (unsigned long long)next->dma);
107} 98}
108 99
109/* XXX: Do we need the hcd structure in all these functions? */ 100/* XXX: Do we need the hcd structure in all these functions? */
@@ -117,7 +108,6 @@ void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
117 if (ring->first_seg) { 108 if (ring->first_seg) {
118 first_seg = ring->first_seg; 109 first_seg = ring->first_seg;
119 seg = first_seg->next; 110 seg = first_seg->next;
120 xhci_dbg(xhci, "Freeing ring at %p\n", ring);
121 while (seg != first_seg) { 111 while (seg != first_seg) {
122 struct xhci_segment *next = seg->next; 112 struct xhci_segment *next = seg->next;
123 xhci_segment_free(xhci, seg); 113 xhci_segment_free(xhci, seg);
@@ -160,7 +150,6 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
160 struct xhci_segment *prev; 150 struct xhci_segment *prev;
161 151
162 ring = kzalloc(sizeof *(ring), flags); 152 ring = kzalloc(sizeof *(ring), flags);
163 xhci_dbg(xhci, "Allocating ring at %p\n", ring);
164 if (!ring) 153 if (!ring)
165 return NULL; 154 return NULL;
166 155
@@ -191,9 +180,6 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
191 /* See section 4.9.2.1 and 6.4.4.1 */ 180 /* See section 4.9.2.1 and 6.4.4.1 */
192 prev->trbs[TRBS_PER_SEGMENT-1].link.control |= 181 prev->trbs[TRBS_PER_SEGMENT-1].link.control |=
193 cpu_to_le32(LINK_TOGGLE); 182 cpu_to_le32(LINK_TOGGLE);
194 xhci_dbg(xhci, "Wrote link toggle flag to"
195 " segment %p (virtual), 0x%llx (DMA)\n",
196 prev, (unsigned long long)prev->dma);
197 } 183 }
198 xhci_initialize_ring_info(ring); 184 xhci_initialize_ring_info(ring);
199 return ring; 185 return ring;
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 9f1d4b15d818..b90e1386418b 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -155,10 +155,6 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer
155 while (last_trb(xhci, ring, ring->deq_seg, next)) { 155 while (last_trb(xhci, ring, ring->deq_seg, next)) {
156 if (consumer && last_trb_on_last_seg(xhci, ring, ring->deq_seg, next)) { 156 if (consumer && last_trb_on_last_seg(xhci, ring, ring->deq_seg, next)) {
157 ring->cycle_state = (ring->cycle_state ? 0 : 1); 157 ring->cycle_state = (ring->cycle_state ? 0 : 1);
158 if (!in_interrupt())
159 xhci_dbg(xhci, "Toggle cycle state for ring %p = %i\n",
160 ring,
161 (unsigned int) ring->cycle_state);
162 } 158 }
163 ring->deq_seg = ring->deq_seg->next; 159 ring->deq_seg = ring->deq_seg->next;
164 ring->dequeue = ring->deq_seg->trbs; 160 ring->dequeue = ring->deq_seg->trbs;
@@ -231,10 +227,6 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
231 /* Toggle the cycle bit after the last ring segment. */ 227 /* Toggle the cycle bit after the last ring segment. */
232 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { 228 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
233 ring->cycle_state = (ring->cycle_state ? 0 : 1); 229 ring->cycle_state = (ring->cycle_state ? 0 : 1);
234 if (!in_interrupt())
235 xhci_dbg(xhci, "Toggle cycle state for ring %p = %i\n",
236 ring,
237 (unsigned int) ring->cycle_state);
238 } 230 }
239 } 231 }
240 ring->enq_seg = ring->enq_seg->next; 232 ring->enq_seg = ring->enq_seg->next;
@@ -560,12 +552,9 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
560 cpu_to_le32(TRB_CYCLE); 552 cpu_to_le32(TRB_CYCLE);
561 cur_trb->generic.field[3] |= cpu_to_le32( 553 cur_trb->generic.field[3] |= cpu_to_le32(
562 TRB_TYPE(TRB_TR_NOOP)); 554 TRB_TYPE(TRB_TR_NOOP));
563 xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) " 555 xhci_dbg(xhci, "TRB to noop at offset 0x%llx\n",
564 "in seg %p (0x%llx dma)\n", 556 (unsigned long long)
565 cur_trb, 557 xhci_trb_virt_to_dma(cur_seg, cur_trb));
566 (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
567 cur_seg,
568 (unsigned long long)cur_seg->dma);
569 } 558 }
570 if (cur_trb == cur_td->last_trb) 559 if (cur_trb == cur_td->last_trb)
571 break; 560 break;
@@ -705,9 +694,9 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci,
705 */ 694 */
706 list_for_each(entry, &ep->cancelled_td_list) { 695 list_for_each(entry, &ep->cancelled_td_list) {
707 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list); 696 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
708 xhci_dbg(xhci, "Cancelling TD starting at %p, 0x%llx (dma).\n", 697 xhci_dbg(xhci, "Removing canceled TD starting at 0x%llx (dma).\n",
709 cur_td->first_trb, 698 (unsigned long long)xhci_trb_virt_to_dma(
710 (unsigned long long)xhci_trb_virt_to_dma(cur_td->start_seg, cur_td->first_trb)); 699 cur_td->start_seg, cur_td->first_trb));
711 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb); 700 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
712 if (!ep_ring) { 701 if (!ep_ring) {
713 /* This shouldn't happen unless a driver is mucking 702 /* This shouldn't happen unless a driver is mucking
@@ -1627,7 +1616,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1627 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index); 1616 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1628 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1617 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1629 1618
1630 xhci_debug_trb(xhci, xhci->event_ring->dequeue);
1631 switch (trb_comp_code) { 1619 switch (trb_comp_code) {
1632 case COMP_SUCCESS: 1620 case COMP_SUCCESS:
1633 if (event_trb == ep_ring->dequeue) { 1621 if (event_trb == ep_ring->dequeue) {
@@ -1643,7 +1631,6 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1643 } 1631 }
1644 break; 1632 break;
1645 case COMP_SHORT_TX: 1633 case COMP_SHORT_TX:
1646 xhci_warn(xhci, "WARN: short transfer on control ep\n");
1647 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 1634 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
1648 *status = -EREMOTEIO; 1635 *status = -EREMOTEIO;
1649 else 1636 else
@@ -1946,6 +1933,16 @@ static int handle_tx_event(struct xhci_hcd *xhci,
1946 xdev = xhci->devs[slot_id]; 1933 xdev = xhci->devs[slot_id];
1947 if (!xdev) { 1934 if (!xdev) {
1948 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n"); 1935 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
1936 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
1937 (unsigned long long) xhci_trb_virt_to_dma(
1938 xhci->event_ring->deq_seg,
1939 xhci->event_ring->dequeue),
1940 lower_32_bits(le64_to_cpu(event->buffer)),
1941 upper_32_bits(le64_to_cpu(event->buffer)),
1942 le32_to_cpu(event->transfer_len),
1943 le32_to_cpu(event->flags));
1944 xhci_dbg(xhci, "Event ring:\n");
1945 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
1949 return -ENODEV; 1946 return -ENODEV;
1950 } 1947 }
1951 1948
@@ -1959,6 +1956,16 @@ static int handle_tx_event(struct xhci_hcd *xhci,
1959 EP_STATE_DISABLED) { 1956 EP_STATE_DISABLED) {
1960 xhci_err(xhci, "ERROR Transfer event for disabled endpoint " 1957 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
1961 "or incorrect stream ring\n"); 1958 "or incorrect stream ring\n");
1959 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
1960 (unsigned long long) xhci_trb_virt_to_dma(
1961 xhci->event_ring->deq_seg,
1962 xhci->event_ring->dequeue),
1963 lower_32_bits(le64_to_cpu(event->buffer)),
1964 upper_32_bits(le64_to_cpu(event->buffer)),
1965 le32_to_cpu(event->transfer_len),
1966 le32_to_cpu(event->flags));
1967 xhci_dbg(xhci, "Event ring:\n");
1968 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
1962 return -ENODEV; 1969 return -ENODEV;
1963 } 1970 }
1964 1971
@@ -1985,7 +1992,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
1985 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n"); 1992 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
1986 break; 1993 break;
1987 case COMP_STALL: 1994 case COMP_STALL:
1988 xhci_warn(xhci, "WARN: Stalled endpoint\n"); 1995 xhci_dbg(xhci, "Stalled endpoint\n");
1989 ep->ep_state |= EP_HALTED; 1996 ep->ep_state |= EP_HALTED;
1990 status = -EPIPE; 1997 status = -EPIPE;
1991 break; 1998 break;
@@ -1995,11 +2002,11 @@ static int handle_tx_event(struct xhci_hcd *xhci,
1995 break; 2002 break;
1996 case COMP_SPLIT_ERR: 2003 case COMP_SPLIT_ERR:
1997 case COMP_TX_ERR: 2004 case COMP_TX_ERR:
1998 xhci_warn(xhci, "WARN: transfer error on endpoint\n"); 2005 xhci_dbg(xhci, "Transfer error on endpoint\n");
1999 status = -EPROTO; 2006 status = -EPROTO;
2000 break; 2007 break;
2001 case COMP_BABBLE: 2008 case COMP_BABBLE:
2002 xhci_warn(xhci, "WARN: babble error on endpoint\n"); 2009 xhci_dbg(xhci, "Babble error on endpoint\n");
2003 status = -EOVERFLOW; 2010 status = -EOVERFLOW;
2004 break; 2011 break;
2005 case COMP_DB_ERR: 2012 case COMP_DB_ERR:
@@ -2390,17 +2397,7 @@ hw_died:
2390 2397
2391irqreturn_t xhci_msi_irq(int irq, struct usb_hcd *hcd) 2398irqreturn_t xhci_msi_irq(int irq, struct usb_hcd *hcd)
2392{ 2399{
2393 irqreturn_t ret; 2400 return xhci_irq(hcd);
2394 struct xhci_hcd *xhci;
2395
2396 xhci = hcd_to_xhci(hcd);
2397 set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
2398 if (xhci->shared_hcd)
2399 set_bit(HCD_FLAG_SAW_IRQ, &xhci->shared_hcd->flags);
2400
2401 ret = xhci_irq(hcd);
2402
2403 return ret;
2404} 2401}
2405 2402
2406/**** Endpoint Ring Operations ****/ 2403/**** Endpoint Ring Operations ****/
@@ -2488,11 +2485,6 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2488 /* Toggle the cycle bit after the last ring segment. */ 2485 /* Toggle the cycle bit after the last ring segment. */
2489 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { 2486 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
2490 ring->cycle_state = (ring->cycle_state ? 0 : 1); 2487 ring->cycle_state = (ring->cycle_state ? 0 : 1);
2491 if (!in_interrupt()) {
2492 xhci_dbg(xhci, "queue_trb: Toggle cycle "
2493 "state for ring %p = %i\n",
2494 ring, (unsigned int)ring->cycle_state);
2495 }
2496 } 2488 }
2497 ring->enq_seg = ring->enq_seg->next; 2489 ring->enq_seg = ring->enq_seg->next;
2498 ring->enqueue = ring->enq_seg->trbs; 2490 ring->enqueue = ring->enq_seg->trbs;
@@ -2561,13 +2553,11 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb)
2561 struct scatterlist *sg; 2553 struct scatterlist *sg;
2562 2554
2563 sg = NULL; 2555 sg = NULL;
2564 num_sgs = urb->num_sgs; 2556 num_sgs = urb->num_mapped_sgs;
2565 temp = urb->transfer_buffer_length; 2557 temp = urb->transfer_buffer_length;
2566 2558
2567 xhci_dbg(xhci, "count sg list trbs: \n");
2568 num_trbs = 0; 2559 num_trbs = 0;
2569 for_each_sg(urb->sg, sg, num_sgs, i) { 2560 for_each_sg(urb->sg, sg, num_sgs, i) {
2570 unsigned int previous_total_trbs = num_trbs;
2571 unsigned int len = sg_dma_len(sg); 2561 unsigned int len = sg_dma_len(sg);
2572 2562
2573 /* Scatter gather list entries may cross 64KB boundaries */ 2563 /* Scatter gather list entries may cross 64KB boundaries */
@@ -2582,22 +2572,11 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb)
2582 num_trbs++; 2572 num_trbs++;
2583 running_total += TRB_MAX_BUFF_SIZE; 2573 running_total += TRB_MAX_BUFF_SIZE;
2584 } 2574 }
2585 xhci_dbg(xhci, " sg #%d: dma = %#llx, len = %#x (%d), num_trbs = %d\n",
2586 i, (unsigned long long)sg_dma_address(sg),
2587 len, len, num_trbs - previous_total_trbs);
2588
2589 len = min_t(int, len, temp); 2575 len = min_t(int, len, temp);
2590 temp -= len; 2576 temp -= len;
2591 if (temp == 0) 2577 if (temp == 0)
2592 break; 2578 break;
2593 } 2579 }
2594 xhci_dbg(xhci, "\n");
2595 if (!in_interrupt())
2596 xhci_dbg(xhci, "ep %#x - urb len = %d, sglist used, "
2597 "num_trbs = %d\n",
2598 urb->ep->desc.bEndpointAddress,
2599 urb->transfer_buffer_length,
2600 num_trbs);
2601 return num_trbs; 2580 return num_trbs;
2602} 2581}
2603 2582
@@ -2745,7 +2724,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2745 return -EINVAL; 2724 return -EINVAL;
2746 2725
2747 num_trbs = count_sg_trbs_needed(xhci, urb); 2726 num_trbs = count_sg_trbs_needed(xhci, urb);
2748 num_sgs = urb->num_sgs; 2727 num_sgs = urb->num_mapped_sgs;
2749 total_packet_count = roundup(urb->transfer_buffer_length, 2728 total_packet_count = roundup(urb->transfer_buffer_length,
2750 usb_endpoint_maxp(&urb->ep->desc)); 2729 usb_endpoint_maxp(&urb->ep->desc));
2751 2730
@@ -2783,8 +2762,6 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2783 trb_buff_len = min_t(int, trb_buff_len, this_sg_len); 2762 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
2784 if (trb_buff_len > urb->transfer_buffer_length) 2763 if (trb_buff_len > urb->transfer_buffer_length)
2785 trb_buff_len = urb->transfer_buffer_length; 2764 trb_buff_len = urb->transfer_buffer_length;
2786 xhci_dbg(xhci, "First length to xfer from 1st sglist entry = %u\n",
2787 trb_buff_len);
2788 2765
2789 first_trb = true; 2766 first_trb = true;
2790 /* Queue the first TRB, even if it's zero-length */ 2767 /* Queue the first TRB, even if it's zero-length */
@@ -2816,11 +2793,6 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2816 if (usb_urb_dir_in(urb)) 2793 if (usb_urb_dir_in(urb))
2817 field |= TRB_ISP; 2794 field |= TRB_ISP;
2818 2795
2819 xhci_dbg(xhci, " sg entry: dma = %#x, len = %#x (%d), "
2820 "64KB boundary at %#x, end dma = %#x\n",
2821 (unsigned int) addr, trb_buff_len, trb_buff_len,
2822 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
2823 (unsigned int) addr + trb_buff_len);
2824 if (TRB_MAX_BUFF_SIZE - 2796 if (TRB_MAX_BUFF_SIZE -
2825 (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) { 2797 (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) {
2826 xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n"); 2798 xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n");
@@ -2926,15 +2898,6 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
2926 } 2898 }
2927 /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ 2899 /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */
2928 2900
2929 if (!in_interrupt())
2930 xhci_dbg(xhci, "ep %#x - urb len = %#x (%d), "
2931 "addr = %#llx, num_trbs = %d\n",
2932 urb->ep->desc.bEndpointAddress,
2933 urb->transfer_buffer_length,
2934 urb->transfer_buffer_length,
2935 (unsigned long long)urb->transfer_dma,
2936 num_trbs);
2937
2938 ret = prepare_transfer(xhci, xhci->devs[slot_id], 2901 ret = prepare_transfer(xhci, xhci->devs[slot_id],
2939 ep_index, urb->stream_id, 2902 ep_index, urb->stream_id,
2940 num_trbs, urb, 0, false, mem_flags); 2903 num_trbs, urb, 0, false, mem_flags);
@@ -3055,9 +3018,6 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3055 if (!urb->setup_packet) 3018 if (!urb->setup_packet)
3056 return -EINVAL; 3019 return -EINVAL;
3057 3020
3058 if (!in_interrupt())
3059 xhci_dbg(xhci, "Queueing ctrl tx for slot id %d, ep %d\n",
3060 slot_id, ep_index);
3061 /* 1 TRB for setup, 1 for status */ 3021 /* 1 TRB for setup, 1 for status */
3062 num_trbs = 2; 3022 num_trbs = 2;
3063 /* 3023 /*
@@ -3249,15 +3209,6 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3249 return -EINVAL; 3209 return -EINVAL;
3250 } 3210 }
3251 3211
3252 if (!in_interrupt())
3253 xhci_dbg(xhci, "ep %#x - urb len = %#x (%d),"
3254 " addr = %#llx, num_tds = %d\n",
3255 urb->ep->desc.bEndpointAddress,
3256 urb->transfer_buffer_length,
3257 urb->transfer_buffer_length,
3258 (unsigned long long)urb->transfer_dma,
3259 num_tds);
3260
3261 start_addr = (u64) urb->transfer_dma; 3212 start_addr = (u64) urb->transfer_dma;
3262 start_trb = &ep_ring->enqueue->generic; 3213 start_trb = &ep_ring->enqueue->generic;
3263 start_cycle = ep_ring->cycle_state; 3214 start_cycle = ep_ring->cycle_state;
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index a1afb7c39f7e..6bbe3c3a7111 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -200,14 +200,14 @@ static int xhci_setup_msi(struct xhci_hcd *xhci)
200 200
201 ret = pci_enable_msi(pdev); 201 ret = pci_enable_msi(pdev);
202 if (ret) { 202 if (ret) {
203 xhci_err(xhci, "failed to allocate MSI entry\n"); 203 xhci_dbg(xhci, "failed to allocate MSI entry\n");
204 return ret; 204 return ret;
205 } 205 }
206 206
207 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq, 207 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
208 0, "xhci_hcd", xhci_to_hcd(xhci)); 208 0, "xhci_hcd", xhci_to_hcd(xhci));
209 if (ret) { 209 if (ret) {
210 xhci_err(xhci, "disable MSI interrupt\n"); 210 xhci_dbg(xhci, "disable MSI interrupt\n");
211 pci_disable_msi(pdev); 211 pci_disable_msi(pdev);
212 } 212 }
213 213
@@ -270,7 +270,7 @@ static int xhci_setup_msix(struct xhci_hcd *xhci)
270 270
271 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count); 271 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
272 if (ret) { 272 if (ret) {
273 xhci_err(xhci, "Failed to enable MSI-X\n"); 273 xhci_dbg(xhci, "Failed to enable MSI-X\n");
274 goto free_entries; 274 goto free_entries;
275 } 275 }
276 276
@@ -286,7 +286,7 @@ static int xhci_setup_msix(struct xhci_hcd *xhci)
286 return ret; 286 return ret;
287 287
288disable_msix: 288disable_msix:
289 xhci_err(xhci, "disable MSI-X interrupt\n"); 289 xhci_dbg(xhci, "disable MSI-X interrupt\n");
290 xhci_free_irq(xhci); 290 xhci_free_irq(xhci);
291 pci_disable_msix(pdev); 291 pci_disable_msix(pdev);
292free_entries: 292free_entries:
@@ -1333,9 +1333,6 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1333 goto done; 1333 goto done;
1334 } 1334 }
1335 1335
1336 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1337 xhci_dbg(xhci, "Event ring:\n");
1338 xhci_debug_ring(xhci, xhci->event_ring);
1339 ep_index = xhci_get_endpoint_index(&urb->ep->desc); 1336 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1340 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index]; 1337 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1341 ep_ring = xhci_urb_to_transfer_ring(xhci, urb); 1338 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
@@ -1344,12 +1341,18 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1344 goto done; 1341 goto done;
1345 } 1342 }
1346 1343
1347 xhci_dbg(xhci, "Endpoint ring:\n");
1348 xhci_debug_ring(xhci, ep_ring);
1349
1350 urb_priv = urb->hcpriv; 1344 urb_priv = urb->hcpriv;
1351 1345 i = urb_priv->td_cnt;
1352 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) { 1346 if (i < urb_priv->length)
1347 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1348 "starting at offset 0x%llx\n",
1349 urb, urb->dev->devpath,
1350 urb->ep->desc.bEndpointAddress,
1351 (unsigned long long) xhci_trb_virt_to_dma(
1352 urb_priv->td[i]->start_seg,
1353 urb_priv->td[i]->first_trb));
1354
1355 for (; i < urb_priv->length; i++) {
1353 td = urb_priv->td[i]; 1356 td = urb_priv->td[i];
1354 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list); 1357 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1355 } 1358 }
@@ -1620,6 +1623,7 @@ static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1620 /* FIXME: can we allocate more resources for the HC? */ 1623 /* FIXME: can we allocate more resources for the HC? */
1621 break; 1624 break;
1622 case COMP_BW_ERR: 1625 case COMP_BW_ERR:
1626 case COMP_2ND_BW_ERR:
1623 dev_warn(&udev->dev, "Not enough bandwidth " 1627 dev_warn(&udev->dev, "Not enough bandwidth "
1624 "for new device state.\n"); 1628 "for new device state.\n");
1625 ret = -ENOSPC; 1629 ret = -ENOSPC;
@@ -2796,8 +2800,7 @@ static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2796 if (ret < 0) 2800 if (ret < 0)
2797 return ret; 2801 return ret;
2798 2802
2799 max_streams = USB_SS_MAX_STREAMS( 2803 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2800 eps[i]->ss_ep_comp.bmAttributes);
2801 if (max_streams < (*num_streams - 1)) { 2804 if (max_streams < (*num_streams - 1)) {
2802 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n", 2805 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2803 eps[i]->desc.bEndpointAddress, 2806 eps[i]->desc.bEndpointAddress,
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 3c8fbd2772ea..fb99c8379142 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1033,7 +1033,6 @@ struct xhci_transfer_event {
1033/* Invalid Stream ID Error */ 1033/* Invalid Stream ID Error */
1034#define COMP_STRID_ERR 34 1034#define COMP_STRID_ERR 34
1035/* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */ 1035/* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */
1036/* FIXME - check for this */
1037#define COMP_2ND_BW_ERR 35 1036#define COMP_2ND_BW_ERR 35
1038/* Split Transaction Error */ 1037/* Split Transaction Error */
1039#define COMP_SPLIT_ERR 36 1038#define COMP_SPLIT_ERR 36
@@ -1356,7 +1355,7 @@ static inline unsigned int hcd_index(struct usb_hcd *hcd)
1356 return 1; 1355 return 1;
1357} 1356}
1358 1357
1359/* There is one ehci_hci structure per controller */ 1358/* There is one xhci_hcd structure per controller */
1360struct xhci_hcd { 1359struct xhci_hcd {
1361 struct usb_hcd *main_hcd; 1360 struct usb_hcd *main_hcd;
1362 struct usb_hcd *shared_hcd; 1361 struct usb_hcd *shared_hcd;
diff --git a/drivers/usb/misc/isight_firmware.c b/drivers/usb/misc/isight_firmware.c
index 1dc7e9581cc6..1c61830e96f9 100644
--- a/drivers/usb/misc/isight_firmware.c
+++ b/drivers/usb/misc/isight_firmware.c
@@ -55,8 +55,9 @@ static int isight_firmware_load(struct usb_interface *intf,
55 55
56 ptr = firmware->data; 56 ptr = firmware->data;
57 57
58 buf[0] = 0x01;
58 if (usb_control_msg 59 if (usb_control_msg
59 (dev, usb_sndctrlpipe(dev, 0), 0xa0, 0x40, 0xe600, 0, "\1", 1, 60 (dev, usb_sndctrlpipe(dev, 0), 0xa0, 0x40, 0xe600, 0, buf, 1,
60 300) != 1) { 61 300) != 1) {
61 printk(KERN_ERR 62 printk(KERN_ERR
62 "Failed to initialise isight firmware loader\n"); 63 "Failed to initialise isight firmware loader\n");
@@ -100,8 +101,9 @@ static int isight_firmware_load(struct usb_interface *intf,
100 } 101 }
101 } 102 }
102 103
104 buf[0] = 0x00;
103 if (usb_control_msg 105 if (usb_control_msg
104 (dev, usb_sndctrlpipe(dev, 0), 0xa0, 0x40, 0xe600, 0, "\0", 1, 106 (dev, usb_sndctrlpipe(dev, 0), 0xa0, 0x40, 0xe600, 0, buf, 1,
105 300) != 1) { 107 300) != 1) {
106 printk(KERN_ERR "isight firmware loading completion failed\n"); 108 printk(KERN_ERR "isight firmware loading completion failed\n");
107 ret = -ENODEV; 109 ret = -ENODEV;
diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
index bd6d00802eab..959145baf3cf 100644
--- a/drivers/usb/misc/usbtest.c
+++ b/drivers/usb/misc/usbtest.c
@@ -1765,7 +1765,6 @@ static int test_unaligned_bulk(
1765 * off just killing the userspace task and waiting for it to exit. 1765 * off just killing the userspace task and waiting for it to exit.
1766 */ 1766 */
1767 1767
1768/* No BKL needed */
1769static int 1768static int
1770usbtest_ioctl(struct usb_interface *intf, unsigned int code, void *buf) 1769usbtest_ioctl(struct usb_interface *intf, unsigned int code, void *buf)
1771{ 1770{
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 07a03460a598..f70cab3beeec 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -5,14 +5,13 @@
5 5
6# (M)HDRC = (Multipoint) Highspeed Dual-Role Controller 6# (M)HDRC = (Multipoint) Highspeed Dual-Role Controller
7config USB_MUSB_HDRC 7config USB_MUSB_HDRC
8 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)'
8 depends on USB && USB_GADGET 9 depends on USB && USB_GADGET
9 depends on (ARM || (BF54x && !BF544) || (BF52x && !BF522 && !BF523))
10 select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN) 10 select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN)
11 select TWL4030_USB if MACH_OMAP_3430SDP 11 select TWL4030_USB if MACH_OMAP_3430SDP
12 select TWL6030_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA 12 select TWL6030_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA
13 select USB_OTG_UTILS 13 select USB_OTG_UTILS
14 select USB_GADGET_DUALSPEED 14 select USB_GADGET_DUALSPEED
15 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)'
16 help 15 help
17 Say Y here if your system has a dual role high speed USB 16 Say Y here if your system has a dual role high speed USB
18 controller based on the Mentor Graphics silicon IP. Then 17 controller based on the Mentor Graphics silicon IP. Then
@@ -31,9 +30,10 @@ config USB_MUSB_HDRC
31 To compile this driver as a module, choose M here; the 30 To compile this driver as a module, choose M here; the
32 module will be called "musb-hdrc". 31 module will be called "musb-hdrc".
33 32
33if USB_MUSB_HDRC
34
34choice 35choice
35 prompt "Platform Glue Layer" 36 prompt "Platform Glue Layer"
36 depends on USB_MUSB_HDRC
37 37
38config USB_MUSB_DAVINCI 38config USB_MUSB_DAVINCI
39 tristate "DaVinci" 39 tristate "DaVinci"
@@ -45,7 +45,6 @@ config USB_MUSB_DA8XX
45 45
46config USB_MUSB_TUSB6010 46config USB_MUSB_TUSB6010
47 tristate "TUSB6010" 47 tristate "TUSB6010"
48 depends on ARCH_OMAP
49 48
50config USB_MUSB_OMAP2PLUS 49config USB_MUSB_OMAP2PLUS
51 tristate "OMAP2430 and onwards" 50 tristate "OMAP2430 and onwards"
@@ -65,46 +64,54 @@ config USB_MUSB_UX500
65 64
66endchoice 65endchoice
67 66
68config MUSB_PIO_ONLY 67choice
69 bool 'Disable DMA (always use PIO)' 68 prompt 'MUSB DMA mode'
70 depends on USB_MUSB_HDRC 69 default USB_UX500_DMA if USB_MUSB_UX500
71 default USB_MUSB_TUSB6010 || USB_MUSB_DA8XX || USB_MUSB_AM35X 70 default USB_INVENTRA_DMA if USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN
71 default USB_TI_CPPI_DMA if USB_MUSB_DAVINCI
72 default USB_TUSB_OMAP_DMA if USB_MUSB_TUSB6010
73 default MUSB_PIO_ONLY if USB_MUSB_TUSB6010 || USB_MUSB_DA8XX || USB_MUSB_AM35X
72 help 74 help
73 All data is copied between memory and FIFO by the CPU. 75 Unfortunately, only one option can be enabled here. Ideally one
74 DMA controllers are ignored. 76 should be able to build all these drivers into one kernel to
75 77 allow using DMA on multiplatform kernels.
76 Do not select 'n' here unless DMA support for your SOC or board
77 is unavailable (or unstable). When DMA is enabled at compile time,
78 you can still disable it at run time using the "use_dma=n" module
79 parameter.
80 78
81config USB_UX500_DMA 79config USB_UX500_DMA
82 bool 80 bool 'ST Ericsson U8500 and U5500'
83 depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY 81 depends on USB_MUSB_UX500
84 default USB_MUSB_UX500
85 help 82 help
86 Enable DMA transfers on UX500 platforms. 83 Enable DMA transfers on UX500 platforms.
87 84
88config USB_INVENTRA_DMA 85config USB_INVENTRA_DMA
89 bool 86 bool 'Inventra'
90 depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY 87 depends on USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN
91 default USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN
92 help 88 help
93 Enable DMA transfers using Mentor's engine. 89 Enable DMA transfers using Mentor's engine.
94 90
95config USB_TI_CPPI_DMA 91config USB_TI_CPPI_DMA
96 bool 92 bool 'TI CPPI (Davinci)'
97 depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY 93 depends on USB_MUSB_DAVINCI
98 default USB_MUSB_DAVINCI
99 help 94 help
100 Enable DMA transfers when TI CPPI DMA is available. 95 Enable DMA transfers when TI CPPI DMA is available.
101 96
102config USB_TUSB_OMAP_DMA 97config USB_TUSB_OMAP_DMA
103 bool 98 bool 'TUSB 6010'
104 depends on USB_MUSB_HDRC && !MUSB_PIO_ONLY
105 depends on USB_MUSB_TUSB6010 99 depends on USB_MUSB_TUSB6010
106 depends on ARCH_OMAP 100 depends on ARCH_OMAP
107 default y
108 help 101 help
109 Enable DMA transfers on TUSB 6010 when OMAP DMA is available. 102 Enable DMA transfers on TUSB 6010 when OMAP DMA is available.
110 103
104config MUSB_PIO_ONLY
105 bool 'Disable DMA (always use PIO)'
106 help
107 All data is copied between memory and FIFO by the CPU.
108 DMA controllers are ignored.
109
110 Do not choose this unless DMA support for your SOC or board
111 is unavailable (or unstable). When DMA is enabled at compile time,
112 you can still disable it at run time using the "use_dma=n" module
113 parameter.
114
115endchoice
116
117endif # USB_MUSB_HDRC
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index d8fd9d092dec..88bfb9dee4bf 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -24,25 +24,7 @@ obj-$(CONFIG_USB_MUSB_UX500) += ux500.o
24# PIO only, or DMA (several potential schemes). 24# PIO only, or DMA (several potential schemes).
25# though PIO is always there to back up DMA, and for ep0 25# though PIO is always there to back up DMA, and for ep0
26 26
27ifneq ($(CONFIG_MUSB_PIO_ONLY),y) 27musb_hdrc-$(CONFIG_USB_INVENTRA_DMA) += musbhsdma.o
28 28musb_hdrc-$(CONFIG_USB_TI_CPPI_DMA) += cppi_dma.o
29 ifeq ($(CONFIG_USB_INVENTRA_DMA),y) 29musb_hdrc-$(CONFIG_USB_TUSB_OMAP_DMA) += tusb6010_omap.o
30 musb_hdrc-y += musbhsdma.o 30musb_hdrc-$(CONFIG_USB_UX500_DMA) += ux500_dma.o
31
32 else
33 ifeq ($(CONFIG_USB_TI_CPPI_DMA),y)
34 musb_hdrc-y += cppi_dma.o
35
36 else
37 ifeq ($(CONFIG_USB_TUSB_OMAP_DMA),y)
38 musb_hdrc-y += tusb6010_omap.o
39
40 else
41 ifeq ($(CONFIG_USB_UX500_DMA),y)
42 musb_hdrc-y += ux500_dma.o
43
44 endif
45 endif
46 endif
47 endif
48endif
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index b63ab1570103..f6ff7923048b 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -661,7 +661,6 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
661 661
662 handled = IRQ_HANDLED; 662 handled = IRQ_HANDLED;
663 musb->is_active = 1; 663 musb->is_active = 1;
664 set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
665 664
666 musb->ep0_stage = MUSB_EP0_START; 665 musb->ep0_stage = MUSB_EP0_START;
667 666
@@ -1432,7 +1431,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
1432 struct musb_hw_ep *hw_ep = musb->endpoints + i; 1431 struct musb_hw_ep *hw_ep = musb->endpoints + i;
1433 1432
1434 hw_ep->fifo = MUSB_FIFO_OFFSET(i) + mbase; 1433 hw_ep->fifo = MUSB_FIFO_OFFSET(i) + mbase;
1435#ifdef CONFIG_USB_MUSB_TUSB6010 1434#if defined(CONFIG_USB_MUSB_TUSB6010) || defined (CONFIG_USB_MUSB_TUSB6010_MODULE)
1436 hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i); 1435 hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i);
1437 hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i); 1436 hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i);
1438 hw_ep->fifo_sync_va = 1437 hw_ep->fifo_sync_va =
@@ -1631,6 +1630,7 @@ void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)
1631 } 1630 }
1632 } 1631 }
1633} 1632}
1633EXPORT_SYMBOL_GPL(musb_dma_completion);
1634 1634
1635#else 1635#else
1636#define use_dma 0 1636#define use_dma 0
@@ -2012,8 +2012,6 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
2012 if (status < 0) 2012 if (status < 0)
2013 goto fail3; 2013 goto fail3;
2014 2014
2015 pm_runtime_put(musb->controller);
2016
2017 status = musb_init_debugfs(musb); 2015 status = musb_init_debugfs(musb);
2018 if (status < 0) 2016 if (status < 0)
2019 goto fail4; 2017 goto fail4;
@@ -2158,6 +2156,7 @@ static void musb_save_context(struct musb *musb)
2158 if (!epio) 2156 if (!epio)
2159 continue; 2157 continue;
2160 2158
2159 musb_writeb(musb_base, MUSB_INDEX, i);
2161 musb->context.index_regs[i].txmaxp = 2160 musb->context.index_regs[i].txmaxp =
2162 musb_readw(epio, MUSB_TXMAXP); 2161 musb_readw(epio, MUSB_TXMAXP);
2163 musb->context.index_regs[i].txcsr = 2162 musb->context.index_regs[i].txcsr =
@@ -2233,6 +2232,7 @@ static void musb_restore_context(struct musb *musb)
2233 if (!epio) 2232 if (!epio)
2234 continue; 2233 continue;
2235 2234
2235 musb_writeb(musb_base, MUSB_INDEX, i);
2236 musb_writew(epio, MUSB_TXMAXP, 2236 musb_writew(epio, MUSB_TXMAXP,
2237 musb->context.index_regs[i].txmaxp); 2237 musb->context.index_regs[i].txmaxp);
2238 musb_writew(epio, MUSB_TXCSR, 2238 musb_writew(epio, MUSB_TXCSR,
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index b3c065ab9dbc..3d28fb8a2dc9 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -40,7 +40,6 @@
40#include <linux/interrupt.h> 40#include <linux/interrupt.h>
41#include <linux/errno.h> 41#include <linux/errno.h>
42#include <linux/timer.h> 42#include <linux/timer.h>
43#include <linux/clk.h>
44#include <linux/device.h> 43#include <linux/device.h>
45#include <linux/usb/ch9.h> 44#include <linux/usb/ch9.h>
46#include <linux/usb/gadget.h> 45#include <linux/usb/gadget.h>
@@ -311,6 +310,7 @@ struct musb_context_registers {
311 u8 index, testmode; 310 u8 index, testmode;
312 311
313 u8 devctl, busctl, misc; 312 u8 devctl, busctl, misc;
313 u32 otg_interfsel;
314 314
315 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 315 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
316}; 316};
@@ -327,6 +327,7 @@ struct musb {
327 327
328 irqreturn_t (*isr)(int, void *); 328 irqreturn_t (*isr)(int, void *);
329 struct work_struct irq_work; 329 struct work_struct irq_work;
330 struct work_struct otg_notifier_work;
330 u16 hwvers; 331 u16 hwvers;
331 332
332/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 333/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
@@ -372,6 +373,7 @@ struct musb {
372 u16 int_tx; 373 u16 int_tx;
373 374
374 struct otg_transceiver *xceiv; 375 struct otg_transceiver *xceiv;
376 u8 xceiv_event;
375 377
376 int nIrq; 378 int nIrq;
377 unsigned irq_wake:1; 379 unsigned irq_wake:1;
diff --git a/drivers/usb/musb/musb_debug.h b/drivers/usb/musb/musb_debug.h
index 742eada5002e..27ba8f799462 100644
--- a/drivers/usb/musb/musb_debug.h
+++ b/drivers/usb/musb/musb_debug.h
@@ -43,8 +43,8 @@
43#define ERR(fmt, args...) yprintk(KERN_ERR, fmt, ## args) 43#define ERR(fmt, args...) yprintk(KERN_ERR, fmt, ## args)
44 44
45#ifdef CONFIG_DEBUG_FS 45#ifdef CONFIG_DEBUG_FS
46extern int musb_init_debugfs(struct musb *musb); 46int musb_init_debugfs(struct musb *musb);
47extern void musb_exit_debugfs(struct musb *musb); 47void musb_exit_debugfs(struct musb *musb);
48#else 48#else
49static inline int musb_init_debugfs(struct musb *musb) 49static inline int musb_init_debugfs(struct musb *musb)
50{ 50{
diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c
index 61f4ee466df7..13d9af9bf920 100644
--- a/drivers/usb/musb/musb_debugfs.c
+++ b/drivers/usb/musb/musb_debugfs.c
@@ -33,11 +33,7 @@
33 33
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/kernel.h> 35#include <linux/kernel.h>
36#include <linux/sched.h>
37#include <linux/init.h> 36#include <linux/init.h>
38#include <linux/list.h>
39#include <linux/platform_device.h>
40#include <linux/io.h>
41#include <linux/debugfs.h> 37#include <linux/debugfs.h>
42#include <linux/seq_file.h> 38#include <linux/seq_file.h>
43 39
@@ -46,10 +42,6 @@
46#include "musb_core.h" 42#include "musb_core.h"
47#include "musb_debug.h" 43#include "musb_debug.h"
48 44
49#ifdef CONFIG_ARCH_DAVINCI
50#include "davinci.h"
51#endif
52
53struct musb_register_map { 45struct musb_register_map {
54 char *name; 46 char *name;
55 unsigned offset; 47 unsigned offset;
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index 922148ff8d29..ac3d2eec20fe 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -40,8 +40,6 @@
40#include <linux/smp.h> 40#include <linux/smp.h>
41#include <linux/spinlock.h> 41#include <linux/spinlock.h>
42#include <linux/delay.h> 42#include <linux/delay.h>
43#include <linux/moduleparam.h>
44#include <linux/stat.h>
45#include <linux/dma-mapping.h> 43#include <linux/dma-mapping.h>
46#include <linux/slab.h> 44#include <linux/slab.h>
47 45
@@ -1844,7 +1842,7 @@ int __init musb_gadget_setup(struct musb *musb)
1844 */ 1842 */
1845 1843
1846 musb->g.ops = &musb_gadget_operations; 1844 musb->g.ops = &musb_gadget_operations;
1847 musb->g.is_dualspeed = 1; 1845 musb->g.max_speed = USB_SPEED_HIGH;
1848 musb->g.speed = USB_SPEED_UNKNOWN; 1846 musb->g.speed = USB_SPEED_UNKNOWN;
1849 1847
1850 /* this "gadget" abstracts/virtualizes the controller */ 1848 /* this "gadget" abstracts/virtualizes the controller */
@@ -1903,7 +1901,7 @@ static int musb_gadget_start(struct usb_gadget *g,
1903 unsigned long flags; 1901 unsigned long flags;
1904 int retval = -EINVAL; 1902 int retval = -EINVAL;
1905 1903
1906 if (driver->speed < USB_SPEED_HIGH) 1904 if (driver->max_speed < USB_SPEED_HIGH)
1907 goto err0; 1905 goto err0;
1908 1906
1909 pm_runtime_get_sync(musb->controller); 1907 pm_runtime_get_sync(musb->controller);
diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c
index 6a0d0467ec74..e40d7647caf1 100644
--- a/drivers/usb/musb/musb_gadget_ep0.c
+++ b/drivers/usb/musb/musb_gadget_ep0.c
@@ -37,7 +37,6 @@
37#include <linux/list.h> 37#include <linux/list.h>
38#include <linux/timer.h> 38#include <linux/timer.h>
39#include <linux/spinlock.h> 39#include <linux/spinlock.h>
40#include <linux/init.h>
41#include <linux/device.h> 40#include <linux/device.h>
42#include <linux/interrupt.h> 41#include <linux/interrupt.h>
43 42
diff --git a/drivers/usb/musb/musb_io.h b/drivers/usb/musb/musb_io.h
index 03c6ccdbb3be..e61aa95f2d2a 100644
--- a/drivers/usb/musb/musb_io.h
+++ b/drivers/usb/musb/musb_io.h
@@ -74,7 +74,7 @@ static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data)
74 { __raw_writel(data, addr + offset); } 74 { __raw_writel(data, addr + offset); }
75 75
76 76
77#ifdef CONFIG_USB_MUSB_TUSB6010 77#if defined(CONFIG_USB_MUSB_TUSB6010) || defined (CONFIG_USB_MUSB_TUSB6010_MODULE)
78 78
79/* 79/*
80 * TUSB6010 doesn't allow 8-bit access; 16-bit access is the minimum. 80 * TUSB6010 doesn't allow 8-bit access; 16-bit access is the minimum.
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index ba85f273e487..c27bbbf32b52 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -29,7 +29,6 @@
29#include <linux/sched.h> 29#include <linux/sched.h>
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/list.h> 31#include <linux/list.h>
32#include <linux/clk.h>
33#include <linux/io.h> 32#include <linux/io.h>
34#include <linux/platform_device.h> 33#include <linux/platform_device.h>
35#include <linux/dma-mapping.h> 34#include <linux/dma-mapping.h>
@@ -228,21 +227,25 @@ static int musb_otg_notifications(struct notifier_block *nb,
228 unsigned long event, void *unused) 227 unsigned long event, void *unused)
229{ 228{
230 struct musb *musb = container_of(nb, struct musb, nb); 229 struct musb *musb = container_of(nb, struct musb, nb);
230
231 musb->xceiv_event = event;
232 schedule_work(&musb->otg_notifier_work);
233
234 return 0;
235}
236
237static void musb_otg_notifier_work(struct work_struct *data_notifier_work)
238{
239 struct musb *musb = container_of(data_notifier_work, struct musb, otg_notifier_work);
231 struct device *dev = musb->controller; 240 struct device *dev = musb->controller;
232 struct musb_hdrc_platform_data *pdata = dev->platform_data; 241 struct musb_hdrc_platform_data *pdata = dev->platform_data;
233 struct omap_musb_board_data *data = pdata->board_data; 242 struct omap_musb_board_data *data = pdata->board_data;
234 243
235 switch (event) { 244 switch (musb->xceiv_event) {
236 case USB_EVENT_ID: 245 case USB_EVENT_ID:
237 dev_dbg(musb->controller, "ID GND\n"); 246 dev_dbg(musb->controller, "ID GND\n");
238 247
239 if (is_otg_enabled(musb)) { 248 if (!is_otg_enabled(musb) || musb->gadget_driver) {
240 if (musb->gadget_driver) {
241 pm_runtime_get_sync(musb->controller);
242 otg_init(musb->xceiv);
243 omap2430_musb_set_vbus(musb, 1);
244 }
245 } else {
246 pm_runtime_get_sync(musb->controller); 249 pm_runtime_get_sync(musb->controller);
247 otg_init(musb->xceiv); 250 otg_init(musb->xceiv);
248 omap2430_musb_set_vbus(musb, 1); 251 omap2430_musb_set_vbus(musb, 1);
@@ -274,10 +277,7 @@ static int musb_otg_notifications(struct notifier_block *nb,
274 break; 277 break;
275 default: 278 default:
276 dev_dbg(musb->controller, "ID float\n"); 279 dev_dbg(musb->controller, "ID float\n");
277 return NOTIFY_DONE;
278 } 280 }
279
280 return NOTIFY_OK;
281} 281}
282 282
283static int omap2430_musb_init(struct musb *musb) 283static int omap2430_musb_init(struct musb *musb)
@@ -297,6 +297,8 @@ static int omap2430_musb_init(struct musb *musb)
297 return -ENODEV; 297 return -ENODEV;
298 } 298 }
299 299
300 INIT_WORK(&musb->otg_notifier_work, musb_otg_notifier_work);
301
300 status = pm_runtime_get_sync(dev); 302 status = pm_runtime_get_sync(dev);
301 if (status < 0) { 303 if (status < 0) {
302 dev_err(dev, "pm_runtime_get_sync FAILED"); 304 dev_err(dev, "pm_runtime_get_sync FAILED");
@@ -334,7 +336,6 @@ static int omap2430_musb_init(struct musb *musb)
334 return 0; 336 return 0;
335 337
336err1: 338err1:
337 pm_runtime_disable(dev);
338 return status; 339 return status;
339} 340}
340 341
@@ -350,20 +351,19 @@ static void omap2430_musb_enable(struct musb *musb)
350 351
351 case USB_EVENT_ID: 352 case USB_EVENT_ID:
352 otg_init(musb->xceiv); 353 otg_init(musb->xceiv);
353 if (data->interface_type == MUSB_INTERFACE_UTMI) { 354 if (data->interface_type != MUSB_INTERFACE_UTMI)
354 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 355 break;
355 /* start the session */ 356 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
356 devctl |= MUSB_DEVCTL_SESSION; 357 /* start the session */
357 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 358 devctl |= MUSB_DEVCTL_SESSION;
358 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 359 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
359 MUSB_DEVCTL_BDEVICE) { 360 while (musb_readb(musb->mregs, MUSB_DEVCTL) &
360 cpu_relax(); 361 MUSB_DEVCTL_BDEVICE) {
361 362 cpu_relax();
362 if (time_after(jiffies, timeout)) { 363
363 dev_err(musb->controller, 364 if (time_after(jiffies, timeout)) {
364 "configured as A device timeout"); 365 dev_err(dev, "configured as A device timeout");
365 break; 366 break;
366 }
367 } 367 }
368 } 368 }
369 break; 369 break;
@@ -478,7 +478,6 @@ static int __exit omap2430_remove(struct platform_device *pdev)
478 platform_device_del(glue->musb); 478 platform_device_del(glue->musb);
479 platform_device_put(glue->musb); 479 platform_device_put(glue->musb);
480 pm_runtime_put(&pdev->dev); 480 pm_runtime_put(&pdev->dev);
481 pm_runtime_disable(&pdev->dev);
482 kfree(glue); 481 kfree(glue);
483 482
484 return 0; 483 return 0;
@@ -491,6 +490,9 @@ static int omap2430_runtime_suspend(struct device *dev)
491 struct omap2430_glue *glue = dev_get_drvdata(dev); 490 struct omap2430_glue *glue = dev_get_drvdata(dev);
492 struct musb *musb = glue_to_musb(glue); 491 struct musb *musb = glue_to_musb(glue);
493 492
493 musb->context.otg_interfsel = musb_readl(musb->mregs,
494 OTG_INTERFSEL);
495
494 omap2430_low_level_exit(musb); 496 omap2430_low_level_exit(musb);
495 otg_set_suspend(musb->xceiv, 1); 497 otg_set_suspend(musb->xceiv, 1);
496 498
@@ -503,6 +505,9 @@ static int omap2430_runtime_resume(struct device *dev)
503 struct musb *musb = glue_to_musb(glue); 505 struct musb *musb = glue_to_musb(glue);
504 506
505 omap2430_low_level_init(musb); 507 omap2430_low_level_init(musb);
508 musb_writel(musb->mregs, OTG_INTERFSEL,
509 musb->context.otg_interfsel);
510
506 otg_set_suspend(musb->xceiv, 0); 511 otg_set_suspend(musb->xceiv, 0);
507 512
508 return 0; 513 return 0;
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index ec1480191f78..1f405616e6cd 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -56,6 +56,7 @@ u8 tusb_get_revision(struct musb *musb)
56 56
57 return rev; 57 return rev;
58} 58}
59EXPORT_SYMBOL_GPL(tusb_get_revision);
59 60
60static int tusb_print_revision(struct musb *musb) 61static int tusb_print_revision(struct musb *musb)
61{ 62{
diff --git a/drivers/usb/musb/ux500_dma.c b/drivers/usb/musb/ux500_dma.c
index ef4333f4bbe0..a163632877af 100644
--- a/drivers/usb/musb/ux500_dma.c
+++ b/drivers/usb/musb/ux500_dma.c
@@ -37,7 +37,6 @@ struct ux500_dma_channel {
37 struct dma_channel channel; 37 struct dma_channel channel;
38 struct ux500_dma_controller *controller; 38 struct ux500_dma_controller *controller;
39 struct musb_hw_ep *hw_ep; 39 struct musb_hw_ep *hw_ep;
40 struct work_struct channel_work;
41 struct dma_chan *dma_chan; 40 struct dma_chan *dma_chan;
42 unsigned int cur_len; 41 unsigned int cur_len;
43 dma_cookie_t cookie; 42 dma_cookie_t cookie;
@@ -56,31 +55,11 @@ struct ux500_dma_controller {
56 dma_addr_t phy_base; 55 dma_addr_t phy_base;
57}; 56};
58 57
59/* Work function invoked from DMA callback to handle tx transfers. */
60static void ux500_tx_work(struct work_struct *data)
61{
62 struct ux500_dma_channel *ux500_channel = container_of(data,
63 struct ux500_dma_channel, channel_work);
64 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep;
65 struct musb *musb = hw_ep->musb;
66 unsigned long flags;
67
68 dev_dbg(musb->controller, "DMA tx transfer done on hw_ep=%d\n",
69 hw_ep->epnum);
70
71 spin_lock_irqsave(&musb->lock, flags);
72 ux500_channel->channel.actual_len = ux500_channel->cur_len;
73 ux500_channel->channel.status = MUSB_DMA_STATUS_FREE;
74 musb_dma_completion(musb, hw_ep->epnum,
75 ux500_channel->is_tx);
76 spin_unlock_irqrestore(&musb->lock, flags);
77}
78
79/* Work function invoked from DMA callback to handle rx transfers. */ 58/* Work function invoked from DMA callback to handle rx transfers. */
80static void ux500_rx_work(struct work_struct *data) 59void ux500_dma_callback(void *private_data)
81{ 60{
82 struct ux500_dma_channel *ux500_channel = container_of(data, 61 struct dma_channel *channel = private_data;
83 struct ux500_dma_channel, channel_work); 62 struct ux500_dma_channel *ux500_channel = channel->private_data;
84 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; 63 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep;
85 struct musb *musb = hw_ep->musb; 64 struct musb *musb = hw_ep->musb;
86 unsigned long flags; 65 unsigned long flags;
@@ -94,14 +73,7 @@ static void ux500_rx_work(struct work_struct *data)
94 musb_dma_completion(musb, hw_ep->epnum, 73 musb_dma_completion(musb, hw_ep->epnum,
95 ux500_channel->is_tx); 74 ux500_channel->is_tx);
96 spin_unlock_irqrestore(&musb->lock, flags); 75 spin_unlock_irqrestore(&musb->lock, flags);
97}
98
99void ux500_dma_callback(void *private_data)
100{
101 struct dma_channel *channel = (struct dma_channel *)private_data;
102 struct ux500_dma_channel *ux500_channel = channel->private_data;
103 76
104 schedule_work(&ux500_channel->channel_work);
105} 77}
106 78
107static bool ux500_configure_channel(struct dma_channel *channel, 79static bool ux500_configure_channel(struct dma_channel *channel,
@@ -330,7 +302,6 @@ static int ux500_dma_controller_start(struct dma_controller *c)
330 void **param_array; 302 void **param_array;
331 struct ux500_dma_channel *channel_array; 303 struct ux500_dma_channel *channel_array;
332 u32 ch_count; 304 u32 ch_count;
333 void (*musb_channel_work)(struct work_struct *);
334 dma_cap_mask_t mask; 305 dma_cap_mask_t mask;
335 306
336 if ((data->num_rx_channels > UX500_MUSB_DMA_NUM_RX_CHANNELS) || 307 if ((data->num_rx_channels > UX500_MUSB_DMA_NUM_RX_CHANNELS) ||
@@ -347,7 +318,6 @@ static int ux500_dma_controller_start(struct dma_controller *c)
347 channel_array = controller->rx_channel; 318 channel_array = controller->rx_channel;
348 ch_count = data->num_rx_channels; 319 ch_count = data->num_rx_channels;
349 param_array = data->dma_rx_param_array; 320 param_array = data->dma_rx_param_array;
350 musb_channel_work = ux500_rx_work;
351 321
352 for (dir = 0; dir < 2; dir++) { 322 for (dir = 0; dir < 2; dir++) {
353 for (ch_num = 0; ch_num < ch_count; ch_num++) { 323 for (ch_num = 0; ch_num < ch_count; ch_num++) {
@@ -374,15 +344,12 @@ static int ux500_dma_controller_start(struct dma_controller *c)
374 return -EBUSY; 344 return -EBUSY;
375 } 345 }
376 346
377 INIT_WORK(&ux500_channel->channel_work,
378 musb_channel_work);
379 } 347 }
380 348
381 /* Prepare the loop for TX channels */ 349 /* Prepare the loop for TX channels */
382 channel_array = controller->tx_channel; 350 channel_array = controller->tx_channel;
383 ch_count = data->num_tx_channels; 351 ch_count = data->num_tx_channels;
384 param_array = data->dma_tx_param_array; 352 param_array = data->dma_tx_param_array;
385 musb_channel_work = ux500_tx_work;
386 is_tx = 1; 353 is_tx = 1;
387 } 354 }
388 355
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index c66481ad98d7..2a25955881fc 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -82,9 +82,9 @@ config NOP_USB_XCEIV
82 tristate "NOP USB Transceiver Driver" 82 tristate "NOP USB Transceiver Driver"
83 select USB_OTG_UTILS 83 select USB_OTG_UTILS
84 help 84 help
85 this driver is to be used by all the usb transceiver which are either 85 This driver is to be used by all the usb transceiver which are either
86 built-in with usb ip or which are autonomous and doesn't require any 86 built-in with usb ip or which are autonomous and doesn't require any
87 phy programming such as ISP1x04 etc. 87 phy programming such as ISP1x04 etc.
88 88
89config USB_LANGWELL_OTG 89config USB_LANGWELL_OTG
90 tristate "Intel Langwell USB OTG dual-role support" 90 tristate "Intel Langwell USB OTG dual-role support"
@@ -114,13 +114,13 @@ config USB_MSM_OTG
114 has an external PHY. 114 has an external PHY.
115 115
116config AB8500_USB 116config AB8500_USB
117 tristate "AB8500 USB Transceiver Driver" 117 tristate "AB8500 USB Transceiver Driver"
118 depends on AB8500_CORE 118 depends on AB8500_CORE
119 select USB_OTG_UTILS 119 select USB_OTG_UTILS
120 help 120 help
121 Enable this to support the USB OTG transceiver in AB8500 chip. 121 Enable this to support the USB OTG transceiver in AB8500 chip.
122 This transceiver supports high and full speed devices plus, 122 This transceiver supports high and full speed devices plus,
123 in host mode, low speed. 123 in host mode, low speed.
124 124
125config FSL_USB2_OTG 125config FSL_USB2_OTG
126 bool "Freescale USB OTG Transceiver Driver" 126 bool "Freescale USB OTG Transceiver Driver"
@@ -130,4 +130,16 @@ config FSL_USB2_OTG
130 help 130 help
131 Enable this to support Freescale USB OTG transceiver. 131 Enable this to support Freescale USB OTG transceiver.
132 132
133config USB_MV_OTG
134 tristate "Marvell USB OTG support"
135 depends on USB_MV_UDC
136 select USB_OTG
137 select USB_OTG_UTILS
138 help
139 Say Y here if you want to build Marvell USB OTG transciever
140 driver in kernel (including PXA and MMP series). This driver
141 implements role switch between EHCI host driver and gadget driver.
142
143 To compile this driver as a module, choose M here.
144
133endif # USB || OTG 145endif # USB || OTG
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 566655c53331..b2c5a9598637 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_USB_MSM_OTG) += msm_otg.o
21obj-$(CONFIG_AB8500_USB) += ab8500-usb.o 21obj-$(CONFIG_AB8500_USB) += ab8500-usb.o
22fsl_usb2_otg-objs := fsl_otg.o otg_fsm.o 22fsl_usb2_otg-objs := fsl_otg.o otg_fsm.o
23obj-$(CONFIG_FSL_USB2_OTG) += fsl_usb2_otg.o 23obj-$(CONFIG_FSL_USB2_OTG) += fsl_usb2_otg.o
24obj-$(CONFIG_USB_MV_OTG) += mv_otg.o
diff --git a/drivers/usb/otg/fsl_otg.c b/drivers/usb/otg/fsl_otg.c
index 2d9cc445fc73..a190850d2d3b 100644
--- a/drivers/usb/otg/fsl_otg.c
+++ b/drivers/usb/otg/fsl_otg.c
@@ -1151,18 +1151,7 @@ struct platform_driver fsl_otg_driver = {
1151 }, 1151 },
1152}; 1152};
1153 1153
1154static int __init fsl_usb_otg_init(void) 1154module_platform_driver(fsl_otg_driver);
1155{
1156 pr_info(DRIVER_INFO "\n");
1157 return platform_driver_register(&fsl_otg_driver);
1158}
1159module_init(fsl_usb_otg_init);
1160
1161static void __exit fsl_usb_otg_exit(void)
1162{
1163 platform_driver_unregister(&fsl_otg_driver);
1164}
1165module_exit(fsl_usb_otg_exit);
1166 1155
1167MODULE_DESCRIPTION(DRIVER_INFO); 1156MODULE_DESCRIPTION(DRIVER_INFO);
1168MODULE_AUTHOR(DRIVER_AUTHOR); 1157MODULE_AUTHOR(DRIVER_AUTHOR);
diff --git a/drivers/usb/otg/mv_otg.c b/drivers/usb/otg/mv_otg.c
new file mode 100644
index 000000000000..db0d4fcdc8e2
--- /dev/null
+++ b/drivers/usb/otg/mv_otg.c
@@ -0,0 +1,957 @@
1/*
2 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
3 * Author: Chao Xie <chao.xie@marvell.com>
4 * Neil Zhang <zhangwm@marvell.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/uaccess.h>
17#include <linux/device.h>
18#include <linux/proc_fs.h>
19#include <linux/clk.h>
20#include <linux/workqueue.h>
21#include <linux/platform_device.h>
22
23#include <linux/usb.h>
24#include <linux/usb/ch9.h>
25#include <linux/usb/otg.h>
26#include <linux/usb/gadget.h>
27#include <linux/usb/hcd.h>
28#include <linux/platform_data/mv_usb.h>
29
30#include "mv_otg.h"
31
32#define DRIVER_DESC "Marvell USB OTG transceiver driver"
33#define DRIVER_VERSION "Jan 20, 2010"
34
35MODULE_DESCRIPTION(DRIVER_DESC);
36MODULE_VERSION(DRIVER_VERSION);
37MODULE_LICENSE("GPL");
38
39static const char driver_name[] = "mv-otg";
40
41static char *state_string[] = {
42 "undefined",
43 "b_idle",
44 "b_srp_init",
45 "b_peripheral",
46 "b_wait_acon",
47 "b_host",
48 "a_idle",
49 "a_wait_vrise",
50 "a_wait_bcon",
51 "a_host",
52 "a_suspend",
53 "a_peripheral",
54 "a_wait_vfall",
55 "a_vbus_err"
56};
57
58static int mv_otg_set_vbus(struct otg_transceiver *otg, bool on)
59{
60 struct mv_otg *mvotg = container_of(otg, struct mv_otg, otg);
61 if (mvotg->pdata->set_vbus == NULL)
62 return -ENODEV;
63
64 return mvotg->pdata->set_vbus(on);
65}
66
67static int mv_otg_set_host(struct otg_transceiver *otg,
68 struct usb_bus *host)
69{
70 otg->host = host;
71
72 return 0;
73}
74
75static int mv_otg_set_peripheral(struct otg_transceiver *otg,
76 struct usb_gadget *gadget)
77{
78 otg->gadget = gadget;
79
80 return 0;
81}
82
83static void mv_otg_run_state_machine(struct mv_otg *mvotg,
84 unsigned long delay)
85{
86 dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
87 if (!mvotg->qwork)
88 return;
89
90 queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
91}
92
93static void mv_otg_timer_await_bcon(unsigned long data)
94{
95 struct mv_otg *mvotg = (struct mv_otg *) data;
96
97 mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
98
99 dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
100
101 if (spin_trylock(&mvotg->wq_lock)) {
102 mv_otg_run_state_machine(mvotg, 0);
103 spin_unlock(&mvotg->wq_lock);
104 }
105}
106
107static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
108{
109 struct timer_list *timer;
110
111 if (id >= OTG_TIMER_NUM)
112 return -EINVAL;
113
114 timer = &mvotg->otg_ctrl.timer[id];
115
116 if (timer_pending(timer))
117 del_timer(timer);
118
119 return 0;
120}
121
122static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
123 unsigned long interval,
124 void (*callback) (unsigned long))
125{
126 struct timer_list *timer;
127
128 if (id >= OTG_TIMER_NUM)
129 return -EINVAL;
130
131 timer = &mvotg->otg_ctrl.timer[id];
132 if (timer_pending(timer)) {
133 dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
134 return -EBUSY;
135 }
136
137 init_timer(timer);
138 timer->data = (unsigned long) mvotg;
139 timer->function = callback;
140 timer->expires = jiffies + interval;
141 add_timer(timer);
142
143 return 0;
144}
145
146static int mv_otg_reset(struct mv_otg *mvotg)
147{
148 unsigned int loops;
149 u32 tmp;
150
151 /* Stop the controller */
152 tmp = readl(&mvotg->op_regs->usbcmd);
153 tmp &= ~USBCMD_RUN_STOP;
154 writel(tmp, &mvotg->op_regs->usbcmd);
155
156 /* Reset the controller to get default values */
157 writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
158
159 loops = 500;
160 while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
161 if (loops == 0) {
162 dev_err(&mvotg->pdev->dev,
163 "Wait for RESET completed TIMEOUT\n");
164 return -ETIMEDOUT;
165 }
166 loops--;
167 udelay(20);
168 }
169
170 writel(0x0, &mvotg->op_regs->usbintr);
171 tmp = readl(&mvotg->op_regs->usbsts);
172 writel(tmp, &mvotg->op_regs->usbsts);
173
174 return 0;
175}
176
177static void mv_otg_init_irq(struct mv_otg *mvotg)
178{
179 u32 otgsc;
180
181 mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
182 | OTGSC_INTR_A_VBUS_VALID;
183 mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
184 | OTGSC_INTSTS_A_VBUS_VALID;
185
186 if (mvotg->pdata->vbus == NULL) {
187 mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
188 | OTGSC_INTR_B_SESSION_END;
189 mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
190 | OTGSC_INTSTS_B_SESSION_END;
191 }
192
193 if (mvotg->pdata->id == NULL) {
194 mvotg->irq_en |= OTGSC_INTR_USB_ID;
195 mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
196 }
197
198 otgsc = readl(&mvotg->op_regs->otgsc);
199 otgsc |= mvotg->irq_en;
200 writel(otgsc, &mvotg->op_regs->otgsc);
201}
202
203static void mv_otg_start_host(struct mv_otg *mvotg, int on)
204{
205 struct otg_transceiver *otg = &mvotg->otg;
206 struct usb_hcd *hcd;
207
208 if (!otg->host)
209 return;
210
211 dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
212
213 hcd = bus_to_hcd(otg->host);
214
215 if (on)
216 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
217 else
218 usb_remove_hcd(hcd);
219}
220
221static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
222{
223 struct otg_transceiver *otg = &mvotg->otg;
224
225 if (!otg->gadget)
226 return;
227
228 dev_info(otg->dev, "gadget %s\n", on ? "on" : "off");
229
230 if (on)
231 usb_gadget_vbus_connect(otg->gadget);
232 else
233 usb_gadget_vbus_disconnect(otg->gadget);
234}
235
236static void otg_clock_enable(struct mv_otg *mvotg)
237{
238 unsigned int i;
239
240 for (i = 0; i < mvotg->clknum; i++)
241 clk_enable(mvotg->clk[i]);
242}
243
244static void otg_clock_disable(struct mv_otg *mvotg)
245{
246 unsigned int i;
247
248 for (i = 0; i < mvotg->clknum; i++)
249 clk_disable(mvotg->clk[i]);
250}
251
252static int mv_otg_enable_internal(struct mv_otg *mvotg)
253{
254 int retval = 0;
255
256 if (mvotg->active)
257 return 0;
258
259 dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
260
261 otg_clock_enable(mvotg);
262 if (mvotg->pdata->phy_init) {
263 retval = mvotg->pdata->phy_init(mvotg->phy_regs);
264 if (retval) {
265 dev_err(&mvotg->pdev->dev,
266 "init phy error %d\n", retval);
267 otg_clock_disable(mvotg);
268 return retval;
269 }
270 }
271 mvotg->active = 1;
272
273 return 0;
274
275}
276
277static int mv_otg_enable(struct mv_otg *mvotg)
278{
279 if (mvotg->clock_gating)
280 return mv_otg_enable_internal(mvotg);
281
282 return 0;
283}
284
285static void mv_otg_disable_internal(struct mv_otg *mvotg)
286{
287 if (mvotg->active) {
288 dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
289 if (mvotg->pdata->phy_deinit)
290 mvotg->pdata->phy_deinit(mvotg->phy_regs);
291 otg_clock_disable(mvotg);
292 mvotg->active = 0;
293 }
294}
295
296static void mv_otg_disable(struct mv_otg *mvotg)
297{
298 if (mvotg->clock_gating)
299 mv_otg_disable_internal(mvotg);
300}
301
302static void mv_otg_update_inputs(struct mv_otg *mvotg)
303{
304 struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
305 u32 otgsc;
306
307 otgsc = readl(&mvotg->op_regs->otgsc);
308
309 if (mvotg->pdata->vbus) {
310 if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
311 otg_ctrl->b_sess_vld = 1;
312 otg_ctrl->b_sess_end = 0;
313 } else {
314 otg_ctrl->b_sess_vld = 0;
315 otg_ctrl->b_sess_end = 1;
316 }
317 } else {
318 otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
319 otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
320 }
321
322 if (mvotg->pdata->id)
323 otg_ctrl->id = !!mvotg->pdata->id->poll();
324 else
325 otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
326
327 if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
328 otg_ctrl->a_bus_req = 1;
329
330 otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
331 otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
332
333 dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
334 dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
335 dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
336 dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
337 dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
338 dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
339}
340
341static void mv_otg_update_state(struct mv_otg *mvotg)
342{
343 struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
344 struct otg_transceiver *otg = &mvotg->otg;
345 int old_state = otg->state;
346
347 switch (old_state) {
348 case OTG_STATE_UNDEFINED:
349 otg->state = OTG_STATE_B_IDLE;
350 /* FALL THROUGH */
351 case OTG_STATE_B_IDLE:
352 if (otg_ctrl->id == 0)
353 otg->state = OTG_STATE_A_IDLE;
354 else if (otg_ctrl->b_sess_vld)
355 otg->state = OTG_STATE_B_PERIPHERAL;
356 break;
357 case OTG_STATE_B_PERIPHERAL:
358 if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
359 otg->state = OTG_STATE_B_IDLE;
360 break;
361 case OTG_STATE_A_IDLE:
362 if (otg_ctrl->id)
363 otg->state = OTG_STATE_B_IDLE;
364 else if (!(otg_ctrl->a_bus_drop) &&
365 (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
366 otg->state = OTG_STATE_A_WAIT_VRISE;
367 break;
368 case OTG_STATE_A_WAIT_VRISE:
369 if (otg_ctrl->a_vbus_vld)
370 otg->state = OTG_STATE_A_WAIT_BCON;
371 break;
372 case OTG_STATE_A_WAIT_BCON:
373 if (otg_ctrl->id || otg_ctrl->a_bus_drop
374 || otg_ctrl->a_wait_bcon_timeout) {
375 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
376 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
377 otg->state = OTG_STATE_A_WAIT_VFALL;
378 otg_ctrl->a_bus_req = 0;
379 } else if (!otg_ctrl->a_vbus_vld) {
380 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
381 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
382 otg->state = OTG_STATE_A_VBUS_ERR;
383 } else if (otg_ctrl->b_conn) {
384 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
385 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
386 otg->state = OTG_STATE_A_HOST;
387 }
388 break;
389 case OTG_STATE_A_HOST:
390 if (otg_ctrl->id || !otg_ctrl->b_conn
391 || otg_ctrl->a_bus_drop)
392 otg->state = OTG_STATE_A_WAIT_BCON;
393 else if (!otg_ctrl->a_vbus_vld)
394 otg->state = OTG_STATE_A_VBUS_ERR;
395 break;
396 case OTG_STATE_A_WAIT_VFALL:
397 if (otg_ctrl->id
398 || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
399 || otg_ctrl->a_bus_req)
400 otg->state = OTG_STATE_A_IDLE;
401 break;
402 case OTG_STATE_A_VBUS_ERR:
403 if (otg_ctrl->id || otg_ctrl->a_clr_err
404 || otg_ctrl->a_bus_drop) {
405 otg_ctrl->a_clr_err = 0;
406 otg->state = OTG_STATE_A_WAIT_VFALL;
407 }
408 break;
409 default:
410 break;
411 }
412}
413
414static void mv_otg_work(struct work_struct *work)
415{
416 struct mv_otg *mvotg;
417 struct otg_transceiver *otg;
418 int old_state;
419
420 mvotg = container_of((struct delayed_work *)work, struct mv_otg, work);
421
422run:
423 /* work queue is single thread, or we need spin_lock to protect */
424 otg = &mvotg->otg;
425 old_state = otg->state;
426
427 if (!mvotg->active)
428 return;
429
430 mv_otg_update_inputs(mvotg);
431 mv_otg_update_state(mvotg);
432
433 if (old_state != otg->state) {
434 dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
435 state_string[old_state],
436 state_string[otg->state]);
437
438 switch (otg->state) {
439 case OTG_STATE_B_IDLE:
440 mvotg->otg.default_a = 0;
441 if (old_state == OTG_STATE_B_PERIPHERAL)
442 mv_otg_start_periphrals(mvotg, 0);
443 mv_otg_reset(mvotg);
444 mv_otg_disable(mvotg);
445 break;
446 case OTG_STATE_B_PERIPHERAL:
447 mv_otg_enable(mvotg);
448 mv_otg_start_periphrals(mvotg, 1);
449 break;
450 case OTG_STATE_A_IDLE:
451 mvotg->otg.default_a = 1;
452 mv_otg_enable(mvotg);
453 if (old_state == OTG_STATE_A_WAIT_VFALL)
454 mv_otg_start_host(mvotg, 0);
455 mv_otg_reset(mvotg);
456 break;
457 case OTG_STATE_A_WAIT_VRISE:
458 mv_otg_set_vbus(&mvotg->otg, 1);
459 break;
460 case OTG_STATE_A_WAIT_BCON:
461 if (old_state != OTG_STATE_A_HOST)
462 mv_otg_start_host(mvotg, 1);
463 mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
464 T_A_WAIT_BCON,
465 mv_otg_timer_await_bcon);
466 /*
467 * Now, we directly enter A_HOST. So set b_conn = 1
468 * here. In fact, it need host driver to notify us.
469 */
470 mvotg->otg_ctrl.b_conn = 1;
471 break;
472 case OTG_STATE_A_HOST:
473 break;
474 case OTG_STATE_A_WAIT_VFALL:
475 /*
476 * Now, we has exited A_HOST. So set b_conn = 0
477 * here. In fact, it need host driver to notify us.
478 */
479 mvotg->otg_ctrl.b_conn = 0;
480 mv_otg_set_vbus(&mvotg->otg, 0);
481 break;
482 case OTG_STATE_A_VBUS_ERR:
483 break;
484 default:
485 break;
486 }
487 goto run;
488 }
489}
490
491static irqreturn_t mv_otg_irq(int irq, void *dev)
492{
493 struct mv_otg *mvotg = dev;
494 u32 otgsc;
495
496 otgsc = readl(&mvotg->op_regs->otgsc);
497 writel(otgsc, &mvotg->op_regs->otgsc);
498
499 /*
500 * if we have vbus, then the vbus detection for B-device
501 * will be done by mv_otg_inputs_irq().
502 */
503 if (mvotg->pdata->vbus)
504 if ((otgsc & OTGSC_STS_USB_ID) &&
505 !(otgsc & OTGSC_INTSTS_USB_ID))
506 return IRQ_NONE;
507
508 if ((otgsc & mvotg->irq_status) == 0)
509 return IRQ_NONE;
510
511 mv_otg_run_state_machine(mvotg, 0);
512
513 return IRQ_HANDLED;
514}
515
516static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
517{
518 struct mv_otg *mvotg = dev;
519
520 /* The clock may disabled at this time */
521 if (!mvotg->active) {
522 mv_otg_enable(mvotg);
523 mv_otg_init_irq(mvotg);
524 }
525
526 mv_otg_run_state_machine(mvotg, 0);
527
528 return IRQ_HANDLED;
529}
530
531static ssize_t
532get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
533{
534 struct mv_otg *mvotg = dev_get_drvdata(dev);
535 return scnprintf(buf, PAGE_SIZE, "%d\n",
536 mvotg->otg_ctrl.a_bus_req);
537}
538
539static ssize_t
540set_a_bus_req(struct device *dev, struct device_attribute *attr,
541 const char *buf, size_t count)
542{
543 struct mv_otg *mvotg = dev_get_drvdata(dev);
544
545 if (count > 2)
546 return -1;
547
548 /* We will use this interface to change to A device */
549 if (mvotg->otg.state != OTG_STATE_B_IDLE
550 && mvotg->otg.state != OTG_STATE_A_IDLE)
551 return -1;
552
553 /* The clock may disabled and we need to set irq for ID detected */
554 mv_otg_enable(mvotg);
555 mv_otg_init_irq(mvotg);
556
557 if (buf[0] == '1') {
558 mvotg->otg_ctrl.a_bus_req = 1;
559 mvotg->otg_ctrl.a_bus_drop = 0;
560 dev_dbg(&mvotg->pdev->dev,
561 "User request: a_bus_req = 1\n");
562
563 if (spin_trylock(&mvotg->wq_lock)) {
564 mv_otg_run_state_machine(mvotg, 0);
565 spin_unlock(&mvotg->wq_lock);
566 }
567 }
568
569 return count;
570}
571
572static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req,
573 set_a_bus_req);
574
575static ssize_t
576set_a_clr_err(struct device *dev, struct device_attribute *attr,
577 const char *buf, size_t count)
578{
579 struct mv_otg *mvotg = dev_get_drvdata(dev);
580 if (!mvotg->otg.default_a)
581 return -1;
582
583 if (count > 2)
584 return -1;
585
586 if (buf[0] == '1') {
587 mvotg->otg_ctrl.a_clr_err = 1;
588 dev_dbg(&mvotg->pdev->dev,
589 "User request: a_clr_err = 1\n");
590 }
591
592 if (spin_trylock(&mvotg->wq_lock)) {
593 mv_otg_run_state_machine(mvotg, 0);
594 spin_unlock(&mvotg->wq_lock);
595 }
596
597 return count;
598}
599
600static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
601
602static ssize_t
603get_a_bus_drop(struct device *dev, struct device_attribute *attr,
604 char *buf)
605{
606 struct mv_otg *mvotg = dev_get_drvdata(dev);
607 return scnprintf(buf, PAGE_SIZE, "%d\n",
608 mvotg->otg_ctrl.a_bus_drop);
609}
610
611static ssize_t
612set_a_bus_drop(struct device *dev, struct device_attribute *attr,
613 const char *buf, size_t count)
614{
615 struct mv_otg *mvotg = dev_get_drvdata(dev);
616 if (!mvotg->otg.default_a)
617 return -1;
618
619 if (count > 2)
620 return -1;
621
622 if (buf[0] == '0') {
623 mvotg->otg_ctrl.a_bus_drop = 0;
624 dev_dbg(&mvotg->pdev->dev,
625 "User request: a_bus_drop = 0\n");
626 } else if (buf[0] == '1') {
627 mvotg->otg_ctrl.a_bus_drop = 1;
628 mvotg->otg_ctrl.a_bus_req = 0;
629 dev_dbg(&mvotg->pdev->dev,
630 "User request: a_bus_drop = 1\n");
631 dev_dbg(&mvotg->pdev->dev,
632 "User request: and a_bus_req = 0\n");
633 }
634
635 if (spin_trylock(&mvotg->wq_lock)) {
636 mv_otg_run_state_machine(mvotg, 0);
637 spin_unlock(&mvotg->wq_lock);
638 }
639
640 return count;
641}
642
643static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR,
644 get_a_bus_drop, set_a_bus_drop);
645
646static struct attribute *inputs_attrs[] = {
647 &dev_attr_a_bus_req.attr,
648 &dev_attr_a_clr_err.attr,
649 &dev_attr_a_bus_drop.attr,
650 NULL,
651};
652
653static struct attribute_group inputs_attr_group = {
654 .name = "inputs",
655 .attrs = inputs_attrs,
656};
657
658int mv_otg_remove(struct platform_device *pdev)
659{
660 struct mv_otg *mvotg = platform_get_drvdata(pdev);
661 int clk_i;
662
663 sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
664
665 if (mvotg->irq)
666 free_irq(mvotg->irq, mvotg);
667
668 if (mvotg->pdata->vbus)
669 free_irq(mvotg->pdata->vbus->irq, mvotg);
670 if (mvotg->pdata->id)
671 free_irq(mvotg->pdata->id->irq, mvotg);
672
673 if (mvotg->qwork) {
674 flush_workqueue(mvotg->qwork);
675 destroy_workqueue(mvotg->qwork);
676 }
677
678 mv_otg_disable(mvotg);
679
680 if (mvotg->cap_regs)
681 iounmap(mvotg->cap_regs);
682
683 if (mvotg->phy_regs)
684 iounmap(mvotg->phy_regs);
685
686 for (clk_i = 0; clk_i <= mvotg->clknum; clk_i++)
687 clk_put(mvotg->clk[clk_i]);
688
689 otg_set_transceiver(NULL);
690 platform_set_drvdata(pdev, NULL);
691
692 kfree(mvotg);
693
694 return 0;
695}
696
697static int mv_otg_probe(struct platform_device *pdev)
698{
699 struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
700 struct mv_otg *mvotg;
701 struct resource *r;
702 int retval = 0, clk_i, i;
703 size_t size;
704
705 if (pdata == NULL) {
706 dev_err(&pdev->dev, "failed to get platform data\n");
707 return -ENODEV;
708 }
709
710 size = sizeof(*mvotg) + sizeof(struct clk *) * pdata->clknum;
711 mvotg = kzalloc(size, GFP_KERNEL);
712 if (!mvotg) {
713 dev_err(&pdev->dev, "failed to allocate memory!\n");
714 return -ENOMEM;
715 }
716
717 platform_set_drvdata(pdev, mvotg);
718
719 mvotg->pdev = pdev;
720 mvotg->pdata = pdata;
721
722 mvotg->clknum = pdata->clknum;
723 for (clk_i = 0; clk_i < mvotg->clknum; clk_i++) {
724 mvotg->clk[clk_i] = clk_get(&pdev->dev, pdata->clkname[clk_i]);
725 if (IS_ERR(mvotg->clk[clk_i])) {
726 retval = PTR_ERR(mvotg->clk[clk_i]);
727 goto err_put_clk;
728 }
729 }
730
731 mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
732 if (!mvotg->qwork) {
733 dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
734 retval = -ENOMEM;
735 goto err_put_clk;
736 }
737
738 INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
739
740 /* OTG common part */
741 mvotg->pdev = pdev;
742 mvotg->otg.dev = &pdev->dev;
743 mvotg->otg.label = driver_name;
744 mvotg->otg.set_host = mv_otg_set_host;
745 mvotg->otg.set_peripheral = mv_otg_set_peripheral;
746 mvotg->otg.set_vbus = mv_otg_set_vbus;
747 mvotg->otg.state = OTG_STATE_UNDEFINED;
748
749 for (i = 0; i < OTG_TIMER_NUM; i++)
750 init_timer(&mvotg->otg_ctrl.timer[i]);
751
752 r = platform_get_resource_byname(mvotg->pdev,
753 IORESOURCE_MEM, "phyregs");
754 if (r == NULL) {
755 dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
756 retval = -ENODEV;
757 goto err_destroy_workqueue;
758 }
759
760 mvotg->phy_regs = ioremap(r->start, resource_size(r));
761 if (mvotg->phy_regs == NULL) {
762 dev_err(&pdev->dev, "failed to map phy I/O memory\n");
763 retval = -EFAULT;
764 goto err_destroy_workqueue;
765 }
766
767 r = platform_get_resource_byname(mvotg->pdev,
768 IORESOURCE_MEM, "capregs");
769 if (r == NULL) {
770 dev_err(&pdev->dev, "no I/O memory resource defined\n");
771 retval = -ENODEV;
772 goto err_unmap_phyreg;
773 }
774
775 mvotg->cap_regs = ioremap(r->start, resource_size(r));
776 if (mvotg->cap_regs == NULL) {
777 dev_err(&pdev->dev, "failed to map I/O memory\n");
778 retval = -EFAULT;
779 goto err_unmap_phyreg;
780 }
781
782 /* we will acces controller register, so enable the udc controller */
783 retval = mv_otg_enable_internal(mvotg);
784 if (retval) {
785 dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
786 goto err_unmap_capreg;
787 }
788
789 mvotg->op_regs =
790 (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
791 + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
792
793 if (pdata->id) {
794 retval = request_threaded_irq(pdata->id->irq, NULL,
795 mv_otg_inputs_irq,
796 IRQF_ONESHOT, "id", mvotg);
797 if (retval) {
798 dev_info(&pdev->dev,
799 "Failed to request irq for ID\n");
800 pdata->id = NULL;
801 }
802 }
803
804 if (pdata->vbus) {
805 mvotg->clock_gating = 1;
806 retval = request_threaded_irq(pdata->vbus->irq, NULL,
807 mv_otg_inputs_irq,
808 IRQF_ONESHOT, "vbus", mvotg);
809 if (retval) {
810 dev_info(&pdev->dev,
811 "Failed to request irq for VBUS, "
812 "disable clock gating\n");
813 mvotg->clock_gating = 0;
814 pdata->vbus = NULL;
815 }
816 }
817
818 if (pdata->disable_otg_clock_gating)
819 mvotg->clock_gating = 0;
820
821 mv_otg_reset(mvotg);
822 mv_otg_init_irq(mvotg);
823
824 r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
825 if (r == NULL) {
826 dev_err(&pdev->dev, "no IRQ resource defined\n");
827 retval = -ENODEV;
828 goto err_disable_clk;
829 }
830
831 mvotg->irq = r->start;
832 if (request_irq(mvotg->irq, mv_otg_irq, IRQF_SHARED,
833 driver_name, mvotg)) {
834 dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
835 mvotg->irq);
836 mvotg->irq = 0;
837 retval = -ENODEV;
838 goto err_disable_clk;
839 }
840
841 retval = otg_set_transceiver(&mvotg->otg);
842 if (retval < 0) {
843 dev_err(&pdev->dev, "can't register transceiver, %d\n",
844 retval);
845 goto err_free_irq;
846 }
847
848 retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
849 if (retval < 0) {
850 dev_dbg(&pdev->dev,
851 "Can't register sysfs attr group: %d\n", retval);
852 goto err_set_transceiver;
853 }
854
855 spin_lock_init(&mvotg->wq_lock);
856 if (spin_trylock(&mvotg->wq_lock)) {
857 mv_otg_run_state_machine(mvotg, 2 * HZ);
858 spin_unlock(&mvotg->wq_lock);
859 }
860
861 dev_info(&pdev->dev,
862 "successful probe OTG device %s clock gating.\n",
863 mvotg->clock_gating ? "with" : "without");
864
865 return 0;
866
867err_set_transceiver:
868 otg_set_transceiver(NULL);
869err_free_irq:
870 free_irq(mvotg->irq, mvotg);
871err_disable_clk:
872 if (pdata->vbus)
873 free_irq(pdata->vbus->irq, mvotg);
874 if (pdata->id)
875 free_irq(pdata->id->irq, mvotg);
876 mv_otg_disable_internal(mvotg);
877err_unmap_capreg:
878 iounmap(mvotg->cap_regs);
879err_unmap_phyreg:
880 iounmap(mvotg->phy_regs);
881err_destroy_workqueue:
882 flush_workqueue(mvotg->qwork);
883 destroy_workqueue(mvotg->qwork);
884err_put_clk:
885 for (clk_i--; clk_i >= 0; clk_i--)
886 clk_put(mvotg->clk[clk_i]);
887
888 platform_set_drvdata(pdev, NULL);
889 kfree(mvotg);
890
891 return retval;
892}
893
894#ifdef CONFIG_PM
895static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
896{
897 struct mv_otg *mvotg = platform_get_drvdata(pdev);
898
899 if (mvotg->otg.state != OTG_STATE_B_IDLE) {
900 dev_info(&pdev->dev,
901 "OTG state is not B_IDLE, it is %d!\n",
902 mvotg->otg.state);
903 return -EAGAIN;
904 }
905
906 if (!mvotg->clock_gating)
907 mv_otg_disable_internal(mvotg);
908
909 return 0;
910}
911
912static int mv_otg_resume(struct platform_device *pdev)
913{
914 struct mv_otg *mvotg = platform_get_drvdata(pdev);
915 u32 otgsc;
916
917 if (!mvotg->clock_gating) {
918 mv_otg_enable_internal(mvotg);
919
920 otgsc = readl(&mvotg->op_regs->otgsc);
921 otgsc |= mvotg->irq_en;
922 writel(otgsc, &mvotg->op_regs->otgsc);
923
924 if (spin_trylock(&mvotg->wq_lock)) {
925 mv_otg_run_state_machine(mvotg, 0);
926 spin_unlock(&mvotg->wq_lock);
927 }
928 }
929 return 0;
930}
931#endif
932
933static struct platform_driver mv_otg_driver = {
934 .probe = mv_otg_probe,
935 .remove = __exit_p(mv_otg_remove),
936 .driver = {
937 .owner = THIS_MODULE,
938 .name = driver_name,
939 },
940#ifdef CONFIG_PM
941 .suspend = mv_otg_suspend,
942 .resume = mv_otg_resume,
943#endif
944};
945
946static int __init mv_otg_init(void)
947{
948 return platform_driver_register(&mv_otg_driver);
949}
950
951static void __exit mv_otg_exit(void)
952{
953 platform_driver_unregister(&mv_otg_driver);
954}
955
956module_init(mv_otg_init);
957module_exit(mv_otg_exit);
diff --git a/drivers/usb/otg/mv_otg.h b/drivers/usb/otg/mv_otg.h
new file mode 100644
index 000000000000..be6ca1437645
--- /dev/null
+++ b/drivers/usb/otg/mv_otg.h
@@ -0,0 +1,165 @@
1/*
2 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __MV_USB_OTG_CONTROLLER__
11#define __MV_USB_OTG_CONTROLLER__
12
13#include <linux/types.h>
14
15/* Command Register Bit Masks */
16#define USBCMD_RUN_STOP (0x00000001)
17#define USBCMD_CTRL_RESET (0x00000002)
18
19/* otgsc Register Bit Masks */
20#define OTGSC_CTRL_VUSB_DISCHARGE 0x00000001
21#define OTGSC_CTRL_VUSB_CHARGE 0x00000002
22#define OTGSC_CTRL_OTG_TERM 0x00000008
23#define OTGSC_CTRL_DATA_PULSING 0x00000010
24#define OTGSC_STS_USB_ID 0x00000100
25#define OTGSC_STS_A_VBUS_VALID 0x00000200
26#define OTGSC_STS_A_SESSION_VALID 0x00000400
27#define OTGSC_STS_B_SESSION_VALID 0x00000800
28#define OTGSC_STS_B_SESSION_END 0x00001000
29#define OTGSC_STS_1MS_TOGGLE 0x00002000
30#define OTGSC_STS_DATA_PULSING 0x00004000
31#define OTGSC_INTSTS_USB_ID 0x00010000
32#define OTGSC_INTSTS_A_VBUS_VALID 0x00020000
33#define OTGSC_INTSTS_A_SESSION_VALID 0x00040000
34#define OTGSC_INTSTS_B_SESSION_VALID 0x00080000
35#define OTGSC_INTSTS_B_SESSION_END 0x00100000
36#define OTGSC_INTSTS_1MS 0x00200000
37#define OTGSC_INTSTS_DATA_PULSING 0x00400000
38#define OTGSC_INTR_USB_ID 0x01000000
39#define OTGSC_INTR_A_VBUS_VALID 0x02000000
40#define OTGSC_INTR_A_SESSION_VALID 0x04000000
41#define OTGSC_INTR_B_SESSION_VALID 0x08000000
42#define OTGSC_INTR_B_SESSION_END 0x10000000
43#define OTGSC_INTR_1MS_TIMER 0x20000000
44#define OTGSC_INTR_DATA_PULSING 0x40000000
45
46#define CAPLENGTH_MASK (0xff)
47
48/* Timer's interval, unit 10ms */
49#define T_A_WAIT_VRISE 100
50#define T_A_WAIT_BCON 2000
51#define T_A_AIDL_BDIS 100
52#define T_A_BIDL_ADIS 20
53#define T_B_ASE0_BRST 400
54#define T_B_SE0_SRP 300
55#define T_B_SRP_FAIL 2000
56#define T_B_DATA_PLS 10
57#define T_B_SRP_INIT 100
58#define T_A_SRP_RSPNS 10
59#define T_A_DRV_RSM 5
60
61enum otg_function {
62 OTG_B_DEVICE = 0,
63 OTG_A_DEVICE
64};
65
66enum mv_otg_timer {
67 A_WAIT_BCON_TIMER = 0,
68 OTG_TIMER_NUM
69};
70
71/* PXA OTG state machine */
72struct mv_otg_ctrl {
73 /* internal variables */
74 u8 a_set_b_hnp_en; /* A-Device set b_hnp_en */
75 u8 b_srp_done;
76 u8 b_hnp_en;
77
78 /* OTG inputs */
79 u8 a_bus_drop;
80 u8 a_bus_req;
81 u8 a_clr_err;
82 u8 a_bus_resume;
83 u8 a_bus_suspend;
84 u8 a_conn;
85 u8 a_sess_vld;
86 u8 a_srp_det;
87 u8 a_vbus_vld;
88 u8 b_bus_req; /* B-Device Require Bus */
89 u8 b_bus_resume;
90 u8 b_bus_suspend;
91 u8 b_conn;
92 u8 b_se0_srp;
93 u8 b_sess_end;
94 u8 b_sess_vld;
95 u8 id;
96 u8 a_suspend_req;
97
98 /*Timer event */
99 u8 a_aidl_bdis_timeout;
100 u8 b_ase0_brst_timeout;
101 u8 a_bidl_adis_timeout;
102 u8 a_wait_bcon_timeout;
103
104 struct timer_list timer[OTG_TIMER_NUM];
105};
106
107#define VUSBHS_MAX_PORTS 8
108
109struct mv_otg_regs {
110 u32 usbcmd; /* Command register */
111 u32 usbsts; /* Status register */
112 u32 usbintr; /* Interrupt enable */
113 u32 frindex; /* Frame index */
114 u32 reserved1[1];
115 u32 deviceaddr; /* Device Address */
116 u32 eplistaddr; /* Endpoint List Address */
117 u32 ttctrl; /* HOST TT status and control */
118 u32 burstsize; /* Programmable Burst Size */
119 u32 txfilltuning; /* Host Transmit Pre-Buffer Packet Tuning */
120 u32 reserved[4];
121 u32 epnak; /* Endpoint NAK */
122 u32 epnaken; /* Endpoint NAK Enable */
123 u32 configflag; /* Configured Flag register */
124 u32 portsc[VUSBHS_MAX_PORTS]; /* Port Status/Control x, x = 1..8 */
125 u32 otgsc;
126 u32 usbmode; /* USB Host/Device mode */
127 u32 epsetupstat; /* Endpoint Setup Status */
128 u32 epprime; /* Endpoint Initialize */
129 u32 epflush; /* Endpoint De-initialize */
130 u32 epstatus; /* Endpoint Status */
131 u32 epcomplete; /* Endpoint Interrupt On Complete */
132 u32 epctrlx[16]; /* Endpoint Control, where x = 0.. 15 */
133 u32 mcr; /* Mux Control */
134 u32 isr; /* Interrupt Status */
135 u32 ier; /* Interrupt Enable */
136};
137
138struct mv_otg {
139 struct otg_transceiver otg;
140 struct mv_otg_ctrl otg_ctrl;
141
142 /* base address */
143 void __iomem *phy_regs;
144 void __iomem *cap_regs;
145 struct mv_otg_regs __iomem *op_regs;
146
147 struct platform_device *pdev;
148 int irq;
149 u32 irq_status;
150 u32 irq_en;
151
152 struct delayed_work work;
153 struct workqueue_struct *qwork;
154
155 spinlock_t wq_lock;
156
157 struct mv_usb_platform_data *pdata;
158
159 unsigned int active;
160 unsigned int clock_gating;
161 unsigned int clknum;
162 struct clk *clk[0];
163};
164
165#endif
diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
index 08c679c0dde5..e9a5b1d2615e 100644
--- a/drivers/usb/renesas_usbhs/common.c
+++ b/drivers/usb/renesas_usbhs/common.c
@@ -95,25 +95,15 @@ struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev)
95/* 95/*
96 * syscfg functions 96 * syscfg functions
97 */ 97 */
98void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable) 98static void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable)
99{ 99{
100 usbhs_bset(priv, SYSCFG, SCKE, enable ? SCKE : 0); 100 usbhs_bset(priv, SYSCFG, SCKE, enable ? SCKE : 0);
101} 101}
102 102
103void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable)
104{
105 usbhs_bset(priv, SYSCFG, HSE, enable ? HSE : 0);
106}
107
108void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable)
109{
110 usbhs_bset(priv, SYSCFG, USBE, enable ? USBE : 0);
111}
112
113void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable) 103void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable)
114{ 104{
115 u16 mask = DCFM | DRPD | DPRPU; 105 u16 mask = DCFM | DRPD | DPRPU | HSE | USBE;
116 u16 val = DCFM | DRPD; 106 u16 val = DCFM | DRPD | HSE | USBE;
117 int has_otg = usbhs_get_dparam(priv, has_otg); 107 int has_otg = usbhs_get_dparam(priv, has_otg);
118 108
119 if (has_otg) 109 if (has_otg)
@@ -130,8 +120,8 @@ void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable)
130 120
131void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable) 121void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable)
132{ 122{
133 u16 mask = DCFM | DRPD | DPRPU; 123 u16 mask = DCFM | DRPD | DPRPU | HSE | USBE;
134 u16 val = DPRPU; 124 u16 val = DPRPU | HSE | USBE;
135 125
136 /* 126 /*
137 * if enable 127 * if enable
@@ -142,6 +132,11 @@ void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable)
142 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0); 132 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0);
143} 133}
144 134
135void usbhs_sys_set_test_mode(struct usbhs_priv *priv, u16 mode)
136{
137 usbhs_write(priv, TESTMODE, mode);
138}
139
145/* 140/*
146 * frame functions 141 * frame functions
147 */ 142 */
@@ -229,7 +224,7 @@ static void usbhsc_bus_init(struct usbhs_priv *priv)
229/* 224/*
230 * device configuration 225 * device configuration
231 */ 226 */
232int usbhs_set_device_speed(struct usbhs_priv *priv, int devnum, 227int usbhs_set_device_config(struct usbhs_priv *priv, int devnum,
233 u16 upphub, u16 hubport, u16 speed) 228 u16 upphub, u16 hubport, u16 speed)
234{ 229{
235 struct device *dev = usbhs_priv_to_dev(priv); 230 struct device *dev = usbhs_priv_to_dev(priv);
@@ -301,18 +296,25 @@ static u32 usbhsc_default_pipe_type[] = {
301 */ 296 */
302static void usbhsc_power_ctrl(struct usbhs_priv *priv, int enable) 297static void usbhsc_power_ctrl(struct usbhs_priv *priv, int enable)
303{ 298{
299 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
304 struct device *dev = usbhs_priv_to_dev(priv); 300 struct device *dev = usbhs_priv_to_dev(priv);
305 301
306 if (enable) { 302 if (enable) {
307 /* enable PM */ 303 /* enable PM */
308 pm_runtime_get_sync(dev); 304 pm_runtime_get_sync(dev);
309 305
306 /* enable platform power */
307 usbhs_platform_call(priv, power_ctrl, pdev, priv->base, enable);
308
310 /* USB on */ 309 /* USB on */
311 usbhs_sys_clock_ctrl(priv, enable); 310 usbhs_sys_clock_ctrl(priv, enable);
312 } else { 311 } else {
313 /* USB off */ 312 /* USB off */
314 usbhs_sys_clock_ctrl(priv, enable); 313 usbhs_sys_clock_ctrl(priv, enable);
315 314
315 /* disable platform power */
316 usbhs_platform_call(priv, power_ctrl, pdev, priv->base, enable);
317
316 /* disable PM */ 318 /* disable PM */
317 pm_runtime_put_sync(dev); 319 pm_runtime_put_sync(dev);
318 } 320 }
@@ -388,7 +390,7 @@ static void usbhsc_notify_hotplug(struct work_struct *work)
388 usbhsc_hotplug(priv); 390 usbhsc_hotplug(priv);
389} 391}
390 392
391int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev) 393static int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev)
392{ 394{
393 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); 395 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
394 int delay = usbhs_get_dparam(priv, detection_delay); 396 int delay = usbhs_get_dparam(priv, detection_delay);
@@ -398,7 +400,8 @@ int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev)
398 * To make sure safety context, 400 * To make sure safety context,
399 * use workqueue for usbhs_notify_hotplug 401 * use workqueue for usbhs_notify_hotplug
400 */ 402 */
401 schedule_delayed_work(&priv->notify_hotplug_work, delay); 403 schedule_delayed_work(&priv->notify_hotplug_work,
404 msecs_to_jiffies(delay));
402 return 0; 405 return 0;
403} 406}
404 407
@@ -637,18 +640,7 @@ static struct platform_driver renesas_usbhs_driver = {
637 .remove = __devexit_p(usbhs_remove), 640 .remove = __devexit_p(usbhs_remove),
638}; 641};
639 642
640static int __init usbhs_init(void) 643module_platform_driver(renesas_usbhs_driver);
641{
642 return platform_driver_register(&renesas_usbhs_driver);
643}
644
645static void __exit usbhs_exit(void)
646{
647 platform_driver_unregister(&renesas_usbhs_driver);
648}
649
650module_init(usbhs_init);
651module_exit(usbhs_exit);
652 644
653MODULE_LICENSE("GPL"); 645MODULE_LICENSE("GPL");
654MODULE_DESCRIPTION("Renesas USB driver"); 646MODULE_DESCRIPTION("Renesas USB driver");
diff --git a/drivers/usb/renesas_usbhs/common.h b/drivers/usb/renesas_usbhs/common.h
index 8729da5c3be6..d79b3e27db95 100644
--- a/drivers/usb/renesas_usbhs/common.h
+++ b/drivers/usb/renesas_usbhs/common.h
@@ -33,6 +33,7 @@ struct usbhs_priv;
33#define SYSCFG 0x0000 33#define SYSCFG 0x0000
34#define BUSWAIT 0x0002 34#define BUSWAIT 0x0002
35#define DVSTCTR 0x0008 35#define DVSTCTR 0x0008
36#define TESTMODE 0x000C
36#define CFIFO 0x0014 37#define CFIFO 0x0014
37#define CFIFOSEL 0x0020 38#define CFIFOSEL 0x0020
38#define CFIFOCTR 0x0022 39#define CFIFOCTR 0x0022
@@ -275,19 +276,15 @@ u16 usbhs_read(struct usbhs_priv *priv, u32 reg);
275void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data); 276void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data);
276void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data); 277void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data);
277 278
278int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev);
279
280#define usbhs_lock(p, f) spin_lock_irqsave(usbhs_priv_to_lock(p), f) 279#define usbhs_lock(p, f) spin_lock_irqsave(usbhs_priv_to_lock(p), f)
281#define usbhs_unlock(p, f) spin_unlock_irqrestore(usbhs_priv_to_lock(p), f) 280#define usbhs_unlock(p, f) spin_unlock_irqrestore(usbhs_priv_to_lock(p), f)
282 281
283/* 282/*
284 * sysconfig 283 * sysconfig
285 */ 284 */
286void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable);
287void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable);
288void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable);
289void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable); 285void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable);
290void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable); 286void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable);
287void usbhs_sys_set_test_mode(struct usbhs_priv *priv, u16 mode);
291 288
292/* 289/*
293 * usb request 290 * usb request
@@ -311,7 +308,7 @@ int usbhs_frame_get_num(struct usbhs_priv *priv);
311/* 308/*
312 * device config 309 * device config
313 */ 310 */
314int usbhs_set_device_speed(struct usbhs_priv *priv, int devnum, u16 upphub, 311int usbhs_set_device_config(struct usbhs_priv *priv, int devnum, u16 upphub,
315 u16 hubport, u16 speed); 312 u16 hubport, u16 speed);
316 313
317/* 314/*
diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index ffdf5d15085e..b51fcd80d244 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -56,7 +56,7 @@ static struct usbhs_pkt_handle usbhsf_null_handler = {
56void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, 56void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
57 void (*done)(struct usbhs_priv *priv, 57 void (*done)(struct usbhs_priv *priv,
58 struct usbhs_pkt *pkt), 58 struct usbhs_pkt *pkt),
59 void *buf, int len, int zero) 59 void *buf, int len, int zero, int sequence)
60{ 60{
61 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 61 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
62 struct device *dev = usbhs_priv_to_dev(priv); 62 struct device *dev = usbhs_priv_to_dev(priv);
@@ -90,6 +90,7 @@ void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
90 pkt->zero = zero; 90 pkt->zero = zero;
91 pkt->actual = 0; 91 pkt->actual = 0;
92 pkt->done = done; 92 pkt->done = done;
93 pkt->sequence = sequence;
93 94
94 usbhs_unlock(priv, flags); 95 usbhs_unlock(priv, flags);
95 /******************** spin unlock ******************/ 96 /******************** spin unlock ******************/
@@ -481,6 +482,9 @@ static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
481 int i, ret, len; 482 int i, ret, len;
482 int is_short; 483 int is_short;
483 484
485 usbhs_pipe_data_sequence(pipe, pkt->sequence);
486 pkt->sequence = -1; /* -1 sequence will be ignored */
487
484 ret = usbhsf_fifo_select(pipe, fifo, 1); 488 ret = usbhsf_fifo_select(pipe, fifo, 1);
485 if (ret < 0) 489 if (ret < 0)
486 return 0; 490 return 0;
@@ -584,6 +588,8 @@ static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
584 /* 588 /*
585 * pipe enable to prepare packet receive 589 * pipe enable to prepare packet receive
586 */ 590 */
591 usbhs_pipe_data_sequence(pipe, pkt->sequence);
592 pkt->sequence = -1; /* -1 sequence will be ignored */
587 593
588 usbhs_pipe_enable(pipe); 594 usbhs_pipe_enable(pipe);
589 usbhsf_rx_irq_ctrl(pipe, 1); 595 usbhsf_rx_irq_ctrl(pipe, 1);
@@ -641,6 +647,7 @@ static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
641 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" 647 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
642 */ 648 */
643 if (0 == rcv_len) { 649 if (0 == rcv_len) {
650 pkt->zero = 1;
644 usbhsf_fifo_clear(pipe, fifo); 651 usbhsf_fifo_clear(pipe, fifo);
645 goto usbhs_fifo_read_end; 652 goto usbhs_fifo_read_end;
646 } 653 }
diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h
index 32a7b246b28d..f68609c0f489 100644
--- a/drivers/usb/renesas_usbhs/fifo.h
+++ b/drivers/usb/renesas_usbhs/fifo.h
@@ -59,6 +59,7 @@ struct usbhs_pkt {
59 int trans; 59 int trans;
60 int actual; 60 int actual;
61 int zero; 61 int zero;
62 int sequence;
62}; 63};
63 64
64struct usbhs_pkt_handle { 65struct usbhs_pkt_handle {
@@ -95,7 +96,7 @@ void usbhs_pkt_init(struct usbhs_pkt *pkt);
95void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, 96void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
96 void (*done)(struct usbhs_priv *priv, 97 void (*done)(struct usbhs_priv *priv,
97 struct usbhs_pkt *pkt), 98 struct usbhs_pkt *pkt),
98 void *buf, int len, int zero); 99 void *buf, int len, int zero, int sequence);
99struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt); 100struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt);
100void usbhs_pkt_start(struct usbhs_pipe *pipe); 101void usbhs_pkt_start(struct usbhs_pipe *pipe);
101 102
diff --git a/drivers/usb/renesas_usbhs/mod.c b/drivers/usb/renesas_usbhs/mod.c
index ad96a3896729..1b97fb12694b 100644
--- a/drivers/usb/renesas_usbhs/mod.c
+++ b/drivers/usb/renesas_usbhs/mod.c
@@ -50,7 +50,9 @@ static int usbhsm_autonomy_irq_vbus(struct usbhs_priv *priv,
50{ 50{
51 struct platform_device *pdev = usbhs_priv_to_pdev(priv); 51 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
52 52
53 return usbhsc_drvcllbck_notify_hotplug(pdev); 53 renesas_usbhs_call_notify_hotplug(pdev);
54
55 return 0;
54} 56}
55 57
56void usbhs_mod_autonomy_mode(struct usbhs_priv *priv) 58void usbhs_mod_autonomy_mode(struct usbhs_priv *priv)
diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
index 7f4e80338570..528691d5f3e2 100644
--- a/drivers/usb/renesas_usbhs/mod_gadget.c
+++ b/drivers/usb/renesas_usbhs/mod_gadget.c
@@ -14,6 +14,7 @@
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 * 15 *
16 */ 16 */
17#include <linux/delay.h>
17#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
18#include <linux/io.h> 19#include <linux/io.h>
19#include <linux/module.h> 20#include <linux/module.h>
@@ -44,7 +45,6 @@ struct usbhsg_uep {
44struct usbhsg_gpriv { 45struct usbhsg_gpriv {
45 struct usb_gadget gadget; 46 struct usb_gadget gadget;
46 struct usbhs_mod mod; 47 struct usbhs_mod mod;
47 struct list_head link;
48 48
49 struct usbhsg_uep *uep; 49 struct usbhsg_uep *uep;
50 int uep_size; 50 int uep_size;
@@ -114,16 +114,6 @@ struct usbhsg_recip_handle {
114#define usbhsg_status_clr(gp, b) (gp->status &= ~b) 114#define usbhsg_status_clr(gp, b) (gp->status &= ~b)
115#define usbhsg_status_has(gp, b) (gp->status & b) 115#define usbhsg_status_has(gp, b) (gp->status & b)
116 116
117/* controller */
118LIST_HEAD(the_controller_link);
119
120#define usbhsg_for_each_controller(gpriv)\
121 list_for_each_entry(gpriv, &the_controller_link, link)
122#define usbhsg_controller_register(gpriv)\
123 list_add_tail(&(gpriv)->link, &the_controller_link)
124#define usbhsg_controller_unregister(gpriv)\
125 list_del_init(&(gpriv)->link)
126
127/* 117/*
128 * queue push/pop 118 * queue push/pop
129 */ 119 */
@@ -164,7 +154,7 @@ static void usbhsg_queue_push(struct usbhsg_uep *uep,
164 req->actual = 0; 154 req->actual = 0;
165 req->status = -EINPROGRESS; 155 req->status = -EINPROGRESS;
166 usbhs_pkt_push(pipe, pkt, usbhsg_queue_done, 156 usbhs_pkt_push(pipe, pkt, usbhsg_queue_done,
167 req->buf, req->length, req->zero); 157 req->buf, req->length, req->zero, -1);
168 usbhs_pkt_start(pipe); 158 usbhs_pkt_start(pipe);
169 159
170 dev_dbg(dev, "pipe %d : queue push (%d)\n", 160 dev_dbg(dev, "pipe %d : queue push (%d)\n",
@@ -195,7 +185,7 @@ static int usbhsg_dma_map(struct device *dev,
195 } 185 }
196 186
197 if (dma_mapping_error(dev, pkt->dma)) { 187 if (dma_mapping_error(dev, pkt->dma)) {
198 dev_err(dev, "dma mapping error %x\n", pkt->dma); 188 dev_err(dev, "dma mapping error %llx\n", (u64)pkt->dma);
199 return -EIO; 189 return -EIO;
200 } 190 }
201 191
@@ -271,6 +261,8 @@ static int usbhsg_recip_handler_std_clear_endpoint(struct usbhs_priv *priv,
271 261
272 usbhsg_recip_handler_std_control_done(priv, uep, ctrl); 262 usbhsg_recip_handler_std_control_done(priv, uep, ctrl);
273 263
264 usbhs_pkt_start(pipe);
265
274 return 0; 266 return 0;
275} 267}
276 268
@@ -282,6 +274,145 @@ struct usbhsg_recip_handle req_clear_feature = {
282}; 274};
283 275
284/* 276/*
277 * USB_TYPE_STANDARD / set feature functions
278 */
279static int usbhsg_recip_handler_std_set_device(struct usbhs_priv *priv,
280 struct usbhsg_uep *uep,
281 struct usb_ctrlrequest *ctrl)
282{
283 switch (le16_to_cpu(ctrl->wValue)) {
284 case USB_DEVICE_TEST_MODE:
285 usbhsg_recip_handler_std_control_done(priv, uep, ctrl);
286 udelay(100);
287 usbhs_sys_set_test_mode(priv, le16_to_cpu(ctrl->wIndex >> 8));
288 break;
289 default:
290 usbhsg_recip_handler_std_control_done(priv, uep, ctrl);
291 break;
292 }
293
294 return 0;
295}
296
297static int usbhsg_recip_handler_std_set_endpoint(struct usbhs_priv *priv,
298 struct usbhsg_uep *uep,
299 struct usb_ctrlrequest *ctrl)
300{
301 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
302
303 usbhs_pipe_stall(pipe);
304
305 usbhsg_recip_handler_std_control_done(priv, uep, ctrl);
306
307 return 0;
308}
309
310struct usbhsg_recip_handle req_set_feature = {
311 .name = "set feature",
312 .device = usbhsg_recip_handler_std_set_device,
313 .interface = usbhsg_recip_handler_std_control_done,
314 .endpoint = usbhsg_recip_handler_std_set_endpoint,
315};
316
317/*
318 * USB_TYPE_STANDARD / get status functions
319 */
320static void __usbhsg_recip_send_complete(struct usb_ep *ep,
321 struct usb_request *req)
322{
323 struct usbhsg_request *ureq = usbhsg_req_to_ureq(req);
324
325 /* free allocated recip-buffer/usb_request */
326 kfree(ureq->pkt.buf);
327 usb_ep_free_request(ep, req);
328}
329
330static void __usbhsg_recip_send_status(struct usbhsg_gpriv *gpriv,
331 unsigned short status)
332{
333 struct usbhsg_uep *dcp = usbhsg_gpriv_to_dcp(gpriv);
334 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp);
335 struct device *dev = usbhsg_gpriv_to_dev(gpriv);
336 struct usb_request *req;
337 unsigned short *buf;
338
339 /* alloc new usb_request for recip */
340 req = usb_ep_alloc_request(&dcp->ep, GFP_ATOMIC);
341 if (!req) {
342 dev_err(dev, "recip request allocation fail\n");
343 return;
344 }
345
346 /* alloc recip data buffer */
347 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
348 if (!buf) {
349 usb_ep_free_request(&dcp->ep, req);
350 dev_err(dev, "recip data allocation fail\n");
351 return;
352 }
353
354 /* recip data is status */
355 *buf = cpu_to_le16(status);
356
357 /* allocated usb_request/buffer will be freed */
358 req->complete = __usbhsg_recip_send_complete;
359 req->buf = buf;
360 req->length = sizeof(*buf);
361 req->zero = 0;
362
363 /* push packet */
364 pipe->handler = &usbhs_fifo_pio_push_handler;
365 usbhsg_queue_push(dcp, usbhsg_req_to_ureq(req));
366}
367
368static int usbhsg_recip_handler_std_get_device(struct usbhs_priv *priv,
369 struct usbhsg_uep *uep,
370 struct usb_ctrlrequest *ctrl)
371{
372 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
373 unsigned short status = 1 << USB_DEVICE_SELF_POWERED;
374
375 __usbhsg_recip_send_status(gpriv, status);
376
377 return 0;
378}
379
380static int usbhsg_recip_handler_std_get_interface(struct usbhs_priv *priv,
381 struct usbhsg_uep *uep,
382 struct usb_ctrlrequest *ctrl)
383{
384 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
385 unsigned short status = 0;
386
387 __usbhsg_recip_send_status(gpriv, status);
388
389 return 0;
390}
391
392static int usbhsg_recip_handler_std_get_endpoint(struct usbhs_priv *priv,
393 struct usbhsg_uep *uep,
394 struct usb_ctrlrequest *ctrl)
395{
396 struct usbhsg_gpriv *gpriv = usbhsg_uep_to_gpriv(uep);
397 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
398 unsigned short status = 0;
399
400 if (usbhs_pipe_is_stall(pipe))
401 status = 1 << USB_ENDPOINT_HALT;
402
403 __usbhsg_recip_send_status(gpriv, status);
404
405 return 0;
406}
407
408struct usbhsg_recip_handle req_get_status = {
409 .name = "get status",
410 .device = usbhsg_recip_handler_std_get_device,
411 .interface = usbhsg_recip_handler_std_get_interface,
412 .endpoint = usbhsg_recip_handler_std_get_endpoint,
413};
414
415/*
285 * USB_TYPE handler 416 * USB_TYPE handler
286 */ 417 */
287static int usbhsg_recip_run_handle(struct usbhs_priv *priv, 418static int usbhsg_recip_run_handle(struct usbhs_priv *priv,
@@ -303,8 +434,7 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv,
303 pipe = usbhsg_uep_to_pipe(uep); 434 pipe = usbhsg_uep_to_pipe(uep);
304 if (!pipe) { 435 if (!pipe) {
305 dev_err(dev, "wrong recip request\n"); 436 dev_err(dev, "wrong recip request\n");
306 ret = -EINVAL; 437 return -EINVAL;
307 goto usbhsg_recip_run_handle_end;
308 } 438 }
309 439
310 switch (recip) { 440 switch (recip) {
@@ -327,20 +457,10 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv,
327 } 457 }
328 458
329 if (func) { 459 if (func) {
330 unsigned long flags;
331
332 dev_dbg(dev, "%s (pipe %d :%s)\n", handler->name, nth, msg); 460 dev_dbg(dev, "%s (pipe %d :%s)\n", handler->name, nth, msg);
333
334 /******************** spin lock ********************/
335 usbhs_lock(priv, flags);
336 ret = func(priv, uep, ctrl); 461 ret = func(priv, uep, ctrl);
337 usbhs_unlock(priv, flags);
338 /******************** spin unlock ******************/
339 } 462 }
340 463
341usbhsg_recip_run_handle_end:
342 usbhs_pkt_start(pipe);
343
344 return ret; 464 return ret;
345} 465}
346 466
@@ -412,6 +532,12 @@ static int usbhsg_irq_ctrl_stage(struct usbhs_priv *priv,
412 case USB_REQ_CLEAR_FEATURE: 532 case USB_REQ_CLEAR_FEATURE:
413 recip_handler = &req_clear_feature; 533 recip_handler = &req_clear_feature;
414 break; 534 break;
535 case USB_REQ_SET_FEATURE:
536 recip_handler = &req_set_feature;
537 break;
538 case USB_REQ_GET_STATUS:
539 recip_handler = &req_get_status;
540 break;
415 } 541 }
416 } 542 }
417 543
@@ -439,14 +565,16 @@ static int usbhsg_pipe_disable(struct usbhsg_uep *uep)
439 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep); 565 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(uep);
440 struct usbhs_pkt *pkt; 566 struct usbhs_pkt *pkt;
441 567
442 usbhs_pipe_disable(pipe);
443
444 while (1) { 568 while (1) {
445 pkt = usbhs_pkt_pop(pipe, NULL); 569 pkt = usbhs_pkt_pop(pipe, NULL);
446 if (!pkt) 570 if (!pkt)
447 break; 571 break;
572
573 usbhsg_queue_pop(uep, usbhsg_pkt_to_ureq(pkt), -ECONNRESET);
448 } 574 }
449 575
576 usbhs_pipe_disable(pipe);
577
450 return 0; 578 return 0;
451} 579}
452 580
@@ -681,9 +809,7 @@ static int usbhsg_try_start(struct usbhs_priv *priv, u32 status)
681 * - function 809 * - function
682 * - usb module 810 * - usb module
683 */ 811 */
684 usbhs_sys_hispeed_ctrl(priv, 1);
685 usbhs_sys_function_ctrl(priv, 1); 812 usbhs_sys_function_ctrl(priv, 1);
686 usbhs_sys_usb_ctrl(priv, 1);
687 813
688 /* 814 /*
689 * enable irq callback 815 * enable irq callback
@@ -731,9 +857,8 @@ static int usbhsg_try_stop(struct usbhs_priv *priv, u32 status)
731 gpriv->gadget.speed = USB_SPEED_UNKNOWN; 857 gpriv->gadget.speed = USB_SPEED_UNKNOWN;
732 858
733 /* disable sys */ 859 /* disable sys */
734 usbhs_sys_hispeed_ctrl(priv, 0); 860 usbhs_sys_set_test_mode(priv, 0);
735 usbhs_sys_function_ctrl(priv, 0); 861 usbhs_sys_function_ctrl(priv, 0);
736 usbhs_sys_usb_ctrl(priv, 0);
737 862
738 usbhsg_pipe_disable(dcp); 863 usbhsg_pipe_disable(dcp);
739 864
@@ -755,7 +880,7 @@ static int usbhsg_gadget_start(struct usb_gadget *gadget,
755 880
756 if (!driver || 881 if (!driver ||
757 !driver->setup || 882 !driver->setup ||
758 driver->speed < USB_SPEED_FULL) 883 driver->max_speed < USB_SPEED_FULL)
759 return -EINVAL; 884 return -EINVAL;
760 885
761 /* first hook up the driver ... */ 886 /* first hook up the driver ... */
@@ -866,7 +991,7 @@ int usbhs_mod_gadget_probe(struct usbhs_priv *priv)
866 gpriv->gadget.dev.parent = dev; 991 gpriv->gadget.dev.parent = dev;
867 gpriv->gadget.name = "renesas_usbhs_udc"; 992 gpriv->gadget.name = "renesas_usbhs_udc";
868 gpriv->gadget.ops = &usbhsg_gadget_ops; 993 gpriv->gadget.ops = &usbhsg_gadget_ops;
869 gpriv->gadget.is_dualspeed = 1; 994 gpriv->gadget.max_speed = USB_SPEED_HIGH;
870 ret = device_register(&gpriv->gadget.dev); 995 ret = device_register(&gpriv->gadget.dev);
871 if (ret < 0) 996 if (ret < 0)
872 goto err_add_udc; 997 goto err_add_udc;
@@ -896,8 +1021,6 @@ int usbhs_mod_gadget_probe(struct usbhs_priv *priv)
896 } 1021 }
897 } 1022 }
898 1023
899 usbhsg_controller_register(gpriv);
900
901 ret = usb_add_gadget_udc(dev, &gpriv->gadget); 1024 ret = usb_add_gadget_udc(dev, &gpriv->gadget);
902 if (ret) 1025 if (ret)
903 goto err_register; 1026 goto err_register;
@@ -926,8 +1049,6 @@ void usbhs_mod_gadget_remove(struct usbhs_priv *priv)
926 1049
927 device_unregister(&gpriv->gadget.dev); 1050 device_unregister(&gpriv->gadget.dev);
928 1051
929 usbhsg_controller_unregister(gpriv);
930
931 kfree(gpriv->uep); 1052 kfree(gpriv->uep);
932 kfree(gpriv); 1053 kfree(gpriv);
933} 1054}
diff --git a/drivers/usb/renesas_usbhs/mod_host.c b/drivers/usb/renesas_usbhs/mod_host.c
index 7955de589951..1834cf50888c 100644
--- a/drivers/usb/renesas_usbhs/mod_host.c
+++ b/drivers/usb/renesas_usbhs/mod_host.c
@@ -45,36 +45,34 @@
45 * 45 *
46 * +--------+ pipes are reused for each uep. 46 * +--------+ pipes are reused for each uep.
47 * | udev 1 |-+- [uep 0 (dcp) ] --+ pipe will be switched when 47 * | udev 1 |-+- [uep 0 (dcp) ] --+ pipe will be switched when
48 * +--------+ | | target device was changed 48 * +--------+ | | other device requested
49 * +- [uep 1 (bulk)] --|---+ +--------------+ 49 * +- [uep 1 (bulk)] --|---+ +--------------+
50 * | +--------------> | pipe0 (dcp) | 50 * | +--------------> | pipe0 (dcp) |
51 * +- [uep 2 (bulk)] --|---|---+ +--------------+ 51 * +- [uep 2 (bulk)] -@ | +--------------+
52 * | | | | pipe1 (isoc) | 52 * | | pipe1 (isoc) |
53 * +--------+ | | | +--------------+ 53 * +--------+ | +--------------+
54 * | udev 2 |-+- [uep 0 (dcp) ] --+ +-- |------> | pipe2 (bulk) | 54 * | udev 2 |-+- [uep 0 (dcp) ] -@ +----------> | pipe2 (bulk) |
55 * +--------+ | | | | +--------------+ 55 * +--------+ | +--------------+
56 * +- [uep 1 (int) ] --|-+ | +------> | pipe3 (bulk) | 56 * +- [uep 1 (int) ] ----+ +------> | pipe3 (bulk) |
57 * | | | | +--------------+ 57 * | | +--------------+
58 * +--------+ | +-|---|------> | pipe4 (int) | 58 * +--------+ +-----|------> | pipe4 (int) |
59 * | udev 3 |-+- [uep 0 (dcp) ] --+ | | +--------------+ 59 * | udev 3 |-+- [uep 0 (dcp) ] -@ | +--------------+
60 * +--------+ | | | | .... | 60 * +--------+ | | | .... |
61 * +- [uep 1 (bulk)] ------+ | | .... | 61 * +- [uep 1 (bulk)] -@ | | .... |
62 * | | 62 * | |
63 * +- [uep 2 (bulk)]-----------+ 63 * +- [uep 2 (bulk)]-----------+
64 *
65 * @ : uep requested free pipe, but all have been used.
66 * now it is waiting for free pipe
64 */ 67 */
65 68
66 69
67/* 70/*
68 * struct 71 * struct
69 */ 72 */
70struct usbhsh_pipe_info {
71 unsigned int usr_cnt; /* see usbhsh_endpoint_alloc() */
72};
73
74struct usbhsh_request { 73struct usbhsh_request {
75 struct urb *urb; 74 struct urb *urb;
76 struct usbhs_pkt pkt; 75 struct usbhs_pkt pkt;
77 struct list_head ureq_link; /* see hpriv :: ureq_link_xxx */
78}; 76};
79 77
80struct usbhsh_device { 78struct usbhsh_device {
@@ -83,11 +81,10 @@ struct usbhsh_device {
83}; 81};
84 82
85struct usbhsh_ep { 83struct usbhsh_ep {
86 struct usbhs_pipe *pipe; 84 struct usbhs_pipe *pipe; /* attached pipe */
87 struct usbhsh_device *udev; /* attached udev */ 85 struct usbhsh_device *udev; /* attached udev */
86 struct usb_host_endpoint *ep;
88 struct list_head ep_list; /* list to usbhsh_device */ 87 struct list_head ep_list; /* list to usbhsh_device */
89
90 int maxp;
91}; 88};
92 89
93#define USBHSH_DEVICE_MAX 10 /* see DEVADDn / DCPMAXP / PIPEMAXP */ 90#define USBHSH_DEVICE_MAX 10 /* see DEVADDn / DCPMAXP / PIPEMAXP */
@@ -98,16 +95,9 @@ struct usbhsh_hpriv {
98 95
99 struct usbhsh_device udev[USBHSH_DEVICE_MAX]; 96 struct usbhsh_device udev[USBHSH_DEVICE_MAX];
100 97
101 struct usbhsh_pipe_info *pipe_info;
102 int pipe_size;
103
104 u32 port_stat; /* USB_PORT_STAT_xxx */ 98 u32 port_stat; /* USB_PORT_STAT_xxx */
105 99
106 struct completion setup_ack_done; 100 struct completion setup_ack_done;
107
108 /* see usbhsh_req_alloc/free */
109 struct list_head ureq_link_active;
110 struct list_head ureq_link_free;
111}; 101};
112 102
113 103
@@ -119,17 +109,6 @@ static const char usbhsh_hcd_name[] = "renesas_usbhs host";
119#define usbhsh_priv_to_hpriv(priv) \ 109#define usbhsh_priv_to_hpriv(priv) \
120 container_of(usbhs_mod_get(priv, USBHS_HOST), struct usbhsh_hpriv, mod) 110 container_of(usbhs_mod_get(priv, USBHS_HOST), struct usbhsh_hpriv, mod)
121 111
122#define __usbhsh_for_each_hpipe(start, pos, h, i) \
123 for (i = start, pos = (h)->hpipe + i; \
124 i < (h)->hpipe_size; \
125 i++, pos = (h)->hpipe + i)
126
127#define usbhsh_for_each_hpipe(pos, hpriv, i) \
128 __usbhsh_for_each_hpipe(1, pos, hpriv, i)
129
130#define usbhsh_for_each_hpipe_with_dcp(pos, hpriv, i) \
131 __usbhsh_for_each_hpipe(0, pos, hpriv, i)
132
133#define __usbhsh_for_each_udev(start, pos, h, i) \ 112#define __usbhsh_for_each_udev(start, pos, h, i) \
134 for (i = start, pos = (h)->udev + i; \ 113 for (i = start, pos = (h)->udev + i; \
135 i < USBHSH_DEVICE_MAX; \ 114 i < USBHSH_DEVICE_MAX; \
@@ -152,15 +131,20 @@ static const char usbhsh_hcd_name[] = "renesas_usbhs host";
152#define usbhsh_ep_to_uep(u) ((u)->hcpriv) 131#define usbhsh_ep_to_uep(u) ((u)->hcpriv)
153#define usbhsh_uep_to_pipe(u) ((u)->pipe) 132#define usbhsh_uep_to_pipe(u) ((u)->pipe)
154#define usbhsh_uep_to_udev(u) ((u)->udev) 133#define usbhsh_uep_to_udev(u) ((u)->udev)
134#define usbhsh_uep_to_ep(u) ((u)->ep)
135
155#define usbhsh_urb_to_ureq(u) ((u)->hcpriv) 136#define usbhsh_urb_to_ureq(u) ((u)->hcpriv)
156#define usbhsh_urb_to_usbv(u) ((u)->dev) 137#define usbhsh_urb_to_usbv(u) ((u)->dev)
157 138
158#define usbhsh_usbv_to_udev(d) dev_get_drvdata(&(d)->dev) 139#define usbhsh_usbv_to_udev(d) dev_get_drvdata(&(d)->dev)
159 140
160#define usbhsh_udev_to_usbv(h) ((h)->usbv) 141#define usbhsh_udev_to_usbv(h) ((h)->usbv)
142#define usbhsh_udev_is_used(h) usbhsh_udev_to_usbv(h)
161 143
162#define usbhsh_pipe_info(p) ((p)->mod_private) 144#define usbhsh_pipe_to_uep(p) ((p)->mod_private)
163 145
146#define usbhsh_device_parent(d) (usbhsh_usbv_to_udev((d)->usbv->parent))
147#define usbhsh_device_hubport(d) ((d)->usbv->portnum)
164#define usbhsh_device_number(h, d) ((int)((d) - (h)->udev)) 148#define usbhsh_device_number(h, d) ((int)((d) - (h)->udev))
165#define usbhsh_device_nth(h, d) ((h)->udev + d) 149#define usbhsh_device_nth(h, d) ((h)->udev + d)
166#define usbhsh_device0(h) usbhsh_device_nth(h, 0) 150#define usbhsh_device0(h) usbhsh_device_nth(h, 0)
@@ -170,38 +154,13 @@ static const char usbhsh_hcd_name[] = "renesas_usbhs host";
170#define usbhsh_port_stat_clear(h, s) ((h)->port_stat &= ~(s)) 154#define usbhsh_port_stat_clear(h, s) ((h)->port_stat &= ~(s))
171#define usbhsh_port_stat_get(h) ((h)->port_stat) 155#define usbhsh_port_stat_get(h) ((h)->port_stat)
172 156
173#define usbhsh_pkt_to_req(p) \ 157#define usbhsh_pkt_to_ureq(p) \
174 container_of((void *)p, struct usbhsh_request, pkt) 158 container_of((void *)p, struct usbhsh_request, pkt)
175 159
176/* 160/*
177 * req alloc/free 161 * req alloc/free
178 */ 162 */
179static void usbhsh_req_list_init(struct usbhsh_hpriv *hpriv) 163static struct usbhsh_request *usbhsh_ureq_alloc(struct usbhsh_hpriv *hpriv,
180{
181 INIT_LIST_HEAD(&hpriv->ureq_link_active);
182 INIT_LIST_HEAD(&hpriv->ureq_link_free);
183}
184
185static void usbhsh_req_list_quit(struct usbhsh_hpriv *hpriv)
186{
187 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv);
188 struct device *dev = usbhsh_hcd_to_dev(hcd);
189 struct usbhsh_request *ureq, *next;
190
191 /* kfree all active ureq */
192 list_for_each_entry_safe(ureq, next,
193 &hpriv->ureq_link_active,
194 ureq_link) {
195 dev_err(dev, "active ureq (%p) is force freed\n", ureq);
196 kfree(ureq);
197 }
198
199 /* kfree all free ureq */
200 list_for_each_entry_safe(ureq, next, &hpriv->ureq_link_free, ureq_link)
201 kfree(ureq);
202}
203
204static struct usbhsh_request *usbhsh_req_alloc(struct usbhsh_hpriv *hpriv,
205 struct urb *urb, 164 struct urb *urb,
206 gfp_t mem_flags) 165 gfp_t mem_flags)
207{ 166{
@@ -209,270 +168,460 @@ static struct usbhsh_request *usbhsh_req_alloc(struct usbhsh_hpriv *hpriv,
209 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv); 168 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
210 struct device *dev = usbhs_priv_to_dev(priv); 169 struct device *dev = usbhs_priv_to_dev(priv);
211 170
212 if (list_empty(&hpriv->ureq_link_free)) { 171 ureq = kzalloc(sizeof(struct usbhsh_request), mem_flags);
213 /*
214 * create new one if there is no free ureq
215 */
216 ureq = kzalloc(sizeof(struct usbhsh_request), mem_flags);
217 if (ureq)
218 INIT_LIST_HEAD(&ureq->ureq_link);
219 } else {
220 /*
221 * reuse "free" ureq if exist
222 */
223 ureq = list_entry(hpriv->ureq_link_free.next,
224 struct usbhsh_request,
225 ureq_link);
226 if (ureq)
227 list_del_init(&ureq->ureq_link);
228 }
229
230 if (!ureq) { 172 if (!ureq) {
231 dev_err(dev, "ureq alloc fail\n"); 173 dev_err(dev, "ureq alloc fail\n");
232 return NULL; 174 return NULL;
233 } 175 }
234 176
235 usbhs_pkt_init(&ureq->pkt); 177 usbhs_pkt_init(&ureq->pkt);
236
237 /*
238 * push it to "active" list
239 */
240 list_add_tail(&ureq->ureq_link, &hpriv->ureq_link_active);
241 ureq->urb = urb; 178 ureq->urb = urb;
179 usbhsh_urb_to_ureq(urb) = ureq;
242 180
243 return ureq; 181 return ureq;
244} 182}
245 183
246static void usbhsh_req_free(struct usbhsh_hpriv *hpriv, 184static void usbhsh_ureq_free(struct usbhsh_hpriv *hpriv,
247 struct usbhsh_request *ureq) 185 struct usbhsh_request *ureq)
248{ 186{
249 struct usbhs_pkt *pkt = &ureq->pkt; 187 usbhsh_urb_to_ureq(ureq->urb) = NULL;
188 ureq->urb = NULL;
250 189
251 usbhs_pkt_init(pkt); 190 kfree(ureq);
191}
252 192
193/*
194 * status
195 */
196static int usbhsh_is_running(struct usbhsh_hpriv *hpriv)
197{
253 /* 198 /*
254 * removed from "active" list, 199 * we can decide some device is attached or not
255 * and push it to "free" list 200 * by checking mod.irq_attch
201 * see
202 * usbhsh_irq_attch()
203 * usbhsh_irq_dtch()
256 */ 204 */
257 ureq->urb = NULL; 205 return (hpriv->mod.irq_attch == NULL);
258 list_del_init(&ureq->ureq_link);
259 list_add_tail(&ureq->ureq_link, &hpriv->ureq_link_free);
260} 206}
261 207
262/* 208/*
263 * device control 209 * pipe control
264 */ 210 */
265 211static void usbhsh_endpoint_sequence_save(struct usbhsh_hpriv *hpriv,
266static int usbhsh_device_has_endpoint(struct usbhsh_device *udev) 212 struct urb *urb,
213 struct usbhs_pkt *pkt)
267{ 214{
268 return !list_empty(&udev->ep_list_head); 215 int len = urb->actual_length;
269} 216 int maxp = usb_endpoint_maxp(&urb->ep->desc);
217 int t = 0;
270 218
271static struct usbhsh_device *usbhsh_device_alloc(struct usbhsh_hpriv *hpriv, 219 /* DCP is out of sequence control */
272 struct urb *urb) 220 if (usb_pipecontrol(urb->pipe))
273{ 221 return;
274 struct usbhsh_device *udev = NULL;
275 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv);
276 struct device *dev = usbhsh_hcd_to_dev(hcd);
277 struct usb_device *usbv = usbhsh_urb_to_usbv(urb);
278 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
279 int i;
280 222
281 /* 223 /*
282 * device 0 224 * renesas_usbhs pipe has a limitation in a number.
225 * So, driver should re-use the limited pipe for each device/endpoint.
226 * DATA0/1 sequence should be saved for it.
227 * see [image of mod_host]
228 * [HARDWARE LIMITATION]
283 */ 229 */
284 if (0 == usb_pipedevice(urb->pipe)) {
285 udev = usbhsh_device0(hpriv);
286 goto usbhsh_device_find;
287 }
288 230
289 /* 231 /*
290 * find unused device 232 * next sequence depends on actual_length
233 *
234 * ex) actual_length = 1147, maxp = 512
235 * data0 : 512
236 * data1 : 512
237 * data0 : 123
238 * data1 is the next sequence
291 */ 239 */
292 usbhsh_for_each_udev(udev, hpriv, i) { 240 t = len / maxp;
293 if (usbhsh_udev_to_usbv(udev)) 241 if (len % maxp)
294 continue; 242 t++;
295 goto usbhsh_device_find; 243 if (pkt->zero)
244 t++;
245 t %= 2;
246
247 if (t)
248 usb_dotoggle(urb->dev,
249 usb_pipeendpoint(urb->pipe),
250 usb_pipeout(urb->pipe));
251}
252
253static struct usbhsh_device *usbhsh_device_get(struct usbhsh_hpriv *hpriv,
254 struct urb *urb);
255
256static int usbhsh_pipe_attach(struct usbhsh_hpriv *hpriv,
257 struct urb *urb)
258{
259 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
260 struct usbhsh_ep *uep = usbhsh_ep_to_uep(urb->ep);
261 struct usbhsh_device *udev = usbhsh_device_get(hpriv, urb);
262 struct usbhs_pipe *pipe;
263 struct usb_endpoint_descriptor *desc = &urb->ep->desc;
264 struct device *dev = usbhs_priv_to_dev(priv);
265 unsigned long flags;
266 int dir_in_req = !!usb_pipein(urb->pipe);
267 int is_dcp = usb_endpoint_xfer_control(desc);
268 int i, dir_in;
269 int ret = -EBUSY;
270
271 /******************** spin lock ********************/
272 usbhs_lock(priv, flags);
273
274 if (unlikely(usbhsh_uep_to_pipe(uep))) {
275 dev_err(dev, "uep already has pipe\n");
276 goto usbhsh_pipe_attach_done;
296 } 277 }
297 278
298 dev_err(dev, "no free usbhsh_device\n"); 279 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
299 280
300 return NULL; 281 /* check pipe type */
282 if (!usbhs_pipe_type_is(pipe, usb_endpoint_type(desc)))
283 continue;
301 284
302usbhsh_device_find: 285 /* check pipe direction if normal pipe */
303 if (usbhsh_device_has_endpoint(udev)) 286 if (!is_dcp) {
304 dev_warn(dev, "udev have old endpoint\n"); 287 dir_in = !!usbhs_pipe_is_dir_in(pipe);
288 if (0 != (dir_in - dir_in_req))
289 continue;
290 }
305 291
306 /* uep will be attached */ 292 /* check pipe is free */
307 INIT_LIST_HEAD(&udev->ep_list_head); 293 if (usbhsh_pipe_to_uep(pipe))
294 continue;
308 295
309 /* 296 /*
310 * usbhsh_usbv_to_udev() 297 * attach pipe to uep
311 * usbhsh_udev_to_usbv() 298 *
312 * will be enable 299 * usbhs_pipe_config_update() should be called after
313 */ 300 * usbhs_set_device_config()
314 dev_set_drvdata(&usbv->dev, udev); 301 * see
315 udev->usbv = usbv; 302 * DCPMAXP/PIPEMAXP
303 */
304 usbhsh_uep_to_pipe(uep) = pipe;
305 usbhsh_pipe_to_uep(pipe) = uep;
316 306
317 /* set device config */ 307 usbhs_pipe_config_update(pipe,
318 usbhs_set_device_speed(priv, 308 usbhsh_device_number(hpriv, udev),
319 usbhsh_device_number(hpriv, udev), 309 usb_endpoint_num(desc),
320 usbhsh_device_number(hpriv, udev), 310 usb_endpoint_maxp(desc));
321 0, /* FIXME no parent */
322 usbv->speed);
323 311
324 dev_dbg(dev, "%s [%d](%p)\n", __func__, 312 dev_dbg(dev, "%s [%d-%d(%s:%s)]\n", __func__,
325 usbhsh_device_number(hpriv, udev), udev); 313 usbhsh_device_number(hpriv, udev),
314 usb_endpoint_num(desc),
315 usbhs_pipe_name(pipe),
316 dir_in_req ? "in" : "out");
326 317
327 return udev; 318 ret = 0;
319 break;
320 }
321
322usbhsh_pipe_attach_done:
323 usbhs_unlock(priv, flags);
324 /******************** spin unlock ******************/
325
326 return ret;
328} 327}
329 328
330static void usbhsh_device_free(struct usbhsh_hpriv *hpriv, 329static void usbhsh_pipe_detach(struct usbhsh_hpriv *hpriv,
331 struct usbhsh_device *udev) 330 struct usbhsh_ep *uep)
332{ 331{
333 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv); 332 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
334 struct device *dev = usbhsh_hcd_to_dev(hcd); 333 struct usbhs_pipe *pipe;
335 struct usb_device *usbv = usbhsh_udev_to_usbv(udev); 334 struct device *dev = usbhs_priv_to_dev(priv);
335 unsigned long flags;
336 336
337 dev_dbg(dev, "%s [%d](%p)\n", __func__, 337 /******************** spin lock ********************/
338 usbhsh_device_number(hpriv, udev), udev); 338 usbhs_lock(priv, flags);
339 339
340 if (usbhsh_device_has_endpoint(udev)) 340 pipe = usbhsh_uep_to_pipe(uep);
341 dev_warn(dev, "udev still have endpoint\n");
342 341
343 /* 342 if (unlikely(!pipe)) {
344 * usbhsh_usbv_to_udev() 343 dev_err(dev, "uep doens't have pipe\n");
345 * usbhsh_udev_to_usbv() 344 } else {
346 * will be disable 345 struct usb_host_endpoint *ep = usbhsh_uep_to_ep(uep);
347 */ 346 struct usbhsh_device *udev = usbhsh_uep_to_udev(uep);
348 dev_set_drvdata(&usbv->dev, NULL); 347
349 udev->usbv = NULL; 348 /* detach pipe from uep */
349 usbhsh_uep_to_pipe(uep) = NULL;
350 usbhsh_pipe_to_uep(pipe) = NULL;
351
352 dev_dbg(dev, "%s [%d-%d(%s)]\n", __func__,
353 usbhsh_device_number(hpriv, udev),
354 usb_endpoint_num(&ep->desc),
355 usbhs_pipe_name(pipe));
356 }
357
358 usbhs_unlock(priv, flags);
359 /******************** spin unlock ******************/
350} 360}
351 361
352/* 362/*
353 * end-point control 363 * endpoint control
354 */ 364 */
355struct usbhsh_ep *usbhsh_endpoint_alloc(struct usbhsh_hpriv *hpriv, 365static int usbhsh_endpoint_attach(struct usbhsh_hpriv *hpriv,
356 struct usbhsh_device *udev, 366 struct urb *urb,
357 struct usb_host_endpoint *ep, 367 gfp_t mem_flags)
358 int dir_in_req,
359 gfp_t mem_flags)
360{ 368{
361 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv); 369 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
362 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv); 370 struct usbhsh_device *udev = usbhsh_device_get(hpriv, urb);
371 struct usb_host_endpoint *ep = urb->ep;
363 struct usbhsh_ep *uep; 372 struct usbhsh_ep *uep;
364 struct usbhsh_pipe_info *info; 373 struct device *dev = usbhs_priv_to_dev(priv);
365 struct usbhs_pipe *pipe, *best_pipe;
366 struct device *dev = usbhsh_hcd_to_dev(hcd);
367 struct usb_endpoint_descriptor *desc = &ep->desc; 374 struct usb_endpoint_descriptor *desc = &ep->desc;
368 int type, i, dir_in; 375 unsigned long flags;
369 unsigned int min_usr;
370
371 dir_in_req = !!dir_in_req;
372 376
373 uep = kzalloc(sizeof(struct usbhsh_ep), mem_flags); 377 uep = kzalloc(sizeof(struct usbhsh_ep), mem_flags);
374 if (!uep) { 378 if (!uep) {
375 dev_err(dev, "usbhsh_ep alloc fail\n"); 379 dev_err(dev, "usbhsh_ep alloc fail\n");
376 return NULL; 380 return -ENOMEM;
377 } 381 }
378 382
379 if (usb_endpoint_xfer_control(desc)) { 383 /******************** spin lock ********************/
380 best_pipe = usbhsh_hpriv_to_dcp(hpriv); 384 usbhs_lock(priv, flags);
381 goto usbhsh_endpoint_alloc_find_pipe; 385
386 /*
387 * init endpoint
388 */
389 INIT_LIST_HEAD(&uep->ep_list);
390 list_add_tail(&uep->ep_list, &udev->ep_list_head);
391
392 usbhsh_uep_to_udev(uep) = udev;
393 usbhsh_uep_to_ep(uep) = ep;
394 usbhsh_ep_to_uep(ep) = uep;
395
396 usbhs_unlock(priv, flags);
397 /******************** spin unlock ******************/
398
399 dev_dbg(dev, "%s [%d-%d]\n", __func__,
400 usbhsh_device_number(hpriv, udev),
401 usb_endpoint_num(desc));
402
403 return 0;
404}
405
406static void usbhsh_endpoint_detach(struct usbhsh_hpriv *hpriv,
407 struct usb_host_endpoint *ep)
408{
409 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
410 struct device *dev = usbhs_priv_to_dev(priv);
411 struct usbhsh_ep *uep = usbhsh_ep_to_uep(ep);
412 unsigned long flags;
413
414 if (!uep)
415 return;
416
417 dev_dbg(dev, "%s [%d-%d]\n", __func__,
418 usbhsh_device_number(hpriv, usbhsh_uep_to_udev(uep)),
419 usb_endpoint_num(&ep->desc));
420
421 if (usbhsh_uep_to_pipe(uep))
422 usbhsh_pipe_detach(hpriv, uep);
423
424 /******************** spin lock ********************/
425 usbhs_lock(priv, flags);
426
427 /* remove this endpoint from udev */
428 list_del_init(&uep->ep_list);
429
430 usbhsh_uep_to_udev(uep) = NULL;
431 usbhsh_uep_to_ep(uep) = NULL;
432 usbhsh_ep_to_uep(ep) = NULL;
433
434 usbhs_unlock(priv, flags);
435 /******************** spin unlock ******************/
436
437 kfree(uep);
438}
439
440static void usbhsh_endpoint_detach_all(struct usbhsh_hpriv *hpriv,
441 struct usbhsh_device *udev)
442{
443 struct usbhsh_ep *uep, *next;
444
445 list_for_each_entry_safe(uep, next, &udev->ep_list_head, ep_list)
446 usbhsh_endpoint_detach(hpriv, usbhsh_uep_to_ep(uep));
447}
448
449/*
450 * device control
451 */
452static int usbhsh_connected_to_rhdev(struct usb_hcd *hcd,
453 struct usbhsh_device *udev)
454{
455 struct usb_device *usbv = usbhsh_udev_to_usbv(udev);
456
457 return hcd->self.root_hub == usbv->parent;
458}
459
460static int usbhsh_device_has_endpoint(struct usbhsh_device *udev)
461{
462 return !list_empty(&udev->ep_list_head);
463}
464
465static struct usbhsh_device *usbhsh_device_get(struct usbhsh_hpriv *hpriv,
466 struct urb *urb)
467{
468 struct usb_device *usbv = usbhsh_urb_to_usbv(urb);
469 struct usbhsh_device *udev = usbhsh_usbv_to_udev(usbv);
470
471 /* usbhsh_device_attach() is still not called */
472 if (!udev)
473 return NULL;
474
475 /* if it is device0, return it */
476 if (0 == usb_pipedevice(urb->pipe))
477 return usbhsh_device0(hpriv);
478
479 /* return attached device */
480 return udev;
481}
482
483static struct usbhsh_device *usbhsh_device_attach(struct usbhsh_hpriv *hpriv,
484 struct urb *urb)
485{
486 struct usbhsh_device *udev = NULL;
487 struct usbhsh_device *udev0 = usbhsh_device0(hpriv);
488 struct usbhsh_device *pos;
489 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv);
490 struct device *dev = usbhsh_hcd_to_dev(hcd);
491 struct usb_device *usbv = usbhsh_urb_to_usbv(urb);
492 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
493 unsigned long flags;
494 u16 upphub, hubport;
495 int i;
496
497 /*
498 * This function should be called only while urb is pointing to device0.
499 * It will attach unused usbhsh_device to urb (usbv),
500 * and initialize device0.
501 * You can use usbhsh_device_get() to get "current" udev,
502 * and usbhsh_usbv_to_udev() is for "attached" udev.
503 */
504 if (0 != usb_pipedevice(urb->pipe)) {
505 dev_err(dev, "%s fail: urb isn't pointing device0\n", __func__);
506 return NULL;
382 } 507 }
383 508
509 /******************** spin lock ********************/
510 usbhs_lock(priv, flags);
511
384 /* 512 /*
385 * find best pipe for endpoint 513 * find unused device
386 * see
387 * HARDWARE LIMITATION
388 */ 514 */
389 type = usb_endpoint_type(desc); 515 usbhsh_for_each_udev(pos, hpriv, i) {
390 min_usr = ~0; 516 if (usbhsh_udev_is_used(pos))
391 best_pipe = NULL;
392 usbhs_for_each_pipe(pipe, priv, i) {
393 if (!usbhs_pipe_type_is(pipe, type))
394 continue; 517 continue;
518 udev = pos;
519 break;
520 }
395 521
396 dir_in = !!usbhs_pipe_is_dir_in(pipe); 522 if (udev) {
397 if (0 != (dir_in - dir_in_req)) 523 /*
398 continue; 524 * usbhsh_usbv_to_udev()
525 * usbhsh_udev_to_usbv()
526 * will be enable
527 */
528 dev_set_drvdata(&usbv->dev, udev);
529 udev->usbv = usbv;
530 }
399 531
400 info = usbhsh_pipe_info(pipe); 532 usbhs_unlock(priv, flags);
533 /******************** spin unlock ******************/
401 534
402 if (min_usr > info->usr_cnt) { 535 if (!udev) {
403 min_usr = info->usr_cnt; 536 dev_err(dev, "no free usbhsh_device\n");
404 best_pipe = pipe; 537 return NULL;
405 }
406 } 538 }
407 539
408 if (unlikely(!best_pipe)) { 540 if (usbhsh_device_has_endpoint(udev)) {
409 dev_err(dev, "couldn't find best pipe\n"); 541 dev_warn(dev, "udev have old endpoint\n");
410 kfree(uep); 542 usbhsh_endpoint_detach_all(hpriv, udev);
411 return NULL; 543 }
544
545 if (usbhsh_device_has_endpoint(udev0)) {
546 dev_warn(dev, "udev0 have old endpoint\n");
547 usbhsh_endpoint_detach_all(hpriv, udev0);
412 } 548 }
413usbhsh_endpoint_alloc_find_pipe: 549
550 /* uep will be attached */
551 INIT_LIST_HEAD(&udev0->ep_list_head);
552 INIT_LIST_HEAD(&udev->ep_list_head);
553
414 /* 554 /*
415 * init uep 555 * set device0 config
416 */ 556 */
417 uep->pipe = best_pipe; 557 usbhs_set_device_config(priv,
418 uep->maxp = usb_endpoint_maxp(desc); 558 0, 0, 0, usbv->speed);
419 usbhsh_uep_to_udev(uep) = udev;
420 usbhsh_ep_to_uep(ep) = uep;
421 559
422 /* 560 /*
423 * update pipe user count 561 * set new device config
424 */ 562 */
425 info = usbhsh_pipe_info(best_pipe); 563 upphub = 0;
426 info->usr_cnt++; 564 hubport = 0;
565 if (!usbhsh_connected_to_rhdev(hcd, udev)) {
566 /* if udev is not connected to rhdev, it means parent is Hub */
567 struct usbhsh_device *parent = usbhsh_device_parent(udev);
427 568
428 /* init this endpoint, and attach it to udev */ 569 upphub = usbhsh_device_number(hpriv, parent);
429 INIT_LIST_HEAD(&uep->ep_list); 570 hubport = usbhsh_device_hubport(udev);
430 list_add_tail(&uep->ep_list, &udev->ep_list_head);
431 571
432 /* 572 dev_dbg(dev, "%s connecte to Hub [%d:%d](%p)\n", __func__,
433 * usbhs_pipe_config_update() should be called after 573 upphub, hubport, parent);
434 * usbhs_device_config() 574 }
435 * see
436 * DCPMAXP/PIPEMAXP
437 */
438 usbhs_pipe_sequence_data0(uep->pipe);
439 usbhs_pipe_config_update(uep->pipe,
440 usbhsh_device_number(hpriv, udev),
441 usb_endpoint_num(desc),
442 uep->maxp);
443 575
444 dev_dbg(dev, "%s [%d-%s](%p)\n", __func__, 576 usbhs_set_device_config(priv,
445 usbhsh_device_number(hpriv, udev), 577 usbhsh_device_number(hpriv, udev),
446 usbhs_pipe_name(uep->pipe), uep); 578 upphub, hubport, usbv->speed);
447 579
448 return uep; 580 dev_dbg(dev, "%s [%d](%p)\n", __func__,
581 usbhsh_device_number(hpriv, udev), udev);
582
583 return udev;
449} 584}
450 585
451void usbhsh_endpoint_free(struct usbhsh_hpriv *hpriv, 586static void usbhsh_device_detach(struct usbhsh_hpriv *hpriv,
452 struct usb_host_endpoint *ep) 587 struct usbhsh_device *udev)
453{ 588{
589 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv);
454 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv); 590 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
455 struct device *dev = usbhs_priv_to_dev(priv); 591 struct device *dev = usbhsh_hcd_to_dev(hcd);
456 struct usbhsh_ep *uep = usbhsh_ep_to_uep(ep); 592 struct usb_device *usbv = usbhsh_udev_to_usbv(udev);
457 struct usbhsh_pipe_info *info; 593 unsigned long flags;
458 594
459 if (!uep) 595 dev_dbg(dev, "%s [%d](%p)\n", __func__,
460 return; 596 usbhsh_device_number(hpriv, udev), udev);
461 597
462 dev_dbg(dev, "%s [%d-%s](%p)\n", __func__, 598 if (usbhsh_device_has_endpoint(udev)) {
463 usbhsh_device_number(hpriv, usbhsh_uep_to_udev(uep)), 599 dev_warn(dev, "udev still have endpoint\n");
464 usbhs_pipe_name(uep->pipe), uep); 600 usbhsh_endpoint_detach_all(hpriv, udev);
601 }
465 602
466 info = usbhsh_pipe_info(uep->pipe); 603 /*
467 info->usr_cnt--; 604 * There is nothing to do if it is device0.
605 * see
606 * usbhsh_device_attach()
607 * usbhsh_device_get()
608 */
609 if (0 == usbhsh_device_number(hpriv, udev))
610 return;
468 611
469 /* remove this endpoint from udev */ 612 /******************** spin lock ********************/
470 list_del_init(&uep->ep_list); 613 usbhs_lock(priv, flags);
471 614
472 usbhsh_uep_to_udev(uep) = NULL; 615 /*
473 usbhsh_ep_to_uep(ep) = NULL; 616 * usbhsh_usbv_to_udev()
617 * usbhsh_udev_to_usbv()
618 * will be disable
619 */
620 dev_set_drvdata(&usbv->dev, NULL);
621 udev->usbv = NULL;
474 622
475 kfree(uep); 623 usbhs_unlock(priv, flags);
624 /******************** spin unlock ******************/
476} 625}
477 626
478/* 627/*
@@ -480,11 +629,12 @@ void usbhsh_endpoint_free(struct usbhsh_hpriv *hpriv,
480 */ 629 */
481static void usbhsh_queue_done(struct usbhs_priv *priv, struct usbhs_pkt *pkt) 630static void usbhsh_queue_done(struct usbhs_priv *priv, struct usbhs_pkt *pkt)
482{ 631{
483 struct usbhsh_request *ureq = usbhsh_pkt_to_req(pkt); 632 struct usbhsh_request *ureq = usbhsh_pkt_to_ureq(pkt);
484 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv); 633 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv);
485 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv); 634 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv);
486 struct urb *urb = ureq->urb; 635 struct urb *urb = ureq->urb;
487 struct device *dev = usbhs_priv_to_dev(priv); 636 struct device *dev = usbhs_priv_to_dev(priv);
637 int status = 0;
488 638
489 dev_dbg(dev, "%s\n", __func__); 639 dev_dbg(dev, "%s\n", __func__);
490 640
@@ -493,29 +643,43 @@ static void usbhsh_queue_done(struct usbhs_priv *priv, struct usbhs_pkt *pkt)
493 return; 643 return;
494 } 644 }
495 645
646 if (!usbhsh_is_running(hpriv))
647 status = -ESHUTDOWN;
648
496 urb->actual_length = pkt->actual; 649 urb->actual_length = pkt->actual;
497 usbhsh_req_free(hpriv, ureq); 650 usbhsh_ureq_free(hpriv, ureq);
498 usbhsh_urb_to_ureq(urb) = NULL; 651
652 usbhsh_endpoint_sequence_save(hpriv, urb, pkt);
653 usbhsh_pipe_detach(hpriv, usbhsh_ep_to_uep(urb->ep));
499 654
500 usb_hcd_unlink_urb_from_ep(hcd, urb); 655 usb_hcd_unlink_urb_from_ep(hcd, urb);
501 usb_hcd_giveback_urb(hcd, urb, 0); 656 usb_hcd_giveback_urb(hcd, urb, status);
502} 657}
503 658
504static int usbhsh_queue_push(struct usb_hcd *hcd, 659static int usbhsh_queue_push(struct usb_hcd *hcd,
505 struct usbhs_pipe *pipe, 660 struct urb *urb,
506 struct urb *urb) 661 gfp_t mem_flags)
507{ 662{
508 struct usbhsh_request *ureq = usbhsh_urb_to_ureq(urb); 663 struct usbhsh_hpriv *hpriv = usbhsh_hcd_to_hpriv(hcd);
509 struct usbhs_pkt *pkt = &ureq->pkt; 664 struct usbhsh_ep *uep = usbhsh_ep_to_uep(urb->ep);
665 struct usbhs_pipe *pipe = usbhsh_uep_to_pipe(uep);
510 struct device *dev = usbhsh_hcd_to_dev(hcd); 666 struct device *dev = usbhsh_hcd_to_dev(hcd);
667 struct usbhsh_request *ureq;
511 void *buf; 668 void *buf;
512 int len; 669 int len, sequence;
513 670
514 if (usb_pipeisoc(urb->pipe)) { 671 if (usb_pipeisoc(urb->pipe)) {
515 dev_err(dev, "pipe iso is not supported now\n"); 672 dev_err(dev, "pipe iso is not supported now\n");
516 return -EIO; 673 return -EIO;
517 } 674 }
518 675
676 /* this ureq will be freed on usbhsh_queue_done() */
677 ureq = usbhsh_ureq_alloc(hpriv, urb, mem_flags);
678 if (unlikely(!ureq)) {
679 dev_err(dev, "ureq alloc fail\n");
680 return -ENOMEM;
681 }
682
519 if (usb_pipein(urb->pipe)) 683 if (usb_pipein(urb->pipe))
520 pipe->handler = &usbhs_fifo_pio_pop_handler; 684 pipe->handler = &usbhs_fifo_pio_pop_handler;
521 else 685 else
@@ -524,25 +688,59 @@ static int usbhsh_queue_push(struct usb_hcd *hcd,
524 buf = (void *)(urb->transfer_buffer + urb->actual_length); 688 buf = (void *)(urb->transfer_buffer + urb->actual_length);
525 len = urb->transfer_buffer_length - urb->actual_length; 689 len = urb->transfer_buffer_length - urb->actual_length;
526 690
691 sequence = usb_gettoggle(urb->dev,
692 usb_pipeendpoint(urb->pipe),
693 usb_pipeout(urb->pipe));
694
527 dev_dbg(dev, "%s\n", __func__); 695 dev_dbg(dev, "%s\n", __func__);
528 usbhs_pkt_push(pipe, pkt, usbhsh_queue_done, 696 usbhs_pkt_push(pipe, &ureq->pkt, usbhsh_queue_done,
529 buf, len, (urb->transfer_flags & URB_ZERO_PACKET)); 697 buf, len, (urb->transfer_flags & URB_ZERO_PACKET),
698 sequence);
699
530 usbhs_pkt_start(pipe); 700 usbhs_pkt_start(pipe);
531 701
532 return 0; 702 return 0;
533} 703}
534 704
705static void usbhsh_queue_force_pop(struct usbhs_priv *priv,
706 struct usbhs_pipe *pipe)
707{
708 struct usbhs_pkt *pkt;
709
710 while (1) {
711 pkt = usbhs_pkt_pop(pipe, NULL);
712 if (!pkt)
713 break;
714
715 /*
716 * if all packet are gone, usbhsh_endpoint_disable()
717 * will be called.
718 * then, attached device/endpoint/pipe will be detached
719 */
720 usbhsh_queue_done(priv, pkt);
721 }
722}
723
724static void usbhsh_queue_force_pop_all(struct usbhs_priv *priv)
725{
726 struct usbhs_pipe *pos;
727 int i;
728
729 usbhs_for_each_pipe_with_dcp(pos, priv, i)
730 usbhsh_queue_force_pop(priv, pos);
731}
732
535/* 733/*
536 * DCP setup stage 734 * DCP setup stage
537 */ 735 */
538static int usbhsh_is_request_address(struct urb *urb) 736static int usbhsh_is_request_address(struct urb *urb)
539{ 737{
540 struct usb_ctrlrequest *cmd; 738 struct usb_ctrlrequest *req;
541 739
542 cmd = (struct usb_ctrlrequest *)urb->setup_packet; 740 req = (struct usb_ctrlrequest *)urb->setup_packet;
543 741
544 if ((DeviceOutRequest == cmd->bRequestType << 8) && 742 if ((DeviceOutRequest == req->bRequestType << 8) &&
545 (USB_REQ_SET_ADDRESS == cmd->bRequest)) 743 (USB_REQ_SET_ADDRESS == req->bRequest))
546 return 1; 744 return 1;
547 else 745 else
548 return 0; 746 return 0;
@@ -570,11 +768,15 @@ static void usbhsh_setup_stage_packet_push(struct usbhsh_hpriv *hpriv,
570 /* 768 /*
571 * renesas_usbhs can not use original usb address. 769 * renesas_usbhs can not use original usb address.
572 * see HARDWARE LIMITATION. 770 * see HARDWARE LIMITATION.
573 * modify usb address here. 771 * modify usb address here to use attached device.
772 * see usbhsh_device_attach()
574 */ 773 */
575 if (usbhsh_is_request_address(urb)) { 774 if (usbhsh_is_request_address(urb)) {
576 /* FIXME */ 775 struct usb_device *usbv = usbhsh_urb_to_usbv(urb);
577 req.wValue = 1; 776 struct usbhsh_device *udev = usbhsh_usbv_to_udev(usbv);
777
778 /* udev is a attached device */
779 req.wValue = usbhsh_device_number(hpriv, udev);
578 dev_dbg(dev, "create new address - %d\n", req.wValue); 780 dev_dbg(dev, "create new address - %d\n", req.wValue);
579 } 781 }
580 782
@@ -595,82 +797,80 @@ static void usbhsh_setup_stage_packet_push(struct usbhsh_hpriv *hpriv,
595static void usbhsh_data_stage_packet_done(struct usbhs_priv *priv, 797static void usbhsh_data_stage_packet_done(struct usbhs_priv *priv,
596 struct usbhs_pkt *pkt) 798 struct usbhs_pkt *pkt)
597{ 799{
598 struct usbhsh_request *ureq = usbhsh_pkt_to_req(pkt); 800 struct usbhsh_request *ureq = usbhsh_pkt_to_ureq(pkt);
599 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv); 801 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv);
600 struct urb *urb = ureq->urb;
601 802
602 /* this ureq was connected to urb when usbhsh_urb_enqueue() */ 803 /* this ureq was connected to urb when usbhsh_urb_enqueue() */
603 804
604 usbhsh_req_free(hpriv, ureq); 805 usbhsh_ureq_free(hpriv, ureq);
605 usbhsh_urb_to_ureq(urb) = NULL;
606} 806}
607 807
608static void usbhsh_data_stage_packet_push(struct usbhsh_hpriv *hpriv, 808static int usbhsh_data_stage_packet_push(struct usbhsh_hpriv *hpriv,
609 struct urb *urb, 809 struct urb *urb,
610 struct usbhs_pipe *pipe) 810 struct usbhs_pipe *pipe,
811 gfp_t mem_flags)
812
611{ 813{
612 struct usbhsh_request *ureq; 814 struct usbhsh_request *ureq;
613 struct usbhs_pkt *pkt;
614 815
615 /* 816 /* this ureq will be freed on usbhsh_data_stage_packet_done() */
616 * FIXME 817 ureq = usbhsh_ureq_alloc(hpriv, urb, mem_flags);
617 * 818 if (unlikely(!ureq))
618 * data stage uses ureq which is connected to urb 819 return -ENOMEM;
619 * see usbhsh_urb_enqueue() :: alloc new request.
620 * it will be freed in usbhsh_data_stage_packet_done()
621 */
622 ureq = usbhsh_urb_to_ureq(urb);
623 pkt = &ureq->pkt;
624 820
625 if (usb_pipein(urb->pipe)) 821 if (usb_pipein(urb->pipe))
626 pipe->handler = &usbhs_dcp_data_stage_in_handler; 822 pipe->handler = &usbhs_dcp_data_stage_in_handler;
627 else 823 else
628 pipe->handler = &usbhs_dcp_data_stage_out_handler; 824 pipe->handler = &usbhs_dcp_data_stage_out_handler;
629 825
630 usbhs_pkt_push(pipe, pkt, 826 usbhs_pkt_push(pipe, &ureq->pkt,
631 usbhsh_data_stage_packet_done, 827 usbhsh_data_stage_packet_done,
632 urb->transfer_buffer, 828 urb->transfer_buffer,
633 urb->transfer_buffer_length, 829 urb->transfer_buffer_length,
634 (urb->transfer_flags & URB_ZERO_PACKET)); 830 (urb->transfer_flags & URB_ZERO_PACKET),
831 -1);
832
833 return 0;
635} 834}
636 835
637/* 836/*
638 * DCP status stage 837 * DCP status stage
639 */ 838 */
640static void usbhsh_status_stage_packet_push(struct usbhsh_hpriv *hpriv, 839static int usbhsh_status_stage_packet_push(struct usbhsh_hpriv *hpriv,
641 struct urb *urb, 840 struct urb *urb,
642 struct usbhs_pipe *pipe) 841 struct usbhs_pipe *pipe,
842 gfp_t mem_flags)
643{ 843{
644 struct usbhsh_request *ureq; 844 struct usbhsh_request *ureq;
645 struct usbhs_pkt *pkt;
646 845
647 /* 846 /* This ureq will be freed on usbhsh_queue_done() */
648 * FIXME 847 ureq = usbhsh_ureq_alloc(hpriv, urb, mem_flags);
649 * 848 if (unlikely(!ureq))
650 * status stage uses allocated ureq. 849 return -ENOMEM;
651 * it will be freed on usbhsh_queue_done()
652 */
653 ureq = usbhsh_req_alloc(hpriv, urb, GFP_KERNEL);
654 pkt = &ureq->pkt;
655 850
656 if (usb_pipein(urb->pipe)) 851 if (usb_pipein(urb->pipe))
657 pipe->handler = &usbhs_dcp_status_stage_in_handler; 852 pipe->handler = &usbhs_dcp_status_stage_in_handler;
658 else 853 else
659 pipe->handler = &usbhs_dcp_status_stage_out_handler; 854 pipe->handler = &usbhs_dcp_status_stage_out_handler;
660 855
661 usbhs_pkt_push(pipe, pkt, 856 usbhs_pkt_push(pipe, &ureq->pkt,
662 usbhsh_queue_done, 857 usbhsh_queue_done,
663 NULL, 858 NULL,
664 urb->transfer_buffer_length, 859 urb->transfer_buffer_length,
665 0); 860 0, -1);
861
862 return 0;
666} 863}
667 864
668static int usbhsh_dcp_queue_push(struct usb_hcd *hcd, 865static int usbhsh_dcp_queue_push(struct usb_hcd *hcd,
669 struct usbhsh_hpriv *hpriv, 866 struct urb *urb,
670 struct usbhs_pipe *pipe, 867 gfp_t mflags)
671 struct urb *urb)
672{ 868{
869 struct usbhsh_hpriv *hpriv = usbhsh_hcd_to_hpriv(hcd);
870 struct usbhsh_ep *uep = usbhsh_ep_to_uep(urb->ep);
871 struct usbhs_pipe *pipe = usbhsh_uep_to_pipe(uep);
673 struct device *dev = usbhsh_hcd_to_dev(hcd); 872 struct device *dev = usbhsh_hcd_to_dev(hcd);
873 int ret;
674 874
675 dev_dbg(dev, "%s\n", __func__); 875 dev_dbg(dev, "%s\n", __func__);
676 876
@@ -686,13 +886,22 @@ static int usbhsh_dcp_queue_push(struct usb_hcd *hcd,
686 * 886 *
687 * It is pushed only when urb has buffer. 887 * It is pushed only when urb has buffer.
688 */ 888 */
689 if (urb->transfer_buffer_length) 889 if (urb->transfer_buffer_length) {
690 usbhsh_data_stage_packet_push(hpriv, urb, pipe); 890 ret = usbhsh_data_stage_packet_push(hpriv, urb, pipe, mflags);
891 if (ret < 0) {
892 dev_err(dev, "data stage failed\n");
893 return ret;
894 }
895 }
691 896
692 /* 897 /*
693 * status stage 898 * status stage
694 */ 899 */
695 usbhsh_status_stage_packet_push(hpriv, urb, pipe); 900 ret = usbhsh_status_stage_packet_push(hpriv, urb, pipe, mflags);
901 if (ret < 0) {
902 dev_err(dev, "status stage failed\n");
903 return ret;
904 }
696 905
697 /* 906 /*
698 * start pushed packets 907 * start pushed packets
@@ -729,71 +938,82 @@ static int usbhsh_urb_enqueue(struct usb_hcd *hcd,
729 struct usbhsh_hpriv *hpriv = usbhsh_hcd_to_hpriv(hcd); 938 struct usbhsh_hpriv *hpriv = usbhsh_hcd_to_hpriv(hcd);
730 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv); 939 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
731 struct device *dev = usbhs_priv_to_dev(priv); 940 struct device *dev = usbhs_priv_to_dev(priv);
732 struct usb_device *usbv = usbhsh_urb_to_usbv(urb);
733 struct usb_host_endpoint *ep = urb->ep; 941 struct usb_host_endpoint *ep = urb->ep;
734 struct usbhsh_request *ureq; 942 struct usbhsh_device *new_udev = NULL;
735 struct usbhsh_device *udev, *new_udev = NULL;
736 struct usbhs_pipe *pipe;
737 struct usbhsh_ep *uep;
738 int is_dir_in = usb_pipein(urb->pipe); 943 int is_dir_in = usb_pipein(urb->pipe);
739 944 int i;
740 int ret; 945 int ret;
741 946
742 dev_dbg(dev, "%s (%s)\n", __func__, is_dir_in ? "in" : "out"); 947 dev_dbg(dev, "%s (%s)\n", __func__, is_dir_in ? "in" : "out");
743 948
949 if (!usbhsh_is_running(hpriv)) {
950 ret = -EIO;
951 dev_err(dev, "host is not running\n");
952 goto usbhsh_urb_enqueue_error_not_linked;
953 }
954
744 ret = usb_hcd_link_urb_to_ep(hcd, urb); 955 ret = usb_hcd_link_urb_to_ep(hcd, urb);
745 if (ret) 956 if (ret) {
957 dev_err(dev, "urb link failed\n");
746 goto usbhsh_urb_enqueue_error_not_linked; 958 goto usbhsh_urb_enqueue_error_not_linked;
959 }
747 960
748 /* 961 /*
749 * get udev 962 * attach udev if needed
963 * see [image of mod_host]
750 */ 964 */
751 udev = usbhsh_usbv_to_udev(usbv); 965 if (!usbhsh_device_get(hpriv, urb)) {
752 if (!udev) { 966 new_udev = usbhsh_device_attach(hpriv, urb);
753 new_udev = usbhsh_device_alloc(hpriv, urb); 967 if (!new_udev) {
754 if (!new_udev) 968 ret = -EIO;
969 dev_err(dev, "device attach failed\n");
755 goto usbhsh_urb_enqueue_error_not_linked; 970 goto usbhsh_urb_enqueue_error_not_linked;
756 971 }
757 udev = new_udev;
758 } 972 }
759 973
760 /* 974 /*
761 * get uep 975 * attach endpoint if needed
976 * see [image of mod_host]
762 */ 977 */
763 uep = usbhsh_ep_to_uep(ep); 978 if (!usbhsh_ep_to_uep(ep)) {
764 if (!uep) { 979 ret = usbhsh_endpoint_attach(hpriv, urb, mem_flags);
765 uep = usbhsh_endpoint_alloc(hpriv, udev, ep, 980 if (ret < 0) {
766 is_dir_in, mem_flags); 981 dev_err(dev, "endpoint attach failed\n");
767 if (!uep)
768 goto usbhsh_urb_enqueue_error_free_device; 982 goto usbhsh_urb_enqueue_error_free_device;
983 }
769 } 984 }
770 pipe = usbhsh_uep_to_pipe(uep);
771 985
772 /* 986 /*
773 * alloc new request 987 * attach pipe to endpoint
988 * see [image of mod_host]
774 */ 989 */
775 ureq = usbhsh_req_alloc(hpriv, urb, mem_flags); 990 for (i = 0; i < 1024; i++) {
776 if (unlikely(!ureq)) { 991 ret = usbhsh_pipe_attach(hpriv, urb);
777 ret = -ENOMEM; 992 if (ret < 0)
993 msleep(100);
994 else
995 break;
996 }
997 if (ret < 0) {
998 dev_err(dev, "pipe attach failed\n");
778 goto usbhsh_urb_enqueue_error_free_endpoint; 999 goto usbhsh_urb_enqueue_error_free_endpoint;
779 } 1000 }
780 usbhsh_urb_to_ureq(urb) = ureq;
781 1001
782 /* 1002 /*
783 * push packet 1003 * push packet
784 */ 1004 */
785 if (usb_pipecontrol(urb->pipe)) 1005 if (usb_pipecontrol(urb->pipe))
786 usbhsh_dcp_queue_push(hcd, hpriv, pipe, urb); 1006 ret = usbhsh_dcp_queue_push(hcd, urb, mem_flags);
787 else 1007 else
788 usbhsh_queue_push(hcd, pipe, urb); 1008 ret = usbhsh_queue_push(hcd, urb, mem_flags);
789 1009
790 return 0; 1010 return ret;
791 1011
792usbhsh_urb_enqueue_error_free_endpoint: 1012usbhsh_urb_enqueue_error_free_endpoint:
793 usbhsh_endpoint_free(hpriv, ep); 1013 usbhsh_endpoint_detach(hpriv, ep);
794usbhsh_urb_enqueue_error_free_device: 1014usbhsh_urb_enqueue_error_free_device:
795 if (new_udev) 1015 if (new_udev)
796 usbhsh_device_free(hpriv, new_udev); 1016 usbhsh_device_detach(hpriv, new_udev);
797usbhsh_urb_enqueue_error_not_linked: 1017usbhsh_urb_enqueue_error_not_linked:
798 1018
799 dev_dbg(dev, "%s error\n", __func__); 1019 dev_dbg(dev, "%s error\n", __func__);
@@ -807,8 +1027,11 @@ static int usbhsh_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
807 struct usbhsh_request *ureq = usbhsh_urb_to_ureq(urb); 1027 struct usbhsh_request *ureq = usbhsh_urb_to_ureq(urb);
808 1028
809 if (ureq) { 1029 if (ureq) {
810 usbhsh_req_free(hpriv, ureq); 1030 struct usbhs_priv *priv = usbhsh_hpriv_to_priv(hpriv);
811 usbhsh_urb_to_ureq(urb) = NULL; 1031 struct usbhs_pkt *pkt = &ureq->pkt;
1032
1033 usbhs_pkt_pop(pkt->pipe, pkt);
1034 usbhsh_queue_done(priv, pkt);
812 } 1035 }
813 1036
814 return 0; 1037 return 0;
@@ -823,7 +1046,7 @@ static void usbhsh_endpoint_disable(struct usb_hcd *hcd,
823 1046
824 /* 1047 /*
825 * this function might be called manytimes by same hcd/ep 1048 * this function might be called manytimes by same hcd/ep
826 * in-endpoitn == out-endpoint if ep == dcp. 1049 * in-endpoint == out-endpoint if ep == dcp.
827 */ 1050 */
828 if (!uep) 1051 if (!uep)
829 return; 1052 return;
@@ -831,15 +1054,14 @@ static void usbhsh_endpoint_disable(struct usb_hcd *hcd,
831 udev = usbhsh_uep_to_udev(uep); 1054 udev = usbhsh_uep_to_udev(uep);
832 hpriv = usbhsh_hcd_to_hpriv(hcd); 1055 hpriv = usbhsh_hcd_to_hpriv(hcd);
833 1056
834 usbhsh_endpoint_free(hpriv, ep); 1057 usbhsh_endpoint_detach(hpriv, ep);
835 ep->hcpriv = NULL;
836 1058
837 /* 1059 /*
838 * if there is no endpoint, 1060 * if there is no endpoint,
839 * free device 1061 * free device
840 */ 1062 */
841 if (!usbhsh_device_has_endpoint(udev)) 1063 if (!usbhsh_device_has_endpoint(udev))
842 usbhsh_device_free(hpriv, udev); 1064 usbhsh_device_detach(hpriv, udev);
843} 1065}
844 1066
845static int usbhsh_hub_status_data(struct usb_hcd *hcd, char *buf) 1067static int usbhsh_hub_status_data(struct usb_hcd *hcd, char *buf)
@@ -919,6 +1141,8 @@ static int __usbhsh_hub_port_feature(struct usbhsh_hpriv *hpriv,
919 USB_PORT_STAT_HIGH_SPEED | 1141 USB_PORT_STAT_HIGH_SPEED |
920 USB_PORT_STAT_LOW_SPEED); 1142 USB_PORT_STAT_LOW_SPEED);
921 1143
1144 usbhsh_queue_force_pop_all(priv);
1145
922 usbhs_bus_send_reset(priv); 1146 usbhs_bus_send_reset(priv);
923 msleep(20); 1147 msleep(20);
924 usbhs_bus_send_sof_enable(priv); 1148 usbhs_bus_send_sof_enable(priv);
@@ -1082,6 +1306,20 @@ static int usbhsh_irq_attch(struct usbhs_priv *priv,
1082 usbhsh_port_stat_set(hpriv, USB_PORT_STAT_CONNECTION); 1306 usbhsh_port_stat_set(hpriv, USB_PORT_STAT_CONNECTION);
1083 usbhsh_port_stat_set(hpriv, USB_PORT_STAT_C_CONNECTION << 16); 1307 usbhsh_port_stat_set(hpriv, USB_PORT_STAT_C_CONNECTION << 16);
1084 1308
1309 /*
1310 * attch interrupt might happen infinitely on some device
1311 * (on self power USB hub ?)
1312 * disable it here.
1313 *
1314 * usbhsh_is_running() becomes effective
1315 * according to this process.
1316 * see
1317 * usbhsh_is_running()
1318 * usbhsh_urb_enqueue()
1319 */
1320 hpriv->mod.irq_attch = NULL;
1321 usbhs_irq_callback_update(priv, &hpriv->mod);
1322
1085 return 0; 1323 return 0;
1086} 1324}
1087 1325
@@ -1096,6 +1334,24 @@ static int usbhsh_irq_dtch(struct usbhs_priv *priv,
1096 usbhsh_port_stat_clear(hpriv, USB_PORT_STAT_CONNECTION); 1334 usbhsh_port_stat_clear(hpriv, USB_PORT_STAT_CONNECTION);
1097 usbhsh_port_stat_set(hpriv, USB_PORT_STAT_C_CONNECTION << 16); 1335 usbhsh_port_stat_set(hpriv, USB_PORT_STAT_C_CONNECTION << 16);
1098 1336
1337 /*
1338 * enable attch interrupt again
1339 *
1340 * usbhsh_is_running() becomes invalid
1341 * according to this process.
1342 * see
1343 * usbhsh_is_running()
1344 * usbhsh_urb_enqueue()
1345 */
1346 hpriv->mod.irq_attch = usbhsh_irq_attch;
1347 usbhs_irq_callback_update(priv, &hpriv->mod);
1348
1349 /*
1350 * usbhsh_queue_force_pop_all() should be called
1351 * after usbhsh_is_running() becomes invalid.
1352 */
1353 usbhsh_queue_force_pop_all(priv);
1354
1099 return 0; 1355 return 0;
1100} 1356}
1101 1357
@@ -1131,7 +1387,6 @@ static int usbhsh_irq_setup_err(struct usbhs_priv *priv,
1131static void usbhsh_pipe_init_for_host(struct usbhs_priv *priv) 1387static void usbhsh_pipe_init_for_host(struct usbhs_priv *priv)
1132{ 1388{
1133 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv); 1389 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv);
1134 struct usbhsh_pipe_info *pipe_info = hpriv->pipe_info;
1135 struct usbhs_pipe *pipe; 1390 struct usbhs_pipe *pipe;
1136 u32 *pipe_type = usbhs_get_dparam(priv, pipe_type); 1391 u32 *pipe_type = usbhs_get_dparam(priv, pipe_type);
1137 int pipe_size = usbhs_get_dparam(priv, pipe_size); 1392 int pipe_size = usbhs_get_dparam(priv, pipe_size);
@@ -1140,7 +1395,6 @@ static void usbhsh_pipe_init_for_host(struct usbhs_priv *priv)
1140 /* init all pipe */ 1395 /* init all pipe */
1141 old_type = USB_ENDPOINT_XFER_CONTROL; 1396 old_type = USB_ENDPOINT_XFER_CONTROL;
1142 for (i = 0; i < pipe_size; i++) { 1397 for (i = 0; i < pipe_size; i++) {
1143 pipe_info[i].usr_cnt = 0;
1144 1398
1145 /* 1399 /*
1146 * data "output" will be finished as soon as possible, 1400 * data "output" will be finished as soon as possible,
@@ -1174,7 +1428,7 @@ static void usbhsh_pipe_init_for_host(struct usbhs_priv *priv)
1174 dir_in); 1428 dir_in);
1175 } 1429 }
1176 1430
1177 pipe->mod_private = pipe_info + i; 1431 pipe->mod_private = NULL;
1178 } 1432 }
1179} 1433}
1180 1434
@@ -1205,9 +1459,7 @@ static int usbhsh_start(struct usbhs_priv *priv)
1205 * - host 1459 * - host
1206 * - usb module 1460 * - usb module
1207 */ 1461 */
1208 usbhs_sys_hispeed_ctrl(priv, 1);
1209 usbhs_sys_host_ctrl(priv, 1); 1462 usbhs_sys_host_ctrl(priv, 1);
1210 usbhs_sys_usb_ctrl(priv, 1);
1211 1463
1212 /* 1464 /*
1213 * enable irq callback 1465 * enable irq callback
@@ -1242,9 +1494,7 @@ static int usbhsh_stop(struct usbhs_priv *priv)
1242 usb_remove_hcd(hcd); 1494 usb_remove_hcd(hcd);
1243 1495
1244 /* disable sys */ 1496 /* disable sys */
1245 usbhs_sys_hispeed_ctrl(priv, 0);
1246 usbhs_sys_host_ctrl(priv, 0); 1497 usbhs_sys_host_ctrl(priv, 0);
1247 usbhs_sys_usb_ctrl(priv, 0);
1248 1498
1249 dev_dbg(dev, "quit host\n"); 1499 dev_dbg(dev, "quit host\n");
1250 1500
@@ -1255,10 +1505,8 @@ int usbhs_mod_host_probe(struct usbhs_priv *priv)
1255{ 1505{
1256 struct usbhsh_hpriv *hpriv; 1506 struct usbhsh_hpriv *hpriv;
1257 struct usb_hcd *hcd; 1507 struct usb_hcd *hcd;
1258 struct usbhsh_pipe_info *pipe_info;
1259 struct usbhsh_device *udev; 1508 struct usbhsh_device *udev;
1260 struct device *dev = usbhs_priv_to_dev(priv); 1509 struct device *dev = usbhs_priv_to_dev(priv);
1261 int pipe_size = usbhs_get_dparam(priv, pipe_size);
1262 int i; 1510 int i;
1263 1511
1264 /* initialize hcd */ 1512 /* initialize hcd */
@@ -1269,12 +1517,6 @@ int usbhs_mod_host_probe(struct usbhs_priv *priv)
1269 } 1517 }
1270 hcd->has_tt = 1; /* for low/full speed */ 1518 hcd->has_tt = 1; /* for low/full speed */
1271 1519
1272 pipe_info = kzalloc(sizeof(*pipe_info) * pipe_size, GFP_KERNEL);
1273 if (!pipe_info) {
1274 dev_err(dev, "Could not allocate pipe_info\n");
1275 goto usbhs_mod_host_probe_err;
1276 }
1277
1278 /* 1520 /*
1279 * CAUTION 1521 * CAUTION
1280 * 1522 *
@@ -1294,9 +1536,6 @@ int usbhs_mod_host_probe(struct usbhs_priv *priv)
1294 hpriv->mod.name = "host"; 1536 hpriv->mod.name = "host";
1295 hpriv->mod.start = usbhsh_start; 1537 hpriv->mod.start = usbhsh_start;
1296 hpriv->mod.stop = usbhsh_stop; 1538 hpriv->mod.stop = usbhsh_stop;
1297 hpriv->pipe_info = pipe_info;
1298 hpriv->pipe_size = pipe_size;
1299 usbhsh_req_list_init(hpriv);
1300 usbhsh_port_stat_init(hpriv); 1539 usbhsh_port_stat_init(hpriv);
1301 1540
1302 /* init all device */ 1541 /* init all device */
@@ -1308,11 +1547,6 @@ int usbhs_mod_host_probe(struct usbhs_priv *priv)
1308 dev_info(dev, "host probed\n"); 1547 dev_info(dev, "host probed\n");
1309 1548
1310 return 0; 1549 return 0;
1311
1312usbhs_mod_host_probe_err:
1313 usb_put_hcd(hcd);
1314
1315 return -ENOMEM;
1316} 1550}
1317 1551
1318int usbhs_mod_host_remove(struct usbhs_priv *priv) 1552int usbhs_mod_host_remove(struct usbhs_priv *priv)
@@ -1320,8 +1554,6 @@ int usbhs_mod_host_remove(struct usbhs_priv *priv)
1320 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv); 1554 struct usbhsh_hpriv *hpriv = usbhsh_priv_to_hpriv(priv);
1321 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv); 1555 struct usb_hcd *hcd = usbhsh_hpriv_to_hcd(hpriv);
1322 1556
1323 usbhsh_req_list_quit(hpriv);
1324
1325 usb_put_hcd(hcd); 1557 usb_put_hcd(hcd);
1326 1558
1327 return 0; 1559 return 0;
diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c
index c74389ce2177..feb06d6d2814 100644
--- a/drivers/usb/renesas_usbhs/pipe.c
+++ b/drivers/usb/renesas_usbhs/pipe.c
@@ -257,6 +257,13 @@ void usbhs_pipe_stall(struct usbhs_pipe *pipe)
257 } 257 }
258} 258}
259 259
260int usbhs_pipe_is_stall(struct usbhs_pipe *pipe)
261{
262 u16 pid = usbhsp_pipectrl_get(pipe) & PID_MASK;
263
264 return (int)(pid == PID_STALL10 || pid == PID_STALL11);
265}
266
260/* 267/*
261 * pipe setup 268 * pipe setup
262 */ 269 */
@@ -323,8 +330,7 @@ static u16 usbhsp_setup_pipecfg(struct usbhs_pipe *pipe,
323 if (dir_in) 330 if (dir_in)
324 usbhsp_flags_set(pipe, IS_DIR_HOST); 331 usbhsp_flags_set(pipe, IS_DIR_HOST);
325 332
326 if ((is_host && !dir_in) || 333 if (!!is_host ^ !!dir_in)
327 (!is_host && dir_in))
328 dir |= DIR_OUT; 334 dir |= DIR_OUT;
329 335
330 if (!dir) 336 if (!dir)
@@ -471,10 +477,27 @@ int usbhs_pipe_is_dir_host(struct usbhs_pipe *pipe)
471 return usbhsp_flags_has(pipe, IS_DIR_HOST); 477 return usbhsp_flags_has(pipe, IS_DIR_HOST);
472} 478}
473 479
474void usbhs_pipe_data_sequence(struct usbhs_pipe *pipe, int data) 480void usbhs_pipe_data_sequence(struct usbhs_pipe *pipe, int sequence)
475{ 481{
476 u16 mask = (SQCLR | SQSET); 482 u16 mask = (SQCLR | SQSET);
477 u16 val = (data) ? SQSET : SQCLR; 483 u16 val;
484
485 /*
486 * sequence
487 * 0 : data0
488 * 1 : data1
489 * -1 : no change
490 */
491 switch (sequence) {
492 case 0:
493 val = SQCLR;
494 break;
495 case 1:
496 val = SQSET;
497 break;
498 default:
499 return;
500 }
478 501
479 usbhsp_pipectrl_set(pipe, mask, val); 502 usbhsp_pipectrl_set(pipe, mask, val);
480} 503}
diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h
index 6334fc644cc0..fa18b7dc2b2a 100644
--- a/drivers/usb/renesas_usbhs/pipe.h
+++ b/drivers/usb/renesas_usbhs/pipe.h
@@ -87,6 +87,7 @@ int usbhs_pipe_is_accessible(struct usbhs_pipe *pipe);
87void usbhs_pipe_enable(struct usbhs_pipe *pipe); 87void usbhs_pipe_enable(struct usbhs_pipe *pipe);
88void usbhs_pipe_disable(struct usbhs_pipe *pipe); 88void usbhs_pipe_disable(struct usbhs_pipe *pipe);
89void usbhs_pipe_stall(struct usbhs_pipe *pipe); 89void usbhs_pipe_stall(struct usbhs_pipe *pipe);
90int usbhs_pipe_is_stall(struct usbhs_pipe *pipe);
90void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo); 91void usbhs_pipe_select_fifo(struct usbhs_pipe *pipe, struct usbhs_fifo *fifo);
91void usbhs_pipe_config_update(struct usbhs_pipe *pipe, u16 devsel, 92void usbhs_pipe_config_update(struct usbhs_pipe *pipe, u16 devsel,
92 u16 epnum, u16 maxp); 93 u16 epnum, u16 maxp);
diff --git a/drivers/usb/serial/ChangeLog.history b/drivers/usb/serial/ChangeLog.history
deleted file mode 100644
index f13fd488ebec..000000000000
--- a/drivers/usb/serial/ChangeLog.history
+++ /dev/null
@@ -1,730 +0,0 @@
1This is the contents of some of the drivers/usb/serial/ files that had old
2changelog comments. They were quite old, and out of date, and we don't keep
3them anymore, so I've put them here, away from the source files, in case
4people still care to see them.
5
6- Greg Kroah-Hartman <greg@kroah.com> October 20, 2005
7
8-----------------------------------------------------------------------
9usb-serial.h Change Log comments:
10
11 (03/26/2002) gkh
12 removed the port->tty check from port_paranoia_check() due to serial
13 consoles not having a tty device assigned to them.
14
15 (12/03/2001) gkh
16 removed active from the port structure.
17 added documentation to the usb_serial_device_type structure
18
19 (10/10/2001) gkh
20 added vendor and product to serial structure. Needed to determine device
21 owner when the device is disconnected.
22
23 (05/30/2001) gkh
24 added sem to port structure and removed port_lock
25
26 (10/05/2000) gkh
27 Added interrupt_in_endpointAddress and bulk_in_endpointAddress to help
28 fix bug with urb->dev not being set properly, now that the usb core
29 needs it.
30
31 (09/11/2000) gkh
32 Added usb_serial_debug_data function to help get rid of #DEBUG in the
33 drivers.
34
35 (08/28/2000) gkh
36 Added port_lock to port structure.
37
38 (08/08/2000) gkh
39 Added open_count to port structure.
40
41 (07/23/2000) gkh
42 Added bulk_out_endpointAddress to port structure.
43
44 (07/19/2000) gkh, pberger, and borchers
45 Modifications to allow usb-serial drivers to be modules.
46
47-----------------------------------------------------------------------
48usb-serial.c Change Log comments:
49
50 (12/10/2002) gkh
51 Split the ports off into their own struct device, and added a
52 usb-serial bus driver.
53
54 (11/19/2002) gkh
55 removed a few #ifdefs for the generic code and cleaned up the failure
56 logic in initialization.
57
58 (10/02/2002) gkh
59 moved the console code to console.c and out of this file.
60
61 (06/05/2002) gkh
62 moved location of startup() call in serial_probe() until after all
63 of the port information and endpoints are initialized. This makes
64 things easier for some drivers.
65
66 (04/10/2002) gkh
67 added serial_read_proc function which creates a
68 /proc/tty/driver/usb-serial file.
69
70 (03/27/2002) gkh
71 Got USB serial console code working properly and merged into the main
72 version of the tree. Thanks to Randy Dunlap for the initial version
73 of this code, and for pushing me to finish it up.
74 The USB serial console works with any usb serial driver device.
75
76 (03/21/2002) gkh
77 Moved all manipulation of port->open_count into the core. Now the
78 individual driver's open and close functions are called only when the
79 first open() and last close() is called. Making the drivers a bit
80 smaller and simpler.
81 Fixed a bug if a driver didn't have the owner field set.
82
83 (02/26/2002) gkh
84 Moved all locking into the main serial_* functions, instead of having
85 the individual drivers have to grab the port semaphore. This should
86 reduce races.
87 Reworked the MOD_INC logic a bit to always increment and decrement, even
88 if the generic driver is being used.
89
90 (10/10/2001) gkh
91 usb_serial_disconnect() now sets the serial->dev pointer is to NULL to
92 help prevent child drivers from accessing the device since it is now
93 gone.
94
95 (09/13/2001) gkh
96 Moved generic driver initialize after we have registered with the USB
97 core. Thanks to Randy Dunlap for pointing this problem out.
98
99 (07/03/2001) gkh
100 Fixed module paramater size. Thanks to John Brockmeyer for the pointer.
101 Fixed vendor and product getting defined through the MODULE_PARM macro
102 if the Generic driver wasn't compiled in.
103 Fixed problem with generic_shutdown() not being called for drivers that
104 don't have a shutdown() function.
105
106 (06/06/2001) gkh
107 added evil hack that is needed for the prolific pl2303 device due to the
108 crazy way its endpoints are set up.
109
110 (05/30/2001) gkh
111 switched from using spinlock to a semaphore, which fixes lots of problems.
112
113 (04/08/2001) gb
114 Identify version on module load.
115
116 2001_02_05 gkh
117 Fixed buffer overflows bug with the generic serial driver. Thanks to
118 Todd Squires <squirest@ct0.com> for fixing this.
119
120 (01/10/2001) gkh
121 Fixed bug where the generic serial adaptor grabbed _any_ device that was
122 offered to it.
123
124 (12/12/2000) gkh
125 Removed MOD_INC and MOD_DEC from poll and disconnect functions, and
126 moved them to the serial_open and serial_close functions.
127 Also fixed bug with there not being a MOD_DEC for the generic driver
128 (thanks to Gary Brubaker for finding this.)
129
130 (11/29/2000) gkh
131 Small NULL pointer initialization cleanup which saves a bit of disk image
132
133 (11/01/2000) Adam J. Richter
134 instead of using idVendor/idProduct pairs, usb serial drivers
135 now identify their hardware interest with usb_device_id tables,
136 which they usually have anyhow for use with MODULE_DEVICE_TABLE.
137
138 (10/05/2000) gkh
139 Fixed bug with urb->dev not being set properly, now that the usb
140 core needs it.
141
142 (09/11/2000) gkh
143 Removed DEBUG #ifdefs with call to usb_serial_debug_data
144
145 (08/28/2000) gkh
146 Added port_lock to port structure.
147 Added locks for SMP safeness to generic driver
148 Fixed the ability to open a generic device's port more than once.
149
150 (07/23/2000) gkh
151 Added bulk_out_endpointAddress to port structure.
152
153 (07/19/2000) gkh, pberger, and borchers
154 Modifications to allow usb-serial drivers to be modules.
155
156 (07/03/2000) gkh
157 Added more debugging to serial_ioctl call
158
159 (06/25/2000) gkh
160 Changed generic_write_bulk_callback to not call wake_up_interruptible
161 directly, but to have port_softint do it at a safer time.
162
163 (06/23/2000) gkh
164 Cleaned up debugging statements in a quest to find UHCI timeout bug.
165
166 (05/22/2000) gkh
167 Changed the makefile, enabling the big CONFIG_USB_SERIAL_SOMTHING to be
168 removed from the individual device source files.
169
170 (05/03/2000) gkh
171 Added the Digi Acceleport driver from Al Borchers and Peter Berger.
172
173 (05/02/2000) gkh
174 Changed devfs and tty register code to work properly now. This was based on
175 the ACM driver changes by Vojtech Pavlik.
176
177 (04/27/2000) Ryan VanderBijl
178 Put calls to *_paranoia_checks into one function.
179
180 (04/23/2000) gkh
181 Fixed bug that Randy Dunlap found for Generic devices with no bulk out ports.
182 Moved when the startup code printed out the devices that are supported.
183
184 (04/19/2000) gkh
185 Added driver for ZyXEL omni.net lcd plus ISDN TA
186 Made startup info message specify which drivers were compiled in.
187
188 (04/03/2000) gkh
189 Changed the probe process to remove the module unload races.
190 Changed where the tty layer gets initialized to have devfs work nicer.
191 Added initial devfs support.
192
193 (03/26/2000) gkh
194 Split driver up into device specific pieces.
195
196 (03/19/2000) gkh
197 Fixed oops that could happen when device was removed while a program
198 was talking to the device.
199 Removed the static urbs and now all urbs are created and destroyed
200 dynamically.
201 Reworked the internal interface. Now everything is based on the
202 usb_serial_port structure instead of the larger usb_serial structure.
203 This fixes the bug that a multiport device could not have more than
204 one port open at one time.
205
206 (03/17/2000) gkh
207 Added config option for debugging messages.
208 Added patch for keyspan pda from Brian Warner.
209
210 (03/06/2000) gkh
211 Added the keyspan pda code from Brian Warner <warner@lothar.com>
212 Moved a bunch of the port specific stuff into its own structure. This
213 is in anticipation of the true multiport devices (there's a bug if you
214 try to access more than one port of any multiport device right now)
215
216 (02/21/2000) gkh
217 Made it so that any serial devices only have to specify which functions
218 they want to overload from the generic function calls (great,
219 inheritance in C, in a driver, just what I wanted...)
220 Added support for set_termios and ioctl function calls. No drivers take
221 advantage of this yet.
222 Removed the #ifdef MODULE, now there is no module specific code.
223 Cleaned up a few comments in usb-serial.h that were wrong (thanks again
224 to Miles Lott).
225 Small fix to get_free_serial.
226
227 (02/14/2000) gkh
228 Removed the Belkin and Peracom functionality from the driver due to
229 the lack of support from the vendor, and me not wanting people to
230 accidenatly buy the device, expecting it to work with Linux.
231 Added read_bulk_callback and write_bulk_callback to the type structure
232 for the needs of the FTDI and WhiteHEAT driver.
233 Changed all reverences to FTDI to FTDI_SIO at the request of Bill
234 Ryder.
235 Changed the output urb size back to the max endpoint size to make
236 the ftdi_sio driver have it easier, and due to the fact that it didn't
237 really increase the speed any.
238
239 (02/11/2000) gkh
240 Added VISOR_FUNCTION_CONSOLE to the visor startup function. This was a
241 patch from Miles Lott (milos@insync.net).
242 Fixed bug with not restoring the minor range that a device grabs, if
243 the startup function fails (thanks Miles for finding this).
244
245 (02/05/2000) gkh
246 Added initial framework for the Keyspan PDA serial converter so that
247 Brian Warner has a place to put his code.
248 Made the ezusb specific functions generic enough that different
249 devices can use them (whiteheat and keyspan_pda both need them).
250 Split out a whole bunch of structure and other stuff to a separate
251 usb-serial.h file.
252 Made the Visor connection messages a little more understandable, now
253 that Miles Lott (milos@insync.net) has gotten the Generic channel to
254 work. Also made them always show up in the log file.
255
256 (01/25/2000) gkh
257 Added initial framework for FTDI serial converter so that Bill Ryder
258 has a place to put his code.
259 Added the vendor specific info from Handspring. Now we can print out
260 informational debug messages as well as understand what is happening.
261
262 (01/23/2000) gkh
263 Fixed problem of crash when trying to open a port that didn't have a
264 device assigned to it. Made the minor node finding a little smarter,
265 now it looks to find a continuous space for the new device.
266
267 (01/21/2000) gkh
268 Fixed bug in visor_startup with patch from Miles Lott (milos@insync.net)
269 Fixed get_serial_by_minor which was all messed up for multi port
270 devices. Fixed multi port problem for generic devices. Now the number
271 of ports is determined by the number of bulk out endpoints for the
272 generic device.
273
274 (01/19/2000) gkh
275 Removed lots of cruft that was around from the old (pre urb) driver
276 interface.
277 Made the serial_table dynamic. This should save lots of memory when
278 the number of minor nodes goes up to 256.
279 Added initial support for devices that have more than one port.
280 Added more debugging comments for the Visor, and added a needed
281 set_configuration call.
282
283 (01/17/2000) gkh
284 Fixed the WhiteHEAT firmware (my processing tool had a bug)
285 and added new debug loader firmware for it.
286 Removed the put_char function as it isn't really needed.
287 Added visor startup commands as found by the Win98 dump.
288
289 (01/13/2000) gkh
290 Fixed the vendor id for the generic driver to the one I meant it to be.
291
292 (01/12/2000) gkh
293 Forget the version numbering...that's pretty useless...
294 Made the driver able to be compiled so that the user can select which
295 converter they want to use. This allows people who only want the Visor
296 support to not pay the memory size price of the WhiteHEAT.
297 Fixed bug where the generic driver (idVendor=0000 and idProduct=0000)
298 grabbed the root hub. Not good.
299
300 version 0.4.0 (01/10/2000) gkh
301 Added whiteheat.h containing the firmware for the ConnectTech WhiteHEAT
302 device. Added startup function to allow firmware to be downloaded to
303 a device if it needs to be.
304 Added firmware download logic to the WhiteHEAT device.
305 Started to add #defines to split up the different drivers for potential
306 configuration option.
307
308 version 0.3.1 (12/30/99) gkh
309 Fixed problems with urb for bulk out.
310 Added initial support for multiple sets of endpoints. This enables
311 the Handspring Visor to be attached successfully. Only the first
312 bulk in / bulk out endpoint pair is being used right now.
313
314 version 0.3.0 (12/27/99) gkh
315 Added initial support for the Handspring Visor based on a patch from
316 Miles Lott (milos@sneety.insync.net)
317 Cleaned up the code a bunch and converted over to using urbs only.
318
319 version 0.2.3 (12/21/99) gkh
320 Added initial support for the Connect Tech WhiteHEAT converter.
321 Incremented the number of ports in expectation of getting the
322 WhiteHEAT to work properly (4 ports per connection).
323 Added notification on insertion and removal of what port the
324 device is/was connected to (and what kind of device it was).
325
326 version 0.2.2 (12/16/99) gkh
327 Changed major number to the new allocated number. We're legal now!
328
329 version 0.2.1 (12/14/99) gkh
330 Fixed bug that happens when device node is opened when there isn't a
331 device attached to it. Thanks to marek@webdesign.no for noticing this.
332
333 version 0.2.0 (11/10/99) gkh
334 Split up internals to make it easier to add different types of serial
335 converters to the code.
336 Added a "generic" driver that gets it's vendor and product id
337 from when the module is loaded. Thanks to David E. Nelson (dnelson@jump.net)
338 for the idea and sample code (from the usb scanner driver.)
339 Cleared up any licensing questions by releasing it under the GNU GPL.
340
341 version 0.1.2 (10/25/99) gkh
342 Fixed bug in detecting device.
343
344 version 0.1.1 (10/05/99) gkh
345 Changed the major number to not conflict with anything else.
346
347 version 0.1 (09/28/99) gkh
348 Can recognize the two different devices and start up a read from
349 device when asked to. Writes also work. No control signals yet, this
350 all is vendor specific data (i.e. no spec), also no control for
351 different baud rates or other bit settings.
352 Currently we are using the same devid as the acm driver. This needs
353 to change.
354
355-----------------------------------------------------------------------
356visor.c Change Log comments:
357
358 (06/03/2003) Judd Montgomery <judd at jpilot.org>
359 Added support for module parameter options for untested/unknown
360 devices.
361
362 (03/09/2003) gkh
363 Added support for the Sony Clie NZ90V device. Thanks to Martin Brachtl
364 <brachtl@redgrep.cz> for the information.
365
366 (03/05/2003) gkh
367 Think Treo support is now working.
368
369 (04/03/2002) gkh
370 Added support for the Sony OS 4.1 devices. Thanks to Hiroyuki ARAKI
371 <hiro@zob.ne.jp> for the information.
372
373 (03/27/2002) gkh
374 Removed assumptions that port->tty was always valid (is not true
375 for usb serial console devices.)
376
377 (03/23/2002) gkh
378 Added support for the Palm i705 device, thanks to Thomas Riemer
379 <tom@netmech.com> for the information.
380
381 (03/21/2002) gkh
382 Added support for the Palm m130 device, thanks to Udo Eisenbarth
383 <udo.eisenbarth@web.de> for the information.
384
385 (02/27/2002) gkh
386 Reworked the urb handling logic. We have no more pool, but dynamically
387 allocate the urb and the transfer buffer on the fly. In testing this
388 does not incure any measurable overhead. This also relies on the fact
389 that we have proper reference counting logic for urbs.
390
391 (02/21/2002) SilaS
392 Added initial support for the Palm m515 devices.
393
394 (02/14/2002) gkh
395 Added support for the Clie S-360 device.
396
397 (12/18/2001) gkh
398 Added better Clie support for 3.5 devices. Thanks to Geoffrey Levand
399 for the patch.
400
401 (11/11/2001) gkh
402 Added support for the m125 devices, and added check to prevent oopses
403 for Clié devices that lie about the number of ports they have.
404
405 (08/30/2001) gkh
406 Added support for the Clie devices, both the 3.5 and 4.0 os versions.
407 Many thanks to Daniel Burke, and Bryan Payne for helping with this.
408
409 (08/23/2001) gkh
410 fixed a few potential bugs pointed out by Oliver Neukum.
411
412 (05/30/2001) gkh
413 switched from using spinlock to a semaphore, which fixes lots of problems.
414
415 (05/28/2000) gkh
416 Added initial support for the Palm m500 and Palm m505 devices.
417
418 (04/08/2001) gb
419 Identify version on module load.
420
421 (01/21/2000) gkh
422 Added write_room and chars_in_buffer, as they were previously using the
423 generic driver versions which is all wrong now that we are using an urb
424 pool. Thanks to Wolfgang Grandegger for pointing this out to me.
425 Removed count assignment in the write function, which was not needed anymore
426 either. Thanks to Al Borchers for pointing this out.
427
428 (12/12/2000) gkh
429 Moved MOD_DEC to end of visor_close to be nicer, as the final write
430 message can sleep.
431
432 (11/12/2000) gkh
433 Fixed bug with data being dropped on the floor by forcing tty->low_latency
434 to be on. Hopefully this fixes the OHCI issue!
435
436 (11/01/2000) Adam J. Richter
437 usb_device_id table support
438
439 (10/05/2000) gkh
440 Fixed bug with urb->dev not being set properly, now that the usb
441 core needs it.
442
443 (09/11/2000) gkh
444 Got rid of always calling kmalloc for every urb we wrote out to the
445 device.
446 Added visor_read_callback so we can keep track of bytes in and out for
447 those people who like to know the speed of their device.
448 Removed DEBUG #ifdefs with call to usb_serial_debug_data
449
450 (09/06/2000) gkh
451 Fixed oops in visor_exit. Need to uncomment usb_unlink_urb call _after_
452 the host controller drivers set urb->dev = NULL when the urb is finished.
453
454 (08/28/2000) gkh
455 Added locks for SMP safeness.
456
457 (08/08/2000) gkh
458 Fixed endian problem in visor_startup.
459 Fixed MOD_INC and MOD_DEC logic and the ability to open a port more
460 than once.
461
462 (07/23/2000) gkh
463 Added pool of write urbs to speed up transfers to the visor.
464
465 (07/19/2000) gkh
466 Added module_init and module_exit functions to handle the fact that this
467 driver is a loadable module now.
468
469 (07/03/2000) gkh
470 Added visor_set_ioctl and visor_set_termios functions (they don't do much
471 of anything, but are good for debugging.)
472
473 (06/25/2000) gkh
474 Fixed bug in visor_unthrottle that should help with the disconnect in PPP
475 bug that people have been reporting.
476
477 (06/23/2000) gkh
478 Cleaned up debugging statements in a quest to find UHCI timeout bug.
479
480 (04/27/2000) Ryan VanderBijl
481 Fixed memory leak in visor_close
482
483 (03/26/2000) gkh
484 Split driver up into device specific pieces.
485
486-----------------------------------------------------------------------
487pl2303.c Change Log comments:
488
489 2002_Mar_26 gkh
490 allowed driver to work properly if there is no tty assigned to a port
491 (this happens for serial console devices.)
492
493 2001_Oct_06 gkh
494 Added RTS and DTR line control. Thanks to joe@bndlg.de for parts of it.
495
496 2001_Sep_19 gkh
497 Added break support.
498
499 2001_Aug_30 gkh
500 fixed oops in write_bulk_callback.
501
502 2001_Aug_28 gkh
503 reworked buffer logic to be like other usb-serial drivers. Hopefully
504 removing some reported problems.
505
506 2001_Jun_06 gkh
507 finished porting to 2.4 format.
508
509
510-----------------------------------------------------------------------
511io_edgeport.c Change Log comments:
512
513 2003_04_03 al borchers
514 - fixed a bug (that shows up with dosemu) where the tty struct is
515 used in a callback after it has been freed
516
517 2.3 2002_03_08 greg kroah-hartman
518 - fixed bug when multiple devices were attached at the same time.
519
520 2.2 2001_11_14 greg kroah-hartman
521 - fixed bug in edge_close that kept the port from being used more
522 than once.
523 - fixed memory leak on device removal.
524 - fixed potential double free of memory when command urb submitting
525 failed.
526 - other small cleanups when the device is removed
527
528 2.1 2001_07_09 greg kroah-hartman
529 - added support for TIOCMBIS and TIOCMBIC.
530
531 (04/08/2001) gb
532 - Identify version on module load.
533
534 2.0 2001_03_05 greg kroah-hartman
535 - reworked entire driver to fit properly in with the other usb-serial
536 drivers. Occasional oopses still happen, but it's a good start.
537
538 1.2.3 (02/23/2001) greg kroah-hartman
539 - changed device table to work properly for 2.4.x final format.
540 - fixed problem with dropping data at high data rates.
541
542 1.2.2 (11/27/2000) greg kroah-hartman
543 - cleaned up more NTisms.
544 - Added device table for 2.4.0-test11
545
546 1.2.1 (11/08/2000) greg kroah-hartman
547 - Started to clean up NTisms.
548 - Fixed problem with dev field of urb for kernels >= 2.4.0-test9
549
550 1.2 (10/17/2000) David Iacovelli
551 Remove all EPIC code and GPL source
552 Fix RELEVANT_IFLAG macro to include flow control
553 changes port configuration changes.
554 Fix redefinition of SERIAL_MAGIC
555 Change all timeout values to 5 seconds
556 Tried to fix the UHCI multiple urb submission, but failed miserably.
557 it seems to work fine with OHCI.
558 ( Greg take a look at the #if 0 at end of WriteCmdUsb() we must
559 find a way to work arount this UHCI bug )
560
561 1.1 (10/11/2000) David Iacovelli
562 Fix XON/XOFF flow control to support both IXON and IXOFF
563
564 0.9.27 (06/30/2000) David Iacovelli
565 Added transmit queue and now allocate urb for command writes.
566
567 0.9.26 (06/29/2000) David Iacovelli
568 Add support for 80251 based edgeport
569
570 0.9.25 (06/27/2000) David Iacovelli
571 Do not close the port if it has multiple opens.
572
573 0.9.24 (05/26/2000) David Iacovelli
574 Add IOCTLs to support RXTX and JAVA POS
575 and first cut at running BlackBox Demo
576
577 0.9.23 (05/24/2000) David Iacovelli
578 Add IOCTLs to support RXTX and JAVA POS
579
580 0.9.22 (05/23/2000) David Iacovelli
581 fixed bug in enumeration. If epconfig turns on mapping by
582 path after a device is already plugged in, we now update
583 the mapping correctly
584
585 0.9.21 (05/16/2000) David Iacovelli
586 Added BlockUntilChaseResp() to also wait for txcredits
587 Updated the way we allocate and handle write URBs
588 Add debug code to dump buffers
589
590 0.9.20 (05/01/2000) David Iacovelli
591 change driver to use usb/tts/
592
593 0.9.19 (05/01/2000) David Iacovelli
594 Update code to compile if DEBUG is off
595
596 0.9.18 (04/28/2000) David Iacovelli
597 cleanup and test tty_register with devfs
598
599 0.9.17 (04/27/2000) greg kroah-hartman
600 changed tty_register around to be like the way it
601 was before, but now it works properly with devfs.
602
603 0.9.16 (04/26/2000) david iacovelli
604 Fixed bug in GetProductInfo()
605
606 0.9.15 (04/25/2000) david iacovelli
607 Updated enumeration
608
609 0.9.14 (04/24/2000) david iacovelli
610 Removed all config/status IOCTLS and
611 converted to using /proc/edgeport
612 still playing with devfs
613
614 0.9.13 (04/24/2000) david iacovelli
615 Removed configuration based on ttyUSB0
616 Added support for configuration using /prod/edgeport
617 first attempt at using devfs (not working yet!)
618 Added IOCTL to GetProductInfo()
619 Added support for custom baud rates
620 Add support for random port numbers
621
622 0.9.12 (04/18/2000) david iacovelli
623 added additional configuration IOCTLs
624 use ttyUSB0 for configuration
625
626 0.9.11 (04/17/2000) greg kroah-hartman
627 fixed module initialization race conditions.
628 made all urbs dynamically allocated.
629 made driver devfs compatible. now it only registers the tty device
630 when the device is actually plugged in.
631
632 0.9.10 (04/13/2000) greg kroah-hartman
633 added proc interface framework.
634
635 0.9.9 (04/13/2000) david iacovelli
636 added enumeration code and ioctls to configure the device
637
638 0.9.8 (04/12/2000) david iacovelli
639 Change interrupt read start when device is plugged in
640 and stop when device is removed
641 process interrupt reads when all ports are closed
642 (keep value of rxBytesAvail consistent with the edgeport)
643 set the USB_BULK_QUEUE flag so that we can shove a bunch
644 of urbs at once down the pipe
645
646 0.9.7 (04/10/2000) david iacovelli
647 start to add enumeration code.
648 generate serial number for epic devices
649 add support for kdb
650
651 0.9.6 (03/30/2000) david iacovelli
652 add IOCTL to get string, manufacture, and boot descriptors
653
654 0.9.5 (03/14/2000) greg kroah-hartman
655 more error checking added to SerialOpen to try to fix UHCI open problem
656
657 0.9.4 (03/09/2000) greg kroah-hartman
658 added more error checking to handle oops when data is hanging
659 around and tty is abruptly closed.
660
661 0.9.3 (03/09/2000) david iacovelli
662 Add epic support for xon/xoff chars
663 play with performance
664
665 0.9.2 (03/08/2000) greg kroah-hartman
666 changed most "info" calls to "dbg"
667 implemented flow control properly in the termios call
668
669 0.9.1 (03/08/2000) david iacovelli
670 added EPIC support
671 enabled bootloader update
672
673 0.9 (03/08/2000) greg kroah-hartman
674 Release to IO networks.
675 Integrated changes that David made
676 made getting urbs for writing SMP safe
677
678 0.8 (03/07/2000) greg kroah-hartman
679 Release to IO networks.
680 Fixed problems that were seen in code by David.
681 Now both Edgeport/4 and Edgeport/2 works properly.
682 Changed most of the functions to use port instead of serial.
683
684 0.7 (02/27/2000) greg kroah-hartman
685 Milestone 3 release.
686 Release to IO Networks
687 ioctl for waiting on line change implemented.
688 ioctl for getting statistics implemented.
689 multiport support working.
690 lsr and msr registers are now handled properly.
691 change break now hooked up and working.
692 support for all known Edgeport devices.
693
694 0.6 (02/22/2000) greg kroah-hartman
695 Release to IO networks.
696 CHASE is implemented correctly when port is closed.
697 SerialOpen now blocks correctly until port is fully opened.
698
699 0.5 (02/20/2000) greg kroah-hartman
700 Release to IO networks.
701 Known problems:
702 modem status register changes are not sent on to the user
703 CHASE is not implemented when the port is closed.
704
705 0.4 (02/16/2000) greg kroah-hartman
706 Second cut at the CeBit demo.
707 Doesn't leak memory on every write to the port
708 Still small leaks on startup.
709 Added support for Edgeport/2 and Edgeport/8
710
711 0.3 (02/15/2000) greg kroah-hartman
712 CeBit demo release.
713 Force the line settings to 4800, 8, 1, e for the demo.
714 Warning! This version leaks memory like crazy!
715
716 0.2 (01/30/2000) greg kroah-hartman
717 Milestone 1 release.
718 Device is found by USB subsystem, enumerated, firmware is downloaded
719 and the descriptors are printed to the debug log, config is set, and
720 green light starts to blink. Open port works, and data can be sent
721 and received at the default settings of the UART. Loopback connector
722 and debug log confirms this.
723
724 0.1 (01/23/2000) greg kroah-hartman
725 Initial release to help IO Networks try to set up their test system.
726 Edgeport4 is recognized, firmware is downloaded, config is set so
727 device blinks green light every 3 sec. Port is bound, but opening,
728 closing, and sending data do not work properly.
729
730
diff --git a/drivers/usb/serial/belkin_sa.c b/drivers/usb/serial/belkin_sa.c
index d6921fa1403c..f9f29b289f2f 100644
--- a/drivers/usb/serial/belkin_sa.c
+++ b/drivers/usb/serial/belkin_sa.c
@@ -20,50 +20,7 @@
20 * TODO: 20 * TODO:
21 * -- Add true modem contol line query capability. Currently we track the 21 * -- Add true modem contol line query capability. Currently we track the
22 * states reported by the interrupt and the states we request. 22 * states reported by the interrupt and the states we request.
23 * -- Add error reporting back to application for UART error conditions.
24 * Just point me at how to implement this and I'll do it. I've put the
25 * framework in, but haven't analyzed the "tty_flip" interface yet.
26 * -- Add support for flush commands 23 * -- Add support for flush commands
27 * -- Add everything that is missing :)
28 *
29 * 27-Nov-2001 gkh
30 * compressed all the differnent device entries into 1.
31 *
32 * 30-May-2001 gkh
33 * switched from using spinlock to a semaphore, which fixes lots of
34 * problems.
35 *
36 * 08-Apr-2001 gb
37 * - Identify version on module load.
38 *
39 * 12-Mar-2001 gkh
40 * - Added support for the GoHubs GO-COM232 device which is the same as the
41 * Peracom device.
42 *
43 * 06-Nov-2000 gkh
44 * - Added support for the old Belkin and Peracom devices.
45 * - Made the port able to be opened multiple times.
46 * - Added some defaults incase the line settings are things these devices
47 * can't support.
48 *
49 * 18-Oct-2000 William Greathouse
50 * Released into the wild (linux-usb-devel)
51 *
52 * 17-Oct-2000 William Greathouse
53 * Add code to recognize firmware version and set hardware flow control
54 * appropriately. Belkin states that firmware prior to 3.05 does not
55 * operate correctly in hardware handshake mode. I have verified this
56 * on firmware 2.05 -- for both RTS and DTR input flow control, the control
57 * line is not reset. The test performed by the Belkin Win* driver is
58 * to enable hardware flow control for firmware 2.06 or greater and
59 * for 1.00 or prior. I am only enabling for 2.06 or greater.
60 *
61 * 12-Oct-2000 William Greathouse
62 * First cut at supporting Belkin USB Serial Adapter F5U103
63 * I did not have a copy of the original work to support this
64 * adapter, so pardon any stupid mistakes. All of the information
65 * I am using to write this driver was acquired by using a modified
66 * UsbSnoop on Windows2000 and from examining the other USB drivers.
67 */ 24 */
68 25
69#include <linux/kernel.h> 26#include <linux/kernel.h>
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 6ae1c0688b5e..0e77511060c0 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -335,13 +335,12 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port)
335 goto out; 335 goto out;
336 336
337 dbg("%s - submitting interrupt urb", __func__); 337 dbg("%s - submitting interrupt urb", __func__);
338 port->interrupt_in_urb->dev = serial->dev;
339 r = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 338 r = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
340 if (r) { 339 if (r) {
341 dev_err(&port->dev, "%s - failed submitting interrupt urb," 340 dev_err(&port->dev, "%s - failed submitting interrupt urb,"
342 " error %d\n", __func__, r); 341 " error %d\n", __func__, r);
343 ch341_close(port); 342 ch341_close(port);
344 return -EPROTO; 343 goto out;
345 } 344 }
346 345
347 r = usb_serial_generic_open(tty, port); 346 r = usb_serial_generic_open(tty, port);
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index fd67cc53545b..adfe660ed008 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -92,6 +92,7 @@ static const struct usb_device_id id_table[] = {
92 { USB_DEVICE(0x10C4, 0x818B) }, /* AVIT Research USB to TTL */ 92 { USB_DEVICE(0x10C4, 0x818B) }, /* AVIT Research USB to TTL */
93 { USB_DEVICE(0x10C4, 0x819F) }, /* MJS USB Toslink Switcher */ 93 { USB_DEVICE(0x10C4, 0x819F) }, /* MJS USB Toslink Switcher */
94 { USB_DEVICE(0x10C4, 0x81A6) }, /* ThinkOptics WavIt */ 94 { USB_DEVICE(0x10C4, 0x81A6) }, /* ThinkOptics WavIt */
95 { USB_DEVICE(0x10C4, 0x81A9) }, /* Multiplex RC Interface */
95 { USB_DEVICE(0x10C4, 0x81AC) }, /* MSD Dash Hawk */ 96 { USB_DEVICE(0x10C4, 0x81AC) }, /* MSD Dash Hawk */
96 { USB_DEVICE(0x10C4, 0x81AD) }, /* INSYS USB Modem */ 97 { USB_DEVICE(0x10C4, 0x81AD) }, /* INSYS USB Modem */
97 { USB_DEVICE(0x10C4, 0x81C8) }, /* Lipowsky Industrie Elektronik GmbH, Baby-JTAG */ 98 { USB_DEVICE(0x10C4, 0x81C8) }, /* Lipowsky Industrie Elektronik GmbH, Baby-JTAG */
@@ -280,7 +281,10 @@ static int cp210x_get_config(struct usb_serial_port *port, u8 request,
280 dbg("%s - Unable to send config request, " 281 dbg("%s - Unable to send config request, "
281 "request=0x%x size=%d result=%d\n", 282 "request=0x%x size=%d result=%d\n",
282 __func__, request, size, result); 283 __func__, request, size, result);
283 return -EPROTO; 284 if (result > 0)
285 result = -EPROTO;
286
287 return result;
284 } 288 }
285 289
286 return 0; 290 return 0;
@@ -331,7 +335,10 @@ static int cp210x_set_config(struct usb_serial_port *port, u8 request,
331 dbg("%s - Unable to send request, " 335 dbg("%s - Unable to send request, "
332 "request=0x%x size=%d result=%d\n", 336 "request=0x%x size=%d result=%d\n",
333 __func__, request, size, result); 337 __func__, request, size, result);
334 return -EPROTO; 338 if (result > 0)
339 result = -EPROTO;
340
341 return result;
335 } 342 }
336 343
337 return 0; 344 return 0;
@@ -395,10 +402,11 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port)
395 402
396 dbg("%s - port %d", __func__, port->number); 403 dbg("%s - port %d", __func__, port->number);
397 404
398 if (cp210x_set_config_single(port, CP210X_IFC_ENABLE, UART_ENABLE)) { 405 result = cp210x_set_config_single(port, CP210X_IFC_ENABLE,
399 dev_err(&port->dev, "%s - Unable to enable UART\n", 406 UART_ENABLE);
400 __func__); 407 if (result) {
401 return -EPROTO; 408 dev_err(&port->dev, "%s - Unable to enable UART\n", __func__);
409 return result;
402 } 410 }
403 411
404 result = usb_serial_generic_open(tty, port); 412 result = usb_serial_generic_open(tty, port);
@@ -520,18 +528,13 @@ static void cp210x_get_termios_port(struct usb_serial_port *port,
520 cflag |= PARENB; 528 cflag |= PARENB;
521 break; 529 break;
522 case BITS_PARITY_MARK: 530 case BITS_PARITY_MARK:
523 dbg("%s - parity = MARK (not supported, disabling parity)", 531 dbg("%s - parity = MARK", __func__);
524 __func__); 532 cflag |= (PARENB|PARODD|CMSPAR);
525 cflag &= ~PARENB;
526 bits &= ~BITS_PARITY_MASK;
527 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2);
528 break; 533 break;
529 case BITS_PARITY_SPACE: 534 case BITS_PARITY_SPACE:
530 dbg("%s - parity = SPACE (not supported, disabling parity)", 535 dbg("%s - parity = SPACE", __func__);
531 __func__); 536 cflag &= ~PARODD;
532 cflag &= ~PARENB; 537 cflag |= (PARENB|CMSPAR);
533 bits &= ~BITS_PARITY_MASK;
534 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2);
535 break; 538 break;
536 default: 539 default:
537 dbg("%s - Unknown parity mode, disabling parity", __func__); 540 dbg("%s - Unknown parity mode, disabling parity", __func__);
@@ -588,7 +591,6 @@ static void cp210x_set_termios(struct tty_struct *tty,
588 if (!tty) 591 if (!tty)
589 return; 592 return;
590 593
591 tty->termios->c_cflag &= ~CMSPAR;
592 cflag = tty->termios->c_cflag; 594 cflag = tty->termios->c_cflag;
593 old_cflag = old_termios->c_cflag; 595 old_cflag = old_termios->c_cflag;
594 baud = cp210x_quantise_baudrate(tty_get_baud_rate(tty)); 596 baud = cp210x_quantise_baudrate(tty_get_baud_rate(tty));
@@ -643,16 +645,27 @@ static void cp210x_set_termios(struct tty_struct *tty,
643 "not supported by device\n"); 645 "not supported by device\n");
644 } 646 }
645 647
646 if ((cflag & (PARENB|PARODD)) != (old_cflag & (PARENB|PARODD))) { 648 if ((cflag & (PARENB|PARODD|CMSPAR)) !=
649 (old_cflag & (PARENB|PARODD|CMSPAR))) {
647 cp210x_get_config(port, CP210X_GET_LINE_CTL, &bits, 2); 650 cp210x_get_config(port, CP210X_GET_LINE_CTL, &bits, 2);
648 bits &= ~BITS_PARITY_MASK; 651 bits &= ~BITS_PARITY_MASK;
649 if (cflag & PARENB) { 652 if (cflag & PARENB) {
650 if (cflag & PARODD) { 653 if (cflag & CMSPAR) {
651 bits |= BITS_PARITY_ODD; 654 if (cflag & PARODD) {
652 dbg("%s - parity = ODD", __func__); 655 bits |= BITS_PARITY_MARK;
656 dbg("%s - parity = MARK", __func__);
657 } else {
658 bits |= BITS_PARITY_SPACE;
659 dbg("%s - parity = SPACE", __func__);
660 }
653 } else { 661 } else {
654 bits |= BITS_PARITY_EVEN; 662 if (cflag & PARODD) {
655 dbg("%s - parity = EVEN", __func__); 663 bits |= BITS_PARITY_ODD;
664 dbg("%s - parity = ODD", __func__);
665 } else {
666 bits |= BITS_PARITY_EVEN;
667 dbg("%s - parity = EVEN", __func__);
668 }
656 } 669 }
657 } 670 }
658 if (cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2)) 671 if (cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2))
diff --git a/drivers/usb/serial/cyberjack.c b/drivers/usb/serial/cyberjack.c
index f744ab7a3b19..98bf83349838 100644
--- a/drivers/usb/serial/cyberjack.c
+++ b/drivers/usb/serial/cyberjack.c
@@ -138,7 +138,6 @@ static int cyberjack_startup(struct usb_serial *serial)
138 138
139 for (i = 0; i < serial->num_ports; ++i) { 139 for (i = 0; i < serial->num_ports; ++i) {
140 int result; 140 int result;
141 serial->port[i]->interrupt_in_urb->dev = serial->dev;
142 result = usb_submit_urb(serial->port[i]->interrupt_in_urb, 141 result = usb_submit_urb(serial->port[i]->interrupt_in_urb,
143 GFP_KERNEL); 142 GFP_KERNEL);
144 if (result) 143 if (result)
@@ -208,7 +207,6 @@ static void cyberjack_close(struct usb_serial_port *port)
208static int cyberjack_write(struct tty_struct *tty, 207static int cyberjack_write(struct tty_struct *tty,
209 struct usb_serial_port *port, const unsigned char *buf, int count) 208 struct usb_serial_port *port, const unsigned char *buf, int count)
210{ 209{
211 struct usb_serial *serial = port->serial;
212 struct cyberjack_private *priv = usb_get_serial_port_data(port); 210 struct cyberjack_private *priv = usb_get_serial_port_data(port);
213 unsigned long flags; 211 unsigned long flags;
214 int result; 212 int result;
@@ -221,22 +219,18 @@ static int cyberjack_write(struct tty_struct *tty,
221 return 0; 219 return 0;
222 } 220 }
223 221
224 spin_lock_bh(&port->lock); 222 if (!test_and_clear_bit(0, &port->write_urbs_free)) {
225 if (port->write_urb_busy) {
226 spin_unlock_bh(&port->lock);
227 dbg("%s - already writing", __func__); 223 dbg("%s - already writing", __func__);
228 return 0; 224 return 0;
229 } 225 }
230 port->write_urb_busy = 1;
231 spin_unlock_bh(&port->lock);
232 226
233 spin_lock_irqsave(&priv->lock, flags); 227 spin_lock_irqsave(&priv->lock, flags);
234 228
235 if (count+priv->wrfilled > sizeof(priv->wrbuf)) { 229 if (count+priv->wrfilled > sizeof(priv->wrbuf)) {
236 /* To much data for buffer. Reset buffer. */ 230 /* To much data for buffer. Reset buffer. */
237 priv->wrfilled = 0; 231 priv->wrfilled = 0;
238 port->write_urb_busy = 0;
239 spin_unlock_irqrestore(&priv->lock, flags); 232 spin_unlock_irqrestore(&priv->lock, flags);
233 set_bit(0, &port->write_urbs_free);
240 return 0; 234 return 0;
241 } 235 }
242 236
@@ -265,13 +259,7 @@ static int cyberjack_write(struct tty_struct *tty,
265 priv->wrsent = length; 259 priv->wrsent = length;
266 260
267 /* set up our urb */ 261 /* set up our urb */
268 usb_fill_bulk_urb(port->write_urb, serial->dev, 262 port->write_urb->transfer_buffer_length = length;
269 usb_sndbulkpipe(serial->dev, port->bulk_out_endpointAddress),
270 port->write_urb->transfer_buffer, length,
271 ((serial->type->write_bulk_callback) ?
272 serial->type->write_bulk_callback :
273 cyberjack_write_bulk_callback),
274 port);
275 263
276 /* send the data out the bulk port */ 264 /* send the data out the bulk port */
277 result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 265 result = usb_submit_urb(port->write_urb, GFP_ATOMIC);
@@ -283,7 +271,7 @@ static int cyberjack_write(struct tty_struct *tty,
283 priv->wrfilled = 0; 271 priv->wrfilled = 0;
284 priv->wrsent = 0; 272 priv->wrsent = 0;
285 spin_unlock_irqrestore(&priv->lock, flags); 273 spin_unlock_irqrestore(&priv->lock, flags);
286 port->write_urb_busy = 0; 274 set_bit(0, &port->write_urbs_free);
287 return 0; 275 return 0;
288 } 276 }
289 277
@@ -351,7 +339,6 @@ static void cyberjack_read_int_callback(struct urb *urb)
351 spin_unlock(&priv->lock); 339 spin_unlock(&priv->lock);
352 340
353 if (!old_rdtodo) { 341 if (!old_rdtodo) {
354 port->read_urb->dev = port->serial->dev;
355 result = usb_submit_urb(port->read_urb, GFP_ATOMIC); 342 result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
356 if (result) 343 if (result)
357 dev_err(&port->dev, "%s - failed resubmitting " 344 dev_err(&port->dev, "%s - failed resubmitting "
@@ -362,7 +349,6 @@ static void cyberjack_read_int_callback(struct urb *urb)
362 } 349 }
363 350
364resubmit: 351resubmit:
365 port->interrupt_in_urb->dev = port->serial->dev;
366 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC); 352 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC);
367 if (result) 353 if (result)
368 dev_err(&port->dev, "usb_submit_urb(read int) failed\n"); 354 dev_err(&port->dev, "usb_submit_urb(read int) failed\n");
@@ -415,7 +401,6 @@ static void cyberjack_read_bulk_callback(struct urb *urb)
415 401
416 /* Continue to read if we have still urbs to do. */ 402 /* Continue to read if we have still urbs to do. */
417 if (todo /* || (urb->actual_length==port->bulk_in_endpointAddress)*/) { 403 if (todo /* || (urb->actual_length==port->bulk_in_endpointAddress)*/) {
418 port->read_urb->dev = port->serial->dev;
419 result = usb_submit_urb(port->read_urb, GFP_ATOMIC); 404 result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
420 if (result) 405 if (result)
421 dev_err(&port->dev, "%s - failed resubmitting read " 406 dev_err(&port->dev, "%s - failed resubmitting read "
@@ -432,7 +417,7 @@ static void cyberjack_write_bulk_callback(struct urb *urb)
432 417
433 dbg("%s - port %d", __func__, port->number); 418 dbg("%s - port %d", __func__, port->number);
434 419
435 port->write_urb_busy = 0; 420 set_bit(0, &port->write_urbs_free);
436 if (status) { 421 if (status) {
437 dbg("%s - nonzero write bulk status received: %d", 422 dbg("%s - nonzero write bulk status received: %d",
438 __func__, status); 423 __func__, status);
@@ -455,13 +440,7 @@ static void cyberjack_write_bulk_callback(struct urb *urb)
455 priv->wrsent += length; 440 priv->wrsent += length;
456 441
457 /* set up our urb */ 442 /* set up our urb */
458 usb_fill_bulk_urb(port->write_urb, port->serial->dev, 443 port->write_urb->transfer_buffer_length = length;
459 usb_sndbulkpipe(port->serial->dev, port->bulk_out_endpointAddress),
460 port->write_urb->transfer_buffer, length,
461 ((port->serial->type->write_bulk_callback) ?
462 port->serial->type->write_bulk_callback :
463 cyberjack_write_bulk_callback),
464 port);
465 444
466 /* send the data out the bulk port */ 445 /* send the data out the bulk port */
467 result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 446 result = usb_submit_urb(port->write_urb, GFP_ATOMIC);
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c
index d9906eb9d16a..07680d6b792b 100644
--- a/drivers/usb/serial/cypress_m8.c
+++ b/drivers/usb/serial/cypress_m8.c
@@ -16,32 +16,6 @@
16 * 16 *
17 * See http://geocities.com/i0xox0i for information on this driver and the 17 * See http://geocities.com/i0xox0i for information on this driver and the
18 * earthmate usb device. 18 * earthmate usb device.
19 *
20 * Lonnie Mendez <dignome@gmail.com>
21 * 4-29-2005
22 * Fixed problem where setting or retreiving the serial config would fail
23 * with EPIPE. Removed CRTS toggling so the driver behaves more like
24 * other usbserial adapters. Issued new interval of 1ms instead of the
25 * default 10ms. As a result, transfer speed has been substantially
26 * increased from avg. 850bps to avg. 3300bps. initial termios has also
27 * been modified. Cleaned up code and formatting issues so it is more
28 * readable. Replaced the C++ style comments.
29 *
30 * Lonnie Mendez <dignome@gmail.com>
31 * 12-15-2004
32 * Incorporated write buffering from pl2303 driver. Fixed bug with line
33 * handling so both lines are raised in cypress_open. (was dropping rts)
34 * Various code cleanups made as well along with other misc bug fixes.
35 *
36 * Lonnie Mendez <dignome@gmail.com>
37 * 04-10-2004
38 * Driver modified to support dynamic line settings. Various improvements
39 * and features.
40 *
41 * Neil Whelchel
42 * 10-2003
43 * Driver first released.
44 *
45 */ 19 */
46 20
47/* Thanks to Neil Whelchel for writing the first cypress m8 implementation 21/* Thanks to Neil Whelchel for writing the first cypress m8 implementation
@@ -1162,8 +1136,6 @@ static void cypress_unthrottle(struct tty_struct *tty)
1162 return; 1136 return;
1163 1137
1164 if (actually_throttled) { 1138 if (actually_throttled) {
1165 port->interrupt_in_urb->dev = port->serial->dev;
1166
1167 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 1139 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
1168 if (result) { 1140 if (result) {
1169 dev_err(&port->dev, "%s - failed submitting read urb, " 1141 dev_err(&port->dev, "%s - failed submitting read urb, "
@@ -1352,7 +1324,6 @@ static void cypress_write_int_callback(struct urb *urb)
1352 dbg("%s - nonzero write bulk status received: %d", 1324 dbg("%s - nonzero write bulk status received: %d",
1353 __func__, status); 1325 __func__, status);
1354 port->interrupt_out_urb->transfer_buffer_length = 1; 1326 port->interrupt_out_urb->transfer_buffer_length = 1;
1355 port->interrupt_out_urb->dev = port->serial->dev;
1356 result = usb_submit_urb(port->interrupt_out_urb, GFP_ATOMIC); 1327 result = usb_submit_urb(port->interrupt_out_urb, GFP_ATOMIC);
1357 if (!result) 1328 if (!result)
1358 return; 1329 return;
diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c
index e92cbefc0f88..6d26a77d0f2a 100644
--- a/drivers/usb/serial/digi_acceleport.c
+++ b/drivers/usb/serial/digi_acceleport.c
@@ -13,222 +13,6 @@
13* 13*
14* Peter Berger (pberger@brimson.com) 14* Peter Berger (pberger@brimson.com)
15* Al Borchers (borchers@steinerpoint.com) 15* Al Borchers (borchers@steinerpoint.com)
16*
17* (12/03/2001) gkh
18* switched to using port->port.count instead of private version.
19* Removed port->active
20*
21* (04/08/2001) gb
22* Identify version on module load.
23*
24* (11/01/2000) Adam J. Richter
25* usb_device_id table support
26*
27* (11/01/2000) pberger and borchers
28* -- Turned off the USB_DISABLE_SPD flag for write bulk urbs--it caused
29* USB 4 ports to hang on startup.
30* -- Serialized access to write urbs by adding the dp_write_urb_in_use
31* flag; otherwise, the driver caused SMP system hangs. Watching the
32* urb status is not sufficient.
33*
34* (10/05/2000) gkh
35* -- Fixed bug with urb->dev not being set properly, now that the usb
36* core needs it.
37*
38* (8/8/2000) pberger and borchers
39* -- Fixed close so that
40* - it can timeout while waiting for transmit idle, if needed;
41* - it ignores interrupts when flushing the port, turning
42* of modem signalling, and so on;
43* - it waits for the flush to really complete before returning.
44* -- Read_bulk_callback and write_bulk_callback check for a closed
45* port before using the tty struct or writing to the port.
46* -- The two changes above fix the oops caused by interrupted closes.
47* -- Added interruptible args to write_oob_command and set_modem_signals
48* and added a timeout arg to transmit_idle; needed for fixes to
49* close.
50* -- Added code for rx_throttle and rx_unthrottle so that input flow
51* control works.
52* -- Added code to set overrun, parity, framing, and break errors
53* (untested).
54* -- Set USB_DISABLE_SPD flag for write bulk urbs, so no 0 length
55* bulk writes are done. These hung the Digi USB device. The
56* 0 length bulk writes were a new feature of usb-uhci added in
57* the 2.4.0-test6 kernels.
58* -- Fixed mod inc race in open; do mod inc before sleeping to wait
59* for a close to finish.
60*
61* (7/31/2000) pberger
62* -- Fixed bugs with hardware handshaking:
63* - Added code to set/clear tty->hw_stopped in digi_read_oob_callback()
64* and digi_set_termios()
65* -- Added code in digi_set_termios() to
66* - add conditional in code handling transition from B0 to only
67* set RTS if RTS/CTS flow control is either not in use or if
68* the port is not currently throttled.
69* - handle turning off CRTSCTS.
70*
71* (7/30/2000) borchers
72* -- Added support for more than one Digi USB device by moving
73* globals to a private structure in the pointed to from the
74* usb_serial structure.
75* -- Moved the modem change and transmit idle wait queues into
76* the port private structure, so each port has its own queue
77* rather than sharing global queues.
78* -- Added support for break signals.
79*
80* (7/25/2000) pberger
81* -- Added USB-2 support. Note: the USB-2 supports 3 devices: two
82* serial and a parallel port. The parallel port is implemented
83* as a serial-to-parallel converter. That is, the driver actually
84* presents all three USB-2 interfaces as serial ports, but the third
85* one physically connects to a parallel device. Thus, for example,
86* one could plug a parallel printer into the USB-2's third port,
87* but from the kernel's (and userland's) point of view what's
88* actually out there is a serial device.
89*
90* (7/15/2000) borchers
91* -- Fixed race in open when a close is in progress.
92* -- Keep count of opens and dec the module use count for each
93* outstanding open when shutdown is called (on disconnect).
94* -- Fixed sanity checks in read_bulk_callback and write_bulk_callback
95* so pointers are checked before use.
96* -- Split read bulk callback into in band and out of band
97* callbacks, and no longer restart read chains if there is
98* a status error or a sanity error. This fixed the seg
99* faults and other errors we used to get on disconnect.
100* -- Port->active is once again a flag as usb-serial intended it
101* to be, not a count. Since it was only a char it would
102* have been limited to 256 simultaneous opens. Now the open
103* count is kept in the port private structure in dp_open_count.
104* -- Added code for modularization of the digi_acceleport driver.
105*
106* (6/27/2000) pberger and borchers
107* -- Zeroed out sync field in the wakeup_task before first use;
108* otherwise the uninitialized value might prevent the task from
109* being scheduled.
110* -- Initialized ret value to 0 in write_bulk_callback, otherwise
111* the uninitialized value could cause a spurious debugging message.
112*
113* (6/22/2000) pberger and borchers
114* -- Made cond_wait_... inline--apparently on SPARC the flags arg
115* to spin_lock_irqsave cannot be passed to another function
116* to call spin_unlock_irqrestore. Thanks to Pauline Middelink.
117* -- In digi_set_modem_signals the inner nested spin locks use just
118* spin_lock() rather than spin_lock_irqsave(). The old code
119* mistakenly left interrupts off. Thanks to Pauline Middelink.
120* -- copy_from_user (which can sleep) is no longer called while a
121* spinlock is held. We copy to a local buffer before getting
122* the spinlock--don't like the extra copy but the code is simpler.
123* -- Printk and dbg are no longer called while a spin lock is held.
124*
125* (6/4/2000) pberger and borchers
126* -- Replaced separate calls to spin_unlock_irqrestore and
127* interruptible_sleep_on_timeout with a new function
128* cond_wait_interruptible_timeout_irqrestore. This eliminates
129* the race condition where the wake up could happen after
130* the unlock and before the sleep.
131* -- Close now waits for output to drain.
132* -- Open waits until any close in progress is finished.
133* -- All out of band responses are now processed, not just the
134* first in a USB packet.
135* -- Fixed a bug that prevented the driver from working when the
136* first Digi port was not the first USB serial port--the driver
137* was mistakenly using the external USB serial port number to
138* try to index into its internal ports.
139* -- Fixed an SMP bug -- write_bulk_callback is called directly from
140* an interrupt, so spin_lock_irqsave/spin_unlock_irqrestore are
141* needed for locks outside write_bulk_callback that are also
142* acquired by write_bulk_callback to prevent deadlocks.
143* -- Fixed support for select() by making digi_chars_in_buffer()
144* return 256 when -EINPROGRESS is set, as the line discipline
145* code in n_tty.c expects.
146* -- Fixed an include file ordering problem that prevented debugging
147* messages from working.
148* -- Fixed an intermittent timeout problem that caused writes to
149* sometimes get stuck on some machines on some kernels. It turns
150* out in these circumstances write_chan() (in n_tty.c) was
151* asleep waiting for our wakeup call. Even though we call
152* wake_up_interruptible() in digi_write_bulk_callback(), there is
153* a race condition that could cause the wakeup to fail: if our
154* wake_up_interruptible() call occurs between the time that our
155* driver write routine finishes and write_chan() sets current->state
156* to TASK_INTERRUPTIBLE, the effect of our wakeup setting the state
157* to TASK_RUNNING will be lost and write_chan's subsequent call to
158* schedule() will never return (unless it catches a signal).
159* This race condition occurs because write_bulk_callback() (and thus
160* the wakeup) are called asynchronously from an interrupt, rather than
161* from the scheduler. We can avoid the race by calling the wakeup
162* from the scheduler queue and that's our fix: Now, at the end of
163* write_bulk_callback() we queue up a wakeup call on the scheduler
164* task queue. We still also invoke the wakeup directly since that
165* squeezes a bit more performance out of the driver, and any lost
166* race conditions will get cleaned up at the next scheduler run.
167*
168* NOTE: The problem also goes away if you comment out
169* the two code lines in write_chan() where current->state
170* is set to TASK_RUNNING just before calling driver.write() and to
171* TASK_INTERRUPTIBLE immediately afterwards. This is why the
172* problem did not show up with the 2.2 kernels -- they do not
173* include that code.
174*
175* (5/16/2000) pberger and borchers
176* -- Added timeouts to sleeps, to defend against lost wake ups.
177* -- Handle transition to/from B0 baud rate in digi_set_termios.
178*
179* (5/13/2000) pberger and borchers
180* -- All commands now sent on out of band port, using
181* digi_write_oob_command.
182* -- Get modem control signals whenever they change, support TIOCMGET/
183* SET/BIS/BIC ioctls.
184* -- digi_set_termios now supports parity, word size, stop bits, and
185* receive enable.
186* -- Cleaned up open and close, use digi_set_termios and
187* digi_write_oob_command to set port parameters.
188* -- Added digi_startup_device to start read chains on all ports.
189* -- Write buffer is only used when count==1, to be sure put_char can
190* write a char (unless the buffer is full).
191*
192* (5/10/2000) pberger and borchers
193* -- Added MOD_INC_USE_COUNT/MOD_DEC_USE_COUNT calls on open/close.
194* -- Fixed problem where the first incoming character is lost on
195* port opens after the first close on that port. Now we keep
196* the read_urb chain open until shutdown.
197* -- Added more port conditioning calls in digi_open and digi_close.
198* -- Convert port->active to a use count so that we can deal with multiple
199* opens and closes properly.
200* -- Fixed some problems with the locking code.
201*
202* (5/3/2000) pberger and borchers
203* -- First alpha version of the driver--many known limitations and bugs.
204*
205*
206* Locking and SMP
207*
208* - Each port, including the out-of-band port, has a lock used to
209* serialize all access to the port's private structure.
210* - The port lock is also used to serialize all writes and access to
211* the port's URB.
212* - The port lock is also used for the port write_wait condition
213* variable. Holding the port lock will prevent a wake up on the
214* port's write_wait; this can be used with cond_wait_... to be sure
215* the wake up is not lost in a race when dropping the lock and
216* sleeping waiting for the wakeup.
217* - digi_write() does not sleep, since it is sometimes called on
218* interrupt time.
219* - digi_write_bulk_callback() and digi_read_bulk_callback() are
220* called directly from interrupts. Hence spin_lock_irqsave()
221* and spin_unlock_irqrestore() are used in the rest of the code
222* for any locks they acquire.
223* - digi_write_bulk_callback() gets the port lock before waking up
224* processes sleeping on the port write_wait. It also schedules
225* wake ups so they happen from the scheduler, because the tty
226* system can miss wake ups from interrupts.
227* - All sleeps use a timeout of DIGI_RETRY_TIMEOUT before looping to
228* recheck the condition they are sleeping on. This is defensive,
229* in case a wake up is lost.
230* - Following Documentation/DocBook/kernel-locking.tmpl no spin locks
231* are held when calling copy_to/from_user or printk.
232*/ 16*/
233 17
234#include <linux/kernel.h> 18#include <linux/kernel.h>
@@ -654,7 +438,6 @@ static int digi_write_oob_command(struct usb_serial_port *port,
654 len &= ~3; 438 len &= ~3;
655 memcpy(oob_port->write_urb->transfer_buffer, buf, len); 439 memcpy(oob_port->write_urb->transfer_buffer, buf, len);
656 oob_port->write_urb->transfer_buffer_length = len; 440 oob_port->write_urb->transfer_buffer_length = len;
657 oob_port->write_urb->dev = port->serial->dev;
658 ret = usb_submit_urb(oob_port->write_urb, GFP_ATOMIC); 441 ret = usb_submit_urb(oob_port->write_urb, GFP_ATOMIC);
659 if (ret == 0) { 442 if (ret == 0) {
660 oob_priv->dp_write_urb_in_use = 1; 443 oob_priv->dp_write_urb_in_use = 1;
@@ -732,7 +515,6 @@ static int digi_write_inb_command(struct usb_serial_port *port,
732 memcpy(data, buf, len); 515 memcpy(data, buf, len);
733 port->write_urb->transfer_buffer_length = len; 516 port->write_urb->transfer_buffer_length = len;
734 } 517 }
735 port->write_urb->dev = port->serial->dev;
736 518
737 ret = usb_submit_urb(port->write_urb, GFP_ATOMIC); 519 ret = usb_submit_urb(port->write_urb, GFP_ATOMIC);
738 if (ret == 0) { 520 if (ret == 0) {
@@ -803,7 +585,6 @@ static int digi_set_modem_signals(struct usb_serial_port *port,
803 data[7] = 0; 585 data[7] = 0;
804 586
805 oob_port->write_urb->transfer_buffer_length = 8; 587 oob_port->write_urb->transfer_buffer_length = 8;
806 oob_port->write_urb->dev = port->serial->dev;
807 588
808 ret = usb_submit_urb(oob_port->write_urb, GFP_ATOMIC); 589 ret = usb_submit_urb(oob_port->write_urb, GFP_ATOMIC);
809 if (ret == 0) { 590 if (ret == 0) {
@@ -899,10 +680,8 @@ static void digi_rx_unthrottle(struct tty_struct *tty)
899 spin_lock_irqsave(&priv->dp_port_lock, flags); 680 spin_lock_irqsave(&priv->dp_port_lock, flags);
900 681
901 /* restart read chain */ 682 /* restart read chain */
902 if (priv->dp_throttle_restart) { 683 if (priv->dp_throttle_restart)
903 port->read_urb->dev = port->serial->dev;
904 ret = usb_submit_urb(port->read_urb, GFP_ATOMIC); 684 ret = usb_submit_urb(port->read_urb, GFP_ATOMIC);
905 }
906 685
907 /* turn throttle off */ 686 /* turn throttle off */
908 priv->dp_throttled = 0; 687 priv->dp_throttled = 0;
@@ -1195,7 +974,6 @@ static int digi_write(struct tty_struct *tty, struct usb_serial_port *port,
1195 } 974 }
1196 975
1197 port->write_urb->transfer_buffer_length = data_len+2; 976 port->write_urb->transfer_buffer_length = data_len+2;
1198 port->write_urb->dev = port->serial->dev;
1199 977
1200 *data++ = DIGI_CMD_SEND_DATA; 978 *data++ = DIGI_CMD_SEND_DATA;
1201 *data++ = data_len; 979 *data++ = data_len;
@@ -1271,7 +1049,6 @@ static void digi_write_bulk_callback(struct urb *urb)
1271 = (unsigned char)priv->dp_out_buf_len; 1049 = (unsigned char)priv->dp_out_buf_len;
1272 port->write_urb->transfer_buffer_length = 1050 port->write_urb->transfer_buffer_length =
1273 priv->dp_out_buf_len + 2; 1051 priv->dp_out_buf_len + 2;
1274 port->write_urb->dev = serial->dev;
1275 memcpy(port->write_urb->transfer_buffer + 2, priv->dp_out_buf, 1052 memcpy(port->write_urb->transfer_buffer + 2, priv->dp_out_buf,
1276 priv->dp_out_buf_len); 1053 priv->dp_out_buf_len);
1277 ret = usb_submit_urb(port->write_urb, GFP_ATOMIC); 1054 ret = usb_submit_urb(port->write_urb, GFP_ATOMIC);
@@ -1473,7 +1250,6 @@ static int digi_startup_device(struct usb_serial *serial)
1473 /* set USB_DISABLE_SPD flag for write bulk urbs */ 1250 /* set USB_DISABLE_SPD flag for write bulk urbs */
1474 for (i = 0; i < serial->type->num_ports + 1; i++) { 1251 for (i = 0; i < serial->type->num_ports + 1; i++) {
1475 port = serial->port[i]; 1252 port = serial->port[i];
1476 port->write_urb->dev = port->serial->dev;
1477 ret = usb_submit_urb(port->read_urb, GFP_KERNEL); 1253 ret = usb_submit_urb(port->read_urb, GFP_KERNEL);
1478 if (ret != 0) { 1254 if (ret != 0) {
1479 dev_err(&port->dev, 1255 dev_err(&port->dev,
@@ -1616,7 +1392,6 @@ static void digi_read_bulk_callback(struct urb *urb)
1616 } 1392 }
1617 1393
1618 /* continue read */ 1394 /* continue read */
1619 urb->dev = port->serial->dev;
1620 ret = usb_submit_urb(urb, GFP_ATOMIC); 1395 ret = usb_submit_urb(urb, GFP_ATOMIC);
1621 if (ret != 0 && ret != -EPERM) { 1396 if (ret != 0 && ret != -EPERM) {
1622 dev_err(&port->dev, 1397 dev_err(&port->dev,
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index ff3db5d056a5..c290df97108e 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -2105,6 +2105,9 @@ static void ftdi_set_termios(struct tty_struct *tty,
2105 2105
2106 cflag = termios->c_cflag; 2106 cflag = termios->c_cflag;
2107 2107
2108 if (old_termios == 0)
2109 goto no_skip;
2110
2108 if (old_termios->c_cflag == termios->c_cflag 2111 if (old_termios->c_cflag == termios->c_cflag
2109 && old_termios->c_ispeed == termios->c_ispeed 2112 && old_termios->c_ispeed == termios->c_ispeed
2110 && old_termios->c_ospeed == termios->c_ospeed) 2113 && old_termios->c_ospeed == termios->c_ospeed)
@@ -2118,6 +2121,7 @@ static void ftdi_set_termios(struct tty_struct *tty,
2118 (termios->c_cflag & (CSIZE|PARODD|PARENB|CMSPAR|CSTOPB))) 2121 (termios->c_cflag & (CSIZE|PARODD|PARENB|CMSPAR|CSTOPB)))
2119 goto no_data_parity_stop_changes; 2122 goto no_data_parity_stop_changes;
2120 2123
2124no_skip:
2121 /* Set number of data bits, parity, stop bits */ 2125 /* Set number of data bits, parity, stop bits */
2122 2126
2123 urb_value = 0; 2127 urb_value = 0;
diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c
index 1a49ca9c8ea5..bf12565f8e87 100644
--- a/drivers/usb/serial/garmin_gps.c
+++ b/drivers/usb/serial/garmin_gps.c
@@ -901,7 +901,6 @@ static int garmin_init_session(struct usb_serial_port *port)
901 usb_kill_urb(port->interrupt_in_urb); 901 usb_kill_urb(port->interrupt_in_urb);
902 902
903 dbg("%s - adding interrupt input", __func__); 903 dbg("%s - adding interrupt input", __func__);
904 port->interrupt_in_urb->dev = serial->dev;
905 status = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 904 status = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
906 if (status) 905 if (status)
907 dev_err(&serial->dev->dev, 906 dev_err(&serial->dev->dev,
@@ -1277,7 +1276,6 @@ static void garmin_read_int_callback(struct urb *urb)
1277 unsigned long flags; 1276 unsigned long flags;
1278 int retval; 1277 int retval;
1279 struct usb_serial_port *port = urb->context; 1278 struct usb_serial_port *port = urb->context;
1280 struct usb_serial *serial = port->serial;
1281 struct garmin_data *garmin_data_p = usb_get_serial_port_data(port); 1279 struct garmin_data *garmin_data_p = usb_get_serial_port_data(port);
1282 unsigned char *data = urb->transfer_buffer; 1280 unsigned char *data = urb->transfer_buffer;
1283 int status = urb->status; 1281 int status = urb->status;
@@ -1311,12 +1309,6 @@ static void garmin_read_int_callback(struct urb *urb)
1311 if (0 == (garmin_data_p->flags & FLAGS_BULK_IN_ACTIVE)) { 1309 if (0 == (garmin_data_p->flags & FLAGS_BULK_IN_ACTIVE)) {
1312 1310
1313 /* bulk data available */ 1311 /* bulk data available */
1314 usb_fill_bulk_urb(port->read_urb, serial->dev,
1315 usb_rcvbulkpipe(serial->dev,
1316 port->bulk_in_endpointAddress),
1317 port->read_urb->transfer_buffer,
1318 port->read_urb->transfer_buffer_length,
1319 garmin_read_bulk_callback, port);
1320 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC); 1312 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC);
1321 if (retval) { 1313 if (retval) {
1322 dev_err(&port->dev, 1314 dev_err(&port->dev,
@@ -1353,7 +1345,6 @@ static void garmin_read_int_callback(struct urb *urb)
1353 1345
1354 garmin_read_process(garmin_data_p, data, urb->actual_length, 0); 1346 garmin_read_process(garmin_data_p, data, urb->actual_length, 0);
1355 1347
1356 port->interrupt_in_urb->dev = port->serial->dev;
1357 retval = usb_submit_urb(urb, GFP_ATOMIC); 1348 retval = usb_submit_urb(urb, GFP_ATOMIC);
1358 if (retval) 1349 if (retval)
1359 dev_err(&urb->dev->dev, 1350 dev_err(&urb->dev->dev,
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
index e4db5ad2bc55..f7403576f99f 100644
--- a/drivers/usb/serial/generic.c
+++ b/drivers/usb/serial/generic.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * USB Serial Converter Generic functions 2 * USB Serial Converter Generic functions
3 * 3 *
4 * Copyright (C) 2010 Johan Hovold (jhovold@gmail.com) 4 * Copyright (C) 2010 - 2011 Johan Hovold (jhovold@gmail.com)
5 * Copyright (C) 1999 - 2002 Greg Kroah-Hartman (greg@kroah.com) 5 * Copyright (C) 1999 - 2002 Greg Kroah-Hartman (greg@kroah.com)
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
@@ -132,7 +132,7 @@ int usb_serial_generic_open(struct tty_struct *tty, struct usb_serial_port *port
132 132
133 /* if we have a bulk endpoint, start reading from it */ 133 /* if we have a bulk endpoint, start reading from it */
134 if (port->bulk_in_size) 134 if (port->bulk_in_size)
135 result = usb_serial_generic_submit_read_urb(port, GFP_KERNEL); 135 result = usb_serial_generic_submit_read_urbs(port, GFP_KERNEL);
136 136
137 return result; 137 return result;
138} 138}
@@ -157,8 +157,10 @@ static void generic_cleanup(struct usb_serial_port *port)
157 kfifo_reset_out(&port->write_fifo); 157 kfifo_reset_out(&port->write_fifo);
158 spin_unlock_irqrestore(&port->lock, flags); 158 spin_unlock_irqrestore(&port->lock, flags);
159 } 159 }
160 if (port->bulk_in_size) 160 if (port->bulk_in_size) {
161 usb_kill_urb(port->read_urb); 161 for (i = 0; i < ARRAY_SIZE(port->read_urbs); ++i)
162 usb_kill_urb(port->read_urbs[i]);
163 }
162 } 164 }
163} 165}
164 166
@@ -308,19 +310,52 @@ int usb_serial_generic_chars_in_buffer(struct tty_struct *tty)
308 return chars; 310 return chars;
309} 311}
310 312
311int usb_serial_generic_submit_read_urb(struct usb_serial_port *port, 313static int usb_serial_generic_submit_read_urb(struct usb_serial_port *port,
314 int index, gfp_t mem_flags)
315{
316 int res;
317
318 if (!test_and_clear_bit(index, &port->read_urbs_free))
319 return 0;
320
321 dbg("%s - port %d, urb %d\n", __func__, port->number, index);
322
323 res = usb_submit_urb(port->read_urbs[index], mem_flags);
324 if (res) {
325 if (res != -EPERM) {
326 dev_err(&port->dev,
327 "%s - usb_submit_urb failed: %d\n",
328 __func__, res);
329 }
330 set_bit(index, &port->read_urbs_free);
331 return res;
332 }
333
334 return 0;
335}
336
337int usb_serial_generic_submit_read_urbs(struct usb_serial_port *port,
312 gfp_t mem_flags) 338 gfp_t mem_flags)
313{ 339{
314 int result; 340 int res;
341 int i;
315 342
316 result = usb_submit_urb(port->read_urb, mem_flags); 343 dbg("%s - port %d", __func__, port->number);
317 if (result && result != -EPERM) { 344
318 dev_err(&port->dev, "%s - error submitting urb: %d\n", 345 for (i = 0; i < ARRAY_SIZE(port->read_urbs); ++i) {
319 __func__, result); 346 res = usb_serial_generic_submit_read_urb(port, i, mem_flags);
347 if (res)
348 goto err;
320 } 349 }
321 return result; 350
351 return 0;
352err:
353 for (; i >= 0; --i)
354 usb_kill_urb(port->read_urbs[i]);
355
356 return res;
322} 357}
323EXPORT_SYMBOL_GPL(usb_serial_generic_submit_read_urb); 358EXPORT_SYMBOL_GPL(usb_serial_generic_submit_read_urbs);
324 359
325void usb_serial_generic_process_read_urb(struct urb *urb) 360void usb_serial_generic_process_read_urb(struct urb *urb)
326{ 361{
@@ -356,14 +391,19 @@ void usb_serial_generic_read_bulk_callback(struct urb *urb)
356{ 391{
357 struct usb_serial_port *port = urb->context; 392 struct usb_serial_port *port = urb->context;
358 unsigned char *data = urb->transfer_buffer; 393 unsigned char *data = urb->transfer_buffer;
359 int status = urb->status;
360 unsigned long flags; 394 unsigned long flags;
395 int i;
361 396
362 dbg("%s - port %d", __func__, port->number); 397 for (i = 0; i < ARRAY_SIZE(port->read_urbs); ++i) {
398 if (urb == port->read_urbs[i])
399 break;
400 }
401 set_bit(i, &port->read_urbs_free);
363 402
364 if (unlikely(status != 0)) { 403 dbg("%s - port %d, urb %d, len %d\n", __func__, port->number, i,
365 dbg("%s - nonzero read bulk status received: %d", 404 urb->actual_length);
366 __func__, status); 405 if (urb->status) {
406 dbg("%s - non-zero urb status: %d\n", __func__, urb->status);
367 return; 407 return;
368 } 408 }
369 409
@@ -376,7 +416,7 @@ void usb_serial_generic_read_bulk_callback(struct urb *urb)
376 port->throttled = port->throttle_req; 416 port->throttled = port->throttle_req;
377 if (!port->throttled) { 417 if (!port->throttled) {
378 spin_unlock_irqrestore(&port->lock, flags); 418 spin_unlock_irqrestore(&port->lock, flags);
379 usb_serial_generic_submit_read_urb(port, GFP_ATOMIC); 419 usb_serial_generic_submit_read_urb(port, i, GFP_ATOMIC);
380 } else 420 } else
381 spin_unlock_irqrestore(&port->lock, flags); 421 spin_unlock_irqrestore(&port->lock, flags);
382} 422}
@@ -443,7 +483,7 @@ void usb_serial_generic_unthrottle(struct tty_struct *tty)
443 spin_unlock_irq(&port->lock); 483 spin_unlock_irq(&port->lock);
444 484
445 if (was_throttled) 485 if (was_throttled)
446 usb_serial_generic_submit_read_urb(port, GFP_KERNEL); 486 usb_serial_generic_submit_read_urbs(port, GFP_KERNEL);
447} 487}
448EXPORT_SYMBOL_GPL(usb_serial_generic_unthrottle); 488EXPORT_SYMBOL_GPL(usb_serial_generic_unthrottle);
449 489
@@ -509,8 +549,9 @@ int usb_serial_generic_resume(struct usb_serial *serial)
509 if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) 549 if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags))
510 continue; 550 continue;
511 551
512 if (port->read_urb) { 552 if (port->bulk_in_size) {
513 r = usb_submit_urb(port->read_urb, GFP_NOIO); 553 r = usb_serial_generic_submit_read_urbs(port,
554 GFP_NOIO);
514 if (r < 0) 555 if (r < 0)
515 c++; 556 c++;
516 } 557 }
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
index 2ee807523f53..abd2ee2b2f99 100644
--- a/drivers/usb/serial/io_edgeport.c
+++ b/drivers/usb/serial/io_edgeport.c
@@ -610,7 +610,6 @@ static void edge_interrupt_callback(struct urb *urb)
610 610
611 /* we have pending bytes on the 611 /* we have pending bytes on the
612 bulk in pipe, send a request */ 612 bulk in pipe, send a request */
613 edge_serial->read_urb->dev = edge_serial->serial->dev;
614 result = usb_submit_urb(edge_serial->read_urb, GFP_ATOMIC); 613 result = usb_submit_urb(edge_serial->read_urb, GFP_ATOMIC);
615 if (result) { 614 if (result) {
616 dev_err(&edge_serial->serial->dev->dev, "%s - usb_submit_urb(read bulk) failed with result = %d\n", __func__, result); 615 dev_err(&edge_serial->serial->dev->dev, "%s - usb_submit_urb(read bulk) failed with result = %d\n", __func__, result);
@@ -711,7 +710,6 @@ static void edge_bulk_in_callback(struct urb *urb)
711 /* check to see if there's any more data for us to read */ 710 /* check to see if there's any more data for us to read */
712 if (edge_serial->rxBytesAvail > 0) { 711 if (edge_serial->rxBytesAvail > 0) {
713 dbg("%s - posting a read", __func__); 712 dbg("%s - posting a read", __func__);
714 edge_serial->read_urb->dev = edge_serial->serial->dev;
715 retval = usb_submit_urb(edge_serial->read_urb, GFP_ATOMIC); 713 retval = usb_submit_urb(edge_serial->read_urb, GFP_ATOMIC);
716 if (retval) { 714 if (retval) {
717 dev_err(&urb->dev->dev, 715 dev_err(&urb->dev->dev,
@@ -1330,7 +1328,6 @@ static void send_more_port_data(struct edgeport_serial *edge_serial,
1330 edge_port->txCredits -= count; 1328 edge_port->txCredits -= count;
1331 edge_port->icount.tx += count; 1329 edge_port->icount.tx += count;
1332 1330
1333 urb->dev = edge_serial->serial->dev;
1334 status = usb_submit_urb(urb, GFP_ATOMIC); 1331 status = usb_submit_urb(urb, GFP_ATOMIC);
1335 if (status) { 1332 if (status) {
1336 /* something went wrong */ 1333 /* something went wrong */
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index 0aac00afb5c8..e44d375edaad 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -15,13 +15,6 @@
15 * For questions or problems with this driver, contact Inside Out 15 * For questions or problems with this driver, contact Inside Out
16 * Networks technical support, or Peter Berger <pberger@brimson.com>, 16 * Networks technical support, or Peter Berger <pberger@brimson.com>,
17 * or Al Borchers <alborchers@steinerpoint.com>. 17 * or Al Borchers <alborchers@steinerpoint.com>.
18 *
19 * Version history:
20 *
21 * July 11, 2002 Removed 4 port device structure since all TI UMP
22 * chips have only 2 ports
23 * David Iacovelli (davidi@ionetworks.com)
24 *
25 */ 18 */
26 19
27#include <linux/kernel.h> 20#include <linux/kernel.h>
@@ -1777,12 +1770,11 @@ static void edge_bulk_in_callback(struct urb *urb)
1777exit: 1770exit:
1778 /* continue read unless stopped */ 1771 /* continue read unless stopped */
1779 spin_lock(&edge_port->ep_lock); 1772 spin_lock(&edge_port->ep_lock);
1780 if (edge_port->ep_read_urb_state == EDGE_READ_URB_RUNNING) { 1773 if (edge_port->ep_read_urb_state == EDGE_READ_URB_RUNNING)
1781 urb->dev = edge_port->port->serial->dev;
1782 retval = usb_submit_urb(urb, GFP_ATOMIC); 1774 retval = usb_submit_urb(urb, GFP_ATOMIC);
1783 } else if (edge_port->ep_read_urb_state == EDGE_READ_URB_STOPPING) { 1775 else if (edge_port->ep_read_urb_state == EDGE_READ_URB_STOPPING)
1784 edge_port->ep_read_urb_state = EDGE_READ_URB_STOPPED; 1776 edge_port->ep_read_urb_state = EDGE_READ_URB_STOPPED;
1785 } 1777
1786 spin_unlock(&edge_port->ep_lock); 1778 spin_unlock(&edge_port->ep_lock);
1787 if (retval) 1779 if (retval)
1788 dev_err(&urb->dev->dev, 1780 dev_err(&urb->dev->dev,
@@ -1959,9 +1951,7 @@ static int edge_open(struct tty_struct *tty, struct usb_serial_port *port)
1959 status = -EINVAL; 1951 status = -EINVAL;
1960 goto release_es_lock; 1952 goto release_es_lock;
1961 } 1953 }
1962 urb->complete = edge_interrupt_callback;
1963 urb->context = edge_serial; 1954 urb->context = edge_serial;
1964 urb->dev = dev;
1965 status = usb_submit_urb(urb, GFP_KERNEL); 1955 status = usb_submit_urb(urb, GFP_KERNEL);
1966 if (status) { 1956 if (status) {
1967 dev_err(&port->dev, 1957 dev_err(&port->dev,
@@ -1987,9 +1977,7 @@ static int edge_open(struct tty_struct *tty, struct usb_serial_port *port)
1987 goto unlink_int_urb; 1977 goto unlink_int_urb;
1988 } 1978 }
1989 edge_port->ep_read_urb_state = EDGE_READ_URB_RUNNING; 1979 edge_port->ep_read_urb_state = EDGE_READ_URB_RUNNING;
1990 urb->complete = edge_bulk_in_callback;
1991 urb->context = edge_port; 1980 urb->context = edge_port;
1992 urb->dev = dev;
1993 status = usb_submit_urb(urb, GFP_KERNEL); 1981 status = usb_submit_urb(urb, GFP_KERNEL);
1994 if (status) { 1982 if (status) {
1995 dev_err(&port->dev, 1983 dev_err(&port->dev,
@@ -2118,12 +2106,7 @@ static void edge_send(struct tty_struct *tty)
2118 port->write_urb->transfer_buffer); 2106 port->write_urb->transfer_buffer);
2119 2107
2120 /* set up our urb */ 2108 /* set up our urb */
2121 usb_fill_bulk_urb(port->write_urb, port->serial->dev, 2109 port->write_urb->transfer_buffer_length = count;
2122 usb_sndbulkpipe(port->serial->dev,
2123 port->bulk_out_endpointAddress),
2124 port->write_urb->transfer_buffer, count,
2125 edge_bulk_out_callback,
2126 port);
2127 2110
2128 /* send the data out the bulk port */ 2111 /* send the data out the bulk port */
2129 result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 2112 result = usb_submit_urb(port->write_urb, GFP_ATOMIC);
@@ -2267,9 +2250,6 @@ static int restart_read(struct edgeport_port *edge_port)
2267 2250
2268 if (edge_port->ep_read_urb_state == EDGE_READ_URB_STOPPED) { 2251 if (edge_port->ep_read_urb_state == EDGE_READ_URB_STOPPED) {
2269 urb = edge_port->port->read_urb; 2252 urb = edge_port->port->read_urb;
2270 urb->complete = edge_bulk_in_callback;
2271 urb->context = edge_port;
2272 urb->dev = edge_port->port->serial->dev;
2273 status = usb_submit_urb(urb, GFP_ATOMIC); 2253 status = usb_submit_urb(urb, GFP_ATOMIC);
2274 } 2254 }
2275 edge_port->ep_read_urb_state = EDGE_READ_URB_RUNNING; 2255 edge_port->ep_read_urb_state = EDGE_READ_URB_RUNNING;
diff --git a/drivers/usb/serial/ipaq.c b/drivers/usb/serial/ipaq.c
index 4735931b4c7b..36f5cbe90485 100644
--- a/drivers/usb/serial/ipaq.c
+++ b/drivers/usb/serial/ipaq.c
@@ -8,40 +8,6 @@
8 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or 9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version. 10 * (at your option) any later version.
11 *
12 * (12/12/2002) ganesh
13 * Added support for practically all devices supported by ActiveSync
14 * on Windows. Thanks to Wes Cilldhaire <billybobjoehenrybob@hotmail.com>.
15 *
16 * (26/11/2002) ganesh
17 * Added insmod options to specify product and vendor id.
18 * Use modprobe ipaq vendor=0xfoo product=0xbar
19 *
20 * (26/7/2002) ganesh
21 * Fixed up broken error handling in ipaq_open. Retry the "kickstart"
22 * packet much harder - this drastically reduces connection failures.
23 *
24 * (30/4/2002) ganesh
25 * Added support for the Casio EM500. Completely untested. Thanks
26 * to info from Nathan <wfilardo@fuse.net>
27 *
28 * (19/3/2002) ganesh
29 * Don't submit urbs while holding spinlocks. Not strictly necessary
30 * in 2.5.x.
31 *
32 * (8/3/2002) ganesh
33 * The ipaq sometimes emits a '\0' before the CLIENT string. At this
34 * point of time, the ppp ldisc is not yet attached to the tty, so
35 * n_tty echoes "^ " to the ipaq, which messes up the chat. In 2.5.6-pre2
36 * this causes a panic because echo_char() tries to sleep in interrupt
37 * context.
38 * The fix is to tell the upper layers that this is a raw device so that
39 * echoing is suppressed. Thanks to Lyle Lindholm for a detailed bug
40 * report.
41 *
42 * (25/2/2002) ganesh
43 * Added support for the HP Jornada 548 and 568. Completely untested.
44 * Thanks to info from Heath Robinson and Arieh Davidoff.
45 */ 11 */
46 12
47#include <linux/kernel.h> 13#include <linux/kernel.h>
diff --git a/drivers/usb/serial/ir-usb.c b/drivers/usb/serial/ir-usb.c
index ccbce4066d04..0c537da0d3cd 100644
--- a/drivers/usb/serial/ir-usb.c
+++ b/drivers/usb/serial/ir-usb.c
@@ -22,38 +22,6 @@
22 * 22 *
23 * See Documentation/usb/usb-serial.txt for more information on using this 23 * See Documentation/usb/usb-serial.txt for more information on using this
24 * driver 24 * driver
25 *
26 * 2008_Jun_02 Felipe Balbi <me@felipebalbi.com>
27 * Introduced common header to be used also in USB Gadget Framework.
28 * Still needs some other style fixes.
29 *
30 * 2007_Jun_21 Alan Cox <alan@lxorguk.ukuu.org.uk>
31 * Minimal cleanups for some of the driver problens and tty layer abuse.
32 * Still needs fixing to allow multiple dongles.
33 *
34 * 2002_Mar_07 greg kh
35 * moved some needed structures and #define values from the
36 * net/irda/irda-usb.h file into our file, as we don't want to depend on
37 * that codebase compiling correctly :)
38 *
39 * 2002_Jan_14 gb
40 * Added module parameter to force specific number of XBOFs.
41 * Added ir_xbof_change().
42 * Reorganized read_bulk_callback error handling.
43 * Switched from FILL_BULK_URB() to usb_fill_bulk_urb().
44 *
45 * 2001_Nov_08 greg kh
46 * Changed the irda_usb_find_class_desc() function based on comments and
47 * code from Martin Diehl.
48 *
49 * 2001_Nov_01 greg kh
50 * Added support for more IrDA USB devices.
51 * Added support for zero packet. Added buffer override paramater, so
52 * users can transfer larger packets at once if they wish. Both patches
53 * came from Dag Brattli <dag@obexcode.com>.
54 *
55 * 2001_Oct_07 greg kh
56 * initial version released.
57 */ 25 */
58 26
59#include <linux/kernel.h> 27#include <linux/kernel.h>
diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c
index 6aca631a407a..64d0ffd4440b 100644
--- a/drivers/usb/serial/iuu_phoenix.c
+++ b/drivers/usb/serial/iuu_phoenix.c
@@ -1168,15 +1168,14 @@ static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port)
1168 port->write_urb->transfer_buffer, 1, 1168 port->write_urb->transfer_buffer, 1,
1169 read_rxcmd_callback, port); 1169 read_rxcmd_callback, port);
1170 result = usb_submit_urb(port->write_urb, GFP_KERNEL); 1170 result = usb_submit_urb(port->write_urb, GFP_KERNEL);
1171
1172 if (result) { 1171 if (result) {
1173 dev_err(&port->dev, "%s - failed submitting read urb," 1172 dev_err(&port->dev, "%s - failed submitting read urb,"
1174 " error %d\n", __func__, result); 1173 " error %d\n", __func__, result);
1175 iuu_close(port); 1174 iuu_close(port);
1176 return -EPROTO;
1177 } else { 1175 } else {
1178 dbg("%s - rxcmd OK", __func__); 1176 dbg("%s - rxcmd OK", __func__);
1179 } 1177 }
1178
1180 return result; 1179 return result;
1181} 1180}
1182 1181
diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c
index a442352d7b61..bc8dc203e818 100644
--- a/drivers/usb/serial/keyspan.c
+++ b/drivers/usb/serial/keyspan.c
@@ -25,73 +25,6 @@
25 25
26 Tip 'o the hat to IBM (and previously Linuxcare :) for supporting 26 Tip 'o the hat to IBM (and previously Linuxcare :) for supporting
27 staff in their work on open source projects. 27 staff in their work on open source projects.
28
29 Change History
30
31 2003sep04 LPM (Keyspan) add support for new single port product USA19HS.
32 Improve setup message handling for all devices.
33
34 Wed Feb 19 22:00:00 PST 2003 (Jeffrey S. Laing <keyspan@jsl.com>)
35 Merged the current (1/31/03) Keyspan code with the current (2.4.21-pre4)
36 Linux source tree. The Linux tree lacked support for the 49WLC and
37 others. The Keyspan patches didn't work with the current kernel.
38
39 2003jan30 LPM add support for the 49WLC and MPR
40
41 Wed Apr 25 12:00:00 PST 2002 (Keyspan)
42 Started with Hugh Blemings' code dated Jan 17, 2002. All adapters
43 now supported (including QI and QW). Modified port open, port
44 close, and send setup() logic to fix various data and endpoint
45 synchronization bugs and device LED status bugs. Changed keyspan_
46 write_room() to accurately return transmit buffer availability.
47 Changed forwardingLength from 1 to 16 for all adapters.
48
49 Fri Oct 12 16:45:00 EST 2001
50 Preliminary USA-19QI and USA-28 support (both test OK for me, YMMV)
51
52 Wed Apr 25 12:00:00 PST 2002 (Keyspan)
53 Started with Hugh Blemings' code dated Jan 17, 2002. All adapters
54 now supported (including QI and QW). Modified port open, port
55 close, and send setup() logic to fix various data and endpoint
56 synchronization bugs and device LED status bugs. Changed keyspan_
57 write_room() to accurately return transmit buffer availability.
58 Changed forwardingLength from 1 to 16 for all adapters.
59
60 Fri Oct 12 16:45:00 EST 2001
61 Preliminary USA-19QI and USA-28 support (both test OK for me, YMMV)
62
63 Mon Oct 8 14:29:00 EST 2001 hugh
64 Fixed bug that prevented mulitport devices operating correctly
65 if they weren't the first unit attached.
66
67 Sat Oct 6 12:31:21 EST 2001 hugh
68 Added support for USA-28XA and -28XB, misc cleanups, break support
69 for usa26 based models thanks to David Gibson.
70
71 Thu May 31 11:56:42 PDT 2001 gkh
72 switched from using spinlock to a semaphore
73
74 (04/08/2001) gb
75 Identify version on module load.
76
77 (11/01/2000) Adam J. Richter
78 usb_device_id table support.
79
80 Tue Oct 10 23:15:33 EST 2000 Hugh
81 Merged Paul's changes with my USA-49W mods. Work in progress
82 still...
83
84 Wed Jul 19 14:00:42 EST 2000 gkh
85 Added module_init and module_exit functions to handle the fact that
86 this driver is a loadable module now.
87
88 Tue Jul 18 16:14:52 EST 2000 Hugh
89 Basic character input/output for USA-19 now mostly works,
90 fixed at 9600 baud for the moment.
91
92 Sat Jul 8 11:11:48 EST 2000 Hugh
93 First public release - nothing works except the firmware upload.
94 Tested on PPC and x86 architectures, seems to behave...
95*/ 28*/
96 29
97 30
@@ -397,7 +330,6 @@ static int keyspan_write(struct tty_struct *tty,
397 /* send the data out the bulk port */ 330 /* send the data out the bulk port */
398 this_urb->transfer_buffer_length = todo + dataOffset; 331 this_urb->transfer_buffer_length = todo + dataOffset;
399 332
400 this_urb->dev = port->serial->dev;
401 err = usb_submit_urb(this_urb, GFP_ATOMIC); 333 err = usb_submit_urb(this_urb, GFP_ATOMIC);
402 if (err != 0) 334 if (err != 0)
403 dbg("usb_submit_urb(write bulk) failed (%d)", err); 335 dbg("usb_submit_urb(write bulk) failed (%d)", err);
@@ -463,7 +395,6 @@ static void usa26_indat_callback(struct urb *urb)
463 tty_kref_put(tty); 395 tty_kref_put(tty);
464 396
465 /* Resubmit urb so we continue receiving */ 397 /* Resubmit urb so we continue receiving */
466 urb->dev = port->serial->dev;
467 err = usb_submit_urb(urb, GFP_ATOMIC); 398 err = usb_submit_urb(urb, GFP_ATOMIC);
468 if (err != 0) 399 if (err != 0)
469 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 400 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -559,7 +490,6 @@ static void usa26_instat_callback(struct urb *urb)
559 } 490 }
560 491
561 /* Resubmit urb so we continue receiving */ 492 /* Resubmit urb so we continue receiving */
562 urb->dev = serial->dev;
563 err = usb_submit_urb(urb, GFP_ATOMIC); 493 err = usb_submit_urb(urb, GFP_ATOMIC);
564 if (err != 0) 494 if (err != 0)
565 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 495 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -609,7 +539,6 @@ static void usa28_indat_callback(struct urb *urb)
609 tty_kref_put(tty); 539 tty_kref_put(tty);
610 540
611 /* Resubmit urb so we continue receiving */ 541 /* Resubmit urb so we continue receiving */
612 urb->dev = port->serial->dev;
613 err = usb_submit_urb(urb, GFP_ATOMIC); 542 err = usb_submit_urb(urb, GFP_ATOMIC);
614 if (err != 0) 543 if (err != 0)
615 dbg("%s - resubmit read urb failed. (%d)", 544 dbg("%s - resubmit read urb failed. (%d)",
@@ -694,7 +623,6 @@ static void usa28_instat_callback(struct urb *urb)
694 } 623 }
695 624
696 /* Resubmit urb so we continue receiving */ 625 /* Resubmit urb so we continue receiving */
697 urb->dev = serial->dev;
698 err = usb_submit_urb(urb, GFP_ATOMIC); 626 err = usb_submit_urb(urb, GFP_ATOMIC);
699 if (err != 0) 627 if (err != 0)
700 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 628 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -789,8 +717,6 @@ static void usa49_instat_callback(struct urb *urb)
789 } 717 }
790 718
791 /* Resubmit urb so we continue receiving */ 719 /* Resubmit urb so we continue receiving */
792 urb->dev = serial->dev;
793
794 err = usb_submit_urb(urb, GFP_ATOMIC); 720 err = usb_submit_urb(urb, GFP_ATOMIC);
795 if (err != 0) 721 if (err != 0)
796 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 722 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -848,7 +774,6 @@ static void usa49_indat_callback(struct urb *urb)
848 tty_kref_put(tty); 774 tty_kref_put(tty);
849 775
850 /* Resubmit urb so we continue receiving */ 776 /* Resubmit urb so we continue receiving */
851 urb->dev = port->serial->dev;
852 err = usb_submit_urb(urb, GFP_ATOMIC); 777 err = usb_submit_urb(urb, GFP_ATOMIC);
853 if (err != 0) 778 if (err != 0)
854 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 779 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -919,8 +844,6 @@ static void usa49wg_indat_callback(struct urb *urb)
919 } 844 }
920 845
921 /* Resubmit urb so we continue receiving */ 846 /* Resubmit urb so we continue receiving */
922 urb->dev = serial->dev;
923
924 err = usb_submit_urb(urb, GFP_ATOMIC); 847 err = usb_submit_urb(urb, GFP_ATOMIC);
925 if (err != 0) 848 if (err != 0)
926 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 849 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -996,7 +919,6 @@ static void usa90_indat_callback(struct urb *urb)
996 } 919 }
997 920
998 /* Resubmit urb so we continue receiving */ 921 /* Resubmit urb so we continue receiving */
999 urb->dev = port->serial->dev;
1000 err = usb_submit_urb(urb, GFP_ATOMIC); 922 err = usb_submit_urb(urb, GFP_ATOMIC);
1001 if (err != 0) 923 if (err != 0)
1002 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 924 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -1047,7 +969,6 @@ static void usa90_instat_callback(struct urb *urb)
1047 } 969 }
1048 970
1049 /* Resubmit urb so we continue receiving */ 971 /* Resubmit urb so we continue receiving */
1050 urb->dev = serial->dev;
1051 err = usb_submit_urb(urb, GFP_ATOMIC); 972 err = usb_submit_urb(urb, GFP_ATOMIC);
1052 if (err != 0) 973 if (err != 0)
1053 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 974 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -1123,7 +1044,6 @@ static void usa67_instat_callback(struct urb *urb)
1123 } 1044 }
1124 1045
1125 /* Resubmit urb so we continue receiving */ 1046 /* Resubmit urb so we continue receiving */
1126 urb->dev = serial->dev;
1127 err = usb_submit_urb(urb, GFP_ATOMIC); 1047 err = usb_submit_urb(urb, GFP_ATOMIC);
1128 if (err != 0) 1048 if (err != 0)
1129 dbg("%s - resubmit read urb failed. (%d)", __func__, err); 1049 dbg("%s - resubmit read urb failed. (%d)", __func__, err);
@@ -1223,7 +1143,6 @@ static int keyspan_open(struct tty_struct *tty, struct usb_serial_port *port)
1223 urb = p_priv->in_urbs[i]; 1143 urb = p_priv->in_urbs[i];
1224 if (urb == NULL) 1144 if (urb == NULL)
1225 continue; 1145 continue;
1226 urb->dev = serial->dev;
1227 1146
1228 /* make sure endpoint data toggle is synchronized 1147 /* make sure endpoint data toggle is synchronized
1229 with the device */ 1148 with the device */
@@ -1239,7 +1158,6 @@ static int keyspan_open(struct tty_struct *tty, struct usb_serial_port *port)
1239 urb = p_priv->out_urbs[i]; 1158 urb = p_priv->out_urbs[i];
1240 if (urb == NULL) 1159 if (urb == NULL)
1241 continue; 1160 continue;
1242 urb->dev = serial->dev;
1243 /* usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), 1161 /* usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1244 usb_pipeout(urb->pipe), 0); */ 1162 usb_pipeout(urb->pipe), 0); */
1245 } 1163 }
@@ -1956,7 +1874,6 @@ static int keyspan_usa26_send_setup(struct usb_serial *serial,
1956 /* send the data out the device on control endpoint */ 1874 /* send the data out the device on control endpoint */
1957 this_urb->transfer_buffer_length = sizeof(msg); 1875 this_urb->transfer_buffer_length = sizeof(msg);
1958 1876
1959 this_urb->dev = serial->dev;
1960 err = usb_submit_urb(this_urb, GFP_ATOMIC); 1877 err = usb_submit_urb(this_urb, GFP_ATOMIC);
1961 if (err != 0) 1878 if (err != 0)
1962 dbg("%s - usb_submit_urb(setup) failed (%d)", __func__, err); 1879 dbg("%s - usb_submit_urb(setup) failed (%d)", __func__, err);
@@ -2084,7 +2001,6 @@ static int keyspan_usa28_send_setup(struct usb_serial *serial,
2084 /* send the data out the device on control endpoint */ 2001 /* send the data out the device on control endpoint */
2085 this_urb->transfer_buffer_length = sizeof(msg); 2002 this_urb->transfer_buffer_length = sizeof(msg);
2086 2003
2087 this_urb->dev = serial->dev;
2088 err = usb_submit_urb(this_urb, GFP_ATOMIC); 2004 err = usb_submit_urb(this_urb, GFP_ATOMIC);
2089 if (err != 0) 2005 if (err != 0)
2090 dbg("%s - usb_submit_urb(setup) failed", __func__); 2006 dbg("%s - usb_submit_urb(setup) failed", __func__);
@@ -2271,8 +2187,6 @@ static int keyspan_usa49_send_setup(struct usb_serial *serial,
2271 2187
2272 /* send the data out the device on control endpoint */ 2188 /* send the data out the device on control endpoint */
2273 this_urb->transfer_buffer_length = sizeof(msg); 2189 this_urb->transfer_buffer_length = sizeof(msg);
2274
2275 this_urb->dev = serial->dev;
2276 } 2190 }
2277 err = usb_submit_urb(this_urb, GFP_ATOMIC); 2191 err = usb_submit_urb(this_urb, GFP_ATOMIC);
2278 if (err != 0) 2192 if (err != 0)
@@ -2415,7 +2329,6 @@ static int keyspan_usa90_send_setup(struct usb_serial *serial,
2415 /* send the data out the device on control endpoint */ 2329 /* send the data out the device on control endpoint */
2416 this_urb->transfer_buffer_length = sizeof(msg); 2330 this_urb->transfer_buffer_length = sizeof(msg);
2417 2331
2418 this_urb->dev = serial->dev;
2419 err = usb_submit_urb(this_urb, GFP_ATOMIC); 2332 err = usb_submit_urb(this_urb, GFP_ATOMIC);
2420 if (err != 0) 2333 if (err != 0)
2421 dbg("%s - usb_submit_urb(setup) failed (%d)", __func__, err); 2334 dbg("%s - usb_submit_urb(setup) failed (%d)", __func__, err);
@@ -2561,7 +2474,6 @@ static int keyspan_usa67_send_setup(struct usb_serial *serial,
2561 2474
2562 /* send the data out the device on control endpoint */ 2475 /* send the data out the device on control endpoint */
2563 this_urb->transfer_buffer_length = sizeof(msg); 2476 this_urb->transfer_buffer_length = sizeof(msg);
2564 this_urb->dev = serial->dev;
2565 2477
2566 err = usb_submit_urb(this_urb, GFP_ATOMIC); 2478 err = usb_submit_urb(this_urb, GFP_ATOMIC);
2567 if (err != 0) 2479 if (err != 0)
@@ -2650,14 +2562,12 @@ static int keyspan_startup(struct usb_serial *serial)
2650 keyspan_setup_urbs(serial); 2562 keyspan_setup_urbs(serial);
2651 2563
2652 if (s_priv->instat_urb != NULL) { 2564 if (s_priv->instat_urb != NULL) {
2653 s_priv->instat_urb->dev = serial->dev;
2654 err = usb_submit_urb(s_priv->instat_urb, GFP_KERNEL); 2565 err = usb_submit_urb(s_priv->instat_urb, GFP_KERNEL);
2655 if (err != 0) 2566 if (err != 0)
2656 dbg("%s - submit instat urb failed %d", __func__, 2567 dbg("%s - submit instat urb failed %d", __func__,
2657 err); 2568 err);
2658 } 2569 }
2659 if (s_priv->indat_urb != NULL) { 2570 if (s_priv->indat_urb != NULL) {
2660 s_priv->indat_urb->dev = serial->dev;
2661 err = usb_submit_urb(s_priv->indat_urb, GFP_KERNEL); 2571 err = usb_submit_urb(s_priv->indat_urb, GFP_KERNEL);
2662 if (err != 0) 2572 if (err != 0)
2663 dbg("%s - submit indat urb failed %d", __func__, 2573 dbg("%s - submit indat urb failed %d", __func__,
diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c
index d5c0c6ab4966..a40615674a68 100644
--- a/drivers/usb/serial/keyspan_pda.c
+++ b/drivers/usb/serial/keyspan_pda.c
@@ -12,59 +12,6 @@
12 * 12 *
13 * See Documentation/usb/usb-serial.txt for more information on using this 13 * See Documentation/usb/usb-serial.txt for more information on using this
14 * driver 14 * driver
15 *
16 * (09/07/2001) gkh
17 * cleaned up the Xircom support. Added ids for Entregra device which is
18 * the same as the Xircom device. Enabled the code to be compiled for
19 * either Xircom or Keyspan devices.
20 *
21 * (08/11/2001) Cristian M. Craciunescu
22 * support for Xircom PGSDB9
23 *
24 * (05/31/2001) gkh
25 * switched from using spinlock to a semaphore, which fixes lots of
26 * problems.
27 *
28 * (04/08/2001) gb
29 * Identify version on module load.
30 *
31 * (11/01/2000) Adam J. Richter
32 * usb_device_id table support
33 *
34 * (10/05/2000) gkh
35 * Fixed bug with urb->dev not being set properly, now that the usb
36 * core needs it.
37 *
38 * (08/28/2000) gkh
39 * Added locks for SMP safeness.
40 * Fixed MOD_INC and MOD_DEC logic and the ability to open a port more
41 * than once.
42 *
43 * (07/20/2000) borchers
44 * - keyspan_pda_write no longer sleeps if it is called on interrupt time;
45 * PPP and the line discipline with stty echo on can call write on
46 * interrupt time and this would cause an oops if write slept
47 * - if keyspan_pda_write is in an interrupt, it will not call
48 * usb_control_msg (which sleeps) to query the room in the device
49 * buffer, it simply uses the current room value it has
50 * - if the urb is busy or if it is throttled keyspan_pda_write just
51 * returns 0, rather than sleeping to wait for this to change; the
52 * write_chan code in n_tty.c will sleep if needed before calling
53 * keyspan_pda_write again
54 * - if the device needs to be unthrottled, write now queues up the
55 * call to usb_control_msg (which sleeps) to unthrottle the device
56 * - the wakeups from keyspan_pda_write_bulk_callback are queued rather
57 * than done directly from the callback to avoid the race in write_chan
58 * - keyspan_pda_chars_in_buffer also indicates its buffer is full if the
59 * urb status is -EINPROGRESS, meaning it cannot write at the moment
60 *
61 * (07/19/2000) gkh
62 * Added module_init and module_exit functions to handle the fact that this
63 * driver is a loadable module now.
64 *
65 * (03/26/2000) gkh
66 * Split driver up into device specific pieces.
67 *
68 */ 15 */
69 16
70 17
@@ -290,7 +237,6 @@ static void keyspan_pda_rx_unthrottle(struct tty_struct *tty)
290 struct usb_serial_port *port = tty->driver_data; 237 struct usb_serial_port *port = tty->driver_data;
291 /* just restart the receive interrupt URB */ 238 /* just restart the receive interrupt URB */
292 dbg("keyspan_pda_rx_unthrottle port %d", port->number); 239 dbg("keyspan_pda_rx_unthrottle port %d", port->number);
293 port->interrupt_in_urb->dev = port->serial->dev;
294 if (usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL)) 240 if (usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL))
295 dbg(" usb_submit_urb(read urb) failed"); 241 dbg(" usb_submit_urb(read urb) failed");
296} 242}
@@ -532,11 +478,11 @@ static int keyspan_pda_write(struct tty_struct *tty,
532 the device is full (wait until it says there is room) 478 the device is full (wait until it says there is room)
533 */ 479 */
534 spin_lock_bh(&port->lock); 480 spin_lock_bh(&port->lock);
535 if (port->write_urb_busy || priv->tx_throttled) { 481 if (!test_bit(0, &port->write_urbs_free) || priv->tx_throttled) {
536 spin_unlock_bh(&port->lock); 482 spin_unlock_bh(&port->lock);
537 return 0; 483 return 0;
538 } 484 }
539 port->write_urb_busy = 1; 485 clear_bit(0, &port->write_urbs_free);
540 spin_unlock_bh(&port->lock); 486 spin_unlock_bh(&port->lock);
541 487
542 /* At this point the URB is in our control, nobody else can submit it 488 /* At this point the URB is in our control, nobody else can submit it
@@ -598,7 +544,6 @@ static int keyspan_pda_write(struct tty_struct *tty,
598 544
599 priv->tx_room -= count; 545 priv->tx_room -= count;
600 546
601 port->write_urb->dev = port->serial->dev;
602 rc = usb_submit_urb(port->write_urb, GFP_ATOMIC); 547 rc = usb_submit_urb(port->write_urb, GFP_ATOMIC);
603 if (rc) { 548 if (rc) {
604 dbg(" usb_submit_urb(write bulk) failed"); 549 dbg(" usb_submit_urb(write bulk) failed");
@@ -618,7 +563,7 @@ static int keyspan_pda_write(struct tty_struct *tty,
618 rc = count; 563 rc = count;
619exit: 564exit:
620 if (rc < 0) 565 if (rc < 0)
621 port->write_urb_busy = 0; 566 set_bit(0, &port->write_urbs_free);
622 return rc; 567 return rc;
623} 568}
624 569
@@ -628,7 +573,7 @@ static void keyspan_pda_write_bulk_callback(struct urb *urb)
628 struct usb_serial_port *port = urb->context; 573 struct usb_serial_port *port = urb->context;
629 struct keyspan_pda_private *priv; 574 struct keyspan_pda_private *priv;
630 575
631 port->write_urb_busy = 0; 576 set_bit(0, &port->write_urbs_free);
632 priv = usb_get_serial_port_data(port); 577 priv = usb_get_serial_port_data(port);
633 578
634 /* queue up a wakeup at scheduler time */ 579 /* queue up a wakeup at scheduler time */
@@ -661,7 +606,7 @@ static int keyspan_pda_chars_in_buffer(struct tty_struct *tty)
661 n_tty.c:normal_poll() ) that we're not writeable. */ 606 n_tty.c:normal_poll() ) that we're not writeable. */
662 607
663 spin_lock_irqsave(&port->lock, flags); 608 spin_lock_irqsave(&port->lock, flags);
664 if (port->write_urb_busy || priv->tx_throttled) 609 if (!test_bit(0, &port->write_urbs_free) || priv->tx_throttled)
665 ret = 256; 610 ret = 256;
666 spin_unlock_irqrestore(&port->lock, flags); 611 spin_unlock_irqrestore(&port->lock, flags);
667 return ret; 612 return ret;
@@ -717,7 +662,6 @@ static int keyspan_pda_open(struct tty_struct *tty,
717 priv->tx_throttled = *room ? 0 : 1; 662 priv->tx_throttled = *room ? 0 : 1;
718 663
719 /*Start reading from the device*/ 664 /*Start reading from the device*/
720 port->interrupt_in_urb->dev = serial->dev;
721 rc = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 665 rc = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
722 if (rc) { 666 if (rc) {
723 dbg("%s - usb_submit_urb(read int) failed", __func__); 667 dbg("%s - usb_submit_urb(read int) failed", __func__);
diff --git a/drivers/usb/serial/kobil_sct.c b/drivers/usb/serial/kobil_sct.c
index ddd146300ddb..5d3beeeb5fd9 100644
--- a/drivers/usb/serial/kobil_sct.c
+++ b/drivers/usb/serial/kobil_sct.c
@@ -20,18 +20,6 @@
20 * 20 *
21 * Supported readers: USB TWIN, KAAN Standard Plus and SecOVID Reader Plus 21 * Supported readers: USB TWIN, KAAN Standard Plus and SecOVID Reader Plus
22 * (Adapter K), B1 Professional and KAAN Professional (Adapter B) 22 * (Adapter K), B1 Professional and KAAN Professional (Adapter B)
23 *
24 * (21/05/2004) tw
25 * Fix bug with P'n'P readers
26 *
27 * (28/05/2003) tw
28 * Add support for KAAN SIM
29 *
30 * (12/09/2002) tw
31 * Adapted to 2.5.
32 *
33 * (11/08/2002) tw
34 * Initial version.
35 */ 23 */
36 24
37 25
@@ -231,9 +219,6 @@ static int kobil_open(struct tty_struct *tty, struct usb_serial_port *port)
231 dbg("%s - port %d", __func__, port->number); 219 dbg("%s - port %d", __func__, port->number);
232 priv = usb_get_serial_port_data(port); 220 priv = usb_get_serial_port_data(port);
233 221
234 /* someone sets the dev to 0 if the close method has been called */
235 port->interrupt_in_urb->dev = port->serial->dev;
236
237 /* allocate memory for transfer buffer */ 222 /* allocate memory for transfer buffer */
238 transfer_buffer = kzalloc(transfer_buffer_length, GFP_KERNEL); 223 transfer_buffer = kzalloc(transfer_buffer_length, GFP_KERNEL);
239 if (!transfer_buffer) 224 if (!transfer_buffer)
@@ -393,8 +378,6 @@ static void kobil_read_int_callback(struct urb *urb)
393 tty_flip_buffer_push(tty); 378 tty_flip_buffer_push(tty);
394 } 379 }
395 tty_kref_put(tty); 380 tty_kref_put(tty);
396 /* someone sets the dev to 0 if the close method has been called */
397 port->interrupt_in_urb->dev = port->serial->dev;
398 381
399 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC); 382 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC);
400 dbg("%s - port %d Send read URB returns: %i", 383 dbg("%s - port %d Send read URB returns: %i",
@@ -475,17 +458,9 @@ static int kobil_write(struct tty_struct *tty, struct usb_serial_port *port,
475 priv->filled = 0; 458 priv->filled = 0;
476 priv->cur_pos = 0; 459 priv->cur_pos = 0;
477 460
478 /* someone sets the dev to 0 if the close method
479 has been called */
480 port->interrupt_in_urb->dev = port->serial->dev;
481
482 /* start reading (except TWIN and KAAN SIM) */ 461 /* start reading (except TWIN and KAAN SIM) */
483 if (priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID || 462 if (priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID ||
484 priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID) { 463 priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID) {
485 /* someone sets the dev to 0 if the close method has
486 been called */
487 port->interrupt_in_urb->dev = port->serial->dev;
488
489 result = usb_submit_urb(port->interrupt_in_urb, 464 result = usb_submit_urb(port->interrupt_in_urb,
490 GFP_NOIO); 465 GFP_NOIO);
491 dbg("%s - port %d Send read URB returns: %i", 466 dbg("%s - port %d Send read URB returns: %i",
diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c
index ba0d28727ccb..a975bb80303f 100644
--- a/drivers/usb/serial/mct_u232.c
+++ b/drivers/usb/serial/mct_u232.c
@@ -19,50 +19,6 @@
19 * DTR/RTS signal handling may be incomplete or incorrect. I have mainly 19 * DTR/RTS signal handling may be incomplete or incorrect. I have mainly
20 * implemented what I have seen with SniffUSB or found in belkin_sa.c. 20 * implemented what I have seen with SniffUSB or found in belkin_sa.c.
21 * For further TODOs check also belkin_sa.c. 21 * For further TODOs check also belkin_sa.c.
22 *
23 * TEST STATUS:
24 * Basic tests have been performed with minicom/zmodem transfers and
25 * modem dialing under Linux 2.4.0-test10 (for me it works fine).
26 *
27 * 04-Nov-2003 Bill Marr <marr at flex dot com>
28 * - Mimic Windows driver by sending 2 USB 'device request' messages
29 * following normal 'baud rate change' message. This allows data to be
30 * transmitted to RS-232 devices which don't assert the 'CTS' signal.
31 *
32 * 10-Nov-2001 Wolfgang Grandegger
33 * - Fixed an endianess problem with the baudrate selection for PowerPC.
34 *
35 * 06-Dec-2001 Martin Hamilton <martinh@gnu.org>
36 * - Added support for the Belkin F5U109 DB9 adaptor
37 *
38 * 30-May-2001 Greg Kroah-Hartman
39 * - switched from using spinlock to a semaphore, which fixes lots of
40 * problems.
41 *
42 * 04-May-2001 Stelian Pop
43 * - Set the maximum bulk output size for Sitecom U232-P25 model to 16 bytes
44 * instead of the device reported 32 (using 32 bytes causes many data
45 * loss, Windows driver uses 16 too).
46 *
47 * 02-May-2001 Stelian Pop
48 * - Fixed the baud calculation for Sitecom U232-P25 model
49 *
50 * 08-Apr-2001 gb
51 * - Identify version on module load.
52 *
53 * 06-Jan-2001 Cornel Ciocirlan
54 * - Added support for Sitecom U232-P25 model (Product Id 0x0230)
55 * - Added support for D-Link DU-H3SP USB BAY (Product Id 0x0200)
56 *
57 * 29-Nov-2000 Greg Kroah-Hartman
58 * - Added device id table to fit with 2.4.0-test11 structure.
59 * - took out DEAL_WITH_TWO_INT_IN_ENDPOINTS #define as it's not needed
60 * (lots of things will change if/when the usb-serial core changes to
61 * handle these issues.
62 *
63 * 27-Nov-2000 Wolfgang Grandegge
64 * A version for kernel 2.4.0-test10 released to the Linux community
65 * (via linux-usb-devel).
66 */ 22 */
67 23
68#include <linux/kernel.h> 24#include <linux/kernel.h>
@@ -526,7 +482,6 @@ static int mct_u232_open(struct tty_struct *tty, struct usb_serial_port *port)
526 mct_u232_msr_to_state(&priv->control_state, priv->last_msr); 482 mct_u232_msr_to_state(&priv->control_state, priv->last_msr);
527 spin_unlock_irqrestore(&priv->lock, flags); 483 spin_unlock_irqrestore(&priv->lock, flags);
528 484
529 port->read_urb->dev = port->serial->dev;
530 retval = usb_submit_urb(port->read_urb, GFP_KERNEL); 485 retval = usb_submit_urb(port->read_urb, GFP_KERNEL);
531 if (retval) { 486 if (retval) {
532 dev_err(&port->dev, 487 dev_err(&port->dev,
@@ -535,7 +490,6 @@ static int mct_u232_open(struct tty_struct *tty, struct usb_serial_port *port)
535 goto error; 490 goto error;
536 } 491 }
537 492
538 port->interrupt_in_urb->dev = port->serial->dev;
539 retval = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 493 retval = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
540 if (retval) { 494 if (retval) {
541 usb_kill_urb(port->read_urb); 495 usb_kill_urb(port->read_urb);
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c
index 3524a105d042..19d112f51b97 100644
--- a/drivers/usb/serial/mos7720.c
+++ b/drivers/usb/serial/mos7720.c
@@ -939,14 +939,7 @@ static void mos7720_bulk_in_callback(struct urb *urb)
939 } 939 }
940 tty_kref_put(tty); 940 tty_kref_put(tty);
941 941
942 if (!port->read_urb) {
943 dbg("URB KILLED !!!");
944 return;
945 }
946
947 if (port->read_urb->status != -EINPROGRESS) { 942 if (port->read_urb->status != -EINPROGRESS) {
948 port->read_urb->dev = port->serial->dev;
949
950 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC); 943 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC);
951 if (retval) 944 if (retval)
952 dbg("usb_submit_urb(read bulk) failed, retval = %d", 945 dbg("usb_submit_urb(read bulk) failed, retval = %d",
@@ -1014,7 +1007,6 @@ static int mos77xx_calc_num_ports(struct usb_serial *serial)
1014static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port) 1007static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port)
1015{ 1008{
1016 struct usb_serial *serial; 1009 struct usb_serial *serial;
1017 struct usb_serial_port *port0;
1018 struct urb *urb; 1010 struct urb *urb;
1019 struct moschip_port *mos7720_port; 1011 struct moschip_port *mos7720_port;
1020 int response; 1012 int response;
@@ -1029,8 +1021,6 @@ static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port)
1029 if (mos7720_port == NULL) 1021 if (mos7720_port == NULL)
1030 return -ENODEV; 1022 return -ENODEV;
1031 1023
1032 port0 = serial->port[0];
1033
1034 usb_clear_halt(serial->dev, port->write_urb->pipe); 1024 usb_clear_halt(serial->dev, port->write_urb->pipe);
1035 usb_clear_halt(serial->dev, port->read_urb->pipe); 1025 usb_clear_halt(serial->dev, port->read_urb->pipe);
1036 1026
@@ -1735,8 +1725,6 @@ static void change_port_settings(struct tty_struct *tty,
1735 write_mos_reg(serial, port_number, IER, 0x0c); 1725 write_mos_reg(serial, port_number, IER, 0x0c);
1736 1726
1737 if (port->read_urb->status != -EINPROGRESS) { 1727 if (port->read_urb->status != -EINPROGRESS) {
1738 port->read_urb->dev = serial->dev;
1739
1740 status = usb_submit_urb(port->read_urb, GFP_ATOMIC); 1728 status = usb_submit_urb(port->read_urb, GFP_ATOMIC);
1741 if (status) 1729 if (status)
1742 dbg("usb_submit_urb(read bulk) failed, status = %d", 1730 dbg("usb_submit_urb(read bulk) failed, status = %d",
@@ -1786,13 +1774,7 @@ static void mos7720_set_termios(struct tty_struct *tty,
1786 /* change the port settings to the new ones specified */ 1774 /* change the port settings to the new ones specified */
1787 change_port_settings(tty, mos7720_port, old_termios); 1775 change_port_settings(tty, mos7720_port, old_termios);
1788 1776
1789 if (!port->read_urb) {
1790 dbg("%s", "URB KILLED !!!!!");
1791 return;
1792 }
1793
1794 if (port->read_urb->status != -EINPROGRESS) { 1777 if (port->read_urb->status != -EINPROGRESS) {
1795 port->read_urb->dev = serial->dev;
1796 status = usb_submit_urb(port->read_urb, GFP_ATOMIC); 1778 status = usb_submit_urb(port->read_urb, GFP_ATOMIC);
1797 if (status) 1779 if (status)
1798 dbg("usb_submit_urb(read bulk) failed, status = %d", 1780 dbg("usb_submit_urb(read bulk) failed, status = %d",
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index c72abd524983..55cfd6265b98 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -792,8 +792,6 @@ static void mos7840_bulk_in_callback(struct urb *urb)
792 } 792 }
793 793
794 794
795 mos7840_port->read_urb->dev = serial->dev;
796
797 mos7840_port->read_urb_busy = true; 795 mos7840_port->read_urb_busy = true;
798 retval = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC); 796 retval = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC);
799 797
@@ -2058,7 +2056,6 @@ static void mos7840_change_port_settings(struct tty_struct *tty,
2058 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data); 2056 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
2059 2057
2060 if (mos7840_port->read_urb_busy == false) { 2058 if (mos7840_port->read_urb_busy == false) {
2061 mos7840_port->read_urb->dev = serial->dev;
2062 mos7840_port->read_urb_busy = true; 2059 mos7840_port->read_urb_busy = true;
2063 status = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC); 2060 status = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC);
2064 if (status) { 2061 if (status) {
@@ -2130,7 +2127,6 @@ static void mos7840_set_termios(struct tty_struct *tty,
2130 } 2127 }
2131 2128
2132 if (mos7840_port->read_urb_busy == false) { 2129 if (mos7840_port->read_urb_busy == false) {
2133 mos7840_port->read_urb->dev = serial->dev;
2134 mos7840_port->read_urb_busy = true; 2130 mos7840_port->read_urb_busy = true;
2135 status = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC); 2131 status = usb_submit_urb(mos7840_port->read_urb, GFP_ATOMIC);
2136 if (status) { 2132 if (status) {
diff --git a/drivers/usb/serial/omninet.c b/drivers/usb/serial/omninet.c
index 60f38d5e64fc..45a8c55881d3 100644
--- a/drivers/usb/serial/omninet.c
+++ b/drivers/usb/serial/omninet.c
@@ -9,31 +9,6 @@
9 * driver 9 * driver
10 * 10 *
11 * Please report both successes and troubles to the author at omninet@kroah.com 11 * Please report both successes and troubles to the author at omninet@kroah.com
12 *
13 * (05/30/2001) gkh
14 * switched from using spinlock to a semaphore, which fixes lots of
15 * problems.
16 *
17 * (04/08/2001) gb
18 * Identify version on module load.
19 *
20 * (11/01/2000) Adam J. Richter
21 * usb_device_id table support
22 *
23 * (10/05/2000) gkh
24 * Fixed bug with urb->dev not being set properly, now that the usb
25 * core needs it.
26 *
27 * (08/28/2000) gkh
28 * Added locks for SMP safeness.
29 * Fixed MOD_INC and MOD_DEC logic and the ability to open a port more
30 * than once.
31 * Fixed potential race in omninet_write_bulk_callback
32 *
33 * (07/19/2000) gkh
34 * Added module_init and module_exit functions to handle the fact that this
35 * driver is a loadable module now.
36 *
37 */ 12 */
38 13
39#include <linux/kernel.h> 14#include <linux/kernel.h>
@@ -44,7 +19,6 @@
44#include <linux/tty_driver.h> 19#include <linux/tty_driver.h>
45#include <linux/tty_flip.h> 20#include <linux/tty_flip.h>
46#include <linux/module.h> 21#include <linux/module.h>
47#include <linux/spinlock.h>
48#include <linux/uaccess.h> 22#include <linux/uaccess.h>
49#include <linux/usb.h> 23#include <linux/usb.h>
50#include <linux/usb/serial.h> 24#include <linux/usb/serial.h>
@@ -174,12 +148,6 @@ static int omninet_open(struct tty_struct *tty, struct usb_serial_port *port)
174 tty_port_tty_set(&wport->port, tty); 148 tty_port_tty_set(&wport->port, tty);
175 149
176 /* Start reading from the device */ 150 /* Start reading from the device */
177 usb_fill_bulk_urb(port->read_urb, serial->dev,
178 usb_rcvbulkpipe(serial->dev,
179 port->bulk_in_endpointAddress),
180 port->read_urb->transfer_buffer,
181 port->read_urb->transfer_buffer_length,
182 omninet_read_bulk_callback, port);
183 result = usb_submit_urb(port->read_urb, GFP_KERNEL); 151 result = usb_submit_urb(port->read_urb, GFP_KERNEL);
184 if (result) 152 if (result)
185 dev_err(&port->dev, 153 dev_err(&port->dev,
@@ -236,11 +204,6 @@ static void omninet_read_bulk_callback(struct urb *urb)
236 } 204 }
237 205
238 /* Continue trying to always read */ 206 /* Continue trying to always read */
239 usb_fill_bulk_urb(urb, port->serial->dev,
240 usb_rcvbulkpipe(port->serial->dev,
241 port->bulk_in_endpointAddress),
242 urb->transfer_buffer, urb->transfer_buffer_length,
243 omninet_read_bulk_callback, port);
244 result = usb_submit_urb(urb, GFP_ATOMIC); 207 result = usb_submit_urb(urb, GFP_ATOMIC);
245 if (result) 208 if (result)
246 dev_err(&port->dev, 209 dev_err(&port->dev,
@@ -267,14 +230,10 @@ static int omninet_write(struct tty_struct *tty, struct usb_serial_port *port,
267 return 0; 230 return 0;
268 } 231 }
269 232
270 spin_lock_bh(&wport->lock); 233 if (!test_and_clear_bit(0, &port->write_urbs_free)) {
271 if (wport->write_urb_busy) {
272 spin_unlock_bh(&wport->lock);
273 dbg("%s - already writing", __func__); 234 dbg("%s - already writing", __func__);
274 return 0; 235 return 0;
275 } 236 }
276 wport->write_urb_busy = 1;
277 spin_unlock_bh(&wport->lock);
278 237
279 count = (count > OMNINET_BULKOUTSIZE) ? OMNINET_BULKOUTSIZE : count; 238 count = (count > OMNINET_BULKOUTSIZE) ? OMNINET_BULKOUTSIZE : count;
280 239
@@ -292,10 +251,9 @@ static int omninet_write(struct tty_struct *tty, struct usb_serial_port *port,
292 /* send the data out the bulk port, always 64 bytes */ 251 /* send the data out the bulk port, always 64 bytes */
293 wport->write_urb->transfer_buffer_length = 64; 252 wport->write_urb->transfer_buffer_length = 64;
294 253
295 wport->write_urb->dev = serial->dev;
296 result = usb_submit_urb(wport->write_urb, GFP_ATOMIC); 254 result = usb_submit_urb(wport->write_urb, GFP_ATOMIC);
297 if (result) { 255 if (result) {
298 wport->write_urb_busy = 0; 256 set_bit(0, &wport->write_urbs_free);
299 dev_err(&port->dev, 257 dev_err(&port->dev,
300 "%s - failed submitting write urb, error %d\n", 258 "%s - failed submitting write urb, error %d\n",
301 __func__, result); 259 __func__, result);
@@ -314,8 +272,7 @@ static int omninet_write_room(struct tty_struct *tty)
314 272
315 int room = 0; /* Default: no room */ 273 int room = 0; /* Default: no room */
316 274
317 /* FIXME: no consistent locking for write_urb_busy */ 275 if (test_bit(0, &wport->write_urbs_free))
318 if (wport->write_urb_busy)
319 room = wport->bulk_out_size - OMNINET_HEADERLEN; 276 room = wport->bulk_out_size - OMNINET_HEADERLEN;
320 277
321 dbg("%s - returns %d", __func__, room); 278 dbg("%s - returns %d", __func__, room);
@@ -332,7 +289,7 @@ static void omninet_write_bulk_callback(struct urb *urb)
332 289
333 dbg("%s - port %0x", __func__, port->number); 290 dbg("%s - port %0x", __func__, port->number);
334 291
335 port->write_urb_busy = 0; 292 set_bit(0, &port->write_urbs_free);
336 if (status) { 293 if (status) {
337 dbg("%s - nonzero write bulk status received: %d", 294 dbg("%s - nonzero write bulk status received: %d",
338 __func__, status); 295 __func__, status);
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
index c248a9147439..691f57a9d712 100644
--- a/drivers/usb/serial/opticon.c
+++ b/drivers/usb/serial/opticon.c
@@ -384,7 +384,6 @@ static void opticon_unthrottle(struct tty_struct *tty)
384 priv->actually_throttled = false; 384 priv->actually_throttled = false;
385 spin_unlock_irqrestore(&priv->lock, flags); 385 spin_unlock_irqrestore(&priv->lock, flags);
386 386
387 priv->bulk_read_urb->dev = port->serial->dev;
388 if (was_throttled) { 387 if (was_throttled) {
389 result = usb_submit_urb(priv->bulk_read_urb, GFP_ATOMIC); 388 result = usb_submit_urb(priv->bulk_read_urb, GFP_ATOMIC);
390 if (result) 389 if (result)
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 6dd64534fad0..c96b6b6509fb 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -476,6 +476,10 @@ static void option_instat_callback(struct urb *urb);
476#define VIETTEL_VENDOR_ID 0x2262 476#define VIETTEL_VENDOR_ID 0x2262
477#define VIETTEL_PRODUCT_VT1000 0x0002 477#define VIETTEL_PRODUCT_VT1000 0x0002
478 478
479/* ZD Incorporated */
480#define ZD_VENDOR_ID 0x0685
481#define ZD_PRODUCT_7000 0x7000
482
479/* some devices interfaces need special handling due to a number of reasons */ 483/* some devices interfaces need special handling due to a number of reasons */
480enum option_blacklist_reason { 484enum option_blacklist_reason {
481 OPTION_BLACKLIST_NONE = 0, 485 OPTION_BLACKLIST_NONE = 0,
@@ -1178,6 +1182,7 @@ static const struct usb_device_id option_ids[] = {
1178 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU528) }, 1182 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU528) },
1179 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU526) }, 1183 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU526) },
1180 { USB_DEVICE_AND_INTERFACE_INFO(VIETTEL_VENDOR_ID, VIETTEL_PRODUCT_VT1000, 0xff, 0xff, 0xff) }, 1184 { USB_DEVICE_AND_INTERFACE_INFO(VIETTEL_VENDOR_ID, VIETTEL_PRODUCT_VT1000, 0xff, 0xff, 0xff) },
1185 { USB_DEVICE_AND_INTERFACE_INFO(ZD_VENDOR_ID, ZD_PRODUCT_7000, 0xff, 0xff, 0xff) },
1181 { } /* Terminating entry */ 1186 { } /* Terminating entry */
1182}; 1187};
1183MODULE_DEVICE_TABLE(usb, option_ids); 1188MODULE_DEVICE_TABLE(usb, option_ids);
diff --git a/drivers/usb/serial/oti6858.c b/drivers/usb/serial/oti6858.c
index 4c29e6c2bda7..2161d1c3c089 100644
--- a/drivers/usb/serial/oti6858.c
+++ b/drivers/usb/serial/oti6858.c
@@ -264,7 +264,6 @@ static void setup_line(struct work_struct *work)
264 spin_unlock_irqrestore(&priv->lock, flags); 264 spin_unlock_irqrestore(&priv->lock, flags);
265 265
266 dbg("%s(): submitting interrupt urb", __func__); 266 dbg("%s(): submitting interrupt urb", __func__);
267 port->interrupt_in_urb->dev = port->serial->dev;
268 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 267 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
269 if (result != 0) { 268 if (result != 0) {
270 dev_err(&port->dev, "%s(): usb_submit_urb() failed" 269 dev_err(&port->dev, "%s(): usb_submit_urb() failed"
@@ -321,7 +320,6 @@ static void send_data(struct work_struct *work)
321 priv->flags.write_urb_in_use = 0; 320 priv->flags.write_urb_in_use = 0;
322 321
323 dbg("%s(): submitting interrupt urb", __func__); 322 dbg("%s(): submitting interrupt urb", __func__);
324 port->interrupt_in_urb->dev = port->serial->dev;
325 result = usb_submit_urb(port->interrupt_in_urb, GFP_NOIO); 323 result = usb_submit_urb(port->interrupt_in_urb, GFP_NOIO);
326 if (result != 0) { 324 if (result != 0) {
327 dev_err(&port->dev, "%s(): usb_submit_urb() failed" 325 dev_err(&port->dev, "%s(): usb_submit_urb() failed"
@@ -334,7 +332,6 @@ static void send_data(struct work_struct *work)
334 port->write_urb->transfer_buffer, 332 port->write_urb->transfer_buffer,
335 count, &port->lock); 333 count, &port->lock);
336 port->write_urb->transfer_buffer_length = count; 334 port->write_urb->transfer_buffer_length = count;
337 port->write_urb->dev = port->serial->dev;
338 result = usb_submit_urb(port->write_urb, GFP_NOIO); 335 result = usb_submit_urb(port->write_urb, GFP_NOIO);
339 if (result != 0) { 336 if (result != 0) {
340 dev_err(&port->dev, "%s(): usb_submit_urb() failed" 337 dev_err(&port->dev, "%s(): usb_submit_urb() failed"
@@ -583,13 +580,12 @@ static int oti6858_open(struct tty_struct *tty, struct usb_serial_port *port)
583 kfree(buf); 580 kfree(buf);
584 581
585 dbg("%s(): submitting interrupt urb", __func__); 582 dbg("%s(): submitting interrupt urb", __func__);
586 port->interrupt_in_urb->dev = serial->dev;
587 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 583 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
588 if (result != 0) { 584 if (result != 0) {
589 dev_err(&port->dev, "%s(): usb_submit_urb() failed" 585 dev_err(&port->dev, "%s(): usb_submit_urb() failed"
590 " with error %d\n", __func__, result); 586 " with error %d\n", __func__, result);
591 oti6858_close(port); 587 oti6858_close(port);
592 return -EPROTO; 588 return result;
593 } 589 }
594 590
595 /* setup termios */ 591 /* setup termios */
@@ -837,7 +833,6 @@ static void oti6858_read_int_callback(struct urb *urb)
837 if (can_recv) { 833 if (can_recv) {
838 int result; 834 int result;
839 835
840 port->read_urb->dev = port->serial->dev;
841 result = usb_submit_urb(port->read_urb, GFP_ATOMIC); 836 result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
842 if (result != 0) { 837 if (result != 0) {
843 priv->flags.read_urb_in_use = 0; 838 priv->flags.read_urb_in_use = 0;
@@ -866,7 +861,6 @@ static void oti6858_read_int_callback(struct urb *urb)
866 int result; 861 int result;
867 862
868/* dbg("%s(): submitting interrupt urb", __func__); */ 863/* dbg("%s(): submitting interrupt urb", __func__); */
869 urb->dev = port->serial->dev;
870 result = usb_submit_urb(urb, GFP_ATOMIC); 864 result = usb_submit_urb(urb, GFP_ATOMIC);
871 if (result != 0) { 865 if (result != 0) {
872 dev_err(&urb->dev->dev, 866 dev_err(&urb->dev->dev,
@@ -894,18 +888,6 @@ static void oti6858_read_bulk_callback(struct urb *urb)
894 spin_unlock_irqrestore(&priv->lock, flags); 888 spin_unlock_irqrestore(&priv->lock, flags);
895 889
896 if (status != 0) { 890 if (status != 0) {
897 /*
898 if (status == -EPROTO) {
899 * PL2303 mysteriously fails with -EPROTO reschedule
900 the read *
901 dbg("%s - caught -EPROTO, resubmitting the urb",
902 __func__);
903 result = usb_submit_urb(urb, GFP_ATOMIC);
904 if (result)
905 dev_err(&urb->dev->dev, "%s - failed resubmitting read urb, error %d\n", __func__, result);
906 return;
907 }
908 */
909 dbg("%s(): unable to handle the error, exiting", __func__); 891 dbg("%s(): unable to handle the error, exiting", __func__);
910 return; 892 return;
911 } 893 }
@@ -918,7 +900,6 @@ static void oti6858_read_bulk_callback(struct urb *urb)
918 tty_kref_put(tty); 900 tty_kref_put(tty);
919 901
920 /* schedule the interrupt urb */ 902 /* schedule the interrupt urb */
921 port->interrupt_in_urb->dev = port->serial->dev;
922 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC); 903 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC);
923 if (result != 0 && result != -EPERM) { 904 if (result != 0 && result != -EPERM) {
924 dev_err(&port->dev, "%s(): usb_submit_urb() failed," 905 dev_err(&port->dev, "%s(): usb_submit_urb() failed,"
@@ -955,7 +936,6 @@ static void oti6858_write_bulk_callback(struct urb *urb)
955 dbg("%s(): overflow in write", __func__); 936 dbg("%s(): overflow in write", __func__);
956 937
957 port->write_urb->transfer_buffer_length = 1; 938 port->write_urb->transfer_buffer_length = 1;
958 port->write_urb->dev = port->serial->dev;
959 result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 939 result = usb_submit_urb(port->write_urb, GFP_ATOMIC);
960 if (result) { 940 if (result) {
961 dev_err(&port->dev, "%s(): usb_submit_urb() failed," 941 dev_err(&port->dev, "%s(): usb_submit_urb() failed,"
@@ -968,7 +948,6 @@ static void oti6858_write_bulk_callback(struct urb *urb)
968 priv->flags.write_urb_in_use = 0; 948 priv->flags.write_urb_in_use = 0;
969 949
970 /* schedule the interrupt urb if we are still open */ 950 /* schedule the interrupt urb if we are still open */
971 port->interrupt_in_urb->dev = port->serial->dev;
972 dbg("%s(): submitting interrupt urb", __func__); 951 dbg("%s(): submitting interrupt urb", __func__);
973 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC); 952 result = usb_submit_urb(port->interrupt_in_urb, GFP_ATOMIC);
974 if (result != 0) { 953 if (result != 0) {
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index fc2d66f7f4eb..329295615d06 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -502,21 +502,20 @@ static int pl2303_open(struct tty_struct *tty, struct usb_serial_port *port)
502 if (tty) 502 if (tty)
503 pl2303_set_termios(tty, port, &tmp_termios); 503 pl2303_set_termios(tty, port, &tmp_termios);
504 504
505 dbg("%s - submitting read urb", __func__);
506 result = usb_serial_generic_submit_read_urb(port, GFP_KERNEL);
507 if (result) {
508 pl2303_close(port);
509 return -EPROTO;
510 }
511
512 dbg("%s - submitting interrupt urb", __func__); 505 dbg("%s - submitting interrupt urb", __func__);
513 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 506 result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
514 if (result) { 507 if (result) {
515 dev_err(&port->dev, "%s - failed submitting interrupt urb," 508 dev_err(&port->dev, "%s - failed submitting interrupt urb,"
516 " error %d\n", __func__, result); 509 " error %d\n", __func__, result);
517 pl2303_close(port); 510 return result;
518 return -EPROTO;
519 } 511 }
512
513 result = usb_serial_generic_open(tty, port);
514 if (result) {
515 usb_kill_urb(port->interrupt_in_urb);
516 return result;
517 }
518
520 port->port.drain_delay = 256; 519 port->port.drain_delay = 256;
521 return 0; 520 return 0;
522} 521}
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index b18179bda0d8..f2485429172f 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -681,7 +681,6 @@ static void sierra_instat_callback(struct urb *urb)
681 /* Resubmit urb so we continue receiving IRQ data */ 681 /* Resubmit urb so we continue receiving IRQ data */
682 if (status != -ESHUTDOWN && status != -ENOENT) { 682 if (status != -ESHUTDOWN && status != -ENOENT) {
683 usb_mark_last_busy(serial->dev); 683 usb_mark_last_busy(serial->dev);
684 urb->dev = serial->dev;
685 err = usb_submit_urb(urb, GFP_ATOMIC); 684 err = usb_submit_urb(urb, GFP_ATOMIC);
686 if (err && err != -EPERM) 685 if (err && err != -EPERM)
687 dev_err(&port->dev, "%s: resubmit intr urb " 686 dev_err(&port->dev, "%s: resubmit intr urb "
diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c
index 7096f799b071..c70cc012d03f 100644
--- a/drivers/usb/serial/symbolserial.c
+++ b/drivers/usb/serial/symbolserial.c
@@ -182,7 +182,6 @@ static void symbol_unthrottle(struct tty_struct *tty)
182 priv->actually_throttled = false; 182 priv->actually_throttled = false;
183 spin_unlock_irq(&priv->lock); 183 spin_unlock_irq(&priv->lock);
184 184
185 priv->int_urb->dev = port->serial->dev;
186 if (was_throttled) { 185 if (was_throttled) {
187 result = usb_submit_urb(priv->int_urb, GFP_KERNEL); 186 result = usb_submit_urb(priv->int_urb, GFP_KERNEL);
188 if (result) 187 if (result)
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index ea8445689c85..4af21f46096e 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -535,9 +535,7 @@ static int ti_open(struct tty_struct *tty, struct usb_serial_port *port)
535 status = -EINVAL; 535 status = -EINVAL;
536 goto release_lock; 536 goto release_lock;
537 } 537 }
538 urb->complete = ti_interrupt_callback;
539 urb->context = tdev; 538 urb->context = tdev;
540 urb->dev = dev;
541 status = usb_submit_urb(urb, GFP_KERNEL); 539 status = usb_submit_urb(urb, GFP_KERNEL);
542 if (status) { 540 if (status) {
543 dev_err(&port->dev, 541 dev_err(&port->dev,
@@ -619,9 +617,7 @@ static int ti_open(struct tty_struct *tty, struct usb_serial_port *port)
619 goto unlink_int_urb; 617 goto unlink_int_urb;
620 } 618 }
621 tport->tp_read_urb_state = TI_READ_URB_RUNNING; 619 tport->tp_read_urb_state = TI_READ_URB_RUNNING;
622 urb->complete = ti_bulk_in_callback;
623 urb->context = tport; 620 urb->context = tport;
624 urb->dev = dev;
625 status = usb_submit_urb(urb, GFP_KERNEL); 621 status = usb_submit_urb(urb, GFP_KERNEL);
626 if (status) { 622 if (status) {
627 dev_err(&port->dev, "%s - submit read urb failed, %d\n", 623 dev_err(&port->dev, "%s - submit read urb failed, %d\n",
@@ -1236,12 +1232,11 @@ static void ti_bulk_in_callback(struct urb *urb)
1236exit: 1232exit:
1237 /* continue to read unless stopping */ 1233 /* continue to read unless stopping */
1238 spin_lock(&tport->tp_lock); 1234 spin_lock(&tport->tp_lock);
1239 if (tport->tp_read_urb_state == TI_READ_URB_RUNNING) { 1235 if (tport->tp_read_urb_state == TI_READ_URB_RUNNING)
1240 urb->dev = port->serial->dev;
1241 retval = usb_submit_urb(urb, GFP_ATOMIC); 1236 retval = usb_submit_urb(urb, GFP_ATOMIC);
1242 } else if (tport->tp_read_urb_state == TI_READ_URB_STOPPING) { 1237 else if (tport->tp_read_urb_state == TI_READ_URB_STOPPING)
1243 tport->tp_read_urb_state = TI_READ_URB_STOPPED; 1238 tport->tp_read_urb_state = TI_READ_URB_STOPPED;
1244 } 1239
1245 spin_unlock(&tport->tp_lock); 1240 spin_unlock(&tport->tp_lock);
1246 if (retval) 1241 if (retval)
1247 dev_err(dev, "%s - resubmit read urb failed, %d\n", 1242 dev_err(dev, "%s - resubmit read urb failed, %d\n",
@@ -1574,9 +1569,7 @@ static int ti_restart_read(struct ti_port *tport, struct tty_struct *tty)
1574 tport->tp_read_urb_state = TI_READ_URB_RUNNING; 1569 tport->tp_read_urb_state = TI_READ_URB_RUNNING;
1575 urb = tport->tp_port->read_urb; 1570 urb = tport->tp_port->read_urb;
1576 spin_unlock_irqrestore(&tport->tp_lock, flags); 1571 spin_unlock_irqrestore(&tport->tp_lock, flags);
1577 urb->complete = ti_bulk_in_callback;
1578 urb->context = tport; 1572 urb->context = tport;
1579 urb->dev = tport->tp_port->serial->dev;
1580 status = usb_submit_urb(urb, GFP_KERNEL); 1573 status = usb_submit_urb(urb, GFP_KERNEL);
1581 } else { 1574 } else {
1582 tport->tp_read_urb_state = TI_READ_URB_RUNNING; 1575 tport->tp_read_urb_state = TI_READ_URB_RUNNING;
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index cc274fdf2627..ce6c1a65a544 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -50,7 +50,7 @@ static struct usb_driver usb_serial_driver = {
50 .disconnect = usb_serial_disconnect, 50 .disconnect = usb_serial_disconnect,
51 .suspend = usb_serial_suspend, 51 .suspend = usb_serial_suspend,
52 .resume = usb_serial_resume, 52 .resume = usb_serial_resume,
53 .no_dynamic_id = 1, 53 .no_dynamic_id = 1,
54 .supports_autosuspend = 1, 54 .supports_autosuspend = 1,
55}; 55};
56 56
@@ -260,6 +260,10 @@ static int serial_activate(struct tty_port *tport, struct tty_struct *tty)
260 else 260 else
261 retval = port->serial->type->open(tty, port); 261 retval = port->serial->type->open(tty, port);
262 mutex_unlock(&serial->disc_mutex); 262 mutex_unlock(&serial->disc_mutex);
263
264 if (retval < 0)
265 retval = usb_translate_errors(retval);
266
263 return retval; 267 return retval;
264} 268}
265 269
@@ -360,7 +364,8 @@ static int serial_write(struct tty_struct *tty, const unsigned char *buf,
360 364
361 /* pass on to the driver specific version of this function */ 365 /* pass on to the driver specific version of this function */
362 retval = port->serial->type->write(tty, port, buf, count); 366 retval = port->serial->type->write(tty, port, buf, count);
363 367 if (retval < 0)
368 retval = usb_translate_errors(retval);
364exit: 369exit:
365 return retval; 370 return retval;
366} 371}
@@ -562,8 +567,8 @@ static void kill_traffic(struct usb_serial_port *port)
562{ 567{
563 int i; 568 int i;
564 569
565 usb_kill_urb(port->read_urb); 570 for (i = 0; i < ARRAY_SIZE(port->read_urbs); ++i)
566 usb_kill_urb(port->write_urb); 571 usb_kill_urb(port->read_urbs[i]);
567 for (i = 0; i < ARRAY_SIZE(port->write_urbs); ++i) 572 for (i = 0; i < ARRAY_SIZE(port->write_urbs); ++i)
568 usb_kill_urb(port->write_urbs[i]); 573 usb_kill_urb(port->write_urbs[i]);
569 /* 574 /*
@@ -595,17 +600,17 @@ static void port_release(struct device *dev)
595 kill_traffic(port); 600 kill_traffic(port);
596 cancel_work_sync(&port->work); 601 cancel_work_sync(&port->work);
597 602
598 usb_free_urb(port->read_urb);
599 usb_free_urb(port->write_urb);
600 usb_free_urb(port->interrupt_in_urb); 603 usb_free_urb(port->interrupt_in_urb);
601 usb_free_urb(port->interrupt_out_urb); 604 usb_free_urb(port->interrupt_out_urb);
605 for (i = 0; i < ARRAY_SIZE(port->read_urbs); ++i) {
606 usb_free_urb(port->read_urbs[i]);
607 kfree(port->bulk_in_buffers[i]);
608 }
602 for (i = 0; i < ARRAY_SIZE(port->write_urbs); ++i) { 609 for (i = 0; i < ARRAY_SIZE(port->write_urbs); ++i) {
603 usb_free_urb(port->write_urbs[i]); 610 usb_free_urb(port->write_urbs[i]);
604 kfree(port->bulk_out_buffers[i]); 611 kfree(port->bulk_out_buffers[i]);
605 } 612 }
606 kfifo_free(&port->write_fifo); 613 kfifo_free(&port->write_fifo);
607 kfree(port->bulk_in_buffer);
608 kfree(port->bulk_out_buffer);
609 kfree(port->interrupt_in_buffer); 614 kfree(port->interrupt_in_buffer);
610 kfree(port->interrupt_out_buffer); 615 kfree(port->interrupt_out_buffer);
611 kfree(port); 616 kfree(port);
@@ -686,16 +691,18 @@ static int serial_carrier_raised(struct tty_port *port)
686{ 691{
687 struct usb_serial_port *p = container_of(port, struct usb_serial_port, port); 692 struct usb_serial_port *p = container_of(port, struct usb_serial_port, port);
688 struct usb_serial_driver *drv = p->serial->type; 693 struct usb_serial_driver *drv = p->serial->type;
694
689 if (drv->carrier_raised) 695 if (drv->carrier_raised)
690 return drv->carrier_raised(p); 696 return drv->carrier_raised(p);
691 /* No carrier control - don't block */ 697 /* No carrier control - don't block */
692 return 1; 698 return 1;
693} 699}
694 700
695static void serial_dtr_rts(struct tty_port *port, int on) 701static void serial_dtr_rts(struct tty_port *port, int on)
696{ 702{
697 struct usb_serial_port *p = container_of(port, struct usb_serial_port, port); 703 struct usb_serial_port *p = container_of(port, struct usb_serial_port, port);
698 struct usb_serial_driver *drv = p->serial->type; 704 struct usb_serial_driver *drv = p->serial->type;
705
699 if (drv->dtr_rts) 706 if (drv->dtr_rts)
700 drv->dtr_rts(p, on); 707 drv->dtr_rts(p, on);
701} 708}
@@ -724,6 +731,7 @@ int usb_serial_probe(struct usb_interface *interface,
724 unsigned int minor; 731 unsigned int minor;
725 int buffer_size; 732 int buffer_size;
726 int i; 733 int i;
734 int j;
727 int num_interrupt_in = 0; 735 int num_interrupt_in = 0;
728 int num_interrupt_out = 0; 736 int num_interrupt_out = 0;
729 int num_bulk_in = 0; 737 int num_bulk_in = 0;
@@ -906,38 +914,41 @@ int usb_serial_probe(struct usb_interface *interface,
906 for (i = 0; i < num_bulk_in; ++i) { 914 for (i = 0; i < num_bulk_in; ++i) {
907 endpoint = bulk_in_endpoint[i]; 915 endpoint = bulk_in_endpoint[i];
908 port = serial->port[i]; 916 port = serial->port[i];
909 port->read_urb = usb_alloc_urb(0, GFP_KERNEL);
910 if (!port->read_urb) {
911 dev_err(&interface->dev, "No free urbs available\n");
912 goto probe_error;
913 }
914 buffer_size = max_t(int, serial->type->bulk_in_size, 917 buffer_size = max_t(int, serial->type->bulk_in_size,
915 usb_endpoint_maxp(endpoint)); 918 usb_endpoint_maxp(endpoint));
916 port->bulk_in_size = buffer_size; 919 port->bulk_in_size = buffer_size;
917 port->bulk_in_endpointAddress = endpoint->bEndpointAddress; 920 port->bulk_in_endpointAddress = endpoint->bEndpointAddress;
918 port->bulk_in_buffer = kmalloc(buffer_size, GFP_KERNEL); 921
919 if (!port->bulk_in_buffer) { 922 for (j = 0; j < ARRAY_SIZE(port->read_urbs); ++j) {
920 dev_err(&interface->dev, 923 set_bit(j, &port->read_urbs_free);
924 port->read_urbs[j] = usb_alloc_urb(0, GFP_KERNEL);
925 if (!port->read_urbs[j]) {
926 dev_err(&interface->dev,
927 "No free urbs available\n");
928 goto probe_error;
929 }
930 port->bulk_in_buffers[j] = kmalloc(buffer_size,
931 GFP_KERNEL);
932 if (!port->bulk_in_buffers[j]) {
933 dev_err(&interface->dev,
921 "Couldn't allocate bulk_in_buffer\n"); 934 "Couldn't allocate bulk_in_buffer\n");
922 goto probe_error; 935 goto probe_error;
923 } 936 }
924 usb_fill_bulk_urb(port->read_urb, dev, 937 usb_fill_bulk_urb(port->read_urbs[j], dev,
925 usb_rcvbulkpipe(dev, 938 usb_rcvbulkpipe(dev,
926 endpoint->bEndpointAddress), 939 endpoint->bEndpointAddress),
927 port->bulk_in_buffer, buffer_size, 940 port->bulk_in_buffers[j], buffer_size,
928 serial->type->read_bulk_callback, port); 941 serial->type->read_bulk_callback,
942 port);
943 }
944
945 port->read_urb = port->read_urbs[0];
946 port->bulk_in_buffer = port->bulk_in_buffers[0];
929 } 947 }
930 948
931 for (i = 0; i < num_bulk_out; ++i) { 949 for (i = 0; i < num_bulk_out; ++i) {
932 int j;
933
934 endpoint = bulk_out_endpoint[i]; 950 endpoint = bulk_out_endpoint[i];
935 port = serial->port[i]; 951 port = serial->port[i];
936 port->write_urb = usb_alloc_urb(0, GFP_KERNEL);
937 if (!port->write_urb) {
938 dev_err(&interface->dev, "No free urbs available\n");
939 goto probe_error;
940 }
941 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL)) 952 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL))
942 goto probe_error; 953 goto probe_error;
943 buffer_size = serial->type->bulk_out_size; 954 buffer_size = serial->type->bulk_out_size;
@@ -945,17 +956,7 @@ int usb_serial_probe(struct usb_interface *interface,
945 buffer_size = usb_endpoint_maxp(endpoint); 956 buffer_size = usb_endpoint_maxp(endpoint);
946 port->bulk_out_size = buffer_size; 957 port->bulk_out_size = buffer_size;
947 port->bulk_out_endpointAddress = endpoint->bEndpointAddress; 958 port->bulk_out_endpointAddress = endpoint->bEndpointAddress;
948 port->bulk_out_buffer = kmalloc(buffer_size, GFP_KERNEL); 959
949 if (!port->bulk_out_buffer) {
950 dev_err(&interface->dev,
951 "Couldn't allocate bulk_out_buffer\n");
952 goto probe_error;
953 }
954 usb_fill_bulk_urb(port->write_urb, dev,
955 usb_sndbulkpipe(dev,
956 endpoint->bEndpointAddress),
957 port->bulk_out_buffer, buffer_size,
958 serial->type->write_bulk_callback, port);
959 for (j = 0; j < ARRAY_SIZE(port->write_urbs); ++j) { 960 for (j = 0; j < ARRAY_SIZE(port->write_urbs); ++j) {
960 set_bit(j, &port->write_urbs_free); 961 set_bit(j, &port->write_urbs_free);
961 port->write_urbs[j] = usb_alloc_urb(0, GFP_KERNEL); 962 port->write_urbs[j] = usb_alloc_urb(0, GFP_KERNEL);
@@ -978,6 +979,9 @@ int usb_serial_probe(struct usb_interface *interface,
978 serial->type->write_bulk_callback, 979 serial->type->write_bulk_callback,
979 port); 980 port);
980 } 981 }
982
983 port->write_urb = port->write_urbs[0];
984 port->bulk_out_buffer = port->bulk_out_buffers[0];
981 } 985 }
982 986
983 if (serial->type->read_int_callback) { 987 if (serial->type->read_int_callback) {
@@ -1196,7 +1200,7 @@ static const struct tty_operations serial_ops = {
1196 .open = serial_open, 1200 .open = serial_open,
1197 .close = serial_close, 1201 .close = serial_close,
1198 .write = serial_write, 1202 .write = serial_write,
1199 .hangup = serial_hangup, 1203 .hangup = serial_hangup,
1200 .write_room = serial_write_room, 1204 .write_room = serial_write_room,
1201 .ioctl = serial_ioctl, 1205 .ioctl = serial_ioctl,
1202 .set_termios = serial_set_termios, 1206 .set_termios = serial_set_termios,
@@ -1206,9 +1210,9 @@ static const struct tty_operations serial_ops = {
1206 .chars_in_buffer = serial_chars_in_buffer, 1210 .chars_in_buffer = serial_chars_in_buffer,
1207 .tiocmget = serial_tiocmget, 1211 .tiocmget = serial_tiocmget,
1208 .tiocmset = serial_tiocmset, 1212 .tiocmset = serial_tiocmset,
1209 .get_icount = serial_get_icount, 1213 .get_icount = serial_get_icount,
1210 .cleanup = serial_cleanup, 1214 .cleanup = serial_cleanup,
1211 .install = serial_install, 1215 .install = serial_install,
1212 .proc_fops = &serial_proc_fops, 1216 .proc_fops = &serial_proc_fops,
1213}; 1217};
1214 1218
@@ -1237,7 +1241,7 @@ static int __init usb_serial_init(void)
1237 1241
1238 usb_serial_tty_driver->owner = THIS_MODULE; 1242 usb_serial_tty_driver->owner = THIS_MODULE;
1239 usb_serial_tty_driver->driver_name = "usbserial"; 1243 usb_serial_tty_driver->driver_name = "usbserial";
1240 usb_serial_tty_driver->name = "ttyUSB"; 1244 usb_serial_tty_driver->name = "ttyUSB";
1241 usb_serial_tty_driver->major = SERIAL_TTY_MAJOR; 1245 usb_serial_tty_driver->major = SERIAL_TTY_MAJOR;
1242 usb_serial_tty_driver->minor_start = 0; 1246 usb_serial_tty_driver->minor_start = 0;
1243 usb_serial_tty_driver->type = TTY_DRIVER_TYPE_SERIAL; 1247 usb_serial_tty_driver->type = TTY_DRIVER_TYPE_SERIAL;
@@ -1336,7 +1340,6 @@ static void fixup_generic(struct usb_serial_driver *device)
1336 1340
1337int usb_serial_register(struct usb_serial_driver *driver) 1341int usb_serial_register(struct usb_serial_driver *driver)
1338{ 1342{
1339 /* must be called with BKL held */
1340 int retval; 1343 int retval;
1341 1344
1342 if (usb_disabled()) 1345 if (usb_disabled())
@@ -1374,7 +1377,6 @@ EXPORT_SYMBOL_GPL(usb_serial_register);
1374 1377
1375void usb_serial_deregister(struct usb_serial_driver *device) 1378void usb_serial_deregister(struct usb_serial_driver *device)
1376{ 1379{
1377 /* must be called with BKL held */
1378 printk(KERN_INFO "USB Serial deregistering driver %s\n", 1380 printk(KERN_INFO "USB Serial deregistering driver %s\n",
1379 device->description); 1381 device->description);
1380 mutex_lock(&table_lock); 1382 mutex_lock(&table_lock);
diff --git a/drivers/usb/serial/usb_debug.c b/drivers/usb/serial/usb_debug.c
index 95a82148ee81..9b632e753210 100644
--- a/drivers/usb/serial/usb_debug.c
+++ b/drivers/usb/serial/usb_debug.c
@@ -40,7 +40,7 @@ static struct usb_driver debug_driver = {
40 .probe = usb_serial_probe, 40 .probe = usb_serial_probe,
41 .disconnect = usb_serial_disconnect, 41 .disconnect = usb_serial_disconnect,
42 .id_table = id_table, 42 .id_table = id_table,
43 .no_dynamic_id = 1, 43 .no_dynamic_id = 1,
44}; 44};
45 45
46/* This HW really does not support a serial break, so one will be 46/* This HW really does not support a serial break, so one will be
@@ -54,19 +54,18 @@ static void usb_debug_break_ctl(struct tty_struct *tty, int break_state)
54 usb_serial_generic_write(tty, port, USB_DEBUG_BRK, USB_DEBUG_BRK_SIZE); 54 usb_serial_generic_write(tty, port, USB_DEBUG_BRK, USB_DEBUG_BRK_SIZE);
55} 55}
56 56
57static void usb_debug_read_bulk_callback(struct urb *urb) 57static void usb_debug_process_read_urb(struct urb *urb)
58{ 58{
59 struct usb_serial_port *port = urb->context; 59 struct usb_serial_port *port = urb->context;
60 60
61 if (urb->actual_length == USB_DEBUG_BRK_SIZE && 61 if (urb->actual_length == USB_DEBUG_BRK_SIZE &&
62 memcmp(urb->transfer_buffer, USB_DEBUG_BRK, 62 memcmp(urb->transfer_buffer, USB_DEBUG_BRK,
63 USB_DEBUG_BRK_SIZE) == 0) { 63 USB_DEBUG_BRK_SIZE) == 0) {
64 usb_serial_handle_break(port); 64 usb_serial_handle_break(port);
65 usb_serial_generic_submit_read_urb(port, GFP_ATOMIC);
66 return; 65 return;
67 } 66 }
68 67
69 usb_serial_generic_read_bulk_callback(urb); 68 usb_serial_generic_process_read_urb(urb);
70} 69}
71 70
72static struct usb_serial_driver debug_device = { 71static struct usb_serial_driver debug_device = {
@@ -79,7 +78,7 @@ static struct usb_serial_driver debug_device = {
79 .num_ports = 1, 78 .num_ports = 1,
80 .bulk_out_size = USB_DEBUG_MAX_PACKET_SIZE, 79 .bulk_out_size = USB_DEBUG_MAX_PACKET_SIZE,
81 .break_ctl = usb_debug_break_ctl, 80 .break_ctl = usb_debug_break_ctl,
82 .read_bulk_callback = usb_debug_read_bulk_callback, 81 .process_read_urb = usb_debug_process_read_urb,
83}; 82};
84 83
85static int __init debug_init(void) 84static int __init debug_init(void)
diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c
index 5b073bcc807b..11af903cb09f 100644
--- a/drivers/usb/serial/whiteheat.c
+++ b/drivers/usb/serial/whiteheat.c
@@ -14,57 +14,6 @@
14 * 14 *
15 * See Documentation/usb/usb-serial.txt for more information on using this 15 * See Documentation/usb/usb-serial.txt for more information on using this
16 * driver 16 * driver
17 *
18 * (10/09/2002) Stuart MacDonald (stuartm@connecttech.com)
19 * Upgrade to full working driver
20 *
21 * (05/30/2001) gkh
22 * switched from using spinlock to a semaphore, which fixes lots of
23 * problems.
24 *
25 * (04/08/2001) gb
26 * Identify version on module load.
27 *
28 * 2001_Mar_19 gkh
29 * Fixed MOD_INC and MOD_DEC logic, the ability to open a port more
30 * than once, and the got the proper usb_device_id table entries so
31 * the driver works again.
32 *
33 * (11/01/2000) Adam J. Richter
34 * usb_device_id table support
35 *
36 * (10/05/2000) gkh
37 * Fixed bug with urb->dev not being set properly, now that the usb
38 * core needs it.
39 *
40 * (10/03/2000) smd
41 * firmware is improved to guard against crap sent to device
42 * firmware now replies CMD_FAILURE on bad things
43 * read_callback fix you provided for private info struct
44 * command_finished now indicates success or fail
45 * setup_port struct now packed to avoid gcc padding
46 * firmware uses 1 based port numbering, driver now handles that
47 *
48 * (09/11/2000) gkh
49 * Removed DEBUG #ifdefs with call to usb_serial_debug_data
50 *
51 * (07/19/2000) gkh
52 * Added module_init and module_exit functions to handle the fact that this
53 * driver is a loadable module now.
54 * Fixed bug with port->minor that was found by Al Borchers
55 *
56 * (07/04/2000) gkh
57 * Added support for port settings. Baud rate can now be changed. Line
58 * signals are not transferred to and from the tty layer yet, but things
59 * seem to be working well now.
60 *
61 * (05/04/2000) gkh
62 * First cut at open and close commands. Data can flow through the ports at
63 * default speeds now.
64 *
65 * (03/26/2000) gkh
66 * Split driver up into device specific pieces.
67 *
68 */ 17 */
69 18
70#include <linux/kernel.h> 19#include <linux/kernel.h>
@@ -753,7 +702,6 @@ static void whiteheat_close(struct usb_serial_port *port)
753static int whiteheat_write(struct tty_struct *tty, 702static int whiteheat_write(struct tty_struct *tty,
754 struct usb_serial_port *port, const unsigned char *buf, int count) 703 struct usb_serial_port *port, const unsigned char *buf, int count)
755{ 704{
756 struct usb_serial *serial = port->serial;
757 struct whiteheat_private *info = usb_get_serial_port_data(port); 705 struct whiteheat_private *info = usb_get_serial_port_data(port);
758 struct whiteheat_urb_wrap *wrap; 706 struct whiteheat_urb_wrap *wrap;
759 struct urb *urb; 707 struct urb *urb;
@@ -789,7 +737,6 @@ static int whiteheat_write(struct tty_struct *tty,
789 usb_serial_debug_data(debug, &port->dev, 737 usb_serial_debug_data(debug, &port->dev,
790 __func__, bytes, urb->transfer_buffer); 738 __func__, bytes, urb->transfer_buffer);
791 739
792 urb->dev = serial->dev;
793 urb->transfer_buffer_length = bytes; 740 urb->transfer_buffer_length = bytes;
794 result = usb_submit_urb(urb, GFP_ATOMIC); 741 result = usb_submit_urb(urb, GFP_ATOMIC);
795 if (result) { 742 if (result) {
@@ -1035,7 +982,6 @@ static void command_port_read_callback(struct urb *urb)
1035 dbg("%s - bad reply from firmware", __func__); 982 dbg("%s - bad reply from firmware", __func__);
1036 983
1037 /* Continue trying to always read */ 984 /* Continue trying to always read */
1038 command_port->read_urb->dev = command_port->serial->dev;
1039 result = usb_submit_urb(command_port->read_urb, GFP_ATOMIC); 985 result = usb_submit_urb(command_port->read_urb, GFP_ATOMIC);
1040 if (result) 986 if (result)
1041 dbg("%s - failed resubmitting read urb, error %d", 987 dbg("%s - failed resubmitting read urb, error %d",
@@ -1141,7 +1087,6 @@ static int firm_send_command(struct usb_serial_port *port, __u8 command,
1141 transfer_buffer[0] = command; 1087 transfer_buffer[0] = command;
1142 memcpy(&transfer_buffer[1], data, datasize); 1088 memcpy(&transfer_buffer[1], data, datasize);
1143 command_port->write_urb->transfer_buffer_length = datasize + 1; 1089 command_port->write_urb->transfer_buffer_length = datasize + 1;
1144 command_port->write_urb->dev = port->serial->dev;
1145 retval = usb_submit_urb(command_port->write_urb, GFP_NOIO); 1090 retval = usb_submit_urb(command_port->write_urb, GFP_NOIO);
1146 if (retval) { 1091 if (retval) {
1147 dbg("%s - submit urb failed", __func__); 1092 dbg("%s - submit urb failed", __func__);
@@ -1362,7 +1307,6 @@ static int start_command_port(struct usb_serial *serial)
1362 /* Work around HCD bugs */ 1307 /* Work around HCD bugs */
1363 usb_clear_halt(serial->dev, command_port->read_urb->pipe); 1308 usb_clear_halt(serial->dev, command_port->read_urb->pipe);
1364 1309
1365 command_port->read_urb->dev = serial->dev;
1366 retval = usb_submit_urb(command_port->read_urb, GFP_KERNEL); 1310 retval = usb_submit_urb(command_port->read_urb, GFP_KERNEL);
1367 if (retval) { 1311 if (retval) {
1368 dev_err(&serial->dev->dev, 1312 dev_err(&serial->dev->dev,
@@ -1410,7 +1354,6 @@ static int start_port_read(struct usb_serial_port *port)
1410 list_del(tmp); 1354 list_del(tmp);
1411 wrap = list_entry(tmp, struct whiteheat_urb_wrap, list); 1355 wrap = list_entry(tmp, struct whiteheat_urb_wrap, list);
1412 urb = wrap->urb; 1356 urb = wrap->urb;
1413 urb->dev = port->serial->dev;
1414 spin_unlock_irqrestore(&info->lock, flags); 1357 spin_unlock_irqrestore(&info->lock, flags);
1415 retval = usb_submit_urb(urb, GFP_KERNEL); 1358 retval = usb_submit_urb(urb, GFP_KERNEL);
1416 if (retval) { 1359 if (retval) {
@@ -1490,7 +1433,6 @@ static void rx_data_softint(struct work_struct *work)
1490 sent += tty_insert_flip_string(tty, 1433 sent += tty_insert_flip_string(tty,
1491 urb->transfer_buffer, urb->actual_length); 1434 urb->transfer_buffer, urb->actual_length);
1492 1435
1493 urb->dev = port->serial->dev;
1494 result = usb_submit_urb(urb, GFP_ATOMIC); 1436 result = usb_submit_urb(urb, GFP_ATOMIC);
1495 if (result) { 1437 if (result) {
1496 dev_err(&port->dev, 1438 dev_err(&port->dev,
diff --git a/drivers/usb/storage/alauda.c b/drivers/usb/storage/alauda.c
index 3ca87a823342..51af2fee2efd 100644
--- a/drivers/usb/storage/alauda.c
+++ b/drivers/usb/storage/alauda.c
@@ -139,7 +139,7 @@ static int init_alauda(struct us_data *us);
139{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 139{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
140 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 140 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
141 141
142struct usb_device_id alauda_usb_ids[] = { 142static struct usb_device_id alauda_usb_ids[] = {
143# include "unusual_alauda.h" 143# include "unusual_alauda.h"
144 { } /* Terminating entry */ 144 { } /* Terminating entry */
145}; 145};
diff --git a/drivers/usb/storage/cypress_atacb.c b/drivers/usb/storage/cypress_atacb.c
index c7909dfa2434..387cbd47acc9 100644
--- a/drivers/usb/storage/cypress_atacb.c
+++ b/drivers/usb/storage/cypress_atacb.c
@@ -43,7 +43,7 @@ MODULE_LICENSE("GPL");
43{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 43{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
44 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 44 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
45 45
46struct usb_device_id cypress_usb_ids[] = { 46static struct usb_device_id cypress_usb_ids[] = {
47# include "unusual_cypress.h" 47# include "unusual_cypress.h"
48 { } /* Terminating entry */ 48 { } /* Terminating entry */
49}; 49};
diff --git a/drivers/usb/storage/datafab.c b/drivers/usb/storage/datafab.c
index a99be857b794..15d41f2b3d6f 100644
--- a/drivers/usb/storage/datafab.c
+++ b/drivers/usb/storage/datafab.c
@@ -88,7 +88,7 @@ static int datafab_determine_lun(struct us_data *us,
88{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 88{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
89 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 89 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
90 90
91struct usb_device_id datafab_usb_ids[] = { 91static struct usb_device_id datafab_usb_ids[] = {
92# include "unusual_datafab.h" 92# include "unusual_datafab.h"
93 { } /* Terminating entry */ 93 { } /* Terminating entry */
94}; 94};
diff --git a/drivers/usb/storage/ene_ub6250.c b/drivers/usb/storage/ene_ub6250.c
index b0a1687ca942..a6ade4071a9a 100644
--- a/drivers/usb/storage/ene_ub6250.c
+++ b/drivers/usb/storage/ene_ub6250.c
@@ -42,7 +42,7 @@ MODULE_LICENSE("GPL");
42{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 42{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
43 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 43 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
44 44
45struct usb_device_id ene_ub6250_usb_ids[] = { 45static struct usb_device_id ene_ub6250_usb_ids[] = {
46# include "unusual_ene_ub6250.h" 46# include "unusual_ene_ub6250.h"
47 { } /* Terminating entry */ 47 { } /* Terminating entry */
48}; 48};
@@ -607,8 +607,8 @@ static int sd_scsi_mode_sense(struct us_data *us, struct scsi_cmnd *srb)
607 607
608static int sd_scsi_read_capacity(struct us_data *us, struct scsi_cmnd *srb) 608static int sd_scsi_read_capacity(struct us_data *us, struct scsi_cmnd *srb)
609{ 609{
610 u32 bl_num; 610 u32 bl_num;
611 u16 bl_len; 611 u32 bl_len;
612 unsigned int offset = 0; 612 unsigned int offset = 0;
613 unsigned char buf[8]; 613 unsigned char buf[8];
614 struct scatterlist *sg = NULL; 614 struct scatterlist *sg = NULL;
@@ -622,7 +622,7 @@ static int sd_scsi_read_capacity(struct us_data *us, struct scsi_cmnd *srb)
622 else 622 else
623 bl_num = (info->HC_C_SIZE + 1) * 1024 - 1; 623 bl_num = (info->HC_C_SIZE + 1) * 1024 - 1;
624 } else { 624 } else {
625 bl_len = 1<<(info->SD_READ_BL_LEN); 625 bl_len = 1 << (info->SD_READ_BL_LEN);
626 bl_num = info->SD_Block_Mult * (info->SD_C_SIZE + 1) 626 bl_num = info->SD_Block_Mult * (info->SD_C_SIZE + 1)
627 * (1 << (info->SD_C_SIZE_MULT + 2)) - 1; 627 * (1 << (info->SD_C_SIZE_MULT + 2)) - 1;
628 } 628 }
@@ -777,7 +777,7 @@ static int ms_lib_free_logicalmap(struct us_data *us)
777 return 0; 777 return 0;
778} 778}
779 779
780int ms_lib_alloc_logicalmap(struct us_data *us) 780static int ms_lib_alloc_logicalmap(struct us_data *us)
781{ 781{
782 u32 i; 782 u32 i;
783 struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra; 783 struct ene_ub6250_info *info = (struct ene_ub6250_info *) us->extra;
@@ -2248,7 +2248,7 @@ static int sd_scsi_irp(struct us_data *us, struct scsi_cmnd *srb)
2248/* 2248/*
2249 * ms_scsi_irp() 2249 * ms_scsi_irp()
2250 */ 2250 */
2251int ms_scsi_irp(struct us_data *us, struct scsi_cmnd *srb) 2251static int ms_scsi_irp(struct us_data *us, struct scsi_cmnd *srb)
2252{ 2252{
2253 int result; 2253 int result;
2254 struct ene_ub6250_info *info = (struct ene_ub6250_info *)us->extra; 2254 struct ene_ub6250_info *info = (struct ene_ub6250_info *)us->extra;
diff --git a/drivers/usb/storage/freecom.c b/drivers/usb/storage/freecom.c
index 03d4a873748c..fa1615748475 100644
--- a/drivers/usb/storage/freecom.c
+++ b/drivers/usb/storage/freecom.c
@@ -119,7 +119,7 @@ static int init_freecom(struct us_data *us);
119{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 119{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
120 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 120 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
121 121
122struct usb_device_id freecom_usb_ids[] = { 122static struct usb_device_id freecom_usb_ids[] = {
123# include "unusual_freecom.h" 123# include "unusual_freecom.h"
124 { } /* Terminating entry */ 124 { } /* Terminating entry */
125}; 125};
diff --git a/drivers/usb/storage/isd200.c b/drivers/usb/storage/isd200.c
index 93d359f4d6a7..bd5502700831 100644
--- a/drivers/usb/storage/isd200.c
+++ b/drivers/usb/storage/isd200.c
@@ -76,7 +76,7 @@ static int isd200_Initialization(struct us_data *us);
76{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 76{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
77 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 77 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
78 78
79struct usb_device_id isd200_usb_ids[] = { 79static struct usb_device_id isd200_usb_ids[] = {
80# include "unusual_isd200.h" 80# include "unusual_isd200.h"
81 { } /* Terminating entry */ 81 { } /* Terminating entry */
82}; 82};
diff --git a/drivers/usb/storage/jumpshot.c b/drivers/usb/storage/jumpshot.c
index 54b71650b69c..a19211b5c265 100644
--- a/drivers/usb/storage/jumpshot.c
+++ b/drivers/usb/storage/jumpshot.c
@@ -71,7 +71,7 @@ MODULE_LICENSE("GPL");
71{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 71{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
72 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 72 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
73 73
74struct usb_device_id jumpshot_usb_ids[] = { 74static struct usb_device_id jumpshot_usb_ids[] = {
75# include "unusual_jumpshot.h" 75# include "unusual_jumpshot.h"
76 { } /* Terminating entry */ 76 { } /* Terminating entry */
77}; 77};
diff --git a/drivers/usb/storage/karma.c b/drivers/usb/storage/karma.c
index 35181e29124d..e720f8ebdf9f 100644
--- a/drivers/usb/storage/karma.c
+++ b/drivers/usb/storage/karma.c
@@ -59,7 +59,7 @@ static int rio_karma_init(struct us_data *us);
59{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 59{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
60 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 60 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
61 61
62struct usb_device_id karma_usb_ids[] = { 62static struct usb_device_id karma_usb_ids[] = {
63# include "unusual_karma.h" 63# include "unusual_karma.h"
64 { } /* Terminating entry */ 64 { } /* Terminating entry */
65}; 65};
diff --git a/drivers/usb/storage/onetouch.c b/drivers/usb/storage/onetouch.c
index 721c8c587305..d75155c38200 100644
--- a/drivers/usb/storage/onetouch.c
+++ b/drivers/usb/storage/onetouch.c
@@ -69,7 +69,7 @@ struct usb_onetouch {
69{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 69{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
70 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 70 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
71 71
72struct usb_device_id onetouch_usb_ids[] = { 72static struct usb_device_id onetouch_usb_ids[] = {
73# include "unusual_onetouch.h" 73# include "unusual_onetouch.h"
74 { } /* Terminating entry */ 74 { } /* Terminating entry */
75}; 75};
diff --git a/drivers/usb/storage/realtek_cr.c b/drivers/usb/storage/realtek_cr.c
index c41cd30d2c01..1f62723ef1a8 100644
--- a/drivers/usb/storage/realtek_cr.c
+++ b/drivers/usb/storage/realtek_cr.c
@@ -398,10 +398,9 @@ static int rts51x_write_mem(struct us_data *us, u16 addr, u8 *data, u16 len)
398 u8 cmnd[12] = { 0 }; 398 u8 cmnd[12] = { 0 };
399 u8 *buf; 399 u8 *buf;
400 400
401 buf = kmalloc(len, GFP_NOIO); 401 buf = kmemdup(data, len, GFP_NOIO);
402 if (buf == NULL) 402 if (buf == NULL)
403 return USB_STOR_TRANSPORT_ERROR; 403 return USB_STOR_TRANSPORT_ERROR;
404 memcpy(buf, data, len);
405 404
406 US_DEBUGP("%s, addr = 0x%x, len = %d\n", __func__, addr, len); 405 US_DEBUGP("%s, addr = 0x%x, len = %d\n", __func__, addr, len);
407 406
@@ -507,15 +506,14 @@ static int enable_oscillator(struct us_data *us)
507static int __do_config_autodelink(struct us_data *us, u8 *data, u16 len) 506static int __do_config_autodelink(struct us_data *us, u8 *data, u16 len)
508{ 507{
509 int retval; 508 int retval;
510 u16 addr = 0xFE47;
511 u8 cmnd[12] = {0}; 509 u8 cmnd[12] = {0};
512 510
513 US_DEBUGP("%s, addr = 0x%x, len = %d\n", __FUNCTION__, addr, len); 511 US_DEBUGP("%s, addr = 0xfe47, len = %d\n", __FUNCTION__, len);
514 512
515 cmnd[0] = 0xF0; 513 cmnd[0] = 0xF0;
516 cmnd[1] = 0x0E; 514 cmnd[1] = 0x0E;
517 cmnd[2] = (u8)(addr >> 8); 515 cmnd[2] = 0xfe;
518 cmnd[3] = (u8)addr; 516 cmnd[3] = 0x47;
519 cmnd[4] = (u8)(len >> 8); 517 cmnd[4] = (u8)(len >> 8);
520 cmnd[5] = (u8)len; 518 cmnd[5] = (u8)len;
521 519
@@ -818,7 +816,7 @@ static inline int working_scsi(struct scsi_cmnd *srb)
818 return 1; 816 return 1;
819} 817}
820 818
821void rts51x_invoke_transport(struct scsi_cmnd *srb, struct us_data *us) 819static void rts51x_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
822{ 820{
823 struct rts51x_chip *chip = (struct rts51x_chip *)(us->extra); 821 struct rts51x_chip *chip = (struct rts51x_chip *)(us->extra);
824 static int card_first_show = 1; 822 static int card_first_show = 1;
@@ -977,7 +975,7 @@ static void realtek_cr_destructor(void *extra)
977} 975}
978 976
979#ifdef CONFIG_PM 977#ifdef CONFIG_PM
980int realtek_cr_suspend(struct usb_interface *iface, pm_message_t message) 978static int realtek_cr_suspend(struct usb_interface *iface, pm_message_t message)
981{ 979{
982 struct us_data *us = usb_get_intfdata(iface); 980 struct us_data *us = usb_get_intfdata(iface);
983 981
diff --git a/drivers/usb/storage/sddr09.c b/drivers/usb/storage/sddr09.c
index 83ee49e737bd..425df7df2e56 100644
--- a/drivers/usb/storage/sddr09.c
+++ b/drivers/usb/storage/sddr09.c
@@ -71,7 +71,7 @@ static int usb_stor_sddr09_init(struct us_data *us);
71{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 71{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
72 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 72 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
73 73
74struct usb_device_id sddr09_usb_ids[] = { 74static struct usb_device_id sddr09_usb_ids[] = {
75# include "unusual_sddr09.h" 75# include "unusual_sddr09.h"
76 { } /* Terminating entry */ 76 { } /* Terminating entry */
77}; 77};
diff --git a/drivers/usb/storage/sddr55.c b/drivers/usb/storage/sddr55.c
index 8983ec2ffb5a..e4ca5fcb7cc3 100644
--- a/drivers/usb/storage/sddr55.c
+++ b/drivers/usb/storage/sddr55.c
@@ -48,7 +48,7 @@ MODULE_LICENSE("GPL");
48{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 48{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
49 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 49 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
50 50
51struct usb_device_id sddr55_usb_ids[] = { 51static struct usb_device_id sddr55_usb_ids[] = {
52# include "unusual_sddr55.h" 52# include "unusual_sddr55.h"
53 { } /* Terminating entry */ 53 { } /* Terminating entry */
54}; 54};
diff --git a/drivers/usb/storage/shuttle_usbat.c b/drivers/usb/storage/shuttle_usbat.c
index a4c02751af4e..1369d2590616 100644
--- a/drivers/usb/storage/shuttle_usbat.c
+++ b/drivers/usb/storage/shuttle_usbat.c
@@ -170,7 +170,7 @@ static int init_usbat_flash(struct us_data *us);
170{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \ 170{ USB_DEVICE_VER(id_vendor, id_product, bcdDeviceMin, bcdDeviceMax), \
171 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) } 171 .driver_info = (flags)|(USB_US_TYPE_STOR<<24) }
172 172
173struct usb_device_id usbat_usb_ids[] = { 173static struct usb_device_id usbat_usb_ids[] = {
174# include "unusual_usbat.h" 174# include "unusual_usbat.h"
175 { } /* Terminating entry */ 175 { } /* Terminating entry */
176}; 176};
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index aa84b3d77274..3dd7da9fd504 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -1074,6 +1074,7 @@ static struct usb_driver usb_storage_driver = {
1074 .id_table = usb_storage_usb_ids, 1074 .id_table = usb_storage_usb_ids,
1075 .supports_autosuspend = 1, 1075 .supports_autosuspend = 1,
1076 .soft_unbind = 1, 1076 .soft_unbind = 1,
1077 .no_dynamic_id = 1,
1077}; 1078};
1078 1079
1079static int __init usb_stor_init(void) 1080static int __init usb_stor_init(void)
diff --git a/drivers/usb/usb-skeleton.c b/drivers/usb/usb-skeleton.c
index 5c6c1bdbd455..8efeae24764f 100644
--- a/drivers/usb/usb-skeleton.c
+++ b/drivers/usb/usb-skeleton.c
@@ -27,6 +27,8 @@
27#define USB_SKEL_VENDOR_ID 0xfff0 27#define USB_SKEL_VENDOR_ID 0xfff0
28#define USB_SKEL_PRODUCT_ID 0xfff0 28#define USB_SKEL_PRODUCT_ID 0xfff0
29 29
30static DEFINE_MUTEX(skel_mutex);
31
30/* table of devices that work with this driver */ 32/* table of devices that work with this driver */
31static const struct usb_device_id skel_table[] = { 33static const struct usb_device_id skel_table[] = {
32 { USB_DEVICE(USB_SKEL_VENDOR_ID, USB_SKEL_PRODUCT_ID) }, 34 { USB_DEVICE(USB_SKEL_VENDOR_ID, USB_SKEL_PRODUCT_ID) },
@@ -60,7 +62,6 @@ struct usb_skel {
60 __u8 bulk_in_endpointAddr; /* the address of the bulk in endpoint */ 62 __u8 bulk_in_endpointAddr; /* the address of the bulk in endpoint */
61 __u8 bulk_out_endpointAddr; /* the address of the bulk out endpoint */ 63 __u8 bulk_out_endpointAddr; /* the address of the bulk out endpoint */
62 int errors; /* the last request tanked */ 64 int errors; /* the last request tanked */
63 int open_count; /* count the number of openers */
64 bool ongoing_read; /* a read is going on */ 65 bool ongoing_read; /* a read is going on */
65 bool processed_urb; /* indicates we haven't processed the urb */ 66 bool processed_urb; /* indicates we haven't processed the urb */
66 spinlock_t err_lock; /* lock for errors */ 67 spinlock_t err_lock; /* lock for errors */
@@ -100,39 +101,37 @@ static int skel_open(struct inode *inode, struct file *file)
100 goto exit; 101 goto exit;
101 } 102 }
102 103
104 mutex_lock(&skel_mutex);
103 dev = usb_get_intfdata(interface); 105 dev = usb_get_intfdata(interface);
104 if (!dev) { 106 if (!dev) {
107 mutex_unlock(&skel_mutex);
105 retval = -ENODEV; 108 retval = -ENODEV;
106 goto exit; 109 goto exit;
107 } 110 }
108 111
109 /* increment our usage count for the device */ 112 /* increment our usage count for the device */
110 kref_get(&dev->kref); 113 kref_get(&dev->kref);
114 mutex_unlock(&skel_mutex);
111 115
112 /* lock the device to allow correctly handling errors 116 /* lock the device to allow correctly handling errors
113 * in resumption */ 117 * in resumption */
114 mutex_lock(&dev->io_mutex); 118 mutex_lock(&dev->io_mutex);
119 if (!dev->interface) {
120 retval = -ENODEV;
121 goto out_err;
122 }
115 123
116 if (!dev->open_count++) { 124 retval = usb_autopm_get_interface(interface);
117 retval = usb_autopm_get_interface(interface); 125 if (retval)
118 if (retval) { 126 goto out_err;
119 dev->open_count--;
120 mutex_unlock(&dev->io_mutex);
121 kref_put(&dev->kref, skel_delete);
122 goto exit;
123 }
124 } /* else { //uncomment this block if you want exclusive open
125 retval = -EBUSY;
126 dev->open_count--;
127 mutex_unlock(&dev->io_mutex);
128 kref_put(&dev->kref, skel_delete);
129 goto exit;
130 } */
131 /* prevent the device from being autosuspended */
132 127
133 /* save our object in the file's private structure */ 128 /* save our object in the file's private structure */
134 file->private_data = dev; 129 file->private_data = dev;
130
131out_err:
135 mutex_unlock(&dev->io_mutex); 132 mutex_unlock(&dev->io_mutex);
133 if (retval)
134 kref_put(&dev->kref, skel_delete);
136 135
137exit: 136exit:
138 return retval; 137 return retval;
@@ -148,7 +147,7 @@ static int skel_release(struct inode *inode, struct file *file)
148 147
149 /* allow the device to be autosuspended */ 148 /* allow the device to be autosuspended */
150 mutex_lock(&dev->io_mutex); 149 mutex_lock(&dev->io_mutex);
151 if (!--dev->open_count && dev->interface) 150 if (dev->interface)
152 usb_autopm_put_interface(dev->interface); 151 usb_autopm_put_interface(dev->interface);
153 mutex_unlock(&dev->io_mutex); 152 mutex_unlock(&dev->io_mutex);
154 153
@@ -612,7 +611,6 @@ static void skel_disconnect(struct usb_interface *interface)
612 int minor = interface->minor; 611 int minor = interface->minor;
613 612
614 dev = usb_get_intfdata(interface); 613 dev = usb_get_intfdata(interface);
615 usb_set_intfdata(interface, NULL);
616 614
617 /* give back our minor */ 615 /* give back our minor */
618 usb_deregister_dev(interface, &skel_class); 616 usb_deregister_dev(interface, &skel_class);
@@ -624,8 +622,12 @@ static void skel_disconnect(struct usb_interface *interface)
624 622
625 usb_kill_anchored_urbs(&dev->submitted); 623 usb_kill_anchored_urbs(&dev->submitted);
626 624
625 mutex_lock(&skel_mutex);
626 usb_set_intfdata(interface, NULL);
627
627 /* decrement our usage count */ 628 /* decrement our usage count */
628 kref_put(&dev->kref, skel_delete); 629 kref_put(&dev->kref, skel_delete);
630 mutex_unlock(&skel_mutex);
629 631
630 dev_info(&interface->dev, "USB Skeleton #%d now disconnected", minor); 632 dev_info(&interface->dev, "USB Skeleton #%d now disconnected", minor);
631} 633}
diff --git a/drivers/usb/wusbcore/Kconfig b/drivers/usb/wusbcore/Kconfig
index eb09a0a14a80..0ead8826ec79 100644
--- a/drivers/usb/wusbcore/Kconfig
+++ b/drivers/usb/wusbcore/Kconfig
@@ -5,6 +5,7 @@ config USB_WUSB
5 tristate "Enable Wireless USB extensions (EXPERIMENTAL)" 5 tristate "Enable Wireless USB extensions (EXPERIMENTAL)"
6 depends on EXPERIMENTAL 6 depends on EXPERIMENTAL
7 depends on USB 7 depends on USB
8 depends on PCI
8 select UWB 9 select UWB
9 select CRYPTO 10 select CRYPTO
10 select CRYPTO_BLKCIPHER 11 select CRYPTO_BLKCIPHER
diff --git a/drivers/usb/wusbcore/security.c b/drivers/usb/wusbcore/security.c
index 371f61733f05..fa810a83e830 100644
--- a/drivers/usb/wusbcore/security.c
+++ b/drivers/usb/wusbcore/security.c
@@ -354,7 +354,7 @@ int wusb_dev_4way_handshake(struct wusbhc *wusbhc, struct wusb_dev *wusb_dev,
354 struct wusb_keydvt_in keydvt_in; 354 struct wusb_keydvt_in keydvt_in;
355 struct wusb_keydvt_out keydvt_out; 355 struct wusb_keydvt_out keydvt_out;
356 356
357 hs = kzalloc(3*sizeof(hs[0]), GFP_KERNEL); 357 hs = kcalloc(3, sizeof(hs[0]), GFP_KERNEL);
358 if (hs == NULL) { 358 if (hs == NULL) {
359 dev_err(dev, "can't allocate handshake data\n"); 359 dev_err(dev, "can't allocate handshake data\n");
360 goto error_kzalloc; 360 goto error_kzalloc;
diff --git a/drivers/uwb/est.c b/drivers/uwb/est.c
index de81ebf51784..86ed7e61e597 100644
--- a/drivers/uwb/est.c
+++ b/drivers/uwb/est.c
@@ -184,7 +184,7 @@ int uwb_est_create(void)
184 184
185 uwb_est_size = 2; 185 uwb_est_size = 2;
186 uwb_est_used = 0; 186 uwb_est_used = 0;
187 uwb_est = kzalloc(uwb_est_size * sizeof(uwb_est[0]), GFP_KERNEL); 187 uwb_est = kcalloc(uwb_est_size, sizeof(uwb_est[0]), GFP_KERNEL);
188 if (uwb_est == NULL) 188 if (uwb_est == NULL)
189 return -ENOMEM; 189 return -ENOMEM;
190 190
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index d837d63c456f..eb3c5eea1a0f 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -328,7 +328,7 @@ static void mxsfb_enable_controller(struct fb_info *fb_info)
328 328
329 dev_dbg(&host->pdev->dev, "%s\n", __func__); 329 dev_dbg(&host->pdev->dev, "%s\n", __func__);
330 330
331 clk_enable(host->clk); 331 clk_prepare_enable(host->clk);
332 clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U); 332 clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U);
333 333
334 /* if it was disabled, re-enable the mode again */ 334 /* if it was disabled, re-enable the mode again */
@@ -368,7 +368,7 @@ static void mxsfb_disable_controller(struct fb_info *fb_info)
368 368
369 writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR); 369 writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR);
370 370
371 clk_disable(host->clk); 371 clk_disable_unprepare(host->clk);
372 372
373 host->enabled = 0; 373 host->enabled = 0;
374} 374}
@@ -668,7 +668,7 @@ static int __devinit mxsfb_restore_mode(struct mxsfb_info *host)
668 line_count = fb_info->fix.smem_len / fb_info->fix.line_length; 668 line_count = fb_info->fix.smem_len / fb_info->fix.line_length;
669 fb_info->fix.ypanstep = 1; 669 fb_info->fix.ypanstep = 1;
670 670
671 clk_enable(host->clk); 671 clk_prepare_enable(host->clk);
672 host->enabled = 1; 672 host->enabled = 1;
673 673
674 return 0; 674 return 0;
@@ -841,7 +841,7 @@ static int __devinit mxsfb_probe(struct platform_device *pdev)
841 841
842error_register: 842error_register:
843 if (host->enabled) 843 if (host->enabled)
844 clk_disable(host->clk); 844 clk_disable_unprepare(host->clk);
845 fb_destroy_modelist(&fb_info->modelist); 845 fb_destroy_modelist(&fb_info->modelist);
846error_init_fb: 846error_init_fb:
847 kfree(fb_info->pseudo_palette); 847 kfree(fb_info->pseudo_palette);
diff --git a/drivers/video/omap2/omapfb/Kconfig b/drivers/video/omap2/omapfb/Kconfig
index 83d3fe7ec9ae..4ea17dc3258c 100644
--- a/drivers/video/omap2/omapfb/Kconfig
+++ b/drivers/video/omap2/omapfb/Kconfig
@@ -1,6 +1,6 @@
1menuconfig FB_OMAP2 1menuconfig FB_OMAP2
2 tristate "OMAP2+ frame buffer support" 2 tristate "OMAP2+ frame buffer support"
3 depends on FB && OMAP2_DSS 3 depends on FB && OMAP2_DSS && !DRM_OMAP
4 4
5 select OMAP2_VRAM 5 select OMAP2_VRAM
6 select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3 6 select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 87445b2d72a7..00562566ef5f 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -35,6 +35,11 @@
35 35
36#define DRV_NAME "AT91SAM9 Watchdog" 36#define DRV_NAME "AT91SAM9 Watchdog"
37 37
38#define wdt_read(field) \
39 __raw_readl(at91wdt_private.base + field)
40#define wdt_write(field, val) \
41 __raw_writel((val), at91wdt_private.base + field)
42
38/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, 43/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
39 * use this to convert a watchdog 44 * use this to convert a watchdog
40 * value from/to milliseconds. 45 * value from/to milliseconds.
@@ -63,6 +68,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
63static void at91_ping(unsigned long data); 68static void at91_ping(unsigned long data);
64 69
65static struct { 70static struct {
71 void __iomem *base;
66 unsigned long next_heartbeat; /* the next_heartbeat for the timer */ 72 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
67 unsigned long open; 73 unsigned long open;
68 char expect_close; 74 char expect_close;
@@ -77,7 +83,7 @@ static struct {
77 */ 83 */
78static inline void at91_wdt_reset(void) 84static inline void at91_wdt_reset(void)
79{ 85{
80 at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); 86 wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
81} 87}
82 88
83/* 89/*
@@ -132,7 +138,7 @@ static int at91_wdt_settimeout(unsigned int timeout)
132 unsigned int mr; 138 unsigned int mr;
133 139
134 /* Check if disabled */ 140 /* Check if disabled */
135 mr = at91_sys_read(AT91_WDT_MR); 141 mr = wdt_read(AT91_WDT_MR);
136 if (mr & AT91_WDT_WDDIS) { 142 if (mr & AT91_WDT_WDDIS) {
137 printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n"); 143 printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n");
138 return -EIO; 144 return -EIO;
@@ -149,7 +155,7 @@ static int at91_wdt_settimeout(unsigned int timeout)
149 | AT91_WDT_WDDBGHLT /* disabled in debug mode */ 155 | AT91_WDT_WDDBGHLT /* disabled in debug mode */
150 | AT91_WDT_WDD /* restart at any time */ 156 | AT91_WDT_WDD /* restart at any time */
151 | (timeout & AT91_WDT_WDV); /* timer value */ 157 | (timeout & AT91_WDT_WDV); /* timer value */
152 at91_sys_write(AT91_WDT_MR, reg); 158 wdt_write(AT91_WDT_MR, reg);
153 159
154 return 0; 160 return 0;
155} 161}
@@ -248,12 +254,22 @@ static struct miscdevice at91wdt_miscdev = {
248 254
249static int __init at91wdt_probe(struct platform_device *pdev) 255static int __init at91wdt_probe(struct platform_device *pdev)
250{ 256{
257 struct resource *r;
251 int res; 258 int res;
252 259
253 if (at91wdt_miscdev.parent) 260 if (at91wdt_miscdev.parent)
254 return -EBUSY; 261 return -EBUSY;
255 at91wdt_miscdev.parent = &pdev->dev; 262 at91wdt_miscdev.parent = &pdev->dev;
256 263
264 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
265 if (!r)
266 return -ENODEV;
267 at91wdt_private.base = ioremap(r->start, resource_size(r));
268 if (!at91wdt_private.base) {
269 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
270 return -ENOMEM;
271 }
272
257 /* Set watchdog */ 273 /* Set watchdog */
258 res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); 274 res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
259 if (res) 275 if (res)
diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h
index 757f9cab5c82..c6fbb2e6c41b 100644
--- a/drivers/watchdog/at91sam9_wdt.h
+++ b/drivers/watchdog/at91sam9_wdt.h
@@ -16,11 +16,11 @@
16#ifndef AT91_WDT_H 16#ifndef AT91_WDT_H
17#define AT91_WDT_H 17#define AT91_WDT_H
18 18
19#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ 19#define AT91_WDT_CR 0x00 /* Watchdog Control Register */
20#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ 20#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
21#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ 21#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
22 22
23#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ 23#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
24#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ 24#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
25#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ 25#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
26#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ 26#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
@@ -30,7 +30,7 @@
30#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ 30#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
31#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ 31#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
32 32
33#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ 33#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
34#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ 34#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
35#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ 35#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
36 36
diff --git a/fs/Kconfig b/fs/Kconfig
index 30145d886bc2..d621f02a3f9e 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -218,6 +218,8 @@ source "fs/exofs/Kconfig"
218 218
219endif # MISC_FILESYSTEMS 219endif # MISC_FILESYSTEMS
220 220
221source "fs/exofs/Kconfig.ore"
222
221menuconfig NETWORK_FILESYSTEMS 223menuconfig NETWORK_FILESYSTEMS
222 bool "Network File Systems" 224 bool "Network File Systems"
223 default y 225 default y
diff --git a/fs/char_dev.c b/fs/char_dev.c
index dca9e5e0f73b..3f152b92a94a 100644
--- a/fs/char_dev.c
+++ b/fs/char_dev.c
@@ -272,7 +272,7 @@ int __register_chrdev(unsigned int major, unsigned int baseminor,
272 cd = __register_chrdev_region(major, baseminor, count, name); 272 cd = __register_chrdev_region(major, baseminor, count, name);
273 if (IS_ERR(cd)) 273 if (IS_ERR(cd))
274 return PTR_ERR(cd); 274 return PTR_ERR(cd);
275 275
276 cdev = cdev_alloc(); 276 cdev = cdev_alloc();
277 if (!cdev) 277 if (!cdev)
278 goto out2; 278 goto out2;
@@ -280,7 +280,7 @@ int __register_chrdev(unsigned int major, unsigned int baseminor,
280 cdev->owner = fops->owner; 280 cdev->owner = fops->owner;
281 cdev->ops = fops; 281 cdev->ops = fops;
282 kobject_set_name(&cdev->kobj, "%s", name); 282 kobject_set_name(&cdev->kobj, "%s", name);
283 283
284 err = cdev_add(cdev, MKDEV(cd->major, baseminor), count); 284 err = cdev_add(cdev, MKDEV(cd->major, baseminor), count);
285 if (err) 285 if (err)
286 goto out; 286 goto out;
@@ -405,7 +405,7 @@ static int chrdev_open(struct inode *inode, struct file *filp)
405 goto out_cdev_put; 405 goto out_cdev_put;
406 406
407 if (filp->f_op->open) { 407 if (filp->f_op->open) {
408 ret = filp->f_op->open(inode,filp); 408 ret = filp->f_op->open(inode, filp);
409 if (ret) 409 if (ret)
410 goto out_cdev_put; 410 goto out_cdev_put;
411 } 411 }
diff --git a/fs/exofs/Kconfig b/fs/exofs/Kconfig
index da42f32c49be..86194b2f799d 100644
--- a/fs/exofs/Kconfig
+++ b/fs/exofs/Kconfig
@@ -1,14 +1,3 @@
1# Note ORE needs to "select ASYNC_XOR". So Not to force multiple selects
2# for every ORE user we do it like this. Any user should add itself here
3# at the "depends on EXOFS_FS || ..." with an ||. The dependencies are
4# selected here, and we default to "ON". So in effect it is like been
5# selected by any of the users.
6config ORE
7 tristate
8 depends on EXOFS_FS || PNFS_OBJLAYOUT
9 select ASYNC_XOR
10 default SCSI_OSD_ULD
11
12config EXOFS_FS 1config EXOFS_FS
13 tristate "exofs: OSD based file system support" 2 tristate "exofs: OSD based file system support"
14 depends on SCSI_OSD_ULD 3 depends on SCSI_OSD_ULD
diff --git a/fs/exofs/Kconfig.ore b/fs/exofs/Kconfig.ore
new file mode 100644
index 000000000000..1ca7fb7b6ba8
--- /dev/null
+++ b/fs/exofs/Kconfig.ore
@@ -0,0 +1,12 @@
1# ORE - Objects Raid Engine (libore.ko)
2#
3# Note ORE needs to "select ASYNC_XOR". So Not to force multiple selects
4# for every ORE user we do it like this. Any user should add itself here
5# at the "depends on EXOFS_FS || ..." with an ||. The dependencies are
6# selected here, and we default to "ON". So in effect it is like been
7# selected by any of the users.
8config ORE
9 tristate
10 depends on EXOFS_FS || PNFS_OBJLAYOUT
11 select ASYNC_XOR
12 default SCSI_OSD_ULD
diff --git a/fs/exofs/ore.c b/fs/exofs/ore.c
index d271ad837202..49cf230554a2 100644
--- a/fs/exofs/ore.c
+++ b/fs/exofs/ore.c
@@ -266,7 +266,7 @@ int ore_get_rw_state(struct ore_layout *layout, struct ore_components *oc,
266 266
267 /* first/last seg is split */ 267 /* first/last seg is split */
268 num_raid_units += layout->group_width; 268 num_raid_units += layout->group_width;
269 sgs_per_dev = div_u64(num_raid_units, data_devs); 269 sgs_per_dev = div_u64(num_raid_units, data_devs) + 2;
270 } else { 270 } else {
271 /* For Writes add parity pages array. */ 271 /* For Writes add parity pages array. */
272 max_par_pages = num_raid_units * pages_in_unit * 272 max_par_pages = num_raid_units * pages_in_unit *
@@ -445,10 +445,10 @@ int ore_check_io(struct ore_io_state *ios, ore_on_dev_error on_dev_error)
445 u64 residual = ios->reading ? 445 u64 residual = ios->reading ?
446 or->in.residual : or->out.residual; 446 or->in.residual : or->out.residual;
447 u64 offset = (ios->offset + ios->length) - residual; 447 u64 offset = (ios->offset + ios->length) - residual;
448 struct ore_dev *od = ios->oc->ods[ 448 unsigned dev = per_dev->dev - ios->oc->first_dev;
449 per_dev->dev - ios->oc->first_dev]; 449 struct ore_dev *od = ios->oc->ods[dev];
450 450
451 on_dev_error(ios, od, per_dev->dev, osi.osd_err_pri, 451 on_dev_error(ios, od, dev, osi.osd_err_pri,
452 offset, residual); 452 offset, residual);
453 } 453 }
454 if (osi.osd_err_pri >= acumulated_osd_err) { 454 if (osi.osd_err_pri >= acumulated_osd_err) {
diff --git a/fs/exofs/ore_raid.c b/fs/exofs/ore_raid.c
index 29c47e5c4a86..d222c77cfa1b 100644
--- a/fs/exofs/ore_raid.c
+++ b/fs/exofs/ore_raid.c
@@ -328,8 +328,8 @@ static int _alloc_read_4_write(struct ore_io_state *ios)
328/* @si contains info of the to-be-inserted page. Update of @si should be 328/* @si contains info of the to-be-inserted page. Update of @si should be
329 * maintained by caller. Specificaly si->dev, si->obj_offset, ... 329 * maintained by caller. Specificaly si->dev, si->obj_offset, ...
330 */ 330 */
331static int _add_to_read_4_write(struct ore_io_state *ios, 331static int _add_to_r4w(struct ore_io_state *ios, struct ore_striping_info *si,
332 struct ore_striping_info *si, struct page *page) 332 struct page *page, unsigned pg_len)
333{ 333{
334 struct request_queue *q; 334 struct request_queue *q;
335 struct ore_per_dev_state *per_dev; 335 struct ore_per_dev_state *per_dev;
@@ -366,17 +366,60 @@ static int _add_to_read_4_write(struct ore_io_state *ios,
366 _ore_add_sg_seg(per_dev, gap, true); 366 _ore_add_sg_seg(per_dev, gap, true);
367 } 367 }
368 q = osd_request_queue(ore_comp_dev(read_ios->oc, per_dev->dev)); 368 q = osd_request_queue(ore_comp_dev(read_ios->oc, per_dev->dev));
369 added_len = bio_add_pc_page(q, per_dev->bio, page, PAGE_SIZE, 0); 369 added_len = bio_add_pc_page(q, per_dev->bio, page, pg_len,
370 if (unlikely(added_len != PAGE_SIZE)) { 370 si->obj_offset % PAGE_SIZE);
371 if (unlikely(added_len != pg_len)) {
371 ORE_DBGMSG("Failed to bio_add_pc_page bi_vcnt=%d\n", 372 ORE_DBGMSG("Failed to bio_add_pc_page bi_vcnt=%d\n",
372 per_dev->bio->bi_vcnt); 373 per_dev->bio->bi_vcnt);
373 return -ENOMEM; 374 return -ENOMEM;
374 } 375 }
375 376
376 per_dev->length += PAGE_SIZE; 377 per_dev->length += pg_len;
377 return 0; 378 return 0;
378} 379}
379 380
381/* read the beginning of an unaligned first page */
382static int _add_to_r4w_first_page(struct ore_io_state *ios, struct page *page)
383{
384 struct ore_striping_info si;
385 unsigned pg_len;
386
387 ore_calc_stripe_info(ios->layout, ios->offset, 0, &si);
388
389 pg_len = si.obj_offset % PAGE_SIZE;
390 si.obj_offset -= pg_len;
391
392 ORE_DBGMSG("offset=0x%llx len=0x%x index=0x%lx dev=%x\n",
393 _LLU(si.obj_offset), pg_len, page->index, si.dev);
394
395 return _add_to_r4w(ios, &si, page, pg_len);
396}
397
398/* read the end of an incomplete last page */
399static int _add_to_r4w_last_page(struct ore_io_state *ios, u64 *offset)
400{
401 struct ore_striping_info si;
402 struct page *page;
403 unsigned pg_len, p, c;
404
405 ore_calc_stripe_info(ios->layout, *offset, 0, &si);
406
407 p = si.unit_off / PAGE_SIZE;
408 c = _dev_order(ios->layout->group_width * ios->layout->mirrors_p1,
409 ios->layout->mirrors_p1, si.par_dev, si.dev);
410 page = ios->sp2d->_1p_stripes[p].pages[c];
411
412 pg_len = PAGE_SIZE - (si.unit_off % PAGE_SIZE);
413 *offset += pg_len;
414
415 ORE_DBGMSG("p=%d, c=%d next-offset=0x%llx len=0x%x dev=%x par_dev=%d\n",
416 p, c, _LLU(*offset), pg_len, si.dev, si.par_dev);
417
418 BUG_ON(!page);
419
420 return _add_to_r4w(ios, &si, page, pg_len);
421}
422
380static void _mark_read4write_pages_uptodate(struct ore_io_state *ios, int ret) 423static void _mark_read4write_pages_uptodate(struct ore_io_state *ios, int ret)
381{ 424{
382 struct bio_vec *bv; 425 struct bio_vec *bv;
@@ -444,9 +487,13 @@ static int _read_4_write(struct ore_io_state *ios)
444 struct page **pp = &_1ps->pages[c]; 487 struct page **pp = &_1ps->pages[c];
445 bool uptodate; 488 bool uptodate;
446 489
447 if (*pp) 490 if (*pp) {
491 if (ios->offset % PAGE_SIZE)
492 /* Read the remainder of the page */
493 _add_to_r4w_first_page(ios, *pp);
448 /* to-be-written pages start here */ 494 /* to-be-written pages start here */
449 goto read_last_stripe; 495 goto read_last_stripe;
496 }
450 497
451 *pp = ios->r4w->get_page(ios->private, offset, 498 *pp = ios->r4w->get_page(ios->private, offset,
452 &uptodate); 499 &uptodate);
@@ -454,7 +501,7 @@ static int _read_4_write(struct ore_io_state *ios)
454 return -ENOMEM; 501 return -ENOMEM;
455 502
456 if (!uptodate) 503 if (!uptodate)
457 _add_to_read_4_write(ios, &read_si, *pp); 504 _add_to_r4w(ios, &read_si, *pp, PAGE_SIZE);
458 505
459 /* Mark read-pages to be cache_released */ 506 /* Mark read-pages to be cache_released */
460 _1ps->page_is_read[c] = true; 507 _1ps->page_is_read[c] = true;
@@ -465,8 +512,11 @@ static int _read_4_write(struct ore_io_state *ios)
465 } 512 }
466 513
467read_last_stripe: 514read_last_stripe:
468 offset = ios->offset + (ios->length + PAGE_SIZE - 1) / 515 offset = ios->offset + ios->length;
469 PAGE_SIZE * PAGE_SIZE; 516 if (offset % PAGE_SIZE)
517 _add_to_r4w_last_page(ios, &offset);
518 /* offset will be aligned to next page */
519
470 last_stripe_end = div_u64(offset + bytes_in_stripe - 1, bytes_in_stripe) 520 last_stripe_end = div_u64(offset + bytes_in_stripe - 1, bytes_in_stripe)
471 * bytes_in_stripe; 521 * bytes_in_stripe;
472 if (offset == last_stripe_end) /* Optimize for the aligned case */ 522 if (offset == last_stripe_end) /* Optimize for the aligned case */
@@ -503,7 +553,7 @@ read_last_stripe:
503 /* Mark read-pages to be cache_released */ 553 /* Mark read-pages to be cache_released */
504 _1ps->page_is_read[c] = true; 554 _1ps->page_is_read[c] = true;
505 if (!uptodate) 555 if (!uptodate)
506 _add_to_read_4_write(ios, &read_si, page); 556 _add_to_r4w(ios, &read_si, page, PAGE_SIZE);
507 } 557 }
508 558
509 offset += PAGE_SIZE; 559 offset += PAGE_SIZE;
@@ -551,7 +601,11 @@ int _ore_add_parity_unit(struct ore_io_state *ios,
551 unsigned cur_len) 601 unsigned cur_len)
552{ 602{
553 if (ios->reading) { 603 if (ios->reading) {
554 BUG_ON(per_dev->cur_sg >= ios->sgs_per_dev); 604 if (per_dev->cur_sg >= ios->sgs_per_dev) {
605 ORE_DBGMSG("cur_sg(%d) >= sgs_per_dev(%d)\n" ,
606 per_dev->cur_sg, ios->sgs_per_dev);
607 return -ENOMEM;
608 }
555 _ore_add_sg_seg(per_dev, cur_len, true); 609 _ore_add_sg_seg(per_dev, cur_len, true);
556 } else { 610 } else {
557 struct __stripe_pages_2d *sp2d = ios->sp2d; 611 struct __stripe_pages_2d *sp2d = ios->sp2d;
@@ -612,8 +666,6 @@ int _ore_post_alloc_raid_stuff(struct ore_io_state *ios)
612 return -ENOMEM; 666 return -ENOMEM;
613 } 667 }
614 668
615 BUG_ON(ios->offset % PAGE_SIZE);
616
617 /* Round io down to last full strip */ 669 /* Round io down to last full strip */
618 first_stripe = div_u64(ios->offset, stripe_size); 670 first_stripe = div_u64(ios->offset, stripe_size);
619 last_stripe = div_u64(ios->offset + ios->length, stripe_size); 671 last_stripe = div_u64(ios->offset + ios->length, stripe_size);
diff --git a/fs/ext2/ialloc.c b/fs/ext2/ialloc.c
index cd7f5f424a75..8b15cf8cef37 100644
--- a/fs/ext2/ialloc.c
+++ b/fs/ext2/ialloc.c
@@ -573,8 +573,11 @@ got:
573 inode->i_generation = sbi->s_next_generation++; 573 inode->i_generation = sbi->s_next_generation++;
574 spin_unlock(&sbi->s_next_gen_lock); 574 spin_unlock(&sbi->s_next_gen_lock);
575 if (insert_inode_locked(inode) < 0) { 575 if (insert_inode_locked(inode) < 0) {
576 err = -EINVAL; 576 ext2_error(sb, "ext2_new_inode",
577 goto fail_drop; 577 "inode number already in use - inode=%lu",
578 (unsigned long) ino);
579 err = -EIO;
580 goto fail;
578 } 581 }
579 582
580 dquot_initialize(inode); 583 dquot_initialize(inode);
diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c
index 91a6945af6d8..740cad8dcd8d 100644
--- a/fs/ext2/inode.c
+++ b/fs/ext2/inode.c
@@ -26,7 +26,6 @@
26#include <linux/highuid.h> 26#include <linux/highuid.h>
27#include <linux/pagemap.h> 27#include <linux/pagemap.h>
28#include <linux/quotaops.h> 28#include <linux/quotaops.h>
29#include <linux/module.h>
30#include <linux/writeback.h> 29#include <linux/writeback.h>
31#include <linux/buffer_head.h> 30#include <linux/buffer_head.h>
32#include <linux/mpage.h> 31#include <linux/mpage.h>
@@ -36,10 +35,6 @@
36#include "acl.h" 35#include "acl.h"
37#include "xip.h" 36#include "xip.h"
38 37
39MODULE_AUTHOR("Remy Card and others");
40MODULE_DESCRIPTION("Second Extended Filesystem");
41MODULE_LICENSE("GPL");
42
43static int __ext2_write_inode(struct inode *inode, int do_sync); 38static int __ext2_write_inode(struct inode *inode, int do_sync);
44 39
45/* 40/*
diff --git a/fs/ext2/super.c b/fs/ext2/super.c
index 9b403f064ce0..0090595beb28 100644
--- a/fs/ext2/super.c
+++ b/fs/ext2/super.c
@@ -1520,5 +1520,8 @@ static void __exit exit_ext2_fs(void)
1520 exit_ext2_xattr(); 1520 exit_ext2_xattr();
1521} 1521}
1522 1522
1523MODULE_AUTHOR("Remy Card and others");
1524MODULE_DESCRIPTION("Second Extended Filesystem");
1525MODULE_LICENSE("GPL");
1523module_init(init_ext2_fs) 1526module_init(init_ext2_fs)
1524module_exit(exit_ext2_fs) 1527module_exit(exit_ext2_fs)
diff --git a/fs/ext2/xattr.c b/fs/ext2/xattr.c
index d27b71f1d183..6dcafc7efdfd 100644
--- a/fs/ext2/xattr.c
+++ b/fs/ext2/xattr.c
@@ -54,7 +54,6 @@
54 */ 54 */
55 55
56#include <linux/buffer_head.h> 56#include <linux/buffer_head.h>
57#include <linux/module.h>
58#include <linux/init.h> 57#include <linux/init.h>
59#include <linux/slab.h> 58#include <linux/slab.h>
60#include <linux/mbcache.h> 59#include <linux/mbcache.h>
diff --git a/fs/ext2/xattr_security.c b/fs/ext2/xattr_security.c
index c922adc8ef41..be7a8d02c9a7 100644
--- a/fs/ext2/xattr_security.c
+++ b/fs/ext2/xattr_security.c
@@ -3,7 +3,6 @@
3 * Handler for storing security labels as extended attributes. 3 * Handler for storing security labels as extended attributes.
4 */ 4 */
5 5
6#include <linux/module.h>
7#include <linux/slab.h> 6#include <linux/slab.h>
8#include <linux/string.h> 7#include <linux/string.h>
9#include <linux/fs.h> 8#include <linux/fs.h>
diff --git a/fs/ext2/xattr_trusted.c b/fs/ext2/xattr_trusted.c
index 667e46a8d62d..2989467d3595 100644
--- a/fs/ext2/xattr_trusted.c
+++ b/fs/ext2/xattr_trusted.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2003 by Andreas Gruenbacher, <a.gruenbacher@computer.org> 5 * Copyright (C) 2003 by Andreas Gruenbacher, <a.gruenbacher@computer.org>
6 */ 6 */
7 7
8#include <linux/module.h>
9#include <linux/string.h> 8#include <linux/string.h>
10#include <linux/capability.h> 9#include <linux/capability.h>
11#include <linux/fs.h> 10#include <linux/fs.h>
diff --git a/fs/ext2/xattr_user.c b/fs/ext2/xattr_user.c
index 099d20f47163..f470e44c4b8d 100644
--- a/fs/ext2/xattr_user.c
+++ b/fs/ext2/xattr_user.c
@@ -6,7 +6,6 @@
6 */ 6 */
7 7
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/module.h>
10#include <linux/string.h> 9#include <linux/string.h>
11#include "ext2.h" 10#include "ext2.h"
12#include "xattr.h" 11#include "xattr.h"
diff --git a/fs/ext3/ialloc.c b/fs/ext3/ialloc.c
index 92cc86dfa23d..1cde28438014 100644
--- a/fs/ext3/ialloc.c
+++ b/fs/ext3/ialloc.c
@@ -525,8 +525,12 @@ got:
525 if (IS_DIRSYNC(inode)) 525 if (IS_DIRSYNC(inode))
526 handle->h_sync = 1; 526 handle->h_sync = 1;
527 if (insert_inode_locked(inode) < 0) { 527 if (insert_inode_locked(inode) < 0) {
528 err = -EINVAL; 528 /*
529 goto fail_drop; 529 * Likely a bitmap corruption causing inode to be allocated
530 * twice.
531 */
532 err = -EIO;
533 goto fail;
530 } 534 }
531 spin_lock(&sbi->s_next_gen_lock); 535 spin_lock(&sbi->s_next_gen_lock);
532 inode->i_generation = sbi->s_next_generation++; 536 inode->i_generation = sbi->s_next_generation++;
diff --git a/fs/ext3/inode.c b/fs/ext3/inode.c
index 15cb47088aac..2d0afeca0b47 100644
--- a/fs/ext3/inode.c
+++ b/fs/ext3/inode.c
@@ -22,7 +22,6 @@
22 * Assorted race fixes, rewrite of ext3_get_block() by Al Viro, 2000 22 * Assorted race fixes, rewrite of ext3_get_block() by Al Viro, 2000
23 */ 23 */
24 24
25#include <linux/module.h>
26#include <linux/fs.h> 25#include <linux/fs.h>
27#include <linux/time.h> 26#include <linux/time.h>
28#include <linux/ext3_jbd.h> 27#include <linux/ext3_jbd.h>
@@ -223,8 +222,12 @@ void ext3_evict_inode (struct inode *inode)
223 * 222 *
224 * Note that directories do not have this problem because they don't 223 * Note that directories do not have this problem because they don't
225 * use page cache. 224 * use page cache.
225 *
226 * The s_journal check handles the case when ext3_get_journal() fails
227 * and puts the journal inode.
226 */ 228 */
227 if (inode->i_nlink && ext3_should_journal_data(inode) && 229 if (inode->i_nlink && ext3_should_journal_data(inode) &&
230 EXT3_SB(inode->i_sb)->s_journal &&
228 (S_ISLNK(inode->i_mode) || S_ISREG(inode->i_mode))) { 231 (S_ISLNK(inode->i_mode) || S_ISREG(inode->i_mode))) {
229 tid_t commit_tid = atomic_read(&ei->i_datasync_tid); 232 tid_t commit_tid = atomic_read(&ei->i_datasync_tid);
230 journal_t *journal = EXT3_SB(inode->i_sb)->s_journal; 233 journal_t *journal = EXT3_SB(inode->i_sb)->s_journal;
@@ -1132,9 +1135,11 @@ struct buffer_head *ext3_bread(handle_t *handle, struct inode *inode,
1132 bh = ext3_getblk(handle, inode, block, create, err); 1135 bh = ext3_getblk(handle, inode, block, create, err);
1133 if (!bh) 1136 if (!bh)
1134 return bh; 1137 return bh;
1135 if (buffer_uptodate(bh)) 1138 if (bh_uptodate_or_lock(bh))
1136 return bh; 1139 return bh;
1137 ll_rw_block(READ | REQ_META | REQ_PRIO, 1, &bh); 1140 get_bh(bh);
1141 bh->b_end_io = end_buffer_read_sync;
1142 submit_bh(READ | REQ_META | REQ_PRIO, bh);
1138 wait_on_buffer(bh); 1143 wait_on_buffer(bh);
1139 if (buffer_uptodate(bh)) 1144 if (buffer_uptodate(bh))
1140 return bh; 1145 return bh;
@@ -1617,7 +1622,13 @@ static int ext3_ordered_writepage(struct page *page,
1617 int err; 1622 int err;
1618 1623
1619 J_ASSERT(PageLocked(page)); 1624 J_ASSERT(PageLocked(page));
1620 WARN_ON_ONCE(IS_RDONLY(inode)); 1625 /*
1626 * We don't want to warn for emergency remount. The condition is
1627 * ordered to avoid dereferencing inode->i_sb in non-error case to
1628 * avoid slow-downs.
1629 */
1630 WARN_ON_ONCE(IS_RDONLY(inode) &&
1631 !(EXT3_SB(inode->i_sb)->s_mount_state & EXT3_ERROR_FS));
1621 1632
1622 /* 1633 /*
1623 * We give up here if we're reentered, because it might be for a 1634 * We give up here if we're reentered, because it might be for a
@@ -1692,7 +1703,13 @@ static int ext3_writeback_writepage(struct page *page,
1692 int err; 1703 int err;
1693 1704
1694 J_ASSERT(PageLocked(page)); 1705 J_ASSERT(PageLocked(page));
1695 WARN_ON_ONCE(IS_RDONLY(inode)); 1706 /*
1707 * We don't want to warn for emergency remount. The condition is
1708 * ordered to avoid dereferencing inode->i_sb in non-error case to
1709 * avoid slow-downs.
1710 */
1711 WARN_ON_ONCE(IS_RDONLY(inode) &&
1712 !(EXT3_SB(inode->i_sb)->s_mount_state & EXT3_ERROR_FS));
1696 1713
1697 if (ext3_journal_current_handle()) 1714 if (ext3_journal_current_handle())
1698 goto out_fail; 1715 goto out_fail;
@@ -1735,7 +1752,13 @@ static int ext3_journalled_writepage(struct page *page,
1735 int err; 1752 int err;
1736 1753
1737 J_ASSERT(PageLocked(page)); 1754 J_ASSERT(PageLocked(page));
1738 WARN_ON_ONCE(IS_RDONLY(inode)); 1755 /*
1756 * We don't want to warn for emergency remount. The condition is
1757 * ordered to avoid dereferencing inode->i_sb in non-error case to
1758 * avoid slow-downs.
1759 */
1760 WARN_ON_ONCE(IS_RDONLY(inode) &&
1761 !(EXT3_SB(inode->i_sb)->s_mount_state & EXT3_ERROR_FS));
1739 1762
1740 if (ext3_journal_current_handle()) 1763 if (ext3_journal_current_handle())
1741 goto no_write; 1764 goto no_write;
@@ -2064,12 +2087,10 @@ static int ext3_block_truncate_page(struct inode *inode, loff_t from)
2064 if (PageUptodate(page)) 2087 if (PageUptodate(page))
2065 set_buffer_uptodate(bh); 2088 set_buffer_uptodate(bh);
2066 2089
2067 if (!buffer_uptodate(bh)) { 2090 if (!bh_uptodate_or_lock(bh)) {
2068 err = -EIO; 2091 err = bh_submit_read(bh);
2069 ll_rw_block(READ, 1, &bh);
2070 wait_on_buffer(bh);
2071 /* Uhhuh. Read error. Complain and punt. */ 2092 /* Uhhuh. Read error. Complain and punt. */
2072 if (!buffer_uptodate(bh)) 2093 if (err)
2073 goto unlock; 2094 goto unlock;
2074 } 2095 }
2075 2096
diff --git a/fs/ext3/ioctl.c b/fs/ext3/ioctl.c
index 8e37c41a071b..4af574ce4a46 100644
--- a/fs/ext3/ioctl.c
+++ b/fs/ext3/ioctl.c
@@ -134,10 +134,11 @@ flags_out:
134 goto setversion_out; 134 goto setversion_out;
135 } 135 }
136 136
137 mutex_lock(&inode->i_mutex);
137 handle = ext3_journal_start(inode, 1); 138 handle = ext3_journal_start(inode, 1);
138 if (IS_ERR(handle)) { 139 if (IS_ERR(handle)) {
139 err = PTR_ERR(handle); 140 err = PTR_ERR(handle);
140 goto setversion_out; 141 goto unlock_out;
141 } 142 }
142 err = ext3_reserve_inode_write(handle, inode, &iloc); 143 err = ext3_reserve_inode_write(handle, inode, &iloc);
143 if (err == 0) { 144 if (err == 0) {
@@ -146,6 +147,9 @@ flags_out:
146 err = ext3_mark_iloc_dirty(handle, inode, &iloc); 147 err = ext3_mark_iloc_dirty(handle, inode, &iloc);
147 } 148 }
148 ext3_journal_stop(handle); 149 ext3_journal_stop(handle);
150
151unlock_out:
152 mutex_unlock(&inode->i_mutex);
149setversion_out: 153setversion_out:
150 mnt_drop_write_file(filp); 154 mnt_drop_write_file(filp);
151 return err; 155 return err;
diff --git a/fs/ext3/namei.c b/fs/ext3/namei.c
index d269821203fd..e8e211795e9f 100644
--- a/fs/ext3/namei.c
+++ b/fs/ext3/namei.c
@@ -921,9 +921,12 @@ restart:
921 num++; 921 num++;
922 bh = ext3_getblk(NULL, dir, b++, 0, &err); 922 bh = ext3_getblk(NULL, dir, b++, 0, &err);
923 bh_use[ra_max] = bh; 923 bh_use[ra_max] = bh;
924 if (bh) 924 if (bh && !bh_uptodate_or_lock(bh)) {
925 ll_rw_block(READ | REQ_META | REQ_PRIO, 925 get_bh(bh);
926 1, &bh); 926 bh->b_end_io = end_buffer_read_sync;
927 submit_bh(READ | REQ_META | REQ_PRIO,
928 bh);
929 }
927 } 930 }
928 } 931 }
929 if ((bh = bh_use[ra_ptr++]) == NULL) 932 if ((bh = bh_use[ra_ptr++]) == NULL)
diff --git a/fs/ext3/super.c b/fs/ext3/super.c
index 3a10b884e1be..726c7ef6cdf1 100644
--- a/fs/ext3/super.c
+++ b/fs/ext3/super.c
@@ -2059,9 +2059,10 @@ static int ext3_fill_super (struct super_block *sb, void *data, int silent)
2059 EXT3_SB(sb)->s_mount_state |= EXT3_ORPHAN_FS; 2059 EXT3_SB(sb)->s_mount_state |= EXT3_ORPHAN_FS;
2060 ext3_orphan_cleanup(sb, es); 2060 ext3_orphan_cleanup(sb, es);
2061 EXT3_SB(sb)->s_mount_state &= ~EXT3_ORPHAN_FS; 2061 EXT3_SB(sb)->s_mount_state &= ~EXT3_ORPHAN_FS;
2062 if (needs_recovery) 2062 if (needs_recovery) {
2063 ext3_mark_recovery_complete(sb, es);
2063 ext3_msg(sb, KERN_INFO, "recovery complete"); 2064 ext3_msg(sb, KERN_INFO, "recovery complete");
2064 ext3_mark_recovery_complete(sb, es); 2065 }
2065 ext3_msg(sb, KERN_INFO, "mounted filesystem with %s data mode", 2066 ext3_msg(sb, KERN_INFO, "mounted filesystem with %s data mode",
2066 test_opt(sb,DATA_FLAGS) == EXT3_MOUNT_JOURNAL_DATA ? "journal": 2067 test_opt(sb,DATA_FLAGS) == EXT3_MOUNT_JOURNAL_DATA ? "journal":
2067 test_opt(sb,DATA_FLAGS) == EXT3_MOUNT_ORDERED_DATA ? "ordered": 2068 test_opt(sb,DATA_FLAGS) == EXT3_MOUNT_ORDERED_DATA ? "ordered":
@@ -2229,11 +2230,11 @@ static journal_t *ext3_get_dev_journal(struct super_block *sb,
2229 goto out_bdev; 2230 goto out_bdev;
2230 } 2231 }
2231 journal->j_private = sb; 2232 journal->j_private = sb;
2232 ll_rw_block(READ, 1, &journal->j_sb_buffer); 2233 if (!bh_uptodate_or_lock(journal->j_sb_buffer)) {
2233 wait_on_buffer(journal->j_sb_buffer); 2234 if (bh_submit_read(journal->j_sb_buffer)) {
2234 if (!buffer_uptodate(journal->j_sb_buffer)) { 2235 ext3_msg(sb, KERN_ERR, "I/O error on journal device");
2235 ext3_msg(sb, KERN_ERR, "I/O error on journal device"); 2236 goto out_journal;
2236 goto out_journal; 2237 }
2237 } 2238 }
2238 if (be32_to_cpu(journal->j_superblock->s_nr_users) != 1) { 2239 if (be32_to_cpu(journal->j_superblock->s_nr_users) != 1) {
2239 ext3_msg(sb, KERN_ERR, 2240 ext3_msg(sb, KERN_ERR,
diff --git a/fs/ext3/xattr_security.c b/fs/ext3/xattr_security.c
index 3c218b8a51d4..ea26f2acab94 100644
--- a/fs/ext3/xattr_security.c
+++ b/fs/ext3/xattr_security.c
@@ -3,7 +3,6 @@
3 * Handler for storing security labels as extended attributes. 3 * Handler for storing security labels as extended attributes.
4 */ 4 */
5 5
6#include <linux/module.h>
7#include <linux/slab.h> 6#include <linux/slab.h>
8#include <linux/string.h> 7#include <linux/string.h>
9#include <linux/fs.h> 8#include <linux/fs.h>
diff --git a/fs/ext3/xattr_trusted.c b/fs/ext3/xattr_trusted.c
index dc8edda9ffe0..2526a8829de8 100644
--- a/fs/ext3/xattr_trusted.c
+++ b/fs/ext3/xattr_trusted.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2003 by Andreas Gruenbacher, <a.gruenbacher@computer.org> 5 * Copyright (C) 2003 by Andreas Gruenbacher, <a.gruenbacher@computer.org>
6 */ 6 */
7 7
8#include <linux/module.h>
9#include <linux/string.h> 8#include <linux/string.h>
10#include <linux/capability.h> 9#include <linux/capability.h>
11#include <linux/fs.h> 10#include <linux/fs.h>
diff --git a/fs/ext3/xattr_user.c b/fs/ext3/xattr_user.c
index 7a321974d584..b32e473a1e33 100644
--- a/fs/ext3/xattr_user.c
+++ b/fs/ext3/xattr_user.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2001 by Andreas Gruenbacher, <a.gruenbacher@computer.org> 5 * Copyright (C) 2001 by Andreas Gruenbacher, <a.gruenbacher@computer.org>
6 */ 6 */
7 7
8#include <linux/module.h>
9#include <linux/string.h> 8#include <linux/string.h>
10#include <linux/fs.h> 9#include <linux/fs.h>
11#include <linux/ext3_jbd.h> 10#include <linux/ext3_jbd.h>
diff --git a/fs/ext4/block_validity.c b/fs/ext4/block_validity.c
index 8efb2f0a3447..3f11656bd72e 100644
--- a/fs/ext4/block_validity.c
+++ b/fs/ext4/block_validity.c
@@ -13,7 +13,6 @@
13#include <linux/namei.h> 13#include <linux/namei.h>
14#include <linux/quotaops.h> 14#include <linux/quotaops.h>
15#include <linux/buffer_head.h> 15#include <linux/buffer_head.h>
16#include <linux/module.h>
17#include <linux/swap.h> 16#include <linux/swap.h>
18#include <linux/pagemap.h> 17#include <linux/pagemap.h>
19#include <linux/blkdev.h> 18#include <linux/blkdev.h>
diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c
index 607b1557d292..841faf5fb785 100644
--- a/fs/ext4/extents.c
+++ b/fs/ext4/extents.c
@@ -29,7 +29,6 @@
29 * - smart tree reduction 29 * - smart tree reduction
30 */ 30 */
31 31
32#include <linux/module.h>
33#include <linux/fs.h> 32#include <linux/fs.h>
34#include <linux/time.h> 33#include <linux/time.h>
35#include <linux/jbd2.h> 34#include <linux/jbd2.h>
diff --git a/fs/ext4/indirect.c b/fs/ext4/indirect.c
index 3cfc73fbca8e..830e1b2bf145 100644
--- a/fs/ext4/indirect.c
+++ b/fs/ext4/indirect.c
@@ -20,7 +20,6 @@
20 * (sct@redhat.com), 1993, 1998 20 * (sct@redhat.com), 1993, 1998
21 */ 21 */
22 22
23#include <linux/module.h>
24#include "ext4_jbd2.h" 23#include "ext4_jbd2.h"
25#include "truncate.h" 24#include "truncate.h"
26 25
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 7dbcc3e84570..aa8efa6572d6 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -18,7 +18,6 @@
18 * Assorted race fixes, rewrite of ext4_get_block() by Al Viro, 2000 18 * Assorted race fixes, rewrite of ext4_get_block() by Al Viro, 2000
19 */ 19 */
20 20
21#include <linux/module.h>
22#include <linux/fs.h> 21#include <linux/fs.h>
23#include <linux/time.h> 22#include <linux/time.h>
24#include <linux/jbd2.h> 23#include <linux/jbd2.h>
diff --git a/fs/ext4/ioctl.c b/fs/ext4/ioctl.c
index d37b3bb2a3b8..e87a932b073b 100644
--- a/fs/ext4/ioctl.c
+++ b/fs/ext4/ioctl.c
@@ -158,10 +158,11 @@ flags_out:
158 goto setversion_out; 158 goto setversion_out;
159 } 159 }
160 160
161 mutex_lock(&inode->i_mutex);
161 handle = ext4_journal_start(inode, 1); 162 handle = ext4_journal_start(inode, 1);
162 if (IS_ERR(handle)) { 163 if (IS_ERR(handle)) {
163 err = PTR_ERR(handle); 164 err = PTR_ERR(handle);
164 goto setversion_out; 165 goto unlock_out;
165 } 166 }
166 err = ext4_reserve_inode_write(handle, inode, &iloc); 167 err = ext4_reserve_inode_write(handle, inode, &iloc);
167 if (err == 0) { 168 if (err == 0) {
@@ -170,6 +171,9 @@ flags_out:
170 err = ext4_mark_iloc_dirty(handle, inode, &iloc); 171 err = ext4_mark_iloc_dirty(handle, inode, &iloc);
171 } 172 }
172 ext4_journal_stop(handle); 173 ext4_journal_stop(handle);
174
175unlock_out:
176 mutex_unlock(&inode->i_mutex);
173setversion_out: 177setversion_out:
174 mnt_drop_write_file(filp); 178 mnt_drop_write_file(filp);
175 return err; 179 return err;
diff --git a/fs/ext4/migrate.c b/fs/ext4/migrate.c
index 16ac228dbec6..e7d6bb0acfa6 100644
--- a/fs/ext4/migrate.c
+++ b/fs/ext4/migrate.c
@@ -12,7 +12,6 @@
12 * 12 *
13 */ 13 */
14 14
15#include <linux/module.h>
16#include <linux/slab.h> 15#include <linux/slab.h>
17#include "ext4_jbd2.h" 16#include "ext4_jbd2.h"
18 17
diff --git a/fs/ext4/page-io.c b/fs/ext4/page-io.c
index 7e106c810c62..475851896518 100644
--- a/fs/ext4/page-io.c
+++ b/fs/ext4/page-io.c
@@ -6,7 +6,6 @@
6 * Written by Theodore Ts'o, 2010. 6 * Written by Theodore Ts'o, 2010.
7 */ 7 */
8 8
9#include <linux/module.h>
10#include <linux/fs.h> 9#include <linux/fs.h>
11#include <linux/time.h> 10#include <linux/time.h>
12#include <linux/jbd2.h> 11#include <linux/jbd2.h>
diff --git a/fs/ext4/xattr_security.c b/fs/ext4/xattr_security.c
index 34e4350dd4d9..b60f9f81e33c 100644
--- a/fs/ext4/xattr_security.c
+++ b/fs/ext4/xattr_security.c
@@ -3,7 +3,6 @@
3 * Handler for storing security labels as extended attributes. 3 * Handler for storing security labels as extended attributes.
4 */ 4 */
5 5
6#include <linux/module.h>
7#include <linux/string.h> 6#include <linux/string.h>
8#include <linux/fs.h> 7#include <linux/fs.h>
9#include <linux/security.h> 8#include <linux/security.h>
diff --git a/fs/ext4/xattr_trusted.c b/fs/ext4/xattr_trusted.c
index 37e6ebca2cc3..95f1f4ab59a4 100644
--- a/fs/ext4/xattr_trusted.c
+++ b/fs/ext4/xattr_trusted.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2003 by Andreas Gruenbacher, <a.gruenbacher@computer.org> 5 * Copyright (C) 2003 by Andreas Gruenbacher, <a.gruenbacher@computer.org>
6 */ 6 */
7 7
8#include <linux/module.h>
9#include <linux/string.h> 8#include <linux/string.h>
10#include <linux/capability.h> 9#include <linux/capability.h>
11#include <linux/fs.h> 10#include <linux/fs.h>
diff --git a/fs/ext4/xattr_user.c b/fs/ext4/xattr_user.c
index 98c375352d0e..0edb7611ffbe 100644
--- a/fs/ext4/xattr_user.c
+++ b/fs/ext4/xattr_user.c
@@ -5,7 +5,6 @@
5 * Copyright (C) 2001 by Andreas Gruenbacher, <a.gruenbacher@computer.org> 5 * Copyright (C) 2001 by Andreas Gruenbacher, <a.gruenbacher@computer.org>
6 */ 6 */
7 7
8#include <linux/module.h>
9#include <linux/string.h> 8#include <linux/string.h>
10#include <linux/fs.h> 9#include <linux/fs.h>
11#include "ext4_jbd2.h" 10#include "ext4_jbd2.h"
diff --git a/fs/fat/namei_vfat.c b/fs/fat/namei_vfat.c
index 3a444b4e2368..a81eb2367d39 100644
--- a/fs/fat/namei_vfat.c
+++ b/fs/fat/namei_vfat.c
@@ -512,7 +512,8 @@ xlate_to_uni(const unsigned char *name, int len, unsigned char *outname,
512 int charlen; 512 int charlen;
513 513
514 if (utf8) { 514 if (utf8) {
515 *outlen = utf8s_to_utf16s(name, len, (wchar_t *)outname); 515 *outlen = utf8s_to_utf16s(name, len, UTF16_HOST_ENDIAN,
516 (wchar_t *) outname, FAT_LFN_LEN + 2);
516 if (*outlen < 0) 517 if (*outlen < 0)
517 return *outlen; 518 return *outlen;
518 else if (*outlen > FAT_LFN_LEN) 519 else if (*outlen > FAT_LFN_LEN)
diff --git a/fs/jbd/commit.c b/fs/jbd/commit.c
index 8799207df058..f2b9a571f4cf 100644
--- a/fs/jbd/commit.c
+++ b/fs/jbd/commit.c
@@ -392,6 +392,12 @@ void journal_commit_transaction(journal_t *journal)
392 jbd_debug (3, "JBD: commit phase 1\n"); 392 jbd_debug (3, "JBD: commit phase 1\n");
393 393
394 /* 394 /*
395 * Clear revoked flag to reflect there is no revoked buffers
396 * in the next transaction which is going to be started.
397 */
398 journal_clear_buffer_revoked_flags(journal);
399
400 /*
395 * Switch to a new revoke table. 401 * Switch to a new revoke table.
396 */ 402 */
397 journal_switch_revoke_table(journal); 403 journal_switch_revoke_table(journal);
diff --git a/fs/jbd/journal.c b/fs/jbd/journal.c
index a96cff0c5f1d..59c09f9541b5 100644
--- a/fs/jbd/journal.c
+++ b/fs/jbd/journal.c
@@ -721,7 +721,6 @@ static journal_t * journal_init_common (void)
721 init_waitqueue_head(&journal->j_wait_checkpoint); 721 init_waitqueue_head(&journal->j_wait_checkpoint);
722 init_waitqueue_head(&journal->j_wait_commit); 722 init_waitqueue_head(&journal->j_wait_commit);
723 init_waitqueue_head(&journal->j_wait_updates); 723 init_waitqueue_head(&journal->j_wait_updates);
724 mutex_init(&journal->j_barrier);
725 mutex_init(&journal->j_checkpoint_mutex); 724 mutex_init(&journal->j_checkpoint_mutex);
726 spin_lock_init(&journal->j_revoke_lock); 725 spin_lock_init(&journal->j_revoke_lock);
727 spin_lock_init(&journal->j_list_lock); 726 spin_lock_init(&journal->j_list_lock);
diff --git a/fs/jbd/revoke.c b/fs/jbd/revoke.c
index 305a90763154..25c713e7071c 100644
--- a/fs/jbd/revoke.c
+++ b/fs/jbd/revoke.c
@@ -47,6 +47,10 @@
47 * overwriting the new data. We don't even need to clear the revoke 47 * overwriting the new data. We don't even need to clear the revoke
48 * bit here. 48 * bit here.
49 * 49 *
50 * We cache revoke status of a buffer in the current transaction in b_states
51 * bits. As the name says, revokevalid flag indicates that the cached revoke
52 * status of a buffer is valid and we can rely on the cached status.
53 *
50 * Revoke information on buffers is a tri-state value: 54 * Revoke information on buffers is a tri-state value:
51 * 55 *
52 * RevokeValid clear: no cached revoke status, need to look it up 56 * RevokeValid clear: no cached revoke status, need to look it up
@@ -479,6 +483,36 @@ int journal_cancel_revoke(handle_t *handle, struct journal_head *jh)
479 return did_revoke; 483 return did_revoke;
480} 484}
481 485
486/*
487 * journal_clear_revoked_flags clears revoked flag of buffers in
488 * revoke table to reflect there is no revoked buffer in the next
489 * transaction which is going to be started.
490 */
491void journal_clear_buffer_revoked_flags(journal_t *journal)
492{
493 struct jbd_revoke_table_s *revoke = journal->j_revoke;
494 int i = 0;
495
496 for (i = 0; i < revoke->hash_size; i++) {
497 struct list_head *hash_list;
498 struct list_head *list_entry;
499 hash_list = &revoke->hash_table[i];
500
501 list_for_each(list_entry, hash_list) {
502 struct jbd_revoke_record_s *record;
503 struct buffer_head *bh;
504 record = (struct jbd_revoke_record_s *)list_entry;
505 bh = __find_get_block(journal->j_fs_dev,
506 record->blocknr,
507 journal->j_blocksize);
508 if (bh) {
509 clear_buffer_revoked(bh);
510 __brelse(bh);
511 }
512 }
513 }
514}
515
482/* journal_switch_revoke table select j_revoke for next transaction 516/* journal_switch_revoke table select j_revoke for next transaction
483 * we do not want to suspend any processing until all revokes are 517 * we do not want to suspend any processing until all revokes are
484 * written -bzzz 518 * written -bzzz
diff --git a/fs/jbd/transaction.c b/fs/jbd/transaction.c
index 7e59c6e66f9b..7fce94b04bc3 100644
--- a/fs/jbd/transaction.c
+++ b/fs/jbd/transaction.c
@@ -426,17 +426,34 @@ int journal_restart(handle_t *handle, int nblocks)
426 * void journal_lock_updates () - establish a transaction barrier. 426 * void journal_lock_updates () - establish a transaction barrier.
427 * @journal: Journal to establish a barrier on. 427 * @journal: Journal to establish a barrier on.
428 * 428 *
429 * This locks out any further updates from being started, and blocks 429 * This locks out any further updates from being started, and blocks until all
430 * until all existing updates have completed, returning only once the 430 * existing updates have completed, returning only once the journal is in a
431 * journal is in a quiescent state with no updates running. 431 * quiescent state with no updates running.
432 * 432 *
433 * The journal lock should not be held on entry. 433 * We do not use simple mutex for synchronization as there are syscalls which
434 * want to return with filesystem locked and that trips up lockdep. Also
435 * hibernate needs to lock filesystem but locked mutex then blocks hibernation.
436 * Since locking filesystem is rare operation, we use simple counter and
437 * waitqueue for locking.
434 */ 438 */
435void journal_lock_updates(journal_t *journal) 439void journal_lock_updates(journal_t *journal)
436{ 440{
437 DEFINE_WAIT(wait); 441 DEFINE_WAIT(wait);
438 442
443wait:
444 /* Wait for previous locked operation to finish */
445 wait_event(journal->j_wait_transaction_locked,
446 journal->j_barrier_count == 0);
447
439 spin_lock(&journal->j_state_lock); 448 spin_lock(&journal->j_state_lock);
449 /*
450 * Check reliably under the lock whether we are the ones winning the race
451 * and locking the journal
452 */
453 if (journal->j_barrier_count > 0) {
454 spin_unlock(&journal->j_state_lock);
455 goto wait;
456 }
440 ++journal->j_barrier_count; 457 ++journal->j_barrier_count;
441 458
442 /* Wait until there are no running updates */ 459 /* Wait until there are no running updates */
@@ -460,14 +477,6 @@ void journal_lock_updates(journal_t *journal)
460 spin_lock(&journal->j_state_lock); 477 spin_lock(&journal->j_state_lock);
461 } 478 }
462 spin_unlock(&journal->j_state_lock); 479 spin_unlock(&journal->j_state_lock);
463
464 /*
465 * We have now established a barrier against other normal updates, but
466 * we also need to barrier against other journal_lock_updates() calls
467 * to make sure that we serialise special journal-locked operations
468 * too.
469 */
470 mutex_lock(&journal->j_barrier);
471} 480}
472 481
473/** 482/**
@@ -475,14 +484,11 @@ void journal_lock_updates(journal_t *journal)
475 * @journal: Journal to release the barrier on. 484 * @journal: Journal to release the barrier on.
476 * 485 *
477 * Release a transaction barrier obtained with journal_lock_updates(). 486 * Release a transaction barrier obtained with journal_lock_updates().
478 *
479 * Should be called without the journal lock held.
480 */ 487 */
481void journal_unlock_updates (journal_t *journal) 488void journal_unlock_updates (journal_t *journal)
482{ 489{
483 J_ASSERT(journal->j_barrier_count != 0); 490 J_ASSERT(journal->j_barrier_count != 0);
484 491
485 mutex_unlock(&journal->j_barrier);
486 spin_lock(&journal->j_state_lock); 492 spin_lock(&journal->j_state_lock);
487 --journal->j_barrier_count; 493 --journal->j_barrier_count;
488 spin_unlock(&journal->j_state_lock); 494 spin_unlock(&journal->j_state_lock);
diff --git a/fs/nls/nls_base.c b/fs/nls/nls_base.c
index 44a88a9fa2c8..fea6bd5831dc 100644
--- a/fs/nls/nls_base.c
+++ b/fs/nls/nls_base.c
@@ -52,7 +52,7 @@ static const struct utf8_table utf8_table[] =
52#define SURROGATE_LOW 0x00000400 52#define SURROGATE_LOW 0x00000400
53#define SURROGATE_BITS 0x000003ff 53#define SURROGATE_BITS 0x000003ff
54 54
55int utf8_to_utf32(const u8 *s, int len, unicode_t *pu) 55int utf8_to_utf32(const u8 *s, int inlen, unicode_t *pu)
56{ 56{
57 unsigned long l; 57 unsigned long l;
58 int c0, c, nc; 58 int c0, c, nc;
@@ -71,7 +71,7 @@ int utf8_to_utf32(const u8 *s, int len, unicode_t *pu)
71 *pu = (unicode_t) l; 71 *pu = (unicode_t) l;
72 return nc; 72 return nc;
73 } 73 }
74 if (len <= nc) 74 if (inlen <= nc)
75 return -1; 75 return -1;
76 s++; 76 s++;
77 c = (*s ^ 0x80) & 0xFF; 77 c = (*s ^ 0x80) & 0xFF;
@@ -83,7 +83,7 @@ int utf8_to_utf32(const u8 *s, int len, unicode_t *pu)
83} 83}
84EXPORT_SYMBOL(utf8_to_utf32); 84EXPORT_SYMBOL(utf8_to_utf32);
85 85
86int utf32_to_utf8(unicode_t u, u8 *s, int maxlen) 86int utf32_to_utf8(unicode_t u, u8 *s, int maxout)
87{ 87{
88 unsigned long l; 88 unsigned long l;
89 int c, nc; 89 int c, nc;
@@ -97,7 +97,7 @@ int utf32_to_utf8(unicode_t u, u8 *s, int maxlen)
97 return -1; 97 return -1;
98 98
99 nc = 0; 99 nc = 0;
100 for (t = utf8_table; t->cmask && maxlen; t++, maxlen--) { 100 for (t = utf8_table; t->cmask && maxout; t++, maxout--) {
101 nc++; 101 nc++;
102 if (l <= t->lmask) { 102 if (l <= t->lmask) {
103 c = t->shift; 103 c = t->shift;
@@ -114,34 +114,57 @@ int utf32_to_utf8(unicode_t u, u8 *s, int maxlen)
114} 114}
115EXPORT_SYMBOL(utf32_to_utf8); 115EXPORT_SYMBOL(utf32_to_utf8);
116 116
117int utf8s_to_utf16s(const u8 *s, int len, wchar_t *pwcs) 117static inline void put_utf16(wchar_t *s, unsigned c, enum utf16_endian endian)
118{
119 switch (endian) {
120 default:
121 *s = (wchar_t) c;
122 break;
123 case UTF16_LITTLE_ENDIAN:
124 *s = __cpu_to_le16(c);
125 break;
126 case UTF16_BIG_ENDIAN:
127 *s = __cpu_to_be16(c);
128 break;
129 }
130}
131
132int utf8s_to_utf16s(const u8 *s, int inlen, enum utf16_endian endian,
133 wchar_t *pwcs, int maxout)
118{ 134{
119 u16 *op; 135 u16 *op;
120 int size; 136 int size;
121 unicode_t u; 137 unicode_t u;
122 138
123 op = pwcs; 139 op = pwcs;
124 while (*s && len > 0) { 140 while (inlen > 0 && maxout > 0 && *s) {
125 if (*s & 0x80) { 141 if (*s & 0x80) {
126 size = utf8_to_utf32(s, len, &u); 142 size = utf8_to_utf32(s, inlen, &u);
127 if (size < 0) 143 if (size < 0)
128 return -EINVAL; 144 return -EINVAL;
145 s += size;
146 inlen -= size;
129 147
130 if (u >= PLANE_SIZE) { 148 if (u >= PLANE_SIZE) {
149 if (maxout < 2)
150 break;
131 u -= PLANE_SIZE; 151 u -= PLANE_SIZE;
132 *op++ = (wchar_t) (SURROGATE_PAIR | 152 put_utf16(op++, SURROGATE_PAIR |
133 ((u >> 10) & SURROGATE_BITS)); 153 ((u >> 10) & SURROGATE_BITS),
134 *op++ = (wchar_t) (SURROGATE_PAIR | 154 endian);
155 put_utf16(op++, SURROGATE_PAIR |
135 SURROGATE_LOW | 156 SURROGATE_LOW |
136 (u & SURROGATE_BITS)); 157 (u & SURROGATE_BITS),
158 endian);
159 maxout -= 2;
137 } else { 160 } else {
138 *op++ = (wchar_t) u; 161 put_utf16(op++, u, endian);
162 maxout--;
139 } 163 }
140 s += size;
141 len -= size;
142 } else { 164 } else {
143 *op++ = *s++; 165 put_utf16(op++, *s++, endian);
144 len--; 166 inlen--;
167 maxout--;
145 } 168 }
146 } 169 }
147 return op - pwcs; 170 return op - pwcs;
@@ -160,27 +183,27 @@ static inline unsigned long get_utf16(unsigned c, enum utf16_endian endian)
160 } 183 }
161} 184}
162 185
163int utf16s_to_utf8s(const wchar_t *pwcs, int len, enum utf16_endian endian, 186int utf16s_to_utf8s(const wchar_t *pwcs, int inlen, enum utf16_endian endian,
164 u8 *s, int maxlen) 187 u8 *s, int maxout)
165{ 188{
166 u8 *op; 189 u8 *op;
167 int size; 190 int size;
168 unsigned long u, v; 191 unsigned long u, v;
169 192
170 op = s; 193 op = s;
171 while (len > 0 && maxlen > 0) { 194 while (inlen > 0 && maxout > 0) {
172 u = get_utf16(*pwcs, endian); 195 u = get_utf16(*pwcs, endian);
173 if (!u) 196 if (!u)
174 break; 197 break;
175 pwcs++; 198 pwcs++;
176 len--; 199 inlen--;
177 if (u > 0x7f) { 200 if (u > 0x7f) {
178 if ((u & SURROGATE_MASK) == SURROGATE_PAIR) { 201 if ((u & SURROGATE_MASK) == SURROGATE_PAIR) {
179 if (u & SURROGATE_LOW) { 202 if (u & SURROGATE_LOW) {
180 /* Ignore character and move on */ 203 /* Ignore character and move on */
181 continue; 204 continue;
182 } 205 }
183 if (len <= 0) 206 if (inlen <= 0)
184 break; 207 break;
185 v = get_utf16(*pwcs, endian); 208 v = get_utf16(*pwcs, endian);
186 if ((v & SURROGATE_MASK) != SURROGATE_PAIR || 209 if ((v & SURROGATE_MASK) != SURROGATE_PAIR ||
@@ -191,18 +214,18 @@ int utf16s_to_utf8s(const wchar_t *pwcs, int len, enum utf16_endian endian,
191 u = PLANE_SIZE + ((u & SURROGATE_BITS) << 10) 214 u = PLANE_SIZE + ((u & SURROGATE_BITS) << 10)
192 + (v & SURROGATE_BITS); 215 + (v & SURROGATE_BITS);
193 pwcs++; 216 pwcs++;
194 len--; 217 inlen--;
195 } 218 }
196 size = utf32_to_utf8(u, op, maxlen); 219 size = utf32_to_utf8(u, op, maxout);
197 if (size == -1) { 220 if (size == -1) {
198 /* Ignore character and move on */ 221 /* Ignore character and move on */
199 } else { 222 } else {
200 op += size; 223 op += size;
201 maxlen -= size; 224 maxout -= size;
202 } 225 }
203 } else { 226 } else {
204 *op++ = (u8) u; 227 *op++ = (u8) u;
205 maxlen--; 228 maxout--;
206 } 229 }
207 } 230 }
208 return op - s; 231 return op - s;
diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c
index 19c454e61b79..1d42e707d5fa 100644
--- a/fs/reiserfs/super.c
+++ b/fs/reiserfs/super.c
@@ -455,16 +455,20 @@ int remove_save_link(struct inode *inode, int truncate)
455static void reiserfs_kill_sb(struct super_block *s) 455static void reiserfs_kill_sb(struct super_block *s)
456{ 456{
457 if (REISERFS_SB(s)) { 457 if (REISERFS_SB(s)) {
458 if (REISERFS_SB(s)->xattr_root) { 458 /*
459 d_invalidate(REISERFS_SB(s)->xattr_root); 459 * Force any pending inode evictions to occur now. Any
460 dput(REISERFS_SB(s)->xattr_root); 460 * inodes to be removed that have extended attributes
461 REISERFS_SB(s)->xattr_root = NULL; 461 * associated with them need to clean them up before
462 } 462 * we can release the extended attribute root dentries.
463 if (REISERFS_SB(s)->priv_root) { 463 * shrink_dcache_for_umount will BUG if we don't release
464 d_invalidate(REISERFS_SB(s)->priv_root); 464 * those before it's called so ->put_super is too late.
465 dput(REISERFS_SB(s)->priv_root); 465 */
466 REISERFS_SB(s)->priv_root = NULL; 466 shrink_dcache_sb(s);
467 } 467
468 dput(REISERFS_SB(s)->xattr_root);
469 REISERFS_SB(s)->xattr_root = NULL;
470 dput(REISERFS_SB(s)->priv_root);
471 REISERFS_SB(s)->priv_root = NULL;
468 } 472 }
469 473
470 kill_block_super(s); 474 kill_block_super(s);
@@ -1249,7 +1253,8 @@ static void handle_quota_files(struct super_block *s, char **qf_names,
1249 kfree(REISERFS_SB(s)->s_qf_names[i]); 1253 kfree(REISERFS_SB(s)->s_qf_names[i]);
1250 REISERFS_SB(s)->s_qf_names[i] = qf_names[i]; 1254 REISERFS_SB(s)->s_qf_names[i] = qf_names[i];
1251 } 1255 }
1252 REISERFS_SB(s)->s_jquota_fmt = *qfmt; 1256 if (*qfmt)
1257 REISERFS_SB(s)->s_jquota_fmt = *qfmt;
1253} 1258}
1254#endif 1259#endif
1255 1260
diff --git a/fs/udf/file.c b/fs/udf/file.c
index d8ffa7cc661d..dca0c3881e82 100644
--- a/fs/udf/file.c
+++ b/fs/udf/file.c
@@ -125,7 +125,6 @@ static ssize_t udf_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
125 err = udf_expand_file_adinicb(inode); 125 err = udf_expand_file_adinicb(inode);
126 if (err) { 126 if (err) {
127 udf_debug("udf_expand_adinicb: err=%d\n", err); 127 udf_debug("udf_expand_adinicb: err=%d\n", err);
128 up_write(&iinfo->i_data_sem);
129 return err; 128 return err;
130 } 129 }
131 } else { 130 } else {
@@ -133,9 +132,10 @@ static ssize_t udf_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
133 iinfo->i_lenAlloc = pos + count; 132 iinfo->i_lenAlloc = pos + count;
134 else 133 else
135 iinfo->i_lenAlloc = inode->i_size; 134 iinfo->i_lenAlloc = inode->i_size;
135 up_write(&iinfo->i_data_sem);
136 } 136 }
137 } 137 } else
138 up_write(&iinfo->i_data_sem); 138 up_write(&iinfo->i_data_sem);
139 139
140 retval = generic_file_aio_write(iocb, iov, nr_segs, ppos); 140 retval = generic_file_aio_write(iocb, iov, nr_segs, ppos);
141 if (retval > 0) 141 if (retval > 0)
diff --git a/fs/udf/inode.c b/fs/udf/inode.c
index 4598904be1bb..7699df7b3198 100644
--- a/fs/udf/inode.c
+++ b/fs/udf/inode.c
@@ -53,8 +53,7 @@ static int udf_update_inode(struct inode *, int);
53static void udf_fill_inode(struct inode *, struct buffer_head *); 53static void udf_fill_inode(struct inode *, struct buffer_head *);
54static int udf_sync_inode(struct inode *inode); 54static int udf_sync_inode(struct inode *inode);
55static int udf_alloc_i_data(struct inode *inode, size_t size); 55static int udf_alloc_i_data(struct inode *inode, size_t size);
56static struct buffer_head *inode_getblk(struct inode *, sector_t, int *, 56static sector_t inode_getblk(struct inode *, sector_t, int *, int *);
57 sector_t *, int *);
58static int8_t udf_insert_aext(struct inode *, struct extent_position, 57static int8_t udf_insert_aext(struct inode *, struct extent_position,
59 struct kernel_lb_addr, uint32_t); 58 struct kernel_lb_addr, uint32_t);
60static void udf_split_extents(struct inode *, int *, int, int, 59static void udf_split_extents(struct inode *, int *, int, int,
@@ -151,6 +150,12 @@ const struct address_space_operations udf_aops = {
151 .bmap = udf_bmap, 150 .bmap = udf_bmap,
152}; 151};
153 152
153/*
154 * Expand file stored in ICB to a normal one-block-file
155 *
156 * This function requires i_data_sem for writing and releases it.
157 * This function requires i_mutex held
158 */
154int udf_expand_file_adinicb(struct inode *inode) 159int udf_expand_file_adinicb(struct inode *inode)
155{ 160{
156 struct page *page; 161 struct page *page;
@@ -169,9 +174,15 @@ int udf_expand_file_adinicb(struct inode *inode)
169 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG; 174 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG;
170 /* from now on we have normal address_space methods */ 175 /* from now on we have normal address_space methods */
171 inode->i_data.a_ops = &udf_aops; 176 inode->i_data.a_ops = &udf_aops;
177 up_write(&iinfo->i_data_sem);
172 mark_inode_dirty(inode); 178 mark_inode_dirty(inode);
173 return 0; 179 return 0;
174 } 180 }
181 /*
182 * Release i_data_sem so that we can lock a page - page lock ranks
183 * above i_data_sem. i_mutex still protects us against file changes.
184 */
185 up_write(&iinfo->i_data_sem);
175 186
176 page = find_or_create_page(inode->i_mapping, 0, GFP_NOFS); 187 page = find_or_create_page(inode->i_mapping, 0, GFP_NOFS);
177 if (!page) 188 if (!page)
@@ -187,6 +198,7 @@ int udf_expand_file_adinicb(struct inode *inode)
187 SetPageUptodate(page); 198 SetPageUptodate(page);
188 kunmap(page); 199 kunmap(page);
189 } 200 }
201 down_write(&iinfo->i_data_sem);
190 memset(iinfo->i_ext.i_data + iinfo->i_lenEAttr, 0x00, 202 memset(iinfo->i_ext.i_data + iinfo->i_lenEAttr, 0x00,
191 iinfo->i_lenAlloc); 203 iinfo->i_lenAlloc);
192 iinfo->i_lenAlloc = 0; 204 iinfo->i_lenAlloc = 0;
@@ -196,17 +208,20 @@ int udf_expand_file_adinicb(struct inode *inode)
196 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG; 208 iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG;
197 /* from now on we have normal address_space methods */ 209 /* from now on we have normal address_space methods */
198 inode->i_data.a_ops = &udf_aops; 210 inode->i_data.a_ops = &udf_aops;
211 up_write(&iinfo->i_data_sem);
199 err = inode->i_data.a_ops->writepage(page, &udf_wbc); 212 err = inode->i_data.a_ops->writepage(page, &udf_wbc);
200 if (err) { 213 if (err) {
201 /* Restore everything back so that we don't lose data... */ 214 /* Restore everything back so that we don't lose data... */
202 lock_page(page); 215 lock_page(page);
203 kaddr = kmap(page); 216 kaddr = kmap(page);
217 down_write(&iinfo->i_data_sem);
204 memcpy(iinfo->i_ext.i_data + iinfo->i_lenEAttr, kaddr, 218 memcpy(iinfo->i_ext.i_data + iinfo->i_lenEAttr, kaddr,
205 inode->i_size); 219 inode->i_size);
206 kunmap(page); 220 kunmap(page);
207 unlock_page(page); 221 unlock_page(page);
208 iinfo->i_alloc_type = ICBTAG_FLAG_AD_IN_ICB; 222 iinfo->i_alloc_type = ICBTAG_FLAG_AD_IN_ICB;
209 inode->i_data.a_ops = &udf_adinicb_aops; 223 inode->i_data.a_ops = &udf_adinicb_aops;
224 up_write(&iinfo->i_data_sem);
210 } 225 }
211 page_cache_release(page); 226 page_cache_release(page);
212 mark_inode_dirty(inode); 227 mark_inode_dirty(inode);
@@ -310,7 +325,6 @@ static int udf_get_block(struct inode *inode, sector_t block,
310 struct buffer_head *bh_result, int create) 325 struct buffer_head *bh_result, int create)
311{ 326{
312 int err, new; 327 int err, new;
313 struct buffer_head *bh;
314 sector_t phys = 0; 328 sector_t phys = 0;
315 struct udf_inode_info *iinfo; 329 struct udf_inode_info *iinfo;
316 330
@@ -323,7 +337,6 @@ static int udf_get_block(struct inode *inode, sector_t block,
323 337
324 err = -EIO; 338 err = -EIO;
325 new = 0; 339 new = 0;
326 bh = NULL;
327 iinfo = UDF_I(inode); 340 iinfo = UDF_I(inode);
328 341
329 down_write(&iinfo->i_data_sem); 342 down_write(&iinfo->i_data_sem);
@@ -332,13 +345,10 @@ static int udf_get_block(struct inode *inode, sector_t block,
332 iinfo->i_next_alloc_goal++; 345 iinfo->i_next_alloc_goal++;
333 } 346 }
334 347
335 err = 0;
336 348
337 bh = inode_getblk(inode, block, &err, &phys, &new); 349 phys = inode_getblk(inode, block, &err, &new);
338 BUG_ON(bh); 350 if (!phys)
339 if (err)
340 goto abort; 351 goto abort;
341 BUG_ON(!phys);
342 352
343 if (new) 353 if (new)
344 set_buffer_new(bh_result); 354 set_buffer_new(bh_result);
@@ -547,11 +557,10 @@ out:
547 return err; 557 return err;
548} 558}
549 559
550static struct buffer_head *inode_getblk(struct inode *inode, sector_t block, 560static sector_t inode_getblk(struct inode *inode, sector_t block,
551 int *err, sector_t *phys, int *new) 561 int *err, int *new)
552{ 562{
553 static sector_t last_block; 563 static sector_t last_block;
554 struct buffer_head *result = NULL;
555 struct kernel_long_ad laarr[EXTENT_MERGE_SIZE]; 564 struct kernel_long_ad laarr[EXTENT_MERGE_SIZE];
556 struct extent_position prev_epos, cur_epos, next_epos; 565 struct extent_position prev_epos, cur_epos, next_epos;
557 int count = 0, startnum = 0, endnum = 0; 566 int count = 0, startnum = 0, endnum = 0;
@@ -566,6 +575,8 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
566 int goal = 0, pgoal = iinfo->i_location.logicalBlockNum; 575 int goal = 0, pgoal = iinfo->i_location.logicalBlockNum;
567 int lastblock = 0; 576 int lastblock = 0;
568 577
578 *err = 0;
579 *new = 0;
569 prev_epos.offset = udf_file_entry_alloc_offset(inode); 580 prev_epos.offset = udf_file_entry_alloc_offset(inode);
570 prev_epos.block = iinfo->i_location; 581 prev_epos.block = iinfo->i_location;
571 prev_epos.bh = NULL; 582 prev_epos.bh = NULL;
@@ -635,8 +646,7 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
635 brelse(cur_epos.bh); 646 brelse(cur_epos.bh);
636 brelse(next_epos.bh); 647 brelse(next_epos.bh);
637 newblock = udf_get_lb_pblock(inode->i_sb, &eloc, offset); 648 newblock = udf_get_lb_pblock(inode->i_sb, &eloc, offset);
638 *phys = newblock; 649 return newblock;
639 return NULL;
640 } 650 }
641 651
642 last_block = block; 652 last_block = block;
@@ -664,7 +674,7 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
664 brelse(cur_epos.bh); 674 brelse(cur_epos.bh);
665 brelse(next_epos.bh); 675 brelse(next_epos.bh);
666 *err = ret; 676 *err = ret;
667 return NULL; 677 return 0;
668 } 678 }
669 c = 0; 679 c = 0;
670 offset = 0; 680 offset = 0;
@@ -729,7 +739,7 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
729 if (!newblocknum) { 739 if (!newblocknum) {
730 brelse(prev_epos.bh); 740 brelse(prev_epos.bh);
731 *err = -ENOSPC; 741 *err = -ENOSPC;
732 return NULL; 742 return 0;
733 } 743 }
734 iinfo->i_lenExtents += inode->i_sb->s_blocksize; 744 iinfo->i_lenExtents += inode->i_sb->s_blocksize;
735 } 745 }
@@ -761,10 +771,10 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
761 771
762 newblock = udf_get_pblock(inode->i_sb, newblocknum, 772 newblock = udf_get_pblock(inode->i_sb, newblocknum,
763 iinfo->i_location.partitionReferenceNum, 0); 773 iinfo->i_location.partitionReferenceNum, 0);
764 if (!newblock) 774 if (!newblock) {
765 return NULL; 775 *err = -EIO;
766 *phys = newblock; 776 return 0;
767 *err = 0; 777 }
768 *new = 1; 778 *new = 1;
769 iinfo->i_next_alloc_block = block; 779 iinfo->i_next_alloc_block = block;
770 iinfo->i_next_alloc_goal = newblocknum; 780 iinfo->i_next_alloc_goal = newblocknum;
@@ -775,7 +785,7 @@ static struct buffer_head *inode_getblk(struct inode *inode, sector_t block,
775 else 785 else
776 mark_inode_dirty(inode); 786 mark_inode_dirty(inode);
777 787
778 return result; 788 return newblock;
779} 789}
780 790
781static void udf_split_extents(struct inode *inode, int *c, int offset, 791static void udf_split_extents(struct inode *inode, int *c, int offset,
@@ -1111,10 +1121,9 @@ int udf_setsize(struct inode *inode, loff_t newsize)
1111 if (bsize < 1121 if (bsize <
1112 (udf_file_entry_alloc_offset(inode) + newsize)) { 1122 (udf_file_entry_alloc_offset(inode) + newsize)) {
1113 err = udf_expand_file_adinicb(inode); 1123 err = udf_expand_file_adinicb(inode);
1114 if (err) { 1124 if (err)
1115 up_write(&iinfo->i_data_sem);
1116 return err; 1125 return err;
1117 } 1126 down_write(&iinfo->i_data_sem);
1118 } else 1127 } else
1119 iinfo->i_lenAlloc = newsize; 1128 iinfo->i_lenAlloc = newsize;
1120 } 1129 }
diff --git a/fs/udf/super.c b/fs/udf/super.c
index 0c33225647a0..c09a84daaf50 100644
--- a/fs/udf/super.c
+++ b/fs/udf/super.c
@@ -1798,6 +1798,12 @@ static void udf_close_lvid(struct super_block *sb)
1798 le16_to_cpu(lvid->descTag.descCRCLength))); 1798 le16_to_cpu(lvid->descTag.descCRCLength)));
1799 1799
1800 lvid->descTag.tagChecksum = udf_tag_checksum(&lvid->descTag); 1800 lvid->descTag.tagChecksum = udf_tag_checksum(&lvid->descTag);
1801 /*
1802 * We set buffer uptodate unconditionally here to avoid spurious
1803 * warnings from mark_buffer_dirty() when previous EIO has marked
1804 * the buffer as !uptodate
1805 */
1806 set_buffer_uptodate(bh);
1801 mark_buffer_dirty(bh); 1807 mark_buffer_dirty(bh);
1802 sbi->s_lvid_dirty = 0; 1808 sbi->s_lvid_dirty = 0;
1803 mutex_unlock(&sbi->s_alloc_mutex); 1809 mutex_unlock(&sbi->s_alloc_mutex);
diff --git a/fs/udf/symlink.c b/fs/udf/symlink.c
index b1d4488b0f14..d7c6dbe4194b 100644
--- a/fs/udf/symlink.c
+++ b/fs/udf/symlink.c
@@ -41,10 +41,16 @@ static void udf_pc_to_char(struct super_block *sb, unsigned char *from,
41 pc = (struct pathComponent *)(from + elen); 41 pc = (struct pathComponent *)(from + elen);
42 switch (pc->componentType) { 42 switch (pc->componentType) {
43 case 1: 43 case 1:
44 if (pc->lengthComponentIdent == 0) { 44 /*
45 p = to; 45 * Symlink points to some place which should be agreed
46 *p++ = '/'; 46 * upon between originator and receiver of the media. Ignore.
47 } 47 */
48 if (pc->lengthComponentIdent > 0)
49 break;
50 /* Fall through */
51 case 2:
52 p = to;
53 *p++ = '/';
48 break; 54 break;
49 case 3: 55 case 3:
50 memcpy(p, "../", 3); 56 memcpy(p, "../", 3);
diff --git a/fs/xfs/xfs_discard.c b/fs/xfs/xfs_discard.c
index 8a24f0c6c860..286a051f12cf 100644
--- a/fs/xfs/xfs_discard.c
+++ b/fs/xfs/xfs_discard.c
@@ -68,7 +68,7 @@ xfs_trim_extents(
68 * Look up the longest btree in the AGF and start with it. 68 * Look up the longest btree in the AGF and start with it.
69 */ 69 */
70 error = xfs_alloc_lookup_le(cur, 0, 70 error = xfs_alloc_lookup_le(cur, 0,
71 XFS_BUF_TO_AGF(agbp)->agf_longest, &i); 71 be32_to_cpu(XFS_BUF_TO_AGF(agbp)->agf_longest), &i);
72 if (error) 72 if (error)
73 goto out_del_cursor; 73 goto out_del_cursor;
74 74
@@ -84,7 +84,7 @@ xfs_trim_extents(
84 if (error) 84 if (error)
85 goto out_del_cursor; 85 goto out_del_cursor;
86 XFS_WANT_CORRUPTED_GOTO(i == 1, out_del_cursor); 86 XFS_WANT_CORRUPTED_GOTO(i == 1, out_del_cursor);
87 ASSERT(flen <= XFS_BUF_TO_AGF(agbp)->agf_longest); 87 ASSERT(flen <= be32_to_cpu(XFS_BUF_TO_AGF(agbp)->agf_longest));
88 88
89 /* 89 /*
90 * Too small? Give up. 90 * Too small? Give up.
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h
index d12f077a6daf..12e023c19ac1 100644
--- a/include/linux/amba/pl330.h
+++ b/include/linux/amba/pl330.h
@@ -12,17 +12,9 @@
12#ifndef __AMBA_PL330_H_ 12#ifndef __AMBA_PL330_H_
13#define __AMBA_PL330_H_ 13#define __AMBA_PL330_H_
14 14
15#include <linux/dmaengine.h>
15#include <asm/hardware/pl330.h> 16#include <asm/hardware/pl330.h>
16 17
17struct dma_pl330_peri {
18 /*
19 * Peri_Req i/f of the DMAC that is
20 * peripheral could be reached from.
21 */
22 u8 peri_id; /* specific dma id */
23 enum pl330_reqtype rqtype;
24};
25
26struct dma_pl330_platdata { 18struct dma_pl330_platdata {
27 /* 19 /*
28 * Number of valid peripherals connected to DMAC. 20 * Number of valid peripherals connected to DMAC.
@@ -33,9 +25,12 @@ struct dma_pl330_platdata {
33 */ 25 */
34 u8 nr_valid_peri; 26 u8 nr_valid_peri;
35 /* Array of valid peripherals */ 27 /* Array of valid peripherals */
36 struct dma_pl330_peri *peri; 28 u8 *peri_id;
29 /* Operational capabilities */
30 dma_cap_mask_t cap_mask;
37 /* Bytes to allocate for MC buffer */ 31 /* Bytes to allocate for MC buffer */
38 unsigned mcbuf_sz; 32 unsigned mcbuf_sz;
39}; 33};
40 34
35extern bool pl330_filter(struct dma_chan *chan, void *param);
41#endif /* __AMBA_PL330_H_ */ 36#endif /* __AMBA_PL330_H_ */
diff --git a/include/linux/ata_platform.h b/include/linux/ata_platform.h
index 9a26c83a2c9e..b856a2a590d9 100644
--- a/include/linux/ata_platform.h
+++ b/include/linux/ata_platform.h
@@ -27,10 +27,7 @@ extern int __devexit __pata_platform_remove(struct device *dev);
27/* 27/*
28 * Marvell SATA private data 28 * Marvell SATA private data
29 */ 29 */
30struct mbus_dram_target_info;
31
32struct mv_sata_platform_data { 30struct mv_sata_platform_data {
33 struct mbus_dram_target_info *dram;
34 int n_ports; /* number of sata ports */ 31 int n_ports; /* number of sata ports */
35}; 32};
36 33
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index a17becc36ca1..e9b602151caf 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -457,6 +457,28 @@ void cgroup_exclude_rmdir(struct cgroup_subsys_state *css);
457void cgroup_release_and_wakeup_rmdir(struct cgroup_subsys_state *css); 457void cgroup_release_and_wakeup_rmdir(struct cgroup_subsys_state *css);
458 458
459/* 459/*
460 * Control Group taskset, used to pass around set of tasks to cgroup_subsys
461 * methods.
462 */
463struct cgroup_taskset;
464struct task_struct *cgroup_taskset_first(struct cgroup_taskset *tset);
465struct task_struct *cgroup_taskset_next(struct cgroup_taskset *tset);
466struct cgroup *cgroup_taskset_cur_cgroup(struct cgroup_taskset *tset);
467int cgroup_taskset_size(struct cgroup_taskset *tset);
468
469/**
470 * cgroup_taskset_for_each - iterate cgroup_taskset
471 * @task: the loop cursor
472 * @skip_cgrp: skip if task's cgroup matches this, %NULL to iterate through all
473 * @tset: taskset to iterate
474 */
475#define cgroup_taskset_for_each(task, skip_cgrp, tset) \
476 for ((task) = cgroup_taskset_first((tset)); (task); \
477 (task) = cgroup_taskset_next((tset))) \
478 if (!(skip_cgrp) || \
479 cgroup_taskset_cur_cgroup((tset)) != (skip_cgrp))
480
481/*
460 * Control Group subsystem type. 482 * Control Group subsystem type.
461 * See Documentation/cgroups/cgroups.txt for details 483 * See Documentation/cgroups/cgroups.txt for details
462 */ 484 */
@@ -467,14 +489,11 @@ struct cgroup_subsys {
467 int (*pre_destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp); 489 int (*pre_destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
468 void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp); 490 void (*destroy)(struct cgroup_subsys *ss, struct cgroup *cgrp);
469 int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp, 491 int (*can_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
470 struct task_struct *tsk); 492 struct cgroup_taskset *tset);
471 int (*can_attach_task)(struct cgroup *cgrp, struct task_struct *tsk);
472 void (*cancel_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp, 493 void (*cancel_attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
473 struct task_struct *tsk); 494 struct cgroup_taskset *tset);
474 void (*pre_attach)(struct cgroup *cgrp);
475 void (*attach_task)(struct cgroup *cgrp, struct task_struct *tsk);
476 void (*attach)(struct cgroup_subsys *ss, struct cgroup *cgrp, 495 void (*attach)(struct cgroup_subsys *ss, struct cgroup *cgrp,
477 struct cgroup *old_cgrp, struct task_struct *tsk); 496 struct cgroup_taskset *tset);
478 void (*fork)(struct cgroup_subsys *ss, struct task_struct *task); 497 void (*fork)(struct cgroup_subsys *ss, struct task_struct *task);
479 void (*exit)(struct cgroup_subsys *ss, struct cgroup *cgrp, 498 void (*exit)(struct cgroup_subsys *ss, struct cgroup *cgrp,
480 struct cgroup *old_cgrp, struct task_struct *task); 499 struct cgroup *old_cgrp, struct task_struct *task);
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 7213b52b2c0e..b9d46fa154b4 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -107,6 +107,28 @@ static inline void clk_unprepare(struct clk *clk)
107} 107}
108#endif 108#endif
109 109
110/* clk_prepare_enable helps cases using clk_enable in non-atomic context. */
111static inline int clk_prepare_enable(struct clk *clk)
112{
113 int ret;
114
115 ret = clk_prepare(clk);
116 if (ret)
117 return ret;
118 ret = clk_enable(clk);
119 if (ret)
120 clk_unprepare(clk);
121
122 return ret;
123}
124
125/* clk_disable_unprepare helps cases using clk_disable in non-atomic context. */
126static inline void clk_disable_unprepare(struct clk *clk)
127{
128 clk_disable(clk);
129 clk_unprepare(clk);
130}
131
110/** 132/**
111 * clk_get_rate - obtain the current clock rate (in Hz) for a clock source. 133 * clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
112 * This is only valid once the clock source has been enabled. 134 * This is only valid once the clock source has been enabled.
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
new file mode 100644
index 000000000000..05071ee34c3f
--- /dev/null
+++ b/include/linux/gpio-pxa.h
@@ -0,0 +1,16 @@
1#ifndef __GPIO_PXA_H
2#define __GPIO_PXA_H
3
4#define GPIO_bit(x) (1 << ((x) & 0x1f))
5
6#define gpio_to_bank(gpio) ((gpio) >> 5)
7
8/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
9 * Those cases currently cause holes in the GPIO number space, the
10 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
11 */
12extern int pxa_last_gpio;
13
14extern int pxa_irq_to_gpio(int irq);
15
16#endif /* __GPIO_PXA_H */
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 12ec328481de..62b908e0e591 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -35,7 +35,7 @@
35#include <linux/mod_devicetable.h> 35#include <linux/mod_devicetable.h>
36 36
37 37
38#define MAX_PAGE_BUFFER_COUNT 16 38#define MAX_PAGE_BUFFER_COUNT 18
39#define MAX_MULTIPAGE_BUFFER_COUNT 32 /* 128K */ 39#define MAX_MULTIPAGE_BUFFER_COUNT 32 /* 128K */
40 40
41#pragma pack(push, 1) 41#pragma pack(push, 1)
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index 32574eef9394..9c66b1ada9d7 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -23,11 +23,10 @@ extern struct files_struct init_files;
23extern struct fs_struct init_fs; 23extern struct fs_struct init_fs;
24 24
25#ifdef CONFIG_CGROUPS 25#ifdef CONFIG_CGROUPS
26#define INIT_THREADGROUP_FORK_LOCK(sig) \ 26#define INIT_GROUP_RWSEM(sig) \
27 .threadgroup_fork_lock = \ 27 .group_rwsem = __RWSEM_INITIALIZER(sig.group_rwsem),
28 __RWSEM_INITIALIZER(sig.threadgroup_fork_lock),
29#else 28#else
30#define INIT_THREADGROUP_FORK_LOCK(sig) 29#define INIT_GROUP_RWSEM(sig)
31#endif 30#endif
32 31
33#define INIT_SIGNALS(sig) { \ 32#define INIT_SIGNALS(sig) { \
@@ -46,7 +45,7 @@ extern struct fs_struct init_fs;
46 }, \ 45 }, \
47 .cred_guard_mutex = \ 46 .cred_guard_mutex = \
48 __MUTEX_INITIALIZER(sig.cred_guard_mutex), \ 47 __MUTEX_INITIALIZER(sig.cred_guard_mutex), \
49 INIT_THREADGROUP_FORK_LOCK(sig) \ 48 INIT_GROUP_RWSEM(sig) \
50} 49}
51 50
52extern struct nsproxy init_nsproxy; 51extern struct nsproxy init_nsproxy;
diff --git a/include/linux/jbd.h b/include/linux/jbd.h
index c7acdde3243d..d211732b9e99 100644
--- a/include/linux/jbd.h
+++ b/include/linux/jbd.h
@@ -497,7 +497,6 @@ struct transaction_s
497 * @j_format_version: Version of the superblock format 497 * @j_format_version: Version of the superblock format
498 * @j_state_lock: Protect the various scalars in the journal 498 * @j_state_lock: Protect the various scalars in the journal
499 * @j_barrier_count: Number of processes waiting to create a barrier lock 499 * @j_barrier_count: Number of processes waiting to create a barrier lock
500 * @j_barrier: The barrier lock itself
501 * @j_running_transaction: The current running transaction.. 500 * @j_running_transaction: The current running transaction..
502 * @j_committing_transaction: the transaction we are pushing to disk 501 * @j_committing_transaction: the transaction we are pushing to disk
503 * @j_checkpoint_transactions: a linked circular list of all transactions 502 * @j_checkpoint_transactions: a linked circular list of all transactions
@@ -580,9 +579,6 @@ struct journal_s
580 */ 579 */
581 int j_barrier_count; 580 int j_barrier_count;
582 581
583 /* The barrier lock itself */
584 struct mutex j_barrier;
585
586 /* 582 /*
587 * Transactions: The current running transaction... 583 * Transactions: The current running transaction...
588 * [j_state_lock] [caller holding open handle] 584 * [j_state_lock] [caller holding open handle]
@@ -913,6 +909,7 @@ extern int journal_set_revoke(journal_t *, unsigned int, tid_t);
913extern int journal_test_revoke(journal_t *, unsigned int, tid_t); 909extern int journal_test_revoke(journal_t *, unsigned int, tid_t);
914extern void journal_clear_revoke(journal_t *); 910extern void journal_clear_revoke(journal_t *);
915extern void journal_switch_revoke_table(journal_t *journal); 911extern void journal_switch_revoke_table(journal_t *journal);
912extern void journal_clear_buffer_revoked_flags(journal_t *journal);
916 913
917/* 914/*
918 * The log thread user interface: 915 * The log thread user interface:
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
index c11ff2932549..efa1a6d7aca8 100644
--- a/include/linux/mbus.h
+++ b/include/linux/mbus.h
@@ -32,5 +32,16 @@ struct mbus_dram_target_info
32 } cs[4]; 32 } cs[4];
33}; 33};
34 34
35 35/*
36 * The Marvell mbus is to be found only on SOCs from the Orion family
37 * at the moment. Provide a dummy stub for other architectures.
38 */
39#ifdef CONFIG_PLAT_ORION
40extern const struct mbus_dram_target_info *mv_mbus_dram_info(void);
41#else
42static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void)
43{
44 return NULL;
45}
46#endif
36#endif 47#endif
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index 9b296ea41bb8..f944591765eb 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -390,7 +390,6 @@ enum {
390 OVER_LIMIT, 390 OVER_LIMIT,
391}; 391};
392 392
393#ifdef CONFIG_INET
394struct sock; 393struct sock;
395#ifdef CONFIG_CGROUP_MEM_RES_CTLR_KMEM 394#ifdef CONFIG_CGROUP_MEM_RES_CTLR_KMEM
396void sock_update_memcg(struct sock *sk); 395void sock_update_memcg(struct sock *sk);
@@ -403,6 +402,5 @@ static inline void sock_release_memcg(struct sock *sk)
403{ 402{
404} 403}
405#endif /* CONFIG_CGROUP_MEM_RES_CTLR_KMEM */ 404#endif /* CONFIG_CGROUP_MEM_RES_CTLR_KMEM */
406#endif /* CONFIG_INET */
407#endif /* _LINUX_MEMCONTROL_H */ 405#endif /* _LINUX_MEMCONTROL_H */
408 406
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index a1d109590da4..0eac07c95255 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -2155,7 +2155,7 @@ extern void netdev_run_todo(void);
2155 */ 2155 */
2156static inline void dev_put(struct net_device *dev) 2156static inline void dev_put(struct net_device *dev)
2157{ 2157{
2158 irqsafe_cpu_dec(*dev->pcpu_refcnt); 2158 this_cpu_dec(*dev->pcpu_refcnt);
2159} 2159}
2160 2160
2161/** 2161/**
@@ -2166,7 +2166,7 @@ static inline void dev_put(struct net_device *dev)
2166 */ 2166 */
2167static inline void dev_hold(struct net_device *dev) 2167static inline void dev_hold(struct net_device *dev)
2168{ 2168{
2169 irqsafe_cpu_inc(*dev->pcpu_refcnt); 2169 this_cpu_inc(*dev->pcpu_refcnt);
2170} 2170}
2171 2171
2172/* Carrier loss detection, dial on demand. The functions netif_carrier_on 2172/* Carrier loss detection, dial on demand. The functions netif_carrier_on
@@ -2450,6 +2450,11 @@ static inline void netif_addr_lock(struct net_device *dev)
2450 spin_lock(&dev->addr_list_lock); 2450 spin_lock(&dev->addr_list_lock);
2451} 2451}
2452 2452
2453static inline void netif_addr_lock_nested(struct net_device *dev)
2454{
2455 spin_lock_nested(&dev->addr_list_lock, SINGLE_DEPTH_NESTING);
2456}
2457
2453static inline void netif_addr_lock_bh(struct net_device *dev) 2458static inline void netif_addr_lock_bh(struct net_device *dev)
2454{ 2459{
2455 spin_lock_bh(&dev->addr_list_lock); 2460 spin_lock_bh(&dev->addr_list_lock);
diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h
index 32cddf78b13e..8d674a786744 100644
--- a/include/linux/netfilter/x_tables.h
+++ b/include/linux/netfilter/x_tables.h
@@ -471,7 +471,7 @@ DECLARE_PER_CPU(seqcount_t, xt_recseq);
471 * 471 *
472 * Begin packet processing : all readers must wait the end 472 * Begin packet processing : all readers must wait the end
473 * 1) Must be called with preemption disabled 473 * 1) Must be called with preemption disabled
474 * 2) softirqs must be disabled too (or we should use irqsafe_cpu_add()) 474 * 2) softirqs must be disabled too (or we should use this_cpu_add())
475 * Returns : 475 * Returns :
476 * 1 if no recursion on this cpu 476 * 1 if no recursion on this cpu
477 * 0 if recursion detected 477 * 0 if recursion detected
@@ -503,7 +503,7 @@ static inline unsigned int xt_write_recseq_begin(void)
503 * 503 *
504 * End packet processing : all readers can proceed 504 * End packet processing : all readers can proceed
505 * 1) Must be called with preemption disabled 505 * 1) Must be called with preemption disabled
506 * 2) softirqs must be disabled too (or we should use irqsafe_cpu_add()) 506 * 2) softirqs must be disabled too (or we should use this_cpu_add())
507 */ 507 */
508static inline void xt_write_recseq_end(unsigned int addend) 508static inline void xt_write_recseq_end(unsigned int addend)
509{ 509{
diff --git a/include/linux/nls.h b/include/linux/nls.h
index d47beef08dfd..5dc635f8d79e 100644
--- a/include/linux/nls.h
+++ b/include/linux/nls.h
@@ -43,7 +43,7 @@ enum utf16_endian {
43 UTF16_BIG_ENDIAN 43 UTF16_BIG_ENDIAN
44}; 44};
45 45
46/* nls.c */ 46/* nls_base.c */
47extern int register_nls(struct nls_table *); 47extern int register_nls(struct nls_table *);
48extern int unregister_nls(struct nls_table *); 48extern int unregister_nls(struct nls_table *);
49extern struct nls_table *load_nls(char *); 49extern struct nls_table *load_nls(char *);
@@ -52,7 +52,8 @@ extern struct nls_table *load_nls_default(void);
52 52
53extern int utf8_to_utf32(const u8 *s, int len, unicode_t *pu); 53extern int utf8_to_utf32(const u8 *s, int len, unicode_t *pu);
54extern int utf32_to_utf8(unicode_t u, u8 *s, int maxlen); 54extern int utf32_to_utf8(unicode_t u, u8 *s, int maxlen);
55extern int utf8s_to_utf16s(const u8 *s, int len, wchar_t *pwcs); 55extern int utf8s_to_utf16s(const u8 *s, int len,
56 enum utf16_endian endian, wchar_t *pwcs, int maxlen);
56extern int utf16s_to_utf8s(const wchar_t *pwcs, int len, 57extern int utf16s_to_utf8s(const wchar_t *pwcs, int len,
57 enum utf16_endian endian, u8 *s, int maxlen); 58 enum utf16_endian endian, u8 *s, int maxlen);
58 59
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index 9ca008f0c542..32cd1f67462e 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -172,10 +172,10 @@ extern phys_addr_t per_cpu_ptr_to_phys(void *addr);
172 * equal char, int or long. percpu_read() evaluates to a lvalue and 172 * equal char, int or long. percpu_read() evaluates to a lvalue and
173 * all others to void. 173 * all others to void.
174 * 174 *
175 * These operations are guaranteed to be atomic w.r.t. preemption. 175 * These operations are guaranteed to be atomic.
176 * The generic versions use plain get/put_cpu_var(). Archs are 176 * The generic versions disable interrupts. Archs are
177 * encouraged to implement single-instruction alternatives which don't 177 * encouraged to implement single-instruction alternatives which don't
178 * require preemption protection. 178 * require protection.
179 */ 179 */
180#ifndef percpu_read 180#ifndef percpu_read
181# define percpu_read(var) \ 181# define percpu_read(var) \
@@ -347,9 +347,10 @@ do { \
347 347
348#define _this_cpu_generic_to_op(pcp, val, op) \ 348#define _this_cpu_generic_to_op(pcp, val, op) \
349do { \ 349do { \
350 preempt_disable(); \ 350 unsigned long flags; \
351 local_irq_save(flags); \
351 *__this_cpu_ptr(&(pcp)) op val; \ 352 *__this_cpu_ptr(&(pcp)) op val; \
352 preempt_enable(); \ 353 local_irq_restore(flags); \
353} while (0) 354} while (0)
354 355
355#ifndef this_cpu_write 356#ifndef this_cpu_write
@@ -447,10 +448,11 @@ do { \
447#define _this_cpu_generic_add_return(pcp, val) \ 448#define _this_cpu_generic_add_return(pcp, val) \
448({ \ 449({ \
449 typeof(pcp) ret__; \ 450 typeof(pcp) ret__; \
450 preempt_disable(); \ 451 unsigned long flags; \
452 local_irq_save(flags); \
451 __this_cpu_add(pcp, val); \ 453 __this_cpu_add(pcp, val); \
452 ret__ = __this_cpu_read(pcp); \ 454 ret__ = __this_cpu_read(pcp); \
453 preempt_enable(); \ 455 local_irq_restore(flags); \
454 ret__; \ 456 ret__; \
455}) 457})
456 458
@@ -476,10 +478,11 @@ do { \
476 478
477#define _this_cpu_generic_xchg(pcp, nval) \ 479#define _this_cpu_generic_xchg(pcp, nval) \
478({ typeof(pcp) ret__; \ 480({ typeof(pcp) ret__; \
479 preempt_disable(); \ 481 unsigned long flags; \
482 local_irq_save(flags); \
480 ret__ = __this_cpu_read(pcp); \ 483 ret__ = __this_cpu_read(pcp); \
481 __this_cpu_write(pcp, nval); \ 484 __this_cpu_write(pcp, nval); \
482 preempt_enable(); \ 485 local_irq_restore(flags); \
483 ret__; \ 486 ret__; \
484}) 487})
485 488
@@ -501,12 +504,14 @@ do { \
501#endif 504#endif
502 505
503#define _this_cpu_generic_cmpxchg(pcp, oval, nval) \ 506#define _this_cpu_generic_cmpxchg(pcp, oval, nval) \
504({ typeof(pcp) ret__; \ 507({ \
505 preempt_disable(); \ 508 typeof(pcp) ret__; \
509 unsigned long flags; \
510 local_irq_save(flags); \
506 ret__ = __this_cpu_read(pcp); \ 511 ret__ = __this_cpu_read(pcp); \
507 if (ret__ == (oval)) \ 512 if (ret__ == (oval)) \
508 __this_cpu_write(pcp, nval); \ 513 __this_cpu_write(pcp, nval); \
509 preempt_enable(); \ 514 local_irq_restore(flags); \
510 ret__; \ 515 ret__; \
511}) 516})
512 517
@@ -538,10 +543,11 @@ do { \
538#define _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \ 543#define _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
539({ \ 544({ \
540 int ret__; \ 545 int ret__; \
541 preempt_disable(); \ 546 unsigned long flags; \
547 local_irq_save(flags); \
542 ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2, \ 548 ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2, \
543 oval1, oval2, nval1, nval2); \ 549 oval1, oval2, nval1, nval2); \
544 preempt_enable(); \ 550 local_irq_restore(flags); \
545 ret__; \ 551 ret__; \
546}) 552})
547 553
@@ -567,9 +573,9 @@ do { \
567#endif 573#endif
568 574
569/* 575/*
570 * Generic percpu operations that do not require preemption handling. 576 * Generic percpu operations for context that are safe from preemption/interrupts.
571 * Either we do not care about races or the caller has the 577 * Either we do not care about races or the caller has the
572 * responsibility of handling preemptions issues. Arch code can still 578 * responsibility of handling preemption/interrupt issues. Arch code can still
573 * override these instructions since the arch per cpu code may be more 579 * override these instructions since the arch per cpu code may be more
574 * efficient and may actually get race freeness for free (that is the 580 * efficient and may actually get race freeness for free (that is the
575 * case for x86 for example). 581 * case for x86 for example).
@@ -802,156 +808,4 @@ do { \
802 __pcpu_double_call_return_bool(__this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2)) 808 __pcpu_double_call_return_bool(__this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
803#endif 809#endif
804 810
805/*
806 * IRQ safe versions of the per cpu RMW operations. Note that these operations
807 * are *not* safe against modification of the same variable from another
808 * processors (which one gets when using regular atomic operations)
809 * They are guaranteed to be atomic vs. local interrupts and
810 * preemption only.
811 */
812#define irqsafe_cpu_generic_to_op(pcp, val, op) \
813do { \
814 unsigned long flags; \
815 local_irq_save(flags); \
816 *__this_cpu_ptr(&(pcp)) op val; \
817 local_irq_restore(flags); \
818} while (0)
819
820#ifndef irqsafe_cpu_add
821# ifndef irqsafe_cpu_add_1
822# define irqsafe_cpu_add_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
823# endif
824# ifndef irqsafe_cpu_add_2
825# define irqsafe_cpu_add_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
826# endif
827# ifndef irqsafe_cpu_add_4
828# define irqsafe_cpu_add_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
829# endif
830# ifndef irqsafe_cpu_add_8
831# define irqsafe_cpu_add_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=)
832# endif
833# define irqsafe_cpu_add(pcp, val) __pcpu_size_call(irqsafe_cpu_add_, (pcp), (val))
834#endif
835
836#ifndef irqsafe_cpu_sub
837# define irqsafe_cpu_sub(pcp, val) irqsafe_cpu_add((pcp), -(val))
838#endif
839
840#ifndef irqsafe_cpu_inc
841# define irqsafe_cpu_inc(pcp) irqsafe_cpu_add((pcp), 1)
842#endif
843
844#ifndef irqsafe_cpu_dec
845# define irqsafe_cpu_dec(pcp) irqsafe_cpu_sub((pcp), 1)
846#endif
847
848#ifndef irqsafe_cpu_and
849# ifndef irqsafe_cpu_and_1
850# define irqsafe_cpu_and_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
851# endif
852# ifndef irqsafe_cpu_and_2
853# define irqsafe_cpu_and_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
854# endif
855# ifndef irqsafe_cpu_and_4
856# define irqsafe_cpu_and_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
857# endif
858# ifndef irqsafe_cpu_and_8
859# define irqsafe_cpu_and_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=)
860# endif
861# define irqsafe_cpu_and(pcp, val) __pcpu_size_call(irqsafe_cpu_and_, (val))
862#endif
863
864#ifndef irqsafe_cpu_or
865# ifndef irqsafe_cpu_or_1
866# define irqsafe_cpu_or_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
867# endif
868# ifndef irqsafe_cpu_or_2
869# define irqsafe_cpu_or_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
870# endif
871# ifndef irqsafe_cpu_or_4
872# define irqsafe_cpu_or_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
873# endif
874# ifndef irqsafe_cpu_or_8
875# define irqsafe_cpu_or_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=)
876# endif
877# define irqsafe_cpu_or(pcp, val) __pcpu_size_call(irqsafe_cpu_or_, (val))
878#endif
879
880#ifndef irqsafe_cpu_xor
881# ifndef irqsafe_cpu_xor_1
882# define irqsafe_cpu_xor_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
883# endif
884# ifndef irqsafe_cpu_xor_2
885# define irqsafe_cpu_xor_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
886# endif
887# ifndef irqsafe_cpu_xor_4
888# define irqsafe_cpu_xor_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
889# endif
890# ifndef irqsafe_cpu_xor_8
891# define irqsafe_cpu_xor_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=)
892# endif
893# define irqsafe_cpu_xor(pcp, val) __pcpu_size_call(irqsafe_cpu_xor_, (val))
894#endif
895
896#define irqsafe_cpu_generic_cmpxchg(pcp, oval, nval) \
897({ \
898 typeof(pcp) ret__; \
899 unsigned long flags; \
900 local_irq_save(flags); \
901 ret__ = __this_cpu_read(pcp); \
902 if (ret__ == (oval)) \
903 __this_cpu_write(pcp, nval); \
904 local_irq_restore(flags); \
905 ret__; \
906})
907
908#ifndef irqsafe_cpu_cmpxchg
909# ifndef irqsafe_cpu_cmpxchg_1
910# define irqsafe_cpu_cmpxchg_1(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
911# endif
912# ifndef irqsafe_cpu_cmpxchg_2
913# define irqsafe_cpu_cmpxchg_2(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
914# endif
915# ifndef irqsafe_cpu_cmpxchg_4
916# define irqsafe_cpu_cmpxchg_4(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
917# endif
918# ifndef irqsafe_cpu_cmpxchg_8
919# define irqsafe_cpu_cmpxchg_8(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
920# endif
921# define irqsafe_cpu_cmpxchg(pcp, oval, nval) \
922 __pcpu_size_call_return2(irqsafe_cpu_cmpxchg_, (pcp), oval, nval)
923#endif
924
925#define irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
926({ \
927 int ret__; \
928 unsigned long flags; \
929 local_irq_save(flags); \
930 ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2, \
931 oval1, oval2, nval1, nval2); \
932 local_irq_restore(flags); \
933 ret__; \
934})
935
936#ifndef irqsafe_cpu_cmpxchg_double
937# ifndef irqsafe_cpu_cmpxchg_double_1
938# define irqsafe_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2) \
939 irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
940# endif
941# ifndef irqsafe_cpu_cmpxchg_double_2
942# define irqsafe_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2) \
943 irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
944# endif
945# ifndef irqsafe_cpu_cmpxchg_double_4
946# define irqsafe_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2) \
947 irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
948# endif
949# ifndef irqsafe_cpu_cmpxchg_double_8
950# define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2) \
951 irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
952# endif
953# define irqsafe_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2) \
954 __pcpu_double_call_return_bool(irqsafe_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
955#endif
956
957#endif /* __LINUX_PERCPU_H */ 811#endif /* __LINUX_PERCPU_H */
diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h
new file mode 100644
index 000000000000..b081c7245ec8
--- /dev/null
+++ b/include/linux/platform_data/macb.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __MACB_PDATA_H__
9#define __MACB_PDATA_H__
10
11struct macb_platform_data {
12 u32 phy_mask;
13 int phy_irq_pin; /* PHY IRQ */
14 u8 is_rmii; /* using RMII interface? */
15};
16
17#endif /* __MACB_PDATA_H__ */
diff --git a/include/linux/platform_data/mv_usb.h b/include/linux/platform_data/mv_usb.h
index e9d9149ddf38..d94804aca764 100644
--- a/include/linux/platform_data/mv_usb.h
+++ b/include/linux/platform_data/mv_usb.h
@@ -42,9 +42,23 @@ struct mv_usb_platform_data {
42 /* only valid for HCD. OTG or Host only*/ 42 /* only valid for HCD. OTG or Host only*/
43 unsigned int mode; 43 unsigned int mode;
44 44
45 int (*phy_init)(unsigned int regbase); 45 /* This flag is used for that needs id pin checked by otg */
46 void (*phy_deinit)(unsigned int regbase); 46 unsigned int disable_otg_clock_gating:1;
47 /* Force a_bus_req to be asserted */
48 unsigned int otg_force_a_bus_req:1;
49
50 int (*phy_init)(void __iomem *regbase);
51 void (*phy_deinit)(void __iomem *regbase);
47 int (*set_vbus)(unsigned int vbus); 52 int (*set_vbus)(unsigned int vbus);
53 int (*private_init)(void __iomem *opregs, void __iomem *phyregs);
48}; 54};
49 55
56#ifndef CONFIG_HAVE_CLK
57/* Dummy stub for clk framework */
58#define clk_get(dev, id) NULL
59#define clk_put(clock) do {} while (0)
60#define clk_enable(clock) do {} while (0)
61#define clk_disable(clock) do {} while (0)
62#endif
63
50#endif 64#endif
diff --git a/include/linux/platform_data/s3c-hsudc.h b/include/linux/platform_data/s3c-hsudc.h
new file mode 100644
index 000000000000..6fa109339bf9
--- /dev/null
+++ b/include/linux/platform_data/s3c-hsudc.h
@@ -0,0 +1,34 @@
1/*
2 * S3C24XX USB 2.0 High-speed USB controller gadget driver
3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * The S3C24XX USB 2.0 high-speed USB controller supports upto 9 endpoints.
8 * Each endpoint can be configured as either in or out endpoint. Endpoints
9 * can be configured for Bulk or Interrupt transfer mode.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __LINUX_USB_S3C_HSUDC_H
17#define __LINUX_USB_S3C_HSUDC_H
18
19/**
20 * s3c24xx_hsudc_platdata - Platform data for USB High-Speed gadget controller.
21 * @epnum: Number of endpoints to be instantiated by the controller driver.
22 * @gpio_init: Platform specific USB related GPIO initialization.
23 * @gpio_uninit: Platform specific USB releted GPIO uninitialzation.
24 *
25 * Representation of platform data for the S3C24XX USB 2.0 High Speed gadget
26 * controllers.
27 */
28struct s3c24xx_hsudc_platdata {
29 unsigned int epnum;
30 void (*gpio_init)(void);
31 void (*gpio_uninit)(void);
32};
33
34#endif /* __LINUX_USB_S3C_HSUDC_H */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index ad93e1ec8c65..f044f66018f2 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -637,13 +637,15 @@ struct signal_struct {
637#endif 637#endif
638#ifdef CONFIG_CGROUPS 638#ifdef CONFIG_CGROUPS
639 /* 639 /*
640 * The threadgroup_fork_lock prevents threads from forking with 640 * group_rwsem prevents new tasks from entering the threadgroup and
641 * CLONE_THREAD while held for writing. Use this for fork-sensitive 641 * member tasks from exiting,a more specifically, setting of
642 * threadgroup-wide operations. It's taken for reading in fork.c in 642 * PF_EXITING. fork and exit paths are protected with this rwsem
643 * copy_process(). 643 * using threadgroup_change_begin/end(). Users which require
644 * Currently only needed write-side by cgroups. 644 * threadgroup to remain stable should use threadgroup_[un]lock()
645 * which also takes care of exec path. Currently, cgroup is the
646 * only user.
645 */ 647 */
646 struct rw_semaphore threadgroup_fork_lock; 648 struct rw_semaphore group_rwsem;
647#endif 649#endif
648 650
649 int oom_adj; /* OOM kill score adjustment (bit shift) */ 651 int oom_adj; /* OOM kill score adjustment (bit shift) */
@@ -2394,29 +2396,62 @@ static inline void unlock_task_sighand(struct task_struct *tsk,
2394 spin_unlock_irqrestore(&tsk->sighand->siglock, *flags); 2396 spin_unlock_irqrestore(&tsk->sighand->siglock, *flags);
2395} 2397}
2396 2398
2397/* See the declaration of threadgroup_fork_lock in signal_struct. */
2398#ifdef CONFIG_CGROUPS 2399#ifdef CONFIG_CGROUPS
2399static inline void threadgroup_fork_read_lock(struct task_struct *tsk) 2400static inline void threadgroup_change_begin(struct task_struct *tsk)
2400{ 2401{
2401 down_read(&tsk->signal->threadgroup_fork_lock); 2402 down_read(&tsk->signal->group_rwsem);
2402} 2403}
2403static inline void threadgroup_fork_read_unlock(struct task_struct *tsk) 2404static inline void threadgroup_change_end(struct task_struct *tsk)
2404{ 2405{
2405 up_read(&tsk->signal->threadgroup_fork_lock); 2406 up_read(&tsk->signal->group_rwsem);
2406} 2407}
2407static inline void threadgroup_fork_write_lock(struct task_struct *tsk) 2408
2409/**
2410 * threadgroup_lock - lock threadgroup
2411 * @tsk: member task of the threadgroup to lock
2412 *
2413 * Lock the threadgroup @tsk belongs to. No new task is allowed to enter
2414 * and member tasks aren't allowed to exit (as indicated by PF_EXITING) or
2415 * perform exec. This is useful for cases where the threadgroup needs to
2416 * stay stable across blockable operations.
2417 *
2418 * fork and exit paths explicitly call threadgroup_change_{begin|end}() for
2419 * synchronization. While held, no new task will be added to threadgroup
2420 * and no existing live task will have its PF_EXITING set.
2421 *
2422 * During exec, a task goes and puts its thread group through unusual
2423 * changes. After de-threading, exclusive access is assumed to resources
2424 * which are usually shared by tasks in the same group - e.g. sighand may
2425 * be replaced with a new one. Also, the exec'ing task takes over group
2426 * leader role including its pid. Exclude these changes while locked by
2427 * grabbing cred_guard_mutex which is used to synchronize exec path.
2428 */
2429static inline void threadgroup_lock(struct task_struct *tsk)
2408{ 2430{
2409 down_write(&tsk->signal->threadgroup_fork_lock); 2431 /*
2432 * exec uses exit for de-threading nesting group_rwsem inside
2433 * cred_guard_mutex. Grab cred_guard_mutex first.
2434 */
2435 mutex_lock(&tsk->signal->cred_guard_mutex);
2436 down_write(&tsk->signal->group_rwsem);
2410} 2437}
2411static inline void threadgroup_fork_write_unlock(struct task_struct *tsk) 2438
2439/**
2440 * threadgroup_unlock - unlock threadgroup
2441 * @tsk: member task of the threadgroup to unlock
2442 *
2443 * Reverse threadgroup_lock().
2444 */
2445static inline void threadgroup_unlock(struct task_struct *tsk)
2412{ 2446{
2413 up_write(&tsk->signal->threadgroup_fork_lock); 2447 up_write(&tsk->signal->group_rwsem);
2448 mutex_unlock(&tsk->signal->cred_guard_mutex);
2414} 2449}
2415#else 2450#else
2416static inline void threadgroup_fork_read_lock(struct task_struct *tsk) {} 2451static inline void threadgroup_change_begin(struct task_struct *tsk) {}
2417static inline void threadgroup_fork_read_unlock(struct task_struct *tsk) {} 2452static inline void threadgroup_change_end(struct task_struct *tsk) {}
2418static inline void threadgroup_fork_write_lock(struct task_struct *tsk) {} 2453static inline void threadgroup_lock(struct task_struct *tsk) {}
2419static inline void threadgroup_fork_write_unlock(struct task_struct *tsk) {} 2454static inline void threadgroup_unlock(struct task_struct *tsk) {}
2420#endif 2455#endif
2421 2456
2422#ifndef __HAVE_THREAD_FUNCTIONS 2457#ifndef __HAVE_THREAD_FUNCTIONS
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 1f05bbeac01e..8f012f8ac8e9 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -66,6 +66,7 @@ enum {
66 * dependent on the 8250 driver. 66 * dependent on the 8250 driver.
67 */ 67 */
68struct uart_port; 68struct uart_port;
69struct uart_8250_port;
69 70
70int serial8250_register_port(struct uart_port *); 71int serial8250_register_port(struct uart_port *);
71void serial8250_unregister_port(int line); 72void serial8250_unregister_port(int line);
@@ -81,7 +82,11 @@ extern void serial8250_do_set_termios(struct uart_port *port,
81 struct ktermios *termios, struct ktermios *old); 82 struct ktermios *termios, struct ktermios *old);
82extern void serial8250_do_pm(struct uart_port *port, unsigned int state, 83extern void serial8250_do_pm(struct uart_port *port, unsigned int state,
83 unsigned int oldstate); 84 unsigned int oldstate);
85extern int fsl8250_handle_irq(struct uart_port *port);
84int serial8250_handle_irq(struct uart_port *port, unsigned int iir); 86int serial8250_handle_irq(struct uart_port *port, unsigned int iir);
87unsigned char serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr);
88void serial8250_tx_chars(struct uart_8250_port *up);
89unsigned int serial8250_modem_status(struct uart_8250_port *up);
85 90
86extern void serial8250_set_isa_configurator(void (*v) 91extern void serial8250_set_isa_configurator(void (*v)
87 (int port, struct uart_port *up, 92 (int port, struct uart_port *up,
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index eadf33d0abba..b67305e3ad57 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -351,6 +351,7 @@ struct uart_port {
351#define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 351#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
352#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 352#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
353#define UPF_EXAR_EFR ((__force upf_t) (1 << 25)) 353#define UPF_EXAR_EFR ((__force upf_t) (1 << 25))
354#define UPF_IIR_ONCE ((__force upf_t) (1 << 26))
354/* The exact UART type is known and should not be probed. */ 355/* The exact UART type is known and should not be probed. */
355#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 356#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
356#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 357#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
@@ -483,10 +484,19 @@ static inline int uart_tx_stopped(struct uart_port *port)
483/* 484/*
484 * The following are helper functions for the low level drivers. 485 * The following are helper functions for the low level drivers.
485 */ 486 */
487
488extern void uart_handle_dcd_change(struct uart_port *uport,
489 unsigned int status);
490extern void uart_handle_cts_change(struct uart_port *uport,
491 unsigned int status);
492
493extern void uart_insert_char(struct uart_port *port, unsigned int status,
494 unsigned int overrun, unsigned int ch, unsigned int flag);
495
496#ifdef SUPPORT_SYSRQ
486static inline int 497static inline int
487uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 498uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
488{ 499{
489#ifdef SUPPORT_SYSRQ
490 if (port->sysrq) { 500 if (port->sysrq) {
491 if (ch && time_before(jiffies, port->sysrq)) { 501 if (ch && time_before(jiffies, port->sysrq)) {
492 handle_sysrq(ch); 502 handle_sysrq(ch);
@@ -495,11 +505,10 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
495 } 505 }
496 port->sysrq = 0; 506 port->sysrq = 0;
497 } 507 }
498#endif
499 return 0; 508 return 0;
500} 509}
501#ifndef SUPPORT_SYSRQ 510#else
502#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 511#define uart_handle_sysrq_char(port,ch) ({ (void)port; 0; })
503#endif 512#endif
504 513
505/* 514/*
@@ -522,89 +531,6 @@ static inline int uart_handle_break(struct uart_port *port)
522 return 0; 531 return 0;
523} 532}
524 533
525/**
526 * uart_handle_dcd_change - handle a change of carrier detect state
527 * @uport: uart_port structure for the open port
528 * @status: new carrier detect status, nonzero if active
529 */
530static inline void
531uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
532{
533 struct uart_state *state = uport->state;
534 struct tty_port *port = &state->port;
535 struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
536 struct pps_event_time ts;
537
538 if (ld && ld->ops->dcd_change)
539 pps_get_ts(&ts);
540
541 uport->icount.dcd++;
542#ifdef CONFIG_HARD_PPS
543 if ((uport->flags & UPF_HARDPPS_CD) && status)
544 hardpps();
545#endif
546
547 if (port->flags & ASYNC_CHECK_CD) {
548 if (status)
549 wake_up_interruptible(&port->open_wait);
550 else if (port->tty)
551 tty_hangup(port->tty);
552 }
553
554 if (ld && ld->ops->dcd_change)
555 ld->ops->dcd_change(port->tty, status, &ts);
556 if (ld)
557 tty_ldisc_deref(ld);
558}
559
560/**
561 * uart_handle_cts_change - handle a change of clear-to-send state
562 * @uport: uart_port structure for the open port
563 * @status: new clear to send status, nonzero if active
564 */
565static inline void
566uart_handle_cts_change(struct uart_port *uport, unsigned int status)
567{
568 struct tty_port *port = &uport->state->port;
569 struct tty_struct *tty = port->tty;
570
571 uport->icount.cts++;
572
573 if (port->flags & ASYNC_CTS_FLOW) {
574 if (tty->hw_stopped) {
575 if (status) {
576 tty->hw_stopped = 0;
577 uport->ops->start_tx(uport);
578 uart_write_wakeup(uport);
579 }
580 } else {
581 if (!status) {
582 tty->hw_stopped = 1;
583 uport->ops->stop_tx(uport);
584 }
585 }
586 }
587}
588
589#include <linux/tty_flip.h>
590
591static inline void
592uart_insert_char(struct uart_port *port, unsigned int status,
593 unsigned int overrun, unsigned int ch, unsigned int flag)
594{
595 struct tty_struct *tty = port->state->port.tty;
596
597 if ((status & port->ignore_status_mask & ~overrun) == 0)
598 tty_insert_flip_char(tty, ch, flag);
599
600 /*
601 * Overrun is special. Since it's reported immediately,
602 * it doesn't affect the current character.
603 */
604 if (status & ~port->ignore_status_mask & overrun)
605 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
606}
607
608/* 534/*
609 * UART_ENABLE_MS - determine if port should enable modem status irqs 535 * UART_ENABLE_MS - determine if port should enable modem status irqs
610 */ 536 */
diff --git a/include/linux/slab_def.h b/include/linux/slab_def.h
index d00e0bacda93..fbd1117fdfde 100644
--- a/include/linux/slab_def.h
+++ b/include/linux/slab_def.h
@@ -15,8 +15,6 @@
15#include <asm/cache.h> /* kmalloc_sizes.h needs L1_CACHE_BYTES */ 15#include <asm/cache.h> /* kmalloc_sizes.h needs L1_CACHE_BYTES */
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17 17
18#include <trace/events/kmem.h>
19
20/* 18/*
21 * struct kmem_cache 19 * struct kmem_cache
22 * 20 *
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 7f8d4d61ca47..27a4e16d2bf1 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -1233,6 +1233,7 @@ struct urb {
1233 void *transfer_buffer; /* (in) associated data buffer */ 1233 void *transfer_buffer; /* (in) associated data buffer */
1234 dma_addr_t transfer_dma; /* (in) dma addr for transfer_buffer */ 1234 dma_addr_t transfer_dma; /* (in) dma addr for transfer_buffer */
1235 struct scatterlist *sg; /* (in) scatter gather buffer list */ 1235 struct scatterlist *sg; /* (in) scatter gather buffer list */
1236 int num_mapped_sgs; /* (internal) mapped sg entries */
1236 int num_sgs; /* (in) number of entries in the sg list */ 1237 int num_sgs; /* (in) number of entries in the sg list */
1237 u32 transfer_buffer_length; /* (in) data buffer length */ 1238 u32 transfer_buffer_length; /* (in) data buffer length */
1238 u32 actual_length; /* (return) actual transfer length */ 1239 u32 actual_length; /* (return) actual transfer length */
@@ -1610,6 +1611,19 @@ usb_maxpacket(struct usb_device *udev, int pipe, int is_out)
1610 1611
1611/* ----------------------------------------------------------------------- */ 1612/* ----------------------------------------------------------------------- */
1612 1613
1614/* translate USB error codes to codes user space understands */
1615static inline int usb_translate_errors(int error_code)
1616{
1617 switch (error_code) {
1618 case 0:
1619 case -ENOMEM:
1620 case -ENODEV:
1621 return error_code;
1622 default:
1623 return -EIO;
1624 }
1625}
1626
1613/* Events from the usb core */ 1627/* Events from the usb core */
1614#define USB_DEVICE_ADD 0x0001 1628#define USB_DEVICE_ADD 0x0001
1615#define USB_DEVICE_REMOVE 0x0002 1629#define USB_DEVICE_REMOVE 0x0002
diff --git a/include/linux/usb/ch11.h b/include/linux/usb/ch11.h
index 4ebaf0824179..31fdb4c6ee3d 100644
--- a/include/linux/usb/ch11.h
+++ b/include/linux/usb/ch11.h
@@ -26,7 +26,6 @@
26#define HUB_RESET_TT 9 26#define HUB_RESET_TT 9
27#define HUB_GET_TT_STATE 10 27#define HUB_GET_TT_STATE 10
28#define HUB_STOP_TT 11 28#define HUB_STOP_TT 11
29#define HUB_SET_DEPTH 12
30 29
31/* 30/*
32 * Hub class additional requests defined by USB 3.0 spec 31 * Hub class additional requests defined by USB 3.0 spec
@@ -165,11 +164,20 @@ struct usb_port_status {
165 * wHubCharacteristics (masks) 164 * wHubCharacteristics (masks)
166 * See USB 2.0 spec Table 11-13, offset 3 165 * See USB 2.0 spec Table 11-13, offset 3
167 */ 166 */
168#define HUB_CHAR_LPSM 0x0003 /* D1 .. D0 */ 167#define HUB_CHAR_LPSM 0x0003 /* Logical Power Switching Mode mask */
169#define HUB_CHAR_COMPOUND 0x0004 /* D2 */ 168#define HUB_CHAR_COMMON_LPSM 0x0000 /* All ports power control at once */
170#define HUB_CHAR_OCPM 0x0018 /* D4 .. D3 */ 169#define HUB_CHAR_INDV_PORT_LPSM 0x0001 /* per-port power control */
171#define HUB_CHAR_TTTT 0x0060 /* D6 .. D5 */ 170#define HUB_CHAR_NO_LPSM 0x0002 /* no power switching */
172#define HUB_CHAR_PORTIND 0x0080 /* D7 */ 171
172#define HUB_CHAR_COMPOUND 0x0004 /* hub is part of a compound device */
173
174#define HUB_CHAR_OCPM 0x0018 /* Over-Current Protection Mode mask */
175#define HUB_CHAR_COMMON_OCPM 0x0000 /* All ports Over-Current reporting */
176#define HUB_CHAR_INDV_PORT_OCPM 0x0008 /* per-port Over-current reporting */
177#define HUB_CHAR_NO_OCPM 0x0010 /* No Over-current Protection support */
178
179#define HUB_CHAR_TTTT 0x0060 /* TT Think Time mask */
180#define HUB_CHAR_PORTIND 0x0080 /* per-port indicators (LEDs) */
173 181
174struct usb_hub_status { 182struct usb_hub_status {
175 __le16 wHubStatus; 183 __le16 wHubStatus;
@@ -198,6 +206,17 @@ struct usb_hub_status {
198#define USB_DT_HUB_NONVAR_SIZE 7 206#define USB_DT_HUB_NONVAR_SIZE 7
199#define USB_DT_SS_HUB_SIZE 12 207#define USB_DT_SS_HUB_SIZE 12
200 208
209/*
210 * Hub Device descriptor
211 * USB Hub class device protocols
212 */
213
214#define USB_HUB_PR_FS 0 /* Full speed hub */
215#define USB_HUB_PR_HS_NO_TT 0 /* Hi-speed hub without TT */
216#define USB_HUB_PR_HS_SINGLE_TT 1 /* Hi-speed hub with single TT */
217#define USB_HUB_PR_HS_MULTI_TT 2 /* Hi-speed hub with multiple TT */
218#define USB_HUB_PR_SS 3 /* Super speed hub */
219
201struct usb_hub_descriptor { 220struct usb_hub_descriptor {
202 __u8 bDescLength; 221 __u8 bDescLength;
203 __u8 bDescriptorType; 222 __u8 bDescriptorType;
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index d5da6c68c250..61b29057b054 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -605,8 +605,26 @@ struct usb_ss_ep_comp_descriptor {
605} __attribute__ ((packed)); 605} __attribute__ ((packed));
606 606
607#define USB_DT_SS_EP_COMP_SIZE 6 607#define USB_DT_SS_EP_COMP_SIZE 6
608
608/* Bits 4:0 of bmAttributes if this is a bulk endpoint */ 609/* Bits 4:0 of bmAttributes if this is a bulk endpoint */
609#define USB_SS_MAX_STREAMS(p) (1 << ((p) & 0x1f)) 610static inline int
611usb_ss_max_streams(const struct usb_ss_ep_comp_descriptor *comp)
612{
613 int max_streams;
614
615 if (!comp)
616 return 0;
617
618 max_streams = comp->bmAttributes & 0x1f;
619
620 if (!max_streams)
621 return 0;
622
623 max_streams = 1 << max_streams;
624
625 return max_streams;
626}
627
610/* Bits 1:0 of bmAttributes if this is an isoc endpoint */ 628/* Bits 1:0 of bmAttributes if this is an isoc endpoint */
611#define USB_SS_MULT(p) (1 + ((p) & 0x3)) 629#define USB_SS_MULT(p) (1 + ((p) & 0x3))
612 630
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 1d3a67523ffc..da653b5c7134 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/scatterlist.h>
23#include <linux/types.h> 24#include <linux/types.h>
24#include <linux/usb/ch9.h> 25#include <linux/usb/ch9.h>
25 26
@@ -32,6 +33,9 @@ struct usb_ep;
32 * @dma: DMA address corresponding to 'buf'. If you don't set this 33 * @dma: DMA address corresponding to 'buf'. If you don't set this
33 * field, and the usb controller needs one, it is responsible 34 * field, and the usb controller needs one, it is responsible
34 * for mapping and unmapping the buffer. 35 * for mapping and unmapping the buffer.
36 * @sg: a scatterlist for SG-capable controllers.
37 * @num_sgs: number of SG entries
38 * @num_mapped_sgs: number of SG entries mapped to DMA (internal)
35 * @length: Length of that data 39 * @length: Length of that data
36 * @stream_id: The stream id, when USB3.0 bulk streams are being used 40 * @stream_id: The stream id, when USB3.0 bulk streams are being used
37 * @no_interrupt: If true, hints that no completion irq is needed. 41 * @no_interrupt: If true, hints that no completion irq is needed.
@@ -88,6 +92,10 @@ struct usb_request {
88 unsigned length; 92 unsigned length;
89 dma_addr_t dma; 93 dma_addr_t dma;
90 94
95 struct scatterlist *sg;
96 unsigned num_sgs;
97 unsigned num_mapped_sgs;
98
91 unsigned stream_id:16; 99 unsigned stream_id:16;
92 unsigned no_interrupt:1; 100 unsigned no_interrupt:1;
93 unsigned zero:1; 101 unsigned zero:1;
@@ -164,7 +172,7 @@ struct usb_ep {
164 unsigned maxpacket:16; 172 unsigned maxpacket:16;
165 unsigned max_streams:16; 173 unsigned max_streams:16;
166 unsigned mult:2; 174 unsigned mult:2;
167 unsigned maxburst:4; 175 unsigned maxburst:5;
168 u8 address; 176 u8 address;
169 const struct usb_endpoint_descriptor *desc; 177 const struct usb_endpoint_descriptor *desc;
170 const struct usb_ss_ep_comp_descriptor *comp_desc; 178 const struct usb_ss_ep_comp_descriptor *comp_desc;
@@ -477,8 +485,9 @@ struct usb_gadget_ops {
477 * driver setup() requests 485 * driver setup() requests
478 * @ep_list: List of other endpoints supported by the device. 486 * @ep_list: List of other endpoints supported by the device.
479 * @speed: Speed of current connection to USB host. 487 * @speed: Speed of current connection to USB host.
480 * @is_dualspeed: True if the controller supports both high and full speed 488 * @max_speed: Maximal speed the UDC can handle. UDC must support this
481 * operation. If it does, the gadget driver must also support both. 489 * and all slower speeds.
490 * @sg_supported: true if we can handle scatter-gather
482 * @is_otg: True if the USB device port uses a Mini-AB jack, so that the 491 * @is_otg: True if the USB device port uses a Mini-AB jack, so that the
483 * gadget driver must provide a USB OTG descriptor. 492 * gadget driver must provide a USB OTG descriptor.
484 * @is_a_peripheral: False unless is_otg, the "A" end of a USB cable 493 * @is_a_peripheral: False unless is_otg, the "A" end of a USB cable
@@ -518,7 +527,8 @@ struct usb_gadget {
518 struct usb_ep *ep0; 527 struct usb_ep *ep0;
519 struct list_head ep_list; /* of usb_ep */ 528 struct list_head ep_list; /* of usb_ep */
520 enum usb_device_speed speed; 529 enum usb_device_speed speed;
521 unsigned is_dualspeed:1; 530 enum usb_device_speed max_speed;
531 unsigned sg_supported:1;
522 unsigned is_otg:1; 532 unsigned is_otg:1;
523 unsigned is_a_peripheral:1; 533 unsigned is_a_peripheral:1;
524 unsigned b_hnp_enable:1; 534 unsigned b_hnp_enable:1;
@@ -549,7 +559,7 @@ static inline struct usb_gadget *dev_to_usb_gadget(struct device *dev)
549static inline int gadget_is_dualspeed(struct usb_gadget *g) 559static inline int gadget_is_dualspeed(struct usb_gadget *g)
550{ 560{
551#ifdef CONFIG_USB_GADGET_DUALSPEED 561#ifdef CONFIG_USB_GADGET_DUALSPEED
552 /* runtime test would check "g->is_dualspeed" ... that might be 562 /* runtime test would check "g->max_speed" ... that might be
553 * useful to work around hardware bugs, but is mostly pointless 563 * useful to work around hardware bugs, but is mostly pointless
554 */ 564 */
555 return 1; 565 return 1;
@@ -567,7 +577,7 @@ static inline int gadget_is_superspeed(struct usb_gadget *g)
567{ 577{
568#ifdef CONFIG_USB_GADGET_SUPERSPEED 578#ifdef CONFIG_USB_GADGET_SUPERSPEED
569 /* 579 /*
570 * runtime test would check "g->is_superspeed" ... that might be 580 * runtime test would check "g->max_speed" ... that might be
571 * useful to work around hardware bugs, but is mostly pointless 581 * useful to work around hardware bugs, but is mostly pointless
572 */ 582 */
573 return 1; 583 return 1;
@@ -760,7 +770,7 @@ static inline int usb_gadget_disconnect(struct usb_gadget *gadget)
760/** 770/**
761 * struct usb_gadget_driver - driver for usb 'slave' devices 771 * struct usb_gadget_driver - driver for usb 'slave' devices
762 * @function: String describing the gadget's function 772 * @function: String describing the gadget's function
763 * @speed: Highest speed the driver handles. 773 * @max_speed: Highest speed the driver handles.
764 * @setup: Invoked for ep0 control requests that aren't handled by 774 * @setup: Invoked for ep0 control requests that aren't handled by
765 * the hardware level driver. Most calls must be handled by 775 * the hardware level driver. Most calls must be handled by
766 * the gadget driver, including descriptor and configuration 776 * the gadget driver, including descriptor and configuration
@@ -824,7 +834,7 @@ static inline int usb_gadget_disconnect(struct usb_gadget *gadget)
824 */ 834 */
825struct usb_gadget_driver { 835struct usb_gadget_driver {
826 char *function; 836 char *function;
827 enum usb_device_speed speed; 837 enum usb_device_speed max_speed;
828 void (*unbind)(struct usb_gadget *); 838 void (*unbind)(struct usb_gadget *);
829 int (*setup)(struct usb_gadget *, 839 int (*setup)(struct usb_gadget *,
830 const struct usb_ctrlrequest *); 840 const struct usb_ctrlrequest *);
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 03354d557b79..b2f62f3a32af 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -99,7 +99,6 @@ struct usb_hcd {
99 */ 99 */
100 unsigned long flags; 100 unsigned long flags;
101#define HCD_FLAG_HW_ACCESSIBLE 0 /* at full power */ 101#define HCD_FLAG_HW_ACCESSIBLE 0 /* at full power */
102#define HCD_FLAG_SAW_IRQ 1
103#define HCD_FLAG_POLL_RH 2 /* poll for rh status? */ 102#define HCD_FLAG_POLL_RH 2 /* poll for rh status? */
104#define HCD_FLAG_POLL_PENDING 3 /* status has changed? */ 103#define HCD_FLAG_POLL_PENDING 3 /* status has changed? */
105#define HCD_FLAG_WAKEUP_PENDING 4 /* root hub is resuming? */ 104#define HCD_FLAG_WAKEUP_PENDING 4 /* root hub is resuming? */
@@ -110,7 +109,6 @@ struct usb_hcd {
110 * be slightly faster than test_bit(). 109 * be slightly faster than test_bit().
111 */ 110 */
112#define HCD_HW_ACCESSIBLE(hcd) ((hcd)->flags & (1U << HCD_FLAG_HW_ACCESSIBLE)) 111#define HCD_HW_ACCESSIBLE(hcd) ((hcd)->flags & (1U << HCD_FLAG_HW_ACCESSIBLE))
113#define HCD_SAW_IRQ(hcd) ((hcd)->flags & (1U << HCD_FLAG_SAW_IRQ))
114#define HCD_POLL_RH(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_RH)) 112#define HCD_POLL_RH(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_RH))
115#define HCD_POLL_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_PENDING)) 113#define HCD_POLL_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_POLL_PENDING))
116#define HCD_WAKEUP_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_WAKEUP_PENDING)) 114#define HCD_WAKEUP_PENDING(hcd) ((hcd)->flags & (1U << HCD_FLAG_WAKEUP_PENDING))
diff --git a/include/linux/usb/renesas_usbhs.h b/include/linux/usb/renesas_usbhs.h
index e5a40c318548..0d3f98879256 100644
--- a/include/linux/usb/renesas_usbhs.h
+++ b/include/linux/usb/renesas_usbhs.h
@@ -67,6 +67,14 @@ struct renesas_usbhs_platform_callback {
67 /* 67 /*
68 * option: 68 * option:
69 * 69 *
70 * for board specific clock control
71 */
72 void (*power_ctrl)(struct platform_device *pdev,
73 void __iomem *base, int enable);
74
75 /*
76 * option:
77 *
70 * Phy reset for platform 78 * Phy reset for platform
71 */ 79 */
72 void (*phy_reset)(struct platform_device *pdev); 80 void (*phy_reset)(struct platform_device *pdev);
@@ -118,7 +126,7 @@ struct renesas_usbhs_driver_param {
118 * 126 *
119 * delay time from notify_hotplug callback 127 * delay time from notify_hotplug callback
120 */ 128 */
121 int detection_delay; 129 int detection_delay; /* msec */
122 130
123 /* 131 /*
124 * option: 132 * option:
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index b29f70b2ecae..4267a9c717ba 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -58,11 +58,13 @@ enum port_dev_state {
58 * @read_urb: pointer to the bulk in struct urb for this port. 58 * @read_urb: pointer to the bulk in struct urb for this port.
59 * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this 59 * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this
60 * port. 60 * port.
61 * @bulk_in_buffers: pointers to the bulk in buffers for this port
62 * @read_urbs: pointers to the bulk in urbs for this port
63 * @read_urbs_free: status bitmap the for bulk in urbs
61 * @bulk_out_buffer: pointer to the bulk out buffer for this port. 64 * @bulk_out_buffer: pointer to the bulk out buffer for this port.
62 * @bulk_out_size: the size of the bulk_out_buffer, in bytes. 65 * @bulk_out_size: the size of the bulk_out_buffer, in bytes.
63 * @write_urb: pointer to the bulk out struct urb for this port. 66 * @write_urb: pointer to the bulk out struct urb for this port.
64 * @write_fifo: kfifo used to buffer outgoing data 67 * @write_fifo: kfifo used to buffer outgoing data
65 * @write_urb_busy: port`s writing status
66 * @bulk_out_buffers: pointers to the bulk out buffers for this port 68 * @bulk_out_buffers: pointers to the bulk out buffers for this port
67 * @write_urbs: pointers to the bulk out urbs for this port 69 * @write_urbs: pointers to the bulk out urbs for this port
68 * @write_urbs_free: status bitmap the for bulk out urbs 70 * @write_urbs_free: status bitmap the for bulk out urbs
@@ -99,11 +101,14 @@ struct usb_serial_port {
99 struct urb *read_urb; 101 struct urb *read_urb;
100 __u8 bulk_in_endpointAddress; 102 __u8 bulk_in_endpointAddress;
101 103
104 unsigned char *bulk_in_buffers[2];
105 struct urb *read_urbs[2];
106 unsigned long read_urbs_free;
107
102 unsigned char *bulk_out_buffer; 108 unsigned char *bulk_out_buffer;
103 int bulk_out_size; 109 int bulk_out_size;
104 struct urb *write_urb; 110 struct urb *write_urb;
105 struct kfifo write_fifo; 111 struct kfifo write_fifo;
106 int write_urb_busy;
107 112
108 unsigned char *bulk_out_buffers[2]; 113 unsigned char *bulk_out_buffers[2];
109 struct urb *write_urbs[2]; 114 struct urb *write_urbs[2];
@@ -340,7 +345,7 @@ extern void usb_serial_generic_disconnect(struct usb_serial *serial);
340extern void usb_serial_generic_release(struct usb_serial *serial); 345extern void usb_serial_generic_release(struct usb_serial *serial);
341extern int usb_serial_generic_register(int debug); 346extern int usb_serial_generic_register(int debug);
342extern void usb_serial_generic_deregister(void); 347extern void usb_serial_generic_deregister(void);
343extern int usb_serial_generic_submit_read_urb(struct usb_serial_port *port, 348extern int usb_serial_generic_submit_read_urbs(struct usb_serial_port *port,
344 gfp_t mem_flags); 349 gfp_t mem_flags);
345extern void usb_serial_generic_process_read_urb(struct urb *urb); 350extern void usb_serial_generic_process_read_urb(struct urb *urb);
346extern int usb_serial_generic_prepare_write_buffer(struct usb_serial_port *port, 351extern int usb_serial_generic_prepare_write_buffer(struct usb_serial_port *port,
diff --git a/include/media/davinci/vpif_types.h b/include/media/davinci/vpif_types.h
new file mode 100644
index 000000000000..9929b05cff3a
--- /dev/null
+++ b/include/media/davinci/vpif_types.h
@@ -0,0 +1,71 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation version 2.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 */
17#ifndef _VPIF_TYPES_H
18#define _VPIF_TYPES_H
19
20#define VPIF_CAPTURE_MAX_CHANNELS 2
21
22enum vpif_if_type {
23 VPIF_IF_BT656,
24 VPIF_IF_BT1120,
25 VPIF_IF_RAW_BAYER
26};
27
28struct vpif_interface {
29 enum vpif_if_type if_type;
30 unsigned hd_pol:1;
31 unsigned vd_pol:1;
32 unsigned fid_pol:1;
33};
34
35struct vpif_subdev_info {
36 const char *name;
37 struct i2c_board_info board_info;
38 u32 input;
39 u32 output;
40 unsigned can_route:1;
41 struct vpif_interface vpif_if;
42};
43
44struct vpif_display_config {
45 int (*set_clock)(int, int);
46 struct vpif_subdev_info *subdevinfo;
47 int subdev_count;
48 const char **output;
49 int output_count;
50 const char *card_name;
51};
52
53struct vpif_input {
54 struct v4l2_input input;
55 const char *subdev_name;
56};
57
58struct vpif_capture_chan_config {
59 const struct vpif_input *inputs;
60 int input_count;
61};
62
63struct vpif_capture_config {
64 int (*setup_input_channel_mode)(int);
65 int (*setup_input_path)(int, const char *);
66 struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
67 struct vpif_subdev_info *subdev_info;
68 int subdev_count;
69 const char *card_name;
70};
71#endif /* _VPIF_TYPES_H */
diff --git a/include/net/snmp.h b/include/net/snmp.h
index 2f65e1686fc8..0147b901e79c 100644
--- a/include/net/snmp.h
+++ b/include/net/snmp.h
@@ -129,33 +129,33 @@ struct linux_xfrm_mib {
129 __this_cpu_inc(mib[0]->mibs[field]) 129 __this_cpu_inc(mib[0]->mibs[field])
130 130
131#define SNMP_INC_STATS_USER(mib, field) \ 131#define SNMP_INC_STATS_USER(mib, field) \
132 irqsafe_cpu_inc(mib[0]->mibs[field]) 132 this_cpu_inc(mib[0]->mibs[field])
133 133
134#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) \ 134#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) \
135 atomic_long_inc(&mib->mibs[field]) 135 atomic_long_inc(&mib->mibs[field])
136 136
137#define SNMP_INC_STATS(mib, field) \ 137#define SNMP_INC_STATS(mib, field) \
138 irqsafe_cpu_inc(mib[0]->mibs[field]) 138 this_cpu_inc(mib[0]->mibs[field])
139 139
140#define SNMP_DEC_STATS(mib, field) \ 140#define SNMP_DEC_STATS(mib, field) \
141 irqsafe_cpu_dec(mib[0]->mibs[field]) 141 this_cpu_dec(mib[0]->mibs[field])
142 142
143#define SNMP_ADD_STATS_BH(mib, field, addend) \ 143#define SNMP_ADD_STATS_BH(mib, field, addend) \
144 __this_cpu_add(mib[0]->mibs[field], addend) 144 __this_cpu_add(mib[0]->mibs[field], addend)
145 145
146#define SNMP_ADD_STATS_USER(mib, field, addend) \ 146#define SNMP_ADD_STATS_USER(mib, field, addend) \
147 irqsafe_cpu_add(mib[0]->mibs[field], addend) 147 this_cpu_add(mib[0]->mibs[field], addend)
148 148
149#define SNMP_ADD_STATS(mib, field, addend) \ 149#define SNMP_ADD_STATS(mib, field, addend) \
150 irqsafe_cpu_add(mib[0]->mibs[field], addend) 150 this_cpu_add(mib[0]->mibs[field], addend)
151/* 151/*
152 * Use "__typeof__(*mib[0]) *ptr" instead of "__typeof__(mib[0]) ptr" 152 * Use "__typeof__(*mib[0]) *ptr" instead of "__typeof__(mib[0]) ptr"
153 * to make @ptr a non-percpu pointer. 153 * to make @ptr a non-percpu pointer.
154 */ 154 */
155#define SNMP_UPD_PO_STATS(mib, basefield, addend) \ 155#define SNMP_UPD_PO_STATS(mib, basefield, addend) \
156 do { \ 156 do { \
157 irqsafe_cpu_inc(mib[0]->mibs[basefield##PKTS]); \ 157 this_cpu_inc(mib[0]->mibs[basefield##PKTS]); \
158 irqsafe_cpu_add(mib[0]->mibs[basefield##OCTETS], addend); \ 158 this_cpu_add(mib[0]->mibs[basefield##OCTETS], addend); \
159 } while (0) 159 } while (0)
160#define SNMP_UPD_PO_STATS_BH(mib, basefield, addend) \ 160#define SNMP_UPD_PO_STATS_BH(mib, basefield, addend) \
161 do { \ 161 do { \
diff --git a/include/sound/saif.h b/include/sound/saif.h
index d0e0de7984ec..f22f3e16edf4 100644
--- a/include/sound/saif.h
+++ b/include/sound/saif.h
@@ -10,7 +10,7 @@
10#define __SOUND_SAIF_H__ 10#define __SOUND_SAIF_H__
11 11
12struct mxs_saif_platform_data { 12struct mxs_saif_platform_data {
13 int (*init) (void); 13 bool master_mode; /* if true use master mode */
14 int (*get_master_id) (unsigned int saif_id); 14 int master_id; /* id of the master if in slave mode */
15}; 15};
16#endif 16#endif
diff --git a/kernel/audit.c b/kernel/audit.c
index 09fae2677a45..2c1d6ab7106e 100644
--- a/kernel/audit.c
+++ b/kernel/audit.c
@@ -1260,12 +1260,13 @@ static void audit_log_vformat(struct audit_buffer *ab, const char *fmt,
1260 avail = audit_expand(ab, 1260 avail = audit_expand(ab,
1261 max_t(unsigned, AUDIT_BUFSIZ, 1+len-avail)); 1261 max_t(unsigned, AUDIT_BUFSIZ, 1+len-avail));
1262 if (!avail) 1262 if (!avail)
1263 goto out; 1263 goto out_va_end;
1264 len = vsnprintf(skb_tail_pointer(skb), avail, fmt, args2); 1264 len = vsnprintf(skb_tail_pointer(skb), avail, fmt, args2);
1265 } 1265 }
1266 va_end(args2);
1267 if (len > 0) 1266 if (len > 0)
1268 skb_put(skb, len); 1267 skb_put(skb, len);
1268out_va_end:
1269 va_end(args2);
1269out: 1270out:
1270 return; 1271 return;
1271} 1272}
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 7cab65f83f1d..a5d3b5325f77 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -63,7 +63,24 @@
63 63
64#include <linux/atomic.h> 64#include <linux/atomic.h>
65 65
66/*
67 * cgroup_mutex is the master lock. Any modification to cgroup or its
68 * hierarchy must be performed while holding it.
69 *
70 * cgroup_root_mutex nests inside cgroup_mutex and should be held to modify
71 * cgroupfs_root of any cgroup hierarchy - subsys list, flags,
72 * release_agent_path and so on. Modifying requires both cgroup_mutex and
73 * cgroup_root_mutex. Readers can acquire either of the two. This is to
74 * break the following locking order cycle.
75 *
76 * A. cgroup_mutex -> cred_guard_mutex -> s_type->i_mutex_key -> namespace_sem
77 * B. namespace_sem -> cgroup_mutex
78 *
79 * B happens only through cgroup_show_options() and using cgroup_root_mutex
80 * breaks it.
81 */
66static DEFINE_MUTEX(cgroup_mutex); 82static DEFINE_MUTEX(cgroup_mutex);
83static DEFINE_MUTEX(cgroup_root_mutex);
67 84
68/* 85/*
69 * Generate an array of cgroup subsystem pointers. At boot time, this is 86 * Generate an array of cgroup subsystem pointers. At boot time, this is
@@ -921,7 +938,7 @@ static void cgroup_d_remove_dir(struct dentry *dentry)
921 * 938 *
922 * CGRP_WAIT_ON_RMDIR flag is set under cgroup's inode->i_mutex; 939 * CGRP_WAIT_ON_RMDIR flag is set under cgroup's inode->i_mutex;
923 */ 940 */
924DECLARE_WAIT_QUEUE_HEAD(cgroup_rmdir_waitq); 941static DECLARE_WAIT_QUEUE_HEAD(cgroup_rmdir_waitq);
925 942
926static void cgroup_wakeup_rmdir_waiter(struct cgroup *cgrp) 943static void cgroup_wakeup_rmdir_waiter(struct cgroup *cgrp)
927{ 944{
@@ -953,6 +970,7 @@ static int rebind_subsystems(struct cgroupfs_root *root,
953 int i; 970 int i;
954 971
955 BUG_ON(!mutex_is_locked(&cgroup_mutex)); 972 BUG_ON(!mutex_is_locked(&cgroup_mutex));
973 BUG_ON(!mutex_is_locked(&cgroup_root_mutex));
956 974
957 removed_bits = root->actual_subsys_bits & ~final_bits; 975 removed_bits = root->actual_subsys_bits & ~final_bits;
958 added_bits = final_bits & ~root->actual_subsys_bits; 976 added_bits = final_bits & ~root->actual_subsys_bits;
@@ -1043,7 +1061,7 @@ static int cgroup_show_options(struct seq_file *seq, struct dentry *dentry)
1043 struct cgroupfs_root *root = dentry->d_sb->s_fs_info; 1061 struct cgroupfs_root *root = dentry->d_sb->s_fs_info;
1044 struct cgroup_subsys *ss; 1062 struct cgroup_subsys *ss;
1045 1063
1046 mutex_lock(&cgroup_mutex); 1064 mutex_lock(&cgroup_root_mutex);
1047 for_each_subsys(root, ss) 1065 for_each_subsys(root, ss)
1048 seq_printf(seq, ",%s", ss->name); 1066 seq_printf(seq, ",%s", ss->name);
1049 if (test_bit(ROOT_NOPREFIX, &root->flags)) 1067 if (test_bit(ROOT_NOPREFIX, &root->flags))
@@ -1054,7 +1072,7 @@ static int cgroup_show_options(struct seq_file *seq, struct dentry *dentry)
1054 seq_puts(seq, ",clone_children"); 1072 seq_puts(seq, ",clone_children");
1055 if (strlen(root->name)) 1073 if (strlen(root->name))
1056 seq_printf(seq, ",name=%s", root->name); 1074 seq_printf(seq, ",name=%s", root->name);
1057 mutex_unlock(&cgroup_mutex); 1075 mutex_unlock(&cgroup_root_mutex);
1058 return 0; 1076 return 0;
1059} 1077}
1060 1078
@@ -1175,10 +1193,10 @@ static int parse_cgroupfs_options(char *data, struct cgroup_sb_opts *opts)
1175 1193
1176 /* 1194 /*
1177 * If the 'all' option was specified select all the subsystems, 1195 * If the 'all' option was specified select all the subsystems,
1178 * otherwise 'all, 'none' and a subsystem name options were not 1196 * otherwise if 'none', 'name=' and a subsystem name options
1179 * specified, let's default to 'all' 1197 * were not specified, let's default to 'all'
1180 */ 1198 */
1181 if (all_ss || (!all_ss && !one_ss && !opts->none)) { 1199 if (all_ss || (!one_ss && !opts->none && !opts->name)) {
1182 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) { 1200 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {
1183 struct cgroup_subsys *ss = subsys[i]; 1201 struct cgroup_subsys *ss = subsys[i];
1184 if (ss == NULL) 1202 if (ss == NULL)
@@ -1269,6 +1287,7 @@ static int cgroup_remount(struct super_block *sb, int *flags, char *data)
1269 1287
1270 mutex_lock(&cgrp->dentry->d_inode->i_mutex); 1288 mutex_lock(&cgrp->dentry->d_inode->i_mutex);
1271 mutex_lock(&cgroup_mutex); 1289 mutex_lock(&cgroup_mutex);
1290 mutex_lock(&cgroup_root_mutex);
1272 1291
1273 /* See what subsystems are wanted */ 1292 /* See what subsystems are wanted */
1274 ret = parse_cgroupfs_options(data, &opts); 1293 ret = parse_cgroupfs_options(data, &opts);
@@ -1297,6 +1316,7 @@ static int cgroup_remount(struct super_block *sb, int *flags, char *data)
1297 out_unlock: 1316 out_unlock:
1298 kfree(opts.release_agent); 1317 kfree(opts.release_agent);
1299 kfree(opts.name); 1318 kfree(opts.name);
1319 mutex_unlock(&cgroup_root_mutex);
1300 mutex_unlock(&cgroup_mutex); 1320 mutex_unlock(&cgroup_mutex);
1301 mutex_unlock(&cgrp->dentry->d_inode->i_mutex); 1321 mutex_unlock(&cgrp->dentry->d_inode->i_mutex);
1302 return ret; 1322 return ret;
@@ -1481,6 +1501,7 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type,
1481 int ret = 0; 1501 int ret = 0;
1482 struct super_block *sb; 1502 struct super_block *sb;
1483 struct cgroupfs_root *new_root; 1503 struct cgroupfs_root *new_root;
1504 struct inode *inode;
1484 1505
1485 /* First find the desired set of subsystems */ 1506 /* First find the desired set of subsystems */
1486 mutex_lock(&cgroup_mutex); 1507 mutex_lock(&cgroup_mutex);
@@ -1514,7 +1535,6 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type,
1514 /* We used the new root structure, so this is a new hierarchy */ 1535 /* We used the new root structure, so this is a new hierarchy */
1515 struct list_head tmp_cg_links; 1536 struct list_head tmp_cg_links;
1516 struct cgroup *root_cgrp = &root->top_cgroup; 1537 struct cgroup *root_cgrp = &root->top_cgroup;
1517 struct inode *inode;
1518 struct cgroupfs_root *existing_root; 1538 struct cgroupfs_root *existing_root;
1519 const struct cred *cred; 1539 const struct cred *cred;
1520 int i; 1540 int i;
@@ -1528,18 +1548,14 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type,
1528 1548
1529 mutex_lock(&inode->i_mutex); 1549 mutex_lock(&inode->i_mutex);
1530 mutex_lock(&cgroup_mutex); 1550 mutex_lock(&cgroup_mutex);
1551 mutex_lock(&cgroup_root_mutex);
1531 1552
1532 if (strlen(root->name)) { 1553 /* Check for name clashes with existing mounts */
1533 /* Check for name clashes with existing mounts */ 1554 ret = -EBUSY;
1534 for_each_active_root(existing_root) { 1555 if (strlen(root->name))
1535 if (!strcmp(existing_root->name, root->name)) { 1556 for_each_active_root(existing_root)
1536 ret = -EBUSY; 1557 if (!strcmp(existing_root->name, root->name))
1537 mutex_unlock(&cgroup_mutex); 1558 goto unlock_drop;
1538 mutex_unlock(&inode->i_mutex);
1539 goto drop_new_super;
1540 }
1541 }
1542 }
1543 1559
1544 /* 1560 /*
1545 * We're accessing css_set_count without locking 1561 * We're accessing css_set_count without locking
@@ -1549,18 +1565,13 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type,
1549 * have some link structures left over 1565 * have some link structures left over
1550 */ 1566 */
1551 ret = allocate_cg_links(css_set_count, &tmp_cg_links); 1567 ret = allocate_cg_links(css_set_count, &tmp_cg_links);
1552 if (ret) { 1568 if (ret)
1553 mutex_unlock(&cgroup_mutex); 1569 goto unlock_drop;
1554 mutex_unlock(&inode->i_mutex);
1555 goto drop_new_super;
1556 }
1557 1570
1558 ret = rebind_subsystems(root, root->subsys_bits); 1571 ret = rebind_subsystems(root, root->subsys_bits);
1559 if (ret == -EBUSY) { 1572 if (ret == -EBUSY) {
1560 mutex_unlock(&cgroup_mutex);
1561 mutex_unlock(&inode->i_mutex);
1562 free_cg_links(&tmp_cg_links); 1573 free_cg_links(&tmp_cg_links);
1563 goto drop_new_super; 1574 goto unlock_drop;
1564 } 1575 }
1565 /* 1576 /*
1566 * There must be no failure case after here, since rebinding 1577 * There must be no failure case after here, since rebinding
@@ -1599,6 +1610,7 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type,
1599 cred = override_creds(&init_cred); 1610 cred = override_creds(&init_cred);
1600 cgroup_populate_dir(root_cgrp); 1611 cgroup_populate_dir(root_cgrp);
1601 revert_creds(cred); 1612 revert_creds(cred);
1613 mutex_unlock(&cgroup_root_mutex);
1602 mutex_unlock(&cgroup_mutex); 1614 mutex_unlock(&cgroup_mutex);
1603 mutex_unlock(&inode->i_mutex); 1615 mutex_unlock(&inode->i_mutex);
1604 } else { 1616 } else {
@@ -1615,6 +1627,10 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type,
1615 kfree(opts.name); 1627 kfree(opts.name);
1616 return dget(sb->s_root); 1628 return dget(sb->s_root);
1617 1629
1630 unlock_drop:
1631 mutex_unlock(&cgroup_root_mutex);
1632 mutex_unlock(&cgroup_mutex);
1633 mutex_unlock(&inode->i_mutex);
1618 drop_new_super: 1634 drop_new_super:
1619 deactivate_locked_super(sb); 1635 deactivate_locked_super(sb);
1620 drop_modules: 1636 drop_modules:
@@ -1639,6 +1655,7 @@ static void cgroup_kill_sb(struct super_block *sb) {
1639 BUG_ON(!list_empty(&cgrp->sibling)); 1655 BUG_ON(!list_empty(&cgrp->sibling));
1640 1656
1641 mutex_lock(&cgroup_mutex); 1657 mutex_lock(&cgroup_mutex);
1658 mutex_lock(&cgroup_root_mutex);
1642 1659
1643 /* Rebind all subsystems back to the default hierarchy */ 1660 /* Rebind all subsystems back to the default hierarchy */
1644 ret = rebind_subsystems(root, 0); 1661 ret = rebind_subsystems(root, 0);
@@ -1664,6 +1681,7 @@ static void cgroup_kill_sb(struct super_block *sb) {
1664 root_count--; 1681 root_count--;
1665 } 1682 }
1666 1683
1684 mutex_unlock(&cgroup_root_mutex);
1667 mutex_unlock(&cgroup_mutex); 1685 mutex_unlock(&cgroup_mutex);
1668 1686
1669 kill_litter_super(sb); 1687 kill_litter_super(sb);
@@ -1740,11 +1758,90 @@ int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen)
1740EXPORT_SYMBOL_GPL(cgroup_path); 1758EXPORT_SYMBOL_GPL(cgroup_path);
1741 1759
1742/* 1760/*
1761 * Control Group taskset
1762 */
1763struct task_and_cgroup {
1764 struct task_struct *task;
1765 struct cgroup *cgrp;
1766};
1767
1768struct cgroup_taskset {
1769 struct task_and_cgroup single;
1770 struct flex_array *tc_array;
1771 int tc_array_len;
1772 int idx;
1773 struct cgroup *cur_cgrp;
1774};
1775
1776/**
1777 * cgroup_taskset_first - reset taskset and return the first task
1778 * @tset: taskset of interest
1779 *
1780 * @tset iteration is initialized and the first task is returned.
1781 */
1782struct task_struct *cgroup_taskset_first(struct cgroup_taskset *tset)
1783{
1784 if (tset->tc_array) {
1785 tset->idx = 0;
1786 return cgroup_taskset_next(tset);
1787 } else {
1788 tset->cur_cgrp = tset->single.cgrp;
1789 return tset->single.task;
1790 }
1791}
1792EXPORT_SYMBOL_GPL(cgroup_taskset_first);
1793
1794/**
1795 * cgroup_taskset_next - iterate to the next task in taskset
1796 * @tset: taskset of interest
1797 *
1798 * Return the next task in @tset. Iteration must have been initialized
1799 * with cgroup_taskset_first().
1800 */
1801struct task_struct *cgroup_taskset_next(struct cgroup_taskset *tset)
1802{
1803 struct task_and_cgroup *tc;
1804
1805 if (!tset->tc_array || tset->idx >= tset->tc_array_len)
1806 return NULL;
1807
1808 tc = flex_array_get(tset->tc_array, tset->idx++);
1809 tset->cur_cgrp = tc->cgrp;
1810 return tc->task;
1811}
1812EXPORT_SYMBOL_GPL(cgroup_taskset_next);
1813
1814/**
1815 * cgroup_taskset_cur_cgroup - return the matching cgroup for the current task
1816 * @tset: taskset of interest
1817 *
1818 * Return the cgroup for the current (last returned) task of @tset. This
1819 * function must be preceded by either cgroup_taskset_first() or
1820 * cgroup_taskset_next().
1821 */
1822struct cgroup *cgroup_taskset_cur_cgroup(struct cgroup_taskset *tset)
1823{
1824 return tset->cur_cgrp;
1825}
1826EXPORT_SYMBOL_GPL(cgroup_taskset_cur_cgroup);
1827
1828/**
1829 * cgroup_taskset_size - return the number of tasks in taskset
1830 * @tset: taskset of interest
1831 */
1832int cgroup_taskset_size(struct cgroup_taskset *tset)
1833{
1834 return tset->tc_array ? tset->tc_array_len : 1;
1835}
1836EXPORT_SYMBOL_GPL(cgroup_taskset_size);
1837
1838
1839/*
1743 * cgroup_task_migrate - move a task from one cgroup to another. 1840 * cgroup_task_migrate - move a task from one cgroup to another.
1744 * 1841 *
1745 * 'guarantee' is set if the caller promises that a new css_set for the task 1842 * 'guarantee' is set if the caller promises that a new css_set for the task
1746 * will already exist. If not set, this function might sleep, and can fail with 1843 * will already exist. If not set, this function might sleep, and can fail with
1747 * -ENOMEM. Otherwise, it can only fail with -ESRCH. 1844 * -ENOMEM. Must be called with cgroup_mutex and threadgroup locked.
1748 */ 1845 */
1749static int cgroup_task_migrate(struct cgroup *cgrp, struct cgroup *oldcgrp, 1846static int cgroup_task_migrate(struct cgroup *cgrp, struct cgroup *oldcgrp,
1750 struct task_struct *tsk, bool guarantee) 1847 struct task_struct *tsk, bool guarantee)
@@ -1753,14 +1850,12 @@ static int cgroup_task_migrate(struct cgroup *cgrp, struct cgroup *oldcgrp,
1753 struct css_set *newcg; 1850 struct css_set *newcg;
1754 1851
1755 /* 1852 /*
1756 * get old css_set. we need to take task_lock and refcount it, because 1853 * We are synchronized through threadgroup_lock() against PF_EXITING
1757 * an exiting task can change its css_set to init_css_set and drop its 1854 * setting such that we can't race against cgroup_exit() changing the
1758 * old one without taking cgroup_mutex. 1855 * css_set to init_css_set and dropping the old one.
1759 */ 1856 */
1760 task_lock(tsk); 1857 WARN_ON_ONCE(tsk->flags & PF_EXITING);
1761 oldcg = tsk->cgroups; 1858 oldcg = tsk->cgroups;
1762 get_css_set(oldcg);
1763 task_unlock(tsk);
1764 1859
1765 /* locate or allocate a new css_set for this task. */ 1860 /* locate or allocate a new css_set for this task. */
1766 if (guarantee) { 1861 if (guarantee) {
@@ -1775,20 +1870,11 @@ static int cgroup_task_migrate(struct cgroup *cgrp, struct cgroup *oldcgrp,
1775 might_sleep(); 1870 might_sleep();
1776 /* find_css_set will give us newcg already referenced. */ 1871 /* find_css_set will give us newcg already referenced. */
1777 newcg = find_css_set(oldcg, cgrp); 1872 newcg = find_css_set(oldcg, cgrp);
1778 if (!newcg) { 1873 if (!newcg)
1779 put_css_set(oldcg);
1780 return -ENOMEM; 1874 return -ENOMEM;
1781 }
1782 } 1875 }
1783 put_css_set(oldcg);
1784 1876
1785 /* if PF_EXITING is set, the tsk->cgroups pointer is no longer safe. */
1786 task_lock(tsk); 1877 task_lock(tsk);
1787 if (tsk->flags & PF_EXITING) {
1788 task_unlock(tsk);
1789 put_css_set(newcg);
1790 return -ESRCH;
1791 }
1792 rcu_assign_pointer(tsk->cgroups, newcg); 1878 rcu_assign_pointer(tsk->cgroups, newcg);
1793 task_unlock(tsk); 1879 task_unlock(tsk);
1794 1880
@@ -1814,8 +1900,8 @@ static int cgroup_task_migrate(struct cgroup *cgrp, struct cgroup *oldcgrp,
1814 * @cgrp: the cgroup the task is attaching to 1900 * @cgrp: the cgroup the task is attaching to
1815 * @tsk: the task to be attached 1901 * @tsk: the task to be attached
1816 * 1902 *
1817 * Call holding cgroup_mutex. May take task_lock of 1903 * Call with cgroup_mutex and threadgroup locked. May take task_lock of
1818 * the task 'tsk' during call. 1904 * @tsk during call.
1819 */ 1905 */
1820int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk) 1906int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1821{ 1907{
@@ -1823,15 +1909,23 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1823 struct cgroup_subsys *ss, *failed_ss = NULL; 1909 struct cgroup_subsys *ss, *failed_ss = NULL;
1824 struct cgroup *oldcgrp; 1910 struct cgroup *oldcgrp;
1825 struct cgroupfs_root *root = cgrp->root; 1911 struct cgroupfs_root *root = cgrp->root;
1912 struct cgroup_taskset tset = { };
1913
1914 /* @tsk either already exited or can't exit until the end */
1915 if (tsk->flags & PF_EXITING)
1916 return -ESRCH;
1826 1917
1827 /* Nothing to do if the task is already in that cgroup */ 1918 /* Nothing to do if the task is already in that cgroup */
1828 oldcgrp = task_cgroup_from_root(tsk, root); 1919 oldcgrp = task_cgroup_from_root(tsk, root);
1829 if (cgrp == oldcgrp) 1920 if (cgrp == oldcgrp)
1830 return 0; 1921 return 0;
1831 1922
1923 tset.single.task = tsk;
1924 tset.single.cgrp = oldcgrp;
1925
1832 for_each_subsys(root, ss) { 1926 for_each_subsys(root, ss) {
1833 if (ss->can_attach) { 1927 if (ss->can_attach) {
1834 retval = ss->can_attach(ss, cgrp, tsk); 1928 retval = ss->can_attach(ss, cgrp, &tset);
1835 if (retval) { 1929 if (retval) {
1836 /* 1930 /*
1837 * Remember on which subsystem the can_attach() 1931 * Remember on which subsystem the can_attach()
@@ -1843,13 +1937,6 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1843 goto out; 1937 goto out;
1844 } 1938 }
1845 } 1939 }
1846 if (ss->can_attach_task) {
1847 retval = ss->can_attach_task(cgrp, tsk);
1848 if (retval) {
1849 failed_ss = ss;
1850 goto out;
1851 }
1852 }
1853 } 1940 }
1854 1941
1855 retval = cgroup_task_migrate(cgrp, oldcgrp, tsk, false); 1942 retval = cgroup_task_migrate(cgrp, oldcgrp, tsk, false);
@@ -1857,12 +1944,8 @@ int cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
1857 goto out; 1944 goto out;
1858 1945
1859 for_each_subsys(root, ss) { 1946 for_each_subsys(root, ss) {
1860 if (ss->pre_attach)
1861 ss->pre_attach(cgrp);
1862 if (ss->attach_task)
1863 ss->attach_task(cgrp, tsk);
1864 if (ss->attach) 1947 if (ss->attach)
1865 ss->attach(ss, cgrp, oldcgrp, tsk); 1948 ss->attach(ss, cgrp, &tset);
1866 } 1949 }
1867 1950
1868 synchronize_rcu(); 1951 synchronize_rcu();
@@ -1884,7 +1967,7 @@ out:
1884 */ 1967 */
1885 break; 1968 break;
1886 if (ss->cancel_attach) 1969 if (ss->cancel_attach)
1887 ss->cancel_attach(ss, cgrp, tsk); 1970 ss->cancel_attach(ss, cgrp, &tset);
1888 } 1971 }
1889 } 1972 }
1890 return retval; 1973 return retval;
@@ -1935,23 +2018,17 @@ static bool css_set_check_fetched(struct cgroup *cgrp,
1935 2018
1936 read_lock(&css_set_lock); 2019 read_lock(&css_set_lock);
1937 newcg = find_existing_css_set(cg, cgrp, template); 2020 newcg = find_existing_css_set(cg, cgrp, template);
1938 if (newcg)
1939 get_css_set(newcg);
1940 read_unlock(&css_set_lock); 2021 read_unlock(&css_set_lock);
1941 2022
1942 /* doesn't exist at all? */ 2023 /* doesn't exist at all? */
1943 if (!newcg) 2024 if (!newcg)
1944 return false; 2025 return false;
1945 /* see if it's already in the list */ 2026 /* see if it's already in the list */
1946 list_for_each_entry(cg_entry, newcg_list, links) { 2027 list_for_each_entry(cg_entry, newcg_list, links)
1947 if (cg_entry->cg == newcg) { 2028 if (cg_entry->cg == newcg)
1948 put_css_set(newcg);
1949 return true; 2029 return true;
1950 }
1951 }
1952 2030
1953 /* not found */ 2031 /* not found */
1954 put_css_set(newcg);
1955 return false; 2032 return false;
1956} 2033}
1957 2034
@@ -1985,21 +2062,21 @@ static int css_set_prefetch(struct cgroup *cgrp, struct css_set *cg,
1985 * @cgrp: the cgroup to attach to 2062 * @cgrp: the cgroup to attach to
1986 * @leader: the threadgroup leader task_struct of the group to be attached 2063 * @leader: the threadgroup leader task_struct of the group to be attached
1987 * 2064 *
1988 * Call holding cgroup_mutex and the threadgroup_fork_lock of the leader. Will 2065 * Call holding cgroup_mutex and the group_rwsem of the leader. Will take
1989 * take task_lock of each thread in leader's threadgroup individually in turn. 2066 * task_lock of each thread in leader's threadgroup individually in turn.
1990 */ 2067 */
1991int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader) 2068static int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader)
1992{ 2069{
1993 int retval, i, group_size; 2070 int retval, i, group_size;
1994 struct cgroup_subsys *ss, *failed_ss = NULL; 2071 struct cgroup_subsys *ss, *failed_ss = NULL;
1995 bool cancel_failed_ss = false;
1996 /* guaranteed to be initialized later, but the compiler needs this */ 2072 /* guaranteed to be initialized later, but the compiler needs this */
1997 struct cgroup *oldcgrp = NULL;
1998 struct css_set *oldcg; 2073 struct css_set *oldcg;
1999 struct cgroupfs_root *root = cgrp->root; 2074 struct cgroupfs_root *root = cgrp->root;
2000 /* threadgroup list cursor and array */ 2075 /* threadgroup list cursor and array */
2001 struct task_struct *tsk; 2076 struct task_struct *tsk;
2077 struct task_and_cgroup *tc;
2002 struct flex_array *group; 2078 struct flex_array *group;
2079 struct cgroup_taskset tset = { };
2003 /* 2080 /*
2004 * we need to make sure we have css_sets for all the tasks we're 2081 * we need to make sure we have css_sets for all the tasks we're
2005 * going to move -before- we actually start moving them, so that in 2082 * going to move -before- we actually start moving them, so that in
@@ -2012,13 +2089,12 @@ int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader)
2012 * step 0: in order to do expensive, possibly blocking operations for 2089 * step 0: in order to do expensive, possibly blocking operations for
2013 * every thread, we cannot iterate the thread group list, since it needs 2090 * every thread, we cannot iterate the thread group list, since it needs
2014 * rcu or tasklist locked. instead, build an array of all threads in the 2091 * rcu or tasklist locked. instead, build an array of all threads in the
2015 * group - threadgroup_fork_lock prevents new threads from appearing, 2092 * group - group_rwsem prevents new threads from appearing, and if
2016 * and if threads exit, this will just be an over-estimate. 2093 * threads exit, this will just be an over-estimate.
2017 */ 2094 */
2018 group_size = get_nr_threads(leader); 2095 group_size = get_nr_threads(leader);
2019 /* flex_array supports very large thread-groups better than kmalloc. */ 2096 /* flex_array supports very large thread-groups better than kmalloc. */
2020 group = flex_array_alloc(sizeof(struct task_struct *), group_size, 2097 group = flex_array_alloc(sizeof(*tc), group_size, GFP_KERNEL);
2021 GFP_KERNEL);
2022 if (!group) 2098 if (!group)
2023 return -ENOMEM; 2099 return -ENOMEM;
2024 /* pre-allocate to guarantee space while iterating in rcu read-side. */ 2100 /* pre-allocate to guarantee space while iterating in rcu read-side. */
@@ -2040,49 +2116,53 @@ int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader)
2040 retval = -EAGAIN; 2116 retval = -EAGAIN;
2041 goto out_free_group_list; 2117 goto out_free_group_list;
2042 } 2118 }
2043 /* take a reference on each task in the group to go in the array. */ 2119
2044 tsk = leader; 2120 tsk = leader;
2045 i = 0; 2121 i = 0;
2046 do { 2122 do {
2123 struct task_and_cgroup ent;
2124
2125 /* @tsk either already exited or can't exit until the end */
2126 if (tsk->flags & PF_EXITING)
2127 continue;
2128
2047 /* as per above, nr_threads may decrease, but not increase. */ 2129 /* as per above, nr_threads may decrease, but not increase. */
2048 BUG_ON(i >= group_size); 2130 BUG_ON(i >= group_size);
2049 get_task_struct(tsk);
2050 /* 2131 /*
2051 * saying GFP_ATOMIC has no effect here because we did prealloc 2132 * saying GFP_ATOMIC has no effect here because we did prealloc
2052 * earlier, but it's good form to communicate our expectations. 2133 * earlier, but it's good form to communicate our expectations.
2053 */ 2134 */
2054 retval = flex_array_put_ptr(group, i, tsk, GFP_ATOMIC); 2135 ent.task = tsk;
2136 ent.cgrp = task_cgroup_from_root(tsk, root);
2137 /* nothing to do if this task is already in the cgroup */
2138 if (ent.cgrp == cgrp)
2139 continue;
2140 retval = flex_array_put(group, i, &ent, GFP_ATOMIC);
2055 BUG_ON(retval != 0); 2141 BUG_ON(retval != 0);
2056 i++; 2142 i++;
2057 } while_each_thread(leader, tsk); 2143 } while_each_thread(leader, tsk);
2058 /* remember the number of threads in the array for later. */ 2144 /* remember the number of threads in the array for later. */
2059 group_size = i; 2145 group_size = i;
2146 tset.tc_array = group;
2147 tset.tc_array_len = group_size;
2060 read_unlock(&tasklist_lock); 2148 read_unlock(&tasklist_lock);
2061 2149
2150 /* methods shouldn't be called if no task is actually migrating */
2151 retval = 0;
2152 if (!group_size)
2153 goto out_free_group_list;
2154
2062 /* 2155 /*
2063 * step 1: check that we can legitimately attach to the cgroup. 2156 * step 1: check that we can legitimately attach to the cgroup.
2064 */ 2157 */
2065 for_each_subsys(root, ss) { 2158 for_each_subsys(root, ss) {
2066 if (ss->can_attach) { 2159 if (ss->can_attach) {
2067 retval = ss->can_attach(ss, cgrp, leader); 2160 retval = ss->can_attach(ss, cgrp, &tset);
2068 if (retval) { 2161 if (retval) {
2069 failed_ss = ss; 2162 failed_ss = ss;
2070 goto out_cancel_attach; 2163 goto out_cancel_attach;
2071 } 2164 }
2072 } 2165 }
2073 /* a callback to be run on every thread in the threadgroup. */
2074 if (ss->can_attach_task) {
2075 /* run on each task in the threadgroup. */
2076 for (i = 0; i < group_size; i++) {
2077 tsk = flex_array_get_ptr(group, i);
2078 retval = ss->can_attach_task(cgrp, tsk);
2079 if (retval) {
2080 failed_ss = ss;
2081 cancel_failed_ss = true;
2082 goto out_cancel_attach;
2083 }
2084 }
2085 }
2086 } 2166 }
2087 2167
2088 /* 2168 /*
@@ -2091,67 +2171,36 @@ int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader)
2091 */ 2171 */
2092 INIT_LIST_HEAD(&newcg_list); 2172 INIT_LIST_HEAD(&newcg_list);
2093 for (i = 0; i < group_size; i++) { 2173 for (i = 0; i < group_size; i++) {
2094 tsk = flex_array_get_ptr(group, i); 2174 tc = flex_array_get(group, i);
2095 /* nothing to do if this task is already in the cgroup */ 2175 oldcg = tc->task->cgroups;
2096 oldcgrp = task_cgroup_from_root(tsk, root); 2176
2097 if (cgrp == oldcgrp) 2177 /* if we don't already have it in the list get a new one */
2098 continue; 2178 if (!css_set_check_fetched(cgrp, tc->task, oldcg,
2099 /* get old css_set pointer */ 2179 &newcg_list)) {
2100 task_lock(tsk);
2101 oldcg = tsk->cgroups;
2102 get_css_set(oldcg);
2103 task_unlock(tsk);
2104 /* see if the new one for us is already in the list? */
2105 if (css_set_check_fetched(cgrp, tsk, oldcg, &newcg_list)) {
2106 /* was already there, nothing to do. */
2107 put_css_set(oldcg);
2108 } else {
2109 /* we don't already have it. get new one. */
2110 retval = css_set_prefetch(cgrp, oldcg, &newcg_list); 2180 retval = css_set_prefetch(cgrp, oldcg, &newcg_list);
2111 put_css_set(oldcg);
2112 if (retval) 2181 if (retval)
2113 goto out_list_teardown; 2182 goto out_list_teardown;
2114 } 2183 }
2115 } 2184 }
2116 2185
2117 /* 2186 /*
2118 * step 3: now that we're guaranteed success wrt the css_sets, proceed 2187 * step 3: now that we're guaranteed success wrt the css_sets,
2119 * to move all tasks to the new cgroup, calling ss->attach_task for each 2188 * proceed to move all tasks to the new cgroup. There are no
2120 * one along the way. there are no failure cases after here, so this is 2189 * failure cases after here, so this is the commit point.
2121 * the commit point.
2122 */ 2190 */
2123 for_each_subsys(root, ss) {
2124 if (ss->pre_attach)
2125 ss->pre_attach(cgrp);
2126 }
2127 for (i = 0; i < group_size; i++) { 2191 for (i = 0; i < group_size; i++) {
2128 tsk = flex_array_get_ptr(group, i); 2192 tc = flex_array_get(group, i);
2129 /* leave current thread as it is if it's already there */ 2193 retval = cgroup_task_migrate(cgrp, tc->cgrp, tc->task, true);
2130 oldcgrp = task_cgroup_from_root(tsk, root); 2194 BUG_ON(retval);
2131 if (cgrp == oldcgrp)
2132 continue;
2133 /* if the thread is PF_EXITING, it can just get skipped. */
2134 retval = cgroup_task_migrate(cgrp, oldcgrp, tsk, true);
2135 if (retval == 0) {
2136 /* attach each task to each subsystem */
2137 for_each_subsys(root, ss) {
2138 if (ss->attach_task)
2139 ss->attach_task(cgrp, tsk);
2140 }
2141 } else {
2142 BUG_ON(retval != -ESRCH);
2143 }
2144 } 2195 }
2145 /* nothing is sensitive to fork() after this point. */ 2196 /* nothing is sensitive to fork() after this point. */
2146 2197
2147 /* 2198 /*
2148 * step 4: do expensive, non-thread-specific subsystem callbacks. 2199 * step 4: do subsystem attach callbacks.
2149 * TODO: if ever a subsystem needs to know the oldcgrp for each task
2150 * being moved, this call will need to be reworked to communicate that.
2151 */ 2200 */
2152 for_each_subsys(root, ss) { 2201 for_each_subsys(root, ss) {
2153 if (ss->attach) 2202 if (ss->attach)
2154 ss->attach(ss, cgrp, oldcgrp, leader); 2203 ss->attach(ss, cgrp, &tset);
2155 } 2204 }
2156 2205
2157 /* 2206 /*
@@ -2171,20 +2220,12 @@ out_cancel_attach:
2171 /* same deal as in cgroup_attach_task */ 2220 /* same deal as in cgroup_attach_task */
2172 if (retval) { 2221 if (retval) {
2173 for_each_subsys(root, ss) { 2222 for_each_subsys(root, ss) {
2174 if (ss == failed_ss) { 2223 if (ss == failed_ss)
2175 if (cancel_failed_ss && ss->cancel_attach)
2176 ss->cancel_attach(ss, cgrp, leader);
2177 break; 2224 break;
2178 }
2179 if (ss->cancel_attach) 2225 if (ss->cancel_attach)
2180 ss->cancel_attach(ss, cgrp, leader); 2226 ss->cancel_attach(ss, cgrp, &tset);
2181 } 2227 }
2182 } 2228 }
2183 /* clean up the array of referenced threads in the group. */
2184 for (i = 0; i < group_size; i++) {
2185 tsk = flex_array_get_ptr(group, i);
2186 put_task_struct(tsk);
2187 }
2188out_free_group_list: 2229out_free_group_list:
2189 flex_array_free(group); 2230 flex_array_free(group);
2190 return retval; 2231 return retval;
@@ -2192,8 +2233,8 @@ out_free_group_list:
2192 2233
2193/* 2234/*
2194 * Find the task_struct of the task to attach by vpid and pass it along to the 2235 * Find the task_struct of the task to attach by vpid and pass it along to the
2195 * function to attach either it or all tasks in its threadgroup. Will take 2236 * function to attach either it or all tasks in its threadgroup. Will lock
2196 * cgroup_mutex; may take task_lock of task. 2237 * cgroup_mutex and threadgroup; may take task_lock of task.
2197 */ 2238 */
2198static int attach_task_by_pid(struct cgroup *cgrp, u64 pid, bool threadgroup) 2239static int attach_task_by_pid(struct cgroup *cgrp, u64 pid, bool threadgroup)
2199{ 2240{
@@ -2220,13 +2261,7 @@ static int attach_task_by_pid(struct cgroup *cgrp, u64 pid, bool threadgroup)
2220 * detect it later. 2261 * detect it later.
2221 */ 2262 */
2222 tsk = tsk->group_leader; 2263 tsk = tsk->group_leader;
2223 } else if (tsk->flags & PF_EXITING) {
2224 /* optimization for the single-task-only case */
2225 rcu_read_unlock();
2226 cgroup_unlock();
2227 return -ESRCH;
2228 } 2264 }
2229
2230 /* 2265 /*
2231 * even if we're attaching all tasks in the thread group, we 2266 * even if we're attaching all tasks in the thread group, we
2232 * only need to check permissions on one of them. 2267 * only need to check permissions on one of them.
@@ -2249,13 +2284,15 @@ static int attach_task_by_pid(struct cgroup *cgrp, u64 pid, bool threadgroup)
2249 get_task_struct(tsk); 2284 get_task_struct(tsk);
2250 } 2285 }
2251 2286
2252 if (threadgroup) { 2287 threadgroup_lock(tsk);
2253 threadgroup_fork_write_lock(tsk); 2288
2289 if (threadgroup)
2254 ret = cgroup_attach_proc(cgrp, tsk); 2290 ret = cgroup_attach_proc(cgrp, tsk);
2255 threadgroup_fork_write_unlock(tsk); 2291 else
2256 } else {
2257 ret = cgroup_attach_task(cgrp, tsk); 2292 ret = cgroup_attach_task(cgrp, tsk);
2258 } 2293
2294 threadgroup_unlock(tsk);
2295
2259 put_task_struct(tsk); 2296 put_task_struct(tsk);
2260 cgroup_unlock(); 2297 cgroup_unlock();
2261 return ret; 2298 return ret;
@@ -2306,7 +2343,9 @@ static int cgroup_release_agent_write(struct cgroup *cgrp, struct cftype *cft,
2306 return -EINVAL; 2343 return -EINVAL;
2307 if (!cgroup_lock_live_group(cgrp)) 2344 if (!cgroup_lock_live_group(cgrp))
2308 return -ENODEV; 2345 return -ENODEV;
2346 mutex_lock(&cgroup_root_mutex);
2309 strcpy(cgrp->root->release_agent_path, buffer); 2347 strcpy(cgrp->root->release_agent_path, buffer);
2348 mutex_unlock(&cgroup_root_mutex);
2310 cgroup_unlock(); 2349 cgroup_unlock();
2311 return 0; 2350 return 0;
2312} 2351}
@@ -2789,6 +2828,7 @@ static void cgroup_enable_task_cg_lists(void)
2789} 2828}
2790 2829
2791void cgroup_iter_start(struct cgroup *cgrp, struct cgroup_iter *it) 2830void cgroup_iter_start(struct cgroup *cgrp, struct cgroup_iter *it)
2831 __acquires(css_set_lock)
2792{ 2832{
2793 /* 2833 /*
2794 * The first time anyone tries to iterate across a cgroup, 2834 * The first time anyone tries to iterate across a cgroup,
@@ -2828,6 +2868,7 @@ struct task_struct *cgroup_iter_next(struct cgroup *cgrp,
2828} 2868}
2829 2869
2830void cgroup_iter_end(struct cgroup *cgrp, struct cgroup_iter *it) 2870void cgroup_iter_end(struct cgroup *cgrp, struct cgroup_iter *it)
2871 __releases(css_set_lock)
2831{ 2872{
2832 read_unlock(&css_set_lock); 2873 read_unlock(&css_set_lock);
2833} 2874}
@@ -4491,20 +4532,31 @@ static const struct file_operations proc_cgroupstats_operations = {
4491 * 4532 *
4492 * A pointer to the shared css_set was automatically copied in 4533 * A pointer to the shared css_set was automatically copied in
4493 * fork.c by dup_task_struct(). However, we ignore that copy, since 4534 * fork.c by dup_task_struct(). However, we ignore that copy, since
4494 * it was not made under the protection of RCU or cgroup_mutex, so 4535 * it was not made under the protection of RCU, cgroup_mutex or
4495 * might no longer be a valid cgroup pointer. cgroup_attach_task() might 4536 * threadgroup_change_begin(), so it might no longer be a valid
4496 * have already changed current->cgroups, allowing the previously 4537 * cgroup pointer. cgroup_attach_task() might have already changed
4497 * referenced cgroup group to be removed and freed. 4538 * current->cgroups, allowing the previously referenced cgroup
4539 * group to be removed and freed.
4540 *
4541 * Outside the pointer validity we also need to process the css_set
4542 * inheritance between threadgoup_change_begin() and
4543 * threadgoup_change_end(), this way there is no leak in any process
4544 * wide migration performed by cgroup_attach_proc() that could otherwise
4545 * miss a thread because it is too early or too late in the fork stage.
4498 * 4546 *
4499 * At the point that cgroup_fork() is called, 'current' is the parent 4547 * At the point that cgroup_fork() is called, 'current' is the parent
4500 * task, and the passed argument 'child' points to the child task. 4548 * task, and the passed argument 'child' points to the child task.
4501 */ 4549 */
4502void cgroup_fork(struct task_struct *child) 4550void cgroup_fork(struct task_struct *child)
4503{ 4551{
4504 task_lock(current); 4552 /*
4553 * We don't need to task_lock() current because current->cgroups
4554 * can't be changed concurrently here. The parent obviously hasn't
4555 * exited and called cgroup_exit(), and we are synchronized against
4556 * cgroup migration through threadgroup_change_begin().
4557 */
4505 child->cgroups = current->cgroups; 4558 child->cgroups = current->cgroups;
4506 get_css_set(child->cgroups); 4559 get_css_set(child->cgroups);
4507 task_unlock(current);
4508 INIT_LIST_HEAD(&child->cg_list); 4560 INIT_LIST_HEAD(&child->cg_list);
4509} 4561}
4510 4562
@@ -4546,10 +4598,19 @@ void cgroup_post_fork(struct task_struct *child)
4546{ 4598{
4547 if (use_task_css_set_links) { 4599 if (use_task_css_set_links) {
4548 write_lock(&css_set_lock); 4600 write_lock(&css_set_lock);
4549 task_lock(child); 4601 if (list_empty(&child->cg_list)) {
4550 if (list_empty(&child->cg_list)) 4602 /*
4603 * It's safe to use child->cgroups without task_lock()
4604 * here because we are protected through
4605 * threadgroup_change_begin() against concurrent
4606 * css_set change in cgroup_task_migrate(). Also
4607 * the task can't exit at that point until
4608 * wake_up_new_task() is called, so we are protected
4609 * against cgroup_exit() setting child->cgroup to
4610 * init_css_set.
4611 */
4551 list_add(&child->cg_list, &child->cgroups->tasks); 4612 list_add(&child->cg_list, &child->cgroups->tasks);
4552 task_unlock(child); 4613 }
4553 write_unlock(&css_set_lock); 4614 write_unlock(&css_set_lock);
4554 } 4615 }
4555} 4616}
diff --git a/kernel/cgroup_freezer.c b/kernel/cgroup_freezer.c
index fcb93fca782d..fc0646b78a64 100644
--- a/kernel/cgroup_freezer.c
+++ b/kernel/cgroup_freezer.c
@@ -166,13 +166,17 @@ static bool is_task_frozen_enough(struct task_struct *task)
166 */ 166 */
167static int freezer_can_attach(struct cgroup_subsys *ss, 167static int freezer_can_attach(struct cgroup_subsys *ss,
168 struct cgroup *new_cgroup, 168 struct cgroup *new_cgroup,
169 struct task_struct *task) 169 struct cgroup_taskset *tset)
170{ 170{
171 struct freezer *freezer; 171 struct freezer *freezer;
172 struct task_struct *task;
172 173
173 /* 174 /*
174 * Anything frozen can't move or be moved to/from. 175 * Anything frozen can't move or be moved to/from.
175 */ 176 */
177 cgroup_taskset_for_each(task, new_cgroup, tset)
178 if (cgroup_freezing(task))
179 return -EBUSY;
176 180
177 freezer = cgroup_freezer(new_cgroup); 181 freezer = cgroup_freezer(new_cgroup);
178 if (freezer->state != CGROUP_THAWED) 182 if (freezer->state != CGROUP_THAWED)
@@ -181,11 +185,6 @@ static int freezer_can_attach(struct cgroup_subsys *ss,
181 return 0; 185 return 0;
182} 186}
183 187
184static int freezer_can_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
185{
186 return cgroup_freezing(tsk) ? -EBUSY : 0;
187}
188
189static void freezer_fork(struct cgroup_subsys *ss, struct task_struct *task) 188static void freezer_fork(struct cgroup_subsys *ss, struct task_struct *task)
190{ 189{
191 struct freezer *freezer; 190 struct freezer *freezer;
@@ -381,10 +380,5 @@ struct cgroup_subsys freezer_subsys = {
381 .populate = freezer_populate, 380 .populate = freezer_populate,
382 .subsys_id = freezer_subsys_id, 381 .subsys_id = freezer_subsys_id,
383 .can_attach = freezer_can_attach, 382 .can_attach = freezer_can_attach,
384 .can_attach_task = freezer_can_attach_task,
385 .pre_attach = NULL,
386 .attach_task = NULL,
387 .attach = NULL,
388 .fork = freezer_fork, 383 .fork = freezer_fork,
389 .exit = NULL,
390}; 384};
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 0b1712dba587..a09ac2b9a661 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -1389,79 +1389,73 @@ static int fmeter_getrate(struct fmeter *fmp)
1389 return val; 1389 return val;
1390} 1390}
1391 1391
1392/* Called by cgroups to determine if a cpuset is usable; cgroup_mutex held */
1393static int cpuset_can_attach(struct cgroup_subsys *ss, struct cgroup *cont,
1394 struct task_struct *tsk)
1395{
1396 struct cpuset *cs = cgroup_cs(cont);
1397
1398 if (cpumask_empty(cs->cpus_allowed) || nodes_empty(cs->mems_allowed))
1399 return -ENOSPC;
1400
1401 /*
1402 * Kthreads bound to specific cpus cannot be moved to a new cpuset; we
1403 * cannot change their cpu affinity and isolating such threads by their
1404 * set of allowed nodes is unnecessary. Thus, cpusets are not
1405 * applicable for such threads. This prevents checking for success of
1406 * set_cpus_allowed_ptr() on all attached tasks before cpus_allowed may
1407 * be changed.
1408 */
1409 if (tsk->flags & PF_THREAD_BOUND)
1410 return -EINVAL;
1411
1412 return 0;
1413}
1414
1415static int cpuset_can_attach_task(struct cgroup *cgrp, struct task_struct *task)
1416{
1417 return security_task_setscheduler(task);
1418}
1419
1420/* 1392/*
1421 * Protected by cgroup_lock. The nodemasks must be stored globally because 1393 * Protected by cgroup_lock. The nodemasks must be stored globally because
1422 * dynamically allocating them is not allowed in pre_attach, and they must 1394 * dynamically allocating them is not allowed in can_attach, and they must
1423 * persist among pre_attach, attach_task, and attach. 1395 * persist until attach.
1424 */ 1396 */
1425static cpumask_var_t cpus_attach; 1397static cpumask_var_t cpus_attach;
1426static nodemask_t cpuset_attach_nodemask_from; 1398static nodemask_t cpuset_attach_nodemask_from;
1427static nodemask_t cpuset_attach_nodemask_to; 1399static nodemask_t cpuset_attach_nodemask_to;
1428 1400
1429/* Set-up work for before attaching each task. */ 1401/* Called by cgroups to determine if a cpuset is usable; cgroup_mutex held */
1430static void cpuset_pre_attach(struct cgroup *cont) 1402static int cpuset_can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
1403 struct cgroup_taskset *tset)
1431{ 1404{
1432 struct cpuset *cs = cgroup_cs(cont); 1405 struct cpuset *cs = cgroup_cs(cgrp);
1406 struct task_struct *task;
1407 int ret;
1408
1409 if (cpumask_empty(cs->cpus_allowed) || nodes_empty(cs->mems_allowed))
1410 return -ENOSPC;
1411
1412 cgroup_taskset_for_each(task, cgrp, tset) {
1413 /*
1414 * Kthreads bound to specific cpus cannot be moved to a new
1415 * cpuset; we cannot change their cpu affinity and
1416 * isolating such threads by their set of allowed nodes is
1417 * unnecessary. Thus, cpusets are not applicable for such
1418 * threads. This prevents checking for success of
1419 * set_cpus_allowed_ptr() on all attached tasks before
1420 * cpus_allowed may be changed.
1421 */
1422 if (task->flags & PF_THREAD_BOUND)
1423 return -EINVAL;
1424 if ((ret = security_task_setscheduler(task)))
1425 return ret;
1426 }
1433 1427
1428 /* prepare for attach */
1434 if (cs == &top_cpuset) 1429 if (cs == &top_cpuset)
1435 cpumask_copy(cpus_attach, cpu_possible_mask); 1430 cpumask_copy(cpus_attach, cpu_possible_mask);
1436 else 1431 else
1437 guarantee_online_cpus(cs, cpus_attach); 1432 guarantee_online_cpus(cs, cpus_attach);
1438 1433
1439 guarantee_online_mems(cs, &cpuset_attach_nodemask_to); 1434 guarantee_online_mems(cs, &cpuset_attach_nodemask_to);
1440}
1441
1442/* Per-thread attachment work. */
1443static void cpuset_attach_task(struct cgroup *cont, struct task_struct *tsk)
1444{
1445 int err;
1446 struct cpuset *cs = cgroup_cs(cont);
1447 1435
1448 /* 1436 return 0;
1449 * can_attach beforehand should guarantee that this doesn't fail.
1450 * TODO: have a better way to handle failure here
1451 */
1452 err = set_cpus_allowed_ptr(tsk, cpus_attach);
1453 WARN_ON_ONCE(err);
1454
1455 cpuset_change_task_nodemask(tsk, &cpuset_attach_nodemask_to);
1456 cpuset_update_task_spread_flag(cs, tsk);
1457} 1437}
1458 1438
1459static void cpuset_attach(struct cgroup_subsys *ss, struct cgroup *cont, 1439static void cpuset_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
1460 struct cgroup *oldcont, struct task_struct *tsk) 1440 struct cgroup_taskset *tset)
1461{ 1441{
1462 struct mm_struct *mm; 1442 struct mm_struct *mm;
1463 struct cpuset *cs = cgroup_cs(cont); 1443 struct task_struct *task;
1464 struct cpuset *oldcs = cgroup_cs(oldcont); 1444 struct task_struct *leader = cgroup_taskset_first(tset);
1445 struct cgroup *oldcgrp = cgroup_taskset_cur_cgroup(tset);
1446 struct cpuset *cs = cgroup_cs(cgrp);
1447 struct cpuset *oldcs = cgroup_cs(oldcgrp);
1448
1449 cgroup_taskset_for_each(task, cgrp, tset) {
1450 /*
1451 * can_attach beforehand should guarantee that this doesn't
1452 * fail. TODO: have a better way to handle failure here
1453 */
1454 WARN_ON_ONCE(set_cpus_allowed_ptr(task, cpus_attach));
1455
1456 cpuset_change_task_nodemask(task, &cpuset_attach_nodemask_to);
1457 cpuset_update_task_spread_flag(cs, task);
1458 }
1465 1459
1466 /* 1460 /*
1467 * Change mm, possibly for multiple threads in a threadgroup. This is 1461 * Change mm, possibly for multiple threads in a threadgroup. This is
@@ -1469,7 +1463,7 @@ static void cpuset_attach(struct cgroup_subsys *ss, struct cgroup *cont,
1469 */ 1463 */
1470 cpuset_attach_nodemask_from = oldcs->mems_allowed; 1464 cpuset_attach_nodemask_from = oldcs->mems_allowed;
1471 cpuset_attach_nodemask_to = cs->mems_allowed; 1465 cpuset_attach_nodemask_to = cs->mems_allowed;
1472 mm = get_task_mm(tsk); 1466 mm = get_task_mm(leader);
1473 if (mm) { 1467 if (mm) {
1474 mpol_rebind_mm(mm, &cpuset_attach_nodemask_to); 1468 mpol_rebind_mm(mm, &cpuset_attach_nodemask_to);
1475 if (is_memory_migrate(cs)) 1469 if (is_memory_migrate(cs))
@@ -1925,9 +1919,6 @@ struct cgroup_subsys cpuset_subsys = {
1925 .create = cpuset_create, 1919 .create = cpuset_create,
1926 .destroy = cpuset_destroy, 1920 .destroy = cpuset_destroy,
1927 .can_attach = cpuset_can_attach, 1921 .can_attach = cpuset_can_attach,
1928 .can_attach_task = cpuset_can_attach_task,
1929 .pre_attach = cpuset_pre_attach,
1930 .attach_task = cpuset_attach_task,
1931 .attach = cpuset_attach, 1922 .attach = cpuset_attach,
1932 .populate = cpuset_populate, 1923 .populate = cpuset_populate,
1933 .post_clone = cpuset_post_clone, 1924 .post_clone = cpuset_post_clone,
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 3afc68c08433..a8f4ac001a00 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -6941,10 +6941,13 @@ static int __perf_cgroup_move(void *info)
6941 return 0; 6941 return 0;
6942} 6942}
6943 6943
6944static void 6944static void perf_cgroup_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
6945perf_cgroup_attach_task(struct cgroup *cgrp, struct task_struct *task) 6945 struct cgroup_taskset *tset)
6946{ 6946{
6947 task_function_call(task, __perf_cgroup_move, task); 6947 struct task_struct *task;
6948
6949 cgroup_taskset_for_each(task, cgrp, tset)
6950 task_function_call(task, __perf_cgroup_move, task);
6948} 6951}
6949 6952
6950static void perf_cgroup_exit(struct cgroup_subsys *ss, struct cgroup *cgrp, 6953static void perf_cgroup_exit(struct cgroup_subsys *ss, struct cgroup *cgrp,
@@ -6958,7 +6961,7 @@ static void perf_cgroup_exit(struct cgroup_subsys *ss, struct cgroup *cgrp,
6958 if (!(task->flags & PF_EXITING)) 6961 if (!(task->flags & PF_EXITING))
6959 return; 6962 return;
6960 6963
6961 perf_cgroup_attach_task(cgrp, task); 6964 task_function_call(task, __perf_cgroup_move, task);
6962} 6965}
6963 6966
6964struct cgroup_subsys perf_subsys = { 6967struct cgroup_subsys perf_subsys = {
@@ -6967,6 +6970,6 @@ struct cgroup_subsys perf_subsys = {
6967 .create = perf_cgroup_create, 6970 .create = perf_cgroup_create,
6968 .destroy = perf_cgroup_destroy, 6971 .destroy = perf_cgroup_destroy,
6969 .exit = perf_cgroup_exit, 6972 .exit = perf_cgroup_exit,
6970 .attach_task = perf_cgroup_attach_task, 6973 .attach = perf_cgroup_attach,
6971}; 6974};
6972#endif /* CONFIG_CGROUP_PERF */ 6975#endif /* CONFIG_CGROUP_PERF */
diff --git a/kernel/fork.c b/kernel/fork.c
index f34f894c4b98..b00711ce7c13 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -972,7 +972,7 @@ static int copy_signal(unsigned long clone_flags, struct task_struct *tsk)
972 sched_autogroup_fork(sig); 972 sched_autogroup_fork(sig);
973 973
974#ifdef CONFIG_CGROUPS 974#ifdef CONFIG_CGROUPS
975 init_rwsem(&sig->threadgroup_fork_lock); 975 init_rwsem(&sig->group_rwsem);
976#endif 976#endif
977 977
978 sig->oom_adj = current->signal->oom_adj; 978 sig->oom_adj = current->signal->oom_adj;
@@ -1153,7 +1153,7 @@ static struct task_struct *copy_process(unsigned long clone_flags,
1153 p->io_context = NULL; 1153 p->io_context = NULL;
1154 p->audit_context = NULL; 1154 p->audit_context = NULL;
1155 if (clone_flags & CLONE_THREAD) 1155 if (clone_flags & CLONE_THREAD)
1156 threadgroup_fork_read_lock(current); 1156 threadgroup_change_begin(current);
1157 cgroup_fork(p); 1157 cgroup_fork(p);
1158#ifdef CONFIG_NUMA 1158#ifdef CONFIG_NUMA
1159 p->mempolicy = mpol_dup(p->mempolicy); 1159 p->mempolicy = mpol_dup(p->mempolicy);
@@ -1368,7 +1368,7 @@ static struct task_struct *copy_process(unsigned long clone_flags,
1368 proc_fork_connector(p); 1368 proc_fork_connector(p);
1369 cgroup_post_fork(p); 1369 cgroup_post_fork(p);
1370 if (clone_flags & CLONE_THREAD) 1370 if (clone_flags & CLONE_THREAD)
1371 threadgroup_fork_read_unlock(current); 1371 threadgroup_change_end(current);
1372 perf_event_fork(p); 1372 perf_event_fork(p);
1373 return p; 1373 return p;
1374 1374
@@ -1403,7 +1403,7 @@ bad_fork_cleanup_policy:
1403bad_fork_cleanup_cgroup: 1403bad_fork_cleanup_cgroup:
1404#endif 1404#endif
1405 if (clone_flags & CLONE_THREAD) 1405 if (clone_flags & CLONE_THREAD)
1406 threadgroup_fork_read_unlock(current); 1406 threadgroup_change_end(current);
1407 cgroup_exit(p, cgroup_callbacks_done); 1407 cgroup_exit(p, cgroup_callbacks_done);
1408 delayacct_tsk_free(p); 1408 delayacct_tsk_free(p);
1409 module_put(task_thread_info(p)->exec_domain->module); 1409 module_put(task_thread_info(p)->exec_domain->module);
diff --git a/kernel/res_counter.c b/kernel/res_counter.c
index 34683efa2cce..6d269cce7aa1 100644
--- a/kernel/res_counter.c
+++ b/kernel/res_counter.c
@@ -159,8 +159,7 @@ int res_counter_memparse_write_strategy(const char *buf,
159 return 0; 159 return 0;
160 } 160 }
161 161
162 /* FIXME - make memparse() take const char* args */ 162 *res = memparse(buf, &end);
163 *res = memparse((char *)buf, &end);
164 if (*end != '\0') 163 if (*end != '\0')
165 return -EINVAL; 164 return -EINVAL;
166 165
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 0ac0f811d623..cecbb64be05f 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -7563,24 +7563,31 @@ cpu_cgroup_destroy(struct cgroup_subsys *ss, struct cgroup *cgrp)
7563 sched_destroy_group(tg); 7563 sched_destroy_group(tg);
7564} 7564}
7565 7565
7566static int 7566static int cpu_cgroup_can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
7567cpu_cgroup_can_attach_task(struct cgroup *cgrp, struct task_struct *tsk) 7567 struct cgroup_taskset *tset)
7568{ 7568{
7569 struct task_struct *task;
7570
7571 cgroup_taskset_for_each(task, cgrp, tset) {
7569#ifdef CONFIG_RT_GROUP_SCHED 7572#ifdef CONFIG_RT_GROUP_SCHED
7570 if (!sched_rt_can_attach(cgroup_tg(cgrp), tsk)) 7573 if (!sched_rt_can_attach(cgroup_tg(cgrp), task))
7571 return -EINVAL; 7574 return -EINVAL;
7572#else 7575#else
7573 /* We don't support RT-tasks being in separate groups */ 7576 /* We don't support RT-tasks being in separate groups */
7574 if (tsk->sched_class != &fair_sched_class) 7577 if (task->sched_class != &fair_sched_class)
7575 return -EINVAL; 7578 return -EINVAL;
7576#endif 7579#endif
7580 }
7577 return 0; 7581 return 0;
7578} 7582}
7579 7583
7580static void 7584static void cpu_cgroup_attach(struct cgroup_subsys *ss, struct cgroup *cgrp,
7581cpu_cgroup_attach_task(struct cgroup *cgrp, struct task_struct *tsk) 7585 struct cgroup_taskset *tset)
7582{ 7586{
7583 sched_move_task(tsk); 7587 struct task_struct *task;
7588
7589 cgroup_taskset_for_each(task, cgrp, tset)
7590 sched_move_task(task);
7584} 7591}
7585 7592
7586static void 7593static void
@@ -7915,8 +7922,8 @@ struct cgroup_subsys cpu_cgroup_subsys = {
7915 .name = "cpu", 7922 .name = "cpu",
7916 .create = cpu_cgroup_create, 7923 .create = cpu_cgroup_create,
7917 .destroy = cpu_cgroup_destroy, 7924 .destroy = cpu_cgroup_destroy,
7918 .can_attach_task = cpu_cgroup_can_attach_task, 7925 .can_attach = cpu_cgroup_can_attach,
7919 .attach_task = cpu_cgroup_attach_task, 7926 .attach = cpu_cgroup_attach,
7920 .exit = cpu_cgroup_exit, 7927 .exit = cpu_cgroup_exit,
7921 .populate = cpu_cgroup_populate, 7928 .populate = cpu_cgroup_populate,
7922 .subsys_id = cpu_cgroup_subsys_id, 7929 .subsys_id = cpu_cgroup_subsys_id,
diff --git a/kernel/signal.c b/kernel/signal.c
index 56ce3a618b28..bb0efa5705ed 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -2355,8 +2355,15 @@ void exit_signals(struct task_struct *tsk)
2355 int group_stop = 0; 2355 int group_stop = 0;
2356 sigset_t unblocked; 2356 sigset_t unblocked;
2357 2357
2358 /*
2359 * @tsk is about to have PF_EXITING set - lock out users which
2360 * expect stable threadgroup.
2361 */
2362 threadgroup_change_begin(tsk);
2363
2358 if (thread_group_empty(tsk) || signal_group_exit(tsk->signal)) { 2364 if (thread_group_empty(tsk) || signal_group_exit(tsk->signal)) {
2359 tsk->flags |= PF_EXITING; 2365 tsk->flags |= PF_EXITING;
2366 threadgroup_change_end(tsk);
2360 return; 2367 return;
2361 } 2368 }
2362 2369
@@ -2366,6 +2373,9 @@ void exit_signals(struct task_struct *tsk)
2366 * see wants_signal(), do_signal_stop(). 2373 * see wants_signal(), do_signal_stop().
2367 */ 2374 */
2368 tsk->flags |= PF_EXITING; 2375 tsk->flags |= PF_EXITING;
2376
2377 threadgroup_change_end(tsk);
2378
2369 if (!signal_pending(tsk)) 2379 if (!signal_pending(tsk))
2370 goto out; 2380 goto out;
2371 2381
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 94da8ee9e2c2..d87aa3510c5e 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -381,16 +381,25 @@ static void mem_cgroup_put(struct mem_cgroup *memcg);
381static bool mem_cgroup_is_root(struct mem_cgroup *memcg); 381static bool mem_cgroup_is_root(struct mem_cgroup *memcg);
382void sock_update_memcg(struct sock *sk) 382void sock_update_memcg(struct sock *sk)
383{ 383{
384 /* A socket spends its whole life in the same cgroup */
385 if (sk->sk_cgrp) {
386 WARN_ON(1);
387 return;
388 }
389 if (static_branch(&memcg_socket_limit_enabled)) { 384 if (static_branch(&memcg_socket_limit_enabled)) {
390 struct mem_cgroup *memcg; 385 struct mem_cgroup *memcg;
391 386
392 BUG_ON(!sk->sk_prot->proto_cgroup); 387 BUG_ON(!sk->sk_prot->proto_cgroup);
393 388
389 /* Socket cloning can throw us here with sk_cgrp already
390 * filled. It won't however, necessarily happen from
391 * process context. So the test for root memcg given
392 * the current task's memcg won't help us in this case.
393 *
394 * Respecting the original socket's memcg is a better
395 * decision in this case.
396 */
397 if (sk->sk_cgrp) {
398 BUG_ON(mem_cgroup_is_root(sk->sk_cgrp->memcg));
399 mem_cgroup_get(sk->sk_cgrp->memcg);
400 return;
401 }
402
394 rcu_read_lock(); 403 rcu_read_lock();
395 memcg = mem_cgroup_from_task(current); 404 memcg = mem_cgroup_from_task(current);
396 if (!mem_cgroup_is_root(memcg)) { 405 if (!mem_cgroup_is_root(memcg)) {
@@ -5391,8 +5400,9 @@ static void mem_cgroup_clear_mc(void)
5391 5400
5392static int mem_cgroup_can_attach(struct cgroup_subsys *ss, 5401static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
5393 struct cgroup *cgroup, 5402 struct cgroup *cgroup,
5394 struct task_struct *p) 5403 struct cgroup_taskset *tset)
5395{ 5404{
5405 struct task_struct *p = cgroup_taskset_first(tset);
5396 int ret = 0; 5406 int ret = 0;
5397 struct mem_cgroup *memcg = mem_cgroup_from_cont(cgroup); 5407 struct mem_cgroup *memcg = mem_cgroup_from_cont(cgroup);
5398 5408
@@ -5430,7 +5440,7 @@ static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
5430 5440
5431static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss, 5441static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss,
5432 struct cgroup *cgroup, 5442 struct cgroup *cgroup,
5433 struct task_struct *p) 5443 struct cgroup_taskset *tset)
5434{ 5444{
5435 mem_cgroup_clear_mc(); 5445 mem_cgroup_clear_mc();
5436} 5446}
@@ -5547,9 +5557,9 @@ retry:
5547 5557
5548static void mem_cgroup_move_task(struct cgroup_subsys *ss, 5558static void mem_cgroup_move_task(struct cgroup_subsys *ss,
5549 struct cgroup *cont, 5559 struct cgroup *cont,
5550 struct cgroup *old_cont, 5560 struct cgroup_taskset *tset)
5551 struct task_struct *p)
5552{ 5561{
5562 struct task_struct *p = cgroup_taskset_first(tset);
5553 struct mm_struct *mm = get_task_mm(p); 5563 struct mm_struct *mm = get_task_mm(p);
5554 5564
5555 if (mm) { 5565 if (mm) {
@@ -5564,19 +5574,18 @@ static void mem_cgroup_move_task(struct cgroup_subsys *ss,
5564#else /* !CONFIG_MMU */ 5574#else /* !CONFIG_MMU */
5565static int mem_cgroup_can_attach(struct cgroup_subsys *ss, 5575static int mem_cgroup_can_attach(struct cgroup_subsys *ss,
5566 struct cgroup *cgroup, 5576 struct cgroup *cgroup,
5567 struct task_struct *p) 5577 struct cgroup_taskset *tset)
5568{ 5578{
5569 return 0; 5579 return 0;
5570} 5580}
5571static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss, 5581static void mem_cgroup_cancel_attach(struct cgroup_subsys *ss,
5572 struct cgroup *cgroup, 5582 struct cgroup *cgroup,
5573 struct task_struct *p) 5583 struct cgroup_taskset *tset)
5574{ 5584{
5575} 5585}
5576static void mem_cgroup_move_task(struct cgroup_subsys *ss, 5586static void mem_cgroup_move_task(struct cgroup_subsys *ss,
5577 struct cgroup *cont, 5587 struct cgroup *cont,
5578 struct cgroup *old_cont, 5588 struct cgroup_taskset *tset)
5579 struct task_struct *p)
5580{ 5589{
5581} 5590}
5582#endif 5591#endif
diff --git a/mm/slab.c b/mm/slab.c
index 83311c9aaf9d..2acfa0d90943 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -121,6 +121,8 @@
121#include <asm/tlbflush.h> 121#include <asm/tlbflush.h>
122#include <asm/page.h> 122#include <asm/page.h>
123 123
124#include <trace/events/kmem.h>
125
124/* 126/*
125 * DEBUG - 1 for kmem_cache_create() to honour; SLAB_RED_ZONE & SLAB_POISON. 127 * DEBUG - 1 for kmem_cache_create() to honour; SLAB_RED_ZONE & SLAB_POISON.
126 * 0 for faster, smaller code (especially in the critical paths). 128 * 0 for faster, smaller code (especially in the critical paths).
diff --git a/mm/slub.c b/mm/slub.c
index 09ccee8fb58e..025f6ac51569 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -1978,7 +1978,7 @@ int put_cpu_partial(struct kmem_cache *s, struct page *page, int drain)
1978 page->pobjects = pobjects; 1978 page->pobjects = pobjects;
1979 page->next = oldpage; 1979 page->next = oldpage;
1980 1980
1981 } while (irqsafe_cpu_cmpxchg(s->cpu_slab->partial, oldpage, page) != oldpage); 1981 } while (this_cpu_cmpxchg(s->cpu_slab->partial, oldpage, page) != oldpage);
1982 stat(s, CPU_PARTIAL_FREE); 1982 stat(s, CPU_PARTIAL_FREE);
1983 return pobjects; 1983 return pobjects;
1984} 1984}
@@ -2304,7 +2304,7 @@ redo:
2304 * Since this is without lock semantics the protection is only against 2304 * Since this is without lock semantics the protection is only against
2305 * code executing on this cpu *not* from access by other cpus. 2305 * code executing on this cpu *not* from access by other cpus.
2306 */ 2306 */
2307 if (unlikely(!irqsafe_cpu_cmpxchg_double( 2307 if (unlikely(!this_cpu_cmpxchg_double(
2308 s->cpu_slab->freelist, s->cpu_slab->tid, 2308 s->cpu_slab->freelist, s->cpu_slab->tid,
2309 object, tid, 2309 object, tid,
2310 get_freepointer_safe(s, object), next_tid(tid)))) { 2310 get_freepointer_safe(s, object), next_tid(tid)))) {
@@ -2534,7 +2534,7 @@ redo:
2534 if (likely(page == c->page)) { 2534 if (likely(page == c->page)) {
2535 set_freepointer(s, object, c->freelist); 2535 set_freepointer(s, object, c->freelist);
2536 2536
2537 if (unlikely(!irqsafe_cpu_cmpxchg_double( 2537 if (unlikely(!this_cpu_cmpxchg_double(
2538 s->cpu_slab->freelist, s->cpu_slab->tid, 2538 s->cpu_slab->freelist, s->cpu_slab->tid,
2539 c->freelist, tid, 2539 c->freelist, tid,
2540 object, next_tid(tid)))) { 2540 object, next_tid(tid)))) {
diff --git a/net/caif/caif_dev.c b/net/caif/caif_dev.c
index b0ce14fbf6ef..61570ee76fe6 100644
--- a/net/caif/caif_dev.c
+++ b/net/caif/caif_dev.c
@@ -76,12 +76,12 @@ static struct caif_device_entry_list *caif_device_list(struct net *net)
76 76
77static void caifd_put(struct caif_device_entry *e) 77static void caifd_put(struct caif_device_entry *e)
78{ 78{
79 irqsafe_cpu_dec(*e->pcpu_refcnt); 79 this_cpu_dec(*e->pcpu_refcnt);
80} 80}
81 81
82static void caifd_hold(struct caif_device_entry *e) 82static void caifd_hold(struct caif_device_entry *e)
83{ 83{
84 irqsafe_cpu_inc(*e->pcpu_refcnt); 84 this_cpu_inc(*e->pcpu_refcnt);
85} 85}
86 86
87static int caifd_refcnt_read(struct caif_device_entry *e) 87static int caifd_refcnt_read(struct caif_device_entry *e)
diff --git a/net/caif/cffrml.c b/net/caif/cffrml.c
index d3ca87bf23b7..0a7df7ef062d 100644
--- a/net/caif/cffrml.c
+++ b/net/caif/cffrml.c
@@ -177,14 +177,14 @@ void cffrml_put(struct cflayer *layr)
177{ 177{
178 struct cffrml *this = container_obj(layr); 178 struct cffrml *this = container_obj(layr);
179 if (layr != NULL && this->pcpu_refcnt != NULL) 179 if (layr != NULL && this->pcpu_refcnt != NULL)
180 irqsafe_cpu_dec(*this->pcpu_refcnt); 180 this_cpu_dec(*this->pcpu_refcnt);
181} 181}
182 182
183void cffrml_hold(struct cflayer *layr) 183void cffrml_hold(struct cflayer *layr)
184{ 184{
185 struct cffrml *this = container_obj(layr); 185 struct cffrml *this = container_obj(layr);
186 if (layr != NULL && this->pcpu_refcnt != NULL) 186 if (layr != NULL && this->pcpu_refcnt != NULL)
187 irqsafe_cpu_inc(*this->pcpu_refcnt); 187 this_cpu_inc(*this->pcpu_refcnt);
188} 188}
189 189
190int cffrml_refcnt_read(struct cflayer *layr) 190int cffrml_refcnt_read(struct cflayer *layr)
diff --git a/net/core/dev_addr_lists.c b/net/core/dev_addr_lists.c
index febba516db62..29c07fef9228 100644
--- a/net/core/dev_addr_lists.c
+++ b/net/core/dev_addr_lists.c
@@ -427,7 +427,7 @@ EXPORT_SYMBOL(dev_uc_del);
427 * 427 *
428 * Add newly added addresses to the destination device and release 428 * Add newly added addresses to the destination device and release
429 * addresses that have no users left. The source device must be 429 * addresses that have no users left. The source device must be
430 * locked by netif_tx_lock_bh. 430 * locked by netif_addr_lock_bh.
431 * 431 *
432 * This function is intended to be called from the dev->set_rx_mode 432 * This function is intended to be called from the dev->set_rx_mode
433 * function of layered software devices. 433 * function of layered software devices.
@@ -439,11 +439,11 @@ int dev_uc_sync(struct net_device *to, struct net_device *from)
439 if (to->addr_len != from->addr_len) 439 if (to->addr_len != from->addr_len)
440 return -EINVAL; 440 return -EINVAL;
441 441
442 netif_addr_lock_bh(to); 442 netif_addr_lock_nested(to);
443 err = __hw_addr_sync(&to->uc, &from->uc, to->addr_len); 443 err = __hw_addr_sync(&to->uc, &from->uc, to->addr_len);
444 if (!err) 444 if (!err)
445 __dev_set_rx_mode(to); 445 __dev_set_rx_mode(to);
446 netif_addr_unlock_bh(to); 446 netif_addr_unlock(to);
447 return err; 447 return err;
448} 448}
449EXPORT_SYMBOL(dev_uc_sync); 449EXPORT_SYMBOL(dev_uc_sync);
@@ -463,7 +463,7 @@ void dev_uc_unsync(struct net_device *to, struct net_device *from)
463 return; 463 return;
464 464
465 netif_addr_lock_bh(from); 465 netif_addr_lock_bh(from);
466 netif_addr_lock(to); 466 netif_addr_lock_nested(to);
467 __hw_addr_unsync(&to->uc, &from->uc, to->addr_len); 467 __hw_addr_unsync(&to->uc, &from->uc, to->addr_len);
468 __dev_set_rx_mode(to); 468 __dev_set_rx_mode(to);
469 netif_addr_unlock(to); 469 netif_addr_unlock(to);
@@ -590,7 +590,7 @@ EXPORT_SYMBOL(dev_mc_del_global);
590 * 590 *
591 * Add newly added addresses to the destination device and release 591 * Add newly added addresses to the destination device and release
592 * addresses that have no users left. The source device must be 592 * addresses that have no users left. The source device must be
593 * locked by netif_tx_lock_bh. 593 * locked by netif_addr_lock_bh.
594 * 594 *
595 * This function is intended to be called from the ndo_set_rx_mode 595 * This function is intended to be called from the ndo_set_rx_mode
596 * function of layered software devices. 596 * function of layered software devices.
@@ -602,11 +602,11 @@ int dev_mc_sync(struct net_device *to, struct net_device *from)
602 if (to->addr_len != from->addr_len) 602 if (to->addr_len != from->addr_len)
603 return -EINVAL; 603 return -EINVAL;
604 604
605 netif_addr_lock_bh(to); 605 netif_addr_lock_nested(to);
606 err = __hw_addr_sync(&to->mc, &from->mc, to->addr_len); 606 err = __hw_addr_sync(&to->mc, &from->mc, to->addr_len);
607 if (!err) 607 if (!err)
608 __dev_set_rx_mode(to); 608 __dev_set_rx_mode(to);
609 netif_addr_unlock_bh(to); 609 netif_addr_unlock(to);
610 return err; 610 return err;
611} 611}
612EXPORT_SYMBOL(dev_mc_sync); 612EXPORT_SYMBOL(dev_mc_sync);
@@ -626,7 +626,7 @@ void dev_mc_unsync(struct net_device *to, struct net_device *from)
626 return; 626 return;
627 627
628 netif_addr_lock_bh(from); 628 netif_addr_lock_bh(from);
629 netif_addr_lock(to); 629 netif_addr_lock_nested(to);
630 __hw_addr_unsync(&to->mc, &from->mc, to->addr_len); 630 __hw_addr_unsync(&to->mc, &from->mc, to->addr_len);
631 __dev_set_rx_mode(to); 631 __dev_set_rx_mode(to);
632 netif_addr_unlock(to); 632 netif_addr_unlock(to);
diff --git a/net/core/pktgen.c b/net/core/pktgen.c
index 449fe0f068f8..65f80c7b1656 100644
--- a/net/core/pktgen.c
+++ b/net/core/pktgen.c
@@ -2024,13 +2024,13 @@ static void pktgen_setup_inject(struct pktgen_dev *pkt_dev)
2024 pr_warning("WARNING: Requested queue_map_min (zero-based) (%d) exceeds valid range [0 - %d] for (%d) queues on %s, resetting\n", 2024 pr_warning("WARNING: Requested queue_map_min (zero-based) (%d) exceeds valid range [0 - %d] for (%d) queues on %s, resetting\n",
2025 pkt_dev->queue_map_min, (ntxq ?: 1) - 1, ntxq, 2025 pkt_dev->queue_map_min, (ntxq ?: 1) - 1, ntxq,
2026 pkt_dev->odevname); 2026 pkt_dev->odevname);
2027 pkt_dev->queue_map_min = ntxq - 1; 2027 pkt_dev->queue_map_min = (ntxq ?: 1) - 1;
2028 } 2028 }
2029 if (pkt_dev->queue_map_max >= ntxq) { 2029 if (pkt_dev->queue_map_max >= ntxq) {
2030 pr_warning("WARNING: Requested queue_map_max (zero-based) (%d) exceeds valid range [0 - %d] for (%d) queues on %s, resetting\n", 2030 pr_warning("WARNING: Requested queue_map_max (zero-based) (%d) exceeds valid range [0 - %d] for (%d) queues on %s, resetting\n",
2031 pkt_dev->queue_map_max, (ntxq ?: 1) - 1, ntxq, 2031 pkt_dev->queue_map_max, (ntxq ?: 1) - 1, ntxq,
2032 pkt_dev->odevname); 2032 pkt_dev->odevname);
2033 pkt_dev->queue_map_max = ntxq - 1; 2033 pkt_dev->queue_map_max = (ntxq ?: 1) - 1;
2034 } 2034 }
2035 2035
2036 /* Default to the interface's mac if not explicitly set. */ 2036 /* Default to the interface's mac if not explicitly set. */
diff --git a/net/core/sock.c b/net/core/sock.c
index 002939cfc069..5c5af9988f94 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -112,6 +112,7 @@
112#include <linux/highmem.h> 112#include <linux/highmem.h>
113#include <linux/user_namespace.h> 113#include <linux/user_namespace.h>
114#include <linux/jump_label.h> 114#include <linux/jump_label.h>
115#include <linux/memcontrol.h>
115 116
116#include <asm/uaccess.h> 117#include <asm/uaccess.h>
117#include <asm/system.h> 118#include <asm/system.h>
@@ -1272,6 +1273,12 @@ void sk_release_kernel(struct sock *sk)
1272} 1273}
1273EXPORT_SYMBOL(sk_release_kernel); 1274EXPORT_SYMBOL(sk_release_kernel);
1274 1275
1276static void sk_update_clone(const struct sock *sk, struct sock *newsk)
1277{
1278 if (mem_cgroup_sockets_enabled && sk->sk_cgrp)
1279 sock_update_memcg(newsk);
1280}
1281
1275/** 1282/**
1276 * sk_clone_lock - clone a socket, and lock its clone 1283 * sk_clone_lock - clone a socket, and lock its clone
1277 * @sk: the socket to clone 1284 * @sk: the socket to clone
@@ -1362,6 +1369,8 @@ struct sock *sk_clone_lock(const struct sock *sk, const gfp_t priority)
1362 sk_set_socket(newsk, NULL); 1369 sk_set_socket(newsk, NULL);
1363 newsk->sk_wq = NULL; 1370 newsk->sk_wq = NULL;
1364 1371
1372 sk_update_clone(sk, newsk);
1373
1365 if (newsk->sk_prot->sockets_allocated) 1374 if (newsk->sk_prot->sockets_allocated)
1366 sk_sockets_allocated_inc(newsk); 1375 sk_sockets_allocated_inc(newsk);
1367 1376
diff --git a/net/ipv4/Kconfig b/net/ipv4/Kconfig
index 335ca7abbd46..aa2a2c79776f 100644
--- a/net/ipv4/Kconfig
+++ b/net/ipv4/Kconfig
@@ -408,8 +408,12 @@ config INET_TCP_DIAG
408 def_tristate INET_DIAG 408 def_tristate INET_DIAG
409 409
410config INET_UDP_DIAG 410config INET_UDP_DIAG
411 tristate "UDP: socket monitoring interface"
411 depends on INET_DIAG 412 depends on INET_DIAG
412 def_tristate INET_DIAG && IPV6 413 default n
414 ---help---
415 Support for UDP socket monitoring interface used by the ss tool.
416 If unsure, say Y.
413 417
414menuconfig TCP_CONG_ADVANCED 418menuconfig TCP_CONG_ADVANCED
415 bool "TCP: advanced congestion control" 419 bool "TCP: advanced congestion control"
diff --git a/net/ipv4/igmp.c b/net/ipv4/igmp.c
index fa057d105bef..5104bc0bbdbe 100644
--- a/net/ipv4/igmp.c
+++ b/net/ipv4/igmp.c
@@ -880,6 +880,8 @@ static void igmp_heard_query(struct in_device *in_dev, struct sk_buff *skb,
880 * to be intended in a v3 query. 880 * to be intended in a v3 query.
881 */ 881 */
882 max_delay = IGMPV3_MRC(ih3->code)*(HZ/IGMP_TIMER_SCALE); 882 max_delay = IGMPV3_MRC(ih3->code)*(HZ/IGMP_TIMER_SCALE);
883 if (!max_delay)
884 max_delay = 1; /* can't mod w/ 0 */
883 } else { /* v3 */ 885 } else { /* v3 */
884 if (!pskb_may_pull(skb, sizeof(struct igmpv3_query))) 886 if (!pskb_may_pull(skb, sizeof(struct igmpv3_query)))
885 return; 887 return;
diff --git a/net/unix/Kconfig b/net/unix/Kconfig
index c2128b10e5f9..8b31ab85d050 100644
--- a/net/unix/Kconfig
+++ b/net/unix/Kconfig
@@ -22,7 +22,7 @@ config UNIX
22config UNIX_DIAG 22config UNIX_DIAG
23 tristate "UNIX: socket monitoring interface" 23 tristate "UNIX: socket monitoring interface"
24 depends on UNIX 24 depends on UNIX
25 default UNIX 25 default n
26 ---help--- 26 ---help---
27 Support for UNIX socket monitoring interface used by the ss tool. 27 Support for UNIX socket monitoring interface used by the ss tool.
28 If unsure, say Y. 28 If unsure, say Y.
diff --git a/security/device_cgroup.c b/security/device_cgroup.c
index 4450fbeec411..8b5b5d8612c6 100644
--- a/security/device_cgroup.c
+++ b/security/device_cgroup.c
@@ -62,11 +62,12 @@ static inline struct dev_cgroup *task_devcgroup(struct task_struct *task)
62struct cgroup_subsys devices_subsys; 62struct cgroup_subsys devices_subsys;
63 63
64static int devcgroup_can_attach(struct cgroup_subsys *ss, 64static int devcgroup_can_attach(struct cgroup_subsys *ss,
65 struct cgroup *new_cgroup, struct task_struct *task) 65 struct cgroup *new_cgrp, struct cgroup_taskset *set)
66{ 66{
67 if (current != task && !capable(CAP_SYS_ADMIN)) 67 struct task_struct *task = cgroup_taskset_first(set);
68 return -EPERM;
69 68
69 if (current != task && !capable(CAP_SYS_ADMIN))
70 return -EPERM;
70 return 0; 71 return 0;
71} 72}
72 73
diff --git a/sound/soc/kirkwood/kirkwood-dma.c b/sound/soc/kirkwood/kirkwood-dma.c
index cd33de1c5b7a..df12e0993f5a 100644
--- a/sound/soc/kirkwood/kirkwood-dma.c
+++ b/sound/soc/kirkwood/kirkwood-dma.c
@@ -94,9 +94,10 @@ static irqreturn_t kirkwood_dma_irq(int irq, void *dev_id)
94 return IRQ_HANDLED; 94 return IRQ_HANDLED;
95} 95}
96 96
97static void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win, 97static void
98 unsigned long dma, 98kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
99 struct mbus_dram_target_info *dram) 99 unsigned long dma,
100 const struct mbus_dram_target_info *dram)
100{ 101{
101 int i; 102 int i;
102 103
@@ -106,7 +107,7 @@ static void kirkwood_dma_conf_mbus_windows(void __iomem *base, int win,
106 107
107 /* try to find matching cs for current dma address */ 108 /* try to find matching cs for current dma address */
108 for (i = 0; i < dram->num_cs; i++) { 109 for (i = 0; i < dram->num_cs; i++) {
109 struct mbus_dram_window *cs = dram->cs + i; 110 const struct mbus_dram_window *cs = dram->cs + i;
110 if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) { 111 if ((cs->base & 0xffff0000) < (dma & 0xffff0000)) {
111 writel(cs->base & 0xffff0000, 112 writel(cs->base & 0xffff0000,
112 base + KIRKWOOD_AUDIO_WIN_BASE_REG(win)); 113 base + KIRKWOOD_AUDIO_WIN_BASE_REG(win));
@@ -127,6 +128,7 @@ static int kirkwood_dma_open(struct snd_pcm_substream *substream)
127 struct snd_soc_dai *cpu_dai = soc_runtime->cpu_dai; 128 struct snd_soc_dai *cpu_dai = soc_runtime->cpu_dai;
128 struct kirkwood_dma_data *priv; 129 struct kirkwood_dma_data *priv;
129 struct kirkwood_dma_priv *prdata = snd_soc_platform_get_drvdata(platform); 130 struct kirkwood_dma_priv *prdata = snd_soc_platform_get_drvdata(platform);
131 const struct mbus_dram_target_info *dram;
130 unsigned long addr; 132 unsigned long addr;
131 133
132 priv = snd_soc_dai_get_dma_data(cpu_dai, substream); 134 priv = snd_soc_dai_get_dma_data(cpu_dai, substream);
@@ -175,15 +177,16 @@ static int kirkwood_dma_open(struct snd_pcm_substream *substream)
175 writel((unsigned long)-1, priv->io + KIRKWOOD_ERR_MASK); 177 writel((unsigned long)-1, priv->io + KIRKWOOD_ERR_MASK);
176 } 178 }
177 179
180 dram = mv_mbus_dram_info();
178 addr = virt_to_phys(substream->dma_buffer.area); 181 addr = virt_to_phys(substream->dma_buffer.area);
179 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 182 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
180 prdata->play_stream = substream; 183 prdata->play_stream = substream;
181 kirkwood_dma_conf_mbus_windows(priv->io, 184 kirkwood_dma_conf_mbus_windows(priv->io,
182 KIRKWOOD_PLAYBACK_WIN, addr, priv->dram); 185 KIRKWOOD_PLAYBACK_WIN, addr, dram);
183 } else { 186 } else {
184 prdata->rec_stream = substream; 187 prdata->rec_stream = substream;
185 kirkwood_dma_conf_mbus_windows(priv->io, 188 kirkwood_dma_conf_mbus_windows(priv->io,
186 KIRKWOOD_RECORD_WIN, addr, priv->dram); 189 KIRKWOOD_RECORD_WIN, addr, dram);
187 } 190 }
188 191
189 return 0; 192 return 0;
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index 76dc74d24fc2..d775b0761e0a 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -210,7 +210,7 @@ int mxs_saif_put_mclk(unsigned int saif_id)
210 return -EBUSY; 210 return -EBUSY;
211 } 211 }
212 212
213 clk_disable(saif->clk); 213 clk_disable_unprepare(saif->clk);
214 214
215 /* disable MCLK output */ 215 /* disable MCLK output */
216 __raw_writel(BM_SAIF_CTRL_CLKGATE, 216 __raw_writel(BM_SAIF_CTRL_CLKGATE,
@@ -264,7 +264,7 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk,
264 if (ret) 264 if (ret)
265 return ret; 265 return ret;
266 266
267 ret = clk_enable(saif->clk); 267 ret = clk_prepare_enable(saif->clk);
268 if (ret) 268 if (ret)
269 return ret; 269 return ret;
270 270
@@ -625,13 +625,6 @@ static int mxs_saif_probe(struct platform_device *pdev)
625 if (pdev->id >= ARRAY_SIZE(mxs_saif)) 625 if (pdev->id >= ARRAY_SIZE(mxs_saif))
626 return -EINVAL; 626 return -EINVAL;
627 627
628 pdata = pdev->dev.platform_data;
629 if (pdata && pdata->init) {
630 ret = pdata->init();
631 if (ret)
632 return ret;
633 }
634
635 saif = kzalloc(sizeof(*saif), GFP_KERNEL); 628 saif = kzalloc(sizeof(*saif), GFP_KERNEL);
636 if (!saif) 629 if (!saif)
637 return -ENOMEM; 630 return -ENOMEM;
@@ -639,12 +632,17 @@ static int mxs_saif_probe(struct platform_device *pdev)
639 mxs_saif[pdev->id] = saif; 632 mxs_saif[pdev->id] = saif;
640 saif->id = pdev->id; 633 saif->id = pdev->id;
641 634
642 saif->master_id = saif->id; 635 pdata = pdev->dev.platform_data;
643 if (pdata && pdata->get_master_id) { 636 if (pdata && !pdata->master_mode) {
644 saif->master_id = pdata->get_master_id(saif->id); 637 saif->master_id = pdata->master_id;
645 if (saif->master_id < 0 || 638 if (saif->master_id < 0 ||
646 saif->master_id >= ARRAY_SIZE(mxs_saif)) 639 saif->master_id >= ARRAY_SIZE(mxs_saif) ||
640 saif->master_id == saif->id) {
641 dev_err(&pdev->dev, "get wrong master id\n");
647 return -EINVAL; 642 return -EINVAL;
643 }
644 } else {
645 saif->master_id = saif->id;
648 } 646 }
649 647
650 saif->clk = clk_get(&pdev->dev, NULL); 648 saif->clk = clk_get(&pdev->dev, NULL);