diff options
-rw-r--r-- | drivers/bcma/sprom.c | 70 | ||||
-rw-r--r-- | drivers/ssb/pci.c | 69 | ||||
-rw-r--r-- | include/linux/ssb/ssb_regs.h | 59 |
3 files changed, 194 insertions, 4 deletions
diff --git a/drivers/bcma/sprom.c b/drivers/bcma/sprom.c index 22c99683a180..c7f93359acb0 100644 --- a/drivers/bcma/sprom.c +++ b/drivers/bcma/sprom.c | |||
@@ -185,6 +185,18 @@ static int bcma_sprom_valid(const u16 *sprom) | |||
185 | bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \ | 185 | bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \ |
186 | sprom[SPOFF(_offset)]) & (_mask)) >> (_shift)) | 186 | sprom[SPOFF(_offset)]) & (_mask)) >> (_shift)) |
187 | 187 | ||
188 | #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ | ||
189 | do { \ | ||
190 | SPEX(_field[0], _offset + 0, _mask, _shift); \ | ||
191 | SPEX(_field[1], _offset + 2, _mask, _shift); \ | ||
192 | SPEX(_field[2], _offset + 4, _mask, _shift); \ | ||
193 | SPEX(_field[3], _offset + 6, _mask, _shift); \ | ||
194 | SPEX(_field[4], _offset + 8, _mask, _shift); \ | ||
195 | SPEX(_field[5], _offset + 10, _mask, _shift); \ | ||
196 | SPEX(_field[6], _offset + 12, _mask, _shift); \ | ||
197 | SPEX(_field[7], _offset + 14, _mask, _shift); \ | ||
198 | } while (0) | ||
199 | |||
188 | static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom) | 200 | static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom) |
189 | { | 201 | { |
190 | u16 v, o; | 202 | u16 v, o; |
@@ -375,6 +387,64 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom) | |||
375 | SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); | 387 | SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); |
376 | SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, | 388 | SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, |
377 | SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); | 389 | SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); |
390 | |||
391 | SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, | ||
392 | SSB_SPROM8_LEDDC_ON_SHIFT); | ||
393 | SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, | ||
394 | SSB_SPROM8_LEDDC_OFF_SHIFT); | ||
395 | |||
396 | SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, | ||
397 | SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); | ||
398 | SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, | ||
399 | SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); | ||
400 | SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, | ||
401 | SSB_SPROM8_TXRXC_SWITCH_SHIFT); | ||
402 | |||
403 | SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); | ||
404 | |||
405 | SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); | ||
406 | SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); | ||
407 | SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); | ||
408 | SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); | ||
409 | |||
410 | SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, | ||
411 | SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); | ||
412 | SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, | ||
413 | SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); | ||
414 | SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, | ||
415 | SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, | ||
416 | SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); | ||
417 | SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, | ||
418 | SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); | ||
419 | SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, | ||
420 | SSB_SPROM8_OPT_CORRX_TEMP_OPTION, | ||
421 | SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); | ||
422 | SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, | ||
423 | SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, | ||
424 | SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); | ||
425 | SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, | ||
426 | SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, | ||
427 | SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); | ||
428 | SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, | ||
429 | SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); | ||
430 | |||
431 | SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); | ||
432 | SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); | ||
433 | SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); | ||
434 | SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); | ||
435 | |||
436 | SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, | ||
437 | SSB_SPROM8_THERMAL_TRESH_SHIFT); | ||
438 | SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, | ||
439 | SSB_SPROM8_THERMAL_OFFSET_SHIFT); | ||
440 | SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, | ||
441 | SSB_SPROM8_TEMPDELTA_PHYCAL, | ||
442 | SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); | ||
443 | SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, | ||
444 | SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); | ||
445 | SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, | ||
446 | SSB_SPROM8_TEMPDELTA_HYSTERESIS, | ||
447 | SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); | ||
378 | } | 448 | } |
379 | 449 | ||
380 | /* | 450 | /* |
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c index 2cb604d142f4..e9d94968f394 100644 --- a/drivers/ssb/pci.c +++ b/drivers/ssb/pci.c | |||
@@ -178,6 +178,18 @@ err_pci: | |||
178 | #define SPEX(_outvar, _offset, _mask, _shift) \ | 178 | #define SPEX(_outvar, _offset, _mask, _shift) \ |
179 | SPEX16(_outvar, _offset, _mask, _shift) | 179 | SPEX16(_outvar, _offset, _mask, _shift) |
180 | 180 | ||
181 | #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ | ||
182 | do { \ | ||
183 | SPEX(_field[0], _offset + 0, _mask, _shift); \ | ||
184 | SPEX(_field[1], _offset + 2, _mask, _shift); \ | ||
185 | SPEX(_field[2], _offset + 4, _mask, _shift); \ | ||
186 | SPEX(_field[3], _offset + 6, _mask, _shift); \ | ||
187 | SPEX(_field[4], _offset + 8, _mask, _shift); \ | ||
188 | SPEX(_field[5], _offset + 10, _mask, _shift); \ | ||
189 | SPEX(_field[6], _offset + 12, _mask, _shift); \ | ||
190 | SPEX(_field[7], _offset + 14, _mask, _shift); \ | ||
191 | } while (0) | ||
192 | |||
181 | 193 | ||
182 | static inline u8 ssb_crc8(u8 crc, u8 data) | 194 | static inline u8 ssb_crc8(u8 crc, u8 data) |
183 | { | 195 | { |
@@ -663,6 +675,63 @@ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) | |||
663 | SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, | 675 | SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, |
664 | SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); | 676 | SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); |
665 | 677 | ||
678 | SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, | ||
679 | SSB_SPROM8_LEDDC_ON_SHIFT); | ||
680 | SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, | ||
681 | SSB_SPROM8_LEDDC_OFF_SHIFT); | ||
682 | |||
683 | SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, | ||
684 | SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); | ||
685 | SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, | ||
686 | SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); | ||
687 | SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, | ||
688 | SSB_SPROM8_TXRXC_SWITCH_SHIFT); | ||
689 | |||
690 | SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); | ||
691 | |||
692 | SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); | ||
693 | SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); | ||
694 | SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); | ||
695 | SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); | ||
696 | |||
697 | SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, | ||
698 | SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); | ||
699 | SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, | ||
700 | SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); | ||
701 | SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, | ||
702 | SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, | ||
703 | SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); | ||
704 | SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, | ||
705 | SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); | ||
706 | SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, | ||
707 | SSB_SPROM8_OPT_CORRX_TEMP_OPTION, | ||
708 | SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); | ||
709 | SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, | ||
710 | SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, | ||
711 | SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); | ||
712 | SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, | ||
713 | SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, | ||
714 | SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); | ||
715 | SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, | ||
716 | SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); | ||
717 | |||
718 | SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); | ||
719 | SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); | ||
720 | SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); | ||
721 | SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); | ||
722 | |||
723 | SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, | ||
724 | SSB_SPROM8_THERMAL_TRESH_SHIFT); | ||
725 | SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, | ||
726 | SSB_SPROM8_THERMAL_OFFSET_SHIFT); | ||
727 | SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, | ||
728 | SSB_SPROM8_TEMPDELTA_PHYCAL, | ||
729 | SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); | ||
730 | SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, | ||
731 | SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); | ||
732 | SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, | ||
733 | SSB_SPROM8_TEMPDELTA_HYSTERESIS, | ||
734 | SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); | ||
666 | sprom_extract_r458(out, in); | 735 | sprom_extract_r458(out, in); |
667 | 736 | ||
668 | /* TODO - get remaining rev 8 stuff needed */ | 737 | /* TODO - get remaining rev 8 stuff needed */ |
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 543795f30f75..a0525019e1d1 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
@@ -391,6 +391,11 @@ | |||
391 | #define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */ | 391 | #define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */ |
392 | #define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */ | 392 | #define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */ |
393 | #define SSB_SPROM8_GPIOB_P3_SHIFT 8 | 393 | #define SSB_SPROM8_GPIOB_P3_SHIFT 8 |
394 | #define SSB_SPROM8_LEDDC 0x009A | ||
395 | #define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */ | ||
396 | #define SSB_SPROM8_LEDDC_ON_SHIFT 8 | ||
397 | #define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */ | ||
398 | #define SSB_SPROM8_LEDDC_OFF_SHIFT 0 | ||
394 | #define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/ | 399 | #define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/ |
395 | #define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */ | 400 | #define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */ |
396 | #define SSB_SPROM8_ANTAVAIL_A_SHIFT 8 | 401 | #define SSB_SPROM8_ANTAVAIL_A_SHIFT 8 |
@@ -406,6 +411,13 @@ | |||
406 | #define SSB_SPROM8_AGAIN2_SHIFT 0 | 411 | #define SSB_SPROM8_AGAIN2_SHIFT 0 |
407 | #define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */ | 412 | #define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */ |
408 | #define SSB_SPROM8_AGAIN3_SHIFT 8 | 413 | #define SSB_SPROM8_AGAIN3_SHIFT 8 |
414 | #define SSB_SPROM8_TXRXC 0x00A2 | ||
415 | #define SSB_SPROM8_TXRXC_TXCHAIN 0x000f | ||
416 | #define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0 | ||
417 | #define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0 | ||
418 | #define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4 | ||
419 | #define SSB_SPROM8_TXRXC_SWITCH 0xff00 | ||
420 | #define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8 | ||
409 | #define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */ | 421 | #define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */ |
410 | #define SSB_SPROM8_RSSISMF2G 0x000F | 422 | #define SSB_SPROM8_RSSISMF2G 0x000F |
411 | #define SSB_SPROM8_RSSISMC2G 0x00F0 | 423 | #define SSB_SPROM8_RSSISMC2G 0x00F0 |
@@ -432,6 +444,7 @@ | |||
432 | #define SSB_SPROM8_TRI5GH_SHIFT 8 | 444 | #define SSB_SPROM8_TRI5GH_SHIFT 8 |
433 | #define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */ | 445 | #define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */ |
434 | #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ | 446 | #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ |
447 | #define SSB_SPROM8_RXPO2G_SHIFT 0 | ||
435 | #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ | 448 | #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ |
436 | #define SSB_SPROM8_RXPO5G_SHIFT 8 | 449 | #define SSB_SPROM8_RXPO5G_SHIFT 8 |
437 | #define SSB_SPROM8_FEM2G 0x00AE | 450 | #define SSB_SPROM8_FEM2G 0x00AE |
@@ -447,10 +460,38 @@ | |||
447 | #define SSB_SROM8_FEM_ANTSWLUT 0xF800 | 460 | #define SSB_SROM8_FEM_ANTSWLUT 0xF800 |
448 | #define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11 | 461 | #define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11 |
449 | #define SSB_SPROM8_THERMAL 0x00B2 | 462 | #define SSB_SPROM8_THERMAL 0x00B2 |
450 | #define SSB_SPROM8_MPWR_RAWTS 0x00B4 | 463 | #define SSB_SPROM8_THERMAL_OFFSET 0x00ff |
451 | #define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 | 464 | #define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0 |
452 | #define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 | 465 | #define SSB_SPROM8_THERMAL_TRESH 0xff00 |
453 | #define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA | 466 | #define SSB_SPROM8_THERMAL_TRESH_SHIFT 8 |
467 | /* Temp sense related entries */ | ||
468 | #define SSB_SPROM8_RAWTS 0x00B4 | ||
469 | #define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff | ||
470 | #define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0 | ||
471 | #define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00 | ||
472 | #define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9 | ||
473 | #define SSB_SPROM8_OPT_CORRX 0x00B6 | ||
474 | #define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff | ||
475 | #define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0 | ||
476 | #define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00 | ||
477 | #define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10 | ||
478 | #define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300 | ||
479 | #define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8 | ||
480 | /* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ | ||
481 | #define SSB_SPROM8_HWIQ_IQSWP 0x00B8 | ||
482 | #define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f | ||
483 | #define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0 | ||
484 | #define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010 | ||
485 | #define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4 | ||
486 | #define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020 | ||
487 | #define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5 | ||
488 | #define SSB_SPROM8_TEMPDELTA 0x00BA | ||
489 | #define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff | ||
490 | #define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0 | ||
491 | #define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00 | ||
492 | #define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8 | ||
493 | #define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000 | ||
494 | #define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12 | ||
454 | 495 | ||
455 | /* There are 4 blocks with power info sharing the same layout */ | 496 | /* There are 4 blocks with power info sharing the same layout */ |
456 | #define SSB_SROM8_PWR_INFO_CORE0 0x00C0 | 497 | #define SSB_SROM8_PWR_INFO_CORE0 0x00C0 |
@@ -515,6 +556,16 @@ | |||
515 | #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */ | 556 | #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */ |
516 | #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */ | 557 | #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */ |
517 | 558 | ||
559 | #define SSB_SPROM8_2G_MCSPO 0x0152 | ||
560 | #define SSB_SPROM8_5G_MCSPO 0x0162 | ||
561 | #define SSB_SPROM8_5GL_MCSPO 0x0172 | ||
562 | #define SSB_SPROM8_5GH_MCSPO 0x0182 | ||
563 | |||
564 | #define SSB_SPROM8_CDDPO 0x0192 | ||
565 | #define SSB_SPROM8_STBCPO 0x0194 | ||
566 | #define SSB_SPROM8_BW40PO 0x0196 | ||
567 | #define SSB_SPROM8_BWDUPPO 0x0198 | ||
568 | |||
518 | /* Values for boardflags_lo read from SPROM */ | 569 | /* Values for boardflags_lo read from SPROM */ |
519 | #define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ | 570 | #define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ |
520 | #define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ | 571 | #define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ |