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-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi94
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts59
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts60
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts65
4 files changed, 140 insertions, 138 deletions
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 62639b4a61f9..073dd203a819 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -45,6 +45,56 @@
45 controller = <&mbusc>; 45 controller = <&mbusc>;
46 interrupt-parent = <&mpic>; 46 interrupt-parent = <&mpic>;
47 47
48 devbus-bootcs {
49 compatible = "marvell,mvebu-devbus";
50 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
51 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
52 #address-cells = <1>;
53 #size-cells = <1>;
54 clocks = <&coreclk 0>;
55 status = "disabled";
56 };
57
58 devbus-cs0 {
59 compatible = "marvell,mvebu-devbus";
60 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
61 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
62 #address-cells = <1>;
63 #size-cells = <1>;
64 clocks = <&coreclk 0>;
65 status = "disabled";
66 };
67
68 devbus-cs1 {
69 compatible = "marvell,mvebu-devbus";
70 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
71 ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
72 #address-cells = <1>;
73 #size-cells = <1>;
74 clocks = <&coreclk 0>;
75 status = "disabled";
76 };
77
78 devbus-cs2 {
79 compatible = "marvell,mvebu-devbus";
80 reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
81 ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
82 #address-cells = <1>;
83 #size-cells = <1>;
84 clocks = <&coreclk 0>;
85 status = "disabled";
86 };
87
88 devbus-cs3 {
89 compatible = "marvell,mvebu-devbus";
90 reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
91 ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
92 #address-cells = <1>;
93 #size-cells = <1>;
94 clocks = <&coreclk 0>;
95 status = "disabled";
96 };
97
48 internal-regs { 98 internal-regs {
49 compatible = "simple-bus"; 99 compatible = "simple-bus";
50 #address-cells = <1>; 100 #address-cells = <1>;
@@ -200,50 +250,6 @@
200 status = "disabled"; 250 status = "disabled";
201 }; 251 };
202 252
203 devbus-bootcs@10400 {
204 compatible = "marvell,mvebu-devbus";
205 reg = <0x10400 0x8>;
206 #address-cells = <1>;
207 #size-cells = <1>;
208 clocks = <&coreclk 0>;
209 status = "disabled";
210 };
211
212 devbus-cs0@10408 {
213 compatible = "marvell,mvebu-devbus";
214 reg = <0x10408 0x8>;
215 #address-cells = <1>;
216 #size-cells = <1>;
217 clocks = <&coreclk 0>;
218 status = "disabled";
219 };
220
221 devbus-cs1@10410 {
222 compatible = "marvell,mvebu-devbus";
223 reg = <0x10410 0x8>;
224 #address-cells = <1>;
225 #size-cells = <1>;
226 clocks = <&coreclk 0>;
227 status = "disabled";
228 };
229
230 devbus-cs2@10418 {
231 compatible = "marvell,mvebu-devbus";
232 reg = <0x10418 0x8>;
233 #address-cells = <1>;
234 #size-cells = <1>;
235 clocks = <&coreclk 0>;
236 status = "disabled";
237 };
238
239 devbus-cs3@10420 {
240 compatible = "marvell,mvebu-devbus";
241 reg = <0x10420 0x8>;
242 #address-cells = <1>;
243 #size-cells = <1>;
244 clocks = <&coreclk 0>;
245 status = "disabled";
246 };
247 }; 253 };
248 }; 254 };
249 }; 255 };
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 857f27214a7b..76ae1a95111b 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -31,7 +31,36 @@
31 31
32 soc { 32 soc {
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 33 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
34 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 34 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
35 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
36
37 devbus-bootcs {
38 status = "okay";
39
40 /* Device Bus parameters are required */
41
42 /* Read parameters */
43 devbus,bus-width = <8>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
46 devbus,acc-first-ps = <124000>;
47 devbus,acc-next-ps = <248000>;
48 devbus,rd-setup-ps = <0>;
49 devbus,rd-hold-ps = <0>;
50
51 /* Write parameters */
52 devbus,sync-enable = <0>;
53 devbus,wr-high-ps = <60000>;
54 devbus,wr-low-ps = <60000>;
55 devbus,ale-wr-ps = <60000>;
56
57 /* NOR 16 MiB */
58 nor@0 {
59 compatible = "cfi-flash";
60 reg = <0 0x1000000>;
61 bank-width = <2>;
62 };
63 };
35 64
36 internal-regs { 65 internal-regs {
37 serial@12000 { 66 serial@12000 {
@@ -160,34 +189,6 @@
160 }; 189 };
161 }; 190 };
162 191
163 devbus-bootcs@10400 {
164 status = "okay";
165 ranges = <0 0xf0000000 0x1000000>;
166
167 /* Device Bus parameters are required */
168
169 /* Read parameters */
170 devbus,bus-width = <8>;
171 devbus,turn-off-ps = <60000>;
172 devbus,badr-skew-ps = <0>;
173 devbus,acc-first-ps = <124000>;
174 devbus,acc-next-ps = <248000>;
175 devbus,rd-setup-ps = <0>;
176 devbus,rd-hold-ps = <0>;
177
178 /* Write parameters */
179 devbus,sync-enable = <0>;
180 devbus,wr-high-ps = <60000>;
181 devbus,wr-low-ps = <60000>;
182 devbus,ale-wr-ps = <60000>;
183
184 /* NOR 16 MiB */
185 nor@0 {
186 compatible = "cfi-flash";
187 reg = <0 0x1000000>;
188 bank-width = <2>;
189 };
190 };
191 }; 192 };
192 }; 193 };
193}; 194};
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 934dc46645db..8c0de201c65b 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -40,7 +40,36 @@
40 40
41 soc { 41 soc {
42 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 42 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
43 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 43 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
44 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
45
46 devbus-bootcs {
47 status = "okay";
48
49 /* Device Bus parameters are required */
50
51 /* Read parameters */
52 devbus,bus-width = <8>;
53 devbus,turn-off-ps = <60000>;
54 devbus,badr-skew-ps = <0>;
55 devbus,acc-first-ps = <124000>;
56 devbus,acc-next-ps = <248000>;
57 devbus,rd-setup-ps = <0>;
58 devbus,rd-hold-ps = <0>;
59
60 /* Write parameters */
61 devbus,sync-enable = <0>;
62 devbus,wr-high-ps = <60000>;
63 devbus,wr-low-ps = <60000>;
64 devbus,ale-wr-ps = <60000>;
65
66 /* NOR 16 MiB */
67 nor@0 {
68 compatible = "cfi-flash";
69 reg = <0 0x1000000>;
70 bank-width = <2>;
71 };
72 };
44 73
45 internal-regs { 74 internal-regs {
46 serial@12000 { 75 serial@12000 {
@@ -126,35 +155,6 @@
126 }; 155 };
127 }; 156 };
128 157
129 devbus-bootcs@10400 {
130 status = "okay";
131 ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */
132
133 /* Device Bus parameters are required */
134
135 /* Read parameters */
136 devbus,bus-width = <8>;
137 devbus,turn-off-ps = <60000>;
138 devbus,badr-skew-ps = <0>;
139 devbus,acc-first-ps = <124000>;
140 devbus,acc-next-ps = <248000>;
141 devbus,rd-setup-ps = <0>;
142 devbus,rd-hold-ps = <0>;
143
144 /* Write parameters */
145 devbus,sync-enable = <0>;
146 devbus,wr-high-ps = <60000>;
147 devbus,wr-low-ps = <60000>;
148 devbus,ale-wr-ps = <60000>;
149
150 /* NOR 16 MiB */
151 nor@0 {
152 compatible = "cfi-flash";
153 reg = <0 0x1000000>;
154 bank-width = <2>;
155 };
156 };
157
158 pcie-controller { 158 pcie-controller {
159 status = "okay"; 159 status = "okay";
160 160
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 1700f6fd6127..2b60ee08ef9f 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -28,7 +28,36 @@
28 28
29 soc { 29 soc {
30 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 30 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
31 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 31 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
32 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>;
33
34 devbus-bootcs {
35 status = "okay";
36
37 /* Device Bus parameters are required */
38
39 /* Read parameters */
40 devbus,bus-width = <8>;
41 devbus,turn-off-ps = <60000>;
42 devbus,badr-skew-ps = <0>;
43 devbus,acc-first-ps = <124000>;
44 devbus,acc-next-ps = <248000>;
45 devbus,rd-setup-ps = <0>;
46 devbus,rd-hold-ps = <0>;
47
48 /* Write parameters */
49 devbus,sync-enable = <0>;
50 devbus,wr-high-ps = <60000>;
51 devbus,wr-low-ps = <60000>;
52 devbus,ale-wr-ps = <60000>;
53
54 /* NOR 128 MiB */
55 nor@0 {
56 compatible = "cfi-flash";
57 reg = <0 0x8000000>;
58 bank-width = <2>;
59 };
60 };
32 61
33 internal-regs { 62 internal-regs {
34 serial@12000 { 63 serial@12000 {
@@ -148,40 +177,6 @@
148 status = "okay"; 177 status = "okay";
149 }; 178 };
150 179
151 /* USB interface in the mini-PCIe connector */
152 usb@52000 {
153 status = "okay";
154 };
155
156 devbus-bootcs@10400 {
157 status = "okay";
158 ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
159
160 /* Device Bus parameters are required */
161
162 /* Read parameters */
163 devbus,bus-width = <8>;
164 devbus,turn-off-ps = <60000>;
165 devbus,badr-skew-ps = <0>;
166 devbus,acc-first-ps = <124000>;
167 devbus,acc-next-ps = <248000>;
168 devbus,rd-setup-ps = <0>;
169 devbus,rd-hold-ps = <0>;
170
171 /* Write parameters */
172 devbus,sync-enable = <0>;
173 devbus,wr-high-ps = <60000>;
174 devbus,wr-low-ps = <60000>;
175 devbus,ale-wr-ps = <60000>;
176
177 /* NOR 128 MiB */
178 nor@0 {
179 compatible = "cfi-flash";
180 reg = <0 0x8000000>;
181 bank-width = <2>;
182 };
183 };
184
185 pcie-controller { 180 pcie-controller {
186 status = "okay"; 181 status = "okay";
187 /* Internal mini-PCIe connector */ 182 /* Internal mini-PCIe connector */
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-11 16:07:42 -0400