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-rw-r--r--arch/arm/mach-spear3xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/spear.h47
-rw-r--r--arch/arm/mach-spear3xx/spear300.c2
-rw-r--r--arch/arm/mach-spear3xx/spear310.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320.c2
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c8
-rw-r--r--arch/arm/mach-spear6xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/spear.h61
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c12
9 files changed, 75 insertions, 63 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
index 6309bf68d6f8..075812c4ca18 100644
--- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
@@ -16,7 +16,7 @@
16 16
17#include <mach/spear.h> 17#include <mach/spear.h>
18 18
19#define MISC_BASE IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE) 19#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE)
20#define DMA_CHN_CFG (MISC_BASE + 0x0A0) 20#define DMA_CHN_CFG (MISC_BASE + 0x0A0)
21 21
22#endif /* __MACH_MISC_REGS_H */ 22#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index 8cca95193d4d..ee5a774caae1 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -1,9 +1,8 @@
1/* 1/*
2 * arch/arm/mach-spear3xx/include/mach/spear.h 2 * SPEAr3xx/6xx Machine family specific definition
3 * 3 *
4 * SPEAr3xx Machine family specific definition 4 * Copyright (C) 2009,2012 ST Microelectronics
5 * 5 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com> 6 * Viresh Kumar <viresh.linux@gmail.com>
8 * 7 *
9 * This file is licensed under the terms of the GNU General Public 8 * This file is licensed under the terms of the GNU General Public
@@ -11,38 +10,38 @@
11 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
12 */ 11 */
13 12
14#ifndef __MACH_SPEAR3XX_H 13#ifndef __MACH_SPEAR_H
15#define __MACH_SPEAR3XX_H 14#define __MACH_SPEAR_H
16 15
17#include <asm/memory.h> 16#include <asm/memory.h>
18 17
19/* ICM1 - Low speed connection */ 18/* ICM1 - Low speed connection */
20#define SPEAR3XX_ICM1_2_BASE UL(0xD0000000) 19#define SPEAR_ICM1_2_BASE UL(0xD0000000)
21#define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000) 20#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000)
22#define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000) 21#define SPEAR_ICM1_UART_BASE UL(0xD0000000)
23#define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE) 22#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)
24#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) 23#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
25 24
26/* ML1 - Multi Layer CPU Subsystem */ 25/* ML-1, 2 - Multi Layer CPU Subsystem */
27#define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000) 26#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
28#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) 27#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
29 28
30/* ICM3 - Basic Subsystem */ 29/* ICM3 - Basic Subsystem */
31#define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) 30#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
32#define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) 31#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
33#define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000) 32#define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
34#define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) 33#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
35#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE) 34#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)
36#define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000) 35#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
37#define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE) 36#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)
38 37
39/* Debug uart for linux, will be used for debug and uncompress messages */ 38/* Debug uart for linux, will be used for debug and uncompress messages */
40#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE 39#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
41#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE 40#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE
42 41
43/* Sysctl base for spear platform */ 42/* Sysctl base for spear platform */
44#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE 43#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
45#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE 44#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
46 45
47/* SPEAr320 Macros */ 46/* SPEAr320 Macros */
48#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) 47#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
@@ -57,4 +56,4 @@
57 #define SPEAR320_UART6_PCLK_SHIFT 12 56 #define SPEAR320_UART6_PCLK_SHIFT 12
58 #define SPEAR320_RS485_PCLK_SHIFT 13 57 #define SPEAR320_RS485_PCLK_SHIFT 13
59 58
60#endif /* __MACH_SPEAR3XX_H */ 59#endif /* __MACH_SPEAR_H */
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index bbc9b7e9c62c..72449eeaa6ae 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -185,7 +185,7 @@ struct pl08x_channel_data spear300_dma_info[] = {
185static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { 185static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
186 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 186 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
187 &pl022_plat_data), 187 &pl022_plat_data),
188 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, 188 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
189 &pl080_plat_data), 189 &pl080_plat_data),
190 {} 190 {}
191}; 191};
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index c13a434a8195..0b7962d27694 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -217,7 +217,7 @@ static struct amba_pl011_data spear310_uart_data[] = {
217static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { 217static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
218 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 218 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
219 &pl022_plat_data), 219 &pl022_plat_data),
220 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, 220 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
221 &pl080_plat_data), 221 &pl080_plat_data),
222 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, 222 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
223 &spear310_uart_data[0]), 223 &spear310_uart_data[0]),
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index f671a0ad5217..e9db7dbf6c57 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -223,7 +223,7 @@ static struct amba_pl011_data spear320_uart_data[] = {
223static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { 223static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
224 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, 224 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
225 &pl022_plat_data), 225 &pl022_plat_data),
226 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, 226 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
227 &pl080_plat_data), 227 &pl080_plat_data),
228 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL, 228 OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
229 &spear320_ssp_data[0]), 229 &spear320_ssp_data[0]),
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 72e3ae7d463a..d7580f2e5e07 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -67,13 +67,13 @@ struct pl08x_platform_data pl080_plat_data = {
67 */ 67 */
68struct map_desc spear3xx_io_desc[] __initdata = { 68struct map_desc spear3xx_io_desc[] __initdata = {
69 { 69 {
70 .virtual = VA_SPEAR3XX_ICM1_2_BASE, 70 .virtual = VA_SPEAR_ICM1_2_BASE,
71 .pfn = __phys_to_pfn(SPEAR3XX_ICM1_2_BASE), 71 .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
72 .length = SZ_16M, 72 .length = SZ_16M,
73 .type = MT_DEVICE 73 .type = MT_DEVICE
74 }, { 74 }, {
75 .virtual = VA_SPEAR3XX_ICM3_SMI_CTRL_BASE, 75 .virtual = VA_SPEAR_ICM3_SMI_CTRL_BASE,
76 .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SMI_CTRL_BASE), 76 .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
77 .length = SZ_16M, 77 .length = SZ_16M,
78 .type = MT_DEVICE 78 .type = MT_DEVICE
79 }, 79 },
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
index c34acc201d34..28aa508cb94d 100644
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -16,7 +16,7 @@
16 16
17#include <mach/spear.h> 17#include <mach/spear.h>
18 18
19#define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE) 19#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE)
20#define DMA_CHN_CFG (MISC_BASE + 0x0A0) 20#define DMA_CHN_CFG (MISC_BASE + 0x0A0)
21 21
22#endif /* __MACH_MISC_REGS_H */ 22#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h
index cb8ed2f4dc85..ee5a774caae1 100644
--- a/arch/arm/mach-spear6xx/include/mach/spear.h
+++ b/arch/arm/mach-spear6xx/include/mach/spear.h
@@ -1,46 +1,59 @@
1/* 1/*
2 * arch/arm/mach-spear6xx/include/mach/spear.h 2 * SPEAr3xx/6xx Machine family specific definition
3 * 3 *
4 * SPEAr6xx Machine family specific definition 4 * Copyright (C) 2009,2012 ST Microelectronics
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com> 5 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
6 * Viresh Kumar <viresh.linux@gmail.com>
8 * 7 *
9 * This file is licensed under the terms of the GNU General Public 8 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 9 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied. 10 * warranty of any kind, whether express or implied.
12 */ 11 */
13 12
14#ifndef __MACH_SPEAR6XX_H 13#ifndef __MACH_SPEAR_H
15#define __MACH_SPEAR6XX_H 14#define __MACH_SPEAR_H
16 15
17#include <asm/memory.h> 16#include <asm/memory.h>
18 17
19/* ICM1 - Low speed connection */ 18/* ICM1 - Low speed connection */
20#define SPEAR6XX_ICM1_BASE UL(0xD0000000) 19#define SPEAR_ICM1_2_BASE UL(0xD0000000)
21#define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000) 20#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000)
22#define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000) 21#define SPEAR_ICM1_UART_BASE UL(0xD0000000)
23#define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE) 22#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)
23#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
24 24
25/* ML-1, 2 - Multi Layer CPU Subsystem */ 25/* ML-1, 2 - Multi Layer CPU Subsystem */
26#define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) 26#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
27#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) 27#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
28 28
29/* ICM3 - Basic Subsystem */ 29/* ICM3 - Basic Subsystem */
30#define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) 30#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
31#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) 31#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
32#define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000) 32#define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
33#define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) 33#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
34#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE) 34#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)
35#define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000) 35#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
36#define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE) 36#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)
37 37
38/* Debug uart for linux, will be used for debug and uncompress messages */ 38/* Debug uart for linux, will be used for debug and uncompress messages */
39#define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE 39#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
40#define VA_SPEAR_DBG_UART_BASE VA_SPEAR6XX_ICM1_UART0_BASE 40#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE
41 41
42/* Sysctl base for spear platform */ 42/* Sysctl base for spear platform */
43#define SPEAR_SYS_CTRL_BASE SPEAR6XX_ICM3_SYS_CTRL_BASE 43#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
44#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR6XX_ICM3_SYS_CTRL_BASE 44#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
45 45
46#endif /* __MACH_SPEAR6XX_H */ 46/* SPEAr320 Macros */
47#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
48#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000)
49#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
50#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
51 #define SPEAR320_UARTX_PCLK_MASK 0x1
52 #define SPEAR320_UART2_PCLK_SHIFT 8
53 #define SPEAR320_UART3_PCLK_SHIFT 9
54 #define SPEAR320_UART4_PCLK_SHIFT 10
55 #define SPEAR320_UART5_PCLK_SHIFT 11
56 #define SPEAR320_UART6_PCLK_SHIFT 12
57 #define SPEAR320_RS485_PCLK_SHIFT 13
58
59#endif /* __MACH_SPEAR_H */
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 8904d8a52d84..97fb31d8c9b5 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -351,17 +351,17 @@ struct pl08x_platform_data pl080_plat_data = {
351struct map_desc spear6xx_io_desc[] __initdata = { 351struct map_desc spear6xx_io_desc[] __initdata = {
352 { 352 {
353 .virtual = VA_SPEAR6XX_ML_CPU_BASE, 353 .virtual = VA_SPEAR6XX_ML_CPU_BASE,
354 .pfn = __phys_to_pfn(SPEAR6XX_ML_CPU_BASE), 354 .pfn = __phys_to_pfn(SPEAR_ICM3_ML1_2_BASE),
355 .length = 2 * SZ_16M, 355 .length = 2 * SZ_16M,
356 .type = MT_DEVICE 356 .type = MT_DEVICE
357 }, { 357 }, {
358 .virtual = VA_SPEAR6XX_ICM1_BASE, 358 .virtual = VA_SPEAR_ICM1_2_BASE,
359 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_BASE), 359 .pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
360 .length = SZ_16M, 360 .length = SZ_16M,
361 .type = MT_DEVICE 361 .type = MT_DEVICE
362 }, { 362 }, {
363 .virtual = VA_SPEAR6XX_ICM3_SMI_CTRL_BASE, 363 .virtual = VA_SPEAR_ICM3_SMI_CTRL_BASE,
364 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SMI_CTRL_BASE), 364 .pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
365 .length = SZ_16M, 365 .length = SZ_16M,
366 .type = MT_DEVICE 366 .type = MT_DEVICE
367 }, 367 },
@@ -404,7 +404,7 @@ void __init spear6xx_timer_init(void)
404 404
405/* Add auxdata to pass platform data */ 405/* Add auxdata to pass platform data */
406struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = { 406struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
407 OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL, 407 OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
408 &pl080_plat_data), 408 &pl080_plat_data),
409 {} 409 {}
410}; 410};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-28 02:04:18 -0500