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-rw-r--r--drivers/iommu/omap-iommu.c31
-rw-r--r--drivers/iommu/omap-iopgtable.h3
2 files changed, 12 insertions, 22 deletions
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index 7fcbfc498fa9..895af06a667f 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -34,6 +34,9 @@
34#include "omap-iopgtable.h" 34#include "omap-iopgtable.h"
35#include "omap-iommu.h" 35#include "omap-iommu.h"
36 36
37#define to_iommu(dev) \
38 ((struct omap_iommu *)platform_get_drvdata(to_platform_device(dev)))
39
37#define for_each_iotlb_cr(obj, n, __i, cr) \ 40#define for_each_iotlb_cr(obj, n, __i, cr) \
38 for (__i = 0; \ 41 for (__i = 0; \
39 (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \ 42 (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \
@@ -391,6 +394,7 @@ static void flush_iotlb_page(struct omap_iommu *obj, u32 da)
391 __func__, start, da, bytes); 394 __func__, start, da, bytes);
392 iotlb_load_cr(obj, &cr); 395 iotlb_load_cr(obj, &cr);
393 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); 396 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
397 break;
394 } 398 }
395 } 399 }
396 pm_runtime_put_sync(obj->dev); 400 pm_runtime_put_sync(obj->dev);
@@ -1037,19 +1041,18 @@ static void iopte_cachep_ctor(void *iopte)
1037 clean_dcache_area(iopte, IOPTE_TABLE_SIZE); 1041 clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
1038} 1042}
1039 1043
1040static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, 1044static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, int pgsz)
1041 u32 flags)
1042{ 1045{
1043 memset(e, 0, sizeof(*e)); 1046 memset(e, 0, sizeof(*e));
1044 1047
1045 e->da = da; 1048 e->da = da;
1046 e->pa = pa; 1049 e->pa = pa;
1047 e->valid = 1; 1050 e->valid = MMU_CAM_V;
1048 /* FIXME: add OMAP1 support */ 1051 /* FIXME: add OMAP1 support */
1049 e->pgsz = flags & MMU_CAM_PGSZ_MASK; 1052 e->pgsz = pgsz;
1050 e->endian = flags & MMU_RAM_ENDIAN_MASK; 1053 e->endian = MMU_RAM_ENDIAN_LITTLE;
1051 e->elsz = flags & MMU_RAM_ELSZ_MASK; 1054 e->elsz = MMU_RAM_ELSZ_8;
1052 e->mixed = flags & MMU_RAM_MIXED_MASK; 1055 e->mixed = 0;
1053 1056
1054 return iopgsz_to_bytes(e->pgsz); 1057 return iopgsz_to_bytes(e->pgsz);
1055} 1058}
@@ -1062,9 +1065,8 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
1062 struct device *dev = oiommu->dev; 1065 struct device *dev = oiommu->dev;
1063 struct iotlb_entry e; 1066 struct iotlb_entry e;
1064 int omap_pgsz; 1067 int omap_pgsz;
1065 u32 ret, flags; 1068 u32 ret;
1066 1069
1067 /* we only support mapping a single iommu page for now */
1068 omap_pgsz = bytes_to_iopgsz(bytes); 1070 omap_pgsz = bytes_to_iopgsz(bytes);
1069 if (omap_pgsz < 0) { 1071 if (omap_pgsz < 0) {
1070 dev_err(dev, "invalid size to map: %d\n", bytes); 1072 dev_err(dev, "invalid size to map: %d\n", bytes);
@@ -1073,9 +1075,7 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
1073 1075
1074 dev_dbg(dev, "mapping da 0x%lx to pa 0x%x size 0x%x\n", da, pa, bytes); 1076 dev_dbg(dev, "mapping da 0x%lx to pa 0x%x size 0x%x\n", da, pa, bytes);
1075 1077
1076 flags = omap_pgsz | prot; 1078 iotlb_init_entry(&e, da, pa, omap_pgsz);
1077
1078 iotlb_init_entry(&e, da, pa, flags);
1079 1079
1080 ret = omap_iopgtable_store_entry(oiommu, &e); 1080 ret = omap_iopgtable_store_entry(oiommu, &e);
1081 if (ret) 1081 if (ret)
@@ -1248,12 +1248,6 @@ static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain,
1248 return ret; 1248 return ret;
1249} 1249}
1250 1250
1251static int omap_iommu_domain_has_cap(struct iommu_domain *domain,
1252 unsigned long cap)
1253{
1254 return 0;
1255}
1256
1257static int omap_iommu_add_device(struct device *dev) 1251static int omap_iommu_add_device(struct device *dev)
1258{ 1252{
1259 struct omap_iommu_arch_data *arch_data; 1253 struct omap_iommu_arch_data *arch_data;
@@ -1305,7 +1299,6 @@ static struct iommu_ops omap_iommu_ops = {
1305 .map = omap_iommu_map, 1299 .map = omap_iommu_map,
1306 .unmap = omap_iommu_unmap, 1300 .unmap = omap_iommu_unmap,
1307 .iova_to_phys = omap_iommu_iova_to_phys, 1301 .iova_to_phys = omap_iommu_iova_to_phys,
1308 .domain_has_cap = omap_iommu_domain_has_cap,
1309 .add_device = omap_iommu_add_device, 1302 .add_device = omap_iommu_add_device,
1310 .remove_device = omap_iommu_remove_device, 1303 .remove_device = omap_iommu_remove_device,
1311 .pgsize_bitmap = OMAP_IOMMU_PGSIZES, 1304 .pgsize_bitmap = OMAP_IOMMU_PGSIZES,
diff --git a/drivers/iommu/omap-iopgtable.h b/drivers/iommu/omap-iopgtable.h
index b6f9a51746ca..f891683e3f05 100644
--- a/drivers/iommu/omap-iopgtable.h
+++ b/drivers/iommu/omap-iopgtable.h
@@ -93,6 +93,3 @@ static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask)
93/* to find an entry in the second-level page table. */ 93/* to find an entry in the second-level page table. */
94#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1)) 94#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
95#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da)) 95#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
96
97#define to_iommu(dev) \
98 (platform_get_drvdata(to_platform_device(dev)))