aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--Documentation/power/devices.txt111
-rw-r--r--Documentation/power/runtime_pm.txt40
-rw-r--r--MAINTAINERS9
-rw-r--r--arch/arm/configs/at91cap9_defconfig (renamed from arch/arm/configs/at91cap9adk_defconfig)7
-rw-r--r--arch/arm/configs/at91rm9200_defconfig47
-rw-r--r--arch/arm/configs/at91sam9260_defconfig (renamed from arch/arm/configs/at91sam9260ek_defconfig)16
-rw-r--r--arch/arm/configs/at91sam9g20_defconfig (renamed from arch/arm/configs/at91sam9g20ek_defconfig)23
-rw-r--r--arch/arm/configs/at91sam9g45_defconfig7
-rw-r--r--arch/arm/configs/at91sam9rl_defconfig (renamed from arch/arm/configs/at91sam9rlek_defconfig)5
-rw-r--r--arch/arm/configs/ezx_defconfig2
-rw-r--r--arch/arm/configs/imote2_defconfig2
-rw-r--r--arch/arm/configs/magician_defconfig2
-rw-r--r--arch/arm/configs/omap1_defconfig1
-rw-r--r--arch/arm/configs/u300_defconfig13
-rw-r--r--arch/arm/configs/u8500_defconfig14
-rw-r--r--arch/arm/configs/zeus_defconfig2
-rw-r--r--arch/arm/mach-exynos/cpuidle.c2
-rw-r--r--arch/arm/mach-highbank/highbank.c4
-rw-r--r--arch/arm/mach-imx/Kconfig13
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c7
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c1
-rw-r--r--arch/arm/mach-imx/mm-imx3.c109
-rw-r--r--arch/arm/mach-imx/src.c7
-rw-r--r--arch/arm/mach-mmp/gplugd.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h2
-rw-r--r--arch/arm/mach-mx5/cpu.c5
-rw-r--r--arch/arm/mach-mx5/mm.c6
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c2
-rw-r--r--arch/arm/mach-omap1/Kconfig8
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c10
-rw-r--r--arch/arm/mach-omap1/clock.h3
-rw-r--r--arch/arm/mach-omap1/clock_data.c53
-rw-r--r--arch/arm/mach-omap1/devices.c3
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/Makefile5
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c1
-rw-r--r--arch/arm/mach-omap2/display.c159
-rw-r--r--arch/arm/mach-omap2/display.h29
-rw-r--r--arch/arm/mach-omap2/io.h0
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c17
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c17
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c5
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c37
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c24
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.h4
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c2
-rw-r--r--arch/arm/mach-omap2/pm.c6
-rw-r--r--arch/arm/mach-omap2/smartreflex.c2
-rw-r--r--arch/arm/mach-omap2/twl-common.c11
-rw-r--r--arch/arm/mach-omap2/twl-common.h3
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c2
-rw-r--r--arch/arm/mach-pxa/gumstix.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/palm27x.h4
-rw-r--r--arch/arm/mach-pxa/palm27x.c4
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h14
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h7
-rw-r--r--arch/arm/plat-mxc/system.c3
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h2
-rw-r--r--arch/arm/plat-omap/include/plat/common.h3
-rw-r--r--arch/arm/plat-s3c24xx/cpu-freq-debugfs.c2
-rw-r--r--arch/arm/plat-s5p/sysmmu.c1
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h2
-rw-r--r--arch/arm/plat-samsung/pd.c2
-rw-r--r--arch/arm/plat-samsung/pwm.c2
-rw-r--r--arch/arm/tools/mach-types1
-rw-r--r--arch/powerpc/boot/dts/p1023rds.dts17
-rw-r--r--arch/powerpc/configs/ppc44x_defconfig2
-rw-r--r--arch/powerpc/mm/hugetlbpage.c1
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/85xx/p3060_qds.c2
-rw-r--r--arch/powerpc/sysdev/ehv_pic.c1
-rw-r--r--arch/powerpc/sysdev/fsl_lbc.c1
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c2
-rw-r--r--drivers/acpi/apei/erst.c31
-rw-r--r--drivers/crypto/mv_cesa.c12
-rw-r--r--drivers/edac/mpc85xx_edac.c2
-rw-r--r--drivers/firmware/efivars.c12
-rw-r--r--drivers/gpio/gpio-pca953x.c4
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_buf.c62
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_buf.h21
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_connector.c78
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_crtc.c76
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_crtc.h25
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.c5
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.h13
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.c83
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.h1
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.c66
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fbdev.c44
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimd.c71
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.c89
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.h28
-rw-r--r--drivers/hwmon/ad7314.c1
-rw-r--r--drivers/hwmon/ads7871.c1
-rw-r--r--drivers/hwmon/exynos4_tmu.c12
-rw-r--r--drivers/hwmon/gpio-fan.c13
-rw-r--r--drivers/hwmon/jz4740-hwmon.c12
-rw-r--r--drivers/hwmon/ntc_thermistor.c14
-rw-r--r--drivers/hwmon/s3c-hwmon.c13
-rw-r--r--drivers/hwmon/sch5627.c13
-rw-r--r--drivers/hwmon/sch5636.c13
-rw-r--r--drivers/hwmon/twl4030-madc-hwmon.c14
-rw-r--r--drivers/hwmon/ultra45_env.c13
-rw-r--r--drivers/hwmon/wm831x-hwmon.c12
-rw-r--r--drivers/hwmon/wm8350-hwmon.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c3
-rw-r--r--drivers/regulator/aat2870-regulator.c2
-rw-r--r--drivers/regulator/core.c2
-rw-r--r--drivers/regulator/twl-regulator.c46
-rw-r--r--drivers/staging/iio/industrialio-core.c19
-rw-r--r--drivers/video/da8xx-fb.c15
-rw-r--r--drivers/video/omap/dispc.c1
-rw-r--r--drivers/video/omap2/dss/dispc.c11
-rw-r--r--drivers/video/omap2/dss/hdmi.c2
-rw-r--r--drivers/video/via/share.h4
-rw-r--r--fs/ext4/inode.c2
-rw-r--r--fs/pstore/platform.c13
-rw-r--r--include/drm/exynos_drm.h9
-rw-r--r--include/linux/clocksource.h3
-rw-r--r--include/linux/pm.h229
-rw-r--r--include/linux/pstore.h4
-rw-r--r--include/video/omapdss.h7
-rw-r--r--kernel/cgroup_freezer.c11
-rw-r--r--kernel/hrtimer.c6
-rw-r--r--kernel/irq/manage.c2
-rw-r--r--kernel/irq/spurious.c4
-rw-r--r--kernel/power/hibernate.c16
-rw-r--r--kernel/time/clocksource.c58
-rw-r--r--kernel/time/timekeeping.c92
-rw-r--r--mm/percpu-vm.c17
-rw-r--r--mm/percpu.c62
-rw-r--r--mm/slub.c42
-rw-r--r--net/sunrpc/xprtsock.c3
-rw-r--r--sound/pci/cs5535audio/cs5535audio_pcm.c2
-rw-r--r--sound/pci/hda/hda_codec.c6
-rw-r--r--sound/pci/hda/hda_eld.c28
-rw-r--r--sound/pci/hda/patch_cirrus.c32
-rw-r--r--sound/pci/hda/patch_hdmi.c16
-rw-r--r--sound/pci/hda/patch_realtek.c34
-rw-r--r--sound/pci/hda/patch_sigmatel.c2
-rw-r--r--sound/pci/hda/patch_via.c76
-rw-r--r--sound/pci/lx6464es/lx_core.c23
-rw-r--r--sound/pci/lx6464es/lx_core.h3
-rw-r--r--sound/pci/rme9652/hdspm.c2
-rw-r--r--sound/soc/codecs/adau1373.c2
-rw-r--r--sound/soc/codecs/cs4271.c8
-rw-r--r--sound/soc/codecs/rt5631.c2
-rw-r--r--sound/soc/codecs/sgtl5000.c2
-rw-r--r--sound/soc/codecs/sta32x.c63
-rw-r--r--sound/soc/codecs/sta32x.h1
-rw-r--r--sound/soc/codecs/wm8731.c1
-rw-r--r--sound/soc/codecs/wm8753.c3
-rw-r--r--sound/soc/codecs/wm8962.c4
-rw-r--r--sound/soc/codecs/wm8993.c2
-rw-r--r--sound/soc/codecs/wm9081.c10
-rw-r--r--sound/soc/codecs/wm9090.c6
-rw-r--r--sound/soc/codecs/wm_hubs.c2
-rw-r--r--sound/soc/fsl/fsl_ssi.c1
165 files changed, 1821 insertions, 1021 deletions
diff --git a/Documentation/power/devices.txt b/Documentation/power/devices.txt
index 646a89e0c07d..3139fb505dce 100644
--- a/Documentation/power/devices.txt
+++ b/Documentation/power/devices.txt
@@ -123,9 +123,10 @@ please refer directly to the source code for more information about it.
123Subsystem-Level Methods 123Subsystem-Level Methods
124----------------------- 124-----------------------
125The core methods to suspend and resume devices reside in struct dev_pm_ops 125The core methods to suspend and resume devices reside in struct dev_pm_ops
126pointed to by the pm member of struct bus_type, struct device_type and 126pointed to by the ops member of struct dev_pm_domain, or by the pm member of
127struct class. They are mostly of interest to the people writing infrastructure 127struct bus_type, struct device_type and struct class. They are mostly of
128for buses, like PCI or USB, or device type and device class drivers. 128interest to the people writing infrastructure for platforms and buses, like PCI
129or USB, or device type and device class drivers.
129 130
130Bus drivers implement these methods as appropriate for the hardware and the 131Bus drivers implement these methods as appropriate for the hardware and the
131drivers using it; PCI works differently from USB, and so on. Not many people 132drivers using it; PCI works differently from USB, and so on. Not many people
@@ -139,41 +140,57 @@ sequencing in the driver model tree.
139 140
140/sys/devices/.../power/wakeup files 141/sys/devices/.../power/wakeup files
141----------------------------------- 142-----------------------------------
142All devices in the driver model have two flags to control handling of wakeup 143All device objects in the driver model contain fields that control the handling
143events (hardware signals that can force the device and/or system out of a low 144of system wakeup events (hardware signals that can force the system out of a
144power state). These flags are initialized by bus or device driver code using 145sleep state). These fields are initialized by bus or device driver code using
145device_set_wakeup_capable() and device_set_wakeup_enable(), defined in 146device_set_wakeup_capable() and device_set_wakeup_enable(), defined in
146include/linux/pm_wakeup.h. 147include/linux/pm_wakeup.h.
147 148
148The "can_wakeup" flag just records whether the device (and its driver) can 149The "power.can_wakeup" flag just records whether the device (and its driver) can
149physically support wakeup events. The device_set_wakeup_capable() routine 150physically support wakeup events. The device_set_wakeup_capable() routine
150affects this flag. The "should_wakeup" flag controls whether the device should 151affects this flag. The "power.wakeup" field is a pointer to an object of type
151try to use its wakeup mechanism. device_set_wakeup_enable() affects this flag; 152struct wakeup_source used for controlling whether or not the device should use
152for the most part drivers should not change its value. The initial value of 153its system wakeup mechanism and for notifying the PM core of system wakeup
153should_wakeup is supposed to be false for the majority of devices; the major 154events signaled by the device. This object is only present for wakeup-capable
154exceptions are power buttons, keyboards, and Ethernet adapters whose WoL 155devices (i.e. devices whose "can_wakeup" flags are set) and is created (or
155(wake-on-LAN) feature has been set up with ethtool. It should also default 156removed) by device_set_wakeup_capable().
156to true for devices that don't generate wakeup requests on their own but merely
157forward wakeup requests from one bus to another (like PCI bridges).
158 157
159Whether or not a device is capable of issuing wakeup events is a hardware 158Whether or not a device is capable of issuing wakeup events is a hardware
160matter, and the kernel is responsible for keeping track of it. By contrast, 159matter, and the kernel is responsible for keeping track of it. By contrast,
161whether or not a wakeup-capable device should issue wakeup events is a policy 160whether or not a wakeup-capable device should issue wakeup events is a policy
162decision, and it is managed by user space through a sysfs attribute: the 161decision, and it is managed by user space through a sysfs attribute: the
163power/wakeup file. User space can write the strings "enabled" or "disabled" to 162"power/wakeup" file. User space can write the strings "enabled" or "disabled"
164set or clear the "should_wakeup" flag, respectively. This file is only present 163to it to indicate whether or not, respectively, the device is supposed to signal
165for wakeup-capable devices (i.e. devices whose "can_wakeup" flags are set) 164system wakeup. This file is only present if the "power.wakeup" object exists
166and is created (or removed) by device_set_wakeup_capable(). Reads from the 165for the given device and is created (or removed) along with that object, by
167file will return the corresponding string. 166device_set_wakeup_capable(). Reads from the file will return the corresponding
168 167string.
169The device_may_wakeup() routine returns true only if both flags are set. 168
169The "power/wakeup" file is supposed to contain the "disabled" string initially
170for the majority of devices; the major exceptions are power buttons, keyboards,
171and Ethernet adapters whose WoL (wake-on-LAN) feature has been set up with
172ethtool. It should also default to "enabled" for devices that don't generate
173wakeup requests on their own but merely forward wakeup requests from one bus to
174another (like PCI Express ports).
175
176The device_may_wakeup() routine returns true only if the "power.wakeup" object
177exists and the corresponding "power/wakeup" file contains the string "enabled".
170This information is used by subsystems, like the PCI bus type code, to see 178This information is used by subsystems, like the PCI bus type code, to see
171whether or not to enable the devices' wakeup mechanisms. If device wakeup 179whether or not to enable the devices' wakeup mechanisms. If device wakeup
172mechanisms are enabled or disabled directly by drivers, they also should use 180mechanisms are enabled or disabled directly by drivers, they also should use
173device_may_wakeup() to decide what to do during a system sleep transition. 181device_may_wakeup() to decide what to do during a system sleep transition.
174However for runtime power management, wakeup events should be enabled whenever 182Device drivers, however, are not supposed to call device_set_wakeup_enable()
175the device and driver both support them, regardless of the should_wakeup flag. 183directly in any case.
176 184
185It ought to be noted that system wakeup is conceptually different from "remote
186wakeup" used by runtime power management, although it may be supported by the
187same physical mechanism. Remote wakeup is a feature allowing devices in
188low-power states to trigger specific interrupts to signal conditions in which
189they should be put into the full-power state. Those interrupts may or may not
190be used to signal system wakeup events, depending on the hardware design. On
191some systems it is impossible to trigger them from system sleep states. In any
192case, remote wakeup should always be enabled for runtime power management for
193all devices and drivers that support it.
177 194
178/sys/devices/.../power/control files 195/sys/devices/.../power/control files
179------------------------------------ 196------------------------------------
@@ -249,20 +266,31 @@ for every device before the next phase begins. Not all busses or classes
249support all these callbacks and not all drivers use all the callbacks. The 266support all these callbacks and not all drivers use all the callbacks. The
250various phases always run after tasks have been frozen and before they are 267various phases always run after tasks have been frozen and before they are
251unfrozen. Furthermore, the *_noirq phases run at a time when IRQ handlers have 268unfrozen. Furthermore, the *_noirq phases run at a time when IRQ handlers have
252been disabled (except for those marked with the IRQ_WAKEUP flag). 269been disabled (except for those marked with the IRQF_NO_SUSPEND flag).
253 270
254All phases use bus, type, or class callbacks (that is, methods defined in 271All phases use PM domain, bus, type, or class callbacks (that is, methods
255dev->bus->pm, dev->type->pm, or dev->class->pm). These callbacks are mutually 272defined in dev->pm_domain->ops, dev->bus->pm, dev->type->pm, or dev->class->pm).
256exclusive, so if the device type provides a struct dev_pm_ops object pointed to 273These callbacks are regarded by the PM core as mutually exclusive. Moreover,
257by its pm field (i.e. both dev->type and dev->type->pm are defined), the 274PM domain callbacks always take precedence over bus, type and class callbacks,
258callbacks included in that object (i.e. dev->type->pm) will be used. Otherwise, 275while type callbacks take precedence over bus and class callbacks, and class
259if the class provides a struct dev_pm_ops object pointed to by its pm field 276callbacks take precedence over bus callbacks. To be precise, the following
260(i.e. both dev->class and dev->class->pm are defined), the PM core will use the 277rules are used to determine which callback to execute in the given phase:
261callbacks from that object (i.e. dev->class->pm). Finally, if the pm fields of 278
262both the device type and class objects are NULL (or those objects do not exist), 279 1. If dev->pm_domain is present, the PM core will attempt to execute the
263the callbacks provided by the bus (that is, the callbacks from dev->bus->pm) 280 callback included in dev->pm_domain->ops. If that callback is not
264will be used (this allows device types to override callbacks provided by bus 281 present, no action will be carried out for the given device.
265types or classes if necessary). 282
283 2. Otherwise, if both dev->type and dev->type->pm are present, the callback
284 included in dev->type->pm will be executed.
285
286 3. Otherwise, if both dev->class and dev->class->pm are present, the
287 callback included in dev->class->pm will be executed.
288
289 4. Otherwise, if both dev->bus and dev->bus->pm are present, the callback
290 included in dev->bus->pm will be executed.
291
292This allows PM domains and device types to override callbacks provided by bus
293types or device classes if necessary.
266 294
267These callbacks may in turn invoke device- or driver-specific methods stored in 295These callbacks may in turn invoke device- or driver-specific methods stored in
268dev->driver->pm, but they don't have to. 296dev->driver->pm, but they don't have to.
@@ -283,9 +311,8 @@ When the system goes into the standby or memory sleep state, the phases are:
283 311
284 After the prepare callback method returns, no new children may be 312 After the prepare callback method returns, no new children may be
285 registered below the device. The method may also prepare the device or 313 registered below the device. The method may also prepare the device or
286 driver in some way for the upcoming system power transition (for 314 driver in some way for the upcoming system power transition, but it
287 example, by allocating additional memory required for this purpose), but 315 should not put the device into a low-power state.
288 it should not put the device into a low-power state.
289 316
290 2. The suspend methods should quiesce the device to stop it from performing 317 2. The suspend methods should quiesce the device to stop it from performing
291 I/O. They also may save the device registers and put it into the 318 I/O. They also may save the device registers and put it into the
diff --git a/Documentation/power/runtime_pm.txt b/Documentation/power/runtime_pm.txt
index 5336149f831b..c2ae8bf77d46 100644
--- a/Documentation/power/runtime_pm.txt
+++ b/Documentation/power/runtime_pm.txt
@@ -44,25 +44,33 @@ struct dev_pm_ops {
44}; 44};
45 45
46The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks 46The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks
47are executed by the PM core for either the power domain, or the device type 47are executed by the PM core for the device's subsystem that may be either of
48(if the device power domain's struct dev_pm_ops does not exist), or the class 48the following:
49(if the device power domain's and type's struct dev_pm_ops object does not 49
50exist), or the bus type (if the device power domain's, type's and class' 50 1. PM domain of the device, if the device's PM domain object, dev->pm_domain,
51struct dev_pm_ops objects do not exist) of the given device, so the priority 51 is present.
52order of callbacks from high to low is that power domain callbacks, device 52
53type callbacks, class callbacks and bus type callbacks, and the high priority 53 2. Device type of the device, if both dev->type and dev->type->pm are present.
54one will take precedence over low priority one. The bus type, device type and 54
55class callbacks are referred to as subsystem-level callbacks in what follows, 55 3. Device class of the device, if both dev->class and dev->class->pm are
56and generally speaking, the power domain callbacks are used for representing 56 present.
57power domains within a SoC. 57
58 4. Bus type of the device, if both dev->bus and dev->bus->pm are present.
59
60The PM core always checks which callback to use in the order given above, so the
61priority order of callbacks from high to low is: PM domain, device type, class
62and bus type. Moreover, the high-priority one will always take precedence over
63a low-priority one. The PM domain, bus type, device type and class callbacks
64are referred to as subsystem-level callbacks in what follows.
58 65
59By default, the callbacks are always invoked in process context with interrupts 66By default, the callbacks are always invoked in process context with interrupts
60enabled. However, subsystems can use the pm_runtime_irq_safe() helper function 67enabled. However, subsystems can use the pm_runtime_irq_safe() helper function
61to tell the PM core that a device's ->runtime_suspend() and ->runtime_resume() 68to tell the PM core that their ->runtime_suspend(), ->runtime_resume() and
62callbacks should be invoked in atomic context with interrupts disabled. 69->runtime_idle() callbacks may be invoked in atomic context with interrupts
63This implies that these callback routines must not block or sleep, but it also 70disabled for a given device. This implies that the callback routines in
64means that the synchronous helper functions listed at the end of Section 4 can 71question must not block or sleep, but it also means that the synchronous helper
65be used within an interrupt handler or in an atomic context. 72functions listed at the end of Section 4 may be used for that device within an
73interrupt handler or generally in an atomic context.
66 74
67The subsystem-level suspend callback is _entirely_ _responsible_ for handling 75The subsystem-level suspend callback is _entirely_ _responsible_ for handling
68the suspend of the device as appropriate, which may, but need not include 76the suspend of the device as appropriate, which may, but need not include
diff --git a/MAINTAINERS b/MAINTAINERS
index 3523ab000f1f..447560284996 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -789,6 +789,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
789S: Maintained 789S: Maintained
790T: git git://git.pengutronix.de/git/imx/linux-2.6.git 790T: git git://git.pengutronix.de/git/imx/linux-2.6.git
791F: arch/arm/mach-mx*/ 791F: arch/arm/mach-mx*/
792F: arch/arm/mach-imx/
792F: arch/arm/plat-mxc/ 793F: arch/arm/plat-mxc/
793 794
794ARM/FREESCALE IMX51 795ARM/FREESCALE IMX51
@@ -804,6 +805,13 @@ S: Maintained
804T: git git://git.linaro.org/people/shawnguo/linux-2.6.git 805T: git git://git.linaro.org/people/shawnguo/linux-2.6.git
805F: arch/arm/mach-imx/*imx6* 806F: arch/arm/mach-imx/*imx6*
806 807
808ARM/FREESCALE MXS ARM ARCHITECTURE
809M: Shawn Guo <shawn.guo@linaro.org>
810L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
811S: Maintained
812T: git git://git.linaro.org/people/shawnguo/linux-2.6.git
813F: arch/arm/mach-mxs/
814
807ARM/GLOMATION GESBC9312SX MACHINE SUPPORT 815ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
808M: Lennert Buytenhek <kernel@wantstofly.org> 816M: Lennert Buytenhek <kernel@wantstofly.org>
809L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 817L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -5667,7 +5675,6 @@ F: drivers/media/video/*7146*
5667F: include/media/*7146* 5675F: include/media/*7146*
5668 5676
5669SAMSUNG AUDIO (ASoC) DRIVERS 5677SAMSUNG AUDIO (ASoC) DRIVERS
5670M: Jassi Brar <jassisinghbrar@gmail.com>
5671M: Sangbeom Kim <sbkim73@samsung.com> 5678M: Sangbeom Kim <sbkim73@samsung.com>
5672L: alsa-devel@alsa-project.org (moderated for non-subscribers) 5679L: alsa-devel@alsa-project.org (moderated for non-subscribers)
5673S: Supported 5680S: Supported
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9_defconfig
index ffb1edd93363..8826eb218e73 100644
--- a/arch/arm/configs/at91cap9adk_defconfig
+++ b/arch/arm/configs/at91cap9_defconfig
@@ -38,7 +38,6 @@ CONFIG_IP_PNP_RARP=y
38# CONFIG_IPV6 is not set 38# CONFIG_IPV6 is not set
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40CONFIG_MTD=y 40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CMDLINE_PARTS=y 41CONFIG_MTD_CMDLINE_PARTS=y
43CONFIG_MTD_CHAR=y 42CONFIG_MTD_CHAR=y
44CONFIG_MTD_BLOCK=y 43CONFIG_MTD_BLOCK=y
@@ -52,16 +51,12 @@ CONFIG_MTD_NAND_ATMEL=y
52CONFIG_BLK_DEV_LOOP=y 51CONFIG_BLK_DEV_LOOP=y
53CONFIG_BLK_DEV_RAM=y 52CONFIG_BLK_DEV_RAM=y
54CONFIG_BLK_DEV_RAM_SIZE=8192 53CONFIG_BLK_DEV_RAM_SIZE=8192
55CONFIG_ATMEL_SSC=y
56CONFIG_SCSI=y 54CONFIG_SCSI=y
57CONFIG_BLK_DEV_SD=y 55CONFIG_BLK_DEV_SD=y
58CONFIG_SCSI_MULTI_LUN=y 56CONFIG_SCSI_MULTI_LUN=y
59CONFIG_NETDEVICES=y 57CONFIG_NETDEVICES=y
60CONFIG_NET_ETHERNET=y
61CONFIG_MII=y 58CONFIG_MII=y
62CONFIG_MACB=y 59CONFIG_MACB=y
63# CONFIG_NETDEV_1000 is not set
64# CONFIG_NETDEV_10000 is not set
65# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 60# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
66CONFIG_INPUT_EVDEV=y 61CONFIG_INPUT_EVDEV=y
67# CONFIG_INPUT_KEYBOARD is not set 62# CONFIG_INPUT_KEYBOARD is not set
@@ -81,7 +76,6 @@ CONFIG_WATCHDOG=y
81CONFIG_WATCHDOG_NOWAYOUT=y 76CONFIG_WATCHDOG_NOWAYOUT=y
82CONFIG_FB=y 77CONFIG_FB=y
83CONFIG_FB_ATMEL=y 78CONFIG_FB_ATMEL=y
84# CONFIG_VGA_CONSOLE is not set
85CONFIG_LOGO=y 79CONFIG_LOGO=y
86# CONFIG_LOGO_LINUX_MONO is not set 80# CONFIG_LOGO_LINUX_MONO is not set
87# CONFIG_LOGO_LINUX_CLUT224 is not set 81# CONFIG_LOGO_LINUX_CLUT224 is not set
@@ -99,7 +93,6 @@ CONFIG_MMC_AT91=m
99CONFIG_RTC_CLASS=y 93CONFIG_RTC_CLASS=y
100CONFIG_RTC_DRV_AT91SAM9=y 94CONFIG_RTC_DRV_AT91SAM9=y
101CONFIG_EXT2_FS=y 95CONFIG_EXT2_FS=y
102CONFIG_INOTIFY=y
103CONFIG_VFAT_FS=y 96CONFIG_VFAT_FS=y
104CONFIG_TMPFS=y 97CONFIG_TMPFS=y
105CONFIG_JFFS2_FS=y 98CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
index 38cb7c985426..bbe4e1a1f5d8 100644
--- a/arch/arm/configs/at91rm9200_defconfig
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
5CONFIG_IKCONFIG=y 5CONFIG_IKCONFIG=y
6CONFIG_IKCONFIG_PROC=y 6CONFIG_IKCONFIG_PROC=y
7CONFIG_LOG_BUF_SHIFT=14 7CONFIG_LOG_BUF_SHIFT=14
8CONFIG_SYSFS_DEPRECATED_V2=y
9CONFIG_BLK_DEV_INITRD=y 8CONFIG_BLK_DEV_INITRD=y
10CONFIG_MODULES=y 9CONFIG_MODULES=y
11CONFIG_MODULE_FORCE_LOAD=y 10CONFIG_MODULE_FORCE_LOAD=y
@@ -56,7 +55,6 @@ CONFIG_IP_PNP=y
56CONFIG_IP_PNP_DHCP=y 55CONFIG_IP_PNP_DHCP=y
57CONFIG_IP_PNP_BOOTP=y 56CONFIG_IP_PNP_BOOTP=y
58CONFIG_NET_IPIP=m 57CONFIG_NET_IPIP=m
59CONFIG_NET_IPGRE=m
60CONFIG_INET_AH=m 58CONFIG_INET_AH=m
61CONFIG_INET_ESP=m 59CONFIG_INET_ESP=m
62CONFIG_INET_IPCOMP=m 60CONFIG_INET_IPCOMP=m
@@ -75,18 +73,8 @@ CONFIG_IPV6_TUNNEL=m
75CONFIG_BRIDGE=m 73CONFIG_BRIDGE=m
76CONFIG_VLAN_8021Q=m 74CONFIG_VLAN_8021Q=m
77CONFIG_BT=m 75CONFIG_BT=m
78CONFIG_BT_L2CAP=m
79CONFIG_BT_SCO=m
80CONFIG_BT_RFCOMM=m
81CONFIG_BT_RFCOMM_TTY=y
82CONFIG_BT_BNEP=m
83CONFIG_BT_BNEP_MC_FILTER=y
84CONFIG_BT_BNEP_PROTO_FILTER=y
85CONFIG_BT_HIDP=m
86CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 76CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
87CONFIG_MTD=y 77CONFIG_MTD=y
88CONFIG_MTD_CONCAT=y
89CONFIG_MTD_PARTITIONS=y
90CONFIG_MTD_CMDLINE_PARTS=y 78CONFIG_MTD_CMDLINE_PARTS=y
91CONFIG_MTD_AFS_PARTS=y 79CONFIG_MTD_AFS_PARTS=y
92CONFIG_MTD_CHAR=y 80CONFIG_MTD_CHAR=y
@@ -108,8 +96,6 @@ CONFIG_BLK_DEV_LOOP=y
108CONFIG_BLK_DEV_NBD=y 96CONFIG_BLK_DEV_NBD=y
109CONFIG_BLK_DEV_RAM=y 97CONFIG_BLK_DEV_RAM=y
110CONFIG_BLK_DEV_RAM_SIZE=8192 98CONFIG_BLK_DEV_RAM_SIZE=8192
111CONFIG_ATMEL_TCLIB=y
112CONFIG_EEPROM_LEGACY=m
113CONFIG_SCSI=y 99CONFIG_SCSI=y
114CONFIG_BLK_DEV_SD=y 100CONFIG_BLK_DEV_SD=y
115CONFIG_BLK_DEV_SR=m 101CONFIG_BLK_DEV_SR=m
@@ -119,14 +105,23 @@ CONFIG_SCSI_MULTI_LUN=y
119# CONFIG_SCSI_LOWLEVEL is not set 105# CONFIG_SCSI_LOWLEVEL is not set
120CONFIG_NETDEVICES=y 106CONFIG_NETDEVICES=y
121CONFIG_TUN=m 107CONFIG_TUN=m
108CONFIG_ARM_AT91_ETHER=y
122CONFIG_PHYLIB=y 109CONFIG_PHYLIB=y
123CONFIG_DAVICOM_PHY=y 110CONFIG_DAVICOM_PHY=y
124CONFIG_SMSC_PHY=y 111CONFIG_SMSC_PHY=y
125CONFIG_MICREL_PHY=y 112CONFIG_MICREL_PHY=y
126CONFIG_NET_ETHERNET=y 113CONFIG_PPP=y
127CONFIG_ARM_AT91_ETHER=y 114CONFIG_PPP_BSDCOMP=y
128# CONFIG_NETDEV_1000 is not set 115CONFIG_PPP_DEFLATE=y
129# CONFIG_NETDEV_10000 is not set 116CONFIG_PPP_FILTER=y
117CONFIG_PPP_MPPE=m
118CONFIG_PPP_MULTILINK=y
119CONFIG_PPPOE=m
120CONFIG_PPP_ASYNC=y
121CONFIG_SLIP=m
122CONFIG_SLIP_COMPRESSED=y
123CONFIG_SLIP_SMART=y
124CONFIG_SLIP_MODE_SLIP6=y
130CONFIG_USB_CATC=m 125CONFIG_USB_CATC=m
131CONFIG_USB_KAWETH=m 126CONFIG_USB_KAWETH=m
132CONFIG_USB_PEGASUS=m 127CONFIG_USB_PEGASUS=m
@@ -139,18 +134,6 @@ CONFIG_USB_NET_RNDIS_HOST=m
139CONFIG_USB_ALI_M5632=y 134CONFIG_USB_ALI_M5632=y
140CONFIG_USB_AN2720=y 135CONFIG_USB_AN2720=y
141CONFIG_USB_EPSON2888=y 136CONFIG_USB_EPSON2888=y
142CONFIG_PPP=y
143CONFIG_PPP_MULTILINK=y
144CONFIG_PPP_FILTER=y
145CONFIG_PPP_ASYNC=y
146CONFIG_PPP_DEFLATE=y
147CONFIG_PPP_BSDCOMP=y
148CONFIG_PPP_MPPE=m
149CONFIG_PPPOE=m
150CONFIG_SLIP=m
151CONFIG_SLIP_COMPRESSED=y
152CONFIG_SLIP_SMART=y
153CONFIG_SLIP_MODE_SLIP6=y
154# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 137# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
155CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 138CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
156CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 139CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
@@ -158,9 +141,9 @@ CONFIG_INPUT_EVDEV=y
158CONFIG_KEYBOARD_GPIO=y 141CONFIG_KEYBOARD_GPIO=y
159# CONFIG_INPUT_MOUSE is not set 142# CONFIG_INPUT_MOUSE is not set
160CONFIG_INPUT_TOUCHSCREEN=y 143CONFIG_INPUT_TOUCHSCREEN=y
144CONFIG_LEGACY_PTY_COUNT=32
161CONFIG_SERIAL_ATMEL=y 145CONFIG_SERIAL_ATMEL=y
162CONFIG_SERIAL_ATMEL_CONSOLE=y 146CONFIG_SERIAL_ATMEL_CONSOLE=y
163CONFIG_LEGACY_PTY_COUNT=32
164CONFIG_HW_RANDOM=y 147CONFIG_HW_RANDOM=y
165CONFIG_I2C=y 148CONFIG_I2C=y
166CONFIG_I2C_CHARDEV=y 149CONFIG_I2C_CHARDEV=y
@@ -290,7 +273,6 @@ CONFIG_NFS_V3_ACL=y
290CONFIG_NFS_V4=y 273CONFIG_NFS_V4=y
291CONFIG_ROOT_NFS=y 274CONFIG_ROOT_NFS=y
292CONFIG_NFSD=y 275CONFIG_NFSD=y
293CONFIG_SMB_FS=m
294CONFIG_CIFS=m 276CONFIG_CIFS=m
295CONFIG_PARTITION_ADVANCED=y 277CONFIG_PARTITION_ADVANCED=y
296CONFIG_MAC_PARTITION=y 278CONFIG_MAC_PARTITION=y
@@ -335,7 +317,6 @@ CONFIG_NLS_UTF8=y
335CONFIG_MAGIC_SYSRQ=y 317CONFIG_MAGIC_SYSRQ=y
336CONFIG_DEBUG_FS=y 318CONFIG_DEBUG_FS=y
337CONFIG_DEBUG_KERNEL=y 319CONFIG_DEBUG_KERNEL=y
338# CONFIG_RCU_CPU_STALL_DETECTOR is not set
339# CONFIG_FTRACE is not set 320# CONFIG_FTRACE is not set
340CONFIG_CRYPTO_PCBC=y 321CONFIG_CRYPTO_PCBC=y
341CONFIG_CRYPTO_SHA1=y 322CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260_defconfig
index f8a9226413bf..505b3765f87e 100644
--- a/arch/arm/configs/at91sam9260ek_defconfig
+++ b/arch/arm/configs/at91sam9260_defconfig
@@ -12,11 +12,23 @@ CONFIG_MODULE_UNLOAD=y
12# CONFIG_IOSCHED_CFQ is not set 12# CONFIG_IOSCHED_CFQ is not set
13CONFIG_ARCH_AT91=y 13CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9260=y 14CONFIG_ARCH_AT91SAM9260=y
15CONFIG_ARCH_AT91SAM9260_SAM9XE=y
15CONFIG_MACH_AT91SAM9260EK=y 16CONFIG_MACH_AT91SAM9260EK=y
17CONFIG_MACH_CAM60=y
18CONFIG_MACH_SAM9_L9260=y
19CONFIG_MACH_AFEB9260=y
20CONFIG_MACH_USB_A9260=y
21CONFIG_MACH_QIL_A9260=y
22CONFIG_MACH_CPU9260=y
23CONFIG_MACH_FLEXIBITY=y
24CONFIG_MACH_SNAPPER_9260=y
25CONFIG_MACH_AT91SAM_DT=y
16CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 26CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
17# CONFIG_ARM_THUMB is not set 27# CONFIG_ARM_THUMB is not set
18CONFIG_ZBOOT_ROM_TEXT=0x0 28CONFIG_ZBOOT_ROM_TEXT=0x0
19CONFIG_ZBOOT_ROM_BSS=0x0 29CONFIG_ZBOOT_ROM_BSS=0x0
30CONFIG_ARM_APPENDED_DTB=y
31CONFIG_ARM_ATAG_DTB_COMPAT=y
20CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" 32CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
21CONFIG_FPE_NWFPE=y 33CONFIG_FPE_NWFPE=y
22CONFIG_NET=y 34CONFIG_NET=y
@@ -33,12 +45,10 @@ CONFIG_IP_PNP_BOOTP=y
33CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 45CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
34CONFIG_BLK_DEV_RAM=y 46CONFIG_BLK_DEV_RAM=y
35CONFIG_BLK_DEV_RAM_SIZE=8192 47CONFIG_BLK_DEV_RAM_SIZE=8192
36CONFIG_ATMEL_SSC=y
37CONFIG_SCSI=y 48CONFIG_SCSI=y
38CONFIG_BLK_DEV_SD=y 49CONFIG_BLK_DEV_SD=y
39CONFIG_SCSI_MULTI_LUN=y 50CONFIG_SCSI_MULTI_LUN=y
40CONFIG_NETDEVICES=y 51CONFIG_NETDEVICES=y
41CONFIG_NET_ETHERNET=y
42CONFIG_MII=y 52CONFIG_MII=y
43CONFIG_MACB=y 53CONFIG_MACB=y
44# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 54# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -55,7 +65,6 @@ CONFIG_I2C_GPIO=y
55CONFIG_WATCHDOG=y 65CONFIG_WATCHDOG=y
56CONFIG_WATCHDOG_NOWAYOUT=y 66CONFIG_WATCHDOG_NOWAYOUT=y
57CONFIG_AT91SAM9X_WATCHDOG=y 67CONFIG_AT91SAM9X_WATCHDOG=y
58# CONFIG_VGA_CONSOLE is not set
59# CONFIG_USB_HID is not set 68# CONFIG_USB_HID is not set
60CONFIG_USB=y 69CONFIG_USB=y
61CONFIG_USB_DEVICEFS=y 70CONFIG_USB_DEVICEFS=y
@@ -71,7 +80,6 @@ CONFIG_USB_G_SERIAL=m
71CONFIG_RTC_CLASS=y 80CONFIG_RTC_CLASS=y
72CONFIG_RTC_DRV_AT91SAM9=y 81CONFIG_RTC_DRV_AT91SAM9=y
73CONFIG_EXT2_FS=y 82CONFIG_EXT2_FS=y
74CONFIG_INOTIFY=y
75CONFIG_VFAT_FS=y 83CONFIG_VFAT_FS=y
76CONFIG_TMPFS=y 84CONFIG_TMPFS=y
77CONFIG_CRAMFS=y 85CONFIG_CRAMFS=y
diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index 9e90e6d79297..9123568d9a8d 100644
--- a/arch/arm/configs/at91sam9g20ek_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -14,6 +14,15 @@ CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9G20=y 14CONFIG_ARCH_AT91SAM9G20=y
15CONFIG_MACH_AT91SAM9G20EK=y 15CONFIG_MACH_AT91SAM9G20EK=y
16CONFIG_MACH_AT91SAM9G20EK_2MMC=y 16CONFIG_MACH_AT91SAM9G20EK_2MMC=y
17CONFIG_MACH_CPU9G20=y
18CONFIG_MACH_ACMENETUSFOXG20=y
19CONFIG_MACH_PORTUXG20=y
20CONFIG_MACH_STAMP9G20=y
21CONFIG_MACH_PCONTROL_G20=y
22CONFIG_MACH_GSIA18S=y
23CONFIG_MACH_USB_A9G20=y
24CONFIG_MACH_SNAPPER_9260=y
25CONFIG_MACH_AT91SAM_DT=y
17CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 26CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
18# CONFIG_ARM_THUMB is not set 27# CONFIG_ARM_THUMB is not set
19CONFIG_AEABI=y 28CONFIG_AEABI=y
@@ -21,9 +30,10 @@ CONFIG_LEDS=y
21CONFIG_LEDS_CPU=y 30CONFIG_LEDS_CPU=y
22CONFIG_ZBOOT_ROM_TEXT=0x0 31CONFIG_ZBOOT_ROM_TEXT=0x0
23CONFIG_ZBOOT_ROM_BSS=0x0 32CONFIG_ZBOOT_ROM_BSS=0x0
33CONFIG_ARM_APPENDED_DTB=y
34CONFIG_ARM_ATAG_DTB_COMPAT=y
24CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" 35CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
25CONFIG_FPE_NWFPE=y 36CONFIG_FPE_NWFPE=y
26CONFIG_PM=y
27CONFIG_NET=y 37CONFIG_NET=y
28CONFIG_PACKET=y 38CONFIG_PACKET=y
29CONFIG_UNIX=y 39CONFIG_UNIX=y
@@ -37,8 +47,6 @@ CONFIG_IP_PNP_BOOTP=y
37# CONFIG_IPV6 is not set 47# CONFIG_IPV6 is not set
38CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 48CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
39CONFIG_MTD=y 49CONFIG_MTD=y
40CONFIG_MTD_CONCAT=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CMDLINE_PARTS=y 50CONFIG_MTD_CMDLINE_PARTS=y
43CONFIG_MTD_CHAR=y 51CONFIG_MTD_CHAR=y
44CONFIG_MTD_BLOCK=y 52CONFIG_MTD_BLOCK=y
@@ -48,17 +56,13 @@ CONFIG_MTD_NAND_ATMEL=y
48CONFIG_BLK_DEV_LOOP=y 56CONFIG_BLK_DEV_LOOP=y
49CONFIG_BLK_DEV_RAM=y 57CONFIG_BLK_DEV_RAM=y
50CONFIG_BLK_DEV_RAM_SIZE=8192 58CONFIG_BLK_DEV_RAM_SIZE=8192
51CONFIG_ATMEL_SSC=y
52CONFIG_SCSI=y 59CONFIG_SCSI=y
53CONFIG_BLK_DEV_SD=y 60CONFIG_BLK_DEV_SD=y
54CONFIG_SCSI_MULTI_LUN=y 61CONFIG_SCSI_MULTI_LUN=y
55# CONFIG_SCSI_LOWLEVEL is not set 62# CONFIG_SCSI_LOWLEVEL is not set
56CONFIG_NETDEVICES=y 63CONFIG_NETDEVICES=y
57CONFIG_NET_ETHERNET=y
58CONFIG_MII=y 64CONFIG_MII=y
59CONFIG_MACB=y 65CONFIG_MACB=y
60# CONFIG_NETDEV_1000 is not set
61# CONFIG_NETDEV_10000 is not set
62# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 66# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
63CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 67CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
64CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 68CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
@@ -66,15 +70,14 @@ CONFIG_INPUT_EVDEV=y
66# CONFIG_KEYBOARD_ATKBD is not set 70# CONFIG_KEYBOARD_ATKBD is not set
67CONFIG_KEYBOARD_GPIO=y 71CONFIG_KEYBOARD_GPIO=y
68# CONFIG_INPUT_MOUSE is not set 72# CONFIG_INPUT_MOUSE is not set
73CONFIG_LEGACY_PTY_COUNT=16
69CONFIG_SERIAL_ATMEL=y 74CONFIG_SERIAL_ATMEL=y
70CONFIG_SERIAL_ATMEL_CONSOLE=y 75CONFIG_SERIAL_ATMEL_CONSOLE=y
71CONFIG_LEGACY_PTY_COUNT=16
72CONFIG_HW_RANDOM=y 76CONFIG_HW_RANDOM=y
73CONFIG_SPI=y 77CONFIG_SPI=y
74CONFIG_SPI_ATMEL=y 78CONFIG_SPI_ATMEL=y
75CONFIG_SPI_SPIDEV=y 79CONFIG_SPI_SPIDEV=y
76# CONFIG_HWMON is not set 80# CONFIG_HWMON is not set
77# CONFIG_VGA_CONSOLE is not set
78CONFIG_SOUND=y 81CONFIG_SOUND=y
79CONFIG_SND=y 82CONFIG_SND=y
80CONFIG_SND_SEQUENCER=y 83CONFIG_SND_SEQUENCER=y
@@ -82,7 +85,6 @@ CONFIG_SND_MIXER_OSS=y
82CONFIG_SND_PCM_OSS=y 85CONFIG_SND_PCM_OSS=y
83CONFIG_SND_SEQUENCER_OSS=y 86CONFIG_SND_SEQUENCER_OSS=y
84# CONFIG_SND_VERBOSE_PROCFS is not set 87# CONFIG_SND_VERBOSE_PROCFS is not set
85CONFIG_SND_AT73C213=y
86CONFIG_USB=y 88CONFIG_USB=y
87CONFIG_USB_DEVICEFS=y 89CONFIG_USB_DEVICEFS=y
88# CONFIG_USB_DEVICE_CLASS is not set 90# CONFIG_USB_DEVICE_CLASS is not set
@@ -105,7 +107,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
105CONFIG_RTC_CLASS=y 107CONFIG_RTC_CLASS=y
106CONFIG_RTC_DRV_AT91SAM9=y 108CONFIG_RTC_DRV_AT91SAM9=y
107CONFIG_EXT2_FS=y 109CONFIG_EXT2_FS=y
108CONFIG_INOTIFY=y
109CONFIG_MSDOS_FS=y 110CONFIG_MSDOS_FS=y
110CONFIG_VFAT_FS=y 111CONFIG_VFAT_FS=y
111CONFIG_TMPFS=y 112CONFIG_TMPFS=y
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
index c5876d244f4b..606d48f3b8f8 100644
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -18,6 +18,7 @@ CONFIG_MODULE_UNLOAD=y
18CONFIG_ARCH_AT91=y 18CONFIG_ARCH_AT91=y
19CONFIG_ARCH_AT91SAM9G45=y 19CONFIG_ARCH_AT91SAM9G45=y
20CONFIG_MACH_AT91SAM9M10G45EK=y 20CONFIG_MACH_AT91SAM9M10G45EK=y
21CONFIG_MACH_AT91SAM_DT=y
21CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 22CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
22CONFIG_AT91_SLOW_CLOCK=y 23CONFIG_AT91_SLOW_CLOCK=y
23CONFIG_AEABI=y 24CONFIG_AEABI=y
@@ -73,11 +74,8 @@ CONFIG_SCSI_MULTI_LUN=y
73# CONFIG_SCSI_LOWLEVEL is not set 74# CONFIG_SCSI_LOWLEVEL is not set
74CONFIG_NETDEVICES=y 75CONFIG_NETDEVICES=y
75CONFIG_MII=y 76CONFIG_MII=y
76CONFIG_DAVICOM_PHY=y
77CONFIG_NET_ETHERNET=y
78CONFIG_MACB=y 77CONFIG_MACB=y
79# CONFIG_NETDEV_1000 is not set 78CONFIG_DAVICOM_PHY=y
80# CONFIG_NETDEV_10000 is not set
81CONFIG_LIBERTAS_THINFIRM=m 79CONFIG_LIBERTAS_THINFIRM=m
82CONFIG_LIBERTAS_THINFIRM_USB=m 80CONFIG_LIBERTAS_THINFIRM_USB=m
83CONFIG_AT76C50X_USB=m 81CONFIG_AT76C50X_USB=m
@@ -131,7 +129,6 @@ CONFIG_I2C_GPIO=y
131CONFIG_SPI=y 129CONFIG_SPI=y
132CONFIG_SPI_ATMEL=y 130CONFIG_SPI_ATMEL=y
133# CONFIG_HWMON is not set 131# CONFIG_HWMON is not set
134# CONFIG_MFD_SUPPORT is not set
135CONFIG_FB=y 132CONFIG_FB=y
136CONFIG_FB_ATMEL=y 133CONFIG_FB_ATMEL=y
137CONFIG_FB_UDL=m 134CONFIG_FB_UDL=m
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rl_defconfig
index 75621e4d03fc..ad562ee64209 100644
--- a/arch/arm/configs/at91sam9rlek_defconfig
+++ b/arch/arm/configs/at91sam9rl_defconfig
@@ -23,8 +23,6 @@ CONFIG_NET=y
23CONFIG_UNIX=y 23CONFIG_UNIX=y
24CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 24CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
25CONFIG_MTD=y 25CONFIG_MTD=y
26CONFIG_MTD_CONCAT=y
27CONFIG_MTD_PARTITIONS=y
28CONFIG_MTD_CMDLINE_PARTS=y 26CONFIG_MTD_CMDLINE_PARTS=y
29CONFIG_MTD_CHAR=y 27CONFIG_MTD_CHAR=y
30CONFIG_MTD_BLOCK=y 28CONFIG_MTD_BLOCK=y
@@ -35,7 +33,6 @@ CONFIG_BLK_DEV_LOOP=y
35CONFIG_BLK_DEV_RAM=y 33CONFIG_BLK_DEV_RAM=y
36CONFIG_BLK_DEV_RAM_COUNT=4 34CONFIG_BLK_DEV_RAM_COUNT=4
37CONFIG_BLK_DEV_RAM_SIZE=24576 35CONFIG_BLK_DEV_RAM_SIZE=24576
38CONFIG_ATMEL_SSC=y
39CONFIG_SCSI=y 36CONFIG_SCSI=y
40CONFIG_BLK_DEV_SD=y 37CONFIG_BLK_DEV_SD=y
41CONFIG_SCSI_MULTI_LUN=y 38CONFIG_SCSI_MULTI_LUN=y
@@ -62,13 +59,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
62CONFIG_AT91SAM9X_WATCHDOG=y 59CONFIG_AT91SAM9X_WATCHDOG=y
63CONFIG_FB=y 60CONFIG_FB=y
64CONFIG_FB_ATMEL=y 61CONFIG_FB_ATMEL=y
65# CONFIG_VGA_CONSOLE is not set
66CONFIG_MMC=y 62CONFIG_MMC=y
67CONFIG_MMC_AT91=m 63CONFIG_MMC_AT91=m
68CONFIG_RTC_CLASS=y 64CONFIG_RTC_CLASS=y
69CONFIG_RTC_DRV_AT91SAM9=y 65CONFIG_RTC_DRV_AT91SAM9=y
70CONFIG_EXT2_FS=y 66CONFIG_EXT2_FS=y
71CONFIG_INOTIFY=y
72CONFIG_MSDOS_FS=y 67CONFIG_MSDOS_FS=y
73CONFIG_VFAT_FS=y 68CONFIG_VFAT_FS=y
74CONFIG_TMPFS=y 69CONFIG_TMPFS=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
index 227a477346ed..d95763d5f0d8 100644
--- a/arch/arm/configs/ezx_defconfig
+++ b/arch/arm/configs/ezx_defconfig
@@ -287,7 +287,7 @@ CONFIG_USB=y
287# CONFIG_USB_DEVICE_CLASS is not set 287# CONFIG_USB_DEVICE_CLASS is not set
288CONFIG_USB_OHCI_HCD=y 288CONFIG_USB_OHCI_HCD=y
289CONFIG_USB_GADGET=y 289CONFIG_USB_GADGET=y
290CONFIG_USB_GADGET_PXA27X=y 290CONFIG_USB_PXA27X=y
291CONFIG_USB_ETH=m 291CONFIG_USB_ETH=m
292# CONFIG_USB_ETH_RNDIS is not set 292# CONFIG_USB_ETH_RNDIS is not set
293CONFIG_MMC=y 293CONFIG_MMC=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index 176ec22af034..fd996bb13022 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -263,7 +263,7 @@ CONFIG_USB=y
263# CONFIG_USB_DEVICE_CLASS is not set 263# CONFIG_USB_DEVICE_CLASS is not set
264CONFIG_USB_OHCI_HCD=y 264CONFIG_USB_OHCI_HCD=y
265CONFIG_USB_GADGET=y 265CONFIG_USB_GADGET=y
266CONFIG_USB_GADGET_PXA27X=y 266CONFIG_USB_PXA27X=y
267CONFIG_USB_ETH=m 267CONFIG_USB_ETH=m
268# CONFIG_USB_ETH_RNDIS is not set 268# CONFIG_USB_ETH_RNDIS is not set
269CONFIG_MMC=y 269CONFIG_MMC=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index a88e64d4e9a5..443675d317e6 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -132,7 +132,7 @@ CONFIG_USB_MON=m
132CONFIG_USB_OHCI_HCD=y 132CONFIG_USB_OHCI_HCD=y
133CONFIG_USB_GADGET=y 133CONFIG_USB_GADGET=y
134CONFIG_USB_GADGET_VBUS_DRAW=500 134CONFIG_USB_GADGET_VBUS_DRAW=500
135CONFIG_USB_GADGET_PXA27X=y 135CONFIG_USB_PXA27X=y
136CONFIG_USB_ETH=m 136CONFIG_USB_ETH=m
137# CONFIG_USB_ETH_RNDIS is not set 137# CONFIG_USB_ETH_RNDIS is not set
138CONFIG_USB_GADGETFS=m 138CONFIG_USB_GADGETFS=m
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7b63462b349d..a7e777581378 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y
48CONFIG_MACH_NOKIA770=y 48CONFIG_MACH_NOKIA770=y
49CONFIG_MACH_AMS_DELTA=y 49CONFIG_MACH_AMS_DELTA=y
50CONFIG_MACH_OMAP_GENERIC=y 50CONFIG_MACH_OMAP_GENERIC=y
51CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
52CONFIG_OMAP_ARM_216MHZ=y 51CONFIG_OMAP_ARM_216MHZ=y
53CONFIG_OMAP_ARM_195MHZ=y 52CONFIG_OMAP_ARM_195MHZ=y
54CONFIG_OMAP_ARM_192MHZ=y 53CONFIG_OMAP_ARM_192MHZ=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index 4a5a12681be2..374000ec4e4e 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -14,8 +14,6 @@ CONFIG_MODULE_UNLOAD=y
14CONFIG_ARCH_U300=y 14CONFIG_ARCH_U300=y
15CONFIG_MACH_U300=y 15CONFIG_MACH_U300=y
16CONFIG_MACH_U300_BS335=y 16CONFIG_MACH_U300_BS335=y
17CONFIG_MACH_U300_DUAL_RAM=y
18CONFIG_U300_DEBUG=y
19CONFIG_MACH_U300_SPIDUMMY=y 17CONFIG_MACH_U300_SPIDUMMY=y
20CONFIG_NO_HZ=y 18CONFIG_NO_HZ=y
21CONFIG_HIGH_RES_TIMERS=y 19CONFIG_HIGH_RES_TIMERS=y
@@ -26,19 +24,21 @@ CONFIG_ZBOOT_ROM_BSS=0x0
26CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072" 24CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
27CONFIG_CPU_IDLE=y 25CONFIG_CPU_IDLE=y
28CONFIG_FPE_NWFPE=y 26CONFIG_FPE_NWFPE=y
29CONFIG_PM=y
30# CONFIG_SUSPEND is not set 27# CONFIG_SUSPEND is not set
31CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 28CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
32# CONFIG_PREVENT_FIRMWARE_BUILD is not set 29# CONFIG_PREVENT_FIRMWARE_BUILD is not set
33# CONFIG_MISC_DEVICES is not set 30CONFIG_MTD=y
31CONFIG_MTD_CMDLINE_PARTS=y
32CONFIG_MTD_NAND=y
33CONFIG_MTD_NAND_FSMC=y
34# CONFIG_INPUT_MOUSEDEV is not set 34# CONFIG_INPUT_MOUSEDEV is not set
35CONFIG_INPUT_EVDEV=y 35CONFIG_INPUT_EVDEV=y
36# CONFIG_KEYBOARD_ATKBD is not set 36# CONFIG_KEYBOARD_ATKBD is not set
37# CONFIG_INPUT_MOUSE is not set 37# CONFIG_INPUT_MOUSE is not set
38# CONFIG_SERIO is not set 38# CONFIG_SERIO is not set
39CONFIG_LEGACY_PTY_COUNT=16
39CONFIG_SERIAL_AMBA_PL011=y 40CONFIG_SERIAL_AMBA_PL011=y
40CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 41CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
41CONFIG_LEGACY_PTY_COUNT=16
42# CONFIG_HW_RANDOM is not set 42# CONFIG_HW_RANDOM is not set
43CONFIG_I2C=y 43CONFIG_I2C=y
44# CONFIG_HWMON is not set 44# CONFIG_HWMON is not set
@@ -51,6 +51,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
51# CONFIG_HID_SUPPORT is not set 51# CONFIG_HID_SUPPORT is not set
52# CONFIG_USB_SUPPORT is not set 52# CONFIG_USB_SUPPORT is not set
53CONFIG_MMC=y 53CONFIG_MMC=y
54CONFIG_MMC_CLKGATE=y
54CONFIG_MMC_ARMMMCI=y 55CONFIG_MMC_ARMMMCI=y
55CONFIG_RTC_CLASS=y 56CONFIG_RTC_CLASS=y
56# CONFIG_RTC_HCTOSYS is not set 57# CONFIG_RTC_HCTOSYS is not set
@@ -65,10 +66,8 @@ CONFIG_NLS_CODEPAGE_437=y
65CONFIG_NLS_ISO8859_1=y 66CONFIG_NLS_ISO8859_1=y
66CONFIG_PRINTK_TIME=y 67CONFIG_PRINTK_TIME=y
67CONFIG_DEBUG_FS=y 68CONFIG_DEBUG_FS=y
68CONFIG_DEBUG_KERNEL=y
69# CONFIG_SCHED_DEBUG is not set 69# CONFIG_SCHED_DEBUG is not set
70CONFIG_TIMER_STATS=y 70CONFIG_TIMER_STATS=y
71# CONFIG_DEBUG_PREEMPT is not set 71# CONFIG_DEBUG_PREEMPT is not set
72CONFIG_DEBUG_INFO=y 72CONFIG_DEBUG_INFO=y
73# CONFIG_RCU_CPU_STALL_DETECTOR is not set
74# CONFIG_CRC32 is not set 73# CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 97d31a4663da..2d7b6e7b7271 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -10,7 +10,7 @@ CONFIG_MODULE_UNLOAD=y
10CONFIG_ARCH_U8500=y 10CONFIG_ARCH_U8500=y
11CONFIG_UX500_SOC_DB5500=y 11CONFIG_UX500_SOC_DB5500=y
12CONFIG_UX500_SOC_DB8500=y 12CONFIG_UX500_SOC_DB8500=y
13CONFIG_MACH_U8500=y 13CONFIG_MACH_HREFV60=y
14CONFIG_MACH_SNOWBALL=y 14CONFIG_MACH_SNOWBALL=y
15CONFIG_MACH_U5500=y 15CONFIG_MACH_U5500=y
16CONFIG_NO_HZ=y 16CONFIG_NO_HZ=y
@@ -24,6 +24,7 @@ CONFIG_CPU_FREQ=y
24CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y 24CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
25CONFIG_VFP=y 25CONFIG_VFP=y
26CONFIG_NEON=y 26CONFIG_NEON=y
27CONFIG_PM_RUNTIME=y
27CONFIG_NET=y 28CONFIG_NET=y
28CONFIG_PACKET=y 29CONFIG_PACKET=y
29CONFIG_UNIX=y 30CONFIG_UNIX=y
@@ -41,11 +42,8 @@ CONFIG_MISC_DEVICES=y
41CONFIG_AB8500_PWM=y 42CONFIG_AB8500_PWM=y
42CONFIG_SENSORS_BH1780=y 43CONFIG_SENSORS_BH1780=y
43CONFIG_NETDEVICES=y 44CONFIG_NETDEVICES=y
44CONFIG_SMSC_PHY=y
45CONFIG_NET_ETHERNET=y
46CONFIG_SMSC911X=y 45CONFIG_SMSC911X=y
47# CONFIG_NETDEV_1000 is not set 46CONFIG_SMSC_PHY=y
48# CONFIG_NETDEV_10000 is not set
49# CONFIG_WLAN is not set 47# CONFIG_WLAN is not set
50# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 48# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
51CONFIG_INPUT_EVDEV=y 49CONFIG_INPUT_EVDEV=y
@@ -72,15 +70,12 @@ CONFIG_SPI=y
72CONFIG_SPI_PL022=y 70CONFIG_SPI_PL022=y
73CONFIG_GPIO_STMPE=y 71CONFIG_GPIO_STMPE=y
74CONFIG_GPIO_TC3589X=y 72CONFIG_GPIO_TC3589X=y
75# CONFIG_HWMON is not set
76CONFIG_MFD_STMPE=y 73CONFIG_MFD_STMPE=y
77CONFIG_MFD_TC3589X=y 74CONFIG_MFD_TC3589X=y
75CONFIG_AB5500_CORE=y
78CONFIG_AB8500_CORE=y 76CONFIG_AB8500_CORE=y
79CONFIG_REGULATOR_AB8500=y 77CONFIG_REGULATOR_AB8500=y
80# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
81CONFIG_USB_MUSB_HDRC=y
82CONFIG_USB_GADGET_MUSB_HDRC=y
83CONFIG_MUSB_PIO_ONLY=y
84CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
85CONFIG_AB8500_USB=y 80CONFIG_AB8500_USB=y
86CONFIG_MMC=y 81CONFIG_MMC=y
@@ -97,6 +92,7 @@ CONFIG_DMADEVICES=y
97CONFIG_STE_DMA40=y 92CONFIG_STE_DMA40=y
98CONFIG_STAGING=y 93CONFIG_STAGING=y
99CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y 94CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
95CONFIG_HSEM_U8500=y
100CONFIG_EXT2_FS=y 96CONFIG_EXT2_FS=y
101CONFIG_EXT2_FS_XATTR=y 97CONFIG_EXT2_FS_XATTR=y
102CONFIG_EXT2_FS_POSIX_ACL=y 98CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
index 59577ad3f4ef..547a3c1e59db 100644
--- a/arch/arm/configs/zeus_defconfig
+++ b/arch/arm/configs/zeus_defconfig
@@ -140,7 +140,7 @@ CONFIG_USB_SERIAL=m
140CONFIG_USB_SERIAL_GENERIC=y 140CONFIG_USB_SERIAL_GENERIC=y
141CONFIG_USB_SERIAL_MCT_U232=m 141CONFIG_USB_SERIAL_MCT_U232=m
142CONFIG_USB_GADGET=m 142CONFIG_USB_GADGET=m
143CONFIG_USB_GADGET_PXA27X=y 143CONFIG_USB_PXA27X=y
144CONFIG_USB_ETH=m 144CONFIG_USB_ETH=m
145CONFIG_USB_GADGETFS=m 145CONFIG_USB_GADGETFS=m
146CONFIG_USB_FILE_STORAGE=m 146CONFIG_USB_FILE_STORAGE=m
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 35f6502144ae..4ebb382c5979 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -12,6 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/cpuidle.h> 13#include <linux/cpuidle.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/export.h>
16#include <linux/time.h>
15 17
16#include <asm/proc-fns.h> 18#include <asm/proc-fns.h>
17 19
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b82dcf08e747..88660d500f5b 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -22,6 +22,7 @@
22#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/of_platform.h> 23#include <linux/of_platform.h>
24#include <linux/of_address.h> 24#include <linux/of_address.h>
25#include <linux/smp.h>
25 26
26#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
27#include <asm/unified.h> 28#include <asm/unified.h>
@@ -72,6 +73,9 @@ static void __init highbank_map_io(void)
72 73
73void highbank_set_cpu_jump(int cpu, void *jump_addr) 74void highbank_set_cpu_jump(int cpu, void *jump_addr)
74{ 75{
76#ifdef CONFIG_SMP
77 cpu = cpu_logical_map(cpu);
78#endif
75 writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); 79 writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
76 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 80 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
77 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 81 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2a34ae..c44aa974e79c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
10config HAVE_IMX_SRC 10config HAVE_IMX_SRC
11 bool 11 bool
12 12
13#
14# ARCH_MX31 and ARCH_MX35 are left for compatibility
15# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
16# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
17# more sensible) names are used: SOC_IMX31 and SOC_IMX35
18config ARCH_MX1 13config ARCH_MX1
19 bool 14 bool
20 15
@@ -27,12 +22,6 @@ config ARCH_MX25
27config MACH_MX27 22config MACH_MX27
28 bool 23 bool
29 24
30config ARCH_MX31
31 bool
32
33config ARCH_MX35
34 bool
35
36config SOC_IMX1 25config SOC_IMX1
37 bool 26 bool
38 select ARCH_MX1 27 select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31
72 select CPU_V6 61 select CPU_V6
73 select IMX_HAVE_PLATFORM_MXC_RNGA 62 select IMX_HAVE_PLATFORM_MXC_RNGA
74 select ARCH_MXC_AUDMUX_V2 63 select ARCH_MXC_AUDMUX_V2
75 select ARCH_MX31
76 select MXC_AVIC 64 select MXC_AVIC
77 select SMP_ON_UP if SMP 65 select SMP_ON_UP if SMP
78 66
@@ -82,7 +70,6 @@ config SOC_IMX35
82 select ARCH_MXC_IOMUX_V3 70 select ARCH_MXC_IOMUX_V3
83 select ARCH_MXC_AUDMUX_V2 71 select ARCH_MXC_AUDMUX_V2
84 select HAVE_EPIT 72 select HAVE_EPIT
85 select ARCH_MX35
86 select MXC_AVIC 73 select MXC_AVIC
87 select SMP_ON_UP if SMP 74 select SMP_ON_UP if SMP
88 75
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 613a1b993bff..039a7abb165a 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = {
1953 imx_map_entry(MX6Q, ANATOP, MT_DEVICE), 1953 imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
1954}; 1954};
1955 1955
1956void __init imx6q_clock_map_io(void)
1957{
1958 iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
1959}
1960
1956int __init mx6q_clocks_init(void) 1961int __init mx6q_clocks_init(void)
1957{ 1962{
1958 struct device_node *np; 1963 struct device_node *np;
1959 void __iomem *base; 1964 void __iomem *base;
1960 int i, irq; 1965 int i, irq;
1961 1966
1962 iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
1963
1964 /* retrieve the freqency of fixed clocks from device tree */ 1967 /* retrieve the freqency of fixed clocks from device tree */
1965 for_each_compatible_node(np, NULL, "fixed-clock") { 1968 for_each_compatible_node(np, NULL, "fixed-clock") {
1966 u32 rate; 1969 u32 rate;
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8bf5fa349484..9cd860a27af5 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -34,6 +34,7 @@ static void __init imx6q_map_io(void)
34{ 34{
35 imx_lluart_map_io(); 35 imx_lluart_map_io();
36 imx_scu_map_io(); 36 imx_scu_map_io();
37 imx6q_clock_map_io();
37} 38}
38 39
39static void __init imx6q_gpio_add_irq_domain(struct device_node *np, 40static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec3398..31807d2a8b7b 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
33static void imx3_idle(void) 33static void imx3_idle(void)
34{ 34{
35 unsigned long reg = 0; 35 unsigned long reg = 0;
36 __asm__ __volatile__( 36
37 /* disable I and D cache */ 37 if (!need_resched())
38 "mrc p15, 0, %0, c1, c0, 0\n" 38 __asm__ __volatile__(
39 "bic %0, %0, #0x00001000\n" 39 /* disable I and D cache */
40 "bic %0, %0, #0x00000004\n" 40 "mrc p15, 0, %0, c1, c0, 0\n"
41 "mcr p15, 0, %0, c1, c0, 0\n" 41 "bic %0, %0, #0x00001000\n"
42 /* invalidate I cache */ 42 "bic %0, %0, #0x00000004\n"
43 "mov %0, #0\n" 43 "mcr p15, 0, %0, c1, c0, 0\n"
44 "mcr p15, 0, %0, c7, c5, 0\n" 44 /* invalidate I cache */
45 /* clear and invalidate D cache */ 45 "mov %0, #0\n"
46 "mov %0, #0\n" 46 "mcr p15, 0, %0, c7, c5, 0\n"
47 "mcr p15, 0, %0, c7, c14, 0\n" 47 /* clear and invalidate D cache */
48 /* WFI */ 48 "mov %0, #0\n"
49 "mov %0, #0\n" 49 "mcr p15, 0, %0, c7, c14, 0\n"
50 "mcr p15, 0, %0, c7, c0, 4\n" 50 /* WFI */
51 "nop\n" "nop\n" "nop\n" "nop\n" 51 "mov %0, #0\n"
52 "nop\n" "nop\n" "nop\n" 52 "mcr p15, 0, %0, c7, c0, 4\n"
53 /* enable I and D cache */ 53 "nop\n" "nop\n" "nop\n" "nop\n"
54 "mrc p15, 0, %0, c1, c0, 0\n" 54 "nop\n" "nop\n" "nop\n"
55 "orr %0, %0, #0x00001000\n" 55 /* enable I and D cache */
56 "orr %0, %0, #0x00000004\n" 56 "mrc p15, 0, %0, c1, c0, 0\n"
57 "mcr p15, 0, %0, c1, c0, 0\n" 57 "orr %0, %0, #0x00001000\n"
58 : "=r" (reg)); 58 "orr %0, %0, #0x00000004\n"
59 "mcr p15, 0, %0, c1, c0, 0\n"
60 : "=r" (reg));
61 local_irq_enable();
59} 62}
60 63
61static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, 64static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
108 l2x0_init(l2x0_base, 0x00030024, 0x00000000); 111 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
109} 112}
110 113
114#ifdef CONFIG_SOC_IMX31
111static struct map_desc mx31_io_desc[] __initdata = { 115static struct map_desc mx31_io_desc[] __initdata = {
112 imx_map_entry(MX31, X_MEMC, MT_DEVICE), 116 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
113 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), 117 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
126 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); 130 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
127} 131}
128 132
129static struct map_desc mx35_io_desc[] __initdata = {
130 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
131 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
132 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
133 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
134 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
135};
136
137void __init mx35_map_io(void)
138{
139 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
140}
141
142void __init imx31_init_early(void) 133void __init imx31_init_early(void)
143{ 134{
144 mxc_set_cpu_type(MXC_CPU_MX31); 135 mxc_set_cpu_type(MXC_CPU_MX31);
145 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); 136 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
146 imx_idle = imx3_idle; 137 pm_idle = imx3_idle;
147 imx_ioremap = imx3_ioremap;
148}
149
150void __init imx35_init_early(void)
151{
152 mxc_set_cpu_type(MXC_CPU_MX35);
153 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
154 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
155 imx_idle = imx3_idle;
156 imx_ioremap = imx3_ioremap; 138 imx_ioremap = imx3_ioremap;
157} 139}
158 140
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
161 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); 143 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
162} 144}
163 145
164void __init mx35_init_irq(void)
165{
166 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
167}
168
169static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { 146static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
170 .per_2_per_addr = 1677, 147 .per_2_per_addr = 1677,
171}; 148};
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
199 176
200 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); 177 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
201} 178}
179#endif /* ifdef CONFIG_SOC_IMX31 */
180
181#ifdef CONFIG_SOC_IMX35
182static struct map_desc mx35_io_desc[] __initdata = {
183 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
184 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
185 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
186 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
187 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
188};
189
190void __init mx35_map_io(void)
191{
192 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
193}
194
195void __init imx35_init_early(void)
196{
197 mxc_set_cpu_type(MXC_CPU_MX35);
198 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
199 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
200 pm_idle = imx3_idle;
201 imx_ioremap = imx3_ioremap;
202}
203
204void __init mx35_init_irq(void)
205{
206 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
207}
202 208
203static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { 209static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
204 .ap_2_ap_addr = 642, 210 .ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
254 260
255 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); 261 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
256} 262}
263#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 36cacbd0dcc2..a8e33681b732 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_address.h> 16#include <linux/of_address.h>
17#include <linux/smp.h>
17#include <asm/unified.h> 18#include <asm/unified.h>
18 19
19#define SRC_SCR 0x000 20#define SRC_SCR 0x000
@@ -23,10 +24,15 @@
23 24
24static void __iomem *src_base; 25static void __iomem *src_base;
25 26
27#ifndef CONFIG_SMP
28#define cpu_logical_map(cpu) 0
29#endif
30
26void imx_enable_cpu(int cpu, bool enable) 31void imx_enable_cpu(int cpu, bool enable)
27{ 32{
28 u32 mask, val; 33 u32 mask, val;
29 34
35 cpu = cpu_logical_map(cpu);
30 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); 36 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
31 val = readl_relaxed(src_base + SRC_SCR); 37 val = readl_relaxed(src_base + SRC_SCR);
32 val = enable ? val | mask : val & ~mask; 38 val = enable ? val | mask : val & ~mask;
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable)
35 41
36void imx_set_cpu_jump(int cpu, void *jump_addr) 42void imx_set_cpu_jump(int cpu, void *jump_addr)
37{ 43{
44 cpu = cpu_logical_map(cpu);
38 writel_relaxed(BSYM(virt_to_phys(jump_addr)), 45 writel_relaxed(BSYM(virt_to_phys(jump_addr)),
39 src_base + SRC_GPR1 + cpu * 8); 46 src_base + SRC_GPR1 + cpu * 8);
40} 47}
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc41..4665767a4f79 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -182,7 +182,7 @@ static void __init gplugd_init(void)
182 182
183 /* on-chip devices */ 183 /* on-chip devices */
184 pxa168_add_uart(3); 184 pxa168_add_uart(3);
185 pxa168_add_ssp(0); 185 pxa168_add_ssp(1);
186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); 186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187 187
188 pxa168_add_eth(&gplugd_eth_platform_data); 188 pxa168_add_eth(&gplugd_eth_platform_data);
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index d14eeaf16322..99b4ce1b6562 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,7 +7,7 @@
7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) 7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
8 8
9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10#define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) 10#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
11 11
12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM 12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13 13
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 5c5328257dca..5e2e7a843860 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -16,7 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19#include <asm/io.h> 19#include <linux/io.h>
20 20
21static int mx5_cpu_rev = -1; 21static int mx5_cpu_rev = -1;
22 22
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
67 if (!cpu_is_mx51()) 67 if (!cpu_is_mx51())
68 return 0; 68 return 0;
69 69
70 if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) { 70 if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
71 (elf_hwcap & HWCAP_NEON)) {
71 elf_hwcap &= ~HWCAP_NEON; 72 elf_hwcap &= ~HWCAP_NEON;
72 pr_info("Turning off NEON support, detected broken NEON implementation\n"); 73 pr_info("Turning off NEON support, detected broken NEON implementation\n");
73 } 74 }
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 26eacc9d0d90..df4a508f240a 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,7 +23,9 @@
23 23
24static void imx5_idle(void) 24static void imx5_idle(void)
25{ 25{
26 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 26 if (!need_resched())
27 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
28 local_irq_enable();
27} 29}
28 30
29/* 31/*
@@ -89,7 +91,7 @@ void __init imx51_init_early(void)
89 mxc_set_cpu_type(MXC_CPU_MX51); 91 mxc_set_cpu_type(MXC_CPU_MX51);
90 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 92 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
91 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 93 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
92 imx_idle = imx5_idle; 94 pm_idle = imx5_idle;
93} 95}
94 96
95void __init imx53_init_early(void) 97void __init imx53_init_early(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 229ae3494216..da6e4aad177c 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
404 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ 404 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
405 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 405 reg &= ~BM_CLKCTRL_##dr##_DIV; \
406 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 406 reg |= div << BP_CLKCTRL_##dr##_DIV; \
407 if (reg | (1 << clk->enable_shift)) { \ 407 if (reg & (1 << clk->enable_shift)) { \
408 pr_err("%s: clock is gated\n", __func__); \ 408 pr_err("%s: clock is gated\n", __func__); \
409 return -EINVAL; \ 409 return -EINVAL; \
410 } \ 410 } \
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index e0a028161dde..73f287d6429b 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC
171comment "OMAP CPU Speed" 171comment "OMAP CPU Speed"
172 depends on ARCH_OMAP1 172 depends on ARCH_OMAP1
173 173
174config OMAP_CLOCKS_SET_BY_BOOTLOADER
175 bool "OMAP clocks set by bootloader"
176 depends on ARCH_OMAP1
177 help
178 Enable this option to prevent the kernel from overriding the clock
179 frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
180 internal LCD controller and MPU peripherals.
181
182config OMAP_ARM_216MHZ 174config OMAP_ARM_216MHZ
183 bool "OMAP ARM 216 MHz CPU (1710 only)" 175 bool "OMAP ARM 216 MHz CPU (1710 only)"
184 depends on ARCH_OMAP1 && ARCH_OMAP16XX 176 depends on ARCH_OMAP1 && ARCH_OMAP16XX
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 51bae31cf361..b0f15d234a12 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
302 omap_cfg_reg(J19_1610_CAM_D6); 302 omap_cfg_reg(J19_1610_CAM_D6);
303 omap_cfg_reg(J18_1610_CAM_D7); 303 omap_cfg_reg(J18_1610_CAM_D7);
304 304
305 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
306
307 omap_board_config = ams_delta_config; 305 omap_board_config = ams_delta_config;
308 omap_board_config_size = ARRAY_SIZE(ams_delta_config); 306 omap_board_config_size = ARRAY_SIZE(ams_delta_config);
309 omap_serial_init(); 307 omap_serial_init();
@@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void)
373} 371}
374arch_initcall(ams_delta_modem_init); 372arch_initcall(ams_delta_modem_init);
375 373
374static void __init ams_delta_map_io(void)
375{
376 omap15xx_map_io();
377 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
378}
379
376MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") 380MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
377 /* Maintainer: Jonathan McDowell <noodles@earth.li> */ 381 /* Maintainer: Jonathan McDowell <noodles@earth.li> */
378 .atag_offset = 0x100, 382 .atag_offset = 0x100,
379 .map_io = omap15xx_map_io, 383 .map_io = ams_delta_map_io,
380 .init_early = omap1_init_early, 384 .init_early = omap1_init_early,
381 .reserve = omap_reserve, 385 .reserve = omap_reserve,
382 .init_irq = omap1_init_irq, 386 .init_irq = omap1_init_irq,
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index eaf09efb91ca..16b1423b454a 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -17,7 +17,8 @@
17 17
18#include <plat/clock.h> 18#include <plat/clock.h>
19 19
20extern int __init omap1_clk_init(void); 20int omap1_clk_init(void);
21void omap1_clk_late_init(void);
21extern int omap1_clk_enable(struct clk *clk); 22extern int omap1_clk_enable(struct clk *clk);
22extern void omap1_clk_disable(struct clk *clk); 23extern void omap1_clk_disable(struct clk *clk);
23extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); 24extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 92400b9eb69f..1297bb58869c 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -767,6 +767,15 @@ static struct clk_functions omap1_clk_functions = {
767 .clk_disable_unused = omap1_clk_disable_unused, 767 .clk_disable_unused = omap1_clk_disable_unused,
768}; 768};
769 769
770static void __init omap1_show_rates(void)
771{
772 pr_notice("Clocking rate (xtal/DPLL1/MPU): "
773 "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
774 ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
775 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
776 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
777}
778
770int __init omap1_clk_init(void) 779int __init omap1_clk_init(void)
771{ 780{
772 struct omap_clk *c; 781 struct omap_clk *c;
@@ -835,9 +844,12 @@ int __init omap1_clk_init(void)
835 /* We want to be in syncronous scalable mode */ 844 /* We want to be in syncronous scalable mode */
836 omap_writew(0x1000, ARM_SYSST); 845 omap_writew(0x1000, ARM_SYSST);
837 846
838#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER 847
839 /* Use values set by bootloader. Determine PLL rate and recalculate 848 /*
840 * dependent clocks as if kernel had changed PLL or divisors. 849 * Initially use the values set by bootloader. Determine PLL rate and
850 * recalculate dependent clocks as if kernel had changed PLL or
851 * divisors. See also omap1_clk_late_init() that can reprogram dpll1
852 * after the SRAM is initialized.
841 */ 853 */
842 { 854 {
843 unsigned pll_ctl_val = omap_readw(DPLL_CTL); 855 unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +874,10 @@ int __init omap1_clk_init(void)
862 } 874 }
863 } 875 }
864 } 876 }
865#else
866 /* Find the highest supported frequency and enable it */
867 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
868 printk(KERN_ERR "System frequencies not set. Check your config.\n");
869 /* Guess sane values (60MHz) */
870 omap_writew(0x2290, DPLL_CTL);
871 omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
872 ck_dpll1.rate = 60000000;
873 }
874#endif
875 propagate_rate(&ck_dpll1); 877 propagate_rate(&ck_dpll1);
876 /* Cache rates for clocks connected to ck_ref (not dpll1) */ 878 /* Cache rates for clocks connected to ck_ref (not dpll1) */
877 propagate_rate(&ck_ref); 879 propagate_rate(&ck_ref);
878 printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " 880 omap1_show_rates();
879 "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
880 ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
881 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
882 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
883
884 if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { 881 if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
885 /* Select slicer output as OMAP input clock */ 882 /* Select slicer output as OMAP input clock */
886 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, 883 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +922,21 @@ int __init omap1_clk_init(void)
925 922
926 return 0; 923 return 0;
927} 924}
925
926#define OMAP1_DPLL1_SANE_VALUE 60000000
927
928void __init omap1_clk_late_init(void)
929{
930 if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE)
931 return;
932
933 /* Find the highest supported frequency and enable it */
934 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
935 pr_err("System frequencies not set, using default. Check your config.\n");
936 omap_writew(0x2290, DPLL_CTL);
937 omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
938 ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
939 }
940 propagate_rate(&ck_dpll1);
941 omap1_show_rates();
942}
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 48ef9888e820..475cb2f50d87 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -30,6 +30,8 @@
30#include <plat/omap7xx.h> 30#include <plat/omap7xx.h>
31#include <plat/mcbsp.h> 31#include <plat/mcbsp.h>
32 32
33#include "clock.h"
34
33/*-------------------------------------------------------------------------*/ 35/*-------------------------------------------------------------------------*/
34 36
35#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) 37#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
293 return -ENODEV; 295 return -ENODEV;
294 296
295 omap_sram_init(); 297 omap_sram_init();
298 omap1_clk_late_init();
296 299
297 /* please keep these calls, and their implementations above, 300 /* please keep these calls, and their implementations above,
298 * in alphabetical order so they're easier to sort through. 301 * in alphabetical order so they're easier to sort through.
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 503414718905..e1293aa513d3 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -334,6 +334,7 @@ config MACH_OMAP4_PANDA
334config OMAP3_EMU 334config OMAP3_EMU
335 bool "OMAP3 debugging peripherals" 335 bool "OMAP3 debugging peripherals"
336 depends on ARCH_OMAP3 336 depends on ARCH_OMAP3
337 select ARM_AMBA
337 select OC_ETM 338 select OC_ETM
338 help 339 help
339 Say Y here to enable debugging hardware of omap3 340 Say Y here to enable debugging hardware of omap3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69ab1c069134..b009f17dee56 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o 7 common.o gpio.o dma.o wd_timer.o display.o
8 8
9omap-2-3-common = irq.o sdrc.o 9omap-2-3-common = irq.o sdrc.o
10hwmod-common = omap_hwmod.o \ 10hwmod-common = omap_hwmod.o \
@@ -264,7 +264,4 @@ smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
264obj-y += $(smsc911x-m) $(smsc911x-y) 264obj-y += $(smsc911x-m) $(smsc911x-y)
265obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 265obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
266 266
267disp-$(CONFIG_OMAP2_DSS) := display.o
268obj-y += $(disp-m) $(disp-y)
269
270obj-y += common-board-devices.o twl-common.o 267obj-y += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 1fe35c24fba2..942bb4f19f9f 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -24,6 +24,7 @@
24 24
25#include <linux/sched.h> 25#include <linux/sched.h>
26#include <linux/cpuidle.h> 26#include <linux/cpuidle.h>
27#include <linux/export.h>
27 28
28#include <plat/prcm.h> 29#include <plat/prcm.h>
29#include <plat/irqs.h> 30#include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index adb2756e242f..dce9905d64bb 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -27,8 +27,35 @@
27#include <plat/omap_hwmod.h> 27#include <plat/omap_hwmod.h>
28#include <plat/omap_device.h> 28#include <plat/omap_device.h>
29#include <plat/omap-pm.h> 29#include <plat/omap-pm.h>
30#include <plat/common.h>
30 31
31#include "control.h" 32#include "control.h"
33#include "display.h"
34
35#define DISPC_CONTROL 0x0040
36#define DISPC_CONTROL2 0x0238
37#define DISPC_IRQSTATUS 0x0018
38
39#define DSS_SYSCONFIG 0x10
40#define DSS_SYSSTATUS 0x14
41#define DSS_CONTROL 0x40
42#define DSS_SDI_CONTROL 0x44
43#define DSS_PLL_CONTROL 0x48
44
45#define LCD_EN_MASK (0x1 << 0)
46#define DIGIT_EN_MASK (0x1 << 1)
47
48#define FRAMEDONE_IRQ_SHIFT 0
49#define EVSYNC_EVEN_IRQ_SHIFT 2
50#define EVSYNC_ODD_IRQ_SHIFT 3
51#define FRAMEDONE2_IRQ_SHIFT 22
52#define FRAMEDONETV_IRQ_SHIFT 24
53
54/*
55 * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
56 * reset before deciding that something has gone wrong
57 */
58#define FRAMEDONE_IRQ_TIMEOUT 100
32 59
33static struct platform_device omap_display_device = { 60static struct platform_device omap_display_device = {
34 .name = "omapdss", 61 .name = "omapdss",
@@ -172,3 +199,135 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
172 199
173 return r; 200 return r;
174} 201}
202
203static void dispc_disable_outputs(void)
204{
205 u32 v, irq_mask = 0;
206 bool lcd_en, digit_en, lcd2_en = false;
207 int i;
208 struct omap_dss_dispc_dev_attr *da;
209 struct omap_hwmod *oh;
210
211 oh = omap_hwmod_lookup("dss_dispc");
212 if (!oh) {
213 WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
214 return;
215 }
216
217 if (!oh->dev_attr) {
218 pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
219 return;
220 }
221
222 da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
223
224 /* store value of LCDENABLE and DIGITENABLE bits */
225 v = omap_hwmod_read(oh, DISPC_CONTROL);
226 lcd_en = v & LCD_EN_MASK;
227 digit_en = v & DIGIT_EN_MASK;
228
229 /* store value of LCDENABLE for LCD2 */
230 if (da->manager_count > 2) {
231 v = omap_hwmod_read(oh, DISPC_CONTROL2);
232 lcd2_en = v & LCD_EN_MASK;
233 }
234
235 if (!(lcd_en | digit_en | lcd2_en))
236 return; /* no managers currently enabled */
237
238 /*
239 * If any manager was enabled, we need to disable it before
240 * DSS clocks are disabled or DISPC module is reset
241 */
242 if (lcd_en)
243 irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT;
244
245 if (digit_en) {
246 if (da->has_framedonetv_irq) {
247 irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT;
248 } else {
249 irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT |
250 1 << EVSYNC_ODD_IRQ_SHIFT;
251 }
252 }
253
254 if (lcd2_en)
255 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
256
257 /*
258 * clear any previous FRAMEDONE, FRAMEDONETV,
259 * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts
260 */
261 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
262
263 /* disable LCD and TV managers */
264 v = omap_hwmod_read(oh, DISPC_CONTROL);
265 v &= ~(LCD_EN_MASK | DIGIT_EN_MASK);
266 omap_hwmod_write(v, oh, DISPC_CONTROL);
267
268 /* disable LCD2 manager */
269 if (da->manager_count > 2) {
270 v = omap_hwmod_read(oh, DISPC_CONTROL2);
271 v &= ~LCD_EN_MASK;
272 omap_hwmod_write(v, oh, DISPC_CONTROL2);
273 }
274
275 i = 0;
276 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
277 irq_mask) {
278 i++;
279 if (i > FRAMEDONE_IRQ_TIMEOUT) {
280 pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n");
281 break;
282 }
283 mdelay(1);
284 }
285}
286
287#define MAX_MODULE_SOFTRESET_WAIT 10000
288int omap_dss_reset(struct omap_hwmod *oh)
289{
290 struct omap_hwmod_opt_clk *oc;
291 int c = 0;
292 int i, r;
293
294 if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
295 pr_err("dss_core: hwmod data doesn't contain reset data\n");
296 return -EINVAL;
297 }
298
299 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
300 if (oc->_clk)
301 clk_enable(oc->_clk);
302
303 dispc_disable_outputs();
304
305 /* clear SDI registers */
306 if (cpu_is_omap3430()) {
307 omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
308 omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
309 }
310
311 /*
312 * clear DSS_CONTROL register to switch DSS clock sources to
313 * PRCM clock, if any
314 */
315 omap_hwmod_write(0x0, oh, DSS_CONTROL);
316
317 omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
318 & SYSS_RESETDONE_MASK),
319 MAX_MODULE_SOFTRESET_WAIT, c);
320
321 if (c == MAX_MODULE_SOFTRESET_WAIT)
322 pr_warning("dss_core: waiting for reset to finish failed\n");
323 else
324 pr_debug("dss_core: softreset done\n");
325
326 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
327 if (oc->_clk)
328 clk_disable(oc->_clk);
329
330 r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
331
332 return r;
333}
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
new file mode 100644
index 000000000000..b871b017b352
--- /dev/null
+++ b/arch/arm/mach-omap2/display.h
@@ -0,0 +1,29 @@
1/*
2 * display.h - OMAP2+ integration-specific DSS header
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#ifndef __ARCH_ARM_MACH_OMAP2_DISPLAY_H
20#define __ARCH_ARM_MACH_OMAP2_DISPLAY_H
21
22#include <linux/kernel.h>
23
24struct omap_dss_dispc_dev_attr {
25 u8 manager_count;
26 bool has_framedonetv_irq;
27};
28
29#endif
diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-omap2/io.h
+++ /dev/null
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6b3088db83b7..207a2ff9a8c4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh)
749 ohii = &oh->mpu_irqs[i++]; 749 ohii = &oh->mpu_irqs[i++];
750 } while (ohii->irq != -1); 750 } while (ohii->irq != -1);
751 751
752 return i; 752 return i-1;
753} 753}
754 754
755/** 755/**
@@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh)
772 ohdi = &oh->sdma_reqs[i++]; 772 ohdi = &oh->sdma_reqs[i++];
773 } while (ohdi->dma_req != -1); 773 } while (ohdi->dma_req != -1);
774 774
775 return i; 775 return i-1;
776} 776}
777 777
778/** 778/**
@@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
795 mem = &os->addr[i++]; 795 mem = &os->addr[i++];
796 } while (mem->pa_start != mem->pa_end); 796 } while (mem->pa_start != mem->pa_end);
797 797
798 return i; 798 return i-1;
799} 799}
800 800
801/** 801/**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 6d7206213525..a5409ce3f323 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -875,6 +875,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
875}; 875};
876 876
877static struct omap_hwmod_opt_clk dss_opt_clks[] = { 877static struct omap_hwmod_opt_clk dss_opt_clks[] = {
878 /*
879 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
880 * driver does not use these clocks.
881 */
878 { .role = "tv_clk", .clk = "dss_54m_fck" }, 882 { .role = "tv_clk", .clk = "dss_54m_fck" },
879 { .role = "sys_clk", .clk = "dss2_fck" }, 883 { .role = "sys_clk", .clk = "dss2_fck" },
880}; 884};
@@ -899,7 +903,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
899 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves), 903 .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
900 .masters = omap2420_dss_masters, 904 .masters = omap2420_dss_masters,
901 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters), 905 .masters_cnt = ARRAY_SIZE(omap2420_dss_masters),
902 .flags = HWMOD_NO_IDLEST, 906 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
903}; 907};
904 908
905/* l4_core -> dss_dispc */ 909/* l4_core -> dss_dispc */
@@ -939,6 +943,7 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
939 .slaves = omap2420_dss_dispc_slaves, 943 .slaves = omap2420_dss_dispc_slaves,
940 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves), 944 .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves),
941 .flags = HWMOD_NO_IDLEST, 945 .flags = HWMOD_NO_IDLEST,
946 .dev_attr = &omap2_3_dss_dispc_dev_attr
942}; 947};
943 948
944/* l4_core -> dss_rfbi */ 949/* l4_core -> dss_rfbi */
@@ -961,6 +966,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
961 &omap2420_l4_core__dss_rfbi, 966 &omap2420_l4_core__dss_rfbi,
962}; 967};
963 968
969static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
970 { .role = "ick", .clk = "dss_ick" },
971};
972
964static struct omap_hwmod omap2420_dss_rfbi_hwmod = { 973static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
965 .name = "dss_rfbi", 974 .name = "dss_rfbi",
966 .class = &omap2_rfbi_hwmod_class, 975 .class = &omap2_rfbi_hwmod_class,
@@ -972,6 +981,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
972 .module_offs = CORE_MOD, 981 .module_offs = CORE_MOD,
973 }, 982 },
974 }, 983 },
984 .opt_clks = dss_rfbi_opt_clks,
985 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
975 .slaves = omap2420_dss_rfbi_slaves, 986 .slaves = omap2420_dss_rfbi_slaves,
976 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves), 987 .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
977 .flags = HWMOD_NO_IDLEST, 988 .flags = HWMOD_NO_IDLEST,
@@ -981,7 +992,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
981static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { 992static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
982 .master = &omap2420_l4_core_hwmod, 993 .master = &omap2420_l4_core_hwmod,
983 .slave = &omap2420_dss_venc_hwmod, 994 .slave = &omap2420_dss_venc_hwmod,
984 .clk = "dss_54m_fck", 995 .clk = "dss_ick",
985 .addr = omap2_dss_venc_addrs, 996 .addr = omap2_dss_venc_addrs,
986 .fw = { 997 .fw = {
987 .omap2 = { 998 .omap2 = {
@@ -1001,7 +1012,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
1001static struct omap_hwmod omap2420_dss_venc_hwmod = { 1012static struct omap_hwmod omap2420_dss_venc_hwmod = {
1002 .name = "dss_venc", 1013 .name = "dss_venc",
1003 .class = &omap2_venc_hwmod_class, 1014 .class = &omap2_venc_hwmod_class,
1004 .main_clk = "dss1_fck", 1015 .main_clk = "dss_54m_fck",
1005 .prcm = { 1016 .prcm = {
1006 .omap2 = { 1017 .omap2 = {
1007 .prcm_reg_id = 1, 1018 .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index a2580d01c3ff..c4f56cb60d7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -942,6 +942,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
942}; 942};
943 943
944static struct omap_hwmod_opt_clk dss_opt_clks[] = { 944static struct omap_hwmod_opt_clk dss_opt_clks[] = {
945 /*
946 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
947 * driver does not use these clocks.
948 */
945 { .role = "tv_clk", .clk = "dss_54m_fck" }, 949 { .role = "tv_clk", .clk = "dss_54m_fck" },
946 { .role = "sys_clk", .clk = "dss2_fck" }, 950 { .role = "sys_clk", .clk = "dss2_fck" },
947}; 951};
@@ -966,7 +970,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
966 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves), 970 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
967 .masters = omap2430_dss_masters, 971 .masters = omap2430_dss_masters,
968 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters), 972 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
969 .flags = HWMOD_NO_IDLEST, 973 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
970}; 974};
971 975
972/* l4_core -> dss_dispc */ 976/* l4_core -> dss_dispc */
@@ -1000,6 +1004,7 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1000 .slaves = omap2430_dss_dispc_slaves, 1004 .slaves = omap2430_dss_dispc_slaves,
1001 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves), 1005 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1002 .flags = HWMOD_NO_IDLEST, 1006 .flags = HWMOD_NO_IDLEST,
1007 .dev_attr = &omap2_3_dss_dispc_dev_attr
1003}; 1008};
1004 1009
1005/* l4_core -> dss_rfbi */ 1010/* l4_core -> dss_rfbi */
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1016 &omap2430_l4_core__dss_rfbi, 1021 &omap2430_l4_core__dss_rfbi,
1017}; 1022};
1018 1023
1024static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1025 { .role = "ick", .clk = "dss_ick" },
1026};
1027
1019static struct omap_hwmod omap2430_dss_rfbi_hwmod = { 1028static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1020 .name = "dss_rfbi", 1029 .name = "dss_rfbi",
1021 .class = &omap2_rfbi_hwmod_class, 1030 .class = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1027 .module_offs = CORE_MOD, 1036 .module_offs = CORE_MOD,
1028 }, 1037 },
1029 }, 1038 },
1039 .opt_clks = dss_rfbi_opt_clks,
1040 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1030 .slaves = omap2430_dss_rfbi_slaves, 1041 .slaves = omap2430_dss_rfbi_slaves,
1031 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves), 1042 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1032 .flags = HWMOD_NO_IDLEST, 1043 .flags = HWMOD_NO_IDLEST,
@@ -1036,7 +1047,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1036static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { 1047static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1037 .master = &omap2430_l4_core_hwmod, 1048 .master = &omap2430_l4_core_hwmod,
1038 .slave = &omap2430_dss_venc_hwmod, 1049 .slave = &omap2430_dss_venc_hwmod,
1039 .clk = "dss_54m_fck", 1050 .clk = "dss_ick",
1040 .addr = omap2_dss_venc_addrs, 1051 .addr = omap2_dss_venc_addrs,
1041 .flags = OCPIF_SWSUP_IDLE, 1052 .flags = OCPIF_SWSUP_IDLE,
1042 .user = OCP_USER_MPU | OCP_USER_SDMA, 1053 .user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -1050,7 +1061,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1050static struct omap_hwmod omap2430_dss_venc_hwmod = { 1061static struct omap_hwmod omap2430_dss_venc_hwmod = {
1051 .name = "dss_venc", 1062 .name = "dss_venc",
1052 .class = &omap2_venc_hwmod_class, 1063 .class = &omap2_venc_hwmod_class,
1053 .main_clk = "dss1_fck", 1064 .main_clk = "dss_54m_fck",
1054 .prcm = { 1065 .prcm = {
1055 .omap2 = { 1066 .omap2 = {
1056 .prcm_reg_id = 1, 1067 .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c451729d289a..c11273da5dcc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,6 +11,7 @@
11#include <plat/omap_hwmod.h> 11#include <plat/omap_hwmod.h>
12#include <plat/serial.h> 12#include <plat/serial.h>
13#include <plat/dma.h> 13#include <plat/dma.h>
14#include <plat/common.h>
14 15
15#include <mach/irqs.h> 16#include <mach/irqs.h>
16 17
@@ -43,13 +44,15 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
43 .rev_offs = 0x0000, 44 .rev_offs = 0x0000,
44 .sysc_offs = 0x0010, 45 .sysc_offs = 0x0010,
45 .syss_offs = 0x0014, 46 .syss_offs = 0x0014,
46 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 47 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
48 SYSS_HAS_RESET_STATUS),
47 .sysc_fields = &omap_hwmod_sysc_type1, 49 .sysc_fields = &omap_hwmod_sysc_type1,
48}; 50};
49 51
50struct omap_hwmod_class omap2_dss_hwmod_class = { 52struct omap_hwmod_class omap2_dss_hwmod_class = {
51 .name = "dss", 53 .name = "dss",
52 .sysc = &omap2_dss_sysc, 54 .sysc = &omap2_dss_sysc,
55 .reset = omap_dss_reset,
53}; 56};
54 57
55/* 58/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index bc9035ec87fc..7f8915ad5099 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
1369}; 1369};
1370 1370
1371static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1371static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1372 { .role = "tv_clk", .clk = "dss_tv_fck" }, 1372 /*
1373 { .role = "video_clk", .clk = "dss_96m_fck" }, 1373 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
1374 * driver does not use these clocks.
1375 */
1374 { .role = "sys_clk", .clk = "dss2_alwon_fck" }, 1376 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1377 { .role = "tv_clk", .clk = "dss_tv_fck" },
1378 /* required only on OMAP3430 */
1379 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
1375}; 1380};
1376 1381
1377static struct omap_hwmod omap3430es1_dss_core_hwmod = { 1382static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1394 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), 1399 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
1395 .masters = omap3xxx_dss_masters, 1400 .masters = omap3xxx_dss_masters,
1396 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1401 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1397 .flags = HWMOD_NO_IDLEST, 1402 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1398}; 1403};
1399 1404
1400static struct omap_hwmod omap3xxx_dss_core_hwmod = { 1405static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1401 .name = "dss_core", 1406 .name = "dss_core",
1407 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1402 .class = &omap2_dss_hwmod_class, 1408 .class = &omap2_dss_hwmod_class,
1403 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1409 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1404 .sdma_reqs = omap3xxx_dss_sdma_chs, 1410 .sdma_reqs = omap3xxx_dss_sdma_chs,
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1456 .slaves = omap3xxx_dss_dispc_slaves, 1462 .slaves = omap3xxx_dss_dispc_slaves,
1457 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), 1463 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
1458 .flags = HWMOD_NO_IDLEST, 1464 .flags = HWMOD_NO_IDLEST,
1465 .dev_attr = &omap2_3_dss_dispc_dev_attr
1459}; 1466};
1460 1467
1461/* 1468/*
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
1486static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { 1493static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
1487 .master = &omap3xxx_l4_core_hwmod, 1494 .master = &omap3xxx_l4_core_hwmod,
1488 .slave = &omap3xxx_dss_dsi1_hwmod, 1495 .slave = &omap3xxx_dss_dsi1_hwmod,
1496 .clk = "dss_ick",
1489 .addr = omap3xxx_dss_dsi1_addrs, 1497 .addr = omap3xxx_dss_dsi1_addrs,
1490 .fw = { 1498 .fw = {
1491 .omap2 = { 1499 .omap2 = {
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
1502 &omap3xxx_l4_core__dss_dsi1, 1510 &omap3xxx_l4_core__dss_dsi1,
1503}; 1511};
1504 1512
1513static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
1514 { .role = "sys_clk", .clk = "dss2_alwon_fck" },
1515};
1516
1505static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { 1517static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1506 .name = "dss_dsi1", 1518 .name = "dss_dsi1",
1507 .class = &omap3xxx_dsi_hwmod_class, 1519 .class = &omap3xxx_dsi_hwmod_class,
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1514 .module_offs = OMAP3430_DSS_MOD, 1526 .module_offs = OMAP3430_DSS_MOD,
1515 }, 1527 },
1516 }, 1528 },
1529 .opt_clks = dss_dsi1_opt_clks,
1530 .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
1517 .slaves = omap3xxx_dss_dsi1_slaves, 1531 .slaves = omap3xxx_dss_dsi1_slaves,
1518 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), 1532 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1519 .flags = HWMOD_NO_IDLEST, 1533 .flags = HWMOD_NO_IDLEST,
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
1540 &omap3xxx_l4_core__dss_rfbi, 1554 &omap3xxx_l4_core__dss_rfbi,
1541}; 1555};
1542 1556
1557static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1558 { .role = "ick", .clk = "dss_ick" },
1559};
1560
1543static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { 1561static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1544 .name = "dss_rfbi", 1562 .name = "dss_rfbi",
1545 .class = &omap2_rfbi_hwmod_class, 1563 .class = &omap2_rfbi_hwmod_class,
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1551 .module_offs = OMAP3430_DSS_MOD, 1569 .module_offs = OMAP3430_DSS_MOD,
1552 }, 1570 },
1553 }, 1571 },
1572 .opt_clks = dss_rfbi_opt_clks,
1573 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1554 .slaves = omap3xxx_dss_rfbi_slaves, 1574 .slaves = omap3xxx_dss_rfbi_slaves,
1555 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), 1575 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1556 .flags = HWMOD_NO_IDLEST, 1576 .flags = HWMOD_NO_IDLEST,
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1560static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { 1580static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1561 .master = &omap3xxx_l4_core_hwmod, 1581 .master = &omap3xxx_l4_core_hwmod,
1562 .slave = &omap3xxx_dss_venc_hwmod, 1582 .slave = &omap3xxx_dss_venc_hwmod,
1563 .clk = "dss_tv_fck", 1583 .clk = "dss_ick",
1564 .addr = omap2_dss_venc_addrs, 1584 .addr = omap2_dss_venc_addrs,
1565 .fw = { 1585 .fw = {
1566 .omap2 = { 1586 .omap2 = {
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
1578 &omap3xxx_l4_core__dss_venc, 1598 &omap3xxx_l4_core__dss_venc,
1579}; 1599};
1580 1600
1601static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
1602 /* required only on OMAP3430 */
1603 { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
1604};
1605
1581static struct omap_hwmod omap3xxx_dss_venc_hwmod = { 1606static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1582 .name = "dss_venc", 1607 .name = "dss_venc",
1583 .class = &omap2_venc_hwmod_class, 1608 .class = &omap2_venc_hwmod_class,
1584 .main_clk = "dss1_alwon_fck", 1609 .main_clk = "dss_tv_fck",
1585 .prcm = { 1610 .prcm = {
1586 .omap2 = { 1611 .omap2 = {
1587 .prcm_reg_id = 1, 1612 .prcm_reg_id = 1,
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1589 .module_offs = OMAP3430_DSS_MOD, 1614 .module_offs = OMAP3430_DSS_MOD,
1590 }, 1615 },
1591 }, 1616 },
1617 .opt_clks = dss_venc_opt_clks,
1618 .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks),
1592 .slaves = omap3xxx_dss_venc_slaves, 1619 .slaves = omap3xxx_dss_venc_slaves,
1593 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), 1620 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1594 .flags = HWMOD_NO_IDLEST, 1621 .flags = HWMOD_NO_IDLEST,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7695e5d43316..daaf165af696 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,6 +30,7 @@
30#include <plat/mmc.h> 30#include <plat/mmc.h>
31#include <plat/i2c.h> 31#include <plat/i2c.h>
32#include <plat/dmtimer.h> 32#include <plat/dmtimer.h>
33#include <plat/common.h>
33 34
34#include "omap_hwmod_common_data.h" 35#include "omap_hwmod_common_data.h"
35 36
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
1187static struct omap_hwmod_class omap44xx_dss_hwmod_class = { 1188static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
1188 .name = "dss", 1189 .name = "dss",
1189 .sysc = &omap44xx_dss_sysc, 1190 .sysc = &omap44xx_dss_sysc,
1191 .reset = omap_dss_reset,
1190}; 1192};
1191 1193
1192/* dss */ 1194/* dss */
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
1240static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1242static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1241 { .role = "sys_clk", .clk = "dss_sys_clk" }, 1243 { .role = "sys_clk", .clk = "dss_sys_clk" },
1242 { .role = "tv_clk", .clk = "dss_tv_clk" }, 1244 { .role = "tv_clk", .clk = "dss_tv_clk" },
1243 { .role = "dss_clk", .clk = "dss_dss_clk" }, 1245 { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
1244 { .role = "video_clk", .clk = "dss_48mhz_clk" },
1245}; 1246};
1246 1247
1247static struct omap_hwmod omap44xx_dss_hwmod = { 1248static struct omap_hwmod omap44xx_dss_hwmod = {
1248 .name = "dss_core", 1249 .name = "dss_core",
1250 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1249 .class = &omap44xx_dss_hwmod_class, 1251 .class = &omap44xx_dss_hwmod_class,
1250 .clkdm_name = "l3_dss_clkdm", 1252 .clkdm_name = "l3_dss_clkdm",
1251 .main_clk = "dss_dss_clk", 1253 .main_clk = "dss_dss_clk",
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
1325 { } 1327 { }
1326}; 1328};
1327 1329
1330static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
1331 .manager_count = 3,
1332 .has_framedonetv_irq = 1
1333};
1334
1328/* l4_per -> dss_dispc */ 1335/* l4_per -> dss_dispc */
1329static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { 1336static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
1330 .master = &omap44xx_l4_per_hwmod, 1337 .master = &omap44xx_l4_per_hwmod,
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
1340 &omap44xx_l4_per__dss_dispc, 1347 &omap44xx_l4_per__dss_dispc,
1341}; 1348};
1342 1349
1343static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
1344 { .role = "sys_clk", .clk = "dss_sys_clk" },
1345 { .role = "tv_clk", .clk = "dss_tv_clk" },
1346 { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
1347};
1348
1349static struct omap_hwmod omap44xx_dss_dispc_hwmod = { 1350static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1350 .name = "dss_dispc", 1351 .name = "dss_dispc",
1351 .class = &omap44xx_dispc_hwmod_class, 1352 .class = &omap44xx_dispc_hwmod_class,
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1359 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, 1360 .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1360 }, 1361 },
1361 }, 1362 },
1362 .opt_clks = dss_dispc_opt_clks,
1363 .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks),
1364 .slaves = omap44xx_dss_dispc_slaves, 1363 .slaves = omap44xx_dss_dispc_slaves,
1365 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), 1364 .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
1365 .dev_attr = &omap44xx_dss_dispc_dev_attr
1366}; 1366};
1367 1367
1368/* 1368/*
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1624 .clkdm_name = "l3_dss_clkdm", 1624 .clkdm_name = "l3_dss_clkdm",
1625 .mpu_irqs = omap44xx_dss_hdmi_irqs, 1625 .mpu_irqs = omap44xx_dss_hdmi_irqs,
1626 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 1626 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1627 .main_clk = "dss_dss_clk", 1627 .main_clk = "dss_48mhz_clk",
1628 .prcm = { 1628 .prcm = {
1629 .omap4 = { 1629 .omap4 = {
1630 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, 1630 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1785 .name = "dss_venc", 1785 .name = "dss_venc",
1786 .class = &omap44xx_venc_hwmod_class, 1786 .class = &omap44xx_venc_hwmod_class,
1787 .clkdm_name = "l3_dss_clkdm", 1787 .clkdm_name = "l3_dss_clkdm",
1788 .main_clk = "dss_dss_clk", 1788 .main_clk = "dss_tv_clk",
1789 .prcm = { 1789 .prcm = {
1790 .omap4 = { 1790 .omap4 = {
1791 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, 1791 .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index de832ebc93a9..51e5418899fb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
49 .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, 49 .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
50}; 50};
51 51
52struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
53 .manager_count = 2,
54 .has_framedonetv_irq = 0
55};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 39a7c37f4587..ad5d8f04c0b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -16,6 +16,8 @@
16 16
17#include <plat/omap_hwmod.h> 17#include <plat/omap_hwmod.h>
18 18
19#include "display.h"
20
19/* Common address space across OMAP2xxx */ 21/* Common address space across OMAP2xxx */
20extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; 22extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
21extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; 23extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
@@ -111,4 +113,6 @@ extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
111extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; 113extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
112extern struct omap_hwmod_class omap2xxx_mcspi_class; 114extern struct omap_hwmod_class omap2xxx_mcspi_class;
113 115
116extern struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr;
117
114#endif 118#endif
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 6a66aa5e2a5b..d15225ff5c49 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev)
237static const struct of_device_id l3_noc_match[] = { 237static const struct of_device_id l3_noc_match[] = {
238 {.compatible = "ti,omap4-l3-noc", }, 238 {.compatible = "ti,omap4-l3-noc", },
239 {}, 239 {},
240} 240};
241MODULE_DEVICE_TABLE(of, l3_noc_match); 241MODULE_DEVICE_TABLE(of, l3_noc_match);
242#else 242#else
243#define l3_noc_match NULL 243#define l3_noc_match NULL
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1e79bdf313e3..00bff46ca48b 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -24,6 +24,7 @@
24#include "powerdomain.h" 24#include "powerdomain.h"
25#include "clockdomain.h" 25#include "clockdomain.h"
26#include "pm.h" 26#include "pm.h"
27#include "twl-common.h"
27 28
28static struct omap_device_pm_latency *pm_lats; 29static struct omap_device_pm_latency *pm_lats;
29 30
@@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init);
226 227
227static int __init omap2_common_pm_late_init(void) 228static int __init omap2_common_pm_late_init(void)
228{ 229{
229 /* Init the OMAP TWL parameters */
230 omap3_twl_init();
231 omap4_twl_init();
232
233 /* Init the voltage layer */ 230 /* Init the voltage layer */
231 omap_pmic_late_init();
234 omap_voltage_late_init(); 232 omap_voltage_late_init();
235 233
236 /* Initialize the voltages */ 234 /* Initialize the voltages */
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 6a4f6839a7d9..cf246b39bac7 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
139 sr_write_reg(sr_info, ERRCONFIG_V1, status); 139 sr_write_reg(sr_info, ERRCONFIG_V1, status);
140 } else if (sr_info->ip_type == SR_TYPE_V2) { 140 } else if (sr_info->ip_type == SR_TYPE_V2) {
141 /* Read the status bits */ 141 /* Read the status bits */
142 sr_read_reg(sr_info, IRQSTATUS); 142 status = sr_read_reg(sr_info, IRQSTATUS);
143 143
144 /* Clear them by writing back */ 144 /* Clear them by writing back */
145 sr_write_reg(sr_info, IRQSTATUS, status); 145 sr_write_reg(sr_info, IRQSTATUS, status);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 522435772168..10b20c652e5d 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -30,6 +30,7 @@
30#include <plat/usb.h> 30#include <plat/usb.h>
31 31
32#include "twl-common.h" 32#include "twl-common.h"
33#include "pm.h"
33 34
34static struct i2c_board_info __initdata pmic_i2c_board_info = { 35static struct i2c_board_info __initdata pmic_i2c_board_info = {
35 .addr = 0x48, 36 .addr = 0x48,
@@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate,
48 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); 49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
49} 50}
50 51
52void __init omap_pmic_late_init(void)
53{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq)
56 return;
57
58 omap3_twl_init();
59 omap4_twl_init();
60}
61
51#if defined(CONFIG_ARCH_OMAP3) 62#if defined(CONFIG_ARCH_OMAP3)
52static struct twl4030_usb_data omap3_usb_pdata = { 63static struct twl4030_usb_data omap3_usb_pdata = {
53 .usb_mode = T2_USB_MODE_ULPI, 64 .usb_mode = T2_USB_MODE_ULPI,
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 5e83a5bd37fb..275dde8cb27a 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -1,6 +1,8 @@
1#ifndef __OMAP_PMIC_COMMON__ 1#ifndef __OMAP_PMIC_COMMON__
2#define __OMAP_PMIC_COMMON__ 2#define __OMAP_PMIC_COMMON__
3 3
4#include <plat/irqs.h>
5
4#define TWL_COMMON_PDATA_USB (1 << 0) 6#define TWL_COMMON_PDATA_USB (1 << 0)
5#define TWL_COMMON_PDATA_BCI (1 << 1) 7#define TWL_COMMON_PDATA_BCI (1 << 1)
6#define TWL_COMMON_PDATA_MADC (1 << 2) 8#define TWL_COMMON_PDATA_MADC (1 << 2)
@@ -30,6 +32,7 @@ struct twl4030_platform_data;
30 32
31void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, 33void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
32 struct twl4030_platform_data *pmic_data); 34 struct twl4030_platform_data *pmic_data);
35void omap_pmic_late_init(void);
33 36
34static inline void omap2_pmic_init(const char *pmic_type, 37static inline void omap2_pmic_init(const char *pmic_type,
35 struct twl4030_platform_data *pmic_data) 38 struct twl4030_platform_data *pmic_data)
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index fc0b8544e174..4b81f59a4cba 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -307,7 +307,7 @@ static inline void balloon3_mmc_init(void) {}
307/****************************************************************************** 307/******************************************************************************
308 * USB Gadget 308 * USB Gadget
309 ******************************************************************************/ 309 ******************************************************************************/
310#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 310#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
311static void balloon3_udc_command(int cmd) 311static void balloon3_udc_command(int cmd)
312{ 312{
313 if (cmd == PXA2XX_UDC_CMD_CONNECT) 313 if (cmd == PXA2XX_UDC_CMD_CONNECT)
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ffc5586..d23b92b80488 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -146,7 +146,7 @@ static void __init colibri_pxa320_init_eth(void)
146static inline void __init colibri_pxa320_init_eth(void) {} 146static inline void __init colibri_pxa320_init_eth(void) {}
147#endif /* CONFIG_AX88796 */ 147#endif /* CONFIG_AX88796 */
148 148
149#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 149#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
150static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = { 150static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
151 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96), 151 .gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
152 .gpio_pullup = -1, 152 .gpio_pullup = -1,
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 9c8208ca0415..ffdd70dad327 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -106,7 +106,7 @@ static void __init gumstix_mmc_init(void)
106} 106}
107#endif 107#endif
108 108
109#ifdef CONFIG_USB_GADGET_PXA25X 109#ifdef CONFIG_USB_PXA25X
110static struct gpio_vbus_mach_info gumstix_udc_info = { 110static struct gpio_vbus_mach_info gumstix_udc_info = {
111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index f80bbe246afe..d4eac3d6ffb5 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -37,8 +37,8 @@ extern void __init palm27x_lcd_init(int power,
37#define palm27x_lcd_init(power, mode) do {} while (0) 37#define palm27x_lcd_init(power, mode) do {} while (0)
38#endif 38#endif
39 39
40#if defined(CONFIG_USB_GADGET_PXA27X) || \ 40#if defined(CONFIG_USB_PXA27X) || \
41 defined(CONFIG_USB_GADGET_PXA27X_MODULE) 41 defined(CONFIG_USB_PXA27X_MODULE)
42extern void __init palm27x_udc_init(int vbus, int pullup, 42extern void __init palm27x_udc_init(int vbus, int pullup,
43 int vbus_inverted); 43 int vbus_inverted);
44#else 44#else
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 325c245c0a0d..fbc10d7b95d1 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -164,8 +164,8 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
164/****************************************************************************** 164/******************************************************************************
165 * USB Gadget 165 * USB Gadget
166 ******************************************************************************/ 166 ******************************************************************************/
167#if defined(CONFIG_USB_GADGET_PXA27X) || \ 167#if defined(CONFIG_USB_PXA27X) || \
168 defined(CONFIG_USB_GADGET_PXA27X_MODULE) 168 defined(CONFIG_USB_PXA27X_MODULE)
169static struct gpio_vbus_mach_info palm27x_udc_info = { 169static struct gpio_vbus_mach_info palm27x_udc_info = {
170 .gpio_vbus_inverted = 1, 170 .gpio_vbus_inverted = 1,
171}; 171};
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 6ec7caefb37c..2c24c67fd92b 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -338,7 +338,7 @@ static inline void palmtc_mkp_init(void) {}
338/****************************************************************************** 338/******************************************************************************
339 * UDC 339 * UDC
340 ******************************************************************************/ 340 ******************************************************************************/
341#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE) 341#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE)
342static struct gpio_vbus_mach_info palmtc_udc_info = { 342static struct gpio_vbus_mach_info palmtc_udc_info = {
343 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N, 343 .gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
344 .gpio_vbus_inverted = 1, 344 .gpio_vbus_inverted = 1,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6ed1ff..ca0c6615028c 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -343,7 +343,7 @@ static inline void vpac270_uhc_init(void) {}
343/****************************************************************************** 343/******************************************************************************
344 * USB Gadget 344 * USB Gadget
345 ******************************************************************************/ 345 ******************************************************************************/
346#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE) 346#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
347static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = { 347static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
348 .gpio_vbus = GPIO41_VPAC270_UDC_DETECT, 348 .gpio_vbus = GPIO41_VPAC270_UDC_DETECT,
349 .gpio_pullup = -1, 349 .gpio_pullup = -1,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 66668565ee75..f208154b1382 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -8,7 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <linux/module.h> 11#include <linux/export.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14 14
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83b745a5e1b7..c75f254abd85 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode {
85}; 85};
86 86
87extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); 87extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
88extern void (*imx_idle)(void);
89extern void imx_print_silicon_rev(const char *cpu, int srev); 88extern void imx_print_silicon_rev(const char *cpu, int srev);
90 89
91void avic_handle_irq(struct pt_regs *); 90void avic_handle_irq(struct pt_regs *);
@@ -133,4 +132,5 @@ extern void imx53_qsb_common_init(void);
133extern void imx53_smd_common_init(void); 132extern void imx53_smd_common_init(void);
134extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 133extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
135extern void imx6q_pm_init(void); 134extern void imx6q_pm_init(void);
135extern void imx6q_clock_map_io(void);
136#endif 136#endif
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 00a78193c681..a4d36d601d55 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -50,20 +50,6 @@
50#define IMX_CHIP_REVISION_3_3 0x33 50#define IMX_CHIP_REVISION_3_3 0x33
51#define IMX_CHIP_REVISION_UNKNOWN 0xff 51#define IMX_CHIP_REVISION_UNKNOWN 0xff
52 52
53#define IMX_CHIP_REVISION_1_0_STRING "1.0"
54#define IMX_CHIP_REVISION_1_1_STRING "1.1"
55#define IMX_CHIP_REVISION_1_2_STRING "1.2"
56#define IMX_CHIP_REVISION_1_3_STRING "1.3"
57#define IMX_CHIP_REVISION_2_0_STRING "2.0"
58#define IMX_CHIP_REVISION_2_1_STRING "2.1"
59#define IMX_CHIP_REVISION_2_2_STRING "2.2"
60#define IMX_CHIP_REVISION_2_3_STRING "2.3"
61#define IMX_CHIP_REVISION_3_0_STRING "3.0"
62#define IMX_CHIP_REVISION_3_1_STRING "3.1"
63#define IMX_CHIP_REVISION_3_2_STRING "3.2"
64#define IMX_CHIP_REVISION_3_3_STRING "3.3"
65#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
66
67#ifndef __ASSEMBLY__ 53#ifndef __ASSEMBLY__
68extern unsigned int __mxc_cpu_type; 54extern unsigned int __mxc_cpu_type;
69#endif 55#endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index cf88b3593fba..b9895d250167 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,14 +17,9 @@
17#ifndef __ASM_ARCH_MXC_SYSTEM_H__ 17#ifndef __ASM_ARCH_MXC_SYSTEM_H__
18#define __ASM_ARCH_MXC_SYSTEM_H__ 18#define __ASM_ARCH_MXC_SYSTEM_H__
19 19
20extern void (*imx_idle)(void);
21
22static inline void arch_idle(void) 20static inline void arch_idle(void)
23{ 21{
24 if (imx_idle != NULL) 22 cpu_do_idle();
25 (imx_idle)();
26 else
27 cpu_do_idle();
28} 23}
29 24
30void arch_reset(char mode, const char *cmd); 25void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 9dad8dcc2ea9..d65fb31a55ca 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/module.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
26#include <mach/common.h> 27#include <mach/common.h>
@@ -28,8 +29,8 @@
28#include <asm/system.h> 29#include <asm/system.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30 31
31void (*imx_idle)(void) = NULL;
32void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL; 32void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
33EXPORT_SYMBOL_GPL(imx_ioremap);
33 34
34static void __iomem *wdog_base; 35static void __iomem *wdog_base;
35 36
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 197ca03c3f7d..eb73ab40e955 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -165,8 +165,8 @@ struct dpll_data {
165 u8 auto_recal_bit; 165 u8 auto_recal_bit;
166 u8 recal_en_bit; 166 u8 recal_en_bit;
167 u8 recal_st_bit; 167 u8 recal_st_bit;
168 u8 flags;
169# endif 168# endif
169 u8 flags;
170}; 170};
171 171
172#endif 172#endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index c50df4814f6f..3ff3e36580f2 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -30,6 +30,7 @@
30#include <linux/delay.h> 30#include <linux/delay.h>
31 31
32#include <plat/i2c.h> 32#include <plat/i2c.h>
33#include <plat/omap_hwmod.h>
33 34
34struct sys_timer; 35struct sys_timer;
35 36
@@ -55,6 +56,8 @@ void am35xx_init_early(void);
55void ti816x_init_early(void); 56void ti816x_init_early(void);
56void omap4430_init_early(void); 57void omap4430_init_early(void);
57 58
59extern int omap_dss_reset(struct omap_hwmod *);
60
58void omap_sram_init(void); 61void omap_sram_init(void);
59 62
60/* 63/*
diff --git a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
index a9276667c2fb..c7adad0e8de0 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
@@ -12,7 +12,7 @@
12*/ 12*/
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/module.h> 15#include <linux/export.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/cpufreq.h> 18#include <linux/cpufreq.h>
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index e1cbc728c775..c8bec9c7655d 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -11,6 +11,7 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/export.h>
14 15
15#include <asm/pgtable.h> 16#include <asm/pgtable.h>
16 17
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index d48245bb02b3..df8155b9d4d1 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -24,6 +24,8 @@
24#ifndef __PLAT_GPIO_CFG_H 24#ifndef __PLAT_GPIO_CFG_H
25#define __PLAT_GPIO_CFG_H __FILE__ 25#define __PLAT_GPIO_CFG_H __FILE__
26 26
27#include<linux/types.h>
28
27typedef unsigned int __bitwise__ samsung_gpio_pull_t; 29typedef unsigned int __bitwise__ samsung_gpio_pull_t;
28typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; 30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
29 31
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c
index efe1d564473e..312b510d86b7 100644
--- a/arch/arm/plat-samsung/pd.c
+++ b/arch/arm/plat-samsung/pd.c
@@ -11,7 +11,7 @@
11*/ 11*/
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/module.h> 14#include <linux/export.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/pm_runtime.h> 17#include <linux/pm_runtime.h>
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index dc1185dcf80d..c559d8438c70 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -11,7 +11,7 @@
11 * the Free Software Foundation; either version 2 of the License. 11 * the Free Software Foundation; either version 2 of the License.
12*/ 12*/
13 13
14#include <linux/module.h> 14#include <linux/export.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 5bdeef969847..ccbe16f47227 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1123,5 +1123,6 @@ blissc MACH_BLISSC BLISSC 3491
1123thales_adc MACH_THALES_ADC THALES_ADC 3492 1123thales_adc MACH_THALES_ADC THALES_ADC 3492
1124ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 1124ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493
1125atdgp318 MACH_ATDGP318 ATDGP318 3494 1125atdgp318 MACH_ATDGP318 ATDGP318 3494
1126m28evk MACH_M28EVK M28EVK 3613
1126smdk4212 MACH_SMDK4212 SMDK4212 3638 1127smdk4212 MACH_SMDK4212 SMDK4212 3638
1127smdk4412 MACH_SMDK4412 SMDK4412 3765 1128smdk4412 MACH_SMDK4412 SMDK4412 3765
diff --git a/arch/powerpc/boot/dts/p1023rds.dts b/arch/powerpc/boot/dts/p1023rds.dts
index d9b776740a67..d3b478242ea9 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -449,6 +449,7 @@
449 interrupt-parent = <&mpic>; 449 interrupt-parent = <&mpic>;
450 interrupts = <16 2>; 450 interrupts = <16 2>;
451 interrupt-map-mask = <0xf800 0 0 7>; 451 interrupt-map-mask = <0xf800 0 0 7>;
452 /* IRQ[0:3] are pulled up on board, set to active-low */
452 interrupt-map = < 453 interrupt-map = <
453 /* IDSEL 0x0 */ 454 /* IDSEL 0x0 */
454 0000 0 0 1 &mpic 0 1 455 0000 0 0 1 &mpic 0 1
@@ -488,11 +489,15 @@
488 interrupt-parent = <&mpic>; 489 interrupt-parent = <&mpic>;
489 interrupts = <16 2>; 490 interrupts = <16 2>;
490 interrupt-map-mask = <0xf800 0 0 7>; 491 interrupt-map-mask = <0xf800 0 0 7>;
492 /*
493 * IRQ[4:6] only for PCIe, set to active-high,
494 * IRQ[7] is pulled up on board, set to active-low
495 */
491 interrupt-map = < 496 interrupt-map = <
492 /* IDSEL 0x0 */ 497 /* IDSEL 0x0 */
493 0000 0 0 1 &mpic 4 1 498 0000 0 0 1 &mpic 4 2
494 0000 0 0 2 &mpic 5 1 499 0000 0 0 2 &mpic 5 2
495 0000 0 0 3 &mpic 6 1 500 0000 0 0 3 &mpic 6 2
496 0000 0 0 4 &mpic 7 1 501 0000 0 0 4 &mpic 7 1
497 >; 502 >;
498 ranges = <0x2000000 0x0 0xa0000000 503 ranges = <0x2000000 0x0 0xa0000000
@@ -527,12 +532,16 @@
527 interrupt-parent = <&mpic>; 532 interrupt-parent = <&mpic>;
528 interrupts = <16 2>; 533 interrupts = <16 2>;
529 interrupt-map-mask = <0xf800 0 0 7>; 534 interrupt-map-mask = <0xf800 0 0 7>;
535 /*
536 * IRQ[8:10] are pulled up on board, set to active-low
537 * IRQ[11] only for PCIe, set to active-high,
538 */
530 interrupt-map = < 539 interrupt-map = <
531 /* IDSEL 0x0 */ 540 /* IDSEL 0x0 */
532 0000 0 0 1 &mpic 8 1 541 0000 0 0 1 &mpic 8 1
533 0000 0 0 2 &mpic 9 1 542 0000 0 0 2 &mpic 9 1
534 0000 0 0 3 &mpic 10 1 543 0000 0 0 3 &mpic 10 1
535 0000 0 0 4 &mpic 11 1 544 0000 0 0 4 &mpic 11 2
536 >; 545 >;
537 ranges = <0x2000000 0x0 0x80000000 546 ranges = <0x2000000 0x0 0x80000000
538 0x2000000 0x0 0x80000000 547 0x2000000 0x0 0x80000000
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index 6cdf1c0d2c8a..3b98d7354341 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -52,6 +52,8 @@ CONFIG_MTD_CFI=y
52CONFIG_MTD_JEDECPROBE=y 52CONFIG_MTD_JEDECPROBE=y
53CONFIG_MTD_CFI_AMDSTD=y 53CONFIG_MTD_CFI_AMDSTD=y
54CONFIG_MTD_PHYSMAP_OF=y 54CONFIG_MTD_PHYSMAP_OF=y
55CONFIG_MTD_NAND=m
56CONFIG_MTD_NAND_NDFC=m
55CONFIG_MTD_UBI=m 57CONFIG_MTD_UBI=m
56CONFIG_MTD_UBI_GLUEBI=m 58CONFIG_MTD_UBI_GLUEBI=m
57CONFIG_PROC_DEVICETREE=y 59CONFIG_PROC_DEVICETREE=y
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 5964371303ac..8558b572e55d 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -15,6 +15,7 @@
15#include <linux/of_fdt.h> 15#include <linux/of_fdt.h>
16#include <linux/memblock.h> 16#include <linux/memblock.h>
17#include <linux/bootmem.h> 17#include <linux/bootmem.h>
18#include <linux/moduleparam.h>
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/pgalloc.h> 20#include <asm/pgalloc.h>
20#include <asm/tlb.h> 21#include <asm/tlb.h>
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 45023e26aea3..d7946be298b6 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -203,7 +203,7 @@ config P3060_QDS
203 select PPC_E500MC 203 select PPC_E500MC
204 select PHYS_64BIT 204 select PHYS_64BIT
205 select SWIOTLB 205 select SWIOTLB
206 select MPC8xxx_GPIO 206 select GPIO_MPC8XXX
207 select HAS_RAPIDIO 207 select HAS_RAPIDIO
208 select PPC_EPAPR_HV_PIC 208 select PPC_EPAPR_HV_PIC
209 help 209 help
diff --git a/arch/powerpc/platforms/85xx/p3060_qds.c b/arch/powerpc/platforms/85xx/p3060_qds.c
index 01dcf44871e9..081cf4ac1881 100644
--- a/arch/powerpc/platforms/85xx/p3060_qds.c
+++ b/arch/powerpc/platforms/85xx/p3060_qds.c
@@ -70,7 +70,7 @@ define_machine(p3060_qds) {
70 .power_save = e500_idle, 70 .power_save = e500_idle,
71}; 71};
72 72
73machine_device_initcall(p3060_qds, declare_of_platform_devices); 73machine_device_initcall(p3060_qds, corenet_ds_publish_devices);
74 74
75#ifdef CONFIG_SWIOTLB 75#ifdef CONFIG_SWIOTLB
76machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier); 76machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c
index af1a5df46b3e..b6731e4a6646 100644
--- a/arch/powerpc/sysdev/ehv_pic.c
+++ b/arch/powerpc/sysdev/ehv_pic.c
@@ -280,6 +280,7 @@ void __init ehv_pic_init(void)
280 280
281 if (!ehv_pic->irqhost) { 281 if (!ehv_pic->irqhost) {
282 of_node_put(np); 282 of_node_put(np);
283 kfree(ehv_pic);
283 return; 284 return;
284 } 285 }
285 286
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index c4d96fa32ba5..d5c3c90ee698 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -328,6 +328,7 @@ static int __devinit fsl_lbc_ctrl_probe(struct platform_device *dev)
328err: 328err:
329 iounmap(fsl_lbc_ctrl_dev->regs); 329 iounmap(fsl_lbc_ctrl_dev->regs);
330 kfree(fsl_lbc_ctrl_dev); 330 kfree(fsl_lbc_ctrl_dev);
331 fsl_lbc_ctrl_dev = NULL;
331 return ret; 332 return ret;
332} 333}
333 334
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 3363fbc964f8..ceb09cbd2329 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -216,7 +216,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
216 /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says 216 /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
217 that the BRG divisor must be even if you're not using divide-by-16 217 that the BRG divisor must be even if you're not using divide-by-16
218 mode. */ 218 mode. */
219 if (!div16 && (divisor & 1)) 219 if (!div16 && (divisor & 1) && (divisor > 3))
220 divisor++; 220 divisor++;
221 221
222 tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | 222 tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
diff --git a/drivers/acpi/apei/erst.c b/drivers/acpi/apei/erst.c
index 127408069ca7..631b9477b99c 100644
--- a/drivers/acpi/apei/erst.c
+++ b/drivers/acpi/apei/erst.c
@@ -932,7 +932,8 @@ static int erst_check_table(struct acpi_table_erst *erst_tab)
932static int erst_open_pstore(struct pstore_info *psi); 932static int erst_open_pstore(struct pstore_info *psi);
933static int erst_close_pstore(struct pstore_info *psi); 933static int erst_close_pstore(struct pstore_info *psi);
934static ssize_t erst_reader(u64 *id, enum pstore_type_id *type, 934static ssize_t erst_reader(u64 *id, enum pstore_type_id *type,
935 struct timespec *time, struct pstore_info *psi); 935 struct timespec *time, char **buf,
936 struct pstore_info *psi);
936static int erst_writer(enum pstore_type_id type, u64 *id, unsigned int part, 937static int erst_writer(enum pstore_type_id type, u64 *id, unsigned int part,
937 size_t size, struct pstore_info *psi); 938 size_t size, struct pstore_info *psi);
938static int erst_clearer(enum pstore_type_id type, u64 id, 939static int erst_clearer(enum pstore_type_id type, u64 id,
@@ -986,17 +987,23 @@ static int erst_close_pstore(struct pstore_info *psi)
986} 987}
987 988
988static ssize_t erst_reader(u64 *id, enum pstore_type_id *type, 989static ssize_t erst_reader(u64 *id, enum pstore_type_id *type,
989 struct timespec *time, struct pstore_info *psi) 990 struct timespec *time, char **buf,
991 struct pstore_info *psi)
990{ 992{
991 int rc; 993 int rc;
992 ssize_t len = 0; 994 ssize_t len = 0;
993 u64 record_id; 995 u64 record_id;
994 struct cper_pstore_record *rcd = (struct cper_pstore_record *) 996 struct cper_pstore_record *rcd;
995 (erst_info.buf - sizeof(*rcd)); 997 size_t rcd_len = sizeof(*rcd) + erst_info.bufsize;
996 998
997 if (erst_disable) 999 if (erst_disable)
998 return -ENODEV; 1000 return -ENODEV;
999 1001
1002 rcd = kmalloc(rcd_len, GFP_KERNEL);
1003 if (!rcd) {
1004 rc = -ENOMEM;
1005 goto out;
1006 }
1000skip: 1007skip:
1001 rc = erst_get_record_id_next(&reader_pos, &record_id); 1008 rc = erst_get_record_id_next(&reader_pos, &record_id);
1002 if (rc) 1009 if (rc)
@@ -1004,22 +1011,27 @@ skip:
1004 1011
1005 /* no more record */ 1012 /* no more record */
1006 if (record_id == APEI_ERST_INVALID_RECORD_ID) { 1013 if (record_id == APEI_ERST_INVALID_RECORD_ID) {
1007 rc = -1; 1014 rc = -EINVAL;
1008 goto out; 1015 goto out;
1009 } 1016 }
1010 1017
1011 len = erst_read(record_id, &rcd->hdr, sizeof(*rcd) + 1018 len = erst_read(record_id, &rcd->hdr, rcd_len);
1012 erst_info.bufsize);
1013 /* The record may be cleared by others, try read next record */ 1019 /* The record may be cleared by others, try read next record */
1014 if (len == -ENOENT) 1020 if (len == -ENOENT)
1015 goto skip; 1021 goto skip;
1016 else if (len < 0) { 1022 else if (len < sizeof(*rcd)) {
1017 rc = -1; 1023 rc = -EIO;
1018 goto out; 1024 goto out;
1019 } 1025 }
1020 if (uuid_le_cmp(rcd->hdr.creator_id, CPER_CREATOR_PSTORE) != 0) 1026 if (uuid_le_cmp(rcd->hdr.creator_id, CPER_CREATOR_PSTORE) != 0)
1021 goto skip; 1027 goto skip;
1022 1028
1029 *buf = kmalloc(len, GFP_KERNEL);
1030 if (*buf == NULL) {
1031 rc = -ENOMEM;
1032 goto out;
1033 }
1034 memcpy(*buf, rcd->data, len - sizeof(*rcd));
1023 *id = record_id; 1035 *id = record_id;
1024 if (uuid_le_cmp(rcd->sec_hdr.section_type, 1036 if (uuid_le_cmp(rcd->sec_hdr.section_type,
1025 CPER_SECTION_TYPE_DMESG) == 0) 1037 CPER_SECTION_TYPE_DMESG) == 0)
@@ -1037,6 +1049,7 @@ skip:
1037 time->tv_nsec = 0; 1049 time->tv_nsec = 0;
1038 1050
1039out: 1051out:
1052 kfree(rcd);
1040 return (rc < 0) ? rc : (len - sizeof(*rcd)); 1053 return (rc < 0) ? rc : (len - sizeof(*rcd));
1041} 1054}
1042 1055
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index 5c6f56f21443..dcd8babae9eb 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -343,11 +343,13 @@ static void mv_process_hash_current(int first_block)
343 else 343 else
344 op.config |= CFG_MID_FRAG; 344 op.config |= CFG_MID_FRAG;
345 345
346 writel(req_ctx->state[0], cpg->reg + DIGEST_INITIAL_VAL_A); 346 if (first_block) {
347 writel(req_ctx->state[1], cpg->reg + DIGEST_INITIAL_VAL_B); 347 writel(req_ctx->state[0], cpg->reg + DIGEST_INITIAL_VAL_A);
348 writel(req_ctx->state[2], cpg->reg + DIGEST_INITIAL_VAL_C); 348 writel(req_ctx->state[1], cpg->reg + DIGEST_INITIAL_VAL_B);
349 writel(req_ctx->state[3], cpg->reg + DIGEST_INITIAL_VAL_D); 349 writel(req_ctx->state[2], cpg->reg + DIGEST_INITIAL_VAL_C);
350 writel(req_ctx->state[4], cpg->reg + DIGEST_INITIAL_VAL_E); 350 writel(req_ctx->state[3], cpg->reg + DIGEST_INITIAL_VAL_D);
351 writel(req_ctx->state[4], cpg->reg + DIGEST_INITIAL_VAL_E);
352 }
351 } 353 }
352 354
353 memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config)); 355 memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config));
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 8af8e864a9cf..73464a62adf7 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -1128,7 +1128,7 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
1128 { .compatible = "fsl,p1020-memory-controller", }, 1128 { .compatible = "fsl,p1020-memory-controller", },
1129 { .compatible = "fsl,p1021-memory-controller", }, 1129 { .compatible = "fsl,p1021-memory-controller", },
1130 { .compatible = "fsl,p2020-memory-controller", }, 1130 { .compatible = "fsl,p2020-memory-controller", },
1131 { .compatible = "fsl,p4080-memory-controller", }, 1131 { .compatible = "fsl,qoriq-memory-controller", },
1132 {}, 1132 {},
1133}; 1133};
1134MODULE_DEVICE_TABLE(of, mpc85xx_mc_err_of_match); 1134MODULE_DEVICE_TABLE(of, mpc85xx_mc_err_of_match);
diff --git a/drivers/firmware/efivars.c b/drivers/firmware/efivars.c
index 8370f72d87ff..b0a81173a268 100644
--- a/drivers/firmware/efivars.c
+++ b/drivers/firmware/efivars.c
@@ -457,7 +457,8 @@ static int efi_pstore_close(struct pstore_info *psi)
457} 457}
458 458
459static ssize_t efi_pstore_read(u64 *id, enum pstore_type_id *type, 459static ssize_t efi_pstore_read(u64 *id, enum pstore_type_id *type,
460 struct timespec *timespec, struct pstore_info *psi) 460 struct timespec *timespec,
461 char **buf, struct pstore_info *psi)
461{ 462{
462 efi_guid_t vendor = LINUX_EFI_CRASH_GUID; 463 efi_guid_t vendor = LINUX_EFI_CRASH_GUID;
463 struct efivars *efivars = psi->data; 464 struct efivars *efivars = psi->data;
@@ -478,7 +479,11 @@ static ssize_t efi_pstore_read(u64 *id, enum pstore_type_id *type,
478 timespec->tv_nsec = 0; 479 timespec->tv_nsec = 0;
479 get_var_data_locked(efivars, &efivars->walk_entry->var); 480 get_var_data_locked(efivars, &efivars->walk_entry->var);
480 size = efivars->walk_entry->var.DataSize; 481 size = efivars->walk_entry->var.DataSize;
481 memcpy(psi->buf, efivars->walk_entry->var.Data, size); 482 *buf = kmalloc(size, GFP_KERNEL);
483 if (*buf == NULL)
484 return -ENOMEM;
485 memcpy(*buf, efivars->walk_entry->var.Data,
486 size);
482 efivars->walk_entry = list_entry(efivars->walk_entry->list.next, 487 efivars->walk_entry = list_entry(efivars->walk_entry->list.next,
483 struct efivar_entry, list); 488 struct efivar_entry, list);
484 return size; 489 return size;
@@ -576,7 +581,8 @@ static int efi_pstore_close(struct pstore_info *psi)
576} 581}
577 582
578static ssize_t efi_pstore_read(u64 *id, enum pstore_type_id *type, 583static ssize_t efi_pstore_read(u64 *id, enum pstore_type_id *type,
579 struct timespec *time, struct pstore_info *psi) 584 struct timespec *timespec,
585 char **buf, struct pstore_info *psi)
580{ 586{
581 return -1; 587 return -1;
582} 588}
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 147df8ae79db..d3f3e8f54561 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -546,7 +546,7 @@ static void pca953x_irq_teardown(struct pca953x_chip *chip)
546 * Translate OpenFirmware node properties into platform_data 546 * Translate OpenFirmware node properties into platform_data
547 * WARNING: This is DEPRECATED and will be removed eventually! 547 * WARNING: This is DEPRECATED and will be removed eventually!
548 */ 548 */
549void 549static void
550pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert) 550pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
551{ 551{
552 struct device_node *node; 552 struct device_node *node;
@@ -574,7 +574,7 @@ pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
574 *invert = *val; 574 *invert = *val;
575} 575}
576#else 576#else
577void 577static void
578pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert) 578pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
579{ 579{
580 *gpio_base = -1; 580 *gpio_base = -1;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.c b/drivers/gpu/drm/exynos/exynos_drm_buf.c
index 6f8afea94fc9..2bb07bca511a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.c
@@ -27,82 +27,84 @@
27#include "drm.h" 27#include "drm.h"
28 28
29#include "exynos_drm_drv.h" 29#include "exynos_drm_drv.h"
30#include "exynos_drm_gem.h"
30#include "exynos_drm_buf.h" 31#include "exynos_drm_buf.h"
31 32
32static DEFINE_MUTEX(exynos_drm_buf_lock);
33
34static int lowlevel_buffer_allocate(struct drm_device *dev, 33static int lowlevel_buffer_allocate(struct drm_device *dev,
35 struct exynos_drm_buf_entry *entry) 34 struct exynos_drm_gem_buf *buffer)
36{ 35{
37 DRM_DEBUG_KMS("%s\n", __FILE__); 36 DRM_DEBUG_KMS("%s\n", __FILE__);
38 37
39 entry->vaddr = dma_alloc_writecombine(dev->dev, entry->size, 38 buffer->kvaddr = dma_alloc_writecombine(dev->dev, buffer->size,
40 (dma_addr_t *)&entry->paddr, GFP_KERNEL); 39 &buffer->dma_addr, GFP_KERNEL);
41 if (!entry->paddr) { 40 if (!buffer->kvaddr) {
42 DRM_ERROR("failed to allocate buffer.\n"); 41 DRM_ERROR("failed to allocate buffer.\n");
43 return -ENOMEM; 42 return -ENOMEM;
44 } 43 }
45 44
46 DRM_DEBUG_KMS("allocated : vaddr(0x%x), paddr(0x%x), size(0x%x)\n", 45 DRM_DEBUG_KMS("vaddr(0x%lx), dma_addr(0x%lx), size(0x%lx)\n",
47 (unsigned int)entry->vaddr, entry->paddr, entry->size); 46 (unsigned long)buffer->kvaddr,
47 (unsigned long)buffer->dma_addr,
48 buffer->size);
48 49
49 return 0; 50 return 0;
50} 51}
51 52
52static void lowlevel_buffer_deallocate(struct drm_device *dev, 53static void lowlevel_buffer_deallocate(struct drm_device *dev,
53 struct exynos_drm_buf_entry *entry) 54 struct exynos_drm_gem_buf *buffer)
54{ 55{
55 DRM_DEBUG_KMS("%s.\n", __FILE__); 56 DRM_DEBUG_KMS("%s.\n", __FILE__);
56 57
57 if (entry->paddr && entry->vaddr && entry->size) 58 if (buffer->dma_addr && buffer->size)
58 dma_free_writecombine(dev->dev, entry->size, entry->vaddr, 59 dma_free_writecombine(dev->dev, buffer->size, buffer->kvaddr,
59 entry->paddr); 60 (dma_addr_t)buffer->dma_addr);
60 else 61 else
61 DRM_DEBUG_KMS("entry data is null.\n"); 62 DRM_DEBUG_KMS("buffer data are invalid.\n");
62} 63}
63 64
64struct exynos_drm_buf_entry *exynos_drm_buf_create(struct drm_device *dev, 65struct exynos_drm_gem_buf *exynos_drm_buf_create(struct drm_device *dev,
65 unsigned int size) 66 unsigned int size)
66{ 67{
67 struct exynos_drm_buf_entry *entry; 68 struct exynos_drm_gem_buf *buffer;
68 69
69 DRM_DEBUG_KMS("%s.\n", __FILE__); 70 DRM_DEBUG_KMS("%s.\n", __FILE__);
71 DRM_DEBUG_KMS("desired size = 0x%x\n", size);
70 72
71 entry = kzalloc(sizeof(*entry), GFP_KERNEL); 73 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
72 if (!entry) { 74 if (!buffer) {
73 DRM_ERROR("failed to allocate exynos_drm_buf_entry.\n"); 75 DRM_ERROR("failed to allocate exynos_drm_gem_buf.\n");
74 return ERR_PTR(-ENOMEM); 76 return ERR_PTR(-ENOMEM);
75 } 77 }
76 78
77 entry->size = size; 79 buffer->size = size;
78 80
79 /* 81 /*
80 * allocate memory region with size and set the memory information 82 * allocate memory region with size and set the memory information
81 * to vaddr and paddr of a entry object. 83 * to vaddr and dma_addr of a buffer object.
82 */ 84 */
83 if (lowlevel_buffer_allocate(dev, entry) < 0) { 85 if (lowlevel_buffer_allocate(dev, buffer) < 0) {
84 kfree(entry); 86 kfree(buffer);
85 entry = NULL; 87 buffer = NULL;
86 return ERR_PTR(-ENOMEM); 88 return ERR_PTR(-ENOMEM);
87 } 89 }
88 90
89 return entry; 91 return buffer;
90} 92}
91 93
92void exynos_drm_buf_destroy(struct drm_device *dev, 94void exynos_drm_buf_destroy(struct drm_device *dev,
93 struct exynos_drm_buf_entry *entry) 95 struct exynos_drm_gem_buf *buffer)
94{ 96{
95 DRM_DEBUG_KMS("%s.\n", __FILE__); 97 DRM_DEBUG_KMS("%s.\n", __FILE__);
96 98
97 if (!entry) { 99 if (!buffer) {
98 DRM_DEBUG_KMS("entry is null.\n"); 100 DRM_DEBUG_KMS("buffer is null.\n");
99 return; 101 return;
100 } 102 }
101 103
102 lowlevel_buffer_deallocate(dev, entry); 104 lowlevel_buffer_deallocate(dev, buffer);
103 105
104 kfree(entry); 106 kfree(buffer);
105 entry = NULL; 107 buffer = NULL;
106} 108}
107 109
108MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>"); 110MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.h b/drivers/gpu/drm/exynos/exynos_drm_buf.h
index 045d59eab01a..6e91f9caa5db 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.h
@@ -26,28 +26,15 @@
26#ifndef _EXYNOS_DRM_BUF_H_ 26#ifndef _EXYNOS_DRM_BUF_H_
27#define _EXYNOS_DRM_BUF_H_ 27#define _EXYNOS_DRM_BUF_H_
28 28
29/*
30 * exynos drm buffer entry structure.
31 *
32 * @paddr: physical address of allocated memory.
33 * @vaddr: kernel virtual address of allocated memory.
34 * @size: size of allocated memory.
35 */
36struct exynos_drm_buf_entry {
37 dma_addr_t paddr;
38 void __iomem *vaddr;
39 unsigned int size;
40};
41
42/* allocate physical memory. */ 29/* allocate physical memory. */
43struct exynos_drm_buf_entry *exynos_drm_buf_create(struct drm_device *dev, 30struct exynos_drm_gem_buf *exynos_drm_buf_create(struct drm_device *dev,
44 unsigned int size); 31 unsigned int size);
45 32
46/* get physical memory information of a drm framebuffer. */ 33/* get memory information of a drm framebuffer. */
47struct exynos_drm_buf_entry *exynos_drm_fb_get_buf(struct drm_framebuffer *fb); 34struct exynos_drm_gem_buf *exynos_drm_fb_get_buf(struct drm_framebuffer *fb);
48 35
49/* remove allocated physical memory. */ 36/* remove allocated physical memory. */
50void exynos_drm_buf_destroy(struct drm_device *dev, 37void exynos_drm_buf_destroy(struct drm_device *dev,
51 struct exynos_drm_buf_entry *entry); 38 struct exynos_drm_gem_buf *buffer);
52 39
53#endif 40#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c
index 985d9e768728..d620b0784257 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c
@@ -37,6 +37,8 @@
37 37
38struct exynos_drm_connector { 38struct exynos_drm_connector {
39 struct drm_connector drm_connector; 39 struct drm_connector drm_connector;
40 uint32_t encoder_id;
41 struct exynos_drm_manager *manager;
40}; 42};
41 43
42/* convert exynos_video_timings to drm_display_mode */ 44/* convert exynos_video_timings to drm_display_mode */
@@ -47,6 +49,7 @@ convert_to_display_mode(struct drm_display_mode *mode,
47 DRM_DEBUG_KMS("%s\n", __FILE__); 49 DRM_DEBUG_KMS("%s\n", __FILE__);
48 50
49 mode->clock = timing->pixclock / 1000; 51 mode->clock = timing->pixclock / 1000;
52 mode->vrefresh = timing->refresh;
50 53
51 mode->hdisplay = timing->xres; 54 mode->hdisplay = timing->xres;
52 mode->hsync_start = mode->hdisplay + timing->left_margin; 55 mode->hsync_start = mode->hdisplay + timing->left_margin;
@@ -57,6 +60,12 @@ convert_to_display_mode(struct drm_display_mode *mode,
57 mode->vsync_start = mode->vdisplay + timing->upper_margin; 60 mode->vsync_start = mode->vdisplay + timing->upper_margin;
58 mode->vsync_end = mode->vsync_start + timing->vsync_len; 61 mode->vsync_end = mode->vsync_start + timing->vsync_len;
59 mode->vtotal = mode->vsync_end + timing->lower_margin; 62 mode->vtotal = mode->vsync_end + timing->lower_margin;
63
64 if (timing->vmode & FB_VMODE_INTERLACED)
65 mode->flags |= DRM_MODE_FLAG_INTERLACE;
66
67 if (timing->vmode & FB_VMODE_DOUBLE)
68 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
60} 69}
61 70
62/* convert drm_display_mode to exynos_video_timings */ 71/* convert drm_display_mode to exynos_video_timings */
@@ -69,7 +78,7 @@ convert_to_video_timing(struct fb_videomode *timing,
69 memset(timing, 0, sizeof(*timing)); 78 memset(timing, 0, sizeof(*timing));
70 79
71 timing->pixclock = mode->clock * 1000; 80 timing->pixclock = mode->clock * 1000;
72 timing->refresh = mode->vrefresh; 81 timing->refresh = drm_mode_vrefresh(mode);
73 82
74 timing->xres = mode->hdisplay; 83 timing->xres = mode->hdisplay;
75 timing->left_margin = mode->hsync_start - mode->hdisplay; 84 timing->left_margin = mode->hsync_start - mode->hdisplay;
@@ -92,15 +101,16 @@ convert_to_video_timing(struct fb_videomode *timing,
92 101
93static int exynos_drm_connector_get_modes(struct drm_connector *connector) 102static int exynos_drm_connector_get_modes(struct drm_connector *connector)
94{ 103{
95 struct exynos_drm_manager *manager = 104 struct exynos_drm_connector *exynos_connector =
96 exynos_drm_get_manager(connector->encoder); 105 to_exynos_connector(connector);
97 struct exynos_drm_display *display = manager->display; 106 struct exynos_drm_manager *manager = exynos_connector->manager;
107 struct exynos_drm_display_ops *display_ops = manager->display_ops;
98 unsigned int count; 108 unsigned int count;
99 109
100 DRM_DEBUG_KMS("%s\n", __FILE__); 110 DRM_DEBUG_KMS("%s\n", __FILE__);
101 111
102 if (!display) { 112 if (!display_ops) {
103 DRM_DEBUG_KMS("display is null.\n"); 113 DRM_DEBUG_KMS("display_ops is null.\n");
104 return 0; 114 return 0;
105 } 115 }
106 116
@@ -112,7 +122,7 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector)
112 * P.S. in case of lcd panel, count is always 1 if success 122 * P.S. in case of lcd panel, count is always 1 if success
113 * because lcd panel has only one mode. 123 * because lcd panel has only one mode.
114 */ 124 */
115 if (display->get_edid) { 125 if (display_ops->get_edid) {
116 int ret; 126 int ret;
117 void *edid; 127 void *edid;
118 128
@@ -122,7 +132,7 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector)
122 return 0; 132 return 0;
123 } 133 }
124 134
125 ret = display->get_edid(manager->dev, connector, 135 ret = display_ops->get_edid(manager->dev, connector,
126 edid, MAX_EDID); 136 edid, MAX_EDID);
127 if (ret < 0) { 137 if (ret < 0) {
128 DRM_ERROR("failed to get edid data.\n"); 138 DRM_ERROR("failed to get edid data.\n");
@@ -140,8 +150,8 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector)
140 struct drm_display_mode *mode = drm_mode_create(connector->dev); 150 struct drm_display_mode *mode = drm_mode_create(connector->dev);
141 struct fb_videomode *timing; 151 struct fb_videomode *timing;
142 152
143 if (display->get_timing) 153 if (display_ops->get_timing)
144 timing = display->get_timing(manager->dev); 154 timing = display_ops->get_timing(manager->dev);
145 else { 155 else {
146 drm_mode_destroy(connector->dev, mode); 156 drm_mode_destroy(connector->dev, mode);
147 return 0; 157 return 0;
@@ -162,9 +172,10 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector)
162static int exynos_drm_connector_mode_valid(struct drm_connector *connector, 172static int exynos_drm_connector_mode_valid(struct drm_connector *connector,
163 struct drm_display_mode *mode) 173 struct drm_display_mode *mode)
164{ 174{
165 struct exynos_drm_manager *manager = 175 struct exynos_drm_connector *exynos_connector =
166 exynos_drm_get_manager(connector->encoder); 176 to_exynos_connector(connector);
167 struct exynos_drm_display *display = manager->display; 177 struct exynos_drm_manager *manager = exynos_connector->manager;
178 struct exynos_drm_display_ops *display_ops = manager->display_ops;
168 struct fb_videomode timing; 179 struct fb_videomode timing;
169 int ret = MODE_BAD; 180 int ret = MODE_BAD;
170 181
@@ -172,8 +183,8 @@ static int exynos_drm_connector_mode_valid(struct drm_connector *connector,
172 183
173 convert_to_video_timing(&timing, mode); 184 convert_to_video_timing(&timing, mode);
174 185
175 if (display && display->check_timing) 186 if (display_ops && display_ops->check_timing)
176 if (!display->check_timing(manager->dev, (void *)&timing)) 187 if (!display_ops->check_timing(manager->dev, (void *)&timing))
177 ret = MODE_OK; 188 ret = MODE_OK;
178 189
179 return ret; 190 return ret;
@@ -181,9 +192,25 @@ static int exynos_drm_connector_mode_valid(struct drm_connector *connector,
181 192
182struct drm_encoder *exynos_drm_best_encoder(struct drm_connector *connector) 193struct drm_encoder *exynos_drm_best_encoder(struct drm_connector *connector)
183{ 194{
195 struct drm_device *dev = connector->dev;
196 struct exynos_drm_connector *exynos_connector =
197 to_exynos_connector(connector);
198 struct drm_mode_object *obj;
199 struct drm_encoder *encoder;
200
184 DRM_DEBUG_KMS("%s\n", __FILE__); 201 DRM_DEBUG_KMS("%s\n", __FILE__);
185 202
186 return connector->encoder; 203 obj = drm_mode_object_find(dev, exynos_connector->encoder_id,
204 DRM_MODE_OBJECT_ENCODER);
205 if (!obj) {
206 DRM_DEBUG_KMS("Unknown ENCODER ID %d\n",
207 exynos_connector->encoder_id);
208 return NULL;
209 }
210
211 encoder = obj_to_encoder(obj);
212
213 return encoder;
187} 214}
188 215
189static struct drm_connector_helper_funcs exynos_connector_helper_funcs = { 216static struct drm_connector_helper_funcs exynos_connector_helper_funcs = {
@@ -196,15 +223,17 @@ static struct drm_connector_helper_funcs exynos_connector_helper_funcs = {
196static enum drm_connector_status 223static enum drm_connector_status
197exynos_drm_connector_detect(struct drm_connector *connector, bool force) 224exynos_drm_connector_detect(struct drm_connector *connector, bool force)
198{ 225{
199 struct exynos_drm_manager *manager = 226 struct exynos_drm_connector *exynos_connector =
200 exynos_drm_get_manager(connector->encoder); 227 to_exynos_connector(connector);
201 struct exynos_drm_display *display = manager->display; 228 struct exynos_drm_manager *manager = exynos_connector->manager;
229 struct exynos_drm_display_ops *display_ops =
230 manager->display_ops;
202 enum drm_connector_status status = connector_status_disconnected; 231 enum drm_connector_status status = connector_status_disconnected;
203 232
204 DRM_DEBUG_KMS("%s\n", __FILE__); 233 DRM_DEBUG_KMS("%s\n", __FILE__);
205 234
206 if (display && display->is_connected) { 235 if (display_ops && display_ops->is_connected) {
207 if (display->is_connected(manager->dev)) 236 if (display_ops->is_connected(manager->dev))
208 status = connector_status_connected; 237 status = connector_status_connected;
209 else 238 else
210 status = connector_status_disconnected; 239 status = connector_status_disconnected;
@@ -251,9 +280,11 @@ struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
251 280
252 connector = &exynos_connector->drm_connector; 281 connector = &exynos_connector->drm_connector;
253 282
254 switch (manager->display->type) { 283 switch (manager->display_ops->type) {
255 case EXYNOS_DISPLAY_TYPE_HDMI: 284 case EXYNOS_DISPLAY_TYPE_HDMI:
256 type = DRM_MODE_CONNECTOR_HDMIA; 285 type = DRM_MODE_CONNECTOR_HDMIA;
286 connector->interlace_allowed = true;
287 connector->polled = DRM_CONNECTOR_POLL_HPD;
257 break; 288 break;
258 default: 289 default:
259 type = DRM_MODE_CONNECTOR_Unknown; 290 type = DRM_MODE_CONNECTOR_Unknown;
@@ -267,7 +298,10 @@ struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
267 if (err) 298 if (err)
268 goto err_connector; 299 goto err_connector;
269 300
301 exynos_connector->encoder_id = encoder->base.id;
302 exynos_connector->manager = manager;
270 connector->encoder = encoder; 303 connector->encoder = encoder;
304
271 err = drm_mode_connector_attach_encoder(connector, encoder); 305 err = drm_mode_connector_attach_encoder(connector, encoder);
272 if (err) { 306 if (err) {
273 DRM_ERROR("failed to attach a connector to a encoder\n"); 307 DRM_ERROR("failed to attach a connector to a encoder\n");
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 9337e5e2dbb6..ee43cc220853 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -29,36 +29,17 @@
29#include "drmP.h" 29#include "drmP.h"
30#include "drm_crtc_helper.h" 30#include "drm_crtc_helper.h"
31 31
32#include "exynos_drm_crtc.h"
32#include "exynos_drm_drv.h" 33#include "exynos_drm_drv.h"
33#include "exynos_drm_fb.h" 34#include "exynos_drm_fb.h"
34#include "exynos_drm_encoder.h" 35#include "exynos_drm_encoder.h"
36#include "exynos_drm_gem.h"
35#include "exynos_drm_buf.h" 37#include "exynos_drm_buf.h"
36 38
37#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\ 39#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
38 drm_crtc) 40 drm_crtc)
39 41
40/* 42/*
41 * Exynos specific crtc postion structure.
42 *
43 * @fb_x: offset x on a framebuffer to be displyed
44 * - the unit is screen coordinates.
45 * @fb_y: offset y on a framebuffer to be displayed
46 * - the unit is screen coordinates.
47 * @crtc_x: offset x on hardware screen.
48 * @crtc_y: offset y on hardware screen.
49 * @crtc_w: width of hardware screen.
50 * @crtc_h: height of hardware screen.
51 */
52struct exynos_drm_crtc_pos {
53 unsigned int fb_x;
54 unsigned int fb_y;
55 unsigned int crtc_x;
56 unsigned int crtc_y;
57 unsigned int crtc_w;
58 unsigned int crtc_h;
59};
60
61/*
62 * Exynos specific crtc structure. 43 * Exynos specific crtc structure.
63 * 44 *
64 * @drm_crtc: crtc object. 45 * @drm_crtc: crtc object.
@@ -85,30 +66,31 @@ static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
85 66
86 exynos_drm_fn_encoder(crtc, overlay, 67 exynos_drm_fn_encoder(crtc, overlay,
87 exynos_drm_encoder_crtc_mode_set); 68 exynos_drm_encoder_crtc_mode_set);
88 exynos_drm_fn_encoder(crtc, NULL, exynos_drm_encoder_crtc_commit); 69 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
70 exynos_drm_encoder_crtc_commit);
89} 71}
90 72
91static int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay, 73int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
92 struct drm_framebuffer *fb, 74 struct drm_framebuffer *fb,
93 struct drm_display_mode *mode, 75 struct drm_display_mode *mode,
94 struct exynos_drm_crtc_pos *pos) 76 struct exynos_drm_crtc_pos *pos)
95{ 77{
96 struct exynos_drm_buf_entry *entry; 78 struct exynos_drm_gem_buf *buffer;
97 unsigned int actual_w; 79 unsigned int actual_w;
98 unsigned int actual_h; 80 unsigned int actual_h;
99 81
100 entry = exynos_drm_fb_get_buf(fb); 82 buffer = exynos_drm_fb_get_buf(fb);
101 if (!entry) { 83 if (!buffer) {
102 DRM_LOG_KMS("entry is null.\n"); 84 DRM_LOG_KMS("buffer is null.\n");
103 return -EFAULT; 85 return -EFAULT;
104 } 86 }
105 87
106 overlay->paddr = entry->paddr; 88 overlay->dma_addr = buffer->dma_addr;
107 overlay->vaddr = entry->vaddr; 89 overlay->vaddr = buffer->kvaddr;
108 90
109 DRM_DEBUG_KMS("vaddr = 0x%lx, paddr = 0x%lx\n", 91 DRM_DEBUG_KMS("vaddr = 0x%lx, dma_addr = 0x%lx\n",
110 (unsigned long)overlay->vaddr, 92 (unsigned long)overlay->vaddr,
111 (unsigned long)overlay->paddr); 93 (unsigned long)overlay->dma_addr);
112 94
113 actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w); 95 actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
114 actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h); 96 actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
@@ -171,9 +153,26 @@ static int exynos_drm_crtc_update(struct drm_crtc *crtc)
171 153
172static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode) 154static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
173{ 155{
174 DRM_DEBUG_KMS("%s\n", __FILE__); 156 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
175 157
176 /* TODO */ 158 DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
159
160 switch (mode) {
161 case DRM_MODE_DPMS_ON:
162 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
163 exynos_drm_encoder_crtc_commit);
164 break;
165 case DRM_MODE_DPMS_STANDBY:
166 case DRM_MODE_DPMS_SUSPEND:
167 case DRM_MODE_DPMS_OFF:
168 /* TODO */
169 exynos_drm_fn_encoder(crtc, NULL,
170 exynos_drm_encoder_crtc_disable);
171 break;
172 default:
173 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
174 break;
175 }
177} 176}
178 177
179static void exynos_drm_crtc_prepare(struct drm_crtc *crtc) 178static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
@@ -185,9 +184,12 @@ static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
185 184
186static void exynos_drm_crtc_commit(struct drm_crtc *crtc) 185static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
187{ 186{
187 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
188
188 DRM_DEBUG_KMS("%s\n", __FILE__); 189 DRM_DEBUG_KMS("%s\n", __FILE__);
189 190
190 /* drm framework doesn't check NULL. */ 191 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
192 exynos_drm_encoder_crtc_commit);
191} 193}
192 194
193static bool 195static bool
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
index c584042d6d2c..25f72a62cb88 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
@@ -35,4 +35,29 @@ int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr);
35int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc); 35int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc);
36void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc); 36void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc);
37 37
38/*
39 * Exynos specific crtc postion structure.
40 *
41 * @fb_x: offset x on a framebuffer to be displyed
42 * - the unit is screen coordinates.
43 * @fb_y: offset y on a framebuffer to be displayed
44 * - the unit is screen coordinates.
45 * @crtc_x: offset x on hardware screen.
46 * @crtc_y: offset y on hardware screen.
47 * @crtc_w: width of hardware screen.
48 * @crtc_h: height of hardware screen.
49 */
50struct exynos_drm_crtc_pos {
51 unsigned int fb_x;
52 unsigned int fb_y;
53 unsigned int crtc_x;
54 unsigned int crtc_y;
55 unsigned int crtc_w;
56 unsigned int crtc_h;
57};
58
59int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
60 struct drm_framebuffer *fb,
61 struct drm_display_mode *mode,
62 struct exynos_drm_crtc_pos *pos);
38#endif 63#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 83810cbe3c17..53e2216de61d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -27,6 +27,7 @@
27 27
28#include "drmP.h" 28#include "drmP.h"
29#include "drm.h" 29#include "drm.h"
30#include "drm_crtc_helper.h"
30 31
31#include <drm/exynos_drm.h> 32#include <drm/exynos_drm.h>
32 33
@@ -61,6 +62,9 @@ static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
61 62
62 drm_mode_config_init(dev); 63 drm_mode_config_init(dev);
63 64
65 /* init kms poll for handling hpd */
66 drm_kms_helper_poll_init(dev);
67
64 exynos_drm_mode_config_init(dev); 68 exynos_drm_mode_config_init(dev);
65 69
66 /* 70 /*
@@ -116,6 +120,7 @@ static int exynos_drm_unload(struct drm_device *dev)
116 exynos_drm_fbdev_fini(dev); 120 exynos_drm_fbdev_fini(dev);
117 exynos_drm_device_unregister(dev); 121 exynos_drm_device_unregister(dev);
118 drm_vblank_cleanup(dev); 122 drm_vblank_cleanup(dev);
123 drm_kms_helper_poll_fini(dev);
119 drm_mode_config_cleanup(dev); 124 drm_mode_config_cleanup(dev);
120 kfree(dev->dev_private); 125 kfree(dev->dev_private);
121 126
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index c03683f2ae72..5e02e6ecc2e0 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -29,6 +29,7 @@
29#ifndef _EXYNOS_DRM_DRV_H_ 29#ifndef _EXYNOS_DRM_DRV_H_
30#define _EXYNOS_DRM_DRV_H_ 30#define _EXYNOS_DRM_DRV_H_
31 31
32#include <linux/module.h>
32#include "drm.h" 33#include "drm.h"
33 34
34#define MAX_CRTC 2 35#define MAX_CRTC 2
@@ -79,8 +80,8 @@ struct exynos_drm_overlay_ops {
79 * @scan_flag: interlace or progressive way. 80 * @scan_flag: interlace or progressive way.
80 * (it could be DRM_MODE_FLAG_*) 81 * (it could be DRM_MODE_FLAG_*)
81 * @bpp: pixel size.(in bit) 82 * @bpp: pixel size.(in bit)
82 * @paddr: bus(accessed by dma) physical memory address to this overlay 83 * @dma_addr: bus(accessed by dma) address to the memory region allocated
83 * and this is physically continuous. 84 * for a overlay.
84 * @vaddr: virtual memory addresss to this overlay. 85 * @vaddr: virtual memory addresss to this overlay.
85 * @default_win: a window to be enabled. 86 * @default_win: a window to be enabled.
86 * @color_key: color key on or off. 87 * @color_key: color key on or off.
@@ -108,7 +109,7 @@ struct exynos_drm_overlay {
108 unsigned int scan_flag; 109 unsigned int scan_flag;
109 unsigned int bpp; 110 unsigned int bpp;
110 unsigned int pitch; 111 unsigned int pitch;
111 dma_addr_t paddr; 112 dma_addr_t dma_addr;
112 void __iomem *vaddr; 113 void __iomem *vaddr;
113 114
114 bool default_win; 115 bool default_win;
@@ -130,7 +131,7 @@ struct exynos_drm_overlay {
130 * @check_timing: check if timing is valid or not. 131 * @check_timing: check if timing is valid or not.
131 * @power_on: display device on or off. 132 * @power_on: display device on or off.
132 */ 133 */
133struct exynos_drm_display { 134struct exynos_drm_display_ops {
134 enum exynos_drm_output_type type; 135 enum exynos_drm_output_type type;
135 bool (*is_connected)(struct device *dev); 136 bool (*is_connected)(struct device *dev);
136 int (*get_edid)(struct device *dev, struct drm_connector *connector, 137 int (*get_edid)(struct device *dev, struct drm_connector *connector,
@@ -146,12 +147,14 @@ struct exynos_drm_display {
146 * @mode_set: convert drm_display_mode to hw specific display mode and 147 * @mode_set: convert drm_display_mode to hw specific display mode and
147 * would be called by encoder->mode_set(). 148 * would be called by encoder->mode_set().
148 * @commit: set current hw specific display mode to hw. 149 * @commit: set current hw specific display mode to hw.
150 * @disable: disable hardware specific display mode.
149 * @enable_vblank: specific driver callback for enabling vblank interrupt. 151 * @enable_vblank: specific driver callback for enabling vblank interrupt.
150 * @disable_vblank: specific driver callback for disabling vblank interrupt. 152 * @disable_vblank: specific driver callback for disabling vblank interrupt.
151 */ 153 */
152struct exynos_drm_manager_ops { 154struct exynos_drm_manager_ops {
153 void (*mode_set)(struct device *subdrv_dev, void *mode); 155 void (*mode_set)(struct device *subdrv_dev, void *mode);
154 void (*commit)(struct device *subdrv_dev); 156 void (*commit)(struct device *subdrv_dev);
157 void (*disable)(struct device *subdrv_dev);
155 int (*enable_vblank)(struct device *subdrv_dev); 158 int (*enable_vblank)(struct device *subdrv_dev);
156 void (*disable_vblank)(struct device *subdrv_dev); 159 void (*disable_vblank)(struct device *subdrv_dev);
157}; 160};
@@ -178,7 +181,7 @@ struct exynos_drm_manager {
178 int pipe; 181 int pipe;
179 struct exynos_drm_manager_ops *ops; 182 struct exynos_drm_manager_ops *ops;
180 struct exynos_drm_overlay_ops *overlay_ops; 183 struct exynos_drm_overlay_ops *overlay_ops;
181 struct exynos_drm_display *display; 184 struct exynos_drm_display_ops *display_ops;
182}; 185};
183 186
184/* 187/*
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 7cf6fa86a67e..153061415baf 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -53,15 +53,36 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode)
53 struct drm_device *dev = encoder->dev; 53 struct drm_device *dev = encoder->dev;
54 struct drm_connector *connector; 54 struct drm_connector *connector;
55 struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder); 55 struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder);
56 struct exynos_drm_manager_ops *manager_ops = manager->ops;
56 57
57 DRM_DEBUG_KMS("%s, encoder dpms: %d\n", __FILE__, mode); 58 DRM_DEBUG_KMS("%s, encoder dpms: %d\n", __FILE__, mode);
58 59
60 switch (mode) {
61 case DRM_MODE_DPMS_ON:
62 if (manager_ops && manager_ops->commit)
63 manager_ops->commit(manager->dev);
64 break;
65 case DRM_MODE_DPMS_STANDBY:
66 case DRM_MODE_DPMS_SUSPEND:
67 case DRM_MODE_DPMS_OFF:
68 /* TODO */
69 if (manager_ops && manager_ops->disable)
70 manager_ops->disable(manager->dev);
71 break;
72 default:
73 DRM_ERROR("unspecified mode %d\n", mode);
74 break;
75 }
76
59 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 77 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
60 if (connector->encoder == encoder) { 78 if (connector->encoder == encoder) {
61 struct exynos_drm_display *display = manager->display; 79 struct exynos_drm_display_ops *display_ops =
80 manager->display_ops;
62 81
63 if (display && display->power_on) 82 DRM_DEBUG_KMS("connector[%d] dpms[%d]\n",
64 display->power_on(manager->dev, mode); 83 connector->base.id, mode);
84 if (display_ops && display_ops->power_on)
85 display_ops->power_on(manager->dev, mode);
65 } 86 }
66 } 87 }
67} 88}
@@ -116,15 +137,11 @@ static void exynos_drm_encoder_commit(struct drm_encoder *encoder)
116{ 137{
117 struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder); 138 struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder);
118 struct exynos_drm_manager_ops *manager_ops = manager->ops; 139 struct exynos_drm_manager_ops *manager_ops = manager->ops;
119 struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
120 140
121 DRM_DEBUG_KMS("%s\n", __FILE__); 141 DRM_DEBUG_KMS("%s\n", __FILE__);
122 142
123 if (manager_ops && manager_ops->commit) 143 if (manager_ops && manager_ops->commit)
124 manager_ops->commit(manager->dev); 144 manager_ops->commit(manager->dev);
125
126 if (overlay_ops && overlay_ops->commit)
127 overlay_ops->commit(manager->dev);
128} 145}
129 146
130static struct drm_crtc * 147static struct drm_crtc *
@@ -208,10 +225,23 @@ void exynos_drm_fn_encoder(struct drm_crtc *crtc, void *data,
208{ 225{
209 struct drm_device *dev = crtc->dev; 226 struct drm_device *dev = crtc->dev;
210 struct drm_encoder *encoder; 227 struct drm_encoder *encoder;
228 struct exynos_drm_private *private = dev->dev_private;
229 struct exynos_drm_manager *manager;
211 230
212 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 231 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
213 if (encoder->crtc != crtc) 232 /*
214 continue; 233 * if crtc is detached from encoder, check pipe,
234 * otherwise check crtc attached to encoder
235 */
236 if (!encoder->crtc) {
237 manager = to_exynos_encoder(encoder)->manager;
238 if (manager->pipe < 0 ||
239 private->crtc[manager->pipe] != crtc)
240 continue;
241 } else {
242 if (encoder->crtc != crtc)
243 continue;
244 }
215 245
216 fn(encoder, data); 246 fn(encoder, data);
217 } 247 }
@@ -250,8 +280,18 @@ void exynos_drm_encoder_crtc_commit(struct drm_encoder *encoder, void *data)
250 struct exynos_drm_manager *manager = 280 struct exynos_drm_manager *manager =
251 to_exynos_encoder(encoder)->manager; 281 to_exynos_encoder(encoder)->manager;
252 struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops; 282 struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
283 int crtc = *(int *)data;
284
285 DRM_DEBUG_KMS("%s\n", __FILE__);
286
287 /*
288 * when crtc is detached from encoder, this pipe is used
289 * to select manager operation
290 */
291 manager->pipe = crtc;
253 292
254 overlay_ops->commit(manager->dev); 293 if (overlay_ops && overlay_ops->commit)
294 overlay_ops->commit(manager->dev);
255} 295}
256 296
257void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data) 297void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data)
@@ -261,7 +301,28 @@ void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data)
261 struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops; 301 struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
262 struct exynos_drm_overlay *overlay = data; 302 struct exynos_drm_overlay *overlay = data;
263 303
264 overlay_ops->mode_set(manager->dev, overlay); 304 if (overlay_ops && overlay_ops->mode_set)
305 overlay_ops->mode_set(manager->dev, overlay);
306}
307
308void exynos_drm_encoder_crtc_disable(struct drm_encoder *encoder, void *data)
309{
310 struct exynos_drm_manager *manager =
311 to_exynos_encoder(encoder)->manager;
312 struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
313
314 DRM_DEBUG_KMS("\n");
315
316 if (overlay_ops && overlay_ops->disable)
317 overlay_ops->disable(manager->dev);
318
319 /*
320 * crtc is already detached from encoder and last
321 * function for detaching is properly done, so
322 * clear pipe from manager to prevent repeated call
323 */
324 if (!encoder->crtc)
325 manager->pipe = -1;
265} 326}
266 327
267MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>"); 328MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.h b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
index 5ecd645d06a9..a22acfbf0e4e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
@@ -41,5 +41,6 @@ void exynos_drm_enable_vblank(struct drm_encoder *encoder, void *data);
41void exynos_drm_disable_vblank(struct drm_encoder *encoder, void *data); 41void exynos_drm_disable_vblank(struct drm_encoder *encoder, void *data);
42void exynos_drm_encoder_crtc_commit(struct drm_encoder *encoder, void *data); 42void exynos_drm_encoder_crtc_commit(struct drm_encoder *encoder, void *data);
43void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data); 43void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data);
44void exynos_drm_encoder_crtc_disable(struct drm_encoder *encoder, void *data);
44 45
45#endif 46#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 48d29cfd5240..5bf4a1ac7f82 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -29,7 +29,9 @@
29#include "drmP.h" 29#include "drmP.h"
30#include "drm_crtc.h" 30#include "drm_crtc.h"
31#include "drm_crtc_helper.h" 31#include "drm_crtc_helper.h"
32#include "drm_fb_helper.h"
32 33
34#include "exynos_drm_drv.h"
33#include "exynos_drm_fb.h" 35#include "exynos_drm_fb.h"
34#include "exynos_drm_buf.h" 36#include "exynos_drm_buf.h"
35#include "exynos_drm_gem.h" 37#include "exynos_drm_gem.h"
@@ -41,14 +43,14 @@
41 * 43 *
42 * @fb: drm framebuffer obejct. 44 * @fb: drm framebuffer obejct.
43 * @exynos_gem_obj: exynos specific gem object containing a gem object. 45 * @exynos_gem_obj: exynos specific gem object containing a gem object.
44 * @entry: pointer to exynos drm buffer entry object. 46 * @buffer: pointer to exynos_drm_gem_buffer object.
45 * - containing only the information to physically continuous memory 47 * - contain the memory information to memory region allocated
46 * region allocated at default framebuffer creation. 48 * at default framebuffer creation.
47 */ 49 */
48struct exynos_drm_fb { 50struct exynos_drm_fb {
49 struct drm_framebuffer fb; 51 struct drm_framebuffer fb;
50 struct exynos_drm_gem_obj *exynos_gem_obj; 52 struct exynos_drm_gem_obj *exynos_gem_obj;
51 struct exynos_drm_buf_entry *entry; 53 struct exynos_drm_gem_buf *buffer;
52}; 54};
53 55
54static void exynos_drm_fb_destroy(struct drm_framebuffer *fb) 56static void exynos_drm_fb_destroy(struct drm_framebuffer *fb)
@@ -63,8 +65,8 @@ static void exynos_drm_fb_destroy(struct drm_framebuffer *fb)
63 * default framebuffer has no gem object so 65 * default framebuffer has no gem object so
64 * a buffer of the default framebuffer should be released at here. 66 * a buffer of the default framebuffer should be released at here.
65 */ 67 */
66 if (!exynos_fb->exynos_gem_obj && exynos_fb->entry) 68 if (!exynos_fb->exynos_gem_obj && exynos_fb->buffer)
67 exynos_drm_buf_destroy(fb->dev, exynos_fb->entry); 69 exynos_drm_buf_destroy(fb->dev, exynos_fb->buffer);
68 70
69 kfree(exynos_fb); 71 kfree(exynos_fb);
70 exynos_fb = NULL; 72 exynos_fb = NULL;
@@ -143,29 +145,29 @@ exynos_drm_fb_init(struct drm_file *file_priv, struct drm_device *dev,
143 */ 145 */
144 if (!mode_cmd->handle) { 146 if (!mode_cmd->handle) {
145 if (!file_priv) { 147 if (!file_priv) {
146 struct exynos_drm_buf_entry *entry; 148 struct exynos_drm_gem_buf *buffer;
147 149
148 /* 150 /*
149 * in case that file_priv is NULL, it allocates 151 * in case that file_priv is NULL, it allocates
150 * only buffer and this buffer would be used 152 * only buffer and this buffer would be used
151 * for default framebuffer. 153 * for default framebuffer.
152 */ 154 */
153 entry = exynos_drm_buf_create(dev, size); 155 buffer = exynos_drm_buf_create(dev, size);
154 if (IS_ERR(entry)) { 156 if (IS_ERR(buffer)) {
155 ret = PTR_ERR(entry); 157 ret = PTR_ERR(buffer);
156 goto err_buffer; 158 goto err_buffer;
157 } 159 }
158 160
159 exynos_fb->entry = entry; 161 exynos_fb->buffer = buffer;
160 162
161 DRM_LOG_KMS("default fb: paddr = 0x%lx, size = 0x%x\n", 163 DRM_LOG_KMS("default: dma_addr = 0x%lx, size = 0x%x\n",
162 (unsigned long)entry->paddr, size); 164 (unsigned long)buffer->dma_addr, size);
163 165
164 goto out; 166 goto out;
165 } else { 167 } else {
166 exynos_gem_obj = exynos_drm_gem_create(file_priv, dev, 168 exynos_gem_obj = exynos_drm_gem_create(dev, file_priv,
167 size, 169 &mode_cmd->handle,
168 &mode_cmd->handle); 170 size);
169 if (IS_ERR(exynos_gem_obj)) { 171 if (IS_ERR(exynos_gem_obj)) {
170 ret = PTR_ERR(exynos_gem_obj); 172 ret = PTR_ERR(exynos_gem_obj);
171 goto err_buffer; 173 goto err_buffer;
@@ -189,10 +191,10 @@ exynos_drm_fb_init(struct drm_file *file_priv, struct drm_device *dev,
189 * so that default framebuffer has no its own gem object, 191 * so that default framebuffer has no its own gem object,
190 * only its own buffer object. 192 * only its own buffer object.
191 */ 193 */
192 exynos_fb->entry = exynos_gem_obj->entry; 194 exynos_fb->buffer = exynos_gem_obj->buffer;
193 195
194 DRM_LOG_KMS("paddr = 0x%lx, size = 0x%x, gem object = 0x%x\n", 196 DRM_LOG_KMS("dma_addr = 0x%lx, size = 0x%x, gem object = 0x%x\n",
195 (unsigned long)exynos_fb->entry->paddr, size, 197 (unsigned long)exynos_fb->buffer->dma_addr, size,
196 (unsigned int)&exynos_gem_obj->base); 198 (unsigned int)&exynos_gem_obj->base);
197 199
198out: 200out:
@@ -220,26 +222,36 @@ struct drm_framebuffer *exynos_drm_fb_create(struct drm_device *dev,
220 return exynos_drm_fb_init(file_priv, dev, mode_cmd); 222 return exynos_drm_fb_init(file_priv, dev, mode_cmd);
221} 223}
222 224
223struct exynos_drm_buf_entry *exynos_drm_fb_get_buf(struct drm_framebuffer *fb) 225struct exynos_drm_gem_buf *exynos_drm_fb_get_buf(struct drm_framebuffer *fb)
224{ 226{
225 struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb); 227 struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);
226 struct exynos_drm_buf_entry *entry; 228 struct exynos_drm_gem_buf *buffer;
227 229
228 DRM_DEBUG_KMS("%s\n", __FILE__); 230 DRM_DEBUG_KMS("%s\n", __FILE__);
229 231
230 entry = exynos_fb->entry; 232 buffer = exynos_fb->buffer;
231 if (!entry) 233 if (!buffer)
232 return NULL; 234 return NULL;
233 235
234 DRM_DEBUG_KMS("vaddr = 0x%lx, paddr = 0x%lx\n", 236 DRM_DEBUG_KMS("vaddr = 0x%lx, dma_addr = 0x%lx\n",
235 (unsigned long)entry->vaddr, 237 (unsigned long)buffer->kvaddr,
236 (unsigned long)entry->paddr); 238 (unsigned long)buffer->dma_addr);
237 239
238 return entry; 240 return buffer;
241}
242
243static void exynos_drm_output_poll_changed(struct drm_device *dev)
244{
245 struct exynos_drm_private *private = dev->dev_private;
246 struct drm_fb_helper *fb_helper = private->fb_helper;
247
248 if (fb_helper)
249 drm_fb_helper_hotplug_event(fb_helper);
239} 250}
240 251
241static struct drm_mode_config_funcs exynos_drm_mode_config_funcs = { 252static struct drm_mode_config_funcs exynos_drm_mode_config_funcs = {
242 .fb_create = exynos_drm_fb_create, 253 .fb_create = exynos_drm_fb_create,
254 .output_poll_changed = exynos_drm_output_poll_changed,
243}; 255};
244 256
245void exynos_drm_mode_config_init(struct drm_device *dev) 257void exynos_drm_mode_config_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index 1f4b3d1a7713..836f41008187 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -33,6 +33,7 @@
33 33
34#include "exynos_drm_drv.h" 34#include "exynos_drm_drv.h"
35#include "exynos_drm_fb.h" 35#include "exynos_drm_fb.h"
36#include "exynos_drm_gem.h"
36#include "exynos_drm_buf.h" 37#include "exynos_drm_buf.h"
37 38
38#define MAX_CONNECTOR 4 39#define MAX_CONNECTOR 4
@@ -85,15 +86,13 @@ static struct fb_ops exynos_drm_fb_ops = {
85}; 86};
86 87
87static int exynos_drm_fbdev_update(struct drm_fb_helper *helper, 88static int exynos_drm_fbdev_update(struct drm_fb_helper *helper,
88 struct drm_framebuffer *fb, 89 struct drm_framebuffer *fb)
89 unsigned int fb_width,
90 unsigned int fb_height)
91{ 90{
92 struct fb_info *fbi = helper->fbdev; 91 struct fb_info *fbi = helper->fbdev;
93 struct drm_device *dev = helper->dev; 92 struct drm_device *dev = helper->dev;
94 struct exynos_drm_fbdev *exynos_fb = to_exynos_fbdev(helper); 93 struct exynos_drm_fbdev *exynos_fb = to_exynos_fbdev(helper);
95 struct exynos_drm_buf_entry *entry; 94 struct exynos_drm_gem_buf *buffer;
96 unsigned int size = fb_width * fb_height * (fb->bits_per_pixel >> 3); 95 unsigned int size = fb->width * fb->height * (fb->bits_per_pixel >> 3);
97 unsigned long offset; 96 unsigned long offset;
98 97
99 DRM_DEBUG_KMS("%s\n", __FILE__); 98 DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -101,20 +100,20 @@ static int exynos_drm_fbdev_update(struct drm_fb_helper *helper,
101 exynos_fb->fb = fb; 100 exynos_fb->fb = fb;
102 101
103 drm_fb_helper_fill_fix(fbi, fb->pitch, fb->depth); 102 drm_fb_helper_fill_fix(fbi, fb->pitch, fb->depth);
104 drm_fb_helper_fill_var(fbi, helper, fb_width, fb_height); 103 drm_fb_helper_fill_var(fbi, helper, fb->width, fb->height);
105 104
106 entry = exynos_drm_fb_get_buf(fb); 105 buffer = exynos_drm_fb_get_buf(fb);
107 if (!entry) { 106 if (!buffer) {
108 DRM_LOG_KMS("entry is null.\n"); 107 DRM_LOG_KMS("buffer is null.\n");
109 return -EFAULT; 108 return -EFAULT;
110 } 109 }
111 110
112 offset = fbi->var.xoffset * (fb->bits_per_pixel >> 3); 111 offset = fbi->var.xoffset * (fb->bits_per_pixel >> 3);
113 offset += fbi->var.yoffset * fb->pitch; 112 offset += fbi->var.yoffset * fb->pitch;
114 113
115 dev->mode_config.fb_base = entry->paddr; 114 dev->mode_config.fb_base = (resource_size_t)buffer->dma_addr;
116 fbi->screen_base = entry->vaddr + offset; 115 fbi->screen_base = buffer->kvaddr + offset;
117 fbi->fix.smem_start = entry->paddr + offset; 116 fbi->fix.smem_start = (unsigned long)(buffer->dma_addr + offset);
118 fbi->screen_size = size; 117 fbi->screen_size = size;
119 fbi->fix.smem_len = size; 118 fbi->fix.smem_len = size;
120 119
@@ -171,8 +170,7 @@ static int exynos_drm_fbdev_create(struct drm_fb_helper *helper,
171 goto out; 170 goto out;
172 } 171 }
173 172
174 ret = exynos_drm_fbdev_update(helper, helper->fb, sizes->fb_width, 173 ret = exynos_drm_fbdev_update(helper, helper->fb);
175 sizes->fb_height);
176 if (ret < 0) 174 if (ret < 0)
177 fb_dealloc_cmap(&fbi->cmap); 175 fb_dealloc_cmap(&fbi->cmap);
178 176
@@ -235,8 +233,7 @@ static int exynos_drm_fbdev_recreate(struct drm_fb_helper *helper,
235 } 233 }
236 234
237 helper->fb = exynos_fbdev->fb; 235 helper->fb = exynos_fbdev->fb;
238 return exynos_drm_fbdev_update(helper, helper->fb, sizes->fb_width, 236 return exynos_drm_fbdev_update(helper, helper->fb);
239 sizes->fb_height);
240} 237}
241 238
242static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper, 239static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
@@ -405,6 +402,18 @@ int exynos_drm_fbdev_reinit(struct drm_device *dev)
405 fb_helper = private->fb_helper; 402 fb_helper = private->fb_helper;
406 403
407 if (fb_helper) { 404 if (fb_helper) {
405 struct list_head temp_list;
406
407 INIT_LIST_HEAD(&temp_list);
408
409 /*
410 * fb_helper is reintialized but kernel fb is reused
411 * so kernel_fb_list need to be backuped and restored
412 */
413 if (!list_empty(&fb_helper->kernel_fb_list))
414 list_replace_init(&fb_helper->kernel_fb_list,
415 &temp_list);
416
408 drm_fb_helper_fini(fb_helper); 417 drm_fb_helper_fini(fb_helper);
409 418
410 ret = drm_fb_helper_init(dev, fb_helper, 419 ret = drm_fb_helper_init(dev, fb_helper,
@@ -414,6 +423,9 @@ int exynos_drm_fbdev_reinit(struct drm_device *dev)
414 return ret; 423 return ret;
415 } 424 }
416 425
426 if (!list_empty(&temp_list))
427 list_replace(&temp_list, &fb_helper->kernel_fb_list);
428
417 ret = drm_fb_helper_single_add_all_connectors(fb_helper); 429 ret = drm_fb_helper_single_add_all_connectors(fb_helper);
418 if (ret < 0) { 430 if (ret < 0) {
419 DRM_ERROR("failed to add fb helper to connectors\n"); 431 DRM_ERROR("failed to add fb helper to connectors\n");
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 4659c88cdd9b..db3b3d9e731d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -64,7 +64,7 @@ struct fimd_win_data {
64 unsigned int fb_width; 64 unsigned int fb_width;
65 unsigned int fb_height; 65 unsigned int fb_height;
66 unsigned int bpp; 66 unsigned int bpp;
67 dma_addr_t paddr; 67 dma_addr_t dma_addr;
68 void __iomem *vaddr; 68 void __iomem *vaddr;
69 unsigned int buf_offsize; 69 unsigned int buf_offsize;
70 unsigned int line_size; /* bytes */ 70 unsigned int line_size; /* bytes */
@@ -124,7 +124,7 @@ static int fimd_display_power_on(struct device *dev, int mode)
124 return 0; 124 return 0;
125} 125}
126 126
127static struct exynos_drm_display fimd_display = { 127static struct exynos_drm_display_ops fimd_display_ops = {
128 .type = EXYNOS_DISPLAY_TYPE_LCD, 128 .type = EXYNOS_DISPLAY_TYPE_LCD,
129 .is_connected = fimd_display_is_connected, 129 .is_connected = fimd_display_is_connected,
130 .get_timing = fimd_get_timing, 130 .get_timing = fimd_get_timing,
@@ -177,6 +177,40 @@ static void fimd_commit(struct device *dev)
177 writel(val, ctx->regs + VIDCON0); 177 writel(val, ctx->regs + VIDCON0);
178} 178}
179 179
180static void fimd_disable(struct device *dev)
181{
182 struct fimd_context *ctx = get_fimd_context(dev);
183 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
184 struct drm_device *drm_dev = subdrv->drm_dev;
185 struct exynos_drm_manager *manager = &subdrv->manager;
186 u32 val;
187
188 DRM_DEBUG_KMS("%s\n", __FILE__);
189
190 /* fimd dma off */
191 val = readl(ctx->regs + VIDCON0);
192 val &= ~(VIDCON0_ENVID | VIDCON0_ENVID_F);
193 writel(val, ctx->regs + VIDCON0);
194
195 /*
196 * if vblank is enabled status with dma off then
197 * it disables vsync interrupt.
198 */
199 if (drm_dev->vblank_enabled[manager->pipe] &&
200 atomic_read(&drm_dev->vblank_refcount[manager->pipe])) {
201 drm_vblank_put(drm_dev, manager->pipe);
202
203 /*
204 * if vblank_disable_allowed is 0 then disable
205 * vsync interrupt right now else the vsync interrupt
206 * would be disabled by drm timer once a current process
207 * gives up ownershop of vblank event.
208 */
209 if (!drm_dev->vblank_disable_allowed)
210 drm_vblank_off(drm_dev, manager->pipe);
211 }
212}
213
180static int fimd_enable_vblank(struct device *dev) 214static int fimd_enable_vblank(struct device *dev)
181{ 215{
182 struct fimd_context *ctx = get_fimd_context(dev); 216 struct fimd_context *ctx = get_fimd_context(dev);
@@ -220,6 +254,7 @@ static void fimd_disable_vblank(struct device *dev)
220 254
221static struct exynos_drm_manager_ops fimd_manager_ops = { 255static struct exynos_drm_manager_ops fimd_manager_ops = {
222 .commit = fimd_commit, 256 .commit = fimd_commit,
257 .disable = fimd_disable,
223 .enable_vblank = fimd_enable_vblank, 258 .enable_vblank = fimd_enable_vblank,
224 .disable_vblank = fimd_disable_vblank, 259 .disable_vblank = fimd_disable_vblank,
225}; 260};
@@ -251,7 +286,7 @@ static void fimd_win_mode_set(struct device *dev,
251 win_data->ovl_height = overlay->crtc_height; 286 win_data->ovl_height = overlay->crtc_height;
252 win_data->fb_width = overlay->fb_width; 287 win_data->fb_width = overlay->fb_width;
253 win_data->fb_height = overlay->fb_height; 288 win_data->fb_height = overlay->fb_height;
254 win_data->paddr = overlay->paddr + offset; 289 win_data->dma_addr = overlay->dma_addr + offset;
255 win_data->vaddr = overlay->vaddr + offset; 290 win_data->vaddr = overlay->vaddr + offset;
256 win_data->bpp = overlay->bpp; 291 win_data->bpp = overlay->bpp;
257 win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) * 292 win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
@@ -263,7 +298,7 @@ static void fimd_win_mode_set(struct device *dev,
263 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 298 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
264 win_data->ovl_width, win_data->ovl_height); 299 win_data->ovl_width, win_data->ovl_height);
265 DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n", 300 DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
266 (unsigned long)win_data->paddr, 301 (unsigned long)win_data->dma_addr,
267 (unsigned long)win_data->vaddr); 302 (unsigned long)win_data->vaddr);
268 DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n", 303 DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
269 overlay->fb_width, overlay->crtc_width); 304 overlay->fb_width, overlay->crtc_width);
@@ -376,16 +411,16 @@ static void fimd_win_commit(struct device *dev)
376 writel(val, ctx->regs + SHADOWCON); 411 writel(val, ctx->regs + SHADOWCON);
377 412
378 /* buffer start address */ 413 /* buffer start address */
379 val = win_data->paddr; 414 val = (unsigned long)win_data->dma_addr;
380 writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); 415 writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
381 416
382 /* buffer end address */ 417 /* buffer end address */
383 size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3); 418 size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
384 val = win_data->paddr + size; 419 val = (unsigned long)(win_data->dma_addr + size);
385 writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); 420 writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
386 421
387 DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n", 422 DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
388 (unsigned long)win_data->paddr, val, size); 423 (unsigned long)win_data->dma_addr, val, size);
389 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n", 424 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
390 win_data->ovl_width, win_data->ovl_height); 425 win_data->ovl_width, win_data->ovl_height);
391 426
@@ -447,7 +482,6 @@ static void fimd_win_commit(struct device *dev)
447static void fimd_win_disable(struct device *dev) 482static void fimd_win_disable(struct device *dev)
448{ 483{
449 struct fimd_context *ctx = get_fimd_context(dev); 484 struct fimd_context *ctx = get_fimd_context(dev);
450 struct fimd_win_data *win_data;
451 int win = ctx->default_win; 485 int win = ctx->default_win;
452 u32 val; 486 u32 val;
453 487
@@ -456,8 +490,6 @@ static void fimd_win_disable(struct device *dev)
456 if (win < 0 || win > WINDOWS_NR) 490 if (win < 0 || win > WINDOWS_NR)
457 return; 491 return;
458 492
459 win_data = &ctx->win_data[win];
460
461 /* protect windows */ 493 /* protect windows */
462 val = readl(ctx->regs + SHADOWCON); 494 val = readl(ctx->regs + SHADOWCON);
463 val |= SHADOWCON_WINx_PROTECT(win); 495 val |= SHADOWCON_WINx_PROTECT(win);
@@ -528,6 +560,16 @@ static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
528 /* VSYNC interrupt */ 560 /* VSYNC interrupt */
529 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1); 561 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
530 562
563 /*
564 * in case that vblank_disable_allowed is 1, it could induce
565 * the problem that manager->pipe could be -1 because with
566 * disable callback, vsync interrupt isn't disabled and at this moment,
567 * vsync interrupt could occur. the vsync interrupt would be disabled
568 * by timer handler later.
569 */
570 if (manager->pipe == -1)
571 return IRQ_HANDLED;
572
531 drm_handle_vblank(drm_dev, manager->pipe); 573 drm_handle_vblank(drm_dev, manager->pipe);
532 fimd_finish_pageflip(drm_dev, manager->pipe); 574 fimd_finish_pageflip(drm_dev, manager->pipe);
533 575
@@ -548,13 +590,6 @@ static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
548 */ 590 */
549 drm_dev->irq_enabled = 1; 591 drm_dev->irq_enabled = 1;
550 592
551 /*
552 * with vblank_disable_allowed = 1, vblank interrupt will be disabled
553 * by drm timer once a current process gives up ownership of
554 * vblank event.(drm_vblank_put function was called)
555 */
556 drm_dev->vblank_disable_allowed = 1;
557
558 return 0; 593 return 0;
559} 594}
560 595
@@ -731,7 +766,7 @@ static int __devinit fimd_probe(struct platform_device *pdev)
731 subdrv->manager.pipe = -1; 766 subdrv->manager.pipe = -1;
732 subdrv->manager.ops = &fimd_manager_ops; 767 subdrv->manager.ops = &fimd_manager_ops;
733 subdrv->manager.overlay_ops = &fimd_overlay_ops; 768 subdrv->manager.overlay_ops = &fimd_overlay_ops;
734 subdrv->manager.display = &fimd_display; 769 subdrv->manager.display_ops = &fimd_display_ops;
735 subdrv->manager.dev = dev; 770 subdrv->manager.dev = dev;
736 771
737 platform_set_drvdata(pdev, ctx); 772 platform_set_drvdata(pdev, ctx);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index a8e7a88906ed..aba0fe47f7ea 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -62,40 +62,28 @@ static unsigned int get_gem_mmap_offset(struct drm_gem_object *obj)
62 return (unsigned int)obj->map_list.hash.key << PAGE_SHIFT; 62 return (unsigned int)obj->map_list.hash.key << PAGE_SHIFT;
63} 63}
64 64
65struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_file *file_priv, 65static struct exynos_drm_gem_obj
66 struct drm_device *dev, unsigned int size, 66 *exynos_drm_gem_init(struct drm_device *drm_dev,
67 unsigned int *handle) 67 struct drm_file *file_priv, unsigned int *handle,
68 unsigned int size)
68{ 69{
69 struct exynos_drm_gem_obj *exynos_gem_obj; 70 struct exynos_drm_gem_obj *exynos_gem_obj;
70 struct exynos_drm_buf_entry *entry;
71 struct drm_gem_object *obj; 71 struct drm_gem_object *obj;
72 int ret; 72 int ret;
73 73
74 DRM_DEBUG_KMS("%s\n", __FILE__);
75
76 size = roundup(size, PAGE_SIZE);
77
78 exynos_gem_obj = kzalloc(sizeof(*exynos_gem_obj), GFP_KERNEL); 74 exynos_gem_obj = kzalloc(sizeof(*exynos_gem_obj), GFP_KERNEL);
79 if (!exynos_gem_obj) { 75 if (!exynos_gem_obj) {
80 DRM_ERROR("failed to allocate exynos gem object.\n"); 76 DRM_ERROR("failed to allocate exynos gem object.\n");
81 return ERR_PTR(-ENOMEM); 77 return ERR_PTR(-ENOMEM);
82 } 78 }
83 79
84 /* allocate the new buffer object and memory region. */
85 entry = exynos_drm_buf_create(dev, size);
86 if (!entry) {
87 kfree(exynos_gem_obj);
88 return ERR_PTR(-ENOMEM);
89 }
90
91 exynos_gem_obj->entry = entry;
92
93 obj = &exynos_gem_obj->base; 80 obj = &exynos_gem_obj->base;
94 81
95 ret = drm_gem_object_init(dev, obj, size); 82 ret = drm_gem_object_init(drm_dev, obj, size);
96 if (ret < 0) { 83 if (ret < 0) {
97 DRM_ERROR("failed to initailize gem object.\n"); 84 DRM_ERROR("failed to initialize gem object.\n");
98 goto err_obj_init; 85 ret = -EINVAL;
86 goto err_object_init;
99 } 87 }
100 88
101 DRM_DEBUG_KMS("created file object = 0x%x\n", (unsigned int)obj->filp); 89 DRM_DEBUG_KMS("created file object = 0x%x\n", (unsigned int)obj->filp);
@@ -127,24 +115,50 @@ err_handle_create:
127err_create_mmap_offset: 115err_create_mmap_offset:
128 drm_gem_object_release(obj); 116 drm_gem_object_release(obj);
129 117
130err_obj_init: 118err_object_init:
131 exynos_drm_buf_destroy(dev, exynos_gem_obj->entry);
132
133 kfree(exynos_gem_obj); 119 kfree(exynos_gem_obj);
134 120
135 return ERR_PTR(ret); 121 return ERR_PTR(ret);
136} 122}
137 123
124struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,
125 struct drm_file *file_priv,
126 unsigned int *handle, unsigned long size)
127{
128
129 struct exynos_drm_gem_obj *exynos_gem_obj = NULL;
130 struct exynos_drm_gem_buf *buffer;
131
132 size = roundup(size, PAGE_SIZE);
133
134 DRM_DEBUG_KMS("%s: size = 0x%lx\n", __FILE__, size);
135
136 buffer = exynos_drm_buf_create(dev, size);
137 if (IS_ERR(buffer)) {
138 return ERR_CAST(buffer);
139 }
140
141 exynos_gem_obj = exynos_drm_gem_init(dev, file_priv, handle, size);
142 if (IS_ERR(exynos_gem_obj)) {
143 exynos_drm_buf_destroy(dev, buffer);
144 return exynos_gem_obj;
145 }
146
147 exynos_gem_obj->buffer = buffer;
148
149 return exynos_gem_obj;
150}
151
138int exynos_drm_gem_create_ioctl(struct drm_device *dev, void *data, 152int exynos_drm_gem_create_ioctl(struct drm_device *dev, void *data,
139 struct drm_file *file_priv) 153 struct drm_file *file_priv)
140{ 154{
141 struct drm_exynos_gem_create *args = data; 155 struct drm_exynos_gem_create *args = data;
142 struct exynos_drm_gem_obj *exynos_gem_obj; 156 struct exynos_drm_gem_obj *exynos_gem_obj = NULL;
143 157
144 DRM_DEBUG_KMS("%s : size = 0x%x\n", __FILE__, args->size); 158 DRM_DEBUG_KMS("%s\n", __FILE__);
145 159
146 exynos_gem_obj = exynos_drm_gem_create(file_priv, dev, args->size, 160 exynos_gem_obj = exynos_drm_gem_create(dev, file_priv,
147 &args->handle); 161 &args->handle, args->size);
148 if (IS_ERR(exynos_gem_obj)) 162 if (IS_ERR(exynos_gem_obj))
149 return PTR_ERR(exynos_gem_obj); 163 return PTR_ERR(exynos_gem_obj);
150 164
@@ -175,7 +189,7 @@ static int exynos_drm_gem_mmap_buffer(struct file *filp,
175{ 189{
176 struct drm_gem_object *obj = filp->private_data; 190 struct drm_gem_object *obj = filp->private_data;
177 struct exynos_drm_gem_obj *exynos_gem_obj = to_exynos_gem_obj(obj); 191 struct exynos_drm_gem_obj *exynos_gem_obj = to_exynos_gem_obj(obj);
178 struct exynos_drm_buf_entry *entry; 192 struct exynos_drm_gem_buf *buffer;
179 unsigned long pfn, vm_size; 193 unsigned long pfn, vm_size;
180 194
181 DRM_DEBUG_KMS("%s\n", __FILE__); 195 DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -187,20 +201,20 @@ static int exynos_drm_gem_mmap_buffer(struct file *filp,
187 201
188 vm_size = vma->vm_end - vma->vm_start; 202 vm_size = vma->vm_end - vma->vm_start;
189 /* 203 /*
190 * a entry contains information to physically continuous memory 204 * a buffer contains information to physically continuous memory
191 * allocated by user request or at framebuffer creation. 205 * allocated by user request or at framebuffer creation.
192 */ 206 */
193 entry = exynos_gem_obj->entry; 207 buffer = exynos_gem_obj->buffer;
194 208
195 /* check if user-requested size is valid. */ 209 /* check if user-requested size is valid. */
196 if (vm_size > entry->size) 210 if (vm_size > buffer->size)
197 return -EINVAL; 211 return -EINVAL;
198 212
199 /* 213 /*
200 * get page frame number to physical memory to be mapped 214 * get page frame number to physical memory to be mapped
201 * to user space. 215 * to user space.
202 */ 216 */
203 pfn = exynos_gem_obj->entry->paddr >> PAGE_SHIFT; 217 pfn = ((unsigned long)exynos_gem_obj->buffer->dma_addr) >> PAGE_SHIFT;
204 218
205 DRM_DEBUG_KMS("pfn = 0x%lx\n", pfn); 219 DRM_DEBUG_KMS("pfn = 0x%lx\n", pfn);
206 220
@@ -281,7 +295,7 @@ void exynos_drm_gem_free_object(struct drm_gem_object *gem_obj)
281 295
282 exynos_gem_obj = to_exynos_gem_obj(gem_obj); 296 exynos_gem_obj = to_exynos_gem_obj(gem_obj);
283 297
284 exynos_drm_buf_destroy(gem_obj->dev, exynos_gem_obj->entry); 298 exynos_drm_buf_destroy(gem_obj->dev, exynos_gem_obj->buffer);
285 299
286 kfree(exynos_gem_obj); 300 kfree(exynos_gem_obj);
287} 301}
@@ -302,8 +316,8 @@ int exynos_drm_gem_dumb_create(struct drm_file *file_priv,
302 args->pitch = args->width * args->bpp >> 3; 316 args->pitch = args->width * args->bpp >> 3;
303 args->size = args->pitch * args->height; 317 args->size = args->pitch * args->height;
304 318
305 exynos_gem_obj = exynos_drm_gem_create(file_priv, dev, args->size, 319 exynos_gem_obj = exynos_drm_gem_create(dev, file_priv, &args->handle,
306 &args->handle); 320 args->size);
307 if (IS_ERR(exynos_gem_obj)) 321 if (IS_ERR(exynos_gem_obj))
308 return PTR_ERR(exynos_gem_obj); 322 return PTR_ERR(exynos_gem_obj);
309 323
@@ -360,7 +374,8 @@ int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
360 374
361 mutex_lock(&dev->struct_mutex); 375 mutex_lock(&dev->struct_mutex);
362 376
363 pfn = (exynos_gem_obj->entry->paddr >> PAGE_SHIFT) + page_offset; 377 pfn = (((unsigned long)exynos_gem_obj->buffer->dma_addr) >>
378 PAGE_SHIFT) + page_offset;
364 379
365 ret = vm_insert_mixed(vma, (unsigned long)vmf->virtual_address, pfn); 380 ret = vm_insert_mixed(vma, (unsigned long)vmf->virtual_address, pfn);
366 381
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index e5fc0148277b..ef8797334e6d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -30,13 +30,29 @@
30 struct exynos_drm_gem_obj, base) 30 struct exynos_drm_gem_obj, base)
31 31
32/* 32/*
33 * exynos drm gem buffer structure.
34 *
35 * @kvaddr: kernel virtual address to allocated memory region.
36 * @dma_addr: bus address(accessed by dma) to allocated memory region.
37 * - this address could be physical address without IOMMU and
38 * device address with IOMMU.
39 * @size: size of allocated memory region.
40 */
41struct exynos_drm_gem_buf {
42 void __iomem *kvaddr;
43 dma_addr_t dma_addr;
44 unsigned long size;
45};
46
47/*
33 * exynos drm buffer structure. 48 * exynos drm buffer structure.
34 * 49 *
35 * @base: a gem object. 50 * @base: a gem object.
36 * - a new handle to this gem object would be created 51 * - a new handle to this gem object would be created
37 * by drm_gem_handle_create(). 52 * by drm_gem_handle_create().
38 * @entry: pointer to exynos drm buffer entry object. 53 * @buffer: a pointer to exynos_drm_gem_buffer object.
39 * - containing the information to physically 54 * - contain the information to memory region allocated
55 * by user request or at framebuffer creation.
40 * continuous memory region allocated by user request 56 * continuous memory region allocated by user request
41 * or at framebuffer creation. 57 * or at framebuffer creation.
42 * 58 *
@@ -45,13 +61,13 @@
45 */ 61 */
46struct exynos_drm_gem_obj { 62struct exynos_drm_gem_obj {
47 struct drm_gem_object base; 63 struct drm_gem_object base;
48 struct exynos_drm_buf_entry *entry; 64 struct exynos_drm_gem_buf *buffer;
49}; 65};
50 66
51/* create a new buffer and get a new gem handle. */ 67/* create a new buffer and get a new gem handle. */
52struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_file *file_priv, 68struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,
53 struct drm_device *dev, unsigned int size, 69 struct drm_file *file_priv,
54 unsigned int *handle); 70 unsigned int *handle, unsigned long size);
55 71
56/* 72/*
57 * request gem object creation and buffer allocation as the size 73 * request gem object creation and buffer allocation as the size
diff --git a/drivers/hwmon/ad7314.c b/drivers/hwmon/ad7314.c
index 318e38e85376..5d760f3d21c2 100644
--- a/drivers/hwmon/ad7314.c
+++ b/drivers/hwmon/ad7314.c
@@ -160,7 +160,6 @@ MODULE_DEVICE_TABLE(spi, ad7314_id);
160static struct spi_driver ad7314_driver = { 160static struct spi_driver ad7314_driver = {
161 .driver = { 161 .driver = {
162 .name = "ad7314", 162 .name = "ad7314",
163 .bus = &spi_bus_type,
164 .owner = THIS_MODULE, 163 .owner = THIS_MODULE,
165 }, 164 },
166 .probe = ad7314_probe, 165 .probe = ad7314_probe,
diff --git a/drivers/hwmon/ads7871.c b/drivers/hwmon/ads7871.c
index 52319340e182..04450f8bf5da 100644
--- a/drivers/hwmon/ads7871.c
+++ b/drivers/hwmon/ads7871.c
@@ -227,7 +227,6 @@ static int __devexit ads7871_remove(struct spi_device *spi)
227static struct spi_driver ads7871_driver = { 227static struct spi_driver ads7871_driver = {
228 .driver = { 228 .driver = {
229 .name = DEVICE_NAME, 229 .name = DEVICE_NAME,
230 .bus = &spi_bus_type,
231 .owner = THIS_MODULE, 230 .owner = THIS_MODULE,
232 }, 231 },
233 232
diff --git a/drivers/hwmon/exynos4_tmu.c b/drivers/hwmon/exynos4_tmu.c
index faa0884f61f6..f2359a0093bd 100644
--- a/drivers/hwmon/exynos4_tmu.c
+++ b/drivers/hwmon/exynos4_tmu.c
@@ -506,17 +506,7 @@ static struct platform_driver exynos4_tmu_driver = {
506 .resume = exynos4_tmu_resume, 506 .resume = exynos4_tmu_resume,
507}; 507};
508 508
509static int __init exynos4_tmu_driver_init(void) 509module_platform_driver(exynos4_tmu_driver);
510{
511 return platform_driver_register(&exynos4_tmu_driver);
512}
513module_init(exynos4_tmu_driver_init);
514
515static void __exit exynos4_tmu_driver_exit(void)
516{
517 platform_driver_unregister(&exynos4_tmu_driver);
518}
519module_exit(exynos4_tmu_driver_exit);
520 510
521MODULE_DESCRIPTION("EXYNOS4 TMU Driver"); 511MODULE_DESCRIPTION("EXYNOS4 TMU Driver");
522MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>"); 512MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
diff --git a/drivers/hwmon/gpio-fan.c b/drivers/hwmon/gpio-fan.c
index 89aa9fb743af..9ba38f318ffb 100644
--- a/drivers/hwmon/gpio-fan.c
+++ b/drivers/hwmon/gpio-fan.c
@@ -539,18 +539,7 @@ static struct platform_driver gpio_fan_driver = {
539 }, 539 },
540}; 540};
541 541
542static int __init gpio_fan_init(void) 542module_platform_driver(gpio_fan_driver);
543{
544 return platform_driver_register(&gpio_fan_driver);
545}
546
547static void __exit gpio_fan_exit(void)
548{
549 platform_driver_unregister(&gpio_fan_driver);
550}
551
552module_init(gpio_fan_init);
553module_exit(gpio_fan_exit);
554 543
555MODULE_AUTHOR("Simon Guinot <sguinot@lacie.com>"); 544MODULE_AUTHOR("Simon Guinot <sguinot@lacie.com>");
556MODULE_DESCRIPTION("GPIO FAN driver"); 545MODULE_DESCRIPTION("GPIO FAN driver");
diff --git a/drivers/hwmon/jz4740-hwmon.c b/drivers/hwmon/jz4740-hwmon.c
index fea292d43407..7a48b1eb4233 100644
--- a/drivers/hwmon/jz4740-hwmon.c
+++ b/drivers/hwmon/jz4740-hwmon.c
@@ -212,17 +212,7 @@ struct platform_driver jz4740_hwmon_driver = {
212 }, 212 },
213}; 213};
214 214
215static int __init jz4740_hwmon_init(void) 215module_platform_driver(jz4740_hwmon_driver);
216{
217 return platform_driver_register(&jz4740_hwmon_driver);
218}
219module_init(jz4740_hwmon_init);
220
221static void __exit jz4740_hwmon_exit(void)
222{
223 platform_driver_unregister(&jz4740_hwmon_driver);
224}
225module_exit(jz4740_hwmon_exit);
226 216
227MODULE_DESCRIPTION("JZ4740 SoC HWMON driver"); 217MODULE_DESCRIPTION("JZ4740 SoC HWMON driver");
228MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 218MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
diff --git a/drivers/hwmon/ntc_thermistor.c b/drivers/hwmon/ntc_thermistor.c
index eab11615dced..9b382ec2c3bd 100644
--- a/drivers/hwmon/ntc_thermistor.c
+++ b/drivers/hwmon/ntc_thermistor.c
@@ -432,19 +432,7 @@ static struct platform_driver ntc_thermistor_driver = {
432 .id_table = ntc_thermistor_id, 432 .id_table = ntc_thermistor_id,
433}; 433};
434 434
435static int __init ntc_thermistor_init(void) 435module_platform_driver(ntc_thermistor_driver);
436{
437 return platform_driver_register(&ntc_thermistor_driver);
438}
439
440module_init(ntc_thermistor_init);
441
442static void __exit ntc_thermistor_cleanup(void)
443{
444 platform_driver_unregister(&ntc_thermistor_driver);
445}
446
447module_exit(ntc_thermistor_cleanup);
448 436
449MODULE_DESCRIPTION("NTC Thermistor Driver"); 437MODULE_DESCRIPTION("NTC Thermistor Driver");
450MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>"); 438MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
diff --git a/drivers/hwmon/s3c-hwmon.c b/drivers/hwmon/s3c-hwmon.c
index b39f52e2752a..f6c26d19f521 100644
--- a/drivers/hwmon/s3c-hwmon.c
+++ b/drivers/hwmon/s3c-hwmon.c
@@ -393,18 +393,7 @@ static struct platform_driver s3c_hwmon_driver = {
393 .remove = __devexit_p(s3c_hwmon_remove), 393 .remove = __devexit_p(s3c_hwmon_remove),
394}; 394};
395 395
396static int __init s3c_hwmon_init(void) 396module_platform_driver(s3c_hwmon_driver);
397{
398 return platform_driver_register(&s3c_hwmon_driver);
399}
400
401static void __exit s3c_hwmon_exit(void)
402{
403 platform_driver_unregister(&s3c_hwmon_driver);
404}
405
406module_init(s3c_hwmon_init);
407module_exit(s3c_hwmon_exit);
408 397
409MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 398MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
410MODULE_DESCRIPTION("S3C ADC HWMon driver"); 399MODULE_DESCRIPTION("S3C ADC HWMon driver");
diff --git a/drivers/hwmon/sch5627.c b/drivers/hwmon/sch5627.c
index e3b5c6039c25..79b6dabe3161 100644
--- a/drivers/hwmon/sch5627.c
+++ b/drivers/hwmon/sch5627.c
@@ -590,19 +590,8 @@ static struct platform_driver sch5627_driver = {
590 .remove = sch5627_remove, 590 .remove = sch5627_remove,
591}; 591};
592 592
593static int __init sch5627_init(void) 593module_platform_driver(sch5627_driver);
594{
595 return platform_driver_register(&sch5627_driver);
596}
597
598static void __exit sch5627_exit(void)
599{
600 platform_driver_unregister(&sch5627_driver);
601}
602 594
603MODULE_DESCRIPTION("SMSC SCH5627 Hardware Monitoring Driver"); 595MODULE_DESCRIPTION("SMSC SCH5627 Hardware Monitoring Driver");
604MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 596MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
605MODULE_LICENSE("GPL"); 597MODULE_LICENSE("GPL");
606
607module_init(sch5627_init);
608module_exit(sch5627_exit);
diff --git a/drivers/hwmon/sch5636.c b/drivers/hwmon/sch5636.c
index 244407aa79fc..9d5236fb09b4 100644
--- a/drivers/hwmon/sch5636.c
+++ b/drivers/hwmon/sch5636.c
@@ -521,19 +521,8 @@ static struct platform_driver sch5636_driver = {
521 .remove = sch5636_remove, 521 .remove = sch5636_remove,
522}; 522};
523 523
524static int __init sch5636_init(void) 524module_platform_driver(sch5636_driver);
525{
526 return platform_driver_register(&sch5636_driver);
527}
528
529static void __exit sch5636_exit(void)
530{
531 platform_driver_unregister(&sch5636_driver);
532}
533 525
534MODULE_DESCRIPTION("SMSC SCH5636 Hardware Monitoring Driver"); 526MODULE_DESCRIPTION("SMSC SCH5636 Hardware Monitoring Driver");
535MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 527MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
536MODULE_LICENSE("GPL"); 528MODULE_LICENSE("GPL");
537
538module_init(sch5636_init);
539module_exit(sch5636_exit);
diff --git a/drivers/hwmon/twl4030-madc-hwmon.c b/drivers/hwmon/twl4030-madc-hwmon.c
index 57240740b161..0018c7dd0097 100644
--- a/drivers/hwmon/twl4030-madc-hwmon.c
+++ b/drivers/hwmon/twl4030-madc-hwmon.c
@@ -136,19 +136,7 @@ static struct platform_driver twl4030_madc_hwmon_driver = {
136 }, 136 },
137}; 137};
138 138
139static int __init twl4030_madc_hwmon_init(void) 139module_platform_driver(twl4030_madc_hwmon_driver);
140{
141 return platform_driver_register(&twl4030_madc_hwmon_driver);
142}
143
144module_init(twl4030_madc_hwmon_init);
145
146static void __exit twl4030_madc_hwmon_exit(void)
147{
148 platform_driver_unregister(&twl4030_madc_hwmon_driver);
149}
150
151module_exit(twl4030_madc_hwmon_exit);
152 140
153MODULE_DESCRIPTION("TWL4030 ADC Hwmon driver"); 141MODULE_DESCRIPTION("TWL4030 ADC Hwmon driver");
154MODULE_LICENSE("GPL"); 142MODULE_LICENSE("GPL");
diff --git a/drivers/hwmon/ultra45_env.c b/drivers/hwmon/ultra45_env.c
index 3cd07bf42dca..b9a87e89bab4 100644
--- a/drivers/hwmon/ultra45_env.c
+++ b/drivers/hwmon/ultra45_env.c
@@ -309,15 +309,4 @@ static struct platform_driver env_driver = {
309 .remove = __devexit_p(env_remove), 309 .remove = __devexit_p(env_remove),
310}; 310};
311 311
312static int __init env_init(void) 312module_platform_driver(env_driver);
313{
314 return platform_driver_register(&env_driver);
315}
316
317static void __exit env_exit(void)
318{
319 platform_driver_unregister(&env_driver);
320}
321
322module_init(env_init);
323module_exit(env_exit);
diff --git a/drivers/hwmon/wm831x-hwmon.c b/drivers/hwmon/wm831x-hwmon.c
index 97b1f834a471..9b598ed26020 100644
--- a/drivers/hwmon/wm831x-hwmon.c
+++ b/drivers/hwmon/wm831x-hwmon.c
@@ -209,17 +209,7 @@ static struct platform_driver wm831x_hwmon_driver = {
209 }, 209 },
210}; 210};
211 211
212static int __init wm831x_hwmon_init(void) 212module_platform_driver(wm831x_hwmon_driver);
213{
214 return platform_driver_register(&wm831x_hwmon_driver);
215}
216module_init(wm831x_hwmon_init);
217
218static void __exit wm831x_hwmon_exit(void)
219{
220 platform_driver_unregister(&wm831x_hwmon_driver);
221}
222module_exit(wm831x_hwmon_exit);
223 213
224MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 214MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
225MODULE_DESCRIPTION("WM831x Hardware Monitoring"); 215MODULE_DESCRIPTION("WM831x Hardware Monitoring");
diff --git a/drivers/hwmon/wm8350-hwmon.c b/drivers/hwmon/wm8350-hwmon.c
index 13290595ca86..3ff67edbdc44 100644
--- a/drivers/hwmon/wm8350-hwmon.c
+++ b/drivers/hwmon/wm8350-hwmon.c
@@ -133,17 +133,7 @@ static struct platform_driver wm8350_hwmon_driver = {
133 }, 133 },
134}; 134};
135 135
136static int __init wm8350_hwmon_init(void) 136module_platform_driver(wm8350_hwmon_driver);
137{
138 return platform_driver_register(&wm8350_hwmon_driver);
139}
140module_init(wm8350_hwmon_init);
141
142static void __exit wm8350_hwmon_exit(void)
143{
144 platform_driver_unregister(&wm8350_hwmon_driver);
145}
146module_exit(wm8350_hwmon_exit);
147 137
148MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 138MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
149MODULE_DESCRIPTION("WM8350 Hardware Monitoring"); 139MODULE_DESCRIPTION("WM8350 Hardware Monitoring");
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 2f91acccb7db..8873c6e6fb96 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1827,7 +1827,8 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
1827 } 1827 }
1828 1828
1829 /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */ 1829 /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */
1830 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); 1830 if (AR_SREV_9300_20_OR_LATER(ah))
1831 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
1831} 1832}
1832 1833
1833/* 1834/*
diff --git a/drivers/regulator/aat2870-regulator.c b/drivers/regulator/aat2870-regulator.c
index 5abeb3ac3e8d..298c6c6a2795 100644
--- a/drivers/regulator/aat2870-regulator.c
+++ b/drivers/regulator/aat2870-regulator.c
@@ -160,7 +160,7 @@ static struct aat2870_regulator *aat2870_get_regulator(int id)
160 break; 160 break;
161 } 161 }
162 162
163 if (!ri) 163 if (i == ARRAY_SIZE(aat2870_regulators))
164 return NULL; 164 return NULL;
165 165
166 ri->enable_addr = AAT2870_LDO_EN; 166 ri->enable_addr = AAT2870_LDO_EN;
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 669d02160221..938398f3e869 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -2799,8 +2799,8 @@ void regulator_unregister(struct regulator_dev *rdev)
2799 list_del(&rdev->list); 2799 list_del(&rdev->list);
2800 if (rdev->supply) 2800 if (rdev->supply)
2801 regulator_put(rdev->supply); 2801 regulator_put(rdev->supply);
2802 device_unregister(&rdev->dev);
2803 kfree(rdev->constraints); 2802 kfree(rdev->constraints);
2803 device_unregister(&rdev->dev);
2804 mutex_unlock(&regulator_list_mutex); 2804 mutex_unlock(&regulator_list_mutex);
2805} 2805}
2806EXPORT_SYMBOL_GPL(regulator_unregister); 2806EXPORT_SYMBOL_GPL(regulator_unregister);
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index ee8747f4fa08..11cc308d66e9 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -71,6 +71,7 @@ struct twlreg_info {
71#define VREG_TYPE 1 71#define VREG_TYPE 1
72#define VREG_REMAP 2 72#define VREG_REMAP 2
73#define VREG_DEDICATED 3 /* LDO control */ 73#define VREG_DEDICATED 3 /* LDO control */
74#define VREG_VOLTAGE_SMPS_4030 9
74/* TWL6030 register offsets */ 75/* TWL6030 register offsets */
75#define VREG_TRANS 1 76#define VREG_TRANS 1
76#define VREG_STATE 2 77#define VREG_STATE 2
@@ -514,6 +515,32 @@ static struct regulator_ops twl4030ldo_ops = {
514 .get_status = twl4030reg_get_status, 515 .get_status = twl4030reg_get_status,
515}; 516};
516 517
518static int
519twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
520 unsigned *selector)
521{
522 struct twlreg_info *info = rdev_get_drvdata(rdev);
523 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
524
525 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030,
526 vsel);
527 return 0;
528}
529
530static int twl4030smps_get_voltage(struct regulator_dev *rdev)
531{
532 struct twlreg_info *info = rdev_get_drvdata(rdev);
533 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
534 VREG_VOLTAGE_SMPS_4030);
535
536 return vsel * 12500 + 600000;
537}
538
539static struct regulator_ops twl4030smps_ops = {
540 .set_voltage = twl4030smps_set_voltage,
541 .get_voltage = twl4030smps_get_voltage,
542};
543
517static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) 544static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
518{ 545{
519 struct twlreg_info *info = rdev_get_drvdata(rdev); 546 struct twlreg_info *info = rdev_get_drvdata(rdev);
@@ -856,6 +883,21 @@ static struct regulator_ops twlsmps_ops = {
856 }, \ 883 }, \
857 } 884 }
858 885
886#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
887 { \
888 .base = offset, \
889 .id = num, \
890 .delay = turnon_delay, \
891 .remap = remap_conf, \
892 .desc = { \
893 .name = #label, \
894 .id = TWL4030_REG_##label, \
895 .ops = &twl4030smps_ops, \
896 .type = REGULATOR_VOLTAGE, \
897 .owner = THIS_MODULE, \
898 }, \
899 }
900
859#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) { \ 901#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) { \
860 .base = offset, \ 902 .base = offset, \
861 .min_mV = min_mVolts, \ 903 .min_mV = min_mVolts, \
@@ -947,8 +989,8 @@ static struct twlreg_info twl_regs[] = {
947 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08), 989 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
948 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08), 990 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
949 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08), 991 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
950 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08), 992 TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08),
951 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08), 993 TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08),
952 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08), 994 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
953 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08), 995 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
954 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08), 996 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c
index 26564094e33b..aec9311b108c 100644
--- a/drivers/staging/iio/industrialio-core.c
+++ b/drivers/staging/iio/industrialio-core.c
@@ -242,25 +242,24 @@ static const struct file_operations iio_event_chrdev_fileops = {
242 242
243static int iio_event_getfd(struct iio_dev *indio_dev) 243static int iio_event_getfd(struct iio_dev *indio_dev)
244{ 244{
245 struct iio_event_interface *ev_int = indio_dev->event_interface;
245 int fd; 246 int fd;
246 247
247 if (indio_dev->event_interface == NULL) 248 if (ev_int == NULL)
248 return -ENODEV; 249 return -ENODEV;
249 250
250 mutex_lock(&indio_dev->event_interface->event_list_lock); 251 mutex_lock(&ev_int->event_list_lock);
251 if (test_and_set_bit(IIO_BUSY_BIT_POS, 252 if (test_and_set_bit(IIO_BUSY_BIT_POS, &ev_int->flags)) {
252 &indio_dev->event_interface->flags)) { 253 mutex_unlock(&ev_int->event_list_lock);
253 mutex_unlock(&indio_dev->event_interface->event_list_lock);
254 return -EBUSY; 254 return -EBUSY;
255 } 255 }
256 mutex_unlock(&indio_dev->event_interface->event_list_lock); 256 mutex_unlock(&ev_int->event_list_lock);
257 fd = anon_inode_getfd("iio:event", 257 fd = anon_inode_getfd("iio:event",
258 &iio_event_chrdev_fileops, 258 &iio_event_chrdev_fileops, ev_int, O_RDONLY);
259 indio_dev->event_interface, O_RDONLY);
260 if (fd < 0) { 259 if (fd < 0) {
261 mutex_lock(&indio_dev->event_interface->event_list_lock); 260 mutex_lock(&ev_int->event_list_lock);
262 clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags); 261 clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags);
263 mutex_unlock(&indio_dev->event_interface->event_list_lock); 262 mutex_unlock(&ev_int->event_list_lock);
264 } 263 }
265 return fd; 264 return fd;
266} 265}
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 55f91d9ab00b..29577bf1f559 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -116,6 +116,7 @@
116/* Clock registers available only on Version 2 */ 116/* Clock registers available only on Version 2 */
117#define LCD_CLK_ENABLE_REG 0x6c 117#define LCD_CLK_ENABLE_REG 0x6c
118#define LCD_CLK_RESET_REG 0x70 118#define LCD_CLK_RESET_REG 0x70
119#define LCD_CLK_MAIN_RESET BIT(3)
119 120
120#define LCD_NUM_BUFFERS 2 121#define LCD_NUM_BUFFERS 2
121 122
@@ -244,6 +245,10 @@ static inline void lcd_enable_raster(void)
244{ 245{
245 u32 reg; 246 u32 reg;
246 247
248 /* Bring LCDC out of reset */
249 if (lcd_revision == LCD_VERSION_2)
250 lcdc_write(0, LCD_CLK_RESET_REG);
251
247 reg = lcdc_read(LCD_RASTER_CTRL_REG); 252 reg = lcdc_read(LCD_RASTER_CTRL_REG);
248 if (!(reg & LCD_RASTER_ENABLE)) 253 if (!(reg & LCD_RASTER_ENABLE))
249 lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); 254 lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
@@ -257,6 +262,10 @@ static inline void lcd_disable_raster(void)
257 reg = lcdc_read(LCD_RASTER_CTRL_REG); 262 reg = lcdc_read(LCD_RASTER_CTRL_REG);
258 if (reg & LCD_RASTER_ENABLE) 263 if (reg & LCD_RASTER_ENABLE)
259 lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); 264 lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);
265
266 if (lcd_revision == LCD_VERSION_2)
267 /* Write 1 to reset LCDC */
268 lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
260} 269}
261 270
262static void lcd_blit(int load_mode, struct da8xx_fb_par *par) 271static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
@@ -584,8 +593,12 @@ static void lcd_reset(struct da8xx_fb_par *par)
584 lcdc_write(0, LCD_DMA_CTRL_REG); 593 lcdc_write(0, LCD_DMA_CTRL_REG);
585 lcdc_write(0, LCD_RASTER_CTRL_REG); 594 lcdc_write(0, LCD_RASTER_CTRL_REG);
586 595
587 if (lcd_revision == LCD_VERSION_2) 596 if (lcd_revision == LCD_VERSION_2) {
588 lcdc_write(0, LCD_INT_ENABLE_SET_REG); 597 lcdc_write(0, LCD_INT_ENABLE_SET_REG);
598 /* Write 1 to reset */
599 lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);
600 lcdc_write(0, LCD_CLK_RESET_REG);
601 }
589} 602}
590 603
591static void lcd_calc_clk_divider(struct da8xx_fb_par *par) 604static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 0ccd7adf47bb..6f61e781f15a 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -19,6 +19,7 @@
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */ 20 */
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/module.h>
22#include <linux/dma-mapping.h> 23#include <linux/dma-mapping.h>
23#include <linux/mm.h> 24#include <linux/mm.h>
24#include <linux/vmalloc.h> 25#include <linux/vmalloc.h>
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 3532782551cb..5c81533eacaa 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1720,12 +1720,11 @@ static int dispc_ovl_calc_scaling(enum omap_plane plane,
1720 const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE); 1720 const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE);
1721 unsigned long fclk = 0; 1721 unsigned long fclk = 0;
1722 1722
1723 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { 1723 if (width == out_width && height == out_height)
1724 if (width != out_width || height != out_height) 1724 return 0;
1725 return -EINVAL; 1725
1726 else 1726 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0)
1727 return 0; 1727 return -EINVAL;
1728 }
1729 1728
1730 if (out_width < width / maxdownscale || 1729 if (out_width < width / maxdownscale ||
1731 out_width > width * 8) 1730 out_width > width * 8)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 3262f0f1fa35..c56378c555b0 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -269,7 +269,7 @@ static void update_hdmi_timings(struct hdmi_config *cfg,
269unsigned long hdmi_get_pixel_clock(void) 269unsigned long hdmi_get_pixel_clock(void)
270{ 270{
271 /* HDMI Pixel Clock in Mhz */ 271 /* HDMI Pixel Clock in Mhz */
272 return hdmi.ip_data.cfg.timings.timings.pixel_clock * 10000; 272 return hdmi.ip_data.cfg.timings.timings.pixel_clock * 1000;
273} 273}
274 274
275static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, 275static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy,
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 69d882cbe709..c01c1c162726 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -559,8 +559,8 @@
559#define M1200X720_R60_VSP POSITIVE 559#define M1200X720_R60_VSP POSITIVE
560 560
561/* 1200x900@60 Sync Polarity (DCON) */ 561/* 1200x900@60 Sync Polarity (DCON) */
562#define M1200X900_R60_HSP NEGATIVE 562#define M1200X900_R60_HSP POSITIVE
563#define M1200X900_R60_VSP NEGATIVE 563#define M1200X900_R60_VSP POSITIVE
564 564
565/* 1280x600@60 Sync Polarity (GTF Mode) */ 565/* 1280x600@60 Sync Polarity (GTF Mode) */
566#define M1280x600_R60_HSP NEGATIVE 566#define M1280x600_R60_HSP NEGATIVE
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index fffec40d5996..848f436df29f 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -2807,8 +2807,8 @@ out:
2807 spin_unlock_irqrestore(&ei->i_completed_io_lock, flags); 2807 spin_unlock_irqrestore(&ei->i_completed_io_lock, flags);
2808 2808
2809 /* queue the work to convert unwritten extents to written */ 2809 /* queue the work to convert unwritten extents to written */
2810 queue_work(wq, &io_end->work);
2811 iocb->private = NULL; 2810 iocb->private = NULL;
2811 queue_work(wq, &io_end->work);
2812 2812
2813 /* XXX: probably should move into the real I/O completion handler */ 2813 /* XXX: probably should move into the real I/O completion handler */
2814 inode_dio_done(inode); 2814 inode_dio_done(inode);
diff --git a/fs/pstore/platform.c b/fs/pstore/platform.c
index 2bd620f0d796..57bbf9078ac8 100644
--- a/fs/pstore/platform.c
+++ b/fs/pstore/platform.c
@@ -167,6 +167,7 @@ int pstore_register(struct pstore_info *psi)
167 } 167 }
168 168
169 psinfo = psi; 169 psinfo = psi;
170 mutex_init(&psinfo->read_mutex);
170 spin_unlock(&pstore_lock); 171 spin_unlock(&pstore_lock);
171 172
172 if (owner && !try_module_get(owner)) { 173 if (owner && !try_module_get(owner)) {
@@ -195,30 +196,32 @@ EXPORT_SYMBOL_GPL(pstore_register);
195void pstore_get_records(int quiet) 196void pstore_get_records(int quiet)
196{ 197{
197 struct pstore_info *psi = psinfo; 198 struct pstore_info *psi = psinfo;
199 char *buf = NULL;
198 ssize_t size; 200 ssize_t size;
199 u64 id; 201 u64 id;
200 enum pstore_type_id type; 202 enum pstore_type_id type;
201 struct timespec time; 203 struct timespec time;
202 int failed = 0, rc; 204 int failed = 0, rc;
203 unsigned long flags;
204 205
205 if (!psi) 206 if (!psi)
206 return; 207 return;
207 208
208 spin_lock_irqsave(&psinfo->buf_lock, flags); 209 mutex_lock(&psi->read_mutex);
209 rc = psi->open(psi); 210 rc = psi->open(psi);
210 if (rc) 211 if (rc)
211 goto out; 212 goto out;
212 213
213 while ((size = psi->read(&id, &type, &time, psi)) > 0) { 214 while ((size = psi->read(&id, &type, &time, &buf, psi)) > 0) {
214 rc = pstore_mkfile(type, psi->name, id, psi->buf, (size_t)size, 215 rc = pstore_mkfile(type, psi->name, id, buf, (size_t)size,
215 time, psi); 216 time, psi);
217 kfree(buf);
218 buf = NULL;
216 if (rc && (rc != -EEXIST || !quiet)) 219 if (rc && (rc != -EEXIST || !quiet))
217 failed++; 220 failed++;
218 } 221 }
219 psi->close(psi); 222 psi->close(psi);
220out: 223out:
221 spin_unlock_irqrestore(&psinfo->buf_lock, flags); 224 mutex_unlock(&psi->read_mutex);
222 225
223 if (failed) 226 if (failed)
224 printk(KERN_WARNING "pstore: failed to load %d record(s) from '%s'\n", 227 printk(KERN_WARNING "pstore: failed to load %d record(s) from '%s'\n",
diff --git a/include/drm/exynos_drm.h b/include/drm/exynos_drm.h
index 1d161cb3aca5..12050434d57a 100644
--- a/include/drm/exynos_drm.h
+++ b/include/drm/exynos_drm.h
@@ -32,17 +32,16 @@
32/** 32/**
33 * User-desired buffer creation information structure. 33 * User-desired buffer creation information structure.
34 * 34 *
35 * @size: requested size for the object. 35 * @size: user-desired memory allocation size.
36 * - this size value would be page-aligned internally. 36 * - this size value would be page-aligned internally.
37 * @flags: user request for setting memory type or cache attributes. 37 * @flags: user request for setting memory type or cache attributes.
38 * @handle: returned handle for the object. 38 * @handle: returned a handle to created gem object.
39 * @pad: just padding to be 64-bit aligned. 39 * - this handle will be set by gem module of kernel side.
40 */ 40 */
41struct drm_exynos_gem_create { 41struct drm_exynos_gem_create {
42 unsigned int size; 42 uint64_t size;
43 unsigned int flags; 43 unsigned int flags;
44 unsigned int handle; 44 unsigned int handle;
45 unsigned int pad;
46}; 45};
47 46
48/** 47/**
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 139c4db55f17..c86c940d1de3 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -156,6 +156,7 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
156 * @mult: cycle to nanosecond multiplier 156 * @mult: cycle to nanosecond multiplier
157 * @shift: cycle to nanosecond divisor (power of two) 157 * @shift: cycle to nanosecond divisor (power of two)
158 * @max_idle_ns: max idle time permitted by the clocksource (nsecs) 158 * @max_idle_ns: max idle time permitted by the clocksource (nsecs)
159 * @maxadj maximum adjustment value to mult (~11%)
159 * @flags: flags describing special properties 160 * @flags: flags describing special properties
160 * @archdata: arch-specific data 161 * @archdata: arch-specific data
161 * @suspend: suspend function for the clocksource, if necessary 162 * @suspend: suspend function for the clocksource, if necessary
@@ -172,7 +173,7 @@ struct clocksource {
172 u32 mult; 173 u32 mult;
173 u32 shift; 174 u32 shift;
174 u64 max_idle_ns; 175 u64 max_idle_ns;
175 176 u32 maxadj;
176#ifdef CONFIG_ARCH_CLOCKSOURCE_DATA 177#ifdef CONFIG_ARCH_CLOCKSOURCE_DATA
177 struct arch_clocksource_data archdata; 178 struct arch_clocksource_data archdata;
178#endif 179#endif
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 5c4c8b18c8b7..3f3ed83a9aa5 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -54,118 +54,145 @@ typedef struct pm_message {
54/** 54/**
55 * struct dev_pm_ops - device PM callbacks 55 * struct dev_pm_ops - device PM callbacks
56 * 56 *
57 * Several driver power state transitions are externally visible, affecting 57 * Several device power state transitions are externally visible, affecting
58 * the state of pending I/O queues and (for drivers that touch hardware) 58 * the state of pending I/O queues and (for drivers that touch hardware)
59 * interrupts, wakeups, DMA, and other hardware state. There may also be 59 * interrupts, wakeups, DMA, and other hardware state. There may also be
60 * internal transitions to various low power modes, which are transparent 60 * internal transitions to various low-power modes which are transparent
61 * to the rest of the driver stack (such as a driver that's ON gating off 61 * to the rest of the driver stack (such as a driver that's ON gating off
62 * clocks which are not in active use). 62 * clocks which are not in active use).
63 * 63 *
64 * The externally visible transitions are handled with the help of the following 64 * The externally visible transitions are handled with the help of callbacks
65 * callbacks included in this structure: 65 * included in this structure in such a way that two levels of callbacks are
66 * 66 * involved. First, the PM core executes callbacks provided by PM domains,
67 * @prepare: Prepare the device for the upcoming transition, but do NOT change 67 * device types, classes and bus types. They are the subsystem-level callbacks
68 * its hardware state. Prevent new children of the device from being 68 * supposed to execute callbacks provided by device drivers, although they may
69 * registered after @prepare() returns (the driver's subsystem and 69 * choose not to do that. If the driver callbacks are executed, they have to
70 * generally the rest of the kernel is supposed to prevent new calls to the 70 * collaborate with the subsystem-level callbacks to achieve the goals
71 * probe method from being made too once @prepare() has succeeded). If 71 * appropriate for the given system transition, given transition phase and the
72 * @prepare() detects a situation it cannot handle (e.g. registration of a 72 * subsystem the device belongs to.
73 * child already in progress), it may return -EAGAIN, so that the PM core 73 *
74 * can execute it once again (e.g. after the new child has been registered) 74 * @prepare: The principal role of this callback is to prevent new children of
75 * to recover from the race condition. This method is executed for all 75 * the device from being registered after it has returned (the driver's
76 * kinds of suspend transitions and is followed by one of the suspend 76 * subsystem and generally the rest of the kernel is supposed to prevent
77 * callbacks: @suspend(), @freeze(), or @poweroff(). 77 * new calls to the probe method from being made too once @prepare() has
78 * The PM core executes @prepare() for all devices before starting to 78 * succeeded). If @prepare() detects a situation it cannot handle (e.g.
79 * execute suspend callbacks for any of them, so drivers may assume all of 79 * registration of a child already in progress), it may return -EAGAIN, so
80 * the other devices to be present and functional while @prepare() is being 80 * that the PM core can execute it once again (e.g. after a new child has
81 * executed. In particular, it is safe to make GFP_KERNEL memory 81 * been registered) to recover from the race condition.
82 * allocations from within @prepare(). However, drivers may NOT assume 82 * This method is executed for all kinds of suspend transitions and is
83 * anything about the availability of the user space at that time and it 83 * followed by one of the suspend callbacks: @suspend(), @freeze(), or
84 * is not correct to request firmware from within @prepare() (it's too 84 * @poweroff(). The PM core executes subsystem-level @prepare() for all
85 * late to do that). [To work around this limitation, drivers may 85 * devices before starting to invoke suspend callbacks for any of them, so
86 * register suspend and hibernation notifiers that are executed before the 86 * generally devices may be assumed to be functional or to respond to
87 * freezing of tasks.] 87 * runtime resume requests while @prepare() is being executed. However,
88 * device drivers may NOT assume anything about the availability of user
89 * space at that time and it is NOT valid to request firmware from within
90 * @prepare() (it's too late to do that). It also is NOT valid to allocate
91 * substantial amounts of memory from @prepare() in the GFP_KERNEL mode.
92 * [To work around these limitations, drivers may register suspend and
93 * hibernation notifiers to be executed before the freezing of tasks.]
88 * 94 *
89 * @complete: Undo the changes made by @prepare(). This method is executed for 95 * @complete: Undo the changes made by @prepare(). This method is executed for
90 * all kinds of resume transitions, following one of the resume callbacks: 96 * all kinds of resume transitions, following one of the resume callbacks:
91 * @resume(), @thaw(), @restore(). Also called if the state transition 97 * @resume(), @thaw(), @restore(). Also called if the state transition
92 * fails before the driver's suspend callback (@suspend(), @freeze(), 98 * fails before the driver's suspend callback: @suspend(), @freeze() or
93 * @poweroff()) can be executed (e.g. if the suspend callback fails for one 99 * @poweroff(), can be executed (e.g. if the suspend callback fails for one
94 * of the other devices that the PM core has unsuccessfully attempted to 100 * of the other devices that the PM core has unsuccessfully attempted to
95 * suspend earlier). 101 * suspend earlier).
96 * The PM core executes @complete() after it has executed the appropriate 102 * The PM core executes subsystem-level @complete() after it has executed
97 * resume callback for all devices. 103 * the appropriate resume callbacks for all devices.
98 * 104 *
99 * @suspend: Executed before putting the system into a sleep state in which the 105 * @suspend: Executed before putting the system into a sleep state in which the
100 * contents of main memory are preserved. Quiesce the device, put it into 106 * contents of main memory are preserved. The exact action to perform
101 * a low power state appropriate for the upcoming system state (such as 107 * depends on the device's subsystem (PM domain, device type, class or bus
102 * PCI_D3hot), and enable wakeup events as appropriate. 108 * type), but generally the device must be quiescent after subsystem-level
109 * @suspend() has returned, so that it doesn't do any I/O or DMA.
110 * Subsystem-level @suspend() is executed for all devices after invoking
111 * subsystem-level @prepare() for all of them.
103 * 112 *
104 * @resume: Executed after waking the system up from a sleep state in which the 113 * @resume: Executed after waking the system up from a sleep state in which the
105 * contents of main memory were preserved. Put the device into the 114 * contents of main memory were preserved. The exact action to perform
106 * appropriate state, according to the information saved in memory by the 115 * depends on the device's subsystem, but generally the driver is expected
107 * preceding @suspend(). The driver starts working again, responding to 116 * to start working again, responding to hardware events and software
108 * hardware events and software requests. The hardware may have gone 117 * requests (the device itself may be left in a low-power state, waiting
109 * through a power-off reset, or it may have maintained state from the 118 * for a runtime resume to occur). The state of the device at the time its
110 * previous suspend() which the driver may rely on while resuming. On most 119 * driver's @resume() callback is run depends on the platform and subsystem
111 * platforms, there are no restrictions on availability of resources like 120 * the device belongs to. On most platforms, there are no restrictions on
112 * clocks during @resume(). 121 * availability of resources like clocks during @resume().
122 * Subsystem-level @resume() is executed for all devices after invoking
123 * subsystem-level @resume_noirq() for all of them.
113 * 124 *
114 * @freeze: Hibernation-specific, executed before creating a hibernation image. 125 * @freeze: Hibernation-specific, executed before creating a hibernation image.
115 * Quiesce operations so that a consistent image can be created, but do NOT 126 * Analogous to @suspend(), but it should not enable the device to signal
116 * otherwise put the device into a low power device state and do NOT emit 127 * wakeup events or change its power state. The majority of subsystems
117 * system wakeup events. Save in main memory the device settings to be 128 * (with the notable exception of the PCI bus type) expect the driver-level
118 * used by @restore() during the subsequent resume from hibernation or by 129 * @freeze() to save the device settings in memory to be used by @restore()
119 * the subsequent @thaw(), if the creation of the image or the restoration 130 * during the subsequent resume from hibernation.
120 * of main memory contents from it fails. 131 * Subsystem-level @freeze() is executed for all devices after invoking
132 * subsystem-level @prepare() for all of them.
121 * 133 *
122 * @thaw: Hibernation-specific, executed after creating a hibernation image OR 134 * @thaw: Hibernation-specific, executed after creating a hibernation image OR
123 * if the creation of the image fails. Also executed after a failing 135 * if the creation of an image has failed. Also executed after a failing
124 * attempt to restore the contents of main memory from such an image. 136 * attempt to restore the contents of main memory from such an image.
125 * Undo the changes made by the preceding @freeze(), so the device can be 137 * Undo the changes made by the preceding @freeze(), so the device can be
126 * operated in the same way as immediately before the call to @freeze(). 138 * operated in the same way as immediately before the call to @freeze().
139 * Subsystem-level @thaw() is executed for all devices after invoking
140 * subsystem-level @thaw_noirq() for all of them. It also may be executed
141 * directly after @freeze() in case of a transition error.
127 * 142 *
128 * @poweroff: Hibernation-specific, executed after saving a hibernation image. 143 * @poweroff: Hibernation-specific, executed after saving a hibernation image.
129 * Quiesce the device, put it into a low power state appropriate for the 144 * Analogous to @suspend(), but it need not save the device's settings in
130 * upcoming system state (such as PCI_D3hot), and enable wakeup events as 145 * memory.
131 * appropriate. 146 * Subsystem-level @poweroff() is executed for all devices after invoking
147 * subsystem-level @prepare() for all of them.
132 * 148 *
133 * @restore: Hibernation-specific, executed after restoring the contents of main 149 * @restore: Hibernation-specific, executed after restoring the contents of main
134 * memory from a hibernation image. Driver starts working again, 150 * memory from a hibernation image, analogous to @resume().
135 * responding to hardware events and software requests. Drivers may NOT 151 *
136 * make ANY assumptions about the hardware state right prior to @restore(). 152 * @suspend_noirq: Complete the actions started by @suspend(). Carry out any
137 * On most platforms, there are no restrictions on availability of 153 * additional operations required for suspending the device that might be
138 * resources like clocks during @restore(). 154 * racing with its driver's interrupt handler, which is guaranteed not to
139 * 155 * run while @suspend_noirq() is being executed.
140 * @suspend_noirq: Complete the operations of ->suspend() by carrying out any 156 * It generally is expected that the device will be in a low-power state
141 * actions required for suspending the device that need interrupts to be 157 * (appropriate for the target system sleep state) after subsystem-level
142 * disabled 158 * @suspend_noirq() has returned successfully. If the device can generate
143 * 159 * system wakeup signals and is enabled to wake up the system, it should be
144 * @resume_noirq: Prepare for the execution of ->resume() by carrying out any 160 * configured to do so at that time. However, depending on the platform
145 * actions required for resuming the device that need interrupts to be 161 * and device's subsystem, @suspend() may be allowed to put the device into
146 * disabled 162 * the low-power state and configure it to generate wakeup signals, in
147 * 163 * which case it generally is not necessary to define @suspend_noirq().
148 * @freeze_noirq: Complete the operations of ->freeze() by carrying out any 164 *
149 * actions required for freezing the device that need interrupts to be 165 * @resume_noirq: Prepare for the execution of @resume() by carrying out any
150 * disabled 166 * operations required for resuming the device that might be racing with
151 * 167 * its driver's interrupt handler, which is guaranteed not to run while
152 * @thaw_noirq: Prepare for the execution of ->thaw() by carrying out any 168 * @resume_noirq() is being executed.
153 * actions required for thawing the device that need interrupts to be 169 *
154 * disabled 170 * @freeze_noirq: Complete the actions started by @freeze(). Carry out any
155 * 171 * additional operations required for freezing the device that might be
156 * @poweroff_noirq: Complete the operations of ->poweroff() by carrying out any 172 * racing with its driver's interrupt handler, which is guaranteed not to
157 * actions required for handling the device that need interrupts to be 173 * run while @freeze_noirq() is being executed.
158 * disabled 174 * The power state of the device should not be changed by either @freeze()
159 * 175 * or @freeze_noirq() and it should not be configured to signal system
160 * @restore_noirq: Prepare for the execution of ->restore() by carrying out any 176 * wakeup by any of these callbacks.
161 * actions required for restoring the operations of the device that need 177 *
162 * interrupts to be disabled 178 * @thaw_noirq: Prepare for the execution of @thaw() by carrying out any
179 * operations required for thawing the device that might be racing with its
180 * driver's interrupt handler, which is guaranteed not to run while
181 * @thaw_noirq() is being executed.
182 *
183 * @poweroff_noirq: Complete the actions started by @poweroff(). Analogous to
184 * @suspend_noirq(), but it need not save the device's settings in memory.
185 *
186 * @restore_noirq: Prepare for the execution of @restore() by carrying out any
187 * operations required for thawing the device that might be racing with its
188 * driver's interrupt handler, which is guaranteed not to run while
189 * @restore_noirq() is being executed. Analogous to @resume_noirq().
163 * 190 *
164 * All of the above callbacks, except for @complete(), return error codes. 191 * All of the above callbacks, except for @complete(), return error codes.
165 * However, the error codes returned by the resume operations, @resume(), 192 * However, the error codes returned by the resume operations, @resume(),
166 * @thaw(), @restore(), @resume_noirq(), @thaw_noirq(), and @restore_noirq() do 193 * @thaw(), @restore(), @resume_noirq(), @thaw_noirq(), and @restore_noirq(), do
167 * not cause the PM core to abort the resume transition during which they are 194 * not cause the PM core to abort the resume transition during which they are
168 * returned. The error codes returned in that cases are only printed by the PM 195 * returned. The error codes returned in those cases are only printed by the PM
169 * core to the system logs for debugging purposes. Still, it is recommended 196 * core to the system logs for debugging purposes. Still, it is recommended
170 * that drivers only return error codes from their resume methods in case of an 197 * that drivers only return error codes from their resume methods in case of an
171 * unrecoverable failure (i.e. when the device being handled refuses to resume 198 * unrecoverable failure (i.e. when the device being handled refuses to resume
@@ -174,31 +201,43 @@ typedef struct pm_message {
174 * their children. 201 * their children.
175 * 202 *
176 * It is allowed to unregister devices while the above callbacks are being 203 * It is allowed to unregister devices while the above callbacks are being
177 * executed. However, it is not allowed to unregister a device from within any 204 * executed. However, a callback routine must NOT try to unregister the device
178 * of its own callbacks. 205 * it was called for, although it may unregister children of that device (for
206 * example, if it detects that a child was unplugged while the system was
207 * asleep).
208 *
209 * Refer to Documentation/power/devices.txt for more information about the role
210 * of the above callbacks in the system suspend process.
179 * 211 *
180 * There also are the following callbacks related to run-time power management 212 * There also are callbacks related to runtime power management of devices.
181 * of devices: 213 * Again, these callbacks are executed by the PM core only for subsystems
214 * (PM domains, device types, classes and bus types) and the subsystem-level
215 * callbacks are supposed to invoke the driver callbacks. Moreover, the exact
216 * actions to be performed by a device driver's callbacks generally depend on
217 * the platform and subsystem the device belongs to.
182 * 218 *
183 * @runtime_suspend: Prepare the device for a condition in which it won't be 219 * @runtime_suspend: Prepare the device for a condition in which it won't be
184 * able to communicate with the CPU(s) and RAM due to power management. 220 * able to communicate with the CPU(s) and RAM due to power management.
185 * This need not mean that the device should be put into a low power state. 221 * This need not mean that the device should be put into a low-power state.
186 * For example, if the device is behind a link which is about to be turned 222 * For example, if the device is behind a link which is about to be turned
187 * off, the device may remain at full power. If the device does go to low 223 * off, the device may remain at full power. If the device does go to low
188 * power and is capable of generating run-time wake-up events, remote 224 * power and is capable of generating runtime wakeup events, remote wakeup
189 * wake-up (i.e., a hardware mechanism allowing the device to request a 225 * (i.e., a hardware mechanism allowing the device to request a change of
190 * change of its power state via a wake-up event, such as PCI PME) should 226 * its power state via an interrupt) should be enabled for it.
191 * be enabled for it.
192 * 227 *
193 * @runtime_resume: Put the device into the fully active state in response to a 228 * @runtime_resume: Put the device into the fully active state in response to a
194 * wake-up event generated by hardware or at the request of software. If 229 * wakeup event generated by hardware or at the request of software. If
195 * necessary, put the device into the full power state and restore its 230 * necessary, put the device into the full-power state and restore its
196 * registers, so that it is fully operational. 231 * registers, so that it is fully operational.
197 * 232 *
198 * @runtime_idle: Device appears to be inactive and it might be put into a low 233 * @runtime_idle: Device appears to be inactive and it might be put into a
199 * power state if all of the necessary conditions are satisfied. Check 234 * low-power state if all of the necessary conditions are satisfied. Check
200 * these conditions and handle the device as appropriate, possibly queueing 235 * these conditions and handle the device as appropriate, possibly queueing
201 * a suspend request for it. The return value is ignored by the PM core. 236 * a suspend request for it. The return value is ignored by the PM core.
237 *
238 * Refer to Documentation/power/runtime_pm.txt for more information about the
239 * role of the above callbacks in device runtime power management.
240 *
202 */ 241 */
203 242
204struct dev_pm_ops { 243struct dev_pm_ops {
diff --git a/include/linux/pstore.h b/include/linux/pstore.h
index ea567321ae3c..2ca8cde5459d 100644
--- a/include/linux/pstore.h
+++ b/include/linux/pstore.h
@@ -35,10 +35,12 @@ struct pstore_info {
35 spinlock_t buf_lock; /* serialize access to 'buf' */ 35 spinlock_t buf_lock; /* serialize access to 'buf' */
36 char *buf; 36 char *buf;
37 size_t bufsize; 37 size_t bufsize;
38 struct mutex read_mutex; /* serialize open/read/close */
38 int (*open)(struct pstore_info *psi); 39 int (*open)(struct pstore_info *psi);
39 int (*close)(struct pstore_info *psi); 40 int (*close)(struct pstore_info *psi);
40 ssize_t (*read)(u64 *id, enum pstore_type_id *type, 41 ssize_t (*read)(u64 *id, enum pstore_type_id *type,
41 struct timespec *time, struct pstore_info *psi); 42 struct timespec *time, char **buf,
43 struct pstore_info *psi);
42 int (*write)(enum pstore_type_id type, u64 *id, 44 int (*write)(enum pstore_type_id type, u64 *id,
43 unsigned int part, size_t size, struct pstore_info *psi); 45 unsigned int part, size_t size, struct pstore_info *psi);
44 int (*erase)(enum pstore_type_id type, u64 id, 46 int (*erase)(enum pstore_type_id type, u64 id,
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index b66ebb2032c6..378c7ed6760b 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -307,15 +307,8 @@ struct omap_dss_board_info {
307 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask); 307 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
308}; 308};
309 309
310#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
311/* Init with the board info */ 310/* Init with the board info */
312extern int omap_display_init(struct omap_dss_board_info *board_data); 311extern int omap_display_init(struct omap_dss_board_info *board_data);
313#else
314static inline int omap_display_init(struct omap_dss_board_info *board_data)
315{
316 return 0;
317}
318#endif
319 312
320struct omap_display_platform_data { 313struct omap_display_platform_data {
321 struct omap_dss_board_info *board_data; 314 struct omap_dss_board_info *board_data;
diff --git a/kernel/cgroup_freezer.c b/kernel/cgroup_freezer.c
index 5e828a2ca8e6..213c0351dad8 100644
--- a/kernel/cgroup_freezer.c
+++ b/kernel/cgroup_freezer.c
@@ -153,6 +153,13 @@ static void freezer_destroy(struct cgroup_subsys *ss,
153 kfree(cgroup_freezer(cgroup)); 153 kfree(cgroup_freezer(cgroup));
154} 154}
155 155
156/* task is frozen or will freeze immediately when next it gets woken */
157static bool is_task_frozen_enough(struct task_struct *task)
158{
159 return frozen(task) ||
160 (task_is_stopped_or_traced(task) && freezing(task));
161}
162
156/* 163/*
157 * The call to cgroup_lock() in the freezer.state write method prevents 164 * The call to cgroup_lock() in the freezer.state write method prevents
158 * a write to that file racing against an attach, and hence the 165 * a write to that file racing against an attach, and hence the
@@ -231,7 +238,7 @@ static void update_if_frozen(struct cgroup *cgroup,
231 cgroup_iter_start(cgroup, &it); 238 cgroup_iter_start(cgroup, &it);
232 while ((task = cgroup_iter_next(cgroup, &it))) { 239 while ((task = cgroup_iter_next(cgroup, &it))) {
233 ntotal++; 240 ntotal++;
234 if (frozen(task)) 241 if (is_task_frozen_enough(task))
235 nfrozen++; 242 nfrozen++;
236 } 243 }
237 244
@@ -284,7 +291,7 @@ static int try_to_freeze_cgroup(struct cgroup *cgroup, struct freezer *freezer)
284 while ((task = cgroup_iter_next(cgroup, &it))) { 291 while ((task = cgroup_iter_next(cgroup, &it))) {
285 if (!freeze_task(task, true)) 292 if (!freeze_task(task, true))
286 continue; 293 continue;
287 if (frozen(task)) 294 if (is_task_frozen_enough(task))
288 continue; 295 continue;
289 if (!freezing(task) && !freezer_should_skip(task)) 296 if (!freezing(task) && !freezer_should_skip(task))
290 num_cant_freeze_now++; 297 num_cant_freeze_now++;
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index 422e567eecf6..ae34bf51682b 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -885,10 +885,13 @@ static void __remove_hrtimer(struct hrtimer *timer,
885 struct hrtimer_clock_base *base, 885 struct hrtimer_clock_base *base,
886 unsigned long newstate, int reprogram) 886 unsigned long newstate, int reprogram)
887{ 887{
888 struct timerqueue_node *next_timer;
888 if (!(timer->state & HRTIMER_STATE_ENQUEUED)) 889 if (!(timer->state & HRTIMER_STATE_ENQUEUED))
889 goto out; 890 goto out;
890 891
891 if (&timer->node == timerqueue_getnext(&base->active)) { 892 next_timer = timerqueue_getnext(&base->active);
893 timerqueue_del(&base->active, &timer->node);
894 if (&timer->node == next_timer) {
892#ifdef CONFIG_HIGH_RES_TIMERS 895#ifdef CONFIG_HIGH_RES_TIMERS
893 /* Reprogram the clock event device. if enabled */ 896 /* Reprogram the clock event device. if enabled */
894 if (reprogram && hrtimer_hres_active()) { 897 if (reprogram && hrtimer_hres_active()) {
@@ -901,7 +904,6 @@ static void __remove_hrtimer(struct hrtimer *timer,
901 } 904 }
902#endif 905#endif
903 } 906 }
904 timerqueue_del(&base->active, &timer->node);
905 if (!timerqueue_getnext(&base->active)) 907 if (!timerqueue_getnext(&base->active))
906 base->cpu_base->active_bases &= ~(1 << base->index); 908 base->cpu_base->active_bases &= ~(1 << base->index);
907out: 909out:
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 67ce837ae52c..0e2b179bc7b3 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1596,7 +1596,7 @@ int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1596 return -ENOMEM; 1596 return -ENOMEM;
1597 1597
1598 action->handler = handler; 1598 action->handler = handler;
1599 action->flags = IRQF_PERCPU; 1599 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
1600 action->name = devname; 1600 action->name = devname;
1601 action->percpu_dev_id = dev_id; 1601 action->percpu_dev_id = dev_id;
1602 1602
diff --git a/kernel/irq/spurious.c b/kernel/irq/spurious.c
index b5f4742693c0..dc813a948be2 100644
--- a/kernel/irq/spurious.c
+++ b/kernel/irq/spurious.c
@@ -84,7 +84,9 @@ static int try_one_irq(int irq, struct irq_desc *desc, bool force)
84 */ 84 */
85 action = desc->action; 85 action = desc->action;
86 if (!action || !(action->flags & IRQF_SHARED) || 86 if (!action || !(action->flags & IRQF_SHARED) ||
87 (action->flags & __IRQF_TIMER) || !action->next) 87 (action->flags & __IRQF_TIMER) ||
88 (action->handler(irq, action->dev_id) == IRQ_HANDLED) ||
89 !action->next)
88 goto out; 90 goto out;
89 91
90 /* Already running on another processor */ 92 /* Already running on another processor */
diff --git a/kernel/power/hibernate.c b/kernel/power/hibernate.c
index 196c01268ebd..a6b0503574ee 100644
--- a/kernel/power/hibernate.c
+++ b/kernel/power/hibernate.c
@@ -347,7 +347,7 @@ int hibernation_snapshot(int platform_mode)
347 347
348 error = freeze_kernel_threads(); 348 error = freeze_kernel_threads();
349 if (error) 349 if (error)
350 goto Close; 350 goto Cleanup;
351 351
352 if (hibernation_test(TEST_FREEZER) || 352 if (hibernation_test(TEST_FREEZER) ||
353 hibernation_testmode(HIBERNATION_TESTPROC)) { 353 hibernation_testmode(HIBERNATION_TESTPROC)) {
@@ -357,12 +357,14 @@ int hibernation_snapshot(int platform_mode)
357 * successful freezer test. 357 * successful freezer test.
358 */ 358 */
359 freezer_test_done = true; 359 freezer_test_done = true;
360 goto Close; 360 goto Cleanup;
361 } 361 }
362 362
363 error = dpm_prepare(PMSG_FREEZE); 363 error = dpm_prepare(PMSG_FREEZE);
364 if (error) 364 if (error) {
365 goto Complete_devices; 365 dpm_complete(msg);
366 goto Cleanup;
367 }
366 368
367 suspend_console(); 369 suspend_console();
368 pm_restrict_gfp_mask(); 370 pm_restrict_gfp_mask();
@@ -391,8 +393,6 @@ int hibernation_snapshot(int platform_mode)
391 pm_restore_gfp_mask(); 393 pm_restore_gfp_mask();
392 394
393 resume_console(); 395 resume_console();
394
395 Complete_devices:
396 dpm_complete(msg); 396 dpm_complete(msg);
397 397
398 Close: 398 Close:
@@ -402,6 +402,10 @@ int hibernation_snapshot(int platform_mode)
402 Recover_platform: 402 Recover_platform:
403 platform_recover(platform_mode); 403 platform_recover(platform_mode);
404 goto Resume_devices; 404 goto Resume_devices;
405
406 Cleanup:
407 swsusp_free();
408 goto Close;
405} 409}
406 410
407/** 411/**
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index cf52fda2e096..cfc65e1eb9fb 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -492,6 +492,22 @@ void clocksource_touch_watchdog(void)
492} 492}
493 493
494/** 494/**
495 * clocksource_max_adjustment- Returns max adjustment amount
496 * @cs: Pointer to clocksource
497 *
498 */
499static u32 clocksource_max_adjustment(struct clocksource *cs)
500{
501 u64 ret;
502 /*
503 * We won't try to correct for more then 11% adjustments (110,000 ppm),
504 */
505 ret = (u64)cs->mult * 11;
506 do_div(ret,100);
507 return (u32)ret;
508}
509
510/**
495 * clocksource_max_deferment - Returns max time the clocksource can be deferred 511 * clocksource_max_deferment - Returns max time the clocksource can be deferred
496 * @cs: Pointer to clocksource 512 * @cs: Pointer to clocksource
497 * 513 *
@@ -503,25 +519,28 @@ static u64 clocksource_max_deferment(struct clocksource *cs)
503 /* 519 /*
504 * Calculate the maximum number of cycles that we can pass to the 520 * Calculate the maximum number of cycles that we can pass to the
505 * cyc2ns function without overflowing a 64-bit signed result. The 521 * cyc2ns function without overflowing a 64-bit signed result. The
506 * maximum number of cycles is equal to ULLONG_MAX/cs->mult which 522 * maximum number of cycles is equal to ULLONG_MAX/(cs->mult+cs->maxadj)
507 * is equivalent to the below. 523 * which is equivalent to the below.
508 * max_cycles < (2^63)/cs->mult 524 * max_cycles < (2^63)/(cs->mult + cs->maxadj)
509 * max_cycles < 2^(log2((2^63)/cs->mult)) 525 * max_cycles < 2^(log2((2^63)/(cs->mult + cs->maxadj)))
510 * max_cycles < 2^(log2(2^63) - log2(cs->mult)) 526 * max_cycles < 2^(log2(2^63) - log2(cs->mult + cs->maxadj))
511 * max_cycles < 2^(63 - log2(cs->mult)) 527 * max_cycles < 2^(63 - log2(cs->mult + cs->maxadj))
512 * max_cycles < 1 << (63 - log2(cs->mult)) 528 * max_cycles < 1 << (63 - log2(cs->mult + cs->maxadj))
513 * Please note that we add 1 to the result of the log2 to account for 529 * Please note that we add 1 to the result of the log2 to account for
514 * any rounding errors, ensure the above inequality is satisfied and 530 * any rounding errors, ensure the above inequality is satisfied and
515 * no overflow will occur. 531 * no overflow will occur.
516 */ 532 */
517 max_cycles = 1ULL << (63 - (ilog2(cs->mult) + 1)); 533 max_cycles = 1ULL << (63 - (ilog2(cs->mult + cs->maxadj) + 1));
518 534
519 /* 535 /*
520 * The actual maximum number of cycles we can defer the clocksource is 536 * The actual maximum number of cycles we can defer the clocksource is
521 * determined by the minimum of max_cycles and cs->mask. 537 * determined by the minimum of max_cycles and cs->mask.
538 * Note: Here we subtract the maxadj to make sure we don't sleep for
539 * too long if there's a large negative adjustment.
522 */ 540 */
523 max_cycles = min_t(u64, max_cycles, (u64) cs->mask); 541 max_cycles = min_t(u64, max_cycles, (u64) cs->mask);
524 max_nsecs = clocksource_cyc2ns(max_cycles, cs->mult, cs->shift); 542 max_nsecs = clocksource_cyc2ns(max_cycles, cs->mult - cs->maxadj,
543 cs->shift);
525 544
526 /* 545 /*
527 * To ensure that the clocksource does not wrap whilst we are idle, 546 * To ensure that the clocksource does not wrap whilst we are idle,
@@ -640,7 +659,6 @@ static void clocksource_enqueue(struct clocksource *cs)
640void __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq) 659void __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq)
641{ 660{
642 u64 sec; 661 u64 sec;
643
644 /* 662 /*
645 * Calc the maximum number of seconds which we can run before 663 * Calc the maximum number of seconds which we can run before
646 * wrapping around. For clocksources which have a mask > 32bit 664 * wrapping around. For clocksources which have a mask > 32bit
@@ -661,6 +679,20 @@ void __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq)
661 679
662 clocks_calc_mult_shift(&cs->mult, &cs->shift, freq, 680 clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,
663 NSEC_PER_SEC / scale, sec * scale); 681 NSEC_PER_SEC / scale, sec * scale);
682
683 /*
684 * for clocksources that have large mults, to avoid overflow.
685 * Since mult may be adjusted by ntp, add an safety extra margin
686 *
687 */
688 cs->maxadj = clocksource_max_adjustment(cs);
689 while ((cs->mult + cs->maxadj < cs->mult)
690 || (cs->mult - cs->maxadj > cs->mult)) {
691 cs->mult >>= 1;
692 cs->shift--;
693 cs->maxadj = clocksource_max_adjustment(cs);
694 }
695
664 cs->max_idle_ns = clocksource_max_deferment(cs); 696 cs->max_idle_ns = clocksource_max_deferment(cs);
665} 697}
666EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale); 698EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
@@ -701,6 +733,12 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale);
701 */ 733 */
702int clocksource_register(struct clocksource *cs) 734int clocksource_register(struct clocksource *cs)
703{ 735{
736 /* calculate max adjustment for given mult/shift */
737 cs->maxadj = clocksource_max_adjustment(cs);
738 WARN_ONCE(cs->mult + cs->maxadj < cs->mult,
739 "Clocksource %s might overflow on 11%% adjustment\n",
740 cs->name);
741
704 /* calculate max idle time permitted for this clocksource */ 742 /* calculate max idle time permitted for this clocksource */
705 cs->max_idle_ns = clocksource_max_deferment(cs); 743 cs->max_idle_ns = clocksource_max_deferment(cs);
706 744
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index 2b021b0e8507..237841378c03 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -249,6 +249,8 @@ ktime_t ktime_get(void)
249 secs = xtime.tv_sec + wall_to_monotonic.tv_sec; 249 secs = xtime.tv_sec + wall_to_monotonic.tv_sec;
250 nsecs = xtime.tv_nsec + wall_to_monotonic.tv_nsec; 250 nsecs = xtime.tv_nsec + wall_to_monotonic.tv_nsec;
251 nsecs += timekeeping_get_ns(); 251 nsecs += timekeeping_get_ns();
252 /* If arch requires, add in gettimeoffset() */
253 nsecs += arch_gettimeoffset();
252 254
253 } while (read_seqretry(&xtime_lock, seq)); 255 } while (read_seqretry(&xtime_lock, seq));
254 /* 256 /*
@@ -280,6 +282,8 @@ void ktime_get_ts(struct timespec *ts)
280 *ts = xtime; 282 *ts = xtime;
281 tomono = wall_to_monotonic; 283 tomono = wall_to_monotonic;
282 nsecs = timekeeping_get_ns(); 284 nsecs = timekeeping_get_ns();
285 /* If arch requires, add in gettimeoffset() */
286 nsecs += arch_gettimeoffset();
283 287
284 } while (read_seqretry(&xtime_lock, seq)); 288 } while (read_seqretry(&xtime_lock, seq));
285 289
@@ -802,14 +806,44 @@ static void timekeeping_adjust(s64 offset)
802 s64 error, interval = timekeeper.cycle_interval; 806 s64 error, interval = timekeeper.cycle_interval;
803 int adj; 807 int adj;
804 808
809 /*
810 * The point of this is to check if the error is greater then half
811 * an interval.
812 *
813 * First we shift it down from NTP_SHIFT to clocksource->shifted nsecs.
814 *
815 * Note we subtract one in the shift, so that error is really error*2.
816 * This "saves" dividing(shifting) intererval twice, but keeps the
817 * (error > interval) comparision as still measuring if error is
818 * larger then half an interval.
819 *
820 * Note: It does not "save" on aggrivation when reading the code.
821 */
805 error = timekeeper.ntp_error >> (timekeeper.ntp_error_shift - 1); 822 error = timekeeper.ntp_error >> (timekeeper.ntp_error_shift - 1);
806 if (error > interval) { 823 if (error > interval) {
824 /*
825 * We now divide error by 4(via shift), which checks if
826 * the error is greater then twice the interval.
827 * If it is greater, we need a bigadjust, if its smaller,
828 * we can adjust by 1.
829 */
807 error >>= 2; 830 error >>= 2;
831 /*
832 * XXX - In update_wall_time, we round up to the next
833 * nanosecond, and store the amount rounded up into
834 * the error. This causes the likely below to be unlikely.
835 *
836 * The properfix is to avoid rounding up by using
837 * the high precision timekeeper.xtime_nsec instead of
838 * xtime.tv_nsec everywhere. Fixing this will take some
839 * time.
840 */
808 if (likely(error <= interval)) 841 if (likely(error <= interval))
809 adj = 1; 842 adj = 1;
810 else 843 else
811 adj = timekeeping_bigadjust(error, &interval, &offset); 844 adj = timekeeping_bigadjust(error, &interval, &offset);
812 } else if (error < -interval) { 845 } else if (error < -interval) {
846 /* See comment above, this is just switched for the negative */
813 error >>= 2; 847 error >>= 2;
814 if (likely(error >= -interval)) { 848 if (likely(error >= -interval)) {
815 adj = -1; 849 adj = -1;
@@ -817,9 +851,65 @@ static void timekeeping_adjust(s64 offset)
817 offset = -offset; 851 offset = -offset;
818 } else 852 } else
819 adj = timekeeping_bigadjust(error, &interval, &offset); 853 adj = timekeeping_bigadjust(error, &interval, &offset);
820 } else 854 } else /* No adjustment needed */
821 return; 855 return;
822 856
857 WARN_ONCE(timekeeper.clock->maxadj &&
858 (timekeeper.mult + adj > timekeeper.clock->mult +
859 timekeeper.clock->maxadj),
860 "Adjusting %s more then 11%% (%ld vs %ld)\n",
861 timekeeper.clock->name, (long)timekeeper.mult + adj,
862 (long)timekeeper.clock->mult +
863 timekeeper.clock->maxadj);
864 /*
865 * So the following can be confusing.
866 *
867 * To keep things simple, lets assume adj == 1 for now.
868 *
869 * When adj != 1, remember that the interval and offset values
870 * have been appropriately scaled so the math is the same.
871 *
872 * The basic idea here is that we're increasing the multiplier
873 * by one, this causes the xtime_interval to be incremented by
874 * one cycle_interval. This is because:
875 * xtime_interval = cycle_interval * mult
876 * So if mult is being incremented by one:
877 * xtime_interval = cycle_interval * (mult + 1)
878 * Its the same as:
879 * xtime_interval = (cycle_interval * mult) + cycle_interval
880 * Which can be shortened to:
881 * xtime_interval += cycle_interval
882 *
883 * So offset stores the non-accumulated cycles. Thus the current
884 * time (in shifted nanoseconds) is:
885 * now = (offset * adj) + xtime_nsec
886 * Now, even though we're adjusting the clock frequency, we have
887 * to keep time consistent. In other words, we can't jump back
888 * in time, and we also want to avoid jumping forward in time.
889 *
890 * So given the same offset value, we need the time to be the same
891 * both before and after the freq adjustment.
892 * now = (offset * adj_1) + xtime_nsec_1
893 * now = (offset * adj_2) + xtime_nsec_2
894 * So:
895 * (offset * adj_1) + xtime_nsec_1 =
896 * (offset * adj_2) + xtime_nsec_2
897 * And we know:
898 * adj_2 = adj_1 + 1
899 * So:
900 * (offset * adj_1) + xtime_nsec_1 =
901 * (offset * (adj_1+1)) + xtime_nsec_2
902 * (offset * adj_1) + xtime_nsec_1 =
903 * (offset * adj_1) + offset + xtime_nsec_2
904 * Canceling the sides:
905 * xtime_nsec_1 = offset + xtime_nsec_2
906 * Which gives us:
907 * xtime_nsec_2 = xtime_nsec_1 - offset
908 * Which simplfies to:
909 * xtime_nsec -= offset
910 *
911 * XXX - TODO: Doc ntp_error calculation.
912 */
823 timekeeper.mult += adj; 913 timekeeper.mult += adj;
824 timekeeper.xtime_interval += interval; 914 timekeeper.xtime_interval += interval;
825 timekeeper.xtime_nsec -= offset; 915 timekeeper.xtime_nsec -= offset;
diff --git a/mm/percpu-vm.c b/mm/percpu-vm.c
index ea534960a04b..12a48a88c0d8 100644
--- a/mm/percpu-vm.c
+++ b/mm/percpu-vm.c
@@ -50,14 +50,13 @@ static struct page **pcpu_get_pages_and_bitmap(struct pcpu_chunk *chunk,
50 50
51 if (!pages || !bitmap) { 51 if (!pages || !bitmap) {
52 if (may_alloc && !pages) 52 if (may_alloc && !pages)
53 pages = pcpu_mem_alloc(pages_size); 53 pages = pcpu_mem_zalloc(pages_size);
54 if (may_alloc && !bitmap) 54 if (may_alloc && !bitmap)
55 bitmap = pcpu_mem_alloc(bitmap_size); 55 bitmap = pcpu_mem_zalloc(bitmap_size);
56 if (!pages || !bitmap) 56 if (!pages || !bitmap)
57 return NULL; 57 return NULL;
58 } 58 }
59 59
60 memset(pages, 0, pages_size);
61 bitmap_copy(bitmap, chunk->populated, pcpu_unit_pages); 60 bitmap_copy(bitmap, chunk->populated, pcpu_unit_pages);
62 61
63 *bitmapp = bitmap; 62 *bitmapp = bitmap;
@@ -143,8 +142,8 @@ static void pcpu_pre_unmap_flush(struct pcpu_chunk *chunk,
143 int page_start, int page_end) 142 int page_start, int page_end)
144{ 143{
145 flush_cache_vunmap( 144 flush_cache_vunmap(
146 pcpu_chunk_addr(chunk, pcpu_first_unit_cpu, page_start), 145 pcpu_chunk_addr(chunk, pcpu_low_unit_cpu, page_start),
147 pcpu_chunk_addr(chunk, pcpu_last_unit_cpu, page_end)); 146 pcpu_chunk_addr(chunk, pcpu_high_unit_cpu, page_end));
148} 147}
149 148
150static void __pcpu_unmap_pages(unsigned long addr, int nr_pages) 149static void __pcpu_unmap_pages(unsigned long addr, int nr_pages)
@@ -206,8 +205,8 @@ static void pcpu_post_unmap_tlb_flush(struct pcpu_chunk *chunk,
206 int page_start, int page_end) 205 int page_start, int page_end)
207{ 206{
208 flush_tlb_kernel_range( 207 flush_tlb_kernel_range(
209 pcpu_chunk_addr(chunk, pcpu_first_unit_cpu, page_start), 208 pcpu_chunk_addr(chunk, pcpu_low_unit_cpu, page_start),
210 pcpu_chunk_addr(chunk, pcpu_last_unit_cpu, page_end)); 209 pcpu_chunk_addr(chunk, pcpu_high_unit_cpu, page_end));
211} 210}
212 211
213static int __pcpu_map_pages(unsigned long addr, struct page **pages, 212static int __pcpu_map_pages(unsigned long addr, struct page **pages,
@@ -284,8 +283,8 @@ static void pcpu_post_map_flush(struct pcpu_chunk *chunk,
284 int page_start, int page_end) 283 int page_start, int page_end)
285{ 284{
286 flush_cache_vmap( 285 flush_cache_vmap(
287 pcpu_chunk_addr(chunk, pcpu_first_unit_cpu, page_start), 286 pcpu_chunk_addr(chunk, pcpu_low_unit_cpu, page_start),
288 pcpu_chunk_addr(chunk, pcpu_last_unit_cpu, page_end)); 287 pcpu_chunk_addr(chunk, pcpu_high_unit_cpu, page_end));
289} 288}
290 289
291/** 290/**
diff --git a/mm/percpu.c b/mm/percpu.c
index bf80e55dbed7..3bb810a72006 100644
--- a/mm/percpu.c
+++ b/mm/percpu.c
@@ -116,9 +116,9 @@ static int pcpu_atom_size __read_mostly;
116static int pcpu_nr_slots __read_mostly; 116static int pcpu_nr_slots __read_mostly;
117static size_t pcpu_chunk_struct_size __read_mostly; 117static size_t pcpu_chunk_struct_size __read_mostly;
118 118
119/* cpus with the lowest and highest unit numbers */ 119/* cpus with the lowest and highest unit addresses */
120static unsigned int pcpu_first_unit_cpu __read_mostly; 120static unsigned int pcpu_low_unit_cpu __read_mostly;
121static unsigned int pcpu_last_unit_cpu __read_mostly; 121static unsigned int pcpu_high_unit_cpu __read_mostly;
122 122
123/* the address of the first chunk which starts with the kernel static area */ 123/* the address of the first chunk which starts with the kernel static area */
124void *pcpu_base_addr __read_mostly; 124void *pcpu_base_addr __read_mostly;
@@ -273,11 +273,11 @@ static void __maybe_unused pcpu_next_pop(struct pcpu_chunk *chunk,
273 (rs) = (re) + 1, pcpu_next_pop((chunk), &(rs), &(re), (end))) 273 (rs) = (re) + 1, pcpu_next_pop((chunk), &(rs), &(re), (end)))
274 274
275/** 275/**
276 * pcpu_mem_alloc - allocate memory 276 * pcpu_mem_zalloc - allocate memory
277 * @size: bytes to allocate 277 * @size: bytes to allocate
278 * 278 *
279 * Allocate @size bytes. If @size is smaller than PAGE_SIZE, 279 * Allocate @size bytes. If @size is smaller than PAGE_SIZE,
280 * kzalloc() is used; otherwise, vmalloc() is used. The returned 280 * kzalloc() is used; otherwise, vzalloc() is used. The returned
281 * memory is always zeroed. 281 * memory is always zeroed.
282 * 282 *
283 * CONTEXT: 283 * CONTEXT:
@@ -286,7 +286,7 @@ static void __maybe_unused pcpu_next_pop(struct pcpu_chunk *chunk,
286 * RETURNS: 286 * RETURNS:
287 * Pointer to the allocated area on success, NULL on failure. 287 * Pointer to the allocated area on success, NULL on failure.
288 */ 288 */
289static void *pcpu_mem_alloc(size_t size) 289static void *pcpu_mem_zalloc(size_t size)
290{ 290{
291 if (WARN_ON_ONCE(!slab_is_available())) 291 if (WARN_ON_ONCE(!slab_is_available()))
292 return NULL; 292 return NULL;
@@ -302,7 +302,7 @@ static void *pcpu_mem_alloc(size_t size)
302 * @ptr: memory to free 302 * @ptr: memory to free
303 * @size: size of the area 303 * @size: size of the area
304 * 304 *
305 * Free @ptr. @ptr should have been allocated using pcpu_mem_alloc(). 305 * Free @ptr. @ptr should have been allocated using pcpu_mem_zalloc().
306 */ 306 */
307static void pcpu_mem_free(void *ptr, size_t size) 307static void pcpu_mem_free(void *ptr, size_t size)
308{ 308{
@@ -384,7 +384,7 @@ static int pcpu_extend_area_map(struct pcpu_chunk *chunk, int new_alloc)
384 size_t old_size = 0, new_size = new_alloc * sizeof(new[0]); 384 size_t old_size = 0, new_size = new_alloc * sizeof(new[0]);
385 unsigned long flags; 385 unsigned long flags;
386 386
387 new = pcpu_mem_alloc(new_size); 387 new = pcpu_mem_zalloc(new_size);
388 if (!new) 388 if (!new)
389 return -ENOMEM; 389 return -ENOMEM;
390 390
@@ -604,11 +604,12 @@ static struct pcpu_chunk *pcpu_alloc_chunk(void)
604{ 604{
605 struct pcpu_chunk *chunk; 605 struct pcpu_chunk *chunk;
606 606
607 chunk = pcpu_mem_alloc(pcpu_chunk_struct_size); 607 chunk = pcpu_mem_zalloc(pcpu_chunk_struct_size);
608 if (!chunk) 608 if (!chunk)
609 return NULL; 609 return NULL;
610 610
611 chunk->map = pcpu_mem_alloc(PCPU_DFL_MAP_ALLOC * sizeof(chunk->map[0])); 611 chunk->map = pcpu_mem_zalloc(PCPU_DFL_MAP_ALLOC *
612 sizeof(chunk->map[0]));
612 if (!chunk->map) { 613 if (!chunk->map) {
613 kfree(chunk); 614 kfree(chunk);
614 return NULL; 615 return NULL;
@@ -977,6 +978,17 @@ bool is_kernel_percpu_address(unsigned long addr)
977 * address. The caller is responsible for ensuring @addr stays valid 978 * address. The caller is responsible for ensuring @addr stays valid
978 * until this function finishes. 979 * until this function finishes.
979 * 980 *
981 * percpu allocator has special setup for the first chunk, which currently
982 * supports either embedding in linear address space or vmalloc mapping,
983 * and, from the second one, the backing allocator (currently either vm or
984 * km) provides translation.
985 *
986 * The addr can be tranlated simply without checking if it falls into the
987 * first chunk. But the current code reflects better how percpu allocator
988 * actually works, and the verification can discover both bugs in percpu
989 * allocator itself and per_cpu_ptr_to_phys() callers. So we keep current
990 * code.
991 *
980 * RETURNS: 992 * RETURNS:
981 * The physical address for @addr. 993 * The physical address for @addr.
982 */ 994 */
@@ -984,19 +996,19 @@ phys_addr_t per_cpu_ptr_to_phys(void *addr)
984{ 996{
985 void __percpu *base = __addr_to_pcpu_ptr(pcpu_base_addr); 997 void __percpu *base = __addr_to_pcpu_ptr(pcpu_base_addr);
986 bool in_first_chunk = false; 998 bool in_first_chunk = false;
987 unsigned long first_start, first_end; 999 unsigned long first_low, first_high;
988 unsigned int cpu; 1000 unsigned int cpu;
989 1001
990 /* 1002 /*
991 * The following test on first_start/end isn't strictly 1003 * The following test on unit_low/high isn't strictly
992 * necessary but will speed up lookups of addresses which 1004 * necessary but will speed up lookups of addresses which
993 * aren't in the first chunk. 1005 * aren't in the first chunk.
994 */ 1006 */
995 first_start = pcpu_chunk_addr(pcpu_first_chunk, pcpu_first_unit_cpu, 0); 1007 first_low = pcpu_chunk_addr(pcpu_first_chunk, pcpu_low_unit_cpu, 0);
996 first_end = pcpu_chunk_addr(pcpu_first_chunk, pcpu_last_unit_cpu, 1008 first_high = pcpu_chunk_addr(pcpu_first_chunk, pcpu_high_unit_cpu,
997 pcpu_unit_pages); 1009 pcpu_unit_pages);
998 if ((unsigned long)addr >= first_start && 1010 if ((unsigned long)addr >= first_low &&
999 (unsigned long)addr < first_end) { 1011 (unsigned long)addr < first_high) {
1000 for_each_possible_cpu(cpu) { 1012 for_each_possible_cpu(cpu) {
1001 void *start = per_cpu_ptr(base, cpu); 1013 void *start = per_cpu_ptr(base, cpu);
1002 1014
@@ -1233,7 +1245,9 @@ int __init pcpu_setup_first_chunk(const struct pcpu_alloc_info *ai,
1233 1245
1234 for (cpu = 0; cpu < nr_cpu_ids; cpu++) 1246 for (cpu = 0; cpu < nr_cpu_ids; cpu++)
1235 unit_map[cpu] = UINT_MAX; 1247 unit_map[cpu] = UINT_MAX;
1236 pcpu_first_unit_cpu = NR_CPUS; 1248
1249 pcpu_low_unit_cpu = NR_CPUS;
1250 pcpu_high_unit_cpu = NR_CPUS;
1237 1251
1238 for (group = 0, unit = 0; group < ai->nr_groups; group++, unit += i) { 1252 for (group = 0, unit = 0; group < ai->nr_groups; group++, unit += i) {
1239 const struct pcpu_group_info *gi = &ai->groups[group]; 1253 const struct pcpu_group_info *gi = &ai->groups[group];
@@ -1253,9 +1267,13 @@ int __init pcpu_setup_first_chunk(const struct pcpu_alloc_info *ai,
1253 unit_map[cpu] = unit + i; 1267 unit_map[cpu] = unit + i;
1254 unit_off[cpu] = gi->base_offset + i * ai->unit_size; 1268 unit_off[cpu] = gi->base_offset + i * ai->unit_size;
1255 1269
1256 if (pcpu_first_unit_cpu == NR_CPUS) 1270 /* determine low/high unit_cpu */
1257 pcpu_first_unit_cpu = cpu; 1271 if (pcpu_low_unit_cpu == NR_CPUS ||
1258 pcpu_last_unit_cpu = cpu; 1272 unit_off[cpu] < unit_off[pcpu_low_unit_cpu])
1273 pcpu_low_unit_cpu = cpu;
1274 if (pcpu_high_unit_cpu == NR_CPUS ||
1275 unit_off[cpu] > unit_off[pcpu_high_unit_cpu])
1276 pcpu_high_unit_cpu = cpu;
1259 } 1277 }
1260 } 1278 }
1261 pcpu_nr_units = unit; 1279 pcpu_nr_units = unit;
@@ -1889,7 +1907,7 @@ void __init percpu_init_late(void)
1889 1907
1890 BUILD_BUG_ON(size > PAGE_SIZE); 1908 BUILD_BUG_ON(size > PAGE_SIZE);
1891 1909
1892 map = pcpu_mem_alloc(size); 1910 map = pcpu_mem_zalloc(size);
1893 BUG_ON(!map); 1911 BUG_ON(!map);
1894 1912
1895 spin_lock_irqsave(&pcpu_lock, flags); 1913 spin_lock_irqsave(&pcpu_lock, flags);
diff --git a/mm/slub.c b/mm/slub.c
index 7d2a996c307e..ed3334d9b6da 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -1862,7 +1862,7 @@ static void unfreeze_partials(struct kmem_cache *s)
1862{ 1862{
1863 struct kmem_cache_node *n = NULL; 1863 struct kmem_cache_node *n = NULL;
1864 struct kmem_cache_cpu *c = this_cpu_ptr(s->cpu_slab); 1864 struct kmem_cache_cpu *c = this_cpu_ptr(s->cpu_slab);
1865 struct page *page; 1865 struct page *page, *discard_page = NULL;
1866 1866
1867 while ((page = c->partial)) { 1867 while ((page = c->partial)) {
1868 enum slab_modes { M_PARTIAL, M_FREE }; 1868 enum slab_modes { M_PARTIAL, M_FREE };
@@ -1904,7 +1904,8 @@ static void unfreeze_partials(struct kmem_cache *s)
1904 if (l == M_PARTIAL) 1904 if (l == M_PARTIAL)
1905 remove_partial(n, page); 1905 remove_partial(n, page);
1906 else 1906 else
1907 add_partial(n, page, 1); 1907 add_partial(n, page,
1908 DEACTIVATE_TO_TAIL);
1908 1909
1909 l = m; 1910 l = m;
1910 } 1911 }
@@ -1915,14 +1916,22 @@ static void unfreeze_partials(struct kmem_cache *s)
1915 "unfreezing slab")); 1916 "unfreezing slab"));
1916 1917
1917 if (m == M_FREE) { 1918 if (m == M_FREE) {
1918 stat(s, DEACTIVATE_EMPTY); 1919 page->next = discard_page;
1919 discard_slab(s, page); 1920 discard_page = page;
1920 stat(s, FREE_SLAB);
1921 } 1921 }
1922 } 1922 }
1923 1923
1924 if (n) 1924 if (n)
1925 spin_unlock(&n->list_lock); 1925 spin_unlock(&n->list_lock);
1926
1927 while (discard_page) {
1928 page = discard_page;
1929 discard_page = discard_page->next;
1930
1931 stat(s, DEACTIVATE_EMPTY);
1932 discard_slab(s, page);
1933 stat(s, FREE_SLAB);
1934 }
1926} 1935}
1927 1936
1928/* 1937/*
@@ -1969,7 +1978,7 @@ int put_cpu_partial(struct kmem_cache *s, struct page *page, int drain)
1969 page->pobjects = pobjects; 1978 page->pobjects = pobjects;
1970 page->next = oldpage; 1979 page->next = oldpage;
1971 1980
1972 } while (this_cpu_cmpxchg(s->cpu_slab->partial, oldpage, page) != oldpage); 1981 } while (irqsafe_cpu_cmpxchg(s->cpu_slab->partial, oldpage, page) != oldpage);
1973 stat(s, CPU_PARTIAL_FREE); 1982 stat(s, CPU_PARTIAL_FREE);
1974 return pobjects; 1983 return pobjects;
1975} 1984}
@@ -4435,30 +4444,31 @@ static ssize_t show_slab_objects(struct kmem_cache *s,
4435 4444
4436 for_each_possible_cpu(cpu) { 4445 for_each_possible_cpu(cpu) {
4437 struct kmem_cache_cpu *c = per_cpu_ptr(s->cpu_slab, cpu); 4446 struct kmem_cache_cpu *c = per_cpu_ptr(s->cpu_slab, cpu);
4447 int node = ACCESS_ONCE(c->node);
4438 struct page *page; 4448 struct page *page;
4439 4449
4440 if (!c || c->node < 0) 4450 if (node < 0)
4441 continue; 4451 continue;
4442 4452 page = ACCESS_ONCE(c->page);
4443 if (c->page) { 4453 if (page) {
4444 if (flags & SO_TOTAL) 4454 if (flags & SO_TOTAL)
4445 x = c->page->objects; 4455 x = page->objects;
4446 else if (flags & SO_OBJECTS) 4456 else if (flags & SO_OBJECTS)
4447 x = c->page->inuse; 4457 x = page->inuse;
4448 else 4458 else
4449 x = 1; 4459 x = 1;
4450 4460
4451 total += x; 4461 total += x;
4452 nodes[c->node] += x; 4462 nodes[node] += x;
4453 } 4463 }
4454 page = c->partial; 4464 page = c->partial;
4455 4465
4456 if (page) { 4466 if (page) {
4457 x = page->pobjects; 4467 x = page->pobjects;
4458 total += x; 4468 total += x;
4459 nodes[c->node] += x; 4469 nodes[node] += x;
4460 } 4470 }
4461 per_cpu[c->node]++; 4471 per_cpu[node]++;
4462 } 4472 }
4463 } 4473 }
4464 4474
diff --git a/net/sunrpc/xprtsock.c b/net/sunrpc/xprtsock.c
index 2d78d95955ab..55472c48825e 100644
--- a/net/sunrpc/xprtsock.c
+++ b/net/sunrpc/xprtsock.c
@@ -496,7 +496,7 @@ static int xs_nospace(struct rpc_task *task)
496 struct rpc_rqst *req = task->tk_rqstp; 496 struct rpc_rqst *req = task->tk_rqstp;
497 struct rpc_xprt *xprt = req->rq_xprt; 497 struct rpc_xprt *xprt = req->rq_xprt;
498 struct sock_xprt *transport = container_of(xprt, struct sock_xprt, xprt); 498 struct sock_xprt *transport = container_of(xprt, struct sock_xprt, xprt);
499 int ret = 0; 499 int ret = -EAGAIN;
500 500
501 dprintk("RPC: %5u xmit incomplete (%u left of %u)\n", 501 dprintk("RPC: %5u xmit incomplete (%u left of %u)\n",
502 task->tk_pid, req->rq_slen - req->rq_bytes_sent, 502 task->tk_pid, req->rq_slen - req->rq_bytes_sent,
@@ -508,7 +508,6 @@ static int xs_nospace(struct rpc_task *task)
508 /* Don't race with disconnect */ 508 /* Don't race with disconnect */
509 if (xprt_connected(xprt)) { 509 if (xprt_connected(xprt)) {
510 if (test_bit(SOCK_ASYNC_NOSPACE, &transport->sock->flags)) { 510 if (test_bit(SOCK_ASYNC_NOSPACE, &transport->sock->flags)) {
511 ret = -EAGAIN;
512 /* 511 /*
513 * Notify TCP that we're limited by the application 512 * Notify TCP that we're limited by the application
514 * window size 513 * window size
diff --git a/sound/pci/cs5535audio/cs5535audio_pcm.c b/sound/pci/cs5535audio/cs5535audio_pcm.c
index e083122ca55a..dbf94b189e75 100644
--- a/sound/pci/cs5535audio/cs5535audio_pcm.c
+++ b/sound/pci/cs5535audio/cs5535audio_pcm.c
@@ -148,7 +148,7 @@ static int cs5535audio_build_dma_packets(struct cs5535audio *cs5535au,
148 struct cs5535audio_dma_desc *desc = 148 struct cs5535audio_dma_desc *desc =
149 &((struct cs5535audio_dma_desc *) dma->desc_buf.area)[i]; 149 &((struct cs5535audio_dma_desc *) dma->desc_buf.area)[i];
150 desc->addr = cpu_to_le32(addr); 150 desc->addr = cpu_to_le32(addr);
151 desc->size = cpu_to_le32(period_bytes); 151 desc->size = cpu_to_le16(period_bytes);
152 desc->ctlreserved = cpu_to_le16(PRD_EOP); 152 desc->ctlreserved = cpu_to_le16(PRD_EOP);
153 desc_addr += sizeof(struct cs5535audio_dma_desc); 153 desc_addr += sizeof(struct cs5535audio_dma_desc);
154 addr += period_bytes; 154 addr += period_bytes;
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index e44b107fdc75..4562e9de6a1a 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -4046,9 +4046,9 @@ int snd_hda_check_board_codec_sid_config(struct hda_codec *codec,
4046 4046
4047 /* Search for codec ID */ 4047 /* Search for codec ID */
4048 for (q = tbl; q->subvendor; q++) { 4048 for (q = tbl; q->subvendor; q++) {
4049 unsigned long vendorid = (q->subdevice) | (q->subvendor << 16); 4049 unsigned int mask = 0xffff0000 | q->subdevice_mask;
4050 4050 unsigned int id = (q->subdevice | (q->subvendor << 16)) & mask;
4051 if (vendorid == codec->subsystem_id) 4051 if ((codec->subsystem_id & mask) == id)
4052 break; 4052 break;
4053 } 4053 }
4054 4054
diff --git a/sound/pci/hda/hda_eld.c b/sound/pci/hda/hda_eld.c
index 7ae7578bdcc0..c1da422e085a 100644
--- a/sound/pci/hda/hda_eld.c
+++ b/sound/pci/hda/hda_eld.c
@@ -347,18 +347,28 @@ int snd_hdmi_get_eld(struct hdmi_eld *eld,
347 347
348 for (i = 0; i < size; i++) { 348 for (i = 0; i < size; i++) {
349 unsigned int val = hdmi_get_eld_data(codec, nid, i); 349 unsigned int val = hdmi_get_eld_data(codec, nid, i);
350 /*
351 * Graphics driver might be writing to ELD buffer right now.
352 * Just abort. The caller will repoll after a while.
353 */
350 if (!(val & AC_ELDD_ELD_VALID)) { 354 if (!(val & AC_ELDD_ELD_VALID)) {
351 if (!i) {
352 snd_printd(KERN_INFO
353 "HDMI: invalid ELD data\n");
354 ret = -EINVAL;
355 goto error;
356 }
357 snd_printd(KERN_INFO 355 snd_printd(KERN_INFO
358 "HDMI: invalid ELD data byte %d\n", i); 356 "HDMI: invalid ELD data byte %d\n", i);
359 val = 0; 357 ret = -EINVAL;
360 } else 358 goto error;
361 val &= AC_ELDD_ELD_DATA; 359 }
360 val &= AC_ELDD_ELD_DATA;
361 /*
362 * The first byte cannot be zero. This can happen on some DVI
363 * connections. Some Intel chips may also need some 250ms delay
364 * to return non-zero ELD data, even when the graphics driver
365 * correctly writes ELD content before setting ELD_valid bit.
366 */
367 if (!val && !i) {
368 snd_printdd(KERN_INFO "HDMI: 0 ELD data\n");
369 ret = -EINVAL;
370 goto error;
371 }
362 buf[i] = val; 372 buf[i] = val;
363 } 373 }
364 374
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index 2fbab8e29576..70a7abda7e22 100644
--- a/sound/pci/hda/patch_cirrus.c
+++ b/sound/pci/hda/patch_cirrus.c
@@ -58,6 +58,8 @@ struct cs_spec {
58 unsigned int gpio_mask; 58 unsigned int gpio_mask;
59 unsigned int gpio_dir; 59 unsigned int gpio_dir;
60 unsigned int gpio_data; 60 unsigned int gpio_data;
61 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
62 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
61 63
62 struct hda_pcm pcm_rec[2]; /* PCM information */ 64 struct hda_pcm pcm_rec[2]; /* PCM information */
63 65
@@ -76,6 +78,7 @@ enum {
76 CS420X_MBP53, 78 CS420X_MBP53,
77 CS420X_MBP55, 79 CS420X_MBP55,
78 CS420X_IMAC27, 80 CS420X_IMAC27,
81 CS420X_APPLE,
79 CS420X_AUTO, 82 CS420X_AUTO,
80 CS420X_MODELS 83 CS420X_MODELS
81}; 84};
@@ -928,10 +931,9 @@ static void cs_automute(struct hda_codec *codec)
928 spdif_present ? 0 : PIN_OUT); 931 spdif_present ? 0 : PIN_OUT);
929 } 932 }
930 } 933 }
931 if (spec->board_config == CS420X_MBP53 || 934 if (spec->gpio_eapd_hp) {
932 spec->board_config == CS420X_MBP55 || 935 unsigned int gpio = hp_present ?
933 spec->board_config == CS420X_IMAC27) { 936 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
934 unsigned int gpio = hp_present ? 0x02 : 0x08;
935 snd_hda_codec_write(codec, 0x01, 0, 937 snd_hda_codec_write(codec, 0x01, 0,
936 AC_VERB_SET_GPIO_DATA, gpio); 938 AC_VERB_SET_GPIO_DATA, gpio);
937 } 939 }
@@ -1276,6 +1278,7 @@ static const char * const cs420x_models[CS420X_MODELS] = {
1276 [CS420X_MBP53] = "mbp53", 1278 [CS420X_MBP53] = "mbp53",
1277 [CS420X_MBP55] = "mbp55", 1279 [CS420X_MBP55] = "mbp55",
1278 [CS420X_IMAC27] = "imac27", 1280 [CS420X_IMAC27] = "imac27",
1281 [CS420X_APPLE] = "apple",
1279 [CS420X_AUTO] = "auto", 1282 [CS420X_AUTO] = "auto",
1280}; 1283};
1281 1284
@@ -1285,7 +1288,13 @@ static const struct snd_pci_quirk cs420x_cfg_tbl[] = {
1285 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55), 1288 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
1286 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55), 1289 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
1287 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55), 1290 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
1288 SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27), 1291 /* this conflicts with too many other models */
1292 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
1293 {} /* terminator */
1294};
1295
1296static const struct snd_pci_quirk cs420x_codec_cfg_tbl[] = {
1297 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
1289 {} /* terminator */ 1298 {} /* terminator */
1290}; 1299};
1291 1300
@@ -1367,6 +1376,10 @@ static int patch_cs420x(struct hda_codec *codec)
1367 spec->board_config = 1376 spec->board_config =
1368 snd_hda_check_board_config(codec, CS420X_MODELS, 1377 snd_hda_check_board_config(codec, CS420X_MODELS,
1369 cs420x_models, cs420x_cfg_tbl); 1378 cs420x_models, cs420x_cfg_tbl);
1379 if (spec->board_config < 0)
1380 spec->board_config =
1381 snd_hda_check_board_codec_sid_config(codec,
1382 CS420X_MODELS, NULL, cs420x_codec_cfg_tbl);
1370 if (spec->board_config >= 0) 1383 if (spec->board_config >= 0)
1371 fix_pincfg(codec, spec->board_config, cs_pincfgs); 1384 fix_pincfg(codec, spec->board_config, cs_pincfgs);
1372 1385
@@ -1374,10 +1387,11 @@ static int patch_cs420x(struct hda_codec *codec)
1374 case CS420X_IMAC27: 1387 case CS420X_IMAC27:
1375 case CS420X_MBP53: 1388 case CS420X_MBP53:
1376 case CS420X_MBP55: 1389 case CS420X_MBP55:
1377 /* GPIO1 = headphones */ 1390 case CS420X_APPLE:
1378 /* GPIO3 = speakers */ 1391 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
1379 spec->gpio_mask = 0x0a; 1392 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
1380 spec->gpio_dir = 0x0a; 1393 spec->gpio_mask = spec->gpio_dir =
1394 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
1381 break; 1395 break;
1382 } 1396 }
1383 1397
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 9850c5b481ea..c505fd5d338c 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -69,6 +69,7 @@ struct hdmi_spec_per_pin {
69 struct hda_codec *codec; 69 struct hda_codec *codec;
70 struct hdmi_eld sink_eld; 70 struct hdmi_eld sink_eld;
71 struct delayed_work work; 71 struct delayed_work work;
72 int repoll_count;
72}; 73};
73 74
74struct hdmi_spec { 75struct hdmi_spec {
@@ -748,7 +749,7 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
748 * Unsolicited events 749 * Unsolicited events
749 */ 750 */
750 751
751static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, bool retry); 752static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
752 753
753static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 754static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
754{ 755{
@@ -766,7 +767,7 @@ static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
766 if (pin_idx < 0) 767 if (pin_idx < 0)
767 return; 768 return;
768 769
769 hdmi_present_sense(&spec->pins[pin_idx], true); 770 hdmi_present_sense(&spec->pins[pin_idx], 1);
770} 771}
771 772
772static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 773static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
@@ -960,7 +961,7 @@ static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
960 return 0; 961 return 0;
961} 962}
962 963
963static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, bool retry) 964static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
964{ 965{
965 struct hda_codec *codec = per_pin->codec; 966 struct hda_codec *codec = per_pin->codec;
966 struct hdmi_eld *eld = &per_pin->sink_eld; 967 struct hdmi_eld *eld = &per_pin->sink_eld;
@@ -989,7 +990,7 @@ static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, bool retry)
989 if (eld_valid) { 990 if (eld_valid) {
990 if (!snd_hdmi_get_eld(eld, codec, pin_nid)) 991 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
991 snd_hdmi_show_eld(eld); 992 snd_hdmi_show_eld(eld);
992 else if (retry) { 993 else if (repoll) {
993 queue_delayed_work(codec->bus->workq, 994 queue_delayed_work(codec->bus->workq,
994 &per_pin->work, 995 &per_pin->work,
995 msecs_to_jiffies(300)); 996 msecs_to_jiffies(300));
@@ -1004,7 +1005,10 @@ static void hdmi_repoll_eld(struct work_struct *work)
1004 struct hdmi_spec_per_pin *per_pin = 1005 struct hdmi_spec_per_pin *per_pin =
1005 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work); 1006 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1006 1007
1007 hdmi_present_sense(per_pin, false); 1008 if (per_pin->repoll_count++ > 6)
1009 per_pin->repoll_count = 0;
1010
1011 hdmi_present_sense(per_pin, per_pin->repoll_count);
1008} 1012}
1009 1013
1010static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1014static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
@@ -1235,7 +1239,7 @@ static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1235 if (err < 0) 1239 if (err < 0)
1236 return err; 1240 return err;
1237 1241
1238 hdmi_present_sense(per_pin, false); 1242 hdmi_present_sense(per_pin, 0);
1239 return 0; 1243 return 0;
1240} 1244}
1241 1245
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 336d14eb72af..cbde019d3d52 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -277,6 +277,12 @@ static bool alc_dyn_adc_pcm_resetup(struct hda_codec *codec, int cur)
277 return false; 277 return false;
278} 278}
279 279
280static inline hda_nid_t get_capsrc(struct alc_spec *spec, int idx)
281{
282 return spec->capsrc_nids ?
283 spec->capsrc_nids[idx] : spec->adc_nids[idx];
284}
285
280/* select the given imux item; either unmute exclusively or select the route */ 286/* select the given imux item; either unmute exclusively or select the route */
281static int alc_mux_select(struct hda_codec *codec, unsigned int adc_idx, 287static int alc_mux_select(struct hda_codec *codec, unsigned int adc_idx,
282 unsigned int idx, bool force) 288 unsigned int idx, bool force)
@@ -303,8 +309,7 @@ static int alc_mux_select(struct hda_codec *codec, unsigned int adc_idx,
303 adc_idx = spec->dyn_adc_idx[idx]; 309 adc_idx = spec->dyn_adc_idx[idx];
304 } 310 }
305 311
306 nid = spec->capsrc_nids ? 312 nid = get_capsrc(spec, adc_idx);
307 spec->capsrc_nids[adc_idx] : spec->adc_nids[adc_idx];
308 313
309 /* no selection? */ 314 /* no selection? */
310 num_conns = snd_hda_get_conn_list(codec, nid, NULL); 315 num_conns = snd_hda_get_conn_list(codec, nid, NULL);
@@ -1054,8 +1059,19 @@ static bool alc_rebuild_imux_for_auto_mic(struct hda_codec *codec)
1054 spec->imux_pins[2] = spec->dock_mic_pin; 1059 spec->imux_pins[2] = spec->dock_mic_pin;
1055 for (i = 0; i < 3; i++) { 1060 for (i = 0; i < 3; i++) {
1056 strcpy(imux->items[i].label, texts[i]); 1061 strcpy(imux->items[i].label, texts[i]);
1057 if (spec->imux_pins[i]) 1062 if (spec->imux_pins[i]) {
1063 hda_nid_t pin = spec->imux_pins[i];
1064 int c;
1065 for (c = 0; c < spec->num_adc_nids; c++) {
1066 hda_nid_t cap = get_capsrc(spec, c);
1067 int idx = get_connection_index(codec, cap, pin);
1068 if (idx >= 0) {
1069 imux->items[i].index = idx;
1070 break;
1071 }
1072 }
1058 imux->num_items = i + 1; 1073 imux->num_items = i + 1;
1074 }
1059 } 1075 }
1060 spec->num_mux_defs = 1; 1076 spec->num_mux_defs = 1;
1061 spec->input_mux = imux; 1077 spec->input_mux = imux;
@@ -1957,10 +1973,8 @@ static int alc_build_controls(struct hda_codec *codec)
1957 if (!kctl) 1973 if (!kctl)
1958 kctl = snd_hda_find_mixer_ctl(codec, "Input Source"); 1974 kctl = snd_hda_find_mixer_ctl(codec, "Input Source");
1959 for (i = 0; kctl && i < kctl->count; i++) { 1975 for (i = 0; kctl && i < kctl->count; i++) {
1960 const hda_nid_t *nids = spec->capsrc_nids; 1976 err = snd_hda_add_nid(codec, kctl, i,
1961 if (!nids) 1977 get_capsrc(spec, i));
1962 nids = spec->adc_nids;
1963 err = snd_hda_add_nid(codec, kctl, i, nids[i]);
1964 if (err < 0) 1978 if (err < 0)
1965 return err; 1979 return err;
1966 } 1980 }
@@ -2747,8 +2761,7 @@ static int alc_auto_create_input_ctls(struct hda_codec *codec)
2747 } 2761 }
2748 2762
2749 for (c = 0; c < num_adcs; c++) { 2763 for (c = 0; c < num_adcs; c++) {
2750 hda_nid_t cap = spec->capsrc_nids ? 2764 hda_nid_t cap = get_capsrc(spec, c);
2751 spec->capsrc_nids[c] : spec->adc_nids[c];
2752 idx = get_connection_index(codec, cap, pin); 2765 idx = get_connection_index(codec, cap, pin);
2753 if (idx >= 0) { 2766 if (idx >= 0) {
2754 spec->imux_pins[imux->num_items] = pin; 2767 spec->imux_pins[imux->num_items] = pin;
@@ -3694,8 +3707,7 @@ static int init_capsrc_for_pin(struct hda_codec *codec, hda_nid_t pin)
3694 if (!pin) 3707 if (!pin)
3695 return 0; 3708 return 0;
3696 for (i = 0; i < spec->num_adc_nids; i++) { 3709 for (i = 0; i < spec->num_adc_nids; i++) {
3697 hda_nid_t cap = spec->capsrc_nids ? 3710 hda_nid_t cap = get_capsrc(spec, i);
3698 spec->capsrc_nids[i] : spec->adc_nids[i];
3699 int idx; 3711 int idx;
3700 3712
3701 idx = get_connection_index(codec, cap, pin); 3713 idx = get_connection_index(codec, cap, pin);
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 470f6f286e81..f3658658548e 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -1641,6 +1641,8 @@ static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1641 "Alienware M17x", STAC_ALIENWARE_M17X), 1641 "Alienware M17x", STAC_ALIENWARE_M17X),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1643 "Alienware M17x", STAC_ALIENWARE_M17X), 1643 "Alienware M17x", STAC_ALIENWARE_M17X),
1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1645 "Alienware M17x", STAC_ALIENWARE_M17X),
1644 {} /* terminator */ 1646 {} /* terminator */
1645}; 1647};
1646 1648
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c
index 431c0d417eeb..b5137629f8e9 100644
--- a/sound/pci/hda/patch_via.c
+++ b/sound/pci/hda/patch_via.c
@@ -208,6 +208,7 @@ struct via_spec {
208 /* work to check hp jack state */ 208 /* work to check hp jack state */
209 struct hda_codec *codec; 209 struct hda_codec *codec;
210 struct delayed_work vt1708_hp_work; 210 struct delayed_work vt1708_hp_work;
211 int hp_work_active;
211 int vt1708_jack_detect; 212 int vt1708_jack_detect;
212 int vt1708_hp_present; 213 int vt1708_hp_present;
213 214
@@ -305,27 +306,35 @@ enum {
305static void analog_low_current_mode(struct hda_codec *codec); 306static void analog_low_current_mode(struct hda_codec *codec);
306static bool is_aa_path_mute(struct hda_codec *codec); 307static bool is_aa_path_mute(struct hda_codec *codec);
307 308
308static void vt1708_start_hp_work(struct via_spec *spec) 309#define hp_detect_with_aa(codec) \
310 (snd_hda_get_bool_hint(codec, "analog_loopback_hp_detect") == 1 && \
311 !is_aa_path_mute(codec))
312
313static void vt1708_stop_hp_work(struct via_spec *spec)
309{ 314{
310 if (spec->codec_type != VT1708 || spec->autocfg.hp_pins[0] == 0) 315 if (spec->codec_type != VT1708 || spec->autocfg.hp_pins[0] == 0)
311 return; 316 return;
312 snd_hda_codec_write(spec->codec, 0x1, 0, 0xf81, 317 if (spec->hp_work_active) {
313 !spec->vt1708_jack_detect); 318 snd_hda_codec_write(spec->codec, 0x1, 0, 0xf81, 1);
314 if (!delayed_work_pending(&spec->vt1708_hp_work)) 319 cancel_delayed_work_sync(&spec->vt1708_hp_work);
315 schedule_delayed_work(&spec->vt1708_hp_work, 320 spec->hp_work_active = 0;
316 msecs_to_jiffies(100)); 321 }
317} 322}
318 323
319static void vt1708_stop_hp_work(struct via_spec *spec) 324static void vt1708_update_hp_work(struct via_spec *spec)
320{ 325{
321 if (spec->codec_type != VT1708 || spec->autocfg.hp_pins[0] == 0) 326 if (spec->codec_type != VT1708 || spec->autocfg.hp_pins[0] == 0)
322 return; 327 return;
323 if (snd_hda_get_bool_hint(spec->codec, "analog_loopback_hp_detect") == 1 328 if (spec->vt1708_jack_detect &&
324 && !is_aa_path_mute(spec->codec)) 329 (spec->active_streams || hp_detect_with_aa(spec->codec))) {
325 return; 330 if (!spec->hp_work_active) {
326 snd_hda_codec_write(spec->codec, 0x1, 0, 0xf81, 331 snd_hda_codec_write(spec->codec, 0x1, 0, 0xf81, 0);
327 !spec->vt1708_jack_detect); 332 schedule_delayed_work(&spec->vt1708_hp_work,
328 cancel_delayed_work_sync(&spec->vt1708_hp_work); 333 msecs_to_jiffies(100));
334 spec->hp_work_active = 1;
335 }
336 } else if (!hp_detect_with_aa(spec->codec))
337 vt1708_stop_hp_work(spec);
329} 338}
330 339
331static void set_widgets_power_state(struct hda_codec *codec) 340static void set_widgets_power_state(struct hda_codec *codec)
@@ -343,12 +352,7 @@ static int analog_input_switch_put(struct snd_kcontrol *kcontrol,
343 352
344 set_widgets_power_state(codec); 353 set_widgets_power_state(codec);
345 analog_low_current_mode(snd_kcontrol_chip(kcontrol)); 354 analog_low_current_mode(snd_kcontrol_chip(kcontrol));
346 if (snd_hda_get_bool_hint(codec, "analog_loopback_hp_detect") == 1) { 355 vt1708_update_hp_work(codec->spec);
347 if (is_aa_path_mute(codec))
348 vt1708_start_hp_work(codec->spec);
349 else
350 vt1708_stop_hp_work(codec->spec);
351 }
352 return change; 356 return change;
353} 357}
354 358
@@ -1154,7 +1158,7 @@ static int via_playback_multi_pcm_prepare(struct hda_pcm_stream *hinfo,
1154 spec->cur_dac_stream_tag = stream_tag; 1158 spec->cur_dac_stream_tag = stream_tag;
1155 spec->cur_dac_format = format; 1159 spec->cur_dac_format = format;
1156 mutex_unlock(&spec->config_mutex); 1160 mutex_unlock(&spec->config_mutex);
1157 vt1708_start_hp_work(spec); 1161 vt1708_update_hp_work(spec);
1158 return 0; 1162 return 0;
1159} 1163}
1160 1164
@@ -1174,7 +1178,7 @@ static int via_playback_hp_pcm_prepare(struct hda_pcm_stream *hinfo,
1174 spec->cur_hp_stream_tag = stream_tag; 1178 spec->cur_hp_stream_tag = stream_tag;
1175 spec->cur_hp_format = format; 1179 spec->cur_hp_format = format;
1176 mutex_unlock(&spec->config_mutex); 1180 mutex_unlock(&spec->config_mutex);
1177 vt1708_start_hp_work(spec); 1181 vt1708_update_hp_work(spec);
1178 return 0; 1182 return 0;
1179} 1183}
1180 1184
@@ -1188,7 +1192,7 @@ static int via_playback_multi_pcm_cleanup(struct hda_pcm_stream *hinfo,
1188 snd_hda_multi_out_analog_cleanup(codec, &spec->multiout); 1192 snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1189 spec->active_streams &= ~STREAM_MULTI_OUT; 1193 spec->active_streams &= ~STREAM_MULTI_OUT;
1190 mutex_unlock(&spec->config_mutex); 1194 mutex_unlock(&spec->config_mutex);
1191 vt1708_stop_hp_work(spec); 1195 vt1708_update_hp_work(spec);
1192 return 0; 1196 return 0;
1193} 1197}
1194 1198
@@ -1203,7 +1207,7 @@ static int via_playback_hp_pcm_cleanup(struct hda_pcm_stream *hinfo,
1203 snd_hda_codec_setup_stream(codec, spec->hp_dac_nid, 0, 0, 0); 1207 snd_hda_codec_setup_stream(codec, spec->hp_dac_nid, 0, 0, 0);
1204 spec->active_streams &= ~STREAM_INDEP_HP; 1208 spec->active_streams &= ~STREAM_INDEP_HP;
1205 mutex_unlock(&spec->config_mutex); 1209 mutex_unlock(&spec->config_mutex);
1206 vt1708_stop_hp_work(spec); 1210 vt1708_update_hp_work(spec);
1207 return 0; 1211 return 0;
1208} 1212}
1209 1213
@@ -1645,7 +1649,8 @@ static void via_hp_automute(struct hda_codec *codec)
1645 int nums; 1649 int nums;
1646 struct via_spec *spec = codec->spec; 1650 struct via_spec *spec = codec->spec;
1647 1651
1648 if (!spec->hp_independent_mode && spec->autocfg.hp_pins[0]) 1652 if (!spec->hp_independent_mode && spec->autocfg.hp_pins[0] &&
1653 (spec->codec_type != VT1708 || spec->vt1708_jack_detect))
1649 present = snd_hda_jack_detect(codec, spec->autocfg.hp_pins[0]); 1654 present = snd_hda_jack_detect(codec, spec->autocfg.hp_pins[0]);
1650 1655
1651 if (spec->smart51_enabled) 1656 if (spec->smart51_enabled)
@@ -2612,8 +2617,6 @@ static int vt1708_jack_detect_get(struct snd_kcontrol *kcontrol,
2612 2617
2613 if (spec->codec_type != VT1708) 2618 if (spec->codec_type != VT1708)
2614 return 0; 2619 return 0;
2615 spec->vt1708_jack_detect =
2616 !((snd_hda_codec_read(codec, 0x1, 0, 0xf84, 0) >> 8) & 0x1);
2617 ucontrol->value.integer.value[0] = spec->vt1708_jack_detect; 2620 ucontrol->value.integer.value[0] = spec->vt1708_jack_detect;
2618 return 0; 2621 return 0;
2619} 2622}
@@ -2623,18 +2626,22 @@ static int vt1708_jack_detect_put(struct snd_kcontrol *kcontrol,
2623{ 2626{
2624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2625 struct via_spec *spec = codec->spec; 2628 struct via_spec *spec = codec->spec;
2626 int change; 2629 int val;
2627 2630
2628 if (spec->codec_type != VT1708) 2631 if (spec->codec_type != VT1708)
2629 return 0; 2632 return 0;
2630 spec->vt1708_jack_detect = ucontrol->value.integer.value[0]; 2633 val = !!ucontrol->value.integer.value[0];
2631 change = (0x1 & (snd_hda_codec_read(codec, 0x1, 0, 0xf84, 0) >> 8)) 2634 if (spec->vt1708_jack_detect == val)
2632 == !spec->vt1708_jack_detect; 2635 return 0;
2633 if (spec->vt1708_jack_detect) { 2636 spec->vt1708_jack_detect = val;
2637 if (spec->vt1708_jack_detect &&
2638 snd_hda_get_bool_hint(codec, "analog_loopback_hp_detect") != 1) {
2634 mute_aa_path(codec, 1); 2639 mute_aa_path(codec, 1);
2635 notify_aa_path_ctls(codec); 2640 notify_aa_path_ctls(codec);
2636 } 2641 }
2637 return change; 2642 via_hp_automute(codec);
2643 vt1708_update_hp_work(spec);
2644 return 1;
2638} 2645}
2639 2646
2640static const struct snd_kcontrol_new vt1708_jack_detect_ctl = { 2647static const struct snd_kcontrol_new vt1708_jack_detect_ctl = {
@@ -2771,6 +2778,7 @@ static int via_init(struct hda_codec *codec)
2771 via_auto_init_unsol_event(codec); 2778 via_auto_init_unsol_event(codec);
2772 2779
2773 via_hp_automute(codec); 2780 via_hp_automute(codec);
2781 vt1708_update_hp_work(spec);
2774 2782
2775 return 0; 2783 return 0;
2776} 2784}
@@ -2787,7 +2795,9 @@ static void vt1708_update_hp_jack_state(struct work_struct *work)
2787 spec->vt1708_hp_present ^= 1; 2795 spec->vt1708_hp_present ^= 1;
2788 via_hp_automute(spec->codec); 2796 via_hp_automute(spec->codec);
2789 } 2797 }
2790 vt1708_start_hp_work(spec); 2798 if (spec->vt1708_jack_detect)
2799 schedule_delayed_work(&spec->vt1708_hp_work,
2800 msecs_to_jiffies(100));
2791} 2801}
2792 2802
2793static int get_mux_nids(struct hda_codec *codec) 2803static int get_mux_nids(struct hda_codec *codec)
diff --git a/sound/pci/lx6464es/lx_core.c b/sound/pci/lx6464es/lx_core.c
index 5c8717e29eeb..8c3e7fcefd99 100644
--- a/sound/pci/lx6464es/lx_core.c
+++ b/sound/pci/lx6464es/lx_core.c
@@ -78,10 +78,15 @@ unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port)
78 return ioread32(address); 78 return ioread32(address);
79} 79}
80 80
81void lx_dsp_reg_readbuf(struct lx6464es *chip, int port, u32 *data, u32 len) 81static void lx_dsp_reg_readbuf(struct lx6464es *chip, int port, u32 *data,
82 u32 len)
82{ 83{
83 void __iomem *address = lx_dsp_register(chip, port); 84 u32 __iomem *address = lx_dsp_register(chip, port);
84 memcpy_fromio(data, address, len*sizeof(u32)); 85 int i;
86
87 /* we cannot use memcpy_fromio */
88 for (i = 0; i != len; ++i)
89 data[i] = ioread32(address + i);
85} 90}
86 91
87 92
@@ -91,11 +96,15 @@ void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data)
91 iowrite32(data, address); 96 iowrite32(data, address);
92} 97}
93 98
94void lx_dsp_reg_writebuf(struct lx6464es *chip, int port, const u32 *data, 99static void lx_dsp_reg_writebuf(struct lx6464es *chip, int port,
95 u32 len) 100 const u32 *data, u32 len)
96{ 101{
97 void __iomem *address = lx_dsp_register(chip, port); 102 u32 __iomem *address = lx_dsp_register(chip, port);
98 memcpy_toio(address, data, len*sizeof(u32)); 103 int i;
104
105 /* we cannot use memcpy_to */
106 for (i = 0; i != len; ++i)
107 iowrite32(data[i], address + i);
99} 108}
100 109
101 110
diff --git a/sound/pci/lx6464es/lx_core.h b/sound/pci/lx6464es/lx_core.h
index 1dd562980b6c..4d7ff797a646 100644
--- a/sound/pci/lx6464es/lx_core.h
+++ b/sound/pci/lx6464es/lx_core.h
@@ -72,10 +72,7 @@ enum {
72}; 72};
73 73
74unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port); 74unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port);
75void lx_dsp_reg_readbuf(struct lx6464es *chip, int port, u32 *data, u32 len);
76void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data); 75void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data);
77void lx_dsp_reg_writebuf(struct lx6464es *chip, int port, const u32 *data,
78 u32 len);
79 76
80/* plx register access */ 77/* plx register access */
81enum { 78enum {
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index e760adad9523..19ee2203cbb5 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -6518,7 +6518,7 @@ static int __devinit snd_hdspm_create(struct snd_card *card,
6518 hdspm->io_type = AES32; 6518 hdspm->io_type = AES32;
6519 hdspm->card_name = "RME AES32"; 6519 hdspm->card_name = "RME AES32";
6520 hdspm->midiPorts = 2; 6520 hdspm->midiPorts = 2;
6521 } else if ((hdspm->firmware_rev == 0xd5) || 6521 } else if ((hdspm->firmware_rev == 0xd2) ||
6522 ((hdspm->firmware_rev >= 0xc8) && 6522 ((hdspm->firmware_rev >= 0xc8) &&
6523 (hdspm->firmware_rev <= 0xcf))) { 6523 (hdspm->firmware_rev <= 0xcf))) {
6524 hdspm->io_type = MADI; 6524 hdspm->io_type = MADI;
diff --git a/sound/soc/codecs/adau1373.c b/sound/soc/codecs/adau1373.c
index 1ccf8dd47576..45c63028b40d 100644
--- a/sound/soc/codecs/adau1373.c
+++ b/sound/soc/codecs/adau1373.c
@@ -245,7 +245,7 @@ static const char *adau1373_bass_hpf_cutoff_text[] = {
245}; 245};
246 246
247static const unsigned int adau1373_bass_tlv[] = { 247static const unsigned int adau1373_bass_tlv[] = {
248 TLV_DB_RANGE_HEAD(4), 248 TLV_DB_RANGE_HEAD(3),
249 0, 2, TLV_DB_SCALE_ITEM(-600, 600, 1), 249 0, 2, TLV_DB_SCALE_ITEM(-600, 600, 1),
250 3, 4, TLV_DB_SCALE_ITEM(950, 250, 0), 250 3, 4, TLV_DB_SCALE_ITEM(950, 250, 0),
251 5, 7, TLV_DB_SCALE_ITEM(1400, 150, 0), 251 5, 7, TLV_DB_SCALE_ITEM(1400, 150, 0),
diff --git a/sound/soc/codecs/cs4271.c b/sound/soc/codecs/cs4271.c
index 23d1bd5dadda..69fde1506fe1 100644
--- a/sound/soc/codecs/cs4271.c
+++ b/sound/soc/codecs/cs4271.c
@@ -434,7 +434,8 @@ static int cs4271_soc_suspend(struct snd_soc_codec *codec, pm_message_t mesg)
434{ 434{
435 int ret; 435 int ret;
436 /* Set power-down bit */ 436 /* Set power-down bit */
437 ret = snd_soc_update_bits(codec, CS4271_MODE2, 0, CS4271_MODE2_PDN); 437 ret = snd_soc_update_bits(codec, CS4271_MODE2, CS4271_MODE2_PDN,
438 CS4271_MODE2_PDN);
438 if (ret < 0) 439 if (ret < 0)
439 return ret; 440 return ret;
440 return 0; 441 return 0;
@@ -501,8 +502,9 @@ static int cs4271_probe(struct snd_soc_codec *codec)
501 return ret; 502 return ret;
502 } 503 }
503 504
504 ret = snd_soc_update_bits(codec, CS4271_MODE2, 0, 505 ret = snd_soc_update_bits(codec, CS4271_MODE2,
505 CS4271_MODE2_PDN | CS4271_MODE2_CPEN); 506 CS4271_MODE2_PDN | CS4271_MODE2_CPEN,
507 CS4271_MODE2_PDN | CS4271_MODE2_CPEN);
506 if (ret < 0) 508 if (ret < 0)
507 return ret; 509 return ret;
508 ret = snd_soc_update_bits(codec, CS4271_MODE2, CS4271_MODE2_PDN, 0); 510 ret = snd_soc_update_bits(codec, CS4271_MODE2, CS4271_MODE2_PDN, 0);
diff --git a/sound/soc/codecs/rt5631.c b/sound/soc/codecs/rt5631.c
index 27a078cbb6eb..4646e808b90a 100644
--- a/sound/soc/codecs/rt5631.c
+++ b/sound/soc/codecs/rt5631.c
@@ -177,7 +177,7 @@ static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
177static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 177static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
178/* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */ 178/* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */
179static unsigned int mic_bst_tlv[] = { 179static unsigned int mic_bst_tlv[] = {
180 TLV_DB_RANGE_HEAD(6), 180 TLV_DB_RANGE_HEAD(7),
181 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 181 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
182 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 182 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
183 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 183 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index d15695d1c273..bbcf921166f7 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -365,7 +365,7 @@ static const DECLARE_TLV_DB_SCALE(capture_6db_attenuate, -600, 600, 0);
365 365
366/* tlv for mic gain, 0db 20db 30db 40db */ 366/* tlv for mic gain, 0db 20db 30db 40db */
367static const unsigned int mic_gain_tlv[] = { 367static const unsigned int mic_gain_tlv[] = {
368 TLV_DB_RANGE_HEAD(4), 368 TLV_DB_RANGE_HEAD(2),
369 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 369 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
370 1, 3, TLV_DB_SCALE_ITEM(2000, 1000, 0), 370 1, 3, TLV_DB_SCALE_ITEM(2000, 1000, 0),
371}; 371};
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c
index bb82408ab8e1..d2f37152f940 100644
--- a/sound/soc/codecs/sta32x.c
+++ b/sound/soc/codecs/sta32x.c
@@ -76,6 +76,8 @@ struct sta32x_priv {
76 76
77 unsigned int mclk; 77 unsigned int mclk;
78 unsigned int format; 78 unsigned int format;
79
80 u32 coef_shadow[STA32X_COEF_COUNT];
79}; 81};
80 82
81static const DECLARE_TLV_DB_SCALE(mvol_tlv, -12700, 50, 1); 83static const DECLARE_TLV_DB_SCALE(mvol_tlv, -12700, 50, 1);
@@ -227,6 +229,7 @@ static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
227 struct snd_ctl_elem_value *ucontrol) 229 struct snd_ctl_elem_value *ucontrol)
228{ 230{
229 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 231 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
232 struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec);
230 int numcoef = kcontrol->private_value >> 16; 233 int numcoef = kcontrol->private_value >> 16;
231 int index = kcontrol->private_value & 0xffff; 234 int index = kcontrol->private_value & 0xffff;
232 unsigned int cfud; 235 unsigned int cfud;
@@ -239,6 +242,11 @@ static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
239 snd_soc_write(codec, STA32X_CFUD, cfud); 242 snd_soc_write(codec, STA32X_CFUD, cfud);
240 243
241 snd_soc_write(codec, STA32X_CFADDR2, index); 244 snd_soc_write(codec, STA32X_CFADDR2, index);
245 for (i = 0; i < numcoef && (index + i < STA32X_COEF_COUNT); i++)
246 sta32x->coef_shadow[index + i] =
247 (ucontrol->value.bytes.data[3 * i] << 16)
248 | (ucontrol->value.bytes.data[3 * i + 1] << 8)
249 | (ucontrol->value.bytes.data[3 * i + 2]);
242 for (i = 0; i < 3 * numcoef; i++) 250 for (i = 0; i < 3 * numcoef; i++)
243 snd_soc_write(codec, STA32X_B1CF1 + i, 251 snd_soc_write(codec, STA32X_B1CF1 + i,
244 ucontrol->value.bytes.data[i]); 252 ucontrol->value.bytes.data[i]);
@@ -252,6 +260,48 @@ static int sta32x_coefficient_put(struct snd_kcontrol *kcontrol,
252 return 0; 260 return 0;
253} 261}
254 262
263int sta32x_sync_coef_shadow(struct snd_soc_codec *codec)
264{
265 struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec);
266 unsigned int cfud;
267 int i;
268
269 /* preserve reserved bits in STA32X_CFUD */
270 cfud = snd_soc_read(codec, STA32X_CFUD) & 0xf0;
271
272 for (i = 0; i < STA32X_COEF_COUNT; i++) {
273 snd_soc_write(codec, STA32X_CFADDR2, i);
274 snd_soc_write(codec, STA32X_B1CF1,
275 (sta32x->coef_shadow[i] >> 16) & 0xff);
276 snd_soc_write(codec, STA32X_B1CF2,
277 (sta32x->coef_shadow[i] >> 8) & 0xff);
278 snd_soc_write(codec, STA32X_B1CF3,
279 (sta32x->coef_shadow[i]) & 0xff);
280 /* chip documentation does not say if the bits are
281 * self-clearing, so do it explicitly */
282 snd_soc_write(codec, STA32X_CFUD, cfud);
283 snd_soc_write(codec, STA32X_CFUD, cfud | 0x01);
284 }
285 return 0;
286}
287
288int sta32x_cache_sync(struct snd_soc_codec *codec)
289{
290 unsigned int mute;
291 int rc;
292
293 if (!codec->cache_sync)
294 return 0;
295
296 /* mute during register sync */
297 mute = snd_soc_read(codec, STA32X_MMUTE);
298 snd_soc_write(codec, STA32X_MMUTE, mute | STA32X_MMUTE_MMUTE);
299 sta32x_sync_coef_shadow(codec);
300 rc = snd_soc_cache_sync(codec);
301 snd_soc_write(codec, STA32X_MMUTE, mute);
302 return rc;
303}
304
255#define SINGLE_COEF(xname, index) \ 305#define SINGLE_COEF(xname, index) \
256{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 306{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
257 .info = sta32x_coefficient_info, \ 307 .info = sta32x_coefficient_info, \
@@ -661,7 +711,7 @@ static int sta32x_set_bias_level(struct snd_soc_codec *codec,
661 return ret; 711 return ret;
662 } 712 }
663 713
664 snd_soc_cache_sync(codec); 714 sta32x_cache_sync(codec);
665 } 715 }
666 716
667 /* Power up to mute */ 717 /* Power up to mute */
@@ -790,6 +840,17 @@ static int sta32x_probe(struct snd_soc_codec *codec)
790 STA32X_CxCFG_OM_MASK, 840 STA32X_CxCFG_OM_MASK,
791 2 << STA32X_CxCFG_OM_SHIFT); 841 2 << STA32X_CxCFG_OM_SHIFT);
792 842
843 /* initialize coefficient shadow RAM with reset values */
844 for (i = 4; i <= 49; i += 5)
845 sta32x->coef_shadow[i] = 0x400000;
846 for (i = 50; i <= 54; i++)
847 sta32x->coef_shadow[i] = 0x7fffff;
848 sta32x->coef_shadow[55] = 0x5a9df7;
849 sta32x->coef_shadow[56] = 0x7fffff;
850 sta32x->coef_shadow[59] = 0x7fffff;
851 sta32x->coef_shadow[60] = 0x400000;
852 sta32x->coef_shadow[61] = 0x400000;
853
793 sta32x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 854 sta32x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
794 /* Bias level configuration will have done an extra enable */ 855 /* Bias level configuration will have done an extra enable */
795 regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies); 856 regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies);
diff --git a/sound/soc/codecs/sta32x.h b/sound/soc/codecs/sta32x.h
index b97ee5a75667..d8e32a6262ee 100644
--- a/sound/soc/codecs/sta32x.h
+++ b/sound/soc/codecs/sta32x.h
@@ -19,6 +19,7 @@
19/* STA326 register addresses */ 19/* STA326 register addresses */
20 20
21#define STA32X_REGISTER_COUNT 0x2d 21#define STA32X_REGISTER_COUNT 0x2d
22#define STA32X_COEF_COUNT 62
22 23
23#define STA32X_CONFA 0x00 24#define STA32X_CONFA 0x00
24#define STA32X_CONFB 0x01 25#define STA32X_CONFB 0x01
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index 7e5ec03f6f8d..a7c9ae17fc7e 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -453,6 +453,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
453 snd_soc_write(codec, WM8731_PWR, 0xffff); 453 snd_soc_write(codec, WM8731_PWR, 0xffff);
454 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), 454 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
455 wm8731->supplies); 455 wm8731->supplies);
456 codec->cache_sync = 1;
456 break; 457 break;
457 } 458 }
458 codec->dapm.bias_level = level; 459 codec->dapm.bias_level = level;
diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c
index a9504710bb69..3a629d0d690e 100644
--- a/sound/soc/codecs/wm8753.c
+++ b/sound/soc/codecs/wm8753.c
@@ -190,6 +190,9 @@ static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
190 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); 190 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
191 u16 ioctl; 191 u16 ioctl;
192 192
193 if (wm8753->dai_func == ucontrol->value.integer.value[0])
194 return 0;
195
193 if (codec->active) 196 if (codec->active)
194 return -EBUSY; 197 return -EBUSY;
195 198
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 91d3c6dbeba3..53edd9a8c758 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -1973,7 +1973,7 @@ static int wm8962_reset(struct snd_soc_codec *codec)
1973static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); 1973static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0);
1974static const DECLARE_TLV_DB_SCALE(mixin_tlv, -1500, 300, 0); 1974static const DECLARE_TLV_DB_SCALE(mixin_tlv, -1500, 300, 0);
1975static const unsigned int mixinpga_tlv[] = { 1975static const unsigned int mixinpga_tlv[] = {
1976 TLV_DB_RANGE_HEAD(7), 1976 TLV_DB_RANGE_HEAD(5),
1977 0, 1, TLV_DB_SCALE_ITEM(0, 600, 0), 1977 0, 1, TLV_DB_SCALE_ITEM(0, 600, 0),
1978 2, 2, TLV_DB_SCALE_ITEM(1300, 1300, 0), 1978 2, 2, TLV_DB_SCALE_ITEM(1300, 1300, 0),
1979 3, 4, TLV_DB_SCALE_ITEM(1800, 200, 0), 1979 3, 4, TLV_DB_SCALE_ITEM(1800, 200, 0),
@@ -1988,7 +1988,7 @@ static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
1988static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 1988static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
1989static const DECLARE_TLV_DB_SCALE(hp_tlv, -700, 100, 0); 1989static const DECLARE_TLV_DB_SCALE(hp_tlv, -700, 100, 0);
1990static const unsigned int classd_tlv[] = { 1990static const unsigned int classd_tlv[] = {
1991 TLV_DB_RANGE_HEAD(7), 1991 TLV_DB_RANGE_HEAD(2),
1992 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 1992 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
1993 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), 1993 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
1994}; 1994};
diff --git a/sound/soc/codecs/wm8993.c b/sound/soc/codecs/wm8993.c
index eec8e1435116..d1a142f48b09 100644
--- a/sound/soc/codecs/wm8993.c
+++ b/sound/soc/codecs/wm8993.c
@@ -512,7 +512,7 @@ static const DECLARE_TLV_DB_SCALE(drc_comp_threash, -4500, 75, 0);
512static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0); 512static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0);
513static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0); 513static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0);
514static const unsigned int drc_max_tlv[] = { 514static const unsigned int drc_max_tlv[] = {
515 TLV_DB_RANGE_HEAD(4), 515 TLV_DB_RANGE_HEAD(2),
516 0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0), 516 0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
517 3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0), 517 3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0),
518}; 518};
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c
index 3cd35a02c28c..4a398c3bfe84 100644
--- a/sound/soc/codecs/wm9081.c
+++ b/sound/soc/codecs/wm9081.c
@@ -807,7 +807,6 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
807 mdelay(100); 807 mdelay(100);
808 808
809 /* Normal bias enable & soft start off */ 809 /* Normal bias enable & soft start off */
810 reg |= WM9081_BIAS_ENA;
811 reg &= ~WM9081_VMID_RAMP; 810 reg &= ~WM9081_VMID_RAMP;
812 snd_soc_write(codec, WM9081_VMID_CONTROL, reg); 811 snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
813 812
@@ -818,7 +817,7 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
818 } 817 }
819 818
820 /* VMID 2*240k */ 819 /* VMID 2*240k */
821 reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); 820 reg = snd_soc_read(codec, WM9081_VMID_CONTROL);
822 reg &= ~WM9081_VMID_SEL_MASK; 821 reg &= ~WM9081_VMID_SEL_MASK;
823 reg |= 0x04; 822 reg |= 0x04;
824 snd_soc_write(codec, WM9081_VMID_CONTROL, reg); 823 snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
@@ -830,14 +829,15 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
830 break; 829 break;
831 830
832 case SND_SOC_BIAS_OFF: 831 case SND_SOC_BIAS_OFF:
833 /* Startup bias source */ 832 /* Startup bias source and disable bias */
834 reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); 833 reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
835 reg |= WM9081_BIAS_SRC; 834 reg |= WM9081_BIAS_SRC;
835 reg &= ~WM9081_BIAS_ENA;
836 snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); 836 snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg);
837 837
838 /* Disable VMID and biases with soft ramping */ 838 /* Disable VMID with soft ramping */
839 reg = snd_soc_read(codec, WM9081_VMID_CONTROL); 839 reg = snd_soc_read(codec, WM9081_VMID_CONTROL);
840 reg &= ~(WM9081_VMID_SEL_MASK | WM9081_BIAS_ENA); 840 reg &= ~WM9081_VMID_SEL_MASK;
841 reg |= WM9081_VMID_RAMP; 841 reg |= WM9081_VMID_RAMP;
842 snd_soc_write(codec, WM9081_VMID_CONTROL, reg); 842 snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
843 843
diff --git a/sound/soc/codecs/wm9090.c b/sound/soc/codecs/wm9090.c
index 2b5252c9e377..f94c06057c64 100644
--- a/sound/soc/codecs/wm9090.c
+++ b/sound/soc/codecs/wm9090.c
@@ -177,19 +177,19 @@ static void wait_for_dc_servo(struct snd_soc_codec *codec)
177} 177}
178 178
179static const unsigned int in_tlv[] = { 179static const unsigned int in_tlv[] = {
180 TLV_DB_RANGE_HEAD(6), 180 TLV_DB_RANGE_HEAD(3),
181 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0), 181 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0),
182 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0), 182 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0),
183 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0), 183 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0),
184}; 184};
185static const unsigned int mix_tlv[] = { 185static const unsigned int mix_tlv[] = {
186 TLV_DB_RANGE_HEAD(4), 186 TLV_DB_RANGE_HEAD(2),
187 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0), 187 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0),
188 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0), 188 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0),
189}; 189};
190static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 190static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
191static const unsigned int spkboost_tlv[] = { 191static const unsigned int spkboost_tlv[] = {
192 TLV_DB_RANGE_HEAD(7), 192 TLV_DB_RANGE_HEAD(2),
193 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 193 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
194 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), 194 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
195}; 195};
diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c
index 84f33d4ea2cd..48e61e912400 100644
--- a/sound/soc/codecs/wm_hubs.c
+++ b/sound/soc/codecs/wm_hubs.c
@@ -40,7 +40,7 @@ static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
40static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1); 40static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
41static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0); 41static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
42static const unsigned int spkboost_tlv[] = { 42static const unsigned int spkboost_tlv[] = {
43 TLV_DB_RANGE_HEAD(7), 43 TLV_DB_RANGE_HEAD(2),
44 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 44 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
45 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), 45 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
46}; 46};
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 0268cf989736..83c4bd5b2dd7 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -694,6 +694,7 @@ static int __devinit fsl_ssi_probe(struct platform_device *pdev)
694 694
695 /* Initialize the the device_attribute structure */ 695 /* Initialize the the device_attribute structure */
696 dev_attr = &ssi_private->dev_attr; 696 dev_attr = &ssi_private->dev_attr;
697 sysfs_attr_init(&dev_attr->attr);
697 dev_attr->attr.name = "statistics"; 698 dev_attr->attr.name = "statistics";
698 dev_attr->attr.mode = S_IRUGO; 699 dev_attr->attr.mode = S_IRUGO;
699 dev_attr->show = fsl_sysfs_ssi_show; 700 dev_attr->show = fsl_sysfs_ssi_show;