diff options
| -rw-r--r-- | sound/arm/pxa2xx-ac97-lib.c | 27 |
1 files changed, 10 insertions, 17 deletions
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index e6f4633b8dd5..99a466822a7d 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c | |||
| @@ -117,8 +117,7 @@ static inline void pxa_ac97_warm_pxa25x(void) | |||
| 117 | { | 117 | { |
| 118 | gsr_bits = 0; | 118 | gsr_bits = 0; |
| 119 | 119 | ||
| 120 | GCR |= GCR_WARM_RST | GCR_PRIRDY_IEN | GCR_SECRDY_IEN; | 120 | GCR |= GCR_WARM_RST; |
| 121 | wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); | ||
| 122 | } | 121 | } |
| 123 | 122 | ||
| 124 | static inline void pxa_ac97_cold_pxa25x(void) | 123 | static inline void pxa_ac97_cold_pxa25x(void) |
| @@ -129,8 +128,6 @@ static inline void pxa_ac97_cold_pxa25x(void) | |||
| 129 | gsr_bits = 0; | 128 | gsr_bits = 0; |
| 130 | 129 | ||
| 131 | GCR = GCR_COLD_RST; | 130 | GCR = GCR_COLD_RST; |
| 132 | GCR |= GCR_CDONE_IE|GCR_SDONE_IE; | ||
| 133 | wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); | ||
| 134 | } | 131 | } |
| 135 | #endif | 132 | #endif |
| 136 | 133 | ||
| @@ -149,8 +146,6 @@ static inline void pxa_ac97_warm_pxa27x(void) | |||
| 149 | 146 | ||
| 150 | static inline void pxa_ac97_cold_pxa27x(void) | 147 | static inline void pxa_ac97_cold_pxa27x(void) |
| 151 | { | 148 | { |
| 152 | unsigned int timeout; | ||
| 153 | |||
| 154 | GCR &= GCR_COLD_RST; /* clear everything but nCRST */ | 149 | GCR &= GCR_COLD_RST; /* clear everything but nCRST */ |
| 155 | GCR &= ~GCR_COLD_RST; /* then assert nCRST */ | 150 | GCR &= ~GCR_COLD_RST; /* then assert nCRST */ |
| 156 | 151 | ||
| @@ -161,29 +156,20 @@ static inline void pxa_ac97_cold_pxa27x(void) | |||
| 161 | udelay(5); | 156 | udelay(5); |
| 162 | clk_disable(ac97conf_clk); | 157 | clk_disable(ac97conf_clk); |
| 163 | GCR = GCR_COLD_RST | GCR_WARM_RST; | 158 | GCR = GCR_COLD_RST | GCR_WARM_RST; |
| 164 | timeout = 100; /* wait for the codec-ready bit to be set */ | ||
| 165 | while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | ||
| 166 | mdelay(1); | ||
| 167 | } | 159 | } |
| 168 | #endif | 160 | #endif |
| 169 | 161 | ||
| 170 | #ifdef CONFIG_PXA3xx | 162 | #ifdef CONFIG_PXA3xx |
| 171 | static inline void pxa_ac97_warm_pxa3xx(void) | 163 | static inline void pxa_ac97_warm_pxa3xx(void) |
| 172 | { | 164 | { |
| 173 | int timeout = 100; | ||
| 174 | |||
| 175 | gsr_bits = 0; | 165 | gsr_bits = 0; |
| 176 | 166 | ||
| 177 | /* Can't use interrupts */ | 167 | /* Can't use interrupts */ |
| 178 | GCR |= GCR_WARM_RST; | 168 | GCR |= GCR_WARM_RST; |
| 179 | while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | ||
| 180 | mdelay(1); | ||
| 181 | } | 169 | } |
| 182 | 170 | ||
| 183 | static inline void pxa_ac97_cold_pxa3xx(void) | 171 | static inline void pxa_ac97_cold_pxa3xx(void) |
| 184 | { | 172 | { |
| 185 | int timeout = 1000; | ||
| 186 | |||
| 187 | /* Hold CLKBPB for 100us */ | 173 | /* Hold CLKBPB for 100us */ |
| 188 | GCR = 0; | 174 | GCR = 0; |
| 189 | GCR = GCR_CLKBPB; | 175 | GCR = GCR_CLKBPB; |
| @@ -199,14 +185,13 @@ static inline void pxa_ac97_cold_pxa3xx(void) | |||
| 199 | GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); | 185 | GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); |
| 200 | 186 | ||
| 201 | GCR = GCR_WARM_RST | GCR_COLD_RST; | 187 | GCR = GCR_WARM_RST | GCR_COLD_RST; |
| 202 | while (!(GSR & (GSR_PCR | GSR_SCR)) && timeout--) | ||
| 203 | mdelay(10); | ||
| 204 | } | 188 | } |
| 205 | #endif | 189 | #endif |
| 206 | 190 | ||
| 207 | bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97) | 191 | bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97) |
| 208 | { | 192 | { |
| 209 | unsigned long gsr; | 193 | unsigned long gsr; |
| 194 | unsigned int timeout = 100; | ||
| 210 | 195 | ||
| 211 | #ifdef CONFIG_PXA25x | 196 | #ifdef CONFIG_PXA25x |
| 212 | if (cpu_is_pxa25x()) | 197 | if (cpu_is_pxa25x()) |
| @@ -224,6 +209,10 @@ bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97) | |||
| 224 | else | 209 | else |
| 225 | #endif | 210 | #endif |
| 226 | BUG(); | 211 | BUG(); |
| 212 | |||
| 213 | while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | ||
| 214 | mdelay(1); | ||
| 215 | |||
| 227 | gsr = GSR | gsr_bits; | 216 | gsr = GSR | gsr_bits; |
| 228 | if (!(gsr & (GSR_PCR | GSR_SCR))) { | 217 | if (!(gsr & (GSR_PCR | GSR_SCR))) { |
| 229 | printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", | 218 | printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", |
| @@ -239,6 +228,7 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_warm_reset); | |||
| 239 | bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97) | 228 | bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97) |
| 240 | { | 229 | { |
| 241 | unsigned long gsr; | 230 | unsigned long gsr; |
| 231 | unsigned int timeout = 1000; | ||
| 242 | 232 | ||
| 243 | #ifdef CONFIG_PXA25x | 233 | #ifdef CONFIG_PXA25x |
| 244 | if (cpu_is_pxa25x()) | 234 | if (cpu_is_pxa25x()) |
| @@ -257,6 +247,9 @@ bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97) | |||
| 257 | #endif | 247 | #endif |
| 258 | BUG(); | 248 | BUG(); |
| 259 | 249 | ||
| 250 | while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | ||
| 251 | mdelay(1); | ||
| 252 | |||
| 260 | gsr = GSR | gsr_bits; | 253 | gsr = GSR | gsr_bits; |
| 261 | if (!(gsr & (GSR_PCR | GSR_SCR))) { | 254 | if (!(gsr & (GSR_PCR | GSR_SCR))) { |
| 262 | printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n", | 255 | printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n", |
