diff options
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 26 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_blit_kms.c | 11 |
2 files changed, 21 insertions, 16 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index aafdb8edc11d..9844783cd8d7 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -141,8 +141,7 @@ int r600_pcie_gart_enable(struct radeon_device *rdev) | |||
141 | r = radeon_gart_table_vram_pin(rdev); | 141 | r = radeon_gart_table_vram_pin(rdev); |
142 | if (r) | 142 | if (r) |
143 | return r; | 143 | return r; |
144 | for (i = 0; i < rdev->gart.num_gpu_pages; i++) | 144 | |
145 | r600_gart_clear_page(rdev, i); | ||
146 | /* Setup L2 cache */ | 145 | /* Setup L2 cache */ |
147 | WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | | 146 | WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | |
148 | ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | | 147 | ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | |
@@ -1477,6 +1476,14 @@ int r600_resume(struct radeon_device *rdev) | |||
1477 | if (r) | 1476 | if (r) |
1478 | return r; | 1477 | return r; |
1479 | r600_gpu_init(rdev); | 1478 | r600_gpu_init(rdev); |
1479 | |||
1480 | r = radeon_object_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM, | ||
1481 | &rdev->r600_blit.shader_gpu_addr); | ||
1482 | if (r) { | ||
1483 | DRM_ERROR("failed to pin blit object %d\n", r); | ||
1484 | return r; | ||
1485 | } | ||
1486 | |||
1480 | r = radeon_ring_init(rdev, rdev->cp.ring_size); | 1487 | r = radeon_ring_init(rdev, rdev->cp.ring_size); |
1481 | if (r) | 1488 | if (r) |
1482 | return r; | 1489 | return r; |
@@ -1496,7 +1503,11 @@ int r600_suspend(struct radeon_device *rdev) | |||
1496 | { | 1503 | { |
1497 | /* FIXME: we should wait for ring to be empty */ | 1504 | /* FIXME: we should wait for ring to be empty */ |
1498 | r600_cp_stop(rdev); | 1505 | r600_cp_stop(rdev); |
1506 | rdev->cp.ready = false; | ||
1507 | |||
1499 | r600_pcie_gart_disable(rdev); | 1508 | r600_pcie_gart_disable(rdev); |
1509 | /* unpin shaders bo */ | ||
1510 | radeon_object_unpin(rdev->r600_blit.shader_obj); | ||
1500 | return 0; | 1511 | return 0; |
1501 | } | 1512 | } |
1502 | 1513 | ||
@@ -1579,6 +1590,12 @@ int r600_init(struct radeon_device *rdev) | |||
1579 | return r; | 1590 | return r; |
1580 | 1591 | ||
1581 | rdev->accel_working = true; | 1592 | rdev->accel_working = true; |
1593 | r = r600_blit_init(rdev); | ||
1594 | if (r) { | ||
1595 | DRM_ERROR("radeon: failled blitter (%d).\n", r); | ||
1596 | return r; | ||
1597 | } | ||
1598 | |||
1582 | r = r600_resume(rdev); | 1599 | r = r600_resume(rdev); |
1583 | if (r) { | 1600 | if (r) { |
1584 | if (rdev->flags & RADEON_IS_AGP) { | 1601 | if (rdev->flags & RADEON_IS_AGP) { |
@@ -1595,11 +1612,6 @@ int r600_init(struct radeon_device *rdev) | |||
1595 | DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r); | 1612 | DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r); |
1596 | rdev->accel_working = false; | 1613 | rdev->accel_working = false; |
1597 | } | 1614 | } |
1598 | r = r600_blit_init(rdev); | ||
1599 | if (r) { | ||
1600 | DRM_ERROR("radeon: failled blitter (%d).\n", r); | ||
1601 | rdev->accel_working = false; | ||
1602 | } | ||
1603 | r = radeon_ib_test(rdev); | 1615 | r = radeon_ib_test(rdev); |
1604 | if (r) { | 1616 | if (r) { |
1605 | DRM_ERROR("radeon: failled testing IB (%d).\n", r); | 1617 | DRM_ERROR("radeon: failled testing IB (%d).\n", r); |
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 1287f4d3fb21..0a6f4681f468 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c | |||
@@ -481,15 +481,8 @@ int r600_blit_init(struct radeon_device *rdev) | |||
481 | return r; | 481 | return r; |
482 | } | 482 | } |
483 | 483 | ||
484 | r = radeon_object_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM, | 484 | DRM_DEBUG("r6xx blit allocated bo %08x vs %08x ps %08x\n", |
485 | &rdev->r600_blit.shader_gpu_addr); | 485 | obj_size, |
486 | if (r) { | ||
487 | DRM_ERROR("failed to pin blit object %d\n", r); | ||
488 | return r; | ||
489 | } | ||
490 | |||
491 | DRM_DEBUG("r6xx blit allocated bo @ 0x%16llx %08x vs %08x ps %08x\n", | ||
492 | rdev->r600_blit.shader_gpu_addr, obj_size, | ||
493 | rdev->r600_blit.vs_offset, rdev->r600_blit.ps_offset); | 486 | rdev->r600_blit.vs_offset, rdev->r600_blit.ps_offset); |
494 | 487 | ||
495 | r = radeon_object_kmap(rdev->r600_blit.shader_obj, &ptr); | 488 | r = radeon_object_kmap(rdev->r600_blit.shader_obj, &ptr); |