diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 22 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_irq_kms.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_kms.c | 4 | ||||
| -rw-r--r-- | include/drm/radeon_drm.h | 1 |
9 files changed, 26 insertions, 28 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b0ab185b86f6..d3ca17080df7 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
| @@ -606,14 +606,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
| 606 | args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); | 606 | args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); |
| 607 | args.v1.ucTransmitterID = radeon_encoder->encoder_id; | 607 | args.v1.ucTransmitterID = radeon_encoder->encoder_id; |
| 608 | args.v1.ucEncodeMode = encoder_mode; | 608 | args.v1.ucEncodeMode = encoder_mode; |
| 609 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { | 609 | if (ss_enabled) |
| 610 | if (ss_enabled) | ||
| 611 | args.v1.ucConfig |= | ||
| 612 | ADJUST_DISPLAY_CONFIG_SS_ENABLE; | ||
| 613 | } else if (encoder_mode == ATOM_ENCODER_MODE_LVDS) { | ||
| 614 | args.v1.ucConfig |= | 610 | args.v1.ucConfig |= |
| 615 | ADJUST_DISPLAY_CONFIG_SS_ENABLE; | 611 | ADJUST_DISPLAY_CONFIG_SS_ENABLE; |
| 616 | } | ||
| 617 | 612 | ||
| 618 | atom_execute_table(rdev->mode_info.atom_context, | 613 | atom_execute_table(rdev->mode_info.atom_context, |
| 619 | index, (uint32_t *)&args); | 614 | index, (uint32_t *)&args); |
| @@ -624,12 +619,12 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
| 624 | args.v3.sInput.ucTransmitterID = radeon_encoder->encoder_id; | 619 | args.v3.sInput.ucTransmitterID = radeon_encoder->encoder_id; |
| 625 | args.v3.sInput.ucEncodeMode = encoder_mode; | 620 | args.v3.sInput.ucEncodeMode = encoder_mode; |
| 626 | args.v3.sInput.ucDispPllConfig = 0; | 621 | args.v3.sInput.ucDispPllConfig = 0; |
| 622 | if (ss_enabled) | ||
| 623 | args.v3.sInput.ucDispPllConfig |= | ||
| 624 | DISPPLL_CONFIG_SS_ENABLE; | ||
| 627 | if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { | 625 | if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
| 628 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 626 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 629 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { | 627 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { |
| 630 | if (ss_enabled) | ||
| 631 | args.v3.sInput.ucDispPllConfig |= | ||
| 632 | DISPPLL_CONFIG_SS_ENABLE; | ||
| 633 | args.v3.sInput.ucDispPllConfig |= | 628 | args.v3.sInput.ucDispPllConfig |= |
| 634 | DISPPLL_CONFIG_COHERENT_MODE; | 629 | DISPPLL_CONFIG_COHERENT_MODE; |
| 635 | /* 16200 or 27000 */ | 630 | /* 16200 or 27000 */ |
| @@ -649,18 +644,11 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
| 649 | } | 644 | } |
| 650 | } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 645 | } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
| 651 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { | 646 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { |
| 652 | if (ss_enabled) | ||
| 653 | args.v3.sInput.ucDispPllConfig |= | ||
| 654 | DISPPLL_CONFIG_SS_ENABLE; | ||
| 655 | args.v3.sInput.ucDispPllConfig |= | 647 | args.v3.sInput.ucDispPllConfig |= |
| 656 | DISPPLL_CONFIG_COHERENT_MODE; | 648 | DISPPLL_CONFIG_COHERENT_MODE; |
| 657 | /* 16200 or 27000 */ | 649 | /* 16200 or 27000 */ |
| 658 | args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10); | 650 | args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10); |
| 659 | } else if (encoder_mode == ATOM_ENCODER_MODE_LVDS) { | 651 | } else if (encoder_mode != ATOM_ENCODER_MODE_LVDS) { |
| 660 | if (ss_enabled) | ||
| 661 | args.v3.sInput.ucDispPllConfig |= | ||
| 662 | DISPPLL_CONFIG_SS_ENABLE; | ||
| 663 | } else { | ||
| 664 | if (mode->clock > 165000) | 652 | if (mode->clock > 165000) |
| 665 | args.v3.sInput.ucDispPllConfig |= | 653 | args.v3.sInput.ucDispPllConfig |= |
| 666 | DISPPLL_CONFIG_DUAL_LINK; | 654 | DISPPLL_CONFIG_DUAL_LINK; |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index a8973acb3987..677af91b555c 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -2201,6 +2201,9 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev) | |||
| 2201 | struct evergreen_mc_save save; | 2201 | struct evergreen_mc_save save; |
| 2202 | u32 grbm_reset = 0; | 2202 | u32 grbm_reset = 0; |
| 2203 | 2203 | ||
| 2204 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
| 2205 | return 0; | ||
| 2206 | |||
| 2204 | dev_info(rdev->dev, "GPU softreset \n"); | 2207 | dev_info(rdev->dev, "GPU softreset \n"); |
| 2205 | dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n", | 2208 | dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n", |
| 2206 | RREG32(GRBM_STATUS)); | 2209 | RREG32(GRBM_STATUS)); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 46da5142b131..5968dde243e9 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
| @@ -3522,7 +3522,7 @@ int r100_ring_test(struct radeon_device *rdev) | |||
| 3522 | if (i < rdev->usec_timeout) { | 3522 | if (i < rdev->usec_timeout) { |
| 3523 | DRM_INFO("ring test succeeded in %d usecs\n", i); | 3523 | DRM_INFO("ring test succeeded in %d usecs\n", i); |
| 3524 | } else { | 3524 | } else { |
| 3525 | DRM_ERROR("radeon: ring test failed (sracth(0x%04X)=0x%08X)\n", | 3525 | DRM_ERROR("radeon: ring test failed (scratch(0x%04X)=0x%08X)\n", |
| 3526 | scratch, tmp); | 3526 | scratch, tmp); |
| 3527 | r = -EINVAL; | 3527 | r = -EINVAL; |
| 3528 | } | 3528 | } |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index aca2236268fa..1e10e3e2ba2a 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -1287,6 +1287,9 @@ int r600_gpu_soft_reset(struct radeon_device *rdev) | |||
| 1287 | S_008014_CB2_BUSY(1) | S_008014_CB3_BUSY(1); | 1287 | S_008014_CB2_BUSY(1) | S_008014_CB3_BUSY(1); |
| 1288 | u32 tmp; | 1288 | u32 tmp; |
| 1289 | 1289 | ||
| 1290 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
| 1291 | return 0; | ||
| 1292 | |||
| 1290 | dev_info(rdev->dev, "GPU softreset \n"); | 1293 | dev_info(rdev->dev, "GPU softreset \n"); |
| 1291 | dev_info(rdev->dev, " R_008010_GRBM_STATUS=0x%08X\n", | 1294 | dev_info(rdev->dev, " R_008010_GRBM_STATUS=0x%08X\n", |
| 1292 | RREG32(R_008010_GRBM_STATUS)); | 1295 | RREG32(R_008010_GRBM_STATUS)); |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 1573202a6418..52777902bbcc 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
| @@ -387,15 +387,11 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev, | |||
| 387 | *line_mux = 0x90; | 387 | *line_mux = 0x90; |
| 388 | } | 388 | } |
| 389 | 389 | ||
| 390 | /* mac rv630 */ | 390 | /* mac rv630, rv730, others */ |
| 391 | if ((dev->pdev->device == 0x9588) && | 391 | if ((supported_device == ATOM_DEVICE_TV1_SUPPORT) && |
| 392 | (dev->pdev->subsystem_vendor == 0x106b) && | 392 | (*connector_type == DRM_MODE_CONNECTOR_DVII)) { |
| 393 | (dev->pdev->subsystem_device == 0x00a6)) { | 393 | *connector_type = DRM_MODE_CONNECTOR_9PinDIN; |
| 394 | if ((supported_device == ATOM_DEVICE_TV1_SUPPORT) && | 394 | *line_mux = CONNECTOR_7PIN_DIN_ENUM_ID1; |
| 395 | (*connector_type == DRM_MODE_CONNECTOR_DVII)) { | ||
| 396 | *connector_type = DRM_MODE_CONNECTOR_9PinDIN; | ||
| 397 | *line_mux = CONNECTOR_7PIN_DIN_ENUM_ID1; | ||
| 398 | } | ||
| 399 | } | 395 | } |
| 400 | 396 | ||
| 401 | /* ASUS HD 3600 XT board lists the DVI port as HDMI */ | 397 | /* ASUS HD 3600 XT board lists the DVI port as HDMI */ |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index d5680a0c87af..275b26a708d6 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
| @@ -48,7 +48,7 @@ | |||
| 48 | * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen | 48 | * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen |
| 49 | * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) | 49 | * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) |
| 50 | * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs | 50 | * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs |
| 51 | * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK | 51 | * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query |
| 52 | */ | 52 | */ |
| 53 | #define KMS_DRIVER_MAJOR 2 | 53 | #define KMS_DRIVER_MAJOR 2 |
| 54 | #define KMS_DRIVER_MINOR 8 | 54 | #define KMS_DRIVER_MINOR 8 |
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index a289646e8aa4..9ec830c77af0 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c | |||
| @@ -110,11 +110,14 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev) | |||
| 110 | 110 | ||
| 111 | int radeon_irq_kms_init(struct radeon_device *rdev) | 111 | int radeon_irq_kms_init(struct radeon_device *rdev) |
| 112 | { | 112 | { |
| 113 | int i; | ||
| 113 | int r = 0; | 114 | int r = 0; |
| 114 | 115 | ||
| 115 | INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func); | 116 | INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func); |
| 116 | 117 | ||
| 117 | spin_lock_init(&rdev->irq.sw_lock); | 118 | spin_lock_init(&rdev->irq.sw_lock); |
| 119 | for (i = 0; i < rdev->num_crtc; i++) | ||
| 120 | spin_lock_init(&rdev->irq.pflip_lock[i]); | ||
| 118 | r = drm_vblank_init(rdev->ddev, rdev->num_crtc); | 121 | r = drm_vblank_init(rdev->ddev, rdev->num_crtc); |
| 119 | if (r) { | 122 | if (r) { |
| 120 | return r; | 123 | return r; |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 28a53e4a925f..98321298cffd 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
| @@ -201,6 +201,10 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
| 201 | } | 201 | } |
| 202 | radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value); | 202 | radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value); |
| 203 | break; | 203 | break; |
| 204 | case RADEON_INFO_CLOCK_CRYSTAL_FREQ: | ||
| 205 | /* return clock value in KHz */ | ||
| 206 | value = rdev->clock.spll.reference_freq * 10; | ||
| 207 | break; | ||
| 204 | default: | 208 | default: |
| 205 | DRM_DEBUG_KMS("Invalid request %d\n", info->request); | 209 | DRM_DEBUG_KMS("Invalid request %d\n", info->request); |
| 206 | return -EINVAL; | 210 | return -EINVAL; |
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index e95a86b8b689..e5c607a02d57 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h | |||
| @@ -907,6 +907,7 @@ struct drm_radeon_cs { | |||
| 907 | #define RADEON_INFO_TILING_CONFIG 0x06 | 907 | #define RADEON_INFO_TILING_CONFIG 0x06 |
| 908 | #define RADEON_INFO_WANT_HYPERZ 0x07 | 908 | #define RADEON_INFO_WANT_HYPERZ 0x07 |
| 909 | #define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ | 909 | #define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ |
| 910 | #define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */ | ||
| 910 | 911 | ||
| 911 | struct drm_radeon_info { | 912 | struct drm_radeon_info { |
| 912 | uint32_t request; | 913 | uint32_t request; |
