diff options
-rw-r--r-- | drivers/tty/serial/mfd.c | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/drivers/tty/serial/mfd.c b/drivers/tty/serial/mfd.c index d40010a22ecd..776777462937 100644 --- a/drivers/tty/serial/mfd.c +++ b/drivers/tty/serial/mfd.c | |||
@@ -51,8 +51,6 @@ | |||
51 | #define mfd_readl(obj, offset) readl(obj->reg + offset) | 51 | #define mfd_readl(obj, offset) readl(obj->reg + offset) |
52 | #define mfd_writel(obj, offset, val) writel(val, obj->reg + offset) | 52 | #define mfd_writel(obj, offset, val) writel(val, obj->reg + offset) |
53 | 53 | ||
54 | #define HSU_DMA_TIMEOUT_CHECK_FREQ (HZ/10) | ||
55 | |||
56 | struct hsu_dma_buffer { | 54 | struct hsu_dma_buffer { |
57 | u8 *buf; | 55 | u8 *buf; |
58 | dma_addr_t dma_addr; | 56 | dma_addr_t dma_addr; |
@@ -65,7 +63,6 @@ struct hsu_dma_chan { | |||
65 | enum dma_data_direction dirt; | 63 | enum dma_data_direction dirt; |
66 | struct uart_hsu_port *uport; | 64 | struct uart_hsu_port *uport; |
67 | void __iomem *reg; | 65 | void __iomem *reg; |
68 | struct timer_list rx_timer; /* only needed by RX channel */ | ||
69 | }; | 66 | }; |
70 | 67 | ||
71 | struct uart_hsu_port { | 68 | struct uart_hsu_port { |
@@ -355,8 +352,6 @@ void hsu_dma_start_rx_chan(struct hsu_dma_chan *rxc, struct hsu_dma_buffer *dbuf | |||
355 | | (0x1 << 24) /* timeout bit, see HSU Errata 1 */ | 352 | | (0x1 << 24) /* timeout bit, see HSU Errata 1 */ |
356 | ); | 353 | ); |
357 | chan_writel(rxc, HSU_CH_CR, 0x3); | 354 | chan_writel(rxc, HSU_CH_CR, 0x3); |
358 | |||
359 | mod_timer(&rxc->rx_timer, jiffies + HSU_DMA_TIMEOUT_CHECK_FREQ); | ||
360 | } | 355 | } |
361 | 356 | ||
362 | /* Protected by spin_lock_irqsave(port->lock) */ | 357 | /* Protected by spin_lock_irqsave(port->lock) */ |
@@ -420,7 +415,6 @@ void hsu_dma_rx(struct uart_hsu_port *up, u32 int_sts) | |||
420 | chan_writel(chan, HSU_CH_CR, 0x3); | 415 | chan_writel(chan, HSU_CH_CR, 0x3); |
421 | return; | 416 | return; |
422 | } | 417 | } |
423 | del_timer(&chan->rx_timer); | ||
424 | 418 | ||
425 | dma_sync_single_for_cpu(port->dev, dbuf->dma_addr, | 419 | dma_sync_single_for_cpu(port->dev, dbuf->dma_addr, |
426 | dbuf->dma_size, DMA_FROM_DEVICE); | 420 | dbuf->dma_size, DMA_FROM_DEVICE); |
@@ -448,8 +442,6 @@ void hsu_dma_rx(struct uart_hsu_port *up, u32 int_sts) | |||
448 | tty_flip_buffer_push(tty); | 442 | tty_flip_buffer_push(tty); |
449 | 443 | ||
450 | chan_writel(chan, HSU_CH_CR, 0x3); | 444 | chan_writel(chan, HSU_CH_CR, 0x3); |
451 | chan->rx_timer.expires = jiffies + HSU_DMA_TIMEOUT_CHECK_FREQ; | ||
452 | add_timer(&chan->rx_timer); | ||
453 | 445 | ||
454 | } | 446 | } |
455 | 447 | ||
@@ -870,8 +862,6 @@ static void serial_hsu_shutdown(struct uart_port *port) | |||
870 | container_of(port, struct uart_hsu_port, port); | 862 | container_of(port, struct uart_hsu_port, port); |
871 | unsigned long flags; | 863 | unsigned long flags; |
872 | 864 | ||
873 | del_timer_sync(&up->rxc->rx_timer); | ||
874 | |||
875 | /* Disable interrupts from this port */ | 865 | /* Disable interrupts from this port */ |
876 | up->ier = 0; | 866 | up->ier = 0; |
877 | serial_out(up, UART_IER, 0); | 867 | serial_out(up, UART_IER, 0); |
@@ -1343,28 +1333,6 @@ err_disable: | |||
1343 | return ret; | 1333 | return ret; |
1344 | } | 1334 | } |
1345 | 1335 | ||
1346 | static void hsu_dma_rx_timeout(unsigned long data) | ||
1347 | { | ||
1348 | struct hsu_dma_chan *chan = (void *)data; | ||
1349 | struct uart_hsu_port *up = chan->uport; | ||
1350 | struct hsu_dma_buffer *dbuf = &up->rxbuf; | ||
1351 | int count = 0; | ||
1352 | unsigned long flags; | ||
1353 | |||
1354 | spin_lock_irqsave(&up->port.lock, flags); | ||
1355 | |||
1356 | count = chan_readl(chan, HSU_CH_D0SAR) - dbuf->dma_addr; | ||
1357 | |||
1358 | if (!count) { | ||
1359 | mod_timer(&chan->rx_timer, jiffies + HSU_DMA_TIMEOUT_CHECK_FREQ); | ||
1360 | goto exit; | ||
1361 | } | ||
1362 | |||
1363 | hsu_dma_rx(up, 0); | ||
1364 | exit: | ||
1365 | spin_unlock_irqrestore(&up->port.lock, flags); | ||
1366 | } | ||
1367 | |||
1368 | static void hsu_global_init(void) | 1336 | static void hsu_global_init(void) |
1369 | { | 1337 | { |
1370 | struct hsu_port *hsu; | 1338 | struct hsu_port *hsu; |
@@ -1427,12 +1395,6 @@ static void hsu_global_init(void) | |||
1427 | dchan->reg = hsu->reg + HSU_DMA_CHANS_REG_OFFSET + | 1395 | dchan->reg = hsu->reg + HSU_DMA_CHANS_REG_OFFSET + |
1428 | i * HSU_DMA_CHANS_REG_LENGTH; | 1396 | i * HSU_DMA_CHANS_REG_LENGTH; |
1429 | 1397 | ||
1430 | /* Work around for RX */ | ||
1431 | if (dchan->dirt == DMA_FROM_DEVICE) { | ||
1432 | init_timer(&dchan->rx_timer); | ||
1433 | dchan->rx_timer.function = hsu_dma_rx_timeout; | ||
1434 | dchan->rx_timer.data = (unsigned long)dchan; | ||
1435 | } | ||
1436 | dchan++; | 1398 | dchan++; |
1437 | } | 1399 | } |
1438 | 1400 | ||