diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
2 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0d3b97f01690..5ac9837e49a5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -692,6 +692,21 @@ | |||
692 | 692 | ||
693 | #define GEN6_BSD_RNCID 0x12198 | 693 | #define GEN6_BSD_RNCID 0x12198 |
694 | 694 | ||
695 | #define GEN7_FF_THREAD_MODE 0x20a0 | ||
696 | #define GEN7_FF_SCHED_MASK 0x0077070 | ||
697 | #define GEN7_FF_TS_SCHED_HS1 (0x5<<16) | ||
698 | #define GEN7_FF_TS_SCHED_HS0 (0x3<<16) | ||
699 | #define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1<<16) | ||
700 | #define GEN7_FF_TS_SCHED_HW (0x0<<16) /* Default */ | ||
701 | #define GEN7_FF_VS_SCHED_HS1 (0x5<<12) | ||
702 | #define GEN7_FF_VS_SCHED_HS0 (0x3<<12) | ||
703 | #define GEN7_FF_VS_SCHED_LOAD_BALANCE (0x1<<12) /* Default */ | ||
704 | #define GEN7_FF_VS_SCHED_HW (0x0<<12) | ||
705 | #define GEN7_FF_DS_SCHED_HS1 (0x5<<4) | ||
706 | #define GEN7_FF_DS_SCHED_HS0 (0x3<<4) | ||
707 | #define GEN7_FF_DS_SCHED_LOAD_BALANCE (0x1<<4) /* Default */ | ||
708 | #define GEN7_FF_DS_SCHED_HW (0x0<<4) | ||
709 | |||
695 | /* | 710 | /* |
696 | * Framebuffer compression (915+ only) | 711 | * Framebuffer compression (915+ only) |
697 | */ | 712 | */ |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 78179e03a901..96fc4679d438 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -8937,6 +8937,18 @@ static void gen6_init_clock_gating(struct drm_device *dev) | |||
8937 | } | 8937 | } |
8938 | } | 8938 | } |
8939 | 8939 | ||
8940 | static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) | ||
8941 | { | ||
8942 | uint32_t reg = I915_READ(GEN7_FF_THREAD_MODE); | ||
8943 | |||
8944 | reg &= ~GEN7_FF_SCHED_MASK; | ||
8945 | reg |= GEN7_FF_TS_SCHED_HW; | ||
8946 | reg |= GEN7_FF_VS_SCHED_HW; | ||
8947 | reg |= GEN7_FF_DS_SCHED_HW; | ||
8948 | |||
8949 | I915_WRITE(GEN7_FF_THREAD_MODE, reg); | ||
8950 | } | ||
8951 | |||
8940 | static void ivybridge_init_clock_gating(struct drm_device *dev) | 8952 | static void ivybridge_init_clock_gating(struct drm_device *dev) |
8941 | { | 8953 | { |
8942 | struct drm_i915_private *dev_priv = dev->dev_private; | 8954 | struct drm_i915_private *dev_priv = dev->dev_private; |
@@ -8981,6 +8993,8 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) | |||
8981 | DISPPLANE_TRICKLE_FEED_DISABLE); | 8993 | DISPPLANE_TRICKLE_FEED_DISABLE); |
8982 | intel_flush_display_plane(dev_priv, pipe); | 8994 | intel_flush_display_plane(dev_priv, pipe); |
8983 | } | 8995 | } |
8996 | |||
8997 | gen7_setup_fixed_func_scheduler(dev_priv); | ||
8984 | } | 8998 | } |
8985 | 8999 | ||
8986 | static void valleyview_init_clock_gating(struct drm_device *dev) | 9000 | static void valleyview_init_clock_gating(struct drm_device *dev) |