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-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-exynos/cpuidle.c3
-rw-r--r--arch/arm/mach-exynos/hotplug.c45
-rw-r--r--arch/arm/mach-exynos/pm.c7
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c32
-rw-r--r--arch/arm/mach-omap2/pm.c2
-rw-r--r--arch/arm/mach-omap2/pm.h2
-rw-r--r--arch/arm/mach-omap2/pm44xx.c7
-rw-r--r--arch/arm/mach-omap2/vc.c2
-rw-r--r--arch/arm/plat-samsung/include/plat/pm.h2
11 files changed, 93 insertions, 12 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 4e1dd8d1eda8..454bc6ed9a8d 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -615,6 +615,8 @@ void __init exynos5_init_irq(void)
615 * uses GIC instead of VIC. 615 * uses GIC instead of VIC.
616 */ 616 */
617 s5p_init_irq(NULL, 0); 617 s5p_init_irq(NULL, 0);
618
619 gic_arch_extn.irq_set_wake = s3c_irq_wake;
618} 620}
619 621
620struct bus_type exynos_subsys = { 622struct bus_type exynos_subsys = {
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index cff0595d0d35..8e4ec21ef2cf 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -116,7 +116,8 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
116 cpu_suspend(0, idle_finisher); 116 cpu_suspend(0, idle_finisher);
117 117
118#ifdef CONFIG_SMP 118#ifdef CONFIG_SMP
119 scu_enable(S5P_VA_SCU); 119 if (!soc_is_exynos5250())
120 scu_enable(S5P_VA_SCU);
120#endif 121#endif
121 cpu_pm_exit(); 122 cpu_pm_exit();
122 123
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index f4d7dd20cdac..c3f825b27947 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -20,10 +20,11 @@
20#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
21 21
22#include <mach/regs-pmu.h> 22#include <mach/regs-pmu.h>
23#include <plat/cpu.h>
23 24
24#include "common.h" 25#include "common.h"
25 26
26static inline void cpu_enter_lowpower(void) 27static inline void cpu_enter_lowpower_a9(void)
27{ 28{
28 unsigned int v; 29 unsigned int v;
29 30
@@ -45,6 +46,35 @@ static inline void cpu_enter_lowpower(void)
45 : "cc"); 46 : "cc");
46} 47}
47 48
49static inline void cpu_enter_lowpower_a15(void)
50{
51 unsigned int v;
52
53 asm volatile(
54 " mrc p15, 0, %0, c1, c0, 0\n"
55 " bic %0, %0, %1\n"
56 " mcr p15, 0, %0, c1, c0, 0\n"
57 : "=&r" (v)
58 : "Ir" (CR_C)
59 : "cc");
60
61 flush_cache_louis();
62
63 asm volatile(
64 /*
65 * Turn off coherency
66 */
67 " mrc p15, 0, %0, c1, c0, 1\n"
68 " bic %0, %0, %1\n"
69 " mcr p15, 0, %0, c1, c0, 1\n"
70 : "=&r" (v)
71 : "Ir" (0x40)
72 : "cc");
73
74 isb();
75 dsb();
76}
77
48static inline void cpu_leave_lowpower(void) 78static inline void cpu_leave_lowpower(void)
49{ 79{
50 unsigned int v; 80 unsigned int v;
@@ -103,11 +133,20 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
103void __ref exynos_cpu_die(unsigned int cpu) 133void __ref exynos_cpu_die(unsigned int cpu)
104{ 134{
105 int spurious = 0; 135 int spurious = 0;
136 int primary_part = 0;
106 137
107 /* 138 /*
108 * we're ready for shutdown now, so do it 139 * we're ready for shutdown now, so do it.
140 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
141 * number by reading the Main ID register and then perform the
142 * appropriate sequence for entering low power.
109 */ 143 */
110 cpu_enter_lowpower(); 144 asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
145 if ((primary_part & 0xfff0) == 0xc0f0)
146 cpu_enter_lowpower_a15();
147 else
148 cpu_enter_lowpower_a9();
149
111 platform_do_lowpower(cpu, &spurious); 150 platform_do_lowpower(cpu, &spurious);
112 151
113 /* 152 /*
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c06c992943a1..8df6ec547f78 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -81,6 +81,9 @@ static int exynos_cpu_suspend(unsigned long arg)
81 outer_flush_all(); 81 outer_flush_all();
82#endif 82#endif
83 83
84 if (soc_is_exynos5250())
85 flush_cache_all();
86
84 /* issue the standby signal into the pm unit. */ 87 /* issue the standby signal into the pm unit. */
85 cpu_do_idle(); 88 cpu_do_idle();
86 89
@@ -312,6 +315,10 @@ static void exynos_pm_resume(void)
312 } 315 }
313 316
314early_wakeup: 317early_wakeup:
318
319 /* Clear SLEEP mode set in INFORM1 */
320 __raw_writel(0x0, S5P_INFORM1);
321
315 return; 322 return;
316} 323}
317 324
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 219fb075741b..ce1661d18e56 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/platform_data/gpio-omap.h> 22#include <linux/platform_data/gpio-omap.h>
23#include <linux/power/smartreflex.h> 23#include <linux/power/smartreflex.h>
24#include <linux/platform_data/omap_ocp2scp.h>
24#include <linux/i2c-omap.h> 25#include <linux/i2c-omap.h>
25 26
26#include <linux/omap-dma.h> 27#include <linux/omap-dma.h>
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4d76a3ca5bf3..e237602e10ea 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -33,6 +33,38 @@
33#include "control.h" 33#include "control.h"
34#include "usb.h" 34#include "usb.h"
35 35
36#define CONTROL_DEV_CONF 0x300
37#define PHY_PD 0x1
38
39/**
40 * omap4430_phy_power_down: disable MUSB PHY during early init
41 *
42 * OMAP4 MUSB PHY module is enabled by default on reset, but this will
43 * prevent core retention if not disabled by SW. USB driver will
44 * later on enable this, once and if the driver needs it.
45 */
46static int __init omap4430_phy_power_down(void)
47{
48 void __iomem *ctrl_base;
49
50 if (!cpu_is_omap44xx())
51 return 0;
52
53 ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K);
54 if (!ctrl_base) {
55 pr_err("control module ioremap failed\n");
56 return -ENOMEM;
57 }
58
59 /* Power down the phy */
60 __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
61
62 iounmap(ctrl_base);
63
64 return 0;
65}
66early_initcall(omap4430_phy_power_down);
67
36void am35x_musb_reset(void) 68void am35x_musb_reset(void)
37{ 69{
38 u32 regval; 70 u32 regval;
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index e5a4c3a0accd..f4b3143a8b1d 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -40,6 +40,7 @@ static struct omap_device_pm_latency *pm_lats;
40 */ 40 */
41int (*omap_pm_suspend)(void); 41int (*omap_pm_suspend)(void);
42 42
43#ifdef CONFIG_PM
43/** 44/**
44 * struct omap2_oscillator - Describe the board main oscillator latencies 45 * struct omap2_oscillator - Describe the board main oscillator latencies
45 * @startup_time: oscillator startup latency 46 * @startup_time: oscillator startup latency
@@ -69,6 +70,7 @@ void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
69 *tstart = oscillator.startup_time; 70 *tstart = oscillator.startup_time;
70 *tshut = oscillator.shutdown_time; 71 *tshut = oscillator.shutdown_time;
71} 72}
73#endif
72 74
73static int __init _init_omap_device(char *name) 75static int __init _init_omap_device(char *name)
74{ 76{
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 4db7b238a0d5..02c291c8e470 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -135,7 +135,7 @@ extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
135extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm); 135extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
136#else 136#else
137static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { } 137static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
138static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { } 138static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
139static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { } 139static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
140#endif 140#endif
141 141
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 7da75aed1514..aa6fd98f606e 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -101,13 +101,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
101 if (!strncmp(pwrdm->name, "cpu", 3)) 101 if (!strncmp(pwrdm->name, "cpu", 3))
102 return 0; 102 return 0;
103 103
104 /*
105 * FIXME: Remove this check when core retention is supported
106 * Only MPUSS power domain is added in the list.
107 */
108 if (strcmp(pwrdm->name, "mpu_pwrdm"))
109 return 0;
110
111 pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); 104 pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
112 if (!pwrst) 105 if (!pwrst)
113 return -ENOMEM; 106 return -ENOMEM;
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 71396c3aa35f..49ac7977e03e 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -666,6 +666,7 @@ static u8 omap_vc_calc_vsel(struct voltagedomain *voltdm, u32 uvolt)
666 return voltdm->pmic->uv_to_vsel(uvolt); 666 return voltdm->pmic->uv_to_vsel(uvolt);
667} 667}
668 668
669#ifdef CONFIG_PM
669/** 670/**
670 * omap_pm_setup_sr_i2c_pcb_length - set length of SR I2C traces on PCB 671 * omap_pm_setup_sr_i2c_pcb_length - set length of SR I2C traces on PCB
671 * @mm: length of the PCB trace in millimetres 672 * @mm: length of the PCB trace in millimetres
@@ -678,6 +679,7 @@ void __init omap_pm_setup_sr_i2c_pcb_length(u32 mm)
678{ 679{
679 sr_i2c_pcb_length = mm; 680 sr_i2c_pcb_length = mm;
680} 681}
682#endif
681 683
682void __init omap_vc_init_channel(struct voltagedomain *voltdm) 684void __init omap_vc_init_channel(struct voltagedomain *voltdm)
683{ 685{
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 61fc53740fbd..887a0c954379 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -107,10 +107,12 @@ extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
107extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); 107extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
108 108
109#ifdef CONFIG_PM 109#ifdef CONFIG_PM
110extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
110extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); 111extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
111extern int s3c24xx_irq_suspend(void); 112extern int s3c24xx_irq_suspend(void);
112extern void s3c24xx_irq_resume(void); 113extern void s3c24xx_irq_resume(void);
113#else 114#else
115#define s3c_irq_wake NULL
114#define s3c_irqext_wake NULL 116#define s3c_irqext_wake NULL
115#define s3c24xx_irq_suspend NULL 117#define s3c24xx_irq_suspend NULL
116#define s3c24xx_irq_resume NULL 118#define s3c24xx_irq_resume NULL