diff options
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt | 23 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 17 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria5.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_vt.dts | 11 |
5 files changed, 70 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt new file mode 100644 index 000000000000..4897bea7e3f8 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | * Altera SOCFPGA specific extensions to the Synopsys Designware Mobile | ||
| 2 | Storage Host Controller | ||
| 3 | |||
| 4 | The Synopsys designware mobile storage host controller is used to interface | ||
| 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | ||
| 6 | differences between the core Synopsys dw mshc controller properties described | ||
| 7 | by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific | ||
| 8 | extensions to the Synopsys Designware Mobile Storage Host Controller. | ||
| 9 | |||
| 10 | Required Properties: | ||
| 11 | |||
| 12 | * compatible: should be | ||
| 13 | - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform | ||
| 14 | |||
| 15 | Example: | ||
| 16 | |||
| 17 | mmc: dwmmc0@ff704000 { | ||
| 18 | compatible = "altr,socfpga-dw-mshc"; | ||
| 19 | reg = <0xff704000 0x1000>; | ||
| 20 | interrupts = <0 129 4>; | ||
| 21 | #address-cells = <1>; | ||
| 22 | #size-cells = <0>; | ||
| 23 | }; | ||
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 3ce09e39dc9c..d2ff3d5d83e7 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi | |||
| @@ -499,6 +499,17 @@ | |||
| 499 | arm,data-latency = <2 1 1>; | 499 | arm,data-latency = <2 1 1>; |
| 500 | }; | 500 | }; |
| 501 | 501 | ||
| 502 | mmc: dwmmc0@ff704000 { | ||
| 503 | compatible = "altr,socfpga-dw-mshc"; | ||
| 504 | reg = <0xff704000 0x1000>; | ||
| 505 | interrupts = <0 139 4>; | ||
| 506 | fifo-depth = <0x400>; | ||
| 507 | #address-cells = <1>; | ||
| 508 | #size-cells = <0>; | ||
| 509 | clocks = <&l4_mp_clk>, <&sdmmc_clk>; | ||
| 510 | clock-names = "biu", "ciu"; | ||
| 511 | }; | ||
| 512 | |||
| 502 | /* Local timer */ | 513 | /* Local timer */ |
| 503 | timer@fffec600 { | 514 | timer@fffec600 { |
| 504 | compatible = "arm,cortex-a9-twd-timer"; | 515 | compatible = "arm,cortex-a9-twd-timer"; |
| @@ -553,8 +564,8 @@ | |||
| 553 | }; | 564 | }; |
| 554 | 565 | ||
| 555 | sysmgr@ffd08000 { | 566 | sysmgr@ffd08000 { |
| 556 | compatible = "altr,sys-mgr"; | 567 | compatible = "altr,sys-mgr", "syscon"; |
| 557 | reg = <0xffd08000 0x4000>; | 568 | reg = <0xffd08000 0x4000>; |
| 558 | }; | 569 | }; |
| 559 | }; | 570 | }; |
| 560 | }; | 571 | }; |
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index a85b4043f888..6c87b7070ca7 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi | |||
| @@ -27,6 +27,17 @@ | |||
| 27 | }; | 27 | }; |
| 28 | }; | 28 | }; |
| 29 | 29 | ||
| 30 | dwmmc0@ff704000 { | ||
| 31 | num-slots = <1>; | ||
| 32 | supports-highspeed; | ||
| 33 | broken-cd; | ||
| 34 | |||
| 35 | slot@0 { | ||
| 36 | reg = <0>; | ||
| 37 | bus-width = <4>; | ||
| 38 | }; | ||
| 39 | }; | ||
| 40 | |||
| 30 | serial0@ffc02000 { | 41 | serial0@ffc02000 { |
| 31 | clock-frequency = <100000000>; | 42 | clock-frequency = <100000000>; |
| 32 | }; | 43 | }; |
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index a8716f6dbe2e..ca41b0ebf461 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi | |||
| @@ -28,6 +28,17 @@ | |||
| 28 | }; | 28 | }; |
| 29 | }; | 29 | }; |
| 30 | 30 | ||
| 31 | dwmmc0@ff704000 { | ||
| 32 | num-slots = <1>; | ||
| 33 | supports-highspeed; | ||
| 34 | broken-cd; | ||
| 35 | |||
| 36 | slot@0 { | ||
| 37 | reg = <0>; | ||
| 38 | bus-width = <4>; | ||
| 39 | }; | ||
| 40 | }; | ||
| 41 | |||
| 31 | ethernet@ff702000 { | 42 | ethernet@ff702000 { |
| 32 | phy-mode = "rgmii"; | 43 | phy-mode = "rgmii"; |
| 33 | phy-addr = <0xffffffff>; /* probe for phy addr */ | 44 | phy-addr = <0xffffffff>; /* probe for phy addr */ |
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index c01acce2e8a5..91f6ccf714ee 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts | |||
| @@ -41,6 +41,17 @@ | |||
| 41 | }; | 41 | }; |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | dwmmc0@ff704000 { | ||
| 45 | num-slots = <1>; | ||
| 46 | supports-highspeed; | ||
| 47 | broken-cd; | ||
| 48 | |||
| 49 | slot@0 { | ||
| 50 | reg = <0>; | ||
| 51 | bus-width = <4>; | ||
| 52 | }; | ||
| 53 | }; | ||
| 54 | |||
| 44 | ethernet@ff700000 { | 55 | ethernet@ff700000 { |
| 45 | phy-mode = "gmii"; | 56 | phy-mode = "gmii"; |
| 46 | status = "okay"; | 57 | status = "okay"; |
