diff options
-rw-r--r-- | arch/arm/mach-shmobile/board-bockw.c | 98 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a73a4.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7778.c | 23 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 31 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/r8a7778.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7778.c | 63 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7779.c | 2 |
7 files changed, 228 insertions, 16 deletions
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c index 2b6103e55c34..ce56381e0077 100644 --- a/arch/arm/mach-shmobile/board-bockw.c +++ b/arch/arm/mach-shmobile/board-bockw.c | |||
@@ -20,11 +20,14 @@ | |||
20 | 20 | ||
21 | #include <linux/mfd/tmio.h> | 21 | #include <linux/mfd/tmio.h> |
22 | #include <linux/mmc/host.h> | 22 | #include <linux/mmc/host.h> |
23 | #include <linux/mtd/partitions.h> | ||
23 | #include <linux/pinctrl/machine.h> | 24 | #include <linux/pinctrl/machine.h> |
24 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
25 | #include <linux/regulator/fixed.h> | 26 | #include <linux/regulator/fixed.h> |
26 | #include <linux/regulator/machine.h> | 27 | #include <linux/regulator/machine.h> |
27 | #include <linux/smsc911x.h> | 28 | #include <linux/smsc911x.h> |
29 | #include <linux/spi/spi.h> | ||
30 | #include <linux/spi/flash.h> | ||
28 | #include <mach/common.h> | 31 | #include <mach/common.h> |
29 | #include <mach/irqs.h> | 32 | #include <mach/irqs.h> |
30 | #include <mach/r8a7778.h> | 33 | #include <mach/r8a7778.h> |
@@ -38,6 +41,23 @@ | |||
38 | * SW41 SCIF RCAN | 41 | * SW41 SCIF RCAN |
39 | */ | 42 | */ |
40 | 43 | ||
44 | /* | ||
45 | * MMC (CN26) pin | ||
46 | * | ||
47 | * SW6 (D2) 3 pin | ||
48 | * SW7 (D5) ON | ||
49 | * SW8 (D3) 3 pin | ||
50 | * SW10 (D4) 1 pin | ||
51 | * SW12 (CLK) 1 pin | ||
52 | * SW13 (D6) 3 pin | ||
53 | * SW14 (CMD) ON | ||
54 | * SW15 (D6) 1 pin | ||
55 | * SW16 (D0) ON | ||
56 | * SW17 (D1) ON | ||
57 | * SW18 (D7) 3 pin | ||
58 | * SW19 (MMC) 1 pin | ||
59 | */ | ||
60 | |||
41 | /* Dummy supplies, where voltage doesn't matter */ | 61 | /* Dummy supplies, where voltage doesn't matter */ |
42 | static struct regulator_consumer_supply dummy_supplies[] = { | 62 | static struct regulator_consumer_supply dummy_supplies[] = { |
43 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | 63 | REGULATOR_SUPPLY("vddvario", "smsc911x"), |
@@ -63,7 +83,75 @@ static struct sh_mobile_sdhi_info sdhi0_info = { | |||
63 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | 83 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, |
64 | }; | 84 | }; |
65 | 85 | ||
86 | static struct sh_eth_plat_data ether_platform_data __initdata = { | ||
87 | .phy = 0x01, | ||
88 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | ||
89 | .register_type = SH_ETH_REG_FAST_RCAR, | ||
90 | .phy_interface = PHY_INTERFACE_MODE_RMII, | ||
91 | /* | ||
92 | * Although the LINK signal is available on the board, it's connected to | ||
93 | * the link/activity LED output of the PHY, thus the link disappears and | ||
94 | * reappears after each packet. We'd be better off ignoring such signal | ||
95 | * and getting the link state from the PHY indirectly. | ||
96 | */ | ||
97 | .no_ether_link = 1, | ||
98 | }; | ||
99 | |||
100 | /* I2C */ | ||
101 | static struct i2c_board_info i2c0_devices[] = { | ||
102 | { | ||
103 | I2C_BOARD_INFO("rx8581", 0x51), | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | /* HSPI*/ | ||
108 | static struct mtd_partition m25p80_spi_flash_partitions[] = { | ||
109 | { | ||
110 | .name = "data(spi)", | ||
111 | .size = 0x0100000, | ||
112 | .offset = 0, | ||
113 | }, | ||
114 | }; | ||
115 | |||
116 | static struct flash_platform_data spi_flash_data = { | ||
117 | .name = "m25p80", | ||
118 | .type = "s25fl008k", | ||
119 | .parts = m25p80_spi_flash_partitions, | ||
120 | .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions), | ||
121 | }; | ||
122 | |||
123 | static struct spi_board_info spi_board_info[] __initdata = { | ||
124 | { | ||
125 | .modalias = "m25p80", | ||
126 | .max_speed_hz = 104000000, | ||
127 | .chip_select = 0, | ||
128 | .bus_num = 0, | ||
129 | .mode = SPI_MODE_0, | ||
130 | .platform_data = &spi_flash_data, | ||
131 | }, | ||
132 | }; | ||
133 | |||
134 | /* MMC */ | ||
135 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | ||
136 | .sup_pclk = 0, | ||
137 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | ||
138 | .caps = MMC_CAP_4_BIT_DATA | | ||
139 | MMC_CAP_8_BIT_DATA | | ||
140 | MMC_CAP_NEEDS_POLL, | ||
141 | }; | ||
142 | |||
66 | static const struct pinctrl_map bockw_pinctrl_map[] = { | 143 | static const struct pinctrl_map bockw_pinctrl_map[] = { |
144 | /* Ether */ | ||
145 | PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778", | ||
146 | "ether_rmii", "ether"), | ||
147 | /* HSPI0 */ | ||
148 | PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778", | ||
149 | "hspi0_a", "hspi0"), | ||
150 | /* MMC */ | ||
151 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778", | ||
152 | "mmc_data8", "mmc"), | ||
153 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778", | ||
154 | "mmc_ctrl", "mmc"), | ||
67 | /* SCIF0 */ | 155 | /* SCIF0 */ |
68 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | 156 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", |
69 | "scif0_data_a", "scif0"), | 157 | "scif0_data_a", "scif0"), |
@@ -85,7 +173,15 @@ static void __init bockw_init(void) | |||
85 | r8a7778_clock_init(); | 173 | r8a7778_clock_init(); |
86 | r8a7778_init_irq_extpin(1); | 174 | r8a7778_init_irq_extpin(1); |
87 | r8a7778_add_standard_devices(); | 175 | r8a7778_add_standard_devices(); |
88 | 176 | r8a7778_add_ether_device(ðer_platform_data); | |
177 | r8a7778_add_i2c_device(0); | ||
178 | r8a7778_add_hspi_device(0); | ||
179 | r8a7778_add_mmc_device(&sh_mmcif_plat); | ||
180 | |||
181 | i2c_register_board_info(0, i2c0_devices, | ||
182 | ARRAY_SIZE(i2c0_devices)); | ||
183 | spi_register_board_info(spi_board_info, | ||
184 | ARRAY_SIZE(spi_board_info)); | ||
89 | pinctrl_register_mappings(bockw_pinctrl_map, | 185 | pinctrl_register_mappings(bockw_pinctrl_map, |
90 | ARRAY_SIZE(bockw_pinctrl_map)); | 186 | ARRAY_SIZE(bockw_pinctrl_map)); |
91 | r8a7778_pinmux_init(); | 187 | r8a7778_pinmux_init(); |
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c index f6227bb10aca..5f7fe628b8a1 100644 --- a/arch/arm/mach-shmobile/clock-r8a73a4.c +++ b/arch/arm/mach-shmobile/clock-r8a73a4.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #define CPG_LEN 0x270 | 29 | #define CPG_LEN 0x270 |
30 | 30 | ||
31 | #define SMSTPCR2 0xe6150138 | 31 | #define SMSTPCR2 0xe6150138 |
32 | #define SMSTPCR3 0xe615013c | ||
32 | #define SMSTPCR5 0xe6150144 | 33 | #define SMSTPCR5 0xe6150144 |
33 | 34 | ||
34 | #define FRQCRA 0xE6150000 | 35 | #define FRQCRA 0xE6150000 |
@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = { | |||
348 | /* MSTP */ | 349 | /* MSTP */ |
349 | enum { | 350 | enum { |
350 | MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, | 351 | MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, |
352 | MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, | ||
351 | MSTP522, | 353 | MSTP522, |
352 | MSTP_NR | 354 | MSTP_NR |
353 | }; | 355 | }; |
@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
359 | [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */ | 361 | [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */ |
360 | [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */ | 362 | [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */ |
361 | [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */ | 363 | [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */ |
364 | [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */ | ||
365 | [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */ | ||
366 | [MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */ | ||
367 | [MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */ | ||
368 | [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */ | ||
362 | [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */ | 369 | [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */ |
363 | }; | 370 | }; |
364 | 371 | ||
@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = { | |||
381 | 388 | ||
382 | /* DIV6 */ | 389 | /* DIV6 */ |
383 | CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), | 390 | CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), |
384 | CLKDEV_CON_ID("sdhi0", &div6_clks[DIV6_SDHI0]), | ||
385 | CLKDEV_CON_ID("sdhi1", &div6_clks[DIV6_SDHI1]), | ||
386 | CLKDEV_CON_ID("sdhi2", &div6_clks[DIV6_SDHI2]), | ||
387 | CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]), | ||
388 | CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]), | ||
389 | CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]), | 391 | CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]), |
390 | CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]), | 392 | CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]), |
391 | CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]), | 393 | CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]), |
@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = { | |||
406 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), | 408 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), |
407 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]), | 409 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]), |
408 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), | 410 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), |
411 | CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), | ||
412 | CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), | ||
413 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]), | ||
414 | CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]), | ||
415 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), | ||
416 | CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), | ||
417 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), | ||
418 | CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), | ||
419 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), | ||
420 | CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), | ||
409 | 421 | ||
410 | /* for DT */ | 422 | /* for DT */ |
411 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), | 423 | CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), |
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c index b251e4d0924d..18d44f51ca67 100644 --- a/arch/arm/mach-shmobile/clock-r8a7778.c +++ b/arch/arm/mach-shmobile/clock-r8a7778.c | |||
@@ -103,17 +103,25 @@ static struct clk *main_clks[] = { | |||
103 | }; | 103 | }; |
104 | 104 | ||
105 | enum { | 105 | enum { |
106 | MSTP331, | ||
106 | MSTP323, MSTP322, MSTP321, | 107 | MSTP323, MSTP322, MSTP321, |
107 | MSTP114, | 108 | MSTP114, |
108 | MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | 109 | MSTP030, |
110 | MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | ||
109 | MSTP016, MSTP015, | 111 | MSTP016, MSTP015, |
112 | MSTP007, | ||
110 | MSTP_NR }; | 113 | MSTP_NR }; |
111 | 114 | ||
112 | static struct clk mstp_clks[MSTP_NR] = { | 115 | static struct clk mstp_clks[MSTP_NR] = { |
116 | [MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */ | ||
113 | [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */ | 117 | [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */ |
114 | [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */ | 118 | [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */ |
115 | [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */ | 119 | [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */ |
116 | [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */ | 120 | [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */ |
121 | [MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */ | ||
122 | [MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */ | ||
123 | [MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */ | ||
124 | [MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */ | ||
117 | [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */ | 125 | [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */ |
118 | [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */ | 126 | [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */ |
119 | [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */ | 127 | [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */ |
@@ -122,14 +130,24 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
122 | [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */ | 130 | [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */ |
123 | [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */ | 131 | [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */ |
124 | [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */ | 132 | [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */ |
133 | [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */ | ||
125 | }; | 134 | }; |
126 | 135 | ||
127 | static struct clk_lookup lookups[] = { | 136 | static struct clk_lookup lookups[] = { |
137 | /* main */ | ||
138 | CLKDEV_CON_ID("shyway_clk", &s_clk), | ||
139 | CLKDEV_CON_ID("peripheral_clk", &p_clk), | ||
140 | |||
128 | /* MSTP32 clocks */ | 141 | /* MSTP32 clocks */ |
142 | CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */ | ||
129 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ | 143 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ |
130 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ | 144 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ |
131 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ | 145 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ |
132 | CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ | 146 | CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ |
147 | CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ | ||
148 | CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ | ||
149 | CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */ | ||
150 | CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */ | ||
133 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ | 151 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ |
134 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ | 152 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ |
135 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ | 153 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ |
@@ -138,6 +156,9 @@ static struct clk_lookup lookups[] = { | |||
138 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ | 156 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ |
139 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ | 157 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ |
140 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ | 158 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ |
159 | CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */ | ||
160 | CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */ | ||
161 | CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */ | ||
141 | }; | 162 | }; |
142 | 163 | ||
143 | void __init r8a7778_clock_init(void) | 164 | void __init r8a7778_clock_init(void) |
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index b393592edc83..5d71313df52d 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c | |||
@@ -181,7 +181,8 @@ static struct clk div6_clks[DIV6_NR] = { | |||
181 | /* MSTP */ | 181 | /* MSTP */ |
182 | enum { | 182 | enum { |
183 | MSTP721, MSTP720, | 183 | MSTP721, MSTP720, |
184 | MSTP304, | 184 | MSTP717, MSTP716, |
185 | MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, | ||
185 | MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, | 186 | MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, |
186 | MSTP_NR | 187 | MSTP_NR |
187 | }; | 188 | }; |
@@ -189,6 +190,12 @@ enum { | |||
189 | static struct clk mstp_clks[MSTP_NR] = { | 190 | static struct clk mstp_clks[MSTP_NR] = { |
190 | [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ | 191 | [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ |
191 | [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ | 192 | [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ |
193 | [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */ | ||
194 | [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */ | ||
195 | [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */ | ||
196 | [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SD2], SMSTPCR3, 12, 0), /* SDHI2 */ | ||
197 | [MSTP311] = SH_CLK_MSTP32(&div6_clks[DIV6_SD3], SMSTPCR3, 11, 0), /* SDHI3 */ | ||
198 | [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, 0), /* MMC1 */ | ||
192 | [MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */ | 199 | [MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */ |
193 | [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ | 200 | [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ |
194 | [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ | 201 | [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ |
@@ -196,6 +203,8 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
196 | [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ | 203 | [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ |
197 | [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ | 204 | [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ |
198 | [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ | 205 | [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ |
206 | [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ | ||
207 | [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ | ||
199 | }; | 208 | }; |
200 | 209 | ||
201 | static struct clk_lookup lookups[] = { | 210 | static struct clk_lookup lookups[] = { |
@@ -229,14 +238,8 @@ static struct clk_lookup lookups[] = { | |||
229 | 238 | ||
230 | /* DIV4 */ | 239 | /* DIV4 */ |
231 | CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]), | 240 | CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]), |
232 | CLKDEV_CON_ID("sd0", &div4_clks[DIV4_SD0]), | ||
233 | CLKDEV_CON_ID("sd1", &div4_clks[DIV4_SD1]), | ||
234 | 241 | ||
235 | /* DIV6 */ | 242 | /* DIV6 */ |
236 | CLKDEV_CON_ID("sd2", &div6_clks[DIV6_SD2]), | ||
237 | CLKDEV_CON_ID("sd3", &div6_clks[DIV6_SD3]), | ||
238 | CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]), | ||
239 | CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]), | ||
240 | CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]), | 243 | CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]), |
241 | CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]), | 244 | CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]), |
242 | 245 | ||
@@ -249,6 +252,20 @@ static struct clk_lookup lookups[] = { | |||
249 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), | 252 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), |
250 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), | 253 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), |
251 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), | 254 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), |
255 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), | ||
256 | CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), | ||
257 | CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), | ||
258 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), | ||
259 | CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), | ||
260 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), | ||
261 | CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), | ||
262 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), | ||
263 | CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]), | ||
264 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]), | ||
265 | CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]), | ||
266 | CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]), | ||
267 | CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), | ||
268 | CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), | ||
252 | }; | 269 | }; |
253 | 270 | ||
254 | #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ | 271 | #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ |
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h index ae65b459483f..fcf3c904bed2 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7778.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h | |||
@@ -18,12 +18,17 @@ | |||
18 | #ifndef __ASM_R8A7778_H__ | 18 | #ifndef __ASM_R8A7778_H__ |
19 | #define __ASM_R8A7778_H__ | 19 | #define __ASM_R8A7778_H__ |
20 | 20 | ||
21 | #include <linux/mmc/sh_mmcif.h> | ||
21 | #include <linux/mmc/sh_mobile_sdhi.h> | 22 | #include <linux/mmc/sh_mobile_sdhi.h> |
22 | #include <linux/sh_eth.h> | 23 | #include <linux/sh_eth.h> |
23 | 24 | ||
24 | extern void r8a7778_add_standard_devices(void); | 25 | extern void r8a7778_add_standard_devices(void); |
25 | extern void r8a7778_add_standard_devices_dt(void); | 26 | extern void r8a7778_add_standard_devices_dt(void); |
26 | extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata); | 27 | extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata); |
28 | extern void r8a7778_add_i2c_device(int id); | ||
29 | extern void r8a7778_add_hspi_device(int id); | ||
30 | extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info); | ||
31 | |||
27 | extern void r8a7778_init_delay(void); | 32 | extern void r8a7778_init_delay(void); |
28 | extern void r8a7778_init_irq(void); | 33 | extern void r8a7778_init_irq(void); |
29 | extern void r8a7778_init_irq_dt(void); | 34 | extern void r8a7778_init_irq_dt(void); |
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index 1b9b7f2a5016..f8685f497424 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c | |||
@@ -97,7 +97,7 @@ static struct resource ether_resources[] = { | |||
97 | 97 | ||
98 | void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) | 98 | void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) |
99 | { | 99 | { |
100 | platform_device_register_resndata(&platform_bus, "sh_eth", -1, | 100 | platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1, |
101 | ether_resources, | 101 | ether_resources, |
102 | ARRAY_SIZE(ether_resources), | 102 | ARRAY_SIZE(ether_resources), |
103 | pdata, sizeof(*pdata)); | 103 | pdata, sizeof(*pdata)); |
@@ -173,6 +173,67 @@ void __init r8a7778_sdhi_init(int id, | |||
173 | info, sizeof(*info)); | 173 | info, sizeof(*info)); |
174 | } | 174 | } |
175 | 175 | ||
176 | /* I2C */ | ||
177 | static struct resource i2c_resources[] __initdata = { | ||
178 | /* I2C0 */ | ||
179 | DEFINE_RES_MEM(0xffc70000, 0x1000), | ||
180 | DEFINE_RES_IRQ(gic_iid(0x63)), | ||
181 | /* I2C1 */ | ||
182 | DEFINE_RES_MEM(0xffc71000, 0x1000), | ||
183 | DEFINE_RES_IRQ(gic_iid(0x6e)), | ||
184 | /* I2C2 */ | ||
185 | DEFINE_RES_MEM(0xffc72000, 0x1000), | ||
186 | DEFINE_RES_IRQ(gic_iid(0x6c)), | ||
187 | /* I2C3 */ | ||
188 | DEFINE_RES_MEM(0xffc73000, 0x1000), | ||
189 | DEFINE_RES_IRQ(gic_iid(0x6d)), | ||
190 | }; | ||
191 | |||
192 | void __init r8a7778_add_i2c_device(int id) | ||
193 | { | ||
194 | BUG_ON(id < 0 || id > 3); | ||
195 | |||
196 | platform_device_register_simple( | ||
197 | "i2c-rcar", id, | ||
198 | i2c_resources + (2 * id), 2); | ||
199 | } | ||
200 | |||
201 | /* HSPI */ | ||
202 | static struct resource hspi_resources[] __initdata = { | ||
203 | /* HSPI0 */ | ||
204 | DEFINE_RES_MEM(0xfffc7000, 0x18), | ||
205 | DEFINE_RES_IRQ(gic_iid(0x5f)), | ||
206 | /* HSPI1 */ | ||
207 | DEFINE_RES_MEM(0xfffc8000, 0x18), | ||
208 | DEFINE_RES_IRQ(gic_iid(0x74)), | ||
209 | /* HSPI2 */ | ||
210 | DEFINE_RES_MEM(0xfffc6000, 0x18), | ||
211 | DEFINE_RES_IRQ(gic_iid(0x75)), | ||
212 | }; | ||
213 | |||
214 | void __init r8a7778_add_hspi_device(int id) | ||
215 | { | ||
216 | BUG_ON(id < 0 || id > 2); | ||
217 | |||
218 | platform_device_register_simple( | ||
219 | "sh-hspi", id, | ||
220 | hspi_resources + (2 * id), 2); | ||
221 | } | ||
222 | |||
223 | /* MMC */ | ||
224 | static struct resource mmc_resources[] __initdata = { | ||
225 | DEFINE_RES_MEM(0xffe4e000, 0x100), | ||
226 | DEFINE_RES_IRQ(gic_iid(0x5d)), | ||
227 | }; | ||
228 | |||
229 | void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info) | ||
230 | { | ||
231 | platform_device_register_resndata( | ||
232 | &platform_bus, "sh_mmcif", -1, | ||
233 | mmc_resources, ARRAY_SIZE(mmc_resources), | ||
234 | info, sizeof(*info)); | ||
235 | } | ||
236 | |||
176 | void __init r8a7778_add_standard_devices(void) | 237 | void __init r8a7778_add_standard_devices(void) |
177 | { | 238 | { |
178 | int i; | 239 | int i; |
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index dbb13f289e79..405ad665f839 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c | |||
@@ -432,7 +432,7 @@ void __init r8a7779_add_standard_devices(void) | |||
432 | 432 | ||
433 | void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata) | 433 | void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata) |
434 | { | 434 | { |
435 | platform_device_register_resndata(&platform_bus, "sh_eth", -1, | 435 | platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1, |
436 | ether_resources, | 436 | ether_resources, |
437 | ARRAY_SIZE(ether_resources), | 437 | ARRAY_SIZE(ether_resources), |
438 | pdata, sizeof(*pdata)); | 438 | pdata, sizeof(*pdata)); |