diff options
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 38 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreend.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 45 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770d.h | 2 |
4 files changed, 89 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 4dc5b4714c5a..728358e6b798 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1382,6 +1382,42 @@ static u32 evergreen_get_tile_pipe_to_backend_map(struct radeon_device *rdev, | |||
1382 | return backend_map; | 1382 | return backend_map; |
1383 | } | 1383 | } |
1384 | 1384 | ||
1385 | static void evergreen_program_channel_remap(struct radeon_device *rdev) | ||
1386 | { | ||
1387 | u32 tcp_chan_steer_lo, tcp_chan_steer_hi, mc_shared_chremap, tmp; | ||
1388 | |||
1389 | tmp = RREG32(MC_SHARED_CHMAP); | ||
1390 | switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { | ||
1391 | case 0: | ||
1392 | case 1: | ||
1393 | case 2: | ||
1394 | case 3: | ||
1395 | default: | ||
1396 | /* default mapping */ | ||
1397 | mc_shared_chremap = 0x00fac688; | ||
1398 | break; | ||
1399 | } | ||
1400 | |||
1401 | switch (rdev->family) { | ||
1402 | case CHIP_HEMLOCK: | ||
1403 | case CHIP_CYPRESS: | ||
1404 | tcp_chan_steer_lo = 0x54763210; | ||
1405 | tcp_chan_steer_hi = 0x0000ba98; | ||
1406 | break; | ||
1407 | case CHIP_JUNIPER: | ||
1408 | case CHIP_REDWOOD: | ||
1409 | case CHIP_CEDAR: | ||
1410 | default: | ||
1411 | tcp_chan_steer_lo = 0x76543210; | ||
1412 | tcp_chan_steer_hi = 0x0000ba98; | ||
1413 | break; | ||
1414 | } | ||
1415 | |||
1416 | WREG32(TCP_CHAN_STEER_LO, tcp_chan_steer_lo); | ||
1417 | WREG32(TCP_CHAN_STEER_HI, tcp_chan_steer_hi); | ||
1418 | WREG32(MC_SHARED_CHREMAP, mc_shared_chremap); | ||
1419 | } | ||
1420 | |||
1385 | static void evergreen_gpu_init(struct radeon_device *rdev) | 1421 | static void evergreen_gpu_init(struct radeon_device *rdev) |
1386 | { | 1422 | { |
1387 | u32 cc_rb_backend_disable = 0; | 1423 | u32 cc_rb_backend_disable = 0; |
@@ -1685,6 +1721,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
1685 | WREG32(DMIF_ADDR_CONFIG, gb_addr_config); | 1721 | WREG32(DMIF_ADDR_CONFIG, gb_addr_config); |
1686 | WREG32(HDP_ADDR_CONFIG, gb_addr_config); | 1722 | WREG32(HDP_ADDR_CONFIG, gb_addr_config); |
1687 | 1723 | ||
1724 | evergreen_program_channel_remap(rdev); | ||
1725 | |||
1688 | num_shader_engines = ((RREG32(GB_ADDR_CONFIG) & NUM_SHADER_ENGINES(3)) >> 12) + 1; | 1726 | num_shader_engines = ((RREG32(GB_ADDR_CONFIG) & NUM_SHADER_ENGINES(3)) >> 12) + 1; |
1689 | grbm_gfx_index = INSTANCE_BROADCAST_WRITES; | 1727 | grbm_gfx_index = INSTANCE_BROADCAST_WRITES; |
1690 | 1728 | ||
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index 113c70cc8b39..9644b1cbfb09 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -180,6 +180,7 @@ | |||
180 | #define MC_SHARED_CHMAP 0x2004 | 180 | #define MC_SHARED_CHMAP 0x2004 |
181 | #define NOOFCHAN_SHIFT 12 | 181 | #define NOOFCHAN_SHIFT 12 |
182 | #define NOOFCHAN_MASK 0x00003000 | 182 | #define NOOFCHAN_MASK 0x00003000 |
183 | #define MC_SHARED_CHREMAP 0x2008 | ||
183 | 184 | ||
184 | #define MC_ARB_RAMCFG 0x2760 | 185 | #define MC_ARB_RAMCFG 0x2760 |
185 | #define NOOFBANK_SHIFT 0 | 186 | #define NOOFBANK_SHIFT 0 |
@@ -348,6 +349,9 @@ | |||
348 | #define SYNC_WALKER (1 << 25) | 349 | #define SYNC_WALKER (1 << 25) |
349 | #define SYNC_ALIGNER (1 << 26) | 350 | #define SYNC_ALIGNER (1 << 26) |
350 | 351 | ||
352 | #define TCP_CHAN_STEER_LO 0x960c | ||
353 | #define TCP_CHAN_STEER_HI 0x9610 | ||
354 | |||
351 | #define VGT_CACHE_INVALIDATION 0x88C4 | 355 | #define VGT_CACHE_INVALIDATION 0x88C4 |
352 | #define CACHE_INVALIDATION(x) ((x) << 0) | 356 | #define CACHE_INVALIDATION(x) ((x) << 0) |
353 | #define VC_ONLY 0 | 357 | #define VC_ONLY 0 |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 4dfead8cee33..24ebd0879c4b 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -489,6 +489,49 @@ static u32 r700_get_tile_pipe_to_backend_map(struct radeon_device *rdev, | |||
489 | return backend_map; | 489 | return backend_map; |
490 | } | 490 | } |
491 | 491 | ||
492 | static void rv770_program_channel_remap(struct radeon_device *rdev) | ||
493 | { | ||
494 | u32 tcp_chan_steer, mc_shared_chremap, tmp; | ||
495 | bool force_no_swizzle; | ||
496 | |||
497 | switch (rdev->family) { | ||
498 | case CHIP_RV770: | ||
499 | case CHIP_RV730: | ||
500 | force_no_swizzle = false; | ||
501 | break; | ||
502 | case CHIP_RV710: | ||
503 | case CHIP_RV740: | ||
504 | default: | ||
505 | force_no_swizzle = true; | ||
506 | break; | ||
507 | } | ||
508 | |||
509 | tmp = RREG32(MC_SHARED_CHMAP); | ||
510 | switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { | ||
511 | case 0: | ||
512 | case 1: | ||
513 | default: | ||
514 | /* default mapping */ | ||
515 | mc_shared_chremap = 0x00fac688; | ||
516 | break; | ||
517 | case 2: | ||
518 | case 3: | ||
519 | if (force_no_swizzle) | ||
520 | mc_shared_chremap = 0x00fac688; | ||
521 | else | ||
522 | mc_shared_chremap = 0x00bbc298; | ||
523 | break; | ||
524 | } | ||
525 | |||
526 | if (rdev->family == CHIP_RV740) | ||
527 | tcp_chan_steer = 0x00ef2a60; | ||
528 | else | ||
529 | tcp_chan_steer = 0x00fac688; | ||
530 | |||
531 | WREG32(TCP_CHAN_STEER, tcp_chan_steer); | ||
532 | WREG32(MC_SHARED_CHREMAP, mc_shared_chremap); | ||
533 | } | ||
534 | |||
492 | static void rv770_gpu_init(struct radeon_device *rdev) | 535 | static void rv770_gpu_init(struct radeon_device *rdev) |
493 | { | 536 | { |
494 | int i, j, num_qd_pipes; | 537 | int i, j, num_qd_pipes; |
@@ -688,6 +731,8 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
688 | WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); | 731 | WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); |
689 | WREG32(HDP_TILING_CONFIG, (gb_tiling_config & 0xffff)); | 732 | WREG32(HDP_TILING_CONFIG, (gb_tiling_config & 0xffff)); |
690 | 733 | ||
734 | rv770_program_channel_remap(rdev); | ||
735 | |||
691 | WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); | 736 | WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable); |
692 | WREG32(CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); | 737 | WREG32(CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); |
693 | WREG32(GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); | 738 | WREG32(GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config); |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index b7a5a20e81dc..7b1c8f8f4074 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
@@ -138,6 +138,7 @@ | |||
138 | #define MC_SHARED_CHMAP 0x2004 | 138 | #define MC_SHARED_CHMAP 0x2004 |
139 | #define NOOFCHAN_SHIFT 12 | 139 | #define NOOFCHAN_SHIFT 12 |
140 | #define NOOFCHAN_MASK 0x00003000 | 140 | #define NOOFCHAN_MASK 0x00003000 |
141 | #define MC_SHARED_CHREMAP 0x2008 | ||
141 | 142 | ||
142 | #define MC_ARB_RAMCFG 0x2760 | 143 | #define MC_ARB_RAMCFG 0x2760 |
143 | #define NOOFBANK_SHIFT 0 | 144 | #define NOOFBANK_SHIFT 0 |
@@ -303,6 +304,7 @@ | |||
303 | #define BILINEAR_PRECISION_8_BIT (1 << 31) | 304 | #define BILINEAR_PRECISION_8_BIT (1 << 31) |
304 | 305 | ||
305 | #define TCP_CNTL 0x9610 | 306 | #define TCP_CNTL 0x9610 |
307 | #define TCP_CHAN_STEER 0x9614 | ||
306 | 308 | ||
307 | #define VGT_CACHE_INVALIDATION 0x88C4 | 309 | #define VGT_CACHE_INVALIDATION 0x88C4 |
308 | #define CACHE_INVALIDATION(x) ((x)<<0) | 310 | #define CACHE_INVALIDATION(x) ((x)<<0) |