diff options
-rw-r--r-- | arch/m68k/include/asm/m54xxgpt.h | 40 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m54xx.c | 6 | ||||
-rw-r--r-- | drivers/watchdog/m54xx_wdt.c | 21 |
3 files changed, 33 insertions, 34 deletions
diff --git a/arch/m68k/include/asm/m54xxgpt.h b/arch/m68k/include/asm/m54xxgpt.h index df75dd87ae7a..0b69cd1ed0ed 100644 --- a/arch/m68k/include/asm/m54xxgpt.h +++ b/arch/m68k/include/asm/m54xxgpt.h | |||
@@ -16,26 +16,26 @@ | |||
16 | *********************************************************************/ | 16 | *********************************************************************/ |
17 | 17 | ||
18 | /* Register read/write macros */ | 18 | /* Register read/write macros */ |
19 | #define MCF_GPT_GMS0 0x000800 | 19 | #define MCF_GPT_GMS0 (MCF_MBAR + 0x000800) |
20 | #define MCF_GPT_GCIR0 0x000804 | 20 | #define MCF_GPT_GCIR0 (MCF_MBAR + 0x000804) |
21 | #define MCF_GPT_GPWM0 0x000808 | 21 | #define MCF_GPT_GPWM0 (MCF_MBAR + 0x000808) |
22 | #define MCF_GPT_GSR0 0x00080C | 22 | #define MCF_GPT_GSR0 (MCF_MBAR + 0x00080C) |
23 | #define MCF_GPT_GMS1 0x000810 | 23 | #define MCF_GPT_GMS1 (MCF_MBAR + 0x000810) |
24 | #define MCF_GPT_GCIR1 0x000814 | 24 | #define MCF_GPT_GCIR1 (MCF_MBAR + 0x000814) |
25 | #define MCF_GPT_GPWM1 0x000818 | 25 | #define MCF_GPT_GPWM1 (MCF_MBAR + 0x000818) |
26 | #define MCF_GPT_GSR1 0x00081C | 26 | #define MCF_GPT_GSR1 (MCF_MBAR + 0x00081C) |
27 | #define MCF_GPT_GMS2 0x000820 | 27 | #define MCF_GPT_GMS2 (MCF_MBAR + 0x000820) |
28 | #define MCF_GPT_GCIR2 0x000824 | 28 | #define MCF_GPT_GCIR2 (MCF_MBAR + 0x000824) |
29 | #define MCF_GPT_GPWM2 0x000828 | 29 | #define MCF_GPT_GPWM2 (MCF_MBAR + 0x000828) |
30 | #define MCF_GPT_GSR2 0x00082C | 30 | #define MCF_GPT_GSR2 (MCF_MBAR + 0x00082C) |
31 | #define MCF_GPT_GMS3 0x000830 | 31 | #define MCF_GPT_GMS3 (MCF_MBAR + 0x000830) |
32 | #define MCF_GPT_GCIR3 0x000834 | 32 | #define MCF_GPT_GCIR3 (MCF_MBAR + 0x000834) |
33 | #define MCF_GPT_GPWM3 0x000838 | 33 | #define MCF_GPT_GPWM3 (MCF_MBAR + 0x000838) |
34 | #define MCF_GPT_GSR3 0x00083C | 34 | #define MCF_GPT_GSR3 (MCF_MBAR + 0x00083C) |
35 | #define MCF_GPT_GMS(x) (0x000800+((x)*0x010)) | 35 | #define MCF_GPT_GMS(x) (MCF_MBAR + 0x000800 + ((x) * 0x010)) |
36 | #define MCF_GPT_GCIR(x) (0x000804+((x)*0x010)) | 36 | #define MCF_GPT_GCIR(x) (MCF_MBAR + 0x000804 + ((x) * 0x010)) |
37 | #define MCF_GPT_GPWM(x) (0x000808+((x)*0x010)) | 37 | #define MCF_GPT_GPWM(x) (MCF_MBAR + 0x000808 + ((x) * 0x010)) |
38 | #define MCF_GPT_GSR(x) (0x00080C+((x)*0x010)) | 38 | #define MCF_GPT_GSR(x) (MCF_MBAR + 0x00080C + ((x) * 0x010)) |
39 | 39 | ||
40 | /* Bit definitions and macros for MCF_GPT_GMS */ | 40 | /* Bit definitions and macros for MCF_GPT_GMS */ |
41 | #define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0) | 41 | #define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0) |
diff --git a/arch/m68k/platform/coldfire/m54xx.c b/arch/m68k/platform/coldfire/m54xx.c index 1f7c7fd83e2f..b587bf35175b 100644 --- a/arch/m68k/platform/coldfire/m54xx.c +++ b/arch/m68k/platform/coldfire/m54xx.c | |||
@@ -44,10 +44,10 @@ static void mcf54xx_reset(void) | |||
44 | { | 44 | { |
45 | /* disable interrupts and enable the watchdog */ | 45 | /* disable interrupts and enable the watchdog */ |
46 | asm("movew #0x2700, %sr\n"); | 46 | asm("movew #0x2700, %sr\n"); |
47 | __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0); | 47 | __raw_writel(0, MCF_GPT_GMS0); |
48 | __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0); | 48 | __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0); |
49 | __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4), | 49 | __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4), |
50 | MCF_MBAR + MCF_GPT_GMS0); | 50 | MCF_GPT_GMS0); |
51 | } | 51 | } |
52 | 52 | ||
53 | /***************************************************************************/ | 53 | /***************************************************************************/ |
diff --git a/drivers/watchdog/m54xx_wdt.c b/drivers/watchdog/m54xx_wdt.c index 663cad86c633..173494a681e6 100644 --- a/drivers/watchdog/m54xx_wdt.c +++ b/drivers/watchdog/m54xx_wdt.c | |||
@@ -46,17 +46,17 @@ static void wdt_enable(void) | |||
46 | unsigned int gms0; | 46 | unsigned int gms0; |
47 | 47 | ||
48 | /* preserve GPIO usage, if any */ | 48 | /* preserve GPIO usage, if any */ |
49 | gms0 = __raw_readl(MCF_MBAR + MCF_GPT_GMS0); | 49 | gms0 = __raw_readl(MCF_GPT_GMS0); |
50 | if (gms0 & MCF_GPT_GMS_TMS_GPIO) | 50 | if (gms0 & MCF_GPT_GMS_TMS_GPIO) |
51 | gms0 &= (MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_GPIO_MASK | 51 | gms0 &= (MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_GPIO_MASK |
52 | | MCF_GPT_GMS_OD); | 52 | | MCF_GPT_GMS_OD); |
53 | else | 53 | else |
54 | gms0 = MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_OD; | 54 | gms0 = MCF_GPT_GMS_TMS_GPIO | MCF_GPT_GMS_OD; |
55 | __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); | 55 | __raw_writel(gms0, MCF_GPT_GMS0); |
56 | __raw_writel(MCF_GPT_GCIR_PRE(heartbeat*(MCF_BUSCLK/0xffff)) | | 56 | __raw_writel(MCF_GPT_GCIR_PRE(heartbeat*(MCF_BUSCLK/0xffff)) | |
57 | MCF_GPT_GCIR_CNT(0xffff), MCF_MBAR + MCF_GPT_GCIR0); | 57 | MCF_GPT_GCIR_CNT(0xffff), MCF_GPT_GCIR0); |
58 | gms0 |= MCF_GPT_GMS_OCPW(0xA5) | MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE; | 58 | gms0 |= MCF_GPT_GMS_OCPW(0xA5) | MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE; |
59 | __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); | 59 | __raw_writel(gms0, MCF_GPT_GMS0); |
60 | } | 60 | } |
61 | 61 | ||
62 | static void wdt_disable(void) | 62 | static void wdt_disable(void) |
@@ -64,18 +64,18 @@ static void wdt_disable(void) | |||
64 | unsigned int gms0; | 64 | unsigned int gms0; |
65 | 65 | ||
66 | /* disable watchdog */ | 66 | /* disable watchdog */ |
67 | gms0 = __raw_readl(MCF_MBAR + MCF_GPT_GMS0); | 67 | gms0 = __raw_readl(MCF_GPT_GMS0); |
68 | gms0 &= ~(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE); | 68 | gms0 &= ~(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE); |
69 | __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); | 69 | __raw_writel(gms0, MCF_GPT_GMS0); |
70 | } | 70 | } |
71 | 71 | ||
72 | static void wdt_keepalive(void) | 72 | static void wdt_keepalive(void) |
73 | { | 73 | { |
74 | unsigned int gms0; | 74 | unsigned int gms0; |
75 | 75 | ||
76 | gms0 = __raw_readl(MCF_MBAR + MCF_GPT_GMS0); | 76 | gms0 = __raw_readl(MCF_GPT_GMS0); |
77 | gms0 |= MCF_GPT_GMS_OCPW(0xA5); | 77 | gms0 |= MCF_GPT_GMS_OCPW(0xA5); |
78 | __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); | 78 | __raw_writel(gms0, MCF_GPT_GMS0); |
79 | } | 79 | } |
80 | 80 | ||
81 | static int m54xx_wdt_open(struct inode *inode, struct file *file) | 81 | static int m54xx_wdt_open(struct inode *inode, struct file *file) |
@@ -195,8 +195,7 @@ static struct miscdevice m54xx_wdt_miscdev = { | |||
195 | 195 | ||
196 | static int __init m54xx_wdt_init(void) | 196 | static int __init m54xx_wdt_init(void) |
197 | { | 197 | { |
198 | if (!request_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4, | 198 | if (!request_mem_region(MCF_GPT_GCIR0, 4, "Coldfire M54xx Watchdog")) { |
199 | "Coldfire M54xx Watchdog")) { | ||
200 | pr_warn("I/O region busy\n"); | 199 | pr_warn("I/O region busy\n"); |
201 | return -EBUSY; | 200 | return -EBUSY; |
202 | } | 201 | } |
@@ -208,7 +207,7 @@ static int __init m54xx_wdt_init(void) | |||
208 | static void __exit m54xx_wdt_exit(void) | 207 | static void __exit m54xx_wdt_exit(void) |
209 | { | 208 | { |
210 | misc_deregister(&m54xx_wdt_miscdev); | 209 | misc_deregister(&m54xx_wdt_miscdev); |
211 | release_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4); | 210 | release_mem_region(MCF_GPT_GCIR0, 4); |
212 | } | 211 | } |
213 | 212 | ||
214 | module_init(m54xx_wdt_init); | 213 | module_init(m54xx_wdt_init); |