diff options
-rw-r--r-- | arch/arm/mach-sa1100/collie.c | 29 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/collie_pm.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/cpu-sa1100.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/cpu-sa1110.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/dma.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/h3600.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/pleb.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/shannon.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/sleep.S | 52 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/time.c | 4 |
10 files changed, 87 insertions, 88 deletions
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index fe289997cfaf..2052eb88c961 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c | |||
@@ -68,23 +68,22 @@ struct platform_device colliescoop_device = { | |||
68 | }; | 68 | }; |
69 | 69 | ||
70 | static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = { | 70 | static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = { |
71 | { | 71 | { |
72 | .dev = &colliescoop_device.dev, | 72 | .dev = &colliescoop_device.dev, |
73 | .irq = COLLIE_IRQ_GPIO_CF_IRQ, | 73 | .irq = COLLIE_IRQ_GPIO_CF_IRQ, |
74 | .cd_irq = COLLIE_IRQ_GPIO_CF_CD, | 74 | .cd_irq = COLLIE_IRQ_GPIO_CF_CD, |
75 | .cd_irq_str = "PCMCIA0 CD", | 75 | .cd_irq_str = "PCMCIA0 CD", |
76 | }, | 76 | }, |
77 | }; | 77 | }; |
78 | 78 | ||
79 | static struct scoop_pcmcia_config collie_pcmcia_config = { | 79 | static struct scoop_pcmcia_config collie_pcmcia_config = { |
80 | .devs = &collie_pcmcia_scoop[0], | 80 | .devs = &collie_pcmcia_scoop[0], |
81 | .num_devs = 1, | 81 | .num_devs = 1, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | |||
85 | static struct mcp_plat_data collie_mcp_data = { | 84 | static struct mcp_plat_data collie_mcp_data = { |
86 | .mccr0 = MCCR0_ADM | MCCR0_ExtClk, | 85 | .mccr0 = MCCR0_ADM | MCCR0_ExtClk, |
87 | .sclk_rate = 9216000, | 86 | .sclk_rate = 9216000, |
88 | }; | 87 | }; |
89 | 88 | ||
90 | #ifdef CONFIG_SHARP_LOCOMO | 89 | #ifdef CONFIG_SHARP_LOCOMO |
@@ -95,14 +94,14 @@ struct platform_device collie_locomo_device; | |||
95 | 94 | ||
96 | static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl) | 95 | static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl) |
97 | { | 96 | { |
98 | if (mctrl & TIOCM_RTS) | 97 | if (mctrl & TIOCM_RTS) |
99 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0); | 98 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0); |
100 | else | 99 | else |
101 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1); | 100 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1); |
102 | 101 | ||
103 | if (mctrl & TIOCM_DTR) | 102 | if (mctrl & TIOCM_DTR) |
104 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0); | 103 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0); |
105 | else | 104 | else |
106 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1); | 105 | locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1); |
107 | } | 106 | } |
108 | 107 | ||
diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c index 947883a483df..b39307f26b52 100644 --- a/arch/arm/mach-sa1100/collie_pm.c +++ b/arch/arm/mach-sa1100/collie_pm.c | |||
@@ -263,24 +263,24 @@ static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev) | |||
263 | } | 263 | } |
264 | 264 | ||
265 | static struct ucb1x00_driver collie_pm_ucb_driver = { | 265 | static struct ucb1x00_driver collie_pm_ucb_driver = { |
266 | .add = collie_pm_ucb_add, | 266 | .add = collie_pm_ucb_add, |
267 | }; | 267 | }; |
268 | 268 | ||
269 | static struct platform_device *collie_pm_device; | 269 | static struct platform_device *collie_pm_device; |
270 | 270 | ||
271 | static int __init collie_pm_init(void) | 271 | static int __init collie_pm_init(void) |
272 | { | 272 | { |
273 | int ret; | 273 | int ret; |
274 | 274 | ||
275 | collie_pm_device = platform_device_alloc("sharpsl-pm", -1); | 275 | collie_pm_device = platform_device_alloc("sharpsl-pm", -1); |
276 | if (!collie_pm_device) | 276 | if (!collie_pm_device) |
277 | return -ENOMEM; | 277 | return -ENOMEM; |
278 | 278 | ||
279 | collie_pm_device->dev.platform_data = &collie_pm_machinfo; | 279 | collie_pm_device->dev.platform_data = &collie_pm_machinfo; |
280 | ret = platform_device_add(collie_pm_device); | 280 | ret = platform_device_add(collie_pm_device); |
281 | 281 | ||
282 | if (ret) | 282 | if (ret) |
283 | platform_device_put(collie_pm_device); | 283 | platform_device_put(collie_pm_device); |
284 | 284 | ||
285 | if (!ret) | 285 | if (!ret) |
286 | ret = ucb1x00_register_driver(&collie_pm_ucb_driver); | 286 | ret = ucb1x00_register_driver(&collie_pm_ucb_driver); |
@@ -291,7 +291,7 @@ static int __init collie_pm_init(void) | |||
291 | static void __exit collie_pm_exit(void) | 291 | static void __exit collie_pm_exit(void) |
292 | { | 292 | { |
293 | ucb1x00_unregister_driver(&collie_pm_ucb_driver); | 293 | ucb1x00_unregister_driver(&collie_pm_ucb_driver); |
294 | platform_device_unregister(collie_pm_device); | 294 | platform_device_unregister(collie_pm_device); |
295 | } | 295 | } |
296 | 296 | ||
297 | module_init(collie_pm_init); | 297 | module_init(collie_pm_init); |
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index 244d5956312c..ef817876a5d6 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c | |||
@@ -3,17 +3,17 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2000 2001, The Delft University of Technology | 4 | * Copyright (C) 2000 2001, The Delft University of Technology |
5 | * | 5 | * |
6 | * Authors: | 6 | * Authors: |
7 | * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version | 7 | * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version |
8 | * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl): | 8 | * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl): |
9 | * - major rewrite for linux-2.3.99 | 9 | * - major rewrite for linux-2.3.99 |
10 | * - rewritten for the more generic power management scheme in | 10 | * - rewritten for the more generic power management scheme in |
11 | * linux-2.4.5-rmk1 | 11 | * linux-2.4.5-rmk1 |
12 | * | 12 | * |
13 | * This software has been developed while working on the LART | 13 | * This software has been developed while working on the LART |
14 | * computing board (http://www.lartmaker.nl/), which is | 14 | * computing board (http://www.lartmaker.nl/), which is |
15 | * sponsored by the Mobile Multi-media Communications | 15 | * sponsored by the Mobile Multi-media Communications |
16 | * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications | 16 | * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications |
17 | * (http://www.ubicom.tudelft.nl/) projects. | 17 | * (http://www.ubicom.tudelft.nl/) projects. |
18 | * | 18 | * |
19 | * The authors can be reached at: | 19 | * The authors can be reached at: |
@@ -36,7 +36,7 @@ | |||
36 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 36 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
37 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | 37 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
38 | * GNU General Public License for more details. | 38 | * GNU General Public License for more details. |
39 | * | 39 | * |
40 | * You should have received a copy of the GNU General Public License | 40 | * You should have received a copy of the GNU General Public License |
41 | * along with this program; if not, write to the Free Software | 41 | * along with this program; if not, write to the Free Software |
42 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 42 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
@@ -44,7 +44,7 @@ | |||
44 | * | 44 | * |
45 | * Theory of operations | 45 | * Theory of operations |
46 | * ==================== | 46 | * ==================== |
47 | * | 47 | * |
48 | * Clock scaling can be used to lower the power consumption of the CPU | 48 | * Clock scaling can be used to lower the power consumption of the CPU |
49 | * core. This will give you a somewhat longer running time. | 49 | * core. This will give you a somewhat longer running time. |
50 | * | 50 | * |
@@ -58,11 +58,11 @@ | |||
58 | * MDCNFG 0xA0000000 DRAM config | 58 | * MDCNFG 0xA0000000 DRAM config |
59 | * MDCAS0 0xA0000004 Access waveform | 59 | * MDCAS0 0xA0000004 Access waveform |
60 | * MDCAS1 0xA0000008 Access waveform | 60 | * MDCAS1 0xA0000008 Access waveform |
61 | * MDCAS2 0xA000000C Access waveform | 61 | * MDCAS2 0xA000000C Access waveform |
62 | * | 62 | * |
63 | * Care must be taken to change the DRAM parameters the correct way, | 63 | * Care must be taken to change the DRAM parameters the correct way, |
64 | * because otherwise the DRAM becomes unusable and the kernel will | 64 | * because otherwise the DRAM becomes unusable and the kernel will |
65 | * crash. | 65 | * crash. |
66 | * | 66 | * |
67 | * The simple solution to avoid a kernel crash is to put the actual | 67 | * The simple solution to avoid a kernel crash is to put the actual |
68 | * clock change in ROM and jump to that code from the kernel. The main | 68 | * clock change in ROM and jump to that code from the kernel. The main |
@@ -75,7 +75,7 @@ | |||
75 | * as long as all re-configuration steps yield a valid DRAM | 75 | * as long as all re-configuration steps yield a valid DRAM |
76 | * configuration. The advantages are clear: it will run on all SA-1100 | 76 | * configuration. The advantages are clear: it will run on all SA-1100 |
77 | * platforms, and the code is very simple. | 77 | * platforms, and the code is very simple. |
78 | * | 78 | * |
79 | * If you really want to understand what is going on in | 79 | * If you really want to understand what is going on in |
80 | * sa1100_update_dram_timings(), you'll have to read sections 8.2, | 80 | * sa1100_update_dram_timings(), you'll have to read sections 8.2, |
81 | * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor | 81 | * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor |
@@ -97,7 +97,7 @@ | |||
97 | typedef struct { | 97 | typedef struct { |
98 | int speed; | 98 | int speed; |
99 | u32 mdcnfg; | 99 | u32 mdcnfg; |
100 | u32 mdcas0; | 100 | u32 mdcas0; |
101 | u32 mdcas1; | 101 | u32 mdcas1; |
102 | u32 mdcas2; | 102 | u32 mdcas2; |
103 | } sa1100_dram_regs_t; | 103 | } sa1100_dram_regs_t; |
@@ -147,7 +147,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed) | |||
147 | /* No risk, no fun: run with interrupts on! */ | 147 | /* No risk, no fun: run with interrupts on! */ |
148 | if (new_speed > current_speed) { | 148 | if (new_speed > current_speed) { |
149 | /* We're going FASTER, so first relax the memory | 149 | /* We're going FASTER, so first relax the memory |
150 | * timings before changing the core frequency | 150 | * timings before changing the core frequency |
151 | */ | 151 | */ |
152 | 152 | ||
153 | /* Half the memory access clock */ | 153 | /* Half the memory access clock */ |
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 3e4fb214eada..63b32b68b296 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c | |||
@@ -81,14 +81,14 @@ static struct sdram_params sdram_tbl[] __initdata = { | |||
81 | .twr = 9, | 81 | .twr = 9, |
82 | .refresh = 64000, | 82 | .refresh = 64000, |
83 | .cas_latency = 3, | 83 | .cas_latency = 3, |
84 | }, { /* Samsung K4S281632B-1H */ | 84 | }, { /* Samsung K4S281632B-1H */ |
85 | .name = "K4S281632B-1H", | 85 | .name = "K4S281632B-1H", |
86 | .rows = 12, | 86 | .rows = 12, |
87 | .tck = 10, | 87 | .tck = 10, |
88 | .trp = 20, | 88 | .trp = 20, |
89 | .twr = 10, | 89 | .twr = 10, |
90 | .refresh = 64000, | 90 | .refresh = 64000, |
91 | .cas_latency = 3, | 91 | .cas_latency = 3, |
92 | }, { /* Samsung KM416S4030CT */ | 92 | }, { /* Samsung KM416S4030CT */ |
93 | .name = "KM416S4030CT", | 93 | .name = "KM416S4030CT", |
94 | .rows = 13, | 94 | .rows = 13, |
@@ -220,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram) | |||
220 | } | 220 | } |
221 | 221 | ||
222 | /* | 222 | /* |
223 | * Ok, set the CPU frequency. | 223 | * Ok, set the CPU frequency. |
224 | */ | 224 | */ |
225 | static int sa1110_target(struct cpufreq_policy *policy, | 225 | static int sa1110_target(struct cpufreq_policy *policy, |
226 | unsigned int target_freq, | 226 | unsigned int target_freq, |
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c index 3f445ffd99f8..95f9c5a6d6d5 100644 --- a/arch/arm/mach-sa1100/dma.c +++ b/arch/arm/mach-sa1100/dma.c | |||
@@ -113,10 +113,10 @@ int sa1100_request_dma (dma_device_t device, const char *device_id, | |||
113 | } | 113 | } |
114 | } | 114 | } |
115 | if (!err) { | 115 | if (!err) { |
116 | if (dma) | 116 | if (dma) |
117 | dma->device = device; | 117 | dma->device = device; |
118 | else | 118 | else |
119 | err = -ENOSR; | 119 | err = -ENOSR; |
120 | } | 120 | } |
121 | spin_unlock(&dma_list_lock); | 121 | spin_unlock(&dma_list_lock); |
122 | if (err) | 122 | if (err) |
diff --git a/arch/arm/mach-sa1100/include/mach/h3600.h b/arch/arm/mach-sa1100/include/mach/h3600.h index 3ca0ecf095e6..9cc47fddb335 100644 --- a/arch/arm/mach-sa1100/include/mach/h3600.h +++ b/arch/arm/mach-sa1100/include/mach/h3600.h | |||
@@ -32,14 +32,14 @@ typedef int __bitwise pm_request_t; | |||
32 | #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800()) | 32 | #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800()) |
33 | 33 | ||
34 | /* Physical memory regions corresponding to chip selects */ | 34 | /* Physical memory regions corresponding to chip selects */ |
35 | #define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) | 35 | #define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) |
36 | #define H3600_BANK_2_PHYS SA1100_CS2_PHYS | 36 | #define H3600_BANK_2_PHYS SA1100_CS2_PHYS |
37 | #define H3600_BANK_4_PHYS SA1100_CS4_PHYS | 37 | #define H3600_BANK_4_PHYS SA1100_CS4_PHYS |
38 | 38 | ||
39 | /* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */ | 39 | /* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */ |
40 | #define H3600_EGPIO_VIRT 0xf0000000 | 40 | #define H3600_EGPIO_VIRT 0xf0000000 |
41 | #define H3600_BANK_2_VIRT 0xf1000000 | 41 | #define H3600_BANK_2_VIRT 0xf1000000 |
42 | #define H3600_BANK_4_VIRT 0xf3800000 | 42 | #define H3600_BANK_4_VIRT 0xf3800000 |
43 | 43 | ||
44 | /* | 44 | /* |
45 | Machine-independent GPIO definitions | 45 | Machine-independent GPIO definitions |
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index e45d3a1890bc..e1458bc1868e 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c | |||
@@ -122,12 +122,12 @@ static void __init pleb_map_io(void) | |||
122 | sa1100_map_io(); | 122 | sa1100_map_io(); |
123 | 123 | ||
124 | sa1100_register_uart(0, 3); | 124 | sa1100_register_uart(0, 3); |
125 | sa1100_register_uart(1, 1); | 125 | sa1100_register_uart(1, 1); |
126 | 126 | ||
127 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); | 127 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); |
128 | GPDR |= GPIO_UART_TXD; | 128 | GPDR |= GPIO_UART_TXD; |
129 | GPDR &= ~GPIO_UART_RXD; | 129 | GPDR &= ~GPIO_UART_RXD; |
130 | PPAR |= PPAR_UPR; | 130 | PPAR |= PPAR_UPR; |
131 | 131 | ||
132 | /* | 132 | /* |
133 | * Fix expansion memory timing for network card | 133 | * Fix expansion memory timing for network card |
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index 9ccdd09cf69f..ddd917d1083d 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c | |||
@@ -33,7 +33,7 @@ static struct mtd_partition shannon_partitions[] = { | |||
33 | .offset = MTDPART_OFS_APPEND, | 33 | .offset = MTDPART_OFS_APPEND, |
34 | .size = 0xe0000 | 34 | .size = 0xe0000 |
35 | }, | 35 | }, |
36 | { | 36 | { |
37 | .name = "initrd", | 37 | .name = "initrd", |
38 | .offset = MTDPART_OFS_APPEND, | 38 | .offset = MTDPART_OFS_APPEND, |
39 | .size = MTDPART_SIZ_FULL | 39 | .size = MTDPART_SIZ_FULL |
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S index 171441f96710..80f31bad707c 100644 --- a/arch/arm/mach-sa1100/sleep.S +++ b/arch/arm/mach-sa1100/sleep.S | |||
@@ -100,36 +100,36 @@ ENTRY(sa1100_cpu_suspend) | |||
100 | ldr r1, =MSC1 | 100 | ldr r1, =MSC1 |
101 | ldr r2, =MSC2 | 101 | ldr r2, =MSC2 |
102 | 102 | ||
103 | ldr r3, [r0] | 103 | ldr r3, [r0] |
104 | bic r3, r3, #FMsk(MSC_RT) | 104 | bic r3, r3, #FMsk(MSC_RT) |
105 | bic r3, r3, #FMsk(MSC_RT)<<16 | 105 | bic r3, r3, #FMsk(MSC_RT)<<16 |
106 | 106 | ||
107 | ldr r4, [r1] | 107 | ldr r4, [r1] |
108 | bic r4, r4, #FMsk(MSC_RT) | 108 | bic r4, r4, #FMsk(MSC_RT) |
109 | bic r4, r4, #FMsk(MSC_RT)<<16 | 109 | bic r4, r4, #FMsk(MSC_RT)<<16 |
110 | 110 | ||
111 | ldr r5, [r2] | 111 | ldr r5, [r2] |
112 | bic r5, r5, #FMsk(MSC_RT) | 112 | bic r5, r5, #FMsk(MSC_RT) |
113 | bic r5, r5, #FMsk(MSC_RT)<<16 | 113 | bic r5, r5, #FMsk(MSC_RT)<<16 |
114 | 114 | ||
115 | ldr r6, =MDREFR | 115 | ldr r6, =MDREFR |
116 | 116 | ||
117 | ldr r7, [r6] | 117 | ldr r7, [r6] |
118 | bic r7, r7, #0x0000FF00 | 118 | bic r7, r7, #0x0000FF00 |
119 | bic r7, r7, #0x000000F0 | 119 | bic r7, r7, #0x000000F0 |
120 | orr r8, r7, #MDREFR_SLFRSH | 120 | orr r8, r7, #MDREFR_SLFRSH |
121 | 121 | ||
122 | ldr r9, =MDCNFG | 122 | ldr r9, =MDCNFG |
123 | ldr r10, [r9] | 123 | ldr r10, [r9] |
124 | bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1) | 124 | bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1) |
125 | bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3) | 125 | bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3) |
126 | 126 | ||
127 | bic r11, r8, #MDREFR_SLFRSH | 127 | bic r11, r8, #MDREFR_SLFRSH |
128 | bic r11, r11, #MDREFR_E1PIN | 128 | bic r11, r11, #MDREFR_E1PIN |
129 | 129 | ||
130 | ldr r12, =PMCR | 130 | ldr r12, =PMCR |
131 | 131 | ||
132 | mov r13, #PMCR_SF | 132 | mov r13, #PMCR_SF |
133 | 133 | ||
134 | b sa1110_sdram_controller_fix | 134 | b sa1110_sdram_controller_fix |
135 | 135 | ||
@@ -188,10 +188,10 @@ ENTRY(sa1100_cpu_resume) | |||
188 | mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs | 188 | mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs |
189 | mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache | 189 | mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache |
190 | mcr p15, 0, r1, c9, c0, 0 @ invalidate RB | 190 | mcr p15, 0, r1, c9, c0, 0 @ invalidate RB |
191 | mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB | 191 | mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB |
192 | 192 | ||
193 | mcr p15, 0, r4, c3, c0, 0 @ domain ID | 193 | mcr p15, 0, r4, c3, c0, 0 @ domain ID |
194 | mcr p15, 0, r5, c2, c0, 0 @ translation table base addr | 194 | mcr p15, 0, r5, c2, c0, 0 @ translation table base addr |
195 | mcr p15, 0, r6, c13, c0, 0 @ PID | 195 | mcr p15, 0, r6, c13, c0, 0 @ PID |
196 | b resume_turn_on_mmu @ cache align execution | 196 | b resume_turn_on_mmu @ cache align execution |
197 | 197 | ||
@@ -209,7 +209,7 @@ sleep_save_sp: | |||
209 | 209 | ||
210 | .text | 210 | .text |
211 | resume_after_mmu: | 211 | resume_after_mmu: |
212 | mcr p15, 0, r1, c15, c1, 2 @ enable clock switching | 212 | mcr p15, 0, r1, c15, c1, 2 @ enable clock switching |
213 | ldmfd sp!, {r4 - r12, pc} @ return to caller | 213 | ldmfd sp!, {r4 - r12, pc} @ return to caller |
214 | 214 | ||
215 | 215 | ||
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 24c0a4bae850..8c5e727f3b75 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -2,8 +2,8 @@ | |||
2 | * linux/arch/arm/mach-sa1100/time.c | 2 | * linux/arch/arm/mach-sa1100/time.c |
3 | * | 3 | * |
4 | * Copyright (C) 1998 Deborah Wallach. | 4 | * Copyright (C) 1998 Deborah Wallach. |
5 | * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> | 5 | * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> |
6 | * | 6 | * |
7 | * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> | 7 | * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> |
8 | * Rewritten: big cleanup, much simpler, better HZ accuracy. | 8 | * Rewritten: big cleanup, much simpler, better HZ accuracy. |
9 | * | 9 | * |