diff options
-rw-r--r-- | arch/arm/include/asm/assembler.h | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index eb87200aa4b5..05ee9eebad6b 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -246,18 +246,14 @@ | |||
246 | * | 246 | * |
247 | * This macro is intended for forcing the CPU into SVC mode at boot time. | 247 | * This macro is intended for forcing the CPU into SVC mode at boot time. |
248 | * you cannot return to the original mode. | 248 | * you cannot return to the original mode. |
249 | * | ||
250 | * Beware, it also clobers LR. | ||
251 | */ | 249 | */ |
252 | .macro safe_svcmode_maskall reg:req | 250 | .macro safe_svcmode_maskall reg:req |
253 | #if __LINUX_ARM_ARCH__ >= 6 | 251 | #if __LINUX_ARM_ARCH__ >= 6 |
254 | mrs \reg , cpsr | 252 | mrs \reg , cpsr |
255 | mov lr , \reg | 253 | eor \reg, \reg, #HYP_MODE |
256 | and lr , lr , #MODE_MASK | 254 | tst \reg, #MODE_MASK |
257 | cmp lr , #HYP_MODE | ||
258 | orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | ||
259 | bic \reg , \reg , #MODE_MASK | 255 | bic \reg , \reg , #MODE_MASK |
260 | orr \reg , \reg , #SVC_MODE | 256 | orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE |
261 | THUMB( orr \reg , \reg , #PSR_T_BIT ) | 257 | THUMB( orr \reg , \reg , #PSR_T_BIT ) |
262 | bne 1f | 258 | bne 1f |
263 | orr \reg, \reg, #PSR_A_BIT | 259 | orr \reg, \reg, #PSR_A_BIT |