diff options
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 45 | ||||
-rw-r--r-- | include/drm/intel-gtt.h | 2 |
3 files changed, 22 insertions, 35 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 7fcee5c2e986..b45241479a56 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -77,6 +77,8 @@ static struct _intel_private { | |||
77 | struct page *scratch_page; | 77 | struct page *scratch_page; |
78 | phys_addr_t scratch_page_dma; | 78 | phys_addr_t scratch_page_dma; |
79 | int refcount; | 79 | int refcount; |
80 | /* Whether i915 needs to use the dmar apis or not. */ | ||
81 | unsigned int needs_dmar : 1; | ||
80 | } intel_private; | 82 | } intel_private; |
81 | 83 | ||
82 | #define INTEL_GTT_GEN intel_private.driver->gen | 84 | #define INTEL_GTT_GEN intel_private.driver->gen |
@@ -292,7 +294,7 @@ static int intel_gtt_setup_scratch_page(void) | |||
292 | get_page(page); | 294 | get_page(page); |
293 | set_pages_uc(page, 1); | 295 | set_pages_uc(page, 1); |
294 | 296 | ||
295 | if (intel_private.base.needs_dmar) { | 297 | if (intel_private.needs_dmar) { |
296 | dma_addr = pci_map_page(intel_private.pcidev, page, 0, | 298 | dma_addr = pci_map_page(intel_private.pcidev, page, 0, |
297 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); | 299 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
298 | if (pci_dma_mapping_error(intel_private.pcidev, dma_addr)) | 300 | if (pci_dma_mapping_error(intel_private.pcidev, dma_addr)) |
@@ -608,7 +610,7 @@ static int intel_gtt_init(void) | |||
608 | 610 | ||
609 | intel_private.base.stolen_size = intel_gtt_stolen_size(); | 611 | intel_private.base.stolen_size = intel_gtt_stolen_size(); |
610 | 612 | ||
611 | intel_private.base.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2; | 613 | intel_private.needs_dmar = USE_PCI_DMA_API && INTEL_GTT_GEN > 2; |
612 | 614 | ||
613 | ret = intel_gtt_setup_scratch_page(); | 615 | ret = intel_gtt_setup_scratch_page(); |
614 | if (ret != 0) { | 616 | if (ret != 0) { |
@@ -866,7 +868,7 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem, | |||
866 | if (!mem->is_flushed) | 868 | if (!mem->is_flushed) |
867 | global_cache_flush(); | 869 | global_cache_flush(); |
868 | 870 | ||
869 | if (intel_private.base.needs_dmar) { | 871 | if (intel_private.needs_dmar) { |
870 | struct sg_table st; | 872 | struct sg_table st; |
871 | 873 | ||
872 | ret = intel_gtt_map_memory(mem->pages, mem->page_count, &st); | 874 | ret = intel_gtt_map_memory(mem->pages, mem->page_count, &st); |
@@ -907,7 +909,7 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem, | |||
907 | 909 | ||
908 | intel_gtt_clear_range(pg_start, mem->page_count); | 910 | intel_gtt_clear_range(pg_start, mem->page_count); |
909 | 911 | ||
910 | if (intel_private.base.needs_dmar) { | 912 | if (intel_private.needs_dmar) { |
911 | intel_gtt_unmap_memory(mem->sg_list, mem->num_sg); | 913 | intel_gtt_unmap_memory(mem->sg_list, mem->num_sg); |
912 | mem->sg_list = NULL; | 914 | mem->sg_list = NULL; |
913 | mem->num_sg = 0; | 915 | mem->num_sg = 0; |
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 3c1f66ebc245..a0ba4a9e53c7 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c | |||
@@ -138,28 +138,23 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev) | |||
138 | goto err_pt_alloc; | 138 | goto err_pt_alloc; |
139 | } | 139 | } |
140 | 140 | ||
141 | if (dev_priv->mm.gtt->needs_dmar) { | 141 | ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t) *ppgtt->num_pd_entries, |
142 | ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t) | 142 | GFP_KERNEL); |
143 | *ppgtt->num_pd_entries, | 143 | if (!ppgtt->pt_dma_addr) |
144 | GFP_KERNEL); | 144 | goto err_pt_alloc; |
145 | if (!ppgtt->pt_dma_addr) | ||
146 | goto err_pt_alloc; | ||
147 | 145 | ||
148 | for (i = 0; i < ppgtt->num_pd_entries; i++) { | 146 | for (i = 0; i < ppgtt->num_pd_entries; i++) { |
149 | dma_addr_t pt_addr; | 147 | dma_addr_t pt_addr; |
150 | 148 | ||
151 | pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i], | 149 | pt_addr = pci_map_page(dev->pdev, ppgtt->pt_pages[i], 0, 4096, |
152 | 0, 4096, | 150 | PCI_DMA_BIDIRECTIONAL); |
153 | PCI_DMA_BIDIRECTIONAL); | ||
154 | 151 | ||
155 | if (pci_dma_mapping_error(dev->pdev, | 152 | if (pci_dma_mapping_error(dev->pdev, pt_addr)) { |
156 | pt_addr)) { | 153 | ret = -EIO; |
157 | ret = -EIO; | 154 | goto err_pd_pin; |
158 | goto err_pd_pin; | ||
159 | 155 | ||
160 | } | ||
161 | ppgtt->pt_dma_addr[i] = pt_addr; | ||
162 | } | 156 | } |
157 | ppgtt->pt_dma_addr[i] = pt_addr; | ||
163 | } | 158 | } |
164 | 159 | ||
165 | ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma; | 160 | ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma; |
@@ -294,11 +289,7 @@ void i915_gem_init_ppgtt(struct drm_device *dev) | |||
294 | for (i = 0; i < ppgtt->num_pd_entries; i++) { | 289 | for (i = 0; i < ppgtt->num_pd_entries; i++) { |
295 | dma_addr_t pt_addr; | 290 | dma_addr_t pt_addr; |
296 | 291 | ||
297 | if (dev_priv->mm.gtt->needs_dmar) | 292 | pt_addr = ppgtt->pt_dma_addr[i]; |
298 | pt_addr = ppgtt->pt_dma_addr[i]; | ||
299 | else | ||
300 | pt_addr = page_to_phys(ppgtt->pt_pages[i]); | ||
301 | |||
302 | pd_entry = GEN6_PDE_ADDR_ENCODE(pt_addr); | 293 | pd_entry = GEN6_PDE_ADDR_ENCODE(pt_addr); |
303 | pd_entry |= GEN6_PDE_VALID; | 294 | pd_entry |= GEN6_PDE_VALID; |
304 | 295 | ||
@@ -730,16 +721,12 @@ int i915_gem_gtt_init(struct drm_device *dev) | |||
730 | return 0; | 721 | return 0; |
731 | } | 722 | } |
732 | 723 | ||
733 | dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL); | ||
734 | if (!dev_priv->mm.gtt) | ||
735 | return -ENOMEM; | ||
736 | |||
737 | if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40))) | 724 | if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40))) |
738 | pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40)); | 725 | pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40)); |
739 | 726 | ||
740 | #ifdef CONFIG_INTEL_IOMMU | 727 | dev_priv->mm.gtt = kzalloc(sizeof(*dev_priv->mm.gtt), GFP_KERNEL); |
741 | dev_priv->mm.gtt->needs_dmar = 1; | 728 | if (!dev_priv->mm.gtt) |
742 | #endif | 729 | return -ENOMEM; |
743 | 730 | ||
744 | /* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */ | 731 | /* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */ |
745 | gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20); | 732 | gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20); |
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h index c787ee4c4c07..984105cddc57 100644 --- a/include/drm/intel-gtt.h +++ b/include/drm/intel-gtt.h | |||
@@ -11,8 +11,6 @@ struct intel_gtt { | |||
11 | /* Part of the gtt that is mappable by the cpu, for those chips where | 11 | /* Part of the gtt that is mappable by the cpu, for those chips where |
12 | * this is not the full gtt. */ | 12 | * this is not the full gtt. */ |
13 | unsigned int gtt_mappable_entries; | 13 | unsigned int gtt_mappable_entries; |
14 | /* Whether i915 needs to use the dmar apis or not. */ | ||
15 | unsigned int needs_dmar : 1; | ||
16 | /* needed for ioremap in drm/i915 */ | 14 | /* needed for ioremap in drm/i915 */ |
17 | phys_addr_t gma_bus_addr; | 15 | phys_addr_t gma_bus_addr; |
18 | } *intel_gtt_get(void); | 16 | } *intel_gtt_get(void); |