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-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c66
1 files changed, 47 insertions, 19 deletions
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 0c7aee1682cd..edb9e59248ec 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -1,15 +1,4 @@
1/*********************************************************************** 1/*
2 *
3 * Copyright 2001 MontaVista Software Inc.
4 * Author: MontaVista Software, Inc.
5 * ahennessy@mvista.com
6 *
7 * Based on arch/mips/ddb5xxx/ddb5477/setup.c
8 *
9 * Setup file for JMR3927.
10 *
11 * Copyright (C) 2000-2001 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify it 2 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the 3 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your 4 * Free Software Foundation; either version 2 of the License, or (at your
@@ -30,9 +19,15 @@
30 * with this program; if not, write to the Free Software Foundation, Inc., 19 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 * 21 *
33 *********************************************************************** 22 * Copyright 2001 MontaVista Software Inc.
23 * Author: MontaVista Software, Inc.
24 * ahennessy@mvista.com
25 *
26 * Copyright (C) 2000-2001 Toshiba Corporation
27 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
34 */ 28 */
35 29
30#include <linux/clockchips.h>
36#include <linux/init.h> 31#include <linux/init.h>
37#include <linux/kernel.h> 32#include <linux/kernel.h>
38#include <linux/kdev_t.h> 33#include <linux/kdev_t.h>
@@ -104,27 +99,60 @@ static cycle_t jmr3927_hpt_read(void)
104 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; 99 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
105} 100}
106 101
107static void jmr3927_timer_ack(void) 102static void jmr3927_set_mode(enum clock_event_mode mode,
103 struct clock_event_device *evt)
104{
105 /* Nothing to do here */
106}
107
108struct clock_event_device jmr3927_clock_event_device = {
109 .name = "MIPS",
110 .features = CLOCK_EVT_FEAT_PERIODIC,
111 .shift = 32,
112 .rating = 300,
113 .cpumask = CPU_MASK_CPU0,
114 .irq = JMR3927_IRQ_TICK,
115 .set_mode = jmr3927_set_mode,
116};
117
118static irqreturn_t jmr3927_timer_interrupt(int irq, void *dev_id)
108{ 119{
120 struct clock_event_device *cd = &jmr3927_clock_event_device;
121
109 jmr3927_tmrptr->tisr = 0; /* ack interrupt */ 122 jmr3927_tmrptr->tisr = 0; /* ack interrupt */
123
124 cd->event_handler(cd);
125
126 return IRQ_HANDLED;
110} 127}
111 128
129static struct irqaction jmr3927_timer_irqaction = {
130 .handler = jmr3927_timer_interrupt,
131 .flags = IRQF_DISABLED | IRQF_PERCPU,
132 .name = "jmr3927-timer",
133};
134
112void __init plat_time_init(void) 135void __init plat_time_init(void)
113{ 136{
137 struct clock_event_device *cd;
138
114 clocksource_mips.read = jmr3927_hpt_read; 139 clocksource_mips.read = jmr3927_hpt_read;
115 mips_timer_ack = jmr3927_timer_ack;
116 mips_hpt_frequency = JMR3927_TIMER_CLK; 140 mips_hpt_frequency = JMR3927_TIMER_CLK;
117}
118 141
119void __init plat_timer_setup(struct irqaction *irq)
120{
121 jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ; 142 jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ;
122 jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE; 143 jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE;
123 jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD; 144 jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD;
124 jmr3927_tmrptr->tcr = 145 jmr3927_tmrptr->tcr =
125 TXx927_TMTCR_TCE | TXx927_TMTCR_CCDE | TXx927_TMTCR_TMODE_ITVL; 146 TXx927_TMTCR_TCE | TXx927_TMTCR_CCDE | TXx927_TMTCR_TMODE_ITVL;
126 147
127 setup_irq(JMR3927_IRQ_TICK, irq); 148 cd = &jmr3927_clock_event_device;
149 /* Calculate the min / max delta */
150 cd->mult = div_sc((unsigned long) JMR3927_IMCLK, NSEC_PER_SEC, 32);
151 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
152 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
153 clockevents_register_device(cd);
154
155 setup_irq(JMR3927_IRQ_TICK, &jmr3927_timer_irqaction);
128} 156}
129 157
130#define DO_WRITE_THROUGH 158#define DO_WRITE_THROUGH