diff options
-rw-r--r-- | drivers/mtd/nand/denali.c | 138 |
1 files changed, 61 insertions, 77 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 945943e6aab5..b3b7ca1bafb8 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c | |||
@@ -37,8 +37,8 @@ MODULE_LICENSE("GPL"); | |||
37 | 37 | ||
38 | static int onfi_timing_mode = NAND_DEFAULT_TIMINGS; | 38 | static int onfi_timing_mode = NAND_DEFAULT_TIMINGS; |
39 | module_param(onfi_timing_mode, int, S_IRUGO); | 39 | module_param(onfi_timing_mode, int, S_IRUGO); |
40 | MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting." | 40 | MODULE_PARM_DESC(onfi_timing_mode, |
41 | " -1 indicates use default timings"); | 41 | "Overrides default ONFI setting. -1 indicates use default timings"); |
42 | 42 | ||
43 | #define DENALI_NAND_NAME "denali-nand" | 43 | #define DENALI_NAND_NAME "denali-nand" |
44 | 44 | ||
@@ -162,8 +162,7 @@ static void read_status(struct denali_nand_info *denali) | |||
162 | static void reset_bank(struct denali_nand_info *denali) | 162 | static void reset_bank(struct denali_nand_info *denali) |
163 | { | 163 | { |
164 | uint32_t irq_status; | 164 | uint32_t irq_status; |
165 | uint32_t irq_mask = INTR_STATUS__RST_COMP | | 165 | uint32_t irq_mask = INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT; |
166 | INTR_STATUS__TIME_OUT; | ||
167 | 166 | ||
168 | clear_interrupts(denali); | 167 | clear_interrupts(denali); |
169 | 168 | ||
@@ -181,16 +180,15 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali) | |||
181 | int i; | 180 | int i; |
182 | 181 | ||
183 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", | 182 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", |
184 | __FILE__, __LINE__, __func__); | 183 | __FILE__, __LINE__, __func__); |
185 | 184 | ||
186 | for (i = 0 ; i < denali->max_banks; i++) | 185 | for (i = 0; i < denali->max_banks; i++) |
187 | iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, | 186 | iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, |
188 | denali->flash_reg + INTR_STATUS(i)); | 187 | denali->flash_reg + INTR_STATUS(i)); |
189 | 188 | ||
190 | for (i = 0 ; i < denali->max_banks; i++) { | 189 | for (i = 0; i < denali->max_banks; i++) { |
191 | iowrite32(1 << i, denali->flash_reg + DEVICE_RESET); | 190 | iowrite32(1 << i, denali->flash_reg + DEVICE_RESET); |
192 | while (!(ioread32(denali->flash_reg + | 191 | while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & |
193 | INTR_STATUS(i)) & | ||
194 | (INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT))) | 192 | (INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT))) |
195 | cpu_relax(); | 193 | cpu_relax(); |
196 | if (ioread32(denali->flash_reg + INTR_STATUS(i)) & | 194 | if (ioread32(denali->flash_reg + INTR_STATUS(i)) & |
@@ -201,7 +199,7 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali) | |||
201 | 199 | ||
202 | for (i = 0; i < denali->max_banks; i++) | 200 | for (i = 0; i < denali->max_banks; i++) |
203 | iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, | 201 | iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, |
204 | denali->flash_reg + INTR_STATUS(i)); | 202 | denali->flash_reg + INTR_STATUS(i)); |
205 | 203 | ||
206 | return PASS; | 204 | return PASS; |
207 | } | 205 | } |
@@ -235,7 +233,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali, | |||
235 | uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt; | 233 | uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt; |
236 | 234 | ||
237 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", | 235 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", |
238 | __FILE__, __LINE__, __func__); | 236 | __FILE__, __LINE__, __func__); |
239 | 237 | ||
240 | en_lo = CEIL_DIV(Trp[mode], CLK_X); | 238 | en_lo = CEIL_DIV(Trp[mode], CLK_X); |
241 | en_hi = CEIL_DIV(Treh[mode], CLK_X); | 239 | en_hi = CEIL_DIV(Treh[mode], CLK_X); |
@@ -255,9 +253,8 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali, | |||
255 | 253 | ||
256 | data_invalid_rloh = (en_lo + en_hi) * CLK_X + Trloh[mode]; | 254 | data_invalid_rloh = (en_lo + en_hi) * CLK_X + Trloh[mode]; |
257 | 255 | ||
258 | data_invalid = | 256 | data_invalid = data_invalid_rhoh < data_invalid_rloh ? |
259 | data_invalid_rhoh < | 257 | data_invalid_rhoh : data_invalid_rloh; |
260 | data_invalid_rloh ? data_invalid_rhoh : data_invalid_rloh; | ||
261 | 258 | ||
262 | dv_window = data_invalid - Trea[mode]; | 259 | dv_window = data_invalid - Trea[mode]; |
263 | 260 | ||
@@ -272,7 +269,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali, | |||
272 | 269 | ||
273 | if (data_invalid - acc_clks * CLK_X < 2) | 270 | if (data_invalid - acc_clks * CLK_X < 2) |
274 | dev_warn(denali->dev, "%s, Line %d: Warning!\n", | 271 | dev_warn(denali->dev, "%s, Line %d: Warning!\n", |
275 | __FILE__, __LINE__); | 272 | __FILE__, __LINE__); |
276 | 273 | ||
277 | addr_2_data = CEIL_DIV(Tadl[mode], CLK_X); | 274 | addr_2_data = CEIL_DIV(Tadl[mode], CLK_X); |
278 | re_2_we = CEIL_DIV(Trhw[mode], CLK_X); | 275 | re_2_we = CEIL_DIV(Trhw[mode], CLK_X); |
@@ -406,9 +403,9 @@ static void get_hynix_nand_para(struct denali_nand_info *denali, | |||
406 | break; | 403 | break; |
407 | default: | 404 | default: |
408 | dev_warn(denali->dev, | 405 | dev_warn(denali->dev, |
409 | "Spectra: Unknown Hynix NAND (Device ID: 0x%x)." | 406 | "Spectra: Unknown Hynix NAND (Device ID: 0x%x).\n" |
410 | "Will use default parameter values instead.\n", | 407 | "Will use default parameter values instead.\n", |
411 | device_id); | 408 | device_id); |
412 | } | 409 | } |
413 | } | 410 | } |
414 | 411 | ||
@@ -425,8 +422,7 @@ static void find_valid_banks(struct denali_nand_info *denali) | |||
425 | for (i = 0; i < denali->max_banks; i++) { | 422 | for (i = 0; i < denali->max_banks; i++) { |
426 | index_addr(denali, MODE_11 | (i << 24) | 0, 0x90); | 423 | index_addr(denali, MODE_11 | (i << 24) | 0, 0x90); |
427 | index_addr(denali, MODE_11 | (i << 24) | 1, 0); | 424 | index_addr(denali, MODE_11 | (i << 24) | 1, 0); |
428 | index_addr_read_data(denali, | 425 | index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]); |
429 | MODE_11 | (i << 24) | 2, &id[i]); | ||
430 | 426 | ||
431 | dev_dbg(denali->dev, | 427 | dev_dbg(denali->dev, |
432 | "Return 1st ID for bank[%d]: %x\n", i, id[i]); | 428 | "Return 1st ID for bank[%d]: %x\n", i, id[i]); |
@@ -450,8 +446,7 @@ static void find_valid_banks(struct denali_nand_info *denali) | |||
450 | */ | 446 | */ |
451 | if (denali->total_used_banks != 1) { | 447 | if (denali->total_used_banks != 1) { |
452 | dev_err(denali->dev, | 448 | dev_err(denali->dev, |
453 | "Sorry, Intel CE4100 only supports " | 449 | "Sorry, Intel CE4100 only supports a single NAND device.\n"); |
454 | "a single NAND device.\n"); | ||
455 | BUG(); | 450 | BUG(); |
456 | } | 451 | } |
457 | } | 452 | } |
@@ -489,10 +484,12 @@ static void detect_partition_feature(struct denali_nand_info *denali) | |||
489 | + | 484 | + |
490 | (ioread32(denali->flash_reg + MIN_BLK_ADDR(1)) & | 485 | (ioread32(denali->flash_reg + MIN_BLK_ADDR(1)) & |
491 | MIN_BLK_ADDR__VALUE); | 486 | MIN_BLK_ADDR__VALUE); |
492 | } else | 487 | } else { |
493 | denali->fwblks = SPECTRA_START_BLOCK; | 488 | denali->fwblks = SPECTRA_START_BLOCK; |
494 | } else | 489 | } |
490 | } else { | ||
495 | denali->fwblks = SPECTRA_START_BLOCK; | 491 | denali->fwblks = SPECTRA_START_BLOCK; |
492 | } | ||
496 | } | 493 | } |
497 | 494 | ||
498 | static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) | 495 | static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) |
@@ -502,8 +499,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) | |||
502 | uint8_t maf_id, device_id; | 499 | uint8_t maf_id, device_id; |
503 | int i; | 500 | int i; |
504 | 501 | ||
505 | dev_dbg(denali->dev, | 502 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", |
506 | "%s, Line %d, Function: %s\n", | ||
507 | __FILE__, __LINE__, __func__); | 503 | __FILE__, __LINE__, __func__); |
508 | 504 | ||
509 | /* | 505 | /* |
@@ -532,7 +528,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) | |||
532 | } | 528 | } |
533 | 529 | ||
534 | dev_info(denali->dev, | 530 | dev_info(denali->dev, |
535 | "Dump timing register values:" | 531 | "Dump timing register values:\n" |
536 | "acc_clks: %d, re_2_we: %d, re_2_re: %d\n" | 532 | "acc_clks: %d, re_2_we: %d, re_2_re: %d\n" |
537 | "we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n" | 533 | "we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n" |
538 | "rdwr_en_hi_cnt: %d, cs_setup_cnt: %d\n", | 534 | "rdwr_en_hi_cnt: %d, cs_setup_cnt: %d\n", |
@@ -563,7 +559,7 @@ static void denali_set_intr_modes(struct denali_nand_info *denali, | |||
563 | uint16_t INT_ENABLE) | 559 | uint16_t INT_ENABLE) |
564 | { | 560 | { |
565 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", | 561 | dev_dbg(denali->dev, "%s, Line %d, Function: %s\n", |
566 | __FILE__, __LINE__, __func__); | 562 | __FILE__, __LINE__, __func__); |
567 | 563 | ||
568 | if (INT_ENABLE) | 564 | if (INT_ENABLE) |
569 | iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE); | 565 | iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE); |
@@ -710,13 +706,13 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) | |||
710 | spin_unlock_irq(&denali->irq_lock); | 706 | spin_unlock_irq(&denali->irq_lock); |
711 | /* our interrupt was detected */ | 707 | /* our interrupt was detected */ |
712 | break; | 708 | break; |
713 | } else { | ||
714 | /* | ||
715 | * these are not the interrupts you are looking for - | ||
716 | * need to wait again | ||
717 | */ | ||
718 | spin_unlock_irq(&denali->irq_lock); | ||
719 | } | 709 | } |
710 | |||
711 | /* | ||
712 | * these are not the interrupts you are looking for - | ||
713 | * need to wait again | ||
714 | */ | ||
715 | spin_unlock_irq(&denali->irq_lock); | ||
720 | } while (comp_res != 0); | 716 | } while (comp_res != 0); |
721 | 717 | ||
722 | if (comp_res == 0) { | 718 | if (comp_res == 0) { |
@@ -744,8 +740,7 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, | |||
744 | 740 | ||
745 | /* Enable spare area/ECC per user's request. */ | 741 | /* Enable spare area/ECC per user's request. */ |
746 | iowrite32(ecc_en_flag, denali->flash_reg + ECC_ENABLE); | 742 | iowrite32(ecc_en_flag, denali->flash_reg + ECC_ENABLE); |
747 | iowrite32(transfer_spare_flag, | 743 | iowrite32(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG); |
748 | denali->flash_reg + TRANSFER_SPARE_REG); | ||
749 | } | 744 | } |
750 | 745 | ||
751 | /* | 746 | /* |
@@ -753,10 +748,8 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, | |||
753 | * controller's user guide for more information (section 4.2.3.6). | 748 | * controller's user guide for more information (section 4.2.3.6). |
754 | */ | 749 | */ |
755 | static int denali_send_pipeline_cmd(struct denali_nand_info *denali, | 750 | static int denali_send_pipeline_cmd(struct denali_nand_info *denali, |
756 | bool ecc_en, | 751 | bool ecc_en, bool transfer_spare, |
757 | bool transfer_spare, | 752 | int access_type, int op) |
758 | int access_type, | ||
759 | int op) | ||
760 | { | 753 | { |
761 | int status = PASS; | 754 | int status = PASS; |
762 | uint32_t page_count = 1; | 755 | uint32_t page_count = 1; |
@@ -811,9 +804,8 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, | |||
811 | 804 | ||
812 | if (irq_status == 0) { | 805 | if (irq_status == 0) { |
813 | dev_err(denali->dev, | 806 | dev_err(denali->dev, |
814 | "cmd, page, addr on timeout " | 807 | "cmd, page, addr on timeout (0x%x, 0x%x, 0x%x)\n", |
815 | "(0x%x, 0x%x, 0x%x)\n", | 808 | cmd, denali->page, addr); |
816 | cmd, denali->page, addr); | ||
817 | status = FAIL; | 809 | status = FAIL; |
818 | } else { | 810 | } else { |
819 | cmd = MODE_01 | addr; | 811 | cmd = MODE_01 | addr; |
@@ -826,8 +818,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, | |||
826 | 818 | ||
827 | /* helper function that simply writes a buffer to the flash */ | 819 | /* helper function that simply writes a buffer to the flash */ |
828 | static int write_data_to_flash_mem(struct denali_nand_info *denali, | 820 | static int write_data_to_flash_mem(struct denali_nand_info *denali, |
829 | const uint8_t *buf, | 821 | const uint8_t *buf, int len) |
830 | int len) | ||
831 | { | 822 | { |
832 | uint32_t *buf32; | 823 | uint32_t *buf32; |
833 | int i; | 824 | int i; |
@@ -842,13 +833,12 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali, | |||
842 | buf32 = (uint32_t *)buf; | 833 | buf32 = (uint32_t *)buf; |
843 | for (i = 0; i < len / 4; i++) | 834 | for (i = 0; i < len / 4; i++) |
844 | iowrite32(*buf32++, denali->flash_mem + 0x10); | 835 | iowrite32(*buf32++, denali->flash_mem + 0x10); |
845 | return i*4; /* intent is to return the number of bytes read */ | 836 | return i * 4; /* intent is to return the number of bytes read */ |
846 | } | 837 | } |
847 | 838 | ||
848 | /* helper function that simply reads a buffer from the flash */ | 839 | /* helper function that simply reads a buffer from the flash */ |
849 | static int read_data_from_flash_mem(struct denali_nand_info *denali, | 840 | static int read_data_from_flash_mem(struct denali_nand_info *denali, |
850 | uint8_t *buf, | 841 | uint8_t *buf, int len) |
851 | int len) | ||
852 | { | 842 | { |
853 | uint32_t *buf32; | 843 | uint32_t *buf32; |
854 | int i; | 844 | int i; |
@@ -865,7 +855,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali, | |||
865 | buf32 = (uint32_t *)buf; | 855 | buf32 = (uint32_t *)buf; |
866 | for (i = 0; i < len / 4; i++) | 856 | for (i = 0; i < len / 4; i++) |
867 | *buf32++ = ioread32(denali->flash_mem + 0x10); | 857 | *buf32++ = ioread32(denali->flash_mem + 0x10); |
868 | return i*4; /* intent is to return the number of bytes read */ | 858 | return i * 4; /* intent is to return the number of bytes read */ |
869 | } | 859 | } |
870 | 860 | ||
871 | /* writes OOB data to the device */ | 861 | /* writes OOB data to the device */ |
@@ -941,6 +931,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) | |||
941 | static bool is_erased(uint8_t *buf, int len) | 931 | static bool is_erased(uint8_t *buf, int len) |
942 | { | 932 | { |
943 | int i; | 933 | int i; |
934 | |||
944 | for (i = 0; i < len; i++) | 935 | for (i = 0; i < len; i++) |
945 | if (buf[i] != 0xFF) | 936 | if (buf[i] != 0xFF) |
946 | return false; | 937 | return false; |
@@ -990,6 +981,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, | |||
990 | */ | 981 | */ |
991 | if (err_byte < ECC_SECTOR_SIZE) { | 982 | if (err_byte < ECC_SECTOR_SIZE) { |
992 | int offset; | 983 | int offset; |
984 | |||
993 | offset = (err_sector * | 985 | offset = (err_sector * |
994 | ECC_SECTOR_SIZE + | 986 | ECC_SECTOR_SIZE + |
995 | err_byte) * | 987 | err_byte) * |
@@ -1063,10 +1055,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip, | |||
1063 | const uint8_t *buf, bool raw_xfer) | 1055 | const uint8_t *buf, bool raw_xfer) |
1064 | { | 1056 | { |
1065 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1057 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1066 | |||
1067 | dma_addr_t addr = denali->buf.dma_buf; | 1058 | dma_addr_t addr = denali->buf.dma_buf; |
1068 | size_t size = denali->mtd.writesize + denali->mtd.oobsize; | 1059 | size_t size = denali->mtd.writesize + denali->mtd.oobsize; |
1069 | |||
1070 | uint32_t irq_status; | 1060 | uint32_t irq_status; |
1071 | uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP | | 1061 | uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP | |
1072 | INTR_STATUS__PROGRAM_FAIL; | 1062 | INTR_STATUS__PROGRAM_FAIL; |
@@ -1099,9 +1089,8 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip, | |||
1099 | irq_status = wait_for_irq(denali, irq_mask); | 1089 | irq_status = wait_for_irq(denali, irq_mask); |
1100 | 1090 | ||
1101 | if (irq_status == 0) { | 1091 | if (irq_status == 0) { |
1102 | dev_err(denali->dev, | 1092 | dev_err(denali->dev, "timeout on write_page (type = %d)\n", |
1103 | "timeout on write_page (type = %d)\n", | 1093 | raw_xfer); |
1104 | raw_xfer); | ||
1105 | denali->status = NAND_STATUS_FAIL; | 1094 | denali->status = NAND_STATUS_FAIL; |
1106 | } | 1095 | } |
1107 | 1096 | ||
@@ -1172,9 +1161,9 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, | |||
1172 | bool check_erased_page = false; | 1161 | bool check_erased_page = false; |
1173 | 1162 | ||
1174 | if (page != denali->page) { | 1163 | if (page != denali->page) { |
1175 | dev_err(denali->dev, "IN %s: page %d is not" | 1164 | dev_err(denali->dev, |
1176 | " equal to denali->page %d, investigate!!", | 1165 | "IN %s: page %d is not equal to denali->page %d", |
1177 | __func__, page, denali->page); | 1166 | __func__, page, denali->page); |
1178 | BUG(); | 1167 | BUG(); |
1179 | } | 1168 | } |
1180 | 1169 | ||
@@ -1214,16 +1203,14 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, | |||
1214 | uint8_t *buf, int oob_required, int page) | 1203 | uint8_t *buf, int oob_required, int page) |
1215 | { | 1204 | { |
1216 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1205 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1217 | |||
1218 | dma_addr_t addr = denali->buf.dma_buf; | 1206 | dma_addr_t addr = denali->buf.dma_buf; |
1219 | size_t size = denali->mtd.writesize + denali->mtd.oobsize; | 1207 | size_t size = denali->mtd.writesize + denali->mtd.oobsize; |
1220 | |||
1221 | uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP; | 1208 | uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP; |
1222 | 1209 | ||
1223 | if (page != denali->page) { | 1210 | if (page != denali->page) { |
1224 | dev_err(denali->dev, "IN %s: page %d is not" | 1211 | dev_err(denali->dev, |
1225 | " equal to denali->page %d, investigate!!", | 1212 | "IN %s: page %d is not equal to denali->page %d", |
1226 | __func__, page, denali->page); | 1213 | __func__, page, denali->page); |
1227 | BUG(); | 1214 | BUG(); |
1228 | } | 1215 | } |
1229 | 1216 | ||
@@ -1272,6 +1259,7 @@ static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip) | |||
1272 | { | 1259 | { |
1273 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1260 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1274 | int status = denali->status; | 1261 | int status = denali->status; |
1262 | |||
1275 | denali->status = 0; | 1263 | denali->status = 0; |
1276 | 1264 | ||
1277 | return status; | 1265 | return status; |
@@ -1321,9 +1309,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, | |||
1321 | index_addr(denali, addr | 0, 0x90); | 1309 | index_addr(denali, addr | 0, 0x90); |
1322 | index_addr(denali, addr | 1, 0); | 1310 | index_addr(denali, addr | 1, 0); |
1323 | for (i = 0; i < 8; i++) { | 1311 | for (i = 0; i < 8; i++) { |
1324 | index_addr_read_data(denali, | 1312 | index_addr_read_data(denali, addr | 2, &id); |
1325 | addr | 2, | ||
1326 | &id); | ||
1327 | write_byte_to_buf(denali, id); | 1313 | write_byte_to_buf(denali, id); |
1328 | } | 1314 | } |
1329 | break; | 1315 | break; |
@@ -1348,8 +1334,8 @@ static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data, | |||
1348 | uint8_t *ecc_code) | 1334 | uint8_t *ecc_code) |
1349 | { | 1335 | { |
1350 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1336 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1351 | dev_err(denali->dev, | 1337 | |
1352 | "denali_ecc_calculate called unexpectedly\n"); | 1338 | dev_err(denali->dev, "denali_ecc_calculate called unexpectedly\n"); |
1353 | BUG(); | 1339 | BUG(); |
1354 | return -EIO; | 1340 | return -EIO; |
1355 | } | 1341 | } |
@@ -1358,8 +1344,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data, | |||
1358 | uint8_t *read_ecc, uint8_t *calc_ecc) | 1344 | uint8_t *read_ecc, uint8_t *calc_ecc) |
1359 | { | 1345 | { |
1360 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1346 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1361 | dev_err(denali->dev, | 1347 | |
1362 | "denali_ecc_correct called unexpectedly\n"); | 1348 | dev_err(denali->dev, "denali_ecc_correct called unexpectedly\n"); |
1363 | BUG(); | 1349 | BUG(); |
1364 | return -EIO; | 1350 | return -EIO; |
1365 | } | 1351 | } |
@@ -1367,8 +1353,8 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data, | |||
1367 | static void denali_ecc_hwctl(struct mtd_info *mtd, int mode) | 1353 | static void denali_ecc_hwctl(struct mtd_info *mtd, int mode) |
1368 | { | 1354 | { |
1369 | struct denali_nand_info *denali = mtd_to_denali(mtd); | 1355 | struct denali_nand_info *denali = mtd_to_denali(mtd); |
1370 | dev_err(denali->dev, | 1356 | |
1371 | "denali_ecc_hwctl called unexpectedly\n"); | 1357 | dev_err(denali->dev, "denali_ecc_hwctl called unexpectedly\n"); |
1372 | BUG(); | 1358 | BUG(); |
1373 | } | 1359 | } |
1374 | /* end NAND core entry points */ | 1360 | /* end NAND core entry points */ |
@@ -1596,8 +1582,7 @@ int denali_init(struct denali_nand_info *denali) | |||
1596 | } else if (denali->mtd.oobsize < (denali->bbtskipbytes + | 1582 | } else if (denali->mtd.oobsize < (denali->bbtskipbytes + |
1597 | ECC_8BITS * (denali->mtd.writesize / | 1583 | ECC_8BITS * (denali->mtd.writesize / |
1598 | ECC_SECTOR_SIZE))) { | 1584 | ECC_SECTOR_SIZE))) { |
1599 | pr_err("Your NAND chip OOB is not large enough to \ | 1585 | pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes"); |
1600 | contain 8bit ECC correction codes"); | ||
1601 | goto failed_req_irq; | 1586 | goto failed_req_irq; |
1602 | } else { | 1587 | } else { |
1603 | denali->nand.ecc.strength = 8; | 1588 | denali->nand.ecc.strength = 8; |
@@ -1621,8 +1606,7 @@ int denali_init(struct denali_nand_info *denali) | |||
1621 | * contained by each nand chip. blksperchip will help driver to | 1606 | * contained by each nand chip. blksperchip will help driver to |
1622 | * know how many blocks is taken by FW. | 1607 | * know how many blocks is taken by FW. |
1623 | */ | 1608 | */ |
1624 | denali->totalblks = denali->mtd.size >> | 1609 | denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift; |
1625 | denali->nand.phys_erase_shift; | ||
1626 | denali->blksperchip = denali->totalblks / denali->nand.numchips; | 1610 | denali->blksperchip = denali->totalblks / denali->nand.numchips; |
1627 | 1611 | ||
1628 | /* | 1612 | /* |
@@ -1669,7 +1653,7 @@ void denali_remove(struct denali_nand_info *denali) | |||
1669 | { | 1653 | { |
1670 | denali_irq_cleanup(denali->irq, denali); | 1654 | denali_irq_cleanup(denali->irq, denali); |
1671 | dma_unmap_single(denali->dev, denali->buf.dma_buf, | 1655 | dma_unmap_single(denali->dev, denali->buf.dma_buf, |
1672 | denali->mtd.writesize + denali->mtd.oobsize, | 1656 | denali->mtd.writesize + denali->mtd.oobsize, |
1673 | DMA_BIDIRECTIONAL); | 1657 | DMA_BIDIRECTIONAL); |
1674 | } | 1658 | } |
1675 | EXPORT_SYMBOL(denali_remove); | 1659 | EXPORT_SYMBOL(denali_remove); |