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-rw-r--r--Documentation/feature-removal-schedule.txt12
-rw-r--r--arch/alpha/kernel/pci.c40
-rw-r--r--arch/arm/common/it8152.c9
-rw-r--r--arch/arm/common/via82c505.c3
-rw-r--r--arch/arm/include/asm/mach/pci.h2
-rw-r--r--arch/arm/include/asm/pci.h12
-rw-r--r--arch/arm/kernel/bios32.c34
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c8
-rw-r--r--arch/arm/mach-dove/pcie.c9
-rw-r--r--arch/arm/mach-footbridge/dc21285.c8
-rw-r--r--arch/arm/mach-integrator/pci_v3.c19
-rw-r--r--arch/arm/mach-iop13xx/pci.c17
-rw-r--r--arch/arm/mach-ixp2000/enp2611.c3
-rw-r--r--arch/arm/mach-ixp2000/pci.c8
-rw-r--r--arch/arm/mach-ixp23xx/pci.c8
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c8
-rw-r--r--arch/arm/mach-kirkwood/pcie.c8
-rw-r--r--arch/arm/mach-ks8695/pci.c8
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c8
-rw-r--r--arch/arm/mach-orion5x/pci.c16
-rw-r--r--arch/arm/mach-sa1100/pci-nanoengine.c13
-rw-r--r--arch/arm/mach-tegra/pcie.c9
-rw-r--r--arch/arm/mach-versatile/pci.c19
-rw-r--r--arch/arm/plat-iop/pci.c8
-rw-r--r--arch/blackfin/include/asm/pci.h4
-rw-r--r--arch/frv/mb93090-mb00/pci-frv.c20
-rw-r--r--arch/frv/mb93090-mb00/pci-frv.h2
-rw-r--r--arch/frv/mb93090-mb00/pci-vdk.c11
-rw-r--r--arch/h8300/include/asm/pci.h5
-rw-r--r--arch/ia64/include/asm/pci.h6
-rw-r--r--arch/ia64/pci/pci.c43
-rw-r--r--arch/microblaze/include/asm/pci-bridge.h1
-rw-r--r--arch/microblaze/include/asm/pci.h5
-rw-r--r--arch/microblaze/pci/pci-common.c43
-rw-r--r--arch/mips/pci/pci.c38
-rw-r--r--arch/mn10300/unit-asb2305/pci-asb2305.c22
-rw-r--r--arch/mn10300/unit-asb2305/pci-asb2305.h2
-rw-r--r--arch/mn10300/unit-asb2305/pci.c12
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h1
-rw-r--r--arch/powerpc/include/asm/pci.h5
-rw-r--r--arch/powerpc/kernel/pci-common.c30
-rw-r--r--arch/powerpc/kernel/pci_64.c40
-rw-r--r--arch/sh/drivers/pci/pci.c41
-rw-r--r--arch/sparc/include/asm/pci_32.h5
-rw-r--r--arch/sparc/include/asm/pci_64.h5
-rw-r--r--arch/sparc/kernel/leon_pci.c25
-rw-r--r--arch/sparc/kernel/pci.c22
-rw-r--r--arch/tile/include/asm/pci.h7
-rw-r--r--arch/tile/kernel/pci.c5
-rw-r--r--arch/unicore32/include/asm/pci.h5
-rw-r--r--arch/unicore32/kernel/pci.c5
-rw-r--r--arch/x86/include/asm/amd_nb.h2
-rw-r--r--arch/x86/include/asm/pci.h9
-rw-r--r--arch/x86/include/asm/pci_x86.h2
-rw-r--r--arch/x86/include/asm/topology.h2
-rw-r--r--arch/x86/include/asm/x86_init.h1
-rw-r--r--arch/x86/kernel/amd_nb.c31
-rw-r--r--arch/x86/kernel/x86_init.c1
-rw-r--r--arch/x86/pci/acpi.c75
-rw-r--r--arch/x86/pci/amd_bus.c43
-rw-r--r--arch/x86/pci/broadcom_bus.c62
-rw-r--r--arch/x86/pci/bus_numa.c31
-rw-r--r--arch/x86/pci/common.c19
-rw-r--r--arch/x86/pci/i386.c20
-rw-r--r--arch/x86/pci/legacy.c3
-rw-r--r--arch/x86/pci/numaq_32.c2
-rw-r--r--arch/xtensa/include/asm/pci.h5
-rw-r--r--arch/xtensa/kernel/pci.c90
-rw-r--r--drivers/acpi/pci_irq.c10
-rw-r--r--drivers/parisc/dino.c47
-rw-r--r--drivers/parisc/lba_pci.c72
-rw-r--r--drivers/pci/access.c76
-rw-r--r--drivers/pci/ats.c17
-rw-r--r--drivers/pci/bus.c32
-rw-r--r--drivers/pci/iov.c16
-rw-r--r--drivers/pci/msi.c43
-rw-r--r--drivers/pci/pci-driver.c3
-rw-r--r--drivers/pci/pci.c153
-rw-r--r--drivers/pci/pci.h10
-rw-r--r--drivers/pci/pcie/Kconfig2
-rw-r--r--drivers/pci/probe.c68
-rw-r--r--drivers/pci/remove.c10
-rw-r--r--drivers/pci/setup-res.c6
-rw-r--r--drivers/pnp/quirks.c42
-rw-r--r--drivers/scsi/ipr.c67
-rw-r--r--drivers/scsi/ipr.h1
-rw-r--r--drivers/uio/uio_pci_generic.c78
-rw-r--r--include/linux/pci.h50
-rw-r--r--include/linux/pci_ids.h23
-rw-r--r--include/linux/pci_regs.h2
-rw-r--r--lib/devres.c6
91 files changed, 1125 insertions, 806 deletions
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 5575759b84ee..d49c2ec72d12 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -544,3 +544,15 @@ When: 3.5
544Why: The iwlagn module has been renamed iwlwifi. The alias will be around 544Why: The iwlagn module has been renamed iwlwifi. The alias will be around
545 for backward compatibility for several cycles and then dropped. 545 for backward compatibility for several cycles and then dropped.
546Who: Don Fry <donald.h.fry@intel.com> 546Who: Don Fry <donald.h.fry@intel.com>
547
548----------------------------
549
550What: pci_scan_bus_parented()
551When: 3.5
552Why: The pci_scan_bus_parented() interface creates a new root bus. The
553 bus is created with default resources (ioport_resource and
554 iomem_resource) that are always wrong, so we rely on arch code to
555 correct them later. Callers of pci_scan_bus_parented() should
556 convert to using pci_scan_root_bus() so they can supply a list of
557 bus resources when the bus is created.
558Who: Bjorn Helgaas <bhelgaas@google.com>
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index f3cae275d3f5..8c723c1b086a 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
281void __devinit 281void __devinit
282pcibios_fixup_bus(struct pci_bus *bus) 282pcibios_fixup_bus(struct pci_bus *bus)
283{ 283{
284 /* Propagate hose info into the subordinate devices. */
285
286 struct pci_controller *hose = bus->sysdata;
287 struct pci_dev *dev = bus->self; 284 struct pci_dev *dev = bus->self;
288 285
289 if (!dev) { 286 if (pci_probe_only && dev &&
290 /* Root bus. */
291 u32 pci_mem_end;
292 u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
293 unsigned long end;
294
295 bus->resource[0] = hose->io_space;
296 bus->resource[1] = hose->mem_space;
297
298 /* Adjust hose mem_space limit to prevent PCI allocations
299 in the iommu windows. */
300 pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
301 end = hose->mem_space->start + pci_mem_end;
302 if (hose->mem_space->end > end)
303 hose->mem_space->end = end;
304 } else if (pci_probe_only &&
305 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { 287 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
306 pci_read_bridge_bases(bus); 288 pci_read_bridge_bases(bus);
307 pcibios_fixup_device_resources(dev, bus); 289 pcibios_fixup_device_resources(dev, bus);
@@ -414,13 +396,31 @@ void __init
414common_init_pci(void) 396common_init_pci(void)
415{ 397{
416 struct pci_controller *hose; 398 struct pci_controller *hose;
399 struct list_head resources;
417 struct pci_bus *bus; 400 struct pci_bus *bus;
418 int next_busno; 401 int next_busno;
419 int need_domain_info = 0; 402 int need_domain_info = 0;
403 u32 pci_mem_end;
404 u32 sg_base;
405 unsigned long end;
420 406
421 /* Scan all of the recorded PCI controllers. */ 407 /* Scan all of the recorded PCI controllers. */
422 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 408 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
423 bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose); 409 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
410
411 /* Adjust hose mem_space limit to prevent PCI allocations
412 in the iommu windows. */
413 pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
414 end = hose->mem_space->start + pci_mem_end;
415 if (hose->mem_space->end > end)
416 hose->mem_space->end = end;
417
418 INIT_LIST_HEAD(&resources);
419 pci_add_resource(&resources, hose->io_space);
420 pci_add_resource(&resources, hose->mem_space);
421
422 bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
423 hose, &resources);
424 hose->bus = bus; 424 hose->bus = bus;
425 hose->need_domain_info = need_domain_info; 425 hose->need_domain_info = need_domain_info;
426 next_busno = bus->subordinate + 1; 426 next_busno = bus->subordinate + 1;
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index b539ec855e1a..d1bcd7b13ebc 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
299 goto err1; 299 goto err1;
300 } 300 }
301 301
302 sys->resource[0] = &it8152_io; 302 pci_add_resource(&sys->resources, &it8152_io);
303 sys->resource[1] = &it8152_mem; 303 pci_add_resource(&sys->resources, &it8152_mem);
304 304
305 if (platform_notify || platform_notify_remove) { 305 if (platform_notify || platform_notify_remove) {
306 printk(KERN_ERR "PCI: Can't use platform_notify\n"); 306 printk(KERN_ERR "PCI: Can't use platform_notify\n");
@@ -327,6 +327,9 @@ err0:
327 */ 327 */
328unsigned int pcibios_max_latency = 255; 328unsigned int pcibios_max_latency = 255;
329 329
330/* ITE bridge requires setting latency timer to avoid early bus access
331 termination by PCI bus master devices
332*/
330void pcibios_set_master(struct pci_dev *dev) 333void pcibios_set_master(struct pci_dev *dev)
331{ 334{
332 u8 lat; 335 u8 lat;
@@ -352,7 +355,7 @@ void pcibios_set_master(struct pci_dev *dev)
352 355
353struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys) 356struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)
354{ 357{
355 return pci_scan_bus(nr, &it8152_ops, sys); 358 return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources);
356} 359}
357 360
358EXPORT_SYMBOL(dma_set_coherent_mask); 361EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c
index 8421d39109b3..67dd2affc57a 100644
--- a/arch/arm/common/via82c505.c
+++ b/arch/arm/common/via82c505.c
@@ -86,7 +86,8 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys)
86struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata) 86struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)
87{ 87{
88 if (nr == 0) 88 if (nr == 0)
89 return pci_scan_bus(0, &via82c505_ops, sysdata); 89 return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata,
90 &sysdata->resources);
90 91
91 return NULL; 92 return NULL;
92} 93}
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 186efd4e05c9..d943b7d20f11 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -40,7 +40,7 @@ struct pci_sys_data {
40 u64 mem_offset; /* bus->cpu memory mapping offset */ 40 u64 mem_offset; /* bus->cpu memory mapping offset */
41 unsigned long io_offset; /* bus->cpu IO mapping offset */ 41 unsigned long io_offset; /* bus->cpu IO mapping offset */
42 struct pci_bus *bus; /* PCI bus */ 42 struct pci_bus *bus; /* PCI bus */
43 struct resource *resource[3]; /* Primary PCI bus resources */ 43 struct list_head resources; /* root bus resources (apertures) */
44 /* Bridge swizzling */ 44 /* Bridge swizzling */
45 u8 (*swizzle)(struct pci_dev *, u8 *); 45 u8 (*swizzle)(struct pci_dev *, u8 *);
46 /* IRQ mapping */ 46 /* IRQ mapping */
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 2b1f245db0c6..da337ba57ffd 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -31,18 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
31} 31}
32#endif /* CONFIG_PCI_DOMAINS */ 32#endif /* CONFIG_PCI_DOMAINS */
33 33
34#ifdef CONFIG_PCI_HOST_ITE8152
35/* ITE bridge requires setting latency timer to avoid early bus access
36 termination by PIC bus mater devices
37*/
38extern void pcibios_set_master(struct pci_dev *dev);
39#else
40static inline void pcibios_set_master(struct pci_dev *dev)
41{
42 /* No special bus mastering setup handling */
43}
44#endif
45
46static inline void pcibios_penalize_isa_irq(int irq, int active) 34static inline void pcibios_penalize_isa_irq(int irq, int active)
47{ 35{
48 /* We don't do dynamic PCI IRQ allocation */ 36 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index b530e9116a0c..f58ba3589908 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -316,21 +316,6 @@ pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
316 } 316 }
317} 317}
318 318
319static void __devinit
320pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root)
321{
322 struct pci_dev *dev = bus->self;
323 int i;
324
325 if (!dev) {
326 /*
327 * Assign root bus resources.
328 */
329 for (i = 0; i < 3; i++)
330 bus->resource[i] = root->resource[i];
331 }
332}
333
334/* 319/*
335 * pcibios_fixup_bus - Called after each bus is probed, 320 * pcibios_fixup_bus - Called after each bus is probed,
336 * but before its children are examined. 321 * but before its children are examined.
@@ -341,8 +326,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
341 struct pci_dev *dev; 326 struct pci_dev *dev;
342 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK; 327 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
343 328
344 pbus_assign_bus_resources(bus, root);
345
346 /* 329 /*
347 * Walk the devices on this bus, working out what we can 330 * Walk the devices on this bus, working out what we can
348 * and can't support. 331 * and can't support.
@@ -508,12 +491,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
508 sys->busnr = busnr; 491 sys->busnr = busnr;
509 sys->swizzle = hw->swizzle; 492 sys->swizzle = hw->swizzle;
510 sys->map_irq = hw->map_irq; 493 sys->map_irq = hw->map_irq;
511 sys->resource[0] = &ioport_resource; 494 INIT_LIST_HEAD(&sys->resources);
512 sys->resource[1] = &iomem_resource;
513 495
514 ret = hw->setup(nr, sys); 496 ret = hw->setup(nr, sys);
515 497
516 if (ret > 0) { 498 if (ret > 0) {
499 if (list_empty(&sys->resources)) {
500 pci_add_resource(&sys->resources,
501 &ioport_resource);
502 pci_add_resource(&sys->resources,
503 &iomem_resource);
504 }
505
517 sys->bus = hw->scan(nr, sys); 506 sys->bus = hw->scan(nr, sys);
518 507
519 if (!sys->bus) 508 if (!sys->bus)
@@ -571,6 +560,13 @@ void __init pci_common_init(struct hw_pci *hw)
571 } 560 }
572} 561}
573 562
563#ifndef CONFIG_PCI_HOST_ITE8152
564void pcibios_set_master(struct pci_dev *dev)
565{
566 /* No special bus mastering setup handling */
567}
568#endif
569
574char * __init pcibios_setup(char *str) 570char * __init pcibios_setup(char *str)
575{ 571{
576 if (!strcmp(str, "debug")) { 572 if (!strcmp(str, "debug")) {
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 0f8fca48a5ed..e159d69967c9 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -151,13 +151,12 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys)
151 struct cns3xxx_pcie *cnspci = sysdata_to_cnspci(sys); 151 struct cns3xxx_pcie *cnspci = sysdata_to_cnspci(sys);
152 struct resource *res_io = &cnspci->res_io; 152 struct resource *res_io = &cnspci->res_io;
153 struct resource *res_mem = &cnspci->res_mem; 153 struct resource *res_mem = &cnspci->res_mem;
154 struct resource **sysres = sys->resource;
155 154
156 BUG_ON(request_resource(&iomem_resource, res_io) || 155 BUG_ON(request_resource(&iomem_resource, res_io) ||
157 request_resource(&iomem_resource, res_mem)); 156 request_resource(&iomem_resource, res_mem));
158 157
159 sysres[0] = res_io; 158 pci_add_resource(&sys->resources, res_io);
160 sysres[1] = res_mem; 159 pci_add_resource(&sys->resources, res_mem);
161 160
162 return 1; 161 return 1;
163} 162}
@@ -169,7 +168,8 @@ static struct pci_ops cns3xxx_pcie_ops = {
169 168
170static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys) 169static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys)
171{ 170{
172 return pci_scan_bus(sys->busnr, &cns3xxx_pcie_ops, sys); 171 return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys,
172 &sys->resources);
173} 173}
174 174
175static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 175static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 6c11a4df7178..52e96d397ba8 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
69 pp->res[0].flags = IORESOURCE_IO; 69 pp->res[0].flags = IORESOURCE_IO;
70 if (request_resource(&ioport_resource, &pp->res[0])) 70 if (request_resource(&ioport_resource, &pp->res[0]))
71 panic("Request PCIe IO resource failed\n"); 71 panic("Request PCIe IO resource failed\n");
72 sys->resource[0] = &pp->res[0]; 72 pci_add_resource(&sys->resources, &pp->res[0]);
73 73
74 /* 74 /*
75 * IORESOURCE_MEM 75 * IORESOURCE_MEM
@@ -88,9 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
88 pp->res[1].flags = IORESOURCE_MEM; 88 pp->res[1].flags = IORESOURCE_MEM;
89 if (request_resource(&iomem_resource, &pp->res[1])) 89 if (request_resource(&iomem_resource, &pp->res[1]))
90 panic("Request PCIe Memory resource failed\n"); 90 panic("Request PCIe Memory resource failed\n");
91 sys->resource[1] = &pp->res[1]; 91 pci_add_resource(&sys->resources, &pp->res[1]);
92
93 sys->resource[2] = NULL;
94 92
95 return 1; 93 return 1;
96} 94}
@@ -184,7 +182,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
184 struct pci_bus *bus; 182 struct pci_bus *bus;
185 183
186 if (nr < num_pcie_ports) { 184 if (nr < num_pcie_ports) {
187 bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); 185 bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
186 &sys->resources);
188 } else { 187 } else {
189 bus = NULL; 188 bus = NULL;
190 BUG(); 189 BUG();
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 18c32a5541d9..f685650c25d7 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -275,9 +275,9 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
275 allocate_resource(&iomem_resource, &res[0], 0x40000000, 275 allocate_resource(&iomem_resource, &res[0], 0x40000000,
276 0x80000000, 0xffffffff, 0x40000000, NULL, NULL); 276 0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
277 277
278 sys->resource[0] = &ioport_resource; 278 pci_add_resource(&sys->resources, &ioport_resource);
279 sys->resource[1] = &res[0]; 279 pci_add_resource(&sys->resources, &res[0]);
280 sys->resource[2] = &res[1]; 280 pci_add_resource(&sys->resources, &res[1]);
281 sys->mem_offset = DC21285_PCI_MEM; 281 sys->mem_offset = DC21285_PCI_MEM;
282 282
283 return 1; 283 return 1;
@@ -285,7 +285,7 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
285 285
286struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys) 286struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys)
287{ 287{
288 return pci_scan_bus(0, &dc21285_ops, sys); 288 return pci_scan_root_bus(NULL, 0, &dc21285_ops, sys, &sys->resources);
289} 289}
290 290
291#define dc21285_request_irq(_a, _b, _c, _d, _e) \ 291#define dc21285_request_irq(_a, _b, _c, _d, _e) \
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index b4d8f8b8a085..3c82566acece 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -359,7 +359,7 @@ static struct resource pre_mem = {
359 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, 359 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
360}; 360};
361 361
362static int __init pci_v3_setup_resources(struct resource **resource) 362static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
363{ 363{
364 if (request_resource(&iomem_resource, &non_mem)) { 364 if (request_resource(&iomem_resource, &non_mem)) {
365 printk(KERN_ERR "PCI: unable to allocate non-prefetchable " 365 printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
@@ -374,13 +374,13 @@ static int __init pci_v3_setup_resources(struct resource **resource)
374 } 374 }
375 375
376 /* 376 /*
377 * bus->resource[0] is the IO resource for this bus 377 * the IO resource for this bus
378 * bus->resource[1] is the mem resource for this bus 378 * the mem resource for this bus
379 * bus->resource[2] is the prefetch mem resource for this bus 379 * the prefetch mem resource for this bus
380 */ 380 */
381 resource[0] = &ioport_resource; 381 pci_add_resource(&sys->resources, &ioport_resource);
382 resource[1] = &non_mem; 382 pci_add_resource(&sys->resources, &non_mem);
383 resource[2] = &pre_mem; 383 pci_add_resource(&sys->resources, &pre_mem);
384 384
385 return 1; 385 return 1;
386} 386}
@@ -481,7 +481,7 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
481 481
482 if (nr == 0) { 482 if (nr == 0) {
483 sys->mem_offset = PHYS_PCI_MEM_BASE; 483 sys->mem_offset = PHYS_PCI_MEM_BASE;
484 ret = pci_v3_setup_resources(sys->resource); 484 ret = pci_v3_setup_resources(sys);
485 } 485 }
486 486
487 return ret; 487 return ret;
@@ -489,7 +489,8 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
489 489
490struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys) 490struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys)
491{ 491{
492 return pci_scan_bus(sys->busnr, &pci_v3_ops, sys); 492 return pci_scan_root_bus(NULL, sys->busnr, &pci_v3_ops, sys,
493 &sys->resources);
493} 494}
494 495
495/* 496/*
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index db012fadf88c..b8f5a8736511 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -537,14 +537,14 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
537 while(time_before(jiffies, atux_trhfa_timeout)) 537 while(time_before(jiffies, atux_trhfa_timeout))
538 udelay(100); 538 udelay(100);
539 539
540 bus = pci_bus_atux = pci_scan_bus(sys->busnr, 540 bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr,
541 &iop13xx_atux_ops, 541 &iop13xx_atux_ops,
542 sys); 542 sys, &sys->resources);
543 break; 543 break;
544 case IOP13XX_INIT_ATU_ATUE: 544 case IOP13XX_INIT_ATU_ATUE:
545 bus = pci_bus_atue = pci_scan_bus(sys->busnr, 545 bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr,
546 &iop13xx_atue_ops, 546 &iop13xx_atue_ops,
547 sys); 547 sys, &sys->resources);
548 break; 548 break;
549 } 549 }
550 550
@@ -1084,9 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
1084 request_resource(&ioport_resource, &res[0]); 1084 request_resource(&ioport_resource, &res[0]);
1085 request_resource(&iomem_resource, &res[1]); 1085 request_resource(&iomem_resource, &res[1]);
1086 1086
1087 sys->resource[0] = &res[0]; 1087 pci_add_resource(&sys->resources, &res[0]);
1088 sys->resource[1] = &res[1]; 1088 pci_add_resource(&sys->resources, &res[1]);
1089 sys->resource[2] = NULL;
1090 1089
1091 return 1; 1090 return 1;
1092} 1091}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index ee525416f0d2..e872d238cd0f 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -145,7 +145,8 @@ static struct pci_ops enp2611_pci_ops = {
145static struct pci_bus * __init enp2611_pci_scan_bus(int nr, 145static struct pci_bus * __init enp2611_pci_scan_bus(int nr,
146 struct pci_sys_data *sys) 146 struct pci_sys_data *sys)
147{ 147{
148 return pci_scan_bus(sys->busnr, &enp2611_pci_ops, sys); 148 return pci_scan_root_bus(NULL, sys->busnr, &enp2611_pci_ops, sys,
149 &sys->resources);
149} 150}
150 151
151static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot, 152static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index f5098b306fd3..626fda435aa9 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -132,7 +132,8 @@ static struct pci_ops ixp2000_pci_ops = {
132 132
133struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata) 133struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
134{ 134{
135 return pci_scan_bus(sysdata->busnr, &ixp2000_pci_ops, sysdata); 135 return pci_scan_root_bus(NULL, sysdata->busnr, &ixp2000_pci_ops,
136 sysdata, &sysdata->resources);
136} 137}
137 138
138 139
@@ -242,9 +243,8 @@ int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)
242 if (nr >= 1) 243 if (nr >= 1)
243 return 0; 244 return 0;
244 245
245 sys->resource[0] = &ixp2000_pci_io_space; 246 pci_add_resource(&sys->resources, &ixp2000_pci_io_space);
246 sys->resource[1] = &ixp2000_pci_mem_space; 247 pci_add_resource(&sys->resources, &ixp2000_pci_mem_space);
247 sys->resource[2] = NULL;
248 248
249 return 1; 249 return 1;
250} 250}
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index e6be5711c700..25b5c462cea2 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -143,7 +143,8 @@ struct pci_ops ixp23xx_pci_ops = {
143 143
144struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata) 144struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
145{ 145{
146 return pci_scan_bus(sysdata->busnr, &ixp23xx_pci_ops, sysdata); 146 return pci_scan_root_bus(NULL, sysdata->busnr, &ixp23xx_pci_ops,
147 sysdata, &sysdata->resources);
147} 148}
148 149
149int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 150int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
@@ -280,9 +281,8 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
280 if (nr >= 1) 281 if (nr >= 1)
281 return 0; 282 return 0;
282 283
283 sys->resource[0] = &ixp23xx_pci_io_space; 284 pci_add_resource(&sys->resources, &ixp23xx_pci_io_space);
284 sys->resource[1] = &ixp23xx_pci_mem_space; 285 pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space);
285 sys->resource[2] = NULL;
286 286
287 return 1; 287 return 1;
288} 288}
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 8325058ef871..5eff15f24bc2 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -472,9 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
472 request_resource(&ioport_resource, &res[0]); 472 request_resource(&ioport_resource, &res[0]);
473 request_resource(&iomem_resource, &res[1]); 473 request_resource(&iomem_resource, &res[1]);
474 474
475 sys->resource[0] = &res[0]; 475 pci_add_resource(&sys->resources, &res[0]);
476 sys->resource[1] = &res[1]; 476 pci_add_resource(&sys->resources, &res[1]);
477 sys->resource[2] = NULL;
478 477
479 platform_notify = ixp4xx_pci_platform_notify; 478 platform_notify = ixp4xx_pci_platform_notify;
480 platform_notify_remove = ixp4xx_pci_platform_notify_remove; 479 platform_notify_remove = ixp4xx_pci_platform_notify_remove;
@@ -484,7 +483,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
484 483
485struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys) 484struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
486{ 485{
487 return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); 486 return pci_scan_root_bus(NULL, sys->busnr, &ixp4xx_ops, sys,
487 &sys->resources);
488} 488}
489 489
490int dma_set_coherent_mask(struct device *dev, u64 mask) 490int dma_set_coherent_mask(struct device *dev, u64 mask)
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index fb451bfe478b..a066a6d8d9d2 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -198,9 +198,8 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
198 if (request_resource(&iomem_resource, &pp->res[1])) 198 if (request_resource(&iomem_resource, &pp->res[1]))
199 panic("Request PCIe%d Memory resource failed\n", index); 199 panic("Request PCIe%d Memory resource failed\n", index);
200 200
201 sys->resource[0] = &pp->res[0]; 201 pci_add_resource(&sys->resources, &pp->res[0]);
202 sys->resource[1] = &pp->res[1]; 202 pci_add_resource(&sys->resources, &pp->res[1]);
203 sys->resource[2] = NULL;
204 sys->io_offset = 0; 203 sys->io_offset = 0;
205 204
206 /* 205 /*
@@ -236,7 +235,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
236 struct pci_bus *bus; 235 struct pci_bus *bus;
237 236
238 if (nr < num_pcie_ports) { 237 if (nr < num_pcie_ports) {
239 bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); 238 bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
239 &sys->resources);
240 } else { 240 } else {
241 bus = NULL; 241 bus = NULL;
242 BUG(); 242 BUG();
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index c7c9a188d105..b26f992071df 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -143,7 +143,8 @@ static struct pci_ops ks8695_pci_ops = {
143 143
144static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) 144static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
145{ 145{
146 return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); 146 return pci_scan_root_bus(NULL, sys->busnr, &ks8695_pci_ops, sys,
147 &sys->resources);
147} 148}
148 149
149static struct resource pci_mem = { 150static struct resource pci_mem = {
@@ -168,9 +169,8 @@ static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
168 request_resource(&iomem_resource, &pci_mem); 169 request_resource(&iomem_resource, &pci_mem);
169 request_resource(&ioport_resource, &pci_io); 170 request_resource(&ioport_resource, &pci_io);
170 171
171 sys->resource[0] = &pci_io; 172 pci_add_resource(&sys->resources, &pci_io);
172 sys->resource[1] = &pci_mem; 173 pci_add_resource(&sys->resources, &pci_mem);
173 sys->resource[2] = NULL;
174 174
175 /* Assign and enable processor bridge */ 175 /* Assign and enable processor bridge */
176 ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); 176 ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 12fcb108b0e1..8459f6d7d8ca 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -155,9 +155,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
155 orion_pcie_set_local_bus_nr(pp->base, sys->busnr); 155 orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
156 orion_pcie_setup(pp->base); 156 orion_pcie_setup(pp->base);
157 157
158 sys->resource[0] = &pp->res[0]; 158 pci_add_resource(&sys->resources, &pp->res[0]);
159 sys->resource[1] = &pp->res[1]; 159 pci_add_resource(&sys->resources, &pp->res[1]);
160 sys->resource[2] = NULL;
161 160
162 return 1; 161 return 1;
163} 162}
@@ -251,7 +250,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
251 struct pci_bus *bus; 250 struct pci_bus *bus;
252 251
253 if (nr < num_pcie_ports) { 252 if (nr < num_pcie_ports) {
254 bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); 253 bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
254 &sys->resources);
255 } else { 255 } else {
256 bus = NULL; 256 bus = NULL;
257 BUG(); 257 BUG();
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index a494c470e3e4..09a045f0c406 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -177,7 +177,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
177 res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1; 177 res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1;
178 if (request_resource(&ioport_resource, &res[0])) 178 if (request_resource(&ioport_resource, &res[0]))
179 panic("Request PCIe IO resource failed\n"); 179 panic("Request PCIe IO resource failed\n");
180 sys->resource[0] = &res[0]; 180 pci_add_resource(&sys->resources, &res[0]);
181 181
182 /* 182 /*
183 * IORESOURCE_MEM 183 * IORESOURCE_MEM
@@ -188,9 +188,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
188 res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1; 188 res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1;
189 if (request_resource(&iomem_resource, &res[1])) 189 if (request_resource(&iomem_resource, &res[1]))
190 panic("Request PCIe Memory resource failed\n"); 190 panic("Request PCIe Memory resource failed\n");
191 sys->resource[1] = &res[1]; 191 pci_add_resource(&sys->resources, &res[1]);
192 192
193 sys->resource[2] = NULL;
194 sys->io_offset = 0; 193 sys->io_offset = 0;
195 194
196 return 1; 195 return 1;
@@ -506,7 +505,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
506 res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1; 505 res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1;
507 if (request_resource(&ioport_resource, &res[0])) 506 if (request_resource(&ioport_resource, &res[0]))
508 panic("Request PCI IO resource failed\n"); 507 panic("Request PCI IO resource failed\n");
509 sys->resource[0] = &res[0]; 508 pci_add_resource(&sys->resources, &res[0]);
510 509
511 /* 510 /*
512 * IORESOURCE_MEM 511 * IORESOURCE_MEM
@@ -517,9 +516,8 @@ static int __init pci_setup(struct pci_sys_data *sys)
517 res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1; 516 res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1;
518 if (request_resource(&iomem_resource, &res[1])) 517 if (request_resource(&iomem_resource, &res[1]))
519 panic("Request PCI Memory resource failed\n"); 518 panic("Request PCI Memory resource failed\n");
520 sys->resource[1] = &res[1]; 519 pci_add_resource(&sys->resources, &res[1]);
521 520
522 sys->resource[2] = NULL;
523 sys->io_offset = 0; 521 sys->io_offset = 0;
524 522
525 return 1; 523 return 1;
@@ -580,9 +578,11 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
580 struct pci_bus *bus; 578 struct pci_bus *bus;
581 579
582 if (nr == 0) { 580 if (nr == 0) {
583 bus = pci_scan_bus(sys->busnr, &pcie_ops, sys); 581 bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
582 &sys->resources);
584 } else if (nr == 1 && !orion5x_pci_disabled) { 583 } else if (nr == 1 && !orion5x_pci_disabled) {
585 bus = pci_scan_bus(sys->busnr, &pci_ops, sys); 584 bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
585 &sys->resources);
586 } else { 586 } else {
587 bus = NULL; 587 bus = NULL;
588 BUG(); 588 BUG();
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index dd39fee59549..0d01ca788922 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -131,7 +131,8 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
131 131
132struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys) 132struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)
133{ 133{
134 return pci_scan_bus(sys->busnr, &pci_nano_ops, sys); 134 return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys,
135 &sys->resources);
135} 136}
136 137
137static struct resource pci_io_ports = { 138static struct resource pci_io_ports = {
@@ -226,7 +227,7 @@ static struct resource pci_prefetchable_memory = {
226 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, 227 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
227}; 228};
228 229
229static int __init pci_nanoengine_setup_resources(struct resource **resource) 230static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
230{ 231{
231 if (request_resource(&ioport_resource, &pci_io_ports)) { 232 if (request_resource(&ioport_resource, &pci_io_ports)) {
232 printk(KERN_ERR "PCI: unable to allocate io port region\n"); 233 printk(KERN_ERR "PCI: unable to allocate io port region\n");
@@ -243,9 +244,9 @@ static int __init pci_nanoengine_setup_resources(struct resource **resource)
243 printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); 244 printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
244 return -EBUSY; 245 return -EBUSY;
245 } 246 }
246 resource[0] = &pci_io_ports; 247 pci_add_resource(&sys->resources, &pci_io_ports);
247 resource[1] = &pci_non_prefetchable_memory; 248 pci_add_resource(&sys->resources, &pci_non_prefetchable_memory);
248 resource[2] = &pci_prefetchable_memory; 249 pci_add_resource(&sys->resources, &pci_prefetchable_memory);
249 250
250 return 1; 251 return 1;
251} 252}
@@ -260,7 +261,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
260 if (nr == 0) { 261 if (nr == 0) {
261 sys->mem_offset = NANO_PCI_MEM_RW_PHYS; 262 sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
262 sys->io_offset = 0x400; 263 sys->io_offset = 0x400;
263 ret = pci_nanoengine_setup_resources(sys->resource); 264 ret = pci_nanoengine_setup_resources(sys);
264 /* Enable alternate memory bus master mode, see 265 /* Enable alternate memory bus master mode, see
265 * "Intel StrongARM SA1110 Developer's Manual", 266 * "Intel StrongARM SA1110 Developer's Manual",
266 * section 10.8, "Alternate Memory Bus Master Mode". */ 267 * section 10.8, "Alternate Memory Bus Master Mode". */
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index ec63c6b2b6b5..af8b63435727 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -408,7 +408,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
408 pp->res[0].flags = IORESOURCE_IO; 408 pp->res[0].flags = IORESOURCE_IO;
409 if (request_resource(&ioport_resource, &pp->res[0])) 409 if (request_resource(&ioport_resource, &pp->res[0]))
410 panic("Request PCIe IO resource failed\n"); 410 panic("Request PCIe IO resource failed\n");
411 sys->resource[0] = &pp->res[0]; 411 pci_add_resource(&sys->resources, &pp->res[0]);
412 412
413 /* 413 /*
414 * IORESOURCE_MEM 414 * IORESOURCE_MEM
@@ -427,7 +427,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
427 pp->res[1].flags = IORESOURCE_MEM; 427 pp->res[1].flags = IORESOURCE_MEM;
428 if (request_resource(&iomem_resource, &pp->res[1])) 428 if (request_resource(&iomem_resource, &pp->res[1]))
429 panic("Request PCIe Memory resource failed\n"); 429 panic("Request PCIe Memory resource failed\n");
430 sys->resource[1] = &pp->res[1]; 430 pci_add_resource(&sys->resources, &pp->res[1]);
431 431
432 /* 432 /*
433 * IORESOURCE_MEM | IORESOURCE_PREFETCH 433 * IORESOURCE_MEM | IORESOURCE_PREFETCH
@@ -446,7 +446,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
446 pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; 446 pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
447 if (request_resource(&iomem_resource, &pp->res[2])) 447 if (request_resource(&iomem_resource, &pp->res[2]))
448 panic("Request PCIe Prefetch Memory resource failed\n"); 448 panic("Request PCIe Prefetch Memory resource failed\n");
449 sys->resource[2] = &pp->res[2]; 449 pci_add_resource(&sys->resources, &pp->res[2]);
450 450
451 return 1; 451 return 1;
452} 452}
@@ -467,7 +467,8 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr,
467 pp = tegra_pcie.port + nr; 467 pp = tegra_pcie.port + nr;
468 pp->root_bus_nr = sys->busnr; 468 pp->root_bus_nr = sys->busnr;
469 469
470 return pci_scan_bus(sys->busnr, &tegra_pcie_ops, sys); 470 return pci_scan_root_bus(NULL, sys->busnr, &tegra_pcie_ops, sys,
471 &sys->resources);
471} 472}
472 473
473static struct hw_pci tegra_pcie_hw __initdata = { 474static struct hw_pci tegra_pcie_hw __initdata = {
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index c898deb3ada0..90069bce23bc 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -191,7 +191,7 @@ static struct resource pre_mem = {
191 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, 191 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
192}; 192};
193 193
194static int __init pci_versatile_setup_resources(struct resource **resource) 194static int __init pci_versatile_setup_resources(struct list_head *resources)
195{ 195{
196 int ret = 0; 196 int ret = 0;
197 197
@@ -215,13 +215,13 @@ static int __init pci_versatile_setup_resources(struct resource **resource)
215 } 215 }
216 216
217 /* 217 /*
218 * bus->resource[0] is the IO resource for this bus 218 * the IO resource for this bus
219 * bus->resource[1] is the mem resource for this bus 219 * the mem resource for this bus
220 * bus->resource[2] is the prefetch mem resource for this bus 220 * the prefetch mem resource for this bus
221 */ 221 */
222 resource[0] = &io_mem; 222 pci_add_resource(resources, &io_mem);
223 resource[1] = &non_mem; 223 pci_add_resource(resources, &non_mem);
224 resource[2] = &pre_mem; 224 pci_add_resource(resources, &pre_mem);
225 225
226 goto out; 226 goto out;
227 227
@@ -250,7 +250,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
250 250
251 if (nr == 0) { 251 if (nr == 0) {
252 sys->mem_offset = 0; 252 sys->mem_offset = 0;
253 ret = pci_versatile_setup_resources(sys->resource); 253 ret = pci_versatile_setup_resources(&sys->resources);
254 if (ret < 0) { 254 if (ret < 0) {
255 printk("pci_versatile_setup: resources... oops?\n"); 255 printk("pci_versatile_setup: resources... oops?\n");
256 goto out; 256 goto out;
@@ -306,7 +306,8 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
306 306
307struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys) 307struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys)
308{ 308{
309 return pci_scan_bus(sys->busnr, &pci_versatile_ops, sys); 309 return pci_scan_root_bus(NULL, sys->busnr, &pci_versatile_ops, sys,
310 &sys->resources);
310} 311}
311 312
312void __init pci_versatile_preinit(void) 313void __init pci_versatile_preinit(void)
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 845549cbbb27..f4d40a27111e 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -215,16 +215,16 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)
215 sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0; 215 sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0;
216 sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR; 216 sys->io_offset = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR;
217 217
218 sys->resource[0] = &res[0]; 218 pci_add_resource(&sys->resources, &res[0]);
219 sys->resource[1] = &res[1]; 219 pci_add_resource(&sys->resources, &res[1]);
220 sys->resource[2] = NULL;
221 220
222 return 1; 221 return 1;
223} 222}
224 223
225struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys) 224struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys)
226{ 225{
227 return pci_scan_bus(sys->busnr, &iop3xx_ops, sys); 226 return pci_scan_root_bus(NULL, sys->busnr, &iop3xx_ops, sys,
227 &sys->resources);
228} 228}
229 229
230void __init iop3xx_atu_setup(void) 230void __init iop3xx_atu_setup(void)
diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h
index 99cae2e3bac7..74352c4597d9 100644
--- a/arch/blackfin/include/asm/pci.h
+++ b/arch/blackfin/include/asm/pci.h
@@ -10,10 +10,6 @@
10#define PCIBIOS_MIN_IO 0x00001000 10#define PCIBIOS_MIN_IO 0x00001000
11#define PCIBIOS_MIN_MEM 0x10000000 11#define PCIBIOS_MIN_MEM 0x10000000
12 12
13static inline void pcibios_set_master(struct pci_dev *dev)
14{
15 /* No special bus mastering setup handling */
16}
17static inline void pcibios_penalize_isa_irq(int irq) 13static inline void pcibios_penalize_isa_irq(int irq)
18{ 14{
19 /* We don't do dynamic PCI IRQ allocation */ 15 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index 6b4fb28e9f99..c28121765448 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -194,23 +194,3 @@ void __init pcibios_resource_survey(void)
194 pcibios_allocate_resources(1); 194 pcibios_allocate_resources(1);
195 pcibios_assign_resources(); 195 pcibios_assign_resources();
196} 196}
197
198/*
199 * If we set up a device for bus mastering, we need to check the latency
200 * timer as certain crappy BIOSes forget to set it properly.
201 */
202unsigned int pcibios_max_latency = 255;
203
204void pcibios_set_master(struct pci_dev *dev)
205{
206 u8 lat;
207 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
208 if (lat < 16)
209 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
210 else if (lat > pcibios_max_latency)
211 lat = pcibios_max_latency;
212 else
213 return;
214 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
215 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
216}
diff --git a/arch/frv/mb93090-mb00/pci-frv.h b/arch/frv/mb93090-mb00/pci-frv.h
index f3fe55914793..089eeba4f3bc 100644
--- a/arch/frv/mb93090-mb00/pci-frv.h
+++ b/arch/frv/mb93090-mb00/pci-frv.h
@@ -26,8 +26,6 @@ extern unsigned int __nongpreldata pci_probe;
26 26
27/* pci-frv.c */ 27/* pci-frv.c */
28 28
29extern unsigned int pcibios_max_latency;
30
31void pcibios_resource_survey(void); 29void pcibios_resource_survey(void);
32 30
33/* pci-vdk.c */ 31/* pci-vdk.c */
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c
index f8dd37e49535..6b0b82ff4419 100644
--- a/arch/frv/mb93090-mb00/pci-vdk.c
+++ b/arch/frv/mb93090-mb00/pci-vdk.c
@@ -327,11 +327,6 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
327 printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number); 327 printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number);
328#endif 328#endif
329 329
330 if (bus->number == 0) {
331 bus->resource[0] = &pci_ioport_resource;
332 bus->resource[1] = &pci_iomem_resource;
333 }
334
335 pci_read_bridge_bases(bus); 330 pci_read_bridge_bases(bus);
336 331
337 if (bus->number == 0) { 332 if (bus->number == 0) {
@@ -357,6 +352,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
357int __init pcibios_init(void) 352int __init pcibios_init(void)
358{ 353{
359 struct pci_ops *dir = NULL; 354 struct pci_ops *dir = NULL;
355 LIST_HEAD(resources);
360 356
361 if (!mb93090_mb00_detected) 357 if (!mb93090_mb00_detected)
362 return -ENXIO; 358 return -ENXIO;
@@ -420,7 +416,10 @@ int __init pcibios_init(void)
420 } 416 }
421 417
422 printk("PCI: Probing PCI hardware\n"); 418 printk("PCI: Probing PCI hardware\n");
423 pci_root_bus = pci_scan_bus(0, pci_root_ops, NULL); 419 pci_add_resource(&resources, &pci_ioport_resource);
420 pci_add_resource(&resources, &pci_iomem_resource);
421 pci_root_bus = pci_scan_root_bus(NULL, 0, pci_root_ops, NULL,
422 &resources);
424 423
425 pcibios_irq_init(); 424 pcibios_irq_init();
426 pcibios_fixup_peer_bridges(); 425 pcibios_fixup_peer_bridges();
diff --git a/arch/h8300/include/asm/pci.h b/arch/h8300/include/asm/pci.h
index cc9762091c0a..0b2acaa3dd84 100644
--- a/arch/h8300/include/asm/pci.h
+++ b/arch/h8300/include/asm/pci.h
@@ -9,11 +9,6 @@
9 9
10#define pcibios_assign_all_busses() 0 10#define pcibios_assign_all_busses() 0
11 11
12static inline void pcibios_set_master(struct pci_dev *dev)
13{
14 /* No special bus mastering setup handling */
15}
16
17static inline void pcibios_penalize_isa_irq(int irq, int active) 12static inline void pcibios_penalize_isa_irq(int irq, int active)
18{ 13{
19 /* We don't do dynamic PCI IRQ allocation */ 14 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 127dd7be346a..279b38ae74aa 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -43,12 +43,6 @@ extern unsigned long ia64_max_iommu_merge_mask;
43#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) 43#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
44 44
45static inline void 45static inline void
46pcibios_set_master (struct pci_dev *dev)
47{
48 /* No special bus mastering setup handling */
49}
50
51static inline void
52pcibios_penalize_isa_irq (int irq, int active) 46pcibios_penalize_isa_irq (int irq, int active)
53{ 47{
54 /* We don't do dynamic PCI IRQ allocation */ 48 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 2c27714d7b78..f82f5d4b65fd 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -134,6 +134,7 @@ alloc_pci_controller (int seg)
134struct pci_root_info { 134struct pci_root_info {
135 struct acpi_device *bridge; 135 struct acpi_device *bridge;
136 struct pci_controller *controller; 136 struct pci_controller *controller;
137 struct list_head resources;
137 char *name; 138 char *name;
138}; 139};
139 140
@@ -315,24 +316,13 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
315 &window->resource); 316 &window->resource);
316 } 317 }
317 318
318 return AE_OK; 319 /* HP's firmware has a hack to work around a Windows bug.
319} 320 * Ignore these tiny memory ranges */
320 321 if (!((window->resource.flags & IORESOURCE_MEM) &&
321static void __devinit 322 (window->resource.end - window->resource.start < 16)))
322pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) 323 pci_add_resource(&info->resources, &window->resource);
323{
324 int i;
325 324
326 pci_bus_remove_resources(bus); 325 return AE_OK;
327 for (i = 0; i < ctrl->windows; i++) {
328 struct resource *res = &ctrl->window[i].resource;
329 /* HP's firmware has a hack to work around a Windows bug.
330 * Ignore these tiny memory ranges */
331 if ((res->flags & IORESOURCE_MEM) &&
332 (res->end - res->start < 16))
333 continue;
334 pci_bus_add_resource(bus, res, 0);
335 }
336} 326}
337 327
338struct pci_bus * __devinit 328struct pci_bus * __devinit
@@ -343,6 +333,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
343 int bus = root->secondary.start; 333 int bus = root->secondary.start;
344 struct pci_controller *controller; 334 struct pci_controller *controller;
345 unsigned int windows = 0; 335 unsigned int windows = 0;
336 struct pci_root_info info;
346 struct pci_bus *pbus; 337 struct pci_bus *pbus;
347 char *name; 338 char *name;
348 int pxm; 339 int pxm;
@@ -359,11 +350,10 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
359 controller->node = pxm_to_node(pxm); 350 controller->node = pxm_to_node(pxm);
360#endif 351#endif
361 352
353 INIT_LIST_HEAD(&info.resources);
362 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window, 354 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
363 &windows); 355 &windows);
364 if (windows) { 356 if (windows) {
365 struct pci_root_info info;
366
367 controller->window = 357 controller->window =
368 kmalloc_node(sizeof(*controller->window) * windows, 358 kmalloc_node(sizeof(*controller->window) * windows,
369 GFP_KERNEL, controller->node); 359 GFP_KERNEL, controller->node);
@@ -387,8 +377,14 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
387 * should handle the case here, but it appears that IA64 hasn't 377 * should handle the case here, but it appears that IA64 hasn't
388 * such quirk. So we just ignore the case now. 378 * such quirk. So we just ignore the case now.
389 */ 379 */
390 pbus = pci_scan_bus_parented(NULL, bus, &pci_root_ops, controller); 380 pbus = pci_create_root_bus(NULL, bus, &pci_root_ops, controller,
381 &info.resources);
382 if (!pbus) {
383 pci_free_resource_list(&info.resources);
384 return NULL;
385 }
391 386
387 pbus->subordinate = pci_scan_child_bus(pbus);
392 return pbus; 388 return pbus;
393 389
394out3: 390out3:
@@ -504,14 +500,15 @@ pcibios_fixup_bus (struct pci_bus *b)
504 if (b->self) { 500 if (b->self) {
505 pci_read_bridge_bases(b); 501 pci_read_bridge_bases(b);
506 pcibios_fixup_bridge_resources(b->self); 502 pcibios_fixup_bridge_resources(b->self);
507 } else {
508 pcibios_setup_root_windows(b, b->sysdata);
509 } 503 }
510 list_for_each_entry(dev, &b->devices, bus_list) 504 list_for_each_entry(dev, &b->devices, bus_list)
511 pcibios_fixup_device_resources(dev); 505 pcibios_fixup_device_resources(dev);
512 platform_pci_fixup_bus(b); 506 platform_pci_fixup_bus(b);
507}
513 508
514 return; 509void pcibios_set_master (struct pci_dev *dev)
510{
511 /* No special bus mastering setup handling */
515} 512}
516 513
517void __devinit 514void __devinit
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 32764cd077c6..e9834b2991d0 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -140,7 +140,6 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
140/* Allocate & free a PCI host bridge structure */ 140/* Allocate & free a PCI host bridge structure */
141extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev); 141extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
142extern void pcibios_free_controller(struct pci_controller *phb); 142extern void pcibios_free_controller(struct pci_controller *phb);
143extern void pcibios_setup_phb_resources(struct pci_controller *hose);
144 143
145#endif /* __KERNEL__ */ 144#endif /* __KERNEL__ */
146#endif /* _ASM_MICROBLAZE_PCI_BRIDGE_H */ 145#endif /* _ASM_MICROBLAZE_PCI_BRIDGE_H */
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 1dd9d6b1e275..033137628e8a 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -42,11 +42,6 @@ struct pci_dev;
42 */ 42 */
43#define pcibios_assign_all_busses() 0 43#define pcibios_assign_all_busses() 0
44 44
45static inline void pcibios_set_master(struct pci_dev *dev)
46{
47 /* No special bus mastering setup handling */
48}
49
50static inline void pcibios_penalize_isa_irq(int irq, int active) 45static inline void pcibios_penalize_isa_irq(int irq, int active)
51{ 46{
52 /* We don't do dynamic PCI IRQ allocation */ 47 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 0d71b2ed8107..85f2ac1230a8 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -190,6 +190,11 @@ int pcibios_add_platform_entries(struct pci_dev *pdev)
190 return device_create_file(&pdev->dev, &dev_attr_devspec); 190 return device_create_file(&pdev->dev, &dev_attr_devspec);
191} 191}
192 192
193void pcibios_set_master(struct pci_dev *dev)
194{
195 /* No special bus mastering setup handling */
196}
197
193char __devinit *pcibios_setup(char *str) 198char __devinit *pcibios_setup(char *str)
194{ 199{
195 return str; 200 return str;
@@ -1019,7 +1024,6 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
1019 struct pci_dev *dev = bus->self; 1024 struct pci_dev *dev = bus->self;
1020 1025
1021 pci_bus_for_each_resource(bus, res, i) { 1026 pci_bus_for_each_resource(bus, res, i) {
1022 res = bus->resource[i];
1023 if (!res) 1027 if (!res)
1024 continue; 1028 continue;
1025 if (!res->flags) 1029 if (!res->flags)
@@ -1219,7 +1223,6 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
1219 pci_domain_nr(bus), bus->number); 1223 pci_domain_nr(bus), bus->number);
1220 1224
1221 pci_bus_for_each_resource(bus, res, i) { 1225 pci_bus_for_each_resource(bus, res, i) {
1222 res = bus->resource[i];
1223 if (!res || !res->flags 1226 if (!res || !res->flags
1224 || res->start > res->end || res->parent) 1227 || res->start > res->end || res->parent)
1225 continue; 1228 continue;
@@ -1510,14 +1513,18 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
1510 return pci_enable_resources(dev, mask); 1513 return pci_enable_resources(dev, mask);
1511} 1514}
1512 1515
1513void __devinit pcibios_setup_phb_resources(struct pci_controller *hose) 1516static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)
1514{ 1517{
1515 struct pci_bus *bus = hose->bus;
1516 struct resource *res; 1518 struct resource *res;
1517 int i; 1519 int i;
1518 1520
1519 /* Hookup PHB IO resource */ 1521 /* Hookup PHB IO resource */
1520 bus->resource[0] = res = &hose->io_resource; 1522 res = &hose->io_resource;
1523
1524 /* Fixup IO space offset */
1525 io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
1526 res->start = (res->start + io_offset) & 0xffffffffu;
1527 res->end = (res->end + io_offset) & 0xffffffffu;
1521 1528
1522 if (!res->flags) { 1529 if (!res->flags) {
1523 printk(KERN_WARNING "PCI: I/O resource not set for host" 1530 printk(KERN_WARNING "PCI: I/O resource not set for host"
@@ -1528,6 +1535,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
1528 res->end = res->start + IO_SPACE_LIMIT; 1535 res->end = res->start + IO_SPACE_LIMIT;
1529 res->flags = IORESOURCE_IO; 1536 res->flags = IORESOURCE_IO;
1530 } 1537 }
1538 pci_add_resource(resources, res);
1531 1539
1532 pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n", 1540 pr_debug("PCI: PHB IO resource = %016llx-%016llx [%lx]\n",
1533 (unsigned long long)res->start, 1541 (unsigned long long)res->start,
@@ -1550,7 +1558,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
1550 res->flags = IORESOURCE_MEM; 1558 res->flags = IORESOURCE_MEM;
1551 1559
1552 } 1560 }
1553 bus->resource[i+1] = res; 1561 pci_add_resource(resources, res);
1554 1562
1555 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", 1563 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n",
1556 i, (unsigned long long)res->start, 1564 i, (unsigned long long)res->start,
@@ -1573,34 +1581,27 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
1573 1581
1574static void __devinit pcibios_scan_phb(struct pci_controller *hose) 1582static void __devinit pcibios_scan_phb(struct pci_controller *hose)
1575{ 1583{
1584 LIST_HEAD(resources);
1576 struct pci_bus *bus; 1585 struct pci_bus *bus;
1577 struct device_node *node = hose->dn; 1586 struct device_node *node = hose->dn;
1578 unsigned long io_offset;
1579 struct resource *res = &hose->io_resource;
1580 1587
1581 pr_debug("PCI: Scanning PHB %s\n", 1588 pr_debug("PCI: Scanning PHB %s\n",
1582 node ? node->full_name : "<NO NAME>"); 1589 node ? node->full_name : "<NO NAME>");
1583 1590
1584 /* Create an empty bus for the toplevel */ 1591 pcibios_setup_phb_resources(hose, &resources);
1585 bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose); 1592
1593 bus = pci_scan_root_bus(hose->parent, hose->first_busno,
1594 hose->ops, hose, &resources);
1586 if (bus == NULL) { 1595 if (bus == NULL) {
1587 printk(KERN_ERR "Failed to create bus for PCI domain %04x\n", 1596 printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
1588 hose->global_number); 1597 hose->global_number);
1598 pci_free_resource_list(&resources);
1589 return; 1599 return;
1590 } 1600 }
1591 bus->secondary = hose->first_busno; 1601 bus->secondary = hose->first_busno;
1592 hose->bus = bus; 1602 hose->bus = bus;
1593 1603
1594 /* Fixup IO space offset */ 1604 hose->last_busno = bus->subordinate;
1595 io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
1596 res->start = (res->start + io_offset) & 0xffffffffu;
1597 res->end = (res->end + io_offset) & 0xffffffffu;
1598
1599 /* Wire up PHB bus resources */
1600 pcibios_setup_phb_resources(hose);
1601
1602 /* Scan children */
1603 hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
1604} 1605}
1605 1606
1606static int __init pcibios_init(void) 1607static int __init pcibios_init(void)
@@ -1614,8 +1615,6 @@ static int __init pcibios_init(void)
1614 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 1615 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
1615 hose->last_busno = 0xff; 1616 hose->last_busno = 0xff;
1616 pcibios_scan_phb(hose); 1617 pcibios_scan_phb(hose);
1617 printk(KERN_INFO "calling pci_bus_add_devices()\n");
1618 pci_bus_add_devices(hose->bus);
1619 if (next_busno <= hose->last_busno) 1618 if (next_busno <= hose->last_busno)
1620 next_busno = hose->last_busno + 1; 1619 next_busno = hose->last_busno + 1;
1621 } 1620 }
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 41af7fa2887b..fa8e378413b1 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -81,6 +81,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
81{ 81{
82 static int next_busno; 82 static int next_busno;
83 static int need_domain_info; 83 static int need_domain_info;
84 LIST_HEAD(resources);
84 struct pci_bus *bus; 85 struct pci_bus *bus;
85 86
86 if (!hose->iommu) 87 if (!hose->iommu)
@@ -89,7 +90,13 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
89 if (hose->get_busno && pci_probe_only) 90 if (hose->get_busno && pci_probe_only)
90 next_busno = (*hose->get_busno)(); 91 next_busno = (*hose->get_busno)();
91 92
92 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 93 pci_add_resource(&resources, hose->mem_resource);
94 pci_add_resource(&resources, hose->io_resource);
95 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
96 &resources);
97 if (!bus)
98 pci_free_resource_list(&resources);
99
93 hose->bus = bus; 100 hose->bus = bus;
94 101
95 need_domain_info = need_domain_info || hose->index; 102 need_domain_info = need_domain_info || hose->index;
@@ -205,27 +212,6 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
205 return 0; 212 return 0;
206} 213}
207 214
208/*
209 * If we set up a device for bus mastering, we need to check the latency
210 * timer as certain crappy BIOSes forget to set it properly.
211 */
212static unsigned int pcibios_max_latency = 255;
213
214void pcibios_set_master(struct pci_dev *dev)
215{
216 u8 lat;
217 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
218 if (lat < 16)
219 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
220 else if (lat > pcibios_max_latency)
221 lat = pcibios_max_latency;
222 else
223 return;
224 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
225 pci_name(dev), lat);
226 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
227}
228
229unsigned int pcibios_assign_all_busses(void) 215unsigned int pcibios_assign_all_busses(void)
230{ 216{
231 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; 217 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
@@ -266,15 +252,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
266{ 252{
267 /* Propagate hose info into the subordinate devices. */ 253 /* Propagate hose info into the subordinate devices. */
268 254
269 struct pci_controller *hose = bus->sysdata;
270 struct list_head *ln; 255 struct list_head *ln;
271 struct pci_dev *dev = bus->self; 256 struct pci_dev *dev = bus->self;
272 257
273 if (!dev) { 258 if (pci_probe_only && dev &&
274 bus->resource[0] = hose->io_resource; 259 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
275 bus->resource[1] = hose->mem_resource;
276 } else if (pci_probe_only &&
277 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
278 pci_read_bridge_bases(bus); 260 pci_read_bridge_bases(bus);
279 pcibios_fixup_device_resources(dev, bus); 261 pcibios_fixup_device_resources(dev, bus);
280 } 262 }
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
index 8e6763e6f250..c4e2e79281e8 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.c
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.c
@@ -213,28 +213,6 @@ void __init pcibios_resource_survey(void)
213 pcibios_allocate_resources(1); 213 pcibios_allocate_resources(1);
214} 214}
215 215
216/*
217 * If we set up a device for bus mastering, we need to check the latency
218 * timer as certain crappy BIOSes forget to set it properly.
219 */
220unsigned int pcibios_max_latency = 255;
221
222void pcibios_set_master(struct pci_dev *dev)
223{
224 u8 lat;
225
226 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
227
228 if (lat < 16)
229 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
230 else if (lat > pcibios_max_latency)
231 lat = pcibios_max_latency;
232 else
233 return;
234
235 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
236}
237
238int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 216int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
239 enum pci_mmap_state mmap_state, int write_combine) 217 enum pci_mmap_state mmap_state, int write_combine)
240{ 218{
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h
index c3fa294b6e28..1194fe486b01 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.h
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.h
@@ -31,8 +31,6 @@ extern unsigned int pci_probe;
31 31
32/* pci-asb2305.c */ 32/* pci-asb2305.c */
33 33
34extern unsigned int pcibios_max_latency;
35
36extern void pcibios_resource_survey(void); 34extern void pcibios_resource_survey(void);
37 35
38/* pci.c */ 36/* pci.c */
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
index a4954fe82094..a7c5f08ca9f5 100644
--- a/arch/mn10300/unit-asb2305/pci.c
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -380,11 +380,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
380{ 380{
381 struct pci_dev *dev; 381 struct pci_dev *dev;
382 382
383 if (bus->number == 0) {
384 bus->resource[0] = &pci_ioport_resource;
385 bus->resource[1] = &pci_iomem_resource;
386 }
387
388 if (bus->self) { 383 if (bus->self) {
389 pci_read_bridge_bases(bus); 384 pci_read_bridge_bases(bus);
390 pcibios_fixup_device_resources(bus->self); 385 pcibios_fixup_device_resources(bus->self);
@@ -402,6 +397,8 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
402 */ 397 */
403static int __init pcibios_init(void) 398static int __init pcibios_init(void)
404{ 399{
400 LIST_HEAD(resources);
401
405 ioport_resource.start = 0xA0000000; 402 ioport_resource.start = 0xA0000000;
406 ioport_resource.end = 0xDFFFFFFF; 403 ioport_resource.end = 0xDFFFFFFF;
407 iomem_resource.start = 0xA0000000; 404 iomem_resource.start = 0xA0000000;
@@ -423,7 +420,10 @@ static int __init pcibios_init(void)
423 printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n", 420 printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
424 MEM_PAGING_REG); 421 MEM_PAGING_REG);
425 422
426 pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL); 423 pci_add_resource(&resources, &pci_ioport_resource);
424 pci_add_resource(&resources, &pci_iomem_resource);
425 pci_root_bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL,
426 &resources);
427 427
428 pcibios_irq_init(); 428 pcibios_irq_init();
429 pcibios_fixup_irqs(); 429 pcibios_fixup_irqs();
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 882b6aa6c857..5d487657322e 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -226,7 +226,6 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
226/* Allocate & free a PCI host bridge structure */ 226/* Allocate & free a PCI host bridge structure */
227extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev); 227extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
228extern void pcibios_free_controller(struct pci_controller *phb); 228extern void pcibios_free_controller(struct pci_controller *phb);
229extern void pcibios_setup_phb_resources(struct pci_controller *hose);
230 229
231#ifdef CONFIG_PCI 230#ifdef CONFIG_PCI
232extern int pcibios_vaddr_is_ioport(void __iomem *address); 231extern int pcibios_vaddr_is_ioport(void __iomem *address);
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 1c92013466e3..f54b3d26ce9d 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -46,11 +46,6 @@ struct pci_dev;
46#define pcibios_assign_all_busses() \ 46#define pcibios_assign_all_busses() \
47 (pci_has_flag(PCI_REASSIGN_ALL_BUS)) 47 (pci_has_flag(PCI_REASSIGN_ALL_BUS))
48 48
49static inline void pcibios_set_master(struct pci_dev *dev)
50{
51 /* No special bus mastering setup handling */
52}
53
54static inline void pcibios_penalize_isa_irq(int irq, int active) 49static inline void pcibios_penalize_isa_irq(int irq, int active)
55{ 50{
56 /* We don't do dynamic PCI IRQ allocation */ 51 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index fa4a573d6716..cce98d76e905 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1131,6 +1131,11 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
1131 } 1131 }
1132} 1132}
1133 1133
1134void pcibios_set_master(struct pci_dev *dev)
1135{
1136 /* No special bus mastering setup handling */
1137}
1138
1134void __devinit pcibios_fixup_bus(struct pci_bus *bus) 1139void __devinit pcibios_fixup_bus(struct pci_bus *bus)
1135{ 1140{
1136 /* When called from the generic PCI probe, read PCI<->PCI bridge 1141 /* When called from the generic PCI probe, read PCI<->PCI bridge
@@ -1560,14 +1565,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
1560 return pci_enable_resources(dev, mask); 1565 return pci_enable_resources(dev, mask);
1561} 1566}
1562 1567
1563void __devinit pcibios_setup_phb_resources(struct pci_controller *hose) 1568static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)
1564{ 1569{
1565 struct pci_bus *bus = hose->bus;
1566 struct resource *res; 1570 struct resource *res;
1567 int i; 1571 int i;
1568 1572
1569 /* Hookup PHB IO resource */ 1573 /* Hookup PHB IO resource */
1570 bus->resource[0] = res = &hose->io_resource; 1574 res = &hose->io_resource;
1571 1575
1572 if (!res->flags) { 1576 if (!res->flags) {
1573 printk(KERN_WARNING "PCI: I/O resource not set for host" 1577 printk(KERN_WARNING "PCI: I/O resource not set for host"
@@ -1585,6 +1589,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
1585 (unsigned long long)res->start, 1589 (unsigned long long)res->start,
1586 (unsigned long long)res->end, 1590 (unsigned long long)res->end,
1587 (unsigned long)res->flags); 1591 (unsigned long)res->flags);
1592 pci_add_resource(resources, res);
1588 1593
1589 /* Hookup PHB Memory resources */ 1594 /* Hookup PHB Memory resources */
1590 for (i = 0; i < 3; ++i) { 1595 for (i = 0; i < 3; ++i) {
@@ -1602,12 +1607,12 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
1602 res->flags = IORESOURCE_MEM; 1607 res->flags = IORESOURCE_MEM;
1603#endif /* CONFIG_PPC32 */ 1608#endif /* CONFIG_PPC32 */
1604 } 1609 }
1605 bus->resource[i+1] = res;
1606 1610
1607 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i, 1611 pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i,
1608 (unsigned long long)res->start, 1612 (unsigned long long)res->start,
1609 (unsigned long long)res->end, 1613 (unsigned long long)res->end,
1610 (unsigned long)res->flags); 1614 (unsigned long)res->flags);
1615 pci_add_resource(resources, res);
1611 } 1616 }
1612 1617
1613 pr_debug("PCI: PHB MEM offset = %016llx\n", 1618 pr_debug("PCI: PHB MEM offset = %016llx\n",
@@ -1701,6 +1706,7 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
1701 */ 1706 */
1702void __devinit pcibios_scan_phb(struct pci_controller *hose) 1707void __devinit pcibios_scan_phb(struct pci_controller *hose)
1703{ 1708{
1709 LIST_HEAD(resources);
1704 struct pci_bus *bus; 1710 struct pci_bus *bus;
1705 struct device_node *node = hose->dn; 1711 struct device_node *node = hose->dn;
1706 int mode; 1712 int mode;
@@ -1708,22 +1714,24 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
1708 pr_debug("PCI: Scanning PHB %s\n", 1714 pr_debug("PCI: Scanning PHB %s\n",
1709 node ? node->full_name : "<NO NAME>"); 1715 node ? node->full_name : "<NO NAME>");
1710 1716
1717 /* Get some IO space for the new PHB */
1718 pcibios_setup_phb_io_space(hose);
1719
1720 /* Wire up PHB bus resources */
1721 pcibios_setup_phb_resources(hose, &resources);
1722
1711 /* Create an empty bus for the toplevel */ 1723 /* Create an empty bus for the toplevel */
1712 bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose); 1724 bus = pci_create_root_bus(hose->parent, hose->first_busno,
1725 hose->ops, hose, &resources);
1713 if (bus == NULL) { 1726 if (bus == NULL) {
1714 pr_err("Failed to create bus for PCI domain %04x\n", 1727 pr_err("Failed to create bus for PCI domain %04x\n",
1715 hose->global_number); 1728 hose->global_number);
1729 pci_free_resource_list(&resources);
1716 return; 1730 return;
1717 } 1731 }
1718 bus->secondary = hose->first_busno; 1732 bus->secondary = hose->first_busno;
1719 hose->bus = bus; 1733 hose->bus = bus;
1720 1734
1721 /* Get some IO space for the new PHB */
1722 pcibios_setup_phb_io_space(hose);
1723
1724 /* Wire up PHB bus resources */
1725 pcibios_setup_phb_resources(hose);
1726
1727 /* Get probe mode and perform scan */ 1735 /* Get probe mode and perform scan */
1728 mode = PCI_PROBE_NORMAL; 1736 mode = PCI_PROBE_NORMAL;
1729 if (node && ppc_md.pci_probe_mode) 1737 if (node && ppc_md.pci_probe_mode)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index bcf4bf9e72d9..3318d39b7d4c 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -131,30 +131,13 @@ EXPORT_SYMBOL_GPL(pcibios_unmap_io_space);
131 131
132#endif /* CONFIG_HOTPLUG */ 132#endif /* CONFIG_HOTPLUG */
133 133
134int __devinit pcibios_map_io_space(struct pci_bus *bus) 134static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose)
135{ 135{
136 struct vm_struct *area; 136 struct vm_struct *area;
137 unsigned long phys_page; 137 unsigned long phys_page;
138 unsigned long size_page; 138 unsigned long size_page;
139 unsigned long io_virt_offset; 139 unsigned long io_virt_offset;
140 struct pci_controller *hose;
141
142 WARN_ON(bus == NULL);
143
144 /* If this not a PHB, nothing to do, page tables still exist and
145 * thus HPTEs will be faulted in when needed
146 */
147 if (bus->self) {
148 pr_debug("IO mapping for PCI-PCI bridge %s\n",
149 pci_name(bus->self));
150 pr_debug(" virt=0x%016llx...0x%016llx\n",
151 bus->resource[0]->start + _IO_BASE,
152 bus->resource[0]->end + _IO_BASE);
153 return 0;
154 }
155 140
156 /* Get the host bridge */
157 hose = pci_bus_to_host(bus);
158 phys_page = _ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE); 141 phys_page = _ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE);
159 size_page = _ALIGN_UP(hose->pci_io_size, PAGE_SIZE); 142 size_page = _ALIGN_UP(hose->pci_io_size, PAGE_SIZE);
160 143
@@ -198,11 +181,30 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
198 181
199 return 0; 182 return 0;
200} 183}
184
185int __devinit pcibios_map_io_space(struct pci_bus *bus)
186{
187 WARN_ON(bus == NULL);
188
189 /* If this not a PHB, nothing to do, page tables still exist and
190 * thus HPTEs will be faulted in when needed
191 */
192 if (bus->self) {
193 pr_debug("IO mapping for PCI-PCI bridge %s\n",
194 pci_name(bus->self));
195 pr_debug(" virt=0x%016llx...0x%016llx\n",
196 bus->resource[0]->start + _IO_BASE,
197 bus->resource[0]->end + _IO_BASE);
198 return 0;
199 }
200
201 return pcibios_map_phb_io_space(pci_bus_to_host(bus));
202}
201EXPORT_SYMBOL_GPL(pcibios_map_io_space); 203EXPORT_SYMBOL_GPL(pcibios_map_io_space);
202 204
203void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose) 205void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
204{ 206{
205 pcibios_map_io_space(hose->bus); 207 pcibios_map_phb_io_space(hose);
206} 208}
207 209
208#define IOBASE_BRIDGE_NUMBER 0 210#define IOBASE_BRIDGE_NUMBER 0
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 11aaf2fdec84..8f18dd090a66 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -36,9 +36,15 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
36{ 36{
37 static int next_busno; 37 static int next_busno;
38 static int need_domain_info; 38 static int need_domain_info;
39 LIST_HEAD(resources);
40 int i;
39 struct pci_bus *bus; 41 struct pci_bus *bus;
40 42
41 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 43 for (i = 0; i < hose->nr_resources; i++)
44 pci_add_resource(&resources, hose->resources + i);
45
46 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
47 &resources);
42 hose->bus = bus; 48 hose->bus = bus;
43 49
44 need_domain_info = need_domain_info || hose->index; 50 need_domain_info = need_domain_info || hose->index;
@@ -55,6 +61,8 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
55 pci_bus_size_bridges(bus); 61 pci_bus_size_bridges(bus);
56 pci_bus_assign_resources(bus); 62 pci_bus_assign_resources(bus);
57 pci_enable_bridges(bus); 63 pci_enable_bridges(bus);
64 } else {
65 pci_free_resource_list(&resources);
58 } 66 }
59} 67}
60 68
@@ -162,16 +170,8 @@ static void pcibios_fixup_device_resources(struct pci_dev *dev,
162 */ 170 */
163void __devinit pcibios_fixup_bus(struct pci_bus *bus) 171void __devinit pcibios_fixup_bus(struct pci_bus *bus)
164{ 172{
165 struct pci_dev *dev = bus->self; 173 struct pci_dev *dev;
166 struct list_head *ln; 174 struct list_head *ln;
167 struct pci_channel *hose = bus->sysdata;
168
169 if (!dev) {
170 int i;
171
172 for (i = 0; i < hose->nr_resources; i++)
173 bus->resource[i] = hose->resources + i;
174 }
175 175
176 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { 176 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
177 dev = pci_dev_b(ln); 177 dev = pci_dev_b(ln);
@@ -243,27 +243,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
243 return pci_enable_resources(dev, mask); 243 return pci_enable_resources(dev, mask);
244} 244}
245 245
246/*
247 * If we set up a device for bus mastering, we need to check and set
248 * the latency timer as it may not be properly set.
249 */
250static unsigned int pcibios_max_latency = 255;
251
252void pcibios_set_master(struct pci_dev *dev)
253{
254 u8 lat;
255 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
256 if (lat < 16)
257 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
258 else if (lat > pcibios_max_latency)
259 lat = pcibios_max_latency;
260 else
261 return;
262 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
263 pci_name(dev), lat);
264 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
265}
266
267void __init pcibios_update_irq(struct pci_dev *dev, int irq) 246void __init pcibios_update_irq(struct pci_dev *dev, int irq)
268{ 247{
269 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 248 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 02939abd356c..6de7f7bf956a 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -16,11 +16,6 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19static inline void pcibios_set_master(struct pci_dev *dev)
20{
21 /* No special bus mastering setup handling */
22}
23
24static inline void pcibios_penalize_isa_irq(int irq, int active) 19static inline void pcibios_penalize_isa_irq(int irq, int active)
25{ 20{
26 /* We don't do dynamic PCI IRQ allocation */ 21 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 2614d96141c9..755a4bb6bcd3 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,11 +16,6 @@
16 16
17#define PCI_IRQ_NONE 0xffffffff 17#define PCI_IRQ_NONE 0xffffffff
18 18
19static inline void pcibios_set_master(struct pci_dev *dev)
20{
21 /* No special bus mastering setup handling */
22}
23
24static inline void pcibios_penalize_isa_irq(int irq, int active) 19static inline void pcibios_penalize_isa_irq(int irq, int active)
25{ 20{
26 /* We don't do dynamic PCI IRQ allocation */ 21 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index f1cf6ef011a7..c7bec25fdb1c 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -19,22 +19,22 @@
19 */ 19 */
20void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info) 20void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
21{ 21{
22 LIST_HEAD(resources);
22 struct pci_bus *root_bus; 23 struct pci_bus *root_bus;
23 24
24 root_bus = pci_scan_bus_parented(&ofdev->dev, 0, info->ops, info); 25 pci_add_resource(&resources, &info->io_space);
25 if (root_bus) { 26 pci_add_resource(&resources, &info->mem_space);
26 root_bus->resource[0] = &info->io_space;
27 root_bus->resource[1] = &info->mem_space;
28 root_bus->resource[2] = NULL;
29
30 /* Init all PCI devices into PCI tree */
31 pci_bus_add_devices(root_bus);
32 27
28 root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
29 &resources);
30 if (root_bus) {
33 /* Setup IRQs of all devices using custom routines */ 31 /* Setup IRQs of all devices using custom routines */
34 pci_fixup_irqs(pci_common_swizzle, info->map_irq); 32 pci_fixup_irqs(pci_common_swizzle, info->map_irq);
35 33
36 /* Assign devices with resources */ 34 /* Assign devices with resources */
37 pci_assign_unassigned_resources(); 35 pci_assign_unassigned_resources();
36 } else {
37 pci_free_resource_list(&resources);
38 } 38 }
39} 39}
40 40
@@ -83,15 +83,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
83 int i, has_io, has_mem; 83 int i, has_io, has_mem;
84 u16 cmd; 84 u16 cmd;
85 85
86 /* Generic PCI bus probing sets these to point at
87 * &io{port,mem}_resouce which is wrong for us.
88 */
89 if (pbus->self == NULL) {
90 pbus->resource[0] = &info->io_space;
91 pbus->resource[1] = &info->mem_space;
92 pbus->resource[2] = NULL;
93 }
94
95 list_for_each_entry(dev, &pbus->devices, bus_list) { 86 list_for_each_entry(dev, &pbus->devices, bus_list) {
96 /* 87 /*
97 * We can not rely on that the bootloader has enabled I/O 88 * We can not rely on that the bootloader has enabled I/O
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 31111e35281e..bb8bc2e519ac 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -685,23 +685,25 @@ static void __devinit pci_bus_register_of_sysfs(struct pci_bus *bus)
685struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm, 685struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
686 struct device *parent) 686 struct device *parent)
687{ 687{
688 LIST_HEAD(resources);
688 struct device_node *node = pbm->op->dev.of_node; 689 struct device_node *node = pbm->op->dev.of_node;
689 struct pci_bus *bus; 690 struct pci_bus *bus;
690 691
691 printk("PCI: Scanning PBM %s\n", node->full_name); 692 printk("PCI: Scanning PBM %s\n", node->full_name);
692 693
693 bus = pci_create_bus(parent, pbm->pci_first_busno, pbm->pci_ops, pbm); 694 pci_add_resource(&resources, &pbm->io_space);
695 pci_add_resource(&resources, &pbm->mem_space);
696 bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
697 pbm, &resources);
694 if (!bus) { 698 if (!bus) {
695 printk(KERN_ERR "Failed to create bus for %s\n", 699 printk(KERN_ERR "Failed to create bus for %s\n",
696 node->full_name); 700 node->full_name);
701 pci_free_resource_list(&resources);
697 return NULL; 702 return NULL;
698 } 703 }
699 bus->secondary = pbm->pci_first_busno; 704 bus->secondary = pbm->pci_first_busno;
700 bus->subordinate = pbm->pci_last_busno; 705 bus->subordinate = pbm->pci_last_busno;
701 706
702 bus->resource[0] = &pbm->io_space;
703 bus->resource[1] = &pbm->mem_space;
704
705 pci_of_scan_bus(pbm, node, bus); 707 pci_of_scan_bus(pbm, node, bus);
706 pci_bus_add_devices(bus); 708 pci_bus_add_devices(bus);
707 pci_bus_register_of_sysfs(bus); 709 pci_bus_register_of_sysfs(bus);
@@ -711,13 +713,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
711 713
712void __devinit pcibios_fixup_bus(struct pci_bus *pbus) 714void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
713{ 715{
714 struct pci_pbm_info *pbm = pbus->sysdata;
715
716 /* Generic PCI bus probing sets these to point at
717 * &io{port,mem}_resouce which is wrong for us.
718 */
719 pbus->resource[0] = &pbm->io_space;
720 pbus->resource[1] = &pbm->mem_space;
721} 716}
722 717
723void pcibios_update_irq(struct pci_dev *pdev, int irq) 718void pcibios_update_irq(struct pci_dev *pdev, int irq)
@@ -1083,6 +1078,11 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
1083 *end = rp->end - offset; 1078 *end = rp->end - offset;
1084} 1079}
1085 1080
1081void pcibios_set_master(struct pci_dev *dev)
1082{
1083 /* No special bus mastering setup handling */
1084}
1085
1086static int __init pcibios_init(void) 1086static int __init pcibios_init(void)
1087{ 1087{
1088 pci_dfl_cache_line_size = 64 >> 2; 1088 pci_dfl_cache_line_size = 64 >> 2;
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 1d25fea42e54..5d5a635530bd 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -76,13 +76,6 @@ static inline int pcibios_assign_all_busses(void)
76 return 1; 76 return 1;
77} 77}
78 78
79/*
80 * No special bus mastering setup handling.
81 */
82static inline void pcibios_set_master(struct pci_dev *dev)
83{
84}
85
86#define PCIBIOS_MIN_MEM 0 79#define PCIBIOS_MIN_MEM 0
87#define PCIBIOS_MIN_IO 0 80#define PCIBIOS_MIN_IO 0
88 81
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 25567934a21e..a1bb59eecc18 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -395,6 +395,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
395 /* Nothing needs to be done. */ 395 /* Nothing needs to be done. */
396} 396}
397 397
398void pcibios_set_master(struct pci_dev *dev)
399{
400 /* No special bus mastering setup handling. */
401}
402
398/* 403/*
399 * This can be called from the generic PCI layer, but doesn't need to 404 * This can be called from the generic PCI layer, but doesn't need to
400 * do anything. 405 * do anything.
diff --git a/arch/unicore32/include/asm/pci.h b/arch/unicore32/include/asm/pci.h
index c5b28b459535..dd3867727c35 100644
--- a/arch/unicore32/include/asm/pci.h
+++ b/arch/unicore32/include/asm/pci.h
@@ -17,11 +17,6 @@
17#include <asm-generic/pci.h> 17#include <asm-generic/pci.h>
18#include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 18#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
19 19
20static inline void pcibios_set_master(struct pci_dev *dev)
21{
22 /* No special bus mastering setup handling */
23}
24
25static inline void pcibios_penalize_isa_irq(int irq, int active) 20static inline void pcibios_penalize_isa_irq(int irq, int active)
26{ 21{
27 /* We don't do dynamic PCI IRQ allocation */ 22 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 4892fbb54ebf..a8f07fe10cad 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -309,6 +309,11 @@ char * __devinit pcibios_setup(char *str)
309 return str; 309 return str;
310} 310}
311 311
312void pcibios_set_master(struct pci_dev *dev)
313{
314 /* No special bus mastering setup handling */
315}
316
312/* 317/*
313 * From arch/i386/kernel/pci-i386.c: 318 * From arch/i386/kernel/pci-i386.c:
314 * 319 *
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index 8e41071704a5..49ad773f4b9f 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_X86_AMD_NB_H 1#ifndef _ASM_X86_AMD_NB_H
2#define _ASM_X86_AMD_NB_H 2#define _ASM_X86_AMD_NB_H
3 3
4#include <linux/ioport.h>
4#include <linux/pci.h> 5#include <linux/pci.h>
5 6
6struct amd_nb_bus_dev_range { 7struct amd_nb_bus_dev_range {
@@ -13,6 +14,7 @@ extern const struct pci_device_id amd_nb_misc_ids[];
13extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[]; 14extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
14 15
15extern bool early_is_amd_nb(u32 value); 16extern bool early_is_amd_nb(u32 value);
17extern struct resource *amd_get_mmconfig_range(struct resource *res);
16extern int amd_cache_northbridges(void); 18extern int amd_cache_northbridges(void);
17extern void amd_flush_garts(void); 19extern void amd_flush_garts(void);
18extern int amd_numa_init(void); 20extern int amd_numa_init(void);
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d498943b906c..df75d07571ce 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -112,19 +112,28 @@ static inline void x86_teardown_msi_irq(unsigned int irq)
112{ 112{
113 x86_msi.teardown_msi_irq(irq); 113 x86_msi.teardown_msi_irq(irq);
114} 114}
115static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
116{
117 x86_msi.restore_msi_irqs(dev, irq);
118}
115#define arch_setup_msi_irqs x86_setup_msi_irqs 119#define arch_setup_msi_irqs x86_setup_msi_irqs
116#define arch_teardown_msi_irqs x86_teardown_msi_irqs 120#define arch_teardown_msi_irqs x86_teardown_msi_irqs
117#define arch_teardown_msi_irq x86_teardown_msi_irq 121#define arch_teardown_msi_irq x86_teardown_msi_irq
122#define arch_restore_msi_irqs x86_restore_msi_irqs
118/* implemented in arch/x86/kernel/apic/io_apic. */ 123/* implemented in arch/x86/kernel/apic/io_apic. */
119int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); 124int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
120void native_teardown_msi_irq(unsigned int irq); 125void native_teardown_msi_irq(unsigned int irq);
126void native_restore_msi_irqs(struct pci_dev *dev, int irq);
121/* default to the implementation in drivers/lib/msi.c */ 127/* default to the implementation in drivers/lib/msi.c */
122#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS 128#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
129#define HAVE_DEFAULT_MSI_RESTORE_IRQS
123void default_teardown_msi_irqs(struct pci_dev *dev); 130void default_teardown_msi_irqs(struct pci_dev *dev);
131void default_restore_msi_irqs(struct pci_dev *dev, int irq);
124#else 132#else
125#define native_setup_msi_irqs NULL 133#define native_setup_msi_irqs NULL
126#define native_teardown_msi_irq NULL 134#define native_teardown_msi_irq NULL
127#define default_teardown_msi_irqs NULL 135#define default_teardown_msi_irqs NULL
136#define default_restore_msi_irqs NULL
128#endif 137#endif
129 138
130#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) 139#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index e38197806853..b3a531746026 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -44,8 +44,6 @@ enum pci_bf_sort_state {
44 44
45/* pci-i386.c */ 45/* pci-i386.c */
46 46
47extern unsigned int pcibios_max_latency;
48
49void pcibios_resource_survey(void); 47void pcibios_resource_survey(void);
50void pcibios_set_cache_line_size(void); 48void pcibios_set_cache_line_size(void);
51 49
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 800f77c60051..b9676ae37ada 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -172,7 +172,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot)
172} 172}
173 173
174struct pci_bus; 174struct pci_bus;
175void x86_pci_root_bus_res_quirks(struct pci_bus *b); 175void x86_pci_root_bus_resources(int bus, struct list_head *resources);
176 176
177#ifdef CONFIG_SMP 177#ifdef CONFIG_SMP
178#define mc_capable() ((boot_cpu_data.x86_max_cores > 1) && \ 178#define mc_capable() ((boot_cpu_data.x86_max_cores > 1) && \
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1ac860a09849..517d4767ffdd 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -179,6 +179,7 @@ struct x86_msi_ops {
179 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type); 179 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
180 void (*teardown_msi_irq)(unsigned int irq); 180 void (*teardown_msi_irq)(unsigned int irq);
181 void (*teardown_msi_irqs)(struct pci_dev *dev); 181 void (*teardown_msi_irqs)(struct pci_dev *dev);
182 void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
182}; 183};
183 184
184extern struct x86_init_ops x86_init; 185extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 013c1810ce72..be16854591cc 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -119,6 +119,37 @@ bool __init early_is_amd_nb(u32 device)
119 return false; 119 return false;
120} 120}
121 121
122struct resource *amd_get_mmconfig_range(struct resource *res)
123{
124 u32 address;
125 u64 base, msr;
126 unsigned segn_busn_bits;
127
128 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
129 return NULL;
130
131 /* assume all cpus from fam10h have mmconfig */
132 if (boot_cpu_data.x86 < 0x10)
133 return NULL;
134
135 address = MSR_FAM10H_MMIO_CONF_BASE;
136 rdmsrl(address, msr);
137
138 /* mmconfig is not enabled */
139 if (!(msr & FAM10H_MMIO_CONF_ENABLE))
140 return NULL;
141
142 base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
143
144 segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
145 FAM10H_MMIO_CONF_BUSRANGE_MASK;
146
147 res->flags = IORESOURCE_MEM;
148 res->start = base;
149 res->end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
150 return res;
151}
152
122int amd_get_subcaches(int cpu) 153int amd_get_subcaches(int cpu)
123{ 154{
124 struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link; 155 struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 91f83e21b989..947a06ccc673 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,4 +115,5 @@ struct x86_msi_ops x86_msi = {
115 .setup_msi_irqs = native_setup_msi_irqs, 115 .setup_msi_irqs = native_setup_msi_irqs,
116 .teardown_msi_irq = native_teardown_msi_irq, 116 .teardown_msi_irq = native_teardown_msi_irq,
117 .teardown_msi_irqs = default_teardown_msi_irqs, 117 .teardown_msi_irqs = default_teardown_msi_irqs,
118 .restore_msi_irqs = default_restore_msi_irqs,
118}; 119};
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 404f21a3ff9e..a312e76063a7 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -12,7 +12,7 @@ struct pci_root_info {
12 char *name; 12 char *name;
13 unsigned int res_num; 13 unsigned int res_num;
14 struct resource *res; 14 struct resource *res;
15 struct pci_bus *bus; 15 struct list_head *resources;
16 int busnum; 16 int busnum;
17}; 17};
18 18
@@ -24,6 +24,12 @@ static int __init set_use_crs(const struct dmi_system_id *id)
24 return 0; 24 return 0;
25} 25}
26 26
27static int __init set_nouse_crs(const struct dmi_system_id *id)
28{
29 pci_use_crs = false;
30 return 0;
31}
32
27static const struct dmi_system_id pci_use_crs_table[] __initconst = { 33static const struct dmi_system_id pci_use_crs_table[] __initconst = {
28 /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */ 34 /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
29 { 35 {
@@ -54,6 +60,29 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
54 DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), 60 DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
55 }, 61 },
56 }, 62 },
63
64 /* Now for the blacklist.. */
65
66 /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
67 {
68 .callback = set_nouse_crs,
69 .ident = "Dell Studio 1557",
70 .matches = {
71 DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
72 DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
73 DMI_MATCH(DMI_BIOS_VERSION, "A09"),
74 },
75 },
76 /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
77 {
78 .callback = set_nouse_crs,
79 .ident = "Thinkpad SL510",
80 .matches = {
81 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
82 DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
83 DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
84 },
85 },
57 {} 86 {}
58}; 87};
59 88
@@ -149,7 +178,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
149 struct acpi_resource_address64 addr; 178 struct acpi_resource_address64 addr;
150 acpi_status status; 179 acpi_status status;
151 unsigned long flags; 180 unsigned long flags;
152 u64 start, end; 181 u64 start, orig_end, end;
153 182
154 status = resource_to_addr(acpi_res, &addr); 183 status = resource_to_addr(acpi_res, &addr);
155 if (!ACPI_SUCCESS(status)) 184 if (!ACPI_SUCCESS(status))
@@ -165,7 +194,21 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
165 return AE_OK; 194 return AE_OK;
166 195
167 start = addr.minimum + addr.translation_offset; 196 start = addr.minimum + addr.translation_offset;
168 end = addr.maximum + addr.translation_offset; 197 orig_end = end = addr.maximum + addr.translation_offset;
198
199 /* Exclude non-addressable range or non-addressable portion of range */
200 end = min(end, (u64)iomem_resource.end);
201 if (end <= start) {
202 dev_info(&info->bridge->dev,
203 "host bridge window [%#llx-%#llx] "
204 "(ignored, not CPU addressable)\n", start, orig_end);
205 return AE_OK;
206 } else if (orig_end != end) {
207 dev_info(&info->bridge->dev,
208 "host bridge window [%#llx-%#llx] "
209 "([%#llx-%#llx] ignored, not CPU addressable)\n",
210 start, orig_end, end + 1, orig_end);
211 }
169 212
170 res = &info->res[info->res_num]; 213 res = &info->res[info->res_num];
171 res->name = info->name; 214 res->name = info->name;
@@ -261,23 +304,20 @@ static void add_resources(struct pci_root_info *info)
261 "ignoring host bridge window %pR (conflicts with %s %pR)\n", 304 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
262 res, conflict->name, conflict); 305 res, conflict->name, conflict);
263 else 306 else
264 pci_bus_add_resource(info->bus, res, 0); 307 pci_add_resource(info->resources, res);
265 } 308 }
266} 309}
267 310
268static void 311static void
269get_current_resources(struct acpi_device *device, int busnum, 312get_current_resources(struct acpi_device *device, int busnum,
270 int domain, struct pci_bus *bus) 313 int domain, struct list_head *resources)
271{ 314{
272 struct pci_root_info info; 315 struct pci_root_info info;
273 size_t size; 316 size_t size;
274 317
275 if (pci_use_crs)
276 pci_bus_remove_resources(bus);
277
278 info.bridge = device; 318 info.bridge = device;
279 info.bus = bus;
280 info.res_num = 0; 319 info.res_num = 0;
320 info.resources = resources;
281 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, 321 acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
282 &info); 322 &info);
283 if (!info.res_num) 323 if (!info.res_num)
@@ -286,7 +326,7 @@ get_current_resources(struct acpi_device *device, int busnum,
286 size = sizeof(*info.res) * info.res_num; 326 size = sizeof(*info.res) * info.res_num;
287 info.res = kmalloc(size, GFP_KERNEL); 327 info.res = kmalloc(size, GFP_KERNEL);
288 if (!info.res) 328 if (!info.res)
289 goto res_alloc_fail; 329 return;
290 330
291 info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum); 331 info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum);
292 if (!info.name) 332 if (!info.name)
@@ -301,8 +341,6 @@ get_current_resources(struct acpi_device *device, int busnum,
301 341
302name_alloc_fail: 342name_alloc_fail:
303 kfree(info.res); 343 kfree(info.res);
304res_alloc_fail:
305 return;
306} 344}
307 345
308struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) 346struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
@@ -310,6 +348,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
310 struct acpi_device *device = root->device; 348 struct acpi_device *device = root->device;
311 int domain = root->segment; 349 int domain = root->segment;
312 int busnum = root->secondary.start; 350 int busnum = root->secondary.start;
351 LIST_HEAD(resources);
313 struct pci_bus *bus; 352 struct pci_bus *bus;
314 struct pci_sysdata *sd; 353 struct pci_sysdata *sd;
315 int node; 354 int node;
@@ -364,11 +403,15 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
364 memcpy(bus->sysdata, sd, sizeof(*sd)); 403 memcpy(bus->sysdata, sd, sizeof(*sd));
365 kfree(sd); 404 kfree(sd);
366 } else { 405 } else {
367 bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd); 406 get_current_resources(device, busnum, domain, &resources);
368 if (bus) { 407 if (list_empty(&resources))
369 get_current_resources(device, busnum, domain, bus); 408 x86_pci_root_bus_resources(busnum, &resources);
409 bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
410 &resources);
411 if (bus)
370 bus->subordinate = pci_scan_child_bus(bus); 412 bus->subordinate = pci_scan_child_bus(bus);
371 } 413 else
414 pci_free_resource_list(&resources);
372 } 415 }
373 416
374 /* After the PCI-E bus has been walked and all devices discovered, 417 /* After the PCI-E bus has been walked and all devices discovered,
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 026e4931d162..0567df3890e1 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -30,34 +30,6 @@ static struct pci_hostbridge_probe pci_probes[] __initdata = {
30 { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 }, 30 { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 },
31}; 31};
32 32
33static u64 __initdata fam10h_mmconf_start;
34static u64 __initdata fam10h_mmconf_end;
35static void __init get_pci_mmcfg_amd_fam10h_range(void)
36{
37 u32 address;
38 u64 base, msr;
39 unsigned segn_busn_bits;
40
41 /* assume all cpus from fam10h have mmconf */
42 if (boot_cpu_data.x86 < 0x10)
43 return;
44
45 address = MSR_FAM10H_MMIO_CONF_BASE;
46 rdmsrl(address, msr);
47
48 /* mmconfig is not enable */
49 if (!(msr & FAM10H_MMIO_CONF_ENABLE))
50 return;
51
52 base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
53
54 segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
55 FAM10H_MMIO_CONF_BUSRANGE_MASK;
56
57 fam10h_mmconf_start = base;
58 fam10h_mmconf_end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
59}
60
61#define RANGE_NUM 16 33#define RANGE_NUM 16
62 34
63/** 35/**
@@ -85,6 +57,9 @@ static int __init early_fill_mp_bus_info(void)
85 u64 val; 57 u64 val;
86 u32 address; 58 u32 address;
87 bool found; 59 bool found;
60 struct resource fam10h_mmconf_res, *fam10h_mmconf;
61 u64 fam10h_mmconf_start;
62 u64 fam10h_mmconf_end;
88 63
89 if (!early_pci_allowed()) 64 if (!early_pci_allowed())
90 return -1; 65 return -1;
@@ -211,12 +186,17 @@ static int __init early_fill_mp_bus_info(void)
211 subtract_range(range, RANGE_NUM, 0, end); 186 subtract_range(range, RANGE_NUM, 0, end);
212 187
213 /* get mmconfig */ 188 /* get mmconfig */
214 get_pci_mmcfg_amd_fam10h_range(); 189 fam10h_mmconf = amd_get_mmconfig_range(&fam10h_mmconf_res);
215 /* need to take out mmconf range */ 190 /* need to take out mmconf range */
216 if (fam10h_mmconf_end) { 191 if (fam10h_mmconf) {
217 printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", fam10h_mmconf_start, fam10h_mmconf_end); 192 printk(KERN_DEBUG "Fam 10h mmconf %pR\n", fam10h_mmconf);
193 fam10h_mmconf_start = fam10h_mmconf->start;
194 fam10h_mmconf_end = fam10h_mmconf->end;
218 subtract_range(range, RANGE_NUM, fam10h_mmconf_start, 195 subtract_range(range, RANGE_NUM, fam10h_mmconf_start,
219 fam10h_mmconf_end + 1); 196 fam10h_mmconf_end + 1);
197 } else {
198 fam10h_mmconf_start = 0;
199 fam10h_mmconf_end = 0;
220 } 200 }
221 201
222 /* mmio resource */ 202 /* mmio resource */
@@ -403,7 +383,6 @@ static void __init pci_enable_pci_io_ecs(void)
403 ++n; 383 ++n;
404 } 384 }
405 } 385 }
406 pr_info("Extended Config Space enabled on %u nodes\n", n);
407#endif 386#endif
408} 387}
409 388
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c
index ab8269b0da29..f3a7c569a403 100644
--- a/arch/x86/pci/broadcom_bus.c
+++ b/arch/x86/pci/broadcom_bus.c
@@ -15,10 +15,11 @@
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <asm/pci_x86.h> 17#include <asm/pci_x86.h>
18#include <asm/pci-direct.h>
18 19
19#include "bus_numa.h" 20#include "bus_numa.h"
20 21
21static void __devinit cnb20le_res(struct pci_dev *dev) 22static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
22{ 23{
23 struct pci_root_info *info; 24 struct pci_root_info *info;
24 struct resource res; 25 struct resource res;
@@ -26,21 +27,12 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
26 u8 fbus, lbus; 27 u8 fbus, lbus;
27 int i; 28 int i;
28 29
29#ifdef CONFIG_ACPI
30 /*
31 * We should get host bridge information from ACPI unless the BIOS
32 * doesn't support it.
33 */
34 if (acpi_os_get_root_pointer())
35 return;
36#endif
37
38 info = &pci_root_info[pci_root_num]; 30 info = &pci_root_info[pci_root_num];
39 pci_root_num++; 31 pci_root_num++;
40 32
41 /* read the PCI bus numbers */ 33 /* read the PCI bus numbers */
42 pci_read_config_byte(dev, 0x44, &fbus); 34 fbus = read_pci_config_byte(bus, slot, func, 0x44);
43 pci_read_config_byte(dev, 0x45, &lbus); 35 lbus = read_pci_config_byte(bus, slot, func, 0x45);
44 info->bus_min = fbus; 36 info->bus_min = fbus;
45 info->bus_max = lbus; 37 info->bus_max = lbus;
46 38
@@ -59,8 +51,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
59 } 51 }
60 52
61 /* read the non-prefetchable memory window */ 53 /* read the non-prefetchable memory window */
62 pci_read_config_word(dev, 0xc0, &word1); 54 word1 = read_pci_config_16(bus, slot, func, 0xc0);
63 pci_read_config_word(dev, 0xc2, &word2); 55 word2 = read_pci_config_16(bus, slot, func, 0xc2);
64 if (word1 != word2) { 56 if (word1 != word2) {
65 res.start = (word1 << 16) | 0x0000; 57 res.start = (word1 << 16) | 0x0000;
66 res.end = (word2 << 16) | 0xffff; 58 res.end = (word2 << 16) | 0xffff;
@@ -69,8 +61,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
69 } 61 }
70 62
71 /* read the prefetchable memory window */ 63 /* read the prefetchable memory window */
72 pci_read_config_word(dev, 0xc4, &word1); 64 word1 = read_pci_config_16(bus, slot, func, 0xc4);
73 pci_read_config_word(dev, 0xc6, &word2); 65 word2 = read_pci_config_16(bus, slot, func, 0xc6);
74 if (word1 != word2) { 66 if (word1 != word2) {
75 res.start = (word1 << 16) | 0x0000; 67 res.start = (word1 << 16) | 0x0000;
76 res.end = (word2 << 16) | 0xffff; 68 res.end = (word2 << 16) | 0xffff;
@@ -79,8 +71,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
79 } 71 }
80 72
81 /* read the IO port window */ 73 /* read the IO port window */
82 pci_read_config_word(dev, 0xd0, &word1); 74 word1 = read_pci_config_16(bus, slot, func, 0xd0);
83 pci_read_config_word(dev, 0xd2, &word2); 75 word2 = read_pci_config_16(bus, slot, func, 0xd2);
84 if (word1 != word2) { 76 if (word1 != word2) {
85 res.start = word1; 77 res.start = word1;
86 res.end = word2; 78 res.end = word2;
@@ -92,13 +84,37 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
92 res.start = fbus; 84 res.start = fbus;
93 res.end = lbus; 85 res.end = lbus;
94 res.flags = IORESOURCE_BUS; 86 res.flags = IORESOURCE_BUS;
95 dev_info(&dev->dev, "CNB20LE PCI Host Bridge (domain %04x %pR)\n", 87 printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res);
96 pci_domain_nr(dev->bus), &res);
97 88
98 for (i = 0; i < info->res_num; i++) 89 for (i = 0; i < info->res_num; i++)
99 dev_info(&dev->dev, "host bridge window %pR\n", &info->res[i]); 90 printk(KERN_INFO "host bridge window %pR\n", &info->res[i]);
100} 91}
101 92
102DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE, 93static int __init broadcom_postcore_init(void)
103 cnb20le_res); 94{
95 u8 bus = 0, slot = 0;
96 u32 id;
97 u16 vendor, device;
98
99#ifdef CONFIG_ACPI
100 /*
101 * We should get host bridge information from ACPI unless the BIOS
102 * doesn't support it.
103 */
104 if (acpi_os_get_root_pointer())
105 return 0;
106#endif
107
108 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
109 vendor = id & 0xffff;
110 device = (id >> 16) & 0xffff;
111
112 if (vendor == PCI_VENDOR_ID_SERVERWORKS &&
113 device == PCI_DEVICE_ID_SERVERWORKS_LE) {
114 cnb20le_res(bus, slot, 0);
115 cnb20le_res(bus, slot, 1);
116 }
117 return 0;
118}
104 119
120postcore_initcall(broadcom_postcore_init);
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c
index 64a122883896..fd3f65510e9d 100644
--- a/arch/x86/pci/bus_numa.c
+++ b/arch/x86/pci/bus_numa.c
@@ -7,45 +7,50 @@
7int pci_root_num; 7int pci_root_num;
8struct pci_root_info pci_root_info[PCI_ROOT_NR]; 8struct pci_root_info pci_root_info[PCI_ROOT_NR];
9 9
10void x86_pci_root_bus_res_quirks(struct pci_bus *b) 10void x86_pci_root_bus_resources(int bus, struct list_head *resources)
11{ 11{
12 int i; 12 int i;
13 int j; 13 int j;
14 struct pci_root_info *info; 14 struct pci_root_info *info;
15 15
16 /* don't go for it if _CRS is used already */
17 if (b->resource[0] != &ioport_resource ||
18 b->resource[1] != &iomem_resource)
19 return;
20
21 if (!pci_root_num) 16 if (!pci_root_num)
22 return; 17 goto default_resources;
23 18
24 for (i = 0; i < pci_root_num; i++) { 19 for (i = 0; i < pci_root_num; i++) {
25 if (pci_root_info[i].bus_min == b->number) 20 if (pci_root_info[i].bus_min == bus)
26 break; 21 break;
27 } 22 }
28 23
29 if (i == pci_root_num) 24 if (i == pci_root_num)
30 return; 25 goto default_resources;
31 26
32 printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n", 27 printk(KERN_DEBUG "PCI: root bus %02x: hardware-probed resources\n",
33 b->number); 28 bus);
34 29
35 pci_bus_remove_resources(b);
36 info = &pci_root_info[i]; 30 info = &pci_root_info[i];
37 for (j = 0; j < info->res_num; j++) { 31 for (j = 0; j < info->res_num; j++) {
38 struct resource *res; 32 struct resource *res;
39 struct resource *root; 33 struct resource *root;
40 34
41 res = &info->res[j]; 35 res = &info->res[j];
42 pci_bus_add_resource(b, res, 0); 36 pci_add_resource(resources, res);
43 if (res->flags & IORESOURCE_IO) 37 if (res->flags & IORESOURCE_IO)
44 root = &ioport_resource; 38 root = &ioport_resource;
45 else 39 else
46 root = &iomem_resource; 40 root = &iomem_resource;
47 insert_resource(root, res); 41 insert_resource(root, res);
48 } 42 }
43 return;
44
45default_resources:
46 /*
47 * We don't have any host bridge aperture information from the
48 * "native host bridge drivers," e.g., amd_bus or broadcom_bus,
49 * so fall back to the defaults historically used by pci_create_bus().
50 */
51 printk(KERN_DEBUG "PCI: root bus %02x: using default resources\n", bus);
52 pci_add_resource(resources, &ioport_resource);
53 pci_add_resource(resources, &iomem_resource);
49} 54}
50 55
51void __devinit update_res(struct pci_root_info *info, resource_size_t start, 56void __devinit update_res(struct pci_root_info *info, resource_size_t start,
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 7962ccb4d9b2..323481e06ef8 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -164,9 +164,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *b)
164{ 164{
165 struct pci_dev *dev; 165 struct pci_dev *dev;
166 166
167 /* root bus? */
168 if (!b->parent)
169 x86_pci_root_bus_res_quirks(b);
170 pci_read_bridge_bases(b); 167 pci_read_bridge_bases(b);
171 list_for_each_entry(dev, &b->devices, bus_list) 168 list_for_each_entry(dev, &b->devices, bus_list)
172 pcibios_fixup_device_resources(dev); 169 pcibios_fixup_device_resources(dev);
@@ -433,6 +430,7 @@ void __init dmi_check_pciprobe(void)
433 430
434struct pci_bus * __devinit pcibios_scan_root(int busnum) 431struct pci_bus * __devinit pcibios_scan_root(int busnum)
435{ 432{
433 LIST_HEAD(resources);
436 struct pci_bus *bus = NULL; 434 struct pci_bus *bus = NULL;
437 struct pci_sysdata *sd; 435 struct pci_sysdata *sd;
438 436
@@ -456,9 +454,12 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
456 sd->node = get_mp_bus_to_node(busnum); 454 sd->node = get_mp_bus_to_node(busnum);
457 455
458 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum); 456 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
459 bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd); 457 x86_pci_root_bus_resources(busnum, &resources);
460 if (!bus) 458 bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
459 if (!bus) {
460 pci_free_resource_list(&resources);
461 kfree(sd); 461 kfree(sd);
462 }
462 463
463 return bus; 464 return bus;
464} 465}
@@ -639,6 +640,7 @@ int pci_ext_cfg_avail(struct pci_dev *dev)
639 640
640struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node) 641struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
641{ 642{
643 LIST_HEAD(resources);
642 struct pci_bus *bus = NULL; 644 struct pci_bus *bus = NULL;
643 struct pci_sysdata *sd; 645 struct pci_sysdata *sd;
644 646
@@ -653,9 +655,12 @@ struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops,
653 return NULL; 655 return NULL;
654 } 656 }
655 sd->node = node; 657 sd->node = node;
656 bus = pci_scan_bus(busno, ops, sd); 658 x86_pci_root_bus_resources(busno, &resources);
657 if (!bus) 659 bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
660 if (!bus) {
661 pci_free_resource_list(&resources);
658 kfree(sd); 662 kfree(sd);
663 }
659 664
660 return bus; 665 return bus;
661} 666}
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 794b092d01ae..91821a1a0c3a 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -254,26 +254,6 @@ void __init pcibios_resource_survey(void)
254 */ 254 */
255fs_initcall(pcibios_assign_resources); 255fs_initcall(pcibios_assign_resources);
256 256
257/*
258 * If we set up a device for bus mastering, we need to check the latency
259 * timer as certain crappy BIOSes forget to set it properly.
260 */
261unsigned int pcibios_max_latency = 255;
262
263void pcibios_set_master(struct pci_dev *dev)
264{
265 u8 lat;
266 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
267 if (lat < 16)
268 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
269 else if (lat > pcibios_max_latency)
270 lat = pcibios_max_latency;
271 else
272 return;
273 dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
274 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
275}
276
277static const struct vm_operations_struct pci_mmap_ops = { 257static const struct vm_operations_struct pci_mmap_ops = {
278 .access = generic_access_phys, 258 .access = generic_access_phys,
279}; 259};
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index 2c2aeabc2609..a1df191129d3 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -31,9 +31,6 @@ int __init pci_legacy_init(void)
31 31
32 printk("PCI: Probing PCI hardware\n"); 32 printk("PCI: Probing PCI hardware\n");
33 pci_root_bus = pcibios_scan_root(0); 33 pci_root_bus = pcibios_scan_root(0);
34 if (pci_root_bus)
35 pci_bus_add_devices(pci_root_bus);
36
37 return 0; 34 return 0;
38} 35}
39 36
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 51abf02f9226..83e125b95ca6 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -153,8 +153,6 @@ int __init pci_numaq_init(void)
153 raw_pci_ops = &pci_direct_conf1_mq; 153 raw_pci_ops = &pci_direct_conf1_mq;
154 154
155 pci_root_bus = pcibios_scan_root(0); 155 pci_root_bus = pcibios_scan_root(0);
156 if (pci_root_bus)
157 pci_bus_add_devices(pci_root_bus);
158 if (num_online_nodes() > 1) 156 if (num_online_nodes() > 1)
159 for_each_online_node(quad) { 157 for_each_online_node(quad) {
160 if (quad == 0) 158 if (quad == 0)
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 4609b0f15f1f..05244f07dd31 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -22,11 +22,6 @@
22 22
23extern struct pci_controller* pcibios_alloc_controller(void); 23extern struct pci_controller* pcibios_alloc_controller(void);
24 24
25static inline void pcibios_set_master(struct pci_dev *dev)
26{
27 /* No special bus mastering setup handling */
28}
29
30static inline void pcibios_penalize_isa_irq(int irq) 25static inline void pcibios_penalize_isa_irq(int irq)
31{ 26{
32 /* We don't do dynamic PCI IRQ allocation */ 27 /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index cd1026931203..61045c192e88 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -134,9 +134,46 @@ struct pci_controller * __init pcibios_alloc_controller(void)
134 return pci_ctrl; 134 return pci_ctrl;
135} 135}
136 136
137static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
138 struct list_head *resources)
139{
140 struct resource *res;
141 unsigned long io_offset;
142 int i;
143
144 io_offset = (unsigned long)pci_ctrl->io_space.base;
145 res = &pci_ctrl->io_resource;
146 if (!res->flags) {
147 if (io_offset)
148 printk (KERN_ERR "I/O resource not set for host"
149 " bridge %d\n", pci_ctrl->index);
150 res->start = 0;
151 res->end = IO_SPACE_LIMIT;
152 res->flags = IORESOURCE_IO;
153 }
154 res->start += io_offset;
155 res->end += io_offset;
156 pci_add_resource(resources, res);
157
158 for (i = 0; i < 3; i++) {
159 res = &pci_ctrl->mem_resources[i];
160 if (!res->flags) {
161 if (i > 0)
162 continue;
163 printk(KERN_ERR "Memory resource not set for "
164 "host bridge %d\n", pci_ctrl->index);
165 res->start = 0;
166 res->end = ~0U;
167 res->flags = IORESOURCE_MEM;
168 }
169 pci_add_resource(resources, res);
170 }
171}
172
137static int __init pcibios_init(void) 173static int __init pcibios_init(void)
138{ 174{
139 struct pci_controller *pci_ctrl; 175 struct pci_controller *pci_ctrl;
176 struct list_head resources;
140 struct pci_bus *bus; 177 struct pci_bus *bus;
141 int next_busno = 0, i; 178 int next_busno = 0, i;
142 179
@@ -145,19 +182,10 @@ static int __init pcibios_init(void)
145 /* Scan all of the recorded PCI controllers. */ 182 /* Scan all of the recorded PCI controllers. */
146 for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) { 183 for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
147 pci_ctrl->last_busno = 0xff; 184 pci_ctrl->last_busno = 0xff;
148 bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops, 185 INIT_LIST_HEAD(&resources);
149 pci_ctrl); 186 pci_controller_apertures(pci_ctrl, &resources);
150 if (pci_ctrl->io_resource.flags) { 187 bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
151 unsigned long offs; 188 pci_ctrl->ops, pci_ctrl, &resources);
152
153 offs = (unsigned long)pci_ctrl->io_space.base;
154 pci_ctrl->io_resource.start += offs;
155 pci_ctrl->io_resource.end += offs;
156 bus->resource[0] = &pci_ctrl->io_resource;
157 }
158 for (i = 0; i < 3; ++i)
159 if (pci_ctrl->mem_resources[i].flags)
160 bus->resource[i+1] =&pci_ctrl->mem_resources[i];
161 pci_ctrl->bus = bus; 189 pci_ctrl->bus = bus;
162 pci_ctrl->last_busno = bus->subordinate; 190 pci_ctrl->last_busno = bus->subordinate;
163 if (next_busno <= pci_ctrl->last_busno) 191 if (next_busno <= pci_ctrl->last_busno)
@@ -178,36 +206,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
178 int i; 206 int i;
179 207
180 io_offset = (unsigned long)pci_ctrl->io_space.base; 208 io_offset = (unsigned long)pci_ctrl->io_space.base;
181 if (bus->parent == NULL) { 209 if (bus->parent) {
182 /* this is a host bridge - fill in its resources */
183 pci_ctrl->bus = bus;
184
185 bus->resource[0] = res = &pci_ctrl->io_resource;
186 if (!res->flags) {
187 if (io_offset)
188 printk (KERN_ERR "I/O resource not set for host"
189 " bridge %d\n", pci_ctrl->index);
190 res->start = 0;
191 res->end = IO_SPACE_LIMIT;
192 res->flags = IORESOURCE_IO;
193 }
194 res->start += io_offset;
195 res->end += io_offset;
196
197 for (i = 0; i < 3; i++) {
198 res = &pci_ctrl->mem_resources[i];
199 if (!res->flags) {
200 if (i > 0)
201 continue;
202 printk(KERN_ERR "Memory resource not set for "
203 "host bridge %d\n", pci_ctrl->index);
204 res->start = 0;
205 res->end = ~0U;
206 res->flags = IORESOURCE_MEM;
207 }
208 bus->resource[i+1] = res;
209 }
210 } else {
211 /* This is a subordinate bridge */ 210 /* This is a subordinate bridge */
212 pci_read_bridge_bases(bus); 211 pci_read_bridge_bases(bus);
213 212
@@ -227,6 +226,11 @@ char __init *pcibios_setup(char *str)
227 return str; 226 return str;
228} 227}
229 228
229void pcibios_set_master(struct pci_dev *dev)
230{
231 /* No special bus mastering setup handling */
232}
233
230/* the next one is stolen from the alpha port... */ 234/* the next one is stolen from the alpha port... */
231 235
232void __init 236void __init
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index 7f9eba9a0b02..0eefa12e648c 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -487,10 +487,10 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
487 else 487 else
488 link_desc[0] = '\0'; 488 link_desc[0] = '\0';
489 489
490 dev_info(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n", 490 dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
491 pin_name(pin), link_desc, gsi, 491 pin_name(pin), link_desc, gsi,
492 (triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge", 492 (triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
493 (polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq); 493 (polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
494 494
495 return 0; 495 return 0;
496} 496}
@@ -524,6 +524,6 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
524 * (e.g. PCI_UNDEFINED_IRQ). 524 * (e.g. PCI_UNDEFINED_IRQ).
525 */ 525 */
526 526
527 dev_info(&dev->dev, "PCI INT %c disabled\n", pin_name(pin)); 527 dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
528 acpi_unregister_gsi(gsi); 528 acpi_unregister_gsi(gsi);
529} 529}
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index bcd5d54b7d4d..7ff10c1e8664 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -562,19 +562,6 @@ dino_fixup_bus(struct pci_bus *bus)
562 /* Firmware doesn't set up card-mode dino, so we have to */ 562 /* Firmware doesn't set up card-mode dino, so we have to */
563 if (is_card_dino(&dino_dev->hba.dev->id)) { 563 if (is_card_dino(&dino_dev->hba.dev->id)) {
564 dino_card_setup(bus, dino_dev->hba.base_addr); 564 dino_card_setup(bus, dino_dev->hba.base_addr);
565 } else if(bus->parent == NULL) {
566 /* must have a dino above it, reparent the resources
567 * into the dino window */
568 int i;
569 struct resource *res = &dino_dev->hba.lmmio_space;
570
571 bus->resource[0] = &(dino_dev->hba.io_space);
572 for(i = 0; i < DINO_MAX_LMMIO_RESOURCES; i++) {
573 if(res[i].flags == 0)
574 break;
575 bus->resource[i+1] = &res[i];
576 }
577
578 } else if (bus->parent) { 565 } else if (bus->parent) {
579 int i; 566 int i;
580 567
@@ -927,6 +914,7 @@ static int __init dino_probe(struct parisc_device *dev)
927 const char *version = "unknown"; 914 const char *version = "unknown";
928 char *name; 915 char *name;
929 int is_cujo = 0; 916 int is_cujo = 0;
917 LIST_HEAD(resources);
930 struct pci_bus *bus; 918 struct pci_bus *bus;
931 unsigned long hpa = dev->hpa.start; 919 unsigned long hpa = dev->hpa.start;
932 920
@@ -1003,26 +991,37 @@ static int __init dino_probe(struct parisc_device *dev)
1003 991
1004 dev->dev.platform_data = dino_dev; 992 dev->dev.platform_data = dino_dev;
1005 993
994 pci_add_resource(&resources, &dino_dev->hba.io_space);
995 if (dino_dev->hba.lmmio_space.flags)
996 pci_add_resource(&resources, &dino_dev->hba.lmmio_space);
997 if (dino_dev->hba.elmmio_space.flags)
998 pci_add_resource(&resources, &dino_dev->hba.elmmio_space);
999 if (dino_dev->hba.gmmio_space.flags)
1000 pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
1001
1006 /* 1002 /*
1007 ** It's not used to avoid chicken/egg problems 1003 ** It's not used to avoid chicken/egg problems
1008 ** with configuration accessor functions. 1004 ** with configuration accessor functions.
1009 */ 1005 */
1010 dino_dev->hba.hba_bus = bus = pci_scan_bus_parented(&dev->dev, 1006 dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev,
1011 dino_current_bus, &dino_cfg_ops, NULL); 1007 dino_current_bus, &dino_cfg_ops, NULL, &resources);
1012 1008 if (!bus) {
1013 if(bus) {
1014 /* This code *depends* on scanning being single threaded
1015 * if it isn't, this global bus number count will fail
1016 */
1017 dino_current_bus = bus->subordinate + 1;
1018 pci_bus_assign_resources(bus);
1019 pci_bus_add_devices(bus);
1020 } else {
1021 printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (duplicate bus number %d?)\n", 1009 printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (duplicate bus number %d?)\n",
1022 dev_name(&dev->dev), dino_current_bus); 1010 dev_name(&dev->dev), dino_current_bus);
1011 pci_free_resource_list(&resources);
1023 /* increment the bus number in case of duplicates */ 1012 /* increment the bus number in case of duplicates */
1024 dino_current_bus++; 1013 dino_current_bus++;
1014 return 0;
1025 } 1015 }
1016
1017 bus->subordinate = pci_scan_child_bus(bus);
1018
1019 /* This code *depends* on scanning being single threaded
1020 * if it isn't, this global bus number count will fail
1021 */
1022 dino_current_bus = bus->subordinate + 1;
1023 pci_bus_assign_resources(bus);
1024 pci_bus_add_devices(bus);
1026 return 0; 1025 return 0;
1027} 1026}
1028 1027
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 3aeb3279c92a..d5f3d753a108 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -653,7 +653,7 @@ lba_fixup_bus(struct pci_bus *bus)
653 } 653 }
654 } else { 654 } else {
655 /* Host-PCI Bridge */ 655 /* Host-PCI Bridge */
656 int err, i; 656 int err;
657 657
658 DBG("lba_fixup_bus() %s [%lx/%lx]/%lx\n", 658 DBG("lba_fixup_bus() %s [%lx/%lx]/%lx\n",
659 ldev->hba.io_space.name, 659 ldev->hba.io_space.name,
@@ -669,9 +669,6 @@ lba_fixup_bus(struct pci_bus *bus)
669 lba_dump_res(&ioport_resource, 2); 669 lba_dump_res(&ioport_resource, 2);
670 BUG(); 670 BUG();
671 } 671 }
672 /* advertize Host bridge resources to PCI bus */
673 bus->resource[0] = &(ldev->hba.io_space);
674 i = 1;
675 672
676 if (ldev->hba.elmmio_space.start) { 673 if (ldev->hba.elmmio_space.start) {
677 err = request_resource(&iomem_resource, 674 err = request_resource(&iomem_resource,
@@ -685,35 +682,17 @@ lba_fixup_bus(struct pci_bus *bus)
685 682
686 /* lba_dump_res(&iomem_resource, 2); */ 683 /* lba_dump_res(&iomem_resource, 2); */
687 /* BUG(); */ 684 /* BUG(); */
688 } else 685 }
689 bus->resource[i++] = &(ldev->hba.elmmio_space);
690 } 686 }
691 687
692 688 if (ldev->hba.lmmio_space.flags) {
693 /* Overlaps with elmmio can (and should) fail here.
694 * We will prune (or ignore) the distributed range.
695 *
696 * FIXME: SBA code should register all elmmio ranges first.
697 * that would take care of elmmio ranges routed
698 * to a different rope (already discovered) from
699 * getting registered *after* LBA code has already
700 * registered it's distributed lmmio range.
701 */
702 if (truncate_pat_collision(&iomem_resource,
703 &(ldev->hba.lmmio_space))) {
704
705 printk(KERN_WARNING "LBA: lmmio_space [%lx/%lx] duplicate!\n",
706 (long)ldev->hba.lmmio_space.start,
707 (long)ldev->hba.lmmio_space.end);
708 } else {
709 err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space)); 689 err = request_resource(&iomem_resource, &(ldev->hba.lmmio_space));
710 if (err < 0) { 690 if (err < 0) {
711 printk(KERN_ERR "FAILED: lba_fixup_bus() request for " 691 printk(KERN_ERR "FAILED: lba_fixup_bus() request for "
712 "lmmio_space [%lx/%lx]\n", 692 "lmmio_space [%lx/%lx]\n",
713 (long)ldev->hba.lmmio_space.start, 693 (long)ldev->hba.lmmio_space.start,
714 (long)ldev->hba.lmmio_space.end); 694 (long)ldev->hba.lmmio_space.end);
715 } else 695 }
716 bus->resource[i++] = &(ldev->hba.lmmio_space);
717 } 696 }
718 697
719#ifdef CONFIG_64BIT 698#ifdef CONFIG_64BIT
@@ -728,7 +707,6 @@ lba_fixup_bus(struct pci_bus *bus)
728 lba_dump_res(&iomem_resource, 2); 707 lba_dump_res(&iomem_resource, 2);
729 BUG(); 708 BUG();
730 } 709 }
731 bus->resource[i++] = &(ldev->hba.gmmio_space);
732 } 710 }
733#endif 711#endif
734 712
@@ -1404,6 +1382,7 @@ static int __init
1404lba_driver_probe(struct parisc_device *dev) 1382lba_driver_probe(struct parisc_device *dev)
1405{ 1383{
1406 struct lba_device *lba_dev; 1384 struct lba_device *lba_dev;
1385 LIST_HEAD(resources);
1407 struct pci_bus *lba_bus; 1386 struct pci_bus *lba_bus;
1408 struct pci_ops *cfg_ops; 1387 struct pci_ops *cfg_ops;
1409 u32 func_class; 1388 u32 func_class;
@@ -1518,10 +1497,41 @@ lba_driver_probe(struct parisc_device *dev)
1518 if (lba_dev->hba.bus_num.start < lba_next_bus) 1497 if (lba_dev->hba.bus_num.start < lba_next_bus)
1519 lba_dev->hba.bus_num.start = lba_next_bus; 1498 lba_dev->hba.bus_num.start = lba_next_bus;
1520 1499
1500 /* Overlaps with elmmio can (and should) fail here.
1501 * We will prune (or ignore) the distributed range.
1502 *
1503 * FIXME: SBA code should register all elmmio ranges first.
1504 * that would take care of elmmio ranges routed
1505 * to a different rope (already discovered) from
1506 * getting registered *after* LBA code has already
1507 * registered it's distributed lmmio range.
1508 */
1509 if (truncate_pat_collision(&iomem_resource,
1510 &(lba_dev->hba.lmmio_space))) {
1511 printk(KERN_WARNING "LBA: lmmio_space [%lx/%lx] duplicate!\n",
1512 (long)lba_dev->hba.lmmio_space.start,
1513 (long)lba_dev->hba.lmmio_space.end);
1514 lba_dev->hba.lmmio_space.flags = 0;
1515 }
1516
1517 pci_add_resource(&resources, &lba_dev->hba.io_space);
1518 if (lba_dev->hba.elmmio_space.start)
1519 pci_add_resource(&resources, &lba_dev->hba.elmmio_space);
1520 if (lba_dev->hba.lmmio_space.flags)
1521 pci_add_resource(&resources, &lba_dev->hba.lmmio_space);
1522 if (lba_dev->hba.gmmio_space.flags)
1523 pci_add_resource(&resources, &lba_dev->hba.gmmio_space);
1524
1521 dev->dev.platform_data = lba_dev; 1525 dev->dev.platform_data = lba_dev;
1522 lba_bus = lba_dev->hba.hba_bus = 1526 lba_bus = lba_dev->hba.hba_bus =
1523 pci_scan_bus_parented(&dev->dev, lba_dev->hba.bus_num.start, 1527 pci_create_root_bus(&dev->dev, lba_dev->hba.bus_num.start,
1524 cfg_ops, NULL); 1528 cfg_ops, NULL, &resources);
1529 if (!lba_bus) {
1530 pci_free_resource_list(&resources);
1531 return 0;
1532 }
1533
1534 lba_bus->subordinate = pci_scan_child_bus(lba_bus);
1525 1535
1526 /* This is in lieu of calling pci_assign_unassigned_resources() */ 1536 /* This is in lieu of calling pci_assign_unassigned_resources() */
1527 if (is_pdc_pat()) { 1537 if (is_pdc_pat()) {
@@ -1551,10 +1561,8 @@ lba_driver_probe(struct parisc_device *dev)
1551 lba_dev->flags |= LBA_FLAG_SKIP_PROBE; 1561 lba_dev->flags |= LBA_FLAG_SKIP_PROBE;
1552 } 1562 }
1553 1563
1554 if (lba_bus) { 1564 lba_next_bus = lba_bus->subordinate + 1;
1555 lba_next_bus = lba_bus->subordinate + 1; 1565 pci_bus_add_devices(lba_bus);
1556 pci_bus_add_devices(lba_bus);
1557 }
1558 1566
1559 /* Whew! Finally done! Tell services we got this one covered. */ 1567 /* Whew! Finally done! Tell services we got this one covered. */
1560 return 0; 1568 return 0;
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index fdaa42aac7c6..2a581642c237 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -13,7 +13,7 @@
13 * configuration space. 13 * configuration space.
14 */ 14 */
15 15
16static DEFINE_RAW_SPINLOCK(pci_lock); 16DEFINE_RAW_SPINLOCK(pci_lock);
17 17
18/* 18/*
19 * Wrappers for all PCI configuration access functions. They just check 19 * Wrappers for all PCI configuration access functions. They just check
@@ -127,20 +127,20 @@ EXPORT_SYMBOL(pci_write_vpd);
127 * We have a bit per device to indicate it's blocked and a global wait queue 127 * We have a bit per device to indicate it's blocked and a global wait queue
128 * for callers to sleep on until devices are unblocked. 128 * for callers to sleep on until devices are unblocked.
129 */ 129 */
130static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait); 130static DECLARE_WAIT_QUEUE_HEAD(pci_cfg_wait);
131 131
132static noinline void pci_wait_ucfg(struct pci_dev *dev) 132static noinline void pci_wait_cfg(struct pci_dev *dev)
133{ 133{
134 DECLARE_WAITQUEUE(wait, current); 134 DECLARE_WAITQUEUE(wait, current);
135 135
136 __add_wait_queue(&pci_ucfg_wait, &wait); 136 __add_wait_queue(&pci_cfg_wait, &wait);
137 do { 137 do {
138 set_current_state(TASK_UNINTERRUPTIBLE); 138 set_current_state(TASK_UNINTERRUPTIBLE);
139 raw_spin_unlock_irq(&pci_lock); 139 raw_spin_unlock_irq(&pci_lock);
140 schedule(); 140 schedule();
141 raw_spin_lock_irq(&pci_lock); 141 raw_spin_lock_irq(&pci_lock);
142 } while (dev->block_ucfg_access); 142 } while (dev->block_cfg_access);
143 __remove_wait_queue(&pci_ucfg_wait, &wait); 143 __remove_wait_queue(&pci_cfg_wait, &wait);
144} 144}
145 145
146/* Returns 0 on success, negative values indicate error. */ 146/* Returns 0 on success, negative values indicate error. */
@@ -153,7 +153,8 @@ int pci_user_read_config_##size \
153 if (PCI_##size##_BAD) \ 153 if (PCI_##size##_BAD) \
154 return -EINVAL; \ 154 return -EINVAL; \
155 raw_spin_lock_irq(&pci_lock); \ 155 raw_spin_lock_irq(&pci_lock); \
156 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ 156 if (unlikely(dev->block_cfg_access)) \
157 pci_wait_cfg(dev); \
157 ret = dev->bus->ops->read(dev->bus, dev->devfn, \ 158 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
158 pos, sizeof(type), &data); \ 159 pos, sizeof(type), &data); \
159 raw_spin_unlock_irq(&pci_lock); \ 160 raw_spin_unlock_irq(&pci_lock); \
@@ -172,7 +173,8 @@ int pci_user_write_config_##size \
172 if (PCI_##size##_BAD) \ 173 if (PCI_##size##_BAD) \
173 return -EINVAL; \ 174 return -EINVAL; \
174 raw_spin_lock_irq(&pci_lock); \ 175 raw_spin_lock_irq(&pci_lock); \
175 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ 176 if (unlikely(dev->block_cfg_access)) \
177 pci_wait_cfg(dev); \
176 ret = dev->bus->ops->write(dev->bus, dev->devfn, \ 178 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
177 pos, sizeof(type), val); \ 179 pos, sizeof(type), val); \
178 raw_spin_unlock_irq(&pci_lock); \ 180 raw_spin_unlock_irq(&pci_lock); \
@@ -401,36 +403,56 @@ int pci_vpd_truncate(struct pci_dev *dev, size_t size)
401EXPORT_SYMBOL(pci_vpd_truncate); 403EXPORT_SYMBOL(pci_vpd_truncate);
402 404
403/** 405/**
404 * pci_block_user_cfg_access - Block userspace PCI config reads/writes 406 * pci_cfg_access_lock - Lock PCI config reads/writes
405 * @dev: pci device struct 407 * @dev: pci device struct
406 * 408 *
407 * When user access is blocked, any reads or writes to config space will 409 * When access is locked, any userspace reads or writes to config
408 * sleep until access is unblocked again. We don't allow nesting of 410 * space and concurrent lock requests will sleep until access is
409 * block/unblock calls. 411 * allowed via pci_cfg_access_unlocked again.
410 */ 412 */
411void pci_block_user_cfg_access(struct pci_dev *dev) 413void pci_cfg_access_lock(struct pci_dev *dev)
414{
415 might_sleep();
416
417 raw_spin_lock_irq(&pci_lock);
418 if (dev->block_cfg_access)
419 pci_wait_cfg(dev);
420 dev->block_cfg_access = 1;
421 raw_spin_unlock_irq(&pci_lock);
422}
423EXPORT_SYMBOL_GPL(pci_cfg_access_lock);
424
425/**
426 * pci_cfg_access_trylock - try to lock PCI config reads/writes
427 * @dev: pci device struct
428 *
429 * Same as pci_cfg_access_lock, but will return 0 if access is
430 * already locked, 1 otherwise. This function can be used from
431 * atomic contexts.
432 */
433bool pci_cfg_access_trylock(struct pci_dev *dev)
412{ 434{
413 unsigned long flags; 435 unsigned long flags;
414 int was_blocked; 436 bool locked = true;
415 437
416 raw_spin_lock_irqsave(&pci_lock, flags); 438 raw_spin_lock_irqsave(&pci_lock, flags);
417 was_blocked = dev->block_ucfg_access; 439 if (dev->block_cfg_access)
418 dev->block_ucfg_access = 1; 440 locked = false;
441 else
442 dev->block_cfg_access = 1;
419 raw_spin_unlock_irqrestore(&pci_lock, flags); 443 raw_spin_unlock_irqrestore(&pci_lock, flags);
420 444
421 /* If we BUG() inside the pci_lock, we're guaranteed to hose 445 return locked;
422 * the machine */
423 BUG_ON(was_blocked);
424} 446}
425EXPORT_SYMBOL_GPL(pci_block_user_cfg_access); 447EXPORT_SYMBOL_GPL(pci_cfg_access_trylock);
426 448
427/** 449/**
428 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes 450 * pci_cfg_access_unlock - Unlock PCI config reads/writes
429 * @dev: pci device struct 451 * @dev: pci device struct
430 * 452 *
431 * This function allows userspace PCI config accesses to resume. 453 * This function allows PCI config accesses to resume.
432 */ 454 */
433void pci_unblock_user_cfg_access(struct pci_dev *dev) 455void pci_cfg_access_unlock(struct pci_dev *dev)
434{ 456{
435 unsigned long flags; 457 unsigned long flags;
436 458
@@ -438,10 +460,10 @@ void pci_unblock_user_cfg_access(struct pci_dev *dev)
438 460
439 /* This indicates a problem in the caller, but we don't need 461 /* This indicates a problem in the caller, but we don't need
440 * to kill them, unlike a double-block above. */ 462 * to kill them, unlike a double-block above. */
441 WARN_ON(!dev->block_ucfg_access); 463 WARN_ON(!dev->block_cfg_access);
442 464
443 dev->block_ucfg_access = 0; 465 dev->block_cfg_access = 0;
444 wake_up_all(&pci_ucfg_wait); 466 wake_up_all(&pci_cfg_wait);
445 raw_spin_unlock_irqrestore(&pci_lock, flags); 467 raw_spin_unlock_irqrestore(&pci_lock, flags);
446} 468}
447EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access); 469EXPORT_SYMBOL_GPL(pci_cfg_access_unlock);
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index 9dd90b30f91a..95655d7c0d0b 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -128,6 +128,23 @@ void pci_disable_ats(struct pci_dev *dev)
128} 128}
129EXPORT_SYMBOL_GPL(pci_disable_ats); 129EXPORT_SYMBOL_GPL(pci_disable_ats);
130 130
131void pci_restore_ats_state(struct pci_dev *dev)
132{
133 u16 ctrl;
134
135 if (!pci_ats_enabled(dev))
136 return;
137 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS))
138 BUG();
139
140 ctrl = PCI_ATS_CTRL_ENABLE;
141 if (!dev->is_virtfn)
142 ctrl |= PCI_ATS_CTRL_STU(dev->ats->stu - PCI_ATS_MIN_STU);
143
144 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
145}
146EXPORT_SYMBOL_GPL(pci_restore_ats_state);
147
131/** 148/**
132 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth 149 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
133 * @dev: the PCI device 150 * @dev: the PCI device
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 1e2ad92a4752..398f5d859791 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -18,6 +18,32 @@
18 18
19#include "pci.h" 19#include "pci.h"
20 20
21void pci_add_resource(struct list_head *resources, struct resource *res)
22{
23 struct pci_bus_resource *bus_res;
24
25 bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
26 if (!bus_res) {
27 printk(KERN_ERR "PCI: can't add bus resource %pR\n", res);
28 return;
29 }
30
31 bus_res->res = res;
32 list_add_tail(&bus_res->list, resources);
33}
34EXPORT_SYMBOL(pci_add_resource);
35
36void pci_free_resource_list(struct list_head *resources)
37{
38 struct pci_bus_resource *bus_res, *tmp;
39
40 list_for_each_entry_safe(bus_res, tmp, resources, list) {
41 list_del(&bus_res->list);
42 kfree(bus_res);
43 }
44}
45EXPORT_SYMBOL(pci_free_resource_list);
46
21void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, 47void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
22 unsigned int flags) 48 unsigned int flags)
23{ 49{
@@ -52,16 +78,12 @@ EXPORT_SYMBOL_GPL(pci_bus_resource_n);
52 78
53void pci_bus_remove_resources(struct pci_bus *bus) 79void pci_bus_remove_resources(struct pci_bus *bus)
54{ 80{
55 struct pci_bus_resource *bus_res, *tmp;
56 int i; 81 int i;
57 82
58 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) 83 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
59 bus->resource[i] = NULL; 84 bus->resource[i] = NULL;
60 85
61 list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { 86 pci_free_resource_list(&bus->resources);
62 list_del(&bus_res->list);
63 kfree(bus_res);
64 }
65} 87}
66 88
67/** 89/**
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 1969a3ee3058..0321fa3b4226 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -347,11 +347,13 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
347 return rc; 347 return rc;
348 } 348 }
349 349
350 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
351
350 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; 352 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
351 pci_block_user_cfg_access(dev); 353 pci_cfg_access_lock(dev);
352 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 354 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
353 msleep(100); 355 msleep(100);
354 pci_unblock_user_cfg_access(dev); 356 pci_cfg_access_unlock(dev);
355 357
356 iov->initial = initial; 358 iov->initial = initial;
357 if (nr_virtfn < initial) 359 if (nr_virtfn < initial)
@@ -379,10 +381,10 @@ failed:
379 virtfn_remove(dev, j, 0); 381 virtfn_remove(dev, j, 0);
380 382
381 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); 383 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
382 pci_block_user_cfg_access(dev); 384 pci_cfg_access_lock(dev);
383 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 385 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
384 ssleep(1); 386 ssleep(1);
385 pci_unblock_user_cfg_access(dev); 387 pci_cfg_access_unlock(dev);
386 388
387 if (iov->link != dev->devfn) 389 if (iov->link != dev->devfn)
388 sysfs_remove_link(&dev->dev.kobj, "dep_link"); 390 sysfs_remove_link(&dev->dev.kobj, "dep_link");
@@ -405,10 +407,10 @@ static void sriov_disable(struct pci_dev *dev)
405 virtfn_remove(dev, i, 0); 407 virtfn_remove(dev, i, 0);
406 408
407 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); 409 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
408 pci_block_user_cfg_access(dev); 410 pci_cfg_access_lock(dev);
409 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 411 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
410 ssleep(1); 412 ssleep(1);
411 pci_unblock_user_cfg_access(dev); 413 pci_cfg_access_unlock(dev);
412 414
413 if (iov->link != dev->devfn) 415 if (iov->link != dev->devfn)
414 sysfs_remove_link(&dev->dev.kobj, "dep_link"); 416 sysfs_remove_link(&dev->dev.kobj, "dep_link");
@@ -452,7 +454,6 @@ static int sriov_init(struct pci_dev *dev, int pos)
452 454
453found: 455found:
454 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); 456 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
455 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
456 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset); 457 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
457 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride); 458 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
458 if (!offset || (total > 1 && !stride)) 459 if (!offset || (total > 1 && !stride))
@@ -465,7 +466,6 @@ found:
465 return -EIO; 466 return -EIO;
466 467
467 pgsz &= ~(pgsz - 1); 468 pgsz &= ~(pgsz - 1);
468 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
469 469
470 nres = 0; 470 nres = 0;
471 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 471 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 337e16ab4a92..a825d78fd0aa 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -86,6 +86,31 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
86} 86}
87#endif 87#endif
88 88
89#ifndef arch_restore_msi_irqs
90# define arch_restore_msi_irqs default_restore_msi_irqs
91# define HAVE_DEFAULT_MSI_RESTORE_IRQS
92#endif
93
94#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
95void default_restore_msi_irqs(struct pci_dev *dev, int irq)
96{
97 struct msi_desc *entry;
98
99 entry = NULL;
100 if (dev->msix_enabled) {
101 list_for_each_entry(entry, &dev->msi_list, list) {
102 if (irq == entry->irq)
103 break;
104 }
105 } else if (dev->msi_enabled) {
106 entry = irq_get_msi_desc(irq);
107 }
108
109 if (entry)
110 write_msi_msg(irq, &entry->msg);
111}
112#endif
113
89static void msi_set_enable(struct pci_dev *dev, int pos, int enable) 114static void msi_set_enable(struct pci_dev *dev, int pos, int enable)
90{ 115{
91 u16 control; 116 u16 control;
@@ -323,8 +348,18 @@ static void free_msi_irqs(struct pci_dev *dev)
323 if (list_is_last(&entry->list, &dev->msi_list)) 348 if (list_is_last(&entry->list, &dev->msi_list))
324 iounmap(entry->mask_base); 349 iounmap(entry->mask_base);
325 } 350 }
326 kobject_del(&entry->kobj); 351
327 kobject_put(&entry->kobj); 352 /*
353 * Its possible that we get into this path
354 * When populate_msi_sysfs fails, which means the entries
355 * were not registered with sysfs. In that case don't
356 * unregister them.
357 */
358 if (entry->kobj.parent) {
359 kobject_del(&entry->kobj);
360 kobject_put(&entry->kobj);
361 }
362
328 list_del(&entry->list); 363 list_del(&entry->list);
329 kfree(entry); 364 kfree(entry);
330 } 365 }
@@ -362,7 +397,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
362 397
363 pci_intx_for_msi(dev, 0); 398 pci_intx_for_msi(dev, 0);
364 msi_set_enable(dev, pos, 0); 399 msi_set_enable(dev, pos, 0);
365 write_msi_msg(dev->irq, &entry->msg); 400 arch_restore_msi_irqs(dev, dev->irq);
366 401
367 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); 402 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
368 msi_mask_irq(entry, msi_capable_mask(control), entry->masked); 403 msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
@@ -390,7 +425,7 @@ static void __pci_restore_msix_state(struct pci_dev *dev)
390 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 425 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
391 426
392 list_for_each_entry(entry, &dev->msi_list, list) { 427 list_for_each_entry(entry, &dev->msi_list, list) {
393 write_msi_msg(entry->irq, &entry->msg); 428 arch_restore_msi_irqs(dev, entry->irq);
394 msix_mask_irq(entry, entry->masked); 429 msix_mask_irq(entry, entry->masked);
395 } 430 }
396 431
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 12d1e81a8abe..3623d65f8b86 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -604,7 +604,8 @@ static bool pci_has_legacy_pm_support(struct pci_dev *pci_dev)
604 * supported as well. Drivers are supposed to support either the 604 * supported as well. Drivers are supposed to support either the
605 * former, or the latter, but not both at the same time. 605 * former, or the latter, but not both at the same time.
606 */ 606 */
607 WARN_ON(ret && drv->driver.pm); 607 WARN(ret && drv->driver.pm, "driver %s device %04x:%04x\n",
608 drv->name, pci_dev->vendor, pci_dev->device);
608 609
609 return ret; 610 return ret;
610} 611}
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6d4a5319148d..97fff785e97e 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -88,6 +88,12 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_TUNE_OFF;
88u8 pci_dfl_cache_line_size __devinitdata = L1_CACHE_BYTES >> 2; 88u8 pci_dfl_cache_line_size __devinitdata = L1_CACHE_BYTES >> 2;
89u8 pci_cache_line_size; 89u8 pci_cache_line_size;
90 90
91/*
92 * If we set up a device for bus mastering, we need to check the latency
93 * timer as certain BIOSes forget to set it properly.
94 */
95unsigned int pcibios_max_latency = 255;
96
91/** 97/**
92 * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children 98 * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
93 * @bus: pointer to PCI bus structure to search 99 * @bus: pointer to PCI bus structure to search
@@ -959,6 +965,7 @@ void pci_restore_state(struct pci_dev *dev)
959 965
960 /* PCI Express register must be restored first */ 966 /* PCI Express register must be restored first */
961 pci_restore_pcie_state(dev); 967 pci_restore_pcie_state(dev);
968 pci_restore_ats_state(dev);
962 969
963 /* 970 /*
964 * The Base Address register should be programmed before the command 971 * The Base Address register should be programmed before the command
@@ -967,7 +974,7 @@ void pci_restore_state(struct pci_dev *dev)
967 for (i = 15; i >= 0; i--) { 974 for (i = 15; i >= 0; i--) {
968 pci_read_config_dword(dev, i * 4, &val); 975 pci_read_config_dword(dev, i * 4, &val);
969 if (val != dev->saved_config_space[i]) { 976 if (val != dev->saved_config_space[i]) {
970 dev_printk(KERN_DEBUG, &dev->dev, "restoring config " 977 dev_dbg(&dev->dev, "restoring config "
971 "space at offset %#x (was %#x, writing %#x)\n", 978 "space at offset %#x (was %#x, writing %#x)\n",
972 i, val, (int)dev->saved_config_space[i]); 979 i, val, (int)dev->saved_config_space[i]);
973 pci_write_config_dword(dev,i * 4, 980 pci_write_config_dword(dev,i * 4,
@@ -1536,8 +1543,7 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
1536 } 1543 }
1537 1544
1538out: 1545out:
1539 dev_printk(KERN_DEBUG, &dev->dev, "PME# %s\n", 1546 dev_dbg(&dev->dev, "PME# %s\n", enable ? "enabled" : "disabled");
1540 enable ? "enabled" : "disabled");
1541} 1547}
1542 1548
1543/** 1549/**
@@ -2596,6 +2602,33 @@ static void __pci_set_master(struct pci_dev *dev, bool enable)
2596} 2602}
2597 2603
2598/** 2604/**
2605 * pcibios_set_master - enable PCI bus-mastering for device dev
2606 * @dev: the PCI device to enable
2607 *
2608 * Enables PCI bus-mastering for the device. This is the default
2609 * implementation. Architecture specific implementations can override
2610 * this if necessary.
2611 */
2612void __weak pcibios_set_master(struct pci_dev *dev)
2613{
2614 u8 lat;
2615
2616 /* The latency timer doesn't apply to PCIe (either Type 0 or Type 1) */
2617 if (pci_is_pcie(dev))
2618 return;
2619
2620 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
2621 if (lat < 16)
2622 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
2623 else if (lat > pcibios_max_latency)
2624 lat = pcibios_max_latency;
2625 else
2626 return;
2627 dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
2628 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
2629}
2630
2631/**
2599 * pci_set_master - enables bus-mastering for device dev 2632 * pci_set_master - enables bus-mastering for device dev
2600 * @dev: the PCI device to enable 2633 * @dev: the PCI device to enable
2601 * 2634 *
@@ -2768,6 +2801,116 @@ pci_intx(struct pci_dev *pdev, int enable)
2768} 2801}
2769 2802
2770/** 2803/**
2804 * pci_intx_mask_supported - probe for INTx masking support
2805 * @pdev: the PCI device to operate on
2806 *
2807 * Check if the device dev support INTx masking via the config space
2808 * command word.
2809 */
2810bool pci_intx_mask_supported(struct pci_dev *dev)
2811{
2812 bool mask_supported = false;
2813 u16 orig, new;
2814
2815 pci_cfg_access_lock(dev);
2816
2817 pci_read_config_word(dev, PCI_COMMAND, &orig);
2818 pci_write_config_word(dev, PCI_COMMAND,
2819 orig ^ PCI_COMMAND_INTX_DISABLE);
2820 pci_read_config_word(dev, PCI_COMMAND, &new);
2821
2822 /*
2823 * There's no way to protect against hardware bugs or detect them
2824 * reliably, but as long as we know what the value should be, let's
2825 * go ahead and check it.
2826 */
2827 if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
2828 dev_err(&dev->dev, "Command register changed from "
2829 "0x%x to 0x%x: driver or hardware bug?\n", orig, new);
2830 } else if ((new ^ orig) & PCI_COMMAND_INTX_DISABLE) {
2831 mask_supported = true;
2832 pci_write_config_word(dev, PCI_COMMAND, orig);
2833 }
2834
2835 pci_cfg_access_unlock(dev);
2836 return mask_supported;
2837}
2838EXPORT_SYMBOL_GPL(pci_intx_mask_supported);
2839
2840static bool pci_check_and_set_intx_mask(struct pci_dev *dev, bool mask)
2841{
2842 struct pci_bus *bus = dev->bus;
2843 bool mask_updated = true;
2844 u32 cmd_status_dword;
2845 u16 origcmd, newcmd;
2846 unsigned long flags;
2847 bool irq_pending;
2848
2849 /*
2850 * We do a single dword read to retrieve both command and status.
2851 * Document assumptions that make this possible.
2852 */
2853 BUILD_BUG_ON(PCI_COMMAND % 4);
2854 BUILD_BUG_ON(PCI_COMMAND + 2 != PCI_STATUS);
2855
2856 raw_spin_lock_irqsave(&pci_lock, flags);
2857
2858 bus->ops->read(bus, dev->devfn, PCI_COMMAND, 4, &cmd_status_dword);
2859
2860 irq_pending = (cmd_status_dword >> 16) & PCI_STATUS_INTERRUPT;
2861
2862 /*
2863 * Check interrupt status register to see whether our device
2864 * triggered the interrupt (when masking) or the next IRQ is
2865 * already pending (when unmasking).
2866 */
2867 if (mask != irq_pending) {
2868 mask_updated = false;
2869 goto done;
2870 }
2871
2872 origcmd = cmd_status_dword;
2873 newcmd = origcmd & ~PCI_COMMAND_INTX_DISABLE;
2874 if (mask)
2875 newcmd |= PCI_COMMAND_INTX_DISABLE;
2876 if (newcmd != origcmd)
2877 bus->ops->write(bus, dev->devfn, PCI_COMMAND, 2, newcmd);
2878
2879done:
2880 raw_spin_unlock_irqrestore(&pci_lock, flags);
2881
2882 return mask_updated;
2883}
2884
2885/**
2886 * pci_check_and_mask_intx - mask INTx on pending interrupt
2887 * @pdev: the PCI device to operate on
2888 *
2889 * Check if the device dev has its INTx line asserted, mask it and
2890 * return true in that case. False is returned if not interrupt was
2891 * pending.
2892 */
2893bool pci_check_and_mask_intx(struct pci_dev *dev)
2894{
2895 return pci_check_and_set_intx_mask(dev, true);
2896}
2897EXPORT_SYMBOL_GPL(pci_check_and_mask_intx);
2898
2899/**
2900 * pci_check_and_mask_intx - unmask INTx of no interrupt is pending
2901 * @pdev: the PCI device to operate on
2902 *
2903 * Check if the device dev has its INTx line asserted, unmask it if not
2904 * and return true. False is returned and the mask remains active if
2905 * there was still an interrupt pending.
2906 */
2907bool pci_check_and_unmask_intx(struct pci_dev *dev)
2908{
2909 return pci_check_and_set_intx_mask(dev, false);
2910}
2911EXPORT_SYMBOL_GPL(pci_check_and_unmask_intx);
2912
2913/**
2771 * pci_msi_off - disables any msi or msix capabilities 2914 * pci_msi_off - disables any msi or msix capabilities
2772 * @dev: the PCI device to operate on 2915 * @dev: the PCI device to operate on
2773 * 2916 *
@@ -2965,7 +3108,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
2965 might_sleep(); 3108 might_sleep();
2966 3109
2967 if (!probe) { 3110 if (!probe) {
2968 pci_block_user_cfg_access(dev); 3111 pci_cfg_access_lock(dev);
2969 /* block PM suspend, driver probe, etc. */ 3112 /* block PM suspend, driver probe, etc. */
2970 device_lock(&dev->dev); 3113 device_lock(&dev->dev);
2971 } 3114 }
@@ -2990,7 +3133,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
2990done: 3133done:
2991 if (!probe) { 3134 if (!probe) {
2992 device_unlock(&dev->dev); 3135 device_unlock(&dev->dev);
2993 pci_unblock_user_cfg_access(dev); 3136 pci_cfg_access_unlock(dev);
2994 } 3137 }
2995 3138
2996 return rc; 3139 return rc;
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index b74084e9ca12..1009a5e88e53 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -136,6 +136,8 @@ static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
136/* Lock for read/write access to pci device and bus lists */ 136/* Lock for read/write access to pci device and bus lists */
137extern struct rw_semaphore pci_bus_sem; 137extern struct rw_semaphore pci_bus_sem;
138 138
139extern raw_spinlock_t pci_lock;
140
139extern unsigned int pci_pm_d3_delay; 141extern unsigned int pci_pm_d3_delay;
140 142
141#ifdef CONFIG_PCI_MSI 143#ifdef CONFIG_PCI_MSI
@@ -249,6 +251,14 @@ struct pci_sriov {
249 u8 __iomem *mstate; /* VF Migration State Array */ 251 u8 __iomem *mstate; /* VF Migration State Array */
250}; 252};
251 253
254#ifdef CONFIG_PCI_ATS
255extern void pci_restore_ats_state(struct pci_dev *dev);
256#else
257static inline void pci_restore_ats_state(struct pci_dev *dev)
258{
259}
260#endif /* CONFIG_PCI_ATS */
261
252#ifdef CONFIG_PCI_IOV 262#ifdef CONFIG_PCI_IOV
253extern int pci_iov_init(struct pci_dev *dev); 263extern int pci_iov_init(struct pci_dev *dev);
254extern void pci_iov_release(struct pci_dev *dev); 264extern void pci_iov_release(struct pci_dev *dev);
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index dc29348264c6..72962cc92e0a 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -39,7 +39,7 @@ config PCIEASPM
39 Power Management) and Clock Power Management. ASPM supports 39 Power Management) and Clock Power Management. ASPM supports
40 state L0/L0s/L1. 40 state L0/L0s/L1.
41 41
42 ASPM is initially set up the the firmware. With this option enabled, 42 ASPM is initially set up by the firmware. With this option enabled,
43 Linux can modify this state in order to disable ASPM on known-bad 43 Linux can modify this state in order to disable ASPM on known-bad
44 hardware or configurations and enable it when known-safe. 44 hardware or configurations and enable it when known-safe.
45 45
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 04e74f485714..7cc9e2f0f47c 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1522,19 +1522,21 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
1522 return max; 1522 return max;
1523} 1523}
1524 1524
1525struct pci_bus * pci_create_bus(struct device *parent, 1525struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
1526 int bus, struct pci_ops *ops, void *sysdata) 1526 struct pci_ops *ops, void *sysdata, struct list_head *resources)
1527{ 1527{
1528 int error; 1528 int error, i;
1529 struct pci_bus *b, *b2; 1529 struct pci_bus *b, *b2;
1530 struct device *dev; 1530 struct device *dev;
1531 struct pci_bus_resource *bus_res, *n;
1532 struct resource *res;
1531 1533
1532 b = pci_alloc_bus(); 1534 b = pci_alloc_bus();
1533 if (!b) 1535 if (!b)
1534 return NULL; 1536 return NULL;
1535 1537
1536 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1538 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1537 if (!dev){ 1539 if (!dev) {
1538 kfree(b); 1540 kfree(b);
1539 return NULL; 1541 return NULL;
1540 } 1542 }
@@ -1577,8 +1579,20 @@ struct pci_bus * pci_create_bus(struct device *parent,
1577 pci_create_legacy_files(b); 1579 pci_create_legacy_files(b);
1578 1580
1579 b->number = b->secondary = bus; 1581 b->number = b->secondary = bus;
1580 b->resource[0] = &ioport_resource; 1582
1581 b->resource[1] = &iomem_resource; 1583 /* Add initial resources to the bus */
1584 list_for_each_entry_safe(bus_res, n, resources, list)
1585 list_move_tail(&bus_res->list, &b->resources);
1586
1587 if (parent)
1588 dev_info(parent, "PCI host bridge to bus %s\n", dev_name(&b->dev));
1589 else
1590 printk(KERN_INFO "PCI host bridge to bus %s\n", dev_name(&b->dev));
1591
1592 pci_bus_for_each_resource(b, res, i) {
1593 if (res)
1594 dev_info(&b->dev, "root bus resource %pR\n", res);
1595 }
1582 1596
1583 return b; 1597 return b;
1584 1598
@@ -1594,18 +1608,58 @@ err_out:
1594 return NULL; 1608 return NULL;
1595} 1609}
1596 1610
1611struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
1612 struct pci_ops *ops, void *sysdata, struct list_head *resources)
1613{
1614 struct pci_bus *b;
1615
1616 b = pci_create_root_bus(parent, bus, ops, sysdata, resources);
1617 if (!b)
1618 return NULL;
1619
1620 b->subordinate = pci_scan_child_bus(b);
1621 pci_bus_add_devices(b);
1622 return b;
1623}
1624EXPORT_SYMBOL(pci_scan_root_bus);
1625
1626/* Deprecated; use pci_scan_root_bus() instead */
1597struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent, 1627struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
1598 int bus, struct pci_ops *ops, void *sysdata) 1628 int bus, struct pci_ops *ops, void *sysdata)
1599{ 1629{
1630 LIST_HEAD(resources);
1600 struct pci_bus *b; 1631 struct pci_bus *b;
1601 1632
1602 b = pci_create_bus(parent, bus, ops, sysdata); 1633 pci_add_resource(&resources, &ioport_resource);
1634 pci_add_resource(&resources, &iomem_resource);
1635 b = pci_create_root_bus(parent, bus, ops, sysdata, &resources);
1603 if (b) 1636 if (b)
1604 b->subordinate = pci_scan_child_bus(b); 1637 b->subordinate = pci_scan_child_bus(b);
1638 else
1639 pci_free_resource_list(&resources);
1605 return b; 1640 return b;
1606} 1641}
1607EXPORT_SYMBOL(pci_scan_bus_parented); 1642EXPORT_SYMBOL(pci_scan_bus_parented);
1608 1643
1644struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
1645 void *sysdata)
1646{
1647 LIST_HEAD(resources);
1648 struct pci_bus *b;
1649
1650 pci_add_resource(&resources, &ioport_resource);
1651 pci_add_resource(&resources, &iomem_resource);
1652 b = pci_create_root_bus(NULL, bus, ops, sysdata, &resources);
1653 if (b) {
1654 b->subordinate = pci_scan_child_bus(b);
1655 pci_bus_add_devices(b);
1656 } else {
1657 pci_free_resource_list(&resources);
1658 }
1659 return b;
1660}
1661EXPORT_SYMBOL(pci_scan_bus);
1662
1609#ifdef CONFIG_HOTPLUG 1663#ifdef CONFIG_HOTPLUG
1610/** 1664/**
1611 * pci_rescan_bus - scan a PCI bus for devices. 1665 * pci_rescan_bus - scan a PCI bus for devices.
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 7f87beed35ac..6def3624c688 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -89,9 +89,8 @@ EXPORT_SYMBOL(pci_remove_bus);
89 * device lists, remove the /proc entry, and notify userspace 89 * device lists, remove the /proc entry, and notify userspace
90 * (/sbin/hotplug). 90 * (/sbin/hotplug).
91 */ 91 */
92void pci_remove_bus_device(struct pci_dev *dev) 92static void __pci_remove_bus_device(struct pci_dev *dev)
93{ 93{
94 pci_stop_bus_device(dev);
95 if (dev->subordinate) { 94 if (dev->subordinate) {
96 struct pci_bus *b = dev->subordinate; 95 struct pci_bus *b = dev->subordinate;
97 96
@@ -102,6 +101,11 @@ void pci_remove_bus_device(struct pci_dev *dev)
102 101
103 pci_destroy_dev(dev); 102 pci_destroy_dev(dev);
104} 103}
104void pci_remove_bus_device(struct pci_dev *dev)
105{
106 pci_stop_bus_device(dev);
107 __pci_remove_bus_device(dev);
108}
105 109
106/** 110/**
107 * pci_remove_behind_bridge - remove all devices behind a PCI bridge 111 * pci_remove_behind_bridge - remove all devices behind a PCI bridge
@@ -117,7 +121,7 @@ void pci_remove_behind_bridge(struct pci_dev *dev)
117 121
118 if (dev->subordinate) 122 if (dev->subordinate)
119 list_for_each_safe(l, n, &dev->subordinate->devices) 123 list_for_each_safe(l, n, &dev->subordinate->devices)
120 pci_remove_bus_device(pci_dev_b(l)); 124 __pci_remove_bus_device(pci_dev_b(l));
121} 125}
122 126
123static void pci_stop_bus_devices(struct pci_bus *bus) 127static void pci_stop_bus_devices(struct pci_bus *bus)
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 5717509becbe..b66bfdbd21f7 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -85,9 +85,9 @@ void pci_update_resource(struct pci_dev *dev, int resno)
85 } 85 }
86 } 86 }
87 res->flags &= ~IORESOURCE_UNSET; 87 res->flags &= ~IORESOURCE_UNSET;
88 dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n", 88 dev_dbg(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
89 resno, res, (unsigned long long)region.start, 89 resno, res, (unsigned long long)region.start,
90 (unsigned long long)region.end); 90 (unsigned long long)region.end);
91} 91}
92 92
93int pci_claim_resource(struct pci_dev *dev, int resource) 93int pci_claim_resource(struct pci_dev *dev, int resource)
diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c
index dfbd5a6cc58b..258fef272ea7 100644
--- a/drivers/pnp/quirks.c
+++ b/drivers/pnp/quirks.c
@@ -295,6 +295,45 @@ static void quirk_system_pci_resources(struct pnp_dev *dev)
295 } 295 }
296} 296}
297 297
298#ifdef CONFIG_AMD_NB
299
300#include <asm/amd_nb.h>
301
302static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
303{
304 resource_size_t start, end;
305 struct pnp_resource *pnp_res;
306 struct resource *res;
307 struct resource mmconfig_res, *mmconfig;
308
309 mmconfig = amd_get_mmconfig_range(&mmconfig_res);
310 if (!mmconfig)
311 return;
312
313 list_for_each_entry(pnp_res, &dev->resources, list) {
314 res = &pnp_res->res;
315 if (res->end < mmconfig->start || res->start > mmconfig->end ||
316 (res->start == mmconfig->start && res->end == mmconfig->end))
317 continue;
318
319 dev_info(&dev->dev, FW_BUG
320 "%pR covers only part of AMD MMCONFIG area %pR; adding more reservations\n",
321 res, mmconfig);
322 if (mmconfig->start < res->start) {
323 start = mmconfig->start;
324 end = res->start - 1;
325 pnp_add_mem_resource(dev, start, end, 0);
326 }
327 if (mmconfig->end > res->end) {
328 start = res->end + 1;
329 end = mmconfig->end;
330 pnp_add_mem_resource(dev, start, end, 0);
331 }
332 break;
333 }
334}
335#endif
336
298/* 337/*
299 * PnP Quirks 338 * PnP Quirks
300 * Cards or devices that need some tweaking due to incomplete resource info 339 * Cards or devices that need some tweaking due to incomplete resource info
@@ -322,6 +361,9 @@ static struct pnp_fixup pnp_fixups[] = {
322 /* PnP resources that might overlap PCI BARs */ 361 /* PnP resources that might overlap PCI BARs */
323 {"PNP0c01", quirk_system_pci_resources}, 362 {"PNP0c01", quirk_system_pci_resources},
324 {"PNP0c02", quirk_system_pci_resources}, 363 {"PNP0c02", quirk_system_pci_resources},
364#ifdef CONFIG_AMD_NB
365 {"PNP0c01", quirk_amd_mmconfig_area},
366#endif
325 {""} 367 {""}
326}; 368};
327 369
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index fd860d952b28..67b169b7a5be 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -7638,8 +7638,12 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
7638 **/ 7638 **/
7639static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd) 7639static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
7640{ 7640{
7641 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
7642
7641 ENTER; 7643 ENTER;
7642 pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev); 7644 if (ioa_cfg->cfg_locked)
7645 pci_cfg_access_unlock(ioa_cfg->pdev);
7646 ioa_cfg->cfg_locked = 0;
7643 ipr_cmd->job_step = ipr_reset_restore_cfg_space; 7647 ipr_cmd->job_step = ipr_reset_restore_cfg_space;
7644 LEAVE; 7648 LEAVE;
7645 return IPR_RC_JOB_CONTINUE; 7649 return IPR_RC_JOB_CONTINUE;
@@ -7660,8 +7664,6 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
7660 int rc = PCIBIOS_SUCCESSFUL; 7664 int rc = PCIBIOS_SUCCESSFUL;
7661 7665
7662 ENTER; 7666 ENTER;
7663 pci_block_user_cfg_access(ioa_cfg->pdev);
7664
7665 if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO) 7667 if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
7666 writel(IPR_UPROCI_SIS64_START_BIST, 7668 writel(IPR_UPROCI_SIS64_START_BIST,
7667 ioa_cfg->regs.set_uproc_interrupt_reg32); 7669 ioa_cfg->regs.set_uproc_interrupt_reg32);
@@ -7673,7 +7675,9 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
7673 ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT); 7675 ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
7674 rc = IPR_RC_JOB_RETURN; 7676 rc = IPR_RC_JOB_RETURN;
7675 } else { 7677 } else {
7676 pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev); 7678 if (ioa_cfg->cfg_locked)
7679 pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
7680 ioa_cfg->cfg_locked = 0;
7677 ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR); 7681 ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
7678 rc = IPR_RC_JOB_CONTINUE; 7682 rc = IPR_RC_JOB_CONTINUE;
7679 } 7683 }
@@ -7716,7 +7720,6 @@ static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
7716 struct pci_dev *pdev = ioa_cfg->pdev; 7720 struct pci_dev *pdev = ioa_cfg->pdev;
7717 7721
7718 ENTER; 7722 ENTER;
7719 pci_block_user_cfg_access(pdev);
7720 pci_set_pcie_reset_state(pdev, pcie_warm_reset); 7723 pci_set_pcie_reset_state(pdev, pcie_warm_reset);
7721 ipr_cmd->job_step = ipr_reset_slot_reset_done; 7724 ipr_cmd->job_step = ipr_reset_slot_reset_done;
7722 ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT); 7725 ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
@@ -7725,6 +7728,56 @@ static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
7725} 7728}
7726 7729
7727/** 7730/**
7731 * ipr_reset_block_config_access_wait - Wait for permission to block config access
7732 * @ipr_cmd: ipr command struct
7733 *
7734 * Description: This attempts to block config access to the IOA.
7735 *
7736 * Return value:
7737 * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
7738 **/
7739static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
7740{
7741 struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
7742 int rc = IPR_RC_JOB_CONTINUE;
7743
7744 if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
7745 ioa_cfg->cfg_locked = 1;
7746 ipr_cmd->job_step = ioa_cfg->reset;
7747 } else {
7748 if (ipr_cmd->u.time_left) {
7749 rc = IPR_RC_JOB_RETURN;
7750 ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
7751 ipr_reset_start_timer(ipr_cmd,
7752 IPR_CHECK_FOR_RESET_TIMEOUT);
7753 } else {
7754 ipr_cmd->job_step = ioa_cfg->reset;
7755 dev_err(&ioa_cfg->pdev->dev,
7756 "Timed out waiting to lock config access. Resetting anyway.\n");
7757 }
7758 }
7759
7760 return rc;
7761}
7762
7763/**
7764 * ipr_reset_block_config_access - Block config access to the IOA
7765 * @ipr_cmd: ipr command struct
7766 *
7767 * Description: This attempts to block config access to the IOA
7768 *
7769 * Return value:
7770 * IPR_RC_JOB_CONTINUE
7771 **/
7772static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
7773{
7774 ipr_cmd->ioa_cfg->cfg_locked = 0;
7775 ipr_cmd->job_step = ipr_reset_block_config_access_wait;
7776 ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
7777 return IPR_RC_JOB_CONTINUE;
7778}
7779
7780/**
7728 * ipr_reset_allowed - Query whether or not IOA can be reset 7781 * ipr_reset_allowed - Query whether or not IOA can be reset
7729 * @ioa_cfg: ioa config struct 7782 * @ioa_cfg: ioa config struct
7730 * 7783 *
@@ -7763,7 +7816,7 @@ static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
7763 ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT; 7816 ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
7764 ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT); 7817 ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
7765 } else { 7818 } else {
7766 ipr_cmd->job_step = ioa_cfg->reset; 7819 ipr_cmd->job_step = ipr_reset_block_config_access;
7767 rc = IPR_RC_JOB_CONTINUE; 7820 rc = IPR_RC_JOB_CONTINUE;
7768 } 7821 }
7769 7822
@@ -7796,7 +7849,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
7796 writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32); 7849 writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
7797 ipr_cmd->job_step = ipr_reset_wait_to_start_bist; 7850 ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
7798 } else { 7851 } else {
7799 ipr_cmd->job_step = ioa_cfg->reset; 7852 ipr_cmd->job_step = ipr_reset_block_config_access;
7800 } 7853 }
7801 7854
7802 ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT; 7855 ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index ac84736c1b9c..b13f9cc12279 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -1387,6 +1387,7 @@ struct ipr_ioa_cfg {
1387 u8 msi_received:1; 1387 u8 msi_received:1;
1388 u8 sis64:1; 1388 u8 sis64:1;
1389 u8 dump_timeout:1; 1389 u8 dump_timeout:1;
1390 u8 cfg_locked:1;
1390 1391
1391 u8 revid; 1392 u8 revid;
1392 1393
diff --git a/drivers/uio/uio_pci_generic.c b/drivers/uio/uio_pci_generic.c
index 02bd47bdee1c..0bd08ef2b394 100644
--- a/drivers/uio/uio_pci_generic.c
+++ b/drivers/uio/uio_pci_generic.c
@@ -45,77 +45,12 @@ to_uio_pci_generic_dev(struct uio_info *info)
45static irqreturn_t irqhandler(int irq, struct uio_info *info) 45static irqreturn_t irqhandler(int irq, struct uio_info *info)
46{ 46{
47 struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info); 47 struct uio_pci_generic_dev *gdev = to_uio_pci_generic_dev(info);
48 struct pci_dev *pdev = gdev->pdev;
49 irqreturn_t ret = IRQ_NONE;
50 u32 cmd_status_dword;
51 u16 origcmd, newcmd, status;
52
53 /* We do a single dword read to retrieve both command and status.
54 * Document assumptions that make this possible. */
55 BUILD_BUG_ON(PCI_COMMAND % 4);
56 BUILD_BUG_ON(PCI_COMMAND + 2 != PCI_STATUS);
57
58 pci_block_user_cfg_access(pdev);
59
60 /* Read both command and status registers in a single 32-bit operation.
61 * Note: we could cache the value for command and move the status read
62 * out of the lock if there was a way to get notified of user changes
63 * to command register through sysfs. Should be good for shared irqs. */
64 pci_read_config_dword(pdev, PCI_COMMAND, &cmd_status_dword);
65 origcmd = cmd_status_dword;
66 status = cmd_status_dword >> 16;
67
68 /* Check interrupt status register to see whether our device
69 * triggered the interrupt. */
70 if (!(status & PCI_STATUS_INTERRUPT))
71 goto done;
72
73 /* We triggered the interrupt, disable it. */
74 newcmd = origcmd | PCI_COMMAND_INTX_DISABLE;
75 if (newcmd != origcmd)
76 pci_write_config_word(pdev, PCI_COMMAND, newcmd);
77 48
78 /* UIO core will signal the user process. */ 49 if (!pci_check_and_mask_intx(gdev->pdev))
79 ret = IRQ_HANDLED; 50 return IRQ_NONE;
80done:
81
82 pci_unblock_user_cfg_access(pdev);
83 return ret;
84}
85 51
86/* Verify that the device supports Interrupt Disable bit in command register, 52 /* UIO core will signal the user process. */
87 * per PCI 2.3, by flipping this bit and reading it back: this bit was readonly 53 return IRQ_HANDLED;
88 * in PCI 2.2. */
89static int __devinit verify_pci_2_3(struct pci_dev *pdev)
90{
91 u16 orig, new;
92 int err = 0;
93
94 pci_block_user_cfg_access(pdev);
95 pci_read_config_word(pdev, PCI_COMMAND, &orig);
96 pci_write_config_word(pdev, PCI_COMMAND,
97 orig ^ PCI_COMMAND_INTX_DISABLE);
98 pci_read_config_word(pdev, PCI_COMMAND, &new);
99 /* There's no way to protect against
100 * hardware bugs or detect them reliably, but as long as we know
101 * what the value should be, let's go ahead and check it. */
102 if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
103 err = -EBUSY;
104 dev_err(&pdev->dev, "Command changed from 0x%x to 0x%x: "
105 "driver or HW bug?\n", orig, new);
106 goto err;
107 }
108 if (!((new ^ orig) & PCI_COMMAND_INTX_DISABLE)) {
109 dev_warn(&pdev->dev, "Device does not support "
110 "disabling interrupts: unable to bind.\n");
111 err = -ENODEV;
112 goto err;
113 }
114 /* Now restore the original value. */
115 pci_write_config_word(pdev, PCI_COMMAND, orig);
116err:
117 pci_unblock_user_cfg_access(pdev);
118 return err;
119} 54}
120 55
121static int __devinit probe(struct pci_dev *pdev, 56static int __devinit probe(struct pci_dev *pdev,
@@ -138,9 +73,10 @@ static int __devinit probe(struct pci_dev *pdev,
138 return -ENODEV; 73 return -ENODEV;
139 } 74 }
140 75
141 err = verify_pci_2_3(pdev); 76 if (!pci_intx_mask_supported(pdev)) {
142 if (err) 77 err = -ENODEV;
143 goto err_verify; 78 goto err_verify;
79 }
144 80
145 gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL); 81 gdev = kzalloc(sizeof(struct uio_pci_generic_dev), GFP_KERNEL);
146 if (!gdev) { 82 if (!gdev) {
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 84225c756bd1..a16b1df3deff 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -111,7 +111,7 @@ enum {
111 PCI_NUM_RESOURCES, 111 PCI_NUM_RESOURCES,
112 112
113 /* preserve this for compatibility */ 113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE 114 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
115}; 115};
116 116
117typedef int __bitwise pci_power_t; 117typedef int __bitwise pci_power_t;
@@ -308,7 +308,7 @@ struct pci_dev {
308 unsigned int is_added:1; 308 unsigned int is_added:1;
309 unsigned int is_busmaster:1; /* device is busmaster */ 309 unsigned int is_busmaster:1; /* device is busmaster */
310 unsigned int no_msi:1; /* device may not use msi */ 310 unsigned int no_msi:1; /* device may not use msi */
311 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ 311 unsigned int block_cfg_access:1; /* config space access is blocked */
312 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 312 unsigned int broken_parity_status:1; /* Device generates false positive parity */
313 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ 313 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
314 unsigned int msi_enabled:1; 314 unsigned int msi_enabled:1;
@@ -661,17 +661,13 @@ extern struct pci_bus *pci_find_bus(int domain, int busnr);
661void pci_bus_add_devices(const struct pci_bus *bus); 661void pci_bus_add_devices(const struct pci_bus *bus);
662struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, 662struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
663 struct pci_ops *ops, void *sysdata); 663 struct pci_ops *ops, void *sysdata);
664static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, 664struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
665 void *sysdata) 665struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
666{ 666 struct pci_ops *ops, void *sysdata,
667 struct pci_bus *root_bus; 667 struct list_head *resources);
668 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata); 668struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
669 if (root_bus) 669 struct pci_ops *ops, void *sysdata,
670 pci_bus_add_devices(root_bus); 670 struct list_head *resources);
671 return root_bus;
672}
673struct pci_bus *pci_create_bus(struct device *parent, int bus,
674 struct pci_ops *ops, void *sysdata);
675struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, 671struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
676 int busnr); 672 int busnr);
677void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); 673void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
@@ -795,8 +791,11 @@ static inline int pci_is_managed(struct pci_dev *pdev)
795} 791}
796 792
797void pci_disable_device(struct pci_dev *dev); 793void pci_disable_device(struct pci_dev *dev);
794
795extern unsigned int pcibios_max_latency;
798void pci_set_master(struct pci_dev *dev); 796void pci_set_master(struct pci_dev *dev);
799void pci_clear_master(struct pci_dev *dev); 797void pci_clear_master(struct pci_dev *dev);
798
800int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); 799int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
801int pci_set_cacheline_size(struct pci_dev *dev); 800int pci_set_cacheline_size(struct pci_dev *dev);
802#define HAVE_PCI_SET_MWI 801#define HAVE_PCI_SET_MWI
@@ -804,6 +803,9 @@ int __must_check pci_set_mwi(struct pci_dev *dev);
804int pci_try_set_mwi(struct pci_dev *dev); 803int pci_try_set_mwi(struct pci_dev *dev);
805void pci_clear_mwi(struct pci_dev *dev); 804void pci_clear_mwi(struct pci_dev *dev);
806void pci_intx(struct pci_dev *dev, int enable); 805void pci_intx(struct pci_dev *dev, int enable);
806bool pci_intx_mask_supported(struct pci_dev *dev);
807bool pci_check_and_mask_intx(struct pci_dev *dev);
808bool pci_check_and_unmask_intx(struct pci_dev *dev);
807void pci_msi_off(struct pci_dev *dev); 809void pci_msi_off(struct pci_dev *dev);
808int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); 810int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
809int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); 811int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
@@ -911,6 +913,8 @@ int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
911void pci_release_selected_regions(struct pci_dev *, int); 913void pci_release_selected_regions(struct pci_dev *, int);
912 914
913/* drivers/pci/bus.c */ 915/* drivers/pci/bus.c */
916void pci_add_resource(struct list_head *resources, struct resource *res);
917void pci_free_resource_list(struct list_head *resources);
914void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); 918void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
915struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); 919struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
916void pci_bus_remove_resources(struct pci_bus *bus); 920void pci_bus_remove_resources(struct pci_bus *bus);
@@ -1085,8 +1089,9 @@ int ht_create_irq(struct pci_dev *dev, int idx);
1085void ht_destroy_irq(unsigned int irq); 1089void ht_destroy_irq(unsigned int irq);
1086#endif /* CONFIG_HT_IRQ */ 1090#endif /* CONFIG_HT_IRQ */
1087 1091
1088extern void pci_block_user_cfg_access(struct pci_dev *dev); 1092extern void pci_cfg_access_lock(struct pci_dev *dev);
1089extern void pci_unblock_user_cfg_access(struct pci_dev *dev); 1093extern bool pci_cfg_access_trylock(struct pci_dev *dev);
1094extern void pci_cfg_access_unlock(struct pci_dev *dev);
1090 1095
1091/* 1096/*
1092 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 1097 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
@@ -1283,10 +1288,13 @@ static inline void pci_release_regions(struct pci_dev *dev)
1283 1288
1284#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 1289#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1285 1290
1286static inline void pci_block_user_cfg_access(struct pci_dev *dev) 1291static inline void pci_block_cfg_access(struct pci_dev *dev)
1287{ } 1292{ }
1288 1293
1289static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) 1294static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1295{ return 0; }
1296
1297static inline void pci_unblock_cfg_access(struct pci_dev *dev)
1290{ } 1298{ }
1291 1299
1292static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) 1300static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
@@ -1424,10 +1432,10 @@ static inline void pci_fixup_device(enum pci_fixup_pass pass,
1424void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); 1432void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1425void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); 1433void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1426void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); 1434void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1427int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name); 1435int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
1428int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask, 1436int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1429 const char *name); 1437 const char *name);
1430void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask); 1438void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
1431 1439
1432extern int pci_pci_problems; 1440extern int pci_pci_problems;
1433#define PCIPCI_FAIL 1 /* No PCI PCI DMA */ 1441#define PCIPCI_FAIL 1 /* No PCI PCI DMA */
@@ -1446,8 +1454,10 @@ extern u8 pci_cache_line_size;
1446extern unsigned long pci_hotplug_io_size; 1454extern unsigned long pci_hotplug_io_size;
1447extern unsigned long pci_hotplug_mem_size; 1455extern unsigned long pci_hotplug_mem_size;
1448 1456
1457/* Architecture specific versions may override these (weak) */
1449int pcibios_add_platform_entries(struct pci_dev *dev); 1458int pcibios_add_platform_entries(struct pci_dev *dev);
1450void pcibios_disable_device(struct pci_dev *dev); 1459void pcibios_disable_device(struct pci_dev *dev);
1460void pcibios_set_master(struct pci_dev *dev);
1451int pcibios_set_pcie_reset_state(struct pci_dev *dev, 1461int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1452 enum pcie_reset_state state); 1462 enum pcie_reset_state state);
1453 1463
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 2aaee0ca9da8..31d77af2ef42 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -776,6 +776,29 @@
776#define PCI_DEVICE_ID_ELSA_QS3000 0x3000 776#define PCI_DEVICE_ID_ELSA_QS3000 0x3000
777 777
778#define PCI_VENDOR_ID_STMICRO 0x104A 778#define PCI_VENDOR_ID_STMICRO 0x104A
779#define PCI_DEVICE_ID_STMICRO_USB_HOST 0xCC00
780#define PCI_DEVICE_ID_STMICRO_USB_OHCI 0xCC01
781#define PCI_DEVICE_ID_STMICRO_USB_OTG 0xCC02
782#define PCI_DEVICE_ID_STMICRO_UART_HWFC 0xCC03
783#define PCI_DEVICE_ID_STMICRO_UART_NO_HWFC 0xCC04
784#define PCI_DEVICE_ID_STMICRO_SOC_DMA 0xCC05
785#define PCI_DEVICE_ID_STMICRO_SATA 0xCC06
786#define PCI_DEVICE_ID_STMICRO_I2C 0xCC07
787#define PCI_DEVICE_ID_STMICRO_SPI_HS 0xCC08
788#define PCI_DEVICE_ID_STMICRO_MAC 0xCC09
789#define PCI_DEVICE_ID_STMICRO_SDIO_EMMC 0xCC0A
790#define PCI_DEVICE_ID_STMICRO_SDIO 0xCC0B
791#define PCI_DEVICE_ID_STMICRO_GPIO 0xCC0C
792#define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D
793#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_DMA 0xCC0E
794#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_SRCS 0xCC0F
795#define PCI_DEVICE_ID_STMICRO_AUDIO_ROUTER_MSPS 0xCC10
796#define PCI_DEVICE_ID_STMICRO_CAN 0xCC11
797#define PCI_DEVICE_ID_STMICRO_MLB 0xCC12
798#define PCI_DEVICE_ID_STMICRO_DBP 0xCC13
799#define PCI_DEVICE_ID_STMICRO_SATA_PHY 0xCC14
800#define PCI_DEVICE_ID_STMICRO_ESRAM 0xCC15
801#define PCI_DEVICE_ID_STMICRO_VIC 0xCC16
779 802
780#define PCI_VENDOR_ID_BUSLOGIC 0x104B 803#define PCI_VENDOR_ID_BUSLOGIC 0x104B
781#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 804#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 28fe380cb19d..e41a10f5ae83 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -392,7 +392,7 @@
392#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */ 392#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */
393#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */ 393#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */
394#define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */ 394#define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */
395#define PCI_EXP_TYPE_RC_EC 0x10 /* Root Complex Event Collector */ 395#define PCI_EXP_TYPE_RC_EC 0xa /* Root Complex Event Collector */
396#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */ 396#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */
397#define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */ 397#define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */
398#define PCI_EXP_DEVCAP 4 /* Device capabilities */ 398#define PCI_EXP_DEVCAP 4 /* Device capabilities */
diff --git a/lib/devres.c b/lib/devres.c
index 4fbc09e6e9e6..9676617b4486 100644
--- a/lib/devres.c
+++ b/lib/devres.c
@@ -304,7 +304,7 @@ EXPORT_SYMBOL(pcim_iounmap);
304 * 304 *
305 * Request and iomap regions specified by @mask. 305 * Request and iomap regions specified by @mask.
306 */ 306 */
307int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name) 307int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name)
308{ 308{
309 void __iomem * const *iomap; 309 void __iomem * const *iomap;
310 int i, rc; 310 int i, rc;
@@ -357,7 +357,7 @@ EXPORT_SYMBOL(pcim_iomap_regions);
357 * 357 *
358 * Request all PCI BARs and iomap regions specified by @mask. 358 * Request all PCI BARs and iomap regions specified by @mask.
359 */ 359 */
360int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask, 360int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
361 const char *name) 361 const char *name)
362{ 362{
363 int request_mask = ((1 << 6) - 1) & ~mask; 363 int request_mask = ((1 << 6) - 1) & ~mask;
@@ -381,7 +381,7 @@ EXPORT_SYMBOL(pcim_iomap_regions_request_all);
381 * 381 *
382 * Unmap and release regions specified by @mask. 382 * Unmap and release regions specified by @mask.
383 */ 383 */
384void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask) 384void pcim_iounmap_regions(struct pci_dev *pdev, int mask)
385{ 385{
386 void __iomem * const *iomap; 386 void __iomem * const *iomap;
387 int i; 387 int i;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 21:14:55 -0500