diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_encoder.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_sor.c | 22 |
2 files changed, 22 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h b/drivers/gpu/drm/nouveau/nouveau_encoder.h index bc4a24029ed1..9f28b94e479b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_encoder.h +++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h | |||
@@ -47,6 +47,7 @@ struct nouveau_encoder { | |||
47 | 47 | ||
48 | union { | 48 | union { |
49 | struct { | 49 | struct { |
50 | int mc_unknown; | ||
50 | int dpcd_version; | 51 | int dpcd_version; |
51 | int link_nr; | 52 | int link_nr; |
52 | int link_bw; | 53 | int link_bw; |
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c index c2fff543b06f..e31ba312c2ff 100644 --- a/drivers/gpu/drm/nouveau/nv50_sor.c +++ b/drivers/gpu/drm/nouveau/nv50_sor.c | |||
@@ -211,7 +211,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
211 | mode_ctl = 0x0200; | 211 | mode_ctl = 0x0200; |
212 | break; | 212 | break; |
213 | case OUTPUT_DP: | 213 | case OUTPUT_DP: |
214 | mode_ctl |= 0x00050000; | 214 | mode_ctl |= (nv_encoder->dp.mc_unknown << 16); |
215 | if (nv_encoder->dcb->sorconf.link & 1) | 215 | if (nv_encoder->dcb->sorconf.link & 1) |
216 | mode_ctl |= 0x00000800; | 216 | mode_ctl |= 0x00000800; |
217 | else | 217 | else |
@@ -274,6 +274,7 @@ static const struct drm_encoder_funcs nv50_sor_encoder_funcs = { | |||
274 | int | 274 | int |
275 | nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) | 275 | nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) |
276 | { | 276 | { |
277 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
277 | struct nouveau_encoder *nv_encoder = NULL; | 278 | struct nouveau_encoder *nv_encoder = NULL; |
278 | struct drm_encoder *encoder; | 279 | struct drm_encoder *encoder; |
279 | bool dum; | 280 | bool dum; |
@@ -319,5 +320,24 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) | |||
319 | encoder->possible_crtcs = entry->heads; | 320 | encoder->possible_crtcs = entry->heads; |
320 | encoder->possible_clones = 0; | 321 | encoder->possible_clones = 0; |
321 | 322 | ||
323 | if (nv_encoder->dcb->type == OUTPUT_DP) { | ||
324 | uint32_t mc, or = nv_encoder->or; | ||
325 | |||
326 | if (dev_priv->chipset < 0x90 || | ||
327 | dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0) | ||
328 | mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(or)); | ||
329 | else | ||
330 | mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(or)); | ||
331 | |||
332 | switch ((mc & 0x00000f00) >> 8) { | ||
333 | case 8: | ||
334 | case 9: | ||
335 | nv_encoder->dp.mc_unknown = (mc & 0x000f0000) >> 16; | ||
336 | break; | ||
337 | default: | ||
338 | break; | ||
339 | } | ||
340 | } | ||
341 | |||
322 | return 0; | 342 | return 0; |
323 | } | 343 | } |