diff options
50 files changed, 588 insertions, 345 deletions
diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt index df204e18e030..6a2a1160a70d 100644 --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt | |||
@@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as | |||
9 | described in mmc.txt, can be used. Additionally the following tmio_mmc-specific | 9 | described in mmc.txt, can be used. Additionally the following tmio_mmc-specific |
10 | optional bindings can be used. | 10 | optional bindings can be used. |
11 | 11 | ||
12 | Required properties: | ||
13 | - compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit | ||
14 | "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC | ||
15 | "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC | ||
16 | "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC | ||
17 | "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC | ||
18 | "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC | ||
19 | "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC | ||
20 | "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC | ||
21 | |||
12 | Optional properties: | 22 | Optional properties: |
13 | - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable | 23 | - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable |
14 | |||
15 | When used with Renesas SDHI hardware, the following compatibility strings | ||
16 | configure various model-specific properties: | ||
17 | |||
18 | "renesas,sh7372-sdhi": (default) compatible with SH7372 | ||
19 | "renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to | ||
20 | wait for the interface to become idle. | ||
diff --git a/MAINTAINERS b/MAINTAINERS index e61c2e83fc2b..9d96b9c16c76 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -824,15 +824,21 @@ S: Maintained | |||
824 | F: arch/arm/mach-gemini/ | 824 | F: arch/arm/mach-gemini/ |
825 | 825 | ||
826 | ARM/CSR SIRFPRIMA2 MACHINE SUPPORT | 826 | ARM/CSR SIRFPRIMA2 MACHINE SUPPORT |
827 | M: Barry Song <baohua.song@csr.com> | 827 | M: Barry Song <baohua@kernel.org> |
828 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 828 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
829 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git | 829 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git |
830 | S: Maintained | 830 | S: Maintained |
831 | F: arch/arm/mach-prima2/ | 831 | F: arch/arm/mach-prima2/ |
832 | F: drivers/clk/clk-prima2.c | ||
833 | F: drivers/clocksource/timer-prima2.c | ||
834 | F: drivers/clocksource/timer-marco.c | ||
832 | F: drivers/dma/sirf-dma.c | 835 | F: drivers/dma/sirf-dma.c |
833 | F: drivers/i2c/busses/i2c-sirf.c | 836 | F: drivers/i2c/busses/i2c-sirf.c |
837 | F: drivers/input/misc/sirfsoc-onkey.c | ||
838 | F: drivers/irqchip/irq-sirfsoc.c | ||
834 | F: drivers/mmc/host/sdhci-sirf.c | 839 | F: drivers/mmc/host/sdhci-sirf.c |
835 | F: drivers/pinctrl/sirf/ | 840 | F: drivers/pinctrl/sirf/ |
841 | F: drivers/rtc/rtc-sirfsoc.c | ||
836 | F: drivers/spi/spi-sirf.c | 842 | F: drivers/spi/spi-sirf.c |
837 | 843 | ||
838 | ARM/EBSA110 MACHINE SUPPORT | 844 | ARM/EBSA110 MACHINE SUPPORT |
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index cc0f1fb61753..802720e3e8fd 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb | |||
41 | dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb | 41 | dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb |
42 | dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb | 42 | dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb |
43 | 43 | ||
44 | dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb | ||
45 | |||
44 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb | 46 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb |
45 | dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ | 47 | dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ |
46 | bcm28155-ap.dtb | 48 | bcm28155-ap.dtb |
@@ -183,6 +185,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ | |||
183 | am335x-evm.dtb \ | 185 | am335x-evm.dtb \ |
184 | am335x-evmsk.dtb \ | 186 | am335x-evmsk.dtb \ |
185 | am335x-bone.dtb \ | 187 | am335x-bone.dtb \ |
188 | am335x-boneblack.dtb \ | ||
186 | am3517-evm.dtb \ | 189 | am3517-evm.dtb \ |
187 | am3517_mt_ventoux.dtb \ | 190 | am3517_mt_ventoux.dtb \ |
188 | am43x-epos-evm.dtb | 191 | am43x-epos-evm.dtb |
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi new file mode 100644 index 000000000000..2f66deda9f5c --- /dev/null +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi | |||
@@ -0,0 +1,262 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | / { | ||
10 | model = "TI AM335x BeagleBone"; | ||
11 | compatible = "ti,am335x-bone", "ti,am33xx"; | ||
12 | |||
13 | cpus { | ||
14 | cpu@0 { | ||
15 | cpu0-supply = <&dcdc2_reg>; | ||
16 | }; | ||
17 | }; | ||
18 | |||
19 | memory { | ||
20 | device_type = "memory"; | ||
21 | reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
22 | }; | ||
23 | |||
24 | am33xx_pinmux: pinmux@44e10800 { | ||
25 | pinctrl-names = "default"; | ||
26 | pinctrl-0 = <&clkout2_pin>; | ||
27 | |||
28 | user_leds_s0: user_leds_s0 { | ||
29 | pinctrl-single,pins = < | ||
30 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ | ||
31 | 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ | ||
32 | 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | ||
33 | 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ | ||
34 | >; | ||
35 | }; | ||
36 | |||
37 | i2c0_pins: pinmux_i2c0_pins { | ||
38 | pinctrl-single,pins = < | ||
39 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | ||
40 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | ||
41 | >; | ||
42 | }; | ||
43 | |||
44 | uart0_pins: pinmux_uart0_pins { | ||
45 | pinctrl-single,pins = < | ||
46 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | ||
47 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | ||
48 | >; | ||
49 | }; | ||
50 | |||
51 | clkout2_pin: pinmux_clkout2_pin { | ||
52 | pinctrl-single,pins = < | ||
53 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | ||
54 | >; | ||
55 | }; | ||
56 | |||
57 | cpsw_default: cpsw_default { | ||
58 | pinctrl-single,pins = < | ||
59 | /* Slave 1 */ | ||
60 | 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ | ||
61 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ | ||
62 | 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ | ||
63 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ | ||
64 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ | ||
65 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ | ||
66 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ | ||
67 | 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ | ||
68 | 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ | ||
69 | 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ | ||
70 | 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ | ||
71 | 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ | ||
72 | 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ | ||
73 | >; | ||
74 | }; | ||
75 | |||
76 | cpsw_sleep: cpsw_sleep { | ||
77 | pinctrl-single,pins = < | ||
78 | /* Slave 1 reset value */ | ||
79 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
80 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
81 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
82 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
83 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
84 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
85 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
86 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
87 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
88 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
89 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
90 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
91 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
92 | >; | ||
93 | }; | ||
94 | |||
95 | davinci_mdio_default: davinci_mdio_default { | ||
96 | pinctrl-single,pins = < | ||
97 | /* MDIO */ | ||
98 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | ||
99 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | ||
100 | >; | ||
101 | }; | ||
102 | |||
103 | davinci_mdio_sleep: davinci_mdio_sleep { | ||
104 | pinctrl-single,pins = < | ||
105 | /* MDIO reset value */ | ||
106 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
107 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
108 | >; | ||
109 | }; | ||
110 | }; | ||
111 | |||
112 | ocp { | ||
113 | uart0: serial@44e09000 { | ||
114 | pinctrl-names = "default"; | ||
115 | pinctrl-0 = <&uart0_pins>; | ||
116 | |||
117 | status = "okay"; | ||
118 | }; | ||
119 | |||
120 | musb: usb@47400000 { | ||
121 | status = "okay"; | ||
122 | |||
123 | control@44e10000 { | ||
124 | status = "okay"; | ||
125 | }; | ||
126 | |||
127 | usb-phy@47401300 { | ||
128 | status = "okay"; | ||
129 | }; | ||
130 | |||
131 | usb-phy@47401b00 { | ||
132 | status = "okay"; | ||
133 | }; | ||
134 | |||
135 | usb@47401000 { | ||
136 | status = "okay"; | ||
137 | }; | ||
138 | |||
139 | usb@47401800 { | ||
140 | status = "okay"; | ||
141 | dr_mode = "host"; | ||
142 | }; | ||
143 | |||
144 | dma-controller@07402000 { | ||
145 | status = "okay"; | ||
146 | }; | ||
147 | }; | ||
148 | |||
149 | i2c0: i2c@44e0b000 { | ||
150 | pinctrl-names = "default"; | ||
151 | pinctrl-0 = <&i2c0_pins>; | ||
152 | |||
153 | status = "okay"; | ||
154 | clock-frequency = <400000>; | ||
155 | |||
156 | tps: tps@24 { | ||
157 | reg = <0x24>; | ||
158 | }; | ||
159 | |||
160 | }; | ||
161 | }; | ||
162 | |||
163 | leds { | ||
164 | pinctrl-names = "default"; | ||
165 | pinctrl-0 = <&user_leds_s0>; | ||
166 | |||
167 | compatible = "gpio-leds"; | ||
168 | |||
169 | led@2 { | ||
170 | label = "beaglebone:green:heartbeat"; | ||
171 | gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; | ||
172 | linux,default-trigger = "heartbeat"; | ||
173 | default-state = "off"; | ||
174 | }; | ||
175 | |||
176 | led@3 { | ||
177 | label = "beaglebone:green:mmc0"; | ||
178 | gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; | ||
179 | linux,default-trigger = "mmc0"; | ||
180 | default-state = "off"; | ||
181 | }; | ||
182 | |||
183 | led@4 { | ||
184 | label = "beaglebone:green:usr2"; | ||
185 | gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | ||
186 | default-state = "off"; | ||
187 | }; | ||
188 | |||
189 | led@5 { | ||
190 | label = "beaglebone:green:usr3"; | ||
191 | gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; | ||
192 | default-state = "off"; | ||
193 | }; | ||
194 | }; | ||
195 | }; | ||
196 | |||
197 | /include/ "tps65217.dtsi" | ||
198 | |||
199 | &tps { | ||
200 | regulators { | ||
201 | dcdc1_reg: regulator@0 { | ||
202 | regulator-always-on; | ||
203 | }; | ||
204 | |||
205 | dcdc2_reg: regulator@1 { | ||
206 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | ||
207 | regulator-name = "vdd_mpu"; | ||
208 | regulator-min-microvolt = <925000>; | ||
209 | regulator-max-microvolt = <1325000>; | ||
210 | regulator-boot-on; | ||
211 | regulator-always-on; | ||
212 | }; | ||
213 | |||
214 | dcdc3_reg: regulator@2 { | ||
215 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | ||
216 | regulator-name = "vdd_core"; | ||
217 | regulator-min-microvolt = <925000>; | ||
218 | regulator-max-microvolt = <1150000>; | ||
219 | regulator-boot-on; | ||
220 | regulator-always-on; | ||
221 | }; | ||
222 | |||
223 | ldo1_reg: regulator@3 { | ||
224 | regulator-always-on; | ||
225 | }; | ||
226 | |||
227 | ldo2_reg: regulator@4 { | ||
228 | regulator-always-on; | ||
229 | }; | ||
230 | |||
231 | ldo3_reg: regulator@5 { | ||
232 | regulator-always-on; | ||
233 | }; | ||
234 | |||
235 | ldo4_reg: regulator@6 { | ||
236 | regulator-always-on; | ||
237 | }; | ||
238 | }; | ||
239 | }; | ||
240 | |||
241 | &cpsw_emac0 { | ||
242 | phy_id = <&davinci_mdio>, <0>; | ||
243 | phy-mode = "mii"; | ||
244 | }; | ||
245 | |||
246 | &cpsw_emac1 { | ||
247 | phy_id = <&davinci_mdio>, <1>; | ||
248 | phy-mode = "mii"; | ||
249 | }; | ||
250 | |||
251 | &mac { | ||
252 | pinctrl-names = "default", "sleep"; | ||
253 | pinctrl-0 = <&cpsw_default>; | ||
254 | pinctrl-1 = <&cpsw_sleep>; | ||
255 | |||
256 | }; | ||
257 | |||
258 | &davinci_mdio { | ||
259 | pinctrl-names = "default", "sleep"; | ||
260 | pinctrl-0 = <&davinci_mdio_default>; | ||
261 | pinctrl-1 = <&davinci_mdio_sleep>; | ||
262 | }; | ||
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index d318987d44a1..7993c489982c 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts | |||
@@ -8,258 +8,4 @@ | |||
8 | /dts-v1/; | 8 | /dts-v1/; |
9 | 9 | ||
10 | #include "am33xx.dtsi" | 10 | #include "am33xx.dtsi" |
11 | 11 | #include "am335x-bone-common.dtsi" | |
12 | / { | ||
13 | model = "TI AM335x BeagleBone"; | ||
14 | compatible = "ti,am335x-bone", "ti,am33xx"; | ||
15 | |||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | cpu0-supply = <&dcdc2_reg>; | ||
19 | }; | ||
20 | }; | ||
21 | |||
22 | memory { | ||
23 | device_type = "memory"; | ||
24 | reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
25 | }; | ||
26 | |||
27 | am33xx_pinmux: pinmux@44e10800 { | ||
28 | pinctrl-names = "default"; | ||
29 | pinctrl-0 = <&clkout2_pin>; | ||
30 | |||
31 | user_leds_s0: user_leds_s0 { | ||
32 | pinctrl-single,pins = < | ||
33 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ | ||
34 | 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ | ||
35 | 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | ||
36 | 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ | ||
37 | >; | ||
38 | }; | ||
39 | |||
40 | i2c0_pins: pinmux_i2c0_pins { | ||
41 | pinctrl-single,pins = < | ||
42 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | ||
43 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | ||
44 | >; | ||
45 | }; | ||
46 | |||
47 | uart0_pins: pinmux_uart0_pins { | ||
48 | pinctrl-single,pins = < | ||
49 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | ||
50 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | ||
51 | >; | ||
52 | }; | ||
53 | |||
54 | clkout2_pin: pinmux_clkout2_pin { | ||
55 | pinctrl-single,pins = < | ||
56 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | ||
57 | >; | ||
58 | }; | ||
59 | |||
60 | cpsw_default: cpsw_default { | ||
61 | pinctrl-single,pins = < | ||
62 | /* Slave 1 */ | ||
63 | 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ | ||
64 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ | ||
65 | 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ | ||
66 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ | ||
67 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ | ||
68 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ | ||
69 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ | ||
70 | 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ | ||
71 | 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ | ||
72 | 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ | ||
73 | 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ | ||
74 | 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ | ||
75 | 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ | ||
76 | >; | ||
77 | }; | ||
78 | |||
79 | cpsw_sleep: cpsw_sleep { | ||
80 | pinctrl-single,pins = < | ||
81 | /* Slave 1 reset value */ | ||
82 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
83 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
84 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
85 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
86 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
87 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
88 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
89 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
90 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
91 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
92 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
93 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
94 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
95 | >; | ||
96 | }; | ||
97 | |||
98 | davinci_mdio_default: davinci_mdio_default { | ||
99 | pinctrl-single,pins = < | ||
100 | /* MDIO */ | ||
101 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | ||
102 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | ||
103 | >; | ||
104 | }; | ||
105 | |||
106 | davinci_mdio_sleep: davinci_mdio_sleep { | ||
107 | pinctrl-single,pins = < | ||
108 | /* MDIO reset value */ | ||
109 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
110 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | ||
111 | >; | ||
112 | }; | ||
113 | }; | ||
114 | |||
115 | ocp { | ||
116 | uart0: serial@44e09000 { | ||
117 | pinctrl-names = "default"; | ||
118 | pinctrl-0 = <&uart0_pins>; | ||
119 | |||
120 | status = "okay"; | ||
121 | }; | ||
122 | |||
123 | musb: usb@47400000 { | ||
124 | status = "okay"; | ||
125 | |||
126 | control@44e10000 { | ||
127 | status = "okay"; | ||
128 | }; | ||
129 | |||
130 | usb-phy@47401300 { | ||
131 | status = "okay"; | ||
132 | }; | ||
133 | |||
134 | usb-phy@47401b00 { | ||
135 | status = "okay"; | ||
136 | }; | ||
137 | |||
138 | usb@47401000 { | ||
139 | status = "okay"; | ||
140 | }; | ||
141 | |||
142 | usb@47401800 { | ||
143 | status = "okay"; | ||
144 | dr_mode = "host"; | ||
145 | }; | ||
146 | |||
147 | dma-controller@07402000 { | ||
148 | status = "okay"; | ||
149 | }; | ||
150 | }; | ||
151 | |||
152 | i2c0: i2c@44e0b000 { | ||
153 | pinctrl-names = "default"; | ||
154 | pinctrl-0 = <&i2c0_pins>; | ||
155 | |||
156 | status = "okay"; | ||
157 | clock-frequency = <400000>; | ||
158 | |||
159 | tps: tps@24 { | ||
160 | reg = <0x24>; | ||
161 | }; | ||
162 | |||
163 | }; | ||
164 | }; | ||
165 | |||
166 | leds { | ||
167 | pinctrl-names = "default"; | ||
168 | pinctrl-0 = <&user_leds_s0>; | ||
169 | |||
170 | compatible = "gpio-leds"; | ||
171 | |||
172 | led@2 { | ||
173 | label = "beaglebone:green:heartbeat"; | ||
174 | gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; | ||
175 | linux,default-trigger = "heartbeat"; | ||
176 | default-state = "off"; | ||
177 | }; | ||
178 | |||
179 | led@3 { | ||
180 | label = "beaglebone:green:mmc0"; | ||
181 | gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; | ||
182 | linux,default-trigger = "mmc0"; | ||
183 | default-state = "off"; | ||
184 | }; | ||
185 | |||
186 | led@4 { | ||
187 | label = "beaglebone:green:usr2"; | ||
188 | gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | ||
189 | default-state = "off"; | ||
190 | }; | ||
191 | |||
192 | led@5 { | ||
193 | label = "beaglebone:green:usr3"; | ||
194 | gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; | ||
195 | default-state = "off"; | ||
196 | }; | ||
197 | }; | ||
198 | }; | ||
199 | |||
200 | /include/ "tps65217.dtsi" | ||
201 | |||
202 | &tps { | ||
203 | regulators { | ||
204 | dcdc1_reg: regulator@0 { | ||
205 | regulator-always-on; | ||
206 | }; | ||
207 | |||
208 | dcdc2_reg: regulator@1 { | ||
209 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | ||
210 | regulator-name = "vdd_mpu"; | ||
211 | regulator-min-microvolt = <925000>; | ||
212 | regulator-max-microvolt = <1325000>; | ||
213 | regulator-boot-on; | ||
214 | regulator-always-on; | ||
215 | }; | ||
216 | |||
217 | dcdc3_reg: regulator@2 { | ||
218 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | ||
219 | regulator-name = "vdd_core"; | ||
220 | regulator-min-microvolt = <925000>; | ||
221 | regulator-max-microvolt = <1150000>; | ||
222 | regulator-boot-on; | ||
223 | regulator-always-on; | ||
224 | }; | ||
225 | |||
226 | ldo1_reg: regulator@3 { | ||
227 | regulator-always-on; | ||
228 | }; | ||
229 | |||
230 | ldo2_reg: regulator@4 { | ||
231 | regulator-always-on; | ||
232 | }; | ||
233 | |||
234 | ldo3_reg: regulator@5 { | ||
235 | regulator-always-on; | ||
236 | }; | ||
237 | |||
238 | ldo4_reg: regulator@6 { | ||
239 | regulator-always-on; | ||
240 | }; | ||
241 | }; | ||
242 | }; | ||
243 | |||
244 | &cpsw_emac0 { | ||
245 | phy_id = <&davinci_mdio>, <0>; | ||
246 | phy-mode = "mii"; | ||
247 | }; | ||
248 | |||
249 | &cpsw_emac1 { | ||
250 | phy_id = <&davinci_mdio>, <1>; | ||
251 | phy-mode = "mii"; | ||
252 | }; | ||
253 | |||
254 | &mac { | ||
255 | pinctrl-names = "default", "sleep"; | ||
256 | pinctrl-0 = <&cpsw_default>; | ||
257 | pinctrl-1 = <&cpsw_sleep>; | ||
258 | |||
259 | }; | ||
260 | |||
261 | &davinci_mdio { | ||
262 | pinctrl-names = "default", "sleep"; | ||
263 | pinctrl-0 = <&davinci_mdio_default>; | ||
264 | pinctrl-1 = <&davinci_mdio_sleep>; | ||
265 | }; | ||
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts new file mode 100644 index 000000000000..197cadf72d2c --- /dev/null +++ b/arch/arm/boot/dts/am335x-boneblack.dts | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | |||
10 | #include "am33xx.dtsi" | ||
11 | #include "am335x-bone-common.dtsi" | ||
12 | |||
13 | &ldo3_reg { | ||
14 | regulator-min-microvolt = <1800000>; | ||
15 | regulator-max-microvolt = <1800000>; | ||
16 | regulator-always-on; | ||
17 | }; | ||
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index cf78ac0b04b1..e74dc15efa9d 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -190,12 +190,12 @@ | |||
190 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ | 190 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
191 | }; | 191 | }; |
192 | 192 | ||
193 | pinctrl_uart2_rts: uart2_rts-0 { | 193 | pinctrl_usart2_rts: usart2_rts-0 { |
194 | atmel,pins = | 194 | atmel,pins = |
195 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ | 195 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
196 | }; | 196 | }; |
197 | 197 | ||
198 | pinctrl_uart2_cts: uart2_cts-0 { | 198 | pinctrl_usart2_cts: usart2_cts-0 { |
199 | atmel,pins = | 199 | atmel,pins = |
200 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ | 200 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
201 | }; | 201 | }; |
@@ -556,6 +556,7 @@ | |||
556 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; | 556 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; |
557 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; | 557 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; |
558 | dma-names = "rxtx"; | 558 | dma-names = "rxtx"; |
559 | pinctrl-names = "default"; | ||
559 | #address-cells = <1>; | 560 | #address-cells = <1>; |
560 | #size-cells = <0>; | 561 | #size-cells = <0>; |
561 | status = "disabled"; | 562 | status = "disabled"; |
@@ -567,6 +568,7 @@ | |||
567 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; | 568 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
568 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; | 569 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; |
569 | dma-names = "rxtx"; | 570 | dma-names = "rxtx"; |
571 | pinctrl-names = "default"; | ||
570 | #address-cells = <1>; | 572 | #address-cells = <1>; |
571 | #size-cells = <0>; | 573 | #size-cells = <0>; |
572 | status = "disabled"; | 574 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi index 8678e0c11119..6db4f81d4795 100644 --- a/arch/arm/boot/dts/atlas6.dtsi +++ b/arch/arm/boot/dts/atlas6.dtsi | |||
@@ -181,6 +181,8 @@ | |||
181 | interrupts = <17>; | 181 | interrupts = <17>; |
182 | fifosize = <128>; | 182 | fifosize = <128>; |
183 | clocks = <&clks 13>; | 183 | clocks = <&clks 13>; |
184 | sirf,uart-dma-rx-channel = <21>; | ||
185 | sirf,uart-dma-tx-channel = <2>; | ||
184 | }; | 186 | }; |
185 | 187 | ||
186 | uart1: uart@b0060000 { | 188 | uart1: uart@b0060000 { |
@@ -199,6 +201,8 @@ | |||
199 | interrupts = <19>; | 201 | interrupts = <19>; |
200 | fifosize = <128>; | 202 | fifosize = <128>; |
201 | clocks = <&clks 15>; | 203 | clocks = <&clks 15>; |
204 | sirf,uart-dma-rx-channel = <6>; | ||
205 | sirf,uart-dma-tx-channel = <7>; | ||
202 | }; | 206 | }; |
203 | 207 | ||
204 | usp0: usp@b0080000 { | 208 | usp0: usp@b0080000 { |
@@ -206,7 +210,10 @@ | |||
206 | compatible = "sirf,prima2-usp"; | 210 | compatible = "sirf,prima2-usp"; |
207 | reg = <0xb0080000 0x10000>; | 211 | reg = <0xb0080000 0x10000>; |
208 | interrupts = <20>; | 212 | interrupts = <20>; |
213 | fifosize = <128>; | ||
209 | clocks = <&clks 28>; | 214 | clocks = <&clks 28>; |
215 | sirf,usp-dma-rx-channel = <17>; | ||
216 | sirf,usp-dma-tx-channel = <18>; | ||
210 | }; | 217 | }; |
211 | 218 | ||
212 | usp1: usp@b0090000 { | 219 | usp1: usp@b0090000 { |
@@ -214,7 +221,10 @@ | |||
214 | compatible = "sirf,prima2-usp"; | 221 | compatible = "sirf,prima2-usp"; |
215 | reg = <0xb0090000 0x10000>; | 222 | reg = <0xb0090000 0x10000>; |
216 | interrupts = <21>; | 223 | interrupts = <21>; |
224 | fifosize = <128>; | ||
217 | clocks = <&clks 29>; | 225 | clocks = <&clks 29>; |
226 | sirf,usp-dma-rx-channel = <14>; | ||
227 | sirf,usp-dma-tx-channel = <15>; | ||
218 | }; | 228 | }; |
219 | 229 | ||
220 | dmac0: dma-controller@b00b0000 { | 230 | dmac0: dma-controller@b00b0000 { |
@@ -237,6 +247,8 @@ | |||
237 | compatible = "sirf,prima2-vip"; | 247 | compatible = "sirf,prima2-vip"; |
238 | reg = <0xb00C0000 0x10000>; | 248 | reg = <0xb00C0000 0x10000>; |
239 | clocks = <&clks 31>; | 249 | clocks = <&clks 31>; |
250 | interrupts = <14>; | ||
251 | sirf,vip-dma-rx-channel = <16>; | ||
240 | }; | 252 | }; |
241 | 253 | ||
242 | spi0: spi@b00d0000 { | 254 | spi0: spi@b00d0000 { |
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index c037c223619a..b7a1c6d950b9 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -187,7 +187,7 @@ | |||
187 | compatible = "fsl,imx27-cspi"; | 187 | compatible = "fsl,imx27-cspi"; |
188 | reg = <0x1000e000 0x1000>; | 188 | reg = <0x1000e000 0x1000>; |
189 | interrupts = <16>; | 189 | interrupts = <16>; |
190 | clocks = <&clks 53>, <&clks 53>; | 190 | clocks = <&clks 53>, <&clks 60>; |
191 | clock-names = "ipg", "per"; | 191 | clock-names = "ipg", "per"; |
192 | status = "disabled"; | 192 | status = "disabled"; |
193 | }; | 193 | }; |
@@ -198,7 +198,7 @@ | |||
198 | compatible = "fsl,imx27-cspi"; | 198 | compatible = "fsl,imx27-cspi"; |
199 | reg = <0x1000f000 0x1000>; | 199 | reg = <0x1000f000 0x1000>; |
200 | interrupts = <15>; | 200 | interrupts = <15>; |
201 | clocks = <&clks 52>, <&clks 52>; | 201 | clocks = <&clks 52>, <&clks 60>; |
202 | clock-names = "ipg", "per"; | 202 | clock-names = "ipg", "per"; |
203 | status = "disabled"; | 203 | status = "disabled"; |
204 | }; | 204 | }; |
@@ -309,7 +309,7 @@ | |||
309 | compatible = "fsl,imx27-cspi"; | 309 | compatible = "fsl,imx27-cspi"; |
310 | reg = <0x10017000 0x1000>; | 310 | reg = <0x10017000 0x1000>; |
311 | interrupts = <6>; | 311 | interrupts = <6>; |
312 | clocks = <&clks 51>, <&clks 51>; | 312 | clocks = <&clks 51>, <&clks 60>; |
313 | clock-names = "ipg", "per"; | 313 | clock-names = "ipg", "per"; |
314 | status = "disabled"; | 314 | status = "disabled"; |
315 | }; | 315 | }; |
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index a85abb424c34..54cee6517902 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -474,7 +474,7 @@ | |||
474 | compatible = "fsl,imx51-pata", "fsl,imx27-pata"; | 474 | compatible = "fsl,imx51-pata", "fsl,imx27-pata"; |
475 | reg = <0x83fe0000 0x4000>; | 475 | reg = <0x83fe0000 0x4000>; |
476 | interrupts = <70>; | 476 | interrupts = <70>; |
477 | clocks = <&clks 161>; | 477 | clocks = <&clks 172>; |
478 | status = "disabled"; | 478 | status = "disabled"; |
479 | }; | 479 | }; |
480 | 480 | ||
diff --git a/arch/arm/boot/dts/imx6q-pinfunc.h b/arch/arm/boot/dts/imx6q-pinfunc.h index c0e38a45e4bb..9bbe82bdee41 100644 --- a/arch/arm/boot/dts/imx6q-pinfunc.h +++ b/arch/arm/boot/dts/imx6q-pinfunc.h | |||
@@ -207,8 +207,8 @@ | |||
207 | #define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1 | 207 | #define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1 |
208 | #define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1 | 208 | #define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1 |
209 | #define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0 | 209 | #define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0 |
210 | #define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c4 0x3dc 0x000 0x4 0x0 | 210 | #define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c8 0x3dc 0x000 0x4 0x0 |
211 | #define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c4 0x3dc 0x924 0x4 0x1 | 211 | #define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c8 0x3dc 0x924 0x4 0x1 |
212 | #define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0 | 212 | #define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0 |
213 | #define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0 | 213 | #define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0 |
214 | #define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0 | 214 | #define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0 |
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index afdb16417d4e..0c514dc8460c 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts | |||
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | / { | 12 | / { |
13 | model = "TI OMAP3 BeagleBoard xM"; | 13 | model = "TI OMAP3 BeagleBoard xM"; |
14 | compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3"; | 14 | compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3"; |
15 | 15 | ||
16 | cpus { | 16 | cpus { |
17 | cpu@0 { | 17 | cpu@0 { |
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index bc48b114eae6..2326d11462a5 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi | |||
@@ -48,6 +48,15 @@ | |||
48 | >; | 48 | >; |
49 | }; | 49 | }; |
50 | 50 | ||
51 | mcbsp2_pins: pinmux_mcbsp2_pins { | ||
52 | pinctrl-single,pins = < | ||
53 | 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ | ||
54 | 0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */ | ||
55 | 0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */ | ||
56 | 0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */ | ||
57 | >; | ||
58 | }; | ||
59 | |||
51 | mmc1_pins: pinmux_mmc1_pins { | 60 | mmc1_pins: pinmux_mmc1_pins { |
52 | pinctrl-single,pins = < | 61 | pinctrl-single,pins = < |
53 | 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ | 62 | 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ |
@@ -93,6 +102,11 @@ | |||
93 | clock-frequency = <400000>; | 102 | clock-frequency = <400000>; |
94 | }; | 103 | }; |
95 | 104 | ||
105 | &mcbsp2 { | ||
106 | pinctrl-names = "default"; | ||
107 | pinctrl-0 = <&mcbsp2_pins>; | ||
108 | }; | ||
109 | |||
96 | &mmc1 { | 110 | &mmc1 { |
97 | pinctrl-names = "default"; | 111 | pinctrl-names = "default"; |
98 | pinctrl-0 = <&mmc1_pins>; | 112 | pinctrl-0 = <&mmc1_pins>; |
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index faa95b5b242e..814ab67c8c29 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi | |||
@@ -107,6 +107,19 @@ | |||
107 | */ | 107 | */ |
108 | clock-frequency = <19200000>; | 108 | clock-frequency = <19200000>; |
109 | }; | 109 | }; |
110 | |||
111 | /* regulator for wl12xx on sdio5 */ | ||
112 | wl12xx_vmmc: wl12xx_vmmc { | ||
113 | pinctrl-names = "default"; | ||
114 | pinctrl-0 = <&wl12xx_gpio>; | ||
115 | compatible = "regulator-fixed"; | ||
116 | regulator-name = "vwl1271"; | ||
117 | regulator-min-microvolt = <1800000>; | ||
118 | regulator-max-microvolt = <1800000>; | ||
119 | gpio = <&gpio2 11 0>; | ||
120 | startup-delay-us = <70000>; | ||
121 | enable-active-high; | ||
122 | }; | ||
110 | }; | 123 | }; |
111 | 124 | ||
112 | &omap4_pmx_wkup { | 125 | &omap4_pmx_wkup { |
@@ -235,6 +248,33 @@ | |||
235 | 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ | 248 | 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ |
236 | >; | 249 | >; |
237 | }; | 250 | }; |
251 | |||
252 | /* | ||
253 | * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP | ||
254 | * REVISIT: Are the pull-ups needed for GPIO 48 and 49? | ||
255 | */ | ||
256 | wl12xx_gpio: pinmux_wl12xx_gpio { | ||
257 | pinctrl-single,pins = < | ||
258 | 0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */ | ||
259 | 0x2c (PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */ | ||
260 | 0x30 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */ | ||
261 | 0x32 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */ | ||
262 | >; | ||
263 | }; | ||
264 | |||
265 | /* wl12xx GPIO inputs and SDIO pins */ | ||
266 | wl12xx_pins: pinmux_wl12xx_pins { | ||
267 | pinctrl-single,pins = < | ||
268 | 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */ | ||
269 | 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ | ||
270 | 0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ | ||
271 | 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ | ||
272 | 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ | ||
273 | 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ | ||
274 | 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */ | ||
275 | 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */ | ||
276 | >; | ||
277 | }; | ||
238 | }; | 278 | }; |
239 | 279 | ||
240 | &i2c1 { | 280 | &i2c1 { |
@@ -314,8 +354,12 @@ | |||
314 | }; | 354 | }; |
315 | 355 | ||
316 | &mmc5 { | 356 | &mmc5 { |
317 | ti,non-removable; | 357 | pinctrl-names = "default"; |
358 | pinctrl-0 = <&wl12xx_pins>; | ||
359 | vmmc-supply = <&wl12xx_vmmc>; | ||
360 | non-removable; | ||
318 | bus-width = <4>; | 361 | bus-width = <4>; |
362 | cap-power-off-card; | ||
319 | }; | 363 | }; |
320 | 364 | ||
321 | &emif1 { | 365 | &emif1 { |
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 7951b4ea500a..4f78380ecdb8 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts | |||
@@ -140,6 +140,19 @@ | |||
140 | "DMic", "Digital Mic", | 140 | "DMic", "Digital Mic", |
141 | "Digital Mic", "Digital Mic1 Bias"; | 141 | "Digital Mic", "Digital Mic1 Bias"; |
142 | }; | 142 | }; |
143 | |||
144 | /* regulator for wl12xx on sdio5 */ | ||
145 | wl12xx_vmmc: wl12xx_vmmc { | ||
146 | pinctrl-names = "default"; | ||
147 | pinctrl-0 = <&wl12xx_gpio>; | ||
148 | compatible = "regulator-fixed"; | ||
149 | regulator-name = "vwl1271"; | ||
150 | regulator-min-microvolt = <1800000>; | ||
151 | regulator-max-microvolt = <1800000>; | ||
152 | gpio = <&gpio2 22 0>; | ||
153 | startup-delay-us = <70000>; | ||
154 | enable-active-high; | ||
155 | }; | ||
143 | }; | 156 | }; |
144 | 157 | ||
145 | &omap4_pmx_wkup { | 158 | &omap4_pmx_wkup { |
@@ -295,6 +308,26 @@ | |||
295 | 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ | 308 | 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ |
296 | >; | 309 | >; |
297 | }; | 310 | }; |
311 | |||
312 | /* wl12xx GPIO output for WLAN_EN */ | ||
313 | wl12xx_gpio: pinmux_wl12xx_gpio { | ||
314 | pinctrl-single,pins = < | ||
315 | 0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */ | ||
316 | >; | ||
317 | }; | ||
318 | |||
319 | /* wl12xx GPIO inputs and SDIO pins */ | ||
320 | wl12xx_pins: pinmux_wl12xx_pins { | ||
321 | pinctrl-single,pins = < | ||
322 | 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ | ||
323 | 0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */ | ||
324 | 0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */ | ||
325 | 0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */ | ||
326 | 0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */ | ||
327 | 0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */ | ||
328 | 0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */ | ||
329 | >; | ||
330 | }; | ||
298 | }; | 331 | }; |
299 | 332 | ||
300 | &i2c1 { | 333 | &i2c1 { |
@@ -420,8 +453,12 @@ | |||
420 | }; | 453 | }; |
421 | 454 | ||
422 | &mmc5 { | 455 | &mmc5 { |
456 | pinctrl-names = "default"; | ||
457 | pinctrl-0 = <&wl12xx_pins>; | ||
458 | vmmc-supply = <&wl12xx_vmmc>; | ||
459 | non-removable; | ||
423 | bus-width = <4>; | 460 | bus-width = <4>; |
424 | ti,non-removable; | 461 | cap-power-off-card; |
425 | }; | 462 | }; |
426 | 463 | ||
427 | &emif1 { | 464 | &emif1 { |
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 07be2cd7b318..7cdea1bfea09 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi | |||
@@ -637,7 +637,7 @@ | |||
637 | omap_dwc3@4a020000 { | 637 | omap_dwc3@4a020000 { |
638 | compatible = "ti,dwc3"; | 638 | compatible = "ti,dwc3"; |
639 | ti,hwmods = "usb_otg_ss"; | 639 | ti,hwmods = "usb_otg_ss"; |
640 | reg = <0x4a020000 0x1000>; | 640 | reg = <0x4a020000 0x10000>; |
641 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; | 641 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; |
642 | #address-cells = <1>; | 642 | #address-cells = <1>; |
643 | #size-cells = <1>; | 643 | #size-cells = <1>; |
@@ -645,17 +645,18 @@ | |||
645 | ranges; | 645 | ranges; |
646 | dwc3@4a030000 { | 646 | dwc3@4a030000 { |
647 | compatible = "snps,dwc3"; | 647 | compatible = "snps,dwc3"; |
648 | reg = <0x4a030000 0x1000>; | 648 | reg = <0x4a030000 0x10000>; |
649 | interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; | 649 | interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; |
650 | usb-phy = <&usb2_phy>, <&usb3_phy>; | 650 | usb-phy = <&usb2_phy>, <&usb3_phy>; |
651 | tx-fifo-resize; | 651 | tx-fifo-resize; |
652 | }; | 652 | }; |
653 | }; | 653 | }; |
654 | 654 | ||
655 | ocp2scp { | 655 | ocp2scp@4a080000 { |
656 | compatible = "ti,omap-ocp2scp"; | 656 | compatible = "ti,omap-ocp2scp"; |
657 | #address-cells = <1>; | 657 | #address-cells = <1>; |
658 | #size-cells = <1>; | 658 | #size-cells = <1>; |
659 | reg = <0x4a080000 0x20>; | ||
659 | ranges; | 660 | ranges; |
660 | ti,hwmods = "ocp2scp1"; | 661 | ti,hwmods = "ocp2scp1"; |
661 | usb2_phy: usb2phy@4a084000 { | 662 | usb2_phy: usb2phy@4a084000 { |
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index bbeb623fc2c6..27ed9f5144bc 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi | |||
@@ -171,7 +171,8 @@ | |||
171 | compatible = "simple-bus"; | 171 | compatible = "simple-bus"; |
172 | #address-cells = <1>; | 172 | #address-cells = <1>; |
173 | #size-cells = <1>; | 173 | #size-cells = <1>; |
174 | ranges = <0xb0000000 0xb0000000 0x180000>; | 174 | ranges = <0xb0000000 0xb0000000 0x180000>, |
175 | <0x56000000 0x56000000 0x1b00000>; | ||
175 | 176 | ||
176 | timer@b0020000 { | 177 | timer@b0020000 { |
177 | compatible = "sirf,prima2-tick"; | 178 | compatible = "sirf,prima2-tick"; |
@@ -196,25 +197,32 @@ | |||
196 | uart0: uart@b0050000 { | 197 | uart0: uart@b0050000 { |
197 | cell-index = <0>; | 198 | cell-index = <0>; |
198 | compatible = "sirf,prima2-uart"; | 199 | compatible = "sirf,prima2-uart"; |
199 | reg = <0xb0050000 0x10000>; | 200 | reg = <0xb0050000 0x1000>; |
200 | interrupts = <17>; | 201 | interrupts = <17>; |
202 | fifosize = <128>; | ||
201 | clocks = <&clks 13>; | 203 | clocks = <&clks 13>; |
204 | sirf,uart-dma-rx-channel = <21>; | ||
205 | sirf,uart-dma-tx-channel = <2>; | ||
202 | }; | 206 | }; |
203 | 207 | ||
204 | uart1: uart@b0060000 { | 208 | uart1: uart@b0060000 { |
205 | cell-index = <1>; | 209 | cell-index = <1>; |
206 | compatible = "sirf,prima2-uart"; | 210 | compatible = "sirf,prima2-uart"; |
207 | reg = <0xb0060000 0x10000>; | 211 | reg = <0xb0060000 0x1000>; |
208 | interrupts = <18>; | 212 | interrupts = <18>; |
213 | fifosize = <32>; | ||
209 | clocks = <&clks 14>; | 214 | clocks = <&clks 14>; |
210 | }; | 215 | }; |
211 | 216 | ||
212 | uart2: uart@b0070000 { | 217 | uart2: uart@b0070000 { |
213 | cell-index = <2>; | 218 | cell-index = <2>; |
214 | compatible = "sirf,prima2-uart"; | 219 | compatible = "sirf,prima2-uart"; |
215 | reg = <0xb0070000 0x10000>; | 220 | reg = <0xb0070000 0x1000>; |
216 | interrupts = <19>; | 221 | interrupts = <19>; |
222 | fifosize = <128>; | ||
217 | clocks = <&clks 15>; | 223 | clocks = <&clks 15>; |
224 | sirf,uart-dma-rx-channel = <6>; | ||
225 | sirf,uart-dma-tx-channel = <7>; | ||
218 | }; | 226 | }; |
219 | 227 | ||
220 | usp0: usp@b0080000 { | 228 | usp0: usp@b0080000 { |
@@ -222,7 +230,10 @@ | |||
222 | compatible = "sirf,prima2-usp"; | 230 | compatible = "sirf,prima2-usp"; |
223 | reg = <0xb0080000 0x10000>; | 231 | reg = <0xb0080000 0x10000>; |
224 | interrupts = <20>; | 232 | interrupts = <20>; |
233 | fifosize = <128>; | ||
225 | clocks = <&clks 28>; | 234 | clocks = <&clks 28>; |
235 | sirf,usp-dma-rx-channel = <17>; | ||
236 | sirf,usp-dma-tx-channel = <18>; | ||
226 | }; | 237 | }; |
227 | 238 | ||
228 | usp1: usp@b0090000 { | 239 | usp1: usp@b0090000 { |
@@ -230,7 +241,10 @@ | |||
230 | compatible = "sirf,prima2-usp"; | 241 | compatible = "sirf,prima2-usp"; |
231 | reg = <0xb0090000 0x10000>; | 242 | reg = <0xb0090000 0x10000>; |
232 | interrupts = <21>; | 243 | interrupts = <21>; |
244 | fifosize = <128>; | ||
233 | clocks = <&clks 29>; | 245 | clocks = <&clks 29>; |
246 | sirf,usp-dma-rx-channel = <14>; | ||
247 | sirf,usp-dma-tx-channel = <15>; | ||
234 | }; | 248 | }; |
235 | 249 | ||
236 | usp2: usp@b00a0000 { | 250 | usp2: usp@b00a0000 { |
@@ -238,7 +252,10 @@ | |||
238 | compatible = "sirf,prima2-usp"; | 252 | compatible = "sirf,prima2-usp"; |
239 | reg = <0xb00a0000 0x10000>; | 253 | reg = <0xb00a0000 0x10000>; |
240 | interrupts = <22>; | 254 | interrupts = <22>; |
255 | fifosize = <128>; | ||
241 | clocks = <&clks 30>; | 256 | clocks = <&clks 30>; |
257 | sirf,usp-dma-rx-channel = <10>; | ||
258 | sirf,usp-dma-tx-channel = <11>; | ||
242 | }; | 259 | }; |
243 | 260 | ||
244 | dmac0: dma-controller@b00b0000 { | 261 | dmac0: dma-controller@b00b0000 { |
@@ -261,6 +278,8 @@ | |||
261 | compatible = "sirf,prima2-vip"; | 278 | compatible = "sirf,prima2-vip"; |
262 | reg = <0xb00C0000 0x10000>; | 279 | reg = <0xb00C0000 0x10000>; |
263 | clocks = <&clks 31>; | 280 | clocks = <&clks 31>; |
281 | interrupts = <14>; | ||
282 | sirf,vip-dma-rx-channel = <16>; | ||
264 | }; | 283 | }; |
265 | 284 | ||
266 | spi0: spi@b00d0000 { | 285 | spi0: spi@b00d0000 { |
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 6c26caa880f2..658fcc537576 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi | |||
@@ -193,7 +193,7 @@ | |||
193 | }; | 193 | }; |
194 | 194 | ||
195 | sdhi0: sdhi@ee100000 { | 195 | sdhi0: sdhi@ee100000 { |
196 | compatible = "renesas,r8a73a4-sdhi"; | 196 | compatible = "renesas,sdhi-r8a73a4"; |
197 | reg = <0 0xee100000 0 0x100>; | 197 | reg = <0 0xee100000 0 0x100>; |
198 | interrupt-parent = <&gic>; | 198 | interrupt-parent = <&gic>; |
199 | interrupts = <0 165 4>; | 199 | interrupts = <0 165 4>; |
@@ -202,7 +202,7 @@ | |||
202 | }; | 202 | }; |
203 | 203 | ||
204 | sdhi1: sdhi@ee120000 { | 204 | sdhi1: sdhi@ee120000 { |
205 | compatible = "renesas,r8a73a4-sdhi"; | 205 | compatible = "renesas,sdhi-r8a73a4"; |
206 | reg = <0 0xee120000 0 0x100>; | 206 | reg = <0 0xee120000 0 0x100>; |
207 | interrupt-parent = <&gic>; | 207 | interrupt-parent = <&gic>; |
208 | interrupts = <0 166 4>; | 208 | interrupts = <0 166 4>; |
@@ -211,7 +211,7 @@ | |||
211 | }; | 211 | }; |
212 | 212 | ||
213 | sdhi2: sdhi@ee140000 { | 213 | sdhi2: sdhi@ee140000 { |
214 | compatible = "renesas,r8a73a4-sdhi"; | 214 | compatible = "renesas,sdhi-r8a73a4"; |
215 | reg = <0 0xee140000 0 0x100>; | 215 | reg = <0 0xee140000 0 0x100>; |
216 | interrupt-parent = <&gic>; | 216 | interrupt-parent = <&gic>; |
217 | interrupts = <0 167 4>; | 217 | interrupts = <0 167 4>; |
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 45ac404ab6d8..3577aba82583 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi | |||
@@ -96,6 +96,5 @@ | |||
96 | pfc: pfc@fffc0000 { | 96 | pfc: pfc@fffc0000 { |
97 | compatible = "renesas,pfc-r8a7778"; | 97 | compatible = "renesas,pfc-r8a7778"; |
98 | reg = <0xfffc000 0x118>; | 98 | reg = <0xfffc000 0x118>; |
99 | #gpio-range-cells = <3>; | ||
100 | }; | 99 | }; |
101 | }; | 100 | }; |
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 23a62447359c..ebbe507fcbfa 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi | |||
@@ -188,7 +188,6 @@ | |||
188 | pfc: pfc@fffc0000 { | 188 | pfc: pfc@fffc0000 { |
189 | compatible = "renesas,pfc-r8a7779"; | 189 | compatible = "renesas,pfc-r8a7779"; |
190 | reg = <0xfffc0000 0x23c>; | 190 | reg = <0xfffc0000 0x23c>; |
191 | #gpio-range-cells = <3>; | ||
192 | }; | 191 | }; |
193 | 192 | ||
194 | thermal@ffc48000 { | 193 | thermal@ffc48000 { |
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 3b879e7c697c..413b4c29e782 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi | |||
@@ -148,11 +148,10 @@ | |||
148 | pfc: pfc@e6060000 { | 148 | pfc: pfc@e6060000 { |
149 | compatible = "renesas,pfc-r8a7790"; | 149 | compatible = "renesas,pfc-r8a7790"; |
150 | reg = <0 0xe6060000 0 0x250>; | 150 | reg = <0 0xe6060000 0 0x250>; |
151 | #gpio-range-cells = <3>; | ||
152 | }; | 151 | }; |
153 | 152 | ||
154 | sdhi0: sdhi@ee100000 { | 153 | sdhi0: sdhi@ee100000 { |
155 | compatible = "renesas,r8a7790-sdhi"; | 154 | compatible = "renesas,sdhi-r8a7790"; |
156 | reg = <0 0xee100000 0 0x100>; | 155 | reg = <0 0xee100000 0 0x100>; |
157 | interrupt-parent = <&gic>; | 156 | interrupt-parent = <&gic>; |
158 | interrupts = <0 165 4>; | 157 | interrupts = <0 165 4>; |
@@ -161,7 +160,7 @@ | |||
161 | }; | 160 | }; |
162 | 161 | ||
163 | sdhi1: sdhi@ee120000 { | 162 | sdhi1: sdhi@ee120000 { |
164 | compatible = "renesas,r8a7790-sdhi"; | 163 | compatible = "renesas,sdhi-r8a7790"; |
165 | reg = <0 0xee120000 0 0x100>; | 164 | reg = <0 0xee120000 0 0x100>; |
166 | interrupt-parent = <&gic>; | 165 | interrupt-parent = <&gic>; |
167 | interrupts = <0 166 4>; | 166 | interrupts = <0 166 4>; |
@@ -170,7 +169,7 @@ | |||
170 | }; | 169 | }; |
171 | 170 | ||
172 | sdhi2: sdhi@ee140000 { | 171 | sdhi2: sdhi@ee140000 { |
173 | compatible = "renesas,r8a7790-sdhi"; | 172 | compatible = "renesas,sdhi-r8a7790"; |
174 | reg = <0 0xee140000 0 0x100>; | 173 | reg = <0 0xee140000 0 0x100>; |
175 | interrupt-parent = <&gic>; | 174 | interrupt-parent = <&gic>; |
176 | interrupts = <0 167 4>; | 175 | interrupts = <0 167 4>; |
@@ -179,7 +178,7 @@ | |||
179 | }; | 178 | }; |
180 | 179 | ||
181 | sdhi3: sdhi@ee160000 { | 180 | sdhi3: sdhi@ee160000 { |
182 | compatible = "renesas,r8a7790-sdhi"; | 181 | compatible = "renesas,sdhi-r8a7790"; |
183 | reg = <0 0xee160000 0 0x100>; | 182 | reg = <0 0xee160000 0 0x100>; |
184 | interrupt-parent = <&gic>; | 183 | interrupt-parent = <&gic>; |
185 | interrupts = <0 168 4>; | 184 | interrupts = <0 168 4>; |
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index ba59a5875a10..3955c7606a6f 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi | |||
@@ -196,7 +196,7 @@ | |||
196 | }; | 196 | }; |
197 | 197 | ||
198 | sdhi0: sdhi@ee100000 { | 198 | sdhi0: sdhi@ee100000 { |
199 | compatible = "renesas,r8a7740-sdhi"; | 199 | compatible = "renesas,sdhi-r8a7740"; |
200 | reg = <0xee100000 0x100>; | 200 | reg = <0xee100000 0x100>; |
201 | interrupt-parent = <&gic>; | 201 | interrupt-parent = <&gic>; |
202 | interrupts = <0 83 4 | 202 | interrupts = <0 83 4 |
@@ -208,7 +208,7 @@ | |||
208 | 208 | ||
209 | /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ | 209 | /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ |
210 | sdhi1: sdhi@ee120000 { | 210 | sdhi1: sdhi@ee120000 { |
211 | compatible = "renesas,r8a7740-sdhi"; | 211 | compatible = "renesas,sdhi-r8a7740"; |
212 | reg = <0xee120000 0x100>; | 212 | reg = <0xee120000 0x100>; |
213 | interrupt-parent = <&gic>; | 213 | interrupt-parent = <&gic>; |
214 | interrupts = <0 88 4 | 214 | interrupts = <0 88 4 |
@@ -219,7 +219,7 @@ | |||
219 | }; | 219 | }; |
220 | 220 | ||
221 | sdhi2: sdhi@ee140000 { | 221 | sdhi2: sdhi@ee140000 { |
222 | compatible = "renesas,r8a7740-sdhi"; | 222 | compatible = "renesas,sdhi-r8a7740"; |
223 | reg = <0xee140000 0x100>; | 223 | reg = <0xee140000 0x100>; |
224 | interrupt-parent = <&gic>; | 224 | interrupt-parent = <&gic>; |
225 | interrupts = <0 104 4 | 225 | interrupts = <0 104 4 |
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c index 117f955a2a06..8e1a0245907f 100644 --- a/arch/arm/common/edma.c +++ b/arch/arm/common/edma.c | |||
@@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = { | |||
269 | .ccnt = 1, | 269 | .ccnt = 1, |
270 | }; | 270 | }; |
271 | 271 | ||
272 | static const struct of_device_id edma_of_ids[] = { | ||
273 | { .compatible = "ti,edma3", }, | ||
274 | {} | ||
275 | }; | ||
276 | |||
272 | /*****************************************************************************/ | 277 | /*****************************************************************************/ |
273 | 278 | ||
274 | static void map_dmach_queue(unsigned ctlr, unsigned ch_no, | 279 | static void map_dmach_queue(unsigned ctlr, unsigned ch_no, |
@@ -560,14 +565,38 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id, | |||
560 | static int prepare_unused_channel_list(struct device *dev, void *data) | 565 | static int prepare_unused_channel_list(struct device *dev, void *data) |
561 | { | 566 | { |
562 | struct platform_device *pdev = to_platform_device(dev); | 567 | struct platform_device *pdev = to_platform_device(dev); |
563 | int i, ctlr; | 568 | int i, count, ctlr; |
569 | struct of_phandle_args dma_spec; | ||
564 | 570 | ||
571 | if (dev->of_node) { | ||
572 | count = of_property_count_strings(dev->of_node, "dma-names"); | ||
573 | if (count < 0) | ||
574 | return 0; | ||
575 | for (i = 0; i < count; i++) { | ||
576 | if (of_parse_phandle_with_args(dev->of_node, "dmas", | ||
577 | "#dma-cells", i, | ||
578 | &dma_spec)) | ||
579 | continue; | ||
580 | |||
581 | if (!of_match_node(edma_of_ids, dma_spec.np)) { | ||
582 | of_node_put(dma_spec.np); | ||
583 | continue; | ||
584 | } | ||
585 | |||
586 | clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]), | ||
587 | edma_cc[0]->edma_unused); | ||
588 | of_node_put(dma_spec.np); | ||
589 | } | ||
590 | return 0; | ||
591 | } | ||
592 | |||
593 | /* For non-OF case */ | ||
565 | for (i = 0; i < pdev->num_resources; i++) { | 594 | for (i = 0; i < pdev->num_resources; i++) { |
566 | if ((pdev->resource[i].flags & IORESOURCE_DMA) && | 595 | if ((pdev->resource[i].flags & IORESOURCE_DMA) && |
567 | (int)pdev->resource[i].start >= 0) { | 596 | (int)pdev->resource[i].start >= 0) { |
568 | ctlr = EDMA_CTLR(pdev->resource[i].start); | 597 | ctlr = EDMA_CTLR(pdev->resource[i].start); |
569 | clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), | 598 | clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), |
570 | edma_cc[ctlr]->edma_unused); | 599 | edma_cc[ctlr]->edma_unused); |
571 | } | 600 | } |
572 | } | 601 | } |
573 | 602 | ||
@@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev) | |||
1762 | return 0; | 1791 | return 0; |
1763 | } | 1792 | } |
1764 | 1793 | ||
1765 | static const struct of_device_id edma_of_ids[] = { | ||
1766 | { .compatible = "ti,edma3", }, | ||
1767 | {} | ||
1768 | }; | ||
1769 | |||
1770 | static struct platform_driver edma_driver = { | 1794 | static struct platform_driver edma_driver = { |
1771 | .driver = { | 1795 | .driver = { |
1772 | .name = "edma", | 1796 | .name = "edma", |
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 6e572c64cf5a..119fc378fc52 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig | |||
@@ -36,6 +36,7 @@ CONFIG_ARCH_TEGRA_114_SOC=y | |||
36 | CONFIG_TEGRA_PCI=y | 36 | CONFIG_TEGRA_PCI=y |
37 | CONFIG_TEGRA_EMC_SCALING_ENABLE=y | 37 | CONFIG_TEGRA_EMC_SCALING_ENABLE=y |
38 | CONFIG_ARCH_U8500=y | 38 | CONFIG_ARCH_U8500=y |
39 | CONFIG_MACH_HREFV60=y | ||
39 | CONFIG_MACH_SNOWBALL=y | 40 | CONFIG_MACH_SNOWBALL=y |
40 | CONFIG_MACH_UX500_DT=y | 41 | CONFIG_MACH_UX500_DT=y |
41 | CONFIG_ARCH_VEXPRESS=y | 42 | CONFIG_ARCH_VEXPRESS=y |
@@ -46,6 +47,7 @@ CONFIG_ARCH_ZYNQ=y | |||
46 | CONFIG_SMP=y | 47 | CONFIG_SMP=y |
47 | CONFIG_HIGHPTE=y | 48 | CONFIG_HIGHPTE=y |
48 | CONFIG_ARM_APPENDED_DTB=y | 49 | CONFIG_ARM_APPENDED_DTB=y |
50 | CONFIG_ARM_ATAG_DTB_COMPAT=y | ||
49 | CONFIG_NET=y | 51 | CONFIG_NET=y |
50 | CONFIG_UNIX=y | 52 | CONFIG_UNIX=y |
51 | CONFIG_INET=y | 53 | CONFIG_INET=y |
@@ -133,6 +135,7 @@ CONFIG_MMC=y | |||
133 | CONFIG_MMC_ARMMMCI=y | 135 | CONFIG_MMC_ARMMMCI=y |
134 | CONFIG_MMC_SDHCI=y | 136 | CONFIG_MMC_SDHCI=y |
135 | CONFIG_MMC_SDHCI_PLTFM=y | 137 | CONFIG_MMC_SDHCI_PLTFM=y |
138 | CONFIG_MMC_SDHCI_ESDHC_IMX=y | ||
136 | CONFIG_MMC_SDHCI_TEGRA=y | 139 | CONFIG_MMC_SDHCI_TEGRA=y |
137 | CONFIG_MMC_SDHCI_SPEAR=y | 140 | CONFIG_MMC_SDHCI_SPEAR=y |
138 | CONFIG_MMC_OMAP=y | 141 | CONFIG_MMC_OMAP=y |
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 180b3024bec3..f607deb40f4d 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
@@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) | |||
93 | 93 | ||
94 | static struct irqaction at91rm9200_timer_irq = { | 94 | static struct irqaction at91rm9200_timer_irq = { |
95 | .name = "at91_tick", | 95 | .name = "at91_tick", |
96 | .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 96 | .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, |
97 | .handler = at91rm9200_timer_interrupt, | 97 | .handler = at91rm9200_timer_interrupt, |
98 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, | 98 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
99 | }; | 99 | }; |
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 3a4bc2e1a65e..bb392320a0dd 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c | |||
@@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) | |||
171 | 171 | ||
172 | static struct irqaction at91sam926x_pit_irq = { | 172 | static struct irqaction at91sam926x_pit_irq = { |
173 | .name = "at91_tick", | 173 | .name = "at91_tick", |
174 | .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 174 | .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, |
175 | .handler = at91sam926x_pit_interrupt, | 175 | .handler = at91sam926x_pit_interrupt, |
176 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, | 176 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
177 | }; | 177 | }; |
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S index 721a1a34dd1d..c40c1e2ef80f 100644 --- a/arch/arm/mach-at91/at91sam9g45_reset.S +++ b/arch/arm/mach-at91/at91sam9g45_reset.S | |||
@@ -16,11 +16,17 @@ | |||
16 | #include "at91_rstc.h" | 16 | #include "at91_rstc.h" |
17 | .arm | 17 | .arm |
18 | 18 | ||
19 | /* | ||
20 | * at91_ramc_base is an array void* | ||
21 | * init at NULL if only one DDR controler is present in or DT | ||
22 | */ | ||
19 | .globl at91sam9g45_restart | 23 | .globl at91sam9g45_restart |
20 | 24 | ||
21 | at91sam9g45_restart: | 25 | at91sam9g45_restart: |
22 | ldr r5, =at91_ramc_base @ preload constants | 26 | ldr r5, =at91_ramc_base @ preload constants |
23 | ldr r0, [r5] | 27 | ldr r0, [r5] |
28 | ldr r5, [r5, #4] @ ddr1 | ||
29 | cmp r5, #0 | ||
24 | ldr r4, =at91_rstc_base | 30 | ldr r4, =at91_rstc_base |
25 | ldr r1, [r4] | 31 | ldr r1, [r4] |
26 | 32 | ||
@@ -30,6 +36,8 @@ at91sam9g45_restart: | |||
30 | 36 | ||
31 | .balign 32 @ align to cache line | 37 | .balign 32 @ align to cache line |
32 | 38 | ||
39 | strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access | ||
40 | strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1 | ||
33 | str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access | 41 | str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access |
34 | str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 | 42 | str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 |
35 | str r4, [r1, #AT91_RSTC_CR] @ reset processor | 43 | str r4, [r1, #AT91_RSTC_CR] @ reset processor |
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index 2919eba41ff4..c0e637adf65d 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c | |||
@@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id) | |||
57 | 57 | ||
58 | static struct irqaction at91x40_timer_irq = { | 58 | static struct irqaction at91x40_timer_irq = { |
59 | .name = "at91_tick", | 59 | .name = "at91_tick", |
60 | .flags = IRQF_DISABLED | IRQF_TIMER, | 60 | .flags = IRQF_TIMER, |
61 | .handler = at91x40_timer_interrupt | 61 | .handler = at91x40_timer_interrupt |
62 | }; | 62 | }; |
63 | 63 | ||
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 92b7f770615a..4078ba93776b 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = { | |||
176 | .context = (void *)0x7f00, | 176 | .context = (void *)0x7f00, |
177 | }; | 177 | }; |
178 | 178 | ||
179 | static struct snd_platform_data dm365_evm_snd_data = { | 179 | static struct snd_platform_data dm365_evm_snd_data __maybe_unused = { |
180 | .asp_chan_q = EVENTQ_3, | 180 | .asp_chan_q = EVENTQ_3, |
181 | }; | 181 | }; |
182 | 182 | ||
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index 52b8571b2e70..ce402cd21fa0 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
@@ -15,8 +15,6 @@ | |||
15 | 15 | ||
16 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
17 | 17 | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) | 18 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
21 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) | 19 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
22 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) | 20 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) |
@@ -39,6 +37,8 @@ | |||
39 | #define UART_DM646X_SCR_TX_WATERMARK 0x08 | 37 | #define UART_DM646X_SCR_TX_WATERMARK 0x08 |
40 | 38 | ||
41 | #ifndef __ASSEMBLY__ | 39 | #ifndef __ASSEMBLY__ |
40 | #include <linux/platform_device.h> | ||
41 | |||
42 | extern int davinci_serial_init(struct platform_device *); | 42 | extern int davinci_serial_init(struct platform_device *); |
43 | #endif | 43 | #endif |
44 | 44 | ||
diff --git a/arch/arm/mach-imx/clk-fixup-mux.c b/arch/arm/mach-imx/clk-fixup-mux.c index deb4b8093b30..0d40b35c557c 100644 --- a/arch/arm/mach-imx/clk-fixup-mux.c +++ b/arch/arm/mach-imx/clk-fixup-mux.c | |||
@@ -90,6 +90,7 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, | |||
90 | init.ops = &clk_fixup_mux_ops; | 90 | init.ops = &clk_fixup_mux_ops; |
91 | init.parent_names = parents; | 91 | init.parent_names = parents; |
92 | init.num_parents = num_parents; | 92 | init.num_parents = num_parents; |
93 | init.flags = 0; | ||
93 | 94 | ||
94 | fixup_mux->mux.reg = reg; | 95 | fixup_mux->mux.reg = reg; |
95 | fixup_mux->mux.shift = shift; | 96 | fixup_mux->mux.shift = shift; |
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 1a56a3319997..d9094b9a5185 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c | |||
@@ -397,7 +397,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, | |||
397 | mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel)); | 397 | mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel)); |
398 | clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2, | 398 | clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2, |
399 | spdif_sel, ARRAY_SIZE(spdif_sel)); | 399 | spdif_sel, ARRAY_SIZE(spdif_sel)); |
400 | clk[spdif1_pred] = imx_clk_divider("spdif1_podf", "spdif1_sel", MXC_CCM_CDCDR, 16, 3); | 400 | clk[spdif1_pred] = imx_clk_divider("spdif1_pred", "spdif1_sel", MXC_CCM_CDCDR, 16, 3); |
401 | clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6); | 401 | clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6); |
402 | clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1, | 402 | clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1, |
403 | mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel)); | 403 | mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel)); |
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 64ff37ea72b1..80c177c36c5f 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c | |||
@@ -117,6 +117,17 @@ void __init imx_init_l2cache(void) | |||
117 | /* Configure the L2 PREFETCH and POWER registers */ | 117 | /* Configure the L2 PREFETCH and POWER registers */ |
118 | val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); | 118 | val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); |
119 | val |= 0x70800000; | 119 | val |= 0x70800000; |
120 | /* | ||
121 | * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 | ||
122 | * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 | ||
123 | * But according to ARM PL310 errata: 752271 | ||
124 | * ID: 752271: Double linefill feature can cause data corruption | ||
125 | * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 | ||
126 | * Workaround: The only workaround to this erratum is to disable the | ||
127 | * double linefill feature. This is the default behavior. | ||
128 | */ | ||
129 | if (cpu_is_imx6q()) | ||
130 | val &= ~(1 << 30 | 1 << 23); | ||
120 | writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); | 131 | writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); |
121 | val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; | 132 | val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; |
122 | writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); | 133 | writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); |
diff --git a/arch/arm/mach-integrator/pci_v3.h b/arch/arm/mach-integrator/pci_v3.h index 755fd29fed4a..06a9e2e7d007 100644 --- a/arch/arm/mach-integrator/pci_v3.h +++ b/arch/arm/mach-integrator/pci_v3.h | |||
@@ -1,2 +1,9 @@ | |||
1 | /* Simple oneliner include to the PCIv3 early init */ | 1 | /* Simple oneliner include to the PCIv3 early init */ |
2 | #ifdef CONFIG_PCI | ||
2 | extern int pci_v3_early_init(void); | 3 | extern int pci_v3_early_init(void); |
4 | #else | ||
5 | static inline int pci_v3_early_init(void) | ||
6 | { | ||
7 | return 0; | ||
8 | } | ||
9 | #endif | ||
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index 1d5b5290d2af..b237950eb8a3 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c | |||
@@ -1632,7 +1632,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
1632 | CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck), | 1632 | CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck), |
1633 | CLK(NULL, "auxclk5_ck", &auxclk5_ck), | 1633 | CLK(NULL, "auxclk5_ck", &auxclk5_ck), |
1634 | CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck), | 1634 | CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck), |
1635 | CLK("omap-gpmc", "fck", &dummy_ck), | 1635 | CLK("50000000.gpmc", "fck", &dummy_ck), |
1636 | CLK("omap_i2c.1", "ick", &dummy_ck), | 1636 | CLK("omap_i2c.1", "ick", &dummy_ck), |
1637 | CLK("omap_i2c.2", "ick", &dummy_ck), | 1637 | CLK("omap_i2c.2", "ick", &dummy_ck), |
1638 | CLK("omap_i2c.3", "ick", &dummy_ck), | 1638 | CLK("omap_i2c.3", "ick", &dummy_ck), |
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index c443f2e97e10..4c8982ae9529 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c | |||
@@ -143,7 +143,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, | |||
143 | * Call idle CPU cluster PM exit notifier chain | 143 | * Call idle CPU cluster PM exit notifier chain |
144 | * to restore GIC and wakeupgen context. | 144 | * to restore GIC and wakeupgen context. |
145 | */ | 145 | */ |
146 | if ((cx->mpu_state == PWRDM_POWER_RET) && | 146 | if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) && |
147 | (cx->mpu_logic_state == PWRDM_POWER_OFF)) | 147 | (cx->mpu_logic_state == PWRDM_POWER_OFF)) |
148 | cpu_cluster_pm_exit(); | 148 | cpu_cluster_pm_exit(); |
149 | 149 | ||
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 9f4795aff48a..579697adaae7 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -1491,8 +1491,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, | |||
1491 | */ | 1491 | */ |
1492 | ret = gpmc_cs_remap(cs, res.start); | 1492 | ret = gpmc_cs_remap(cs, res.start); |
1493 | if (ret < 0) { | 1493 | if (ret < 0) { |
1494 | dev_err(&pdev->dev, "cannot remap GPMC CS %d to 0x%x\n", | 1494 | dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", |
1495 | cs, res.start); | 1495 | cs, &res.start); |
1496 | goto err; | 1496 | goto err; |
1497 | } | 1497 | } |
1498 | 1498 | ||
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index c53609f46294..be271f1d585b 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c | |||
@@ -620,7 +620,7 @@ static struct omap_mux __initdata omap3_muxmodes[] = { | |||
620 | "uart1_rts", "ssi1_flag_tx", NULL, NULL, | 620 | "uart1_rts", "ssi1_flag_tx", NULL, NULL, |
621 | "gpio_149", NULL, NULL, "safe_mode"), | 621 | "gpio_149", NULL, NULL, "safe_mode"), |
622 | _OMAP3_MUXENTRY(UART1_RX, 151, | 622 | _OMAP3_MUXENTRY(UART1_RX, 151, |
623 | "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", | 623 | "uart1_rx", "ssi1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", |
624 | "gpio_151", NULL, NULL, "safe_mode"), | 624 | "gpio_151", NULL, NULL, "safe_mode"), |
625 | _OMAP3_MUXENTRY(UART1_TX, 148, | 625 | _OMAP3_MUXENTRY(UART1_TX, 148, |
626 | "uart1_tx", "ssi1_dat_tx", NULL, NULL, | 626 | "uart1_tx", "ssi1_dat_tx", NULL, NULL, |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 8708b2a9da45..891211093295 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP4 SMP source file. It contains platform specific fucntions | 2 | * OMAP4 SMP source file. It contains platform specific functions |
3 | * needed for the linux smp kernel. | 3 | * needed for the linux smp kernel. |
4 | * | 4 | * |
5 | * Copyright (C) 2009 Texas Instruments, Inc. | 5 | * Copyright (C) 2009 Texas Instruments, Inc. |
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index f99f68e1e85b..b69dd9abb50a 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c | |||
@@ -158,7 +158,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev) | |||
158 | } | 158 | } |
159 | 159 | ||
160 | od = omap_device_alloc(pdev, hwmods, oh_cnt); | 160 | od = omap_device_alloc(pdev, hwmods, oh_cnt); |
161 | if (!od) { | 161 | if (IS_ERR(od)) { |
162 | dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n", | 162 | dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n", |
163 | oh_name); | 163 | oh_name); |
164 | ret = PTR_ERR(od); | 164 | ret = PTR_ERR(od); |
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 612a45689770..7fb96ebdc0fb 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c | |||
@@ -289,7 +289,7 @@ static void collie_flash_exit(void) | |||
289 | } | 289 | } |
290 | 290 | ||
291 | static struct flash_platform_data collie_flash_data = { | 291 | static struct flash_platform_data collie_flash_data = { |
292 | .map_name = "cfi_probe", | 292 | .map_name = "jedec_probe", |
293 | .init = collie_flash_init, | 293 | .init = collie_flash_init, |
294 | .set_vpp = collie_set_vpp, | 294 | .set_vpp = collie_set_vpp, |
295 | .exit = collie_flash_exit, | 295 | .exit = collie_flash_exit, |
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 5bd1479d3deb..7f8f6076d360 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c | |||
@@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = { | |||
1108 | PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740", | 1108 | PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740", |
1109 | "fsib_mclk_in", "fsib"), | 1109 | "fsib_mclk_in", "fsib"), |
1110 | /* GETHER */ | 1110 | /* GETHER */ |
1111 | PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740", | 1111 | PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740", |
1112 | "gether_mii", "gether"), | 1112 | "gether_mii", "gether"), |
1113 | PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740", | 1113 | PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740", |
1114 | "gether_int", "gether"), | 1114 | "gether_int", "gether"), |
1115 | /* HDMI */ | 1115 | /* HDMI */ |
1116 | PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740", | 1116 | PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740", |
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c index ffb6f0ac7606..5930af8d434f 100644 --- a/arch/arm/mach-shmobile/board-lager.c +++ b/arch/arm/mach-shmobile/board-lager.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/pinctrl/machine.h> | 29 | #include <linux/pinctrl/machine.h> |
30 | #include <linux/platform_data/gpio-rcar.h> | 30 | #include <linux/platform_data/gpio-rcar.h> |
31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
32 | #include <linux/phy.h> | ||
32 | #include <linux/regulator/fixed.h> | 33 | #include <linux/regulator/fixed.h> |
33 | #include <linux/regulator/machine.h> | 34 | #include <linux/regulator/machine.h> |
34 | #include <linux/sh_eth.h> | 35 | #include <linux/sh_eth.h> |
@@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void) | |||
155 | ðer_pdata, sizeof(ether_pdata)); | 156 | ðer_pdata, sizeof(ether_pdata)); |
156 | } | 157 | } |
157 | 158 | ||
159 | /* | ||
160 | * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds | ||
161 | * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits | ||
162 | * 14-15. We have to set them back to 01 from the default 00 value each time | ||
163 | * the PHY is reset. It's also important because the PHY's LED0 signal is | ||
164 | * connected to SoC's ETH_LINK signal and in the PHY's default mode it will | ||
165 | * bounce on and off after each packet, which we apparently want to avoid. | ||
166 | */ | ||
167 | static int lager_ksz8041_fixup(struct phy_device *phydev) | ||
168 | { | ||
169 | u16 phyctrl1 = phy_read(phydev, 0x1e); | ||
170 | |||
171 | phyctrl1 &= ~0xc000; | ||
172 | phyctrl1 |= 0x4000; | ||
173 | return phy_write(phydev, 0x1e, phyctrl1); | ||
174 | } | ||
175 | |||
176 | static void __init lager_init(void) | ||
177 | { | ||
178 | lager_add_standard_devices(); | ||
179 | |||
180 | phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup); | ||
181 | } | ||
182 | |||
158 | static const char *lager_boards_compat_dt[] __initdata = { | 183 | static const char *lager_boards_compat_dt[] __initdata = { |
159 | "renesas,lager", | 184 | "renesas,lager", |
160 | NULL, | 185 | NULL, |
@@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = { | |||
163 | DT_MACHINE_START(LAGER_DT, "lager") | 188 | DT_MACHINE_START(LAGER_DT, "lager") |
164 | .init_early = r8a7790_init_delay, | 189 | .init_early = r8a7790_init_delay, |
165 | .init_time = r8a7790_timer_init, | 190 | .init_time = r8a7790_timer_init, |
166 | .init_machine = lager_add_standard_devices, | 191 | .init_machine = lager_init, |
167 | .dt_compat = lager_boards_compat_dt, | 192 | .dt_compat = lager_boards_compat_dt, |
168 | MACHINE_END | 193 | MACHINE_END |
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig index a85adcd00882..a1659863bfd5 100644 --- a/arch/arm/mach-u300/Kconfig +++ b/arch/arm/mach-u300/Kconfig | |||
@@ -1,7 +1,3 @@ | |||
1 | menu "ST-Ericsson AB U300/U335 Platform" | ||
2 | |||
3 | comment "ST-Ericsson Mobile Platform Products" | ||
4 | |||
5 | config ARCH_U300 | 1 | config ARCH_U300 |
6 | bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 | 2 | bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 |
7 | depends on MMU | 3 | depends on MMU |
@@ -25,7 +21,9 @@ config ARCH_U300 | |||
25 | help | 21 | help |
26 | Support for ST-Ericsson U300 series mobile platforms. | 22 | Support for ST-Ericsson U300 series mobile platforms. |
27 | 23 | ||
28 | comment "ST-Ericsson U300/U335 Feature Selections" | 24 | if ARCH_U300 |
25 | |||
26 | menu "ST-Ericsson AB U300/U335 Platform" | ||
29 | 27 | ||
30 | config MACH_U300 | 28 | config MACH_U300 |
31 | depends on ARCH_U300 | 29 | depends on ARCH_U300 |
@@ -53,3 +51,5 @@ config MACH_U300_SPIDUMMY | |||
53 | SPI framework and ARM PL022 support. | 51 | SPI framework and ARM PL022 support. |
54 | 52 | ||
55 | endmenu | 53 | endmenu |
54 | |||
55 | endif | ||
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index 82ccf1d98735..264f894c0e3d 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c | |||
@@ -69,6 +69,7 @@ static int __init ux500_l2x0_init(void) | |||
69 | * some SMI service available. | 69 | * some SMI service available. |
70 | */ | 70 | */ |
71 | outer_cache.disable = NULL; | 71 | outer_cache.disable = NULL; |
72 | outer_cache.set_debug = NULL; | ||
72 | 73 | ||
73 | return 0; | 74 | return 0; |
74 | } | 75 | } |
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c index 7aeb5d60e484..e6eb48192912 100644 --- a/arch/arm/mach-vexpress/tc2_pm.c +++ b/arch/arm/mach-vexpress/tc2_pm.c | |||
@@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency) | |||
131 | } else | 131 | } else |
132 | BUG(); | 132 | BUG(); |
133 | 133 | ||
134 | /* | ||
135 | * If the CPU is committed to power down, make sure | ||
136 | * the power controller will be in charge of waking it | ||
137 | * up upon IRQ, ie IRQ lines are cut from GIC CPU IF | ||
138 | * to the CPU by disabling the GIC CPU IF to prevent wfi | ||
139 | * from completing execution behind power controller back | ||
140 | */ | ||
141 | if (!skip_wfi) | ||
142 | gic_cpu_if_down(); | ||
143 | |||
134 | if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { | 144 | if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { |
135 | arch_spin_unlock(&tc2_pm_lock); | 145 | arch_spin_unlock(&tc2_pm_lock); |
136 | 146 | ||
@@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency) | |||
231 | cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); | 241 | cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); |
232 | cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); | 242 | cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); |
233 | ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point)); | 243 | ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point)); |
234 | gic_cpu_if_down(); | ||
235 | tc2_pm_down(residency); | 244 | tc2_pm_down(residency); |
236 | } | 245 | } |
237 | 246 | ||
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index e3745eb07570..6038966ab045 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c | |||
@@ -293,10 +293,9 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p) | |||
293 | if (pdata) { | 293 | if (pdata) { |
294 | p->config = *pdata; | 294 | p->config = *pdata; |
295 | } else if (IS_ENABLED(CONFIG_OF) && np) { | 295 | } else if (IS_ENABLED(CONFIG_OF) && np) { |
296 | ret = of_parse_phandle_with_args(np, "gpio-ranges", | 296 | ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, |
297 | "#gpio-range-cells", 0, &args); | 297 | &args); |
298 | p->config.number_of_pins = ret == 0 && args.args_count == 3 | 298 | p->config.number_of_pins = ret == 0 ? args.args[2] |
299 | ? args.args[2] | ||
300 | : RCAR_MAX_GPIO_PER_BANK; | 299 | : RCAR_MAX_GPIO_PER_BANK; |
301 | p->config.gpio_base = -1; | 300 | p->config.gpio_base = -1; |
302 | } | 301 | } |
diff --git a/drivers/mailbox/mailbox-omap2.c b/drivers/mailbox/mailbox-omap2.c index eba380d7b17f..42d2b893ea67 100644 --- a/drivers/mailbox/mailbox-omap2.c +++ b/drivers/mailbox/mailbox-omap2.c | |||
@@ -325,7 +325,6 @@ static int omap2_mbox_remove(struct platform_device *pdev) | |||
325 | kfree(privblk); | 325 | kfree(privblk); |
326 | kfree(mboxblk); | 326 | kfree(mboxblk); |
327 | kfree(list); | 327 | kfree(list); |
328 | platform_set_drvdata(pdev, NULL); | ||
329 | 328 | ||
330 | return 0; | 329 | return 0; |
331 | } | 330 | } |
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c index 87ed3fb5149a..f344659dceac 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c | |||
@@ -113,14 +113,14 @@ static const struct sh_mobile_sdhi_ops sdhi_ops = { | |||
113 | }; | 113 | }; |
114 | 114 | ||
115 | static const struct of_device_id sh_mobile_sdhi_of_match[] = { | 115 | static const struct of_device_id sh_mobile_sdhi_of_match[] = { |
116 | { .compatible = "renesas,shmobile-sdhi" }, | 116 | { .compatible = "renesas,sdhi-shmobile" }, |
117 | { .compatible = "renesas,sh7372-sdhi" }, | 117 | { .compatible = "renesas,sdhi-sh7372" }, |
118 | { .compatible = "renesas,sh73a0-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | 118 | { .compatible = "renesas,sdhi-sh73a0", .data = &sh_mobile_sdhi_of_cfg[0], }, |
119 | { .compatible = "renesas,r8a73a4-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | 119 | { .compatible = "renesas,sdhi-r8a73a4", .data = &sh_mobile_sdhi_of_cfg[0], }, |
120 | { .compatible = "renesas,r8a7740-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | 120 | { .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], }, |
121 | { .compatible = "renesas,r8a7778-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | 121 | { .compatible = "renesas,sdhi-r8a7778", .data = &sh_mobile_sdhi_of_cfg[0], }, |
122 | { .compatible = "renesas,r8a7779-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | 122 | { .compatible = "renesas,sdhi-r8a7779", .data = &sh_mobile_sdhi_of_cfg[0], }, |
123 | { .compatible = "renesas,r8a7790-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | 123 | { .compatible = "renesas,sdhi-r8a7790", .data = &sh_mobile_sdhi_of_cfg[0], }, |
124 | {}, | 124 | {}, |
125 | }; | 125 | }; |
126 | MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); | 126 | MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); |
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 5db900d917f9..dd03dfdfb0d6 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c | |||
@@ -1236,7 +1236,6 @@ static int pxa3xx_nand_remove(struct platform_device *pdev) | |||
1236 | return 0; | 1236 | return 0; |
1237 | } | 1237 | } |
1238 | 1238 | ||
1239 | #ifdef CONFIG_OF | ||
1240 | static struct of_device_id pxa3xx_nand_dt_ids[] = { | 1239 | static struct of_device_id pxa3xx_nand_dt_ids[] = { |
1241 | { | 1240 | { |
1242 | .compatible = "marvell,pxa3xx-nand", | 1241 | .compatible = "marvell,pxa3xx-nand", |
@@ -1284,12 +1283,6 @@ static int pxa3xx_nand_probe_dt(struct platform_device *pdev) | |||
1284 | 1283 | ||
1285 | return 0; | 1284 | return 0; |
1286 | } | 1285 | } |
1287 | #else | ||
1288 | static inline int pxa3xx_nand_probe_dt(struct platform_device *pdev) | ||
1289 | { | ||
1290 | return 0; | ||
1291 | } | ||
1292 | #endif | ||
1293 | 1286 | ||
1294 | static int pxa3xx_nand_probe(struct platform_device *pdev) | 1287 | static int pxa3xx_nand_probe(struct platform_device *pdev) |
1295 | { | 1288 | { |