diff options
| -rw-r--r-- | arch/arm/mach-prima2/irq.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/flowctrl.c | 4 | ||||
| -rw-r--r-- | drivers/crypto/Kconfig | 1 |
3 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c index 37c2de9b6f26..a7b9415d30f8 100644 --- a/arch/arm/mach-prima2/irq.c +++ b/arch/arm/mach-prima2/irq.c | |||
| @@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) | |||
| 42 | static __init void sirfsoc_irq_init(void) | 42 | static __init void sirfsoc_irq_init(void) |
| 43 | { | 43 | { |
| 44 | sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32); | 44 | sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32); |
| 45 | sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32); | 45 | sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, |
| 46 | SIRFSOC_INTENAL_IRQ_END + 1 - 32); | ||
| 46 | 47 | ||
| 47 | writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0); | 48 | writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0); |
| 48 | writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1); | 49 | writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1); |
| @@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void) | |||
| 68 | if (!sirfsoc_intc_base) | 69 | if (!sirfsoc_intc_base) |
| 69 | panic("unable to map intc cpu registers\n"); | 70 | panic("unable to map intc cpu registers\n"); |
| 70 | 71 | ||
| 71 | irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL); | 72 | irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0, |
| 73 | &irq_domain_simple_ops, NULL); | ||
| 72 | 74 | ||
| 73 | of_node_put(np); | 75 | of_node_put(np); |
| 74 | 76 | ||
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c index fef66a7486ed..f07488e0bd32 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/arch/arm/mach-tegra/flowctrl.c | |||
| @@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value) | |||
| 53 | 53 | ||
| 54 | void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value) | 54 | void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value) |
| 55 | { | 55 | { |
| 56 | return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value); | 56 | return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value); |
| 57 | } | 57 | } |
| 58 | 58 | ||
| 59 | void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value) | 59 | void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value) |
| 60 | { | 60 | { |
| 61 | return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value); | 61 | return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value); |
| 62 | } | 62 | } |
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index ab9abb46d01a..dd414d9350ef 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig | |||
| @@ -164,6 +164,7 @@ config CRYPTO_DEV_MV_CESA | |||
| 164 | select CRYPTO_ALGAPI | 164 | select CRYPTO_ALGAPI |
| 165 | select CRYPTO_AES | 165 | select CRYPTO_AES |
| 166 | select CRYPTO_BLKCIPHER2 | 166 | select CRYPTO_BLKCIPHER2 |
| 167 | select CRYPTO_HASH | ||
| 167 | help | 168 | help |
| 168 | This driver allows you to utilize the Cryptographic Engines and | 169 | This driver allows you to utilize the Cryptographic Engines and |
| 169 | Security Accelerator (CESA) which can be found on the Marvell Orion | 170 | Security Accelerator (CESA) which can be found on the Marvell Orion |
