2 files changed, 11 insertions, 6 deletions

diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c
index 66fe959b4f74..7fbbe05d5c60 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c
@@ -40,7 +40,7 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts)
         int WL, CL, WR, at[2], dt, ds;
         int rq = ram->freq < 1000000; /* XXX */
 
-        switch (ram->ramcfg.version) {
+        switch (ram->next->bios.ramcfg_ver) {
         case 0x11:
                 pd =  ram->next->bios.ramcfg_11_01_80;
                 lf =  ram->next->bios.ramcfg_11_01_40;
@@ -54,7 +54,7 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts)
                 return -ENOSYS;
         }
 
-        switch (ram->timing.version) {
+        switch (ram->next->bios.timing_ver) {
         case 0x20:
                 WL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
                 CL = (ram->next->bios.timing[1] & 0x0000001f);
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/sddr3.c b/drivers/gpu/drm/nouveau/core/subdev/fb/sddr3.c
index f84c6542c3c3..3d77fc5add77 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/sddr3.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/sddr3.c
@@ -72,8 +72,13 @@ nouveau_sddr3_calc(struct nouveau_ram *ram)
 {
         struct nouveau_bios *bios = nouveau_bios(ram);
         int CWL, CL, WR, DLL = 0, ODT = 0;
+        u8 ver;
 
-        switch (!!ram->timing.data * ram->timing.version) {
+        ver = !!ram->timing.data * ram->timing.version;
+        if (ram->next)
+                ver = ram->next->bios.timing_ver;
+
+        switch (ver) {
         case 0x10:
                 if (ram->timing.size < 0x17) {
                         /* XXX: NV50: Get CWL from the timing register */
@@ -86,9 +91,9 @@ nouveau_sddr3_calc(struct nouveau_ram *ram)
                 ODT =   nv_ro08(bios, ram->timing.data + 0x0e) & 0x07;
                 break;
         case 0x20:
-                CWL =  (nv_ro16(bios, ram->timing.data + 0x04) & 0x0f80) >> 7;
-                CL  =   nv_ro08(bios, ram->timing.data + 0x04) & 0x1f;
-                WR  =   nv_ro08(bios, ram->timing.data + 0x0a) & 0x7f;
+                CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
+                CL  = (ram->next->bios.timing[1] & 0x0000001f) >> 0;
+                WR  = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
                 /* XXX: Get these values from the VBIOS instead */
                 DLL = !(ram->mr[1] & 0x1);
                 ODT =   (ram->mr[1] & 0x004) >> 2 |