diff options
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/bridge-regs.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/include/mach/system.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/mss2-setup.c | 4 | ||||
-rw-r--r-- | drivers/watchdog/orion5x_wdt.c | 12 |
4 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h index be896e59d3e7..5c9744cd8ef6 100644 --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h | |||
@@ -17,8 +17,8 @@ | |||
17 | 17 | ||
18 | #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) | 18 | #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) |
19 | 19 | ||
20 | #define CPU_RESET_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) | 20 | #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) |
21 | #define WDT_RESET 0x0002 | 21 | #define WDT_RESET_OUT_EN 0x0002 |
22 | 22 | ||
23 | #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) | 23 | #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) |
24 | 24 | ||
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h index e912490fff23..60e734c10458 100644 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ b/arch/arm/mach-orion5x/include/mach/system.h | |||
@@ -23,7 +23,7 @@ static inline void arch_reset(char mode, const char *cmd) | |||
23 | /* | 23 | /* |
24 | * Enable and issue soft reset | 24 | * Enable and issue soft reset |
25 | */ | 25 | */ |
26 | orion5x_setbits(CPU_RESET_MASK, (1 << 2)); | 26 | orion5x_setbits(RSTOUTn_MASK, (1 << 2)); |
27 | orion5x_setbits(CPU_SOFT_RESET, 1); | 27 | orion5x_setbits(CPU_SOFT_RESET, 1); |
28 | } | 28 | } |
29 | 29 | ||
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 41e6d5033d54..61c086b66723 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c | |||
@@ -181,9 +181,9 @@ static void mss2_power_off(void) | |||
181 | /* | 181 | /* |
182 | * Enable and issue soft reset | 182 | * Enable and issue soft reset |
183 | */ | 183 | */ |
184 | reg = readl(CPU_RESET_MASK); | 184 | reg = readl(RSTOUTn_MASK); |
185 | reg |= 1 << 2; | 185 | reg |= 1 << 2; |
186 | writel(reg, CPU_RESET_MASK); | 186 | writel(reg, RSTOUTn_MASK); |
187 | 187 | ||
188 | reg = readl(CPU_SOFT_RESET); | 188 | reg = readl(CPU_SOFT_RESET); |
189 | reg |= 1; | 189 | reg |= 1; |
diff --git a/drivers/watchdog/orion5x_wdt.c b/drivers/watchdog/orion5x_wdt.c index 2cde568e4fb0..d2dc9762a8c9 100644 --- a/drivers/watchdog/orion5x_wdt.c +++ b/drivers/watchdog/orion5x_wdt.c | |||
@@ -73,9 +73,9 @@ static void orion5x_wdt_enable(void) | |||
73 | writel(reg, TIMER_CTRL); | 73 | writel(reg, TIMER_CTRL); |
74 | 74 | ||
75 | /* Enable reset on watchdog */ | 75 | /* Enable reset on watchdog */ |
76 | reg = readl(CPU_RESET_MASK); | 76 | reg = readl(RSTOUTn_MASK); |
77 | reg |= WDT_RESET; | 77 | reg |= WDT_RESET_OUT_EN; |
78 | writel(reg, CPU_RESET_MASK); | 78 | writel(reg, RSTOUTn_MASK); |
79 | 79 | ||
80 | spin_unlock(&wdt_lock); | 80 | spin_unlock(&wdt_lock); |
81 | } | 81 | } |
@@ -87,9 +87,9 @@ static void orion5x_wdt_disable(void) | |||
87 | spin_lock(&wdt_lock); | 87 | spin_lock(&wdt_lock); |
88 | 88 | ||
89 | /* Disable reset on watchdog */ | 89 | /* Disable reset on watchdog */ |
90 | reg = readl(CPU_RESET_MASK); | 90 | reg = readl(RSTOUTn_MASK); |
91 | reg &= ~WDT_RESET; | 91 | reg &= ~WDT_RESET_OUT_EN; |
92 | writel(reg, CPU_RESET_MASK); | 92 | writel(reg, RSTOUTn_MASK); |
93 | 93 | ||
94 | /* Disable watchdog timer */ | 94 | /* Disable watchdog timer */ |
95 | reg = readl(TIMER_CTRL); | 95 | reg = readl(TIMER_CTRL); |