1 files changed, 7 insertions, 11 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bcfe0a8692dd..92e43ce8b607 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2108,7 +2108,6 @@ static void intel_enable_primary_hw_plane(struct drm_i915_private *dev_priv,
 
         I915_WRITE(reg, val | DISPLAY_PLANE_ENABLE);
         intel_flush_primary_plane(dev_priv, plane);
-        intel_wait_for_vblank(dev_priv->dev, pipe);
 }
 
 /**
@@ -2138,7 +2137,6 @@ static void intel_disable_primary_hw_plane(struct drm_i915_private *dev_priv,
 
         I915_WRITE(reg, val & ~DISPLAY_PLANE_ENABLE);
         intel_flush_primary_plane(dev_priv, plane);
-        intel_wait_for_vblank(dev_priv->dev, pipe);
 }
 
 static bool need_vtd_wa(struct drm_device *dev)
@@ -4002,15 +4000,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
 
         intel_crtc_enable_planes(crtc);
 
-        /*
-         * There seems to be a race in PCH platform hw (at least on some
-         * outputs) where an enabled pipe still completes any pageflip right
-         * away (as if the pipe is off) instead of waiting for vblank. As soon
-         * as the first vblank happend, everything works as expected. Hence just
-         * wait for one vblank before returning to avoid strange things
-         * happening.
-         */
-        intel_wait_for_vblank(dev, intel_crtc->pipe);
 }
 
 /* IPS only exists on ULT machines and is tied to pipe A. */
@@ -4741,6 +4730,13 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
         for_each_encoder_on_crtc(dev, crtc, encoder)
                 encoder->disable(encoder);
 
+        /*
+         * On gen2 planes are double buffered but the pipe isn't, so we must
+         * wait for planes to fully turn off before disabling the pipe.
+         */
+        if (IS_GEN2(dev))
+                intel_wait_for_vblank(dev, pipe);
+
         intel_set_cpu_fifo_underrun_reporting(dev, pipe, false);
         intel_disable_pipe(dev_priv, pipe);