diff options
| -rw-r--r-- | arch/arm/include/asm/kprobes.h | 3 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes-decode.c | 777 | ||||
| -rw-r--r-- | arch/arm/kernel/kprobes.c | 3 | ||||
| -rw-r--r-- | arch/arm/kernel/perf_event.c | 3 | ||||
| -rw-r--r-- | arch/arm/kernel/smp.c | 2 | ||||
| -rw-r--r-- | arch/arm/kernel/sys_oabi-compat.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/board-mityomapl138.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 12 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/debug-macro.S | 13 | ||||
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/serial.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mx3/mach-vpr200.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-mx5/board-mx53_loco.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mxs/clock-mx28.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/hx4700.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/magician.c | 2 | ||||
| -rw-r--r-- | arch/arm/mm/proc-xscale.S | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/gpio.c | 7 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/ssi-fiq.S | 2 | ||||
| -rw-r--r-- | drivers/clk/clkdev.c | 19 |
20 files changed, 528 insertions, 353 deletions
diff --git a/arch/arm/include/asm/kprobes.h b/arch/arm/include/asm/kprobes.h index bb8a19bd5822..e46bdd0097eb 100644 --- a/arch/arm/include/asm/kprobes.h +++ b/arch/arm/include/asm/kprobes.h | |||
| @@ -39,10 +39,13 @@ typedef u32 kprobe_opcode_t; | |||
| 39 | struct kprobe; | 39 | struct kprobe; |
| 40 | typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *); | 40 | typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *); |
| 41 | 41 | ||
| 42 | typedef unsigned long (kprobe_check_cc)(unsigned long); | ||
| 43 | |||
| 42 | /* Architecture specific copy of original instruction. */ | 44 | /* Architecture specific copy of original instruction. */ |
| 43 | struct arch_specific_insn { | 45 | struct arch_specific_insn { |
| 44 | kprobe_opcode_t *insn; | 46 | kprobe_opcode_t *insn; |
| 45 | kprobe_insn_handler_t *insn_handler; | 47 | kprobe_insn_handler_t *insn_handler; |
| 48 | kprobe_check_cc *insn_check_cc; | ||
| 46 | }; | 49 | }; |
| 47 | 50 | ||
| 48 | struct prev_kprobe { | 51 | struct prev_kprobe { |
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c index 23891317dc4b..15eeff6aea0e 100644 --- a/arch/arm/kernel/kprobes-decode.c +++ b/arch/arm/kernel/kprobes-decode.c | |||
| @@ -34,9 +34,6 @@ | |||
| 34 | * | 34 | * |
| 35 | * *) If the PC is written to by the instruction, the | 35 | * *) If the PC is written to by the instruction, the |
| 36 | * instruction must be fully simulated in software. | 36 | * instruction must be fully simulated in software. |
| 37 | * If it is a conditional instruction, the handler | ||
| 38 | * will use insn[0] to copy its condition code to | ||
| 39 | * set r0 to 1 and insn[1] to "mov pc, lr" to return. | ||
| 40 | * | 37 | * |
| 41 | * *) Otherwise, a modified form of the instruction is | 38 | * *) Otherwise, a modified form of the instruction is |
| 42 | * directly executed. Its handler calls the | 39 | * directly executed. Its handler calls the |
| @@ -68,13 +65,17 @@ | |||
| 68 | 65 | ||
| 69 | #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25) | 66 | #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25) |
| 70 | 67 | ||
| 68 | #define is_r15(insn, bitpos) (((insn) & (0xf << bitpos)) == (0xf << bitpos)) | ||
| 69 | |||
| 70 | /* | ||
| 71 | * Test if load/store instructions writeback the address register. | ||
| 72 | * if P (bit 24) == 0 or W (bit 21) == 1 | ||
| 73 | */ | ||
| 74 | #define is_writeback(insn) ((insn ^ 0x01000000) & 0x01200000) | ||
| 75 | |||
| 71 | #define PSR_fs (PSR_f|PSR_s) | 76 | #define PSR_fs (PSR_f|PSR_s) |
| 72 | 77 | ||
| 73 | #define KPROBE_RETURN_INSTRUCTION 0xe1a0f00e /* mov pc, lr */ | 78 | #define KPROBE_RETURN_INSTRUCTION 0xe1a0f00e /* mov pc, lr */ |
| 74 | #define SET_R0_TRUE_INSTRUCTION 0xe3a00001 /* mov r0, #1 */ | ||
| 75 | |||
| 76 | #define truecc_insn(insn) (((insn) & 0xf0000000) | \ | ||
| 77 | (SET_R0_TRUE_INSTRUCTION & 0x0fffffff)) | ||
| 78 | 79 | ||
| 79 | typedef long (insn_0arg_fn_t)(void); | 80 | typedef long (insn_0arg_fn_t)(void); |
| 80 | typedef long (insn_1arg_fn_t)(long); | 81 | typedef long (insn_1arg_fn_t)(long); |
| @@ -419,14 +420,10 @@ insnslot_llret_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr, | |||
| 419 | 420 | ||
| 420 | static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs) | 421 | static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs) |
| 421 | { | 422 | { |
| 422 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
| 423 | kprobe_opcode_t insn = p->opcode; | 423 | kprobe_opcode_t insn = p->opcode; |
| 424 | long iaddr = (long)p->addr; | 424 | long iaddr = (long)p->addr; |
| 425 | int disp = branch_displacement(insn); | 425 | int disp = branch_displacement(insn); |
| 426 | 426 | ||
| 427 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
| 428 | return; | ||
| 429 | |||
| 430 | if (insn & (1 << 24)) | 427 | if (insn & (1 << 24)) |
| 431 | regs->ARM_lr = iaddr + 4; | 428 | regs->ARM_lr = iaddr + 4; |
| 432 | 429 | ||
| @@ -446,14 +443,10 @@ static void __kprobes simulate_blx1(struct kprobe *p, struct pt_regs *regs) | |||
| 446 | 443 | ||
| 447 | static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs) | 444 | static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs) |
| 448 | { | 445 | { |
| 449 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
| 450 | kprobe_opcode_t insn = p->opcode; | 446 | kprobe_opcode_t insn = p->opcode; |
| 451 | int rm = insn & 0xf; | 447 | int rm = insn & 0xf; |
| 452 | long rmv = regs->uregs[rm]; | 448 | long rmv = regs->uregs[rm]; |
| 453 | 449 | ||
| 454 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
| 455 | return; | ||
| 456 | |||
| 457 | if (insn & (1 << 5)) | 450 | if (insn & (1 << 5)) |
| 458 | regs->ARM_lr = (long)p->addr + 4; | 451 | regs->ARM_lr = (long)p->addr + 4; |
| 459 | 452 | ||
| @@ -463,9 +456,16 @@ static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs) | |||
| 463 | regs->ARM_cpsr |= PSR_T_BIT; | 456 | regs->ARM_cpsr |= PSR_T_BIT; |
| 464 | } | 457 | } |
| 465 | 458 | ||
| 459 | static void __kprobes simulate_mrs(struct kprobe *p, struct pt_regs *regs) | ||
| 460 | { | ||
| 461 | kprobe_opcode_t insn = p->opcode; | ||
| 462 | int rd = (insn >> 12) & 0xf; | ||
| 463 | unsigned long mask = 0xf8ff03df; /* Mask out execution state */ | ||
| 464 | regs->uregs[rd] = regs->ARM_cpsr & mask; | ||
| 465 | } | ||
| 466 | |||
| 466 | static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) | 467 | static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) |
| 467 | { | 468 | { |
| 468 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
| 469 | kprobe_opcode_t insn = p->opcode; | 469 | kprobe_opcode_t insn = p->opcode; |
| 470 | int rn = (insn >> 16) & 0xf; | 470 | int rn = (insn >> 16) & 0xf; |
| 471 | int lbit = insn & (1 << 20); | 471 | int lbit = insn & (1 << 20); |
| @@ -476,9 +476,6 @@ static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) | |||
| 476 | int reg_bit_vector; | 476 | int reg_bit_vector; |
| 477 | int reg_count; | 477 | int reg_count; |
| 478 | 478 | ||
| 479 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
| 480 | return; | ||
| 481 | |||
| 482 | reg_count = 0; | 479 | reg_count = 0; |
| 483 | reg_bit_vector = insn & 0xffff; | 480 | reg_bit_vector = insn & 0xffff; |
| 484 | while (reg_bit_vector) { | 481 | while (reg_bit_vector) { |
| @@ -510,11 +507,6 @@ static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) | |||
| 510 | 507 | ||
| 511 | static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs) | 508 | static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs) |
| 512 | { | 509 | { |
| 513 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
| 514 | |||
| 515 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
| 516 | return; | ||
| 517 | |||
| 518 | regs->ARM_pc = (long)p->addr + str_pc_offset; | 510 | regs->ARM_pc = (long)p->addr + str_pc_offset; |
| 519 | simulate_ldm1stm1(p, regs); | 511 | simulate_ldm1stm1(p, regs); |
| 520 | regs->ARM_pc = (long)p->addr + 4; | 512 | regs->ARM_pc = (long)p->addr + 4; |
| @@ -525,24 +517,16 @@ static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs) | |||
| 525 | regs->uregs[12] = regs->uregs[13]; | 517 | regs->uregs[12] = regs->uregs[13]; |
| 526 | } | 518 | } |
| 527 | 519 | ||
| 528 | static void __kprobes emulate_ldcstc(struct kprobe *p, struct pt_regs *regs) | ||
| 529 | { | ||
| 530 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
| 531 | kprobe_opcode_t insn = p->opcode; | ||
| 532 | int rn = (insn >> 16) & 0xf; | ||
| 533 | long rnv = regs->uregs[rn]; | ||
| 534 | |||
| 535 | /* Save Rn in case of writeback. */ | ||
| 536 | regs->uregs[rn] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); | ||
| 537 | } | ||
| 538 | |||
| 539 | static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs) | 520 | static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs) |
| 540 | { | 521 | { |
| 541 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | 522 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; |
| 542 | kprobe_opcode_t insn = p->opcode; | 523 | kprobe_opcode_t insn = p->opcode; |
| 524 | long ppc = (long)p->addr + 8; | ||
| 543 | int rd = (insn >> 12) & 0xf; | 525 | int rd = (insn >> 12) & 0xf; |
| 544 | int rn = (insn >> 16) & 0xf; | 526 | int rn = (insn >> 16) & 0xf; |
| 545 | int rm = insn & 0xf; /* rm may be invalid, don't care. */ | 527 | int rm = insn & 0xf; /* rm may be invalid, don't care. */ |
| 528 | long rmv = (rm == 15) ? ppc : regs->uregs[rm]; | ||
| 529 | long rnv = (rn == 15) ? ppc : regs->uregs[rn]; | ||
| 546 | 530 | ||
| 547 | /* Not following the C calling convention here, so need asm(). */ | 531 | /* Not following the C calling convention here, so need asm(). */ |
| 548 | __asm__ __volatile__ ( | 532 | __asm__ __volatile__ ( |
| @@ -554,29 +538,36 @@ static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs) | |||
| 554 | "str r0, %[rn] \n\t" /* in case of writeback */ | 538 | "str r0, %[rn] \n\t" /* in case of writeback */ |
| 555 | "str r2, %[rd0] \n\t" | 539 | "str r2, %[rd0] \n\t" |
| 556 | "str r3, %[rd1] \n\t" | 540 | "str r3, %[rd1] \n\t" |
| 557 | : [rn] "+m" (regs->uregs[rn]), | 541 | : [rn] "+m" (rnv), |
| 558 | [rd0] "=m" (regs->uregs[rd]), | 542 | [rd0] "=m" (regs->uregs[rd]), |
| 559 | [rd1] "=m" (regs->uregs[rd+1]) | 543 | [rd1] "=m" (regs->uregs[rd+1]) |
| 560 | : [rm] "m" (regs->uregs[rm]), | 544 | : [rm] "m" (rmv), |
| 561 | [cpsr] "r" (regs->ARM_cpsr), | 545 | [cpsr] "r" (regs->ARM_cpsr), |
| 562 | [i_fn] "r" (i_fn) | 546 | [i_fn] "r" (i_fn) |
| 563 | : "r0", "r1", "r2", "r3", "lr", "cc" | 547 | : "r0", "r1", "r2", "r3", "lr", "cc" |
| 564 | ); | 548 | ); |
| 549 | if (is_writeback(insn)) | ||
| 550 | regs->uregs[rn] = rnv; | ||
| 565 | } | 551 | } |
| 566 | 552 | ||
| 567 | static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs) | 553 | static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs) |
| 568 | { | 554 | { |
| 569 | insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0]; | 555 | insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0]; |
| 570 | kprobe_opcode_t insn = p->opcode; | 556 | kprobe_opcode_t insn = p->opcode; |
| 557 | long ppc = (long)p->addr + 8; | ||
| 571 | int rd = (insn >> 12) & 0xf; | 558 | int rd = (insn >> 12) & 0xf; |
| 572 | int rn = (insn >> 16) & 0xf; | 559 | int rn = (insn >> 16) & 0xf; |
| 573 | int rm = insn & 0xf; | 560 | int rm = insn & 0xf; |
| 574 | long rnv = regs->uregs[rn]; | 561 | long rnv = (rn == 15) ? ppc : regs->uregs[rn]; |
| 575 | long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ | 562 | /* rm/rmv may be invalid, don't care. */ |
| 563 | long rmv = (rm == 15) ? ppc : regs->uregs[rm]; | ||
| 564 | long rnv_wb; | ||
| 576 | 565 | ||
| 577 | regs->uregs[rn] = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd], | 566 | rnv_wb = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd], |
| 578 | regs->uregs[rd+1], | 567 | regs->uregs[rd+1], |
| 579 | regs->ARM_cpsr, i_fn); | 568 | regs->ARM_cpsr, i_fn); |
| 569 | if (is_writeback(insn)) | ||
| 570 | regs->uregs[rn] = rnv_wb; | ||
| 580 | } | 571 | } |
| 581 | 572 | ||
| 582 | static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs) | 573 | static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs) |
| @@ -630,31 +621,6 @@ static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs) | |||
| 630 | regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */ | 621 | regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */ |
| 631 | } | 622 | } |
| 632 | 623 | ||
| 633 | static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs) | ||
| 634 | { | ||
| 635 | insn_llret_0arg_fn_t *i_fn = (insn_llret_0arg_fn_t *)&p->ainsn.insn[0]; | ||
| 636 | kprobe_opcode_t insn = p->opcode; | ||
| 637 | union reg_pair fnr; | ||
| 638 | int rd = (insn >> 12) & 0xf; | ||
| 639 | int rn = (insn >> 16) & 0xf; | ||
| 640 | |||
| 641 | fnr.dr = insnslot_llret_0arg_rflags(regs->ARM_cpsr, i_fn); | ||
| 642 | regs->uregs[rn] = fnr.r0; | ||
| 643 | regs->uregs[rd] = fnr.r1; | ||
| 644 | } | ||
| 645 | |||
| 646 | static void __kprobes emulate_mcrr(struct kprobe *p, struct pt_regs *regs) | ||
| 647 | { | ||
| 648 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | ||
| 649 | kprobe_opcode_t insn = p->opcode; | ||
| 650 | int rd = (insn >> 12) & 0xf; | ||
| 651 | int rn = (insn >> 16) & 0xf; | ||
| 652 | long rnv = regs->uregs[rn]; | ||
| 653 | long rdv = regs->uregs[rd]; | ||
| 654 | |||
| 655 | insnslot_2arg_rflags(rnv, rdv, regs->ARM_cpsr, i_fn); | ||
| 656 | } | ||
| 657 | |||
| 658 | static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs) | 624 | static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs) |
| 659 | { | 625 | { |
| 660 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | 626 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; |
| @@ -688,32 +654,32 @@ static void __kprobes emulate_none(struct kprobe *p, struct pt_regs *regs) | |||
| 688 | insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); | 654 | insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); |
| 689 | } | 655 | } |
| 690 | 656 | ||
| 691 | static void __kprobes emulate_rd12(struct kprobe *p, struct pt_regs *regs) | 657 | static void __kprobes emulate_nop(struct kprobe *p, struct pt_regs *regs) |
| 692 | { | 658 | { |
| 693 | insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0]; | ||
| 694 | kprobe_opcode_t insn = p->opcode; | ||
| 695 | int rd = (insn >> 12) & 0xf; | ||
| 696 | |||
| 697 | regs->uregs[rd] = insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); | ||
| 698 | } | 659 | } |
| 699 | 660 | ||
| 700 | static void __kprobes emulate_ird12(struct kprobe *p, struct pt_regs *regs) | 661 | static void __kprobes |
| 662 | emulate_rd12_modify(struct kprobe *p, struct pt_regs *regs) | ||
| 701 | { | 663 | { |
| 702 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | 664 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; |
| 703 | kprobe_opcode_t insn = p->opcode; | 665 | kprobe_opcode_t insn = p->opcode; |
| 704 | int ird = (insn >> 12) & 0xf; | 666 | int rd = (insn >> 12) & 0xf; |
| 667 | long rdv = regs->uregs[rd]; | ||
| 705 | 668 | ||
| 706 | insnslot_1arg_rflags(regs->uregs[ird], regs->ARM_cpsr, i_fn); | 669 | regs->uregs[rd] = insnslot_1arg_rflags(rdv, regs->ARM_cpsr, i_fn); |
| 707 | } | 670 | } |
| 708 | 671 | ||
| 709 | static void __kprobes emulate_rn16(struct kprobe *p, struct pt_regs *regs) | 672 | static void __kprobes |
| 673 | emulate_rd12rn0_modify(struct kprobe *p, struct pt_regs *regs) | ||
| 710 | { | 674 | { |
| 711 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | 675 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; |
| 712 | kprobe_opcode_t insn = p->opcode; | 676 | kprobe_opcode_t insn = p->opcode; |
| 713 | int rn = (insn >> 16) & 0xf; | 677 | int rd = (insn >> 12) & 0xf; |
| 678 | int rn = insn & 0xf; | ||
| 679 | long rdv = regs->uregs[rd]; | ||
| 714 | long rnv = regs->uregs[rn]; | 680 | long rnv = regs->uregs[rn]; |
| 715 | 681 | ||
| 716 | insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); | 682 | regs->uregs[rd] = insnslot_2arg_rflags(rdv, rnv, regs->ARM_cpsr, i_fn); |
| 717 | } | 683 | } |
| 718 | 684 | ||
| 719 | static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs) | 685 | static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs) |
| @@ -819,6 +785,17 @@ emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs) | |||
| 819 | } | 785 | } |
| 820 | 786 | ||
| 821 | static void __kprobes | 787 | static void __kprobes |
| 788 | emulate_alu_tests_imm(struct kprobe *p, struct pt_regs *regs) | ||
| 789 | { | ||
| 790 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
| 791 | kprobe_opcode_t insn = p->opcode; | ||
| 792 | int rn = (insn >> 16) & 0xf; | ||
| 793 | long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn]; | ||
| 794 | |||
| 795 | insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn); | ||
| 796 | } | ||
| 797 | |||
| 798 | static void __kprobes | ||
| 822 | emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs) | 799 | emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs) |
| 823 | { | 800 | { |
| 824 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; | 801 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; |
| @@ -854,14 +831,34 @@ emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs) | |||
| 854 | insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn); | 831 | insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn); |
| 855 | } | 832 | } |
| 856 | 833 | ||
| 834 | static void __kprobes | ||
| 835 | emulate_alu_tests(struct kprobe *p, struct pt_regs *regs) | ||
| 836 | { | ||
| 837 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; | ||
| 838 | kprobe_opcode_t insn = p->opcode; | ||
| 839 | long ppc = (long)p->addr + 8; | ||
| 840 | int rn = (insn >> 16) & 0xf; | ||
| 841 | int rs = (insn >> 8) & 0xf; /* rs/rsv may be invalid, don't care. */ | ||
| 842 | int rm = insn & 0xf; | ||
| 843 | long rnv = (rn == 15) ? ppc : regs->uregs[rn]; | ||
| 844 | long rmv = (rm == 15) ? ppc : regs->uregs[rm]; | ||
| 845 | long rsv = regs->uregs[rs]; | ||
| 846 | |||
| 847 | insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn); | ||
| 848 | } | ||
| 849 | |||
| 857 | static enum kprobe_insn __kprobes | 850 | static enum kprobe_insn __kprobes |
| 858 | prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 851 | prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi) |
| 859 | { | 852 | { |
| 860 | int ibit = (insn & (1 << 26)) ? 25 : 22; | 853 | int not_imm = (insn & (1 << 26)) ? (insn & (1 << 25)) |
| 854 | : (~insn & (1 << 22)); | ||
| 855 | |||
| 856 | if (is_writeback(insn) && is_r15(insn, 16)) | ||
| 857 | return INSN_REJECTED; /* Writeback to PC */ | ||
| 861 | 858 | ||
| 862 | insn &= 0xfff00fff; | 859 | insn &= 0xfff00fff; |
| 863 | insn |= 0x00001000; /* Rn = r0, Rd = r1 */ | 860 | insn |= 0x00001000; /* Rn = r0, Rd = r1 */ |
| 864 | if (insn & (1 << ibit)) { | 861 | if (not_imm) { |
| 865 | insn &= ~0xf; | 862 | insn &= ~0xf; |
| 866 | insn |= 2; /* Rm = r2 */ | 863 | insn |= 2; /* Rm = r2 */ |
| 867 | } | 864 | } |
| @@ -871,20 +868,40 @@ prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 871 | } | 868 | } |
| 872 | 869 | ||
| 873 | static enum kprobe_insn __kprobes | 870 | static enum kprobe_insn __kprobes |
| 874 | prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 871 | prep_emulate_rd12_modify(kprobe_opcode_t insn, struct arch_specific_insn *asi) |
| 875 | { | 872 | { |
| 876 | insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ | 873 | if (is_r15(insn, 12)) |
| 874 | return INSN_REJECTED; /* Rd is PC */ | ||
| 875 | |||
| 876 | insn &= 0xffff0fff; /* Rd = r0 */ | ||
| 877 | asi->insn[0] = insn; | 877 | asi->insn[0] = insn; |
| 878 | asi->insn_handler = emulate_rd12rm0; | 878 | asi->insn_handler = emulate_rd12_modify; |
| 879 | return INSN_GOOD; | 879 | return INSN_GOOD; |
| 880 | } | 880 | } |
| 881 | 881 | ||
| 882 | static enum kprobe_insn __kprobes | 882 | static enum kprobe_insn __kprobes |
| 883 | prep_emulate_rd12(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 883 | prep_emulate_rd12rn0_modify(kprobe_opcode_t insn, |
| 884 | struct arch_specific_insn *asi) | ||
| 884 | { | 885 | { |
| 885 | insn &= 0xffff0fff; /* Rd = r0 */ | 886 | if (is_r15(insn, 12)) |
| 887 | return INSN_REJECTED; /* Rd is PC */ | ||
| 888 | |||
| 889 | insn &= 0xffff0ff0; /* Rd = r0 */ | ||
| 890 | insn |= 0x00000001; /* Rn = r1 */ | ||
| 891 | asi->insn[0] = insn; | ||
| 892 | asi->insn_handler = emulate_rd12rn0_modify; | ||
| 893 | return INSN_GOOD; | ||
| 894 | } | ||
| 895 | |||
| 896 | static enum kprobe_insn __kprobes | ||
| 897 | prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
| 898 | { | ||
| 899 | if (is_r15(insn, 12)) | ||
| 900 | return INSN_REJECTED; /* Rd is PC */ | ||
| 901 | |||
| 902 | insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ | ||
| 886 | asi->insn[0] = insn; | 903 | asi->insn[0] = insn; |
| 887 | asi->insn_handler = emulate_rd12; | 904 | asi->insn_handler = emulate_rd12rm0; |
| 888 | return INSN_GOOD; | 905 | return INSN_GOOD; |
| 889 | } | 906 | } |
| 890 | 907 | ||
| @@ -892,6 +909,9 @@ static enum kprobe_insn __kprobes | |||
| 892 | prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn, | 909 | prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn, |
| 893 | struct arch_specific_insn *asi) | 910 | struct arch_specific_insn *asi) |
| 894 | { | 911 | { |
| 912 | if (is_r15(insn, 12)) | ||
| 913 | return INSN_REJECTED; /* Rd is PC */ | ||
| 914 | |||
| 895 | insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ | 915 | insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ |
| 896 | insn |= 0x00000001; /* Rm = r1 */ | 916 | insn |= 0x00000001; /* Rm = r1 */ |
| 897 | asi->insn[0] = insn; | 917 | asi->insn[0] = insn; |
| @@ -903,6 +923,9 @@ static enum kprobe_insn __kprobes | |||
| 903 | prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn, | 923 | prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn, |
| 904 | struct arch_specific_insn *asi) | 924 | struct arch_specific_insn *asi) |
| 905 | { | 925 | { |
| 926 | if (is_r15(insn, 16)) | ||
| 927 | return INSN_REJECTED; /* Rd is PC */ | ||
| 928 | |||
| 906 | insn &= 0xfff0f0f0; /* Rd = r0, Rs = r0 */ | 929 | insn &= 0xfff0f0f0; /* Rd = r0, Rs = r0 */ |
| 907 | insn |= 0x00000001; /* Rm = r1 */ | 930 | insn |= 0x00000001; /* Rm = r1 */ |
| 908 | asi->insn[0] = insn; | 931 | asi->insn[0] = insn; |
| @@ -914,6 +937,9 @@ static enum kprobe_insn __kprobes | |||
| 914 | prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn, | 937 | prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn, |
| 915 | struct arch_specific_insn *asi) | 938 | struct arch_specific_insn *asi) |
| 916 | { | 939 | { |
| 940 | if (is_r15(insn, 16)) | ||
| 941 | return INSN_REJECTED; /* Rd is PC */ | ||
| 942 | |||
| 917 | insn &= 0xfff000f0; /* Rd = r0, Rn = r0 */ | 943 | insn &= 0xfff000f0; /* Rd = r0, Rn = r0 */ |
| 918 | insn |= 0x00000102; /* Rs = r1, Rm = r2 */ | 944 | insn |= 0x00000102; /* Rs = r1, Rm = r2 */ |
| 919 | asi->insn[0] = insn; | 945 | asi->insn[0] = insn; |
| @@ -925,6 +951,9 @@ static enum kprobe_insn __kprobes | |||
| 925 | prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, | 951 | prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, |
| 926 | struct arch_specific_insn *asi) | 952 | struct arch_specific_insn *asi) |
| 927 | { | 953 | { |
| 954 | if (is_r15(insn, 16) || is_r15(insn, 12)) | ||
| 955 | return INSN_REJECTED; /* RdHi or RdLo is PC */ | ||
| 956 | |||
| 928 | insn &= 0xfff000f0; /* RdHi = r0, RdLo = r1 */ | 957 | insn &= 0xfff000f0; /* RdHi = r0, RdLo = r1 */ |
| 929 | insn |= 0x00001203; /* Rs = r2, Rm = r3 */ | 958 | insn |= 0x00001203; /* Rs = r2, Rm = r3 */ |
| 930 | asi->insn[0] = insn; | 959 | asi->insn[0] = insn; |
| @@ -945,20 +974,13 @@ prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, | |||
| 945 | static enum kprobe_insn __kprobes | 974 | static enum kprobe_insn __kprobes |
| 946 | space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 975 | space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi) |
| 947 | { | 976 | { |
| 948 | /* CPS mmod == 1 : 1111 0001 0000 xx10 xxxx xxxx xx0x xxxx */ | 977 | /* memory hint : 1111 0100 x001 xxxx xxxx xxxx xxxx xxxx : */ |
| 949 | /* RFE : 1111 100x x0x1 xxxx xxxx 1010 xxxx xxxx */ | 978 | /* PLDI : 1111 0100 x101 xxxx xxxx xxxx xxxx xxxx : */ |
| 950 | /* SRS : 1111 100x x1x0 1101 xxxx 0101 xxxx xxxx */ | 979 | /* PLDW : 1111 0101 x001 xxxx xxxx xxxx xxxx xxxx : */ |
| 951 | if ((insn & 0xfff30020) == 0xf1020000 || | 980 | /* PLD : 1111 0101 x101 xxxx xxxx xxxx xxxx xxxx : */ |
| 952 | (insn & 0xfe500f00) == 0xf8100a00 || | 981 | if ((insn & 0xfe300000) == 0xf4100000) { |
| 953 | (insn & 0xfe5f0f00) == 0xf84d0500) | 982 | asi->insn_handler = emulate_nop; |
| 954 | return INSN_REJECTED; | 983 | return INSN_GOOD_NO_SLOT; |
| 955 | |||
| 956 | /* PLD : 1111 01x1 x101 xxxx xxxx xxxx xxxx xxxx : */ | ||
| 957 | if ((insn & 0xfd700000) == 0xf4500000) { | ||
| 958 | insn &= 0xfff0ffff; /* Rn = r0 */ | ||
| 959 | asi->insn[0] = insn; | ||
| 960 | asi->insn_handler = emulate_rn16; | ||
| 961 | return INSN_GOOD; | ||
| 962 | } | 984 | } |
| 963 | 985 | ||
| 964 | /* BLX(1) : 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx : */ | 986 | /* BLX(1) : 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx : */ |
| @@ -967,41 +989,22 @@ space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 967 | return INSN_GOOD_NO_SLOT; | 989 | return INSN_GOOD_NO_SLOT; |
| 968 | } | 990 | } |
| 969 | 991 | ||
| 970 | /* SETEND : 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */ | 992 | /* CPS : 1111 0001 0000 xxx0 xxxx xxxx xx0x xxxx */ |
| 971 | /* CDP2 : 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ | 993 | /* SETEND: 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */ |
| 972 | if ((insn & 0xffff00f0) == 0xf1010000 || | ||
| 973 | (insn & 0xff000010) == 0xfe000000) { | ||
| 974 | asi->insn[0] = insn; | ||
| 975 | asi->insn_handler = emulate_none; | ||
| 976 | return INSN_GOOD; | ||
| 977 | } | ||
| 978 | 994 | ||
| 995 | /* SRS : 1111 100x x1x0 xxxx xxxx xxxx xxxx xxxx */ | ||
| 996 | /* RFE : 1111 100x x0x1 xxxx xxxx xxxx xxxx xxxx */ | ||
| 997 | |||
| 998 | /* Coprocessor instructions... */ | ||
| 979 | /* MCRR2 : 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ | 999 | /* MCRR2 : 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ |
| 980 | /* MRRC2 : 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ | 1000 | /* MRRC2 : 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ |
| 981 | if ((insn & 0xffe00000) == 0xfc400000) { | 1001 | /* LDC2 : 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ |
| 982 | insn &= 0xfff00fff; /* Rn = r0 */ | 1002 | /* STC2 : 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ |
| 983 | insn |= 0x00001000; /* Rd = r1 */ | 1003 | /* CDP2 : 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ |
| 984 | asi->insn[0] = insn; | 1004 | /* MCR2 : 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ |
| 985 | asi->insn_handler = | 1005 | /* MRC2 : 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ |
| 986 | (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr; | ||
| 987 | return INSN_GOOD; | ||
| 988 | } | ||
| 989 | 1006 | ||
| 990 | /* LDC2 : 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ | 1007 | return INSN_REJECTED; |
| 991 | /* STC2 : 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ | ||
| 992 | if ((insn & 0xfe000000) == 0xfc000000) { | ||
| 993 | insn &= 0xfff0ffff; /* Rn = r0 */ | ||
| 994 | asi->insn[0] = insn; | ||
| 995 | asi->insn_handler = emulate_ldcstc; | ||
| 996 | return INSN_GOOD; | ||
| 997 | } | ||
| 998 | |||
| 999 | /* MCR2 : 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ | ||
| 1000 | /* MRC2 : 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ | ||
| 1001 | insn &= 0xffff0fff; /* Rd = r0 */ | ||
| 1002 | asi->insn[0] = insn; | ||
| 1003 | asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12; | ||
| 1004 | return INSN_GOOD; | ||
| 1005 | } | 1008 | } |
| 1006 | 1009 | ||
| 1007 | static enum kprobe_insn __kprobes | 1010 | static enum kprobe_insn __kprobes |
| @@ -1010,19 +1013,18 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1010 | /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */ | 1013 | /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */ |
| 1011 | if ((insn & 0x0f900010) == 0x01000000) { | 1014 | if ((insn & 0x0f900010) == 0x01000000) { |
| 1012 | 1015 | ||
| 1013 | /* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */ | 1016 | /* MRS cpsr : cccc 0001 0000 xxxx xxxx xxxx 0000 xxxx */ |
| 1014 | /* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */ | 1017 | if ((insn & 0x0ff000f0) == 0x01000000) { |
| 1015 | if ((insn & 0x0ff000f0) == 0x01200020 || | 1018 | if (is_r15(insn, 12)) |
| 1016 | (insn & 0x0fb000f0) == 0x01200000) | 1019 | return INSN_REJECTED; /* Rd is PC */ |
| 1017 | return INSN_REJECTED; | 1020 | asi->insn_handler = simulate_mrs; |
| 1018 | 1021 | return INSN_GOOD_NO_SLOT; | |
| 1019 | /* MRS : cccc 0001 0x00 xxxx xxxx xxxx 0000 xxxx */ | 1022 | } |
| 1020 | if ((insn & 0x0fb00010) == 0x01000000) | ||
| 1021 | return prep_emulate_rd12(insn, asi); | ||
| 1022 | 1023 | ||
| 1023 | /* SMLALxy : cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */ | 1024 | /* SMLALxy : cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */ |
| 1024 | if ((insn & 0x0ff00090) == 0x01400080) | 1025 | if ((insn & 0x0ff00090) == 0x01400080) |
| 1025 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); | 1026 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, |
| 1027 | asi); | ||
| 1026 | 1028 | ||
| 1027 | /* SMULWy : cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */ | 1029 | /* SMULWy : cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */ |
| 1028 | /* SMULxy : cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */ | 1030 | /* SMULxy : cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */ |
| @@ -1031,24 +1033,29 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1031 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | 1033 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); |
| 1032 | 1034 | ||
| 1033 | /* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */ | 1035 | /* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */ |
| 1034 | /* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 0x00 xxxx : Q */ | 1036 | /* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 1x00 xxxx : Q */ |
| 1035 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | 1037 | if ((insn & 0x0ff00090) == 0x01000080 || |
| 1038 | (insn & 0x0ff000b0) == 0x01200080) | ||
| 1039 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
| 1040 | |||
| 1041 | /* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */ | ||
| 1042 | /* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */ | ||
| 1043 | /* MRS spsr : cccc 0001 0100 xxxx xxxx xxxx 0000 xxxx */ | ||
| 1036 | 1044 | ||
| 1045 | /* Other instruction encodings aren't yet defined */ | ||
| 1046 | return INSN_REJECTED; | ||
| 1037 | } | 1047 | } |
| 1038 | 1048 | ||
| 1039 | /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */ | 1049 | /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */ |
| 1040 | else if ((insn & 0x0f900090) == 0x01000010) { | 1050 | else if ((insn & 0x0f900090) == 0x01000010) { |
| 1041 | 1051 | ||
| 1042 | /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ | ||
| 1043 | if ((insn & 0xfff000f0) == 0xe1200070) | ||
| 1044 | return INSN_REJECTED; | ||
| 1045 | |||
| 1046 | /* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */ | 1052 | /* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */ |
| 1047 | /* BX : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */ | 1053 | /* BX : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */ |
| 1048 | if ((insn & 0x0ff000d0) == 0x01200010) { | 1054 | if ((insn & 0x0ff000d0) == 0x01200010) { |
| 1049 | asi->insn[0] = truecc_insn(insn); | 1055 | if ((insn & 0x0ff000ff) == 0x0120003f) |
| 1056 | return INSN_REJECTED; /* BLX pc */ | ||
| 1050 | asi->insn_handler = simulate_blx2bx; | 1057 | asi->insn_handler = simulate_blx2bx; |
| 1051 | return INSN_GOOD; | 1058 | return INSN_GOOD_NO_SLOT; |
| 1052 | } | 1059 | } |
| 1053 | 1060 | ||
| 1054 | /* CLZ : cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */ | 1061 | /* CLZ : cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */ |
| @@ -1059,17 +1066,27 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1059 | /* QSUB : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */ | 1066 | /* QSUB : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */ |
| 1060 | /* QDADD : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */ | 1067 | /* QDADD : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */ |
| 1061 | /* QDSUB : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */ | 1068 | /* QDSUB : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */ |
| 1062 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | 1069 | if ((insn & 0x0f9000f0) == 0x01000050) |
| 1070 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
| 1071 | |||
| 1072 | /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ | ||
| 1073 | /* SMC : cccc 0001 0110 xxxx xxxx xxxx 0111 xxxx */ | ||
| 1074 | |||
| 1075 | /* Other instruction encodings aren't yet defined */ | ||
| 1076 | return INSN_REJECTED; | ||
| 1063 | } | 1077 | } |
| 1064 | 1078 | ||
| 1065 | /* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */ | 1079 | /* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */ |
| 1066 | else if ((insn & 0x0f000090) == 0x00000090) { | 1080 | else if ((insn & 0x0f0000f0) == 0x00000090) { |
| 1067 | 1081 | ||
| 1068 | /* MUL : cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx : */ | 1082 | /* MUL : cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx : */ |
| 1069 | /* MULS : cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx :cc */ | 1083 | /* MULS : cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx :cc */ |
| 1070 | /* MLA : cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx : */ | 1084 | /* MLA : cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx : */ |
| 1071 | /* MLAS : cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx :cc */ | 1085 | /* MLAS : cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx :cc */ |
| 1072 | /* UMAAL : cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx : */ | 1086 | /* UMAAL : cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx : */ |
| 1087 | /* undef : cccc 0000 0101 xxxx xxxx xxxx 1001 xxxx : */ | ||
| 1088 | /* MLS : cccc 0000 0110 xxxx xxxx xxxx 1001 xxxx : */ | ||
| 1089 | /* undef : cccc 0000 0111 xxxx xxxx xxxx 1001 xxxx : */ | ||
| 1073 | /* UMULL : cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx : */ | 1090 | /* UMULL : cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx : */ |
| 1074 | /* UMULLS : cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx :cc */ | 1091 | /* UMULLS : cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx :cc */ |
| 1075 | /* UMLAL : cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx : */ | 1092 | /* UMLAL : cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx : */ |
| @@ -1078,13 +1095,15 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1078 | /* SMULLS : cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx :cc */ | 1095 | /* SMULLS : cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx :cc */ |
| 1079 | /* SMLAL : cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx : */ | 1096 | /* SMLAL : cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx : */ |
| 1080 | /* SMLALS : cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx :cc */ | 1097 | /* SMLALS : cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx :cc */ |
| 1081 | if ((insn & 0x0fe000f0) == 0x00000090) { | 1098 | if ((insn & 0x00d00000) == 0x00500000) |
| 1082 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | 1099 | return INSN_REJECTED; |
| 1083 | } else if ((insn & 0x0fe000f0) == 0x00200090) { | 1100 | else if ((insn & 0x00e00000) == 0x00000000) |
| 1084 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | 1101 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); |
| 1085 | } else { | 1102 | else if ((insn & 0x00a00000) == 0x00200000) |
| 1086 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); | 1103 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); |
| 1087 | } | 1104 | else |
| 1105 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, | ||
| 1106 | asi); | ||
| 1088 | } | 1107 | } |
| 1089 | 1108 | ||
| 1090 | /* cccc 000x xxxx xxxx xxxx xxxx xxxx 1xx1 xxxx */ | 1109 | /* cccc 000x xxxx xxxx xxxx xxxx xxxx 1xx1 xxxx */ |
| @@ -1092,23 +1111,45 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1092 | 1111 | ||
| 1093 | /* SWP : cccc 0001 0000 xxxx xxxx xxxx 1001 xxxx */ | 1112 | /* SWP : cccc 0001 0000 xxxx xxxx xxxx 1001 xxxx */ |
| 1094 | /* SWPB : cccc 0001 0100 xxxx xxxx xxxx 1001 xxxx */ | 1113 | /* SWPB : cccc 0001 0100 xxxx xxxx xxxx 1001 xxxx */ |
| 1095 | /* LDRD : cccc 000x xxx0 xxxx xxxx xxxx 1101 xxxx */ | 1114 | /* ??? : cccc 0001 0x01 xxxx xxxx xxxx 1001 xxxx */ |
| 1096 | /* STRD : cccc 000x xxx0 xxxx xxxx xxxx 1111 xxxx */ | 1115 | /* ??? : cccc 0001 0x10 xxxx xxxx xxxx 1001 xxxx */ |
| 1116 | /* ??? : cccc 0001 0x11 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1097 | /* STREX : cccc 0001 1000 xxxx xxxx xxxx 1001 xxxx */ | 1117 | /* STREX : cccc 0001 1000 xxxx xxxx xxxx 1001 xxxx */ |
| 1098 | /* LDREX : cccc 0001 1001 xxxx xxxx xxxx 1001 xxxx */ | 1118 | /* LDREX : cccc 0001 1001 xxxx xxxx xxxx 1001 xxxx */ |
| 1119 | /* STREXD: cccc 0001 1010 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1120 | /* LDREXD: cccc 0001 1011 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1121 | /* STREXB: cccc 0001 1100 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1122 | /* LDREXB: cccc 0001 1101 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1123 | /* STREXH: cccc 0001 1110 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1124 | /* LDREXH: cccc 0001 1111 xxxx xxxx xxxx 1001 xxxx */ | ||
| 1125 | |||
| 1126 | /* LDRD : cccc 000x xxx0 xxxx xxxx xxxx 1101 xxxx */ | ||
| 1127 | /* STRD : cccc 000x xxx0 xxxx xxxx xxxx 1111 xxxx */ | ||
| 1099 | /* LDRH : cccc 000x xxx1 xxxx xxxx xxxx 1011 xxxx */ | 1128 | /* LDRH : cccc 000x xxx1 xxxx xxxx xxxx 1011 xxxx */ |
| 1100 | /* STRH : cccc 000x xxx0 xxxx xxxx xxxx 1011 xxxx */ | 1129 | /* STRH : cccc 000x xxx0 xxxx xxxx xxxx 1011 xxxx */ |
| 1101 | /* LDRSB : cccc 000x xxx1 xxxx xxxx xxxx 1101 xxxx */ | 1130 | /* LDRSB : cccc 000x xxx1 xxxx xxxx xxxx 1101 xxxx */ |
| 1102 | /* LDRSH : cccc 000x xxx1 xxxx xxxx xxxx 1111 xxxx */ | 1131 | /* LDRSH : cccc 000x xxx1 xxxx xxxx xxxx 1111 xxxx */ |
| 1103 | if ((insn & 0x0fb000f0) == 0x01000090) { | 1132 | if ((insn & 0x0f0000f0) == 0x01000090) { |
| 1104 | /* SWP/SWPB */ | 1133 | if ((insn & 0x0fb000f0) == 0x01000090) { |
| 1105 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | 1134 | /* SWP/SWPB */ |
| 1135 | return prep_emulate_rd12rn16rm0_wflags(insn, | ||
| 1136 | asi); | ||
| 1137 | } else { | ||
| 1138 | /* STREX/LDREX variants and unallocaed space */ | ||
| 1139 | return INSN_REJECTED; | ||
| 1140 | } | ||
| 1141 | |||
| 1106 | } else if ((insn & 0x0e1000d0) == 0x00000d0) { | 1142 | } else if ((insn & 0x0e1000d0) == 0x00000d0) { |
| 1107 | /* STRD/LDRD */ | 1143 | /* STRD/LDRD */ |
| 1144 | if ((insn & 0x0000e000) == 0x0000e000) | ||
| 1145 | return INSN_REJECTED; /* Rd is LR or PC */ | ||
| 1146 | if (is_writeback(insn) && is_r15(insn, 16)) | ||
| 1147 | return INSN_REJECTED; /* Writeback to PC */ | ||
| 1148 | |||
| 1108 | insn &= 0xfff00fff; | 1149 | insn &= 0xfff00fff; |
| 1109 | insn |= 0x00002000; /* Rn = r0, Rd = r2 */ | 1150 | insn |= 0x00002000; /* Rn = r0, Rd = r2 */ |
| 1110 | if (insn & (1 << 22)) { | 1151 | if (!(insn & (1 << 22))) { |
| 1111 | /* I bit */ | 1152 | /* Register index */ |
| 1112 | insn &= ~0xf; | 1153 | insn &= ~0xf; |
| 1113 | insn |= 1; /* Rm = r1 */ | 1154 | insn |= 1; /* Rm = r1 */ |
| 1114 | } | 1155 | } |
| @@ -1118,6 +1159,9 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1118 | return INSN_GOOD; | 1159 | return INSN_GOOD; |
| 1119 | } | 1160 | } |
| 1120 | 1161 | ||
| 1162 | /* LDRH/STRH/LDRSB/LDRSH */ | ||
| 1163 | if (is_r15(insn, 12)) | ||
| 1164 | return INSN_REJECTED; /* Rd is PC */ | ||
| 1121 | return prep_emulate_ldr_str(insn, asi); | 1165 | return prep_emulate_ldr_str(insn, asi); |
| 1122 | } | 1166 | } |
| 1123 | 1167 | ||
| @@ -1125,7 +1169,7 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1125 | 1169 | ||
| 1126 | /* | 1170 | /* |
| 1127 | * ALU op with S bit and Rd == 15 : | 1171 | * ALU op with S bit and Rd == 15 : |
| 1128 | * cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx | 1172 | * cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx |
| 1129 | */ | 1173 | */ |
| 1130 | if ((insn & 0x0e10f000) == 0x0010f000) | 1174 | if ((insn & 0x0e10f000) == 0x0010f000) |
| 1131 | return INSN_REJECTED; | 1175 | return INSN_REJECTED; |
| @@ -1154,22 +1198,61 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1154 | insn |= 0x00000200; /* Rs = r2 */ | 1198 | insn |= 0x00000200; /* Rs = r2 */ |
| 1155 | } | 1199 | } |
| 1156 | asi->insn[0] = insn; | 1200 | asi->insn[0] = insn; |
| 1157 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | 1201 | |
| 1202 | if ((insn & 0x0f900000) == 0x01100000) { | ||
| 1203 | /* | ||
| 1204 | * TST : cccc 0001 0001 xxxx xxxx xxxx xxxx xxxx | ||
| 1205 | * TEQ : cccc 0001 0011 xxxx xxxx xxxx xxxx xxxx | ||
| 1206 | * CMP : cccc 0001 0101 xxxx xxxx xxxx xxxx xxxx | ||
| 1207 | * CMN : cccc 0001 0111 xxxx xxxx xxxx xxxx xxxx | ||
| 1208 | */ | ||
| 1209 | asi->insn_handler = emulate_alu_tests; | ||
| 1210 | } else { | ||
| 1211 | /* ALU ops which write to Rd */ | ||
| 1212 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | ||
| 1158 | emulate_alu_rwflags : emulate_alu_rflags; | 1213 | emulate_alu_rwflags : emulate_alu_rflags; |
| 1214 | } | ||
| 1159 | return INSN_GOOD; | 1215 | return INSN_GOOD; |
| 1160 | } | 1216 | } |
| 1161 | 1217 | ||
| 1162 | static enum kprobe_insn __kprobes | 1218 | static enum kprobe_insn __kprobes |
| 1163 | space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 1219 | space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) |
| 1164 | { | 1220 | { |
| 1221 | /* MOVW : cccc 0011 0000 xxxx xxxx xxxx xxxx xxxx */ | ||
| 1222 | /* MOVT : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx */ | ||
| 1223 | if ((insn & 0x0fb00000) == 0x03000000) | ||
| 1224 | return prep_emulate_rd12_modify(insn, asi); | ||
| 1225 | |||
| 1226 | /* hints : cccc 0011 0010 0000 xxxx xxxx xxxx xxxx */ | ||
| 1227 | if ((insn & 0x0fff0000) == 0x03200000) { | ||
| 1228 | unsigned op2 = insn & 0x000000ff; | ||
| 1229 | if (op2 == 0x01 || op2 == 0x04) { | ||
| 1230 | /* YIELD : cccc 0011 0010 0000 xxxx xxxx 0000 0001 */ | ||
| 1231 | /* SEV : cccc 0011 0010 0000 xxxx xxxx 0000 0100 */ | ||
| 1232 | asi->insn[0] = insn; | ||
| 1233 | asi->insn_handler = emulate_none; | ||
| 1234 | return INSN_GOOD; | ||
| 1235 | } else if (op2 <= 0x03) { | ||
| 1236 | /* NOP : cccc 0011 0010 0000 xxxx xxxx 0000 0000 */ | ||
| 1237 | /* WFE : cccc 0011 0010 0000 xxxx xxxx 0000 0010 */ | ||
| 1238 | /* WFI : cccc 0011 0010 0000 xxxx xxxx 0000 0011 */ | ||
| 1239 | /* | ||
| 1240 | * We make WFE and WFI true NOPs to avoid stalls due | ||
| 1241 | * to missing events whilst processing the probe. | ||
| 1242 | */ | ||
| 1243 | asi->insn_handler = emulate_nop; | ||
| 1244 | return INSN_GOOD_NO_SLOT; | ||
| 1245 | } | ||
| 1246 | /* For DBG and unallocated hints it's safest to reject them */ | ||
| 1247 | return INSN_REJECTED; | ||
| 1248 | } | ||
| 1249 | |||
| 1165 | /* | 1250 | /* |
| 1166 | * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx | 1251 | * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx |
| 1167 | * Undef : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx | ||
| 1168 | * ALU op with S bit and Rd == 15 : | 1252 | * ALU op with S bit and Rd == 15 : |
| 1169 | * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx | 1253 | * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx |
| 1170 | */ | 1254 | */ |
| 1171 | if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */ | 1255 | if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */ |
| 1172 | (insn & 0x0ff00000) == 0x03400000 || /* Undef */ | ||
| 1173 | (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ | 1256 | (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ |
| 1174 | return INSN_REJECTED; | 1257 | return INSN_REJECTED; |
| 1175 | 1258 | ||
| @@ -1180,10 +1263,22 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1180 | * *S (bit 20) updates condition codes | 1263 | * *S (bit 20) updates condition codes |
| 1181 | * ADC/SBC/RSC reads the C flag | 1264 | * ADC/SBC/RSC reads the C flag |
| 1182 | */ | 1265 | */ |
| 1183 | insn &= 0xffff0fff; /* Rd = r0 */ | 1266 | insn &= 0xfff00fff; /* Rn = r0 and Rd = r0 */ |
| 1184 | asi->insn[0] = insn; | 1267 | asi->insn[0] = insn; |
| 1185 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | 1268 | |
| 1269 | if ((insn & 0x0f900000) == 0x03100000) { | ||
| 1270 | /* | ||
| 1271 | * TST : cccc 0011 0001 xxxx xxxx xxxx xxxx xxxx | ||
| 1272 | * TEQ : cccc 0011 0011 xxxx xxxx xxxx xxxx xxxx | ||
| 1273 | * CMP : cccc 0011 0101 xxxx xxxx xxxx xxxx xxxx | ||
| 1274 | * CMN : cccc 0011 0111 xxxx xxxx xxxx xxxx xxxx | ||
| 1275 | */ | ||
| 1276 | asi->insn_handler = emulate_alu_tests_imm; | ||
| 1277 | } else { | ||
| 1278 | /* ALU ops which write to Rd */ | ||
| 1279 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | ||
| 1186 | emulate_alu_imm_rwflags : emulate_alu_imm_rflags; | 1280 | emulate_alu_imm_rwflags : emulate_alu_imm_rflags; |
| 1281 | } | ||
| 1187 | return INSN_GOOD; | 1282 | return INSN_GOOD; |
| 1188 | } | 1283 | } |
| 1189 | 1284 | ||
| @@ -1192,6 +1287,8 @@ space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1192 | { | 1287 | { |
| 1193 | /* SEL : cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx GE: !!! */ | 1288 | /* SEL : cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx GE: !!! */ |
| 1194 | if ((insn & 0x0ff000f0) == 0x068000b0) { | 1289 | if ((insn & 0x0ff000f0) == 0x068000b0) { |
| 1290 | if (is_r15(insn, 12)) | ||
| 1291 | return INSN_REJECTED; /* Rd is PC */ | ||
| 1195 | insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ | 1292 | insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ |
| 1196 | insn |= 0x00000001; /* Rm = r1 */ | 1293 | insn |= 0x00000001; /* Rm = r1 */ |
| 1197 | asi->insn[0] = insn; | 1294 | asi->insn[0] = insn; |
| @@ -1205,6 +1302,8 @@ space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1205 | /* USAT16 : cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx :Q */ | 1302 | /* USAT16 : cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx :Q */ |
| 1206 | if ((insn & 0x0fa00030) == 0x06a00010 || | 1303 | if ((insn & 0x0fa00030) == 0x06a00010 || |
| 1207 | (insn & 0x0fb000f0) == 0x06a00030) { | 1304 | (insn & 0x0fb000f0) == 0x06a00030) { |
| 1305 | if (is_r15(insn, 12)) | ||
| 1306 | return INSN_REJECTED; /* Rd is PC */ | ||
| 1208 | insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ | 1307 | insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ |
| 1209 | asi->insn[0] = insn; | 1308 | asi->insn[0] = insn; |
| 1210 | asi->insn_handler = emulate_sat; | 1309 | asi->insn_handler = emulate_sat; |
| @@ -1213,57 +1312,101 @@ space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1213 | 1312 | ||
| 1214 | /* REV : cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */ | 1313 | /* REV : cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */ |
| 1215 | /* REV16 : cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */ | 1314 | /* REV16 : cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */ |
| 1315 | /* RBIT : cccc 0110 1111 xxxx xxxx xxxx 0011 xxxx */ | ||
| 1216 | /* REVSH : cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */ | 1316 | /* REVSH : cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */ |
| 1217 | if ((insn & 0x0ff00070) == 0x06b00030 || | 1317 | if ((insn & 0x0ff00070) == 0x06b00030 || |
| 1218 | (insn & 0x0ff000f0) == 0x06f000b0) | 1318 | (insn & 0x0ff00070) == 0x06f00030) |
| 1219 | return prep_emulate_rd12rm0(insn, asi); | 1319 | return prep_emulate_rd12rm0(insn, asi); |
| 1220 | 1320 | ||
| 1321 | /* ??? : cccc 0110 0000 xxxx xxxx xxxx xxx1 xxxx : */ | ||
| 1221 | /* SADD16 : cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx :GE */ | 1322 | /* SADD16 : cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx :GE */ |
| 1222 | /* SADDSUBX : cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx :GE */ | 1323 | /* SADDSUBX : cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx :GE */ |
| 1223 | /* SSUBADDX : cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx :GE */ | 1324 | /* SSUBADDX : cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx :GE */ |
| 1224 | /* SSUB16 : cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx :GE */ | 1325 | /* SSUB16 : cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx :GE */ |
| 1225 | /* SADD8 : cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx :GE */ | 1326 | /* SADD8 : cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx :GE */ |
| 1327 | /* ??? : cccc 0110 0001 xxxx xxxx xxxx 1011 xxxx : */ | ||
| 1328 | /* ??? : cccc 0110 0001 xxxx xxxx xxxx 1101 xxxx : */ | ||
| 1226 | /* SSUB8 : cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx :GE */ | 1329 | /* SSUB8 : cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx :GE */ |
| 1227 | /* QADD16 : cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx : */ | 1330 | /* QADD16 : cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx : */ |
| 1228 | /* QADDSUBX : cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx : */ | 1331 | /* QADDSUBX : cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx : */ |
| 1229 | /* QSUBADDX : cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx : */ | 1332 | /* QSUBADDX : cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx : */ |
| 1230 | /* QSUB16 : cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx : */ | 1333 | /* QSUB16 : cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx : */ |
| 1231 | /* QADD8 : cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx : */ | 1334 | /* QADD8 : cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx : */ |
| 1335 | /* ??? : cccc 0110 0010 xxxx xxxx xxxx 1011 xxxx : */ | ||
| 1336 | /* ??? : cccc 0110 0010 xxxx xxxx xxxx 1101 xxxx : */ | ||
| 1232 | /* QSUB8 : cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx : */ | 1337 | /* QSUB8 : cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx : */ |
| 1233 | /* SHADD16 : cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx : */ | 1338 | /* SHADD16 : cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx : */ |
| 1234 | /* SHADDSUBX : cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx : */ | 1339 | /* SHADDSUBX : cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx : */ |
| 1235 | /* SHSUBADDX : cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx : */ | 1340 | /* SHSUBADDX : cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx : */ |
| 1236 | /* SHSUB16 : cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx : */ | 1341 | /* SHSUB16 : cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx : */ |
| 1237 | /* SHADD8 : cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx : */ | 1342 | /* SHADD8 : cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx : */ |
| 1343 | /* ??? : cccc 0110 0011 xxxx xxxx xxxx 1011 xxxx : */ | ||
| 1344 | /* ??? : cccc 0110 0011 xxxx xxxx xxxx 1101 xxxx : */ | ||
| 1238 | /* SHSUB8 : cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx : */ | 1345 | /* SHSUB8 : cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx : */ |
| 1346 | /* ??? : cccc 0110 0100 xxxx xxxx xxxx xxx1 xxxx : */ | ||
| 1239 | /* UADD16 : cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx :GE */ | 1347 | /* UADD16 : cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx :GE */ |
| 1240 | /* UADDSUBX : cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx :GE */ | 1348 | /* UADDSUBX : cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx :GE */ |
| 1241 | /* USUBADDX : cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx :GE */ | 1349 | /* USUBADDX : cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx :GE */ |
| 1242 | /* USUB16 : cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx :GE */ | 1350 | /* USUB16 : cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx :GE */ |
| 1243 | /* UADD8 : cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx :GE */ | 1351 | /* UADD8 : cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx :GE */ |
| 1352 | /* ??? : cccc 0110 0101 xxxx xxxx xxxx 1011 xxxx : */ | ||
| 1353 | /* ??? : cccc 0110 0101 xxxx xxxx xxxx 1101 xxxx : */ | ||
| 1244 | /* USUB8 : cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx :GE */ | 1354 | /* USUB8 : cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx :GE */ |
| 1245 | /* UQADD16 : cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx : */ | 1355 | /* UQADD16 : cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx : */ |
| 1246 | /* UQADDSUBX : cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx : */ | 1356 | /* UQADDSUBX : cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx : */ |
| 1247 | /* UQSUBADDX : cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx : */ | 1357 | /* UQSUBADDX : cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx : */ |
| 1248 | /* UQSUB16 : cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx : */ | 1358 | /* UQSUB16 : cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx : */ |
| 1249 | /* UQADD8 : cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx : */ | 1359 | /* UQADD8 : cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx : */ |
| 1360 | /* ??? : cccc 0110 0110 xxxx xxxx xxxx 1011 xxxx : */ | ||
| 1361 | /* ??? : cccc 0110 0110 xxxx xxxx xxxx 1101 xxxx : */ | ||
| 1250 | /* UQSUB8 : cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx : */ | 1362 | /* UQSUB8 : cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx : */ |
| 1251 | /* UHADD16 : cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx : */ | 1363 | /* UHADD16 : cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx : */ |
| 1252 | /* UHADDSUBX : cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx : */ | 1364 | /* UHADDSUBX : cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx : */ |
| 1253 | /* UHSUBADDX : cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx : */ | 1365 | /* UHSUBADDX : cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx : */ |
| 1254 | /* UHSUB16 : cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx : */ | 1366 | /* UHSUB16 : cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx : */ |
| 1255 | /* UHADD8 : cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx : */ | 1367 | /* UHADD8 : cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx : */ |
| 1368 | /* ??? : cccc 0110 0111 xxxx xxxx xxxx 1011 xxxx : */ | ||
| 1369 | /* ??? : cccc 0110 0111 xxxx xxxx xxxx 1101 xxxx : */ | ||
| 1256 | /* UHSUB8 : cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx : */ | 1370 | /* UHSUB8 : cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx : */ |
| 1371 | if ((insn & 0x0f800010) == 0x06000010) { | ||
| 1372 | if ((insn & 0x00300000) == 0x00000000 || | ||
| 1373 | (insn & 0x000000e0) == 0x000000a0 || | ||
| 1374 | (insn & 0x000000e0) == 0x000000c0) | ||
| 1375 | return INSN_REJECTED; /* Unallocated space */ | ||
| 1376 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
| 1377 | } | ||
| 1378 | |||
| 1257 | /* PKHBT : cccc 0110 1000 xxxx xxxx xxxx x001 xxxx : */ | 1379 | /* PKHBT : cccc 0110 1000 xxxx xxxx xxxx x001 xxxx : */ |
| 1258 | /* PKHTB : cccc 0110 1000 xxxx xxxx xxxx x101 xxxx : */ | 1380 | /* PKHTB : cccc 0110 1000 xxxx xxxx xxxx x101 xxxx : */ |
| 1381 | if ((insn & 0x0ff00030) == 0x06800010) | ||
| 1382 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
| 1383 | |||
| 1259 | /* SXTAB16 : cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx : */ | 1384 | /* SXTAB16 : cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx : */ |
| 1260 | /* SXTB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ | 1385 | /* SXTB16 : cccc 0110 1000 1111 xxxx xxxx 0111 xxxx : */ |
| 1386 | /* ??? : cccc 0110 1001 xxxx xxxx xxxx 0111 xxxx : */ | ||
| 1261 | /* SXTAB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ | 1387 | /* SXTAB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ |
| 1388 | /* SXTB : cccc 0110 1010 1111 xxxx xxxx 0111 xxxx : */ | ||
| 1262 | /* SXTAH : cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx : */ | 1389 | /* SXTAH : cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx : */ |
| 1390 | /* SXTH : cccc 0110 1011 1111 xxxx xxxx 0111 xxxx : */ | ||
| 1263 | /* UXTAB16 : cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx : */ | 1391 | /* UXTAB16 : cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx : */ |
| 1392 | /* UXTB16 : cccc 0110 1100 1111 xxxx xxxx 0111 xxxx : */ | ||
| 1393 | /* ??? : cccc 0110 1101 xxxx xxxx xxxx 0111 xxxx : */ | ||
| 1264 | /* UXTAB : cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx : */ | 1394 | /* UXTAB : cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx : */ |
| 1395 | /* UXTB : cccc 0110 1110 1111 xxxx xxxx 0111 xxxx : */ | ||
| 1265 | /* UXTAH : cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx : */ | 1396 | /* UXTAH : cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx : */ |
| 1266 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | 1397 | /* UXTH : cccc 0110 1111 1111 xxxx xxxx 0111 xxxx : */ |
| 1398 | if ((insn & 0x0f8000f0) == 0x06800070) { | ||
| 1399 | if ((insn & 0x00300000) == 0x00100000) | ||
| 1400 | return INSN_REJECTED; /* Unallocated space */ | ||
| 1401 | |||
| 1402 | if ((insn & 0x000f0000) == 0x000f0000) | ||
| 1403 | return prep_emulate_rd12rm0(insn, asi); | ||
| 1404 | else | ||
| 1405 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
| 1406 | } | ||
| 1407 | |||
| 1408 | /* Other instruction encodings aren't yet defined */ | ||
| 1409 | return INSN_REJECTED; | ||
| 1267 | } | 1410 | } |
| 1268 | 1411 | ||
| 1269 | static enum kprobe_insn __kprobes | 1412 | static enum kprobe_insn __kprobes |
| @@ -1273,29 +1416,49 @@ space_cccc_0111__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1273 | if ((insn & 0x0ff000f0) == 0x03f000f0) | 1416 | if ((insn & 0x0ff000f0) == 0x03f000f0) |
| 1274 | return INSN_REJECTED; | 1417 | return INSN_REJECTED; |
| 1275 | 1418 | ||
| 1276 | /* USADA8 : cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx */ | ||
| 1277 | /* USAD8 : cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx */ | ||
| 1278 | if ((insn & 0x0ff000f0) == 0x07800010) | ||
| 1279 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
| 1280 | |||
| 1281 | /* SMLALD : cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */ | 1419 | /* SMLALD : cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */ |
| 1282 | /* SMLSLD : cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */ | 1420 | /* SMLSLD : cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */ |
| 1283 | if ((insn & 0x0ff00090) == 0x07400010) | 1421 | if ((insn & 0x0ff00090) == 0x07400010) |
| 1284 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); | 1422 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); |
| 1285 | 1423 | ||
| 1286 | /* SMLAD : cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx :Q */ | 1424 | /* SMLAD : cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx :Q */ |
| 1425 | /* SMUAD : cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx :Q */ | ||
| 1287 | /* SMLSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :Q */ | 1426 | /* SMLSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :Q */ |
| 1427 | /* SMUSD : cccc 0111 0000 xxxx 1111 xxxx 01x1 xxxx : */ | ||
| 1288 | /* SMMLA : cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx : */ | 1428 | /* SMMLA : cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx : */ |
| 1289 | /* SMMLS : cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx : */ | 1429 | /* SMMUL : cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx : */ |
| 1430 | /* USADA8 : cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx : */ | ||
| 1431 | /* USAD8 : cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx : */ | ||
| 1290 | if ((insn & 0x0ff00090) == 0x07000010 || | 1432 | if ((insn & 0x0ff00090) == 0x07000010 || |
| 1291 | (insn & 0x0ff000d0) == 0x07500010 || | 1433 | (insn & 0x0ff000d0) == 0x07500010 || |
| 1292 | (insn & 0x0ff000d0) == 0x075000d0) | 1434 | (insn & 0x0ff000f0) == 0x07800010) { |
| 1435 | |||
| 1436 | if ((insn & 0x0000f000) == 0x0000f000) | ||
| 1437 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | ||
| 1438 | else | ||
| 1439 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
| 1440 | } | ||
| 1441 | |||
| 1442 | /* SMMLS : cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx : */ | ||
| 1443 | if ((insn & 0x0ff000d0) == 0x075000d0) | ||
| 1293 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | 1444 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); |
| 1294 | 1445 | ||
| 1295 | /* SMUSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx : */ | 1446 | /* SBFX : cccc 0111 101x xxxx xxxx xxxx x101 xxxx : */ |
| 1296 | /* SMUAD : cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx :Q */ | 1447 | /* UBFX : cccc 0111 111x xxxx xxxx xxxx x101 xxxx : */ |
| 1297 | /* SMMUL : cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx : */ | 1448 | if ((insn & 0x0fa00070) == 0x07a00050) |
| 1298 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | 1449 | return prep_emulate_rd12rm0(insn, asi); |
| 1450 | |||
| 1451 | /* BFI : cccc 0111 110x xxxx xxxx xxxx x001 xxxx : */ | ||
| 1452 | /* BFC : cccc 0111 110x xxxx xxxx xxxx x001 1111 : */ | ||
| 1453 | if ((insn & 0x0fe00070) == 0x07c00010) { | ||
| 1454 | |||
| 1455 | if ((insn & 0x0000000f) == 0x0000000f) | ||
| 1456 | return prep_emulate_rd12_modify(insn, asi); | ||
| 1457 | else | ||
| 1458 | return prep_emulate_rd12rn0_modify(insn, asi); | ||
| 1459 | } | ||
| 1460 | |||
| 1461 | return INSN_REJECTED; | ||
| 1299 | } | 1462 | } |
| 1300 | 1463 | ||
| 1301 | static enum kprobe_insn __kprobes | 1464 | static enum kprobe_insn __kprobes |
| @@ -1309,6 +1472,10 @@ space_cccc_01xx(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1309 | /* STRB : cccc 01xx x1x0 xxxx xxxx xxxx xxxx xxxx */ | 1472 | /* STRB : cccc 01xx x1x0 xxxx xxxx xxxx xxxx xxxx */ |
| 1310 | /* STRBT : cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */ | 1473 | /* STRBT : cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */ |
| 1311 | /* STRT : cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */ | 1474 | /* STRT : cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */ |
| 1475 | |||
| 1476 | if ((insn & 0x00500000) == 0x00500000 && is_r15(insn, 12)) | ||
| 1477 | return INSN_REJECTED; /* LDRB into PC */ | ||
| 1478 | |||
| 1312 | return prep_emulate_ldr_str(insn, asi); | 1479 | return prep_emulate_ldr_str(insn, asi); |
| 1313 | } | 1480 | } |
| 1314 | 1481 | ||
| @@ -1323,10 +1490,9 @@ space_cccc_100x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1323 | 1490 | ||
| 1324 | /* LDM(1) : cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */ | 1491 | /* LDM(1) : cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */ |
| 1325 | /* STM(1) : cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */ | 1492 | /* STM(1) : cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */ |
| 1326 | asi->insn[0] = truecc_insn(insn); | ||
| 1327 | asi->insn_handler = ((insn & 0x108000) == 0x008000) ? /* STM & R15 */ | 1493 | asi->insn_handler = ((insn & 0x108000) == 0x008000) ? /* STM & R15 */ |
| 1328 | simulate_stm1_pc : simulate_ldm1stm1; | 1494 | simulate_stm1_pc : simulate_ldm1stm1; |
| 1329 | return INSN_GOOD; | 1495 | return INSN_GOOD_NO_SLOT; |
| 1330 | } | 1496 | } |
| 1331 | 1497 | ||
| 1332 | static enum kprobe_insn __kprobes | 1498 | static enum kprobe_insn __kprobes |
| @@ -1334,58 +1500,117 @@ space_cccc_101x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1334 | { | 1500 | { |
| 1335 | /* B : cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */ | 1501 | /* B : cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */ |
| 1336 | /* BL : cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */ | 1502 | /* BL : cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */ |
| 1337 | asi->insn[0] = truecc_insn(insn); | ||
| 1338 | asi->insn_handler = simulate_bbl; | 1503 | asi->insn_handler = simulate_bbl; |
| 1339 | return INSN_GOOD; | 1504 | return INSN_GOOD_NO_SLOT; |
| 1340 | } | 1505 | } |
| 1341 | 1506 | ||
| 1342 | static enum kprobe_insn __kprobes | 1507 | static enum kprobe_insn __kprobes |
| 1343 | space_cccc_1100_010x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 1508 | space_cccc_11xx(kprobe_opcode_t insn, struct arch_specific_insn *asi) |
| 1344 | { | 1509 | { |
| 1510 | /* Coprocessor instructions... */ | ||
| 1345 | /* MCRR : cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ | 1511 | /* MCRR : cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ |
| 1346 | /* MRRC : cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ | 1512 | /* MRRC : cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ |
| 1347 | insn &= 0xfff00fff; | 1513 | /* LDC : cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ |
| 1348 | insn |= 0x00001000; /* Rn = r0, Rd = r1 */ | 1514 | /* STC : cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ |
| 1349 | asi->insn[0] = insn; | 1515 | /* CDP : cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ |
| 1350 | asi->insn_handler = (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr; | 1516 | /* MCR : cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ |
| 1351 | return INSN_GOOD; | 1517 | /* MRC : cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ |
| 1518 | |||
| 1519 | /* SVC : cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */ | ||
| 1520 | |||
| 1521 | return INSN_REJECTED; | ||
| 1352 | } | 1522 | } |
| 1353 | 1523 | ||
| 1354 | static enum kprobe_insn __kprobes | 1524 | static unsigned long __kprobes __check_eq(unsigned long cpsr) |
| 1355 | space_cccc_110x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
| 1356 | { | 1525 | { |
| 1357 | /* LDC : cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ | 1526 | return cpsr & PSR_Z_BIT; |
| 1358 | /* STC : cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ | ||
| 1359 | insn &= 0xfff0ffff; /* Rn = r0 */ | ||
| 1360 | asi->insn[0] = insn; | ||
| 1361 | asi->insn_handler = emulate_ldcstc; | ||
| 1362 | return INSN_GOOD; | ||
| 1363 | } | 1527 | } |
| 1364 | 1528 | ||
| 1365 | static enum kprobe_insn __kprobes | 1529 | static unsigned long __kprobes __check_ne(unsigned long cpsr) |
| 1366 | space_cccc_111x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
| 1367 | { | 1530 | { |
| 1368 | /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ | 1531 | return (~cpsr) & PSR_Z_BIT; |
| 1369 | /* SWI : cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */ | 1532 | } |
| 1370 | if ((insn & 0xfff000f0) == 0xe1200070 || | ||
| 1371 | (insn & 0x0f000000) == 0x0f000000) | ||
| 1372 | return INSN_REJECTED; | ||
| 1373 | 1533 | ||
| 1374 | /* CDP : cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ | 1534 | static unsigned long __kprobes __check_cs(unsigned long cpsr) |
| 1375 | if ((insn & 0x0f000010) == 0x0e000000) { | 1535 | { |
| 1376 | asi->insn[0] = insn; | 1536 | return cpsr & PSR_C_BIT; |
| 1377 | asi->insn_handler = emulate_none; | 1537 | } |
| 1378 | return INSN_GOOD; | ||
| 1379 | } | ||
| 1380 | 1538 | ||
| 1381 | /* MCR : cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ | 1539 | static unsigned long __kprobes __check_cc(unsigned long cpsr) |
| 1382 | /* MRC : cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ | 1540 | { |
| 1383 | insn &= 0xffff0fff; /* Rd = r0 */ | 1541 | return (~cpsr) & PSR_C_BIT; |
| 1384 | asi->insn[0] = insn; | 1542 | } |
| 1385 | asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12; | 1543 | |
| 1386 | return INSN_GOOD; | 1544 | static unsigned long __kprobes __check_mi(unsigned long cpsr) |
| 1545 | { | ||
| 1546 | return cpsr & PSR_N_BIT; | ||
| 1547 | } | ||
| 1548 | |||
| 1549 | static unsigned long __kprobes __check_pl(unsigned long cpsr) | ||
| 1550 | { | ||
| 1551 | return (~cpsr) & PSR_N_BIT; | ||
| 1552 | } | ||
| 1553 | |||
| 1554 | static unsigned long __kprobes __check_vs(unsigned long cpsr) | ||
| 1555 | { | ||
| 1556 | return cpsr & PSR_V_BIT; | ||
| 1557 | } | ||
| 1558 | |||
| 1559 | static unsigned long __kprobes __check_vc(unsigned long cpsr) | ||
| 1560 | { | ||
| 1561 | return (~cpsr) & PSR_V_BIT; | ||
| 1562 | } | ||
| 1563 | |||
| 1564 | static unsigned long __kprobes __check_hi(unsigned long cpsr) | ||
| 1565 | { | ||
| 1566 | cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ | ||
| 1567 | return cpsr & PSR_C_BIT; | ||
| 1387 | } | 1568 | } |
| 1388 | 1569 | ||
| 1570 | static unsigned long __kprobes __check_ls(unsigned long cpsr) | ||
| 1571 | { | ||
| 1572 | cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ | ||
| 1573 | return (~cpsr) & PSR_C_BIT; | ||
| 1574 | } | ||
| 1575 | |||
| 1576 | static unsigned long __kprobes __check_ge(unsigned long cpsr) | ||
| 1577 | { | ||
| 1578 | cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
| 1579 | return (~cpsr) & PSR_N_BIT; | ||
| 1580 | } | ||
| 1581 | |||
| 1582 | static unsigned long __kprobes __check_lt(unsigned long cpsr) | ||
| 1583 | { | ||
| 1584 | cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
| 1585 | return cpsr & PSR_N_BIT; | ||
| 1586 | } | ||
| 1587 | |||
| 1588 | static unsigned long __kprobes __check_gt(unsigned long cpsr) | ||
| 1589 | { | ||
| 1590 | unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
| 1591 | temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ | ||
| 1592 | return (~temp) & PSR_N_BIT; | ||
| 1593 | } | ||
| 1594 | |||
| 1595 | static unsigned long __kprobes __check_le(unsigned long cpsr) | ||
| 1596 | { | ||
| 1597 | unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | ||
| 1598 | temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ | ||
| 1599 | return temp & PSR_N_BIT; | ||
| 1600 | } | ||
| 1601 | |||
| 1602 | static unsigned long __kprobes __check_al(unsigned long cpsr) | ||
| 1603 | { | ||
| 1604 | return true; | ||
| 1605 | } | ||
| 1606 | |||
| 1607 | static kprobe_check_cc * const condition_checks[16] = { | ||
| 1608 | &__check_eq, &__check_ne, &__check_cs, &__check_cc, | ||
| 1609 | &__check_mi, &__check_pl, &__check_vs, &__check_vc, | ||
| 1610 | &__check_hi, &__check_ls, &__check_ge, &__check_lt, | ||
| 1611 | &__check_gt, &__check_le, &__check_al, &__check_al | ||
| 1612 | }; | ||
| 1613 | |||
| 1389 | /* Return: | 1614 | /* Return: |
| 1390 | * INSN_REJECTED If instruction is one not allowed to kprobe, | 1615 | * INSN_REJECTED If instruction is one not allowed to kprobe, |
| 1391 | * INSN_GOOD If instruction is supported and uses instruction slot, | 1616 | * INSN_GOOD If instruction is supported and uses instruction slot, |
| @@ -1401,133 +1626,45 @@ space_cccc_111x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | |||
| 1401 | enum kprobe_insn __kprobes | 1626 | enum kprobe_insn __kprobes |
| 1402 | arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) | 1627 | arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) |
| 1403 | { | 1628 | { |
| 1629 | asi->insn_check_cc = condition_checks[insn>>28]; | ||
| 1404 | asi->insn[1] = KPROBE_RETURN_INSTRUCTION; | 1630 | asi->insn[1] = KPROBE_RETURN_INSTRUCTION; |
| 1405 | 1631 | ||
| 1406 | if ((insn & 0xf0000000) == 0xf0000000) { | 1632 | if ((insn & 0xf0000000) == 0xf0000000) |
| 1407 | 1633 | ||
| 1408 | return space_1111(insn, asi); | 1634 | return space_1111(insn, asi); |
| 1409 | 1635 | ||
| 1410 | } else if ((insn & 0x0e000000) == 0x00000000) { | 1636 | else if ((insn & 0x0e000000) == 0x00000000) |
| 1411 | 1637 | ||
| 1412 | return space_cccc_000x(insn, asi); | 1638 | return space_cccc_000x(insn, asi); |
| 1413 | 1639 | ||
| 1414 | } else if ((insn & 0x0e000000) == 0x02000000) { | 1640 | else if ((insn & 0x0e000000) == 0x02000000) |
| 1415 | 1641 | ||
| 1416 | return space_cccc_001x(insn, asi); | 1642 | return space_cccc_001x(insn, asi); |
| 1417 | 1643 | ||
| 1418 | } else if ((insn & 0x0f000010) == 0x06000010) { | 1644 | else if ((insn & 0x0f000010) == 0x06000010) |
| 1419 | 1645 | ||
| 1420 | return space_cccc_0110__1(insn, asi); | 1646 | return space_cccc_0110__1(insn, asi); |
| 1421 | 1647 | ||
| 1422 | } else if ((insn & 0x0f000010) == 0x07000010) { | 1648 | else if ((insn & 0x0f000010) == 0x07000010) |
| 1423 | 1649 | ||
| 1424 | return space_cccc_0111__1(insn, asi); | 1650 | return space_cccc_0111__1(insn, asi); |
| 1425 | 1651 | ||
| 1426 | } else if ((insn & 0x0c000000) == 0x04000000) { | 1652 | else if ((insn & 0x0c000000) == 0x04000000) |
| 1427 | 1653 | ||
| 1428 | return space_cccc_01xx(insn, asi); | 1654 | return space_cccc_01xx(insn, asi); |
| 1429 | 1655 | ||
| 1430 | } else if ((insn & 0x0e000000) == 0x08000000) { | 1656 | else if ((insn & 0x0e000000) == 0x08000000) |
| 1431 | 1657 | ||
| 1432 | return space_cccc_100x(insn, asi); | 1658 | return space_cccc_100x(insn, asi); |
| 1433 | 1659 | ||
| 1434 | } else if ((insn & 0x0e000000) == 0x0a000000) { | 1660 | else if ((insn & 0x0e000000) == 0x0a000000) |
| 1435 | 1661 | ||
| 1436 | return space_cccc_101x(insn, asi); | 1662 | return space_cccc_101x(insn, asi); |
| 1437 | 1663 | ||
| 1438 | } else if ((insn & 0x0fe00000) == 0x0c400000) { | 1664 | return space_cccc_11xx(insn, asi); |
| 1439 | |||
| 1440 | return space_cccc_1100_010x(insn, asi); | ||
| 1441 | |||
| 1442 | } else if ((insn & 0x0e000000) == 0x0c000000) { | ||
| 1443 | |||
| 1444 | return space_cccc_110x(insn, asi); | ||
| 1445 | |||
| 1446 | } | ||
| 1447 | |||
| 1448 | return space_cccc_111x(insn, asi); | ||
| 1449 | } | 1665 | } |
| 1450 | 1666 | ||
| 1451 | void __init arm_kprobe_decode_init(void) | 1667 | void __init arm_kprobe_decode_init(void) |
| 1452 | { | 1668 | { |
| 1453 | find_str_pc_offset(); | 1669 | find_str_pc_offset(); |
| 1454 | } | 1670 | } |
| 1455 | |||
| 1456 | |||
| 1457 | /* | ||
| 1458 | * All ARM instructions listed below. | ||
| 1459 | * | ||
| 1460 | * Instructions and their general purpose registers are given. | ||
| 1461 | * If a particular register may not use R15, it is prefixed with a "!". | ||
| 1462 | * If marked with a "*" means the value returned by reading R15 | ||
| 1463 | * is implementation defined. | ||
| 1464 | * | ||
| 1465 | * ADC/ADD/AND/BIC/CMN/CMP/EOR/MOV/MVN/ORR/RSB/RSC/SBC/SUB/TEQ | ||
| 1466 | * TST: Rd, Rn, Rm, !Rs | ||
| 1467 | * BX: Rm | ||
| 1468 | * BLX(2): !Rm | ||
| 1469 | * BX: Rm (R15 legal, but discouraged) | ||
| 1470 | * BXJ: !Rm, | ||
| 1471 | * CLZ: !Rd, !Rm | ||
| 1472 | * CPY: Rd, Rm | ||
| 1473 | * LDC/2,STC/2 immediate offset & unindex: Rn | ||
| 1474 | * LDC/2,STC/2 immediate pre/post-indexed: !Rn | ||
| 1475 | * LDM(1/3): !Rn, register_list | ||
| 1476 | * LDM(2): !Rn, !register_list | ||
| 1477 | * LDR,STR,PLD immediate offset: Rd, Rn | ||
| 1478 | * LDR,STR,PLD register offset: Rd, Rn, !Rm | ||
| 1479 | * LDR,STR,PLD scaled register offset: Rd, !Rn, !Rm | ||
| 1480 | * LDR,STR immediate pre/post-indexed: Rd, !Rn | ||
| 1481 | * LDR,STR register pre/post-indexed: Rd, !Rn, !Rm | ||
| 1482 | * LDR,STR scaled register pre/post-indexed: Rd, !Rn, !Rm | ||
| 1483 | * LDRB,STRB immediate offset: !Rd, Rn | ||
| 1484 | * LDRB,STRB register offset: !Rd, Rn, !Rm | ||
| 1485 | * LDRB,STRB scaled register offset: !Rd, !Rn, !Rm | ||
| 1486 | * LDRB,STRB immediate pre/post-indexed: !Rd, !Rn | ||
| 1487 | * LDRB,STRB register pre/post-indexed: !Rd, !Rn, !Rm | ||
| 1488 | * LDRB,STRB scaled register pre/post-indexed: !Rd, !Rn, !Rm | ||
| 1489 | * LDRT,LDRBT,STRBT immediate pre/post-indexed: !Rd, !Rn | ||
| 1490 | * LDRT,LDRBT,STRBT register pre/post-indexed: !Rd, !Rn, !Rm | ||
| 1491 | * LDRT,LDRBT,STRBT scaled register pre/post-indexed: !Rd, !Rn, !Rm | ||
| 1492 | * LDRH/SH/SB/D,STRH/SH/SB/D immediate offset: !Rd, Rn | ||
| 1493 | * LDRH/SH/SB/D,STRH/SH/SB/D register offset: !Rd, Rn, !Rm | ||
| 1494 | * LDRH/SH/SB/D,STRH/SH/SB/D immediate pre/post-indexed: !Rd, !Rn | ||
| 1495 | * LDRH/SH/SB/D,STRH/SH/SB/D register pre/post-indexed: !Rd, !Rn, !Rm | ||
| 1496 | * LDREX: !Rd, !Rn | ||
| 1497 | * MCR/2: !Rd | ||
| 1498 | * MCRR/2,MRRC/2: !Rd, !Rn | ||
| 1499 | * MLA: !Rd, !Rn, !Rm, !Rs | ||
| 1500 | * MOV: Rd | ||
| 1501 | * MRC/2: !Rd (if Rd==15, only changes cond codes, not the register) | ||
| 1502 | * MRS,MSR: !Rd | ||
| 1503 | * MUL: !Rd, !Rm, !Rs | ||
| 1504 | * PKH{BT,TB}: !Rd, !Rn, !Rm | ||
| 1505 | * QDADD,[U]QADD/16/8/SUBX: !Rd, !Rm, !Rn | ||
| 1506 | * QDSUB,[U]QSUB/16/8/ADDX: !Rd, !Rm, !Rn | ||
| 1507 | * REV/16/SH: !Rd, !Rm | ||
| 1508 | * RFE: !Rn | ||
| 1509 | * {S,U}[H]ADD{16,8,SUBX},{S,U}[H]SUB{16,8,ADDX}: !Rd, !Rn, !Rm | ||
| 1510 | * SEL: !Rd, !Rn, !Rm | ||
| 1511 | * SMLA<x><y>,SMLA{D,W<y>},SMLSD,SMML{A,S}: !Rd, !Rn, !Rm, !Rs | ||
| 1512 | * SMLAL<x><y>,SMLA{D,LD},SMLSLD,SMMULL,SMULW<y>: !RdHi, !RdLo, !Rm, !Rs | ||
| 1513 | * SMMUL,SMUAD,SMUL<x><y>,SMUSD: !Rd, !Rm, !Rs | ||
| 1514 | * SSAT/16: !Rd, !Rm | ||
| 1515 | * STM(1/2): !Rn, register_list* (R15 in reg list not recommended) | ||
| 1516 | * STRT immediate pre/post-indexed: Rd*, !Rn | ||
| 1517 | * STRT register pre/post-indexed: Rd*, !Rn, !Rm | ||
| 1518 | * STRT scaled register pre/post-indexed: Rd*, !Rn, !Rm | ||
| 1519 | * STREX: !Rd, !Rn, !Rm | ||
| 1520 | * SWP/B: !Rd, !Rn, !Rm | ||
| 1521 | * {S,U}XTA{B,B16,H}: !Rd, !Rn, !Rm | ||
| 1522 | * {S,U}XT{B,B16,H}: !Rd, !Rm | ||
| 1523 | * UM{AA,LA,UL}L: !RdHi, !RdLo, !Rm, !Rs | ||
| 1524 | * USA{D8,A8,T,T16}: !Rd, !Rm, !Rs | ||
| 1525 | * | ||
| 1526 | * May transfer control by writing R15 (possible mode changes or alternate | ||
| 1527 | * mode accesses marked by "*"): | ||
| 1528 | * ALU op (* with s-bit), B, BL, BKPT, BLX(1/2), BX, BXJ, CPS*, CPY, | ||
| 1529 | * LDM(1), LDM(2/3)*, LDR, MOV, RFE*, SWI* | ||
| 1530 | * | ||
| 1531 | * Instructions that do not take general registers, nor transfer control: | ||
| 1532 | * CDP/2, SETEND, SRS* | ||
| 1533 | */ | ||
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c index 2ba7deb3072e..1656c87501c0 100644 --- a/arch/arm/kernel/kprobes.c +++ b/arch/arm/kernel/kprobes.c | |||
| @@ -134,7 +134,8 @@ static void __kprobes singlestep(struct kprobe *p, struct pt_regs *regs, | |||
| 134 | struct kprobe_ctlblk *kcb) | 134 | struct kprobe_ctlblk *kcb) |
| 135 | { | 135 | { |
| 136 | regs->ARM_pc += 4; | 136 | regs->ARM_pc += 4; |
| 137 | p->ainsn.insn_handler(p, regs); | 137 | if (p->ainsn.insn_check_cc(regs->ARM_cpsr)) |
| 138 | p->ainsn.insn_handler(p, regs); | ||
| 138 | } | 139 | } |
| 139 | 140 | ||
| 140 | /* | 141 | /* |
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 979da3947f42..139e3c827369 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
| @@ -746,7 +746,8 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs) | |||
| 746 | 746 | ||
| 747 | tail = (struct frame_tail __user *)regs->ARM_fp - 1; | 747 | tail = (struct frame_tail __user *)regs->ARM_fp - 1; |
| 748 | 748 | ||
| 749 | while (tail && !((unsigned long)tail & 0x3)) | 749 | while ((entry->nr < PERF_MAX_STACK_DEPTH) && |
| 750 | tail && !((unsigned long)tail & 0x3)) | ||
| 750 | tail = user_backtrace(tail, entry); | 751 | tail = user_backtrace(tail, entry); |
| 751 | } | 752 | } |
| 752 | 753 | ||
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 8fe05ad932e4..f29b8a29b174 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
| @@ -479,7 +479,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode, | |||
| 479 | { | 479 | { |
| 480 | } | 480 | } |
| 481 | 481 | ||
| 482 | static void broadcast_timer_setup(struct clock_event_device *evt) | 482 | static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) |
| 483 | { | 483 | { |
| 484 | evt->name = "dummy_timer"; | 484 | evt->name = "dummy_timer"; |
| 485 | evt->features = CLOCK_EVT_FEAT_ONESHOT | | 485 | evt->features = CLOCK_EVT_FEAT_ONESHOT | |
diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c index 4ad8da15ef2b..af0aaebf4de6 100644 --- a/arch/arm/kernel/sys_oabi-compat.c +++ b/arch/arm/kernel/sys_oabi-compat.c | |||
| @@ -311,7 +311,7 @@ asmlinkage long sys_oabi_semtimedop(int semid, | |||
| 311 | long err; | 311 | long err; |
| 312 | int i; | 312 | int i; |
| 313 | 313 | ||
| 314 | if (nsops < 1) | 314 | if (nsops < 1 || nsops > SEMOPM) |
| 315 | return -EINVAL; | 315 | return -EINVAL; |
| 316 | sops = kmalloc(sizeof(*sops) * nsops, GFP_KERNEL); | 316 | sops = kmalloc(sizeof(*sops) * nsops, GFP_KERNEL); |
| 317 | if (!sops) | 317 | if (!sops) |
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 32f147998cd9..c0deacae778d 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig | |||
| @@ -63,6 +63,7 @@ config MACH_DAVINCI_EVM | |||
| 63 | depends on ARCH_DAVINCI_DM644x | 63 | depends on ARCH_DAVINCI_DM644x |
| 64 | select MISC_DEVICES | 64 | select MISC_DEVICES |
| 65 | select EEPROM_AT24 | 65 | select EEPROM_AT24 |
| 66 | select I2C | ||
| 66 | help | 67 | help |
| 67 | Configure this option to specify the whether the board used | 68 | Configure this option to specify the whether the board used |
| 68 | for development is a DM644x EVM | 69 | for development is a DM644x EVM |
| @@ -72,6 +73,7 @@ config MACH_SFFSDR | |||
| 72 | depends on ARCH_DAVINCI_DM644x | 73 | depends on ARCH_DAVINCI_DM644x |
| 73 | select MISC_DEVICES | 74 | select MISC_DEVICES |
| 74 | select EEPROM_AT24 | 75 | select EEPROM_AT24 |
| 76 | select I2C | ||
| 75 | help | 77 | help |
| 76 | Say Y here to select the Lyrtech Small Form Factor | 78 | Say Y here to select the Lyrtech Small Form Factor |
| 77 | Software Defined Radio (SFFSDR) board. | 79 | Software Defined Radio (SFFSDR) board. |
| @@ -105,6 +107,7 @@ config MACH_DAVINCI_DM6467_EVM | |||
| 105 | select MACH_DAVINCI_DM6467TEVM | 107 | select MACH_DAVINCI_DM6467TEVM |
| 106 | select MISC_DEVICES | 108 | select MISC_DEVICES |
| 107 | select EEPROM_AT24 | 109 | select EEPROM_AT24 |
| 110 | select I2C | ||
| 108 | help | 111 | help |
| 109 | Configure this option to specify the whether the board used | 112 | Configure this option to specify the whether the board used |
| 110 | for development is a DM6467 EVM | 113 | for development is a DM6467 EVM |
| @@ -118,6 +121,7 @@ config MACH_DAVINCI_DM365_EVM | |||
| 118 | depends on ARCH_DAVINCI_DM365 | 121 | depends on ARCH_DAVINCI_DM365 |
| 119 | select MISC_DEVICES | 122 | select MISC_DEVICES |
| 120 | select EEPROM_AT24 | 123 | select EEPROM_AT24 |
| 124 | select I2C | ||
| 121 | help | 125 | help |
| 122 | Configure this option to specify whether the board used | 126 | Configure this option to specify whether the board used |
| 123 | for development is a DM365 EVM | 127 | for development is a DM365 EVM |
| @@ -129,6 +133,7 @@ config MACH_DAVINCI_DA830_EVM | |||
| 129 | select GPIO_PCF857X | 133 | select GPIO_PCF857X |
| 130 | select MISC_DEVICES | 134 | select MISC_DEVICES |
| 131 | select EEPROM_AT24 | 135 | select EEPROM_AT24 |
| 136 | select I2C | ||
| 132 | help | 137 | help |
| 133 | Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module. | 138 | Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module. |
| 134 | 139 | ||
| @@ -205,6 +210,7 @@ config MACH_MITYOMAPL138 | |||
| 205 | depends on ARCH_DAVINCI_DA850 | 210 | depends on ARCH_DAVINCI_DA850 |
| 206 | select MISC_DEVICES | 211 | select MISC_DEVICES |
| 207 | select EEPROM_AT24 | 212 | select EEPROM_AT24 |
| 213 | select I2C | ||
| 208 | help | 214 | help |
| 209 | Say Y here to select the Critical Link MityDSP-L138/MityARM-1808 | 215 | Say Y here to select the Critical Link MityDSP-L138/MityARM-1808 |
| 210 | System on Module. Information on this SoM may be found at | 216 | System on Module. Information on this SoM may be found at |
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 2aa79c54f98e..606a6f27ed6c 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #include <mach/mux.h> | 29 | #include <mach/mux.h> |
| 30 | #include <mach/spi.h> | 30 | #include <mach/spi.h> |
| 31 | 31 | ||
| 32 | #define MITYOMAPL138_PHY_ID "0:03" | 32 | #define MITYOMAPL138_PHY_ID "" |
| 33 | 33 | ||
| 34 | #define FACTORY_CONFIG_MAGIC 0x012C0138 | 34 | #define FACTORY_CONFIG_MAGIC 0x012C0138 |
| 35 | #define FACTORY_CONFIG_VERSION 0x00010001 | 35 | #define FACTORY_CONFIG_VERSION 0x00010001 |
| @@ -414,7 +414,7 @@ static struct resource mityomapl138_nandflash_resource[] = { | |||
| 414 | 414 | ||
| 415 | static struct platform_device mityomapl138_nandflash_device = { | 415 | static struct platform_device mityomapl138_nandflash_device = { |
| 416 | .name = "davinci_nand", | 416 | .name = "davinci_nand", |
| 417 | .id = 0, | 417 | .id = 1, |
| 418 | .dev = { | 418 | .dev = { |
| 419 | .platform_data = &mityomapl138_nandflash_data, | 419 | .platform_data = &mityomapl138_nandflash_data, |
| 420 | }, | 420 | }, |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 625d4b66718b..58a02dc7b15a 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
| @@ -39,7 +39,8 @@ | |||
| 39 | #define DA8XX_GPIO_BASE 0x01e26000 | 39 | #define DA8XX_GPIO_BASE 0x01e26000 |
| 40 | #define DA8XX_I2C1_BASE 0x01e28000 | 40 | #define DA8XX_I2C1_BASE 0x01e28000 |
| 41 | #define DA8XX_SPI0_BASE 0x01c41000 | 41 | #define DA8XX_SPI0_BASE 0x01c41000 |
| 42 | #define DA8XX_SPI1_BASE 0x01f0e000 | 42 | #define DA830_SPI1_BASE 0x01e12000 |
| 43 | #define DA850_SPI1_BASE 0x01f0e000 | ||
| 43 | 44 | ||
| 44 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | 45 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
| 45 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | 46 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
| @@ -762,8 +763,8 @@ static struct resource da8xx_spi0_resources[] = { | |||
| 762 | 763 | ||
| 763 | static struct resource da8xx_spi1_resources[] = { | 764 | static struct resource da8xx_spi1_resources[] = { |
| 764 | [0] = { | 765 | [0] = { |
| 765 | .start = DA8XX_SPI1_BASE, | 766 | .start = DA830_SPI1_BASE, |
| 766 | .end = DA8XX_SPI1_BASE + SZ_4K - 1, | 767 | .end = DA830_SPI1_BASE + SZ_4K - 1, |
| 767 | .flags = IORESOURCE_MEM, | 768 | .flags = IORESOURCE_MEM, |
| 768 | }, | 769 | }, |
| 769 | [1] = { | 770 | [1] = { |
| @@ -832,5 +833,10 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info, | |||
| 832 | 833 | ||
| 833 | da8xx_spi_pdata[instance].num_chipselect = len; | 834 | da8xx_spi_pdata[instance].num_chipselect = len; |
| 834 | 835 | ||
| 836 | if (instance == 1 && cpu_is_davinci_da850()) { | ||
| 837 | da8xx_spi1_resources[0].start = DA850_SPI1_BASE; | ||
| 838 | da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1; | ||
| 839 | } | ||
| 840 | |||
| 835 | return platform_device_register(&da8xx_spi_device[instance]); | 841 | return platform_device_register(&da8xx_spi_device[instance]); |
| 836 | } | 842 | } |
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index 9f1befc5ac38..f8b7ea4f6235 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S | |||
| @@ -24,6 +24,9 @@ | |||
| 24 | 24 | ||
| 25 | #define UART_SHIFT 2 | 25 | #define UART_SHIFT 2 |
| 26 | 26 | ||
| 27 | #define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) | ||
| 28 | #define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) | ||
| 29 | |||
| 27 | .pushsection .data | 30 | .pushsection .data |
| 28 | davinci_uart_phys: .word 0 | 31 | davinci_uart_phys: .word 0 |
| 29 | davinci_uart_virt: .word 0 | 32 | davinci_uart_virt: .word 0 |
| @@ -34,7 +37,7 @@ davinci_uart_virt: .word 0 | |||
| 34 | /* Use davinci_uart_phys/virt if already configured */ | 37 | /* Use davinci_uart_phys/virt if already configured */ |
| 35 | 10: mrc p15, 0, \rp, c1, c0 | 38 | 10: mrc p15, 0, \rp, c1, c0 |
| 36 | tst \rp, #1 @ MMU enabled? | 39 | tst \rp, #1 @ MMU enabled? |
| 37 | ldreq \rp, =__virt_to_phys(davinci_uart_phys) | 40 | ldreq \rp, =davinci_uart_v2p(davinci_uart_phys) |
| 38 | ldrne \rp, =davinci_uart_phys | 41 | ldrne \rp, =davinci_uart_phys |
| 39 | add \rv, \rp, #4 @ davinci_uart_virt | 42 | add \rv, \rp, #4 @ davinci_uart_virt |
| 40 | ldr \rp, [\rp, #0] | 43 | ldr \rp, [\rp, #0] |
| @@ -48,18 +51,18 @@ davinci_uart_virt: .word 0 | |||
| 48 | tst \rp, #1 @ MMU enabled? | 51 | tst \rp, #1 @ MMU enabled? |
| 49 | 52 | ||
| 50 | /* Copy uart phys address from decompressor uart info */ | 53 | /* Copy uart phys address from decompressor uart info */ |
| 51 | ldreq \rv, =__virt_to_phys(davinci_uart_phys) | 54 | ldreq \rv, =davinci_uart_v2p(davinci_uart_phys) |
| 52 | ldrne \rv, =davinci_uart_phys | 55 | ldrne \rv, =davinci_uart_phys |
| 53 | ldreq \rp, =DAVINCI_UART_INFO | 56 | ldreq \rp, =DAVINCI_UART_INFO |
| 54 | ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO) | 57 | ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) |
| 55 | ldr \rp, [\rp, #0] | 58 | ldr \rp, [\rp, #0] |
| 56 | str \rp, [\rv] | 59 | str \rp, [\rv] |
| 57 | 60 | ||
| 58 | /* Copy uart virt address from decompressor uart info */ | 61 | /* Copy uart virt address from decompressor uart info */ |
| 59 | ldreq \rv, =__virt_to_phys(davinci_uart_virt) | 62 | ldreq \rv, =davinci_uart_v2p(davinci_uart_virt) |
| 60 | ldrne \rv, =davinci_uart_virt | 63 | ldrne \rv, =davinci_uart_virt |
| 61 | ldreq \rp, =DAVINCI_UART_INFO | 64 | ldreq \rp, =DAVINCI_UART_INFO |
| 62 | ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO) | 65 | ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) |
| 63 | ldr \rp, [\rp, #4] | 66 | ldr \rp, [\rp, #4] |
| 64 | str \rp, [\rv] | 67 | str \rp, [\rv] |
| 65 | 68 | ||
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index 8051110b8ac3..c9e6ce185a66 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | * | 22 | * |
| 23 | * This area sits just below the page tables (see arch/arm/kernel/head.S). | 23 | * This area sits just below the page tables (see arch/arm/kernel/head.S). |
| 24 | */ | 24 | */ |
| 25 | #define DAVINCI_UART_INFO (PHYS_OFFSET + 0x3ff8) | 25 | #define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8) |
| 26 | 26 | ||
| 27 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) | 27 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
| 28 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) | 28 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
diff --git a/arch/arm/mach-mx3/mach-vpr200.c b/arch/arm/mach-mx3/mach-vpr200.c index 2cf390fbd980..47a69cbc31a8 100644 --- a/arch/arm/mach-mx3/mach-vpr200.c +++ b/arch/arm/mach-mx3/mach-vpr200.c | |||
| @@ -257,11 +257,16 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |||
| 257 | .workaround = FLS_USB2_WORKAROUND_ENGCM09152, | 257 | .workaround = FLS_USB2_WORKAROUND_ENGCM09152, |
| 258 | }; | 258 | }; |
| 259 | 259 | ||
| 260 | static int vpr200_usbh_init(struct platform_device *pdev) | ||
| 261 | { | ||
| 262 | return mx35_initialize_usb_hw(pdev->id, | ||
| 263 | MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY); | ||
| 264 | } | ||
| 265 | |||
| 260 | /* USB HOST config */ | 266 | /* USB HOST config */ |
| 261 | static const struct mxc_usbh_platform_data usb_host_pdata __initconst = { | 267 | static const struct mxc_usbh_platform_data usb_host_pdata __initconst = { |
| 262 | .portsc = MXC_EHCI_MODE_SERIAL, | 268 | .init = vpr200_usbh_init, |
| 263 | .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | | 269 | .portsc = MXC_EHCI_MODE_SERIAL, |
| 264 | MXC_EHCI_INTERNAL_PHY, | ||
| 265 | }; | 270 | }; |
| 266 | 271 | ||
| 267 | static struct platform_device *devices[] __initdata = { | 272 | static struct platform_device *devices[] __initdata = { |
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 10a1bea10548..6206b1191fe8 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c | |||
| @@ -193,7 +193,7 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { | |||
| 193 | .wakeup = wake, \ | 193 | .wakeup = wake, \ |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | static const struct gpio_keys_button loco_buttons[] __initconst = { | 196 | static struct gpio_keys_button loco_buttons[] = { |
| 197 | GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0), | 197 | GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0), |
| 198 | GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0), | 198 | GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0), |
| 199 | GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0), | 199 | GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0), |
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 1ad97fed1e94..5dcc59d5b9ec 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c | |||
| @@ -295,11 +295,11 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ | |||
| 295 | unsigned long diff, parent_rate, calc_rate; \ | 295 | unsigned long diff, parent_rate, calc_rate; \ |
| 296 | int i; \ | 296 | int i; \ |
| 297 | \ | 297 | \ |
| 298 | parent_rate = clk_get_rate(clk->parent); \ | ||
| 299 | div_max = BM_CLKCTRL_##dr##_DIV >> BP_CLKCTRL_##dr##_DIV; \ | 298 | div_max = BM_CLKCTRL_##dr##_DIV >> BP_CLKCTRL_##dr##_DIV; \ |
| 300 | bm_busy = BM_CLKCTRL_##dr##_BUSY; \ | 299 | bm_busy = BM_CLKCTRL_##dr##_BUSY; \ |
| 301 | \ | 300 | \ |
| 302 | if (clk->parent == &ref_xtal_clk) { \ | 301 | if (clk->parent == &ref_xtal_clk) { \ |
| 302 | parent_rate = clk_get_rate(clk->parent); \ | ||
| 303 | div = DIV_ROUND_UP(parent_rate, rate); \ | 303 | div = DIV_ROUND_UP(parent_rate, rate); \ |
| 304 | if (clk == &cpu_clk) { \ | 304 | if (clk == &cpu_clk) { \ |
| 305 | div_max = BM_CLKCTRL_CPU_DIV_XTAL >> \ | 305 | div_max = BM_CLKCTRL_CPU_DIV_XTAL >> \ |
| @@ -309,6 +309,11 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ | |||
| 309 | if (div == 0 || div > div_max) \ | 309 | if (div == 0 || div > div_max) \ |
| 310 | return -EINVAL; \ | 310 | return -EINVAL; \ |
| 311 | } else { \ | 311 | } else { \ |
| 312 | /* \ | ||
| 313 | * hack alert: this block modifies clk->parent, too, \ | ||
| 314 | * so the base to use it the grand parent. \ | ||
| 315 | */ \ | ||
| 316 | parent_rate = clk_get_rate(clk->parent->parent); \ | ||
| 312 | rate >>= PARENT_RATE_SHIFT; \ | 317 | rate >>= PARENT_RATE_SHIFT; \ |
| 313 | parent_rate >>= PARENT_RATE_SHIFT; \ | 318 | parent_rate >>= PARENT_RATE_SHIFT; \ |
| 314 | diff = parent_rate; \ | 319 | diff = parent_rate; \ |
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index 6de0ad0eea65..9cdcca597924 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
| @@ -711,7 +711,7 @@ static struct regulator_consumer_supply bq24022_consumers[] = { | |||
| 711 | static struct regulator_init_data bq24022_init_data = { | 711 | static struct regulator_init_data bq24022_init_data = { |
| 712 | .constraints = { | 712 | .constraints = { |
| 713 | .max_uA = 500000, | 713 | .max_uA = 500000, |
| 714 | .valid_ops_mask = REGULATOR_CHANGE_CURRENT, | 714 | .valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS, |
| 715 | }, | 715 | }, |
| 716 | .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), | 716 | .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), |
| 717 | .consumer_supplies = bq24022_consumers, | 717 | .consumer_supplies = bq24022_consumers, |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index a72993dde2b3..9984ef70bd79 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
| @@ -599,7 +599,7 @@ static struct regulator_consumer_supply bq24022_consumers[] = { | |||
| 599 | static struct regulator_init_data bq24022_init_data = { | 599 | static struct regulator_init_data bq24022_init_data = { |
| 600 | .constraints = { | 600 | .constraints = { |
| 601 | .max_uA = 500000, | 601 | .max_uA = 500000, |
| 602 | .valid_ops_mask = REGULATOR_CHANGE_CURRENT, | 602 | .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS, |
| 603 | }, | 603 | }, |
| 604 | .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), | 604 | .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers), |
| 605 | .consumer_supplies = bq24022_consumers, | 605 | .consumer_supplies = bq24022_consumers, |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index ce233bcbf506..42af97664c9d 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
| @@ -395,7 +395,7 @@ ENTRY(xscale_dma_a0_map_area) | |||
| 395 | teq r2, #DMA_TO_DEVICE | 395 | teq r2, #DMA_TO_DEVICE |
| 396 | beq xscale_dma_clean_range | 396 | beq xscale_dma_clean_range |
| 397 | b xscale_dma_flush_range | 397 | b xscale_dma_flush_range |
| 398 | ENDPROC(xscsale_dma_a0_map_area) | 398 | ENDPROC(xscale_dma_a0_map_area) |
| 399 | 399 | ||
| 400 | /* | 400 | /* |
| 401 | * dma_unmap_area(start, size, dir) | 401 | * dma_unmap_area(start, size, dir) |
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 7a107246fd98..6cd6d7f686f6 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
| @@ -295,6 +295,12 @@ static int mxc_gpio_direction_output(struct gpio_chip *chip, | |||
| 295 | return 0; | 295 | return 0; |
| 296 | } | 296 | } |
| 297 | 297 | ||
| 298 | /* | ||
| 299 | * This lock class tells lockdep that GPIO irqs are in a different | ||
| 300 | * category than their parents, so it won't report false recursion. | ||
| 301 | */ | ||
| 302 | static struct lock_class_key gpio_lock_class; | ||
| 303 | |||
| 298 | int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | 304 | int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) |
| 299 | { | 305 | { |
| 300 | int i, j; | 306 | int i, j; |
| @@ -311,6 +317,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | |||
| 311 | __raw_writel(~0, port[i].base + GPIO_ISR); | 317 | __raw_writel(~0, port[i].base + GPIO_ISR); |
| 312 | for (j = port[i].virtual_irq_start; | 318 | for (j = port[i].virtual_irq_start; |
| 313 | j < port[i].virtual_irq_start + 32; j++) { | 319 | j < port[i].virtual_irq_start + 32; j++) { |
| 320 | irq_set_lockdep_class(j, &gpio_lock_class); | ||
| 314 | irq_set_chip_and_handler(j, &gpio_irq_chip, | 321 | irq_set_chip_and_handler(j, &gpio_irq_chip, |
| 315 | handle_level_irq); | 322 | handle_level_irq); |
| 316 | set_irq_flags(j, IRQF_VALID); | 323 | set_irq_flags(j, IRQF_VALID); |
diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S index 4ddce565b353..8397a2dd19f2 100644 --- a/arch/arm/plat-mxc/ssi-fiq.S +++ b/arch/arm/plat-mxc/ssi-fiq.S | |||
| @@ -124,6 +124,8 @@ imx_ssi_fiq_start: | |||
| 124 | 1: | 124 | 1: |
| 125 | @ return from FIQ | 125 | @ return from FIQ |
| 126 | subs pc, lr, #4 | 126 | subs pc, lr, #4 |
| 127 | |||
| 128 | .align | ||
| 127 | imx_ssi_fiq_base: | 129 | imx_ssi_fiq_base: |
| 128 | .word 0x0 | 130 | .word 0x0 |
| 129 | imx_ssi_fiq_rx_buffer: | 131 | imx_ssi_fiq_rx_buffer: |
diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c index 0fc0a79852de..6db161f64ae0 100644 --- a/drivers/clk/clkdev.c +++ b/drivers/clk/clkdev.c | |||
| @@ -32,10 +32,9 @@ static DEFINE_MUTEX(clocks_mutex); | |||
| 32 | * Then we take the most specific entry - with the following | 32 | * Then we take the most specific entry - with the following |
| 33 | * order of precedence: dev+con > dev only > con only. | 33 | * order of precedence: dev+con > dev only > con only. |
| 34 | */ | 34 | */ |
| 35 | static struct clk *clk_find(const char *dev_id, const char *con_id) | 35 | static struct clk_lookup *clk_find(const char *dev_id, const char *con_id) |
| 36 | { | 36 | { |
| 37 | struct clk_lookup *p; | 37 | struct clk_lookup *p, *cl = NULL; |
| 38 | struct clk *clk = NULL; | ||
| 39 | int match, best = 0; | 38 | int match, best = 0; |
| 40 | 39 | ||
| 41 | list_for_each_entry(p, &clocks, node) { | 40 | list_for_each_entry(p, &clocks, node) { |
| @@ -52,27 +51,27 @@ static struct clk *clk_find(const char *dev_id, const char *con_id) | |||
| 52 | } | 51 | } |
| 53 | 52 | ||
| 54 | if (match > best) { | 53 | if (match > best) { |
| 55 | clk = p->clk; | 54 | cl = p; |
| 56 | if (match != 3) | 55 | if (match != 3) |
| 57 | best = match; | 56 | best = match; |
| 58 | else | 57 | else |
| 59 | break; | 58 | break; |
| 60 | } | 59 | } |
| 61 | } | 60 | } |
| 62 | return clk; | 61 | return cl; |
| 63 | } | 62 | } |
| 64 | 63 | ||
| 65 | struct clk *clk_get_sys(const char *dev_id, const char *con_id) | 64 | struct clk *clk_get_sys(const char *dev_id, const char *con_id) |
| 66 | { | 65 | { |
| 67 | struct clk *clk; | 66 | struct clk_lookup *cl; |
| 68 | 67 | ||
| 69 | mutex_lock(&clocks_mutex); | 68 | mutex_lock(&clocks_mutex); |
| 70 | clk = clk_find(dev_id, con_id); | 69 | cl = clk_find(dev_id, con_id); |
| 71 | if (clk && !__clk_get(clk)) | 70 | if (cl && !__clk_get(cl->clk)) |
| 72 | clk = NULL; | 71 | cl = NULL; |
| 73 | mutex_unlock(&clocks_mutex); | 72 | mutex_unlock(&clocks_mutex); |
| 74 | 73 | ||
| 75 | return clk ? clk : ERR_PTR(-ENOENT); | 74 | return cl ? cl->clk : ERR_PTR(-ENOENT); |
| 76 | } | 75 | } |
| 77 | EXPORT_SYMBOL(clk_get_sys); | 76 | EXPORT_SYMBOL(clk_get_sys); |
| 78 | 77 | ||
