4 files changed, 7 insertions, 6 deletions

diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c
index f007aaf1426b..9afc2ea400dc 100644
--- a/arch/frv/kernel/irq-mb93091.c
+++ b/arch/frv/kernel/irq-mb93091.c
@@ -146,9 +146,9 @@ void __init fpga_init(void)
         __clr_IFR(0x0000);
 
         for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++)
-                set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
+                irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
 
-        set_irq_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
+        irq_set_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
 
         /* the FPGA drives the first four external IRQ inputs on the CPU PIC */
         setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]);
diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c
index c7027fba6c04..4d4ad09d3c91 100644
--- a/arch/frv/kernel/irq-mb93093.c
+++ b/arch/frv/kernel/irq-mb93093.c
@@ -124,7 +124,7 @@ void __init fpga_init(void)
         __clr_IFR(0x0000);
 
         for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
-                set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);
+                irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);
 
         /* the FPGA drives external IRQ input #2 on the CPU PIC */
         setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
diff --git a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c
index 4800f2402ecb..4d034c7840c9 100644
--- a/arch/frv/kernel/irq-mb93493.c
+++ b/arch/frv/kernel/irq-mb93493.c
@@ -139,7 +139,8 @@ void __init mb93493_init(void)
         int irq;
 
         for (irq = IRQ_BASE_MB93493 + 0; irq <= IRQ_BASE_MB93493 + 10; irq++)
-                set_irq_chip_and_handler(irq, &frv_mb93493_pic, handle_edge_irq);
+                irq_set_chip_and_handler(irq, &frv_mb93493_pic,
+                                         handle_edge_irq);
 
         /* the MB93493 drives external IRQ inputs on the CPU PIC */
         setup_irq(IRQ_CPU_MB93493_0, &mb93493_irq[0]);
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index d2365a7d7c57..a5631e940a00 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -156,10 +156,10 @@ void __init init_IRQ(void)
         int level;
 
         for (level = 1; level <= 14; level++)
-                set_irq_chip_and_handler(level, &frv_cpu_pic,
+                irq_set_chip_and_handler(level, &frv_cpu_pic,
                                          handle_level_irq);
 
-        set_irq_handler(IRQ_CPU_TIMER0, handle_edge_irq);
+        irq_set_handler(IRQ_CPU_TIMER0, handle_edge_irq);
 
         /* set the trigger levels for internal interrupt sources
          * - timers all falling-edge