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-rw-r--r--drivers/video/omap2/dss/dss_features.c20
-rw-r--r--drivers/video/omap2/dss/dss_features.h7
-rw-r--r--drivers/video/omap2/dss/hdmi.c19
-rw-r--r--drivers/video/omap2/dss/ti_hdmi.h21
4 files changed, 58 insertions, 9 deletions
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index b63c5f8d9151..86706123a247 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -429,6 +429,26 @@ static const struct omap_dss_features omap4_dss_features = {
429 .burst_size_unit = 16, 429 .burst_size_unit = 16,
430}; 430};
431 431
432#if defined(CONFIG_OMAP4_DSS_HDMI)
433/* HDMI OMAP4 Functions*/
434static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
435
436 .video_configure = ti_hdmi_4xxx_basic_configure,
437 .phy_enable = ti_hdmi_4xxx_phy_enable,
438 .phy_disable = ti_hdmi_4xxx_phy_disable,
439 .read_edid = ti_hdmi_4xxx_read_edid,
440 .pll_enable = ti_hdmi_4xxx_pll_enable,
441 .pll_disable = ti_hdmi_4xxx_pll_disable,
442 .video_enable = ti_hdmi_4xxx_wp_video_start,
443};
444
445void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data)
446{
447 if (cpu_is_omap44xx())
448 ip_data->ops = &omap4_hdmi_functions;
449}
450#endif
451
432/* Functions returning values related to a DSS feature */ 452/* Functions returning values related to a DSS feature */
433int dss_feat_get_num_mgrs(void) 453int dss_feat_get_num_mgrs(void)
434{ 454{
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index 4271e9661c90..c4321908f322 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -20,6 +20,10 @@
20#ifndef __OMAP2_DSS_FEATURES_H 20#ifndef __OMAP2_DSS_FEATURES_H
21#define __OMAP2_DSS_FEATURES_H 21#define __OMAP2_DSS_FEATURES_H
22 22
23#if defined(CONFIG_OMAP4_DSS_HDMI)
24#include "ti_hdmi.h"
25#endif
26
23#define MAX_DSS_MANAGERS 3 27#define MAX_DSS_MANAGERS 3
24#define MAX_DSS_OVERLAYS 3 28#define MAX_DSS_OVERLAYS 3
25#define MAX_DSS_LCD_MANAGERS 2 29#define MAX_DSS_LCD_MANAGERS 2
@@ -99,4 +103,7 @@ u32 dss_feat_get_burst_size_unit(void); /* in bytes */
99bool dss_has_feature(enum dss_feat_id id); 103bool dss_has_feature(enum dss_feat_id id);
100void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); 104void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
101void dss_features_init(void); 105void dss_features_init(void);
106#if defined(CONFIG_OMAP4_DSS_HDMI)
107void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data);
108#endif
102#endif 109#endif
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 5afc51bc6184..8cef940b5010 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -186,6 +186,7 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
186{ 186{
187 DSSDBG("init_display\n"); 187 DSSDBG("init_display\n");
188 188
189 dss_init_hdmi_ip_ops(&hdmi.ip_data);
189 return 0; 190 return 0;
190} 191}
191 192
@@ -366,7 +367,7 @@ static void hdmi_read_edid(struct omap_video_timings *dp)
366 memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH); 367 memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH);
367 368
368 if (!hdmi.edid_set) 369 if (!hdmi.edid_set)
369 ret = ti_hdmi_4xxx_read_edid(&hdmi.ip_data, hdmi.edid, 370 ret = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, hdmi.edid,
370 HDMI_EDID_MAX_LENGTH); 371 HDMI_EDID_MAX_LENGTH);
371 if (!ret) { 372 if (!ret) {
372 if (!memcmp(hdmi.edid, edid_header, sizeof(edid_header))) { 373 if (!memcmp(hdmi.edid, edid_header, sizeof(edid_header))) {
@@ -480,16 +481,16 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
480 481
481 hdmi_compute_pll(dssdev, phy, &hdmi.ip_data.pll_data); 482 hdmi_compute_pll(dssdev, phy, &hdmi.ip_data.pll_data);
482 483
483 ti_hdmi_4xxx_wp_video_start(&hdmi.ip_data, 0); 484 hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 0);
484 485
485 /* config the PLL and PHY hdmi_set_pll_pwrfirst */ 486 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
486 r = ti_hdmi_4xxx_pll_enable(&hdmi.ip_data); 487 r = hdmi.ip_data.ops->pll_enable(&hdmi.ip_data);
487 if (r) { 488 if (r) {
488 DSSDBG("Failed to lock PLL\n"); 489 DSSDBG("Failed to lock PLL\n");
489 goto err; 490 goto err;
490 } 491 }
491 492
492 r = ti_hdmi_4xxx_phy_enable(&hdmi.ip_data); 493 r = hdmi.ip_data.ops->phy_enable(&hdmi.ip_data);
493 if (r) { 494 if (r) {
494 DSSDBG("Failed to start PHY\n"); 495 DSSDBG("Failed to start PHY\n");
495 goto err; 496 goto err;
@@ -497,7 +498,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
497 498
498 hdmi.ip_data.cfg.cm.mode = hdmi.mode; 499 hdmi.ip_data.cfg.cm.mode = hdmi.mode;
499 hdmi.ip_data.cfg.cm.code = hdmi.code; 500 hdmi.ip_data.cfg.cm.code = hdmi.code;
500 ti_hdmi_4xxx_basic_configure(&hdmi.ip_data); 501 hdmi.ip_data.ops->video_configure(&hdmi.ip_data);
501 502
502 /* Make selection of HDMI in DSS */ 503 /* Make selection of HDMI in DSS */
503 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); 504 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
@@ -519,7 +520,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
519 520
520 dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 1); 521 dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 1);
521 522
522 ti_hdmi_4xxx_wp_video_start(&hdmi.ip_data, 1); 523 hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 1);
523 524
524 return 0; 525 return 0;
525err: 526err:
@@ -531,9 +532,9 @@ static void hdmi_power_off(struct omap_dss_device *dssdev)
531{ 532{
532 dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 0); 533 dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 0);
533 534
534 ti_hdmi_4xxx_wp_video_start(&hdmi.ip_data, 0); 535 hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 0);
535 ti_hdmi_4xxx_phy_disable(&hdmi.ip_data); 536 hdmi.ip_data.ops->phy_disable(&hdmi.ip_data);
536 ti_hdmi_4xxx_pll_disable(&hdmi.ip_data); 537 hdmi.ip_data.ops->pll_disable(&hdmi.ip_data);
537 hdmi_runtime_put(); 538 hdmi_runtime_put();
538 539
539 hdmi.edid_set = 0; 540 hdmi.edid_set = 0;
diff --git a/drivers/video/omap2/dss/ti_hdmi.h b/drivers/video/omap2/dss/ti_hdmi.h
index 823fbe655b80..acf102267700 100644
--- a/drivers/video/omap2/dss/ti_hdmi.h
+++ b/drivers/video/omap2/dss/ti_hdmi.h
@@ -21,6 +21,8 @@
21#ifndef _TI_HDMI_H 21#ifndef _TI_HDMI_H
22#define _TI_HDMI_H 22#define _TI_HDMI_H
23 23
24struct hdmi_ip_data;
25
24enum hdmi_pll_pwr { 26enum hdmi_pll_pwr {
25 HDMI_PLLPWRCMD_ALLOFF = 0, 27 HDMI_PLLPWRCMD_ALLOFF = 0,
26 HDMI_PLLPWRCMD_PLLONLY = 1, 28 HDMI_PLLPWRCMD_PLLONLY = 1,
@@ -82,12 +84,31 @@ struct hdmi_pll_info {
82 enum hdmi_clk_refsel refsel; 84 enum hdmi_clk_refsel refsel;
83}; 85};
84 86
87struct ti_hdmi_ip_ops {
88
89 void (*video_configure)(struct hdmi_ip_data *ip_data);
90
91 int (*phy_enable)(struct hdmi_ip_data *ip_data);
92
93 void (*phy_disable)(struct hdmi_ip_data *ip_data);
94
95 int (*read_edid)(struct hdmi_ip_data *ip_data,
96 u8 *pedid, u16 max_length);
97
98 int (*pll_enable)(struct hdmi_ip_data *ip_data);
99
100 void (*pll_disable)(struct hdmi_ip_data *ip_data);
101
102 void (*video_enable)(struct hdmi_ip_data *ip_data, bool start);
103};
104
85struct hdmi_ip_data { 105struct hdmi_ip_data {
86 void __iomem *base_wp; /* HDMI wrapper */ 106 void __iomem *base_wp; /* HDMI wrapper */
87 unsigned long core_sys_offset; 107 unsigned long core_sys_offset;
88 unsigned long core_av_offset; 108 unsigned long core_av_offset;
89 unsigned long pll_offset; 109 unsigned long pll_offset;
90 unsigned long phy_offset; 110 unsigned long phy_offset;
111 const struct ti_hdmi_ip_ops *ops;
91 struct hdmi_config cfg; 112 struct hdmi_config cfg;
92 struct hdmi_pll_info pll_data; 113 struct hdmi_pll_info pll_data;
93}; 114};