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-rw-r--r--Documentation/devicetree/bindings/crypto/fsl-sec4.txt12
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/guts.txt13
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/pamu.txt140
-rw-r--r--Documentation/lockstat.txt2
-rw-r--r--Documentation/powerpc/cpu_features.txt10
-rw-r--r--Documentation/powerpc/transactional_memory.txt175
-rw-r--r--Documentation/x86/early-microcode.txt43
-rw-r--r--arch/blackfin/include/asm/mem_init.h2
-rw-r--r--arch/blackfin/include/asm/uaccess.h1
-rw-r--r--arch/blackfin/kernel/dma-mapping.c23
-rw-r--r--arch/blackfin/kernel/time-ts.c6
-rw-r--r--arch/blackfin/mach-common/ints-priority.c4
-rw-r--r--arch/parisc/Kconfig21
-rw-r--r--arch/parisc/Makefile13
-rw-r--r--arch/parisc/hpux/fs.c3
-rw-r--r--arch/parisc/include/asm/cacheflush.h2
-rw-r--r--arch/parisc/include/asm/compat.h61
-rw-r--r--arch/parisc/include/asm/compat_rt_sigframe.h50
-rw-r--r--arch/parisc/include/asm/elf.h2
-rw-r--r--arch/parisc/include/asm/floppy.h4
-rw-r--r--arch/parisc/include/asm/mmzone.h7
-rw-r--r--arch/parisc/include/asm/page.h20
-rw-r--r--arch/parisc/include/asm/pgtable.h13
-rw-r--r--arch/parisc/include/asm/signal.h4
-rw-r--r--arch/parisc/include/asm/unistd.h2
-rw-r--r--arch/parisc/include/uapi/asm/unistd.h6
-rw-r--r--arch/parisc/kernel/cache.c221
-rw-r--r--arch/parisc/kernel/entry.S4
-rw-r--r--arch/parisc/kernel/inventory.c2
-rw-r--r--arch/parisc/kernel/irq.c4
-rw-r--r--arch/parisc/kernel/pacache.S335
-rw-r--r--arch/parisc/kernel/parisc_ksyms.c5
-rw-r--r--arch/parisc/kernel/signal.c2
-rw-r--r--arch/parisc/kernel/signal32.c15
-rw-r--r--arch/parisc/kernel/sys_parisc.c16
-rw-r--r--arch/parisc/kernel/sys_parisc32.c122
-rw-r--r--arch/parisc/kernel/syscall.S5
-rw-r--r--arch/parisc/kernel/syscall_table.S27
-rw-r--r--arch/parisc/mm/fault.c30
-rw-r--r--arch/powerpc/Kconfig13
-rw-r--r--arch/powerpc/Makefile22
-rw-r--r--arch/powerpc/boot/dts/a3m071.dts6
-rw-r--r--arch/powerpc/boot/dts/a4m072.dts27
-rw-r--r--arch/powerpc/boot/dts/bluestone.dts8
-rw-r--r--arch/powerpc/boot/dts/bsc9131rdb.dtsi2
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts6
-rw-r--r--arch/powerpc/boot/dts/digsy_mtc.dts14
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-post.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-post.dtsi6
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi87
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi87
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi74
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi92
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi92
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi1
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts23
-rw-r--r--arch/powerpc/boot/dts/media5200.dts6
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts26
-rw-r--r--arch/powerpc/boot/dts/mpc5121.dtsi410
-rw-r--r--arch/powerpc/boot/dts/mpc5121ads.dts319
-rw-r--r--arch/powerpc/boot/dts/mpc5200b.dtsi25
-rw-r--r--arch/powerpc/boot/dts/mucmc52.dts48
-rw-r--r--arch/powerpc/boot/dts/o2d.dtsi27
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts48
-rw-r--r--arch/powerpc/boot/dts/pcm032.dts45
-rw-r--r--arch/powerpc/boot/dts/pdm360ng.dts273
-rw-r--r--arch/powerpc/boot/dts/ppa8548.dts166
-rw-r--r--arch/powerpc/boot/dts/sbc8548-altflash.dts115
-rw-r--r--arch/powerpc/boot/dts/sbc8548-post.dtsi295
-rw-r--r--arch/powerpc/boot/dts/sbc8548-pre.dtsi52
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts356
-rw-r--r--arch/powerpc/boot/dts/uc101.dts52
-rw-r--r--arch/powerpc/boot/dts/virtex440-ml507.dts6
-rw-r--r--arch/powerpc/configs/83xx/kmeter1_defconfig6
-rw-r--r--arch/powerpc/configs/85xx/ge_imp3a_defconfig1
-rw-r--r--arch/powerpc/configs/85xx/ppa8548_defconfig65
-rw-r--r--arch/powerpc/configs/85xx/sbc8548_defconfig19
-rw-r--r--arch/powerpc/configs/86xx/gef_ppc9a_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc310_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc610_defconfig1
-rw-r--r--arch/powerpc/configs/86xx/sbc8641d_defconfig1
-rw-r--r--arch/powerpc/configs/corenet32_smp_defconfig1
-rw-r--r--arch/powerpc/configs/corenet64_smp_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig1
-rw-r--r--arch/powerpc/configs/pasemi_defconfig31
-rw-r--r--arch/powerpc/configs/ppc64_defconfig147
-rw-r--r--arch/powerpc/configs/ppc64e_defconfig107
-rw-r--r--arch/powerpc/configs/ps3_defconfig15
-rw-r--r--arch/powerpc/configs/pseries_defconfig91
-rw-r--r--arch/powerpc/crypto/Makefile9
-rw-r--r--arch/powerpc/crypto/sha1-powerpc-asm.S179
-rw-r--r--arch/powerpc/crypto/sha1.c157
-rw-r--r--arch/powerpc/include/asm/cputable.h126
-rw-r--r--arch/powerpc/include/asm/dbell.h30
-rw-r--r--arch/powerpc/include/asm/debug.h15
-rw-r--r--arch/powerpc/include/asm/eeh.h3
-rw-r--r--arch/powerpc/include/asm/exception-64s.h138
-rw-r--r--arch/powerpc/include/asm/firmware.h3
-rw-r--r--arch/powerpc/include/asm/hvcall.h9
-rw-r--r--arch/powerpc/include/asm/hw_breakpoint.h35
-rw-r--r--arch/powerpc/include/asm/kvm_book3s_asm.h3
-rw-r--r--arch/powerpc/include/asm/kvm_host.h1
-rw-r--r--arch/powerpc/include/asm/machdep.h4
-rw-r--r--arch/powerpc/include/asm/mpc5121.h17
-rw-r--r--arch/powerpc/include/asm/paca.h10
-rw-r--r--arch/powerpc/include/asm/perf_event_server.h10
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h13
-rw-r--r--arch/powerpc/include/asm/ppc4xx_ocm.h45
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h110
-rw-r--r--arch/powerpc/include/asm/processor.h48
-rw-r--r--arch/powerpc/include/asm/ps3.h2
-rw-r--r--arch/powerpc/include/asm/reg.h43
-rw-r--r--arch/powerpc/include/asm/sections.h3
-rw-r--r--arch/powerpc/include/asm/spinlock.h2
-rw-r--r--arch/powerpc/include/asm/tm.h20
-rw-r--r--arch/powerpc/include/uapi/asm/ptrace.h29
-rw-r--r--arch/powerpc/kernel/Makefile10
-rw-r--r--arch/powerpc/kernel/asm-offsets.c34
-rw-r--r--arch/powerpc/kernel/cpu_setup_power.S7
-rw-r--r--arch/powerpc/kernel/dbell.c4
-rw-r--r--arch/powerpc/kernel/entry_64.S43
-rw-r--r--arch/powerpc/kernel/exceptions-64e.S3
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S351
-rw-r--r--arch/powerpc/kernel/fpu.S66
-rw-r--r--arch/powerpc/kernel/head_40x.S47
-rw-r--r--arch/powerpc/kernel/head_64.S34
-rw-r--r--arch/powerpc/kernel/hw_breakpoint.c84
-rw-r--r--arch/powerpc/kernel/iommu.c7
-rw-r--r--arch/powerpc/kernel/irq.c11
-rw-r--r--arch/powerpc/kernel/kgdb.c10
-rw-r--r--arch/powerpc/kernel/machine_kexec_64.c5
-rw-r--r--arch/powerpc/kernel/module_64.c30
-rw-r--r--arch/powerpc/kernel/of_platform.c7
-rw-r--r--arch/powerpc/kernel/paca.c2
-rw-r--r--arch/powerpc/kernel/pci-common.c7
-rw-r--r--arch/powerpc/kernel/process.c241
-rw-r--r--arch/powerpc/kernel/prom_init.c626
-rw-r--r--arch/powerpc/kernel/prom_init_check.sh2
-rw-r--r--arch/powerpc/kernel/ptrace.c89
-rw-r--r--arch/powerpc/kernel/ptrace32.c8
-rw-r--r--arch/powerpc/kernel/setup_64.c18
-rw-r--r--arch/powerpc/kernel/signal.c5
-rw-r--r--arch/powerpc/kernel/signal.h8
-rw-r--r--arch/powerpc/kernel/signal_32.c500
-rw-r--r--arch/powerpc/kernel/signal_64.c337
-rw-r--r--arch/powerpc/kernel/smp.c2
-rw-r--r--arch/powerpc/kernel/tm.S388
-rw-r--r--arch/powerpc/kernel/traps.c150
-rw-r--r--arch/powerpc/kernel/vector.S51
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S5
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S9
-rw-r--r--arch/powerpc/kvm/book3s_pr.c19
-rw-r--r--arch/powerpc/lib/Makefile6
-rw-r--r--arch/powerpc/mm/Makefile2
-rw-r--r--arch/powerpc/mm/fault.c4
-rw-r--r--arch/powerpc/mm/hash_utils_64.c16
-rw-r--r--arch/powerpc/mm/mem.c11
-rw-r--r--arch/powerpc/oprofile/Makefile2
-rw-r--r--arch/powerpc/perf/core-book3s.c93
-rw-r--r--arch/powerpc/perf/e500-pmu.c2
-rw-r--r--arch/powerpc/platforms/44x/Kconfig8
-rw-r--r--arch/powerpc/platforms/512x/clock.c34
-rw-r--r--arch/powerpc/platforms/512x/mpc512x_shared.c37
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c6
-rw-r--r--arch/powerpc/platforms/82xx/km82xx.c6
-rw-r--r--arch/powerpc/platforms/82xx/pq2.c4
-rw-r--r--arch/powerpc/platforms/83xx/km83xx.c161
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig15
-rw-r--r--arch/powerpc/platforms/85xx/Makefile2
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c4
-rw-r--r--arch/powerpc/platforms/85xx/p1022_ds.c40
-rw-r--r--arch/powerpc/platforms/85xx/p1022_rdk.c12
-rw-r--r--arch/powerpc/platforms/85xx/ppa8548.c98
-rw-r--r--arch/powerpc/platforms/85xx/qemu_e500.c7
-rw-r--r--arch/powerpc/platforms/85xx/sgy_cts1000.c176
-rw-r--r--arch/powerpc/platforms/Kconfig2
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype6
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_sio.c5
-rw-r--r--arch/powerpc/platforms/cell/spu_callbacks.c13
-rw-r--r--arch/powerpc/platforms/ps3/htab.c14
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig1
-rw-r--r--arch/powerpc/platforms/pseries/Makefile2
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c24
-rw-r--r--arch/powerpc/platforms/pseries/firmware.c21
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c8
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c104
-rw-r--r--arch/powerpc/platforms/pseries/pci.c3
-rw-r--r--arch/powerpc/platforms/pseries/plpar_wrappers.h18
-rw-r--r--arch/powerpc/platforms/pseries/pseries_energy.c37
-rw-r--r--arch/powerpc/platforms/pseries/setup.c20
-rw-r--r--arch/powerpc/platforms/pseries/smp.c33
-rw-r--r--arch/powerpc/platforms/wsp/Makefile2
-rw-r--r--arch/powerpc/sysdev/Makefile4
-rw-r--r--arch/powerpc/sysdev/fsl_85xx_l2ctlr.c1
-rw-r--r--arch/powerpc/sysdev/fsl_ifc.c2
-rw-r--r--arch/powerpc/sysdev/fsl_lbc.c6
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c4
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c24
-rw-r--r--arch/powerpc/sysdev/fsl_pci.h2
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c4
-rw-r--r--arch/powerpc/sysdev/mpc5xxx_clocks.c4
-rw-r--r--arch/powerpc/sysdev/mpic.c28
-rw-r--r--arch/powerpc/sysdev/ppc4xx_ocm.c415
-rw-r--r--arch/powerpc/sysdev/xics/ics-rtas.c2
-rw-r--r--arch/powerpc/xmon/Makefile2
-rw-r--r--arch/powerpc/xmon/xmon.c21
-rw-r--r--arch/x86/Kconfig18
-rw-r--r--arch/x86/include/asm/microcode.h14
-rw-r--r--arch/x86/include/asm/microcode_intel.h85
-rw-r--r--arch/x86/include/asm/processor.h8
-rw-r--r--arch/x86/include/asm/proto.h2
-rw-r--r--arch/x86/include/asm/tlbflush.h18
-rw-r--r--arch/x86/kernel/Makefile3
-rw-r--r--arch/x86/kernel/cpu/common.c17
-rw-r--r--arch/x86/kernel/head64.c13
-rw-r--r--arch/x86/kernel/head_32.S11
-rw-r--r--arch/x86/kernel/head_64.S2
-rw-r--r--arch/x86/kernel/microcode_core.c7
-rw-r--r--arch/x86/kernel/microcode_core_early.c76
-rw-r--r--arch/x86/kernel/microcode_intel.c198
-rw-r--r--arch/x86/kernel/microcode_intel_early.c796
-rw-r--r--arch/x86/kernel/microcode_intel_lib.c174
-rw-r--r--arch/x86/mm/init.c10
-rw-r--r--arch/x86/xen/mmu.c44
-rw-r--r--crypto/Kconfig7
-rw-r--r--drivers/Makefile2
-rw-r--r--drivers/ata/pata_mpc52xx.c6
-rw-r--r--drivers/char/random.c6
-rw-r--r--drivers/dma/Kconfig2
-rw-r--r--drivers/dma/Makefile1
-rw-r--r--drivers/dma/bestcomm/Kconfig (renamed from arch/powerpc/sysdev/bestcomm/Kconfig)0
-rw-r--r--drivers/dma/bestcomm/Makefile (renamed from arch/powerpc/sysdev/bestcomm/Makefile)0
-rw-r--r--drivers/dma/bestcomm/ata.c (renamed from arch/powerpc/sysdev/bestcomm/ata.c)6
-rw-r--r--drivers/dma/bestcomm/bcom_ata_task.c (renamed from arch/powerpc/sysdev/bestcomm/bcom_ata_task.c)0
-rw-r--r--drivers/dma/bestcomm/bcom_fec_rx_task.c (renamed from arch/powerpc/sysdev/bestcomm/bcom_fec_rx_task.c)0
-rw-r--r--drivers/dma/bestcomm/bcom_fec_tx_task.c (renamed from arch/powerpc/sysdev/bestcomm/bcom_fec_tx_task.c)0
-rw-r--r--drivers/dma/bestcomm/bcom_gen_bd_rx_task.c (renamed from arch/powerpc/sysdev/bestcomm/bcom_gen_bd_rx_task.c)0
-rw-r--r--drivers/dma/bestcomm/bcom_gen_bd_tx_task.c (renamed from arch/powerpc/sysdev/bestcomm/bcom_gen_bd_tx_task.c)0
-rw-r--r--drivers/dma/bestcomm/bestcomm.c (renamed from arch/powerpc/sysdev/bestcomm/bestcomm.c)6
-rw-r--r--drivers/dma/bestcomm/fec.c (renamed from arch/powerpc/sysdev/bestcomm/fec.c)6
-rw-r--r--drivers/dma/bestcomm/gen_bd.c (renamed from arch/powerpc/sysdev/bestcomm/gen_bd.c)6
-rw-r--r--drivers/dma/bestcomm/sram.c (renamed from arch/powerpc/sysdev/bestcomm/sram.c)2
-rw-r--r--drivers/idle/i7300_idle.c8
-rw-r--r--drivers/macintosh/windfarm_pm112.c2
-rw-r--r--drivers/macintosh/windfarm_pm72.c2
-rw-r--r--drivers/macintosh/windfarm_rm31.c2
-rw-r--r--drivers/net/ethernet/freescale/fec_mpc52xx.c4
-rw-r--r--drivers/parisc/Kconfig1
-rw-r--r--drivers/parisc/dino.c13
-rw-r--r--drivers/parisc/hppb.c6
-rw-r--r--drivers/parisc/pdc_stable.c6
-rw-r--r--drivers/parisc/superio.c2
-rw-r--r--drivers/usb/chipidea/debug.c2
-rw-r--r--drivers/video/fsl-diu-fb.c64
-rw-r--r--fs/file.c2
-rw-r--r--include/asm-generic/cmpxchg-local.h8
-rw-r--r--include/linux/fsl/bestcomm/ata.h (renamed from arch/powerpc/sysdev/bestcomm/ata.h)0
-rw-r--r--include/linux/fsl/bestcomm/bestcomm.h (renamed from arch/powerpc/sysdev/bestcomm/bestcomm.h)0
-rw-r--r--include/linux/fsl/bestcomm/bestcomm_priv.h (renamed from arch/powerpc/sysdev/bestcomm/bestcomm_priv.h)0
-rw-r--r--include/linux/fsl/bestcomm/fec.h (renamed from arch/powerpc/sysdev/bestcomm/fec.h)0
-rw-r--r--include/linux/fsl/bestcomm/gen_bd.h (renamed from arch/powerpc/sysdev/bestcomm/gen_bd.h)0
-rw-r--r--include/linux/fsl/bestcomm/sram.h (renamed from arch/powerpc/sysdev/bestcomm/sram.h)0
-rw-r--r--include/linux/idr.h2
-rw-r--r--include/linux/lockdep.h2
-rw-r--r--include/linux/sched/rt.h6
-rw-r--r--include/linux/sched/sysctl.h6
-rw-r--r--include/linux/seqlock.h193
-rw-r--r--kernel/futex.c2
-rw-r--r--kernel/futex_compat.c2
-rw-r--r--kernel/lockdep.c15
-rw-r--r--kernel/time/ntp.c26
-rw-r--r--kernel/watchdog.c10
-rw-r--r--lib/locking-selftest.c34
-rw-r--r--lib/rwsem-spinlock.c69
-rw-r--r--lib/rwsem.c75
-rw-r--r--sound/soc/fsl/mpc5200_dma.c4
276 files changed, 9366 insertions, 3359 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
index fc9ce6f1688c..6d21c0288e9e 100644
--- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
+++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt
@@ -54,8 +54,13 @@ PROPERTIES
54 - compatible 54 - compatible
55 Usage: required 55 Usage: required
56 Value type: <string> 56 Value type: <string>
57 Definition: Must include "fsl,sec-v4.0". Also includes SEC 57 Definition: Must include "fsl,sec-v4.0"
58 ERA versions (optional) with which the device is compatible. 58
59 - fsl,sec-era
60 Usage: optional
61 Value type: <u32>
62 Definition: A standard property. Define the 'ERA' of the SEC
63 device.
59 64
60 - #address-cells 65 - #address-cells
61 Usage: required 66 Usage: required
@@ -107,7 +112,8 @@ PROPERTIES
107 112
108EXAMPLE 113EXAMPLE
109 crypto@300000 { 114 crypto@300000 {
110 compatible = "fsl,sec-v4.0", "fsl,sec-era-v2.0"; 115 compatible = "fsl,sec-v4.0";
116 fsl,sec-era = <0x2>;
111 #address-cells = <1>; 117 #address-cells = <1>;
112 #size-cells = <1>; 118 #size-cells = <1>;
113 reg = <0x300000 0x10000>; 119 reg = <0x300000 0x10000>;
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt b/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
index 9e7a2417dac5..7f150b5012cc 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
@@ -17,9 +17,20 @@ Recommended properties:
17 contains a functioning "reset control register" (i.e. the board 17 contains a functioning "reset control register" (i.e. the board
18 is wired to reset upon setting the HRESET_REQ bit in this register). 18 is wired to reset upon setting the HRESET_REQ bit in this register).
19 19
20Example: 20 - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
21 registers, for those SOCs that have a PAMU device.
22
23Examples:
21 global-utilities@e0000 { /* global utilities block */ 24 global-utilities@e0000 { /* global utilities block */
22 compatible = "fsl,mpc8548-guts"; 25 compatible = "fsl,mpc8548-guts";
23 reg = <e0000 1000>; 26 reg = <e0000 1000>;
24 fsl,has-rstcr; 27 fsl,has-rstcr;
25 }; 28 };
29
30 guts: global-utilities@e0000 {
31 compatible = "fsl,qoriq-device-config-1.0";
32 reg = <0xe0000 0xe00>;
33 fsl,has-rstcr;
34 #sleep-cells = <1>;
35 fsl,liodn-bits = <12>;
36 };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt b/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt
new file mode 100644
index 000000000000..1f5e329f756c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt
@@ -0,0 +1,140 @@
1Freescale Peripheral Management Access Unit (PAMU) Device Tree Binding
2
3DESCRIPTION
4
5The PAMU is an I/O MMU that provides device-to-memory access control and
6address translation capabilities.
7
8Required properties:
9
10- compatible : <string>
11 First entry is a version-specific string, such as
12 "fsl,pamu-v1.0". The second is "fsl,pamu".
13- ranges : <prop-encoded-array>
14 A standard property. Utilized to describe the memory mapped
15 I/O space utilized by the controller. The size should
16 be set to the total size of the register space of all
17 physically present PAMU controllers. For example, for
18 PAMU v1.0, on an SOC that has five PAMU devices, the size
19 is 0x5000.
20- interrupts : <prop-encoded-array>
21 Interrupt mappings. The first tuple is the normal PAMU
22 interrupt, used for reporting access violations. The second
23 is for PAMU hardware errors, such as PAMU operation errors
24 and ECC errors.
25- #address-cells: <u32>
26 A standard property.
27- #size-cells : <u32>
28 A standard property.
29
30Optional properties:
31- reg : <prop-encoded-array>
32 A standard property. It represents the CCSR registers of
33 all child PAMUs combined. Include it to provide support
34 for legacy drivers.
35- interrupt-parent : <phandle>
36 Phandle to interrupt controller
37
38Child nodes:
39
40Each child node represents one PAMU controller. Each SOC device that is
41connected to a specific PAMU device should have a "fsl,pamu-phandle" property
42that links to the corresponding specific child PAMU controller.
43
44- reg : <prop-encoded-array>
45 A standard property. Specifies the physical address and
46 length (relative to the parent 'ranges' property) of this
47 PAMU controller's configuration registers. The size should
48 be set to the size of this PAMU controllers's register space.
49 For PAMU v1.0, this size is 0x1000.
50- fsl,primary-cache-geometry
51 : <prop-encoded-array>
52 Two cells that specify the geometry of the primary PAMU
53 cache. The first is the number of cache lines, and the
54 second is the number of "ways". For direct-mapped caches,
55 specify a value of 1.
56- fsl,secondary-cache-geometry
57 : <prop-encoded-array>
58 Two cells that specify the geometry of the secondary PAMU
59 cache. The first is the number of cache lines, and the
60 second is the number of "ways". For direct-mapped caches,
61 specify a value of 1.
62
63Device nodes:
64
65Devices that have LIODNs need to specify links to the parent PAMU controller
66(the actual PAMU controller that this device is connected to) and a pointer to
67the LIODN register, if applicable.
68
69- fsl,iommu-parent
70 : <phandle>
71 Phandle to the single, specific PAMU controller node to which
72 this device is connect. The PAMU topology is represented in
73 the device tree to assist code that dynamically determines the
74 best LIODN values to minimize PAMU cache thrashing.
75
76- fsl,liodn-reg : <prop-encoded-array>
77 Two cells that specify the location of the LIODN register
78 for this device. Required for devices that have a single
79 LIODN. The first cell is a phandle to a node that contains
80 the registers where the LIODN is to be set. The second is
81 the offset from the first "reg" resource of the node where
82 the specific LIODN register is located.
83
84
85Example:
86
87 iommu@20000 {
88 compatible = "fsl,pamu-v1.0", "fsl,pamu";
89 reg = <0x20000 0x5000>;
90 ranges = <0 0x20000 0x5000>;
91 #address-cells = <1>;
92 #size-cells = <1>;
93 interrupts = <
94 24 2 0 0
95 16 2 1 30>;
96
97 pamu0: pamu@0 {
98 reg = <0 0x1000>;
99 fsl,primary-cache-geometry = <32 1>;
100 fsl,secondary-cache-geometry = <128 2>;
101 };
102
103 pamu1: pamu@1000 {
104 reg = <0x1000 0x1000>;
105 fsl,primary-cache-geometry = <32 1>;
106 fsl,secondary-cache-geometry = <128 2>;
107 };
108
109 pamu2: pamu@2000 {
110 reg = <0x2000 0x1000>;
111 fsl,primary-cache-geometry = <32 1>;
112 fsl,secondary-cache-geometry = <128 2>;
113 };
114
115 pamu3: pamu@3000 {
116 reg = <0x3000 0x1000>;
117 fsl,primary-cache-geometry = <32 1>;
118 fsl,secondary-cache-geometry = <128 2>;
119 };
120
121 pamu4: pamu@4000 {
122 reg = <0x4000 0x1000>;
123 fsl,primary-cache-geometry = <32 1>;
124 fsl,secondary-cache-geometry = <128 2>;
125 };
126 };
127
128 guts: global-utilities@e0000 {
129 compatible = "fsl,qoriq-device-config-1.0";
130 reg = <0xe0000 0xe00>;
131 fsl,has-rstcr;
132 #sleep-cells = <1>;
133 fsl,liodn-bits = <12>;
134 };
135
136/include/ "qoriq-dma-0.dtsi"
137 dma@100300 {
138 fsl,iommu-parent = <&pamu0>;
139 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
140 };
diff --git a/Documentation/lockstat.txt b/Documentation/lockstat.txt
index cef00d42ed5b..dd2f7b26ca30 100644
--- a/Documentation/lockstat.txt
+++ b/Documentation/lockstat.txt
@@ -65,7 +65,7 @@ that had to wait on lock acquisition.
65 65
66 - CONFIGURATION 66 - CONFIGURATION
67 67
68Lock statistics are enabled via CONFIG_LOCK_STATS. 68Lock statistics are enabled via CONFIG_LOCK_STAT.
69 69
70 - USAGE 70 - USAGE
71 71
diff --git a/Documentation/powerpc/cpu_features.txt b/Documentation/powerpc/cpu_features.txt
index ffa4183fdb8b..ae09df8722c8 100644
--- a/Documentation/powerpc/cpu_features.txt
+++ b/Documentation/powerpc/cpu_features.txt
@@ -11,10 +11,10 @@ split instruction and data caches, and if the CPU supports the DOZE and NAP
11sleep modes. 11sleep modes.
12 12
13Detection of the feature set is simple. A list of processors can be found in 13Detection of the feature set is simple. A list of processors can be found in
14arch/ppc/kernel/cputable.c. The PVR register is masked and compared with each 14arch/powerpc/kernel/cputable.c. The PVR register is masked and compared with
15value in the list. If a match is found, the cpu_features of cur_cpu_spec is 15each value in the list. If a match is found, the cpu_features of cur_cpu_spec
16assigned to the feature bitmask for this processor and a __setup_cpu function 16is assigned to the feature bitmask for this processor and a __setup_cpu
17is called. 17function is called.
18 18
19C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a 19C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a
20particular feature bit. This is done in quite a few places, for example 20particular feature bit. This is done in quite a few places, for example
@@ -51,6 +51,6 @@ should be used in the majority of cases.
51 51
52The END_FTR_SECTION macros are implemented by storing information about this 52The END_FTR_SECTION macros are implemented by storing information about this
53code in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups 53code in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups
54(arch/ppc/kernel/misc.S) is invoked, it will iterate over the records in 54(arch/powerpc/kernel/misc.S) is invoked, it will iterate over the records in
55__ftr_fixup, and if the required feature is not present it will loop writing 55__ftr_fixup, and if the required feature is not present it will loop writing
56nop's from each BEGIN_FTR_SECTION to END_FTR_SECTION. 56nop's from each BEGIN_FTR_SECTION to END_FTR_SECTION.
diff --git a/Documentation/powerpc/transactional_memory.txt b/Documentation/powerpc/transactional_memory.txt
new file mode 100644
index 000000000000..c907be41d60f
--- /dev/null
+++ b/Documentation/powerpc/transactional_memory.txt
@@ -0,0 +1,175 @@
1Transactional Memory support
2============================
3
4POWER kernel support for this feature is currently limited to supporting
5its use by user programs. It is not currently used by the kernel itself.
6
7This file aims to sum up how it is supported by Linux and what behaviour you
8can expect from your user programs.
9
10
11Basic overview
12==============
13
14Hardware Transactional Memory is supported on POWER8 processors, and is a
15feature that enables a different form of atomic memory access. Several new
16instructions are presented to delimit transactions; transactions are
17guaranteed to either complete atomically or roll back and undo any partial
18changes.
19
20A simple transaction looks like this:
21
22begin_move_money:
23 tbegin
24 beq abort_handler
25
26 ld r4, SAVINGS_ACCT(r3)
27 ld r5, CURRENT_ACCT(r3)
28 subi r5, r5, 1
29 addi r4, r4, 1
30 std r4, SAVINGS_ACCT(r3)
31 std r5, CURRENT_ACCT(r3)
32
33 tend
34
35 b continue
36
37abort_handler:
38 ... test for odd failures ...
39
40 /* Retry the transaction if it failed because it conflicted with
41 * someone else: */
42 b begin_move_money
43
44
45The 'tbegin' instruction denotes the start point, and 'tend' the end point.
46Between these points the processor is in 'Transactional' state; any memory
47references will complete in one go if there are no conflicts with other
48transactional or non-transactional accesses within the system. In this
49example, the transaction completes as though it were normal straight-line code
50IF no other processor has touched SAVINGS_ACCT(r3) or CURRENT_ACCT(r3); an
51atomic move of money from the current account to the savings account has been
52performed. Even though the normal ld/std instructions are used (note no
53lwarx/stwcx), either *both* SAVINGS_ACCT(r3) and CURRENT_ACCT(r3) will be
54updated, or neither will be updated.
55
56If, in the meantime, there is a conflict with the locations accessed by the
57transaction, the transaction will be aborted by the CPU. Register and memory
58state will roll back to that at the 'tbegin', and control will continue from
59'tbegin+4'. The branch to abort_handler will be taken this second time; the
60abort handler can check the cause of the failure, and retry.
61
62Checkpointed registers include all GPRs, FPRs, VRs/VSRs, LR, CCR/CR, CTR, FPCSR
63and a few other status/flag regs; see the ISA for details.
64
65Causes of transaction aborts
66============================
67
68- Conflicts with cache lines used by other processors
69- Signals
70- Context switches
71- See the ISA for full documentation of everything that will abort transactions.
72
73
74Syscalls
75========
76
77Performing syscalls from within transaction is not recommended, and can lead
78to unpredictable results.
79
80Syscalls do not by design abort transactions, but beware: The kernel code will
81not be running in transactional state. The effect of syscalls will always
82remain visible, but depending on the call they may abort your transaction as a
83side-effect, read soon-to-be-aborted transactional data that should not remain
84invisible, etc. If you constantly retry a transaction that constantly aborts
85itself by calling a syscall, you'll have a livelock & make no progress.
86
87Simple syscalls (e.g. sigprocmask()) "could" be OK. Even things like write()
88from, say, printf() should be OK as long as the kernel does not access any
89memory that was accessed transactionally.
90
91Consider any syscalls that happen to work as debug-only -- not recommended for
92production use. Best to queue them up till after the transaction is over.
93
94
95Signals
96=======
97
98Delivery of signals (both sync and async) during transactions provides a second
99thread state (ucontext/mcontext) to represent the second transactional register
100state. Signal delivery 'treclaim's to capture both register states, so signals
101abort transactions. The usual ucontext_t passed to the signal handler
102represents the checkpointed/original register state; the signal appears to have
103arisen at 'tbegin+4'.
104
105If the sighandler ucontext has uc_link set, a second ucontext has been
106delivered. For future compatibility the MSR.TS field should be checked to
107determine the transactional state -- if so, the second ucontext in uc->uc_link
108represents the active transactional registers at the point of the signal.
109
110For 64-bit processes, uc->uc_mcontext.regs->msr is a full 64-bit MSR and its TS
111field shows the transactional mode.
112
113For 32-bit processes, the mcontext's MSR register is only 32 bits; the top 32
114bits are stored in the MSR of the second ucontext, i.e. in
115uc->uc_link->uc_mcontext.regs->msr. The top word contains the transactional
116state TS.
117
118However, basic signal handlers don't need to be aware of transactions
119and simply returning from the handler will deal with things correctly:
120
121Transaction-aware signal handlers can read the transactional register state
122from the second ucontext. This will be necessary for crash handlers to
123determine, for example, the address of the instruction causing the SIGSEGV.
124
125Example signal handler:
126
127 void crash_handler(int sig, siginfo_t *si, void *uc)
128 {
129 ucontext_t *ucp = uc;
130 ucontext_t *transactional_ucp = ucp->uc_link;
131
132 if (ucp_link) {
133 u64 msr = ucp->uc_mcontext.regs->msr;
134 /* May have transactional ucontext! */
135#ifndef __powerpc64__
136 msr |= ((u64)transactional_ucp->uc_mcontext.regs->msr) << 32;
137#endif
138 if (MSR_TM_ACTIVE(msr)) {
139 /* Yes, we crashed during a transaction. Oops. */
140 fprintf(stderr, "Transaction to be restarted at 0x%llx, but "
141 "crashy instruction was at 0x%llx\n",
142 ucp->uc_mcontext.regs->nip,
143 transactional_ucp->uc_mcontext.regs->nip);
144 }
145 }
146
147 fix_the_problem(ucp->dar);
148 }
149
150
151Failure cause codes used by kernel
152==================================
153
154These are defined in <asm/reg.h>, and distinguish different reasons why the
155kernel aborted a transaction:
156
157 TM_CAUSE_RESCHED Thread was rescheduled.
158 TM_CAUSE_FAC_UNAV FP/VEC/VSX unavailable trap.
159 TM_CAUSE_SYSCALL Currently unused; future syscalls that must abort
160 transactions for consistency will use this.
161 TM_CAUSE_SIGNAL Signal delivered.
162 TM_CAUSE_MISC Currently unused.
163
164These can be checked by the user program's abort handler as TEXASR[0:7].
165
166
167GDB
168===
169
170GDB and ptrace are not currently TM-aware. If one stops during a transaction,
171it looks like the transaction has just started (the checkpointed state is
172presented). The transaction cannot then be continued and will take the failure
173handler route. Furthermore, the transactional 2nd register state will be
174inaccessible. GDB can currently be used on programs using TM, but not sensibly
175in parts within transactions.
diff --git a/Documentation/x86/early-microcode.txt b/Documentation/x86/early-microcode.txt
new file mode 100644
index 000000000000..4aaf0dfb0cb8
--- /dev/null
+++ b/Documentation/x86/early-microcode.txt
@@ -0,0 +1,43 @@
1Early load microcode
2====================
3By Fenghua Yu <fenghua.yu@intel.com>
4
5Kernel can update microcode in early phase of boot time. Loading microcode early
6can fix CPU issues before they are observed during kernel boot time.
7
8Microcode is stored in an initrd file. The microcode is read from the initrd
9file and loaded to CPUs during boot time.
10
11The format of the combined initrd image is microcode in cpio format followed by
12the initrd image (maybe compressed). Kernel parses the combined initrd image
13during boot time. The microcode file in cpio name space is:
14kernel/x86/microcode/GenuineIntel.bin
15
16During BSP boot (before SMP starts), if the kernel finds the microcode file in
17the initrd file, it parses the microcode and saves matching microcode in memory.
18If matching microcode is found, it will be uploaded in BSP and later on in all
19APs.
20
21The cached microcode patch is applied when CPUs resume from a sleep state.
22
23There are two legacy user space interfaces to load microcode, either through
24/dev/cpu/microcode or through /sys/devices/system/cpu/microcode/reload file
25in sysfs.
26
27In addition to these two legacy methods, the early loading method described
28here is the third method with which microcode can be uploaded to a system's
29CPUs.
30
31The following example script shows how to generate a new combined initrd file in
32/boot/initrd-3.5.0.ucode.img with original microcode microcode.bin and
33original initrd image /boot/initrd-3.5.0.img.
34
35mkdir initrd
36cd initrd
37mkdir kernel
38mkdir kernel/x86
39mkdir kernel/x86/microcode
40cp ../microcode.bin kernel/x86/microcode/GenuineIntel.bin
41find .|cpio -oc >../ucode.cpio
42cd ..
43cat ucode.cpio /boot/initrd-3.5.0.img >/boot/initrd-3.5.0.ucode.img
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index f019e9bcefe9..9b33e7247864 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -411,7 +411,7 @@ static struct ddr_config ddr_config_table[] __attribute__((section(".data_l1")))
411 .dmc_ddrcfg = 0x00000422, 411 .dmc_ddrcfg = 0x00000422,
412 .dmc_ddrtr0 = 0x20E0A424, 412 .dmc_ddrtr0 = 0x20E0A424,
413 .dmc_ddrtr1 = 0x3020079E, 413 .dmc_ddrtr1 = 0x3020079E,
414 .dmc_ddrtr2 = 0x0032020D, 414 .dmc_ddrtr2 = 0x0032050D,
415 .dmc_ddrmr = 0x00000842, 415 .dmc_ddrmr = 0x00000842,
416 .dmc_ddrmr1 = 0x4, 416 .dmc_ddrmr1 = 0x4,
417 }, 417 },
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h
index 461bb542e2e8..57701c3b8a59 100644
--- a/arch/blackfin/include/asm/uaccess.h
+++ b/arch/blackfin/include/asm/uaccess.h
@@ -191,6 +191,7 @@ copy_to_user(void __user *to, const void *from, unsigned long n)
191 memcpy((void __force *)to, from, n); 191 memcpy((void __force *)to, from, n);
192 else 192 else
193 return n; 193 return n;
194 SSYNC();
194 return 0; 195 return 0;
195} 196}
196 197
diff --git a/arch/blackfin/kernel/dma-mapping.c b/arch/blackfin/kernel/dma-mapping.c
index e7be6532d6a0..df437e52d9df 100644
--- a/arch/blackfin/kernel/dma-mapping.c
+++ b/arch/blackfin/kernel/dma-mapping.c
@@ -13,6 +13,7 @@
13#include <linux/dma-mapping.h> 13#include <linux/dma-mapping.h>
14#include <linux/scatterlist.h> 14#include <linux/scatterlist.h>
15#include <linux/export.h> 15#include <linux/export.h>
16#include <linux/bitmap.h>
16 17
17static spinlock_t dma_page_lock; 18static spinlock_t dma_page_lock;
18static unsigned long *dma_page; 19static unsigned long *dma_page;
@@ -46,24 +47,17 @@ static inline unsigned int get_pages(size_t size)
46static unsigned long __alloc_dma_pages(unsigned int pages) 47static unsigned long __alloc_dma_pages(unsigned int pages)
47{ 48{
48 unsigned long ret = 0, flags; 49 unsigned long ret = 0, flags;
49 int i, count = 0; 50 unsigned long start;
50 51
51 if (dma_initialized == 0) 52 if (dma_initialized == 0)
52 dma_alloc_init(_ramend - DMA_UNCACHED_REGION, _ramend); 53 dma_alloc_init(_ramend - DMA_UNCACHED_REGION, _ramend);
53 54
54 spin_lock_irqsave(&dma_page_lock, flags); 55 spin_lock_irqsave(&dma_page_lock, flags);
55 56
56 for (i = 0; i < dma_pages;) { 57 start = bitmap_find_next_zero_area(dma_page, dma_pages, 0, pages, 0);
57 if (test_bit(i++, dma_page) == 0) { 58 if (start < dma_pages) {
58 if (++count == pages) { 59 ret = dma_base + (start << PAGE_SHIFT);
59 while (count--) 60 bitmap_set(dma_page, start, pages);
60 __set_bit(--i, dma_page);
61
62 ret = dma_base + (i << PAGE_SHIFT);
63 break;
64 }
65 } else
66 count = 0;
67 } 61 }
68 spin_unlock_irqrestore(&dma_page_lock, flags); 62 spin_unlock_irqrestore(&dma_page_lock, flags);
69 return ret; 63 return ret;
@@ -73,7 +67,6 @@ static void __free_dma_pages(unsigned long addr, unsigned int pages)
73{ 67{
74 unsigned long page = (addr - dma_base) >> PAGE_SHIFT; 68 unsigned long page = (addr - dma_base) >> PAGE_SHIFT;
75 unsigned long flags; 69 unsigned long flags;
76 int i;
77 70
78 if ((page + pages) > dma_pages) { 71 if ((page + pages) > dma_pages) {
79 printk(KERN_ERR "%s: freeing outside range.\n", __func__); 72 printk(KERN_ERR "%s: freeing outside range.\n", __func__);
@@ -81,9 +74,7 @@ static void __free_dma_pages(unsigned long addr, unsigned int pages)
81 } 74 }
82 75
83 spin_lock_irqsave(&dma_page_lock, flags); 76 spin_lock_irqsave(&dma_page_lock, flags);
84 for (i = page; i < page + pages; i++) 77 bitmap_clear(dma_page, page, pages);
85 __clear_bit(i, dma_page);
86
87 spin_unlock_irqrestore(&dma_page_lock, flags); 78 spin_unlock_irqrestore(&dma_page_lock, flags);
88} 79}
89 80
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index f608f02f29a3..cb0a4845339e 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -329,12 +329,6 @@ void bfin_coretmr_clockevent_init(void)
329 evt->broadcast = smp_timer_broadcast; 329 evt->broadcast = smp_timer_broadcast;
330#endif 330#endif
331 331
332
333#ifdef CONFIG_SMP
334 evt->broadcast = smp_timer_broadcast;
335#endif
336
337
338 evt->name = "bfin_core_timer"; 332 evt->name = "bfin_core_timer";
339 evt->rating = 350; 333 evt->rating = 350;
340 evt->irq = -1; 334 evt->irq = -1;
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 83ff311fd6ea..6c0c6816a51a 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1195,6 +1195,7 @@ static struct syscore_ops sec_pm_syscore_ops = {
1195 .suspend = sec_suspend, 1195 .suspend = sec_suspend,
1196 .resume = sec_resume, 1196 .resume = sec_resume,
1197}; 1197};
1198
1198#endif 1199#endif
1199#else 1200#else
1200# define bfin_gpio_set_wake NULL 1201# define bfin_gpio_set_wake NULL
@@ -1596,7 +1597,10 @@ int __init init_arch_irq(void)
1596 bfin_write_SEC_SCI(1, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN); 1597 bfin_write_SEC_SCI(1, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN);
1597 1598
1598 init_software_driven_irq(); 1599 init_software_driven_irq();
1600
1601#ifdef CONFIG_PM
1599 register_syscore_ops(&sec_pm_syscore_ops); 1602 register_syscore_ops(&sec_pm_syscore_ops);
1603#endif
1600 1604
1601 return 0; 1605 return 0;
1602} 1606}
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index c600f39aa453..7f9b3c53f74a 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -160,6 +160,23 @@ config PREFETCH
160 def_bool y 160 def_bool y
161 depends on PA8X00 || PA7200 161 depends on PA8X00 || PA7200
162 162
163config MLONGCALLS
164 bool "Enable the -mlong-calls compiler option for big kernels"
165 def_bool y if (!MODULES)
166 depends on PA8X00
167 help
168 If you configure the kernel to include many drivers built-in instead
169 as modules, the kernel executable may become too big, so that the
170 linker will not be able to resolve some long branches and fails to link
171 your vmlinux kernel. In that case enabling this option will help you
172 to overcome this limit by using the -mlong-calls compiler option.
173
174 Usually you want to say N here, unless you e.g. want to build
175 a kernel which includes all necessary drivers built-in and which can
176 be used for TFTP booting without the need to have an initrd ramdisk.
177
178 Enabling this option will probably slow down your kernel.
179
163config 64BIT 180config 64BIT
164 bool "64-bit kernel" 181 bool "64-bit kernel"
165 depends on PA8X00 182 depends on PA8X00
@@ -254,6 +271,10 @@ config COMPAT
254 def_bool y 271 def_bool y
255 depends on 64BIT 272 depends on 64BIT
256 273
274config SYSVIPC_COMPAT
275 def_bool y
276 depends on COMPAT && SYSVIPC
277
257config HPUX 278config HPUX
258 bool "Support for HP-UX binaries" 279 bool "Support for HP-UX binaries"
259 depends on !64BIT 280 depends on !64BIT
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile
index 5707f1a62341..ed9a14ccd066 100644
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -32,11 +32,6 @@ ifdef CONFIG_64BIT
32UTS_MACHINE := parisc64 32UTS_MACHINE := parisc64
33CHECKFLAGS += -D__LP64__=1 -m64 33CHECKFLAGS += -D__LP64__=1 -m64
34WIDTH := 64 34WIDTH := 64
35
36# FIXME: if no default set, should really try to locate dynamically
37ifeq ($(CROSS_COMPILE),)
38CROSS_COMPILE := hppa64-linux-gnu-
39endif
40else # 32-bit 35else # 32-bit
41WIDTH := 36WIDTH :=
42endif 37endif
@@ -44,6 +39,10 @@ endif
44# attempt to help out folks who are cross-compiling 39# attempt to help out folks who are cross-compiling
45ifeq ($(NATIVE),1) 40ifeq ($(NATIVE),1)
46CROSS_COMPILE := hppa$(WIDTH)-linux- 41CROSS_COMPILE := hppa$(WIDTH)-linux-
42else
43 ifeq ($(CROSS_COMPILE),)
44 CROSS_COMPILE := hppa$(WIDTH)-linux-gnu-
45 endif
47endif 46endif
48 47
49OBJCOPY_FLAGS =-O binary -R .note -R .comment -S 48OBJCOPY_FLAGS =-O binary -R .note -R .comment -S
@@ -65,6 +64,10 @@ ifndef CONFIG_FUNCTION_TRACER
65 cflags-y += -ffunction-sections 64 cflags-y += -ffunction-sections
66endif 65endif
67 66
67# Use long jumps instead of long branches (needed if your linker fails to
68# link a too big vmlinux executable)
69cflags-$(CONFIG_MLONGCALLS) += -mlong-calls
70
68# select which processor to optimise for 71# select which processor to optimise for
69cflags-$(CONFIG_PA7100) += -march=1.1 -mschedule=7100 72cflags-$(CONFIG_PA7100) += -march=1.1 -mschedule=7100
70cflags-$(CONFIG_PA7200) += -march=1.1 -mschedule=7200 73cflags-$(CONFIG_PA7200) += -march=1.1 -mschedule=7200
diff --git a/arch/parisc/hpux/fs.c b/arch/parisc/hpux/fs.c
index a0760b87fd4e..838b479a42c4 100644
--- a/arch/parisc/hpux/fs.c
+++ b/arch/parisc/hpux/fs.c
@@ -43,8 +43,7 @@ int hpux_execve(struct pt_regs *regs)
43 43
44 error = do_execve(filename->name, 44 error = do_execve(filename->name,
45 (const char __user *const __user *) regs->gr[25], 45 (const char __user *const __user *) regs->gr[25],
46 (const char __user *const __user *) regs->gr[24], 46 (const char __user *const __user *) regs->gr[24]);
47 regs);
48 47
49 putname(filename); 48 putname(filename);
50 49
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index 9f21ab0c02e3..79f694f3ad9b 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -115,7 +115,9 @@ flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vma
115{ 115{
116 if (PageAnon(page)) { 116 if (PageAnon(page)) {
117 flush_tlb_page(vma, vmaddr); 117 flush_tlb_page(vma, vmaddr);
118 preempt_disable();
118 flush_dcache_page_asm(page_to_phys(page), vmaddr); 119 flush_dcache_page_asm(page_to_phys(page), vmaddr);
120 preempt_enable();
119 } 121 }
120} 122}
121 123
diff --git a/arch/parisc/include/asm/compat.h b/arch/parisc/include/asm/compat.h
index db7a662691a8..94710cfc1ce8 100644
--- a/arch/parisc/include/asm/compat.h
+++ b/arch/parisc/include/asm/compat.h
@@ -28,6 +28,7 @@ typedef u16 compat_nlink_t;
28typedef u16 compat_ipc_pid_t; 28typedef u16 compat_ipc_pid_t;
29typedef s32 compat_daddr_t; 29typedef s32 compat_daddr_t;
30typedef u32 compat_caddr_t; 30typedef u32 compat_caddr_t;
31typedef s32 compat_key_t;
31typedef s32 compat_timer_t; 32typedef s32 compat_timer_t;
32 33
33typedef s32 compat_int_t; 34typedef s32 compat_int_t;
@@ -188,6 +189,66 @@ typedef struct compat_siginfo {
188#define COMPAT_OFF_T_MAX 0x7fffffff 189#define COMPAT_OFF_T_MAX 0x7fffffff
189#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL 190#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
190 191
192struct compat_ipc64_perm {
193 compat_key_t key;
194 __compat_uid_t uid;
195 __compat_gid_t gid;
196 __compat_uid_t cuid;
197 __compat_gid_t cgid;
198 unsigned short int __pad1;
199 compat_mode_t mode;
200 unsigned short int __pad2;
201 unsigned short int seq;
202 unsigned int __pad3;
203 unsigned long __unused1; /* yes they really are 64bit pads */
204 unsigned long __unused2;
205};
206
207struct compat_semid64_ds {
208 struct compat_ipc64_perm sem_perm;
209 compat_time_t sem_otime;
210 unsigned int __unused1;
211 compat_time_t sem_ctime;
212 unsigned int __unused2;
213 compat_ulong_t sem_nsems;
214 compat_ulong_t __unused3;
215 compat_ulong_t __unused4;
216};
217
218struct compat_msqid64_ds {
219 struct compat_ipc64_perm msg_perm;
220 unsigned int __unused1;
221 compat_time_t msg_stime;
222 unsigned int __unused2;
223 compat_time_t msg_rtime;
224 unsigned int __unused3;
225 compat_time_t msg_ctime;
226 compat_ulong_t msg_cbytes;
227 compat_ulong_t msg_qnum;
228 compat_ulong_t msg_qbytes;
229 compat_pid_t msg_lspid;
230 compat_pid_t msg_lrpid;
231 compat_ulong_t __unused4;
232 compat_ulong_t __unused5;
233};
234
235struct compat_shmid64_ds {
236 struct compat_ipc64_perm shm_perm;
237 unsigned int __unused1;
238 compat_time_t shm_atime;
239 unsigned int __unused2;
240 compat_time_t shm_dtime;
241 unsigned int __unused3;
242 compat_time_t shm_ctime;
243 unsigned int __unused4;
244 compat_size_t shm_segsz;
245 compat_pid_t shm_cpid;
246 compat_pid_t shm_lpid;
247 compat_ulong_t shm_nattch;
248 compat_ulong_t __unused5;
249 compat_ulong_t __unused6;
250};
251
191/* 252/*
192 * A pointer passed in from user mode. This should not 253 * A pointer passed in from user mode. This should not
193 * be used for syscall parameters, just declare them 254 * be used for syscall parameters, just declare them
diff --git a/arch/parisc/include/asm/compat_rt_sigframe.h b/arch/parisc/include/asm/compat_rt_sigframe.h
deleted file mode 100644
index b3f95a7f18b4..000000000000
--- a/arch/parisc/include/asm/compat_rt_sigframe.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#include <linux/compat.h>
2#include <linux/compat_siginfo.h>
3#include <asm/compat_ucontext.h>
4
5#ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H
6#define _ASM_PARISC_COMPAT_RT_SIGFRAME_H
7
8/* In a deft move of uber-hackery, we decide to carry the top half of all
9 * 64-bit registers in a non-portable, non-ABI, hidden structure.
10 * Userspace can read the hidden structure if it *wants* but is never
11 * guaranteed to be in the same place. Infact the uc_sigmask from the
12 * ucontext_t structure may push the hidden register file downards
13 */
14struct compat_regfile {
15 /* Upper half of all the 64-bit registers that were truncated
16 on a copy to a 32-bit userspace */
17 compat_int_t rf_gr[32];
18 compat_int_t rf_iasq[2];
19 compat_int_t rf_iaoq[2];
20 compat_int_t rf_sar;
21};
22
23#define COMPAT_SIGRETURN_TRAMP 4
24#define COMPAT_SIGRESTARTBLOCK_TRAMP 5
25#define COMPAT_TRAMP_SIZE (COMPAT_SIGRETURN_TRAMP + COMPAT_SIGRESTARTBLOCK_TRAMP)
26
27struct compat_rt_sigframe {
28 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
29 Secondary to that it must protect the ERESTART_RESTARTBLOCK
30 trampoline we left on the stack (we were bad and didn't
31 change sp so we could run really fast.) */
32 compat_uint_t tramp[COMPAT_TRAMP_SIZE];
33 compat_siginfo_t info;
34 struct compat_ucontext uc;
35 /* Hidden location of truncated registers, *must* be last. */
36 struct compat_regfile regs;
37};
38
39/*
40 * The 32-bit ABI wants at least 48 bytes for a function call frame:
41 * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of
42 * which Linux/parisc uses is sp-20 for the saved return pointer...)
43 * Then, the stack pointer must be rounded to a cache line (64 bytes).
44 */
45#define SIGFRAME32 64
46#define FUNCTIONCALLFRAME32 48
47#define PARISC_RT_SIGFRAME_SIZE32 \
48 (((sizeof(struct compat_rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32)
49
50#endif
diff --git a/arch/parisc/include/asm/elf.h b/arch/parisc/include/asm/elf.h
index 19f6cb1a4a1c..ad2b50397894 100644
--- a/arch/parisc/include/asm/elf.h
+++ b/arch/parisc/include/asm/elf.h
@@ -247,7 +247,7 @@ typedef unsigned long elf_greg_t;
247#define ELF_PLATFORM ("PARISC\0") 247#define ELF_PLATFORM ("PARISC\0")
248 248
249#define SET_PERSONALITY(ex) \ 249#define SET_PERSONALITY(ex) \
250 current->personality = PER_LINUX; \ 250 set_personality((current->personality & ~PER_MASK) | PER_LINUX); \
251 current->thread.map_base = DEFAULT_MAP_BASE; \ 251 current->thread.map_base = DEFAULT_MAP_BASE; \
252 current->thread.task_size = DEFAULT_TASK_SIZE \ 252 current->thread.task_size = DEFAULT_TASK_SIZE \
253 253
diff --git a/arch/parisc/include/asm/floppy.h b/arch/parisc/include/asm/floppy.h
index 4ca69f558fae..f84ff12574b7 100644
--- a/arch/parisc/include/asm/floppy.h
+++ b/arch/parisc/include/asm/floppy.h
@@ -157,10 +157,10 @@ static int fd_request_irq(void)
157{ 157{
158 if(can_use_virtual_dma) 158 if(can_use_virtual_dma)
159 return request_irq(FLOPPY_IRQ, floppy_hardint, 159 return request_irq(FLOPPY_IRQ, floppy_hardint,
160 IRQF_DISABLED, "floppy", NULL); 160 0, "floppy", NULL);
161 else 161 else
162 return request_irq(FLOPPY_IRQ, floppy_interrupt, 162 return request_irq(FLOPPY_IRQ, floppy_interrupt,
163 IRQF_DISABLED, "floppy", NULL); 163 0, "floppy", NULL);
164} 164}
165 165
166static unsigned long dma_mem_alloc(unsigned long size) 166static unsigned long dma_mem_alloc(unsigned long size)
diff --git a/arch/parisc/include/asm/mmzone.h b/arch/parisc/include/asm/mmzone.h
index e67eb9c3d1bf..0e625ab9aaec 100644
--- a/arch/parisc/include/asm/mmzone.h
+++ b/arch/parisc/include/asm/mmzone.h
@@ -1,9 +1,10 @@
1#ifndef _PARISC_MMZONE_H 1#ifndef _PARISC_MMZONE_H
2#define _PARISC_MMZONE_H 2#define _PARISC_MMZONE_H
3 3
4#define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
5
4#ifdef CONFIG_DISCONTIGMEM 6#ifdef CONFIG_DISCONTIGMEM
5 7
6#define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
7extern int npmem_ranges; 8extern int npmem_ranges;
8 9
9struct node_map_data { 10struct node_map_data {
@@ -44,7 +45,7 @@ static inline int pfn_to_nid(unsigned long pfn)
44 return 0; 45 return 0;
45 46
46 i = pfn >> PFNNID_SHIFT; 47 i = pfn >> PFNNID_SHIFT;
47 BUG_ON(i >= sizeof(pfnnid_map) / sizeof(pfnnid_map[0])); 48 BUG_ON(i >= ARRAY_SIZE(pfnnid_map));
48 r = pfnnid_map[i]; 49 r = pfnnid_map[i];
49 BUG_ON(r == 0xff); 50 BUG_ON(r == 0xff);
50 51
@@ -60,7 +61,5 @@ static inline int pfn_valid(int pfn)
60 return 0; 61 return 0;
61} 62}
62 63
63#else /* !CONFIG_DISCONTIGMEM */
64#define MAX_PHYSMEM_RANGES 1
65#endif 64#endif
66#endif /* _PARISC_MMZONE_H */ 65#endif /* _PARISC_MMZONE_H */
diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h
index 4e0e7dbf0f3f..b7adb2ac049c 100644
--- a/arch/parisc/include/asm/page.h
+++ b/arch/parisc/include/asm/page.h
@@ -21,15 +21,27 @@
21#include <asm/types.h> 21#include <asm/types.h>
22#include <asm/cache.h> 22#include <asm/cache.h>
23 23
24#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 24#define clear_page(page) clear_page_asm((void *)(page))
25#define copy_page(to,from) copy_user_page_asm((void *)(to), (void *)(from)) 25#define copy_page(to, from) copy_page_asm((void *)(to), (void *)(from))
26 26
27struct page; 27struct page;
28 28
29void copy_user_page_asm(void *to, void *from); 29void clear_page_asm(void *page);
30void copy_page_asm(void *to, void *from);
31void clear_user_page(void *vto, unsigned long vaddr, struct page *pg);
30void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, 32void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
31 struct page *pg); 33 struct page *pg);
32void clear_user_page(void *page, unsigned long vaddr, struct page *pg); 34
35/* #define CONFIG_PARISC_TMPALIAS */
36
37#ifdef CONFIG_PARISC_TMPALIAS
38void clear_user_highpage(struct page *page, unsigned long vaddr);
39#define clear_user_highpage clear_user_highpage
40struct vm_area_struct;
41void copy_user_highpage(struct page *to, struct page *from,
42 unsigned long vaddr, struct vm_area_struct *vma);
43#define __HAVE_ARCH_COPY_USER_HIGHPAGE
44#endif
33 45
34/* 46/*
35 * These are used to make use of C type-checking.. 47 * These are used to make use of C type-checking..
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index ee99f2339356..7df49fad29f9 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -12,11 +12,10 @@
12 12
13#include <linux/bitops.h> 13#include <linux/bitops.h>
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <linux/mm_types.h>
15#include <asm/processor.h> 16#include <asm/processor.h>
16#include <asm/cache.h> 17#include <asm/cache.h>
17 18
18struct vm_area_struct;
19
20/* 19/*
21 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel 20 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
22 * memory. For the return value to be meaningful, ADDR must be >= 21 * memory. For the return value to be meaningful, ADDR must be >=
@@ -40,7 +39,14 @@ struct vm_area_struct;
40 do{ \ 39 do{ \
41 *(pteptr) = (pteval); \ 40 *(pteptr) = (pteval); \
42 } while(0) 41 } while(0)
43#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 42
43extern void purge_tlb_entries(struct mm_struct *, unsigned long);
44
45#define set_pte_at(mm, addr, ptep, pteval) \
46 do { \
47 set_pte(ptep, pteval); \
48 purge_tlb_entries(mm, addr); \
49 } while (0)
44 50
45#endif /* !__ASSEMBLY__ */ 51#endif /* !__ASSEMBLY__ */
46 52
@@ -466,6 +472,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
466 old = pte_val(*ptep); 472 old = pte_val(*ptep);
467 new = pte_val(pte_wrprotect(__pte (old))); 473 new = pte_val(pte_wrprotect(__pte (old)));
468 } while (cmpxchg((unsigned long *) ptep, old, new) != old); 474 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
475 purge_tlb_entries(mm, addr);
469#else 476#else
470 pte_t old_pte = *ptep; 477 pte_t old_pte = *ptep;
471 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte)); 478 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
diff --git a/arch/parisc/include/asm/signal.h b/arch/parisc/include/asm/signal.h
index 0fdb3c835952..b1a7c4c4a53a 100644
--- a/arch/parisc/include/asm/signal.h
+++ b/arch/parisc/include/asm/signal.h
@@ -3,16 +3,12 @@
3 3
4#include <uapi/asm/signal.h> 4#include <uapi/asm/signal.h>
5 5
6
7#define _NSIG 64 6#define _NSIG 64
8/* bits-per-word, where word apparently means 'long' not 'int' */ 7/* bits-per-word, where word apparently means 'long' not 'int' */
9#define _NSIG_BPW BITS_PER_LONG 8#define _NSIG_BPW BITS_PER_LONG
10#define _NSIG_WORDS (_NSIG / _NSIG_BPW) 9#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
11 10
12# ifndef __ASSEMBLY__ 11# ifndef __ASSEMBLY__
13#ifdef CONFIG_64BIT
14#else
15#endif
16 12
17/* Most things should be clean enough to redefine this at will, if care 13/* Most things should be clean enough to redefine this at will, if care
18 is taken to make libc match. */ 14 is taken to make libc match. */
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index 3043194547cd..74f801ebbe77 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -149,6 +149,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
149#define __ARCH_WANT_SYS_SIGNAL 149#define __ARCH_WANT_SYS_SIGNAL
150#define __ARCH_WANT_SYS_TIME 150#define __ARCH_WANT_SYS_TIME
151#define __ARCH_WANT_COMPAT_SYS_TIME 151#define __ARCH_WANT_COMPAT_SYS_TIME
152#define __ARCH_WANT_COMPAT_SYS_SCHED_RR_GET_INTERVAL
152#define __ARCH_WANT_SYS_UTIME 153#define __ARCH_WANT_SYS_UTIME
153#define __ARCH_WANT_SYS_WAITPID 154#define __ARCH_WANT_SYS_WAITPID
154#define __ARCH_WANT_SYS_SOCKETCALL 155#define __ARCH_WANT_SYS_SOCKETCALL
@@ -166,6 +167,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
166#define __ARCH_WANT_SYS_FORK 167#define __ARCH_WANT_SYS_FORK
167#define __ARCH_WANT_SYS_VFORK 168#define __ARCH_WANT_SYS_VFORK
168#define __ARCH_WANT_SYS_CLONE 169#define __ARCH_WANT_SYS_CLONE
170#define __ARCH_WANT_COMPAT_SYS_SENDFILE
169 171
170#endif /* __ASSEMBLY__ */ 172#endif /* __ASSEMBLY__ */
171 173
diff --git a/arch/parisc/include/uapi/asm/unistd.h b/arch/parisc/include/uapi/asm/unistd.h
index e178f30f2ccc..2c8b9bde18eb 100644
--- a/arch/parisc/include/uapi/asm/unistd.h
+++ b/arch/parisc/include/uapi/asm/unistd.h
@@ -822,8 +822,12 @@
822#define __NR_syncfs (__NR_Linux + 327) 822#define __NR_syncfs (__NR_Linux + 327)
823#define __NR_setns (__NR_Linux + 328) 823#define __NR_setns (__NR_Linux + 328)
824#define __NR_sendmmsg (__NR_Linux + 329) 824#define __NR_sendmmsg (__NR_Linux + 329)
825#define __NR_process_vm_readv (__NR_Linux + 330)
826#define __NR_process_vm_writev (__NR_Linux + 331)
827#define __NR_kcmp (__NR_Linux + 332)
828#define __NR_finit_module (__NR_Linux + 333)
825 829
826#define __NR_Linux_syscalls (__NR_sendmmsg + 1) 830#define __NR_Linux_syscalls (__NR_finit_module + 1)
827 831
828 832
829#define __IGNORE_select /* newselect */ 833#define __IGNORE_select /* newselect */
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 48e16dc20102..4b12890642eb 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -267,9 +267,11 @@ static inline void
267__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, 267__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr,
268 unsigned long physaddr) 268 unsigned long physaddr)
269{ 269{
270 preempt_disable();
270 flush_dcache_page_asm(physaddr, vmaddr); 271 flush_dcache_page_asm(physaddr, vmaddr);
271 if (vma->vm_flags & VM_EXEC) 272 if (vma->vm_flags & VM_EXEC)
272 flush_icache_page_asm(physaddr, vmaddr); 273 flush_icache_page_asm(physaddr, vmaddr);
274 preempt_enable();
273} 275}
274 276
275void flush_dcache_page(struct page *page) 277void flush_dcache_page(struct page *page)
@@ -329,17 +331,6 @@ EXPORT_SYMBOL(flush_kernel_dcache_page_asm);
329EXPORT_SYMBOL(flush_data_cache_local); 331EXPORT_SYMBOL(flush_data_cache_local);
330EXPORT_SYMBOL(flush_kernel_icache_range_asm); 332EXPORT_SYMBOL(flush_kernel_icache_range_asm);
331 333
332void clear_user_page_asm(void *page, unsigned long vaddr)
333{
334 unsigned long flags;
335 /* This function is implemented in assembly in pacache.S */
336 extern void __clear_user_page_asm(void *page, unsigned long vaddr);
337
338 purge_tlb_start(flags);
339 __clear_user_page_asm(page, vaddr);
340 purge_tlb_end(flags);
341}
342
343#define FLUSH_THRESHOLD 0x80000 /* 0.5MB */ 334#define FLUSH_THRESHOLD 0x80000 /* 0.5MB */
344int parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD; 335int parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD;
345 336
@@ -373,20 +364,9 @@ void __init parisc_setup_cache_timing(void)
373 printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus()); 364 printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());
374} 365}
375 366
376extern void purge_kernel_dcache_page(unsigned long); 367extern void purge_kernel_dcache_page_asm(unsigned long);
377extern void clear_user_page_asm(void *page, unsigned long vaddr); 368extern void clear_user_page_asm(void *, unsigned long);
378 369extern void copy_user_page_asm(void *, void *, unsigned long);
379void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
380{
381 unsigned long flags;
382
383 purge_kernel_dcache_page((unsigned long)page);
384 purge_tlb_start(flags);
385 pdtlb_kernel(page);
386 purge_tlb_end(flags);
387 clear_user_page_asm(page, vaddr);
388}
389EXPORT_SYMBOL(clear_user_page);
390 370
391void flush_kernel_dcache_page_addr(void *addr) 371void flush_kernel_dcache_page_addr(void *addr)
392{ 372{
@@ -399,11 +379,26 @@ void flush_kernel_dcache_page_addr(void *addr)
399} 379}
400EXPORT_SYMBOL(flush_kernel_dcache_page_addr); 380EXPORT_SYMBOL(flush_kernel_dcache_page_addr);
401 381
382void clear_user_page(void *vto, unsigned long vaddr, struct page *page)
383{
384 clear_page_asm(vto);
385 if (!parisc_requires_coherency())
386 flush_kernel_dcache_page_asm(vto);
387}
388EXPORT_SYMBOL(clear_user_page);
389
402void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, 390void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
403 struct page *pg) 391 struct page *pg)
404{ 392{
405 /* no coherency needed (all in kmap/kunmap) */ 393 /* Copy using kernel mapping. No coherency is needed
406 copy_user_page_asm(vto, vfrom); 394 (all in kmap/kunmap) on machines that don't support
395 non-equivalent aliasing. However, the `from' page
396 needs to be flushed before it can be accessed through
397 the kernel mapping. */
398 preempt_disable();
399 flush_dcache_page_asm(__pa(vfrom), vaddr);
400 preempt_enable();
401 copy_page_asm(vto, vfrom);
407 if (!parisc_requires_coherency()) 402 if (!parisc_requires_coherency())
408 flush_kernel_dcache_page_asm(vto); 403 flush_kernel_dcache_page_asm(vto);
409} 404}
@@ -419,6 +414,24 @@ void kunmap_parisc(void *addr)
419EXPORT_SYMBOL(kunmap_parisc); 414EXPORT_SYMBOL(kunmap_parisc);
420#endif 415#endif
421 416
417void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)
418{
419 unsigned long flags;
420
421 /* Note: purge_tlb_entries can be called at startup with
422 no context. */
423
424 /* Disable preemption while we play with %sr1. */
425 preempt_disable();
426 mtsp(mm->context, 1);
427 purge_tlb_start(flags);
428 pdtlb(addr);
429 pitlb(addr);
430 purge_tlb_end(flags);
431 preempt_enable();
432}
433EXPORT_SYMBOL(purge_tlb_entries);
434
422void __flush_tlb_range(unsigned long sid, unsigned long start, 435void __flush_tlb_range(unsigned long sid, unsigned long start,
423 unsigned long end) 436 unsigned long end)
424{ 437{
@@ -458,8 +471,66 @@ void flush_cache_all(void)
458 on_each_cpu(cacheflush_h_tmp_function, NULL, 1); 471 on_each_cpu(cacheflush_h_tmp_function, NULL, 1);
459} 472}
460 473
474static inline unsigned long mm_total_size(struct mm_struct *mm)
475{
476 struct vm_area_struct *vma;
477 unsigned long usize = 0;
478
479 for (vma = mm->mmap; vma; vma = vma->vm_next)
480 usize += vma->vm_end - vma->vm_start;
481 return usize;
482}
483
484static inline pte_t *get_ptep(pgd_t *pgd, unsigned long addr)
485{
486 pte_t *ptep = NULL;
487
488 if (!pgd_none(*pgd)) {
489 pud_t *pud = pud_offset(pgd, addr);
490 if (!pud_none(*pud)) {
491 pmd_t *pmd = pmd_offset(pud, addr);
492 if (!pmd_none(*pmd))
493 ptep = pte_offset_map(pmd, addr);
494 }
495 }
496 return ptep;
497}
498
461void flush_cache_mm(struct mm_struct *mm) 499void flush_cache_mm(struct mm_struct *mm)
462{ 500{
501 /* Flushing the whole cache on each cpu takes forever on
502 rp3440, etc. So, avoid it if the mm isn't too big. */
503 if (mm_total_size(mm) < parisc_cache_flush_threshold) {
504 struct vm_area_struct *vma;
505
506 if (mm->context == mfsp(3)) {
507 for (vma = mm->mmap; vma; vma = vma->vm_next) {
508 flush_user_dcache_range_asm(vma->vm_start,
509 vma->vm_end);
510 if (vma->vm_flags & VM_EXEC)
511 flush_user_icache_range_asm(
512 vma->vm_start, vma->vm_end);
513 }
514 } else {
515 pgd_t *pgd = mm->pgd;
516
517 for (vma = mm->mmap; vma; vma = vma->vm_next) {
518 unsigned long addr;
519
520 for (addr = vma->vm_start; addr < vma->vm_end;
521 addr += PAGE_SIZE) {
522 pte_t *ptep = get_ptep(pgd, addr);
523 if (ptep != NULL) {
524 pte_t pte = *ptep;
525 __flush_cache_page(vma, addr,
526 page_to_phys(pte_page(pte)));
527 }
528 }
529 }
530 }
531 return;
532 }
533
463#ifdef CONFIG_SMP 534#ifdef CONFIG_SMP
464 flush_cache_all(); 535 flush_cache_all();
465#else 536#else
@@ -485,20 +556,36 @@ flush_user_icache_range(unsigned long start, unsigned long end)
485 flush_instruction_cache(); 556 flush_instruction_cache();
486} 557}
487 558
488
489void flush_cache_range(struct vm_area_struct *vma, 559void flush_cache_range(struct vm_area_struct *vma,
490 unsigned long start, unsigned long end) 560 unsigned long start, unsigned long end)
491{ 561{
492 int sr3;
493
494 BUG_ON(!vma->vm_mm->context); 562 BUG_ON(!vma->vm_mm->context);
495 563
496 sr3 = mfsp(3); 564 if ((end - start) < parisc_cache_flush_threshold) {
497 if (vma->vm_mm->context == sr3) { 565 if (vma->vm_mm->context == mfsp(3)) {
498 flush_user_dcache_range(start,end); 566 flush_user_dcache_range_asm(start, end);
499 flush_user_icache_range(start,end); 567 if (vma->vm_flags & VM_EXEC)
568 flush_user_icache_range_asm(start, end);
569 } else {
570 unsigned long addr;
571 pgd_t *pgd = vma->vm_mm->pgd;
572
573 for (addr = start & PAGE_MASK; addr < end;
574 addr += PAGE_SIZE) {
575 pte_t *ptep = get_ptep(pgd, addr);
576 if (ptep != NULL) {
577 pte_t pte = *ptep;
578 flush_cache_page(vma,
579 addr, pte_pfn(pte));
580 }
581 }
582 }
500 } else { 583 } else {
584#ifdef CONFIG_SMP
501 flush_cache_all(); 585 flush_cache_all();
586#else
587 flush_cache_all_local();
588#endif
502 } 589 }
503} 590}
504 591
@@ -511,3 +598,67 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long
511 __flush_cache_page(vma, vmaddr, page_to_phys(pfn_to_page(pfn))); 598 __flush_cache_page(vma, vmaddr, page_to_phys(pfn_to_page(pfn)));
512 599
513} 600}
601
602#ifdef CONFIG_PARISC_TMPALIAS
603
604void clear_user_highpage(struct page *page, unsigned long vaddr)
605{
606 void *vto;
607 unsigned long flags;
608
609 /* Clear using TMPALIAS region. The page doesn't need to
610 be flushed but the kernel mapping needs to be purged. */
611
612 vto = kmap_atomic(page, KM_USER0);
613
614 /* The PA-RISC 2.0 Architecture book states on page F-6:
615 "Before a write-capable translation is enabled, *all*
616 non-equivalently-aliased translations must be removed
617 from the page table and purged from the TLB. (Note
618 that the caches are not required to be flushed at this
619 time.) Before any non-equivalent aliased translation
620 is re-enabled, the virtual address range for the writeable
621 page (the entire page) must be flushed from the cache,
622 and the write-capable translation removed from the page
623 table and purged from the TLB." */
624
625 purge_kernel_dcache_page_asm((unsigned long)vto);
626 purge_tlb_start(flags);
627 pdtlb_kernel(vto);
628 purge_tlb_end(flags);
629 preempt_disable();
630 clear_user_page_asm(vto, vaddr);
631 preempt_enable();
632
633 pagefault_enable(); /* kunmap_atomic(addr, KM_USER0); */
634}
635
636void copy_user_highpage(struct page *to, struct page *from,
637 unsigned long vaddr, struct vm_area_struct *vma)
638{
639 void *vfrom, *vto;
640 unsigned long flags;
641
642 /* Copy using TMPALIAS region. This has the advantage
643 that the `from' page doesn't need to be flushed. However,
644 the `to' page must be flushed in copy_user_page_asm since
645 it can be used to bring in executable code. */
646
647 vfrom = kmap_atomic(from, KM_USER0);
648 vto = kmap_atomic(to, KM_USER1);
649
650 purge_kernel_dcache_page_asm((unsigned long)vto);
651 purge_tlb_start(flags);
652 pdtlb_kernel(vto);
653 pdtlb_kernel(vfrom);
654 purge_tlb_end(flags);
655 preempt_disable();
656 copy_user_page_asm(vto, vfrom, vaddr);
657 flush_dcache_page_asm(__pa(vto), vaddr);
658 preempt_enable();
659
660 pagefault_enable(); /* kunmap_atomic(addr, KM_USER1); */
661 pagefault_enable(); /* kunmap_atomic(addr, KM_USER0); */
662}
663
664#endif /* CONFIG_PARISC_TMPALIAS */
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index eb7850b46c25..7c9648919c91 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -483,7 +483,7 @@
483 * B <-> _PAGE_DMB (memory break) 483 * B <-> _PAGE_DMB (memory break)
484 * 484 *
485 * Then incredible subtlety: The access rights are 485 * Then incredible subtlety: The access rights are
486 * _PAGE_GATEWAY _PAGE_EXEC _PAGE_READ 486 * _PAGE_GATEWAY, _PAGE_EXEC and _PAGE_WRITE
487 * See 3-14 of the parisc 2.0 manual 487 * See 3-14 of the parisc 2.0 manual
488 * 488 *
489 * Finally, _PAGE_READ goes in the top bit of PL1 (so we 489 * Finally, _PAGE_READ goes in the top bit of PL1 (so we
@@ -493,7 +493,7 @@
493 493
494 /* PAGE_USER indicates the page can be read with user privileges, 494 /* PAGE_USER indicates the page can be read with user privileges,
495 * so deposit X1|11 to PL1|PL2 (remember the upper bit of PL1 495 * so deposit X1|11 to PL1|PL2 (remember the upper bit of PL1
496 * contains _PAGE_READ */ 496 * contains _PAGE_READ) */
497 extrd,u,*= \pte,_PAGE_USER_BIT+32,1,%r0 497 extrd,u,*= \pte,_PAGE_USER_BIT+32,1,%r0
498 depdi 7,11,3,\prot 498 depdi 7,11,3,\prot
499 /* If we're a gateway page, drop PL2 back to zero for promotion 499 /* If we're a gateway page, drop PL2 back to zero for promotion
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c
index 08324aac3544..3295ef4a185d 100644
--- a/arch/parisc/kernel/inventory.c
+++ b/arch/parisc/kernel/inventory.c
@@ -186,12 +186,14 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
186 186
187 if (status != PDC_OK) { 187 if (status != PDC_OK) {
188 /* no more cell modules or error */ 188 /* no more cell modules or error */
189 kfree(pa_pdc_cell);
189 return status; 190 return status;
190 } 191 }
191 192
192 temp = pa_pdc_cell->cba; 193 temp = pa_pdc_cell->cba;
193 dev = alloc_pa_dev(PAT_GET_CBA(temp), &(pa_pdc_cell->mod_path)); 194 dev = alloc_pa_dev(PAT_GET_CBA(temp), &(pa_pdc_cell->mod_path));
194 if (!dev) { 195 if (!dev) {
196 kfree(pa_pdc_cell);
195 return PDC_OK; 197 return PDC_OK;
196 } 198 }
197 199
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 0299d63cd112..8094d3ed3b64 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -379,14 +379,14 @@ void do_cpu_irq_mask(struct pt_regs *regs)
379static struct irqaction timer_action = { 379static struct irqaction timer_action = {
380 .handler = timer_interrupt, 380 .handler = timer_interrupt,
381 .name = "timer", 381 .name = "timer",
382 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL, 382 .flags = IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL,
383}; 383};
384 384
385#ifdef CONFIG_SMP 385#ifdef CONFIG_SMP
386static struct irqaction ipi_action = { 386static struct irqaction ipi_action = {
387 .handler = ipi_interrupt, 387 .handler = ipi_interrupt,
388 .name = "IPI", 388 .name = "IPI",
389 .flags = IRQF_DISABLED | IRQF_PERCPU, 389 .flags = IRQF_PERCPU,
390}; 390};
391#endif 391#endif
392 392
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 5d7218ad885c..312b48422a56 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -199,7 +199,6 @@ ENTRY(flush_instruction_cache_local)
199 .callinfo NO_CALLS 199 .callinfo NO_CALLS
200 .entry 200 .entry
201 201
202 mtsp %r0, %sr1
203 load32 cache_info, %r1 202 load32 cache_info, %r1
204 203
205 /* Flush Instruction Cache */ 204 /* Flush Instruction Cache */
@@ -208,7 +207,8 @@ ENTRY(flush_instruction_cache_local)
208 LDREG ICACHE_STRIDE(%r1), %arg1 207 LDREG ICACHE_STRIDE(%r1), %arg1
209 LDREG ICACHE_COUNT(%r1), %arg2 208 LDREG ICACHE_COUNT(%r1), %arg2
210 LDREG ICACHE_LOOP(%r1), %arg3 209 LDREG ICACHE_LOOP(%r1), %arg3
211 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/ 210 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
211 mtsp %r0, %sr1
212 addib,COND(=) -1, %arg3, fioneloop /* Preadjust and test */ 212 addib,COND(=) -1, %arg3, fioneloop /* Preadjust and test */
213 movb,<,n %arg3, %r31, fisync /* If loop < 0, do sync */ 213 movb,<,n %arg3, %r31, fisync /* If loop < 0, do sync */
214 214
@@ -220,7 +220,33 @@ fimanyloop: /* Loop if LOOP >= 2 */
220 addib,COND(<=),n -1, %arg2, fisync /* Outer loop decr */ 220 addib,COND(<=),n -1, %arg2, fisync /* Outer loop decr */
221 221
222fioneloop: /* Loop if LOOP = 1 */ 222fioneloop: /* Loop if LOOP = 1 */
223 addib,COND(>) -1, %arg2, fioneloop /* Outer loop count decr */ 223 /* Some implementations may flush with a single fice instruction */
224 cmpib,COND(>>=),n 15, %arg2, fioneloop2
225
226fioneloop1:
227 fice,m %arg1(%sr1, %arg0)
228 fice,m %arg1(%sr1, %arg0)
229 fice,m %arg1(%sr1, %arg0)
230 fice,m %arg1(%sr1, %arg0)
231 fice,m %arg1(%sr1, %arg0)
232 fice,m %arg1(%sr1, %arg0)
233 fice,m %arg1(%sr1, %arg0)
234 fice,m %arg1(%sr1, %arg0)
235 fice,m %arg1(%sr1, %arg0)
236 fice,m %arg1(%sr1, %arg0)
237 fice,m %arg1(%sr1, %arg0)
238 fice,m %arg1(%sr1, %arg0)
239 fice,m %arg1(%sr1, %arg0)
240 fice,m %arg1(%sr1, %arg0)
241 fice,m %arg1(%sr1, %arg0)
242 addib,COND(>) -16, %arg2, fioneloop1
243 fice,m %arg1(%sr1, %arg0)
244
245 /* Check if done */
246 cmpb,COND(=),n %arg2, %r0, fisync /* Predict branch taken */
247
248fioneloop2:
249 addib,COND(>) -1, %arg2, fioneloop2 /* Outer loop count decr */
224 fice,m %arg1(%sr1, %arg0) /* Fice for one loop */ 250 fice,m %arg1(%sr1, %arg0) /* Fice for one loop */
225 251
226fisync: 252fisync:
@@ -240,8 +266,7 @@ ENTRY(flush_data_cache_local)
240 .callinfo NO_CALLS 266 .callinfo NO_CALLS
241 .entry 267 .entry
242 268
243 mtsp %r0, %sr1 269 load32 cache_info, %r1
244 load32 cache_info, %r1
245 270
246 /* Flush Data Cache */ 271 /* Flush Data Cache */
247 272
@@ -249,7 +274,8 @@ ENTRY(flush_data_cache_local)
249 LDREG DCACHE_STRIDE(%r1), %arg1 274 LDREG DCACHE_STRIDE(%r1), %arg1
250 LDREG DCACHE_COUNT(%r1), %arg2 275 LDREG DCACHE_COUNT(%r1), %arg2
251 LDREG DCACHE_LOOP(%r1), %arg3 276 LDREG DCACHE_LOOP(%r1), %arg3
252 rsm PSW_SM_I, %r22 277 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
278 mtsp %r0, %sr1
253 addib,COND(=) -1, %arg3, fdoneloop /* Preadjust and test */ 279 addib,COND(=) -1, %arg3, fdoneloop /* Preadjust and test */
254 movb,<,n %arg3, %r31, fdsync /* If loop < 0, do sync */ 280 movb,<,n %arg3, %r31, fdsync /* If loop < 0, do sync */
255 281
@@ -261,7 +287,33 @@ fdmanyloop: /* Loop if LOOP >= 2 */
261 addib,COND(<=),n -1, %arg2, fdsync /* Outer loop decr */ 287 addib,COND(<=),n -1, %arg2, fdsync /* Outer loop decr */
262 288
263fdoneloop: /* Loop if LOOP = 1 */ 289fdoneloop: /* Loop if LOOP = 1 */
264 addib,COND(>) -1, %arg2, fdoneloop /* Outer loop count decr */ 290 /* Some implementations may flush with a single fdce instruction */
291 cmpib,COND(>>=),n 15, %arg2, fdoneloop2
292
293fdoneloop1:
294 fdce,m %arg1(%sr1, %arg0)
295 fdce,m %arg1(%sr1, %arg0)
296 fdce,m %arg1(%sr1, %arg0)
297 fdce,m %arg1(%sr1, %arg0)
298 fdce,m %arg1(%sr1, %arg0)
299 fdce,m %arg1(%sr1, %arg0)
300 fdce,m %arg1(%sr1, %arg0)
301 fdce,m %arg1(%sr1, %arg0)
302 fdce,m %arg1(%sr1, %arg0)
303 fdce,m %arg1(%sr1, %arg0)
304 fdce,m %arg1(%sr1, %arg0)
305 fdce,m %arg1(%sr1, %arg0)
306 fdce,m %arg1(%sr1, %arg0)
307 fdce,m %arg1(%sr1, %arg0)
308 fdce,m %arg1(%sr1, %arg0)
309 addib,COND(>) -16, %arg2, fdoneloop1
310 fdce,m %arg1(%sr1, %arg0)
311
312 /* Check if done */
313 cmpb,COND(=),n %arg2, %r0, fdsync /* Predict branch taken */
314
315fdoneloop2:
316 addib,COND(>) -1, %arg2, fdoneloop2 /* Outer loop count decr */
265 fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */ 317 fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */
266 318
267fdsync: 319fdsync:
@@ -277,7 +329,104 @@ ENDPROC(flush_data_cache_local)
277 329
278 .align 16 330 .align 16
279 331
280ENTRY(copy_user_page_asm) 332/* Macros to serialize TLB purge operations on SMP. */
333
334 .macro tlb_lock la,flags,tmp
335#ifdef CONFIG_SMP
336 ldil L%pa_tlb_lock,%r1
337 ldo R%pa_tlb_lock(%r1),\la
338 rsm PSW_SM_I,\flags
3391: LDCW 0(\la),\tmp
340 cmpib,<>,n 0,\tmp,3f
3412: ldw 0(\la),\tmp
342 cmpb,<> %r0,\tmp,1b
343 nop
344 b,n 2b
3453:
346#endif
347 .endm
348
349 .macro tlb_unlock la,flags,tmp
350#ifdef CONFIG_SMP
351 ldi 1,\tmp
352 stw \tmp,0(\la)
353 mtsm \flags
354#endif
355 .endm
356
357/* Clear page using kernel mapping. */
358
359ENTRY(clear_page_asm)
360 .proc
361 .callinfo NO_CALLS
362 .entry
363
364#ifdef CONFIG_64BIT
365
366 /* Unroll the loop. */
367 ldi (PAGE_SIZE / 128), %r1
368
3691:
370 std %r0, 0(%r26)
371 std %r0, 8(%r26)
372 std %r0, 16(%r26)
373 std %r0, 24(%r26)
374 std %r0, 32(%r26)
375 std %r0, 40(%r26)
376 std %r0, 48(%r26)
377 std %r0, 56(%r26)
378 std %r0, 64(%r26)
379 std %r0, 72(%r26)
380 std %r0, 80(%r26)
381 std %r0, 88(%r26)
382 std %r0, 96(%r26)
383 std %r0, 104(%r26)
384 std %r0, 112(%r26)
385 std %r0, 120(%r26)
386
387 /* Note reverse branch hint for addib is taken. */
388 addib,COND(>),n -1, %r1, 1b
389 ldo 128(%r26), %r26
390
391#else
392
393 /*
394 * Note that until (if) we start saving the full 64-bit register
395 * values on interrupt, we can't use std on a 32 bit kernel.
396 */
397 ldi (PAGE_SIZE / 64), %r1
398
3991:
400 stw %r0, 0(%r26)
401 stw %r0, 4(%r26)
402 stw %r0, 8(%r26)
403 stw %r0, 12(%r26)
404 stw %r0, 16(%r26)
405 stw %r0, 20(%r26)
406 stw %r0, 24(%r26)
407 stw %r0, 28(%r26)
408 stw %r0, 32(%r26)
409 stw %r0, 36(%r26)
410 stw %r0, 40(%r26)
411 stw %r0, 44(%r26)
412 stw %r0, 48(%r26)
413 stw %r0, 52(%r26)
414 stw %r0, 56(%r26)
415 stw %r0, 60(%r26)
416
417 addib,COND(>),n -1, %r1, 1b
418 ldo 64(%r26), %r26
419#endif
420 bv %r0(%r2)
421 nop
422 .exit
423
424 .procend
425ENDPROC(clear_page_asm)
426
427/* Copy page using kernel mapping. */
428
429ENTRY(copy_page_asm)
281 .proc 430 .proc
282 .callinfo NO_CALLS 431 .callinfo NO_CALLS
283 .entry 432 .entry
@@ -285,18 +434,14 @@ ENTRY(copy_user_page_asm)
285#ifdef CONFIG_64BIT 434#ifdef CONFIG_64BIT
286 /* PA8x00 CPUs can consume 2 loads or 1 store per cycle. 435 /* PA8x00 CPUs can consume 2 loads or 1 store per cycle.
287 * Unroll the loop by hand and arrange insn appropriately. 436 * Unroll the loop by hand and arrange insn appropriately.
288 * GCC probably can do this just as well. 437 * Prefetch doesn't improve performance on rp3440.
438 * GCC probably can do this just as well...
289 */ 439 */
290 440
291 ldd 0(%r25), %r19
292 ldi (PAGE_SIZE / 128), %r1 441 ldi (PAGE_SIZE / 128), %r1
293 442
294 ldw 64(%r25), %r0 /* prefetch 1 cacheline ahead */ 4431: ldd 0(%r25), %r19
295 ldw 128(%r25), %r0 /* prefetch 2 */ 444 ldd 8(%r25), %r20
296
2971: ldd 8(%r25), %r20
298 ldw 192(%r25), %r0 /* prefetch 3 */
299 ldw 256(%r25), %r0 /* prefetch 4 */
300 445
301 ldd 16(%r25), %r21 446 ldd 16(%r25), %r21
302 ldd 24(%r25), %r22 447 ldd 24(%r25), %r22
@@ -330,20 +475,16 @@ ENTRY(copy_user_page_asm)
330 475
331 ldd 112(%r25), %r21 476 ldd 112(%r25), %r21
332 ldd 120(%r25), %r22 477 ldd 120(%r25), %r22
478 ldo 128(%r25), %r25
333 std %r19, 96(%r26) 479 std %r19, 96(%r26)
334 std %r20, 104(%r26) 480 std %r20, 104(%r26)
335 481
336 ldo 128(%r25), %r25
337 std %r21, 112(%r26) 482 std %r21, 112(%r26)
338 std %r22, 120(%r26) 483 std %r22, 120(%r26)
339 ldo 128(%r26), %r26
340 484
341 /* conditional branches nullify on forward taken branch, and on 485 /* Note reverse branch hint for addib is taken. */
342 * non-taken backward branch. Note that .+4 is a backwards branch. 486 addib,COND(>),n -1, %r1, 1b
343 * The ldd should only get executed if the branch is taken. 487 ldo 128(%r26), %r26
344 */
345 addib,COND(>),n -1, %r1, 1b /* bundle 10 */
346 ldd 0(%r25), %r19 /* start next loads */
347 488
348#else 489#else
349 490
@@ -399,7 +540,7 @@ ENTRY(copy_user_page_asm)
399 .exit 540 .exit
400 541
401 .procend 542 .procend
402ENDPROC(copy_user_page_asm) 543ENDPROC(copy_page_asm)
403 544
404/* 545/*
405 * NOTE: Code in clear_user_page has a hard coded dependency on the 546 * NOTE: Code in clear_user_page has a hard coded dependency on the
@@ -422,8 +563,6 @@ ENDPROC(copy_user_page_asm)
422 * %r23 physical page (shifted for tlb insert) of "from" translation 563 * %r23 physical page (shifted for tlb insert) of "from" translation
423 */ 564 */
424 565
425#if 0
426
427 /* 566 /*
428 * We can't do this since copy_user_page is used to bring in 567 * We can't do this since copy_user_page is used to bring in
429 * file data that might have instructions. Since the data would 568 * file data that might have instructions. Since the data would
@@ -435,6 +574,7 @@ ENDPROC(copy_user_page_asm)
435 * use it if more information is passed into copy_user_page(). 574 * use it if more information is passed into copy_user_page().
436 * Have to do some measurements to see if it is worthwhile to 575 * Have to do some measurements to see if it is worthwhile to
437 * lobby for such a change. 576 * lobby for such a change.
577 *
438 */ 578 */
439 579
440ENTRY(copy_user_page_asm) 580ENTRY(copy_user_page_asm)
@@ -442,16 +582,21 @@ ENTRY(copy_user_page_asm)
442 .callinfo NO_CALLS 582 .callinfo NO_CALLS
443 .entry 583 .entry
444 584
585 /* Convert virtual `to' and `from' addresses to physical addresses.
586 Move `from' physical address to non shadowed register. */
445 ldil L%(__PAGE_OFFSET), %r1 587 ldil L%(__PAGE_OFFSET), %r1
446 sub %r26, %r1, %r26 588 sub %r26, %r1, %r26
447 sub %r25, %r1, %r23 /* move physical addr into non shadowed reg */ 589 sub %r25, %r1, %r23
448 590
449 ldil L%(TMPALIAS_MAP_START), %r28 591 ldil L%(TMPALIAS_MAP_START), %r28
450 /* FIXME for different page sizes != 4k */ 592 /* FIXME for different page sizes != 4k */
451#ifdef CONFIG_64BIT 593#ifdef CONFIG_64BIT
452 extrd,u %r26,56,32, %r26 /* convert phys addr to tlb insert format */ 594#if (TMPALIAS_MAP_START >= 0x80000000)
453 extrd,u %r23,56,32, %r23 /* convert phys addr to tlb insert format */ 595 depdi 0, 31,32, %r28 /* clear any sign extension */
454 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */ 596#endif
597 extrd,u %r26,56,32, %r26 /* convert phys addr to tlb insert format */
598 extrd,u %r23,56,32, %r23 /* convert phys addr to tlb insert format */
599 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */
455 depdi 0, 63,12, %r28 /* Clear any offset bits */ 600 depdi 0, 63,12, %r28 /* Clear any offset bits */
456 copy %r28, %r29 601 copy %r28, %r29
457 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */ 602 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */
@@ -466,10 +611,76 @@ ENTRY(copy_user_page_asm)
466 611
467 /* Purge any old translations */ 612 /* Purge any old translations */
468 613
614#ifdef CONFIG_PA20
615 pdtlb,l 0(%r28)
616 pdtlb,l 0(%r29)
617#else
618 tlb_lock %r20,%r21,%r22
469 pdtlb 0(%r28) 619 pdtlb 0(%r28)
470 pdtlb 0(%r29) 620 pdtlb 0(%r29)
621 tlb_unlock %r20,%r21,%r22
622#endif
623
624#ifdef CONFIG_64BIT
625 /* PA8x00 CPUs can consume 2 loads or 1 store per cycle.
626 * Unroll the loop by hand and arrange insn appropriately.
627 * GCC probably can do this just as well.
628 */
471 629
472 ldi 64, %r1 630 ldd 0(%r29), %r19
631 ldi (PAGE_SIZE / 128), %r1
632
6331: ldd 8(%r29), %r20
634
635 ldd 16(%r29), %r21
636 ldd 24(%r29), %r22
637 std %r19, 0(%r28)
638 std %r20, 8(%r28)
639
640 ldd 32(%r29), %r19
641 ldd 40(%r29), %r20
642 std %r21, 16(%r28)
643 std %r22, 24(%r28)
644
645 ldd 48(%r29), %r21
646 ldd 56(%r29), %r22
647 std %r19, 32(%r28)
648 std %r20, 40(%r28)
649
650 ldd 64(%r29), %r19
651 ldd 72(%r29), %r20
652 std %r21, 48(%r28)
653 std %r22, 56(%r28)
654
655 ldd 80(%r29), %r21
656 ldd 88(%r29), %r22
657 std %r19, 64(%r28)
658 std %r20, 72(%r28)
659
660 ldd 96(%r29), %r19
661 ldd 104(%r29), %r20
662 std %r21, 80(%r28)
663 std %r22, 88(%r28)
664
665 ldd 112(%r29), %r21
666 ldd 120(%r29), %r22
667 std %r19, 96(%r28)
668 std %r20, 104(%r28)
669
670 ldo 128(%r29), %r29
671 std %r21, 112(%r28)
672 std %r22, 120(%r28)
673 ldo 128(%r28), %r28
674
675 /* conditional branches nullify on forward taken branch, and on
676 * non-taken backward branch. Note that .+4 is a backwards branch.
677 * The ldd should only get executed if the branch is taken.
678 */
679 addib,COND(>),n -1, %r1, 1b /* bundle 10 */
680 ldd 0(%r29), %r19 /* start next loads */
681
682#else
683 ldi (PAGE_SIZE / 64), %r1
473 684
474 /* 685 /*
475 * This loop is optimized for PCXL/PCXL2 ldw/ldw and stw/stw 686 * This loop is optimized for PCXL/PCXL2 ldw/ldw and stw/stw
@@ -480,9 +691,7 @@ ENTRY(copy_user_page_asm)
480 * use ldd/std on a 32 bit kernel. 691 * use ldd/std on a 32 bit kernel.
481 */ 692 */
482 693
483 6941: ldw 0(%r29), %r19
4841:
485 ldw 0(%r29), %r19
486 ldw 4(%r29), %r20 695 ldw 4(%r29), %r20
487 ldw 8(%r29), %r21 696 ldw 8(%r29), %r21
488 ldw 12(%r29), %r22 697 ldw 12(%r29), %r22
@@ -515,8 +724,10 @@ ENTRY(copy_user_page_asm)
515 stw %r21, 56(%r28) 724 stw %r21, 56(%r28)
516 stw %r22, 60(%r28) 725 stw %r22, 60(%r28)
517 ldo 64(%r28), %r28 726 ldo 64(%r28), %r28
727
518 addib,COND(>) -1, %r1,1b 728 addib,COND(>) -1, %r1,1b
519 ldo 64(%r29), %r29 729 ldo 64(%r29), %r29
730#endif
520 731
521 bv %r0(%r2) 732 bv %r0(%r2)
522 nop 733 nop
@@ -524,9 +735,8 @@ ENTRY(copy_user_page_asm)
524 735
525 .procend 736 .procend
526ENDPROC(copy_user_page_asm) 737ENDPROC(copy_user_page_asm)
527#endif
528 738
529ENTRY(__clear_user_page_asm) 739ENTRY(clear_user_page_asm)
530 .proc 740 .proc
531 .callinfo NO_CALLS 741 .callinfo NO_CALLS
532 .entry 742 .entry
@@ -550,7 +760,13 @@ ENTRY(__clear_user_page_asm)
550 760
551 /* Purge any old translation */ 761 /* Purge any old translation */
552 762
763#ifdef CONFIG_PA20
764 pdtlb,l 0(%r28)
765#else
766 tlb_lock %r20,%r21,%r22
553 pdtlb 0(%r28) 767 pdtlb 0(%r28)
768 tlb_unlock %r20,%r21,%r22
769#endif
554 770
555#ifdef CONFIG_64BIT 771#ifdef CONFIG_64BIT
556 ldi (PAGE_SIZE / 128), %r1 772 ldi (PAGE_SIZE / 128), %r1
@@ -580,8 +796,7 @@ ENTRY(__clear_user_page_asm)
580#else /* ! CONFIG_64BIT */ 796#else /* ! CONFIG_64BIT */
581 ldi (PAGE_SIZE / 64), %r1 797 ldi (PAGE_SIZE / 64), %r1
582 798
5831: 7991: stw %r0, 0(%r28)
584 stw %r0, 0(%r28)
585 stw %r0, 4(%r28) 800 stw %r0, 4(%r28)
586 stw %r0, 8(%r28) 801 stw %r0, 8(%r28)
587 stw %r0, 12(%r28) 802 stw %r0, 12(%r28)
@@ -606,7 +821,7 @@ ENTRY(__clear_user_page_asm)
606 .exit 821 .exit
607 822
608 .procend 823 .procend
609ENDPROC(__clear_user_page_asm) 824ENDPROC(clear_user_page_asm)
610 825
611ENTRY(flush_dcache_page_asm) 826ENTRY(flush_dcache_page_asm)
612 .proc 827 .proc
@@ -630,7 +845,13 @@ ENTRY(flush_dcache_page_asm)
630 845
631 /* Purge any old translation */ 846 /* Purge any old translation */
632 847
848#ifdef CONFIG_PA20
849 pdtlb,l 0(%r28)
850#else
851 tlb_lock %r20,%r21,%r22
633 pdtlb 0(%r28) 852 pdtlb 0(%r28)
853 tlb_unlock %r20,%r21,%r22
854#endif
634 855
635 ldil L%dcache_stride, %r1 856 ldil L%dcache_stride, %r1
636 ldw R%dcache_stride(%r1), %r1 857 ldw R%dcache_stride(%r1), %r1
@@ -663,8 +884,17 @@ ENTRY(flush_dcache_page_asm)
663 fdc,m %r1(%r28) 884 fdc,m %r1(%r28)
664 885
665 sync 886 sync
887
888#ifdef CONFIG_PA20
889 pdtlb,l 0(%r25)
890#else
891 tlb_lock %r20,%r21,%r22
892 pdtlb 0(%r25)
893 tlb_unlock %r20,%r21,%r22
894#endif
895
666 bv %r0(%r2) 896 bv %r0(%r2)
667 pdtlb (%r25) 897 nop
668 .exit 898 .exit
669 899
670 .procend 900 .procend
@@ -692,7 +922,13 @@ ENTRY(flush_icache_page_asm)
692 922
693 /* Purge any old translation */ 923 /* Purge any old translation */
694 924
695 pitlb (%sr4,%r28) 925#ifdef CONFIG_PA20
926 pitlb,l %r0(%sr4,%r28)
927#else
928 tlb_lock %r20,%r21,%r22
929 pitlb (%sr4,%r28)
930 tlb_unlock %r20,%r21,%r22
931#endif
696 932
697 ldil L%icache_stride, %r1 933 ldil L%icache_stride, %r1
698 ldw R%icache_stride(%r1), %r1 934 ldw R%icache_stride(%r1), %r1
@@ -727,8 +963,17 @@ ENTRY(flush_icache_page_asm)
727 fic,m %r1(%sr4,%r28) 963 fic,m %r1(%sr4,%r28)
728 964
729 sync 965 sync
966
967#ifdef CONFIG_PA20
968 pitlb,l %r0(%sr4,%r25)
969#else
970 tlb_lock %r20,%r21,%r22
971 pitlb (%sr4,%r25)
972 tlb_unlock %r20,%r21,%r22
973#endif
974
730 bv %r0(%r2) 975 bv %r0(%r2)
731 pitlb (%sr4,%r25) 976 nop
732 .exit 977 .exit
733 978
734 .procend 979 .procend
@@ -777,7 +1022,7 @@ ENTRY(flush_kernel_dcache_page_asm)
777 .procend 1022 .procend
778ENDPROC(flush_kernel_dcache_page_asm) 1023ENDPROC(flush_kernel_dcache_page_asm)
779 1024
780ENTRY(purge_kernel_dcache_page) 1025ENTRY(purge_kernel_dcache_page_asm)
781 .proc 1026 .proc
782 .callinfo NO_CALLS 1027 .callinfo NO_CALLS
783 .entry 1028 .entry
@@ -817,7 +1062,7 @@ ENTRY(purge_kernel_dcache_page)
817 .exit 1062 .exit
818 1063
819 .procend 1064 .procend
820ENDPROC(purge_kernel_dcache_page) 1065ENDPROC(purge_kernel_dcache_page_asm)
821 1066
822ENTRY(flush_user_dcache_range_asm) 1067ENTRY(flush_user_dcache_range_asm)
823 .proc 1068 .proc
diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c
index ceec85de6290..6795dc6c995f 100644
--- a/arch/parisc/kernel/parisc_ksyms.c
+++ b/arch/parisc/kernel/parisc_ksyms.c
@@ -157,5 +157,6 @@ extern void _mcount(void);
157EXPORT_SYMBOL(_mcount); 157EXPORT_SYMBOL(_mcount);
158#endif 158#endif
159 159
160/* from pacache.S -- needed for copy_page */ 160/* from pacache.S -- needed for clear/copy_page */
161EXPORT_SYMBOL(copy_user_page_asm); 161EXPORT_SYMBOL(clear_page_asm);
162EXPORT_SYMBOL(copy_page_asm);
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index fd051705a407..52c85b2f502e 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -312,7 +312,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
312#if DEBUG_SIG 312#if DEBUG_SIG
313 /* Assert that we're flushing in the correct space... */ 313 /* Assert that we're flushing in the correct space... */
314 { 314 {
315 int sid; 315 unsigned long sid;
316 asm ("mfsp %%sr3,%0" : "=r" (sid)); 316 asm ("mfsp %%sr3,%0" : "=r" (sid));
317 DBG(1,"setup_rt_frame: Flushing 64 bytes at space %#x offset %p\n", 317 DBG(1,"setup_rt_frame: Flushing 64 bytes at space %#x offset %p\n",
318 sid, frame->tramp); 318 sid, frame->tramp);
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index 5dede04f2f3e..2ddcabb616ce 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -65,7 +65,7 @@ put_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
65{ 65{
66 compat_sigset_t s; 66 compat_sigset_t s;
67 67
68 if (sz != sizeof *set) 68 if (sz != sizeof(compat_sigset_t))
69 return -EINVAL; 69 return -EINVAL;
70 sigset_64to32(&s, set); 70 sigset_64to32(&s, set);
71 71
@@ -78,7 +78,7 @@ get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz)
78 compat_sigset_t s; 78 compat_sigset_t s;
79 int r; 79 int r;
80 80
81 if (sz != sizeof *set) 81 if (sz != sizeof(compat_sigset_t))
82 return -EINVAL; 82 return -EINVAL;
83 83
84 if ((r = copy_from_user(&s, up, sz)) == 0) { 84 if ((r = copy_from_user(&s, up, sz)) == 0) {
@@ -94,8 +94,11 @@ int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set, compat_sigset_t _
94 sigset_t old_set, new_set; 94 sigset_t old_set, new_set;
95 int ret; 95 int ret;
96 96
97 if (set && get_sigset32(set, &new_set, sigsetsize)) 97 if (set) {
98 return -EFAULT; 98 ret = get_sigset32(set, &new_set, sigsetsize);
99 if (ret)
100 return ret;
101 }
99 102
100 KERNEL_SYSCALL(ret, sys_rt_sigprocmask, how, set ? (sigset_t __user *)&new_set : NULL, 103 KERNEL_SYSCALL(ret, sys_rt_sigprocmask, how, set ? (sigset_t __user *)&new_set : NULL,
101 oset ? (sigset_t __user *)&old_set : NULL, sigsetsize); 104 oset ? (sigset_t __user *)&old_set : NULL, sigsetsize);
@@ -128,6 +131,10 @@ sys32_rt_sigaction(int sig, const struct sigaction32 __user *act, struct sigacti
128 struct k_sigaction new_sa, old_sa; 131 struct k_sigaction new_sa, old_sa;
129 int ret = -EINVAL; 132 int ret = -EINVAL;
130 133
134 /* XXX: Don't preclude handling different sized sigset_t's. */
135 if (sigsetsize != sizeof(compat_sigset_t))
136 return -EINVAL;
137
131 if (act) { 138 if (act) {
132 if (copy_from_user(&new_sa32.sa, act, sizeof new_sa32.sa)) 139 if (copy_from_user(&new_sa32.sa, act, sizeof new_sa32.sa))
133 return -EFAULT; 140 return -EFAULT;
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index f76c10863c62..54d619d4cac6 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -94,11 +94,12 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
94{ 94{
95 if (len > TASK_SIZE) 95 if (len > TASK_SIZE)
96 return -ENOMEM; 96 return -ENOMEM;
97 /* Might want to check for cache aliasing issues for MAP_FIXED case 97 if (flags & MAP_FIXED) {
98 * like ARM or MIPS ??? --BenH. 98 if ((flags & MAP_SHARED) &&
99 */ 99 (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
100 if (flags & MAP_FIXED) 100 return -EINVAL;
101 return addr; 101 return addr;
102 }
102 if (!addr) 103 if (!addr)
103 addr = TASK_UNMAPPED_BASE; 104 addr = TASK_UNMAPPED_BASE;
104 105
@@ -212,6 +213,13 @@ asmlinkage long parisc_sync_file_range(int fd,
212 (loff_t)hi_nbytes << 32 | lo_nbytes, flags); 213 (loff_t)hi_nbytes << 32 | lo_nbytes, flags);
213} 214}
214 215
216asmlinkage long parisc_fallocate(int fd, int mode, u32 offhi, u32 offlo,
217 u32 lenhi, u32 lenlo)
218{
219 return sys_fallocate(fd, mode, ((u64)offhi << 32) | offlo,
220 ((u64)lenhi << 32) | lenlo);
221}
222
215asmlinkage unsigned long sys_alloc_hugepages(int key, unsigned long addr, unsigned long len, int prot, int flag) 223asmlinkage unsigned long sys_alloc_hugepages(int key, unsigned long addr, unsigned long len, int prot, int flag)
216{ 224{
217 return -ENOMEM; 225 return -ENOMEM;
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index 9cfdaa19ab63..eca69bb8ef5f 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -21,7 +21,6 @@
21#include <linux/time.h> 21#include <linux/time.h>
22#include <linux/smp.h> 22#include <linux/smp.h>
23#include <linux/sem.h> 23#include <linux/sem.h>
24#include <linux/msg.h>
25#include <linux/shm.h> 24#include <linux/shm.h>
26#include <linux/slab.h> 25#include <linux/slab.h>
27#include <linux/uio.h> 26#include <linux/uio.h>
@@ -61,111 +60,23 @@ asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23,
61 return -ENOSYS; 60 return -ENOSYS;
62} 61}
63 62
64asmlinkage long sys32_sched_rr_get_interval(pid_t pid, 63/* Note: it is necessary to treat out_fd and in_fd as unsigned ints, with the
65 struct compat_timespec __user *interval) 64 * corresponding cast to a signed int to insure that the proper conversion
66{ 65 * (sign extension) between the register representation of a signed int (msr in
67 struct timespec t; 66 * 32-bit mode) and the register representation of a signed int (msr in 64-bit
68 int ret; 67 * mode) is performed.
69 68 */
70 KERNEL_SYSCALL(ret, sys_sched_rr_get_interval, pid, (struct timespec __user *)&t); 69asmlinkage long sys32_sendfile(u32 out_fd, u32 in_fd,
71 if (put_compat_timespec(&t, interval)) 70 compat_off_t __user *offset, compat_size_t count)
72 return -EFAULT;
73 return ret;
74}
75
76struct msgbuf32 {
77 int mtype;
78 char mtext[1];
79};
80
81asmlinkage long sys32_msgsnd(int msqid,
82 struct msgbuf32 __user *umsgp32,
83 size_t msgsz, int msgflg)
84{
85 struct msgbuf *mb;
86 struct msgbuf32 mb32;
87 int err;
88
89 if ((mb = kmalloc(msgsz + sizeof *mb + 4, GFP_KERNEL)) == NULL)
90 return -ENOMEM;
91
92 err = get_user(mb32.mtype, &umsgp32->mtype);
93 mb->mtype = mb32.mtype;
94 err |= copy_from_user(mb->mtext, &umsgp32->mtext, msgsz);
95
96 if (err)
97 err = -EFAULT;
98 else
99 KERNEL_SYSCALL(err, sys_msgsnd, msqid, (struct msgbuf __user *)mb, msgsz, msgflg);
100
101 kfree(mb);
102 return err;
103}
104
105asmlinkage long sys32_msgrcv(int msqid,
106 struct msgbuf32 __user *umsgp32,
107 size_t msgsz, long msgtyp, int msgflg)
108{
109 struct msgbuf *mb;
110 struct msgbuf32 mb32;
111 int err, len;
112
113 if ((mb = kmalloc(msgsz + sizeof *mb + 4, GFP_KERNEL)) == NULL)
114 return -ENOMEM;
115
116 KERNEL_SYSCALL(err, sys_msgrcv, msqid, (struct msgbuf __user *)mb, msgsz, msgtyp, msgflg);
117
118 if (err >= 0) {
119 len = err;
120 mb32.mtype = mb->mtype;
121 err = put_user(mb32.mtype, &umsgp32->mtype);
122 err |= copy_to_user(&umsgp32->mtext, mb->mtext, len);
123 if (err)
124 err = -EFAULT;
125 else
126 err = len;
127 }
128
129 kfree(mb);
130 return err;
131}
132
133asmlinkage int sys32_sendfile(int out_fd, int in_fd, compat_off_t __user *offset, s32 count)
134{ 71{
135 mm_segment_t old_fs = get_fs(); 72 return compat_sys_sendfile((int)out_fd, (int)in_fd, offset, count);
136 int ret;
137 off_t of;
138
139 if (offset && get_user(of, offset))
140 return -EFAULT;
141
142 set_fs(KERNEL_DS);
143 ret = sys_sendfile(out_fd, in_fd, offset ? (off_t __user *)&of : NULL, count);
144 set_fs(old_fs);
145
146 if (offset && put_user(of, offset))
147 return -EFAULT;
148
149 return ret;
150} 73}
151 74
152asmlinkage int sys32_sendfile64(int out_fd, int in_fd, compat_loff_t __user *offset, s32 count) 75asmlinkage long sys32_sendfile64(u32 out_fd, u32 in_fd,
76 compat_loff_t __user *offset, compat_size_t count)
153{ 77{
154 mm_segment_t old_fs = get_fs(); 78 return sys_sendfile64((int)out_fd, (int)in_fd,
155 int ret; 79 (loff_t __user *)offset, count);
156 loff_t lof;
157
158 if (offset && get_user(lof, offset))
159 return -EFAULT;
160
161 set_fs(KERNEL_DS);
162 ret = sys_sendfile64(out_fd, in_fd, offset ? (loff_t __user *)&lof : NULL, count);
163 set_fs(old_fs);
164
165 if (offset && put_user(lof, offset))
166 return -EFAULT;
167
168 return ret;
169} 80}
170 81
171 82
@@ -200,13 +111,6 @@ long sys32_lookup_dcookie(u32 cookie_high, u32 cookie_low, char __user *buf,
200 buf, len); 111 buf, len);
201} 112}
202 113
203asmlinkage long compat_sys_fallocate(int fd, int mode, u32 offhi, u32 offlo,
204 u32 lenhi, u32 lenlo)
205{
206 return sys_fallocate(fd, mode, ((loff_t)offhi << 32) | offlo,
207 ((loff_t)lenhi << 32) | lenlo);
208}
209
210asmlinkage long compat_sys_fanotify_mark(int fan_fd, int flags, u32 mask_hi, 114asmlinkage long compat_sys_fanotify_mark(int fan_fd, int flags, u32 mask_hi,
211 u32 mask_lo, int fd, 115 u32 mask_lo, int fd,
212 const char __user *pathname) 116 const char __user *pathname)
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 86742df0b194..5e055240f00b 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -309,10 +309,13 @@ tracesys_next:
309 LDREG TASK_PT_GR25(%r1), %r25 309 LDREG TASK_PT_GR25(%r1), %r25
310 LDREG TASK_PT_GR24(%r1), %r24 310 LDREG TASK_PT_GR24(%r1), %r24
311 LDREG TASK_PT_GR23(%r1), %r23 311 LDREG TASK_PT_GR23(%r1), %r23
312#ifdef CONFIG_64BIT
313 LDREG TASK_PT_GR22(%r1), %r22 312 LDREG TASK_PT_GR22(%r1), %r22
314 LDREG TASK_PT_GR21(%r1), %r21 313 LDREG TASK_PT_GR21(%r1), %r21
314#ifdef CONFIG_64BIT
315 ldo -16(%r30),%r29 /* Reference param save area */ 315 ldo -16(%r30),%r29 /* Reference param save area */
316#else
317 stw %r22, -52(%r30) /* 5th argument */
318 stw %r21, -56(%r30) /* 6th argument */
316#endif 319#endif
317 320
318 comiclr,>>= __NR_Linux_syscalls, %r20, %r0 321 comiclr,>>= __NR_Linux_syscalls, %r20, %r0
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 54d950b067b7..129fd472c471 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -247,10 +247,7 @@
247 ENTRY_SAME(sched_yield) 247 ENTRY_SAME(sched_yield)
248 ENTRY_SAME(sched_get_priority_max) 248 ENTRY_SAME(sched_get_priority_max)
249 ENTRY_SAME(sched_get_priority_min) /* 160 */ 249 ENTRY_SAME(sched_get_priority_min) /* 160 */
250 /* These 2 would've worked if someone had defined struct timespec 250 ENTRY_COMP(sched_rr_get_interval)
251 * carefully, like timeval for example (which is about the same).
252 * Unfortunately it contains a long :-( */
253 ENTRY_DIFF(sched_rr_get_interval)
254 ENTRY_COMP(nanosleep) 251 ENTRY_COMP(nanosleep)
255 ENTRY_SAME(mremap) 252 ENTRY_SAME(mremap)
256 ENTRY_SAME(setresuid) 253 ENTRY_SAME(setresuid)
@@ -286,8 +283,8 @@
286 ENTRY_SAME(semop) /* 185 */ 283 ENTRY_SAME(semop) /* 185 */
287 ENTRY_SAME(semget) 284 ENTRY_SAME(semget)
288 ENTRY_DIFF(semctl) 285 ENTRY_DIFF(semctl)
289 ENTRY_DIFF(msgsnd) 286 ENTRY_COMP(msgsnd)
290 ENTRY_DIFF(msgrcv) 287 ENTRY_COMP(msgrcv)
291 ENTRY_SAME(msgget) /* 190 */ 288 ENTRY_SAME(msgget) /* 190 */
292 ENTRY_SAME(msgctl) 289 ENTRY_SAME(msgctl)
293 ENTRY_SAME(shmat) 290 ENTRY_SAME(shmat)
@@ -307,7 +304,7 @@
307 ENTRY_SAME(gettid) 304 ENTRY_SAME(gettid)
308 ENTRY_OURS(readahead) 305 ENTRY_OURS(readahead)
309 ENTRY_SAME(tkill) 306 ENTRY_SAME(tkill)
310 ENTRY_SAME(sendfile64) 307 ENTRY_DIFF(sendfile64)
311 ENTRY_COMP(futex) /* 210 */ 308 ENTRY_COMP(futex) /* 210 */
312 ENTRY_COMP(sched_setaffinity) 309 ENTRY_COMP(sched_setaffinity)
313 ENTRY_COMP(sched_getaffinity) 310 ENTRY_COMP(sched_getaffinity)
@@ -327,12 +324,12 @@
327 ENTRY_SAME(epoll_wait) 324 ENTRY_SAME(epoll_wait)
328 ENTRY_SAME(remap_file_pages) 325 ENTRY_SAME(remap_file_pages)
329 ENTRY_SAME(semtimedop) 326 ENTRY_SAME(semtimedop)
330 ENTRY_SAME(mq_open) 327 ENTRY_COMP(mq_open)
331 ENTRY_SAME(mq_unlink) /* 230 */ 328 ENTRY_SAME(mq_unlink) /* 230 */
332 ENTRY_SAME(mq_timedsend) 329 ENTRY_COMP(mq_timedsend)
333 ENTRY_SAME(mq_timedreceive) 330 ENTRY_COMP(mq_timedreceive)
334 ENTRY_SAME(mq_notify) 331 ENTRY_COMP(mq_notify)
335 ENTRY_SAME(mq_getsetattr) 332 ENTRY_COMP(mq_getsetattr)
336 ENTRY_COMP(waitid) /* 235 */ 333 ENTRY_COMP(waitid) /* 235 */
337 ENTRY_OURS(fadvise64_64) 334 ENTRY_OURS(fadvise64_64)
338 ENTRY_SAME(set_tid_address) 335 ENTRY_SAME(set_tid_address)
@@ -403,7 +400,7 @@
403 ENTRY_COMP(signalfd) 400 ENTRY_COMP(signalfd)
404 ENTRY_SAME(ni_syscall) /* was timerfd */ 401 ENTRY_SAME(ni_syscall) /* was timerfd */
405 ENTRY_SAME(eventfd) 402 ENTRY_SAME(eventfd)
406 ENTRY_COMP(fallocate) /* 305 */ 403 ENTRY_OURS(fallocate) /* 305 */
407 ENTRY_SAME(timerfd_create) 404 ENTRY_SAME(timerfd_create)
408 ENTRY_COMP(timerfd_settime) 405 ENTRY_COMP(timerfd_settime)
409 ENTRY_COMP(timerfd_gettime) 406 ENTRY_COMP(timerfd_gettime)
@@ -428,6 +425,10 @@
428 ENTRY_SAME(syncfs) 425 ENTRY_SAME(syncfs)
429 ENTRY_SAME(setns) 426 ENTRY_SAME(setns)
430 ENTRY_COMP(sendmmsg) 427 ENTRY_COMP(sendmmsg)
428 ENTRY_COMP(process_vm_readv) /* 330 */
429 ENTRY_COMP(process_vm_writev)
430 ENTRY_SAME(kcmp)
431 ENTRY_SAME(finit_module)
431 432
432 /* Nothing yet */ 433 /* Nothing yet */
433 434
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index 18162ce4261e..f247a3480e8e 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -175,10 +175,12 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
175 struct mm_struct *mm = tsk->mm; 175 struct mm_struct *mm = tsk->mm;
176 unsigned long acc_type; 176 unsigned long acc_type;
177 int fault; 177 int fault;
178 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
178 179
179 if (in_atomic() || !mm) 180 if (in_atomic() || !mm)
180 goto no_context; 181 goto no_context;
181 182
183retry:
182 down_read(&mm->mmap_sem); 184 down_read(&mm->mmap_sem);
183 vma = find_vma_prev(mm, address, &prev_vma); 185 vma = find_vma_prev(mm, address, &prev_vma);
184 if (!vma || address < vma->vm_start) 186 if (!vma || address < vma->vm_start)
@@ -201,7 +203,12 @@ good_area:
201 * fault. 203 * fault.
202 */ 204 */
203 205
204 fault = handle_mm_fault(mm, vma, address, (acc_type & VM_WRITE) ? FAULT_FLAG_WRITE : 0); 206 fault = handle_mm_fault(mm, vma, address,
207 flags | ((acc_type & VM_WRITE) ? FAULT_FLAG_WRITE : 0));
208
209 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
210 return;
211
205 if (unlikely(fault & VM_FAULT_ERROR)) { 212 if (unlikely(fault & VM_FAULT_ERROR)) {
206 /* 213 /*
207 * We hit a shared mapping outside of the file, or some 214 * We hit a shared mapping outside of the file, or some
@@ -214,10 +221,23 @@ good_area:
214 goto bad_area; 221 goto bad_area;
215 BUG(); 222 BUG();
216 } 223 }
217 if (fault & VM_FAULT_MAJOR) 224 if (flags & FAULT_FLAG_ALLOW_RETRY) {
218 current->maj_flt++; 225 if (fault & VM_FAULT_MAJOR)
219 else 226 current->maj_flt++;
220 current->min_flt++; 227 else
228 current->min_flt++;
229 if (fault & VM_FAULT_RETRY) {
230 flags &= ~FAULT_FLAG_ALLOW_RETRY;
231
232 /*
233 * No need to up_read(&mm->mmap_sem) as we would
234 * have already released it in __lock_page_or_retry
235 * in mm/filemap.c.
236 */
237
238 goto retry;
239 }
240 }
221 up_read(&mm->mmap_sem); 241 up_read(&mm->mmap_sem);
222 return; 242 return;
223 243
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e7fb8edb629b..a5255f242be9 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -142,6 +142,7 @@ config PPC
142 select HAVE_MOD_ARCH_SPECIFIC 142 select HAVE_MOD_ARCH_SPECIFIC
143 select MODULES_USE_ELF_RELA 143 select MODULES_USE_ELF_RELA
144 select CLONE_BACKWARDS 144 select CLONE_BACKWARDS
145 select ARCH_USE_BUILTIN_BSWAP
145 146
146config EARLY_PRINTK 147config EARLY_PRINTK
147 bool 148 bool
@@ -273,6 +274,10 @@ config PPC_ADV_DEBUG_DAC_RANGE
273 depends on PPC_ADV_DEBUG_REGS && 44x 274 depends on PPC_ADV_DEBUG_REGS && 44x
274 default y 275 default y
275 276
277config PPC_EMULATE_SSTEP
278 bool
279 default y if KPROBES || UPROBES || XMON || HAVE_HW_BREAKPOINT
280
276source "init/Kconfig" 281source "init/Kconfig"
277 282
278source "kernel/Kconfig.freezer" 283source "kernel/Kconfig.freezer"
@@ -306,6 +311,14 @@ config MATH_EMULATION
306 unit, which will allow programs that use floating-point 311 unit, which will allow programs that use floating-point
307 instructions to run. 312 instructions to run.
308 313
314config PPC_TRANSACTIONAL_MEM
315 bool "Transactional Memory support for POWERPC"
316 depends on PPC_BOOK3S_64
317 depends on SMP
318 default n
319 ---help---
320 Support user-mode Transactional Memory on POWERPC.
321
309config 8XX_MINIMAL_FPEMU 322config 8XX_MINIMAL_FPEMU
310 bool "Minimal math emulation for 8xx" 323 bool "Minimal math emulation for 8xx"
311 depends on 8xx && !MATH_EMULATION 324 depends on 8xx && !MATH_EMULATION
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index b639852116fa..967fd23ace78 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -67,7 +67,25 @@ LDFLAGS_vmlinux-y := -Bstatic
67LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie 67LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie
68LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-y) 68LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-y)
69 69
70CFLAGS-$(CONFIG_PPC64) := -mminimal-toc -mtraceback=no -mcall-aixdesc 70ifeq ($(CONFIG_PPC64),y)
71ifeq ($(call cc-option-yn,-mcmodel=medium),y)
72 # -mcmodel=medium breaks modules because it uses 32bit offsets from
73 # the TOC pointer to create pointers where possible. Pointers into the
74 # percpu data area are created by this method.
75 #
76 # The kernel module loader relocates the percpu data section from the
77 # original location (starting with 0xd...) to somewhere in the base
78 # kernel percpu data space (starting with 0xc...). We need a full
79 # 64bit relocation for this to work, hence -mcmodel=large.
80 KBUILD_CFLAGS_MODULE += -mcmodel=large
81else
82 export NO_MINIMAL_TOC := -mno-minimal-toc
83endif
84endif
85
86CFLAGS-$(CONFIG_PPC64) := -mtraceback=no -mcall-aixdesc
87CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc)
88CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
71CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple 89CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
72 90
73CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4) 91CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
@@ -136,6 +154,7 @@ head-$(CONFIG_FSL_BOOKE) := arch/powerpc/kernel/head_fsl_booke.o
136head-$(CONFIG_PPC64) += arch/powerpc/kernel/entry_64.o 154head-$(CONFIG_PPC64) += arch/powerpc/kernel/entry_64.o
137head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o 155head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
138head-$(CONFIG_ALTIVEC) += arch/powerpc/kernel/vector.o 156head-$(CONFIG_ALTIVEC) += arch/powerpc/kernel/vector.o
157head-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += arch/powerpc/kernel/prom_init.o
139 158
140core-y += arch/powerpc/kernel/ \ 159core-y += arch/powerpc/kernel/ \
141 arch/powerpc/mm/ \ 160 arch/powerpc/mm/ \
@@ -143,6 +162,7 @@ core-y += arch/powerpc/kernel/ \
143 arch/powerpc/sysdev/ \ 162 arch/powerpc/sysdev/ \
144 arch/powerpc/platforms/ \ 163 arch/powerpc/platforms/ \
145 arch/powerpc/math-emu/ \ 164 arch/powerpc/math-emu/ \
165 arch/powerpc/crypto/ \
146 arch/powerpc/net/ 166 arch/powerpc/net/
147core-$(CONFIG_XMON) += arch/powerpc/xmon/ 167core-$(CONFIG_XMON) += arch/powerpc/xmon/
148core-$(CONFIG_KVM) += arch/powerpc/kvm/ 168core-$(CONFIG_KVM) += arch/powerpc/kvm/
diff --git a/arch/powerpc/boot/dts/a3m071.dts b/arch/powerpc/boot/dts/a3m071.dts
index 877a28cb77e4..bf81b8f9704c 100644
--- a/arch/powerpc/boot/dts/a3m071.dts
+++ b/arch/powerpc/boot/dts/a3m071.dts
@@ -17,6 +17,8 @@
17 17
18/include/ "mpc5200b.dtsi" 18/include/ "mpc5200b.dtsi"
19 19
20&gpt0 { fsl,has-wdt; };
21
20/ { 22/ {
21 model = "anonymous,a3m071"; 23 model = "anonymous,a3m071";
22 compatible = "anonymous,a3m071"; 24 compatible = "anonymous,a3m071";
@@ -30,10 +32,6 @@
30 bus-frequency = <0>; /* From boot loader */ 32 bus-frequency = <0>; /* From boot loader */
31 system-frequency = <0>; /* From boot loader */ 33 system-frequency = <0>; /* From boot loader */
32 34
33 timer@600 {
34 fsl,has-wdt;
35 };
36
37 spi@f00 { 35 spi@f00 {
38 status = "disabled"; 36 status = "disabled";
39 }; 37 };
diff --git a/arch/powerpc/boot/dts/a4m072.dts b/arch/powerpc/boot/dts/a4m072.dts
index fabe7b7d5f13..1f02034c7e99 100644
--- a/arch/powerpc/boot/dts/a4m072.dts
+++ b/arch/powerpc/boot/dts/a4m072.dts
@@ -15,6 +15,11 @@
15 15
16/include/ "mpc5200b.dtsi" 16/include/ "mpc5200b.dtsi"
17 17
18&gpt0 { fsl,has-wdt; };
19&gpt3 { gpio-controller; };
20&gpt4 { gpio-controller; };
21&gpt5 { gpio-controller; };
22
18/ { 23/ {
19 model = "anonymous,a4m072"; 24 model = "anonymous,a4m072";
20 compatible = "anonymous,a4m072"; 25 compatible = "anonymous,a4m072";
@@ -34,28 +39,6 @@
34 fsl,init-fd-counters = <0x3333>; 39 fsl,init-fd-counters = <0x3333>;
35 }; 40 };
36 41
37 timer@600 {
38 fsl,has-wdt;
39 };
40
41 gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
42 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
43 gpio-controller;
44 #gpio-cells = <2>;
45 };
46
47 gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
48 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
49 gpio-controller;
50 #gpio-cells = <2>;
51 };
52
53 gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
54 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
55 gpio-controller;
56 #gpio-cells = <2>;
57 };
58
59 spi@f00 { 42 spi@f00 {
60 status = "disabled"; 43 status = "disabled";
61 }; 44 };
diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
index 9d4917aebe6b..7daaca324c01 100644
--- a/arch/powerpc/boot/dts/bluestone.dts
+++ b/arch/powerpc/boot/dts/bluestone.dts
@@ -107,6 +107,14 @@
107 interrupt-parent = <&UIC0>; 107 interrupt-parent = <&UIC0>;
108 }; 108 };
109 109
110 OCM: ocm@400040000 {
111 compatible = "ibm,ocm";
112 status = "ok";
113 cell-index = <1>;
114 /* configured in U-Boot */
115 reg = <4 0x00040000 0x8000>; /* 32K */
116 };
117
110 SDR0: sdr { 118 SDR0: sdr {
111 compatible = "ibm,sdr-apm821xx"; 119 compatible = "ibm,sdr-apm821xx";
112 dcr-reg = <0x00e 0x002>; 120 dcr-reg = <0x00e 0x002>;
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
index 638adda2c218..9e6c01339ccc 100644
--- a/arch/powerpc/boot/dts/bsc9131rdb.dtsi
+++ b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
@@ -126,7 +126,7 @@
126 }; 126 };
127 }; 127 };
128 128
129 sdhci@2e000 { 129 sdhc@2e000 {
130 status = "disabled"; 130 status = "disabled";
131 }; 131 };
132 132
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index ad3a4f4a2b04..fb580dd84ddf 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -12,15 +12,13 @@
12 12
13/include/ "mpc5200b.dtsi" 13/include/ "mpc5200b.dtsi"
14 14
15&gpt0 { fsl,has-wdt; };
16
15/ { 17/ {
16 model = "schindler,cm5200"; 18 model = "schindler,cm5200";
17 compatible = "schindler,cm5200"; 19 compatible = "schindler,cm5200";
18 20
19 soc5200@f0000000 { 21 soc5200@f0000000 {
20 timer@600 { // General Purpose Timer
21 fsl,has-wdt;
22 };
23
24 can@900 { 22 can@900 {
25 status = "disabled"; 23 status = "disabled";
26 }; 24 };
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
index a7511f2d844d..955bff629df3 100644
--- a/arch/powerpc/boot/dts/digsy_mtc.dts
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -13,6 +13,9 @@
13 13
14/include/ "mpc5200b.dtsi" 14/include/ "mpc5200b.dtsi"
15 15
16&gpt0 { gpio-controller; fsl,has-wdt; };
17&gpt1 { gpio-controller; };
18
16/ { 19/ {
17 model = "intercontrol,digsy-mtc"; 20 model = "intercontrol,digsy-mtc";
18 compatible = "intercontrol,digsy-mtc"; 21 compatible = "intercontrol,digsy-mtc";
@@ -22,17 +25,6 @@
22 }; 25 };
23 26
24 soc5200@f0000000 { 27 soc5200@f0000000 {
25 timer@600 { // General Purpose Timer
26 #gpio-cells = <2>;
27 fsl,has-wdt;
28 gpio-controller;
29 };
30
31 timer@610 {
32 #gpio-cells = <2>;
33 gpio-controller;
34 };
35
36 rtc@800 { 28 rtc@800 {
37 status = "disabled"; 29 status = "disabled";
38 }; 30 };
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index 0bde9ee8afaf..af12ead88c5f 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -41,7 +41,7 @@
41 41
42/* controller at 0x9000 */ 42/* controller at 0x9000 */
43&pci0 { 43&pci0 {
44 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; 44 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
45 device_type = "pci"; 45 device_type = "pci";
46 #size-cells = <2>; 46 #size-cells = <2>;
47 #address-cells = <3>; 47 #address-cells = <3>;
@@ -69,7 +69,7 @@
69 69
70/* controller at 0xa000 */ 70/* controller at 0xa000 */
71&pci1 { 71&pci1 {
72 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; 72 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
73 device_type = "pci"; 73 device_type = "pci";
74 #size-cells = <2>; 74 #size-cells = <2>;
75 #address-cells = <3>; 75 #address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
index 06216b8c0af5..e179803a81ef 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -45,7 +45,7 @@
45 45
46/* controller at 0x9000 */ 46/* controller at 0x9000 */
47&pci0 { 47&pci0 {
48 compatible = "fsl,p1022-pcie"; 48 compatible = "fsl,mpc8548-pcie";
49 device_type = "pci"; 49 device_type = "pci";
50 #size-cells = <2>; 50 #size-cells = <2>;
51 #address-cells = <3>; 51 #address-cells = <3>;
@@ -73,7 +73,7 @@
73 73
74/* controller at 0xa000 */ 74/* controller at 0xa000 */
75&pci1 { 75&pci1 {
76 compatible = "fsl,p1022-pcie"; 76 compatible = "fsl,mpc8548-pcie";
77 device_type = "pci"; 77 device_type = "pci";
78 #size-cells = <2>; 78 #size-cells = <2>;
79 #address-cells = <3>; 79 #address-cells = <3>;
@@ -102,7 +102,7 @@
102 102
103/* controller at 0xb000 */ 103/* controller at 0xb000 */
104&pci2 { 104&pci2 {
105 compatible = "fsl,p1022-pcie"; 105 compatible = "fsl,mpc8548-pcie";
106 device_type = "pci"; 106 device_type = "pci";
107 #size-cells = <2>; 107 #size-cells = <2>;
108 #address-cells = <3>; 108 #address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 531eab82c6c9..69ac1acd4349 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -48,6 +48,8 @@
48 bus-range = <0x0 0xff>; 48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>; 49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>; 50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
52 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
51 pcie@0 { 53 pcie@0 {
52 reg = <0 0 0 0 0>; 54 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>; 55 #interrupt-cells = <1>;
@@ -75,6 +77,8 @@
75 bus-range = <0 0xff>; 77 bus-range = <0 0xff>;
76 clock-frequency = <33333333>; 78 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>; 79 interrupts = <16 2 1 14>;
80 fsl,iommu-parent = <&pamu0>;
81 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
78 pcie@0 { 82 pcie@0 {
79 reg = <0 0 0 0 0>; 83 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>; 84 #interrupt-cells = <1>;
@@ -102,6 +106,8 @@
102 bus-range = <0x0 0xff>; 106 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>; 107 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>; 108 interrupts = <16 2 1 13>;
109 fsl,iommu-parent = <&pamu0>;
110 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
105 pcie@0 { 111 pcie@0 {
106 reg = <0 0 0 0 0>; 112 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>; 113 #interrupt-cells = <1>;
@@ -125,18 +131,21 @@
125 interrupts = <16 2 1 11>; 131 interrupts = <16 2 1 11>;
126 #address-cells = <2>; 132 #address-cells = <2>;
127 #size-cells = <2>; 133 #size-cells = <2>;
134 fsl,iommu-parent = <&pamu0>;
128 ranges; 135 ranges;
129 136
130 port1 { 137 port1 {
131 #address-cells = <2>; 138 #address-cells = <2>;
132 #size-cells = <2>; 139 #size-cells = <2>;
133 cell-index = <1>; 140 cell-index = <1>;
141 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
134 }; 142 };
135 143
136 port2 { 144 port2 {
137 #address-cells = <2>; 145 #address-cells = <2>;
138 #size-cells = <2>; 146 #size-cells = <2>;
139 cell-index = <2>; 147 cell-index = <2>;
148 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
140 }; 149 };
141}; 150};
142 151
@@ -246,10 +255,37 @@
246 255
247 iommu@20000 { 256 iommu@20000 {
248 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 257 compatible = "fsl,pamu-v1.0", "fsl,pamu";
249 reg = <0x20000 0x4000>; 258 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
259 ranges = <0 0x20000 0x4000>;
260 #address-cells = <1>;
261 #size-cells = <1>;
250 interrupts = < 262 interrupts = <
251 24 2 0 0 263 24 2 0 0
252 16 2 1 30>; 264 16 2 1 30>;
265
266 pamu0: pamu@0 {
267 reg = <0 0x1000>;
268 fsl,primary-cache-geometry = <32 1>;
269 fsl,secondary-cache-geometry = <128 2>;
270 };
271
272 pamu1: pamu@1000 {
273 reg = <0x1000 0x1000>;
274 fsl,primary-cache-geometry = <32 1>;
275 fsl,secondary-cache-geometry = <128 2>;
276 };
277
278 pamu2: pamu@2000 {
279 reg = <0x2000 0x1000>;
280 fsl,primary-cache-geometry = <32 1>;
281 fsl,secondary-cache-geometry = <128 2>;
282 };
283
284 pamu3: pamu@3000 {
285 reg = <0x3000 0x1000>;
286 fsl,primary-cache-geometry = <32 1>;
287 fsl,secondary-cache-geometry = <128 2>;
288 };
253 }; 289 };
254 290
255/include/ "qoriq-mpic.dtsi" 291/include/ "qoriq-mpic.dtsi"
@@ -291,7 +327,17 @@
291 }; 327 };
292 328
293/include/ "qoriq-dma-0.dtsi" 329/include/ "qoriq-dma-0.dtsi"
330 dma@100300 {
331 fsl,iommu-parent = <&pamu0>;
332 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
333 };
334
294/include/ "qoriq-dma-1.dtsi" 335/include/ "qoriq-dma-1.dtsi"
336 dma@101300 {
337 fsl,iommu-parent = <&pamu0>;
338 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
339 };
340
295/include/ "qoriq-espi-0.dtsi" 341/include/ "qoriq-espi-0.dtsi"
296 spi@110000 { 342 spi@110000 {
297 fsl,espi-num-chipselects = <4>; 343 fsl,espi-num-chipselects = <4>;
@@ -299,6 +345,8 @@
299 345
300/include/ "qoriq-esdhc-0.dtsi" 346/include/ "qoriq-esdhc-0.dtsi"
301 sdhc@114000 { 347 sdhc@114000 {
348 fsl,iommu-parent = <&pamu1>;
349 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
302 sdhci,auto-cmd12; 350 sdhci,auto-cmd12;
303 }; 351 };
304 352
@@ -308,20 +356,37 @@
308/include/ "qoriq-duart-1.dtsi" 356/include/ "qoriq-duart-1.dtsi"
309/include/ "qoriq-gpio-0.dtsi" 357/include/ "qoriq-gpio-0.dtsi"
310/include/ "qoriq-usb2-mph-0.dtsi" 358/include/ "qoriq-usb2-mph-0.dtsi"
311 usb0: usb@210000 { 359 usb0: usb@210000 {
312 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 360 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
313 phy_type = "utmi"; 361 phy_type = "utmi";
314 port0; 362 fsl,iommu-parent = <&pamu1>;
315 }; 363 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
364 port0;
365 };
316 366
317/include/ "qoriq-usb2-dr-0.dtsi" 367/include/ "qoriq-usb2-dr-0.dtsi"
318 usb1: usb@211000 { 368 usb1: usb@211000 {
319 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 369 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
320 dr_mode = "host"; 370 fsl,iommu-parent = <&pamu1>;
321 phy_type = "utmi"; 371 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
322 }; 372 dr_mode = "host";
373 phy_type = "utmi";
374 };
323 375
324/include/ "qoriq-sata2-0.dtsi" 376/include/ "qoriq-sata2-0.dtsi"
377 sata@220000 {
378 fsl,iommu-parent = <&pamu1>;
379 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
380 };
381
325/include/ "qoriq-sata2-1.dtsi" 382/include/ "qoriq-sata2-1.dtsi"
383 sata@221000 {
384 fsl,iommu-parent = <&pamu1>;
385 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
386 };
387
326/include/ "qoriq-sec4.2-0.dtsi" 388/include/ "qoriq-sec4.2-0.dtsi"
389crypto: crypto@300000 {
390 fsl,iommu-parent = <&pamu1>;
391 };
327}; 392};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index af4ebc8009e3..9b5a81a4529c 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -48,6 +48,8 @@
48 bus-range = <0x0 0xff>; 48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>; 49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>; 50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
52 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
51 pcie@0 { 53 pcie@0 {
52 reg = <0 0 0 0 0>; 54 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>; 55 #interrupt-cells = <1>;
@@ -75,6 +77,8 @@
75 bus-range = <0 0xff>; 77 bus-range = <0 0xff>;
76 clock-frequency = <33333333>; 78 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>; 79 interrupts = <16 2 1 14>;
80 fsl,iommu-parent = <&pamu0>;
81 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
78 pcie@0 { 82 pcie@0 {
79 reg = <0 0 0 0 0>; 83 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>; 84 #interrupt-cells = <1>;
@@ -102,6 +106,8 @@
102 bus-range = <0x0 0xff>; 106 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>; 107 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>; 108 interrupts = <16 2 1 13>;
109 fsl,iommu-parent = <&pamu0>;
110 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
105 pcie@0 { 111 pcie@0 {
106 reg = <0 0 0 0 0>; 112 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>; 113 #interrupt-cells = <1>;
@@ -152,18 +158,21 @@
152 interrupts = <16 2 1 11>; 158 interrupts = <16 2 1 11>;
153 #address-cells = <2>; 159 #address-cells = <2>;
154 #size-cells = <2>; 160 #size-cells = <2>;
161 fsl,iommu-parent = <&pamu0>;
155 ranges; 162 ranges;
156 163
157 port1 { 164 port1 {
158 #address-cells = <2>; 165 #address-cells = <2>;
159 #size-cells = <2>; 166 #size-cells = <2>;
160 cell-index = <1>; 167 cell-index = <1>;
168 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
161 }; 169 };
162 170
163 port2 { 171 port2 {
164 #address-cells = <2>; 172 #address-cells = <2>;
165 #size-cells = <2>; 173 #size-cells = <2>;
166 cell-index = <2>; 174 cell-index = <2>;
175 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
167 }; 176 };
168}; 177};
169 178
@@ -273,10 +282,37 @@
273 282
274 iommu@20000 { 283 iommu@20000 {
275 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 284 compatible = "fsl,pamu-v1.0", "fsl,pamu";
276 reg = <0x20000 0x4000>; 285 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
286 ranges = <0 0x20000 0x4000>;
287 #address-cells = <1>;
288 #size-cells = <1>;
277 interrupts = < 289 interrupts = <
278 24 2 0 0 290 24 2 0 0
279 16 2 1 30>; 291 16 2 1 30>;
292
293 pamu0: pamu@0 {
294 reg = <0 0x1000>;
295 fsl,primary-cache-geometry = <32 1>;
296 fsl,secondary-cache-geometry = <128 2>;
297 };
298
299 pamu1: pamu@1000 {
300 reg = <0x1000 0x1000>;
301 fsl,primary-cache-geometry = <32 1>;
302 fsl,secondary-cache-geometry = <128 2>;
303 };
304
305 pamu2: pamu@2000 {
306 reg = <0x2000 0x1000>;
307 fsl,primary-cache-geometry = <32 1>;
308 fsl,secondary-cache-geometry = <128 2>;
309 };
310
311 pamu3: pamu@3000 {
312 reg = <0x3000 0x1000>;
313 fsl,primary-cache-geometry = <32 1>;
314 fsl,secondary-cache-geometry = <128 2>;
315 };
280 }; 316 };
281 317
282/include/ "qoriq-mpic.dtsi" 318/include/ "qoriq-mpic.dtsi"
@@ -318,7 +354,17 @@
318 }; 354 };
319 355
320/include/ "qoriq-dma-0.dtsi" 356/include/ "qoriq-dma-0.dtsi"
357 dma@100300 {
358 fsl,iommu-parent = <&pamu0>;
359 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
360 };
361
321/include/ "qoriq-dma-1.dtsi" 362/include/ "qoriq-dma-1.dtsi"
363 dma@101300 {
364 fsl,iommu-parent = <&pamu0>;
365 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
366 };
367
322/include/ "qoriq-espi-0.dtsi" 368/include/ "qoriq-espi-0.dtsi"
323 spi@110000 { 369 spi@110000 {
324 fsl,espi-num-chipselects = <4>; 370 fsl,espi-num-chipselects = <4>;
@@ -326,6 +372,8 @@
326 372
327/include/ "qoriq-esdhc-0.dtsi" 373/include/ "qoriq-esdhc-0.dtsi"
328 sdhc@114000 { 374 sdhc@114000 {
375 fsl,iommu-parent = <&pamu1>;
376 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
329 sdhci,auto-cmd12; 377 sdhci,auto-cmd12;
330 }; 378 };
331 379
@@ -335,20 +383,37 @@
335/include/ "qoriq-duart-1.dtsi" 383/include/ "qoriq-duart-1.dtsi"
336/include/ "qoriq-gpio-0.dtsi" 384/include/ "qoriq-gpio-0.dtsi"
337/include/ "qoriq-usb2-mph-0.dtsi" 385/include/ "qoriq-usb2-mph-0.dtsi"
338 usb0: usb@210000 { 386 usb0: usb@210000 {
339 compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph"; 387 compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
340 phy_type = "utmi"; 388 phy_type = "utmi";
341 port0; 389 fsl,iommu-parent = <&pamu1>;
342 }; 390 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
391 port0;
392 };
343 393
344/include/ "qoriq-usb2-dr-0.dtsi" 394/include/ "qoriq-usb2-dr-0.dtsi"
345 usb1: usb@211000 { 395 usb1: usb@211000 {
346 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 396 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
347 dr_mode = "host"; 397 fsl,iommu-parent = <&pamu1>;
348 phy_type = "utmi"; 398 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
349 }; 399 dr_mode = "host";
400 phy_type = "utmi";
401 };
350 402
351/include/ "qoriq-sata2-0.dtsi" 403/include/ "qoriq-sata2-0.dtsi"
404 sata@220000 {
405 fsl,iommu-parent = <&pamu1>;
406 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
407 };
408
352/include/ "qoriq-sata2-1.dtsi" 409/include/ "qoriq-sata2-1.dtsi"
410 sata@221000 {
411 fsl,iommu-parent = <&pamu1>;
412 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
413 };
414
353/include/ "qoriq-sec4.2-0.dtsi" 415/include/ "qoriq-sec4.2-0.dtsi"
416crypto: crypto@300000 {
417 fsl,iommu-parent = <&pamu1>;
418 };
354}; 419};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 4f9c9f682ecf..19859ad851eb 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -41,13 +41,15 @@
41 41
42/* controller at 0x200000 */ 42/* controller at 0x200000 */
43&pci0 { 43&pci0 {
44 compatible = "fsl,p4080-pcie"; 44 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
45 device_type = "pci"; 45 device_type = "pci";
46 #size-cells = <2>; 46 #size-cells = <2>;
47 #address-cells = <3>; 47 #address-cells = <3>;
48 bus-range = <0x0 0xff>; 48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>; 49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>; 50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
52 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
51 pcie@0 { 53 pcie@0 {
52 reg = <0 0 0 0 0>; 54 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>; 55 #interrupt-cells = <1>;
@@ -68,13 +70,15 @@
68 70
69/* controller at 0x201000 */ 71/* controller at 0x201000 */
70&pci1 { 72&pci1 {
71 compatible = "fsl,p4080-pcie"; 73 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
72 device_type = "pci"; 74 device_type = "pci";
73 #size-cells = <2>; 75 #size-cells = <2>;
74 #address-cells = <3>; 76 #address-cells = <3>;
75 bus-range = <0 0xff>; 77 bus-range = <0 0xff>;
76 clock-frequency = <33333333>; 78 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>; 79 interrupts = <16 2 1 14>;
80 fsl,iommu-parent = <&pamu0>;
81 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
78 pcie@0 { 82 pcie@0 {
79 reg = <0 0 0 0 0>; 83 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>; 84 #interrupt-cells = <1>;
@@ -95,13 +99,15 @@
95 99
96/* controller at 0x202000 */ 100/* controller at 0x202000 */
97&pci2 { 101&pci2 {
98 compatible = "fsl,p4080-pcie"; 102 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
99 device_type = "pci"; 103 device_type = "pci";
100 #size-cells = <2>; 104 #size-cells = <2>;
101 #address-cells = <3>; 105 #address-cells = <3>;
102 bus-range = <0x0 0xff>; 106 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>; 107 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>; 108 interrupts = <16 2 1 13>;
109 fsl,iommu-parent = <&pamu0>;
110 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
105 pcie@0 { 111 pcie@0 {
106 reg = <0 0 0 0 0>; 112 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>; 113 #interrupt-cells = <1>;
@@ -126,18 +132,21 @@
126 #address-cells = <2>; 132 #address-cells = <2>;
127 #size-cells = <2>; 133 #size-cells = <2>;
128 fsl,srio-rmu-handle = <&rmu>; 134 fsl,srio-rmu-handle = <&rmu>;
135 fsl,iommu-parent = <&pamu0>;
129 ranges; 136 ranges;
130 137
131 port1 { 138 port1 {
132 #address-cells = <2>; 139 #address-cells = <2>;
133 #size-cells = <2>; 140 #size-cells = <2>;
134 cell-index = <1>; 141 cell-index = <1>;
142 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
135 }; 143 };
136 144
137 port2 { 145 port2 {
138 #address-cells = <2>; 146 #address-cells = <2>;
139 #size-cells = <2>; 147 #size-cells = <2>;
140 cell-index = <2>; 148 cell-index = <2>;
149 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
141 }; 150 };
142}; 151};
143 152
@@ -281,13 +290,51 @@
281 290
282 iommu@20000 { 291 iommu@20000 {
283 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 292 compatible = "fsl,pamu-v1.0", "fsl,pamu";
284 reg = <0x20000 0x5000>; 293 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
294 ranges = <0 0x20000 0x5000>;
295 #address-cells = <1>;
296 #size-cells = <1>;
285 interrupts = < 297 interrupts = <
286 24 2 0 0 298 24 2 0 0
287 16 2 1 30>; 299 16 2 1 30>;
300
301 pamu0: pamu@0 {
302 reg = <0 0x1000>;
303 fsl,primary-cache-geometry = <32 1>;
304 fsl,secondary-cache-geometry = <128 2>;
305 };
306
307 pamu1: pamu@1000 {
308 reg = <0x1000 0x1000>;
309 fsl,primary-cache-geometry = <32 1>;
310 fsl,secondary-cache-geometry = <128 2>;
311 };
312
313 pamu2: pamu@2000 {
314 reg = <0x2000 0x1000>;
315 fsl,primary-cache-geometry = <32 1>;
316 fsl,secondary-cache-geometry = <128 2>;
317 };
318
319 pamu3: pamu@3000 {
320 reg = <0x3000 0x1000>;
321 fsl,primary-cache-geometry = <32 1>;
322 fsl,secondary-cache-geometry = <128 2>;
323 };
324
325 pamu4: pamu@4000 {
326 reg = <0x4000 0x1000>;
327 fsl,primary-cache-geometry = <32 1>;
328 fsl,secondary-cache-geometry = <128 2>;
329 };
288 }; 330 };
289 331
290/include/ "qoriq-rmu-0.dtsi" 332/include/ "qoriq-rmu-0.dtsi"
333 rmu@d3000 {
334 fsl,iommu-parent = <&pamu0>;
335 fsl,liodn-reg = <&guts 0x540>; /* RMULIODNR */
336 };
337
291/include/ "qoriq-mpic.dtsi" 338/include/ "qoriq-mpic.dtsi"
292 339
293 guts: global-utilities@e0000 { 340 guts: global-utilities@e0000 {
@@ -327,7 +374,17 @@
327 }; 374 };
328 375
329/include/ "qoriq-dma-0.dtsi" 376/include/ "qoriq-dma-0.dtsi"
377 dma@100300 {
378 fsl,iommu-parent = <&pamu0>;
379 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
380 };
381
330/include/ "qoriq-dma-1.dtsi" 382/include/ "qoriq-dma-1.dtsi"
383 dma@101300 {
384 fsl,iommu-parent = <&pamu0>;
385 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
386 };
387
331/include/ "qoriq-espi-0.dtsi" 388/include/ "qoriq-espi-0.dtsi"
332 spi@110000 { 389 spi@110000 {
333 fsl,espi-num-chipselects = <4>; 390 fsl,espi-num-chipselects = <4>;
@@ -335,6 +392,8 @@
335 392
336/include/ "qoriq-esdhc-0.dtsi" 393/include/ "qoriq-esdhc-0.dtsi"
337 sdhc@114000 { 394 sdhc@114000 {
395 fsl,iommu-parent = <&pamu1>;
396 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
338 voltage-ranges = <3300 3300>; 397 voltage-ranges = <3300 3300>;
339 sdhci,auto-cmd12; 398 sdhci,auto-cmd12;
340 }; 399 };
@@ -347,11 +406,18 @@
347/include/ "qoriq-usb2-mph-0.dtsi" 406/include/ "qoriq-usb2-mph-0.dtsi"
348 usb@210000 { 407 usb@210000 {
349 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 408 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
409 fsl,iommu-parent = <&pamu1>;
410 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
350 port0; 411 port0;
351 }; 412 };
352/include/ "qoriq-usb2-dr-0.dtsi" 413/include/ "qoriq-usb2-dr-0.dtsi"
353 usb@211000 { 414 usb@211000 {
354 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 415 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
416 fsl,iommu-parent = <&pamu1>;
417 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
355 }; 418 };
356/include/ "qoriq-sec4.0-0.dtsi" 419/include/ "qoriq-sec4.0-0.dtsi"
420crypto: crypto@300000 {
421 fsl,iommu-parent = <&pamu1>;
422 };
357}; 423};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 5d7205b7bb05..9ea77c3513f6 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -48,6 +48,8 @@
48 bus-range = <0x0 0xff>; 48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>; 49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>; 50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
52 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
51 pcie@0 { 53 pcie@0 {
52 reg = <0 0 0 0 0>; 54 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>; 55 #interrupt-cells = <1>;
@@ -75,6 +77,8 @@
75 bus-range = <0 0xff>; 77 bus-range = <0 0xff>;
76 clock-frequency = <33333333>; 78 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>; 79 interrupts = <16 2 1 14>;
80 fsl,iommu-parent = <&pamu0>;
81 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
78 pcie@0 { 82 pcie@0 {
79 reg = <0 0 0 0 0>; 83 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>; 84 #interrupt-cells = <1>;
@@ -102,6 +106,8 @@
102 bus-range = <0x0 0xff>; 106 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>; 107 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>; 108 interrupts = <16 2 1 13>;
109 fsl,iommu-parent = <&pamu0>;
110 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
105 pcie@0 { 111 pcie@0 {
106 reg = <0 0 0 0 0>; 112 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>; 113 #interrupt-cells = <1>;
@@ -129,6 +135,8 @@
129 bus-range = <0x0 0xff>; 135 bus-range = <0x0 0xff>;
130 clock-frequency = <33333333>; 136 clock-frequency = <33333333>;
131 interrupts = <16 2 1 12>; 137 interrupts = <16 2 1 12>;
138 fsl,iommu-parent = <&pamu0>;
139 fsl,liodn-reg = <&guts 0x50c>; /* PEX4LIODNR */
132 pcie@0 { 140 pcie@0 {
133 reg = <0 0 0 0 0>; 141 reg = <0 0 0 0 0>;
134 #interrupt-cells = <1>; 142 #interrupt-cells = <1>;
@@ -152,18 +160,21 @@
152 interrupts = <16 2 1 11>; 160 interrupts = <16 2 1 11>;
153 #address-cells = <2>; 161 #address-cells = <2>;
154 #size-cells = <2>; 162 #size-cells = <2>;
163 fsl,iommu-parent = <&pamu0>;
155 ranges; 164 ranges;
156 165
157 port1 { 166 port1 {
158 #address-cells = <2>; 167 #address-cells = <2>;
159 #size-cells = <2>; 168 #size-cells = <2>;
160 cell-index = <1>; 169 cell-index = <1>;
170 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
161 }; 171 };
162 172
163 port2 { 173 port2 {
164 #address-cells = <2>; 174 #address-cells = <2>;
165 #size-cells = <2>; 175 #size-cells = <2>;
166 cell-index = <2>; 176 cell-index = <2>;
177 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
167 }; 178 };
168}; 179};
169 180
@@ -276,10 +287,37 @@
276 287
277 iommu@20000 { 288 iommu@20000 {
278 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 289 compatible = "fsl,pamu-v1.0", "fsl,pamu";
279 reg = <0x20000 0x4000>; 290 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
291 ranges = <0 0x20000 0x4000>;
292 #address-cells = <1>;
293 #size-cells = <1>;
280 interrupts = < 294 interrupts = <
281 24 2 0 0 295 24 2 0 0
282 16 2 1 30>; 296 16 2 1 30>;
297
298 pamu0: pamu@0 {
299 reg = <0 0x1000>;
300 fsl,primary-cache-geometry = <32 1>;
301 fsl,secondary-cache-geometry = <128 2>;
302 };
303
304 pamu1: pamu@1000 {
305 reg = <0x1000 0x1000>;
306 fsl,primary-cache-geometry = <32 1>;
307 fsl,secondary-cache-geometry = <128 2>;
308 };
309
310 pamu2: pamu@2000 {
311 reg = <0x2000 0x1000>;
312 fsl,primary-cache-geometry = <32 1>;
313 fsl,secondary-cache-geometry = <128 2>;
314 };
315
316 pamu3: pamu@3000 {
317 reg = <0x3000 0x1000>;
318 fsl,primary-cache-geometry = <32 1>;
319 fsl,secondary-cache-geometry = <128 2>;
320 };
283 }; 321 };
284 322
285/include/ "qoriq-mpic.dtsi" 323/include/ "qoriq-mpic.dtsi"
@@ -321,7 +359,17 @@
321 }; 359 };
322 360
323/include/ "qoriq-dma-0.dtsi" 361/include/ "qoriq-dma-0.dtsi"
362 dma@100300 {
363 fsl,iommu-parent = <&pamu0>;
364 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
365 };
366
324/include/ "qoriq-dma-1.dtsi" 367/include/ "qoriq-dma-1.dtsi"
368 dma@101300 {
369 fsl,iommu-parent = <&pamu0>;
370 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
371 };
372
325/include/ "qoriq-espi-0.dtsi" 373/include/ "qoriq-espi-0.dtsi"
326 spi@110000 { 374 spi@110000 {
327 fsl,espi-num-chipselects = <4>; 375 fsl,espi-num-chipselects = <4>;
@@ -329,6 +377,8 @@
329 377
330/include/ "qoriq-esdhc-0.dtsi" 378/include/ "qoriq-esdhc-0.dtsi"
331 sdhc@114000 { 379 sdhc@114000 {
380 fsl,iommu-parent = <&pamu1>;
381 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
332 sdhci,auto-cmd12; 382 sdhci,auto-cmd12;
333 }; 383 };
334 384
@@ -338,21 +388,41 @@
338/include/ "qoriq-duart-1.dtsi" 388/include/ "qoriq-duart-1.dtsi"
339/include/ "qoriq-gpio-0.dtsi" 389/include/ "qoriq-gpio-0.dtsi"
340/include/ "qoriq-usb2-mph-0.dtsi" 390/include/ "qoriq-usb2-mph-0.dtsi"
341 usb0: usb@210000 { 391 usb0: usb@210000 {
342 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 392 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
343 phy_type = "utmi"; 393 fsl,iommu-parent = <&pamu1>;
344 port0; 394 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
345 }; 395 phy_type = "utmi";
396 port0;
397 };
346 398
347/include/ "qoriq-usb2-dr-0.dtsi" 399/include/ "qoriq-usb2-dr-0.dtsi"
348 usb1: usb@211000 { 400 usb1: usb@211000 {
349 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 401 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
350 dr_mode = "host"; 402 fsl,iommu-parent = <&pamu1>;
351 phy_type = "utmi"; 403 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
352 }; 404 dr_mode = "host";
405 phy_type = "utmi";
406 };
353 407
354/include/ "qoriq-sata2-0.dtsi" 408/include/ "qoriq-sata2-0.dtsi"
409 sata@220000 {
410 fsl,iommu-parent = <&pamu1>;
411 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
412 };
413
355/include/ "qoriq-sata2-1.dtsi" 414/include/ "qoriq-sata2-1.dtsi"
415 sata@221000 {
416 fsl,iommu-parent = <&pamu1>;
417 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
418 };
356/include/ "qoriq-sec4.2-0.dtsi" 419/include/ "qoriq-sec4.2-0.dtsi"
420 crypto@300000 {
421 fsl,iommu-parent = <&pamu1>;
422 };
423
357/include/ "qoriq-raid1.0-0.dtsi" 424/include/ "qoriq-raid1.0-0.dtsi"
425 raideng@320000 {
426 fsl,iommu-parent = <&pamu1>;
427 };
358}; 428};
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index db2c9a7b3a0e..97f8c26f9709 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -48,6 +48,7 @@
48 bus-range = <0x0 0xff>; 48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>; 49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>; 50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
51 pcie@0 { 52 pcie@0 {
52 reg = <0 0 0 0 0>; 53 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>; 54 #interrupt-cells = <1>;
@@ -75,6 +76,7 @@
75 bus-range = <0 0xff>; 76 bus-range = <0 0xff>;
76 clock-frequency = <33333333>; 77 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>; 78 interrupts = <16 2 1 14>;
79 fsl,iommu-parent = <&pamu0>;
78 pcie@0 { 80 pcie@0 {
79 reg = <0 0 0 0 0>; 81 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>; 82 #interrupt-cells = <1>;
@@ -102,6 +104,7 @@
102 bus-range = <0x0 0xff>; 104 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>; 105 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>; 106 interrupts = <16 2 1 13>;
107 fsl,iommu-parent = <&pamu0>;
105 pcie@0 { 108 pcie@0 {
106 reg = <0 0 0 0 0>; 109 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>; 110 #interrupt-cells = <1>;
@@ -239,10 +242,42 @@
239 242
240 iommu@20000 { 243 iommu@20000 {
241 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 244 compatible = "fsl,pamu-v1.0", "fsl,pamu";
242 reg = <0x20000 0x5000>; 245 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
243 interrupts = < 246 ranges = <0 0x20000 0x5000>;
244 24 2 0 0 247 #address-cells = <1>;
245 16 2 1 30>; 248 #size-cells = <1>;
249 interrupts = <24 2 0 0
250 16 2 1 30>;
251
252 pamu0: pamu@0 {
253 reg = <0 0x1000>;
254 fsl,primary-cache-geometry = <32 1>;
255 fsl,secondary-cache-geometry = <128 2>;
256 };
257
258 pamu1: pamu@1000 {
259 reg = <0x1000 0x1000>;
260 fsl,primary-cache-geometry = <32 1>;
261 fsl,secondary-cache-geometry = <128 2>;
262 };
263
264 pamu2: pamu@2000 {
265 reg = <0x2000 0x1000>;
266 fsl,primary-cache-geometry = <32 1>;
267 fsl,secondary-cache-geometry = <128 2>;
268 };
269
270 pamu3: pamu@3000 {
271 reg = <0x3000 0x1000>;
272 fsl,primary-cache-geometry = <32 1>;
273 fsl,secondary-cache-geometry = <128 2>;
274 };
275
276 pamu4: pamu@4000 {
277 reg = <0x4000 0x1000>;
278 fsl,primary-cache-geometry = <32 1>;
279 fsl,secondary-cache-geometry = <128 2>;
280 };
246 }; 281 };
247 282
248/include/ "qoriq-mpic.dtsi" 283/include/ "qoriq-mpic.dtsi"
@@ -284,7 +319,17 @@
284 }; 319 };
285 320
286/include/ "qoriq-dma-0.dtsi" 321/include/ "qoriq-dma-0.dtsi"
322 dma@100300 {
323 fsl,iommu-parent = <&pamu0>;
324 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
325 };
326
287/include/ "qoriq-dma-1.dtsi" 327/include/ "qoriq-dma-1.dtsi"
328 dma@101300 {
329 fsl,iommu-parent = <&pamu0>;
330 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
331 };
332
288/include/ "qoriq-espi-0.dtsi" 333/include/ "qoriq-espi-0.dtsi"
289 spi@110000 { 334 spi@110000 {
290 fsl,espi-num-chipselects = <4>; 335 fsl,espi-num-chipselects = <4>;
@@ -292,6 +337,8 @@
292 337
293/include/ "qoriq-esdhc-0.dtsi" 338/include/ "qoriq-esdhc-0.dtsi"
294 sdhc@114000 { 339 sdhc@114000 {
340 fsl,iommu-parent = <&pamu2>;
341 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
295 sdhci,auto-cmd12; 342 sdhci,auto-cmd12;
296 }; 343 };
297 344
@@ -301,20 +348,37 @@
301/include/ "qoriq-duart-1.dtsi" 348/include/ "qoriq-duart-1.dtsi"
302/include/ "qoriq-gpio-0.dtsi" 349/include/ "qoriq-gpio-0.dtsi"
303/include/ "qoriq-usb2-mph-0.dtsi" 350/include/ "qoriq-usb2-mph-0.dtsi"
304 usb0: usb@210000 { 351 usb0: usb@210000 {
305 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 352 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
306 phy_type = "utmi"; 353 fsl,iommu-parent = <&pamu4>;
307 port0; 354 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
308 }; 355 phy_type = "utmi";
356 port0;
357 };
309 358
310/include/ "qoriq-usb2-dr-0.dtsi" 359/include/ "qoriq-usb2-dr-0.dtsi"
311 usb1: usb@211000 { 360 usb1: usb@211000 {
312 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 361 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
313 dr_mode = "host"; 362 fsl,iommu-parent = <&pamu4>;
314 phy_type = "utmi"; 363 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
315 }; 364 dr_mode = "host";
365 phy_type = "utmi";
366 };
316 367
317/include/ "qoriq-sata2-0.dtsi" 368/include/ "qoriq-sata2-0.dtsi"
369 sata@220000 {
370 fsl,iommu-parent = <&pamu4>;
371 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
372 };
373
318/include/ "qoriq-sata2-1.dtsi" 374/include/ "qoriq-sata2-1.dtsi"
375 sata@221000 {
376 fsl,iommu-parent = <&pamu4>;
377 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
378 };
379
319/include/ "qoriq-sec5.2-0.dtsi" 380/include/ "qoriq-sec5.2-0.dtsi"
381 crypto@300000 {
382 fsl,iommu-parent = <&pamu4>;
383 };
320}; 384};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
index d4c9d5daab21..ffadcb563ada 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
@@ -36,6 +36,7 @@ crypto@30000 {
36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0"; 36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
37 #address-cells = <1>; 37 #address-cells = <1>;
38 #size-cells = <1>; 38 #size-cells = <1>;
39 ranges = <0x0 0x30000 0x10000>;
39 reg = <0x30000 0x10000>; 40 reg = <0x30000 0x10000>;
40 interrupts = <58 2 0 0>; 41 interrupts = <58 2 0 0>;
41 42
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index fb288bb882b6..5abb46c5cc95 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -12,19 +12,34 @@
12 12
13/include/ "mpc5200b.dtsi" 13/include/ "mpc5200b.dtsi"
14 14
15&gpt0 { fsl,has-wdt; };
16&gpt2 { gpio-controller; };
17&gpt3 { gpio-controller; };
18
15/ { 19/ {
16 model = "fsl,lite5200b"; 20 model = "fsl,lite5200b";
17 compatible = "fsl,lite5200b"; 21 compatible = "fsl,lite5200b";
18 22
23 leds {
24 compatible = "gpio-leds";
25 tmr2 {
26 gpios = <&gpt2 0 1>;
27 };
28 tmr3 {
29 gpios = <&gpt3 0 1>;
30 linux,default-trigger = "heartbeat";
31 };
32 led1 { gpios = <&gpio_wkup 2 1>; };
33 led2 { gpios = <&gpio_simple 3 1>; };
34 led3 { gpios = <&gpio_wkup 3 1>; };
35 led4 { gpios = <&gpio_simple 2 1>; };
36 };
37
19 memory { 38 memory {
20 reg = <0x00000000 0x10000000>; // 256MB 39 reg = <0x00000000 0x10000000>; // 256MB
21 }; 40 };
22 41
23 soc5200@f0000000 { 42 soc5200@f0000000 {
24 timer@600 { // General Purpose Timer
25 fsl,has-wdt;
26 };
27
28 psc@2000 { // PSC1 43 psc@2000 { // PSC1
29 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 44 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
30 cell-index = <0>; 45 cell-index = <0>;
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts
index 48d72f38e5ed..b5413cb85f13 100644
--- a/arch/powerpc/boot/dts/media5200.dts
+++ b/arch/powerpc/boot/dts/media5200.dts
@@ -13,6 +13,8 @@
13 13
14/include/ "mpc5200b.dtsi" 14/include/ "mpc5200b.dtsi"
15 15
16&gpt0 { fsl,has-wdt; };
17
16/ { 18/ {
17 model = "fsl,media5200"; 19 model = "fsl,media5200";
18 compatible = "fsl,media5200"; 20 compatible = "fsl,media5200";
@@ -41,10 +43,6 @@
41 soc5200@f0000000 { 43 soc5200@f0000000 {
42 bus-frequency = <132000000>;// 132 MHz 44 bus-frequency = <132000000>;// 132 MHz
43 45
44 timer@600 { // General Purpose Timer
45 fsl,has-wdt;
46 };
47
48 psc@2000 { // PSC1 46 psc@2000 { // PSC1
49 status = "disabled"; 47 status = "disabled";
50 }; 48 };
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 0b78e89ac69b..bbabd97492ad 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -12,26 +12,22 @@
12 12
13/include/ "mpc5200b.dtsi" 13/include/ "mpc5200b.dtsi"
14 14
15&gpt0 { fsl,has-wdt; };
16&gpt6 { // Motion-PRO status LED
17 compatible = "promess,motionpro-led";
18 label = "motionpro-statusled";
19 blink-delay = <100>; // 100 msec
20};
21&gpt7 { // Motion-PRO ready LED
22 compatible = "promess,motionpro-led";
23 label = "motionpro-readyled";
24};
25
15/ { 26/ {
16 model = "promess,motionpro"; 27 model = "promess,motionpro";
17 compatible = "promess,motionpro"; 28 compatible = "promess,motionpro";
18 29
19 soc5200@f0000000 { 30 soc5200@f0000000 {
20 timer@600 { // General Purpose Timer
21 fsl,has-wdt;
22 };
23
24 timer@660 { // Motion-PRO status LED
25 compatible = "promess,motionpro-led";
26 label = "motionpro-statusled";
27 blink-delay = <100>; // 100 msec
28 };
29
30 timer@670 { // Motion-PRO ready LED
31 compatible = "promess,motionpro-led";
32 label = "motionpro-readyled";
33 };
34
35 can@900 { 31 can@900 {
36 status = "disabled"; 32 status = "disabled";
37 }; 33 };
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi b/arch/powerpc/boot/dts/mpc5121.dtsi
new file mode 100644
index 000000000000..723e292b6b4e
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -0,0 +1,410 @@
1/*
2 * base MPC5121 Device Tree Source
3 *
4 * Copyright 2007-2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "mpc5121";
16 compatible = "fsl,mpc5121";
17 #address-cells = <1>;
18 #size-cells = <1>;
19 interrupt-parent = <&ipic>;
20
21 aliases {
22 ethernet0 = &eth0;
23 pci = &pci;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,5121@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <0x20>; /* 32 bytes */
34 i-cache-line-size = <0x20>; /* 32 bytes */
35 d-cache-size = <0x8000>; /* L1, 32K */
36 i-cache-size = <0x8000>; /* L1, 32K */
37 timebase-frequency = <49500000>;/* 49.5 MHz (csb/4) */
38 bus-frequency = <198000000>; /* 198 MHz csb bus */
39 clock-frequency = <396000000>; /* 396 MHz ppc core */
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
46 };
47
48 mbx@20000000 {
49 compatible = "fsl,mpc5121-mbx";
50 reg = <0x20000000 0x4000>;
51 interrupts = <66 0x8>;
52 };
53
54 sram@30000000 {
55 compatible = "fsl,mpc5121-sram";
56 reg = <0x30000000 0x20000>; /* 128K at 0x30000000 */
57 };
58
59 nfc@40000000 {
60 compatible = "fsl,mpc5121-nfc";
61 reg = <0x40000000 0x100000>; /* 1M at 0x40000000 */
62 interrupts = <6 8>;
63 #address-cells = <1>;
64 #size-cells = <1>;
65 };
66
67 localbus@80000020 {
68 compatible = "fsl,mpc5121-localbus";
69 #address-cells = <2>;
70 #size-cells = <1>;
71 reg = <0x80000020 0x40>;
72 interrupts = <7 0x8>;
73 ranges = <0x0 0x0 0xfc000000 0x04000000>;
74 };
75
76 soc@80000000 {
77 compatible = "fsl,mpc5121-immr";
78 #address-cells = <1>;
79 #size-cells = <1>;
80 #interrupt-cells = <2>;
81 ranges = <0x0 0x80000000 0x400000>;
82 reg = <0x80000000 0x400000>;
83 bus-frequency = <66000000>; /* 66 MHz ips bus */
84
85
86 /*
87 * IPIC
88 * interrupts cell = <intr #, sense>
89 * sense values match linux IORESOURCE_IRQ_* defines:
90 * sense == 8: Level, low assertion
91 * sense == 2: Edge, high-to-low change
92 */
93 ipic: interrupt-controller@c00 {
94 compatible = "fsl,mpc5121-ipic", "fsl,ipic";
95 interrupt-controller;
96 #address-cells = <0>;
97 #interrupt-cells = <2>;
98 reg = <0xc00 0x100>;
99 };
100
101 /* Watchdog timer */
102 wdt@900 {
103 compatible = "fsl,mpc5121-wdt";
104 reg = <0x900 0x100>;
105 };
106
107 /* Real time clock */
108 rtc@a00 {
109 compatible = "fsl,mpc5121-rtc";
110 reg = <0xa00 0x100>;
111 interrupts = <79 0x8 80 0x8>;
112 };
113
114 /* Reset module */
115 reset@e00 {
116 compatible = "fsl,mpc5121-reset";
117 reg = <0xe00 0x100>;
118 };
119
120 /* Clock control */
121 clock@f00 {
122 compatible = "fsl,mpc5121-clock";
123 reg = <0xf00 0x100>;
124 };
125
126 /* Power Management Controller */
127 pmc@1000{
128 compatible = "fsl,mpc5121-pmc";
129 reg = <0x1000 0x100>;
130 interrupts = <83 0x8>;
131 };
132
133 gpio@1100 {
134 compatible = "fsl,mpc5121-gpio";
135 reg = <0x1100 0x100>;
136 interrupts = <78 0x8>;
137 };
138
139 can@1300 {
140 compatible = "fsl,mpc5121-mscan";
141 reg = <0x1300 0x80>;
142 interrupts = <12 0x8>;
143 };
144
145 can@1380 {
146 compatible = "fsl,mpc5121-mscan";
147 reg = <0x1380 0x80>;
148 interrupts = <13 0x8>;
149 };
150
151 sdhc@1500 {
152 compatible = "fsl,mpc5121-sdhc";
153 reg = <0x1500 0x100>;
154 interrupts = <8 0x8>;
155 };
156
157 i2c@1700 {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
161 reg = <0x1700 0x20>;
162 interrupts = <9 0x8>;
163 };
164
165 i2c@1720 {
166 #address-cells = <1>;
167 #size-cells = <0>;
168 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
169 reg = <0x1720 0x20>;
170 interrupts = <10 0x8>;
171 };
172
173 i2c@1740 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
177 reg = <0x1740 0x20>;
178 interrupts = <11 0x8>;
179 };
180
181 i2ccontrol@1760 {
182 compatible = "fsl,mpc5121-i2c-ctrl";
183 reg = <0x1760 0x8>;
184 };
185
186 axe@2000 {
187 compatible = "fsl,mpc5121-axe";
188 reg = <0x2000 0x100>;
189 interrupts = <42 0x8>;
190 };
191
192 display@2100 {
193 compatible = "fsl,mpc5121-diu";
194 reg = <0x2100 0x100>;
195 interrupts = <64 0x8>;
196 };
197
198 can@2300 {
199 compatible = "fsl,mpc5121-mscan";
200 reg = <0x2300 0x80>;
201 interrupts = <90 0x8>;
202 };
203
204 can@2380 {
205 compatible = "fsl,mpc5121-mscan";
206 reg = <0x2380 0x80>;
207 interrupts = <91 0x8>;
208 };
209
210 viu@2400 {
211 compatible = "fsl,mpc5121-viu";
212 reg = <0x2400 0x400>;
213 interrupts = <67 0x8>;
214 };
215
216 mdio@2800 {
217 compatible = "fsl,mpc5121-fec-mdio";
218 reg = <0x2800 0x800>;
219 #address-cells = <1>;
220 #size-cells = <0>;
221 };
222
223 eth0: ethernet@2800 {
224 device_type = "network";
225 compatible = "fsl,mpc5121-fec";
226 reg = <0x2800 0x800>;
227 local-mac-address = [ 00 00 00 00 00 00 ];
228 interrupts = <4 0x8>;
229 };
230
231 /* USB1 using external ULPI PHY */
232 usb@3000 {
233 compatible = "fsl,mpc5121-usb2-dr";
234 reg = <0x3000 0x600>;
235 #address-cells = <1>;
236 #size-cells = <0>;
237 interrupts = <43 0x8>;
238 dr_mode = "otg";
239 phy_type = "ulpi";
240 };
241
242 /* USB0 using internal UTMI PHY */
243 usb@4000 {
244 compatible = "fsl,mpc5121-usb2-dr";
245 reg = <0x4000 0x600>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 interrupts = <44 0x8>;
249 dr_mode = "otg";
250 phy_type = "utmi_wide";
251 };
252
253 /* IO control */
254 ioctl@a000 {
255 compatible = "fsl,mpc5121-ioctl";
256 reg = <0xA000 0x1000>;
257 };
258
259 /* LocalPlus controller */
260 lpc@10000 {
261 compatible = "fsl,mpc5121-lpc";
262 reg = <0x10000 0x200>;
263 };
264
265 pata@10200 {
266 compatible = "fsl,mpc5121-pata";
267 reg = <0x10200 0x100>;
268 interrupts = <5 0x8>;
269 };
270
271 /* 512x PSCs are not 52xx PSC compatible */
272
273 /* PSC0 */
274 psc@11000 {
275 compatible = "fsl,mpc5121-psc";
276 reg = <0x11000 0x100>;
277 interrupts = <40 0x8>;
278 fsl,rx-fifo-size = <16>;
279 fsl,tx-fifo-size = <16>;
280 };
281
282 /* PSC1 */
283 psc@11100 {
284 compatible = "fsl,mpc5121-psc";
285 reg = <0x11100 0x100>;
286 interrupts = <40 0x8>;
287 fsl,rx-fifo-size = <16>;
288 fsl,tx-fifo-size = <16>;
289 };
290
291 /* PSC2 */
292 psc@11200 {
293 compatible = "fsl,mpc5121-psc";
294 reg = <0x11200 0x100>;
295 interrupts = <40 0x8>;
296 fsl,rx-fifo-size = <16>;
297 fsl,tx-fifo-size = <16>;
298 };
299
300 /* PSC3 */
301 psc@11300 {
302 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
303 reg = <0x11300 0x100>;
304 interrupts = <40 0x8>;
305 fsl,rx-fifo-size = <16>;
306 fsl,tx-fifo-size = <16>;
307 };
308
309 /* PSC4 */
310 psc@11400 {
311 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
312 reg = <0x11400 0x100>;
313 interrupts = <40 0x8>;
314 fsl,rx-fifo-size = <16>;
315 fsl,tx-fifo-size = <16>;
316 };
317
318 /* PSC5 */
319 psc@11500 {
320 compatible = "fsl,mpc5121-psc";
321 reg = <0x11500 0x100>;
322 interrupts = <40 0x8>;
323 fsl,rx-fifo-size = <16>;
324 fsl,tx-fifo-size = <16>;
325 };
326
327 /* PSC6 */
328 psc@11600 {
329 compatible = "fsl,mpc5121-psc";
330 reg = <0x11600 0x100>;
331 interrupts = <40 0x8>;
332 fsl,rx-fifo-size = <16>;
333 fsl,tx-fifo-size = <16>;
334 };
335
336 /* PSC7 */
337 psc@11700 {
338 compatible = "fsl,mpc5121-psc";
339 reg = <0x11700 0x100>;
340 interrupts = <40 0x8>;
341 fsl,rx-fifo-size = <16>;
342 fsl,tx-fifo-size = <16>;
343 };
344
345 /* PSC8 */
346 psc@11800 {
347 compatible = "fsl,mpc5121-psc";
348 reg = <0x11800 0x100>;
349 interrupts = <40 0x8>;
350 fsl,rx-fifo-size = <16>;
351 fsl,tx-fifo-size = <16>;
352 };
353
354 /* PSC9 */
355 psc@11900 {
356 compatible = "fsl,mpc5121-psc";
357 reg = <0x11900 0x100>;
358 interrupts = <40 0x8>;
359 fsl,rx-fifo-size = <16>;
360 fsl,tx-fifo-size = <16>;
361 };
362
363 /* PSC10 */
364 psc@11a00 {
365 compatible = "fsl,mpc5121-psc";
366 reg = <0x11a00 0x100>;
367 interrupts = <40 0x8>;
368 fsl,rx-fifo-size = <16>;
369 fsl,tx-fifo-size = <16>;
370 };
371
372 /* PSC11 */
373 psc@11b00 {
374 compatible = "fsl,mpc5121-psc";
375 reg = <0x11b00 0x100>;
376 interrupts = <40 0x8>;
377 fsl,rx-fifo-size = <16>;
378 fsl,tx-fifo-size = <16>;
379 };
380
381 pscfifo@11f00 {
382 compatible = "fsl,mpc5121-psc-fifo";
383 reg = <0x11f00 0x100>;
384 interrupts = <40 0x8>;
385 };
386
387 dma@14000 {
388 compatible = "fsl,mpc5121-dma";
389 reg = <0x14000 0x1800>;
390 interrupts = <65 0x8>;
391 };
392 };
393
394 pci: pci@80008500 {
395 compatible = "fsl,mpc5121-pci";
396 device_type = "pci";
397 interrupts = <1 0x8>;
398 clock-frequency = <0>;
399 #address-cells = <3>;
400 #size-cells = <2>;
401 #interrupt-cells = <1>;
402
403 reg = <0x80008500 0x100 /* internal registers */
404 0x80008300 0x8>; /* config space access registers */
405 bus-range = <0x0 0x0>;
406 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
407 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
408 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
409 };
410};
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index c9ef6bbe26cf..f269b1382ef7 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC5121E ADS Device Tree Source 2 * MPC5121E ADS Device Tree Source
3 * 3 *
4 * Copyright 2007,2008 Freescale Semiconductor Inc. 4 * Copyright 2007-2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,74 +9,26 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/; 12/include/ "mpc5121.dtsi"
13 13
14/ { 14/ {
15 model = "mpc5121ads"; 15 model = "mpc5121ads";
16 compatible = "fsl,mpc5121ads"; 16 compatible = "fsl,mpc5121ads";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 pci = &pci;
22 };
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 PowerPC,5121@0 {
29 device_type = "cpu";
30 reg = <0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
33 d-cache-size = <0x8000>; // L1, 32K
34 i-cache-size = <0x8000>; // L1, 32K
35 timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
36 bus-frequency = <198000000>; // 198 MHz csb bus
37 clock-frequency = <396000000>; // 396 MHz ppc core
38 };
39 };
40
41 memory {
42 device_type = "memory";
43 reg = <0x00000000 0x10000000>; // 256MB at 0
44 };
45
46 mbx@20000000 {
47 compatible = "fsl,mpc5121-mbx";
48 reg = <0x20000000 0x4000>;
49 interrupts = <66 0x8>;
50 interrupt-parent = < &ipic >;
51 };
52
53 sram@30000000 {
54 compatible = "fsl,mpc5121-sram";
55 reg = <0x30000000 0x20000>; // 128K at 0x30000000
56 };
57 17
58 nfc@40000000 { 18 nfc@40000000 {
59 compatible = "fsl,mpc5121-nfc"; 19 /*
60 reg = <0x40000000 0x100000>; // 1M at 0x40000000 20 * ADS has two Hynix 512MB Nand flash chips in a single
61 interrupts = <6 8>; 21 * stacked package.
62 interrupt-parent = < &ipic >; 22 */
63 #address-cells = <1>;
64 #size-cells = <1>;
65 // ADS has two Hynix 512MB Nand flash chips in a single
66 // stacked package.
67 chips = <2>; 23 chips = <2>;
24
68 nand@0 { 25 nand@0 {
69 label = "nand"; 26 label = "nand";
70 reg = <0x00000000 0x40000000>; // 512MB + 512MB 27 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
71 }; 28 };
72 }; 29 };
73 30
74 localbus@80000020 { 31 localbus@80000020 {
75 compatible = "fsl,mpc5121-localbus";
76 #address-cells = <2>;
77 #size-cells = <1>;
78 reg = <0x80000020 0x40>;
79
80 ranges = <0x0 0x0 0xfc000000 0x04000000 32 ranges = <0x0 0x0 0xfc000000 0x04000000
81 0x2 0x0 0x82000000 0x00008000>; 33 0x2 0x0 0x82000000 0x00008000>;
82 34
@@ -87,6 +39,7 @@
87 #size-cells = <1>; 39 #size-cells = <1>;
88 bank-width = <4>; 40 bank-width = <4>;
89 device-width = <2>; 41 device-width = <2>;
42
90 protected@0 { 43 protected@0 {
91 label = "protected"; 44 label = "protected";
92 reg = <0x00000000 0x00040000>; // first sector is protected 45 reg = <0x00000000 0x00040000>; // first sector is protected
@@ -121,91 +74,18 @@
121 interrupt-controller; 74 interrupt-controller;
122 #interrupt-cells = <2>; 75 #interrupt-cells = <2>;
123 reg = <0x2 0xa 0x5>; 76 reg = <0x2 0xa 0x5>;
124 interrupt-parent = < &ipic >; 77 /* irq routing:
125 // irq routing 78 * all irqs but touch screen are routed to irq0 (ipic 48)
126 // all irqs but touch screen are routed to irq0 (ipic 48) 79 * touch screen is statically routed to irq1 (ipic 17)
127 // touch screen is statically routed to irq1 (ipic 17) 80 * so don't use it here
128 // so don't use it here 81 */
129 interrupts = <48 0x8>; 82 interrupts = <48 0x8>;
130 }; 83 };
131 }; 84 };
132 85
133 soc@80000000 { 86 soc@80000000 {
134 compatible = "fsl,mpc5121-immr";
135 #address-cells = <1>;
136 #size-cells = <1>;
137 #interrupt-cells = <2>;
138 ranges = <0x0 0x80000000 0x400000>;
139 reg = <0x80000000 0x400000>;
140 bus-frequency = <66000000>; // 66 MHz ips bus
141
142
143 // IPIC
144 // interrupts cell = <intr #, sense>
145 // sense values match linux IORESOURCE_IRQ_* defines:
146 // sense == 8: Level, low assertion
147 // sense == 2: Edge, high-to-low change
148 //
149 ipic: interrupt-controller@c00 {
150 compatible = "fsl,mpc5121-ipic", "fsl,ipic";
151 interrupt-controller;
152 #address-cells = <0>;
153 #interrupt-cells = <2>;
154 reg = <0xc00 0x100>;
155 };
156
157 rtc@a00 { // Real time clock
158 compatible = "fsl,mpc5121-rtc";
159 reg = <0xa00 0x100>;
160 interrupts = <79 0x8 80 0x8>;
161 interrupt-parent = < &ipic >;
162 };
163
164 reset@e00 { // Reset module
165 compatible = "fsl,mpc5121-reset";
166 reg = <0xe00 0x100>;
167 };
168
169 clock@f00 { // Clock control
170 compatible = "fsl,mpc5121-clock";
171 reg = <0xf00 0x100>;
172 };
173
174 pmc@1000{ //Power Management Controller
175 compatible = "fsl,mpc5121-pmc";
176 reg = <0x1000 0x100>;
177 interrupts = <83 0x2>;
178 interrupt-parent = < &ipic >;
179 };
180
181 gpio@1100 {
182 compatible = "fsl,mpc5121-gpio";
183 reg = <0x1100 0x100>;
184 interrupts = <78 0x8>;
185 interrupt-parent = < &ipic >;
186 };
187
188 can@1300 {
189 compatible = "fsl,mpc5121-mscan";
190 interrupts = <12 0x8>;
191 interrupt-parent = < &ipic >;
192 reg = <0x1300 0x80>;
193 };
194
195 can@1380 {
196 compatible = "fsl,mpc5121-mscan";
197 interrupts = <13 0x8>;
198 interrupt-parent = < &ipic >;
199 reg = <0x1380 0x80>;
200 };
201 87
202 i2c@1700 { 88 i2c@1700 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
206 reg = <0x1700 0x20>;
207 interrupts = <9 0x8>;
208 interrupt-parent = < &ipic >;
209 fsl,preserve-clocking; 89 fsl,preserve-clocking;
210 90
211 hwmon@4a { 91 hwmon@4a {
@@ -224,196 +104,75 @@
224 }; 104 };
225 }; 105 };
226 106
227 i2c@1720 { 107 eth0: ethernet@2800 {
228 #address-cells = <1>; 108 phy-handle = <&phy0>;
229 #size-cells = <0>;
230 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
231 reg = <0x1720 0x20>;
232 interrupts = <10 0x8>;
233 interrupt-parent = < &ipic >;
234 };
235
236 i2c@1740 {
237 #address-cells = <1>;
238 #size-cells = <0>;
239 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
240 reg = <0x1740 0x20>;
241 interrupts = <11 0x8>;
242 interrupt-parent = < &ipic >;
243 }; 109 };
244 110
245 i2ccontrol@1760 { 111 can@2300 {
246 compatible = "fsl,mpc5121-i2c-ctrl"; 112 status = "disabled";
247 reg = <0x1760 0x8>;
248 }; 113 };
249 114
250 axe@2000 { 115 can@2380 {
251 compatible = "fsl,mpc5121-axe"; 116 status = "disabled";
252 reg = <0x2000 0x100>;
253 interrupts = <42 0x8>;
254 interrupt-parent = < &ipic >;
255 }; 117 };
256 118
257 display@2100 { 119 viu@2400 {
258 compatible = "fsl,mpc5121-diu"; 120 status = "disabled";
259 reg = <0x2100 0x100>;
260 interrupts = <64 0x8>;
261 interrupt-parent = < &ipic >;
262 }; 121 };
263 122
264 mdio@2800 { 123 mdio@2800 {
265 compatible = "fsl,mpc5121-fec-mdio"; 124 phy0: ethernet-phy@0 {
266 reg = <0x2800 0x800>;
267 #address-cells = <1>;
268 #size-cells = <0>;
269 phy: ethernet-phy@0 {
270 reg = <1>; 125 reg = <1>;
271 device_type = "ethernet-phy";
272 }; 126 };
273 }; 127 };
274 128
275 ethernet@2800 { 129 /* mpc5121ads only uses USB0 */
276 device_type = "network"; 130 usb@3000 {
277 compatible = "fsl,mpc5121-fec"; 131 status = "disabled";
278 reg = <0x2800 0x800>;
279 local-mac-address = [ 00 00 00 00 00 00 ];
280 interrupts = <4 0x8>;
281 interrupt-parent = < &ipic >;
282 phy-handle = < &phy >;
283 fsl,align-tx-packets = <4>;
284 }; 132 };
285 133
286 // 5121e has two dr usb modules 134 /* USB0 using internal UTMI PHY */
287 // mpc5121_ads only uses USB0
288
289 // USB1 using external ULPI PHY
290 //usb@3000 {
291 // compatible = "fsl,mpc5121-usb2-dr";
292 // reg = <0x3000 0x1000>;
293 // #address-cells = <1>;
294 // #size-cells = <0>;
295 // interrupt-parent = < &ipic >;
296 // interrupts = <43 0x8>;
297 // dr_mode = "otg";
298 // phy_type = "ulpi";
299 //};
300
301 // USB0 using internal UTMI PHY
302 usb@4000 { 135 usb@4000 {
303 compatible = "fsl,mpc5121-usb2-dr"; 136 dr_mode = "host";
304 reg = <0x4000 0x1000>;
305 #address-cells = <1>;
306 #size-cells = <0>;
307 interrupt-parent = < &ipic >;
308 interrupts = <44 0x8>;
309 dr_mode = "otg";
310 phy_type = "utmi_wide";
311 fsl,invert-drvvbus; 137 fsl,invert-drvvbus;
312 fsl,invert-pwr-fault; 138 fsl,invert-pwr-fault;
313 }; 139 };
314 140
315 // IO control 141 /* PSC3 serial port A aka ttyPSC0 */
316 ioctl@a000 { 142 psc@11300 {
317 compatible = "fsl,mpc5121-ioctl";
318 reg = <0xA000 0x1000>;
319 };
320
321 pata@10200 {
322 compatible = "fsl,mpc5121-pata";
323 reg = <0x10200 0x100>;
324 interrupts = <5 0x8>;
325 interrupt-parent = < &ipic >;
326 };
327
328 // 512x PSCs are not 52xx PSC compatible
329 // PSC3 serial port A aka ttyPSC0
330 serial@11300 {
331 device_type = "serial";
332 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 143 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
333 // Logical port assignment needed until driver
334 // learns to use aliases
335 port-number = <0>;
336 cell-index = <3>;
337 reg = <0x11300 0x100>;
338 interrupts = <40 0x8>;
339 interrupt-parent = < &ipic >;
340 rx-fifo-size = <16>;
341 tx-fifo-size = <16>;
342 }; 144 };
343 145
344 // PSC4 serial port B aka ttyPSC1 146 /* PSC4 serial port B aka ttyPSC1 */
345 serial@11400 { 147 psc@11400 {
346 device_type = "serial";
347 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 148 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
348 // Logical port assignment needed until driver
349 // learns to use aliases
350 port-number = <1>;
351 cell-index = <4>;
352 reg = <0x11400 0x100>;
353 interrupts = <40 0x8>;
354 interrupt-parent = < &ipic >;
355 rx-fifo-size = <16>;
356 tx-fifo-size = <16>;
357 }; 149 };
358 150
359 // PSC5 in ac97 mode 151 /* PSC5 in ac97 mode */
360 ac97@11500 { 152 ac97: psc@11500 {
361 compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc"; 153 compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
362 cell-index = <5>;
363 reg = <0x11500 0x100>;
364 interrupts = <40 0x8>;
365 interrupt-parent = < &ipic >;
366 fsl,mode = "ac97-slave"; 154 fsl,mode = "ac97-slave";
367 rx-fifo-size = <384>; 155 fsl,rx-fifo-size = <384>;
368 tx-fifo-size = <384>; 156 fsl,tx-fifo-size = <384>;
369 };
370
371 pscfifo@11f00 {
372 compatible = "fsl,mpc5121-psc-fifo";
373 reg = <0x11f00 0x100>;
374 interrupts = <40 0x8>;
375 interrupt-parent = < &ipic >;
376 }; 157 };
377
378 dma@14000 {
379 compatible = "fsl,mpc5121-dma";
380 reg = <0x14000 0x1800>;
381 interrupts = <65 0x8>;
382 interrupt-parent = < &ipic >;
383 };
384
385 }; 158 };
386 159
387 pci: pci@80008500 { 160 pci: pci@80008500 {
388 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 161 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
389 interrupt-map = < 162 interrupt-map = <
390 // IDSEL 0x15 - Slot 1 PCI 163 /* IDSEL 0x15 - Slot 1 PCI */
391 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8 164 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
392 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8 165 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
393 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8 166 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
394 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8 167 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
395 168
396 // IDSEL 0x16 - Slot 2 MiniPCI 169 /* IDSEL 0x16 - Slot 2 MiniPCI */
397 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8 170 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
398 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8 171 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
399 172
400 // IDSEL 0x17 - Slot 3 MiniPCI 173 /* IDSEL 0x17 - Slot 3 MiniPCI */
401 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8 174 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
402 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8 175 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
403 >; 176 >;
404 interrupt-parent = < &ipic >;
405 interrupts = <1 0x8>;
406 bus-range = <0 0>;
407 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
408 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
409 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
410 clock-frequency = <0>;
411 #interrupt-cells = <1>;
412 #size-cells = <2>;
413 #address-cells = <3>;
414 reg = <0x80008500 0x100 /* internal registers */
415 0x80008300 0x8>; /* config space access registers */
416 compatible = "fsl,mpc5121-pci";
417 device_type = "pci";
418 }; 177 };
419}; 178};
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index 39ed65a44c5f..969b2200b2f9 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -64,50 +64,59 @@
64 reg = <0x500 0x80>; 64 reg = <0x500 0x80>;
65 }; 65 };
66 66
67 timer@600 { // General Purpose Timer 67 gpt0: timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
69 reg = <0x600 0x10>; 70 reg = <0x600 0x10>;
70 interrupts = <1 9 0>; 71 interrupts = <1 9 0>;
72 // add 'fsl,has-wdt' to enable watchdog
71 }; 73 };
72 74
73 timer@610 { // General Purpose Timer 75 gpt1: timer@610 { // General Purpose Timer
74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 76 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
77 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
75 reg = <0x610 0x10>; 78 reg = <0x610 0x10>;
76 interrupts = <1 10 0>; 79 interrupts = <1 10 0>;
77 }; 80 };
78 81
79 timer@620 { // General Purpose Timer 82 gpt2: timer@620 { // General Purpose Timer
80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 83 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
84 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
81 reg = <0x620 0x10>; 85 reg = <0x620 0x10>;
82 interrupts = <1 11 0>; 86 interrupts = <1 11 0>;
83 }; 87 };
84 88
85 timer@630 { // General Purpose Timer 89 gpt3: timer@630 { // General Purpose Timer
86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 90 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
91 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
87 reg = <0x630 0x10>; 92 reg = <0x630 0x10>;
88 interrupts = <1 12 0>; 93 interrupts = <1 12 0>;
89 }; 94 };
90 95
91 timer@640 { // General Purpose Timer 96 gpt4: timer@640 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 97 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
98 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
93 reg = <0x640 0x10>; 99 reg = <0x640 0x10>;
94 interrupts = <1 13 0>; 100 interrupts = <1 13 0>;
95 }; 101 };
96 102
97 timer@650 { // General Purpose Timer 103 gpt5: timer@650 { // General Purpose Timer
98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
105 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
99 reg = <0x650 0x10>; 106 reg = <0x650 0x10>;
100 interrupts = <1 14 0>; 107 interrupts = <1 14 0>;
101 }; 108 };
102 109
103 timer@660 { // General Purpose Timer 110 gpt6: timer@660 { // General Purpose Timer
104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 111 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
112 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
105 reg = <0x660 0x10>; 113 reg = <0x660 0x10>;
106 interrupts = <1 15 0>; 114 interrupts = <1 15 0>;
107 }; 115 };
108 116
109 timer@670 { // General Purpose Timer 117 gpt7: timer@670 { // General Purpose Timer
110 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 118 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
119 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
111 reg = <0x670 0x10>; 120 reg = <0x670 0x10>;
112 interrupts = <1 16 0>; 121 interrupts = <1 16 0>;
113 }; 122 };
diff --git a/arch/powerpc/boot/dts/mucmc52.dts b/arch/powerpc/boot/dts/mucmc52.dts
index 21d34720fcc9..d3a792bb5c1a 100644
--- a/arch/powerpc/boot/dts/mucmc52.dts
+++ b/arch/powerpc/boot/dts/mucmc52.dts
@@ -13,47 +13,23 @@
13 13
14/include/ "mpc5200b.dtsi" 14/include/ "mpc5200b.dtsi"
15 15
16/* Timer pins that need to be in GPIO mode */
17&gpt0 { gpio-controller; };
18&gpt1 { gpio-controller; };
19&gpt2 { gpio-controller; };
20&gpt3 { gpio-controller; };
21
22/* Disabled timers */
23&gpt4 { status = "disabled"; };
24&gpt5 { status = "disabled"; };
25&gpt6 { status = "disabled"; };
26&gpt7 { status = "disabled"; };
27
16/ { 28/ {
17 model = "manroland,mucmc52"; 29 model = "manroland,mucmc52";
18 compatible = "manroland,mucmc52"; 30 compatible = "manroland,mucmc52";
19 31
20 soc5200@f0000000 { 32 soc5200@f0000000 {
21 gpt0: timer@600 { // GPT 0 in GPIO mode
22 gpio-controller;
23 #gpio-cells = <2>;
24 };
25
26 gpt1: timer@610 { // General Purpose Timer in GPIO mode
27 gpio-controller;
28 #gpio-cells = <2>;
29 };
30
31 gpt2: timer@620 { // General Purpose Timer in GPIO mode
32 gpio-controller;
33 #gpio-cells = <2>;
34 };
35
36 gpt3: timer@630 { // General Purpose Timer in GPIO mode
37 gpio-controller;
38 #gpio-cells = <2>;
39 };
40
41 timer@640 {
42 status = "disabled";
43 };
44
45 timer@650 {
46 status = "disabled";
47 };
48
49 timer@660 {
50 status = "disabled";
51 };
52
53 timer@670 {
54 status = "disabled";
55 };
56
57 rtc@800 { 33 rtc@800 {
58 status = "disabled"; 34 status = "disabled";
59 }; 35 };
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
index 24f668039295..cf073e693f24 100644
--- a/arch/powerpc/boot/dts/o2d.dtsi
+++ b/arch/powerpc/boot/dts/o2d.dtsi
@@ -12,6 +12,13 @@
12 12
13/include/ "mpc5200b.dtsi" 13/include/ "mpc5200b.dtsi"
14 14
15&gpt0 {
16 gpio-controller;
17 fsl,has-wdt;
18 fsl,wdt-on-boot = <0>;
19};
20&gpt1 { gpio-controller; };
21
15/ { 22/ {
16 model = "ifm,o2d"; 23 model = "ifm,o2d";
17 compatible = "ifm,o2d"; 24 compatible = "ifm,o2d";
@@ -22,24 +29,6 @@
22 29
23 soc5200@f0000000 { 30 soc5200@f0000000 {
24 31
25 gpio_simple: gpio@b00 {
26 };
27
28 timer@600 { // General Purpose Timer
29 #gpio-cells = <2>;
30 gpio-controller;
31 fsl,has-wdt;
32 fsl,wdt-on-boot = <0>;
33 };
34
35 timer@610 {
36 #gpio-cells = <2>;
37 gpio-controller;
38 };
39
40 timer7: timer@670 {
41 };
42
43 rtc@800 { 32 rtc@800 {
44 status = "disabled"; 33 status = "disabled";
45 }; 34 };
@@ -118,7 +107,7 @@
118 csi@3,0 { 107 csi@3,0 {
119 compatible = "ifm,o2d-csi"; 108 compatible = "ifm,o2d-csi";
120 reg = <3 0 0x00100000>; 109 reg = <3 0 0x00100000>;
121 ifm,csi-clk-handle = <&timer7>; 110 ifm,csi-clk-handle = <&gpt7>;
122 gpios = <&gpio_simple 23 0 /* imag_capture */ 111 gpios = <&gpio_simple 23 0 /* imag_capture */
123 &gpio_simple 26 0 /* imag_reset */ 112 &gpio_simple 26 0 /* imag_reset */
124 &gpio_simple 29 0>; /* imag_master_en */ 113 &gpio_simple 29 0>; /* imag_master_en */
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 96512c058033..192e66af0001 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -14,51 +14,19 @@
14 14
15/include/ "mpc5200b.dtsi" 15/include/ "mpc5200b.dtsi"
16 16
17&gpt0 { fsl,has-wdt; };
18&gpt2 { gpio-controller; };
19&gpt3 { gpio-controller; };
20&gpt4 { gpio-controller; };
21&gpt5 { gpio-controller; };
22&gpt6 { gpio-controller; };
23&gpt7 { gpio-controller; };
24
17/ { 25/ {
18 model = "phytec,pcm030"; 26 model = "phytec,pcm030";
19 compatible = "phytec,pcm030"; 27 compatible = "phytec,pcm030";
20 28
21 soc5200@f0000000 { 29 soc5200@f0000000 {
22 timer@600 { // General Purpose Timer
23 fsl,has-wdt;
24 };
25
26 gpt2: timer@620 { // General Purpose Timer in GPIO mode
27 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
28 gpio-controller;
29 #gpio-cells = <2>;
30 };
31
32 gpt3: timer@630 { // General Purpose Timer in GPIO mode
33 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
34 gpio-controller;
35 #gpio-cells = <2>;
36 };
37
38 gpt4: timer@640 { // General Purpose Timer in GPIO mode
39 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
40 gpio-controller;
41 #gpio-cells = <2>;
42 };
43
44 gpt5: timer@650 { // General Purpose Timer in GPIO mode
45 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
46 gpio-controller;
47 #gpio-cells = <2>;
48 };
49
50 gpt6: timer@660 { // General Purpose Timer in GPIO mode
51 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
52 gpio-controller;
53 #gpio-cells = <2>;
54 };
55
56 gpt7: timer@670 { // General Purpose Timer in GPIO mode
57 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
58 gpio-controller;
59 #gpio-cells = <2>;
60 };
61
62 audioplatform: psc@2000 { /* PSC1 in ac97 mode */ 30 audioplatform: psc@2000 { /* PSC1 in ac97 mode */
63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 31 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
64 cell-index = <0>; 32 cell-index = <0>;
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts
index 1dd478bfff96..96b139bf50e9 100644
--- a/arch/powerpc/boot/dts/pcm032.dts
+++ b/arch/powerpc/boot/dts/pcm032.dts
@@ -14,6 +14,14 @@
14 14
15/include/ "mpc5200b.dtsi" 15/include/ "mpc5200b.dtsi"
16 16
17&gpt0 { fsl,has-wdt; };
18&gpt2 { gpio-controller; };
19&gpt3 { gpio-controller; };
20&gpt4 { gpio-controller; };
21&gpt5 { gpio-controller; };
22&gpt6 { gpio-controller; };
23&gpt7 { gpio-controller; };
24
17/ { 25/ {
18 model = "phytec,pcm032"; 26 model = "phytec,pcm032";
19 compatible = "phytec,pcm032"; 27 compatible = "phytec,pcm032";
@@ -23,43 +31,6 @@
23 }; 31 };
24 32
25 soc5200@f0000000 { 33 soc5200@f0000000 {
26 timer@600 { // General Purpose Timer
27 fsl,has-wdt;
28 };
29
30 gpt2: timer@620 { // General Purpose Timer in GPIO mode
31 gpio-controller;
32 #gpio-cells = <2>;
33 };
34
35 gpt3: timer@630 { // General Purpose Timer in GPIO mode
36 gpio-controller;
37 #gpio-cells = <2>;
38 };
39
40 gpt4: timer@640 { // General Purpose Timer in GPIO mode
41 gpio-controller;
42 #gpio-cells = <2>;
43 };
44
45 gpt5: timer@650 { // General Purpose Timer in GPIO mode
46 gpio-controller;
47 #gpio-cells = <2>;
48 };
49
50 gpt6: timer@660 { // General Purpose Timer in GPIO mode
51 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
52 reg = <0x660 0x10>;
53 interrupts = <1 15 0>;
54 gpio-controller;
55 #gpio-cells = <2>;
56 };
57
58 gpt7: timer@670 { // General Purpose Timer in GPIO mode
59 gpio-controller;
60 #gpio-cells = <2>;
61 };
62
63 psc@2000 { /* PSC1 is ac97 */ 34 psc@2000 { /* PSC1 is ac97 */
64 compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; 35 compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
65 cell-index = <0>; 36 cell-index = <0>;
diff --git a/arch/powerpc/boot/dts/pdm360ng.dts b/arch/powerpc/boot/dts/pdm360ng.dts
index 94dfa5c9a7f9..0b069477838a 100644
--- a/arch/powerpc/boot/dts/pdm360ng.dts
+++ b/arch/powerpc/boot/dts/pdm360ng.dts
@@ -13,7 +13,7 @@
13 * option) any later version. 13 * option) any later version.
14 */ 14 */
15 15
16/dts-v1/; 16/include/ "mpc5121.dtsi"
17 17
18/ { 18/ {
19 model = "pdm360ng"; 19 model = "pdm360ng";
@@ -22,38 +22,12 @@
22 #size-cells = <1>; 22 #size-cells = <1>;
23 interrupt-parent = <&ipic>; 23 interrupt-parent = <&ipic>;
24 24
25 aliases {
26 ethernet0 = &eth0;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,5121@0 {
34 device_type = "cpu";
35 reg = <0>;
36 d-cache-line-size = <0x20>; // 32 bytes
37 i-cache-line-size = <0x20>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
40 timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
41 bus-frequency = <198000000>; // 198 MHz csb bus
42 clock-frequency = <396000000>; // 396 MHz ppc core
43 };
44 };
45
46 memory { 25 memory {
47 device_type = "memory"; 26 device_type = "memory";
48 reg = <0x00000000 0x20000000>; // 512MB at 0 27 reg = <0x00000000 0x20000000>; // 512MB at 0
49 }; 28 };
50 29
51 nfc@40000000 { 30 nfc@40000000 {
52 compatible = "fsl,mpc5121-nfc";
53 reg = <0x40000000 0x100000>;
54 interrupts = <0x6 0x8>;
55 #address-cells = <0x1>;
56 #size-cells = <0x1>;
57 bank-width = <0x1>; 31 bank-width = <0x1>;
58 chips = <0x1>; 32 chips = <0x1>;
59 33
@@ -63,17 +37,7 @@
63 }; 37 };
64 }; 38 };
65 39
66 sram@50000000 {
67 compatible = "fsl,mpc5121-sram";
68 reg = <0x50000000 0x20000>; // 128K at 0x50000000
69 };
70
71 localbus@80000020 { 40 localbus@80000020 {
72 compatible = "fsl,mpc5121-localbus";
73 #address-cells = <2>;
74 #size-cells = <1>;
75 reg = <0x80000020 0x40>;
76
77 ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */ 41 ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */
78 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */ 42 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */
79 43
@@ -129,74 +93,8 @@
129 }; 93 };
130 94
131 soc@80000000 { 95 soc@80000000 {
132 compatible = "fsl,mpc5121-immr";
133 #address-cells = <1>;
134 #size-cells = <1>;
135 #interrupt-cells = <2>;
136 ranges = <0x0 0x80000000 0x400000>;
137 reg = <0x80000000 0x400000>;
138 bus-frequency = <66000000>; // 66 MHz ips bus
139
140 // IPIC
141 // interrupts cell = <intr #, sense>
142 // sense values match linux IORESOURCE_IRQ_* defines:
143 // sense == 8: Level, low assertion
144 // sense == 2: Edge, high-to-low change
145 //
146 ipic: interrupt-controller@c00 {
147 compatible = "fsl,mpc5121-ipic", "fsl,ipic";
148 interrupt-controller;
149 #address-cells = <0>;
150 #interrupt-cells = <2>;
151 reg = <0xc00 0x100>;
152 };
153
154 rtc@a00 { // Real time clock
155 compatible = "fsl,mpc5121-rtc";
156 reg = <0xa00 0x100>;
157 interrupts = <79 0x8 80 0x8>;
158 };
159
160 reset@e00 { // Reset module
161 compatible = "fsl,mpc5121-reset";
162 reg = <0xe00 0x100>;
163 };
164
165 clock@f00 { // Clock control
166 compatible = "fsl,mpc5121-clock";
167 reg = <0xf00 0x100>;
168 };
169
170 pmc@1000{ //Power Management Controller
171 compatible = "fsl,mpc5121-pmc";
172 reg = <0x1000 0x100>;
173 interrupts = <83 0x2>;
174 };
175
176 gpio@1100 {
177 compatible = "fsl,mpc5121-gpio";
178 reg = <0x1100 0x100>;
179 interrupts = <78 0x8>;
180 };
181
182 can@1300 {
183 compatible = "fsl,mpc5121-mscan";
184 interrupts = <12 0x8>;
185 reg = <0x1300 0x80>;
186 };
187
188 can@1380 {
189 compatible = "fsl,mpc5121-mscan";
190 interrupts = <13 0x8>;
191 reg = <0x1380 0x80>;
192 };
193 96
194 i2c@1700 { 97 i2c@1700 {
195 #address-cells = <1>;
196 #size-cells = <0>;
197 compatible = "fsl,mpc5121-i2c";
198 reg = <0x1700 0x20>;
199 interrupts = <0x9 0x8>;
200 fsl,preserve-clocking; 98 fsl,preserve-clocking;
201 99
202 eeprom@50 { 100 eeprom@50 {
@@ -210,201 +108,92 @@
210 }; 108 };
211 }; 109 };
212 110
213 i2c@1740 { 111 i2c@1720 {
214 #address-cells = <1>; 112 status = "disabled";
215 #size-cells = <0>;
216 compatible = "fsl,mpc5121-i2c";
217 reg = <0x1740 0x20>;
218 interrupts = <0xb 0x8>;
219 fsl,preserve-clocking;
220 };
221
222 i2ccontrol@1760 {
223 compatible = "fsl,mpc5121-i2c-ctrl";
224 reg = <0x1760 0x8>;
225 };
226
227 axe@2000 {
228 compatible = "fsl,mpc5121-axe";
229 reg = <0x2000 0x100>;
230 interrupts = <42 0x8>;
231 };
232
233 display@2100 {
234 compatible = "fsl,mpc5121-diu";
235 reg = <0x2100 0x100>;
236 interrupts = <64 0x8>;
237 }; 113 };
238 114
239 can@2300 { 115 i2c@1740 {
240 compatible = "fsl,mpc5121-mscan"; 116 fsl,preserve-clocking;
241 interrupts = <90 0x8>;
242 reg = <0x2300 0x80>;
243 };
244
245 can@2380 {
246 compatible = "fsl,mpc5121-mscan";
247 interrupts = <91 0x8>;
248 reg = <0x2380 0x80>;
249 }; 117 };
250 118
251 viu@2400 { 119 ethernet@2800 {
252 compatible = "fsl,mpc5121-viu"; 120 phy-handle = <&phy0>;
253 reg = <0x2400 0x400>;
254 interrupts = <67 0x8>;
255 }; 121 };
256 122
257 mdio@2800 { 123 mdio@2800 {
258 compatible = "fsl,mpc5121-fec-mdio"; 124 phy0: ethernet-phy@1f {
259 reg = <0x2800 0x200>;
260 #address-cells = <1>;
261 #size-cells = <0>;
262 phy: ethernet-phy@0 {
263 compatible = "smsc,lan8700"; 125 compatible = "smsc,lan8700";
264 reg = <0x1f>; 126 reg = <0x1f>;
265 }; 127 };
266 }; 128 };
267 129
268 eth0: ethernet@2800 { 130 /* USB1 using external ULPI PHY */
269 compatible = "fsl,mpc5121-fec";
270 reg = <0x2800 0x200>;
271 local-mac-address = [ 00 00 00 00 00 00 ];
272 interrupts = <4 0x8>;
273 phy-handle = < &phy >;
274 };
275
276 // USB1 using external ULPI PHY
277 usb@3000 { 131 usb@3000 {
278 compatible = "fsl,mpc5121-usb2-dr";
279 reg = <0x3000 0x600>;
280 #address-cells = <1>;
281 #size-cells = <0>;
282 interrupts = <43 0x8>;
283 dr_mode = "host"; 132 dr_mode = "host";
284 phy_type = "ulpi";
285 }; 133 };
286 134
287 // USB0 using internal UTMI PHY 135 /* USB0 using internal UTMI PHY */
288 usb@4000 { 136 usb@4000 {
289 compatible = "fsl,mpc5121-usb2-dr";
290 reg = <0x4000 0x600>;
291 #address-cells = <1>;
292 #size-cells = <0>;
293 interrupts = <44 0x8>;
294 dr_mode = "otg";
295 phy_type = "utmi_wide";
296 fsl,invert-pwr-fault; 137 fsl,invert-pwr-fault;
297 }; 138 };
298 139
299 // IO control 140 psc@11000 {
300 ioctl@a000 {
301 compatible = "fsl,mpc5121-ioctl";
302 reg = <0xA000 0x1000>;
303 };
304
305 // 512x PSCs are not 52xx PSCs compatible
306 serial@11000 {
307 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 141 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
308 cell-index = <0>;
309 reg = <0x11000 0x100>;
310 interrupts = <40 0x8>;
311 fsl,rx-fifo-size = <16>;
312 fsl,tx-fifo-size = <16>;
313 }; 142 };
314 143
315 serial@11100 { 144 psc@11100 {
316 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 145 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
317 cell-index = <1>;
318 reg = <0x11100 0x100>;
319 interrupts = <40 0x8>;
320 fsl,rx-fifo-size = <16>;
321 fsl,tx-fifo-size = <16>;
322 }; 146 };
323 147
324 serial@11200 { 148 psc@11200 {
325 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 149 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
326 cell-index = <2>;
327 reg = <0x11200 0x100>;
328 interrupts = <40 0x8>;
329 fsl,rx-fifo-size = <16>;
330 fsl,tx-fifo-size = <16>;
331 }; 150 };
332 151
333 serial@11300 { 152 psc@11300 {
334 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 153 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
335 cell-index = <3>;
336 reg = <0x11300 0x100>;
337 interrupts = <40 0x8>;
338 fsl,rx-fifo-size = <16>;
339 fsl,tx-fifo-size = <16>;
340 }; 154 };
341 155
342 serial@11400 { 156 psc@11400 {
343 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 157 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
344 cell-index = <4>;
345 reg = <0x11400 0x100>;
346 interrupts = <40 0x8>;
347 fsl,rx-fifo-size = <16>;
348 fsl,tx-fifo-size = <16>;
349 }; 158 };
350 159
351 serial@11600 { 160 psc@11500 {
352 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 161 status = "disabled";
353 cell-index = <6>;
354 reg = <0x11600 0x100>;
355 interrupts = <40 0x8>;
356 fsl,rx-fifo-size = <16>;
357 fsl,tx-fifo-size = <16>;
358 }; 162 };
359 163
360 serial@11800 { 164 psc@11600 {
361 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 165 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
362 cell-index = <8>;
363 reg = <0x11800 0x100>;
364 interrupts = <40 0x8>;
365 fsl,rx-fifo-size = <16>;
366 fsl,tx-fifo-size = <16>;
367 }; 166 };
368 167
369 serial@11B00 { 168 psc@11700 {
370 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; 169 status = "disabled";
371 cell-index = <11>;
372 reg = <0x11B00 0x100>;
373 interrupts = <40 0x8>;
374 fsl,rx-fifo-size = <16>;
375 fsl,tx-fifo-size = <16>;
376 }; 170 };
377 171
378 pscfifo@11f00 { 172 psc@11800 {
379 compatible = "fsl,mpc5121-psc-fifo"; 173 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
380 reg = <0x11f00 0x100>;
381 interrupts = <40 0x8>;
382 }; 174 };
383 175
384 spi@11900 { 176 psc@11900 {
385 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc"; 177 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
386 cell-index = <9>;
387 #address-cells = <1>; 178 #address-cells = <1>;
388 #size-cells = <0>; 179 #size-cells = <0>;
389 reg = <0x11900 0x100>;
390 interrupts = <40 0x8>;
391 fsl,rx-fifo-size = <16>;
392 fsl,tx-fifo-size = <16>;
393 180
394 // 7845 touch screen controller 181 /* ADS7845 touch screen controller */
395 ts@0 { 182 ts@0 {
396 compatible = "ti,ads7846"; 183 compatible = "ti,ads7846";
397 reg = <0x0>; 184 reg = <0x0>;
398 spi-max-frequency = <3000000>; 185 spi-max-frequency = <3000000>;
399 // pen irq is GPIO25 186 /* pen irq is GPIO25 */
400 interrupts = <78 0x8>; 187 interrupts = <78 0x8>;
401 }; 188 };
402 }; 189 };
403 190
404 dma@14000 { 191 psc@11a00 {
405 compatible = "fsl,mpc5121-dma"; 192 status = "disabled";
406 reg = <0x14000 0x1800>; 193 };
407 interrupts = <65 0x8>; 194
195 psc@11b00 {
196 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
408 }; 197 };
409 }; 198 };
410}; 199};
diff --git a/arch/powerpc/boot/dts/ppa8548.dts b/arch/powerpc/boot/dts/ppa8548.dts
new file mode 100644
index 000000000000..f97eceed610a
--- /dev/null
+++ b/arch/powerpc/boot/dts/ppa8548.dts
@@ -0,0 +1,166 @@
1/*
2 * PPA8548 Device Tree Source (36-bit address map)
3 * Copyright 2013 Prodrive B.V.
4 *
5 * Based on:
6 * MPC8548 CDS Device Tree Source (36-bit address map)
7 * Copyright 2012 Freescale Semiconductor Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15/include/ "fsl/mpc8548si-pre.dtsi"
16
17/ {
18 model = "ppa8548";
19 compatible = "ppa8548";
20 #address-cells = <2>;
21 #size-cells = <2>;
22 interrupt-parent = <&mpic>;
23
24 memory {
25 device_type = "memory";
26 reg = <0 0 0x0 0x40000000>;
27 };
28
29 lbc: localbus@fe0005000 {
30 reg = <0xf 0xe0005000 0 0x1000>;
31 ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
32 };
33
34 soc: soc8548@fe0000000 {
35 ranges = <0 0xf 0xe0000000 0x100000>;
36 };
37
38 pci0: pci@fe0008000 {
39 /* ppa8548 board doesn't support PCI */
40 status = "disabled";
41 };
42
43 pci1: pci@fe0009000 {
44 /* ppa8548 board doesn't support PCI */
45 status = "disabled";
46 };
47
48 pci2: pcie@fe000a000 {
49 /* ppa8548 board doesn't support PCI */
50 status = "disabled";
51 };
52
53 rio: rapidio@fe00c0000 {
54 reg = <0xf 0xe00c0000 0x0 0x11000>;
55 port1 {
56 ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
57 };
58 };
59};
60
61&lbc {
62 nor@0 {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 compatible = "cfi-flash";
66 reg = <0x0 0x0 0x00800000>;
67 bank-width = <2>;
68 device-width = <2>;
69
70 partition@0 {
71 reg = <0x0 0x7A0000>;
72 label = "user";
73 };
74
75 partition@7A0000 {
76 reg = <0x7A0000 0x20000>;
77 label = "env";
78 read-only;
79 };
80
81 partition@7C0000 {
82 reg = <0x7C0000 0x40000>;
83 label = "u-boot";
84 read-only;
85 };
86 };
87};
88
89&soc {
90 i2c@3000 {
91 rtc@6f {
92 compatible = "intersil,isl1208";
93 reg = <0x6f>;
94 };
95 };
96
97 i2c@3100 {
98 };
99
100 /*
101 * Only ethernet controller @25000 and @26000 are used.
102 * Use alias enet2 and enet3 for the remainig controllers,
103 * to stay compatible with mpc8548si-pre.dtsi.
104 */
105 enet2: ethernet@24000 {
106 status = "disabled";
107 };
108
109 mdio@24520 {
110 phy0: ethernet-phy@0 {
111 interrupts = <7 1 0 0>;
112 reg = <0x0>;
113 device_type = "ethernet-phy";
114 };
115 phy1: ethernet-phy@1 {
116 interrupts = <8 1 0 0>;
117 reg = <0x1>;
118 device_type = "ethernet-phy";
119 };
120 tbi0: tbi-phy@11 {
121 reg = <0x11>;
122 device_type = "tbi-phy";
123 };
124 };
125
126 enet0: ethernet@25000 {
127 tbi-handle = <&tbi1>;
128 phy-handle = <&phy0>;
129 };
130
131 mdio@25520 {
132 tbi1: tbi-phy@11 {
133 reg = <0x11>;
134 device_type = "tbi-phy";
135 };
136 };
137
138 enet1: ethernet@26000 {
139 tbi-handle = <&tbi2>;
140 phy-handle = <&phy1>;
141 };
142
143 mdio@26520 {
144 tbi2: tbi-phy@11 {
145 reg = <0x11>;
146 device_type = "tbi-phy";
147 };
148 };
149
150 enet3: ethernet@27000 {
151 status = "disabled";
152 };
153
154 mdio@27520 {
155 tbi3: tbi-phy@11 {
156 reg = <0x11>;
157 device_type = "tbi-phy";
158 };
159 };
160
161 crypto@30000 {
162 status = "disabled";
163 };
164};
165
166/include/ "fsl/mpc8548si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/sbc8548-altflash.dts b/arch/powerpc/boot/dts/sbc8548-altflash.dts
new file mode 100644
index 000000000000..0b38a0defd2c
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8548-altflash.dts
@@ -0,0 +1,115 @@
1/*
2 * SBC8548 Device Tree Source
3 *
4 * Configured for booting off the alternate (64MB SODIMM) flash.
5 * Requires switching JP12 jumpers and changing SW2.8 setting.
6 *
7 * Copyright 2013 Wind River Systems Inc.
8 *
9 * Paul Gortmaker (see MAINTAINERS for contact information)
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17
18/dts-v1/;
19
20/include/ "sbc8548-pre.dtsi"
21
22/{
23 localbus@e0000000 {
24 #address-cells = <2>;
25 #size-cells = <1>;
26 compatible = "simple-bus";
27 reg = <0xe0000000 0x5000>;
28 interrupt-parent = <&mpic>;
29
30 ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
31 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
32 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
33 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
34 0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
35
36 flash@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x0 0x0 0x04000000>;
40 compatible = "intel,JS28F128", "cfi-flash";
41 bank-width = <4>;
42 device-width = <1>;
43 partition@0x0 {
44 label = "space";
45 /* FC000000 -> FFEFFFFF */
46 reg = <0x00000000 0x03f00000>;
47 };
48 partition@0x03f00000 {
49 label = "bootloader";
50 /* FFF00000 -> FFFFFFFF */
51 reg = <0x03f00000 0x00100000>;
52 read-only;
53 };
54 };
55
56
57 epld@5,0 {
58 compatible = "wrs,epld-localbus";
59 #address-cells = <2>;
60 #size-cells = <1>;
61 reg = <0x5 0x0 0x00b10000>;
62 ranges = <
63 0x0 0x0 0x5 0x000000 0x1fff /* LED */
64 0x1 0x0 0x5 0x100000 0x1fff /* Switches */
65 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
66 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
67 >;
68
69 led@0,0 {
70 compatible = "led";
71 reg = <0x0 0x0 0x1fff>;
72 };
73
74 switches@1,0 {
75 compatible = "switches";
76 reg = <0x1 0x0 0x1fff>;
77 };
78
79 hw-rev@3,0 {
80 compatible = "hw-rev";
81 reg = <0x3 0x0 0x1fff>;
82 };
83
84 eeprom@b,0 {
85 compatible = "eeprom";
86 reg = <0xb 0 0x1fff>;
87 };
88
89 };
90
91 alt-flash@6,0 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 compatible = "intel,JS28F640", "cfi-flash";
95 reg = <0x6 0x0 0x800000>;
96 bank-width = <1>;
97 device-width = <1>;
98 partition@0x0 {
99 label = "space";
100 /* EF800000 -> EFF9FFFF */
101 reg = <0x00000000 0x007a0000>;
102 };
103 partition@0x7a0000 {
104 label = "bootloader";
105 /* EFFA0000 -> EFFFFFFF */
106 reg = <0x007a0000 0x00060000>;
107 read-only;
108 };
109 };
110
111
112 };
113};
114
115/include/ "sbc8548-post.dtsi"
diff --git a/arch/powerpc/boot/dts/sbc8548-post.dtsi b/arch/powerpc/boot/dts/sbc8548-post.dtsi
new file mode 100644
index 000000000000..33a47e27a11e
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8548-post.dtsi
@@ -0,0 +1,295 @@
1/*
2 * SBC8548 Device Tree Source
3 *
4 * Copyright 2007 Wind River Systems Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/{
15 soc8548@e0000000 {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 device_type = "soc";
19 ranges = <0x00000000 0xe0000000 0x00100000>;
20 bus-frequency = <0>;
21 compatible = "simple-bus";
22
23 ecm-law@0 {
24 compatible = "fsl,ecm-law";
25 reg = <0x0 0x1000>;
26 fsl,num-laws = <10>;
27 };
28
29 ecm@1000 {
30 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
31 reg = <0x1000 0x1000>;
32 interrupts = <17 2>;
33 interrupt-parent = <&mpic>;
34 };
35
36 memory-controller@2000 {
37 compatible = "fsl,mpc8548-memory-controller";
38 reg = <0x2000 0x1000>;
39 interrupt-parent = <&mpic>;
40 interrupts = <0x12 0x2>;
41 };
42
43 L2: l2-cache-controller@20000 {
44 compatible = "fsl,mpc8548-l2-cache-controller";
45 reg = <0x20000 0x1000>;
46 cache-line-size = <0x20>; // 32 bytes
47 cache-size = <0x80000>; // L2, 512K
48 interrupt-parent = <&mpic>;
49 interrupts = <0x10 0x2>;
50 };
51
52 i2c@3000 {
53 #address-cells = <1>;
54 #size-cells = <0>;
55 cell-index = <0>;
56 compatible = "fsl-i2c";
57 reg = <0x3000 0x100>;
58 interrupts = <0x2b 0x2>;
59 interrupt-parent = <&mpic>;
60 dfsrr;
61 };
62
63 i2c@3100 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <1>;
67 compatible = "fsl-i2c";
68 reg = <0x3100 0x100>;
69 interrupts = <0x2b 0x2>;
70 interrupt-parent = <&mpic>;
71 dfsrr;
72 };
73
74 dma@21300 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
78 reg = <0x21300 0x4>;
79 ranges = <0x0 0x21100 0x200>;
80 cell-index = <0>;
81 dma-channel@0 {
82 compatible = "fsl,mpc8548-dma-channel",
83 "fsl,eloplus-dma-channel";
84 reg = <0x0 0x80>;
85 cell-index = <0>;
86 interrupt-parent = <&mpic>;
87 interrupts = <20 2>;
88 };
89 dma-channel@80 {
90 compatible = "fsl,mpc8548-dma-channel",
91 "fsl,eloplus-dma-channel";
92 reg = <0x80 0x80>;
93 cell-index = <1>;
94 interrupt-parent = <&mpic>;
95 interrupts = <21 2>;
96 };
97 dma-channel@100 {
98 compatible = "fsl,mpc8548-dma-channel",
99 "fsl,eloplus-dma-channel";
100 reg = <0x100 0x80>;
101 cell-index = <2>;
102 interrupt-parent = <&mpic>;
103 interrupts = <22 2>;
104 };
105 dma-channel@180 {
106 compatible = "fsl,mpc8548-dma-channel",
107 "fsl,eloplus-dma-channel";
108 reg = <0x180 0x80>;
109 cell-index = <3>;
110 interrupt-parent = <&mpic>;
111 interrupts = <23 2>;
112 };
113 };
114
115 enet0: ethernet@24000 {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 cell-index = <0>;
119 device_type = "network";
120 model = "eTSEC";
121 compatible = "gianfar";
122 reg = <0x24000 0x1000>;
123 ranges = <0x0 0x24000 0x1000>;
124 local-mac-address = [ 00 00 00 00 00 00 ];
125 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
126 interrupt-parent = <&mpic>;
127 tbi-handle = <&tbi0>;
128 phy-handle = <&phy0>;
129
130 mdio@520 {
131 #address-cells = <1>;
132 #size-cells = <0>;
133 compatible = "fsl,gianfar-mdio";
134 reg = <0x520 0x20>;
135
136 phy0: ethernet-phy@19 {
137 interrupt-parent = <&mpic>;
138 interrupts = <0x6 0x1>;
139 reg = <0x19>;
140 device_type = "ethernet-phy";
141 };
142 phy1: ethernet-phy@1a {
143 interrupt-parent = <&mpic>;
144 interrupts = <0x7 0x1>;
145 reg = <0x1a>;
146 device_type = "ethernet-phy";
147 };
148 tbi0: tbi-phy@11 {
149 reg = <0x11>;
150 device_type = "tbi-phy";
151 };
152 };
153 };
154
155 enet1: ethernet@25000 {
156 #address-cells = <1>;
157 #size-cells = <1>;
158 cell-index = <1>;
159 device_type = "network";
160 model = "eTSEC";
161 compatible = "gianfar";
162 reg = <0x25000 0x1000>;
163 ranges = <0x0 0x25000 0x1000>;
164 local-mac-address = [ 00 00 00 00 00 00 ];
165 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
166 interrupt-parent = <&mpic>;
167 tbi-handle = <&tbi1>;
168 phy-handle = <&phy1>;
169
170 mdio@520 {
171 #address-cells = <1>;
172 #size-cells = <0>;
173 compatible = "fsl,gianfar-tbi";
174 reg = <0x520 0x20>;
175
176 tbi1: tbi-phy@11 {
177 reg = <0x11>;
178 device_type = "tbi-phy";
179 };
180 };
181 };
182
183 serial0: serial@4500 {
184 cell-index = <0>;
185 device_type = "serial";
186 compatible = "fsl,ns16550", "ns16550";
187 reg = <0x4500 0x100>; // reg base, size
188 clock-frequency = <0>; // should we fill in in uboot?
189 interrupts = <0x2a 0x2>;
190 interrupt-parent = <&mpic>;
191 };
192
193 serial1: serial@4600 {
194 cell-index = <1>;
195 device_type = "serial";
196 compatible = "fsl,ns16550", "ns16550";
197 reg = <0x4600 0x100>; // reg base, size
198 clock-frequency = <0>; // should we fill in in uboot?
199 interrupts = <0x2a 0x2>;
200 interrupt-parent = <&mpic>;
201 };
202
203 global-utilities@e0000 { //global utilities reg
204 compatible = "fsl,mpc8548-guts";
205 reg = <0xe0000 0x1000>;
206 fsl,has-rstcr;
207 };
208
209 crypto@30000 {
210 compatible = "fsl,sec2.1", "fsl,sec2.0";
211 reg = <0x30000 0x10000>;
212 interrupts = <45 2>;
213 interrupt-parent = <&mpic>;
214 fsl,num-channels = <4>;
215 fsl,channel-fifo-len = <24>;
216 fsl,exec-units-mask = <0xfe>;
217 fsl,descriptor-types-mask = <0x12b0ebf>;
218 };
219
220 mpic: pic@40000 {
221 interrupt-controller;
222 #address-cells = <0>;
223 #interrupt-cells = <2>;
224 reg = <0x40000 0x40000>;
225 compatible = "chrp,open-pic";
226 device_type = "open-pic";
227 };
228 };
229
230 pci0: pci@e0008000 {
231 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
232 interrupt-map = <
233 /* IDSEL 0x01 (PCI-X slot) @66MHz */
234 0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
235 0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
236 0x0800 0x0 0x0 0x3 &mpic 0x4 0x1
237 0x0800 0x0 0x0 0x4 &mpic 0x1 0x1
238
239 /* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */
240 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
241 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
242 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
243 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>;
244
245 interrupt-parent = <&mpic>;
246 interrupts = <0x18 0x2>;
247 bus-range = <0 0>;
248 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
249 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>;
250 clock-frequency = <66000000>;
251 #interrupt-cells = <1>;
252 #size-cells = <2>;
253 #address-cells = <3>;
254 reg = <0xe0008000 0x1000>;
255 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
256 device_type = "pci";
257 };
258
259 pci1: pcie@e000a000 {
260 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
261 interrupt-map = <
262
263 /* IDSEL 0x0 (PEX) */
264 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
265 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
266 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
267 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>;
268
269 interrupt-parent = <&mpic>;
270 interrupts = <0x1a 0x2>;
271 bus-range = <0x0 0xff>;
272 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
273 0x01000000 0x0 0x00000000 0xe2800000 0x0 0x08000000>;
274 clock-frequency = <33000000>;
275 #interrupt-cells = <1>;
276 #size-cells = <2>;
277 #address-cells = <3>;
278 reg = <0xe000a000 0x1000>;
279 compatible = "fsl,mpc8548-pcie";
280 device_type = "pci";
281 pcie@0 {
282 reg = <0x0 0x0 0x0 0x0 0x0>;
283 #size-cells = <2>;
284 #address-cells = <3>;
285 device_type = "pci";
286 ranges = <0x02000000 0x0 0xa0000000
287 0x02000000 0x0 0xa0000000
288 0x0 0x10000000
289
290 0x01000000 0x0 0x00000000
291 0x01000000 0x0 0x00000000
292 0x0 0x00800000>;
293 };
294 };
295};
diff --git a/arch/powerpc/boot/dts/sbc8548-pre.dtsi b/arch/powerpc/boot/dts/sbc8548-pre.dtsi
new file mode 100644
index 000000000000..d8c66290c5b4
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8548-pre.dtsi
@@ -0,0 +1,52 @@
1/*
2 * SBC8548 Device Tree Source
3 *
4 * Copyright 2007 Wind River Systems Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/{
15 model = "SBC8548";
16 compatible = "SBC8548";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8548@0 {
34 device_type = "cpu";
35 reg = <0>;
36 d-cache-line-size = <0x20>; // 32 bytes
37 i-cache-line-size = <0x20>; // 32 bytes
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
40 timebase-frequency = <0>; // From uboot
41 bus-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
44 };
45 };
46
47 memory {
48 device_type = "memory";
49 reg = <0x00000000 0x10000000>;
50 };
51
52};
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 77be77116c2e..1df2a0955668 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -14,44 +14,9 @@
14 14
15/dts-v1/; 15/dts-v1/;
16 16
17/ { 17/include/ "sbc8548-pre.dtsi"
18 model = "SBC8548";
19 compatible = "SBC8548";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 aliases {
24 ethernet0 = &enet0;
25 ethernet1 = &enet1;
26 serial0 = &serial0;
27 serial1 = &serial1;
28 pci0 = &pci0;
29 pci1 = &pci1;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8548@0 {
37 device_type = "cpu";
38 reg = <0>;
39 d-cache-line-size = <0x20>; // 32 bytes
40 i-cache-line-size = <0x20>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>; // From uboot
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x00000000 0x10000000>;
53 };
54 18
19/{
55 localbus@e0000000 { 20 localbus@e0000000 {
56 #address-cells = <2>; 21 #address-cells = <2>;
57 #size-cells = <1>; 22 #size-cells = <1>;
@@ -63,23 +28,25 @@
63 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/ 28 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
64 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/ 29 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
65 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */ 30 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
66 0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/ 31 0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
67 32
68 33
69 flash@0,0 { 34 flash@0,0 {
70 #address-cells = <1>; 35 #address-cells = <1>;
71 #size-cells = <1>; 36 #size-cells = <1>;
72 compatible = "cfi-flash"; 37 compatible = "intel,JS28F640", "cfi-flash";
73 reg = <0x0 0x0 0x800000>; 38 reg = <0x0 0x0 0x800000>;
74 bank-width = <1>; 39 bank-width = <1>;
75 device-width = <1>; 40 device-width = <1>;
76 partition@0x0 { 41 partition@0x0 {
77 label = "space"; 42 label = "space";
78 reg = <0x00000000 0x00100000>; 43 /* FF800000 -> FFF9FFFF */
44 reg = <0x00000000 0x007a0000>;
79 }; 45 };
80 partition@0x100000 { 46 partition@0x7a0000 {
81 label = "bootloader"; 47 label = "bootloader";
82 reg = <0x00100000 0x00700000>; 48 /* FFFA0000 -> FFFFFFFF */
49 reg = <0x007a0000 0x00060000>;
83 read-only; 50 read-only;
84 }; 51 };
85 }; 52 };
@@ -122,307 +89,22 @@
122 #address-cells = <1>; 89 #address-cells = <1>;
123 #size-cells = <1>; 90 #size-cells = <1>;
124 reg = <0x6 0x0 0x04000000>; 91 reg = <0x6 0x0 0x04000000>;
125 compatible = "cfi-flash"; 92 compatible = "intel,JS28F128", "cfi-flash";
126 bank-width = <4>; 93 bank-width = <4>;
127 device-width = <1>; 94 device-width = <1>;
128 partition@0x0 { 95 partition@0x0 {
96 label = "space";
97 /* EC000000 -> EFEFFFFF */
98 reg = <0x00000000 0x03f00000>;
99 };
100 partition@0x03f00000 {
129 label = "bootloader"; 101 label = "bootloader";
130 reg = <0x00000000 0x00100000>; 102 /* EFF00000 -> EFFFFFFF */
103 reg = <0x03f00000 0x00100000>;
131 read-only; 104 read-only;
132 }; 105 };
133 partition@0x00100000 {
134 label = "file-system";
135 reg = <0x00100000 0x01f00000>;
136 };
137 partition@0x02000000 {
138 label = "boot-config";
139 reg = <0x02000000 0x00100000>;
140 };
141 partition@0x02100000 {
142 label = "space";
143 reg = <0x02100000 0x01f00000>;
144 };
145 }; 106 };
146 }; 107 };
147
148 soc8548@e0000000 {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 device_type = "soc";
152 ranges = <0x00000000 0xe0000000 0x00100000>;
153 bus-frequency = <0>;
154 compatible = "simple-bus";
155
156 ecm-law@0 {
157 compatible = "fsl,ecm-law";
158 reg = <0x0 0x1000>;
159 fsl,num-laws = <10>;
160 };
161
162 ecm@1000 {
163 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
164 reg = <0x1000 0x1000>;
165 interrupts = <17 2>;
166 interrupt-parent = <&mpic>;
167 };
168
169 memory-controller@2000 {
170 compatible = "fsl,mpc8548-memory-controller";
171 reg = <0x2000 0x1000>;
172 interrupt-parent = <&mpic>;
173 interrupts = <0x12 0x2>;
174 };
175
176 L2: l2-cache-controller@20000 {
177 compatible = "fsl,mpc8548-l2-cache-controller";
178 reg = <0x20000 0x1000>;
179 cache-line-size = <0x20>; // 32 bytes
180 cache-size = <0x80000>; // L2, 512K
181 interrupt-parent = <&mpic>;
182 interrupts = <0x10 0x2>;
183 };
184
185 i2c@3000 {
186 #address-cells = <1>;
187 #size-cells = <0>;
188 cell-index = <0>;
189 compatible = "fsl-i2c";
190 reg = <0x3000 0x100>;
191 interrupts = <0x2b 0x2>;
192 interrupt-parent = <&mpic>;
193 dfsrr;
194 };
195
196 i2c@3100 {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 cell-index = <1>;
200 compatible = "fsl-i2c";
201 reg = <0x3100 0x100>;
202 interrupts = <0x2b 0x2>;
203 interrupt-parent = <&mpic>;
204 dfsrr;
205 };
206
207 dma@21300 {
208 #address-cells = <1>;
209 #size-cells = <1>;
210 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
211 reg = <0x21300 0x4>;
212 ranges = <0x0 0x21100 0x200>;
213 cell-index = <0>;
214 dma-channel@0 {
215 compatible = "fsl,mpc8548-dma-channel",
216 "fsl,eloplus-dma-channel";
217 reg = <0x0 0x80>;
218 cell-index = <0>;
219 interrupt-parent = <&mpic>;
220 interrupts = <20 2>;
221 };
222 dma-channel@80 {
223 compatible = "fsl,mpc8548-dma-channel",
224 "fsl,eloplus-dma-channel";
225 reg = <0x80 0x80>;
226 cell-index = <1>;
227 interrupt-parent = <&mpic>;
228 interrupts = <21 2>;
229 };
230 dma-channel@100 {
231 compatible = "fsl,mpc8548-dma-channel",
232 "fsl,eloplus-dma-channel";
233 reg = <0x100 0x80>;
234 cell-index = <2>;
235 interrupt-parent = <&mpic>;
236 interrupts = <22 2>;
237 };
238 dma-channel@180 {
239 compatible = "fsl,mpc8548-dma-channel",
240 "fsl,eloplus-dma-channel";
241 reg = <0x180 0x80>;
242 cell-index = <3>;
243 interrupt-parent = <&mpic>;
244 interrupts = <23 2>;
245 };
246 };
247
248 enet0: ethernet@24000 {
249 #address-cells = <1>;
250 #size-cells = <1>;
251 cell-index = <0>;
252 device_type = "network";
253 model = "eTSEC";
254 compatible = "gianfar";
255 reg = <0x24000 0x1000>;
256 ranges = <0x0 0x24000 0x1000>;
257 local-mac-address = [ 00 00 00 00 00 00 ];
258 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
259 interrupt-parent = <&mpic>;
260 tbi-handle = <&tbi0>;
261 phy-handle = <&phy0>;
262
263 mdio@520 {
264 #address-cells = <1>;
265 #size-cells = <0>;
266 compatible = "fsl,gianfar-mdio";
267 reg = <0x520 0x20>;
268
269 phy0: ethernet-phy@19 {
270 interrupt-parent = <&mpic>;
271 interrupts = <0x6 0x1>;
272 reg = <0x19>;
273 device_type = "ethernet-phy";
274 };
275 phy1: ethernet-phy@1a {
276 interrupt-parent = <&mpic>;
277 interrupts = <0x7 0x1>;
278 reg = <0x1a>;
279 device_type = "ethernet-phy";
280 };
281 tbi0: tbi-phy@11 {
282 reg = <0x11>;
283 device_type = "tbi-phy";
284 };
285 };
286 };
287
288 enet1: ethernet@25000 {
289 #address-cells = <1>;
290 #size-cells = <1>;
291 cell-index = <1>;
292 device_type = "network";
293 model = "eTSEC";
294 compatible = "gianfar";
295 reg = <0x25000 0x1000>;
296 ranges = <0x0 0x25000 0x1000>;
297 local-mac-address = [ 00 00 00 00 00 00 ];
298 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
299 interrupt-parent = <&mpic>;
300 tbi-handle = <&tbi1>;
301 phy-handle = <&phy1>;
302
303 mdio@520 {
304 #address-cells = <1>;
305 #size-cells = <0>;
306 compatible = "fsl,gianfar-tbi";
307 reg = <0x520 0x20>;
308
309 tbi1: tbi-phy@11 {
310 reg = <0x11>;
311 device_type = "tbi-phy";
312 };
313 };
314 };
315
316 serial0: serial@4500 {
317 cell-index = <0>;
318 device_type = "serial";
319 compatible = "fsl,ns16550", "ns16550";
320 reg = <0x4500 0x100>; // reg base, size
321 clock-frequency = <0>; // should we fill in in uboot?
322 interrupts = <0x2a 0x2>;
323 interrupt-parent = <&mpic>;
324 };
325
326 serial1: serial@4600 {
327 cell-index = <1>;
328 device_type = "serial";
329 compatible = "fsl,ns16550", "ns16550";
330 reg = <0x4600 0x100>; // reg base, size
331 clock-frequency = <0>; // should we fill in in uboot?
332 interrupts = <0x2a 0x2>;
333 interrupt-parent = <&mpic>;
334 };
335
336 global-utilities@e0000 { //global utilities reg
337 compatible = "fsl,mpc8548-guts";
338 reg = <0xe0000 0x1000>;
339 fsl,has-rstcr;
340 };
341
342 crypto@30000 {
343 compatible = "fsl,sec2.1", "fsl,sec2.0";
344 reg = <0x30000 0x10000>;
345 interrupts = <45 2>;
346 interrupt-parent = <&mpic>;
347 fsl,num-channels = <4>;
348 fsl,channel-fifo-len = <24>;
349 fsl,exec-units-mask = <0xfe>;
350 fsl,descriptor-types-mask = <0x12b0ebf>;
351 };
352
353 mpic: pic@40000 {
354 interrupt-controller;
355 #address-cells = <0>;
356 #interrupt-cells = <2>;
357 reg = <0x40000 0x40000>;
358 compatible = "chrp,open-pic";
359 device_type = "open-pic";
360 };
361 };
362
363 pci0: pci@e0008000 {
364 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
365 interrupt-map = <
366 /* IDSEL 0x01 (PCI-X slot) @66MHz */
367 0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
368 0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
369 0x0800 0x0 0x0 0x3 &mpic 0x4 0x1
370 0x0800 0x0 0x0 0x4 &mpic 0x1 0x1
371
372 /* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */
373 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
374 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
375 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
376 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>;
377
378 interrupt-parent = <&mpic>;
379 interrupts = <0x18 0x2>;
380 bus-range = <0 0>;
381 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
382 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>;
383 clock-frequency = <66000000>;
384 #interrupt-cells = <1>;
385 #size-cells = <2>;
386 #address-cells = <3>;
387 reg = <0xe0008000 0x1000>;
388 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
389 device_type = "pci";
390 };
391
392 pci1: pcie@e000a000 {
393 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
394 interrupt-map = <
395
396 /* IDSEL 0x0 (PEX) */
397 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
398 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
399 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
400 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>;
401
402 interrupt-parent = <&mpic>;
403 interrupts = <0x1a 0x2>;
404 bus-range = <0x0 0xff>;
405 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
406 0x01000000 0x0 0x00000000 0xe2800000 0x0 0x08000000>;
407 clock-frequency = <33000000>;
408 #interrupt-cells = <1>;
409 #size-cells = <2>;
410 #address-cells = <3>;
411 reg = <0xe000a000 0x1000>;
412 compatible = "fsl,mpc8548-pcie";
413 device_type = "pci";
414 pcie@0 {
415 reg = <0x0 0x0 0x0 0x0 0x0>;
416 #size-cells = <2>;
417 #address-cells = <3>;
418 device_type = "pci";
419 ranges = <0x02000000 0x0 0xa0000000
420 0x02000000 0x0 0xa0000000
421 0x0 0x10000000
422
423 0x01000000 0x0 0x00000000
424 0x01000000 0x0 0x00000000
425 0x0 0x00800000>;
426 };
427 };
428}; 108};
109
110/include/ "sbc8548-post.dtsi"
diff --git a/arch/powerpc/boot/dts/uc101.dts b/arch/powerpc/boot/dts/uc101.dts
index ba83d5488ec6..5c462194ef06 100644
--- a/arch/powerpc/boot/dts/uc101.dts
+++ b/arch/powerpc/boot/dts/uc101.dts
@@ -13,54 +13,20 @@
13 13
14/include/ "mpc5200b.dtsi" 14/include/ "mpc5200b.dtsi"
15 15
16&gpt0 { gpio-controller; };
17&gpt1 { gpio-controller; };
18&gpt2 { gpio-controller; };
19&gpt3 { gpio-controller; };
20&gpt4 { gpio-controller; };
21&gpt5 { gpio-controller; };
22&gpt6 { gpio-controller; };
23&gpt7 { gpio-controller; };
24
16/ { 25/ {
17 model = "manroland,uc101"; 26 model = "manroland,uc101";
18 compatible = "manroland,uc101"; 27 compatible = "manroland,uc101";
19 28
20 soc5200@f0000000 { 29 soc5200@f0000000 {
21 gpt0: timer@600 { // General Purpose Timer in GPIO mode
22 gpio-controller;
23 #gpio-cells = <2>;
24 };
25
26 gpt1: timer@610 { // General Purpose Timer in GPIO mode
27 gpio-controller;
28 #gpio-cells = <2>;
29 };
30
31 gpt2: timer@620 { // General Purpose Timer in GPIO mode
32 gpio-controller;
33 #gpio-cells = <2>;
34 };
35
36 gpt3: timer@630 { // General Purpose Timer in GPIO mode
37 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
38 reg = <0x630 0x10>;
39 interrupts = <1 12 0>;
40 gpio-controller;
41 #gpio-cells = <2>;
42 };
43
44 gpt4: timer@640 { // General Purpose Timer in GPIO mode
45 gpio-controller;
46 #gpio-cells = <2>;
47 };
48
49 gpt5: timer@650 { // General Purpose Timer in GPIO mode
50 gpio-controller;
51 #gpio-cells = <2>;
52 };
53
54 gpt6: timer@660 { // General Purpose Timer in GPIO mode
55 gpio-controller;
56 #gpio-cells = <2>;
57 };
58
59 gpt7: timer@670 { // General Purpose Timer in GPIO mode
60 gpio-controller;
61 #gpio-cells = <2>;
62 };
63
64 rtc@800 { 30 rtc@800 {
65 status = "disabled"; 31 status = "disabled";
66 }; 32 };
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
index 52d8c1ad26a1..fc7073bc547e 100644
--- a/arch/powerpc/boot/dts/virtex440-ml507.dts
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -272,6 +272,12 @@
272 xlnx,temac-type = <0>; 272 xlnx,temac-type = <0>;
273 xlnx,txcsum = <1>; 273 xlnx,txcsum = <1>;
274 xlnx,txfifo = <0x1000>; 274 xlnx,txfifo = <0x1000>;
275 phy-handle = <&phy7>;
276 clock-frequency = <100000000>;
277 phy7: phy@7 {
278 compatible = "marvell,88e1111";
279 reg = <7>;
280 } ;
275 } ; 281 } ;
276 } ; 282 } ;
277 IIC_EEPROM: i2c@81600000 { 283 IIC_EEPROM: i2c@81600000 {
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig
index a0dfef1fcdb7..e12e60c3b9a2 100644
--- a/arch/powerpc/configs/83xx/kmeter1_defconfig
+++ b/arch/powerpc/configs/83xx/kmeter1_defconfig
@@ -2,6 +2,8 @@ CONFIG_EXPERIMENTAL=y
2# CONFIG_SWAP is not set 2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_POSIX_MQUEUE=y 4CONFIG_POSIX_MQUEUE=y
5CONFIG_NO_HZ=y
6CONFIG_HIGH_RES_TIMERS=y
5CONFIG_LOG_BUF_SHIFT=14 7CONFIG_LOG_BUF_SHIFT=14
6CONFIG_EXPERT=y 8CONFIG_EXPERT=y
7CONFIG_SLAB=y 9CONFIG_SLAB=y
@@ -16,8 +18,6 @@ CONFIG_PARTITION_ADVANCED=y
16# CONFIG_PPC_PMAC is not set 18# CONFIG_PPC_PMAC is not set
17CONFIG_PPC_83xx=y 19CONFIG_PPC_83xx=y
18CONFIG_KMETER1=y 20CONFIG_KMETER1=y
19CONFIG_NO_HZ=y
20CONFIG_HIGH_RES_TIMERS=y
21CONFIG_PREEMPT=y 21CONFIG_PREEMPT=y
22# CONFIG_SECCOMP is not set 22# CONFIG_SECCOMP is not set
23CONFIG_NET=y 23CONFIG_NET=y
@@ -45,7 +45,6 @@ CONFIG_MTD_PHYSMAP_OF=y
45CONFIG_MTD_PHRAM=y 45CONFIG_MTD_PHRAM=y
46CONFIG_MTD_UBI=y 46CONFIG_MTD_UBI=y
47CONFIG_MTD_UBI_GLUEBI=y 47CONFIG_MTD_UBI_GLUEBI=y
48CONFIG_MTD_UBI_DEBUG=y
49CONFIG_PROC_DEVICETREE=y 48CONFIG_PROC_DEVICETREE=y
50CONFIG_NETDEVICES=y 49CONFIG_NETDEVICES=y
51CONFIG_DUMMY=y 50CONFIG_DUMMY=y
@@ -76,5 +75,4 @@ CONFIG_TMPFS=y
76CONFIG_JFFS2_FS=y 75CONFIG_JFFS2_FS=y
77CONFIG_UBIFS_FS=y 76CONFIG_UBIFS_FS=y
78CONFIG_NFS_FS=y 77CONFIG_NFS_FS=y
79CONFIG_NFS_V3=y
80CONFIG_ROOT_NFS=y 78CONFIG_ROOT_NFS=y
diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig
index f8c51a4ab995..c9765b54dd1a 100644
--- a/arch/powerpc/configs/85xx/ge_imp3a_defconfig
+++ b/arch/powerpc/configs/85xx/ge_imp3a_defconfig
@@ -34,7 +34,6 @@ CONFIG_PREEMPT=y
34# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 34# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
35CONFIG_BINFMT_MISC=m 35CONFIG_BINFMT_MISC=m
36CONFIG_MATH_EMULATION=y 36CONFIG_MATH_EMULATION=y
37CONFIG_IRQ_ALL_CPUS=y
38CONFIG_FORCE_MAX_ZONEORDER=17 37CONFIG_FORCE_MAX_ZONEORDER=17
39CONFIG_PCI=y 38CONFIG_PCI=y
40CONFIG_PCIEPORTBUS=y 39CONFIG_PCIEPORTBUS=y
diff --git a/arch/powerpc/configs/85xx/ppa8548_defconfig b/arch/powerpc/configs/85xx/ppa8548_defconfig
new file mode 100644
index 000000000000..a11337de8aa2
--- /dev/null
+++ b/arch/powerpc/configs/85xx/ppa8548_defconfig
@@ -0,0 +1,65 @@
1CONFIG_PPC_85xx=y
2CONFIG_PPA8548=y
3CONFIG_DTC=y
4CONFIG_DEFAULT_UIMAGE=y
5CONFIG_IKCONFIG=y
6CONFIG_IKCONFIG_PROC=y
7# CONFIG_PCI is not set
8# CONFIG_USB_SUPPORT is not set
9CONFIG_ADVANCED_OPTIONS=y
10CONFIG_LOWMEM_SIZE_BOOL=y
11CONFIG_LOWMEM_SIZE=0x40000000
12CONFIG_LOWMEM_CAM_NUM_BOOL=y
13CONFIG_LOWMEM_CAM_NUM=4
14CONFIG_PAGE_OFFSET_BOOL=y
15CONFIG_PAGE_OFFSET=0xb0000000
16CONFIG_KERNEL_START_BOOL=y
17CONFIG_KERNEL_START=0xb0000000
18# CONFIG_PHYSICAL_START_BOOL is not set
19CONFIG_PHYSICAL_START=0x00000000
20CONFIG_PHYSICAL_ALIGN=0x04000000
21CONFIG_TASK_SIZE_BOOL=y
22CONFIG_TASK_SIZE=0xb0000000
23
24CONFIG_FSL_LBC=y
25CONFIG_FSL_DMA=y
26CONFIG_FSL_RIO=y
27
28CONFIG_RAPIDIO=y
29CONFIG_RAPIDIO_DMA_ENGINE=y
30CONFIG_RAPIDIO_TSI57X=y
31CONFIG_RAPIDIO_TSI568=y
32CONFIG_RAPIDIO_CPS_XX=y
33CONFIG_RAPIDIO_CPS_GEN2=y
34CONFIG_SERIAL_8250=y
35CONFIG_SERIAL_8250_CONSOLE=y
36CONFIG_PROC_DEVICETREE=y
37
38CONFIG_MTD=y
39CONFIG_MTD_BLKDEVS=y
40CONFIG_MTD_BLOCK=y
41CONFIG_MTD_CFI=y
42CONFIG_MTD_CFI_AMDSTD=y
43CONFIG_MTD_CFI_INTELEXT=y
44CONFIG_MTD_CHAR=y
45CONFIG_MTD_CMDLINE_PARTS=y
46CONFIG_MTD_CONCAT=y
47CONFIG_MTD_PARTITIONS=y
48CONFIG_MTD_PHYSMAP_OF=y
49
50CONFIG_I2C=y
51CONFIG_I2C_MPC=y
52CONFIG_I2C_CHARDEV
53CONFIG_RTC_CLASS=y
54CONFIG_RTC_HCTOSYS=y
55CONFIG_RTC_DRV_ISL1208=y
56
57CONFIG_NET=y
58CONFIG_INET=y
59CONFIG_IP_PNP=y
60CONFIG_NETDEVICES=y
61CONFIG_MII=y
62CONFIG_GIANFAR=y
63CONFIG_MARVELL_PHY=y
64CONFIG_NFS_FS=y
65CONFIG_ROOT_NFS=y
diff --git a/arch/powerpc/configs/85xx/sbc8548_defconfig b/arch/powerpc/configs/85xx/sbc8548_defconfig
index 5b2b651dfb98..008a7a47b89b 100644
--- a/arch/powerpc/configs/85xx/sbc8548_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8548_defconfig
@@ -55,3 +55,22 @@ CONFIG_ROOT_NFS=y
55# CONFIG_RCU_CPU_STALL_DETECTOR is not set 55# CONFIG_RCU_CPU_STALL_DETECTOR is not set
56CONFIG_SYSCTL_SYSCALL_CHECK=y 56CONFIG_SYSCTL_SYSCALL_CHECK=y
57# CONFIG_CRYPTO_ANSI_CPRNG is not set 57# CONFIG_CRYPTO_ANSI_CPRNG is not set
58CONFIG_MTD=y
59CONFIG_MTD_OF_PARTS=y
60CONFIG_MTD_CHAR=y
61CONFIG_MTD_BLKDEVS=y
62CONFIG_MTD_BLOCK=y
63CONFIG_MTD_CFI=y
64CONFIG_MTD_GEN_PROBE=y
65CONFIG_MTD_CFI_ADV_OPTIONS=y
66CONFIG_MTD_CFI_NOSWAP=y
67CONFIG_MTD_CFI_GEOMETRY=y
68CONFIG_MTD_MAP_BANK_WIDTH_1=y
69CONFIG_MTD_MAP_BANK_WIDTH_2=y
70CONFIG_MTD_MAP_BANK_WIDTH_4=y
71CONFIG_MTD_CFI_I1=y
72CONFIG_MTD_CFI_I2=y
73CONFIG_MTD_CFI_I4=y
74CONFIG_MTD_CFI_INTELEXT=y
75CONFIG_MTD_CFI_UTIL=y
76CONFIG_MTD_PHYSMAP_OF=y
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index da731c2fe984..f2f6734d5f76 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -25,7 +25,6 @@ CONFIG_HIGH_RES_TIMERS=y
25CONFIG_HZ_1000=y 25CONFIG_HZ_1000=y
26CONFIG_PREEMPT=y 26CONFIG_PREEMPT=y
27CONFIG_BINFMT_MISC=m 27CONFIG_BINFMT_MISC=m
28CONFIG_IRQ_ALL_CPUS=y
29CONFIG_SPARSE_IRQ=y 28CONFIG_SPARSE_IRQ=y
30CONFIG_PCI=y 29CONFIG_PCI=y
31CONFIG_PCIEPORTBUS=y 30CONFIG_PCIEPORTBUS=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index 2149360a1e62..be73219212b7 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -25,7 +25,6 @@ CONFIG_HIGH_RES_TIMERS=y
25CONFIG_HZ_1000=y 25CONFIG_HZ_1000=y
26CONFIG_PREEMPT=y 26CONFIG_PREEMPT=y
27CONFIG_BINFMT_MISC=y 27CONFIG_BINFMT_MISC=y
28CONFIG_IRQ_ALL_CPUS=y
29CONFIG_SPARSE_IRQ=y 28CONFIG_SPARSE_IRQ=y
30CONFIG_PCI=y 29CONFIG_PCI=y
31CONFIG_PCIEPORTBUS=y 30CONFIG_PCIEPORTBUS=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index af2e8e1edba6..b3e2b1058f27 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -25,7 +25,6 @@ CONFIG_HIGH_RES_TIMERS=y
25CONFIG_HZ_1000=y 25CONFIG_HZ_1000=y
26CONFIG_PREEMPT=y 26CONFIG_PREEMPT=y
27CONFIG_BINFMT_MISC=m 27CONFIG_BINFMT_MISC=m
28CONFIG_IRQ_ALL_CPUS=y
29CONFIG_SPARSE_IRQ=y 28CONFIG_SPARSE_IRQ=y
30CONFIG_PCI=y 29CONFIG_PCI=y
31CONFIG_PCIEPORTBUS=y 30CONFIG_PCIEPORTBUS=y
diff --git a/arch/powerpc/configs/86xx/sbc8641d_defconfig b/arch/powerpc/configs/86xx/sbc8641d_defconfig
index 0a92ca045641..1a62baf855e9 100644
--- a/arch/powerpc/configs/86xx/sbc8641d_defconfig
+++ b/arch/powerpc/configs/86xx/sbc8641d_defconfig
@@ -23,7 +23,6 @@ CONFIG_SBC8641D=y
23CONFIG_HIGH_RES_TIMERS=y 23CONFIG_HIGH_RES_TIMERS=y
24CONFIG_PREEMPT=y 24CONFIG_PREEMPT=y
25CONFIG_BINFMT_MISC=m 25CONFIG_BINFMT_MISC=m
26CONFIG_IRQ_ALL_CPUS=y
27CONFIG_SPARSE_IRQ=y 26CONFIG_SPARSE_IRQ=y
28CONFIG_PCI=y 27CONFIG_PCI=y
29CONFIG_PCIEPORTBUS=y 28CONFIG_PCIEPORTBUS=y
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 1c0f2432ecdb..60027c2a7034 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -32,7 +32,6 @@ CONFIG_HIGHMEM=y
32# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 32# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
33CONFIG_BINFMT_MISC=m 33CONFIG_BINFMT_MISC=m
34CONFIG_KEXEC=y 34CONFIG_KEXEC=y
35CONFIG_IRQ_ALL_CPUS=y
36CONFIG_FORCE_MAX_ZONEORDER=13 35CONFIG_FORCE_MAX_ZONEORDER=13
37CONFIG_PCI=y 36CONFIG_PCI=y
38CONFIG_PCIEPORTBUS=y 37CONFIG_PCIEPORTBUS=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index f7df8362911f..3d139fa04050 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -26,7 +26,6 @@ CONFIG_P5020_DS=y
26CONFIG_P5040_DS=y 26CONFIG_P5040_DS=y
27# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set 27# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
28CONFIG_BINFMT_MISC=m 28CONFIG_BINFMT_MISC=m
29CONFIG_IRQ_ALL_CPUS=y
30CONFIG_PCIEPORTBUS=y 29CONFIG_PCIEPORTBUS=y
31CONFIG_PCI_MSI=y 30CONFIG_PCI_MSI=y
32CONFIG_RAPIDIO=y 31CONFIG_RAPIDIO=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 502cd9e027e4..8d00ea5b8a9f 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -49,7 +49,6 @@ CONFIG_QE_GPIO=y
49CONFIG_HIGHMEM=y 49CONFIG_HIGHMEM=y
50CONFIG_BINFMT_MISC=m 50CONFIG_BINFMT_MISC=m
51CONFIG_MATH_EMULATION=y 51CONFIG_MATH_EMULATION=y
52CONFIG_IRQ_ALL_CPUS=y
53CONFIG_FORCE_MAX_ZONEORDER=12 52CONFIG_FORCE_MAX_ZONEORDER=12
54CONFIG_PCI=y 53CONFIG_PCI=y
55CONFIG_PCI_MSI=y 54CONFIG_PCI_MSI=y
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig
index bcedeea0df89..bd8a6f71944f 100644
--- a/arch/powerpc/configs/pasemi_defconfig
+++ b/arch/powerpc/configs/pasemi_defconfig
@@ -1,28 +1,27 @@
1CONFIG_PPC64=y 1CONFIG_PPC64=y
2CONFIG_ALTIVEC=y 2CONFIG_ALTIVEC=y
3# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
4CONFIG_SMP=y 3CONFIG_SMP=y
5CONFIG_NR_CPUS=2 4CONFIG_NR_CPUS=2
6CONFIG_EXPERIMENTAL=y 5CONFIG_EXPERIMENTAL=y
7CONFIG_SYSVIPC=y 6CONFIG_SYSVIPC=y
7CONFIG_NO_HZ=y
8CONFIG_HIGH_RES_TIMERS=y
8CONFIG_BLK_DEV_INITRD=y 9CONFIG_BLK_DEV_INITRD=y
9# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
10CONFIG_PROFILING=y 10CONFIG_PROFILING=y
11CONFIG_OPROFILE=y 11CONFIG_OPROFILE=y
12CONFIG_MODULES=y 12CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y 13CONFIG_MODULE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set 14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_PARTITION_ADVANCED=y
16CONFIG_MAC_PARTITION=y
15# CONFIG_PPC_PSERIES is not set 17# CONFIG_PPC_PSERIES is not set
16# CONFIG_PPC_PMAC is not set 18# CONFIG_PPC_PMAC is not set
17CONFIG_PPC_PASEMI=y 19CONFIG_PPC_PASEMI=y
18CONFIG_PPC_PASEMI_IOMMU=y 20CONFIG_PPC_PASEMI_IOMMU=y
19CONFIG_CPU_FREQ=y 21CONFIG_CPU_FREQ=y
20CONFIG_CPU_FREQ_DEBUG=y
21CONFIG_CPU_FREQ_GOV_POWERSAVE=y 22CONFIG_CPU_FREQ_GOV_POWERSAVE=y
22CONFIG_CPU_FREQ_GOV_USERSPACE=y 23CONFIG_CPU_FREQ_GOV_USERSPACE=y
23CONFIG_CPU_FREQ_GOV_ONDEMAND=y 24CONFIG_CPU_FREQ_GOV_ONDEMAND=y
24CONFIG_NO_HZ=y
25CONFIG_HIGH_RES_TIMERS=y
26CONFIG_HZ_1000=y 25CONFIG_HZ_1000=y
27CONFIG_PPC_64K_PAGES=y 26CONFIG_PPC_64K_PAGES=y
28# CONFIG_SECCOMP is not set 27# CONFIG_SECCOMP is not set
@@ -47,7 +46,6 @@ CONFIG_INET_ESP=y
47# CONFIG_IPV6 is not set 46# CONFIG_IPV6 is not set
48CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 47CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
49CONFIG_MTD=y 48CONFIG_MTD=y
50CONFIG_MTD_CONCAT=y
51CONFIG_MTD_CHAR=y 49CONFIG_MTD_CHAR=y
52CONFIG_MTD_BLOCK=y 50CONFIG_MTD_BLOCK=y
53CONFIG_MTD_SLRAM=y 51CONFIG_MTD_SLRAM=y
@@ -58,7 +56,6 @@ CONFIG_PROC_DEVICETREE=y
58CONFIG_BLK_DEV_LOOP=y 56CONFIG_BLK_DEV_LOOP=y
59CONFIG_BLK_DEV_RAM=y 57CONFIG_BLK_DEV_RAM=y
60CONFIG_BLK_DEV_RAM_SIZE=16384 58CONFIG_BLK_DEV_RAM_SIZE=16384
61CONFIG_MISC_DEVICES=y
62CONFIG_EEPROM_LEGACY=y 59CONFIG_EEPROM_LEGACY=y
63CONFIG_IDE=y 60CONFIG_IDE=y
64CONFIG_BLK_DEV_IDECD=y 61CONFIG_BLK_DEV_IDECD=y
@@ -91,21 +88,19 @@ CONFIG_BLK_DEV_DM=y
91CONFIG_DM_CRYPT=y 88CONFIG_DM_CRYPT=y
92CONFIG_NETDEVICES=y 89CONFIG_NETDEVICES=y
93CONFIG_DUMMY=y 90CONFIG_DUMMY=y
94CONFIG_MARVELL_PHY=y
95CONFIG_NET_ETHERNET=y
96CONFIG_MII=y 91CONFIG_MII=y
97CONFIG_NET_PCI=y
98CONFIG_E1000=y
99CONFIG_TIGON3=y 92CONFIG_TIGON3=y
93CONFIG_E1000=y
100CONFIG_PASEMI_MAC=y 94CONFIG_PASEMI_MAC=y
95CONFIG_MARVELL_PHY=y
101CONFIG_INPUT_JOYDEV=y 96CONFIG_INPUT_JOYDEV=y
102CONFIG_INPUT_EVDEV=y 97CONFIG_INPUT_EVDEV=y
103# CONFIG_KEYBOARD_ATKBD is not set 98# CONFIG_KEYBOARD_ATKBD is not set
104# CONFIG_MOUSE_PS2 is not set 99# CONFIG_MOUSE_PS2 is not set
105# CONFIG_SERIO is not set 100# CONFIG_SERIO is not set
101CONFIG_LEGACY_PTY_COUNT=4
106CONFIG_SERIAL_8250=y 102CONFIG_SERIAL_8250=y
107CONFIG_SERIAL_8250_CONSOLE=y 103CONFIG_SERIAL_8250_CONSOLE=y
108CONFIG_LEGACY_PTY_COUNT=4
109CONFIG_HW_RANDOM=y 104CONFIG_HW_RANDOM=y
110CONFIG_RAW_DRIVER=y 105CONFIG_RAW_DRIVER=y
111CONFIG_I2C_CHARDEV=y 106CONFIG_I2C_CHARDEV=y
@@ -146,14 +141,11 @@ CONFIG_HID_TOPSEED=y
146CONFIG_HID_THRUSTMASTER=y 141CONFIG_HID_THRUSTMASTER=y
147CONFIG_HID_ZEROPLUS=y 142CONFIG_HID_ZEROPLUS=y
148CONFIG_USB=y 143CONFIG_USB=y
149CONFIG_USB_DEVICEFS=y
150# CONFIG_USB_DEVICE_CLASS is not set
151CONFIG_USB_EHCI_HCD=y 144CONFIG_USB_EHCI_HCD=y
152CONFIG_USB_OHCI_HCD=y 145CONFIG_USB_OHCI_HCD=y
153CONFIG_USB_UHCI_HCD=y 146CONFIG_USB_UHCI_HCD=y
154CONFIG_USB_SL811_HCD=y 147CONFIG_USB_SL811_HCD=y
155CONFIG_USB_STORAGE=y 148CONFIG_USB_STORAGE=y
156CONFIG_USB_LIBUSUAL=y
157CONFIG_EDAC=y 149CONFIG_EDAC=y
158CONFIG_EDAC_MM_EDAC=y 150CONFIG_EDAC_MM_EDAC=y
159CONFIG_EDAC_PASEMI=y 151CONFIG_EDAC_PASEMI=y
@@ -164,8 +156,6 @@ CONFIG_EXT2_FS_XATTR=y
164CONFIG_EXT2_FS_POSIX_ACL=y 156CONFIG_EXT2_FS_POSIX_ACL=y
165CONFIG_EXT3_FS=y 157CONFIG_EXT3_FS=y
166# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 158# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
167CONFIG_INOTIFY=y
168CONFIG_AUTOFS_FS=y
169CONFIG_AUTOFS4_FS=y 159CONFIG_AUTOFS4_FS=y
170CONFIG_ISO9660_FS=y 160CONFIG_ISO9660_FS=y
171CONFIG_UDF_FS=y 161CONFIG_UDF_FS=y
@@ -177,27 +167,22 @@ CONFIG_HUGETLBFS=y
177CONFIG_CONFIGFS_FS=y 167CONFIG_CONFIGFS_FS=y
178CONFIG_JFFS2_FS=y 168CONFIG_JFFS2_FS=y
179CONFIG_NFS_FS=y 169CONFIG_NFS_FS=y
180CONFIG_NFS_V3=y
181CONFIG_ROOT_NFS=y 170CONFIG_ROOT_NFS=y
182CONFIG_NFSD=y 171CONFIG_NFSD=y
183CONFIG_NFSD_V4=y 172CONFIG_NFSD_V4=y
184CONFIG_PARTITION_ADVANCED=y
185CONFIG_MAC_PARTITION=y
186CONFIG_NLS_CODEPAGE_437=y 173CONFIG_NLS_CODEPAGE_437=y
187CONFIG_NLS_ISO8859_1=y 174CONFIG_NLS_ISO8859_1=y
188CONFIG_CRC_CCITT=y 175CONFIG_CRC_CCITT=y
176CONFIG_PRINTK_TIME=y
189CONFIG_MAGIC_SYSRQ=y 177CONFIG_MAGIC_SYSRQ=y
190CONFIG_DEBUG_FS=y 178CONFIG_DEBUG_FS=y
191CONFIG_DEBUG_KERNEL=y 179CONFIG_DEBUG_KERNEL=y
192CONFIG_DETECT_HUNG_TASK=y 180CONFIG_DETECT_HUNG_TASK=y
193# CONFIG_SCHED_DEBUG is not set 181# CONFIG_SCHED_DEBUG is not set
194# CONFIG_RCU_CPU_STALL_DETECTOR is not set
195CONFIG_SYSCTL_SYSCALL_CHECK=y
196CONFIG_XMON=y 182CONFIG_XMON=y
197CONFIG_XMON_DEFAULT=y 183CONFIG_XMON_DEFAULT=y
198CONFIG_CRYPTO_MD4=y 184CONFIG_CRYPTO_MD4=y
199CONFIG_CRYPTO_SHA256=y 185CONFIG_CRYPTO_SHA256=y
200CONFIG_CRYPTO_SHA512=y 186CONFIG_CRYPTO_SHA512=y
201CONFIG_CRYPTO_AES=y
202CONFIG_CRYPTO_BLOWFISH=y 187CONFIG_CRYPTO_BLOWFISH=y
203# CONFIG_CRYPTO_ANSI_CPRNG is not set 188# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 6d03530b7506..aef3f71de5ad 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -5,6 +5,9 @@ CONFIG_SMP=y
5CONFIG_EXPERIMENTAL=y 5CONFIG_EXPERIMENTAL=y
6CONFIG_SYSVIPC=y 6CONFIG_SYSVIPC=y
7CONFIG_POSIX_MQUEUE=y 7CONFIG_POSIX_MQUEUE=y
8CONFIG_IRQ_DOMAIN_DEBUG=y
9CONFIG_NO_HZ=y
10CONFIG_HIGH_RES_TIMERS=y
8CONFIG_TASKSTATS=y 11CONFIG_TASKSTATS=y
9CONFIG_TASK_DELAY_ACCT=y 12CONFIG_TASK_DELAY_ACCT=y
10CONFIG_IKCONFIG=y 13CONFIG_IKCONFIG=y
@@ -21,6 +24,8 @@ CONFIG_MODULES=y
21CONFIG_MODULE_UNLOAD=y 24CONFIG_MODULE_UNLOAD=y
22CONFIG_MODVERSIONS=y 25CONFIG_MODVERSIONS=y
23CONFIG_MODULE_SRCVERSION_ALL=y 26CONFIG_MODULE_SRCVERSION_ALL=y
27CONFIG_PARTITION_ADVANCED=y
28CONFIG_EFI_PARTITION=y
24CONFIG_PPC_SPLPAR=y 29CONFIG_PPC_SPLPAR=y
25CONFIG_SCANLOG=m 30CONFIG_SCANLOG=m
26CONFIG_PPC_SMLPAR=y 31CONFIG_PPC_SMLPAR=y
@@ -42,10 +47,9 @@ CONFIG_CPU_FREQ=y
42CONFIG_CPU_FREQ_GOV_POWERSAVE=y 47CONFIG_CPU_FREQ_GOV_POWERSAVE=y
43CONFIG_CPU_FREQ_GOV_USERSPACE=y 48CONFIG_CPU_FREQ_GOV_USERSPACE=y
44CONFIG_CPU_FREQ_PMAC64=y 49CONFIG_CPU_FREQ_PMAC64=y
45CONFIG_NO_HZ=y
46CONFIG_HIGH_RES_TIMERS=y
47CONFIG_HZ_100=y 50CONFIG_HZ_100=y
48CONFIG_BINFMT_MISC=m 51CONFIG_BINFMT_MISC=m
52CONFIG_PPC_TRANSACTIONAL_MEM=y
49CONFIG_HOTPLUG_CPU=y 53CONFIG_HOTPLUG_CPU=y
50CONFIG_KEXEC=y 54CONFIG_KEXEC=y
51CONFIG_IRQ_ALL_CPUS=y 55CONFIG_IRQ_ALL_CPUS=y
@@ -73,7 +77,6 @@ CONFIG_INET_ESP=m
73CONFIG_INET_IPCOMP=m 77CONFIG_INET_IPCOMP=m
74# CONFIG_IPV6 is not set 78# CONFIG_IPV6 is not set
75CONFIG_NETFILTER=y 79CONFIG_NETFILTER=y
76CONFIG_NETFILTER_NETLINK_QUEUE=m
77CONFIG_NF_CONNTRACK=m 80CONFIG_NF_CONNTRACK=m
78CONFIG_NF_CONNTRACK_EVENTS=y 81CONFIG_NF_CONNTRACK_EVENTS=y
79CONFIG_NF_CT_PROTO_SCTP=m 82CONFIG_NF_CT_PROTO_SCTP=m
@@ -130,19 +133,12 @@ CONFIG_NETFILTER_XT_MATCH_U32=m
130CONFIG_NF_CONNTRACK_IPV4=m 133CONFIG_NF_CONNTRACK_IPV4=m
131CONFIG_IP_NF_QUEUE=m 134CONFIG_IP_NF_QUEUE=m
132CONFIG_IP_NF_IPTABLES=m 135CONFIG_IP_NF_IPTABLES=m
133CONFIG_IP_NF_MATCH_ADDRTYPE=m
134CONFIG_IP_NF_MATCH_AH=m 136CONFIG_IP_NF_MATCH_AH=m
135CONFIG_IP_NF_MATCH_ECN=m 137CONFIG_IP_NF_MATCH_ECN=m
136CONFIG_IP_NF_MATCH_TTL=m 138CONFIG_IP_NF_MATCH_TTL=m
137CONFIG_IP_NF_FILTER=m 139CONFIG_IP_NF_FILTER=m
138CONFIG_IP_NF_TARGET_REJECT=m 140CONFIG_IP_NF_TARGET_REJECT=m
139CONFIG_IP_NF_TARGET_LOG=m
140CONFIG_IP_NF_TARGET_ULOG=m 141CONFIG_IP_NF_TARGET_ULOG=m
141CONFIG_NF_NAT=m
142CONFIG_IP_NF_TARGET_MASQUERADE=m
143CONFIG_IP_NF_TARGET_NETMAP=m
144CONFIG_IP_NF_TARGET_REDIRECT=m
145CONFIG_NF_NAT_SNMP_BASIC=m
146CONFIG_IP_NF_MANGLE=m 142CONFIG_IP_NF_MANGLE=m
147CONFIG_IP_NF_TARGET_CLUSTERIP=m 143CONFIG_IP_NF_TARGET_CLUSTERIP=m
148CONFIG_IP_NF_TARGET_ECN=m 144CONFIG_IP_NF_TARGET_ECN=m
@@ -151,7 +147,10 @@ CONFIG_IP_NF_RAW=m
151CONFIG_IP_NF_ARPTABLES=m 147CONFIG_IP_NF_ARPTABLES=m
152CONFIG_IP_NF_ARPFILTER=m 148CONFIG_IP_NF_ARPFILTER=m
153CONFIG_IP_NF_ARP_MANGLE=m 149CONFIG_IP_NF_ARP_MANGLE=m
150CONFIG_BPF_JIT=y
154CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 151CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
152CONFIG_DEVTMPFS=y
153CONFIG_DEVTMPFS_MOUNT=y
155CONFIG_PROC_DEVICETREE=y 154CONFIG_PROC_DEVICETREE=y
156CONFIG_BLK_DEV_FD=y 155CONFIG_BLK_DEV_FD=y
157CONFIG_BLK_DEV_LOOP=y 156CONFIG_BLK_DEV_LOOP=y
@@ -173,7 +172,6 @@ CONFIG_CHR_DEV_SG=y
173CONFIG_SCSI_MULTI_LUN=y 172CONFIG_SCSI_MULTI_LUN=y
174CONFIG_SCSI_CONSTANTS=y 173CONFIG_SCSI_CONSTANTS=y
175CONFIG_SCSI_FC_ATTRS=y 174CONFIG_SCSI_FC_ATTRS=y
176CONFIG_SCSI_SAS_ATTRS=m
177CONFIG_SCSI_CXGB3_ISCSI=m 175CONFIG_SCSI_CXGB3_ISCSI=m
178CONFIG_SCSI_CXGB4_ISCSI=m 176CONFIG_SCSI_CXGB4_ISCSI=m
179CONFIG_SCSI_BNX2_ISCSI=m 177CONFIG_SCSI_BNX2_ISCSI=m
@@ -205,13 +203,6 @@ CONFIG_DM_SNAPSHOT=m
205CONFIG_DM_MIRROR=m 203CONFIG_DM_MIRROR=m
206CONFIG_DM_ZERO=m 204CONFIG_DM_ZERO=m
207CONFIG_DM_MULTIPATH=m 205CONFIG_DM_MULTIPATH=m
208CONFIG_IEEE1394=y
209CONFIG_IEEE1394_OHCI1394=y
210CONFIG_IEEE1394_SBP2=m
211CONFIG_IEEE1394_ETH1394=m
212CONFIG_IEEE1394_RAWIO=y
213CONFIG_IEEE1394_VIDEO1394=m
214CONFIG_IEEE1394_DV1394=m
215CONFIG_ADB_PMU=y 206CONFIG_ADB_PMU=y
216CONFIG_PMAC_SMU=y 207CONFIG_PMAC_SMU=y
217CONFIG_THERM_PM72=y 208CONFIG_THERM_PM72=y
@@ -220,50 +211,43 @@ CONFIG_WINDFARM_PM81=y
220CONFIG_WINDFARM_PM91=y 211CONFIG_WINDFARM_PM91=y
221CONFIG_WINDFARM_PM112=y 212CONFIG_WINDFARM_PM112=y
222CONFIG_WINDFARM_PM121=y 213CONFIG_WINDFARM_PM121=y
223CONFIG_NETDEVICES=y
224CONFIG_DUMMY=m
225CONFIG_BONDING=m 214CONFIG_BONDING=m
215CONFIG_DUMMY=m
216CONFIG_NETCONSOLE=y
217CONFIG_NETPOLL_TRAP=y
226CONFIG_TUN=m 218CONFIG_TUN=m
227CONFIG_MARVELL_PHY=y
228CONFIG_BROADCOM_PHY=m
229CONFIG_NET_ETHERNET=y
230CONFIG_SUNGEM=y
231CONFIG_NET_VENDOR_3COM=y
232CONFIG_VORTEX=y 219CONFIG_VORTEX=y
233CONFIG_IBMVETH=m
234CONFIG_NET_PCI=y
235CONFIG_PCNET32=y
236CONFIG_E100=y
237CONFIG_ACENIC=m 220CONFIG_ACENIC=m
238CONFIG_ACENIC_OMIT_TIGON_I=y 221CONFIG_ACENIC_OMIT_TIGON_I=y
239CONFIG_E1000=y 222CONFIG_PCNET32=y
240CONFIG_E1000E=y
241CONFIG_TIGON3=y 223CONFIG_TIGON3=y
242CONFIG_BNX2=m
243CONFIG_SPIDER_NET=m
244CONFIG_GELIC_NET=m
245CONFIG_GELIC_WIRELESS=y
246CONFIG_CHELSIO_T1=m 224CONFIG_CHELSIO_T1=m
247CONFIG_CHELSIO_T3=m 225CONFIG_BE2NET=m
248CONFIG_CHELSIO_T4=m 226CONFIG_S2IO=m
227CONFIG_IBMVETH=m
249CONFIG_EHEA=m 228CONFIG_EHEA=m
250CONFIG_IXGBE=m 229CONFIG_E100=y
230CONFIG_E1000=y
231CONFIG_E1000E=y
251CONFIG_IXGB=m 232CONFIG_IXGB=m
252CONFIG_S2IO=m 233CONFIG_IXGBE=m
234CONFIG_MLX4_EN=m
253CONFIG_MYRI10GE=m 235CONFIG_MYRI10GE=m
254CONFIG_NETXEN_NIC=m
255CONFIG_PASEMI_MAC=y 236CONFIG_PASEMI_MAC=y
256CONFIG_MLX4_EN=m
257CONFIG_QLGE=m 237CONFIG_QLGE=m
258CONFIG_BE2NET=m 238CONFIG_NETXEN_NIC=m
239CONFIG_SUNGEM=y
240CONFIG_GELIC_NET=m
241CONFIG_GELIC_WIRELESS=y
242CONFIG_SPIDER_NET=m
243CONFIG_MARVELL_PHY=y
244CONFIG_BROADCOM_PHY=m
259CONFIG_PPP=m 245CONFIG_PPP=m
260CONFIG_PPP_ASYNC=m
261CONFIG_PPP_SYNC_TTY=m
262CONFIG_PPP_DEFLATE=m
263CONFIG_PPP_BSDCOMP=m 246CONFIG_PPP_BSDCOMP=m
247CONFIG_PPP_DEFLATE=m
264CONFIG_PPPOE=m 248CONFIG_PPPOE=m
265CONFIG_NETCONSOLE=y 249CONFIG_PPP_ASYNC=m
266CONFIG_NETPOLL_TRAP=y 250CONFIG_PPP_SYNC_TTY=m
267# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 251# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
268CONFIG_INPUT_EVDEV=m 252CONFIG_INPUT_EVDEV=m
269CONFIG_INPUT_MISC=y 253CONFIG_INPUT_MISC=y
@@ -279,13 +263,10 @@ CONFIG_HVC_RTAS=y
279CONFIG_HVC_BEAT=y 263CONFIG_HVC_BEAT=y
280CONFIG_HVCS=m 264CONFIG_HVCS=m
281CONFIG_IBM_BSR=m 265CONFIG_IBM_BSR=m
282CONFIG_HW_RANDOM=m
283CONFIG_HW_RANDOM_PSERIES=m
284CONFIG_RAW_DRIVER=y 266CONFIG_RAW_DRIVER=y
285CONFIG_I2C_CHARDEV=y 267CONFIG_I2C_CHARDEV=y
286CONFIG_I2C_AMD8111=y 268CONFIG_I2C_AMD8111=y
287CONFIG_I2C_PASEMI=y 269CONFIG_I2C_PASEMI=y
288# CONFIG_HWMON is not set
289CONFIG_VIDEO_OUTPUT_CONTROL=m 270CONFIG_VIDEO_OUTPUT_CONTROL=m
290CONFIG_FB=y 271CONFIG_FB=y
291CONFIG_FIRMWARE_EDID=y 272CONFIG_FIRMWARE_EDID=y
@@ -300,7 +281,6 @@ CONFIG_FB_RADEON=y
300CONFIG_FB_IBM_GXT4500=y 281CONFIG_FB_IBM_GXT4500=y
301CONFIG_FB_PS3=m 282CONFIG_FB_PS3=m
302CONFIG_LCD_CLASS_DEVICE=y 283CONFIG_LCD_CLASS_DEVICE=y
303CONFIG_DISPLAY_SUPPORT=y
304# CONFIG_VGA_CONSOLE is not set 284# CONFIG_VGA_CONSOLE is not set
305CONFIG_FRAMEBUFFER_CONSOLE=y 285CONFIG_FRAMEBUFFER_CONSOLE=y
306CONFIG_LOGO=y 286CONFIG_LOGO=y
@@ -317,18 +297,16 @@ CONFIG_SND_AOA_FABRIC_LAYOUT=m
317CONFIG_SND_AOA_ONYX=m 297CONFIG_SND_AOA_ONYX=m
318CONFIG_SND_AOA_TAS=m 298CONFIG_SND_AOA_TAS=m
319CONFIG_SND_AOA_TOONIE=m 299CONFIG_SND_AOA_TOONIE=m
320CONFIG_USB_HIDDEV=y
321CONFIG_HID_GYRATION=y 300CONFIG_HID_GYRATION=y
322CONFIG_HID_PANTHERLORD=y 301CONFIG_HID_PANTHERLORD=y
323CONFIG_HID_PETALYNX=y 302CONFIG_HID_PETALYNX=y
324CONFIG_HID_SAMSUNG=y 303CONFIG_HID_SAMSUNG=y
325CONFIG_HID_SONY=y 304CONFIG_HID_SONY=y
326CONFIG_HID_SUNPLUS=y 305CONFIG_HID_SUNPLUS=y
306CONFIG_USB_HIDDEV=y
327CONFIG_USB=y 307CONFIG_USB=y
328CONFIG_USB_DEVICEFS=y
329CONFIG_USB_MON=m 308CONFIG_USB_MON=m
330CONFIG_USB_EHCI_HCD=y 309CONFIG_USB_EHCI_HCD=y
331CONFIG_USB_EHCI_TT_NEWSCHED=y
332# CONFIG_USB_EHCI_HCD_PPC_OF is not set 310# CONFIG_USB_EHCI_HCD_PPC_OF is not set
333CONFIG_USB_OHCI_HCD=y 311CONFIG_USB_OHCI_HCD=y
334CONFIG_USB_STORAGE=m 312CONFIG_USB_STORAGE=m
@@ -370,11 +348,9 @@ CONFIG_JFS_POSIX_ACL=y
370CONFIG_JFS_SECURITY=y 348CONFIG_JFS_SECURITY=y
371CONFIG_XFS_FS=m 349CONFIG_XFS_FS=m
372CONFIG_XFS_POSIX_ACL=y 350CONFIG_XFS_POSIX_ACL=y
373CONFIG_OCFS2_FS=m
374CONFIG_BTRFS_FS=m 351CONFIG_BTRFS_FS=m
375CONFIG_BTRFS_FS_POSIX_ACL=y 352CONFIG_BTRFS_FS_POSIX_ACL=y
376CONFIG_NILFS2_FS=m 353CONFIG_NILFS2_FS=m
377CONFIG_INOTIFY=y
378CONFIG_AUTOFS4_FS=m 354CONFIG_AUTOFS4_FS=m
379CONFIG_FUSE_FS=m 355CONFIG_FUSE_FS=m
380CONFIG_ISO9660_FS=y 356CONFIG_ISO9660_FS=y
@@ -383,100 +359,53 @@ CONFIG_MSDOS_FS=y
383CONFIG_VFAT_FS=y 359CONFIG_VFAT_FS=y
384CONFIG_PROC_KCORE=y 360CONFIG_PROC_KCORE=y
385CONFIG_TMPFS=y 361CONFIG_TMPFS=y
362CONFIG_TMPFS_POSIX_ACL=y
386CONFIG_HUGETLBFS=y 363CONFIG_HUGETLBFS=y
387CONFIG_HFS_FS=m 364CONFIG_HFS_FS=m
388CONFIG_HFSPLUS_FS=m 365CONFIG_HFSPLUS_FS=m
389CONFIG_CRAMFS=m 366CONFIG_CRAMFS=m
390CONFIG_SQUASHFS=m 367CONFIG_SQUASHFS=m
391CONFIG_SQUASHFS_XATTR=y 368CONFIG_SQUASHFS_XATTR=y
392CONFIG_SQUASHFS_ZLIB=y
393CONFIG_SQUASHFS_LZO=y 369CONFIG_SQUASHFS_LZO=y
394CONFIG_SQUASHFS_XZ=y 370CONFIG_SQUASHFS_XZ=y
395CONFIG_NFS_FS=y 371CONFIG_NFS_FS=y
396CONFIG_NFS_V3=y
397CONFIG_NFS_V3_ACL=y 372CONFIG_NFS_V3_ACL=y
398CONFIG_NFS_V4=y 373CONFIG_NFS_V4=y
399CONFIG_ROOT_NFS=y 374CONFIG_ROOT_NFS=y
400CONFIG_NFSD=m 375CONFIG_NFSD=m
401CONFIG_NFSD_V3_ACL=y 376CONFIG_NFSD_V3_ACL=y
402CONFIG_NFSD_V4=y 377CONFIG_NFSD_V4=y
403CONFIG_RPCSEC_GSS_SPKM3=m
404CONFIG_CIFS=m 378CONFIG_CIFS=m
405CONFIG_CIFS_XATTR=y 379CONFIG_CIFS_XATTR=y
406CONFIG_CIFS_POSIX=y 380CONFIG_CIFS_POSIX=y
407CONFIG_PARTITION_ADVANCED=y 381CONFIG_NLS_DEFAULT="utf8"
408CONFIG_NLS_CODEPAGE_437=y 382CONFIG_NLS_CODEPAGE_437=y
409CONFIG_NLS_CODEPAGE_737=m 383CONFIG_NLS_ASCII=y
410CONFIG_NLS_CODEPAGE_775=m
411CONFIG_NLS_CODEPAGE_850=m
412CONFIG_NLS_CODEPAGE_852=m
413CONFIG_NLS_CODEPAGE_855=m
414CONFIG_NLS_CODEPAGE_857=m
415CONFIG_NLS_CODEPAGE_860=m
416CONFIG_NLS_CODEPAGE_861=m
417CONFIG_NLS_CODEPAGE_862=m
418CONFIG_NLS_CODEPAGE_863=m
419CONFIG_NLS_CODEPAGE_864=m
420CONFIG_NLS_CODEPAGE_865=m
421CONFIG_NLS_CODEPAGE_866=m
422CONFIG_NLS_CODEPAGE_869=m
423CONFIG_NLS_CODEPAGE_936=m
424CONFIG_NLS_CODEPAGE_950=m
425CONFIG_NLS_CODEPAGE_932=m
426CONFIG_NLS_CODEPAGE_949=m
427CONFIG_NLS_CODEPAGE_874=m
428CONFIG_NLS_ISO8859_8=m
429CONFIG_NLS_CODEPAGE_1250=m
430CONFIG_NLS_CODEPAGE_1251=m
431CONFIG_NLS_ASCII=m
432CONFIG_NLS_ISO8859_1=y 384CONFIG_NLS_ISO8859_1=y
433CONFIG_NLS_ISO8859_2=m 385CONFIG_NLS_UTF8=y
434CONFIG_NLS_ISO8859_3=m
435CONFIG_NLS_ISO8859_4=m
436CONFIG_NLS_ISO8859_5=m
437CONFIG_NLS_ISO8859_6=m
438CONFIG_NLS_ISO8859_7=m
439CONFIG_NLS_ISO8859_9=m
440CONFIG_NLS_ISO8859_13=m
441CONFIG_NLS_ISO8859_14=m
442CONFIG_NLS_ISO8859_15=m
443CONFIG_NLS_KOI8_R=m
444CONFIG_NLS_KOI8_U=m
445CONFIG_CRC_T10DIF=y 386CONFIG_CRC_T10DIF=y
446CONFIG_MAGIC_SYSRQ=y 387CONFIG_MAGIC_SYSRQ=y
447CONFIG_DEBUG_KERNEL=y 388CONFIG_DEBUG_KERNEL=y
448CONFIG_LOCKUP_DETECTOR=y 389CONFIG_LOCKUP_DETECTOR=y
449CONFIG_DETECT_HUNG_TASK=y
450CONFIG_DEBUG_MUTEXES=y 390CONFIG_DEBUG_MUTEXES=y
451# CONFIG_RCU_CPU_STALL_DETECTOR is not set 391CONFIG_DEBUG_STACK_USAGE=y
452CONFIG_LATENCYTOP=y 392CONFIG_LATENCYTOP=y
453CONFIG_SYSCTL_SYSCALL_CHECK=y
454CONFIG_SCHED_TRACER=y 393CONFIG_SCHED_TRACER=y
455CONFIG_BLK_DEV_IO_TRACE=y 394CONFIG_BLK_DEV_IO_TRACE=y
456CONFIG_DEBUG_STACKOVERFLOW=y 395CONFIG_DEBUG_STACKOVERFLOW=y
457CONFIG_DEBUG_STACK_USAGE=y
458CONFIG_CODE_PATCHING_SELFTEST=y 396CONFIG_CODE_PATCHING_SELFTEST=y
459CONFIG_FTR_FIXUP_SELFTEST=y 397CONFIG_FTR_FIXUP_SELFTEST=y
460CONFIG_MSI_BITMAP_SELFTEST=y 398CONFIG_MSI_BITMAP_SELFTEST=y
461CONFIG_XMON=y 399CONFIG_XMON=y
462CONFIG_IRQ_DOMAIN_DEBUG=y
463CONFIG_BOOTX_TEXT=y 400CONFIG_BOOTX_TEXT=y
464CONFIG_CRYPTO_NULL=m 401CONFIG_CRYPTO_NULL=m
465CONFIG_CRYPTO_TEST=m 402CONFIG_CRYPTO_TEST=m
466CONFIG_CRYPTO_CCM=m
467CONFIG_CRYPTO_GCM=m
468CONFIG_CRYPTO_ECB=m
469CONFIG_CRYPTO_PCBC=m 403CONFIG_CRYPTO_PCBC=m
470CONFIG_CRYPTO_HMAC=y 404CONFIG_CRYPTO_HMAC=y
471CONFIG_CRYPTO_MD4=m
472CONFIG_CRYPTO_MICHAEL_MIC=m 405CONFIG_CRYPTO_MICHAEL_MIC=m
473CONFIG_CRYPTO_SHA256=m
474CONFIG_CRYPTO_SHA512=m
475CONFIG_CRYPTO_TGR192=m 406CONFIG_CRYPTO_TGR192=m
476CONFIG_CRYPTO_WP512=m 407CONFIG_CRYPTO_WP512=m
477CONFIG_CRYPTO_AES=m
478CONFIG_CRYPTO_ANUBIS=m 408CONFIG_CRYPTO_ANUBIS=m
479CONFIG_CRYPTO_ARC4=m
480CONFIG_CRYPTO_BLOWFISH=m 409CONFIG_CRYPTO_BLOWFISH=m
481CONFIG_CRYPTO_CAST6=m 410CONFIG_CRYPTO_CAST6=m
482CONFIG_CRYPTO_KHAZAD=m 411CONFIG_CRYPTO_KHAZAD=m
@@ -486,11 +415,9 @@ CONFIG_CRYPTO_TEA=m
486CONFIG_CRYPTO_TWOFISH=m 415CONFIG_CRYPTO_TWOFISH=m
487CONFIG_CRYPTO_LZO=m 416CONFIG_CRYPTO_LZO=m
488# CONFIG_CRYPTO_ANSI_CPRNG is not set 417# CONFIG_CRYPTO_ANSI_CPRNG is not set
489CONFIG_CRYPTO_HW=y
490CONFIG_CRYPTO_DEV_NX=y 418CONFIG_CRYPTO_DEV_NX=y
491CONFIG_CRYPTO_DEV_NX_ENCRYPT=m 419CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
492CONFIG_VIRTUALIZATION=y 420CONFIG_VIRTUALIZATION=y
493CONFIG_KVM_BOOK3S_64=m 421CONFIG_KVM_BOOK3S_64=m
494CONFIG_KVM_BOOK3S_64_HV=y 422CONFIG_KVM_BOOK3S_64_HV=y
495CONFIG_VHOST_NET=m 423CONFIG_VHOST_NET=m
496CONFIG_BPF_JIT=y
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig
index f55c27609fc6..4b20f76172e2 100644
--- a/arch/powerpc/configs/ppc64e_defconfig
+++ b/arch/powerpc/configs/ppc64e_defconfig
@@ -4,6 +4,8 @@ CONFIG_SMP=y
4CONFIG_EXPERIMENTAL=y 4CONFIG_EXPERIMENTAL=y
5CONFIG_SYSVIPC=y 5CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y 6CONFIG_POSIX_MQUEUE=y
7CONFIG_NO_HZ=y
8CONFIG_HIGH_RES_TIMERS=y
7CONFIG_TASKSTATS=y 9CONFIG_TASKSTATS=y
8CONFIG_TASK_DELAY_ACCT=y 10CONFIG_TASK_DELAY_ACCT=y
9CONFIG_IKCONFIG=y 11CONFIG_IKCONFIG=y
@@ -18,12 +20,13 @@ CONFIG_MODULES=y
18CONFIG_MODULE_UNLOAD=y 20CONFIG_MODULE_UNLOAD=y
19CONFIG_MODVERSIONS=y 21CONFIG_MODVERSIONS=y
20CONFIG_MODULE_SRCVERSION_ALL=y 22CONFIG_MODULE_SRCVERSION_ALL=y
23CONFIG_PARTITION_ADVANCED=y
24CONFIG_MAC_PARTITION=y
25CONFIG_EFI_PARTITION=y
21CONFIG_P5020_DS=y 26CONFIG_P5020_DS=y
22CONFIG_CPU_FREQ=y 27CONFIG_CPU_FREQ=y
23CONFIG_CPU_FREQ_GOV_POWERSAVE=y 28CONFIG_CPU_FREQ_GOV_POWERSAVE=y
24CONFIG_CPU_FREQ_GOV_USERSPACE=y 29CONFIG_CPU_FREQ_GOV_USERSPACE=y
25CONFIG_NO_HZ=y
26CONFIG_HIGH_RES_TIMERS=y
27CONFIG_BINFMT_MISC=m 30CONFIG_BINFMT_MISC=m
28CONFIG_IRQ_ALL_CPUS=y 31CONFIG_IRQ_ALL_CPUS=y
29CONFIG_SPARSEMEM_MANUAL=y 32CONFIG_SPARSEMEM_MANUAL=y
@@ -46,7 +49,6 @@ CONFIG_INET_ESP=m
46CONFIG_INET_IPCOMP=m 49CONFIG_INET_IPCOMP=m
47# CONFIG_IPV6 is not set 50# CONFIG_IPV6 is not set
48CONFIG_NETFILTER=y 51CONFIG_NETFILTER=y
49CONFIG_NETFILTER_NETLINK_QUEUE=m
50CONFIG_NF_CONNTRACK=m 52CONFIG_NF_CONNTRACK=m
51CONFIG_NF_CONNTRACK_EVENTS=y 53CONFIG_NF_CONNTRACK_EVENTS=y
52CONFIG_NF_CT_PROTO_SCTP=m 54CONFIG_NF_CT_PROTO_SCTP=m
@@ -103,19 +105,12 @@ CONFIG_NETFILTER_XT_MATCH_U32=m
103CONFIG_NF_CONNTRACK_IPV4=m 105CONFIG_NF_CONNTRACK_IPV4=m
104CONFIG_IP_NF_QUEUE=m 106CONFIG_IP_NF_QUEUE=m
105CONFIG_IP_NF_IPTABLES=m 107CONFIG_IP_NF_IPTABLES=m
106CONFIG_IP_NF_MATCH_ADDRTYPE=m
107CONFIG_IP_NF_MATCH_AH=m 108CONFIG_IP_NF_MATCH_AH=m
108CONFIG_IP_NF_MATCH_ECN=m 109CONFIG_IP_NF_MATCH_ECN=m
109CONFIG_IP_NF_MATCH_TTL=m 110CONFIG_IP_NF_MATCH_TTL=m
110CONFIG_IP_NF_FILTER=m 111CONFIG_IP_NF_FILTER=m
111CONFIG_IP_NF_TARGET_REJECT=m 112CONFIG_IP_NF_TARGET_REJECT=m
112CONFIG_IP_NF_TARGET_LOG=m
113CONFIG_IP_NF_TARGET_ULOG=m 113CONFIG_IP_NF_TARGET_ULOG=m
114CONFIG_NF_NAT=m
115CONFIG_IP_NF_TARGET_MASQUERADE=m
116CONFIG_IP_NF_TARGET_NETMAP=m
117CONFIG_IP_NF_TARGET_REDIRECT=m
118CONFIG_NF_NAT_SNMP_BASIC=m
119CONFIG_IP_NF_MANGLE=m 114CONFIG_IP_NF_MANGLE=m
120CONFIG_IP_NF_TARGET_CLUSTERIP=m 115CONFIG_IP_NF_TARGET_CLUSTERIP=m
121CONFIG_IP_NF_TARGET_ECN=m 116CONFIG_IP_NF_TARGET_ECN=m
@@ -125,6 +120,8 @@ CONFIG_IP_NF_ARPTABLES=m
125CONFIG_IP_NF_ARPFILTER=m 120CONFIG_IP_NF_ARPFILTER=m
126CONFIG_IP_NF_ARP_MANGLE=m 121CONFIG_IP_NF_ARP_MANGLE=m
127CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 122CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
123CONFIG_DEVTMPFS=y
124CONFIG_DEVTMPFS_MOUNT=y
128CONFIG_PROC_DEVICETREE=y 125CONFIG_PROC_DEVICETREE=y
129CONFIG_BLK_DEV_FD=y 126CONFIG_BLK_DEV_FD=y
130CONFIG_BLK_DEV_LOOP=y 127CONFIG_BLK_DEV_LOOP=y
@@ -167,41 +164,31 @@ CONFIG_DM_SNAPSHOT=m
167CONFIG_DM_MIRROR=m 164CONFIG_DM_MIRROR=m
168CONFIG_DM_ZERO=m 165CONFIG_DM_ZERO=m
169CONFIG_DM_MULTIPATH=m 166CONFIG_DM_MULTIPATH=m
170CONFIG_IEEE1394=y
171CONFIG_IEEE1394_OHCI1394=y
172CONFIG_IEEE1394_SBP2=m
173CONFIG_IEEE1394_ETH1394=m
174CONFIG_IEEE1394_RAWIO=y
175CONFIG_IEEE1394_VIDEO1394=m
176CONFIG_IEEE1394_DV1394=m
177CONFIG_MACINTOSH_DRIVERS=y 167CONFIG_MACINTOSH_DRIVERS=y
178CONFIG_WINDFARM=y 168CONFIG_WINDFARM=y
179CONFIG_NETDEVICES=y 169CONFIG_NETDEVICES=y
180CONFIG_DUMMY=m
181CONFIG_BONDING=m 170CONFIG_BONDING=m
171CONFIG_DUMMY=m
172CONFIG_NETCONSOLE=y
173CONFIG_NETPOLL_TRAP=y
182CONFIG_TUN=m 174CONFIG_TUN=m
183CONFIG_MARVELL_PHY=y
184CONFIG_BROADCOM_PHY=m
185CONFIG_NET_ETHERNET=y
186CONFIG_SUNGEM=y
187CONFIG_NET_VENDOR_3COM=y
188CONFIG_VORTEX=y 175CONFIG_VORTEX=y
189CONFIG_NET_PCI=y
190CONFIG_PCNET32=y
191CONFIG_E100=y
192CONFIG_ACENIC=y 176CONFIG_ACENIC=y
193CONFIG_ACENIC_OMIT_TIGON_I=y 177CONFIG_ACENIC_OMIT_TIGON_I=y
194CONFIG_E1000=y 178CONFIG_PCNET32=y
195CONFIG_TIGON3=y 179CONFIG_TIGON3=y
180CONFIG_E100=y
181CONFIG_E1000=y
196CONFIG_IXGB=m 182CONFIG_IXGB=m
183CONFIG_SUNGEM=y
184CONFIG_MARVELL_PHY=y
185CONFIG_BROADCOM_PHY=m
197CONFIG_PPP=m 186CONFIG_PPP=m
198CONFIG_PPP_ASYNC=m
199CONFIG_PPP_SYNC_TTY=m
200CONFIG_PPP_DEFLATE=m
201CONFIG_PPP_BSDCOMP=m 187CONFIG_PPP_BSDCOMP=m
188CONFIG_PPP_DEFLATE=m
202CONFIG_PPPOE=m 189CONFIG_PPPOE=m
203CONFIG_NETCONSOLE=y 190CONFIG_PPP_ASYNC=m
204CONFIG_NETPOLL_TRAP=y 191CONFIG_PPP_SYNC_TTY=m
205# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 192# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
206CONFIG_INPUT_EVDEV=m 193CONFIG_INPUT_EVDEV=m
207CONFIG_INPUT_MISC=y 194CONFIG_INPUT_MISC=y
@@ -213,7 +200,6 @@ CONFIG_SERIAL_8250_CONSOLE=y
213CONFIG_RAW_DRIVER=y 200CONFIG_RAW_DRIVER=y
214CONFIG_I2C_CHARDEV=y 201CONFIG_I2C_CHARDEV=y
215CONFIG_I2C_AMD8111=y 202CONFIG_I2C_AMD8111=y
216# CONFIG_HWMON is not set
217CONFIG_VIDEO_OUTPUT_CONTROL=m 203CONFIG_VIDEO_OUTPUT_CONTROL=m
218CONFIG_FB=y 204CONFIG_FB=y
219CONFIG_FIRMWARE_EDID=y 205CONFIG_FIRMWARE_EDID=y
@@ -227,7 +213,6 @@ CONFIG_FB_MATROX_MAVEN=m
227CONFIG_FB_RADEON=y 213CONFIG_FB_RADEON=y
228CONFIG_FB_IBM_GXT4500=y 214CONFIG_FB_IBM_GXT4500=y
229CONFIG_LCD_CLASS_DEVICE=y 215CONFIG_LCD_CLASS_DEVICE=y
230CONFIG_DISPLAY_SUPPORT=y
231# CONFIG_VGA_CONSOLE is not set 216# CONFIG_VGA_CONSOLE is not set
232CONFIG_FRAMEBUFFER_CONSOLE=y 217CONFIG_FRAMEBUFFER_CONSOLE=y
233CONFIG_LOGO=y 218CONFIG_LOGO=y
@@ -238,7 +223,6 @@ CONFIG_SND_SEQ_DUMMY=m
238CONFIG_SND_MIXER_OSS=m 223CONFIG_SND_MIXER_OSS=m
239CONFIG_SND_PCM_OSS=m 224CONFIG_SND_PCM_OSS=m
240CONFIG_SND_SEQUENCER_OSS=y 225CONFIG_SND_SEQUENCER_OSS=y
241CONFIG_USB_HIDDEV=y
242CONFIG_HID_DRAGONRISE=y 226CONFIG_HID_DRAGONRISE=y
243CONFIG_HID_GYRATION=y 227CONFIG_HID_GYRATION=y
244CONFIG_HID_TWINHAN=y 228CONFIG_HID_TWINHAN=y
@@ -253,8 +237,8 @@ CONFIG_HID_SMARTJOYPLUS=y
253CONFIG_HID_TOPSEED=y 237CONFIG_HID_TOPSEED=y
254CONFIG_HID_THRUSTMASTER=y 238CONFIG_HID_THRUSTMASTER=y
255CONFIG_HID_ZEROPLUS=y 239CONFIG_HID_ZEROPLUS=y
240CONFIG_USB_HIDDEV=y
256CONFIG_USB=y 241CONFIG_USB=y
257CONFIG_USB_DEVICEFS=y
258CONFIG_USB_EHCI_HCD=y 242CONFIG_USB_EHCI_HCD=y
259# CONFIG_USB_EHCI_HCD_PPC_OF is not set 243# CONFIG_USB_EHCI_HCD_PPC_OF is not set
260CONFIG_USB_OHCI_HCD=y 244CONFIG_USB_OHCI_HCD=y
@@ -296,73 +280,36 @@ CONFIG_MSDOS_FS=y
296CONFIG_VFAT_FS=y 280CONFIG_VFAT_FS=y
297CONFIG_PROC_KCORE=y 281CONFIG_PROC_KCORE=y
298CONFIG_TMPFS=y 282CONFIG_TMPFS=y
283CONFIG_TMPFS_POSIX_ACL=y
299CONFIG_HFS_FS=m 284CONFIG_HFS_FS=m
300CONFIG_HFSPLUS_FS=m 285CONFIG_HFSPLUS_FS=m
301CONFIG_CRAMFS=y 286CONFIG_CRAMFS=y
302CONFIG_NFS_FS=y 287CONFIG_NFS_FS=y
303CONFIG_NFS_V3=y
304CONFIG_NFS_V3_ACL=y 288CONFIG_NFS_V3_ACL=y
305CONFIG_NFS_V4=y 289CONFIG_NFS_V4=y
306CONFIG_ROOT_NFS=y 290CONFIG_ROOT_NFS=y
307CONFIG_NFSD=m 291CONFIG_NFSD=m
308CONFIG_NFSD_V3_ACL=y 292CONFIG_NFSD_V3_ACL=y
309CONFIG_NFSD_V4=y 293CONFIG_NFSD_V4=y
310CONFIG_RPCSEC_GSS_SPKM3=m
311CONFIG_CIFS=m 294CONFIG_CIFS=m
312CONFIG_CIFS_XATTR=y 295CONFIG_CIFS_XATTR=y
313CONFIG_CIFS_POSIX=y 296CONFIG_CIFS_POSIX=y
314CONFIG_PARTITION_ADVANCED=y 297CONFIG_NLS_DEFAULT="utf8"
315CONFIG_MAC_PARTITION=y
316CONFIG_NLS_CODEPAGE_437=y 298CONFIG_NLS_CODEPAGE_437=y
317CONFIG_NLS_CODEPAGE_737=m 299CONFIG_NLS_ASCII=y
318CONFIG_NLS_CODEPAGE_775=m
319CONFIG_NLS_CODEPAGE_850=m
320CONFIG_NLS_CODEPAGE_852=m
321CONFIG_NLS_CODEPAGE_855=m
322CONFIG_NLS_CODEPAGE_857=m
323CONFIG_NLS_CODEPAGE_860=m
324CONFIG_NLS_CODEPAGE_861=m
325CONFIG_NLS_CODEPAGE_862=m
326CONFIG_NLS_CODEPAGE_863=m
327CONFIG_NLS_CODEPAGE_864=m
328CONFIG_NLS_CODEPAGE_865=m
329CONFIG_NLS_CODEPAGE_866=m
330CONFIG_NLS_CODEPAGE_869=m
331CONFIG_NLS_CODEPAGE_936=m
332CONFIG_NLS_CODEPAGE_950=m
333CONFIG_NLS_CODEPAGE_932=m
334CONFIG_NLS_CODEPAGE_949=m
335CONFIG_NLS_CODEPAGE_874=m
336CONFIG_NLS_ISO8859_8=m
337CONFIG_NLS_CODEPAGE_1250=m
338CONFIG_NLS_CODEPAGE_1251=m
339CONFIG_NLS_ASCII=m
340CONFIG_NLS_ISO8859_1=y 300CONFIG_NLS_ISO8859_1=y
341CONFIG_NLS_ISO8859_2=m 301CONFIG_NLS_UTF8=y
342CONFIG_NLS_ISO8859_3=m
343CONFIG_NLS_ISO8859_4=m
344CONFIG_NLS_ISO8859_5=m
345CONFIG_NLS_ISO8859_6=m
346CONFIG_NLS_ISO8859_7=m
347CONFIG_NLS_ISO8859_9=m
348CONFIG_NLS_ISO8859_13=m
349CONFIG_NLS_ISO8859_14=m
350CONFIG_NLS_ISO8859_15=m
351CONFIG_NLS_KOI8_R=m
352CONFIG_NLS_KOI8_U=m
353CONFIG_CRC_T10DIF=y 302CONFIG_CRC_T10DIF=y
354CONFIG_MAGIC_SYSRQ=y 303CONFIG_MAGIC_SYSRQ=y
355CONFIG_DEBUG_KERNEL=y 304CONFIG_DEBUG_KERNEL=y
356CONFIG_DETECT_HUNG_TASK=y 305CONFIG_DETECT_HUNG_TASK=y
357CONFIG_DEBUG_MUTEXES=y 306CONFIG_DEBUG_MUTEXES=y
358# CONFIG_RCU_CPU_STALL_DETECTOR is not set 307CONFIG_DEBUG_STACK_USAGE=y
359CONFIG_LATENCYTOP=y 308CONFIG_LATENCYTOP=y
360CONFIG_SYSCTL_SYSCALL_CHECK=y
361CONFIG_IRQSOFF_TRACER=y 309CONFIG_IRQSOFF_TRACER=y
362CONFIG_SCHED_TRACER=y 310CONFIG_SCHED_TRACER=y
363CONFIG_BLK_DEV_IO_TRACE=y 311CONFIG_BLK_DEV_IO_TRACE=y
364CONFIG_DEBUG_STACKOVERFLOW=y 312CONFIG_DEBUG_STACKOVERFLOW=y
365CONFIG_DEBUG_STACK_USAGE=y
366CONFIG_CODE_PATCHING_SELFTEST=y 313CONFIG_CODE_PATCHING_SELFTEST=y
367CONFIG_FTR_FIXUP_SELFTEST=y 314CONFIG_FTR_FIXUP_SELFTEST=y
368CONFIG_MSI_BITMAP_SELFTEST=y 315CONFIG_MSI_BITMAP_SELFTEST=y
@@ -371,16 +318,12 @@ CONFIG_CRYPTO_NULL=m
371CONFIG_CRYPTO_TEST=m 318CONFIG_CRYPTO_TEST=m
372CONFIG_CRYPTO_CCM=m 319CONFIG_CRYPTO_CCM=m
373CONFIG_CRYPTO_GCM=m 320CONFIG_CRYPTO_GCM=m
374CONFIG_CRYPTO_ECB=m
375CONFIG_CRYPTO_PCBC=m 321CONFIG_CRYPTO_PCBC=m
376CONFIG_CRYPTO_HMAC=y 322CONFIG_CRYPTO_HMAC=y
377CONFIG_CRYPTO_MD4=m
378CONFIG_CRYPTO_MICHAEL_MIC=m 323CONFIG_CRYPTO_MICHAEL_MIC=m
379CONFIG_CRYPTO_SHA256=m
380CONFIG_CRYPTO_SHA512=m 324CONFIG_CRYPTO_SHA512=m
381CONFIG_CRYPTO_TGR192=m 325CONFIG_CRYPTO_TGR192=m
382CONFIG_CRYPTO_WP512=m 326CONFIG_CRYPTO_WP512=m
383CONFIG_CRYPTO_AES=m
384CONFIG_CRYPTO_ANUBIS=m 327CONFIG_CRYPTO_ANUBIS=m
385CONFIG_CRYPTO_BLOWFISH=m 328CONFIG_CRYPTO_BLOWFISH=m
386CONFIG_CRYPTO_CAST6=m 329CONFIG_CRYPTO_CAST6=m
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index c2f4b4a86ece..7a5c15fcc7cf 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -6,6 +6,7 @@ CONFIG_NR_CPUS=2
6CONFIG_EXPERIMENTAL=y 6CONFIG_EXPERIMENTAL=y
7CONFIG_SYSVIPC=y 7CONFIG_SYSVIPC=y
8CONFIG_POSIX_MQUEUE=y 8CONFIG_POSIX_MQUEUE=y
9CONFIG_HIGH_RES_TIMERS=y
9CONFIG_BLK_DEV_INITRD=y 10CONFIG_BLK_DEV_INITRD=y
10CONFIG_CC_OPTIMIZE_FOR_SIZE=y 11CONFIG_CC_OPTIMIZE_FOR_SIZE=y
11CONFIG_EMBEDDED=y 12CONFIG_EMBEDDED=y
@@ -24,12 +25,13 @@ CONFIG_PS3_DISK=y
24CONFIG_PS3_ROM=y 25CONFIG_PS3_ROM=y
25CONFIG_PS3_FLASH=y 26CONFIG_PS3_FLASH=y
26CONFIG_PS3_VRAM=m 27CONFIG_PS3_VRAM=m
28CONFIG_PS3_LPM=m
27# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set 29# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
28CONFIG_HIGH_RES_TIMERS=y
29# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 30# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
30CONFIG_BINFMT_MISC=y 31CONFIG_BINFMT_MISC=y
31CONFIG_KEXEC=y 32CONFIG_KEXEC=y
32# CONFIG_SPARSEMEM_VMEMMAP is not set 33# CONFIG_SPARSEMEM_VMEMMAP is not set
34# CONFIG_COMPACTION is not set
33CONFIG_SCHED_SMT=y 35CONFIG_SCHED_SMT=y
34CONFIG_CMDLINE_BOOL=y 36CONFIG_CMDLINE_BOOL=y
35CONFIG_CMDLINE="" 37CONFIG_CMDLINE=""
@@ -59,6 +61,7 @@ CONFIG_BT_BNEP_PROTO_FILTER=y
59CONFIG_BT_HIDP=m 61CONFIG_BT_HIDP=m
60CONFIG_BT_HCIBTUSB=m 62CONFIG_BT_HCIBTUSB=m
61CONFIG_CFG80211=m 63CONFIG_CFG80211=m
64CONFIG_CFG80211_WEXT=y
62CONFIG_MAC80211=m 65CONFIG_MAC80211=m
63CONFIG_MAC80211_RC_PID=y 66CONFIG_MAC80211_RC_PID=y
64# CONFIG_MAC80211_RC_MINSTREL is not set 67# CONFIG_MAC80211_RC_MINSTREL is not set
@@ -78,7 +81,6 @@ CONFIG_MD=y
78CONFIG_BLK_DEV_DM=m 81CONFIG_BLK_DEV_DM=m
79CONFIG_NETDEVICES=y 82CONFIG_NETDEVICES=y
80# CONFIG_NET_VENDOR_BROADCOM is not set 83# CONFIG_NET_VENDOR_BROADCOM is not set
81# CONFIG_NET_VENDOR_CHELSIO is not set
82# CONFIG_NET_VENDOR_INTEL is not set 84# CONFIG_NET_VENDOR_INTEL is not set
83# CONFIG_NET_VENDOR_MARVELL is not set 85# CONFIG_NET_VENDOR_MARVELL is not set
84# CONFIG_NET_VENDOR_MICREL is not set 86# CONFIG_NET_VENDOR_MICREL is not set
@@ -119,21 +121,21 @@ CONFIG_SND=m
119# CONFIG_SND_DRIVERS is not set 121# CONFIG_SND_DRIVERS is not set
120CONFIG_SND_USB_AUDIO=m 122CONFIG_SND_USB_AUDIO=m
121CONFIG_HIDRAW=y 123CONFIG_HIDRAW=y
122CONFIG_USB_HIDDEV=y
123CONFIG_HID_APPLE=m 124CONFIG_HID_APPLE=m
124CONFIG_HID_BELKIN=m 125CONFIG_HID_BELKIN=m
125CONFIG_HID_CHERRY=m 126CONFIG_HID_CHERRY=m
126CONFIG_HID_EZKEY=m 127CONFIG_HID_EZKEY=m
127CONFIG_HID_TWINHAN=m 128CONFIG_HID_TWINHAN=m
128CONFIG_HID_LOGITECH=m 129CONFIG_HID_LOGITECH=m
130CONFIG_HID_LOGITECH_DJ=m
129CONFIG_HID_MICROSOFT=m 131CONFIG_HID_MICROSOFT=m
132CONFIG_HID_PS3REMOTE=m
130CONFIG_HID_SONY=m 133CONFIG_HID_SONY=m
131CONFIG_HID_SUNPLUS=m 134CONFIG_HID_SUNPLUS=m
132CONFIG_HID_SMARTJOYPLUS=m 135CONFIG_HID_SMARTJOYPLUS=m
136CONFIG_USB_HIDDEV=y
133CONFIG_USB=m 137CONFIG_USB=m
134CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 138CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
135CONFIG_USB_DEVICEFS=y
136# CONFIG_USB_DEVICE_CLASS is not set
137CONFIG_USB_SUSPEND=y 139CONFIG_USB_SUSPEND=y
138CONFIG_USB_MON=m 140CONFIG_USB_MON=m
139CONFIG_USB_EHCI_HCD=m 141CONFIG_USB_EHCI_HCD=m
@@ -158,8 +160,8 @@ CONFIG_PROC_KCORE=y
158CONFIG_TMPFS=y 160CONFIG_TMPFS=y
159CONFIG_HUGETLBFS=y 161CONFIG_HUGETLBFS=y
160CONFIG_NFS_FS=y 162CONFIG_NFS_FS=y
161CONFIG_NFS_V3=y
162CONFIG_NFS_V4=y 163CONFIG_NFS_V4=y
164CONFIG_NFS_SWAP=y
163CONFIG_ROOT_NFS=y 165CONFIG_ROOT_NFS=y
164CONFIG_CIFS=m 166CONFIG_CIFS=m
165CONFIG_NLS=y 167CONFIG_NLS=y
@@ -176,6 +178,7 @@ CONFIG_DEBUG_INFO=y
176CONFIG_DEBUG_WRITECOUNT=y 178CONFIG_DEBUG_WRITECOUNT=y
177CONFIG_DEBUG_MEMORY_INIT=y 179CONFIG_DEBUG_MEMORY_INIT=y
178CONFIG_DEBUG_LIST=y 180CONFIG_DEBUG_LIST=y
181CONFIG_RCU_CPU_STALL_TIMEOUT=60
179# CONFIG_FTRACE is not set 182# CONFIG_FTRACE is not set
180CONFIG_DEBUG_STACKOVERFLOW=y 183CONFIG_DEBUG_STACKOVERFLOW=y
181CONFIG_CRYPTO_CCM=m 184CONFIG_CRYPTO_CCM=m
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 5b8e1e508270..c4dfbaf8b192 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -6,12 +6,15 @@ CONFIG_NR_CPUS=2048
6CONFIG_EXPERIMENTAL=y 6CONFIG_EXPERIMENTAL=y
7CONFIG_SYSVIPC=y 7CONFIG_SYSVIPC=y
8CONFIG_POSIX_MQUEUE=y 8CONFIG_POSIX_MQUEUE=y
9CONFIG_AUDIT=y
10CONFIG_AUDITSYSCALL=y
11CONFIG_IRQ_DOMAIN_DEBUG=y
12CONFIG_NO_HZ=y
13CONFIG_HIGH_RES_TIMERS=y
9CONFIG_TASKSTATS=y 14CONFIG_TASKSTATS=y
10CONFIG_TASK_DELAY_ACCT=y 15CONFIG_TASK_DELAY_ACCT=y
11CONFIG_TASK_XACCT=y 16CONFIG_TASK_XACCT=y
12CONFIG_TASK_IO_ACCOUNTING=y 17CONFIG_TASK_IO_ACCOUNTING=y
13CONFIG_AUDIT=y
14CONFIG_AUDITSYSCALL=y
15CONFIG_IKCONFIG=y 18CONFIG_IKCONFIG=y
16CONFIG_IKCONFIG_PROC=y 19CONFIG_IKCONFIG_PROC=y
17CONFIG_CGROUPS=y 20CONFIG_CGROUPS=y
@@ -29,6 +32,8 @@ CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y 32CONFIG_MODULE_UNLOAD=y
30CONFIG_MODVERSIONS=y 33CONFIG_MODVERSIONS=y
31CONFIG_MODULE_SRCVERSION_ALL=y 34CONFIG_MODULE_SRCVERSION_ALL=y
35CONFIG_PARTITION_ADVANCED=y
36CONFIG_EFI_PARTITION=y
32CONFIG_PPC_SPLPAR=y 37CONFIG_PPC_SPLPAR=y
33CONFIG_SCANLOG=m 38CONFIG_SCANLOG=m
34CONFIG_PPC_SMLPAR=y 39CONFIG_PPC_SMLPAR=y
@@ -36,10 +41,9 @@ CONFIG_DTL=y
36# CONFIG_PPC_PMAC is not set 41# CONFIG_PPC_PMAC is not set
37CONFIG_RTAS_FLASH=m 42CONFIG_RTAS_FLASH=m
38CONFIG_IBMEBUS=y 43CONFIG_IBMEBUS=y
39CONFIG_NO_HZ=y
40CONFIG_HIGH_RES_TIMERS=y
41CONFIG_HZ_100=y 44CONFIG_HZ_100=y
42CONFIG_BINFMT_MISC=m 45CONFIG_BINFMT_MISC=m
46CONFIG_PPC_TRANSACTIONAL_MEM=y
43CONFIG_HOTPLUG_CPU=y 47CONFIG_HOTPLUG_CPU=y
44CONFIG_KEXEC=y 48CONFIG_KEXEC=y
45CONFIG_IRQ_ALL_CPUS=y 49CONFIG_IRQ_ALL_CPUS=y
@@ -65,7 +69,6 @@ CONFIG_INET_ESP=m
65CONFIG_INET_IPCOMP=m 69CONFIG_INET_IPCOMP=m
66# CONFIG_IPV6 is not set 70# CONFIG_IPV6 is not set
67CONFIG_NETFILTER=y 71CONFIG_NETFILTER=y
68CONFIG_NETFILTER_NETLINK_QUEUE=m
69CONFIG_NF_CONNTRACK=m 72CONFIG_NF_CONNTRACK=m
70CONFIG_NF_CONNTRACK_EVENTS=y 73CONFIG_NF_CONNTRACK_EVENTS=y
71CONFIG_NF_CT_PROTO_UDPLITE=m 74CONFIG_NF_CT_PROTO_UDPLITE=m
@@ -112,20 +115,15 @@ CONFIG_NETFILTER_XT_MATCH_U32=m
112CONFIG_NF_CONNTRACK_IPV4=m 115CONFIG_NF_CONNTRACK_IPV4=m
113CONFIG_IP_NF_QUEUE=m 116CONFIG_IP_NF_QUEUE=m
114CONFIG_IP_NF_IPTABLES=m 117CONFIG_IP_NF_IPTABLES=m
115CONFIG_IP_NF_MATCH_ADDRTYPE=m
116CONFIG_IP_NF_MATCH_AH=m 118CONFIG_IP_NF_MATCH_AH=m
117CONFIG_IP_NF_MATCH_ECN=m 119CONFIG_IP_NF_MATCH_ECN=m
118CONFIG_IP_NF_MATCH_TTL=m 120CONFIG_IP_NF_MATCH_TTL=m
119CONFIG_IP_NF_FILTER=m 121CONFIG_IP_NF_FILTER=m
120CONFIG_IP_NF_TARGET_REJECT=m 122CONFIG_IP_NF_TARGET_REJECT=m
121CONFIG_IP_NF_TARGET_LOG=m
122CONFIG_IP_NF_TARGET_ULOG=m 123CONFIG_IP_NF_TARGET_ULOG=m
123CONFIG_NF_NAT=m
124CONFIG_IP_NF_TARGET_MASQUERADE=m
125CONFIG_IP_NF_TARGET_NETMAP=m
126CONFIG_IP_NF_TARGET_REDIRECT=m
127CONFIG_NF_NAT_SNMP_BASIC=m
128CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 124CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
125CONFIG_DEVTMPFS=y
126CONFIG_DEVTMPFS_MOUNT=y
129CONFIG_PROC_DEVICETREE=y 127CONFIG_PROC_DEVICETREE=y
130CONFIG_PARPORT=m 128CONFIG_PARPORT=m
131CONFIG_PARPORT_PC=m 129CONFIG_PARPORT_PC=m
@@ -146,7 +144,6 @@ CONFIG_CHR_DEV_SG=y
146CONFIG_SCSI_MULTI_LUN=y 144CONFIG_SCSI_MULTI_LUN=y
147CONFIG_SCSI_CONSTANTS=y 145CONFIG_SCSI_CONSTANTS=y
148CONFIG_SCSI_FC_ATTRS=y 146CONFIG_SCSI_FC_ATTRS=y
149CONFIG_SCSI_SAS_ATTRS=m
150CONFIG_SCSI_CXGB3_ISCSI=m 147CONFIG_SCSI_CXGB3_ISCSI=m
151CONFIG_SCSI_CXGB4_ISCSI=m 148CONFIG_SCSI_CXGB4_ISCSI=m
152CONFIG_SCSI_BNX2_ISCSI=m 149CONFIG_SCSI_BNX2_ISCSI=m
@@ -177,43 +174,36 @@ CONFIG_DM_SNAPSHOT=m
177CONFIG_DM_MIRROR=m 174CONFIG_DM_MIRROR=m
178CONFIG_DM_ZERO=m 175CONFIG_DM_ZERO=m
179CONFIG_DM_MULTIPATH=m 176CONFIG_DM_MULTIPATH=m
180CONFIG_NETDEVICES=y
181CONFIG_DUMMY=m
182CONFIG_BONDING=m 177CONFIG_BONDING=m
178CONFIG_DUMMY=m
179CONFIG_NETCONSOLE=y
180CONFIG_NETPOLL_TRAP=y
183CONFIG_TUN=m 181CONFIG_TUN=m
184CONFIG_NET_ETHERNET=y
185CONFIG_NET_VENDOR_3COM=y
186CONFIG_VORTEX=y 182CONFIG_VORTEX=y
187CONFIG_IBMVETH=y
188CONFIG_NET_PCI=y
189CONFIG_PCNET32=y
190CONFIG_E100=y
191CONFIG_ACENIC=m 183CONFIG_ACENIC=m
192CONFIG_ACENIC_OMIT_TIGON_I=y 184CONFIG_ACENIC_OMIT_TIGON_I=y
193CONFIG_E1000=y 185CONFIG_PCNET32=y
194CONFIG_E1000E=y
195CONFIG_TIGON3=y 186CONFIG_TIGON3=y
196CONFIG_BNX2=m
197CONFIG_CHELSIO_T1=m 187CONFIG_CHELSIO_T1=m
198CONFIG_CHELSIO_T3=m 188CONFIG_BE2NET=m
199CONFIG_CHELSIO_T4=m 189CONFIG_S2IO=m
190CONFIG_IBMVETH=y
200CONFIG_EHEA=y 191CONFIG_EHEA=y
201CONFIG_IXGBE=m 192CONFIG_E100=y
193CONFIG_E1000=y
194CONFIG_E1000E=y
202CONFIG_IXGB=m 195CONFIG_IXGB=m
203CONFIG_S2IO=m 196CONFIG_IXGBE=m
204CONFIG_MYRI10GE=m
205CONFIG_NETXEN_NIC=m
206CONFIG_MLX4_EN=m 197CONFIG_MLX4_EN=m
198CONFIG_MYRI10GE=m
207CONFIG_QLGE=m 199CONFIG_QLGE=m
208CONFIG_BE2NET=m 200CONFIG_NETXEN_NIC=m
209CONFIG_PPP=m 201CONFIG_PPP=m
210CONFIG_PPP_ASYNC=m
211CONFIG_PPP_SYNC_TTY=m
212CONFIG_PPP_DEFLATE=m
213CONFIG_PPP_BSDCOMP=m 202CONFIG_PPP_BSDCOMP=m
203CONFIG_PPP_DEFLATE=m
214CONFIG_PPPOE=m 204CONFIG_PPPOE=m
215CONFIG_NETCONSOLE=y 205CONFIG_PPP_ASYNC=m
216CONFIG_NETPOLL_TRAP=y 206CONFIG_PPP_SYNC_TTY=m
217# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 207# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
218CONFIG_INPUT_EVDEV=m 208CONFIG_INPUT_EVDEV=m
219CONFIG_INPUT_MISC=y 209CONFIG_INPUT_MISC=y
@@ -227,12 +217,9 @@ CONFIG_HVC_CONSOLE=y
227CONFIG_HVC_RTAS=y 217CONFIG_HVC_RTAS=y
228CONFIG_HVCS=m 218CONFIG_HVCS=m
229CONFIG_IBM_BSR=m 219CONFIG_IBM_BSR=m
230CONFIG_HW_RANDOM=m
231CONFIG_HW_RANDOM_PSERIES=m
232CONFIG_GEN_RTC=y 220CONFIG_GEN_RTC=y
233CONFIG_RAW_DRIVER=y 221CONFIG_RAW_DRIVER=y
234CONFIG_MAX_RAW_DEVS=1024 222CONFIG_MAX_RAW_DEVS=1024
235# CONFIG_HWMON is not set
236CONFIG_FB=y 223CONFIG_FB=y
237CONFIG_FIRMWARE_EDID=y 224CONFIG_FIRMWARE_EDID=y
238CONFIG_FB_OF=y 225CONFIG_FB_OF=y
@@ -243,19 +230,17 @@ CONFIG_FB_MATROX_G=y
243CONFIG_FB_RADEON=y 230CONFIG_FB_RADEON=y
244CONFIG_FB_IBM_GXT4500=y 231CONFIG_FB_IBM_GXT4500=y
245CONFIG_LCD_PLATFORM=m 232CONFIG_LCD_PLATFORM=m
246CONFIG_DISPLAY_SUPPORT=y
247# CONFIG_VGA_CONSOLE is not set 233# CONFIG_VGA_CONSOLE is not set
248CONFIG_FRAMEBUFFER_CONSOLE=y 234CONFIG_FRAMEBUFFER_CONSOLE=y
249CONFIG_LOGO=y 235CONFIG_LOGO=y
250CONFIG_USB_HIDDEV=y
251CONFIG_HID_GYRATION=y 236CONFIG_HID_GYRATION=y
252CONFIG_HID_PANTHERLORD=y 237CONFIG_HID_PANTHERLORD=y
253CONFIG_HID_PETALYNX=y 238CONFIG_HID_PETALYNX=y
254CONFIG_HID_SAMSUNG=y 239CONFIG_HID_SAMSUNG=y
255CONFIG_HID_SONY=y 240CONFIG_HID_SONY=y
256CONFIG_HID_SUNPLUS=y 241CONFIG_HID_SUNPLUS=y
242CONFIG_USB_HIDDEV=y
257CONFIG_USB=y 243CONFIG_USB=y
258CONFIG_USB_DEVICEFS=y
259CONFIG_USB_MON=m 244CONFIG_USB_MON=m
260CONFIG_USB_EHCI_HCD=y 245CONFIG_USB_EHCI_HCD=y
261# CONFIG_USB_EHCI_HCD_PPC_OF is not set 246# CONFIG_USB_EHCI_HCD_PPC_OF is not set
@@ -293,7 +278,6 @@ CONFIG_JFS_POSIX_ACL=y
293CONFIG_JFS_SECURITY=y 278CONFIG_JFS_SECURITY=y
294CONFIG_XFS_FS=m 279CONFIG_XFS_FS=m
295CONFIG_XFS_POSIX_ACL=y 280CONFIG_XFS_POSIX_ACL=y
296CONFIG_OCFS2_FS=m
297CONFIG_BTRFS_FS=m 281CONFIG_BTRFS_FS=m
298CONFIG_BTRFS_FS_POSIX_ACL=y 282CONFIG_BTRFS_FS_POSIX_ACL=y
299CONFIG_NILFS2_FS=m 283CONFIG_NILFS2_FS=m
@@ -305,61 +289,49 @@ CONFIG_MSDOS_FS=y
305CONFIG_VFAT_FS=y 289CONFIG_VFAT_FS=y
306CONFIG_PROC_KCORE=y 290CONFIG_PROC_KCORE=y
307CONFIG_TMPFS=y 291CONFIG_TMPFS=y
292CONFIG_TMPFS_POSIX_ACL=y
308CONFIG_HUGETLBFS=y 293CONFIG_HUGETLBFS=y
309CONFIG_CRAMFS=m 294CONFIG_CRAMFS=m
310CONFIG_SQUASHFS=m 295CONFIG_SQUASHFS=m
311CONFIG_SQUASHFS_XATTR=y 296CONFIG_SQUASHFS_XATTR=y
312CONFIG_SQUASHFS_ZLIB=y
313CONFIG_SQUASHFS_LZO=y 297CONFIG_SQUASHFS_LZO=y
314CONFIG_SQUASHFS_XZ=y 298CONFIG_SQUASHFS_XZ=y
315CONFIG_NFS_FS=y 299CONFIG_NFS_FS=y
316CONFIG_NFS_V3=y
317CONFIG_NFS_V3_ACL=y 300CONFIG_NFS_V3_ACL=y
318CONFIG_NFS_V4=y 301CONFIG_NFS_V4=y
319CONFIG_NFSD=m 302CONFIG_NFSD=m
320CONFIG_NFSD_V3_ACL=y 303CONFIG_NFSD_V3_ACL=y
321CONFIG_NFSD_V4=y 304CONFIG_NFSD_V4=y
322CONFIG_RPCSEC_GSS_SPKM3=m
323CONFIG_CIFS=m 305CONFIG_CIFS=m
324CONFIG_CIFS_XATTR=y 306CONFIG_CIFS_XATTR=y
325CONFIG_CIFS_POSIX=y 307CONFIG_CIFS_POSIX=y
308CONFIG_NLS_DEFAULT="utf8"
326CONFIG_NLS_CODEPAGE_437=y 309CONFIG_NLS_CODEPAGE_437=y
327CONFIG_NLS_ASCII=y 310CONFIG_NLS_ASCII=y
328CONFIG_NLS_ISO8859_1=y 311CONFIG_NLS_ISO8859_1=y
312CONFIG_NLS_UTF8=y
329CONFIG_CRC_T10DIF=y 313CONFIG_CRC_T10DIF=y
330CONFIG_MAGIC_SYSRQ=y 314CONFIG_MAGIC_SYSRQ=y
331CONFIG_DEBUG_KERNEL=y 315CONFIG_DEBUG_KERNEL=y
332CONFIG_LOCKUP_DETECTOR=y 316CONFIG_LOCKUP_DETECTOR=y
333CONFIG_DETECT_HUNG_TASK=y 317CONFIG_DEBUG_STACK_USAGE=y
334# CONFIG_RCU_CPU_STALL_DETECTOR is not set
335CONFIG_LATENCYTOP=y 318CONFIG_LATENCYTOP=y
336CONFIG_SYSCTL_SYSCALL_CHECK=y
337CONFIG_SCHED_TRACER=y 319CONFIG_SCHED_TRACER=y
338CONFIG_BLK_DEV_IO_TRACE=y 320CONFIG_BLK_DEV_IO_TRACE=y
339CONFIG_DEBUG_STACKOVERFLOW=y 321CONFIG_DEBUG_STACKOVERFLOW=y
340CONFIG_DEBUG_STACK_USAGE=y
341CONFIG_CODE_PATCHING_SELFTEST=y 322CONFIG_CODE_PATCHING_SELFTEST=y
342CONFIG_FTR_FIXUP_SELFTEST=y 323CONFIG_FTR_FIXUP_SELFTEST=y
343CONFIG_MSI_BITMAP_SELFTEST=y 324CONFIG_MSI_BITMAP_SELFTEST=y
344CONFIG_XMON=y 325CONFIG_XMON=y
345CONFIG_XMON_DEFAULT=y 326CONFIG_XMON_DEFAULT=y
346CONFIG_IRQ_DOMAIN_DEBUG=y
347CONFIG_CRYPTO_NULL=m 327CONFIG_CRYPTO_NULL=m
348CONFIG_CRYPTO_TEST=m 328CONFIG_CRYPTO_TEST=m
349CONFIG_CRYPTO_CCM=m
350CONFIG_CRYPTO_GCM=m
351CONFIG_CRYPTO_ECB=m
352CONFIG_CRYPTO_PCBC=m 329CONFIG_CRYPTO_PCBC=m
353CONFIG_CRYPTO_HMAC=y 330CONFIG_CRYPTO_HMAC=y
354CONFIG_CRYPTO_MD4=m
355CONFIG_CRYPTO_MICHAEL_MIC=m 331CONFIG_CRYPTO_MICHAEL_MIC=m
356CONFIG_CRYPTO_SHA256=m
357CONFIG_CRYPTO_SHA512=m
358CONFIG_CRYPTO_TGR192=m 332CONFIG_CRYPTO_TGR192=m
359CONFIG_CRYPTO_WP512=m 333CONFIG_CRYPTO_WP512=m
360CONFIG_CRYPTO_AES=m
361CONFIG_CRYPTO_ANUBIS=m 334CONFIG_CRYPTO_ANUBIS=m
362CONFIG_CRYPTO_ARC4=m
363CONFIG_CRYPTO_BLOWFISH=m 335CONFIG_CRYPTO_BLOWFISH=m
364CONFIG_CRYPTO_CAST6=m 336CONFIG_CRYPTO_CAST6=m
365CONFIG_CRYPTO_KHAZAD=m 337CONFIG_CRYPTO_KHAZAD=m
@@ -369,7 +341,6 @@ CONFIG_CRYPTO_TEA=m
369CONFIG_CRYPTO_TWOFISH=m 341CONFIG_CRYPTO_TWOFISH=m
370CONFIG_CRYPTO_LZO=m 342CONFIG_CRYPTO_LZO=m
371# CONFIG_CRYPTO_ANSI_CPRNG is not set 343# CONFIG_CRYPTO_ANSI_CPRNG is not set
372CONFIG_CRYPTO_HW=y
373CONFIG_CRYPTO_DEV_NX=y 344CONFIG_CRYPTO_DEV_NX=y
374CONFIG_CRYPTO_DEV_NX_ENCRYPT=m 345CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
375CONFIG_VIRTUALIZATION=y 346CONFIG_VIRTUALIZATION=y
diff --git a/arch/powerpc/crypto/Makefile b/arch/powerpc/crypto/Makefile
new file mode 100644
index 000000000000..2926fb9c570a
--- /dev/null
+++ b/arch/powerpc/crypto/Makefile
@@ -0,0 +1,9 @@
1#
2# powerpc/crypto/Makefile
3#
4# Arch-specific CryptoAPI modules.
5#
6
7obj-$(CONFIG_CRYPTO_SHA1_PPC) += sha1-powerpc.o
8
9sha1-powerpc-y := sha1-powerpc-asm.o sha1.o
diff --git a/arch/powerpc/crypto/sha1-powerpc-asm.S b/arch/powerpc/crypto/sha1-powerpc-asm.S
new file mode 100644
index 000000000000..a5f8264d2d3c
--- /dev/null
+++ b/arch/powerpc/crypto/sha1-powerpc-asm.S
@@ -0,0 +1,179 @@
1/*
2 * SHA-1 implementation for PowerPC.
3 *
4 * Copyright (C) 2005 Paul Mackerras <paulus@samba.org>
5 */
6
7#include <asm/ppc_asm.h>
8#include <asm/asm-offsets.h>
9
10/*
11 * We roll the registers for T, A, B, C, D, E around on each
12 * iteration; T on iteration t is A on iteration t+1, and so on.
13 * We use registers 7 - 12 for this.
14 */
15#define RT(t) ((((t)+5)%6)+7)
16#define RA(t) ((((t)+4)%6)+7)
17#define RB(t) ((((t)+3)%6)+7)
18#define RC(t) ((((t)+2)%6)+7)
19#define RD(t) ((((t)+1)%6)+7)
20#define RE(t) ((((t)+0)%6)+7)
21
22/* We use registers 16 - 31 for the W values */
23#define W(t) (((t)%16)+16)
24
25#define LOADW(t) \
26 lwz W(t),(t)*4(r4)
27
28#define STEPD0_LOAD(t) \
29 andc r0,RD(t),RB(t); \
30 and r6,RB(t),RC(t); \
31 rotlwi RT(t),RA(t),5; \
32 or r6,r6,r0; \
33 add r0,RE(t),r15; \
34 add RT(t),RT(t),r6; \
35 add r14,r0,W(t); \
36 lwz W((t)+4),((t)+4)*4(r4); \
37 rotlwi RB(t),RB(t),30; \
38 add RT(t),RT(t),r14
39
40#define STEPD0_UPDATE(t) \
41 and r6,RB(t),RC(t); \
42 andc r0,RD(t),RB(t); \
43 rotlwi RT(t),RA(t),5; \
44 rotlwi RB(t),RB(t),30; \
45 or r6,r6,r0; \
46 add r0,RE(t),r15; \
47 xor r5,W((t)+4-3),W((t)+4-8); \
48 add RT(t),RT(t),r6; \
49 xor W((t)+4),W((t)+4-16),W((t)+4-14); \
50 add r0,r0,W(t); \
51 xor W((t)+4),W((t)+4),r5; \
52 add RT(t),RT(t),r0; \
53 rotlwi W((t)+4),W((t)+4),1
54
55#define STEPD1(t) \
56 xor r6,RB(t),RC(t); \
57 rotlwi RT(t),RA(t),5; \
58 rotlwi RB(t),RB(t),30; \
59 xor r6,r6,RD(t); \
60 add r0,RE(t),r15; \
61 add RT(t),RT(t),r6; \
62 add r0,r0,W(t); \
63 add RT(t),RT(t),r0
64
65#define STEPD1_UPDATE(t) \
66 xor r6,RB(t),RC(t); \
67 rotlwi RT(t),RA(t),5; \
68 rotlwi RB(t),RB(t),30; \
69 xor r6,r6,RD(t); \
70 add r0,RE(t),r15; \
71 xor r5,W((t)+4-3),W((t)+4-8); \
72 add RT(t),RT(t),r6; \
73 xor W((t)+4),W((t)+4-16),W((t)+4-14); \
74 add r0,r0,W(t); \
75 xor W((t)+4),W((t)+4),r5; \
76 add RT(t),RT(t),r0; \
77 rotlwi W((t)+4),W((t)+4),1
78
79#define STEPD2_UPDATE(t) \
80 and r6,RB(t),RC(t); \
81 and r0,RB(t),RD(t); \
82 rotlwi RT(t),RA(t),5; \
83 or r6,r6,r0; \
84 rotlwi RB(t),RB(t),30; \
85 and r0,RC(t),RD(t); \
86 xor r5,W((t)+4-3),W((t)+4-8); \
87 or r6,r6,r0; \
88 xor W((t)+4),W((t)+4-16),W((t)+4-14); \
89 add r0,RE(t),r15; \
90 add RT(t),RT(t),r6; \
91 add r0,r0,W(t); \
92 xor W((t)+4),W((t)+4),r5; \
93 add RT(t),RT(t),r0; \
94 rotlwi W((t)+4),W((t)+4),1
95
96#define STEP0LD4(t) \
97 STEPD0_LOAD(t); \
98 STEPD0_LOAD((t)+1); \
99 STEPD0_LOAD((t)+2); \
100 STEPD0_LOAD((t)+3)
101
102#define STEPUP4(t, fn) \
103 STEP##fn##_UPDATE(t); \
104 STEP##fn##_UPDATE((t)+1); \
105 STEP##fn##_UPDATE((t)+2); \
106 STEP##fn##_UPDATE((t)+3)
107
108#define STEPUP20(t, fn) \
109 STEPUP4(t, fn); \
110 STEPUP4((t)+4, fn); \
111 STEPUP4((t)+8, fn); \
112 STEPUP4((t)+12, fn); \
113 STEPUP4((t)+16, fn)
114
115_GLOBAL(powerpc_sha_transform)
116 PPC_STLU r1,-STACKFRAMESIZE(r1)
117 SAVE_8GPRS(14, r1)
118 SAVE_10GPRS(22, r1)
119
120 /* Load up A - E */
121 lwz RA(0),0(r3) /* A */
122 lwz RB(0),4(r3) /* B */
123 lwz RC(0),8(r3) /* C */
124 lwz RD(0),12(r3) /* D */
125 lwz RE(0),16(r3) /* E */
126
127 LOADW(0)
128 LOADW(1)
129 LOADW(2)
130 LOADW(3)
131
132 lis r15,0x5a82 /* K0-19 */
133 ori r15,r15,0x7999
134 STEP0LD4(0)
135 STEP0LD4(4)
136 STEP0LD4(8)
137 STEPUP4(12, D0)
138 STEPUP4(16, D0)
139
140 lis r15,0x6ed9 /* K20-39 */
141 ori r15,r15,0xeba1
142 STEPUP20(20, D1)
143
144 lis r15,0x8f1b /* K40-59 */
145 ori r15,r15,0xbcdc
146 STEPUP20(40, D2)
147
148 lis r15,0xca62 /* K60-79 */
149 ori r15,r15,0xc1d6
150 STEPUP4(60, D1)
151 STEPUP4(64, D1)
152 STEPUP4(68, D1)
153 STEPUP4(72, D1)
154 lwz r20,16(r3)
155 STEPD1(76)
156 lwz r19,12(r3)
157 STEPD1(77)
158 lwz r18,8(r3)
159 STEPD1(78)
160 lwz r17,4(r3)
161 STEPD1(79)
162
163 lwz r16,0(r3)
164 add r20,RE(80),r20
165 add RD(0),RD(80),r19
166 add RC(0),RC(80),r18
167 add RB(0),RB(80),r17
168 add RA(0),RA(80),r16
169 mr RE(0),r20
170 stw RA(0),0(r3)
171 stw RB(0),4(r3)
172 stw RC(0),8(r3)
173 stw RD(0),12(r3)
174 stw RE(0),16(r3)
175
176 REST_8GPRS(14, r1)
177 REST_10GPRS(22, r1)
178 addi r1,r1,STACKFRAMESIZE
179 blr
diff --git a/arch/powerpc/crypto/sha1.c b/arch/powerpc/crypto/sha1.c
new file mode 100644
index 000000000000..f9e8b9491efc
--- /dev/null
+++ b/arch/powerpc/crypto/sha1.c
@@ -0,0 +1,157 @@
1/*
2 * Cryptographic API.
3 *
4 * powerpc implementation of the SHA1 Secure Hash Algorithm.
5 *
6 * Derived from cryptoapi implementation, adapted for in-place
7 * scatterlist interface.
8 *
9 * Derived from "crypto/sha1.c"
10 * Copyright (c) Alan Smithee.
11 * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
12 * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 */
20#include <crypto/internal/hash.h>
21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/mm.h>
24#include <linux/cryptohash.h>
25#include <linux/types.h>
26#include <crypto/sha.h>
27#include <asm/byteorder.h>
28
29extern void powerpc_sha_transform(u32 *state, const u8 *src, u32 *temp);
30
31static int sha1_init(struct shash_desc *desc)
32{
33 struct sha1_state *sctx = shash_desc_ctx(desc);
34
35 *sctx = (struct sha1_state){
36 .state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 },
37 };
38
39 return 0;
40}
41
42static int sha1_update(struct shash_desc *desc, const u8 *data,
43 unsigned int len)
44{
45 struct sha1_state *sctx = shash_desc_ctx(desc);
46 unsigned int partial, done;
47 const u8 *src;
48
49 partial = sctx->count & 0x3f;
50 sctx->count += len;
51 done = 0;
52 src = data;
53
54 if ((partial + len) > 63) {
55 u32 temp[SHA_WORKSPACE_WORDS];
56
57 if (partial) {
58 done = -partial;
59 memcpy(sctx->buffer + partial, data, done + 64);
60 src = sctx->buffer;
61 }
62
63 do {
64 powerpc_sha_transform(sctx->state, src, temp);
65 done += 64;
66 src = data + done;
67 } while (done + 63 < len);
68
69 memset(temp, 0, sizeof(temp));
70 partial = 0;
71 }
72 memcpy(sctx->buffer + partial, src, len - done);
73
74 return 0;
75}
76
77
78/* Add padding and return the message digest. */
79static int sha1_final(struct shash_desc *desc, u8 *out)
80{
81 struct sha1_state *sctx = shash_desc_ctx(desc);
82 __be32 *dst = (__be32 *)out;
83 u32 i, index, padlen;
84 __be64 bits;
85 static const u8 padding[64] = { 0x80, };
86
87 bits = cpu_to_be64(sctx->count << 3);
88
89 /* Pad out to 56 mod 64 */
90 index = sctx->count & 0x3f;
91 padlen = (index < 56) ? (56 - index) : ((64+56) - index);
92 sha1_update(desc, padding, padlen);
93
94 /* Append length */
95 sha1_update(desc, (const u8 *)&bits, sizeof(bits));
96
97 /* Store state in digest */
98 for (i = 0; i < 5; i++)
99 dst[i] = cpu_to_be32(sctx->state[i]);
100
101 /* Wipe context */
102 memset(sctx, 0, sizeof *sctx);
103
104 return 0;
105}
106
107static int sha1_export(struct shash_desc *desc, void *out)
108{
109 struct sha1_state *sctx = shash_desc_ctx(desc);
110
111 memcpy(out, sctx, sizeof(*sctx));
112 return 0;
113}
114
115static int sha1_import(struct shash_desc *desc, const void *in)
116{
117 struct sha1_state *sctx = shash_desc_ctx(desc);
118
119 memcpy(sctx, in, sizeof(*sctx));
120 return 0;
121}
122
123static struct shash_alg alg = {
124 .digestsize = SHA1_DIGEST_SIZE,
125 .init = sha1_init,
126 .update = sha1_update,
127 .final = sha1_final,
128 .export = sha1_export,
129 .import = sha1_import,
130 .descsize = sizeof(struct sha1_state),
131 .statesize = sizeof(struct sha1_state),
132 .base = {
133 .cra_name = "sha1",
134 .cra_driver_name= "sha1-powerpc",
135 .cra_flags = CRYPTO_ALG_TYPE_SHASH,
136 .cra_blocksize = SHA1_BLOCK_SIZE,
137 .cra_module = THIS_MODULE,
138 }
139};
140
141static int __init sha1_powerpc_mod_init(void)
142{
143 return crypto_register_shash(&alg);
144}
145
146static void __exit sha1_powerpc_mod_fini(void)
147{
148 crypto_unregister_shash(&alg);
149}
150
151module_init(sha1_powerpc_mod_init);
152module_exit(sha1_powerpc_mod_fini);
153
154MODULE_LICENSE("GPL");
155MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm");
156
157MODULE_ALIAS("sha1-powerpc");
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 76f81bd64f1d..fb3245e928ea 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -106,37 +106,37 @@ extern const char *powerpc_base_platform;
106/* CPU kernel features */ 106/* CPU kernel features */
107 107
108/* Retain the 32b definitions all use bottom half of word */ 108/* Retain the 32b definitions all use bottom half of word */
109#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000000000000001) 109#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x00000001)
110#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002) 110#define CPU_FTR_L2CR ASM_CONST(0x00000002)
111#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004) 111#define CPU_FTR_SPEC7450 ASM_CONST(0x00000004)
112#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008) 112#define CPU_FTR_ALTIVEC ASM_CONST(0x00000008)
113#define CPU_FTR_TAU ASM_CONST(0x0000000000000010) 113#define CPU_FTR_TAU ASM_CONST(0x00000010)
114#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020) 114#define CPU_FTR_CAN_DOZE ASM_CONST(0x00000020)
115#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) 115#define CPU_FTR_USE_TB ASM_CONST(0x00000040)
116#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080) 116#define CPU_FTR_L2CSR ASM_CONST(0x00000080)
117#define CPU_FTR_601 ASM_CONST(0x0000000000000100) 117#define CPU_FTR_601 ASM_CONST(0x00000100)
118#define CPU_FTR_DBELL ASM_CONST(0x0000000000000200) 118#define CPU_FTR_DBELL ASM_CONST(0x00000200)
119#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) 119#define CPU_FTR_CAN_NAP ASM_CONST(0x00000400)
120#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) 120#define CPU_FTR_L3CR ASM_CONST(0x00000800)
121#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) 121#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x00001000)
122#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) 122#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x00002000)
123#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) 123#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x00004000)
124#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) 124#define CPU_FTR_NO_DPM ASM_CONST(0x00008000)
125#define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000) 125#define CPU_FTR_476_DD2 ASM_CONST(0x00010000)
126#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) 126#define CPU_FTR_NEED_COHERENT ASM_CONST(0x00020000)
127#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) 127#define CPU_FTR_NO_BTIC ASM_CONST(0x00040000)
128#define CPU_FTR_DEBUG_LVL_EXC ASM_CONST(0x0000000000080000) 128#define CPU_FTR_DEBUG_LVL_EXC ASM_CONST(0x00080000)
129#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) 129#define CPU_FTR_NODSISRALIGN ASM_CONST(0x00100000)
130#define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) 130#define CPU_FTR_PPC_LE ASM_CONST(0x00200000)
131#define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) 131#define CPU_FTR_REAL_LE ASM_CONST(0x00400000)
132#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000) 132#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x00800000)
133#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x0000000001000000) 133#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x01000000)
134#define CPU_FTR_SPE ASM_CONST(0x0000000002000000) 134#define CPU_FTR_SPE ASM_CONST(0x02000000)
135#define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x0000000004000000) 135#define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x04000000)
136#define CPU_FTR_LWSYNC ASM_CONST(0x0000000008000000) 136#define CPU_FTR_LWSYNC ASM_CONST(0x08000000)
137#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000010000000) 137#define CPU_FTR_NOEXECUTE ASM_CONST(0x10000000)
138#define CPU_FTR_INDEXED_DCR ASM_CONST(0x0000000020000000) 138#define CPU_FTR_INDEXED_DCR ASM_CONST(0x20000000)
139#define CPU_FTR_EMB_HV ASM_CONST(0x0000000040000000) 139#define CPU_FTR_EMB_HV ASM_CONST(0x40000000)
140 140
141/* 141/*
142 * Add the 64-bit processor unique features in the top half of the word; 142 * Add the 64-bit processor unique features in the top half of the word;
@@ -148,29 +148,33 @@ extern const char *powerpc_base_platform;
148#define LONG_ASM_CONST(x) 0 148#define LONG_ASM_CONST(x) 0
149#endif 149#endif
150 150
151#define CPU_FTR_HVMODE LONG_ASM_CONST(0x0000000200000000) 151#define CPU_FTR_HVMODE LONG_ASM_CONST(0x0000000100000000)
152#define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000400000000) 152#define CPU_FTR_ARCH_201 LONG_ASM_CONST(0x0000000200000000)
153#define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000800000000) 153#define CPU_FTR_ARCH_206 LONG_ASM_CONST(0x0000000400000000)
154#define CPU_FTR_CFAR LONG_ASM_CONST(0x0000001000000000) 154#define CPU_FTR_CFAR LONG_ASM_CONST(0x0000000800000000)
155#define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000) 155#define CPU_FTR_IABR LONG_ASM_CONST(0x0000001000000000)
156#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000) 156#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000002000000000)
157#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000) 157#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000004000000000)
158#define CPU_FTR_SMT LONG_ASM_CONST(0x0000010000000000) 158#define CPU_FTR_SMT LONG_ASM_CONST(0x0000008000000000)
159#define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) 159#define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000010000000000)
160#define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000) 160#define CPU_FTR_PURR LONG_ASM_CONST(0x0000020000000000)
161#define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000) 161#define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000040000000000)
162#define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000) 162#define CPU_FTR_SPURR LONG_ASM_CONST(0x0000080000000000)
163#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000) 163#define CPU_FTR_DSCR LONG_ASM_CONST(0x0000100000000000)
164#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) 164#define CPU_FTR_VSX LONG_ASM_CONST(0x0000200000000000)
165#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) 165#define CPU_FTR_SAO LONG_ASM_CONST(0x0000400000000000)
166#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000) 166#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0000800000000000)
167#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0080000000000000) 167#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0001000000000000)
168#define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0100000000000000) 168#define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0002000000000000)
169#define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0200000000000000) 169#define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0004000000000000)
170#define CPU_FTR_POPCNTB LONG_ASM_CONST(0x0400000000000000) 170#define CPU_FTR_POPCNTB LONG_ASM_CONST(0x0008000000000000)
171#define CPU_FTR_POPCNTD LONG_ASM_CONST(0x0800000000000000) 171#define CPU_FTR_POPCNTD LONG_ASM_CONST(0x0010000000000000)
172#define CPU_FTR_ICSWX LONG_ASM_CONST(0x1000000000000000) 172#define CPU_FTR_ICSWX LONG_ASM_CONST(0x0020000000000000)
173#define CPU_FTR_VMX_COPY LONG_ASM_CONST(0x2000000000000000) 173#define CPU_FTR_VMX_COPY LONG_ASM_CONST(0x0040000000000000)
174#define CPU_FTR_TM LONG_ASM_CONST(0x0080000000000000)
175#define CPU_FTR_BCTAR LONG_ASM_CONST(0x0100000000000000)
176#define CPU_FTR_HAS_PPR LONG_ASM_CONST(0x0200000000000000)
177#define CPU_FTR_DAWR LONG_ASM_CONST(0x0400000000000000)
174 178
175#ifndef __ASSEMBLY__ 179#ifndef __ASSEMBLY__
176 180
@@ -216,6 +220,13 @@ extern const char *powerpc_base_platform;
216#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0 220#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0
217#endif 221#endif
218 222
223/* We only set the TM feature if the kernel was compiled with TM supprt */
224#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
225#define CPU_FTR_TM_COMP CPU_FTR_TM
226#else
227#define CPU_FTR_TM_COMP 0
228#endif
229
219/* We need to mark all pages as being coherent if we're SMP or we have a 230/* We need to mark all pages as being coherent if we're SMP or we have a
220 * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II 231 * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
221 * require it for PCI "streaming/prefetch" to work properly. 232 * require it for PCI "streaming/prefetch" to work properly.
@@ -400,7 +411,8 @@ extern const char *powerpc_base_platform;
400 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 411 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
401 CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \ 412 CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \
402 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ 413 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
403 CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY) 414 CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | \
415 CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR)
404#define CPU_FTRS_POWER8 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 416#define CPU_FTRS_POWER8 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
405 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\ 417 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\
406 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 418 CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -408,7 +420,9 @@ extern const char *powerpc_base_platform;
408 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 420 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
409 CPU_FTR_DSCR | CPU_FTR_SAO | \ 421 CPU_FTR_DSCR | CPU_FTR_SAO | \
410 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ 422 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
411 CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY) 423 CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
424 CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | CPU_FTR_BCTAR | \
425 CPU_FTR_TM_COMP)
412#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 426#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
413 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 427 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
414 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 428 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h
index 607e4eeeb694..5fa6b20eba10 100644
--- a/arch/powerpc/include/asm/dbell.h
+++ b/arch/powerpc/include/asm/dbell.h
@@ -28,8 +28,36 @@ enum ppc_dbell {
28 PPC_G_DBELL = 2, /* guest doorbell */ 28 PPC_G_DBELL = 2, /* guest doorbell */
29 PPC_G_DBELL_CRIT = 3, /* guest critical doorbell */ 29 PPC_G_DBELL_CRIT = 3, /* guest critical doorbell */
30 PPC_G_DBELL_MC = 4, /* guest mcheck doorbell */ 30 PPC_G_DBELL_MC = 4, /* guest mcheck doorbell */
31 PPC_DBELL_SERVER = 5, /* doorbell on server */
31}; 32};
32 33
34#ifdef CONFIG_PPC_BOOK3S
35
36#define PPC_DBELL_MSGTYPE PPC_DBELL_SERVER
37#define SPRN_DOORBELL_CPUTAG SPRN_TIR
38#define PPC_DBELL_TAG_MASK 0x7f
39
40static inline void _ppc_msgsnd(u32 msg)
41{
42 if (cpu_has_feature(CPU_FTR_HVMODE))
43 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
44 else
45 __asm__ __volatile__ (PPC_MSGSNDP(%0) : : "r" (msg));
46}
47
48#else /* CONFIG_PPC_BOOK3S */
49
50#define PPC_DBELL_MSGTYPE PPC_DBELL
51#define SPRN_DOORBELL_CPUTAG SPRN_PIR
52#define PPC_DBELL_TAG_MASK 0x3fff
53
54static inline void _ppc_msgsnd(u32 msg)
55{
56 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
57}
58
59#endif /* CONFIG_PPC_BOOK3S */
60
33extern void doorbell_cause_ipi(int cpu, unsigned long data); 61extern void doorbell_cause_ipi(int cpu, unsigned long data);
34extern void doorbell_exception(struct pt_regs *regs); 62extern void doorbell_exception(struct pt_regs *regs);
35extern void doorbell_setup_this_cpu(void); 63extern void doorbell_setup_this_cpu(void);
@@ -39,7 +67,7 @@ static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag)
39 u32 msg = PPC_DBELL_TYPE(type) | (flags & PPC_DBELL_MSG_BRDCAST) | 67 u32 msg = PPC_DBELL_TYPE(type) | (flags & PPC_DBELL_MSG_BRDCAST) |
40 (tag & 0x07ffffff); 68 (tag & 0x07ffffff);
41 69
42 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 70 _ppc_msgsnd(msg);
43} 71}
44 72
45#endif /* _ASM_POWERPC_DBELL_H */ 73#endif /* _ASM_POWERPC_DBELL_H */
diff --git a/arch/powerpc/include/asm/debug.h b/arch/powerpc/include/asm/debug.h
index 32de2577bb6d..d2516308ed1e 100644
--- a/arch/powerpc/include/asm/debug.h
+++ b/arch/powerpc/include/asm/debug.h
@@ -4,6 +4,8 @@
4#ifndef _ASM_POWERPC_DEBUG_H 4#ifndef _ASM_POWERPC_DEBUG_H
5#define _ASM_POWERPC_DEBUG_H 5#define _ASM_POWERPC_DEBUG_H
6 6
7#include <asm/hw_breakpoint.h>
8
7struct pt_regs; 9struct pt_regs;
8 10
9extern struct dentry *powerpc_debugfs_root; 11extern struct dentry *powerpc_debugfs_root;
@@ -15,7 +17,7 @@ extern int (*__debugger_ipi)(struct pt_regs *regs);
15extern int (*__debugger_bpt)(struct pt_regs *regs); 17extern int (*__debugger_bpt)(struct pt_regs *regs);
16extern int (*__debugger_sstep)(struct pt_regs *regs); 18extern int (*__debugger_sstep)(struct pt_regs *regs);
17extern int (*__debugger_iabr_match)(struct pt_regs *regs); 19extern int (*__debugger_iabr_match)(struct pt_regs *regs);
18extern int (*__debugger_dabr_match)(struct pt_regs *regs); 20extern int (*__debugger_break_match)(struct pt_regs *regs);
19extern int (*__debugger_fault_handler)(struct pt_regs *regs); 21extern int (*__debugger_fault_handler)(struct pt_regs *regs);
20 22
21#define DEBUGGER_BOILERPLATE(__NAME) \ 23#define DEBUGGER_BOILERPLATE(__NAME) \
@@ -31,7 +33,7 @@ DEBUGGER_BOILERPLATE(debugger_ipi)
31DEBUGGER_BOILERPLATE(debugger_bpt) 33DEBUGGER_BOILERPLATE(debugger_bpt)
32DEBUGGER_BOILERPLATE(debugger_sstep) 34DEBUGGER_BOILERPLATE(debugger_sstep)
33DEBUGGER_BOILERPLATE(debugger_iabr_match) 35DEBUGGER_BOILERPLATE(debugger_iabr_match)
34DEBUGGER_BOILERPLATE(debugger_dabr_match) 36DEBUGGER_BOILERPLATE(debugger_break_match)
35DEBUGGER_BOILERPLATE(debugger_fault_handler) 37DEBUGGER_BOILERPLATE(debugger_fault_handler)
36 38
37#else 39#else
@@ -40,17 +42,18 @@ static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
40static inline int debugger_bpt(struct pt_regs *regs) { return 0; } 42static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
41static inline int debugger_sstep(struct pt_regs *regs) { return 0; } 43static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
42static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; } 44static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
43static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; } 45static inline int debugger_break_match(struct pt_regs *regs) { return 0; }
44static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; } 46static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
45#endif 47#endif
46 48
47extern int set_dabr(unsigned long dabr, unsigned long dabrx); 49int set_breakpoint(struct arch_hw_breakpoint *brk);
48#ifdef CONFIG_PPC_ADV_DEBUG_REGS 50#ifdef CONFIG_PPC_ADV_DEBUG_REGS
49extern void do_send_trap(struct pt_regs *regs, unsigned long address, 51extern void do_send_trap(struct pt_regs *regs, unsigned long address,
50 unsigned long error_code, int signal_code, int brkpt); 52 unsigned long error_code, int signal_code, int brkpt);
51#else 53#else
52extern void do_dabr(struct pt_regs *regs, unsigned long address, 54
53 unsigned long error_code); 55extern void do_break(struct pt_regs *regs, unsigned long address,
56 unsigned long error_code);
54#endif 57#endif
55 58
56#endif /* _ASM_POWERPC_DEBUG_H */ 59#endif /* _ASM_POWERPC_DEBUG_H */
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index a8fb03e22770..a80e32b46c11 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -201,6 +201,7 @@ int eeh_dev_check_failure(struct eeh_dev *edev);
201void __init eeh_addr_cache_build(void); 201void __init eeh_addr_cache_build(void);
202void eeh_add_device_tree_early(struct device_node *); 202void eeh_add_device_tree_early(struct device_node *);
203void eeh_add_device_tree_late(struct pci_bus *); 203void eeh_add_device_tree_late(struct pci_bus *);
204void eeh_add_sysfs_files(struct pci_bus *);
204void eeh_remove_bus_device(struct pci_dev *, int); 205void eeh_remove_bus_device(struct pci_dev *, int);
205 206
206/** 207/**
@@ -240,6 +241,8 @@ static inline void eeh_add_device_tree_early(struct device_node *dn) { }
240 241
241static inline void eeh_add_device_tree_late(struct pci_bus *bus) { } 242static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
242 243
244static inline void eeh_add_sysfs_files(struct pci_bus *bus) { }
245
243static inline void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe) { } 246static inline void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe) { }
244 247
245static inline void eeh_lock(void) { } 248static inline void eeh_lock(void) { }
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index ad708dda3ba3..05e6d2ee1db9 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -47,9 +47,10 @@
47#define EX_R3 64 47#define EX_R3 64
48#define EX_LR 72 48#define EX_LR 72
49#define EX_CFAR 80 49#define EX_CFAR 80
50#define EX_PPR 88 /* SMT thread status register (priority) */
50 51
51#ifdef CONFIG_RELOCATABLE 52#ifdef CONFIG_RELOCATABLE
52#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 53#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
53 ld r12,PACAKBASE(r13); /* get high part of &label */ \ 54 ld r12,PACAKBASE(r13); /* get high part of &label */ \
54 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 55 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
55 LOAD_HANDLER(r12,label); \ 56 LOAD_HANDLER(r12,label); \
@@ -60,13 +61,15 @@
60 blr; 61 blr;
61#else 62#else
62/* If not relocatable, we can jump directly -- and save messing with LR */ 63/* If not relocatable, we can jump directly -- and save messing with LR */
63#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ 64#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
64 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ 65 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
65 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ 66 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
66 li r10,MSR_RI; \ 67 li r10,MSR_RI; \
67 mtmsrd r10,1; /* Set RI (EE=0) */ \ 68 mtmsrd r10,1; /* Set RI (EE=0) */ \
68 b label; 69 b label;
69#endif 70#endif
71#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
72 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
70 73
71/* 74/*
72 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on 75 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
@@ -74,6 +77,7 @@
74 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. 77 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
75 */ 78 */
76#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \ 79#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
80 EXCEPTION_PROLOG_0(area); \
77 EXCEPTION_PROLOG_1(area, extra, vec); \ 81 EXCEPTION_PROLOG_1(area, extra, vec); \
78 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) 82 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
79 83
@@ -107,14 +111,59 @@
107#define RESTORE_LR(reg, area) 111#define RESTORE_LR(reg, area)
108#endif 112#endif
109 113
110#define __EXCEPTION_PROLOG_1(area, extra, vec) \ 114/*
115 * PPR save/restore macros used in exceptions_64s.S
116 * Used for P7 or later processors
117 */
118#define SAVE_PPR(area, ra, rb) \
119BEGIN_FTR_SECTION_NESTED(940) \
120 ld ra,PACACURRENT(r13); \
121 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
122 std rb,TASKTHREADPPR(ra); \
123END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
124
125#define RESTORE_PPR_PACA(area, ra) \
126BEGIN_FTR_SECTION_NESTED(941) \
127 ld ra,area+EX_PPR(r13); \
128 mtspr SPRN_PPR,ra; \
129END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
130
131/*
132 * Increase the priority on systems where PPR save/restore is not
133 * implemented/ supported.
134 */
135#define HMT_MEDIUM_PPR_DISCARD \
136BEGIN_FTR_SECTION_NESTED(942) \
137 HMT_MEDIUM; \
138END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/
139
140/*
141 * Get an SPR into a register if the CPU has the given feature
142 */
143#define OPT_GET_SPR(ra, spr, ftr) \
144BEGIN_FTR_SECTION_NESTED(943) \
145 mfspr ra,spr; \
146END_FTR_SECTION_NESTED(ftr,ftr,943)
147
148/*
149 * Save a register to the PACA if the CPU has the given feature
150 */
151#define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
152BEGIN_FTR_SECTION_NESTED(943) \
153 std ra,offset(r13); \
154END_FTR_SECTION_NESTED(ftr,ftr,943)
155
156#define EXCEPTION_PROLOG_0(area) \
111 GET_PACA(r13); \ 157 GET_PACA(r13); \
112 std r9,area+EX_R9(r13); /* save r9 - r12 */ \ 158 std r9,area+EX_R9(r13); /* save r9 */ \
113 std r10,area+EX_R10(r13); \ 159 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
114 BEGIN_FTR_SECTION_NESTED(66); \ 160 HMT_MEDIUM; \
115 mfspr r10,SPRN_CFAR; \ 161 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
116 std r10,area+EX_CFAR(r13); \ 162 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
117 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \ 163
164#define __EXCEPTION_PROLOG_1(area, extra, vec) \
165 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
166 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
118 SAVE_LR(r10, area); \ 167 SAVE_LR(r10, area); \
119 mfcr r9; \ 168 mfcr r9; \
120 extra(vec); \ 169 extra(vec); \
@@ -139,6 +188,7 @@
139 __EXCEPTION_PROLOG_PSERIES_1(label, h) 188 __EXCEPTION_PROLOG_PSERIES_1(label, h)
140 189
141#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \ 190#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
191 EXCEPTION_PROLOG_0(area); \
142 EXCEPTION_PROLOG_1(area, extra, vec); \ 192 EXCEPTION_PROLOG_1(area, extra, vec); \
143 EXCEPTION_PROLOG_PSERIES_1(label, h); 193 EXCEPTION_PROLOG_PSERIES_1(label, h);
144 194
@@ -149,10 +199,14 @@
149 199
150#define __KVM_HANDLER(area, h, n) \ 200#define __KVM_HANDLER(area, h, n) \
151do_kvm_##n: \ 201do_kvm_##n: \
202 BEGIN_FTR_SECTION_NESTED(947) \
203 ld r10,area+EX_CFAR(r13); \
204 std r10,HSTATE_CFAR(r13); \
205 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
152 ld r10,area+EX_R10(r13); \ 206 ld r10,area+EX_R10(r13); \
153 stw r9,HSTATE_SCRATCH1(r13); \ 207 stw r9,HSTATE_SCRATCH1(r13); \
154 ld r9,area+EX_R9(r13); \ 208 ld r9,area+EX_R9(r13); \
155 std r12,HSTATE_SCRATCH0(r13); \ 209 std r12,HSTATE_SCRATCH0(r13); \
156 li r12,n; \ 210 li r12,n; \
157 b kvmppc_interrupt 211 b kvmppc_interrupt
158 212
@@ -224,8 +278,10 @@ do_kvm_##n: \
224 std r10,0(r1); /* make stack chain pointer */ \ 278 std r10,0(r1); /* make stack chain pointer */ \
225 std r0,GPR0(r1); /* save r0 in stackframe */ \ 279 std r0,GPR0(r1); /* save r0 in stackframe */ \
226 std r10,GPR1(r1); /* save r1 in stackframe */ \ 280 std r10,GPR1(r1); /* save r1 in stackframe */ \
281 beq 4f; /* if from kernel mode */ \
227 ACCOUNT_CPU_USER_ENTRY(r9, r10); \ 282 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
228 std r2,GPR2(r1); /* save r2 in stackframe */ \ 283 SAVE_PPR(area, r9, r10); \
2844: std r2,GPR2(r1); /* save r2 in stackframe */ \
229 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ 285 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
230 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ 286 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
231 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ 287 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
@@ -266,45 +322,74 @@ do_kvm_##n: \
266 . = loc; \ 322 . = loc; \
267 .globl label##_pSeries; \ 323 .globl label##_pSeries; \
268label##_pSeries: \ 324label##_pSeries: \
269 HMT_MEDIUM; \ 325 HMT_MEDIUM_PPR_DISCARD; \
270 SET_SCRATCH0(r13); /* save r13 */ \ 326 SET_SCRATCH0(r13); /* save r13 */ \
271 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 327 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
272 EXC_STD, KVMTEST_PR, vec) 328 EXC_STD, KVMTEST_PR, vec)
273 329
330/* Version of above for when we have to branch out-of-line */
331#define STD_EXCEPTION_PSERIES_OOL(vec, label) \
332 .globl label##_pSeries; \
333label##_pSeries: \
334 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
335 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD)
336
274#define STD_EXCEPTION_HV(loc, vec, label) \ 337#define STD_EXCEPTION_HV(loc, vec, label) \
275 . = loc; \ 338 . = loc; \
276 .globl label##_hv; \ 339 .globl label##_hv; \
277label##_hv: \ 340label##_hv: \
278 HMT_MEDIUM; \ 341 HMT_MEDIUM_PPR_DISCARD; \
279 SET_SCRATCH0(r13); /* save r13 */ \ 342 SET_SCRATCH0(r13); /* save r13 */ \
280 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 343 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
281 EXC_HV, KVMTEST, vec) 344 EXC_HV, KVMTEST, vec)
282 345
346/* Version of above for when we have to branch out-of-line */
347#define STD_EXCEPTION_HV_OOL(vec, label) \
348 .globl label##_hv; \
349label##_hv: \
350 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
351 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV)
352
283#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \ 353#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
284 . = loc; \ 354 . = loc; \
285 .globl label##_relon_pSeries; \ 355 .globl label##_relon_pSeries; \
286label##_relon_pSeries: \ 356label##_relon_pSeries: \
287 HMT_MEDIUM; \ 357 HMT_MEDIUM_PPR_DISCARD; \
288 /* No guest interrupts come through here */ \ 358 /* No guest interrupts come through here */ \
289 SET_SCRATCH0(r13); /* save r13 */ \ 359 SET_SCRATCH0(r13); /* save r13 */ \
290 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 360 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
291 EXC_STD, KVMTEST_PR, vec) 361 EXC_STD, KVMTEST_PR, vec)
292 362
363#define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
364 .globl label##_relon_pSeries; \
365label##_relon_pSeries: \
366 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
367 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD)
368
293#define STD_RELON_EXCEPTION_HV(loc, vec, label) \ 369#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
294 . = loc; \ 370 . = loc; \
295 .globl label##_relon_hv; \ 371 .globl label##_relon_hv; \
296label##_relon_hv: \ 372label##_relon_hv: \
297 HMT_MEDIUM; \ 373 HMT_MEDIUM_PPR_DISCARD; \
298 /* No guest interrupts come through here */ \ 374 /* No guest interrupts come through here */ \
299 SET_SCRATCH0(r13); /* save r13 */ \ 375 SET_SCRATCH0(r13); /* save r13 */ \
300 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ 376 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
301 EXC_HV, KVMTEST, vec) 377 EXC_HV, KVMTEST, vec)
302 378
379#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
380 .globl label##_relon_hv; \
381label##_relon_hv: \
382 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
383 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV)
384
303/* This associate vector numbers with bits in paca->irq_happened */ 385/* This associate vector numbers with bits in paca->irq_happened */
304#define SOFTEN_VALUE_0x500 PACA_IRQ_EE 386#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
305#define SOFTEN_VALUE_0x502 PACA_IRQ_EE 387#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
306#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC 388#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
307#define SOFTEN_VALUE_0x982 PACA_IRQ_DEC 389#define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
390#define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
391#define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
392#define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL
308 393
309#define __SOFTEN_TEST(h, vec) \ 394#define __SOFTEN_TEST(h, vec) \
310 lbz r10,PACASOFTIRQEN(r13); \ 395 lbz r10,PACASOFTIRQEN(r13); \
@@ -329,10 +414,12 @@ label##_relon_hv: \
329#define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec) 414#define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
330 415
331#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 416#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
332 HMT_MEDIUM; \ 417 HMT_MEDIUM_PPR_DISCARD; \
333 SET_SCRATCH0(r13); /* save r13 */ \ 418 SET_SCRATCH0(r13); /* save r13 */ \
334 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 419 EXCEPTION_PROLOG_0(PACA_EXGEN); \
420 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
335 EXCEPTION_PROLOG_PSERIES_1(label##_common, h); 421 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
422
336#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \ 423#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
337 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) 424 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
338 425
@@ -350,9 +437,16 @@ label##_hv: \
350 _MASKABLE_EXCEPTION_PSERIES(vec, label, \ 437 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
351 EXC_HV, SOFTEN_TEST_HV) 438 EXC_HV, SOFTEN_TEST_HV)
352 439
440#define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
441 .globl label##_hv; \
442label##_hv: \
443 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
444 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
445
353#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 446#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
354 HMT_MEDIUM; \ 447 HMT_MEDIUM_PPR_DISCARD; \
355 SET_SCRATCH0(r13); /* save r13 */ \ 448 SET_SCRATCH0(r13); /* save r13 */ \
449 EXCEPTION_PROLOG_0(PACA_EXGEN); \
356 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \ 450 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
357 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h); 451 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
358#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \ 452#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
@@ -372,6 +466,12 @@ label##_relon_hv: \
372 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \ 466 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
373 EXC_HV, SOFTEN_NOTEST_HV) 467 EXC_HV, SOFTEN_NOTEST_HV)
374 468
469#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
470 .globl label##_relon_hv; \
471label##_relon_hv: \
472 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \
473 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
474
375/* 475/*
376 * Our exception common code can be passed various "additions" 476 * Our exception common code can be passed various "additions"
377 * to specify the behaviour of interrupts, whether to kick the 477 * to specify the behaviour of interrupts, whether to kick the
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 973cc3be011b..097dee57a7a9 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -50,6 +50,7 @@
50#define FW_FEATURE_OPAL ASM_CONST(0x0000000010000000) 50#define FW_FEATURE_OPAL ASM_CONST(0x0000000010000000)
51#define FW_FEATURE_OPALv2 ASM_CONST(0x0000000020000000) 51#define FW_FEATURE_OPALv2 ASM_CONST(0x0000000020000000)
52#define FW_FEATURE_SET_MODE ASM_CONST(0x0000000040000000) 52#define FW_FEATURE_SET_MODE ASM_CONST(0x0000000040000000)
53#define FW_FEATURE_BEST_ENERGY ASM_CONST(0x0000000080000000)
53 54
54#ifndef __ASSEMBLY__ 55#ifndef __ASSEMBLY__
55 56
@@ -64,7 +65,7 @@ enum {
64 FW_FEATURE_BULK_REMOVE | FW_FEATURE_XDABR | 65 FW_FEATURE_BULK_REMOVE | FW_FEATURE_XDABR |
65 FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR | 66 FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR |
66 FW_FEATURE_CMO | FW_FEATURE_VPHN | FW_FEATURE_XCMO | 67 FW_FEATURE_CMO | FW_FEATURE_VPHN | FW_FEATURE_XCMO |
67 FW_FEATURE_SET_MODE, 68 FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY,
68 FW_FEATURE_PSERIES_ALWAYS = 0, 69 FW_FEATURE_PSERIES_ALWAYS = 0,
69 FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2, 70 FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2,
70 FW_FEATURE_POWERNV_ALWAYS = 0, 71 FW_FEATURE_POWERNV_ALWAYS = 0,
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index 0975e5c0bb19..4bc2c3dad6ad 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -395,6 +395,15 @@ static inline unsigned long cmo_get_page_size(void)
395{ 395{
396 return CMO_PageSize; 396 return CMO_PageSize;
397} 397}
398
399extern long pSeries_enable_reloc_on_exc(void);
400extern long pSeries_disable_reloc_on_exc(void);
401
402#else
403
404#define pSeries_enable_reloc_on_exc() do {} while (0)
405#define pSeries_disable_reloc_on_exc() do {} while (0)
406
398#endif /* CONFIG_PPC_PSERIES */ 407#endif /* CONFIG_PPC_PSERIES */
399 408
400#endif /* __ASSEMBLY__ */ 409#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index 423424599dad..eb0f4ac75c4c 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -24,16 +24,30 @@
24#define _PPC_BOOK3S_64_HW_BREAKPOINT_H 24#define _PPC_BOOK3S_64_HW_BREAKPOINT_H
25 25
26#ifdef __KERNEL__ 26#ifdef __KERNEL__
27#ifdef CONFIG_HAVE_HW_BREAKPOINT
28
29struct arch_hw_breakpoint { 27struct arch_hw_breakpoint {
30 unsigned long address; 28 unsigned long address;
31 unsigned long dabrx; 29 u16 type;
32 int type; 30 u16 len; /* length of the target data symbol */
33 u8 len; /* length of the target data symbol */
34 bool extraneous_interrupt;
35}; 31};
36 32
33/* Note: Don't change the the first 6 bits below as they are in the same order
34 * as the dabr and dabrx.
35 */
36#define HW_BRK_TYPE_READ 0x01
37#define HW_BRK_TYPE_WRITE 0x02
38#define HW_BRK_TYPE_TRANSLATE 0x04
39#define HW_BRK_TYPE_USER 0x08
40#define HW_BRK_TYPE_KERNEL 0x10
41#define HW_BRK_TYPE_HYP 0x20
42#define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80
43
44/* bits that overlap with the bottom 3 bits of the dabr */
45#define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)
46#define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE)
47#define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \
48 HW_BRK_TYPE_HYP)
49
50#ifdef CONFIG_HAVE_HW_BREAKPOINT
37#include <linux/kdebug.h> 51#include <linux/kdebug.h>
38#include <asm/reg.h> 52#include <asm/reg.h>
39#include <asm/debug.h> 53#include <asm/debug.h>
@@ -43,8 +57,6 @@ struct pmu;
43struct perf_sample_data; 57struct perf_sample_data;
44 58
45#define HW_BREAKPOINT_ALIGN 0x7 59#define HW_BREAKPOINT_ALIGN 0x7
46/* Maximum permissible length of any HW Breakpoint */
47#define HW_BREAKPOINT_LEN 0x8
48 60
49extern int hw_breakpoint_slots(int type); 61extern int hw_breakpoint_slots(int type);
50extern int arch_bp_generic_fields(int type, int *gen_bp_type); 62extern int arch_bp_generic_fields(int type, int *gen_bp_type);
@@ -62,7 +74,12 @@ extern void ptrace_triggered(struct perf_event *bp,
62 struct perf_sample_data *data, struct pt_regs *regs); 74 struct perf_sample_data *data, struct pt_regs *regs);
63static inline void hw_breakpoint_disable(void) 75static inline void hw_breakpoint_disable(void)
64{ 76{
65 set_dabr(0, 0); 77 struct arch_hw_breakpoint brk;
78
79 brk.address = 0;
80 brk.type = 0;
81 brk.len = 0;
82 set_breakpoint(&brk);
66} 83}
67extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs); 84extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs);
68 85
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 88609b23b775..cdc3d2717cc6 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -93,6 +93,9 @@ struct kvmppc_host_state {
93 u64 host_dscr; 93 u64 host_dscr;
94 u64 dec_expires; 94 u64 dec_expires;
95#endif 95#endif
96#ifdef CONFIG_PPC_BOOK3S_64
97 u64 cfar;
98#endif
96}; 99};
97 100
98struct kvmppc_book3s_shadow_vcpu { 101struct kvmppc_book3s_shadow_vcpu {
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index ca9bf459db6a..03d7beae89a0 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -440,6 +440,7 @@ struct kvm_vcpu_arch {
440 ulong uamor; 440 ulong uamor;
441 u32 ctrl; 441 u32 ctrl;
442 ulong dabr; 442 ulong dabr;
443 ulong cfar;
443#endif 444#endif
444 u32 vrsave; /* also USPRG0 */ 445 u32 vrsave; /* also USPRG0 */
445 u32 mmucr; 446 u32 mmucr;
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 19d9d96eb8d3..3d6b4100dac1 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -180,6 +180,10 @@ struct machdep_calls {
180 int (*set_dabr)(unsigned long dabr, 180 int (*set_dabr)(unsigned long dabr,
181 unsigned long dabrx); 181 unsigned long dabrx);
182 182
183 /* Set DAWR for this platform, leave empty for default implemenation */
184 int (*set_dawr)(unsigned long dawr,
185 unsigned long dawrx);
186
183#ifdef CONFIG_PPC32 /* XXX for now */ 187#ifdef CONFIG_PPC32 /* XXX for now */
184 /* A general init function, called by ppc_init in init/main.c. 188 /* A general init function, called by ppc_init in init/main.c.
185 May be NULL. */ 189 May be NULL. */
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
index 8c0ab2ca689c..885c040d6194 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -53,4 +53,21 @@ struct mpc512x_ccm {
53 u32 m4ccr; /* MSCAN4 CCR */ 53 u32 m4ccr; /* MSCAN4 CCR */
54 u8 res[0x98]; /* Reserved */ 54 u8 res[0x98]; /* Reserved */
55}; 55};
56
57/*
58 * LPC Module
59 */
60struct mpc512x_lpc {
61 u32 cs_cfg[8]; /* CS config */
62 u32 cs_ctrl; /* CS Control Register */
63 u32 cs_status; /* CS Status Register */
64 u32 burst_ctrl; /* CS Burst Control Register */
65 u32 deadcycle_ctrl; /* CS Deadcycle Control Register */
66 u32 holdcycle_ctrl; /* CS Holdcycle Control Register */
67 u32 alt; /* Address Latch Timing Register */
68};
69
70int mpc512x_cs_config(unsigned int cs, u32 val);
71int __init mpc5121_clk_init(void);
72
56#endif /* __ASM_POWERPC_MPC5121_H__ */ 73#endif /* __ASM_POWERPC_MPC5121_H__ */
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index e9e7a6999bb8..77c91e74b612 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -93,9 +93,9 @@ struct paca_struct {
93 * Now, starting in cacheline 2, the exception save areas 93 * Now, starting in cacheline 2, the exception save areas
94 */ 94 */
95 /* used for most interrupts/exceptions */ 95 /* used for most interrupts/exceptions */
96 u64 exgen[11] __attribute__((aligned(0x80))); 96 u64 exgen[12] __attribute__((aligned(0x80)));
97 u64 exmc[11]; /* used for machine checks */ 97 u64 exmc[12]; /* used for machine checks */
98 u64 exslb[11]; /* used for SLB/segment table misses 98 u64 exslb[12]; /* used for SLB/segment table misses
99 * on the linear mapping */ 99 * on the linear mapping */
100 /* SLB related definitions */ 100 /* SLB related definitions */
101 u16 vmalloc_sllp; 101 u16 vmalloc_sllp;
@@ -137,6 +137,9 @@ struct paca_struct {
137 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */ 137 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
138 u8 nap_state_lost; /* NV GPR values lost in power7_idle */ 138 u8 nap_state_lost; /* NV GPR values lost in power7_idle */
139 u64 sprg3; /* Saved user-visible sprg */ 139 u64 sprg3; /* Saved user-visible sprg */
140#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
141 u64 tm_scratch; /* TM scratch area for reclaim */
142#endif
140 143
141#ifdef CONFIG_PPC_POWERNV 144#ifdef CONFIG_PPC_POWERNV
142 /* Pointer to OPAL machine check event structure set by the 145 /* Pointer to OPAL machine check event structure set by the
@@ -167,7 +170,6 @@ struct paca_struct {
167}; 170};
168 171
169extern struct paca_struct *paca; 172extern struct paca_struct *paca;
170extern __initdata struct paca_struct boot_paca;
171extern void initialise_paca(struct paca_struct *new_paca, int cpu); 173extern void initialise_paca(struct paca_struct *new_paca, int cpu);
172extern void setup_paca(struct paca_struct *new_paca); 174extern void setup_paca(struct paca_struct *new_paca);
173extern void allocate_pacas(void); 175extern void allocate_pacas(void);
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 136bba62efa4..d0aec72722e9 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -47,11 +47,11 @@ struct power_pmu {
47/* 47/*
48 * Values for power_pmu.flags 48 * Values for power_pmu.flags
49 */ 49 */
50#define PPMU_LIMITED_PMC5_6 1 /* PMC5/6 have limited function */ 50#define PPMU_LIMITED_PMC5_6 0x00000001 /* PMC5/6 have limited function */
51#define PPMU_ALT_SIPR 2 /* uses alternate posn for SIPR/HV */ 51#define PPMU_ALT_SIPR 0x00000002 /* uses alternate posn for SIPR/HV */
52#define PPMU_NO_SIPR 4 /* no SIPR/HV in MMCRA at all */ 52#define PPMU_NO_SIPR 0x00000004 /* no SIPR/HV in MMCRA at all */
53#define PPMU_NO_CONT_SAMPLING 8 /* no continuous sampling */ 53#define PPMU_NO_CONT_SAMPLING 0x00000008 /* no continuous sampling */
54#define PPMU_SIAR_VALID 16 /* Processor has SIAR Valid bit */ 54#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
55 55
56/* 56/*
57 * Values for flags to get_alternatives() 57 * Values for flags to get_alternatives()
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 51fb00a20d7e..8752bc8e34a3 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -100,6 +100,7 @@
100#define PPC_INST_MFSPR_PVR 0x7c1f42a6 100#define PPC_INST_MFSPR_PVR 0x7c1f42a6
101#define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff 101#define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff
102#define PPC_INST_MSGSND 0x7c00019c 102#define PPC_INST_MSGSND 0x7c00019c
103#define PPC_INST_MSGSNDP 0x7c00011c
103#define PPC_INST_NOP 0x60000000 104#define PPC_INST_NOP 0x60000000
104#define PPC_INST_POPCNTB 0x7c0000f4 105#define PPC_INST_POPCNTB 0x7c0000f4
105#define PPC_INST_POPCNTB_MASK 0xfc0007fe 106#define PPC_INST_POPCNTB_MASK 0xfc0007fe
@@ -128,6 +129,9 @@
128#define PPC_INST_TLBSRX_DOT 0x7c0006a5 129#define PPC_INST_TLBSRX_DOT 0x7c0006a5
129#define PPC_INST_XXLOR 0xf0000510 130#define PPC_INST_XXLOR 0xf0000510
130#define PPC_INST_XVCPSGNDP 0xf0000780 131#define PPC_INST_XVCPSGNDP 0xf0000780
132#define PPC_INST_TRECHKPT 0x7c0007dd
133#define PPC_INST_TRECLAIM 0x7c00075d
134#define PPC_INST_TABORT 0x7c00071d
131 135
132#define PPC_INST_NAP 0x4c000364 136#define PPC_INST_NAP 0x4c000364
133#define PPC_INST_SLEEP 0x4c0003a4 137#define PPC_INST_SLEEP 0x4c0003a4
@@ -227,6 +231,8 @@
227 ___PPC_RB(b) | __PPC_EH(eh)) 231 ___PPC_RB(b) | __PPC_EH(eh))
228#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ 232#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \
229 ___PPC_RB(b)) 233 ___PPC_RB(b))
234#define PPC_MSGSNDP(b) stringify_in_c(.long PPC_INST_MSGSNDP | \
235 ___PPC_RB(b))
230#define PPC_POPCNTB(a, s) stringify_in_c(.long PPC_INST_POPCNTB | \ 236#define PPC_POPCNTB(a, s) stringify_in_c(.long PPC_INST_POPCNTB | \
231 __PPC_RA(a) | __PPC_RS(s)) 237 __PPC_RA(a) | __PPC_RS(s))
232#define PPC_POPCNTD(a, s) stringify_in_c(.long PPC_INST_POPCNTD | \ 238#define PPC_POPCNTD(a, s) stringify_in_c(.long PPC_INST_POPCNTD | \
@@ -291,4 +297,11 @@
291#define PPC_NAP stringify_in_c(.long PPC_INST_NAP) 297#define PPC_NAP stringify_in_c(.long PPC_INST_NAP)
292#define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP) 298#define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP)
293 299
300/* Transactional memory instructions */
301#define TRECHKPT stringify_in_c(.long PPC_INST_TRECHKPT)
302#define TRECLAIM(r) stringify_in_c(.long PPC_INST_TRECLAIM \
303 | __PPC_RA(r))
304#define TABORT(r) stringify_in_c(.long PPC_INST_TABORT \
305 | __PPC_RA(r))
306
294#endif /* _ASM_POWERPC_PPC_OPCODE_H */ 307#endif /* _ASM_POWERPC_PPC_OPCODE_H */
diff --git a/arch/powerpc/include/asm/ppc4xx_ocm.h b/arch/powerpc/include/asm/ppc4xx_ocm.h
new file mode 100644
index 000000000000..6ce904605538
--- /dev/null
+++ b/arch/powerpc/include/asm/ppc4xx_ocm.h
@@ -0,0 +1,45 @@
1/*
2 * PowerPC 4xx OCM memory allocation support
3 *
4 * (C) Copyright 2009, Applied Micro Circuits Corporation
5 * Victor Gallardo (vgallardo@amcc.com)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __ASM_POWERPC_PPC4XX_OCM_H__
27#define __ASM_POWERPC_PPC4XX_OCM_H__
28
29#define PPC4XX_OCM_NON_CACHED 0
30#define PPC4XX_OCM_CACHED 1
31
32#if defined(CONFIG_PPC4xx_OCM)
33
34void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
35 int flags, const char *owner);
36void ppc4xx_ocm_free(const void *virt);
37
38#else
39
40#define ppc4xx_ocm_alloc(phys, size, align, flags, owner) NULL
41#define ppc4xx_ocm_free(addr) ((void)0)
42
43#endif /* CONFIG_PPC4xx_OCM */
44
45#endif /* __ASM_POWERPC_PPC4XX_OCM_H__ */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 2d0e1f5d8339..cea8496091ff 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -30,7 +30,6 @@
30#define ACCOUNT_STOLEN_TIME 30#define ACCOUNT_STOLEN_TIME
31#else 31#else
32#define ACCOUNT_CPU_USER_ENTRY(ra, rb) \ 32#define ACCOUNT_CPU_USER_ENTRY(ra, rb) \
33 beq 2f; /* if from kernel mode */ \
34 MFTB(ra); /* get timebase */ \ 33 MFTB(ra); /* get timebase */ \
35 ld rb,PACA_STARTTIME_USER(r13); \ 34 ld rb,PACA_STARTTIME_USER(r13); \
36 std ra,PACA_STARTTIME(r13); \ 35 std ra,PACA_STARTTIME(r13); \
@@ -38,7 +37,6 @@
38 ld ra,PACA_USER_TIME(r13); \ 37 ld ra,PACA_USER_TIME(r13); \
39 add ra,ra,rb; /* add on to user time */ \ 38 add ra,ra,rb; /* add on to user time */ \
40 std ra,PACA_USER_TIME(r13); \ 39 std ra,PACA_USER_TIME(r13); \
412:
42 40
43#define ACCOUNT_CPU_USER_EXIT(ra, rb) \ 41#define ACCOUNT_CPU_USER_EXIT(ra, rb) \
44 MFTB(ra); /* get timebase */ \ 42 MFTB(ra); /* get timebase */ \
@@ -125,6 +123,89 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
125#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) 123#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
126#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) 124#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
127 125
126/* Save/restore FPRs, VRs and VSRs from their checkpointed backups in
127 * thread_struct:
128 */
129#define SAVE_FPR_TRANSACT(n, base) stfd n,THREAD_TRANSACT_FPR0+ \
130 8*TS_FPRWIDTH*(n)(base)
131#define SAVE_2FPRS_TRANSACT(n, base) SAVE_FPR_TRANSACT(n, base); \
132 SAVE_FPR_TRANSACT(n+1, base)
133#define SAVE_4FPRS_TRANSACT(n, base) SAVE_2FPRS_TRANSACT(n, base); \
134 SAVE_2FPRS_TRANSACT(n+2, base)
135#define SAVE_8FPRS_TRANSACT(n, base) SAVE_4FPRS_TRANSACT(n, base); \
136 SAVE_4FPRS_TRANSACT(n+4, base)
137#define SAVE_16FPRS_TRANSACT(n, base) SAVE_8FPRS_TRANSACT(n, base); \
138 SAVE_8FPRS_TRANSACT(n+8, base)
139#define SAVE_32FPRS_TRANSACT(n, base) SAVE_16FPRS_TRANSACT(n, base); \
140 SAVE_16FPRS_TRANSACT(n+16, base)
141
142#define REST_FPR_TRANSACT(n, base) lfd n,THREAD_TRANSACT_FPR0+ \
143 8*TS_FPRWIDTH*(n)(base)
144#define REST_2FPRS_TRANSACT(n, base) REST_FPR_TRANSACT(n, base); \
145 REST_FPR_TRANSACT(n+1, base)
146#define REST_4FPRS_TRANSACT(n, base) REST_2FPRS_TRANSACT(n, base); \
147 REST_2FPRS_TRANSACT(n+2, base)
148#define REST_8FPRS_TRANSACT(n, base) REST_4FPRS_TRANSACT(n, base); \
149 REST_4FPRS_TRANSACT(n+4, base)
150#define REST_16FPRS_TRANSACT(n, base) REST_8FPRS_TRANSACT(n, base); \
151 REST_8FPRS_TRANSACT(n+8, base)
152#define REST_32FPRS_TRANSACT(n, base) REST_16FPRS_TRANSACT(n, base); \
153 REST_16FPRS_TRANSACT(n+16, base)
154
155
156#define SAVE_VR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VR0+(16*(n)); \
157 stvx n,b,base
158#define SAVE_2VRS_TRANSACT(n,b,base) SAVE_VR_TRANSACT(n,b,base); \
159 SAVE_VR_TRANSACT(n+1,b,base)
160#define SAVE_4VRS_TRANSACT(n,b,base) SAVE_2VRS_TRANSACT(n,b,base); \
161 SAVE_2VRS_TRANSACT(n+2,b,base)
162#define SAVE_8VRS_TRANSACT(n,b,base) SAVE_4VRS_TRANSACT(n,b,base); \
163 SAVE_4VRS_TRANSACT(n+4,b,base)
164#define SAVE_16VRS_TRANSACT(n,b,base) SAVE_8VRS_TRANSACT(n,b,base); \
165 SAVE_8VRS_TRANSACT(n+8,b,base)
166#define SAVE_32VRS_TRANSACT(n,b,base) SAVE_16VRS_TRANSACT(n,b,base); \
167 SAVE_16VRS_TRANSACT(n+16,b,base)
168
169#define REST_VR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VR0+(16*(n)); \
170 lvx n,b,base
171#define REST_2VRS_TRANSACT(n,b,base) REST_VR_TRANSACT(n,b,base); \
172 REST_VR_TRANSACT(n+1,b,base)
173#define REST_4VRS_TRANSACT(n,b,base) REST_2VRS_TRANSACT(n,b,base); \
174 REST_2VRS_TRANSACT(n+2,b,base)
175#define REST_8VRS_TRANSACT(n,b,base) REST_4VRS_TRANSACT(n,b,base); \
176 REST_4VRS_TRANSACT(n+4,b,base)
177#define REST_16VRS_TRANSACT(n,b,base) REST_8VRS_TRANSACT(n,b,base); \
178 REST_8VRS_TRANSACT(n+8,b,base)
179#define REST_32VRS_TRANSACT(n,b,base) REST_16VRS_TRANSACT(n,b,base); \
180 REST_16VRS_TRANSACT(n+16,b,base)
181
182
183#define SAVE_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
184 STXVD2X(n,R##base,R##b)
185#define SAVE_2VSRS_TRANSACT(n,b,base) SAVE_VSR_TRANSACT(n,b,base); \
186 SAVE_VSR_TRANSACT(n+1,b,base)
187#define SAVE_4VSRS_TRANSACT(n,b,base) SAVE_2VSRS_TRANSACT(n,b,base); \
188 SAVE_2VSRS_TRANSACT(n+2,b,base)
189#define SAVE_8VSRS_TRANSACT(n,b,base) SAVE_4VSRS_TRANSACT(n,b,base); \
190 SAVE_4VSRS_TRANSACT(n+4,b,base)
191#define SAVE_16VSRS_TRANSACT(n,b,base) SAVE_8VSRS_TRANSACT(n,b,base); \
192 SAVE_8VSRS_TRANSACT(n+8,b,base)
193#define SAVE_32VSRS_TRANSACT(n,b,base) SAVE_16VSRS_TRANSACT(n,b,base); \
194 SAVE_16VSRS_TRANSACT(n+16,b,base)
195
196#define REST_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
197 LXVD2X(n,R##base,R##b)
198#define REST_2VSRS_TRANSACT(n,b,base) REST_VSR_TRANSACT(n,b,base); \
199 REST_VSR_TRANSACT(n+1,b,base)
200#define REST_4VSRS_TRANSACT(n,b,base) REST_2VSRS_TRANSACT(n,b,base); \
201 REST_2VSRS_TRANSACT(n+2,b,base)
202#define REST_8VSRS_TRANSACT(n,b,base) REST_4VSRS_TRANSACT(n,b,base); \
203 REST_4VSRS_TRANSACT(n+4,b,base)
204#define REST_16VSRS_TRANSACT(n,b,base) REST_8VSRS_TRANSACT(n,b,base); \
205 REST_8VSRS_TRANSACT(n+8,b,base)
206#define REST_32VSRS_TRANSACT(n,b,base) REST_16VSRS_TRANSACT(n,b,base); \
207 REST_16VSRS_TRANSACT(n+16,b,base)
208
128/* Save the lower 32 VSRs in the thread VSR region */ 209/* Save the lower 32 VSRs in the thread VSR region */
129#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,R##base,R##b) 210#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,R##base,R##b)
130#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base) 211#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
@@ -391,6 +472,31 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
391 FTR_SECTION_ELSE_NESTED(848); \ 472 FTR_SECTION_ELSE_NESTED(848); \
392 mtocrf (FXM), RS; \ 473 mtocrf (FXM), RS; \
393 ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848) 474 ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848)
475
476/*
477 * PPR restore macros used in entry_64.S
478 * Used for P7 or later processors
479 */
480#define HMT_MEDIUM_LOW_HAS_PPR \
481BEGIN_FTR_SECTION_NESTED(944) \
482 HMT_MEDIUM_LOW; \
483END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,944)
484
485#define SET_DEFAULT_THREAD_PPR(ra, rb) \
486BEGIN_FTR_SECTION_NESTED(945) \
487 lis ra,INIT_PPR@highest; /* default ppr=3 */ \
488 ld rb,PACACURRENT(r13); \
489 sldi ra,ra,32; /* 11- 13 bits are used for ppr */ \
490 std ra,TASKTHREADPPR(rb); \
491END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945)
492
493#define RESTORE_PPR(ra, rb) \
494BEGIN_FTR_SECTION_NESTED(946) \
495 ld ra,PACACURRENT(r13); \
496 ld rb,TASKTHREADPPR(ra); \
497 mtspr SPRN_PPR,rb; /* Restore PPR */ \
498END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,946)
499
394#endif 500#endif
395 501
396/* 502/*
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 87502046c0dc..7ff9eaa3ea6c 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -18,11 +18,22 @@
18#define TS_FPRWIDTH 1 18#define TS_FPRWIDTH 1
19#endif 19#endif
20 20
21#ifdef CONFIG_PPC64
22/* Default SMT priority is set to 3. Use 11- 13bits to save priority. */
23#define PPR_PRIORITY 3
24#ifdef __ASSEMBLY__
25#define INIT_PPR (PPR_PRIORITY << 50)
26#else
27#define INIT_PPR ((u64)PPR_PRIORITY << 50)
28#endif /* __ASSEMBLY__ */
29#endif /* CONFIG_PPC64 */
30
21#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
22#include <linux/compiler.h> 32#include <linux/compiler.h>
23#include <linux/cache.h> 33#include <linux/cache.h>
24#include <asm/ptrace.h> 34#include <asm/ptrace.h>
25#include <asm/types.h> 35#include <asm/types.h>
36#include <asm/hw_breakpoint.h>
26 37
27/* We do _not_ want to define new machine types at all, those must die 38/* We do _not_ want to define new machine types at all, those must die
28 * in favor of using the device-tree 39 * in favor of using the device-tree
@@ -141,6 +152,7 @@ typedef struct {
141#define TS_FPROFFSET 0 152#define TS_FPROFFSET 0
142#define TS_VSRLOWOFFSET 1 153#define TS_VSRLOWOFFSET 1
143#define TS_FPR(i) fpr[i][TS_FPROFFSET] 154#define TS_FPR(i) fpr[i][TS_FPROFFSET]
155#define TS_TRANS_FPR(i) transact_fpr[i][TS_FPROFFSET]
144 156
145struct thread_struct { 157struct thread_struct {
146 unsigned long ksp; /* Kernel stack pointer */ 158 unsigned long ksp; /* Kernel stack pointer */
@@ -215,8 +227,7 @@ struct thread_struct {
215 struct perf_event *last_hit_ubp; 227 struct perf_event *last_hit_ubp;
216#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 228#endif /* CONFIG_HAVE_HW_BREAKPOINT */
217#endif 229#endif
218 unsigned long dabr; /* Data address breakpoint register */ 230 struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */
219 unsigned long dabrx; /* ... extension */
220 unsigned long trap_nr; /* last trap # on this thread */ 231 unsigned long trap_nr; /* last trap # on this thread */
221#ifdef CONFIG_ALTIVEC 232#ifdef CONFIG_ALTIVEC
222 /* Complete AltiVec register set */ 233 /* Complete AltiVec register set */
@@ -236,6 +247,34 @@ struct thread_struct {
236 unsigned long spefscr; /* SPE & eFP status */ 247 unsigned long spefscr; /* SPE & eFP status */
237 int used_spe; /* set if process has used spe */ 248 int used_spe; /* set if process has used spe */
238#endif /* CONFIG_SPE */ 249#endif /* CONFIG_SPE */
250#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
251 u64 tm_tfhar; /* Transaction fail handler addr */
252 u64 tm_texasr; /* Transaction exception & summary */
253 u64 tm_tfiar; /* Transaction fail instr address reg */
254 unsigned long tm_orig_msr; /* Thread's MSR on ctx switch */
255 struct pt_regs ckpt_regs; /* Checkpointed registers */
256
257 /*
258 * Transactional FP and VSX 0-31 register set.
259 * NOTE: the sense of these is the opposite of the integer ckpt_regs!
260 *
261 * When a transaction is active/signalled/scheduled etc., *regs is the
262 * most recent set of/speculated GPRs with ckpt_regs being the older
263 * checkpointed regs to which we roll back if transaction aborts.
264 *
265 * However, fpr[] is the checkpointed 'base state' of FP regs, and
266 * transact_fpr[] is the new set of transactional values.
267 * VRs work the same way.
268 */
269 double transact_fpr[32][TS_FPRWIDTH];
270 struct {
271 unsigned int pad;
272 unsigned int val; /* Floating point status */
273 } transact_fpscr;
274 vector128 transact_vr[32] __attribute__((aligned(16)));
275 vector128 transact_vscr __attribute__((aligned(16)));
276 unsigned long transact_vrsave;
277#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
239#ifdef CONFIG_KVM_BOOK3S_32_HANDLER 278#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
240 void* kvm_shadow_vcpu; /* KVM internal data */ 279 void* kvm_shadow_vcpu; /* KVM internal data */
241#endif /* CONFIG_KVM_BOOK3S_32_HANDLER */ 280#endif /* CONFIG_KVM_BOOK3S_32_HANDLER */
@@ -245,6 +284,10 @@ struct thread_struct {
245#ifdef CONFIG_PPC64 284#ifdef CONFIG_PPC64
246 unsigned long dscr; 285 unsigned long dscr;
247 int dscr_inherit; 286 int dscr_inherit;
287 unsigned long ppr; /* used to save/restore SMT priority */
288#endif
289#ifdef CONFIG_PPC_BOOK3S_64
290 unsigned long tar;
248#endif 291#endif
249}; 292};
250 293
@@ -278,6 +321,7 @@ struct thread_struct {
278 .fpr = {{0}}, \ 321 .fpr = {{0}}, \
279 .fpscr = { .val = 0, }, \ 322 .fpscr = { .val = 0, }, \
280 .fpexc_mode = 0, \ 323 .fpexc_mode = 0, \
324 .ppr = INIT_PPR, \
281} 325}
282#endif 326#endif
283 327
diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h
index 0e15db4d703b..678a7c1d9cb8 100644
--- a/arch/powerpc/include/asm/ps3.h
+++ b/arch/powerpc/include/asm/ps3.h
@@ -245,7 +245,7 @@ enum lv1_result {
245 245
246static inline const char* ps3_result(int result) 246static inline const char* ps3_result(int result)
247{ 247{
248#if defined(DEBUG) 248#if defined(DEBUG) || defined(PS3_VERBOSE_RESULT)
249 switch (result) { 249 switch (result) {
250 case LV1_SUCCESS: 250 case LV1_SUCCESS:
251 return "LV1_SUCCESS (0)"; 251 return "LV1_SUCCESS (0)";
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 3d5c9dc8917a..7035e608f3fa 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -29,6 +29,10 @@
29#define MSR_SF_LG 63 /* Enable 64 bit mode */ 29#define MSR_SF_LG 63 /* Enable 64 bit mode */
30#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ 30#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
31#define MSR_HV_LG 60 /* Hypervisor state */ 31#define MSR_HV_LG 60 /* Hypervisor state */
32#define MSR_TS_T_LG 34 /* Trans Mem state: Transactional */
33#define MSR_TS_S_LG 33 /* Trans Mem state: Suspended */
34#define MSR_TS_LG 33 /* Trans Mem state (2 bits) */
35#define MSR_TM_LG 32 /* Trans Mem Available */
32#define MSR_VEC_LG 25 /* Enable AltiVec */ 36#define MSR_VEC_LG 25 /* Enable AltiVec */
33#define MSR_VSX_LG 23 /* Enable VSX */ 37#define MSR_VSX_LG 23 /* Enable VSX */
34#define MSR_POW_LG 18 /* Enable Power Management */ 38#define MSR_POW_LG 18 /* Enable Power Management */
@@ -98,6 +102,26 @@
98#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ 102#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */
99#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ 103#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */
100 104
105#define MSR_TM __MASK(MSR_TM_LG) /* Transactional Mem Available */
106#define MSR_TS_N 0 /* Non-transactional */
107#define MSR_TS_S __MASK(MSR_TS_S_LG) /* Transaction Suspended */
108#define MSR_TS_T __MASK(MSR_TS_T_LG) /* Transaction Transactional */
109#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
110#define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */
111#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) == MSR_TS_T)
112#define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S)
113
114/* Reason codes describing kernel causes for transaction aborts. By
115 convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if
116 the failure is persistent.
117*/
118#define TM_CAUSE_RESCHED 0xfe
119#define TM_CAUSE_TLBI 0xfc
120#define TM_CAUSE_FAC_UNAV 0xfa
121#define TM_CAUSE_SYSCALL 0xf9 /* Persistent */
122#define TM_CAUSE_MISC 0xf6
123#define TM_CAUSE_SIGNAL 0xf4
124
101#if defined(CONFIG_PPC_BOOK3S_64) 125#if defined(CONFIG_PPC_BOOK3S_64)
102#define MSR_64BIT MSR_SF 126#define MSR_64BIT MSR_SF
103 127
@@ -193,6 +217,10 @@
193#define SPRN_UAMOR 0x9d /* User Authority Mask Override Register */ 217#define SPRN_UAMOR 0x9d /* User Authority Mask Override Register */
194#define SPRN_AMOR 0x15d /* Authority Mask Override Register */ 218#define SPRN_AMOR 0x15d /* Authority Mask Override Register */
195#define SPRN_ACOP 0x1F /* Available Coprocessor Register */ 219#define SPRN_ACOP 0x1F /* Available Coprocessor Register */
220#define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */
221#define SPRN_TEXASR 0x82 /* Transaction EXception & Summary */
222#define SPRN_TEXASRU 0x83 /* '' '' '' Upper 32 */
223#define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */
196#define SPRN_CTRLF 0x088 224#define SPRN_CTRLF 0x088
197#define SPRN_CTRLT 0x098 225#define SPRN_CTRLT 0x098
198#define CTRL_CT 0xc0000000 /* current thread */ 226#define CTRL_CT 0xc0000000 /* current thread */
@@ -200,10 +228,12 @@
200#define CTRL_CT1 0x40000000 /* thread 1 */ 228#define CTRL_CT1 0x40000000 /* thread 1 */
201#define CTRL_TE 0x00c00000 /* thread enable */ 229#define CTRL_TE 0x00c00000 /* thread enable */
202#define CTRL_RUNLATCH 0x1 230#define CTRL_RUNLATCH 0x1
231#define SPRN_DAWR 0xB4
232#define SPRN_DAWRX 0xBC
233#define DAWRX_USER (1UL << 0)
234#define DAWRX_KERNEL (1UL << 1)
235#define DAWRX_HYP (1UL << 2)
203#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ 236#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
204#define DABR_TRANSLATION (1UL << 2)
205#define DABR_DATA_WRITE (1UL << 1)
206#define DABR_DATA_READ (1UL << 0)
207#define SPRN_DABR2 0x13D /* e300 */ 237#define SPRN_DABR2 0x13D /* e300 */
208#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ 238#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
209#define DABRX_USER (1UL << 0) 239#define DABRX_USER (1UL << 0)
@@ -235,6 +265,9 @@
235#define SPRN_HRMOR 0x139 /* Real mode offset register */ 265#define SPRN_HRMOR 0x139 /* Real mode offset register */
236#define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ 266#define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */
237#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ 267#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */
268#define SPRN_FSCR 0x099 /* Facility Status & Control Register */
269#define FSCR_TAR (1<<8) /* Enable Target Adress Register */
270#define SPRN_TAR 0x32f /* Target Address Register */
238#define SPRN_LPCR 0x13E /* LPAR Control Register */ 271#define SPRN_LPCR 0x13E /* LPAR Control Register */
239#define LPCR_VPM0 (1ul << (63-0)) 272#define LPCR_VPM0 (1ul << (63-0))
240#define LPCR_VPM1 (1ul << (63-1)) 273#define LPCR_VPM1 (1ul << (63-1))
@@ -289,6 +322,7 @@
289#define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */ 322#define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */
290#define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */ 323#define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */
291#define SPRN_DBAT7U 0x23E /* Data BAT 7 Upper Register */ 324#define SPRN_DBAT7U 0x23E /* Data BAT 7 Upper Register */
325#define SPRN_PPR 0x380 /* SMT Thread status Register */
292 326
293#define SPRN_DEC 0x016 /* Decrement Register */ 327#define SPRN_DEC 0x016 /* Decrement Register */
294#define SPRN_DER 0x095 /* Debug Enable Regsiter */ 328#define SPRN_DER 0x095 /* Debug Enable Regsiter */
@@ -483,6 +517,7 @@
483#ifndef SPRN_PIR 517#ifndef SPRN_PIR
484#define SPRN_PIR 0x3FF /* Processor Identification Register */ 518#define SPRN_PIR 0x3FF /* Processor Identification Register */
485#endif 519#endif
520#define SPRN_TIR 0x1BE /* Thread Identification Register */
486#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */ 521#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */
487#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */ 522#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */
488#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */ 523#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */
@@ -763,7 +798,7 @@
763 * HV mode in which case it is HSPRG0 798 * HV mode in which case it is HSPRG0
764 * 799 *
765 * 64-bit server: 800 * 64-bit server:
766 * - SPRG0 unused (reserved for HV on Power4) 801 * - SPRG0 scratch for TM recheckpoint/reclaim (reserved for HV on Power4)
767 * - SPRG2 scratch for exception vectors 802 * - SPRG2 scratch for exception vectors
768 * - SPRG3 CPU and NUMA node for VDSO getcpu (user visible) 803 * - SPRG3 CPU and NUMA node for VDSO getcpu (user visible)
769 * - HSPRG0 stores PACA in HV mode 804 * - HSPRG0 stores PACA in HV mode
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index a0f358d4a00c..4ee06fe15de4 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -10,6 +10,9 @@
10 10
11extern char __end_interrupts[]; 11extern char __end_interrupts[];
12 12
13extern char __prom_init_toc_start[];
14extern char __prom_init_toc_end[];
15
13static inline int in_kernel_text(unsigned long addr) 16static inline int in_kernel_text(unsigned long addr)
14{ 17{
15 if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end) 18 if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end)
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index 7124fc06ad47..5b23f910ee57 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -96,7 +96,7 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
96 96
97#if defined(CONFIG_PPC_SPLPAR) 97#if defined(CONFIG_PPC_SPLPAR)
98/* We only yield to the hypervisor if we are in shared processor mode */ 98/* We only yield to the hypervisor if we are in shared processor mode */
99#define SHARED_PROCESSOR (get_lppaca()->shared_proc) 99#define SHARED_PROCESSOR (local_paca->lppaca_ptr->shared_proc)
100extern void __spin_yield(arch_spinlock_t *lock); 100extern void __spin_yield(arch_spinlock_t *lock);
101extern void __rw_yield(arch_rwlock_t *lock); 101extern void __rw_yield(arch_rwlock_t *lock);
102#else /* SPLPAR */ 102#else /* SPLPAR */
diff --git a/arch/powerpc/include/asm/tm.h b/arch/powerpc/include/asm/tm.h
new file mode 100644
index 000000000000..4b4449abf3f8
--- /dev/null
+++ b/arch/powerpc/include/asm/tm.h
@@ -0,0 +1,20 @@
1/*
2 * Transactional memory support routines to reclaim and recheckpoint
3 * transactional process state.
4 *
5 * Copyright 2012 Matt Evans & Michael Neuling, IBM Corporation.
6 */
7
8#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
9extern void do_load_up_transact_fpu(struct thread_struct *thread);
10extern void do_load_up_transact_altivec(struct thread_struct *thread);
11#endif
12
13extern void tm_enable(void);
14extern void tm_reclaim(struct thread_struct *thread,
15 unsigned long orig_msr, uint8_t cause);
16extern void tm_recheckpoint(struct thread_struct *thread,
17 unsigned long orig_msr);
18extern void tm_abort(uint8_t cause);
19extern void tm_save_sprs(struct thread_struct *thread);
20extern void tm_restore_sprs(struct thread_struct *thread);
diff --git a/arch/powerpc/include/uapi/asm/ptrace.h b/arch/powerpc/include/uapi/asm/ptrace.h
index ee67a2bc91bb..66b9ca4ee94a 100644
--- a/arch/powerpc/include/uapi/asm/ptrace.h
+++ b/arch/powerpc/include/uapi/asm/ptrace.h
@@ -108,6 +108,7 @@ struct pt_regs {
108#define PT_DAR 41 108#define PT_DAR 41
109#define PT_DSISR 42 109#define PT_DSISR 42
110#define PT_RESULT 43 110#define PT_RESULT 43
111#define PT_DSCR 44
111#define PT_REGS_COUNT 44 112#define PT_REGS_COUNT 44
112 113
113#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ 114#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
@@ -146,34 +147,34 @@ struct pt_regs {
146 * structures. This also simplifies the implementation of a bi-arch 147 * structures. This also simplifies the implementation of a bi-arch
147 * (combined (32- and 64-bit) gdb. 148 * (combined (32- and 64-bit) gdb.
148 */ 149 */
149#define PTRACE_GETVRREGS 18 150#define PTRACE_GETVRREGS 0x12
150#define PTRACE_SETVRREGS 19 151#define PTRACE_SETVRREGS 0x13
151 152
152/* Get/set all the upper 32-bits of the SPE registers, accumulator, and 153/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
153 * spefscr, in one go */ 154 * spefscr, in one go */
154#define PTRACE_GETEVRREGS 20 155#define PTRACE_GETEVRREGS 0x14
155#define PTRACE_SETEVRREGS 21 156#define PTRACE_SETEVRREGS 0x15
156 157
157/* Get the first 32 128bit VSX registers */ 158/* Get the first 32 128bit VSX registers */
158#define PTRACE_GETVSRREGS 27 159#define PTRACE_GETVSRREGS 0x1b
159#define PTRACE_SETVSRREGS 28 160#define PTRACE_SETVSRREGS 0x1c
160 161
161/* 162/*
162 * Get or set a debug register. The first 16 are DABR registers and the 163 * Get or set a debug register. The first 16 are DABR registers and the
163 * second 16 are IABR registers. 164 * second 16 are IABR registers.
164 */ 165 */
165#define PTRACE_GET_DEBUGREG 25 166#define PTRACE_GET_DEBUGREG 0x19
166#define PTRACE_SET_DEBUGREG 26 167#define PTRACE_SET_DEBUGREG 0x1a
167 168
168/* (new) PTRACE requests using the same numbers as x86 and the same 169/* (new) PTRACE requests using the same numbers as x86 and the same
169 * argument ordering. Additionally, they support more registers too 170 * argument ordering. Additionally, they support more registers too
170 */ 171 */
171#define PTRACE_GETREGS 12 172#define PTRACE_GETREGS 0xc
172#define PTRACE_SETREGS 13 173#define PTRACE_SETREGS 0xd
173#define PTRACE_GETFPREGS 14 174#define PTRACE_GETFPREGS 0xe
174#define PTRACE_SETFPREGS 15 175#define PTRACE_SETFPREGS 0xf
175#define PTRACE_GETREGS64 22 176#define PTRACE_GETREGS64 0x16
176#define PTRACE_SETREGS64 23 177#define PTRACE_SETREGS64 0x17
177 178
178/* Calls to trace a 64bit program from a 32bit program */ 179/* Calls to trace a 64bit program from a 32bit program */
179#define PPC_PTRACE_PEEKTEXT_3264 0x95 180#define PPC_PTRACE_PEEKTEXT_3264 0x95
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 8f619342f14c..f960a7944553 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -7,7 +7,7 @@ CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
7subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror 7subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
8 8
9ifeq ($(CONFIG_PPC64),y) 9ifeq ($(CONFIG_PPC64),y)
10CFLAGS_prom_init.o += -mno-minimal-toc 10CFLAGS_prom_init.o += $(NO_MINIMAL_TOC)
11endif 11endif
12ifeq ($(CONFIG_PPC32),y) 12ifeq ($(CONFIG_PPC32),y)
13CFLAGS_prom_init.o += -fPIC 13CFLAGS_prom_init.o += -fPIC
@@ -75,8 +75,8 @@ endif
75obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o 75obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
76obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o 76obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
77obj-$(CONFIG_44x) += cpu_setup_44x.o 77obj-$(CONFIG_44x) += cpu_setup_44x.o
78obj-$(CONFIG_PPC_FSL_BOOK3E) += cpu_setup_fsl_booke.o dbell.o 78obj-$(CONFIG_PPC_FSL_BOOK3E) += cpu_setup_fsl_booke.o
79obj-$(CONFIG_PPC_BOOK3E_64) += dbell.o 79obj-$(CONFIG_PPC_DOORBELL) += dbell.o
80obj-$(CONFIG_JUMP_LABEL) += jump_label.o 80obj-$(CONFIG_JUMP_LABEL) += jump_label.o
81 81
82extra-y := head_$(CONFIG_WORD_SIZE).o 82extra-y := head_$(CONFIG_WORD_SIZE).o
@@ -91,7 +91,6 @@ obj-$(CONFIG_RELOCATABLE_PPC32) += reloc_32.o
91obj-$(CONFIG_PPC32) += entry_32.o setup_32.o 91obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
92obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o 92obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
93obj-$(CONFIG_KGDB) += kgdb.o 93obj-$(CONFIG_KGDB) += kgdb.o
94obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
95obj-$(CONFIG_MODULES) += ppc_ksyms.o 94obj-$(CONFIG_MODULES) += ppc_ksyms.o
96obj-$(CONFIG_BOOTX_TEXT) += btext.o 95obj-$(CONFIG_BOOTX_TEXT) += btext.o
97obj-$(CONFIG_SMP) += smp.o 96obj-$(CONFIG_SMP) += smp.o
@@ -122,6 +121,8 @@ ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
122obj-y += iomap.o 121obj-y += iomap.o
123endif 122endif
124 123
124obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM) += tm.o
125
125obj-$(CONFIG_PPC64) += $(obj64-y) 126obj-$(CONFIG_PPC64) += $(obj64-y)
126obj-$(CONFIG_PPC32) += $(obj32-y) 127obj-$(CONFIG_PPC32) += $(obj32-y)
127 128
@@ -142,6 +143,7 @@ GCOV_PROFILE_kprobes.o := n
142extra-$(CONFIG_PPC_FPU) += fpu.o 143extra-$(CONFIG_PPC_FPU) += fpu.o
143extra-$(CONFIG_ALTIVEC) += vector.o 144extra-$(CONFIG_ALTIVEC) += vector.o
144extra-$(CONFIG_PPC64) += entry_64.o 145extra-$(CONFIG_PPC64) += entry_64.o
146extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
145 147
146extra-y += systbl_chk.i 148extra-y += systbl_chk.i
147$(obj)/systbl.o: systbl_chk 149$(obj)/systbl.o: systbl_chk
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 4e23ba2f3ca7..781190367292 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -77,6 +77,7 @@ int main(void)
77 DEFINE(NMI_MASK, NMI_MASK); 77 DEFINE(NMI_MASK, NMI_MASK);
78 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr)); 78 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
79 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit)); 79 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
80 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
80#else 81#else
81 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); 82 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
82#endif /* CONFIG_PPC64 */ 83#endif /* CONFIG_PPC64 */
@@ -121,6 +122,34 @@ int main(void)
121 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu)); 122 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
122#endif 123#endif
123 124
125#ifdef CONFIG_PPC_BOOK3S_64
126 DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));
127#endif
128#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
129 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
130 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
131 DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
132 DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
133 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
134 DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct,
135 transact_vr[0]));
136 DEFINE(THREAD_TRANSACT_VSCR, offsetof(struct thread_struct,
137 transact_vscr));
138 DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
139 transact_vrsave));
140 DEFINE(THREAD_TRANSACT_FPR0, offsetof(struct thread_struct,
141 transact_fpr[0]));
142 DEFINE(THREAD_TRANSACT_FPSCR, offsetof(struct thread_struct,
143 transact_fpscr));
144#ifdef CONFIG_VSX
145 DEFINE(THREAD_TRANSACT_VSR0, offsetof(struct thread_struct,
146 transact_fpr[0]));
147#endif
148 /* Local pt_regs on stack for Transactional Memory funcs. */
149 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
150 sizeof(struct pt_regs) + 16);
151#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
152
124 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 153 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
125 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); 154 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
126 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 155 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
@@ -474,6 +503,7 @@ int main(void)
474 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst)); 503 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
475 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap)); 504 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
476 DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid)); 505 DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid));
506 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
477 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count)); 507 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
478 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count)); 508 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
479 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest)); 509 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
@@ -553,6 +583,10 @@ int main(void)
553 DEFINE(IPI_PRIORITY, IPI_PRIORITY); 583 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
554#endif /* CONFIG_KVM_BOOK3S_64_HV */ 584#endif /* CONFIG_KVM_BOOK3S_64_HV */
555 585
586#ifdef CONFIG_PPC_BOOK3S_64
587 HSTATE_FIELD(HSTATE_CFAR, cfar);
588#endif /* CONFIG_PPC_BOOK3S_64 */
589
556#else /* CONFIG_PPC_BOOK3S */ 590#else /* CONFIG_PPC_BOOK3S */
557 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr)); 591 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
558 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer)); 592 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 57cf14065aec..d29facbf9a28 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -56,6 +56,7 @@ _GLOBAL(__setup_cpu_power8)
56 mfspr r3,SPRN_LPCR 56 mfspr r3,SPRN_LPCR
57 oris r3, r3, LPCR_AIL_3@h 57 oris r3, r3, LPCR_AIL_3@h
58 bl __init_LPCR 58 bl __init_LPCR
59 bl __init_FSCR
59 bl __init_TLB 60 bl __init_TLB
60 mtlr r11 61 mtlr r11
61 blr 62 blr
@@ -112,6 +113,12 @@ __init_LPCR:
112 isync 113 isync
113 blr 114 blr
114 115
116__init_FSCR:
117 mfspr r3,SPRN_FSCR
118 ori r3,r3,FSCR_TAR
119 mtspr SPRN_FSCR,r3
120 blr
121
115__init_TLB: 122__init_TLB:
116 /* Clear the TLB */ 123 /* Clear the TLB */
117 li r6,128 124 li r6,128
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
index a892680668d8..9ebbc24bb23c 100644
--- a/arch/powerpc/kernel/dbell.c
+++ b/arch/powerpc/kernel/dbell.c
@@ -21,7 +21,7 @@
21#ifdef CONFIG_SMP 21#ifdef CONFIG_SMP
22void doorbell_setup_this_cpu(void) 22void doorbell_setup_this_cpu(void)
23{ 23{
24 unsigned long tag = mfspr(SPRN_PIR) & 0x3fff; 24 unsigned long tag = mfspr(SPRN_DOORBELL_CPUTAG) & PPC_DBELL_TAG_MASK;
25 25
26 smp_muxed_ipi_set_data(smp_processor_id(), tag); 26 smp_muxed_ipi_set_data(smp_processor_id(), tag);
27} 27}
@@ -30,7 +30,7 @@ void doorbell_cause_ipi(int cpu, unsigned long data)
30{ 30{
31 /* Order previous accesses vs. msgsnd, which is treated as a store */ 31 /* Order previous accesses vs. msgsnd, which is treated as a store */
32 mb(); 32 mb();
33 ppc_msgsnd(PPC_DBELL, 0, data); 33 ppc_msgsnd(PPC_DBELL_MSGTYPE, 0, data);
34} 34}
35 35
36void doorbell_exception(struct pt_regs *regs) 36void doorbell_exception(struct pt_regs *regs)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index ac057013f9fd..256c5bf0adb7 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -62,8 +62,9 @@ system_call_common:
62 std r12,_MSR(r1) 62 std r12,_MSR(r1)
63 std r0,GPR0(r1) 63 std r0,GPR0(r1)
64 std r10,GPR1(r1) 64 std r10,GPR1(r1)
65 beq 2f /* if from kernel mode */
65 ACCOUNT_CPU_USER_ENTRY(r10, r11) 66 ACCOUNT_CPU_USER_ENTRY(r10, r11)
66 std r2,GPR2(r1) 672: std r2,GPR2(r1)
67 std r3,GPR3(r1) 68 std r3,GPR3(r1)
68 mfcr r2 69 mfcr r2
69 std r4,GPR4(r1) 70 std r4,GPR4(r1)
@@ -226,6 +227,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
226 227
227 beq- 1f 228 beq- 1f
228 ACCOUNT_CPU_USER_EXIT(r11, r12) 229 ACCOUNT_CPU_USER_EXIT(r11, r12)
230 HMT_MEDIUM_LOW_HAS_PPR
229 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */ 231 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
2301: ld r2,GPR2(r1) 2321: ld r2,GPR2(r1)
231 ld r1,GPR1(r1) 233 ld r1,GPR1(r1)
@@ -302,6 +304,7 @@ syscall_exit_work:
302 subi r12,r12,TI_FLAGS 304 subi r12,r12,TI_FLAGS
303 305
3044: /* Anything else left to do? */ 3064: /* Anything else left to do? */
307 SET_DEFAULT_THREAD_PPR(r3, r9) /* Set thread.ppr = 3 */
305 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP) 308 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
306 beq .ret_from_except_lite 309 beq .ret_from_except_lite
307 310
@@ -445,6 +448,19 @@ END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
445 std r23,_CCR(r1) 448 std r23,_CCR(r1)
446 std r1,KSP(r3) /* Set old stack pointer */ 449 std r1,KSP(r3) /* Set old stack pointer */
447 450
451#ifdef CONFIG_PPC_BOOK3S_64
452BEGIN_FTR_SECTION
453 /*
454 * Back up the TAR across context switches. Note that the TAR is not
455 * available for use in the kernel. (To provide this, the TAR should
456 * be backed up/restored on exception entry/exit instead, and be in
457 * pt_regs. FIXME, this should be in pt_regs anyway (for debug).)
458 */
459 mfspr r0,SPRN_TAR
460 std r0,THREAD_TAR(r3)
461END_FTR_SECTION_IFSET(CPU_FTR_BCTAR)
462#endif
463
448#ifdef CONFIG_SMP 464#ifdef CONFIG_SMP
449 /* We need a sync somewhere here to make sure that if the 465 /* We need a sync somewhere here to make sure that if the
450 * previous task gets rescheduled on another CPU, it sees all 466 * previous task gets rescheduled on another CPU, it sees all
@@ -527,6 +543,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
527 mr r1,r8 /* start using new stack pointer */ 543 mr r1,r8 /* start using new stack pointer */
528 std r7,PACAKSAVE(r13) 544 std r7,PACAKSAVE(r13)
529 545
546#ifdef CONFIG_PPC_BOOK3S_64
547BEGIN_FTR_SECTION
548 ld r0,THREAD_TAR(r4)
549 mtspr SPRN_TAR,r0
550END_FTR_SECTION_IFSET(CPU_FTR_BCTAR)
551#endif
552
530#ifdef CONFIG_ALTIVEC 553#ifdef CONFIG_ALTIVEC
531BEGIN_FTR_SECTION 554BEGIN_FTR_SECTION
532 ld r0,THREAD_VRSAVE(r4) 555 ld r0,THREAD_VRSAVE(r4)
@@ -762,6 +785,10 @@ fast_exception_return:
762 andc r4,r4,r0 /* r0 contains MSR_RI here */ 785 andc r4,r4,r0 /* r0 contains MSR_RI here */
763 mtmsrd r4,1 786 mtmsrd r4,1
764 787
788#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
789 /* TM debug */
790 std r3, PACATMSCRATCH(r13) /* Stash returned-to MSR */
791#endif
765 /* 792 /*
766 * r13 is our per cpu area, only restore it if we are returning to 793 * r13 is our per cpu area, only restore it if we are returning to
767 * userspace the value stored in the stack frame may belong to 794 * userspace the value stored in the stack frame may belong to
@@ -770,6 +797,7 @@ fast_exception_return:
770 andi. r0,r3,MSR_PR 797 andi. r0,r3,MSR_PR
771 beq 1f 798 beq 1f
772 ACCOUNT_CPU_USER_EXIT(r2, r4) 799 ACCOUNT_CPU_USER_EXIT(r2, r4)
800 RESTORE_PPR(r2, r4)
773 REST_GPR(13, r1) 801 REST_GPR(13, r1)
7741: 8021:
775 mtspr SPRN_SRR1,r3 803 mtspr SPRN_SRR1,r3
@@ -849,13 +877,22 @@ restore_check_irq_replay:
849 addi r3,r1,STACK_FRAME_OVERHEAD; 877 addi r3,r1,STACK_FRAME_OVERHEAD;
850 bl .timer_interrupt 878 bl .timer_interrupt
851 b .ret_from_except 879 b .ret_from_except
880#ifdef CONFIG_PPC_DOORBELL
8811:
852#ifdef CONFIG_PPC_BOOK3E 882#ifdef CONFIG_PPC_BOOK3E
8531: cmpwi cr0,r3,0x280 883 cmpwi cr0,r3,0x280
884#else
885 BEGIN_FTR_SECTION
886 cmpwi cr0,r3,0xe80
887 FTR_SECTION_ELSE
888 cmpwi cr0,r3,0xa00
889 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
890#endif /* CONFIG_PPC_BOOK3E */
854 bne 1f 891 bne 1f
855 addi r3,r1,STACK_FRAME_OVERHEAD; 892 addi r3,r1,STACK_FRAME_OVERHEAD;
856 bl .doorbell_exception 893 bl .doorbell_exception
857 b .ret_from_except 894 b .ret_from_except
858#endif /* CONFIG_PPC_BOOK3E */ 895#endif /* CONFIG_PPC_DOORBELL */
8591: b .ret_from_except /* What else to do here ? */ 8961: b .ret_from_except /* What else to do here ? */
860 897
861unrecov_restore: 898unrecov_restore:
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 4684e33a26c3..ae54553eacd9 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -159,8 +159,9 @@ exc_##n##_common: \
159 std r9,GPR9(r1); /* save r9 in stackframe */ \ 159 std r9,GPR9(r1); /* save r9 in stackframe */ \
160 std r10,_NIP(r1); /* save SRR0 to stackframe */ \ 160 std r10,_NIP(r1); /* save SRR0 to stackframe */ \
161 std r11,_MSR(r1); /* save SRR1 to stackframe */ \ 161 std r11,_MSR(r1); /* save SRR1 to stackframe */ \
162 beq 2f; /* if from kernel mode */ \
162 ACCOUNT_CPU_USER_ENTRY(r10,r11);/* accounting (uses cr0+eq) */ \ 163 ACCOUNT_CPU_USER_ENTRY(r10,r11);/* accounting (uses cr0+eq) */ \
163 ld r3,excf+EX_R10(r13); /* get back r10 */ \ 1642: ld r3,excf+EX_R10(r13); /* get back r10 */ \
164 ld r4,excf+EX_R11(r13); /* get back r11 */ \ 165 ld r4,excf+EX_R11(r13); /* get back r11 */ \
165 mfspr r5,SPRN_SPRG_GEN_SCRATCH;/* get back r13 */ \ 166 mfspr r5,SPRN_SPRG_GEN_SCRATCH;/* get back r13 */ \
166 std r12,GPR12(r1); /* save r12 in stackframe */ \ 167 std r12,GPR12(r1); /* save r12 in stackframe */ \
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 4665e82fa377..a8a5361fb70c 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -104,7 +104,7 @@ __start_interrupts:
104 104
105 .globl system_reset_pSeries; 105 .globl system_reset_pSeries;
106system_reset_pSeries: 106system_reset_pSeries:
107 HMT_MEDIUM; 107 HMT_MEDIUM_PPR_DISCARD
108 SET_SCRATCH0(r13) 108 SET_SCRATCH0(r13)
109#ifdef CONFIG_PPC_P7_NAP 109#ifdef CONFIG_PPC_P7_NAP
110BEGIN_FTR_SECTION 110BEGIN_FTR_SECTION
@@ -153,12 +153,15 @@ machine_check_pSeries_1:
153 * some code path might still want to branch into the original 153 * some code path might still want to branch into the original
154 * vector 154 * vector
155 */ 155 */
156 b machine_check_pSeries 156 HMT_MEDIUM_PPR_DISCARD
157 SET_SCRATCH0(r13) /* save r13 */
158 EXCEPTION_PROLOG_0(PACA_EXMC)
159 b machine_check_pSeries_0
157 160
158 . = 0x300 161 . = 0x300
159 .globl data_access_pSeries 162 .globl data_access_pSeries
160data_access_pSeries: 163data_access_pSeries:
161 HMT_MEDIUM 164 HMT_MEDIUM_PPR_DISCARD
162 SET_SCRATCH0(r13) 165 SET_SCRATCH0(r13)
163BEGIN_FTR_SECTION 166BEGIN_FTR_SECTION
164 b data_access_check_stab 167 b data_access_check_stab
@@ -170,8 +173,9 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
170 . = 0x380 173 . = 0x380
171 .globl data_access_slb_pSeries 174 .globl data_access_slb_pSeries
172data_access_slb_pSeries: 175data_access_slb_pSeries:
173 HMT_MEDIUM 176 HMT_MEDIUM_PPR_DISCARD
174 SET_SCRATCH0(r13) 177 SET_SCRATCH0(r13)
178 EXCEPTION_PROLOG_0(PACA_EXSLB)
175 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) 179 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
176 std r3,PACA_EXSLB+EX_R3(r13) 180 std r3,PACA_EXSLB+EX_R3(r13)
177 mfspr r3,SPRN_DAR 181 mfspr r3,SPRN_DAR
@@ -201,8 +205,9 @@ data_access_slb_pSeries:
201 . = 0x480 205 . = 0x480
202 .globl instruction_access_slb_pSeries 206 .globl instruction_access_slb_pSeries
203instruction_access_slb_pSeries: 207instruction_access_slb_pSeries:
204 HMT_MEDIUM 208 HMT_MEDIUM_PPR_DISCARD
205 SET_SCRATCH0(r13) 209 SET_SCRATCH0(r13)
210 EXCEPTION_PROLOG_0(PACA_EXSLB)
206 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480) 211 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
207 std r3,PACA_EXSLB+EX_R3(r13) 212 std r3,PACA_EXSLB+EX_R3(r13)
208 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 213 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
@@ -252,7 +257,7 @@ hardware_interrupt_hv:
252 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer) 257 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
253 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) 258 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
254 259
255 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a) 260 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
256 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00) 261 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
257 262
258 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b) 263 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
@@ -284,16 +289,30 @@ system_call_pSeries:
284 */ 289 */
285 . = 0xe00 290 . = 0xe00
286hv_exception_trampoline: 291hv_exception_trampoline:
292 SET_SCRATCH0(r13)
293 EXCEPTION_PROLOG_0(PACA_EXGEN)
287 b h_data_storage_hv 294 b h_data_storage_hv
295
288 . = 0xe20 296 . = 0xe20
297 SET_SCRATCH0(r13)
298 EXCEPTION_PROLOG_0(PACA_EXGEN)
289 b h_instr_storage_hv 299 b h_instr_storage_hv
300
290 . = 0xe40 301 . = 0xe40
302 SET_SCRATCH0(r13)
303 EXCEPTION_PROLOG_0(PACA_EXGEN)
291 b emulation_assist_hv 304 b emulation_assist_hv
292 . = 0xe50 305
293 b hmi_exception_hv
294 . = 0xe60 306 . = 0xe60
307 SET_SCRATCH0(r13)
308 EXCEPTION_PROLOG_0(PACA_EXGEN)
295 b hmi_exception_hv 309 b hmi_exception_hv
296 310
311 . = 0xe80
312 SET_SCRATCH0(r13)
313 EXCEPTION_PROLOG_0(PACA_EXGEN)
314 b h_doorbell_hv
315
297 /* We need to deal with the Altivec unavailable exception 316 /* We need to deal with the Altivec unavailable exception
298 * here which is at 0xf20, thus in the middle of the 317 * here which is at 0xf20, thus in the middle of the
299 * prolog code of the PerformanceMonitor one. A little 318 * prolog code of the PerformanceMonitor one. A little
@@ -301,16 +320,27 @@ hv_exception_trampoline:
301 */ 320 */
302performance_monitor_pSeries_1: 321performance_monitor_pSeries_1:
303 . = 0xf00 322 . = 0xf00
323 SET_SCRATCH0(r13)
324 EXCEPTION_PROLOG_0(PACA_EXGEN)
304 b performance_monitor_pSeries 325 b performance_monitor_pSeries
305 326
306altivec_unavailable_pSeries_1: 327altivec_unavailable_pSeries_1:
307 . = 0xf20 328 . = 0xf20
329 SET_SCRATCH0(r13)
330 EXCEPTION_PROLOG_0(PACA_EXGEN)
308 b altivec_unavailable_pSeries 331 b altivec_unavailable_pSeries
309 332
310vsx_unavailable_pSeries_1: 333vsx_unavailable_pSeries_1:
311 . = 0xf40 334 . = 0xf40
335 SET_SCRATCH0(r13)
336 EXCEPTION_PROLOG_0(PACA_EXGEN)
312 b vsx_unavailable_pSeries 337 b vsx_unavailable_pSeries
313 338
339 . = 0xf60
340 SET_SCRATCH0(r13)
341 EXCEPTION_PROLOG_0(PACA_EXGEN)
342 b tm_unavailable_pSeries
343
314#ifdef CONFIG_CBE_RAS 344#ifdef CONFIG_CBE_RAS
315 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) 345 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
316 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) 346 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
@@ -322,11 +352,9 @@ vsx_unavailable_pSeries_1:
322 . = 0x1500 352 . = 0x1500
323 .global denorm_exception_hv 353 .global denorm_exception_hv
324denorm_exception_hv: 354denorm_exception_hv:
325 HMT_MEDIUM 355 HMT_MEDIUM_PPR_DISCARD
326 mtspr SPRN_SPRG_HSCRATCH0,r13 356 mtspr SPRN_SPRG_HSCRATCH0,r13
327 mfspr r13,SPRN_SPRG_HPACA 357 EXCEPTION_PROLOG_0(PACA_EXGEN)
328 std r9,PACA_EXGEN+EX_R9(r13)
329 std r10,PACA_EXGEN+EX_R10(r13)
330 std r11,PACA_EXGEN+EX_R11(r13) 358 std r11,PACA_EXGEN+EX_R11(r13)
331 std r12,PACA_EXGEN+EX_R12(r13) 359 std r12,PACA_EXGEN+EX_R12(r13)
332 mfspr r9,SPRN_SPRG_HSCRATCH0 360 mfspr r9,SPRN_SPRG_HSCRATCH0
@@ -367,10 +395,12 @@ denorm_exception_hv:
367machine_check_pSeries: 395machine_check_pSeries:
368 .globl machine_check_fwnmi 396 .globl machine_check_fwnmi
369machine_check_fwnmi: 397machine_check_fwnmi:
370 HMT_MEDIUM 398 HMT_MEDIUM_PPR_DISCARD
371 SET_SCRATCH0(r13) /* save r13 */ 399 SET_SCRATCH0(r13) /* save r13 */
372 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common, 400 EXCEPTION_PROLOG_0(PACA_EXMC)
373 EXC_STD, KVMTEST, 0x200) 401machine_check_pSeries_0:
402 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
403 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
374 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) 404 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
375 405
376 /* moved from 0x300 */ 406 /* moved from 0x300 */
@@ -496,6 +526,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
496 mtspr SPRN_HSRR0,r11 526 mtspr SPRN_HSRR0,r11
497 mtcrf 0x80,r9 527 mtcrf 0x80,r9
498 ld r9,PACA_EXGEN+EX_R9(r13) 528 ld r9,PACA_EXGEN+EX_R9(r13)
529 RESTORE_PPR_PACA(PACA_EXGEN, r10)
499 ld r10,PACA_EXGEN+EX_R10(r13) 530 ld r10,PACA_EXGEN+EX_R10(r13)
500 ld r11,PACA_EXGEN+EX_R11(r13) 531 ld r11,PACA_EXGEN+EX_R11(r13)
501 ld r12,PACA_EXGEN+EX_R12(r13) 532 ld r12,PACA_EXGEN+EX_R12(r13)
@@ -506,28 +537,34 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
506 537
507 .align 7 538 .align 7
508 /* moved from 0xe00 */ 539 /* moved from 0xe00 */
509 STD_EXCEPTION_HV(., 0xe02, h_data_storage) 540 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
510 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) 541 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
511 STD_EXCEPTION_HV(., 0xe22, h_instr_storage) 542 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
512 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) 543 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
513 STD_EXCEPTION_HV(., 0xe42, emulation_assist) 544 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
514 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) 545 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
515 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */ 546 STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
516 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) 547 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
548 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
549 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
517 550
518 /* moved from 0xf00 */ 551 /* moved from 0xf00 */
519 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor) 552 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
520 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00) 553 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
521 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable) 554 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
522 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20) 555 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
523 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable) 556 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
524 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40) 557 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
558 STD_EXCEPTION_PSERIES_OOL(0xf60, tm_unavailable)
559 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
525 560
526/* 561/*
527 * An interrupt came in while soft-disabled. We set paca->irq_happened, 562 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
528 * then, if it was a decrementer interrupt, we bump the dec to max and 563 * - If it was a decrementer interrupt, we bump the dec to max and and return.
529 * and return, else we hard disable and return. This is called with 564 * - If it was a doorbell we return immediately since doorbells are edge
530 * r10 containing the value to OR to the paca field. 565 * triggered and won't automatically refire.
566 * - else we hard disable and return.
567 * This is called with r10 containing the value to OR to the paca field.
531 */ 568 */
532#define MASKED_INTERRUPT(_H) \ 569#define MASKED_INTERRUPT(_H) \
533masked_##_H##interrupt: \ 570masked_##_H##interrupt: \
@@ -535,13 +572,15 @@ masked_##_H##interrupt: \
535 lbz r11,PACAIRQHAPPENED(r13); \ 572 lbz r11,PACAIRQHAPPENED(r13); \
536 or r11,r11,r10; \ 573 or r11,r11,r10; \
537 stb r11,PACAIRQHAPPENED(r13); \ 574 stb r11,PACAIRQHAPPENED(r13); \
538 andi. r10,r10,PACA_IRQ_DEC; \ 575 cmpwi r10,PACA_IRQ_DEC; \
539 beq 1f; \ 576 bne 1f; \
540 lis r10,0x7fff; \ 577 lis r10,0x7fff; \
541 ori r10,r10,0xffff; \ 578 ori r10,r10,0xffff; \
542 mtspr SPRN_DEC,r10; \ 579 mtspr SPRN_DEC,r10; \
543 b 2f; \ 580 b 2f; \
5441: mfspr r10,SPRN_##_H##SRR1; \ 5811: cmpwi r10,PACA_IRQ_DBELL; \
582 beq 2f; \
583 mfspr r10,SPRN_##_H##SRR1; \
545 rldicl r10,r10,48,1; /* clear MSR_EE */ \ 584 rldicl r10,r10,48,1; /* clear MSR_EE */ \
546 rotldi r10,r10,16; \ 585 rotldi r10,r10,16; \
547 mtspr SPRN_##_H##SRR1,r10; \ 586 mtspr SPRN_##_H##SRR1,r10; \
@@ -558,8 +597,8 @@ masked_##_H##interrupt: \
558 597
559/* 598/*
560 * Called from arch_local_irq_enable when an interrupt needs 599 * Called from arch_local_irq_enable when an interrupt needs
561 * to be resent. r3 contains 0x500 or 0x900 to indicate which 600 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
562 * kind of interrupt. MSR:EE is already off. We generate a 601 * which kind of interrupt. MSR:EE is already off. We generate a
563 * stackframe like if a real interrupt had happened. 602 * stackframe like if a real interrupt had happened.
564 * 603 *
565 * Note: While MSR:EE is off, we need to make sure that _MSR 604 * Note: While MSR:EE is off, we need to make sure that _MSR
@@ -575,9 +614,18 @@ _GLOBAL(__replay_interrupt)
575 mflr r11 614 mflr r11
576 mfcr r9 615 mfcr r9
577 ori r12,r12,MSR_EE 616 ori r12,r12,MSR_EE
578 andi. r3,r3,0x0800 617 cmpwi r3,0x900
579 bne decrementer_common 618 beq decrementer_common
580 b hardware_interrupt_common 619 cmpwi r3,0x500
620 beq hardware_interrupt_common
621BEGIN_FTR_SECTION
622 cmpwi r3,0xe80
623 beq h_doorbell_common
624FTR_SECTION_ELSE
625 cmpwi r3,0xa00
626 beq doorbell_super_common
627ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
628 blr
581 629
582#ifdef CONFIG_PPC_PSERIES 630#ifdef CONFIG_PPC_PSERIES
583/* 631/*
@@ -586,7 +634,7 @@ _GLOBAL(__replay_interrupt)
586 .globl system_reset_fwnmi 634 .globl system_reset_fwnmi
587 .align 7 635 .align 7
588system_reset_fwnmi: 636system_reset_fwnmi:
589 HMT_MEDIUM 637 HMT_MEDIUM_PPR_DISCARD
590 SET_SCRATCH0(r13) /* save r13 */ 638 SET_SCRATCH0(r13) /* save r13 */
591 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 639 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
592 NOTEST, 0x100) 640 NOTEST, 0x100)
@@ -651,12 +699,21 @@ machine_check_common:
651 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) 699 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
652 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt) 700 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
653 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt) 701 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
654 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception) 702#ifdef CONFIG_PPC_DOORBELL
703 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
704#else
705 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
706#endif
655 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception) 707 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
656 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception) 708 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
657 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception) 709 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
658 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception) 710 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
659 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception) 711 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
712#ifdef CONFIG_PPC_DOORBELL
713 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
714#else
715 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
716#endif
660 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception) 717 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
661 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception) 718 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
662 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception) 719 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
@@ -690,8 +747,8 @@ machine_check_common:
690 . = 0x4380 747 . = 0x4380
691 .globl data_access_slb_relon_pSeries 748 .globl data_access_slb_relon_pSeries
692data_access_slb_relon_pSeries: 749data_access_slb_relon_pSeries:
693 HMT_MEDIUM
694 SET_SCRATCH0(r13) 750 SET_SCRATCH0(r13)
751 EXCEPTION_PROLOG_0(PACA_EXSLB)
695 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) 752 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
696 std r3,PACA_EXSLB+EX_R3(r13) 753 std r3,PACA_EXSLB+EX_R3(r13)
697 mfspr r3,SPRN_DAR 754 mfspr r3,SPRN_DAR
@@ -715,8 +772,8 @@ data_access_slb_relon_pSeries:
715 . = 0x4480 772 . = 0x4480
716 .globl instruction_access_slb_relon_pSeries 773 .globl instruction_access_slb_relon_pSeries
717instruction_access_slb_relon_pSeries: 774instruction_access_slb_relon_pSeries:
718 HMT_MEDIUM
719 SET_SCRATCH0(r13) 775 SET_SCRATCH0(r13)
776 EXCEPTION_PROLOG_0(PACA_EXSLB)
720 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) 777 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
721 std r3,PACA_EXSLB+EX_R3(r13) 778 std r3,PACA_EXSLB+EX_R3(r13)
722 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 779 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
@@ -746,6 +803,7 @@ hardware_interrupt_relon_hv:
746 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) 803 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
747 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) 804 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
748 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) 805 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
806 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
749 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) 807 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
750 808
751 . = 0x4c00 809 . = 0x4c00
@@ -759,56 +817,64 @@ system_call_relon_pSeries:
759 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) 817 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
760 818
761 . = 0x4e00 819 . = 0x4e00
820 SET_SCRATCH0(r13)
821 EXCEPTION_PROLOG_0(PACA_EXGEN)
762 b h_data_storage_relon_hv 822 b h_data_storage_relon_hv
763 823
764 . = 0x4e20 824 . = 0x4e20
825 SET_SCRATCH0(r13)
826 EXCEPTION_PROLOG_0(PACA_EXGEN)
765 b h_instr_storage_relon_hv 827 b h_instr_storage_relon_hv
766 828
767 . = 0x4e40 829 . = 0x4e40
830 SET_SCRATCH0(r13)
831 EXCEPTION_PROLOG_0(PACA_EXGEN)
768 b emulation_assist_relon_hv 832 b emulation_assist_relon_hv
769 833
770 . = 0x4e50
771 b hmi_exception_relon_hv
772
773 . = 0x4e60 834 . = 0x4e60
835 SET_SCRATCH0(r13)
836 EXCEPTION_PROLOG_0(PACA_EXGEN)
774 b hmi_exception_relon_hv 837 b hmi_exception_relon_hv
775 838
776 /* For when we support the doorbell interrupt: 839 . = 0x4e80
777 STD_RELON_EXCEPTION_HYPERVISOR(0x4e80, 0xe80, doorbell_hyper) 840 SET_SCRATCH0(r13)
778 */ 841 EXCEPTION_PROLOG_0(PACA_EXGEN)
842 b h_doorbell_relon_hv
779 843
780performance_monitor_relon_pSeries_1: 844performance_monitor_relon_pSeries_1:
781 . = 0x4f00 845 . = 0x4f00
846 SET_SCRATCH0(r13)
847 EXCEPTION_PROLOG_0(PACA_EXGEN)
782 b performance_monitor_relon_pSeries 848 b performance_monitor_relon_pSeries
783 849
784altivec_unavailable_relon_pSeries_1: 850altivec_unavailable_relon_pSeries_1:
785 . = 0x4f20 851 . = 0x4f20
852 SET_SCRATCH0(r13)
853 EXCEPTION_PROLOG_0(PACA_EXGEN)
786 b altivec_unavailable_relon_pSeries 854 b altivec_unavailable_relon_pSeries
787 855
788vsx_unavailable_relon_pSeries_1: 856vsx_unavailable_relon_pSeries_1:
789 . = 0x4f40 857 . = 0x4f40
858 SET_SCRATCH0(r13)
859 EXCEPTION_PROLOG_0(PACA_EXGEN)
790 b vsx_unavailable_relon_pSeries 860 b vsx_unavailable_relon_pSeries
791 861
792#ifdef CONFIG_CBE_RAS 862tm_unavailable_relon_pSeries_1:
793 STD_RELON_EXCEPTION_HV(0x5200, 0x1202, cbe_system_error) 863 . = 0x4f60
794#endif /* CONFIG_CBE_RAS */ 864 SET_SCRATCH0(r13)
865 EXCEPTION_PROLOG_0(PACA_EXGEN)
866 b tm_unavailable_relon_pSeries
867
795 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) 868 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
796#ifdef CONFIG_PPC_DENORMALISATION 869#ifdef CONFIG_PPC_DENORMALISATION
797 . = 0x5500 870 . = 0x5500
798 b denorm_exception_hv 871 b denorm_exception_hv
799#endif 872#endif
800#ifdef CONFIG_CBE_RAS
801 STD_RELON_EXCEPTION_HV(0x5600, 0x1602, cbe_maintenance)
802#else
803#ifdef CONFIG_HVC_SCOM 873#ifdef CONFIG_HVC_SCOM
804 STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt) 874 STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt)
805 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600) 875 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600)
806#endif /* CONFIG_HVC_SCOM */ 876#endif /* CONFIG_HVC_SCOM */
807#endif /* CONFIG_CBE_RAS */
808 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) 877 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
809#ifdef CONFIG_CBE_RAS
810 STD_RELON_EXCEPTION_HV(0x5800, 0x1802, cbe_thermal)
811#endif /* CONFIG_CBE_RAS */
812 878
813 /* Other future vectors */ 879 /* Other future vectors */
814 .align 7 880 .align 7
@@ -1036,6 +1102,7 @@ _GLOBAL(slb_miss_realmode)
1036 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ 1102 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1037.machine pop 1103.machine pop
1038 1104
1105 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1039 ld r9,PACA_EXSLB+EX_R9(r13) 1106 ld r9,PACA_EXSLB+EX_R9(r13)
1040 ld r10,PACA_EXSLB+EX_R10(r13) 1107 ld r10,PACA_EXSLB+EX_R10(r13)
1041 ld r11,PACA_EXSLB+EX_R11(r13) 1108 ld r11,PACA_EXSLB+EX_R11(r13)
@@ -1109,9 +1176,26 @@ fp_unavailable_common:
1109 addi r3,r1,STACK_FRAME_OVERHEAD 1176 addi r3,r1,STACK_FRAME_OVERHEAD
1110 bl .kernel_fp_unavailable_exception 1177 bl .kernel_fp_unavailable_exception
1111 BUG_OPCODE 1178 BUG_OPCODE
11121: bl .load_up_fpu 11791:
1180#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1181BEGIN_FTR_SECTION
1182 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1183 * transaction), go do TM stuff
1184 */
1185 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1186 bne- 2f
1187END_FTR_SECTION_IFSET(CPU_FTR_TM)
1188#endif
1189 bl .load_up_fpu
1113 b fast_exception_return 1190 b fast_exception_return
1114 1191#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
11922: /* User process was in a transaction */
1193 bl .save_nvgprs
1194 DISABLE_INTS
1195 addi r3,r1,STACK_FRAME_OVERHEAD
1196 bl .fp_unavailable_tm
1197 b .ret_from_except
1198#endif
1115 .align 7 1199 .align 7
1116 .globl altivec_unavailable_common 1200 .globl altivec_unavailable_common
1117altivec_unavailable_common: 1201altivec_unavailable_common:
@@ -1119,8 +1203,25 @@ altivec_unavailable_common:
1119#ifdef CONFIG_ALTIVEC 1203#ifdef CONFIG_ALTIVEC
1120BEGIN_FTR_SECTION 1204BEGIN_FTR_SECTION
1121 beq 1f 1205 beq 1f
1206#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1207 BEGIN_FTR_SECTION_NESTED(69)
1208 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1209 * transaction), go do TM stuff
1210 */
1211 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1212 bne- 2f
1213 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1214#endif
1122 bl .load_up_altivec 1215 bl .load_up_altivec
1123 b fast_exception_return 1216 b fast_exception_return
1217#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
12182: /* User process was in a transaction */
1219 bl .save_nvgprs
1220 DISABLE_INTS
1221 addi r3,r1,STACK_FRAME_OVERHEAD
1222 bl .altivec_unavailable_tm
1223 b .ret_from_except
1224#endif
11241: 12251:
1125END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 1226END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1126#endif 1227#endif
@@ -1137,7 +1238,24 @@ vsx_unavailable_common:
1137#ifdef CONFIG_VSX 1238#ifdef CONFIG_VSX
1138BEGIN_FTR_SECTION 1239BEGIN_FTR_SECTION
1139 beq 1f 1240 beq 1f
1241#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1242 BEGIN_FTR_SECTION_NESTED(69)
1243 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1244 * transaction), go do TM stuff
1245 */
1246 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1247 bne- 2f
1248 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1249#endif
1140 b .load_up_vsx 1250 b .load_up_vsx
1251#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
12522: /* User process was in a transaction */
1253 bl .save_nvgprs
1254 DISABLE_INTS
1255 addi r3,r1,STACK_FRAME_OVERHEAD
1256 bl .vsx_unavailable_tm
1257 b .ret_from_except
1258#endif
11411: 12591:
1142END_FTR_SECTION_IFSET(CPU_FTR_VSX) 1260END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1143#endif 1261#endif
@@ -1148,9 +1266,75 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1148 b .ret_from_except 1266 b .ret_from_except
1149 1267
1150 .align 7 1268 .align 7
1269 .globl tm_unavailable_common
1270tm_unavailable_common:
1271 EXCEPTION_PROLOG_COMMON(0xf60, PACA_EXGEN)
1272 bl .save_nvgprs
1273 DISABLE_INTS
1274 addi r3,r1,STACK_FRAME_OVERHEAD
1275 bl .tm_unavailable_exception
1276 b .ret_from_except
1277
1278 .align 7
1151 .globl __end_handlers 1279 .globl __end_handlers
1152__end_handlers: 1280__end_handlers:
1153 1281
1282 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1283 STD_RELON_EXCEPTION_HV_OOL(0xe00, h_data_storage)
1284 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe00)
1285 STD_RELON_EXCEPTION_HV_OOL(0xe20, h_instr_storage)
1286 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe20)
1287 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1288 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe40)
1289 STD_RELON_EXCEPTION_HV_OOL(0xe60, hmi_exception)
1290 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe60)
1291 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1292 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe80)
1293
1294 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1295 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1296 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1297 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, tm_unavailable)
1298
1299#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1300/*
1301 * Data area reserved for FWNMI option.
1302 * This address (0x7000) is fixed by the RPA.
1303 */
1304 .= 0x7000
1305 .globl fwnmi_data_area
1306fwnmi_data_area:
1307
1308 /* pseries and powernv need to keep the whole page from
1309 * 0x7000 to 0x8000 free for use by the firmware
1310 */
1311 . = 0x8000
1312#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1313
1314/* Space for CPU0's segment table */
1315 .balign 4096
1316 .globl initial_stab
1317initial_stab:
1318 .space 4096
1319
1320#ifdef CONFIG_PPC_POWERNV
1321_GLOBAL(opal_mc_secondary_handler)
1322 HMT_MEDIUM_PPR_DISCARD
1323 SET_SCRATCH0(r13)
1324 GET_PACA(r13)
1325 clrldi r3,r3,2
1326 tovirt(r3,r3)
1327 std r3,PACA_OPAL_MC_EVT(r13)
1328 ld r13,OPAL_MC_SRR0(r3)
1329 mtspr SPRN_SRR0,r13
1330 ld r13,OPAL_MC_SRR1(r3)
1331 mtspr SPRN_SRR1,r13
1332 ld r3,OPAL_MC_GPR3(r3)
1333 GET_SCRATCH0(r13)
1334 b machine_check_pSeries
1335#endif /* CONFIG_PPC_POWERNV */
1336
1337
1154/* 1338/*
1155 * Hash table stuff 1339 * Hash table stuff
1156 */ 1340 */
@@ -1222,7 +1406,7 @@ handle_dabr_fault:
1222 ld r4,_DAR(r1) 1406 ld r4,_DAR(r1)
1223 ld r5,_DSISR(r1) 1407 ld r5,_DSISR(r1)
1224 addi r3,r1,STACK_FRAME_OVERHEAD 1408 addi r3,r1,STACK_FRAME_OVERHEAD
1225 bl .do_dabr 1409 bl .do_break
122612: b .ret_from_except_lite 141012: b .ret_from_except_lite
1227 1411
1228 1412
@@ -1344,56 +1528,3 @@ _GLOBAL(do_stab_bolted)
1344 ld r13,PACA_EXSLB+EX_R13(r13) 1528 ld r13,PACA_EXSLB+EX_R13(r13)
1345 rfid 1529 rfid
1346 b . /* prevent speculative execution */ 1530 b . /* prevent speculative execution */
1347
1348
1349 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1350 STD_RELON_EXCEPTION_HV(., 0xe00, h_data_storage)
1351 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe00)
1352 STD_RELON_EXCEPTION_HV(., 0xe20, h_instr_storage)
1353 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe20)
1354 STD_RELON_EXCEPTION_HV(., 0xe40, emulation_assist)
1355 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe40)
1356 STD_RELON_EXCEPTION_HV(., 0xe60, hmi_exception)
1357 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe60)
1358
1359 STD_RELON_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
1360 STD_RELON_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
1361 STD_RELON_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
1362
1363#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1364/*
1365 * Data area reserved for FWNMI option.
1366 * This address (0x7000) is fixed by the RPA.
1367 */
1368 .= 0x7000
1369 .globl fwnmi_data_area
1370fwnmi_data_area:
1371
1372 /* pseries and powernv need to keep the whole page from
1373 * 0x7000 to 0x8000 free for use by the firmware
1374 */
1375 . = 0x8000
1376#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1377
1378/* Space for CPU0's segment table */
1379 .balign 4096
1380 .globl initial_stab
1381initial_stab:
1382 .space 4096
1383
1384#ifdef CONFIG_PPC_POWERNV
1385_GLOBAL(opal_mc_secondary_handler)
1386 HMT_MEDIUM
1387 SET_SCRATCH0(r13)
1388 GET_PACA(r13)
1389 clrldi r3,r3,2
1390 tovirt(r3,r3)
1391 std r3,PACA_OPAL_MC_EVT(r13)
1392 ld r13,OPAL_MC_SRR0(r3)
1393 mtspr SPRN_SRR0,r13
1394 ld r13,OPAL_MC_SRR1(r3)
1395 mtspr SPRN_SRR1,r13
1396 ld r3,OPAL_MC_GPR3(r3)
1397 GET_SCRATCH0(r13)
1398 b machine_check_pSeries
1399#endif /* CONFIG_PPC_POWERNV */
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index e0ada05f2df3..caeaabf11a2f 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -35,6 +35,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
352: REST_32VSRS(n,c,base); \ 352: REST_32VSRS(n,c,base); \
363: 363:
37 37
38#define __REST_32FPVSRS_TRANSACT(n,c,base) \
39BEGIN_FTR_SECTION \
40 b 2f; \
41END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
42 REST_32FPRS_TRANSACT(n,base); \
43 b 3f; \
442: REST_32VSRS_TRANSACT(n,c,base); \
453:
46
38#define __SAVE_32FPVSRS(n,c,base) \ 47#define __SAVE_32FPVSRS(n,c,base) \
39BEGIN_FTR_SECTION \ 48BEGIN_FTR_SECTION \
40 b 2f; \ 49 b 2f; \
@@ -45,11 +54,68 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
453: 543:
46#else 55#else
47#define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) 56#define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
57#define __REST_32FPVSRS_TRANSACT(n,b,base) REST_32FPRS(n, base)
48#define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) 58#define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
49#endif 59#endif
50#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) 60#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
61#define REST_32FPVSRS_TRANSACT(n,c,base) \
62 __REST_32FPVSRS_TRANSACT(n,__REG_##c,__REG_##base)
51#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) 63#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)
52 64
65#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
66/*
67 * Wrapper to call load_up_fpu from C.
68 * void do_load_up_fpu(struct pt_regs *regs);
69 */
70_GLOBAL(do_load_up_fpu)
71 mflr r0
72 std r0, 16(r1)
73 stdu r1, -112(r1)
74
75 subi r6, r3, STACK_FRAME_OVERHEAD
76 /* load_up_fpu expects r12=MSR, r13=PACA, and returns
77 * with r12 = new MSR.
78 */
79 ld r12,_MSR(r6)
80 GET_PACA(r13)
81
82 bl load_up_fpu
83 std r12,_MSR(r6)
84
85 ld r0, 112+16(r1)
86 addi r1, r1, 112
87 mtlr r0
88 blr
89
90
91/* void do_load_up_transact_fpu(struct thread_struct *thread)
92 *
93 * This is similar to load_up_fpu but for the transactional version of the FP
94 * register set. It doesn't mess with the task MSR or valid flags.
95 * Furthermore, we don't do lazy FP with TM currently.
96 */
97_GLOBAL(do_load_up_transact_fpu)
98 mfmsr r6
99 ori r5,r6,MSR_FP
100#ifdef CONFIG_VSX
101BEGIN_FTR_SECTION
102 oris r5,r5,MSR_VSX@h
103END_FTR_SECTION_IFSET(CPU_FTR_VSX)
104#endif
105 SYNC
106 MTMSRD(r5)
107
108 lfd fr0,THREAD_TRANSACT_FPSCR(r3)
109 MTFSF_L(fr0)
110 REST_32FPVSRS_TRANSACT(0, R4, R3)
111
112 /* FP/VSX off again */
113 MTMSRD(r6)
114 SYNC
115
116 blr
117#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
118
53/* 119/*
54 * This task wants to use the FPU now. 120 * This task wants to use the FPU now.
55 * On UP, disable FP for the task which had the FPU previously, 121 * On UP, disable FP for the task which had the FPU previously,
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 4989661b710b..8a9b6f59822d 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -430,30 +430,18 @@ label:
430 EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE) 430 EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
431 431
432/* 0x1000 - Programmable Interval Timer (PIT) Exception */ 432/* 0x1000 - Programmable Interval Timer (PIT) Exception */
433 START_EXCEPTION(0x1000, Decrementer) 433 . = 0x1000
434 NORMAL_EXCEPTION_PROLOG 434 b Decrementer
435 lis r0,TSR_PIS@h
436 mtspr SPRN_TSR,r0 /* Clear the PIT exception */
437 addi r3,r1,STACK_FRAME_OVERHEAD
438 EXC_XFER_LITE(0x1000, timer_interrupt)
439
440#if 0
441/* NOTE:
442 * FIT and WDT handlers are not implemented yet.
443 */
444 435
445/* 0x1010 - Fixed Interval Timer (FIT) Exception 436/* 0x1010 - Fixed Interval Timer (FIT) Exception
446*/ 437*/
447 STND_EXCEPTION(0x1010, FITException, unknown_exception) 438 . = 0x1010
439 b FITException
448 440
449/* 0x1020 - Watchdog Timer (WDT) Exception 441/* 0x1020 - Watchdog Timer (WDT) Exception
450*/ 442*/
451#ifdef CONFIG_BOOKE_WDT 443 . = 0x1020
452 CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException) 444 b WDTException
453#else
454 CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
455#endif
456#endif
457 445
458/* 0x1100 - Data TLB Miss Exception 446/* 0x1100 - Data TLB Miss Exception
459 * As the name implies, translation is not in the MMU, so search the 447 * As the name implies, translation is not in the MMU, so search the
@@ -738,6 +726,29 @@ label:
738 (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \ 726 (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
739 NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) 727 NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
740 728
729 /* Programmable Interval Timer (PIT) Exception. (from 0x1000) */
730Decrementer:
731 NORMAL_EXCEPTION_PROLOG
732 lis r0,TSR_PIS@h
733 mtspr SPRN_TSR,r0 /* Clear the PIT exception */
734 addi r3,r1,STACK_FRAME_OVERHEAD
735 EXC_XFER_LITE(0x1000, timer_interrupt)
736
737 /* Fixed Interval Timer (FIT) Exception. (from 0x1010) */
738FITException:
739 NORMAL_EXCEPTION_PROLOG
740 addi r3,r1,STACK_FRAME_OVERHEAD;
741 EXC_XFER_EE(0x1010, unknown_exception)
742
743 /* Watchdog Timer (WDT) Exception. (from 0x1020) */
744WDTException:
745 CRITICAL_EXCEPTION_PROLOG;
746 addi r3,r1,STACK_FRAME_OVERHEAD;
747 EXC_XFER_TEMPLATE(WatchdogException, 0x1020+2,
748 (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)),
749 NOCOPY, crit_transfer_to_handler,
750 ret_from_crit_exc)
751
741/* 752/*
742 * The other Data TLB exceptions bail out to this point 753 * The other Data TLB exceptions bail out to this point
743 * if they can't resolve the lightweight TLB fault. 754 * if they can't resolve the lightweight TLB fault.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 116f0868695b..0886ae6dd5be 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -122,6 +122,8 @@ __secondary_hold:
122#endif 122#endif
123 /* Grab our physical cpu number */ 123 /* Grab our physical cpu number */
124 mr r24,r3 124 mr r24,r3
125 /* stash r4 for book3e */
126 mr r25,r4
125 127
126 /* Tell the master cpu we're here */ 128 /* Tell the master cpu we're here */
127 /* Relocation is off & we are located at an address less */ 129 /* Relocation is off & we are located at an address less */
@@ -129,16 +131,31 @@ __secondary_hold:
129 std r24,__secondary_hold_acknowledge-_stext(0) 131 std r24,__secondary_hold_acknowledge-_stext(0)
130 sync 132 sync
131 133
134 li r26,0
135#ifdef CONFIG_PPC_BOOK3E
136 tovirt(r26,r26)
137#endif
132 /* All secondary cpus wait here until told to start. */ 138 /* All secondary cpus wait here until told to start. */
133100: ld r4,__secondary_hold_spinloop-_stext(0) 139100: ld r4,__secondary_hold_spinloop-_stext(r26)
134 cmpdi 0,r4,0 140 cmpdi 0,r4,0
135 beq 100b 141 beq 100b
136 142
137#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 143#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
144#ifdef CONFIG_PPC_BOOK3E
145 tovirt(r4,r4)
146#endif
138 ld r4,0(r4) /* deref function descriptor */ 147 ld r4,0(r4) /* deref function descriptor */
139 mtctr r4 148 mtctr r4
140 mr r3,r24 149 mr r3,r24
150 /*
151 * it may be the case that other platforms have r4 right to
152 * begin with, this gives us some safety in case it is not
153 */
154#ifdef CONFIG_PPC_BOOK3E
155 mr r4,r25
156#else
141 li r4,0 157 li r4,0
158#endif
142 /* Make sure that patched code is visible */ 159 /* Make sure that patched code is visible */
143 isync 160 isync
144 bctr 161 bctr
@@ -169,6 +186,7 @@ _GLOBAL(generic_secondary_thread_init)
169 186
170 /* get a valid TOC pointer, wherever we're mapped at */ 187 /* get a valid TOC pointer, wherever we're mapped at */
171 bl .relative_toc 188 bl .relative_toc
189 tovirt(r2,r2)
172 190
173#ifdef CONFIG_PPC_BOOK3E 191#ifdef CONFIG_PPC_BOOK3E
174 /* Book3E initialization */ 192 /* Book3E initialization */
@@ -195,6 +213,7 @@ _GLOBAL(generic_secondary_smp_init)
195 213
196 /* get a valid TOC pointer, wherever we're mapped at */ 214 /* get a valid TOC pointer, wherever we're mapped at */
197 bl .relative_toc 215 bl .relative_toc
216 tovirt(r2,r2)
198 217
199#ifdef CONFIG_PPC_BOOK3E 218#ifdef CONFIG_PPC_BOOK3E
200 /* Book3E initialization */ 219 /* Book3E initialization */
@@ -531,6 +550,7 @@ _GLOBAL(pmac_secondary_start)
531 550
532 /* get TOC pointer (real address) */ 551 /* get TOC pointer (real address) */
533 bl .relative_toc 552 bl .relative_toc
553 tovirt(r2,r2)
534 554
535 /* Copy some CPU settings from CPU 0 */ 555 /* Copy some CPU settings from CPU 0 */
536 bl .__restore_cpu_ppc970 556 bl .__restore_cpu_ppc970
@@ -665,6 +685,13 @@ _GLOBAL(enable_64b_mode)
665 * This puts the TOC pointer into r2, offset by 0x8000 (as expected 685 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
666 * by the toolchain). It computes the correct value for wherever we 686 * by the toolchain). It computes the correct value for wherever we
667 * are running at the moment, using position-independent code. 687 * are running at the moment, using position-independent code.
688 *
689 * Note: The compiler constructs pointers using offsets from the
690 * TOC in -mcmodel=medium mode. After we relocate to 0 but before
691 * the MMU is on we need our TOC to be a virtual address otherwise
692 * these pointers will be real addresses which may get stored and
693 * accessed later with the MMU on. We use tovirt() at the call
694 * sites to handle this.
668 */ 695 */
669_GLOBAL(relative_toc) 696_GLOBAL(relative_toc)
670 mflr r0 697 mflr r0
@@ -681,8 +708,9 @@ p_toc: .llong __toc_start + 0x8000 - 0b
681 * This is where the main kernel code starts. 708 * This is where the main kernel code starts.
682 */ 709 */
683_INIT_STATIC(start_here_multiplatform) 710_INIT_STATIC(start_here_multiplatform)
684 /* set up the TOC (real address) */ 711 /* set up the TOC */
685 bl .relative_toc 712 bl .relative_toc
713 tovirt(r2,r2)
686 714
687 /* Clear out the BSS. It may have been done in prom_init, 715 /* Clear out the BSS. It may have been done in prom_init,
688 * already but that's irrelevant since prom_init will soon 716 * already but that's irrelevant since prom_init will soon
diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c
index a89cae481b04..a949bdfc9623 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -73,7 +73,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
73 * If so, DABR will be populated in single_step_dabr_instruction(). 73 * If so, DABR will be populated in single_step_dabr_instruction().
74 */ 74 */
75 if (current->thread.last_hit_ubp != bp) 75 if (current->thread.last_hit_ubp != bp)
76 set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx); 76 set_breakpoint(info);
77 77
78 return 0; 78 return 0;
79} 79}
@@ -97,7 +97,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp)
97 } 97 }
98 98
99 *slot = NULL; 99 *slot = NULL;
100 set_dabr(0, 0); 100 hw_breakpoint_disable();
101} 101}
102 102
103/* 103/*
@@ -127,19 +127,13 @@ int arch_check_bp_in_kernelspace(struct perf_event *bp)
127 127
128int arch_bp_generic_fields(int type, int *gen_bp_type) 128int arch_bp_generic_fields(int type, int *gen_bp_type)
129{ 129{
130 switch (type) { 130 *gen_bp_type = 0;
131 case DABR_DATA_READ: 131 if (type & HW_BRK_TYPE_READ)
132 *gen_bp_type = HW_BREAKPOINT_R; 132 *gen_bp_type |= HW_BREAKPOINT_R;
133 break; 133 if (type & HW_BRK_TYPE_WRITE)
134 case DABR_DATA_WRITE: 134 *gen_bp_type |= HW_BREAKPOINT_W;
135 *gen_bp_type = HW_BREAKPOINT_W; 135 if (*gen_bp_type == 0)
136 break;
137 case (DABR_DATA_WRITE | DABR_DATA_READ):
138 *gen_bp_type = (HW_BREAKPOINT_W | HW_BREAKPOINT_R);
139 break;
140 default:
141 return -EINVAL; 136 return -EINVAL;
142 }
143 return 0; 137 return 0;
144} 138}
145 139
@@ -148,35 +142,28 @@ int arch_bp_generic_fields(int type, int *gen_bp_type)
148 */ 142 */
149int arch_validate_hwbkpt_settings(struct perf_event *bp) 143int arch_validate_hwbkpt_settings(struct perf_event *bp)
150{ 144{
151 int ret = -EINVAL; 145 int ret = -EINVAL, length_max;
152 struct arch_hw_breakpoint *info = counter_arch_bp(bp); 146 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
153 147
154 if (!bp) 148 if (!bp)
155 return ret; 149 return ret;
156 150
157 switch (bp->attr.bp_type) { 151 info->type = HW_BRK_TYPE_TRANSLATE;
158 case HW_BREAKPOINT_R: 152 if (bp->attr.bp_type & HW_BREAKPOINT_R)
159 info->type = DABR_DATA_READ; 153 info->type |= HW_BRK_TYPE_READ;
160 break; 154 if (bp->attr.bp_type & HW_BREAKPOINT_W)
161 case HW_BREAKPOINT_W: 155 info->type |= HW_BRK_TYPE_WRITE;
162 info->type = DABR_DATA_WRITE; 156 if (info->type == HW_BRK_TYPE_TRANSLATE)
163 break; 157 /* must set alteast read or write */
164 case HW_BREAKPOINT_R | HW_BREAKPOINT_W:
165 info->type = (DABR_DATA_READ | DABR_DATA_WRITE);
166 break;
167 default:
168 return ret; 158 return ret;
169 } 159 if (!(bp->attr.exclude_user))
170 160 info->type |= HW_BRK_TYPE_USER;
161 if (!(bp->attr.exclude_kernel))
162 info->type |= HW_BRK_TYPE_KERNEL;
163 if (!(bp->attr.exclude_hv))
164 info->type |= HW_BRK_TYPE_HYP;
171 info->address = bp->attr.bp_addr; 165 info->address = bp->attr.bp_addr;
172 info->len = bp->attr.bp_len; 166 info->len = bp->attr.bp_len;
173 info->dabrx = DABRX_ALL;
174 if (bp->attr.exclude_user)
175 info->dabrx &= ~DABRX_USER;
176 if (bp->attr.exclude_kernel)
177 info->dabrx &= ~DABRX_KERNEL;
178 if (bp->attr.exclude_hv)
179 info->dabrx &= ~DABRX_HYP;
180 167
181 /* 168 /*
182 * Since breakpoint length can be a maximum of HW_BREAKPOINT_LEN(8) 169 * Since breakpoint length can be a maximum of HW_BREAKPOINT_LEN(8)
@@ -184,8 +171,16 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
184 * HW_BREAKPOINT_ALIGN by rounding off to the lower address, the 171 * HW_BREAKPOINT_ALIGN by rounding off to the lower address, the
185 * 'symbolsize' should satisfy the check below. 172 * 'symbolsize' should satisfy the check below.
186 */ 173 */
174 length_max = 8; /* DABR */
175 if (cpu_has_feature(CPU_FTR_DAWR)) {
176 length_max = 512 ; /* 64 doublewords */
177 /* DAWR region can't cross 512 boundary */
178 if ((bp->attr.bp_addr >> 10) !=
179 ((bp->attr.bp_addr + bp->attr.bp_len) >> 10))
180 return -EINVAL;
181 }
187 if (info->len > 182 if (info->len >
188 (HW_BREAKPOINT_LEN - (info->address & HW_BREAKPOINT_ALIGN))) 183 (length_max - (info->address & HW_BREAKPOINT_ALIGN)))
189 return -EINVAL; 184 return -EINVAL;
190 return 0; 185 return 0;
191} 186}
@@ -204,7 +199,7 @@ void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
204 199
205 info = counter_arch_bp(tsk->thread.last_hit_ubp); 200 info = counter_arch_bp(tsk->thread.last_hit_ubp);
206 regs->msr &= ~MSR_SE; 201 regs->msr &= ~MSR_SE;
207 set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx); 202 set_breakpoint(info);
208 tsk->thread.last_hit_ubp = NULL; 203 tsk->thread.last_hit_ubp = NULL;
209} 204}
210 205
@@ -222,7 +217,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
222 unsigned long dar = regs->dar; 217 unsigned long dar = regs->dar;
223 218
224 /* Disable breakpoints during exception handling */ 219 /* Disable breakpoints during exception handling */
225 set_dabr(0, 0); 220 hw_breakpoint_disable();
226 221
227 /* 222 /*
228 * The counter may be concurrently released but that can only 223 * The counter may be concurrently released but that can only
@@ -255,8 +250,9 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
255 * we still need to single-step the instruction, but we don't 250 * we still need to single-step the instruction, but we don't
256 * generate an event. 251 * generate an event.
257 */ 252 */
258 info->extraneous_interrupt = !((bp->attr.bp_addr <= dar) && 253 if (!((bp->attr.bp_addr <= dar) &&
259 (dar - bp->attr.bp_addr < bp->attr.bp_len)); 254 (dar - bp->attr.bp_addr < bp->attr.bp_len)))
255 info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
260 256
261 /* Do not emulate user-space instructions, instead single-step them */ 257 /* Do not emulate user-space instructions, instead single-step them */
262 if (user_mode(regs)) { 258 if (user_mode(regs)) {
@@ -285,10 +281,10 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
285 * As a policy, the callback is invoked in a 'trigger-after-execute' 281 * As a policy, the callback is invoked in a 'trigger-after-execute'
286 * fashion 282 * fashion
287 */ 283 */
288 if (!info->extraneous_interrupt) 284 if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
289 perf_bp_event(bp, regs); 285 perf_bp_event(bp, regs);
290 286
291 set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx); 287 set_breakpoint(info);
292out: 288out:
293 rcu_read_unlock(); 289 rcu_read_unlock();
294 return rc; 290 return rc;
@@ -317,10 +313,10 @@ int __kprobes single_step_dabr_instruction(struct die_args *args)
317 * We shall invoke the user-defined callback function in the single 313 * We shall invoke the user-defined callback function in the single
318 * stepping handler to confirm to 'trigger-after-execute' semantics 314 * stepping handler to confirm to 'trigger-after-execute' semantics
319 */ 315 */
320 if (!info->extraneous_interrupt) 316 if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
321 perf_bp_event(bp, regs); 317 perf_bp_event(bp, regs);
322 318
323 set_dabr(info->address | info->type | DABR_TRANSLATION, info->dabrx); 319 set_breakpoint(info);
324 current->thread.last_hit_ubp = NULL; 320 current->thread.last_hit_ubp = NULL;
325 321
326 /* 322 /*
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index c862fd716fe3..31c4fdc6859c 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -717,6 +717,13 @@ void iommu_free_table(struct iommu_table *tbl, const char *node_name)
717 return; 717 return;
718 } 718 }
719 719
720 /*
721 * In case we have reserved the first bit, we should not emit
722 * the warning below.
723 */
724 if (tbl->it_offset == 0)
725 clear_bit(0, tbl->it_map);
726
720 /* verify that table contains no entries */ 727 /* verify that table contains no entries */
721 if (!bitmap_empty(tbl->it_map, tbl->it_size)) 728 if (!bitmap_empty(tbl->it_map, tbl->it_size))
722 pr_warn("%s: Unexpected TCEs for %s\n", __func__, node_name); 729 pr_warn("%s: Unexpected TCEs for %s\n", __func__, node_name);
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 71413f41278f..4f97fe345526 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -122,8 +122,8 @@ static inline notrace int decrementer_check_overflow(void)
122} 122}
123 123
124/* This is called whenever we are re-enabling interrupts 124/* This is called whenever we are re-enabling interrupts
125 * and returns either 0 (nothing to do) or 500/900 if there's 125 * and returns either 0 (nothing to do) or 500/900/280/a00/e80 if
126 * either an EE or a DEC to generate. 126 * there's an EE, DEC or DBELL to generate.
127 * 127 *
128 * This is called in two contexts: From arch_local_irq_restore() 128 * This is called in two contexts: From arch_local_irq_restore()
129 * before soft-enabling interrupts, and from the exception exit 129 * before soft-enabling interrupts, and from the exception exit
@@ -182,6 +182,13 @@ notrace unsigned int __check_irq_replay(void)
182 local_paca->irq_happened &= ~PACA_IRQ_DBELL; 182 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
183 if (happened & PACA_IRQ_DBELL) 183 if (happened & PACA_IRQ_DBELL)
184 return 0x280; 184 return 0x280;
185#else
186 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
187 if (happened & PACA_IRQ_DBELL) {
188 if (cpu_has_feature(CPU_FTR_HVMODE))
189 return 0xe80;
190 return 0xa00;
191 }
185#endif /* CONFIG_PPC_BOOK3E */ 192#endif /* CONFIG_PPC_BOOK3E */
186 193
187 /* There should be nothing left ! */ 194 /* There should be nothing left ! */
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index a7bc7521c064..5ca82cd4a374 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -199,7 +199,7 @@ static int kgdb_iabr_match(struct pt_regs *regs)
199 return 1; 199 return 1;
200} 200}
201 201
202static int kgdb_dabr_match(struct pt_regs *regs) 202static int kgdb_break_match(struct pt_regs *regs)
203{ 203{
204 if (user_mode(regs)) 204 if (user_mode(regs))
205 return 0; 205 return 0;
@@ -459,7 +459,7 @@ static void *old__debugger;
459static void *old__debugger_bpt; 459static void *old__debugger_bpt;
460static void *old__debugger_sstep; 460static void *old__debugger_sstep;
461static void *old__debugger_iabr_match; 461static void *old__debugger_iabr_match;
462static void *old__debugger_dabr_match; 462static void *old__debugger_break_match;
463static void *old__debugger_fault_handler; 463static void *old__debugger_fault_handler;
464 464
465int kgdb_arch_init(void) 465int kgdb_arch_init(void)
@@ -469,7 +469,7 @@ int kgdb_arch_init(void)
469 old__debugger_bpt = __debugger_bpt; 469 old__debugger_bpt = __debugger_bpt;
470 old__debugger_sstep = __debugger_sstep; 470 old__debugger_sstep = __debugger_sstep;
471 old__debugger_iabr_match = __debugger_iabr_match; 471 old__debugger_iabr_match = __debugger_iabr_match;
472 old__debugger_dabr_match = __debugger_dabr_match; 472 old__debugger_break_match = __debugger_break_match;
473 old__debugger_fault_handler = __debugger_fault_handler; 473 old__debugger_fault_handler = __debugger_fault_handler;
474 474
475 __debugger_ipi = kgdb_call_nmi_hook; 475 __debugger_ipi = kgdb_call_nmi_hook;
@@ -477,7 +477,7 @@ int kgdb_arch_init(void)
477 __debugger_bpt = kgdb_handle_breakpoint; 477 __debugger_bpt = kgdb_handle_breakpoint;
478 __debugger_sstep = kgdb_singlestep; 478 __debugger_sstep = kgdb_singlestep;
479 __debugger_iabr_match = kgdb_iabr_match; 479 __debugger_iabr_match = kgdb_iabr_match;
480 __debugger_dabr_match = kgdb_dabr_match; 480 __debugger_break_match = kgdb_break_match;
481 __debugger_fault_handler = kgdb_not_implemented; 481 __debugger_fault_handler = kgdb_not_implemented;
482 482
483 return 0; 483 return 0;
@@ -490,6 +490,6 @@ void kgdb_arch_exit(void)
490 __debugger_bpt = old__debugger_bpt; 490 __debugger_bpt = old__debugger_bpt;
491 __debugger_sstep = old__debugger_sstep; 491 __debugger_sstep = old__debugger_sstep;
492 __debugger_iabr_match = old__debugger_iabr_match; 492 __debugger_iabr_match = old__debugger_iabr_match;
493 __debugger_dabr_match = old__debugger_dabr_match; 493 __debugger_break_match = old__debugger_break_match;
494 __debugger_fault_handler = old__debugger_fault_handler; 494 __debugger_fault_handler = old__debugger_fault_handler;
495} 495}
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 7206701b1ff1..466a2908bb63 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -162,6 +162,8 @@ static int kexec_all_irq_disabled = 0;
162static void kexec_smp_down(void *arg) 162static void kexec_smp_down(void *arg)
163{ 163{
164 local_irq_disable(); 164 local_irq_disable();
165 hard_irq_disable();
166
165 mb(); /* make sure our irqs are disabled before we say they are */ 167 mb(); /* make sure our irqs are disabled before we say they are */
166 get_paca()->kexec_state = KEXEC_STATE_IRQS_OFF; 168 get_paca()->kexec_state = KEXEC_STATE_IRQS_OFF;
167 while(kexec_all_irq_disabled == 0) 169 while(kexec_all_irq_disabled == 0)
@@ -244,6 +246,8 @@ static void kexec_prepare_cpus(void)
244 wake_offline_cpus(); 246 wake_offline_cpus();
245 smp_call_function(kexec_smp_down, NULL, /* wait */0); 247 smp_call_function(kexec_smp_down, NULL, /* wait */0);
246 local_irq_disable(); 248 local_irq_disable();
249 hard_irq_disable();
250
247 mb(); /* make sure IRQs are disabled before we say they are */ 251 mb(); /* make sure IRQs are disabled before we say they are */
248 get_paca()->kexec_state = KEXEC_STATE_IRQS_OFF; 252 get_paca()->kexec_state = KEXEC_STATE_IRQS_OFF;
249 253
@@ -281,6 +285,7 @@ static void kexec_prepare_cpus(void)
281 if (ppc_md.kexec_cpu_down) 285 if (ppc_md.kexec_cpu_down)
282 ppc_md.kexec_cpu_down(0, 0); 286 ppc_md.kexec_cpu_down(0, 0);
283 local_irq_disable(); 287 local_irq_disable();
288 hard_irq_disable();
284} 289}
285 290
286#endif /* SMP */ 291#endif /* SMP */
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 9f44a775a106..6ee59a0eb268 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -386,6 +386,14 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
386 | (value & 0xffff); 386 | (value & 0xffff);
387 break; 387 break;
388 388
389 case R_PPC64_TOC16_LO:
390 /* Subtract TOC pointer */
391 value -= my_r2(sechdrs, me);
392 *((uint16_t *) location)
393 = (*((uint16_t *) location) & ~0xffff)
394 | (value & 0xffff);
395 break;
396
389 case R_PPC64_TOC16_DS: 397 case R_PPC64_TOC16_DS:
390 /* Subtract TOC pointer */ 398 /* Subtract TOC pointer */
391 value -= my_r2(sechdrs, me); 399 value -= my_r2(sechdrs, me);
@@ -399,6 +407,28 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
399 | (value & 0xfffc); 407 | (value & 0xfffc);
400 break; 408 break;
401 409
410 case R_PPC64_TOC16_LO_DS:
411 /* Subtract TOC pointer */
412 value -= my_r2(sechdrs, me);
413 if ((value & 3) != 0) {
414 printk("%s: bad TOC16_LO_DS relocation (%lu)\n",
415 me->name, value);
416 return -ENOEXEC;
417 }
418 *((uint16_t *) location)
419 = (*((uint16_t *) location) & ~0xfffc)
420 | (value & 0xfffc);
421 break;
422
423 case R_PPC64_TOC16_HA:
424 /* Subtract TOC pointer */
425 value -= my_r2(sechdrs, me);
426 value = ((value + 0x8000) >> 16);
427 *((uint16_t *) location)
428 = (*((uint16_t *) location) & ~0xffff)
429 | (value & 0xffff);
430 break;
431
402 case R_PPC_REL24: 432 case R_PPC_REL24:
403 /* FIXME: Handle weak symbols here --RR */ 433 /* FIXME: Handle weak symbols here --RR */
404 if (sym->st_shndx == SHN_UNDEF) { 434 if (sym->st_shndx == SHN_UNDEF) {
diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c
index 07c12697d708..a7b743076720 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -71,10 +71,8 @@ static int of_pci_phb_probe(struct platform_device *dev)
71 eeh_dev_phb_init_dynamic(phb); 71 eeh_dev_phb_init_dynamic(phb);
72 72
73 /* Register devices with EEH */ 73 /* Register devices with EEH */
74#ifdef CONFIG_EEH
75 if (dev->dev.of_node->child) 74 if (dev->dev.of_node->child)
76 eeh_add_device_tree_early(dev->dev.of_node); 75 eeh_add_device_tree_early(dev->dev.of_node);
77#endif /* CONFIG_EEH */
78 76
79 /* Scan the bus */ 77 /* Scan the bus */
80 pcibios_scan_phb(phb); 78 pcibios_scan_phb(phb);
@@ -88,13 +86,14 @@ static int of_pci_phb_probe(struct platform_device *dev)
88 pcibios_claim_one_bus(phb->bus); 86 pcibios_claim_one_bus(phb->bus);
89 87
90 /* Finish EEH setup */ 88 /* Finish EEH setup */
91#ifdef CONFIG_EEH
92 eeh_add_device_tree_late(phb->bus); 89 eeh_add_device_tree_late(phb->bus);
93#endif
94 90
95 /* Add probed PCI devices to the device model */ 91 /* Add probed PCI devices to the device model */
96 pci_bus_add_devices(phb->bus); 92 pci_bus_add_devices(phb->bus);
97 93
94 /* sysfs files should only be added after devices are added */
95 eeh_add_sysfs_files(phb->bus);
96
98 return 0; 97 return 0;
99} 98}
100 99
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index cd6da855090c..f8f24685f10a 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -120,8 +120,6 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
120struct paca_struct *paca; 120struct paca_struct *paca;
121EXPORT_SYMBOL(paca); 121EXPORT_SYMBOL(paca);
122 122
123struct paca_struct boot_paca;
124
125void __init initialise_paca(struct paca_struct *new_paca, int cpu) 123void __init initialise_paca(struct paca_struct *new_paca, int cpu)
126{ 124{
127 /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB 125 /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 7c37379ea9b1..fa12ae42d98c 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1477,11 +1477,14 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus)
1477 pcibios_allocate_bus_resources(bus); 1477 pcibios_allocate_bus_resources(bus);
1478 pcibios_claim_one_bus(bus); 1478 pcibios_claim_one_bus(bus);
1479 1479
1480 /* Fixup EEH */
1481 eeh_add_device_tree_late(bus);
1482
1480 /* Add new devices to global lists. Register in proc, sysfs. */ 1483 /* Add new devices to global lists. Register in proc, sysfs. */
1481 pci_bus_add_devices(bus); 1484 pci_bus_add_devices(bus);
1482 1485
1483 /* Fixup EEH */ 1486 /* sysfs files should only be added after devices are added */
1484 eeh_add_device_tree_late(bus); 1487 eeh_add_sysfs_files(bus);
1485} 1488}
1486EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus); 1489EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
1487 1490
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 81430674e71c..59dd545fdde1 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -50,6 +50,7 @@
50#include <asm/runlatch.h> 50#include <asm/runlatch.h>
51#include <asm/syscalls.h> 51#include <asm/syscalls.h>
52#include <asm/switch_to.h> 52#include <asm/switch_to.h>
53#include <asm/tm.h>
53#include <asm/debug.h> 54#include <asm/debug.h>
54#ifdef CONFIG_PPC64 55#ifdef CONFIG_PPC64
55#include <asm/firmware.h> 56#include <asm/firmware.h>
@@ -57,6 +58,13 @@
57#include <linux/kprobes.h> 58#include <linux/kprobes.h>
58#include <linux/kdebug.h> 59#include <linux/kdebug.h>
59 60
61/* Transactional Memory debug */
62#ifdef TM_DEBUG_SW
63#define TM_DEBUG(x...) printk(KERN_INFO x)
64#else
65#define TM_DEBUG(x...) do { } while(0)
66#endif
67
60extern unsigned long _get_SP(void); 68extern unsigned long _get_SP(void);
61 69
62#ifndef CONFIG_SMP 70#ifndef CONFIG_SMP
@@ -271,7 +279,7 @@ void do_send_trap(struct pt_regs *regs, unsigned long address,
271 force_sig_info(SIGTRAP, &info, current); 279 force_sig_info(SIGTRAP, &info, current);
272} 280}
273#else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 281#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
274void do_dabr(struct pt_regs *regs, unsigned long address, 282void do_break (struct pt_regs *regs, unsigned long address,
275 unsigned long error_code) 283 unsigned long error_code)
276{ 284{
277 siginfo_t info; 285 siginfo_t info;
@@ -281,11 +289,11 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
281 11, SIGSEGV) == NOTIFY_STOP) 289 11, SIGSEGV) == NOTIFY_STOP)
282 return; 290 return;
283 291
284 if (debugger_dabr_match(regs)) 292 if (debugger_break_match(regs))
285 return; 293 return;
286 294
287 /* Clear the DABR */ 295 /* Clear the breakpoint */
288 set_dabr(0, 0); 296 hw_breakpoint_disable();
289 297
290 /* Deliver the signal to userspace */ 298 /* Deliver the signal to userspace */
291 info.si_signo = SIGTRAP; 299 info.si_signo = SIGTRAP;
@@ -296,7 +304,7 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
296} 304}
297#endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 305#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
298 306
299static DEFINE_PER_CPU(unsigned long, current_dabr); 307static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk);
300 308
301#ifdef CONFIG_PPC_ADV_DEBUG_REGS 309#ifdef CONFIG_PPC_ADV_DEBUG_REGS
302/* 310/*
@@ -364,39 +372,214 @@ static void switch_booke_debug_regs(struct thread_struct *new_thread)
364#ifndef CONFIG_HAVE_HW_BREAKPOINT 372#ifndef CONFIG_HAVE_HW_BREAKPOINT
365static void set_debug_reg_defaults(struct thread_struct *thread) 373static void set_debug_reg_defaults(struct thread_struct *thread)
366{ 374{
367 if (thread->dabr) { 375 thread->hw_brk.address = 0;
368 thread->dabr = 0; 376 thread->hw_brk.type = 0;
369 thread->dabrx = 0; 377 set_breakpoint(&thread->hw_brk);
370 set_dabr(0, 0);
371 }
372} 378}
373#endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 379#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
374#endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 380#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
375 381
376int set_dabr(unsigned long dabr, unsigned long dabrx)
377{
378 __get_cpu_var(current_dabr) = dabr;
379
380 if (ppc_md.set_dabr)
381 return ppc_md.set_dabr(dabr, dabrx);
382
383 /* XXX should we have a CPU_FTR_HAS_DABR ? */
384#ifdef CONFIG_PPC_ADV_DEBUG_REGS 382#ifdef CONFIG_PPC_ADV_DEBUG_REGS
383static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
384{
385 mtspr(SPRN_DAC1, dabr); 385 mtspr(SPRN_DAC1, dabr);
386#ifdef CONFIG_PPC_47x 386#ifdef CONFIG_PPC_47x
387 isync(); 387 isync();
388#endif 388#endif
389 return 0;
390}
389#elif defined(CONFIG_PPC_BOOK3S) 391#elif defined(CONFIG_PPC_BOOK3S)
392static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
393{
390 mtspr(SPRN_DABR, dabr); 394 mtspr(SPRN_DABR, dabr);
391 mtspr(SPRN_DABRX, dabrx); 395 mtspr(SPRN_DABRX, dabrx);
396 return 0;
397}
398#else
399static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
400{
401 return -EINVAL;
402}
392#endif 403#endif
404
405static inline int set_dabr(struct arch_hw_breakpoint *brk)
406{
407 unsigned long dabr, dabrx;
408
409 dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR);
410 dabrx = ((brk->type >> 3) & 0x7);
411
412 if (ppc_md.set_dabr)
413 return ppc_md.set_dabr(dabr, dabrx);
414
415 return __set_dabr(dabr, dabrx);
416}
417
418static inline int set_dawr(struct arch_hw_breakpoint *brk)
419{
420 unsigned long dawr, dawrx, mrd;
421
422 dawr = brk->address;
423
424 dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \
425 << (63 - 58); //* read/write bits */
426 dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \
427 << (63 - 59); //* translate */
428 dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \
429 >> 3; //* PRIM bits */
430 /* dawr length is stored in field MDR bits 48:53. Matches range in
431 doublewords (64 bits) baised by -1 eg. 0b000000=1DW and
432 0b111111=64DW.
433 brk->len is in bytes.
434 This aligns up to double word size, shifts and does the bias.
435 */
436 mrd = ((brk->len + 7) >> 3) - 1;
437 dawrx |= (mrd & 0x3f) << (63 - 53);
438
439 if (ppc_md.set_dawr)
440 return ppc_md.set_dawr(dawr, dawrx);
441 mtspr(SPRN_DAWR, dawr);
442 mtspr(SPRN_DAWRX, dawrx);
393 return 0; 443 return 0;
394} 444}
395 445
446int set_breakpoint(struct arch_hw_breakpoint *brk)
447{
448 __get_cpu_var(current_brk) = *brk;
449
450 if (cpu_has_feature(CPU_FTR_DAWR))
451 return set_dawr(brk);
452
453 return set_dabr(brk);
454}
455
396#ifdef CONFIG_PPC64 456#ifdef CONFIG_PPC64
397DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 457DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
398#endif 458#endif
399 459
460static inline bool hw_brk_match(struct arch_hw_breakpoint *a,
461 struct arch_hw_breakpoint *b)
462{
463 if (a->address != b->address)
464 return false;
465 if (a->type != b->type)
466 return false;
467 if (a->len != b->len)
468 return false;
469 return true;
470}
471#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
472static inline void tm_reclaim_task(struct task_struct *tsk)
473{
474 /* We have to work out if we're switching from/to a task that's in the
475 * middle of a transaction.
476 *
477 * In switching we need to maintain a 2nd register state as
478 * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the
479 * checkpointed (tbegin) state in ckpt_regs and saves the transactional
480 * (current) FPRs into oldtask->thread.transact_fpr[].
481 *
482 * We also context switch (save) TFHAR/TEXASR/TFIAR in here.
483 */
484 struct thread_struct *thr = &tsk->thread;
485
486 if (!thr->regs)
487 return;
488
489 if (!MSR_TM_ACTIVE(thr->regs->msr))
490 goto out_and_saveregs;
491
492 /* Stash the original thread MSR, as giveup_fpu et al will
493 * modify it. We hold onto it to see whether the task used
494 * FP & vector regs.
495 */
496 thr->tm_orig_msr = thr->regs->msr;
497
498 TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "
499 "ccr=%lx, msr=%lx, trap=%lx)\n",
500 tsk->pid, thr->regs->nip,
501 thr->regs->ccr, thr->regs->msr,
502 thr->regs->trap);
503
504 tm_reclaim(thr, thr->regs->msr, TM_CAUSE_RESCHED);
505
506 TM_DEBUG("--- tm_reclaim on pid %d complete\n",
507 tsk->pid);
508
509out_and_saveregs:
510 /* Always save the regs here, even if a transaction's not active.
511 * This context-switches a thread's TM info SPRs. We do it here to
512 * be consistent with the restore path (in recheckpoint) which
513 * cannot happen later in _switch().
514 */
515 tm_save_sprs(thr);
516}
517
518static inline void tm_recheckpoint_new_task(struct task_struct *new)
519{
520 unsigned long msr;
521
522 if (!cpu_has_feature(CPU_FTR_TM))
523 return;
524
525 /* Recheckpoint the registers of the thread we're about to switch to.
526 *
527 * If the task was using FP, we non-lazily reload both the original and
528 * the speculative FP register states. This is because the kernel
529 * doesn't see if/when a TM rollback occurs, so if we take an FP
530 * unavoidable later, we are unable to determine which set of FP regs
531 * need to be restored.
532 */
533 if (!new->thread.regs)
534 return;
535
536 /* The TM SPRs are restored here, so that TEXASR.FS can be set
537 * before the trecheckpoint and no explosion occurs.
538 */
539 tm_restore_sprs(&new->thread);
540
541 if (!MSR_TM_ACTIVE(new->thread.regs->msr))
542 return;
543 msr = new->thread.tm_orig_msr;
544 /* Recheckpoint to restore original checkpointed register state. */
545 TM_DEBUG("*** tm_recheckpoint of pid %d "
546 "(new->msr 0x%lx, new->origmsr 0x%lx)\n",
547 new->pid, new->thread.regs->msr, msr);
548
549 /* This loads the checkpointed FP/VEC state, if used */
550 tm_recheckpoint(&new->thread, msr);
551
552 /* This loads the speculative FP/VEC state, if used */
553 if (msr & MSR_FP) {
554 do_load_up_transact_fpu(&new->thread);
555 new->thread.regs->msr |=
556 (MSR_FP | new->thread.fpexc_mode);
557 }
558 if (msr & MSR_VEC) {
559 do_load_up_transact_altivec(&new->thread);
560 new->thread.regs->msr |= MSR_VEC;
561 }
562 /* We may as well turn on VSX too since all the state is restored now */
563 if (msr & MSR_VSX)
564 new->thread.regs->msr |= MSR_VSX;
565
566 TM_DEBUG("*** tm_recheckpoint of pid %d complete "
567 "(kernel msr 0x%lx)\n",
568 new->pid, mfmsr());
569}
570
571static inline void __switch_to_tm(struct task_struct *prev)
572{
573 if (cpu_has_feature(CPU_FTR_TM)) {
574 tm_enable();
575 tm_reclaim_task(prev);
576 }
577}
578#else
579#define tm_recheckpoint_new_task(new)
580#define __switch_to_tm(prev)
581#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
582
400struct task_struct *__switch_to(struct task_struct *prev, 583struct task_struct *__switch_to(struct task_struct *prev,
401 struct task_struct *new) 584 struct task_struct *new)
402{ 585{
@@ -407,6 +590,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
407 struct ppc64_tlb_batch *batch; 590 struct ppc64_tlb_batch *batch;
408#endif 591#endif
409 592
593 __switch_to_tm(prev);
594
410#ifdef CONFIG_SMP 595#ifdef CONFIG_SMP
411 /* avoid complexity of lazy save/restore of fpu 596 /* avoid complexity of lazy save/restore of fpu
412 * by just saving it every time we switch out if 597 * by just saving it every time we switch out if
@@ -481,8 +666,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
481 * schedule DABR 666 * schedule DABR
482 */ 667 */
483#ifndef CONFIG_HAVE_HW_BREAKPOINT 668#ifndef CONFIG_HAVE_HW_BREAKPOINT
484 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) 669 if (unlikely(hw_brk_match(&__get_cpu_var(current_brk), &new->thread.hw_brk)))
485 set_dabr(new->thread.dabr, new->thread.dabrx); 670 set_breakpoint(&new->thread.hw_brk);
486#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 671#endif /* CONFIG_HAVE_HW_BREAKPOINT */
487#endif 672#endif
488 673
@@ -522,6 +707,9 @@ struct task_struct *__switch_to(struct task_struct *prev,
522 * of sync. Hard disable here. 707 * of sync. Hard disable here.
523 */ 708 */
524 hard_irq_disable(); 709 hard_irq_disable();
710
711 tm_recheckpoint_new_task(new);
712
525 last = _switch(old_thread, new_thread); 713 last = _switch(old_thread, new_thread);
526 714
527#ifdef CONFIG_PPC_BOOK3S_64 715#ifdef CONFIG_PPC_BOOK3S_64
@@ -683,6 +871,9 @@ void show_regs(struct pt_regs * regs)
683 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 871 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
684 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 872 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
685#endif 873#endif
874#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
875 printk("PACATMSCRATCH [%llx]\n", get_paca()->tm_scratch);
876#endif
686 show_stack(current, (unsigned long *) regs->gpr[1]); 877 show_stack(current, (unsigned long *) regs->gpr[1]);
687 if (!user_mode(regs)) 878 if (!user_mode(regs))
688 show_instructions(regs); 879 show_instructions(regs);
@@ -813,6 +1004,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
813 p->thread.dscr_inherit = current->thread.dscr_inherit; 1004 p->thread.dscr_inherit = current->thread.dscr_inherit;
814 p->thread.dscr = current->thread.dscr; 1005 p->thread.dscr = current->thread.dscr;
815 } 1006 }
1007 if (cpu_has_feature(CPU_FTR_HAS_PPR))
1008 p->thread.ppr = INIT_PPR;
816#endif 1009#endif
817 /* 1010 /*
818 * The PPC64 ABI makes use of a TOC to contain function 1011 * The PPC64 ABI makes use of a TOC to contain function
@@ -892,7 +1085,6 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
892 regs->msr = MSR_USER32; 1085 regs->msr = MSR_USER32;
893 } 1086 }
894#endif 1087#endif
895
896 discard_lazy_cpu_state(); 1088 discard_lazy_cpu_state();
897#ifdef CONFIG_VSX 1089#ifdef CONFIG_VSX
898 current->thread.used_vsr = 0; 1090 current->thread.used_vsr = 0;
@@ -912,6 +1104,13 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
912 current->thread.spefscr = 0; 1104 current->thread.spefscr = 0;
913 current->thread.used_spe = 0; 1105 current->thread.used_spe = 0;
914#endif /* CONFIG_SPE */ 1106#endif /* CONFIG_SPE */
1107#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1108 if (cpu_has_feature(CPU_FTR_TM))
1109 regs->msr |= MSR_TM;
1110 current->thread.tm_tfhar = 0;
1111 current->thread.tm_texasr = 0;
1112 current->thread.tm_tfiar = 0;
1113#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
915} 1114}
916 1115
917#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 1116#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 779f34049a56..7f7fb7fd991b 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -66,8 +66,8 @@
66 * is running at whatever address it has been loaded at. 66 * is running at whatever address it has been loaded at.
67 * On ppc32 we compile with -mrelocatable, which means that references 67 * On ppc32 we compile with -mrelocatable, which means that references
68 * to extern and static variables get relocated automatically. 68 * to extern and static variables get relocated automatically.
69 * On ppc64 we have to relocate the references explicitly with 69 * ppc64 objects are always relocatable, we just need to relocate the
70 * RELOC. (Note that strings count as static variables.) 70 * TOC.
71 * 71 *
72 * Because OF may have mapped I/O devices into the area starting at 72 * Because OF may have mapped I/O devices into the area starting at
73 * KERNELBASE, particularly on CHRP machines, we can't safely call 73 * KERNELBASE, particularly on CHRP machines, we can't safely call
@@ -79,13 +79,11 @@
79 * On ppc64, 64 bit values are truncated to 32 bits (and 79 * On ppc64, 64 bit values are truncated to 32 bits (and
80 * fortunately don't get interpreted as two arguments). 80 * fortunately don't get interpreted as two arguments).
81 */ 81 */
82#define ADDR(x) (u32)(unsigned long)(x)
83
82#ifdef CONFIG_PPC64 84#ifdef CONFIG_PPC64
83#define RELOC(x) (*PTRRELOC(&(x)))
84#define ADDR(x) (u32) add_reloc_offset((unsigned long)(x))
85#define OF_WORKAROUNDS 0 85#define OF_WORKAROUNDS 0
86#else 86#else
87#define RELOC(x) (x)
88#define ADDR(x) (u32) (x)
89#define OF_WORKAROUNDS of_workarounds 87#define OF_WORKAROUNDS of_workarounds
90int of_workarounds; 88int of_workarounds;
91#endif 89#endif
@@ -95,7 +93,7 @@ int of_workarounds;
95 93
96#define PROM_BUG() do { \ 94#define PROM_BUG() do { \
97 prom_printf("kernel BUG at %s line 0x%x!\n", \ 95 prom_printf("kernel BUG at %s line 0x%x!\n", \
98 RELOC(__FILE__), __LINE__); \ 96 __FILE__, __LINE__); \
99 __asm__ __volatile__(".long " BUG_ILLEGAL_INSTR); \ 97 __asm__ __volatile__(".long " BUG_ILLEGAL_INSTR); \
100} while (0) 98} while (0)
101 99
@@ -233,7 +231,7 @@ static int __init call_prom(const char *service, int nargs, int nret, ...)
233 for (i = 0; i < nret; i++) 231 for (i = 0; i < nret; i++)
234 args.args[nargs+i] = 0; 232 args.args[nargs+i] = 0;
235 233
236 if (enter_prom(&args, RELOC(prom_entry)) < 0) 234 if (enter_prom(&args, prom_entry) < 0)
237 return PROM_ERROR; 235 return PROM_ERROR;
238 236
239 return (nret > 0) ? args.args[nargs] : 0; 237 return (nret > 0) ? args.args[nargs] : 0;
@@ -258,7 +256,7 @@ static int __init call_prom_ret(const char *service, int nargs, int nret,
258 for (i = 0; i < nret; i++) 256 for (i = 0; i < nret; i++)
259 args.args[nargs+i] = 0; 257 args.args[nargs+i] = 0;
260 258
261 if (enter_prom(&args, RELOC(prom_entry)) < 0) 259 if (enter_prom(&args, prom_entry) < 0)
262 return PROM_ERROR; 260 return PROM_ERROR;
263 261
264 if (rets != NULL) 262 if (rets != NULL)
@@ -272,20 +270,19 @@ static int __init call_prom_ret(const char *service, int nargs, int nret,
272static void __init prom_print(const char *msg) 270static void __init prom_print(const char *msg)
273{ 271{
274 const char *p, *q; 272 const char *p, *q;
275 struct prom_t *_prom = &RELOC(prom);
276 273
277 if (_prom->stdout == 0) 274 if (prom.stdout == 0)
278 return; 275 return;
279 276
280 for (p = msg; *p != 0; p = q) { 277 for (p = msg; *p != 0; p = q) {
281 for (q = p; *q != 0 && *q != '\n'; ++q) 278 for (q = p; *q != 0 && *q != '\n'; ++q)
282 ; 279 ;
283 if (q > p) 280 if (q > p)
284 call_prom("write", 3, 1, _prom->stdout, p, q - p); 281 call_prom("write", 3, 1, prom.stdout, p, q - p);
285 if (*q == 0) 282 if (*q == 0)
286 break; 283 break;
287 ++q; 284 ++q;
288 call_prom("write", 3, 1, _prom->stdout, ADDR("\r\n"), 2); 285 call_prom("write", 3, 1, prom.stdout, ADDR("\r\n"), 2);
289 } 286 }
290} 287}
291 288
@@ -294,7 +291,6 @@ static void __init prom_print_hex(unsigned long val)
294{ 291{
295 int i, nibbles = sizeof(val)*2; 292 int i, nibbles = sizeof(val)*2;
296 char buf[sizeof(val)*2+1]; 293 char buf[sizeof(val)*2+1];
297 struct prom_t *_prom = &RELOC(prom);
298 294
299 for (i = nibbles-1; i >= 0; i--) { 295 for (i = nibbles-1; i >= 0; i--) {
300 buf[i] = (val & 0xf) + '0'; 296 buf[i] = (val & 0xf) + '0';
@@ -303,7 +299,7 @@ static void __init prom_print_hex(unsigned long val)
303 val >>= 4; 299 val >>= 4;
304 } 300 }
305 buf[nibbles] = '\0'; 301 buf[nibbles] = '\0';
306 call_prom("write", 3, 1, _prom->stdout, buf, nibbles); 302 call_prom("write", 3, 1, prom.stdout, buf, nibbles);
307} 303}
308 304
309/* max number of decimal digits in an unsigned long */ 305/* max number of decimal digits in an unsigned long */
@@ -312,7 +308,6 @@ static void __init prom_print_dec(unsigned long val)
312{ 308{
313 int i, size; 309 int i, size;
314 char buf[UL_DIGITS+1]; 310 char buf[UL_DIGITS+1];
315 struct prom_t *_prom = &RELOC(prom);
316 311
317 for (i = UL_DIGITS-1; i >= 0; i--) { 312 for (i = UL_DIGITS-1; i >= 0; i--) {
318 buf[i] = (val % 10) + '0'; 313 buf[i] = (val % 10) + '0';
@@ -322,7 +317,7 @@ static void __init prom_print_dec(unsigned long val)
322 } 317 }
323 /* shift stuff down */ 318 /* shift stuff down */
324 size = UL_DIGITS - i; 319 size = UL_DIGITS - i;
325 call_prom("write", 3, 1, _prom->stdout, buf+i, size); 320 call_prom("write", 3, 1, prom.stdout, buf+i, size);
326} 321}
327 322
328static void __init prom_printf(const char *format, ...) 323static void __init prom_printf(const char *format, ...)
@@ -331,22 +326,18 @@ static void __init prom_printf(const char *format, ...)
331 va_list args; 326 va_list args;
332 unsigned long v; 327 unsigned long v;
333 long vs; 328 long vs;
334 struct prom_t *_prom = &RELOC(prom);
335 329
336 va_start(args, format); 330 va_start(args, format);
337#ifdef CONFIG_PPC64
338 format = PTRRELOC(format);
339#endif
340 for (p = format; *p != 0; p = q) { 331 for (p = format; *p != 0; p = q) {
341 for (q = p; *q != 0 && *q != '\n' && *q != '%'; ++q) 332 for (q = p; *q != 0 && *q != '\n' && *q != '%'; ++q)
342 ; 333 ;
343 if (q > p) 334 if (q > p)
344 call_prom("write", 3, 1, _prom->stdout, p, q - p); 335 call_prom("write", 3, 1, prom.stdout, p, q - p);
345 if (*q == 0) 336 if (*q == 0)
346 break; 337 break;
347 if (*q == '\n') { 338 if (*q == '\n') {
348 ++q; 339 ++q;
349 call_prom("write", 3, 1, _prom->stdout, 340 call_prom("write", 3, 1, prom.stdout,
350 ADDR("\r\n"), 2); 341 ADDR("\r\n"), 2);
351 continue; 342 continue;
352 } 343 }
@@ -368,7 +359,7 @@ static void __init prom_printf(const char *format, ...)
368 ++q; 359 ++q;
369 vs = va_arg(args, int); 360 vs = va_arg(args, int);
370 if (vs < 0) { 361 if (vs < 0) {
371 prom_print(RELOC("-")); 362 prom_print("-");
372 vs = -vs; 363 vs = -vs;
373 } 364 }
374 prom_print_dec(vs); 365 prom_print_dec(vs);
@@ -389,7 +380,7 @@ static void __init prom_printf(const char *format, ...)
389 ++q; 380 ++q;
390 vs = va_arg(args, long); 381 vs = va_arg(args, long);
391 if (vs < 0) { 382 if (vs < 0) {
392 prom_print(RELOC("-")); 383 prom_print("-");
393 vs = -vs; 384 vs = -vs;
394 } 385 }
395 prom_print_dec(vs); 386 prom_print_dec(vs);
@@ -403,7 +394,6 @@ static void __init prom_printf(const char *format, ...)
403static unsigned int __init prom_claim(unsigned long virt, unsigned long size, 394static unsigned int __init prom_claim(unsigned long virt, unsigned long size,
404 unsigned long align) 395 unsigned long align)
405{ 396{
406 struct prom_t *_prom = &RELOC(prom);
407 397
408 if (align == 0 && (OF_WORKAROUNDS & OF_WA_CLAIM)) { 398 if (align == 0 && (OF_WORKAROUNDS & OF_WA_CLAIM)) {
409 /* 399 /*
@@ -414,21 +404,21 @@ static unsigned int __init prom_claim(unsigned long virt, unsigned long size,
414 prom_arg_t result; 404 prom_arg_t result;
415 405
416 ret = call_prom_ret("call-method", 5, 2, &result, 406 ret = call_prom_ret("call-method", 5, 2, &result,
417 ADDR("claim"), _prom->memory, 407 ADDR("claim"), prom.memory,
418 align, size, virt); 408 align, size, virt);
419 if (ret != 0 || result == -1) 409 if (ret != 0 || result == -1)
420 return -1; 410 return -1;
421 ret = call_prom_ret("call-method", 5, 2, &result, 411 ret = call_prom_ret("call-method", 5, 2, &result,
422 ADDR("claim"), _prom->mmumap, 412 ADDR("claim"), prom.mmumap,
423 align, size, virt); 413 align, size, virt);
424 if (ret != 0) { 414 if (ret != 0) {
425 call_prom("call-method", 4, 1, ADDR("release"), 415 call_prom("call-method", 4, 1, ADDR("release"),
426 _prom->memory, size, virt); 416 prom.memory, size, virt);
427 return -1; 417 return -1;
428 } 418 }
429 /* the 0x12 is M (coherence) + PP == read/write */ 419 /* the 0x12 is M (coherence) + PP == read/write */
430 call_prom("call-method", 6, 1, 420 call_prom("call-method", 6, 1,
431 ADDR("map"), _prom->mmumap, 0x12, size, virt, virt); 421 ADDR("map"), prom.mmumap, 0x12, size, virt, virt);
432 return virt; 422 return virt;
433 } 423 }
434 return call_prom("claim", 3, 1, (prom_arg_t)virt, (prom_arg_t)size, 424 return call_prom("claim", 3, 1, (prom_arg_t)virt, (prom_arg_t)size,
@@ -437,13 +427,10 @@ static unsigned int __init prom_claim(unsigned long virt, unsigned long size,
437 427
438static void __init __attribute__((noreturn)) prom_panic(const char *reason) 428static void __init __attribute__((noreturn)) prom_panic(const char *reason)
439{ 429{
440#ifdef CONFIG_PPC64
441 reason = PTRRELOC(reason);
442#endif
443 prom_print(reason); 430 prom_print(reason);
444 /* Do not call exit because it clears the screen on pmac 431 /* Do not call exit because it clears the screen on pmac
445 * it also causes some sort of double-fault on early pmacs */ 432 * it also causes some sort of double-fault on early pmacs */
446 if (RELOC(of_platform) == PLATFORM_POWERMAC) 433 if (of_platform == PLATFORM_POWERMAC)
447 asm("trap\n"); 434 asm("trap\n");
448 435
449 /* ToDo: should put up an SRC here on pSeries */ 436 /* ToDo: should put up an SRC here on pSeries */
@@ -525,13 +512,13 @@ static int __init prom_setprop(phandle node, const char *nodename,
525 add_string(&p, tohex((u32)(unsigned long) value)); 512 add_string(&p, tohex((u32)(unsigned long) value));
526 add_string(&p, tohex(valuelen)); 513 add_string(&p, tohex(valuelen));
527 add_string(&p, tohex(ADDR(pname))); 514 add_string(&p, tohex(ADDR(pname)));
528 add_string(&p, tohex(strlen(RELOC(pname)))); 515 add_string(&p, tohex(strlen(pname)));
529 add_string(&p, "property"); 516 add_string(&p, "property");
530 *p = 0; 517 *p = 0;
531 return call_prom("interpret", 1, 1, (u32)(unsigned long) cmd); 518 return call_prom("interpret", 1, 1, (u32)(unsigned long) cmd);
532} 519}
533 520
534/* We can't use the standard versions because of RELOC headaches. */ 521/* We can't use the standard versions because of relocation headaches. */
535#define isxdigit(c) (('0' <= (c) && (c) <= '9') \ 522#define isxdigit(c) (('0' <= (c) && (c) <= '9') \
536 || ('a' <= (c) && (c) <= 'f') \ 523 || ('a' <= (c) && (c) <= 'f') \
537 || ('A' <= (c) && (c) <= 'F')) 524 || ('A' <= (c) && (c) <= 'F'))
@@ -598,43 +585,42 @@ unsigned long prom_memparse(const char *ptr, const char **retptr)
598 */ 585 */
599static void __init early_cmdline_parse(void) 586static void __init early_cmdline_parse(void)
600{ 587{
601 struct prom_t *_prom = &RELOC(prom);
602 const char *opt; 588 const char *opt;
603 589
604 char *p; 590 char *p;
605 int l = 0; 591 int l = 0;
606 592
607 RELOC(prom_cmd_line[0]) = 0; 593 prom_cmd_line[0] = 0;
608 p = RELOC(prom_cmd_line); 594 p = prom_cmd_line;
609 if ((long)_prom->chosen > 0) 595 if ((long)prom.chosen > 0)
610 l = prom_getprop(_prom->chosen, "bootargs", p, COMMAND_LINE_SIZE-1); 596 l = prom_getprop(prom.chosen, "bootargs", p, COMMAND_LINE_SIZE-1);
611#ifdef CONFIG_CMDLINE 597#ifdef CONFIG_CMDLINE
612 if (l <= 0 || p[0] == '\0') /* dbl check */ 598 if (l <= 0 || p[0] == '\0') /* dbl check */
613 strlcpy(RELOC(prom_cmd_line), 599 strlcpy(prom_cmd_line,
614 RELOC(CONFIG_CMDLINE), sizeof(prom_cmd_line)); 600 CONFIG_CMDLINE, sizeof(prom_cmd_line));
615#endif /* CONFIG_CMDLINE */ 601#endif /* CONFIG_CMDLINE */
616 prom_printf("command line: %s\n", RELOC(prom_cmd_line)); 602 prom_printf("command line: %s\n", prom_cmd_line);
617 603
618#ifdef CONFIG_PPC64 604#ifdef CONFIG_PPC64
619 opt = strstr(RELOC(prom_cmd_line), RELOC("iommu=")); 605 opt = strstr(prom_cmd_line, "iommu=");
620 if (opt) { 606 if (opt) {
621 prom_printf("iommu opt is: %s\n", opt); 607 prom_printf("iommu opt is: %s\n", opt);
622 opt += 6; 608 opt += 6;
623 while (*opt && *opt == ' ') 609 while (*opt && *opt == ' ')
624 opt++; 610 opt++;
625 if (!strncmp(opt, RELOC("off"), 3)) 611 if (!strncmp(opt, "off", 3))
626 RELOC(prom_iommu_off) = 1; 612 prom_iommu_off = 1;
627 else if (!strncmp(opt, RELOC("force"), 5)) 613 else if (!strncmp(opt, "force", 5))
628 RELOC(prom_iommu_force_on) = 1; 614 prom_iommu_force_on = 1;
629 } 615 }
630#endif 616#endif
631 opt = strstr(RELOC(prom_cmd_line), RELOC("mem=")); 617 opt = strstr(prom_cmd_line, "mem=");
632 if (opt) { 618 if (opt) {
633 opt += 4; 619 opt += 4;
634 RELOC(prom_memory_limit) = prom_memparse(opt, (const char **)&opt); 620 prom_memory_limit = prom_memparse(opt, (const char **)&opt);
635#ifdef CONFIG_PPC64 621#ifdef CONFIG_PPC64
636 /* Align to 16 MB == size of ppc64 large page */ 622 /* Align to 16 MB == size of ppc64 large page */
637 RELOC(prom_memory_limit) = ALIGN(RELOC(prom_memory_limit), 0x1000000); 623 prom_memory_limit = ALIGN(prom_memory_limit, 0x1000000);
638#endif 624#endif
639 } 625 }
640} 626}
@@ -887,7 +873,7 @@ static int __init prom_count_smt_threads(void)
887 type[0] = 0; 873 type[0] = 0;
888 prom_getprop(node, "device_type", type, sizeof(type)); 874 prom_getprop(node, "device_type", type, sizeof(type));
889 875
890 if (strcmp(type, RELOC("cpu"))) 876 if (strcmp(type, "cpu"))
891 continue; 877 continue;
892 /* 878 /*
893 * There is an entry for each smt thread, each entry being 879 * There is an entry for each smt thread, each entry being
@@ -929,7 +915,7 @@ static void __init prom_send_capabilities(void)
929 * (we assume this is the same for all cores) and use it to 915 * (we assume this is the same for all cores) and use it to
930 * divide NR_CPUS. 916 * divide NR_CPUS.
931 */ 917 */
932 cores = (u32 *)PTRRELOC(&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET]); 918 cores = (u32 *)&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET];
933 if (*cores != NR_CPUS) { 919 if (*cores != NR_CPUS) {
934 prom_printf("WARNING ! " 920 prom_printf("WARNING ! "
935 "ibm_architecture_vec structure inconsistent: %lu!\n", 921 "ibm_architecture_vec structure inconsistent: %lu!\n",
@@ -1005,21 +991,21 @@ static void __init prom_send_capabilities(void)
1005 */ 991 */
1006static unsigned long __init alloc_up(unsigned long size, unsigned long align) 992static unsigned long __init alloc_up(unsigned long size, unsigned long align)
1007{ 993{
1008 unsigned long base = RELOC(alloc_bottom); 994 unsigned long base = alloc_bottom;
1009 unsigned long addr = 0; 995 unsigned long addr = 0;
1010 996
1011 if (align) 997 if (align)
1012 base = _ALIGN_UP(base, align); 998 base = _ALIGN_UP(base, align);
1013 prom_debug("alloc_up(%x, %x)\n", size, align); 999 prom_debug("alloc_up(%x, %x)\n", size, align);
1014 if (RELOC(ram_top) == 0) 1000 if (ram_top == 0)
1015 prom_panic("alloc_up() called with mem not initialized\n"); 1001 prom_panic("alloc_up() called with mem not initialized\n");
1016 1002
1017 if (align) 1003 if (align)
1018 base = _ALIGN_UP(RELOC(alloc_bottom), align); 1004 base = _ALIGN_UP(alloc_bottom, align);
1019 else 1005 else
1020 base = RELOC(alloc_bottom); 1006 base = alloc_bottom;
1021 1007
1022 for(; (base + size) <= RELOC(alloc_top); 1008 for(; (base + size) <= alloc_top;
1023 base = _ALIGN_UP(base + 0x100000, align)) { 1009 base = _ALIGN_UP(base + 0x100000, align)) {
1024 prom_debug(" trying: 0x%x\n\r", base); 1010 prom_debug(" trying: 0x%x\n\r", base);
1025 addr = (unsigned long)prom_claim(base, size, 0); 1011 addr = (unsigned long)prom_claim(base, size, 0);
@@ -1031,14 +1017,14 @@ static unsigned long __init alloc_up(unsigned long size, unsigned long align)
1031 } 1017 }
1032 if (addr == 0) 1018 if (addr == 0)
1033 return 0; 1019 return 0;
1034 RELOC(alloc_bottom) = addr + size; 1020 alloc_bottom = addr + size;
1035 1021
1036 prom_debug(" -> %x\n", addr); 1022 prom_debug(" -> %x\n", addr);
1037 prom_debug(" alloc_bottom : %x\n", RELOC(alloc_bottom)); 1023 prom_debug(" alloc_bottom : %x\n", alloc_bottom);
1038 prom_debug(" alloc_top : %x\n", RELOC(alloc_top)); 1024 prom_debug(" alloc_top : %x\n", alloc_top);
1039 prom_debug(" alloc_top_hi : %x\n", RELOC(alloc_top_high)); 1025 prom_debug(" alloc_top_hi : %x\n", alloc_top_high);
1040 prom_debug(" rmo_top : %x\n", RELOC(rmo_top)); 1026 prom_debug(" rmo_top : %x\n", rmo_top);
1041 prom_debug(" ram_top : %x\n", RELOC(ram_top)); 1027 prom_debug(" ram_top : %x\n", ram_top);
1042 1028
1043 return addr; 1029 return addr;
1044} 1030}
@@ -1054,32 +1040,32 @@ static unsigned long __init alloc_down(unsigned long size, unsigned long align,
1054 unsigned long base, addr = 0; 1040 unsigned long base, addr = 0;
1055 1041
1056 prom_debug("alloc_down(%x, %x, %s)\n", size, align, 1042 prom_debug("alloc_down(%x, %x, %s)\n", size, align,
1057 highmem ? RELOC("(high)") : RELOC("(low)")); 1043 highmem ? "(high)" : "(low)");
1058 if (RELOC(ram_top) == 0) 1044 if (ram_top == 0)
1059 prom_panic("alloc_down() called with mem not initialized\n"); 1045 prom_panic("alloc_down() called with mem not initialized\n");
1060 1046
1061 if (highmem) { 1047 if (highmem) {
1062 /* Carve out storage for the TCE table. */ 1048 /* Carve out storage for the TCE table. */
1063 addr = _ALIGN_DOWN(RELOC(alloc_top_high) - size, align); 1049 addr = _ALIGN_DOWN(alloc_top_high - size, align);
1064 if (addr <= RELOC(alloc_bottom)) 1050 if (addr <= alloc_bottom)
1065 return 0; 1051 return 0;
1066 /* Will we bump into the RMO ? If yes, check out that we 1052 /* Will we bump into the RMO ? If yes, check out that we
1067 * didn't overlap existing allocations there, if we did, 1053 * didn't overlap existing allocations there, if we did,
1068 * we are dead, we must be the first in town ! 1054 * we are dead, we must be the first in town !
1069 */ 1055 */
1070 if (addr < RELOC(rmo_top)) { 1056 if (addr < rmo_top) {
1071 /* Good, we are first */ 1057 /* Good, we are first */
1072 if (RELOC(alloc_top) == RELOC(rmo_top)) 1058 if (alloc_top == rmo_top)
1073 RELOC(alloc_top) = RELOC(rmo_top) = addr; 1059 alloc_top = rmo_top = addr;
1074 else 1060 else
1075 return 0; 1061 return 0;
1076 } 1062 }
1077 RELOC(alloc_top_high) = addr; 1063 alloc_top_high = addr;
1078 goto bail; 1064 goto bail;
1079 } 1065 }
1080 1066
1081 base = _ALIGN_DOWN(RELOC(alloc_top) - size, align); 1067 base = _ALIGN_DOWN(alloc_top - size, align);
1082 for (; base > RELOC(alloc_bottom); 1068 for (; base > alloc_bottom;
1083 base = _ALIGN_DOWN(base - 0x100000, align)) { 1069 base = _ALIGN_DOWN(base - 0x100000, align)) {
1084 prom_debug(" trying: 0x%x\n\r", base); 1070 prom_debug(" trying: 0x%x\n\r", base);
1085 addr = (unsigned long)prom_claim(base, size, 0); 1071 addr = (unsigned long)prom_claim(base, size, 0);
@@ -1089,15 +1075,15 @@ static unsigned long __init alloc_down(unsigned long size, unsigned long align,
1089 } 1075 }
1090 if (addr == 0) 1076 if (addr == 0)
1091 return 0; 1077 return 0;
1092 RELOC(alloc_top) = addr; 1078 alloc_top = addr;
1093 1079
1094 bail: 1080 bail:
1095 prom_debug(" -> %x\n", addr); 1081 prom_debug(" -> %x\n", addr);
1096 prom_debug(" alloc_bottom : %x\n", RELOC(alloc_bottom)); 1082 prom_debug(" alloc_bottom : %x\n", alloc_bottom);
1097 prom_debug(" alloc_top : %x\n", RELOC(alloc_top)); 1083 prom_debug(" alloc_top : %x\n", alloc_top);
1098 prom_debug(" alloc_top_hi : %x\n", RELOC(alloc_top_high)); 1084 prom_debug(" alloc_top_hi : %x\n", alloc_top_high);
1099 prom_debug(" rmo_top : %x\n", RELOC(rmo_top)); 1085 prom_debug(" rmo_top : %x\n", rmo_top);
1100 prom_debug(" ram_top : %x\n", RELOC(ram_top)); 1086 prom_debug(" ram_top : %x\n", ram_top);
1101 1087
1102 return addr; 1088 return addr;
1103} 1089}
@@ -1137,7 +1123,7 @@ static unsigned long __init prom_next_cell(int s, cell_t **cellp)
1137static void __init reserve_mem(u64 base, u64 size) 1123static void __init reserve_mem(u64 base, u64 size)
1138{ 1124{
1139 u64 top = base + size; 1125 u64 top = base + size;
1140 unsigned long cnt = RELOC(mem_reserve_cnt); 1126 unsigned long cnt = mem_reserve_cnt;
1141 1127
1142 if (size == 0) 1128 if (size == 0)
1143 return; 1129 return;
@@ -1152,9 +1138,9 @@ static void __init reserve_mem(u64 base, u64 size)
1152 1138
1153 if (cnt >= (MEM_RESERVE_MAP_SIZE - 1)) 1139 if (cnt >= (MEM_RESERVE_MAP_SIZE - 1))
1154 prom_panic("Memory reserve map exhausted !\n"); 1140 prom_panic("Memory reserve map exhausted !\n");
1155 RELOC(mem_reserve_map)[cnt].base = base; 1141 mem_reserve_map[cnt].base = base;
1156 RELOC(mem_reserve_map)[cnt].size = size; 1142 mem_reserve_map[cnt].size = size;
1157 RELOC(mem_reserve_cnt) = cnt + 1; 1143 mem_reserve_cnt = cnt + 1;
1158} 1144}
1159 1145
1160/* 1146/*
@@ -1167,7 +1153,6 @@ static void __init prom_init_mem(void)
1167 char *path, type[64]; 1153 char *path, type[64];
1168 unsigned int plen; 1154 unsigned int plen;
1169 cell_t *p, *endp; 1155 cell_t *p, *endp;
1170 struct prom_t *_prom = &RELOC(prom);
1171 u32 rac, rsc; 1156 u32 rac, rsc;
1172 1157
1173 /* 1158 /*
@@ -1176,14 +1161,14 @@ static void __init prom_init_mem(void)
1176 * 2) top of memory 1161 * 2) top of memory
1177 */ 1162 */
1178 rac = 2; 1163 rac = 2;
1179 prom_getprop(_prom->root, "#address-cells", &rac, sizeof(rac)); 1164 prom_getprop(prom.root, "#address-cells", &rac, sizeof(rac));
1180 rsc = 1; 1165 rsc = 1;
1181 prom_getprop(_prom->root, "#size-cells", &rsc, sizeof(rsc)); 1166 prom_getprop(prom.root, "#size-cells", &rsc, sizeof(rsc));
1182 prom_debug("root_addr_cells: %x\n", (unsigned long) rac); 1167 prom_debug("root_addr_cells: %x\n", (unsigned long) rac);
1183 prom_debug("root_size_cells: %x\n", (unsigned long) rsc); 1168 prom_debug("root_size_cells: %x\n", (unsigned long) rsc);
1184 1169
1185 prom_debug("scanning memory:\n"); 1170 prom_debug("scanning memory:\n");
1186 path = RELOC(prom_scratch); 1171 path = prom_scratch;
1187 1172
1188 for (node = 0; prom_next_node(&node); ) { 1173 for (node = 0; prom_next_node(&node); ) {
1189 type[0] = 0; 1174 type[0] = 0;
@@ -1196,15 +1181,15 @@ static void __init prom_init_mem(void)
1196 */ 1181 */
1197 prom_getprop(node, "name", type, sizeof(type)); 1182 prom_getprop(node, "name", type, sizeof(type));
1198 } 1183 }
1199 if (strcmp(type, RELOC("memory"))) 1184 if (strcmp(type, "memory"))
1200 continue; 1185 continue;
1201 1186
1202 plen = prom_getprop(node, "reg", RELOC(regbuf), sizeof(regbuf)); 1187 plen = prom_getprop(node, "reg", regbuf, sizeof(regbuf));
1203 if (plen > sizeof(regbuf)) { 1188 if (plen > sizeof(regbuf)) {
1204 prom_printf("memory node too large for buffer !\n"); 1189 prom_printf("memory node too large for buffer !\n");
1205 plen = sizeof(regbuf); 1190 plen = sizeof(regbuf);
1206 } 1191 }
1207 p = RELOC(regbuf); 1192 p = regbuf;
1208 endp = p + (plen / sizeof(cell_t)); 1193 endp = p + (plen / sizeof(cell_t));
1209 1194
1210#ifdef DEBUG_PROM 1195#ifdef DEBUG_PROM
@@ -1222,14 +1207,14 @@ static void __init prom_init_mem(void)
1222 if (size == 0) 1207 if (size == 0)
1223 continue; 1208 continue;
1224 prom_debug(" %x %x\n", base, size); 1209 prom_debug(" %x %x\n", base, size);
1225 if (base == 0 && (RELOC(of_platform) & PLATFORM_LPAR)) 1210 if (base == 0 && (of_platform & PLATFORM_LPAR))
1226 RELOC(rmo_top) = size; 1211 rmo_top = size;
1227 if ((base + size) > RELOC(ram_top)) 1212 if ((base + size) > ram_top)
1228 RELOC(ram_top) = base + size; 1213 ram_top = base + size;
1229 } 1214 }
1230 } 1215 }
1231 1216
1232 RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000); 1217 alloc_bottom = PAGE_ALIGN((unsigned long)&_end + 0x4000);
1233 1218
1234 /* 1219 /*
1235 * If prom_memory_limit is set we reduce the upper limits *except* for 1220 * If prom_memory_limit is set we reduce the upper limits *except* for
@@ -1237,20 +1222,20 @@ static void __init prom_init_mem(void)
1237 * TCE's up there. 1222 * TCE's up there.
1238 */ 1223 */
1239 1224
1240 RELOC(alloc_top_high) = RELOC(ram_top); 1225 alloc_top_high = ram_top;
1241 1226
1242 if (RELOC(prom_memory_limit)) { 1227 if (prom_memory_limit) {
1243 if (RELOC(prom_memory_limit) <= RELOC(alloc_bottom)) { 1228 if (prom_memory_limit <= alloc_bottom) {
1244 prom_printf("Ignoring mem=%x <= alloc_bottom.\n", 1229 prom_printf("Ignoring mem=%x <= alloc_bottom.\n",
1245 RELOC(prom_memory_limit)); 1230 prom_memory_limit);
1246 RELOC(prom_memory_limit) = 0; 1231 prom_memory_limit = 0;
1247 } else if (RELOC(prom_memory_limit) >= RELOC(ram_top)) { 1232 } else if (prom_memory_limit >= ram_top) {
1248 prom_printf("Ignoring mem=%x >= ram_top.\n", 1233 prom_printf("Ignoring mem=%x >= ram_top.\n",
1249 RELOC(prom_memory_limit)); 1234 prom_memory_limit);
1250 RELOC(prom_memory_limit) = 0; 1235 prom_memory_limit = 0;
1251 } else { 1236 } else {
1252 RELOC(ram_top) = RELOC(prom_memory_limit); 1237 ram_top = prom_memory_limit;
1253 RELOC(rmo_top) = min(RELOC(rmo_top), RELOC(prom_memory_limit)); 1238 rmo_top = min(rmo_top, prom_memory_limit);
1254 } 1239 }
1255 } 1240 }
1256 1241
@@ -1262,36 +1247,35 @@ static void __init prom_init_mem(void)
1262 * Since 768MB is plenty of room, and we need to cap to something 1247 * Since 768MB is plenty of room, and we need to cap to something
1263 * reasonable on 32-bit, cap at 768MB on all machines. 1248 * reasonable on 32-bit, cap at 768MB on all machines.
1264 */ 1249 */
1265 if (!RELOC(rmo_top)) 1250 if (!rmo_top)
1266 RELOC(rmo_top) = RELOC(ram_top); 1251 rmo_top = ram_top;
1267 RELOC(rmo_top) = min(0x30000000ul, RELOC(rmo_top)); 1252 rmo_top = min(0x30000000ul, rmo_top);
1268 RELOC(alloc_top) = RELOC(rmo_top); 1253 alloc_top = rmo_top;
1269 RELOC(alloc_top_high) = RELOC(ram_top); 1254 alloc_top_high = ram_top;
1270 1255
1271 /* 1256 /*
1272 * Check if we have an initrd after the kernel but still inside 1257 * Check if we have an initrd after the kernel but still inside
1273 * the RMO. If we do move our bottom point to after it. 1258 * the RMO. If we do move our bottom point to after it.
1274 */ 1259 */
1275 if (RELOC(prom_initrd_start) && 1260 if (prom_initrd_start &&
1276 RELOC(prom_initrd_start) < RELOC(rmo_top) && 1261 prom_initrd_start < rmo_top &&
1277 RELOC(prom_initrd_end) > RELOC(alloc_bottom)) 1262 prom_initrd_end > alloc_bottom)
1278 RELOC(alloc_bottom) = PAGE_ALIGN(RELOC(prom_initrd_end)); 1263 alloc_bottom = PAGE_ALIGN(prom_initrd_end);
1279 1264
1280 prom_printf("memory layout at init:\n"); 1265 prom_printf("memory layout at init:\n");
1281 prom_printf(" memory_limit : %x (16 MB aligned)\n", RELOC(prom_memory_limit)); 1266 prom_printf(" memory_limit : %x (16 MB aligned)\n", prom_memory_limit);
1282 prom_printf(" alloc_bottom : %x\n", RELOC(alloc_bottom)); 1267 prom_printf(" alloc_bottom : %x\n", alloc_bottom);
1283 prom_printf(" alloc_top : %x\n", RELOC(alloc_top)); 1268 prom_printf(" alloc_top : %x\n", alloc_top);
1284 prom_printf(" alloc_top_hi : %x\n", RELOC(alloc_top_high)); 1269 prom_printf(" alloc_top_hi : %x\n", alloc_top_high);
1285 prom_printf(" rmo_top : %x\n", RELOC(rmo_top)); 1270 prom_printf(" rmo_top : %x\n", rmo_top);
1286 prom_printf(" ram_top : %x\n", RELOC(ram_top)); 1271 prom_printf(" ram_top : %x\n", ram_top);
1287} 1272}
1288 1273
1289static void __init prom_close_stdin(void) 1274static void __init prom_close_stdin(void)
1290{ 1275{
1291 struct prom_t *_prom = &RELOC(prom);
1292 ihandle val; 1276 ihandle val;
1293 1277
1294 if (prom_getprop(_prom->chosen, "stdin", &val, sizeof(val)) > 0) 1278 if (prom_getprop(prom.chosen, "stdin", &val, sizeof(val)) > 0)
1295 call_prom("close", 1, 0, val); 1279 call_prom("close", 1, 0, val);
1296} 1280}
1297 1281
@@ -1332,19 +1316,19 @@ static void __init prom_query_opal(void)
1332 } 1316 }
1333 1317
1334 prom_printf("Querying for OPAL presence... "); 1318 prom_printf("Querying for OPAL presence... ");
1335 rc = opal_query_takeover(&RELOC(prom_opal_size), 1319 rc = opal_query_takeover(&prom_opal_size,
1336 &RELOC(prom_opal_align)); 1320 &prom_opal_align);
1337 prom_debug("(rc = %ld) ", rc); 1321 prom_debug("(rc = %ld) ", rc);
1338 if (rc != 0) { 1322 if (rc != 0) {
1339 prom_printf("not there.\n"); 1323 prom_printf("not there.\n");
1340 return; 1324 return;
1341 } 1325 }
1342 RELOC(of_platform) = PLATFORM_OPAL; 1326 of_platform = PLATFORM_OPAL;
1343 prom_printf(" there !\n"); 1327 prom_printf(" there !\n");
1344 prom_debug(" opal_size = 0x%lx\n", RELOC(prom_opal_size)); 1328 prom_debug(" opal_size = 0x%lx\n", prom_opal_size);
1345 prom_debug(" opal_align = 0x%lx\n", RELOC(prom_opal_align)); 1329 prom_debug(" opal_align = 0x%lx\n", prom_opal_align);
1346 if (RELOC(prom_opal_align) < 0x10000) 1330 if (prom_opal_align < 0x10000)
1347 RELOC(prom_opal_align) = 0x10000; 1331 prom_opal_align = 0x10000;
1348} 1332}
1349 1333
1350static int prom_rtas_call(int token, int nargs, int nret, int *outputs, ...) 1334static int prom_rtas_call(int token, int nargs, int nret, int *outputs, ...)
@@ -1365,8 +1349,8 @@ static int prom_rtas_call(int token, int nargs, int nret, int *outputs, ...)
1365 for (i = 0; i < nret; ++i) 1349 for (i = 0; i < nret; ++i)
1366 rtas_args.rets[i] = 0; 1350 rtas_args.rets[i] = 0;
1367 1351
1368 opal_enter_rtas(&rtas_args, RELOC(prom_rtas_data), 1352 opal_enter_rtas(&rtas_args, prom_rtas_data,
1369 RELOC(prom_rtas_entry)); 1353 prom_rtas_entry);
1370 1354
1371 if (nret > 1 && outputs != NULL) 1355 if (nret > 1 && outputs != NULL)
1372 for (i = 0; i < nret-1; ++i) 1356 for (i = 0; i < nret-1; ++i)
@@ -1381,9 +1365,8 @@ static void __init prom_opal_hold_cpus(void)
1381 phandle node; 1365 phandle node;
1382 char type[64]; 1366 char type[64];
1383 u32 servers[8]; 1367 u32 servers[8];
1384 struct prom_t *_prom = &RELOC(prom); 1368 void *entry = (unsigned long *)&opal_secondary_entry;
1385 void *entry = (unsigned long *)&RELOC(opal_secondary_entry); 1369 struct opal_secondary_data *data = &opal_secondary_data;
1386 struct opal_secondary_data *data = &RELOC(opal_secondary_data);
1387 1370
1388 prom_debug("prom_opal_hold_cpus: start...\n"); 1371 prom_debug("prom_opal_hold_cpus: start...\n");
1389 prom_debug(" - entry = 0x%x\n", entry); 1372 prom_debug(" - entry = 0x%x\n", entry);
@@ -1396,12 +1379,12 @@ static void __init prom_opal_hold_cpus(void)
1396 for (node = 0; prom_next_node(&node); ) { 1379 for (node = 0; prom_next_node(&node); ) {
1397 type[0] = 0; 1380 type[0] = 0;
1398 prom_getprop(node, "device_type", type, sizeof(type)); 1381 prom_getprop(node, "device_type", type, sizeof(type));
1399 if (strcmp(type, RELOC("cpu")) != 0) 1382 if (strcmp(type, "cpu") != 0)
1400 continue; 1383 continue;
1401 1384
1402 /* Skip non-configured cpus. */ 1385 /* Skip non-configured cpus. */
1403 if (prom_getprop(node, "status", type, sizeof(type)) > 0) 1386 if (prom_getprop(node, "status", type, sizeof(type)) > 0)
1404 if (strcmp(type, RELOC("okay")) != 0) 1387 if (strcmp(type, "okay") != 0)
1405 continue; 1388 continue;
1406 1389
1407 cnt = prom_getprop(node, "ibm,ppc-interrupt-server#s", servers, 1390 cnt = prom_getprop(node, "ibm,ppc-interrupt-server#s", servers,
@@ -1412,7 +1395,7 @@ static void __init prom_opal_hold_cpus(void)
1412 for (i = 0; i < cnt; i++) { 1395 for (i = 0; i < cnt; i++) {
1413 cpu = servers[i]; 1396 cpu = servers[i];
1414 prom_debug("CPU %d ... ", cpu); 1397 prom_debug("CPU %d ... ", cpu);
1415 if (cpu == _prom->cpu) { 1398 if (cpu == prom.cpu) {
1416 prom_debug("booted !\n"); 1399 prom_debug("booted !\n");
1417 continue; 1400 continue;
1418 } 1401 }
@@ -1423,7 +1406,7 @@ static void __init prom_opal_hold_cpus(void)
1423 * spinloop. 1406 * spinloop.
1424 */ 1407 */
1425 data->ack = -1; 1408 data->ack = -1;
1426 rc = prom_rtas_call(RELOC(prom_rtas_start_cpu), 3, 1, 1409 rc = prom_rtas_call(prom_rtas_start_cpu, 3, 1,
1427 NULL, cpu, entry, data); 1410 NULL, cpu, entry, data);
1428 prom_debug("rtas rc=%d ...", rc); 1411 prom_debug("rtas rc=%d ...", rc);
1429 1412
@@ -1443,21 +1426,21 @@ static void __init prom_opal_hold_cpus(void)
1443 1426
1444static void __init prom_opal_takeover(void) 1427static void __init prom_opal_takeover(void)
1445{ 1428{
1446 struct opal_secondary_data *data = &RELOC(opal_secondary_data); 1429 struct opal_secondary_data *data = &opal_secondary_data;
1447 struct opal_takeover_args *args = &data->args; 1430 struct opal_takeover_args *args = &data->args;
1448 u64 align = RELOC(prom_opal_align); 1431 u64 align = prom_opal_align;
1449 u64 top_addr, opal_addr; 1432 u64 top_addr, opal_addr;
1450 1433
1451 args->k_image = (u64)RELOC(_stext); 1434 args->k_image = (u64)_stext;
1452 args->k_size = _end - _stext; 1435 args->k_size = _end - _stext;
1453 args->k_entry = 0; 1436 args->k_entry = 0;
1454 args->k_entry2 = 0x60; 1437 args->k_entry2 = 0x60;
1455 1438
1456 top_addr = _ALIGN_UP(args->k_size, align); 1439 top_addr = _ALIGN_UP(args->k_size, align);
1457 1440
1458 if (RELOC(prom_initrd_start) != 0) { 1441 if (prom_initrd_start != 0) {
1459 args->rd_image = RELOC(prom_initrd_start); 1442 args->rd_image = prom_initrd_start;
1460 args->rd_size = RELOC(prom_initrd_end) - args->rd_image; 1443 args->rd_size = prom_initrd_end - args->rd_image;
1461 args->rd_loc = top_addr; 1444 args->rd_loc = top_addr;
1462 top_addr = _ALIGN_UP(args->rd_loc + args->rd_size, align); 1445 top_addr = _ALIGN_UP(args->rd_loc + args->rd_size, align);
1463 } 1446 }
@@ -1469,13 +1452,13 @@ static void __init prom_opal_takeover(void)
1469 * has plenty of memory, and we ask for the HAL for now to 1452 * has plenty of memory, and we ask for the HAL for now to
1470 * be just below the 1G point, or above the initrd 1453 * be just below the 1G point, or above the initrd
1471 */ 1454 */
1472 opal_addr = _ALIGN_DOWN(0x40000000 - RELOC(prom_opal_size), align); 1455 opal_addr = _ALIGN_DOWN(0x40000000 - prom_opal_size, align);
1473 if (opal_addr < top_addr) 1456 if (opal_addr < top_addr)
1474 opal_addr = top_addr; 1457 opal_addr = top_addr;
1475 args->hal_addr = opal_addr; 1458 args->hal_addr = opal_addr;
1476 1459
1477 /* Copy the command line to the kernel image */ 1460 /* Copy the command line to the kernel image */
1478 strlcpy(RELOC(boot_command_line), RELOC(prom_cmd_line), 1461 strlcpy(boot_command_line, prom_cmd_line,
1479 COMMAND_LINE_SIZE); 1462 COMMAND_LINE_SIZE);
1480 1463
1481 prom_debug(" k_image = 0x%lx\n", args->k_image); 1464 prom_debug(" k_image = 0x%lx\n", args->k_image);
@@ -1557,8 +1540,8 @@ static void __init prom_instantiate_opal(void)
1557 &entry, sizeof(entry)); 1540 &entry, sizeof(entry));
1558 1541
1559#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL 1542#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
1560 RELOC(prom_opal_base) = base; 1543 prom_opal_base = base;
1561 RELOC(prom_opal_entry) = entry; 1544 prom_opal_entry = entry;
1562#endif 1545#endif
1563 prom_debug("prom_instantiate_opal: end...\n"); 1546 prom_debug("prom_instantiate_opal: end...\n");
1564} 1547}
@@ -1616,9 +1599,9 @@ static void __init prom_instantiate_rtas(void)
1616 1599
1617#ifdef CONFIG_PPC_POWERNV 1600#ifdef CONFIG_PPC_POWERNV
1618 /* PowerVN takeover hack */ 1601 /* PowerVN takeover hack */
1619 RELOC(prom_rtas_data) = base; 1602 prom_rtas_data = base;
1620 RELOC(prom_rtas_entry) = entry; 1603 prom_rtas_entry = entry;
1621 prom_getprop(rtas_node, "start-cpu", &RELOC(prom_rtas_start_cpu), 4); 1604 prom_getprop(rtas_node, "start-cpu", &prom_rtas_start_cpu, 4);
1622#endif 1605#endif
1623 prom_debug("rtas base = 0x%x\n", base); 1606 prom_debug("rtas base = 0x%x\n", base);
1624 prom_debug("rtas entry = 0x%x\n", entry); 1607 prom_debug("rtas entry = 0x%x\n", entry);
@@ -1693,20 +1676,20 @@ static void __init prom_initialize_tce_table(void)
1693 phandle node; 1676 phandle node;
1694 ihandle phb_node; 1677 ihandle phb_node;
1695 char compatible[64], type[64], model[64]; 1678 char compatible[64], type[64], model[64];
1696 char *path = RELOC(prom_scratch); 1679 char *path = prom_scratch;
1697 u64 base, align; 1680 u64 base, align;
1698 u32 minalign, minsize; 1681 u32 minalign, minsize;
1699 u64 tce_entry, *tce_entryp; 1682 u64 tce_entry, *tce_entryp;
1700 u64 local_alloc_top, local_alloc_bottom; 1683 u64 local_alloc_top, local_alloc_bottom;
1701 u64 i; 1684 u64 i;
1702 1685
1703 if (RELOC(prom_iommu_off)) 1686 if (prom_iommu_off)
1704 return; 1687 return;
1705 1688
1706 prom_debug("starting prom_initialize_tce_table\n"); 1689 prom_debug("starting prom_initialize_tce_table\n");
1707 1690
1708 /* Cache current top of allocs so we reserve a single block */ 1691 /* Cache current top of allocs so we reserve a single block */
1709 local_alloc_top = RELOC(alloc_top_high); 1692 local_alloc_top = alloc_top_high;
1710 local_alloc_bottom = local_alloc_top; 1693 local_alloc_bottom = local_alloc_top;
1711 1694
1712 /* Search all nodes looking for PHBs. */ 1695 /* Search all nodes looking for PHBs. */
@@ -1719,19 +1702,19 @@ static void __init prom_initialize_tce_table(void)
1719 prom_getprop(node, "device_type", type, sizeof(type)); 1702 prom_getprop(node, "device_type", type, sizeof(type));
1720 prom_getprop(node, "model", model, sizeof(model)); 1703 prom_getprop(node, "model", model, sizeof(model));
1721 1704
1722 if ((type[0] == 0) || (strstr(type, RELOC("pci")) == NULL)) 1705 if ((type[0] == 0) || (strstr(type, "pci") == NULL))
1723 continue; 1706 continue;
1724 1707
1725 /* Keep the old logic intact to avoid regression. */ 1708 /* Keep the old logic intact to avoid regression. */
1726 if (compatible[0] != 0) { 1709 if (compatible[0] != 0) {
1727 if ((strstr(compatible, RELOC("python")) == NULL) && 1710 if ((strstr(compatible, "python") == NULL) &&
1728 (strstr(compatible, RELOC("Speedwagon")) == NULL) && 1711 (strstr(compatible, "Speedwagon") == NULL) &&
1729 (strstr(compatible, RELOC("Winnipeg")) == NULL)) 1712 (strstr(compatible, "Winnipeg") == NULL))
1730 continue; 1713 continue;
1731 } else if (model[0] != 0) { 1714 } else if (model[0] != 0) {
1732 if ((strstr(model, RELOC("ython")) == NULL) && 1715 if ((strstr(model, "ython") == NULL) &&
1733 (strstr(model, RELOC("peedwagon")) == NULL) && 1716 (strstr(model, "peedwagon") == NULL) &&
1734 (strstr(model, RELOC("innipeg")) == NULL)) 1717 (strstr(model, "innipeg") == NULL))
1735 continue; 1718 continue;
1736 } 1719 }
1737 1720
@@ -1810,8 +1793,8 @@ static void __init prom_initialize_tce_table(void)
1810 1793
1811 /* These are only really needed if there is a memory limit in 1794 /* These are only really needed if there is a memory limit in
1812 * effect, but we don't know so export them always. */ 1795 * effect, but we don't know so export them always. */
1813 RELOC(prom_tce_alloc_start) = local_alloc_bottom; 1796 prom_tce_alloc_start = local_alloc_bottom;
1814 RELOC(prom_tce_alloc_end) = local_alloc_top; 1797 prom_tce_alloc_end = local_alloc_top;
1815 1798
1816 /* Flag the first invalid entry */ 1799 /* Flag the first invalid entry */
1817 prom_debug("ending prom_initialize_tce_table\n"); 1800 prom_debug("ending prom_initialize_tce_table\n");
@@ -1848,7 +1831,6 @@ static void __init prom_hold_cpus(void)
1848 unsigned int reg; 1831 unsigned int reg;
1849 phandle node; 1832 phandle node;
1850 char type[64]; 1833 char type[64];
1851 struct prom_t *_prom = &RELOC(prom);
1852 unsigned long *spinloop 1834 unsigned long *spinloop
1853 = (void *) LOW_ADDR(__secondary_hold_spinloop); 1835 = (void *) LOW_ADDR(__secondary_hold_spinloop);
1854 unsigned long *acknowledge 1836 unsigned long *acknowledge
@@ -1874,12 +1856,12 @@ static void __init prom_hold_cpus(void)
1874 for (node = 0; prom_next_node(&node); ) { 1856 for (node = 0; prom_next_node(&node); ) {
1875 type[0] = 0; 1857 type[0] = 0;
1876 prom_getprop(node, "device_type", type, sizeof(type)); 1858 prom_getprop(node, "device_type", type, sizeof(type));
1877 if (strcmp(type, RELOC("cpu")) != 0) 1859 if (strcmp(type, "cpu") != 0)
1878 continue; 1860 continue;
1879 1861
1880 /* Skip non-configured cpus. */ 1862 /* Skip non-configured cpus. */
1881 if (prom_getprop(node, "status", type, sizeof(type)) > 0) 1863 if (prom_getprop(node, "status", type, sizeof(type)) > 0)
1882 if (strcmp(type, RELOC("okay")) != 0) 1864 if (strcmp(type, "okay") != 0)
1883 continue; 1865 continue;
1884 1866
1885 reg = -1; 1867 reg = -1;
@@ -1893,7 +1875,7 @@ static void __init prom_hold_cpus(void)
1893 */ 1875 */
1894 *acknowledge = (unsigned long)-1; 1876 *acknowledge = (unsigned long)-1;
1895 1877
1896 if (reg != _prom->cpu) { 1878 if (reg != prom.cpu) {
1897 /* Primary Thread of non-boot cpu or any thread */ 1879 /* Primary Thread of non-boot cpu or any thread */
1898 prom_printf("starting cpu hw idx %lu... ", reg); 1880 prom_printf("starting cpu hw idx %lu... ", reg);
1899 call_prom("start-cpu", 3, 0, node, 1881 call_prom("start-cpu", 3, 0, node,
@@ -1920,22 +1902,20 @@ static void __init prom_hold_cpus(void)
1920 1902
1921static void __init prom_init_client_services(unsigned long pp) 1903static void __init prom_init_client_services(unsigned long pp)
1922{ 1904{
1923 struct prom_t *_prom = &RELOC(prom);
1924
1925 /* Get a handle to the prom entry point before anything else */ 1905 /* Get a handle to the prom entry point before anything else */
1926 RELOC(prom_entry) = pp; 1906 prom_entry = pp;
1927 1907
1928 /* get a handle for the stdout device */ 1908 /* get a handle for the stdout device */
1929 _prom->chosen = call_prom("finddevice", 1, 1, ADDR("/chosen")); 1909 prom.chosen = call_prom("finddevice", 1, 1, ADDR("/chosen"));
1930 if (!PHANDLE_VALID(_prom->chosen)) 1910 if (!PHANDLE_VALID(prom.chosen))
1931 prom_panic("cannot find chosen"); /* msg won't be printed :( */ 1911 prom_panic("cannot find chosen"); /* msg won't be printed :( */
1932 1912
1933 /* get device tree root */ 1913 /* get device tree root */
1934 _prom->root = call_prom("finddevice", 1, 1, ADDR("/")); 1914 prom.root = call_prom("finddevice", 1, 1, ADDR("/"));
1935 if (!PHANDLE_VALID(_prom->root)) 1915 if (!PHANDLE_VALID(prom.root))
1936 prom_panic("cannot find device tree root"); /* msg won't be printed :( */ 1916 prom_panic("cannot find device tree root"); /* msg won't be printed :( */
1937 1917
1938 _prom->mmumap = 0; 1918 prom.mmumap = 0;
1939} 1919}
1940 1920
1941#ifdef CONFIG_PPC32 1921#ifdef CONFIG_PPC32
@@ -1946,7 +1926,6 @@ static void __init prom_init_client_services(unsigned long pp)
1946 */ 1926 */
1947static void __init prom_find_mmu(void) 1927static void __init prom_find_mmu(void)
1948{ 1928{
1949 struct prom_t *_prom = &RELOC(prom);
1950 phandle oprom; 1929 phandle oprom;
1951 char version[64]; 1930 char version[64];
1952 1931
@@ -1964,10 +1943,10 @@ static void __init prom_find_mmu(void)
1964 call_prom("interpret", 1, 1, "dev /memory 0 to allow-reclaim"); 1943 call_prom("interpret", 1, 1, "dev /memory 0 to allow-reclaim");
1965 } else 1944 } else
1966 return; 1945 return;
1967 _prom->memory = call_prom("open", 1, 1, ADDR("/memory")); 1946 prom.memory = call_prom("open", 1, 1, ADDR("/memory"));
1968 prom_getprop(_prom->chosen, "mmu", &_prom->mmumap, 1947 prom_getprop(prom.chosen, "mmu", &prom.mmumap,
1969 sizeof(_prom->mmumap)); 1948 sizeof(prom.mmumap));
1970 if (!IHANDLE_VALID(_prom->memory) || !IHANDLE_VALID(_prom->mmumap)) 1949 if (!IHANDLE_VALID(prom.memory) || !IHANDLE_VALID(prom.mmumap))
1971 of_workarounds &= ~OF_WA_CLAIM; /* hmmm */ 1950 of_workarounds &= ~OF_WA_CLAIM; /* hmmm */
1972} 1951}
1973#else 1952#else
@@ -1976,36 +1955,34 @@ static void __init prom_find_mmu(void)
1976 1955
1977static void __init prom_init_stdout(void) 1956static void __init prom_init_stdout(void)
1978{ 1957{
1979 struct prom_t *_prom = &RELOC(prom); 1958 char *path = of_stdout_device;
1980 char *path = RELOC(of_stdout_device);
1981 char type[16]; 1959 char type[16];
1982 u32 val; 1960 u32 val;
1983 1961
1984 if (prom_getprop(_prom->chosen, "stdout", &val, sizeof(val)) <= 0) 1962 if (prom_getprop(prom.chosen, "stdout", &val, sizeof(val)) <= 0)
1985 prom_panic("cannot find stdout"); 1963 prom_panic("cannot find stdout");
1986 1964
1987 _prom->stdout = val; 1965 prom.stdout = val;
1988 1966
1989 /* Get the full OF pathname of the stdout device */ 1967 /* Get the full OF pathname of the stdout device */
1990 memset(path, 0, 256); 1968 memset(path, 0, 256);
1991 call_prom("instance-to-path", 3, 1, _prom->stdout, path, 255); 1969 call_prom("instance-to-path", 3, 1, prom.stdout, path, 255);
1992 val = call_prom("instance-to-package", 1, 1, _prom->stdout); 1970 val = call_prom("instance-to-package", 1, 1, prom.stdout);
1993 prom_setprop(_prom->chosen, "/chosen", "linux,stdout-package", 1971 prom_setprop(prom.chosen, "/chosen", "linux,stdout-package",
1994 &val, sizeof(val)); 1972 &val, sizeof(val));
1995 prom_printf("OF stdout device is: %s\n", RELOC(of_stdout_device)); 1973 prom_printf("OF stdout device is: %s\n", of_stdout_device);
1996 prom_setprop(_prom->chosen, "/chosen", "linux,stdout-path", 1974 prom_setprop(prom.chosen, "/chosen", "linux,stdout-path",
1997 path, strlen(path) + 1); 1975 path, strlen(path) + 1);
1998 1976
1999 /* If it's a display, note it */ 1977 /* If it's a display, note it */
2000 memset(type, 0, sizeof(type)); 1978 memset(type, 0, sizeof(type));
2001 prom_getprop(val, "device_type", type, sizeof(type)); 1979 prom_getprop(val, "device_type", type, sizeof(type));
2002 if (strcmp(type, RELOC("display")) == 0) 1980 if (strcmp(type, "display") == 0)
2003 prom_setprop(val, path, "linux,boot-display", NULL, 0); 1981 prom_setprop(val, path, "linux,boot-display", NULL, 0);
2004} 1982}
2005 1983
2006static int __init prom_find_machine_type(void) 1984static int __init prom_find_machine_type(void)
2007{ 1985{
2008 struct prom_t *_prom = &RELOC(prom);
2009 char compat[256]; 1986 char compat[256];
2010 int len, i = 0; 1987 int len, i = 0;
2011#ifdef CONFIG_PPC64 1988#ifdef CONFIG_PPC64
@@ -2014,7 +1991,7 @@ static int __init prom_find_machine_type(void)
2014#endif 1991#endif
2015 1992
2016 /* Look for a PowerMac or a Cell */ 1993 /* Look for a PowerMac or a Cell */
2017 len = prom_getprop(_prom->root, "compatible", 1994 len = prom_getprop(prom.root, "compatible",
2018 compat, sizeof(compat)-1); 1995 compat, sizeof(compat)-1);
2019 if (len > 0) { 1996 if (len > 0) {
2020 compat[len] = 0; 1997 compat[len] = 0;
@@ -2023,16 +2000,16 @@ static int __init prom_find_machine_type(void)
2023 int sl = strlen(p); 2000 int sl = strlen(p);
2024 if (sl == 0) 2001 if (sl == 0)
2025 break; 2002 break;
2026 if (strstr(p, RELOC("Power Macintosh")) || 2003 if (strstr(p, "Power Macintosh") ||
2027 strstr(p, RELOC("MacRISC"))) 2004 strstr(p, "MacRISC"))
2028 return PLATFORM_POWERMAC; 2005 return PLATFORM_POWERMAC;
2029#ifdef CONFIG_PPC64 2006#ifdef CONFIG_PPC64
2030 /* We must make sure we don't detect the IBM Cell 2007 /* We must make sure we don't detect the IBM Cell
2031 * blades as pSeries due to some firmware issues, 2008 * blades as pSeries due to some firmware issues,
2032 * so we do it here. 2009 * so we do it here.
2033 */ 2010 */
2034 if (strstr(p, RELOC("IBM,CBEA")) || 2011 if (strstr(p, "IBM,CBEA") ||
2035 strstr(p, RELOC("IBM,CPBW-1.0"))) 2012 strstr(p, "IBM,CPBW-1.0"))
2036 return PLATFORM_GENERIC; 2013 return PLATFORM_GENERIC;
2037#endif /* CONFIG_PPC64 */ 2014#endif /* CONFIG_PPC64 */
2038 i += sl + 1; 2015 i += sl + 1;
@@ -2049,11 +2026,11 @@ static int __init prom_find_machine_type(void)
2049 * non-IBM designs ! 2026 * non-IBM designs !
2050 * - it has /rtas 2027 * - it has /rtas
2051 */ 2028 */
2052 len = prom_getprop(_prom->root, "device_type", 2029 len = prom_getprop(prom.root, "device_type",
2053 compat, sizeof(compat)-1); 2030 compat, sizeof(compat)-1);
2054 if (len <= 0) 2031 if (len <= 0)
2055 return PLATFORM_GENERIC; 2032 return PLATFORM_GENERIC;
2056 if (strcmp(compat, RELOC("chrp"))) 2033 if (strcmp(compat, "chrp"))
2057 return PLATFORM_GENERIC; 2034 return PLATFORM_GENERIC;
2058 2035
2059 /* Default to pSeries. We need to know if we are running LPAR */ 2036 /* Default to pSeries. We need to know if we are running LPAR */
@@ -2115,11 +2092,11 @@ static void __init prom_check_displays(void)
2115 for (node = 0; prom_next_node(&node); ) { 2092 for (node = 0; prom_next_node(&node); ) {
2116 memset(type, 0, sizeof(type)); 2093 memset(type, 0, sizeof(type));
2117 prom_getprop(node, "device_type", type, sizeof(type)); 2094 prom_getprop(node, "device_type", type, sizeof(type));
2118 if (strcmp(type, RELOC("display")) != 0) 2095 if (strcmp(type, "display") != 0)
2119 continue; 2096 continue;
2120 2097
2121 /* It seems OF doesn't null-terminate the path :-( */ 2098 /* It seems OF doesn't null-terminate the path :-( */
2122 path = RELOC(prom_scratch); 2099 path = prom_scratch;
2123 memset(path, 0, PROM_SCRATCH_SIZE); 2100 memset(path, 0, PROM_SCRATCH_SIZE);
2124 2101
2125 /* 2102 /*
@@ -2143,15 +2120,15 @@ static void __init prom_check_displays(void)
2143 2120
2144 /* Setup a usable color table when the appropriate 2121 /* Setup a usable color table when the appropriate
2145 * method is available. Should update this to set-colors */ 2122 * method is available. Should update this to set-colors */
2146 clut = RELOC(default_colors); 2123 clut = default_colors;
2147 for (i = 0; i < 16; i++, clut += 3) 2124 for (i = 0; i < 16; i++, clut += 3)
2148 if (prom_set_color(ih, i, clut[0], clut[1], 2125 if (prom_set_color(ih, i, clut[0], clut[1],
2149 clut[2]) != 0) 2126 clut[2]) != 0)
2150 break; 2127 break;
2151 2128
2152#ifdef CONFIG_LOGO_LINUX_CLUT224 2129#ifdef CONFIG_LOGO_LINUX_CLUT224
2153 clut = PTRRELOC(RELOC(logo_linux_clut224.clut)); 2130 clut = PTRRELOC(logo_linux_clut224.clut);
2154 for (i = 0; i < RELOC(logo_linux_clut224.clutsize); i++, clut += 3) 2131 for (i = 0; i < logo_linux_clut224.clutsize; i++, clut += 3)
2155 if (prom_set_color(ih, i + 32, clut[0], clut[1], 2132 if (prom_set_color(ih, i + 32, clut[0], clut[1],
2156 clut[2]) != 0) 2133 clut[2]) != 0)
2157 break; 2134 break;
@@ -2171,8 +2148,8 @@ static void __init *make_room(unsigned long *mem_start, unsigned long *mem_end,
2171 unsigned long room, chunk; 2148 unsigned long room, chunk;
2172 2149
2173 prom_debug("Chunk exhausted, claiming more at %x...\n", 2150 prom_debug("Chunk exhausted, claiming more at %x...\n",
2174 RELOC(alloc_bottom)); 2151 alloc_bottom);
2175 room = RELOC(alloc_top) - RELOC(alloc_bottom); 2152 room = alloc_top - alloc_bottom;
2176 if (room > DEVTREE_CHUNK_SIZE) 2153 if (room > DEVTREE_CHUNK_SIZE)
2177 room = DEVTREE_CHUNK_SIZE; 2154 room = DEVTREE_CHUNK_SIZE;
2178 if (room < PAGE_SIZE) 2155 if (room < PAGE_SIZE)
@@ -2198,9 +2175,9 @@ static unsigned long __init dt_find_string(char *str)
2198{ 2175{
2199 char *s, *os; 2176 char *s, *os;
2200 2177
2201 s = os = (char *)RELOC(dt_string_start); 2178 s = os = (char *)dt_string_start;
2202 s += 4; 2179 s += 4;
2203 while (s < (char *)RELOC(dt_string_end)) { 2180 while (s < (char *)dt_string_end) {
2204 if (strcmp(s, str) == 0) 2181 if (strcmp(s, str) == 0)
2205 return s - os; 2182 return s - os;
2206 s += strlen(s) + 1; 2183 s += strlen(s) + 1;
@@ -2222,10 +2199,10 @@ static void __init scan_dt_build_strings(phandle node,
2222 unsigned long soff; 2199 unsigned long soff;
2223 phandle child; 2200 phandle child;
2224 2201
2225 sstart = (char *)RELOC(dt_string_start); 2202 sstart = (char *)dt_string_start;
2226 2203
2227 /* get and store all property names */ 2204 /* get and store all property names */
2228 prev_name = RELOC(""); 2205 prev_name = "";
2229 for (;;) { 2206 for (;;) {
2230 /* 64 is max len of name including nul. */ 2207 /* 64 is max len of name including nul. */
2231 namep = make_room(mem_start, mem_end, MAX_PROPERTY_NAME, 1); 2208 namep = make_room(mem_start, mem_end, MAX_PROPERTY_NAME, 1);
@@ -2236,9 +2213,9 @@ static void __init scan_dt_build_strings(phandle node,
2236 } 2213 }
2237 2214
2238 /* skip "name" */ 2215 /* skip "name" */
2239 if (strcmp(namep, RELOC("name")) == 0) { 2216 if (strcmp(namep, "name") == 0) {
2240 *mem_start = (unsigned long)namep; 2217 *mem_start = (unsigned long)namep;
2241 prev_name = RELOC("name"); 2218 prev_name = "name";
2242 continue; 2219 continue;
2243 } 2220 }
2244 /* get/create string entry */ 2221 /* get/create string entry */
@@ -2249,7 +2226,7 @@ static void __init scan_dt_build_strings(phandle node,
2249 } else { 2226 } else {
2250 /* Trim off some if we can */ 2227 /* Trim off some if we can */
2251 *mem_start = (unsigned long)namep + strlen(namep) + 1; 2228 *mem_start = (unsigned long)namep + strlen(namep) + 1;
2252 RELOC(dt_string_end) = *mem_start; 2229 dt_string_end = *mem_start;
2253 } 2230 }
2254 prev_name = namep; 2231 prev_name = namep;
2255 } 2232 }
@@ -2304,35 +2281,35 @@ static void __init scan_dt_build_struct(phandle node, unsigned long *mem_start,
2304 } 2281 }
2305 2282
2306 /* get it again for debugging */ 2283 /* get it again for debugging */
2307 path = RELOC(prom_scratch); 2284 path = prom_scratch;
2308 memset(path, 0, PROM_SCRATCH_SIZE); 2285 memset(path, 0, PROM_SCRATCH_SIZE);
2309 call_prom("package-to-path", 3, 1, node, path, PROM_SCRATCH_SIZE-1); 2286 call_prom("package-to-path", 3, 1, node, path, PROM_SCRATCH_SIZE-1);
2310 2287
2311 /* get and store all properties */ 2288 /* get and store all properties */
2312 prev_name = RELOC(""); 2289 prev_name = "";
2313 sstart = (char *)RELOC(dt_string_start); 2290 sstart = (char *)dt_string_start;
2314 for (;;) { 2291 for (;;) {
2315 if (call_prom("nextprop", 3, 1, node, prev_name, 2292 if (call_prom("nextprop", 3, 1, node, prev_name,
2316 RELOC(pname)) != 1) 2293 pname) != 1)
2317 break; 2294 break;
2318 2295
2319 /* skip "name" */ 2296 /* skip "name" */
2320 if (strcmp(RELOC(pname), RELOC("name")) == 0) { 2297 if (strcmp(pname, "name") == 0) {
2321 prev_name = RELOC("name"); 2298 prev_name = "name";
2322 continue; 2299 continue;
2323 } 2300 }
2324 2301
2325 /* find string offset */ 2302 /* find string offset */
2326 soff = dt_find_string(RELOC(pname)); 2303 soff = dt_find_string(pname);
2327 if (soff == 0) { 2304 if (soff == 0) {
2328 prom_printf("WARNING: Can't find string index for" 2305 prom_printf("WARNING: Can't find string index for"
2329 " <%s>, node %s\n", RELOC(pname), path); 2306 " <%s>, node %s\n", pname, path);
2330 break; 2307 break;
2331 } 2308 }
2332 prev_name = sstart + soff; 2309 prev_name = sstart + soff;
2333 2310
2334 /* get length */ 2311 /* get length */
2335 l = call_prom("getproplen", 2, 1, node, RELOC(pname)); 2312 l = call_prom("getproplen", 2, 1, node, pname);
2336 2313
2337 /* sanity checks */ 2314 /* sanity checks */
2338 if (l == PROM_ERROR) 2315 if (l == PROM_ERROR)
@@ -2345,10 +2322,10 @@ static void __init scan_dt_build_struct(phandle node, unsigned long *mem_start,
2345 2322
2346 /* push property content */ 2323 /* push property content */
2347 valp = make_room(mem_start, mem_end, l, 4); 2324 valp = make_room(mem_start, mem_end, l, 4);
2348 call_prom("getprop", 4, 1, node, RELOC(pname), valp, l); 2325 call_prom("getprop", 4, 1, node, pname, valp, l);
2349 *mem_start = _ALIGN(*mem_start, 4); 2326 *mem_start = _ALIGN(*mem_start, 4);
2350 2327
2351 if (!strcmp(RELOC(pname), RELOC("phandle"))) 2328 if (!strcmp(pname, "phandle"))
2352 has_phandle = 1; 2329 has_phandle = 1;
2353 } 2330 }
2354 2331
@@ -2356,7 +2333,7 @@ static void __init scan_dt_build_struct(phandle node, unsigned long *mem_start,
2356 * existed (can happen with OPAL) 2333 * existed (can happen with OPAL)
2357 */ 2334 */
2358 if (!has_phandle) { 2335 if (!has_phandle) {
2359 soff = dt_find_string(RELOC("linux,phandle")); 2336 soff = dt_find_string("linux,phandle");
2360 if (soff == 0) 2337 if (soff == 0)
2361 prom_printf("WARNING: Can't find string index for" 2338 prom_printf("WARNING: Can't find string index for"
2362 " <linux-phandle> node %s\n", path); 2339 " <linux-phandle> node %s\n", path);
@@ -2384,7 +2361,6 @@ static void __init flatten_device_tree(void)
2384 phandle root; 2361 phandle root;
2385 unsigned long mem_start, mem_end, room; 2362 unsigned long mem_start, mem_end, room;
2386 struct boot_param_header *hdr; 2363 struct boot_param_header *hdr;
2387 struct prom_t *_prom = &RELOC(prom);
2388 char *namep; 2364 char *namep;
2389 u64 *rsvmap; 2365 u64 *rsvmap;
2390 2366
@@ -2392,10 +2368,10 @@ static void __init flatten_device_tree(void)
2392 * Check how much room we have between alloc top & bottom (+/- a 2368 * Check how much room we have between alloc top & bottom (+/- a
2393 * few pages), crop to 1MB, as this is our "chunk" size 2369 * few pages), crop to 1MB, as this is our "chunk" size
2394 */ 2370 */
2395 room = RELOC(alloc_top) - RELOC(alloc_bottom) - 0x4000; 2371 room = alloc_top - alloc_bottom - 0x4000;
2396 if (room > DEVTREE_CHUNK_SIZE) 2372 if (room > DEVTREE_CHUNK_SIZE)
2397 room = DEVTREE_CHUNK_SIZE; 2373 room = DEVTREE_CHUNK_SIZE;
2398 prom_debug("starting device tree allocs at %x\n", RELOC(alloc_bottom)); 2374 prom_debug("starting device tree allocs at %x\n", alloc_bottom);
2399 2375
2400 /* Now try to claim that */ 2376 /* Now try to claim that */
2401 mem_start = (unsigned long)alloc_up(room, PAGE_SIZE); 2377 mem_start = (unsigned long)alloc_up(room, PAGE_SIZE);
@@ -2412,66 +2388,66 @@ static void __init flatten_device_tree(void)
2412 mem_start = _ALIGN(mem_start, 4); 2388 mem_start = _ALIGN(mem_start, 4);
2413 hdr = make_room(&mem_start, &mem_end, 2389 hdr = make_room(&mem_start, &mem_end,
2414 sizeof(struct boot_param_header), 4); 2390 sizeof(struct boot_param_header), 4);
2415 RELOC(dt_header_start) = (unsigned long)hdr; 2391 dt_header_start = (unsigned long)hdr;
2416 rsvmap = make_room(&mem_start, &mem_end, sizeof(mem_reserve_map), 8); 2392 rsvmap = make_room(&mem_start, &mem_end, sizeof(mem_reserve_map), 8);
2417 2393
2418 /* Start of strings */ 2394 /* Start of strings */
2419 mem_start = PAGE_ALIGN(mem_start); 2395 mem_start = PAGE_ALIGN(mem_start);
2420 RELOC(dt_string_start) = mem_start; 2396 dt_string_start = mem_start;
2421 mem_start += 4; /* hole */ 2397 mem_start += 4; /* hole */
2422 2398
2423 /* Add "linux,phandle" in there, we'll need it */ 2399 /* Add "linux,phandle" in there, we'll need it */
2424 namep = make_room(&mem_start, &mem_end, 16, 1); 2400 namep = make_room(&mem_start, &mem_end, 16, 1);
2425 strcpy(namep, RELOC("linux,phandle")); 2401 strcpy(namep, "linux,phandle");
2426 mem_start = (unsigned long)namep + strlen(namep) + 1; 2402 mem_start = (unsigned long)namep + strlen(namep) + 1;
2427 2403
2428 /* Build string array */ 2404 /* Build string array */
2429 prom_printf("Building dt strings...\n"); 2405 prom_printf("Building dt strings...\n");
2430 scan_dt_build_strings(root, &mem_start, &mem_end); 2406 scan_dt_build_strings(root, &mem_start, &mem_end);
2431 RELOC(dt_string_end) = mem_start; 2407 dt_string_end = mem_start;
2432 2408
2433 /* Build structure */ 2409 /* Build structure */
2434 mem_start = PAGE_ALIGN(mem_start); 2410 mem_start = PAGE_ALIGN(mem_start);
2435 RELOC(dt_struct_start) = mem_start; 2411 dt_struct_start = mem_start;
2436 prom_printf("Building dt structure...\n"); 2412 prom_printf("Building dt structure...\n");
2437 scan_dt_build_struct(root, &mem_start, &mem_end); 2413 scan_dt_build_struct(root, &mem_start, &mem_end);
2438 dt_push_token(OF_DT_END, &mem_start, &mem_end); 2414 dt_push_token(OF_DT_END, &mem_start, &mem_end);
2439 RELOC(dt_struct_end) = PAGE_ALIGN(mem_start); 2415 dt_struct_end = PAGE_ALIGN(mem_start);
2440 2416
2441 /* Finish header */ 2417 /* Finish header */
2442 hdr->boot_cpuid_phys = _prom->cpu; 2418 hdr->boot_cpuid_phys = prom.cpu;
2443 hdr->magic = OF_DT_HEADER; 2419 hdr->magic = OF_DT_HEADER;
2444 hdr->totalsize = RELOC(dt_struct_end) - RELOC(dt_header_start); 2420 hdr->totalsize = dt_struct_end - dt_header_start;
2445 hdr->off_dt_struct = RELOC(dt_struct_start) - RELOC(dt_header_start); 2421 hdr->off_dt_struct = dt_struct_start - dt_header_start;
2446 hdr->off_dt_strings = RELOC(dt_string_start) - RELOC(dt_header_start); 2422 hdr->off_dt_strings = dt_string_start - dt_header_start;
2447 hdr->dt_strings_size = RELOC(dt_string_end) - RELOC(dt_string_start); 2423 hdr->dt_strings_size = dt_string_end - dt_string_start;
2448 hdr->off_mem_rsvmap = ((unsigned long)rsvmap) - RELOC(dt_header_start); 2424 hdr->off_mem_rsvmap = ((unsigned long)rsvmap) - dt_header_start;
2449 hdr->version = OF_DT_VERSION; 2425 hdr->version = OF_DT_VERSION;
2450 /* Version 16 is not backward compatible */ 2426 /* Version 16 is not backward compatible */
2451 hdr->last_comp_version = 0x10; 2427 hdr->last_comp_version = 0x10;
2452 2428
2453 /* Copy the reserve map in */ 2429 /* Copy the reserve map in */
2454 memcpy(rsvmap, RELOC(mem_reserve_map), sizeof(mem_reserve_map)); 2430 memcpy(rsvmap, mem_reserve_map, sizeof(mem_reserve_map));
2455 2431
2456#ifdef DEBUG_PROM 2432#ifdef DEBUG_PROM
2457 { 2433 {
2458 int i; 2434 int i;
2459 prom_printf("reserved memory map:\n"); 2435 prom_printf("reserved memory map:\n");
2460 for (i = 0; i < RELOC(mem_reserve_cnt); i++) 2436 for (i = 0; i < mem_reserve_cnt; i++)
2461 prom_printf(" %x - %x\n", 2437 prom_printf(" %x - %x\n",
2462 RELOC(mem_reserve_map)[i].base, 2438 mem_reserve_map[i].base,
2463 RELOC(mem_reserve_map)[i].size); 2439 mem_reserve_map[i].size);
2464 } 2440 }
2465#endif 2441#endif
2466 /* Bump mem_reserve_cnt to cause further reservations to fail 2442 /* Bump mem_reserve_cnt to cause further reservations to fail
2467 * since it's too late. 2443 * since it's too late.
2468 */ 2444 */
2469 RELOC(mem_reserve_cnt) = MEM_RESERVE_MAP_SIZE; 2445 mem_reserve_cnt = MEM_RESERVE_MAP_SIZE;
2470 2446
2471 prom_printf("Device tree strings 0x%x -> 0x%x\n", 2447 prom_printf("Device tree strings 0x%x -> 0x%x\n",
2472 RELOC(dt_string_start), RELOC(dt_string_end)); 2448 dt_string_start, dt_string_end);
2473 prom_printf("Device tree struct 0x%x -> 0x%x\n", 2449 prom_printf("Device tree struct 0x%x -> 0x%x\n",
2474 RELOC(dt_struct_start), RELOC(dt_struct_end)); 2450 dt_struct_start, dt_struct_end);
2475 2451
2476} 2452}
2477 2453
@@ -2526,7 +2502,6 @@ static void __init fixup_device_tree_maple_memory_controller(void)
2526 phandle mc; 2502 phandle mc;
2527 u32 mc_reg[4]; 2503 u32 mc_reg[4];
2528 char *name = "/hostbridge@f8000000"; 2504 char *name = "/hostbridge@f8000000";
2529 struct prom_t *_prom = &RELOC(prom);
2530 u32 ac, sc; 2505 u32 ac, sc;
2531 2506
2532 mc = call_prom("finddevice", 1, 1, ADDR(name)); 2507 mc = call_prom("finddevice", 1, 1, ADDR(name));
@@ -2536,8 +2511,8 @@ static void __init fixup_device_tree_maple_memory_controller(void)
2536 if (prom_getproplen(mc, "reg") != 8) 2511 if (prom_getproplen(mc, "reg") != 8)
2537 return; 2512 return;
2538 2513
2539 prom_getprop(_prom->root, "#address-cells", &ac, sizeof(ac)); 2514 prom_getprop(prom.root, "#address-cells", &ac, sizeof(ac));
2540 prom_getprop(_prom->root, "#size-cells", &sc, sizeof(sc)); 2515 prom_getprop(prom.root, "#size-cells", &sc, sizeof(sc));
2541 if ((ac != 2) || (sc != 2)) 2516 if ((ac != 2) || (sc != 2))
2542 return; 2517 return;
2543 2518
@@ -2806,50 +2781,94 @@ static void __init fixup_device_tree(void)
2806 2781
2807static void __init prom_find_boot_cpu(void) 2782static void __init prom_find_boot_cpu(void)
2808{ 2783{
2809 struct prom_t *_prom = &RELOC(prom);
2810 u32 getprop_rval; 2784 u32 getprop_rval;
2811 ihandle prom_cpu; 2785 ihandle prom_cpu;
2812 phandle cpu_pkg; 2786 phandle cpu_pkg;
2813 2787
2814 _prom->cpu = 0; 2788 prom.cpu = 0;
2815 if (prom_getprop(_prom->chosen, "cpu", &prom_cpu, sizeof(prom_cpu)) <= 0) 2789 if (prom_getprop(prom.chosen, "cpu", &prom_cpu, sizeof(prom_cpu)) <= 0)
2816 return; 2790 return;
2817 2791
2818 cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu); 2792 cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu);
2819 2793
2820 prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval)); 2794 prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval));
2821 _prom->cpu = getprop_rval; 2795 prom.cpu = getprop_rval;
2822 2796
2823 prom_debug("Booting CPU hw index = %lu\n", _prom->cpu); 2797 prom_debug("Booting CPU hw index = %lu\n", prom.cpu);
2824} 2798}
2825 2799
2826static void __init prom_check_initrd(unsigned long r3, unsigned long r4) 2800static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
2827{ 2801{
2828#ifdef CONFIG_BLK_DEV_INITRD 2802#ifdef CONFIG_BLK_DEV_INITRD
2829 struct prom_t *_prom = &RELOC(prom);
2830
2831 if (r3 && r4 && r4 != 0xdeadbeef) { 2803 if (r3 && r4 && r4 != 0xdeadbeef) {
2832 unsigned long val; 2804 unsigned long val;
2833 2805
2834 RELOC(prom_initrd_start) = is_kernel_addr(r3) ? __pa(r3) : r3; 2806 prom_initrd_start = is_kernel_addr(r3) ? __pa(r3) : r3;
2835 RELOC(prom_initrd_end) = RELOC(prom_initrd_start) + r4; 2807 prom_initrd_end = prom_initrd_start + r4;
2836 2808
2837 val = RELOC(prom_initrd_start); 2809 val = prom_initrd_start;
2838 prom_setprop(_prom->chosen, "/chosen", "linux,initrd-start", 2810 prom_setprop(prom.chosen, "/chosen", "linux,initrd-start",
2839 &val, sizeof(val)); 2811 &val, sizeof(val));
2840 val = RELOC(prom_initrd_end); 2812 val = prom_initrd_end;
2841 prom_setprop(_prom->chosen, "/chosen", "linux,initrd-end", 2813 prom_setprop(prom.chosen, "/chosen", "linux,initrd-end",
2842 &val, sizeof(val)); 2814 &val, sizeof(val));
2843 2815
2844 reserve_mem(RELOC(prom_initrd_start), 2816 reserve_mem(prom_initrd_start,
2845 RELOC(prom_initrd_end) - RELOC(prom_initrd_start)); 2817 prom_initrd_end - prom_initrd_start);
2846 2818
2847 prom_debug("initrd_start=0x%x\n", RELOC(prom_initrd_start)); 2819 prom_debug("initrd_start=0x%x\n", prom_initrd_start);
2848 prom_debug("initrd_end=0x%x\n", RELOC(prom_initrd_end)); 2820 prom_debug("initrd_end=0x%x\n", prom_initrd_end);
2849 } 2821 }
2850#endif /* CONFIG_BLK_DEV_INITRD */ 2822#endif /* CONFIG_BLK_DEV_INITRD */
2851} 2823}
2852 2824
2825#ifdef CONFIG_PPC64
2826#ifdef CONFIG_RELOCATABLE
2827static void reloc_toc(void)
2828{
2829}
2830
2831static void unreloc_toc(void)
2832{
2833}
2834#else
2835static void __reloc_toc(void *tocstart, unsigned long offset,
2836 unsigned long nr_entries)
2837{
2838 unsigned long i;
2839 unsigned long *toc_entry = (unsigned long *)tocstart;
2840
2841 for (i = 0; i < nr_entries; i++) {
2842 *toc_entry = *toc_entry + offset;
2843 toc_entry++;
2844 }
2845}
2846
2847static void reloc_toc(void)
2848{
2849 unsigned long offset = reloc_offset();
2850 unsigned long nr_entries =
2851 (__prom_init_toc_end - __prom_init_toc_start) / sizeof(long);
2852
2853 /* Need to add offset to get at __prom_init_toc_start */
2854 __reloc_toc(__prom_init_toc_start + offset, offset, nr_entries);
2855
2856 mb();
2857}
2858
2859static void unreloc_toc(void)
2860{
2861 unsigned long offset = reloc_offset();
2862 unsigned long nr_entries =
2863 (__prom_init_toc_end - __prom_init_toc_start) / sizeof(long);
2864
2865 mb();
2866
2867 /* __prom_init_toc_start has been relocated, no need to add offset */
2868 __reloc_toc(__prom_init_toc_start, -offset, nr_entries);
2869}
2870#endif
2871#endif
2853 2872
2854/* 2873/*
2855 * We enter here early on, when the Open Firmware prom is still 2874 * We enter here early on, when the Open Firmware prom is still
@@ -2861,20 +2880,19 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2861 unsigned long r6, unsigned long r7, 2880 unsigned long r6, unsigned long r7,
2862 unsigned long kbase) 2881 unsigned long kbase)
2863{ 2882{
2864 struct prom_t *_prom;
2865 unsigned long hdr; 2883 unsigned long hdr;
2866 2884
2867#ifdef CONFIG_PPC32 2885#ifdef CONFIG_PPC32
2868 unsigned long offset = reloc_offset(); 2886 unsigned long offset = reloc_offset();
2869 reloc_got2(offset); 2887 reloc_got2(offset);
2888#else
2889 reloc_toc();
2870#endif 2890#endif
2871 2891
2872 _prom = &RELOC(prom);
2873
2874 /* 2892 /*
2875 * First zero the BSS 2893 * First zero the BSS
2876 */ 2894 */
2877 memset(&RELOC(__bss_start), 0, __bss_stop - __bss_start); 2895 memset(&__bss_start, 0, __bss_stop - __bss_start);
2878 2896
2879 /* 2897 /*
2880 * Init interface to Open Firmware, get some node references, 2898 * Init interface to Open Firmware, get some node references,
@@ -2893,14 +2911,14 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2893 */ 2911 */
2894 prom_init_stdout(); 2912 prom_init_stdout();
2895 2913
2896 prom_printf("Preparing to boot %s", RELOC(linux_banner)); 2914 prom_printf("Preparing to boot %s", linux_banner);
2897 2915
2898 /* 2916 /*
2899 * Get default machine type. At this point, we do not differentiate 2917 * Get default machine type. At this point, we do not differentiate
2900 * between pSeries SMP and pSeries LPAR 2918 * between pSeries SMP and pSeries LPAR
2901 */ 2919 */
2902 RELOC(of_platform) = prom_find_machine_type(); 2920 of_platform = prom_find_machine_type();
2903 prom_printf("Detected machine type: %x\n", RELOC(of_platform)); 2921 prom_printf("Detected machine type: %x\n", of_platform);
2904 2922
2905#ifndef CONFIG_NONSTATIC_KERNEL 2923#ifndef CONFIG_NONSTATIC_KERNEL
2906 /* Bail if this is a kdump kernel. */ 2924 /* Bail if this is a kdump kernel. */
@@ -2917,15 +2935,15 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2917 /* 2935 /*
2918 * On pSeries, inform the firmware about our capabilities 2936 * On pSeries, inform the firmware about our capabilities
2919 */ 2937 */
2920 if (RELOC(of_platform) == PLATFORM_PSERIES || 2938 if (of_platform == PLATFORM_PSERIES ||
2921 RELOC(of_platform) == PLATFORM_PSERIES_LPAR) 2939 of_platform == PLATFORM_PSERIES_LPAR)
2922 prom_send_capabilities(); 2940 prom_send_capabilities();
2923#endif 2941#endif
2924 2942
2925 /* 2943 /*
2926 * Copy the CPU hold code 2944 * Copy the CPU hold code
2927 */ 2945 */
2928 if (RELOC(of_platform) != PLATFORM_POWERMAC) 2946 if (of_platform != PLATFORM_POWERMAC)
2929 copy_and_flush(0, kbase, 0x100, 0); 2947 copy_and_flush(0, kbase, 0x100, 0);
2930 2948
2931 /* 2949 /*
@@ -2954,7 +2972,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2954 * that uses the allocator, we need to make sure we get the top of memory 2972 * that uses the allocator, we need to make sure we get the top of memory
2955 * available for us here... 2973 * available for us here...
2956 */ 2974 */
2957 if (RELOC(of_platform) == PLATFORM_PSERIES) 2975 if (of_platform == PLATFORM_PSERIES)
2958 prom_initialize_tce_table(); 2976 prom_initialize_tce_table();
2959#endif 2977#endif
2960 2978
@@ -2962,19 +2980,19 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2962 * On non-powermacs, try to instantiate RTAS. PowerMacs don't 2980 * On non-powermacs, try to instantiate RTAS. PowerMacs don't
2963 * have a usable RTAS implementation. 2981 * have a usable RTAS implementation.
2964 */ 2982 */
2965 if (RELOC(of_platform) != PLATFORM_POWERMAC && 2983 if (of_platform != PLATFORM_POWERMAC &&
2966 RELOC(of_platform) != PLATFORM_OPAL) 2984 of_platform != PLATFORM_OPAL)
2967 prom_instantiate_rtas(); 2985 prom_instantiate_rtas();
2968 2986
2969#ifdef CONFIG_PPC_POWERNV 2987#ifdef CONFIG_PPC_POWERNV
2970 /* Detect HAL and try instanciating it & doing takeover */ 2988 /* Detect HAL and try instanciating it & doing takeover */
2971 if (RELOC(of_platform) == PLATFORM_PSERIES_LPAR) { 2989 if (of_platform == PLATFORM_PSERIES_LPAR) {
2972 prom_query_opal(); 2990 prom_query_opal();
2973 if (RELOC(of_platform) == PLATFORM_OPAL) { 2991 if (of_platform == PLATFORM_OPAL) {
2974 prom_opal_hold_cpus(); 2992 prom_opal_hold_cpus();
2975 prom_opal_takeover(); 2993 prom_opal_takeover();
2976 } 2994 }
2977 } else if (RELOC(of_platform) == PLATFORM_OPAL) 2995 } else if (of_platform == PLATFORM_OPAL)
2978 prom_instantiate_opal(); 2996 prom_instantiate_opal();
2979#endif 2997#endif
2980 2998
@@ -2988,32 +3006,32 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2988 * 3006 *
2989 * PowerMacs use a different mechanism to spin CPUs 3007 * PowerMacs use a different mechanism to spin CPUs
2990 */ 3008 */
2991 if (RELOC(of_platform) != PLATFORM_POWERMAC && 3009 if (of_platform != PLATFORM_POWERMAC &&
2992 RELOC(of_platform) != PLATFORM_OPAL) 3010 of_platform != PLATFORM_OPAL)
2993 prom_hold_cpus(); 3011 prom_hold_cpus();
2994 3012
2995 /* 3013 /*
2996 * Fill in some infos for use by the kernel later on 3014 * Fill in some infos for use by the kernel later on
2997 */ 3015 */
2998 if (RELOC(prom_memory_limit)) 3016 if (prom_memory_limit)
2999 prom_setprop(_prom->chosen, "/chosen", "linux,memory-limit", 3017 prom_setprop(prom.chosen, "/chosen", "linux,memory-limit",
3000 &RELOC(prom_memory_limit), 3018 &prom_memory_limit,
3001 sizeof(prom_memory_limit)); 3019 sizeof(prom_memory_limit));
3002#ifdef CONFIG_PPC64 3020#ifdef CONFIG_PPC64
3003 if (RELOC(prom_iommu_off)) 3021 if (prom_iommu_off)
3004 prom_setprop(_prom->chosen, "/chosen", "linux,iommu-off", 3022 prom_setprop(prom.chosen, "/chosen", "linux,iommu-off",
3005 NULL, 0); 3023 NULL, 0);
3006 3024
3007 if (RELOC(prom_iommu_force_on)) 3025 if (prom_iommu_force_on)
3008 prom_setprop(_prom->chosen, "/chosen", "linux,iommu-force-on", 3026 prom_setprop(prom.chosen, "/chosen", "linux,iommu-force-on",
3009 NULL, 0); 3027 NULL, 0);
3010 3028
3011 if (RELOC(prom_tce_alloc_start)) { 3029 if (prom_tce_alloc_start) {
3012 prom_setprop(_prom->chosen, "/chosen", "linux,tce-alloc-start", 3030 prom_setprop(prom.chosen, "/chosen", "linux,tce-alloc-start",
3013 &RELOC(prom_tce_alloc_start), 3031 &prom_tce_alloc_start,
3014 sizeof(prom_tce_alloc_start)); 3032 sizeof(prom_tce_alloc_start));
3015 prom_setprop(_prom->chosen, "/chosen", "linux,tce-alloc-end", 3033 prom_setprop(prom.chosen, "/chosen", "linux,tce-alloc-end",
3016 &RELOC(prom_tce_alloc_end), 3034 &prom_tce_alloc_end,
3017 sizeof(prom_tce_alloc_end)); 3035 sizeof(prom_tce_alloc_end));
3018 } 3036 }
3019#endif 3037#endif
@@ -3035,8 +3053,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
3035 * closed stdin already (in particular the powerbook 101). It 3053 * closed stdin already (in particular the powerbook 101). It
3036 * appears that the OPAL version of OFW doesn't like it either. 3054 * appears that the OPAL version of OFW doesn't like it either.
3037 */ 3055 */
3038 if (RELOC(of_platform) != PLATFORM_POWERMAC && 3056 if (of_platform != PLATFORM_POWERMAC &&
3039 RELOC(of_platform) != PLATFORM_OPAL) 3057 of_platform != PLATFORM_OPAL)
3040 prom_close_stdin(); 3058 prom_close_stdin();
3041 3059
3042 /* 3060 /*
@@ -3051,22 +3069,24 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
3051 * tree and NULL as r5, thus triggering the new entry point which 3069 * tree and NULL as r5, thus triggering the new entry point which
3052 * is common to us and kexec 3070 * is common to us and kexec
3053 */ 3071 */
3054 hdr = RELOC(dt_header_start); 3072 hdr = dt_header_start;
3055 3073
3056 /* Don't print anything after quiesce under OPAL, it crashes OFW */ 3074 /* Don't print anything after quiesce under OPAL, it crashes OFW */
3057 if (RELOC(of_platform) != PLATFORM_OPAL) { 3075 if (of_platform != PLATFORM_OPAL) {
3058 prom_printf("returning from prom_init\n"); 3076 prom_printf("returning from prom_init\n");
3059 prom_debug("->dt_header_start=0x%x\n", hdr); 3077 prom_debug("->dt_header_start=0x%x\n", hdr);
3060 } 3078 }
3061 3079
3062#ifdef CONFIG_PPC32 3080#ifdef CONFIG_PPC32
3063 reloc_got2(-offset); 3081 reloc_got2(-offset);
3082#else
3083 unreloc_toc();
3064#endif 3084#endif
3065 3085
3066#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL 3086#ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
3067 /* OPAL early debug gets the OPAL base & entry in r8 and r9 */ 3087 /* OPAL early debug gets the OPAL base & entry in r8 and r9 */
3068 __start(hdr, kbase, 0, 0, 0, 3088 __start(hdr, kbase, 0, 0, 0,
3069 RELOC(prom_opal_base), RELOC(prom_opal_entry)); 3089 prom_opal_base, prom_opal_entry);
3070#else 3090#else
3071 __start(hdr, kbase, 0, 0, 0, 0, 0); 3091 __start(hdr, kbase, 0, 0, 0, 0, 0);
3072#endif 3092#endif
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index 70f4286eaa7a..3765da6be4f2 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -22,7 +22,7 @@ __secondary_hold_acknowledge __secondary_hold_spinloop __start
22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224 22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
23reloc_got2 kernstart_addr memstart_addr linux_banner _stext 23reloc_got2 kernstart_addr memstart_addr linux_banner _stext
24opal_query_takeover opal_do_takeover opal_enter_rtas opal_secondary_entry 24opal_query_takeover opal_do_takeover opal_enter_rtas opal_secondary_entry
25boot_command_line" 25boot_command_line __prom_init_toc_start __prom_init_toc_end"
26 26
27NM="$1" 27NM="$1"
28OBJ="$2" 28OBJ="$2"
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index c4970004d44d..245c1b6a0858 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -179,6 +179,30 @@ static int set_user_msr(struct task_struct *task, unsigned long msr)
179 return 0; 179 return 0;
180} 180}
181 181
182#ifdef CONFIG_PPC64
183static unsigned long get_user_dscr(struct task_struct *task)
184{
185 return task->thread.dscr;
186}
187
188static int set_user_dscr(struct task_struct *task, unsigned long dscr)
189{
190 task->thread.dscr = dscr;
191 task->thread.dscr_inherit = 1;
192 return 0;
193}
194#else
195static unsigned long get_user_dscr(struct task_struct *task)
196{
197 return -EIO;
198}
199
200static int set_user_dscr(struct task_struct *task, unsigned long dscr)
201{
202 return -EIO;
203}
204#endif
205
182/* 206/*
183 * We prevent mucking around with the reserved area of trap 207 * We prevent mucking around with the reserved area of trap
184 * which are used internally by the kernel. 208 * which are used internally by the kernel.
@@ -200,6 +224,9 @@ unsigned long ptrace_get_reg(struct task_struct *task, int regno)
200 if (regno == PT_MSR) 224 if (regno == PT_MSR)
201 return get_user_msr(task); 225 return get_user_msr(task);
202 226
227 if (regno == PT_DSCR)
228 return get_user_dscr(task);
229
203 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) 230 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
204 return ((unsigned long *)task->thread.regs)[regno]; 231 return ((unsigned long *)task->thread.regs)[regno];
205 232
@@ -218,6 +245,8 @@ int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
218 return set_user_msr(task, data); 245 return set_user_msr(task, data);
219 if (regno == PT_TRAP) 246 if (regno == PT_TRAP)
220 return set_user_trap(task, data); 247 return set_user_trap(task, data);
248 if (regno == PT_DSCR)
249 return set_user_dscr(task, data);
221 250
222 if (regno <= PT_MAX_PUT_REG) { 251 if (regno <= PT_MAX_PUT_REG) {
223 ((unsigned long *)task->thread.regs)[regno] = data; 252 ((unsigned long *)task->thread.regs)[regno] = data;
@@ -905,6 +934,9 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
905 struct perf_event *bp; 934 struct perf_event *bp;
906 struct perf_event_attr attr; 935 struct perf_event_attr attr;
907#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 936#endif /* CONFIG_HAVE_HW_BREAKPOINT */
937#ifndef CONFIG_PPC_ADV_DEBUG_REGS
938 struct arch_hw_breakpoint hw_brk;
939#endif
908 940
909 /* For ppc64 we support one DABR and no IABR's at the moment (ppc64). 941 /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
910 * For embedded processors we support one DAC and no IAC's at the 942 * For embedded processors we support one DAC and no IAC's at the
@@ -931,14 +963,17 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
931 */ 963 */
932 964
933 /* Ensure breakpoint translation bit is set */ 965 /* Ensure breakpoint translation bit is set */
934 if (data && !(data & DABR_TRANSLATION)) 966 if (data && !(data & HW_BRK_TYPE_TRANSLATE))
935 return -EIO; 967 return -EIO;
968 hw_brk.address = data & (~HW_BRK_TYPE_DABR);
969 hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
970 hw_brk.len = 8;
936#ifdef CONFIG_HAVE_HW_BREAKPOINT 971#ifdef CONFIG_HAVE_HW_BREAKPOINT
937 if (ptrace_get_breakpoints(task) < 0) 972 if (ptrace_get_breakpoints(task) < 0)
938 return -ESRCH; 973 return -ESRCH;
939 974
940 bp = thread->ptrace_bps[0]; 975 bp = thread->ptrace_bps[0];
941 if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) { 976 if ((!data) || !(hw_brk.type & HW_BRK_TYPE_RDWR)) {
942 if (bp) { 977 if (bp) {
943 unregister_hw_breakpoint(bp); 978 unregister_hw_breakpoint(bp);
944 thread->ptrace_bps[0] = NULL; 979 thread->ptrace_bps[0] = NULL;
@@ -948,10 +983,8 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
948 } 983 }
949 if (bp) { 984 if (bp) {
950 attr = bp->attr; 985 attr = bp->attr;
951 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN; 986 attr.bp_addr = hw_brk.address;
952 arch_bp_generic_fields(data & 987 arch_bp_generic_fields(hw_brk.type, &attr.bp_type);
953 (DABR_DATA_WRITE | DABR_DATA_READ),
954 &attr.bp_type);
955 988
956 /* Enable breakpoint */ 989 /* Enable breakpoint */
957 attr.disabled = false; 990 attr.disabled = false;
@@ -963,16 +996,15 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
963 } 996 }
964 thread->ptrace_bps[0] = bp; 997 thread->ptrace_bps[0] = bp;
965 ptrace_put_breakpoints(task); 998 ptrace_put_breakpoints(task);
966 thread->dabr = data; 999 thread->hw_brk = hw_brk;
967 thread->dabrx = DABRX_ALL;
968 return 0; 1000 return 0;
969 } 1001 }
970 1002
971 /* Create a new breakpoint request if one doesn't exist already */ 1003 /* Create a new breakpoint request if one doesn't exist already */
972 hw_breakpoint_init(&attr); 1004 hw_breakpoint_init(&attr);
973 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN; 1005 attr.bp_addr = hw_brk.address;
974 arch_bp_generic_fields(data & (DABR_DATA_WRITE | DABR_DATA_READ), 1006 arch_bp_generic_fields(hw_brk.type,
975 &attr.bp_type); 1007 &attr.bp_type);
976 1008
977 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr, 1009 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
978 ptrace_triggered, NULL, task); 1010 ptrace_triggered, NULL, task);
@@ -985,10 +1017,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
985 ptrace_put_breakpoints(task); 1017 ptrace_put_breakpoints(task);
986 1018
987#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1019#endif /* CONFIG_HAVE_HW_BREAKPOINT */
988 1020 task->thread.hw_brk = hw_brk;
989 /* Move contents to the DABR register */
990 task->thread.dabr = data;
991 task->thread.dabrx = DABRX_ALL;
992#else /* CONFIG_PPC_ADV_DEBUG_REGS */ 1021#else /* CONFIG_PPC_ADV_DEBUG_REGS */
993 /* As described above, it was assumed 3 bits were passed with the data 1022 /* As described above, it was assumed 3 bits were passed with the data
994 * address, but we will assume only the mode bits will be passed 1023 * address, but we will assume only the mode bits will be passed
@@ -1349,7 +1378,7 @@ static long ppc_set_hwdebug(struct task_struct *child,
1349 struct perf_event_attr attr; 1378 struct perf_event_attr attr;
1350#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1379#endif /* CONFIG_HAVE_HW_BREAKPOINT */
1351#ifndef CONFIG_PPC_ADV_DEBUG_REGS 1380#ifndef CONFIG_PPC_ADV_DEBUG_REGS
1352 unsigned long dabr; 1381 struct arch_hw_breakpoint brk;
1353#endif 1382#endif
1354 1383
1355 if (bp_info->version != 1) 1384 if (bp_info->version != 1)
@@ -1397,12 +1426,12 @@ static long ppc_set_hwdebug(struct task_struct *child,
1397 if ((unsigned long)bp_info->addr >= TASK_SIZE) 1426 if ((unsigned long)bp_info->addr >= TASK_SIZE)
1398 return -EIO; 1427 return -EIO;
1399 1428
1400 dabr = (unsigned long)bp_info->addr & ~7UL; 1429 brk.address = bp_info->addr & ~7UL;
1401 dabr |= DABR_TRANSLATION; 1430 brk.type = HW_BRK_TYPE_TRANSLATE;
1402 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ) 1431 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1403 dabr |= DABR_DATA_READ; 1432 brk.type |= HW_BRK_TYPE_READ;
1404 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE) 1433 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1405 dabr |= DABR_DATA_WRITE; 1434 brk.type |= HW_BRK_TYPE_WRITE;
1406#ifdef CONFIG_HAVE_HW_BREAKPOINT 1435#ifdef CONFIG_HAVE_HW_BREAKPOINT
1407 if (ptrace_get_breakpoints(child) < 0) 1436 if (ptrace_get_breakpoints(child) < 0)
1408 return -ESRCH; 1437 return -ESRCH;
@@ -1427,8 +1456,7 @@ static long ppc_set_hwdebug(struct task_struct *child,
1427 hw_breakpoint_init(&attr); 1456 hw_breakpoint_init(&attr);
1428 attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN; 1457 attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
1429 attr.bp_len = len; 1458 attr.bp_len = len;
1430 arch_bp_generic_fields(dabr & (DABR_DATA_WRITE | DABR_DATA_READ), 1459 arch_bp_generic_fields(brk.type, &attr.bp_type);
1431 &attr.bp_type);
1432 1460
1433 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr, 1461 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
1434 ptrace_triggered, NULL, child); 1462 ptrace_triggered, NULL, child);
@@ -1445,11 +1473,10 @@ static long ppc_set_hwdebug(struct task_struct *child,
1445 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) 1473 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
1446 return -EINVAL; 1474 return -EINVAL;
1447 1475
1448 if (child->thread.dabr) 1476 if (child->thread.hw_brk.address)
1449 return -ENOSPC; 1477 return -ENOSPC;
1450 1478
1451 child->thread.dabr = dabr; 1479 child->thread.hw_brk = brk;
1452 child->thread.dabrx = DABRX_ALL;
1453 1480
1454 return 1; 1481 return 1;
1455#endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */ 1482#endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
@@ -1495,10 +1522,11 @@ static long ppc_del_hwdebug(struct task_struct *child, long data)
1495 ptrace_put_breakpoints(child); 1522 ptrace_put_breakpoints(child);
1496 return ret; 1523 return ret;
1497#else /* CONFIG_HAVE_HW_BREAKPOINT */ 1524#else /* CONFIG_HAVE_HW_BREAKPOINT */
1498 if (child->thread.dabr == 0) 1525 if (child->thread.hw_brk.address == 0)
1499 return -ENOENT; 1526 return -ENOENT;
1500 1527
1501 child->thread.dabr = 0; 1528 child->thread.hw_brk.address = 0;
1529 child->thread.hw_brk.type = 0;
1502#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1530#endif /* CONFIG_HAVE_HW_BREAKPOINT */
1503 1531
1504 return 0; 1532 return 0;
@@ -1642,6 +1670,9 @@ long arch_ptrace(struct task_struct *child, long request,
1642 } 1670 }
1643 1671
1644 case PTRACE_GET_DEBUGREG: { 1672 case PTRACE_GET_DEBUGREG: {
1673#ifndef CONFIG_PPC_ADV_DEBUG_REGS
1674 unsigned long dabr_fake;
1675#endif
1645 ret = -EINVAL; 1676 ret = -EINVAL;
1646 /* We only support one DABR and no IABRS at the moment */ 1677 /* We only support one DABR and no IABRS at the moment */
1647 if (addr > 0) 1678 if (addr > 0)
@@ -1649,7 +1680,9 @@ long arch_ptrace(struct task_struct *child, long request,
1649#ifdef CONFIG_PPC_ADV_DEBUG_REGS 1680#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1650 ret = put_user(child->thread.dac1, datalp); 1681 ret = put_user(child->thread.dac1, datalp);
1651#else 1682#else
1652 ret = put_user(child->thread.dabr, datalp); 1683 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
1684 (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
1685 ret = put_user(dabr_fake, datalp);
1653#endif 1686#endif
1654 break; 1687 break;
1655 } 1688 }
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 8c21658719d9..c0244e766834 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -252,6 +252,9 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
252 } 252 }
253 253
254 case PTRACE_GET_DEBUGREG: { 254 case PTRACE_GET_DEBUGREG: {
255#ifndef CONFIG_PPC_ADV_DEBUG_REGS
256 unsigned long dabr_fake;
257#endif
255 ret = -EINVAL; 258 ret = -EINVAL;
256 /* We only support one DABR and no IABRS at the moment */ 259 /* We only support one DABR and no IABRS at the moment */
257 if (addr > 0) 260 if (addr > 0)
@@ -259,7 +262,10 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
259#ifdef CONFIG_PPC_ADV_DEBUG_REGS 262#ifdef CONFIG_PPC_ADV_DEBUG_REGS
260 ret = put_user(child->thread.dac1, (u32 __user *)data); 263 ret = put_user(child->thread.dac1, (u32 __user *)data);
261#else 264#else
262 ret = put_user(child->thread.dabr, (u32 __user *)data); 265 dabr_fake = (
266 (child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
267 (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
268 ret = put_user(dabr_fake, (u32 __user *)data);
263#endif 269#endif
264 break; 270 break;
265 } 271 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6da881b35dac..75fbaceb5c87 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -156,6 +156,15 @@ early_param("smt-enabled", early_smt_enabled);
156#define check_smt_enabled() 156#define check_smt_enabled()
157#endif /* CONFIG_SMP */ 157#endif /* CONFIG_SMP */
158 158
159/** Fix up paca fields required for the boot cpu */
160static void fixup_boot_paca(void)
161{
162 /* The boot cpu is started */
163 get_paca()->cpu_start = 1;
164 /* Allow percpu accesses to work until we setup percpu data */
165 get_paca()->data_offset = 0;
166}
167
159/* 168/*
160 * Early initialization entry point. This is called by head.S 169 * Early initialization entry point. This is called by head.S
161 * with MMU translation disabled. We rely on the "feature" of 170 * with MMU translation disabled. We rely on the "feature" of
@@ -177,6 +186,8 @@ early_param("smt-enabled", early_smt_enabled);
177 186
178void __init early_setup(unsigned long dt_ptr) 187void __init early_setup(unsigned long dt_ptr)
179{ 188{
189 static __initdata struct paca_struct boot_paca;
190
180 /* -------- printk is _NOT_ safe to use here ! ------- */ 191 /* -------- printk is _NOT_ safe to use here ! ------- */
181 192
182 /* Identify CPU type */ 193 /* Identify CPU type */
@@ -185,6 +196,7 @@ void __init early_setup(unsigned long dt_ptr)
185 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 196 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
186 initialise_paca(&boot_paca, 0); 197 initialise_paca(&boot_paca, 0);
187 setup_paca(&boot_paca); 198 setup_paca(&boot_paca);
199 fixup_boot_paca();
188 200
189 /* Initialize lockdep early or else spinlocks will blow */ 201 /* Initialize lockdep early or else spinlocks will blow */
190 lockdep_init(); 202 lockdep_init();
@@ -205,11 +217,7 @@ void __init early_setup(unsigned long dt_ptr)
205 217
206 /* Now we know the logical id of our boot cpu, setup the paca. */ 218 /* Now we know the logical id of our boot cpu, setup the paca. */
207 setup_paca(&paca[boot_cpuid]); 219 setup_paca(&paca[boot_cpuid]);
208 220 fixup_boot_paca();
209 /* Fix up paca fields required for the boot cpu */
210 get_paca()->cpu_start = 1;
211 /* Allow percpu accesses to "work" until we setup percpu data */
212 get_paca()->data_offset = 0;
213 221
214 /* Probe the machine type */ 222 /* Probe the machine type */
215 probe_machine(); 223 probe_machine();
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index 3b997118df50..3003d890e9ef 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -130,8 +130,9 @@ static int do_signal(struct pt_regs *regs)
130 * user space. The DABR will have been cleared if it 130 * user space. The DABR will have been cleared if it
131 * triggered inside the kernel. 131 * triggered inside the kernel.
132 */ 132 */
133 if (current->thread.dabr) 133 if (current->thread.hw_brk.address &&
134 set_dabr(current->thread.dabr, current->thread.dabrx); 134 current->thread.hw_brk.type)
135 set_breakpoint(&current->thread.hw_brk);
135#endif 136#endif
136 /* Re-enable the breakpoints for the signal stack */ 137 /* Re-enable the breakpoints for the signal stack */
137 thread_change_pc(current, regs); 138 thread_change_pc(current, regs);
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h
index e00acb413934..ec84c901ceab 100644
--- a/arch/powerpc/kernel/signal.h
+++ b/arch/powerpc/kernel/signal.h
@@ -25,13 +25,21 @@ extern int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
25 25
26extern unsigned long copy_fpr_to_user(void __user *to, 26extern unsigned long copy_fpr_to_user(void __user *to,
27 struct task_struct *task); 27 struct task_struct *task);
28extern unsigned long copy_transact_fpr_to_user(void __user *to,
29 struct task_struct *task);
28extern unsigned long copy_fpr_from_user(struct task_struct *task, 30extern unsigned long copy_fpr_from_user(struct task_struct *task,
29 void __user *from); 31 void __user *from);
32extern unsigned long copy_transact_fpr_from_user(struct task_struct *task,
33 void __user *from);
30#ifdef CONFIG_VSX 34#ifdef CONFIG_VSX
31extern unsigned long copy_vsx_to_user(void __user *to, 35extern unsigned long copy_vsx_to_user(void __user *to,
32 struct task_struct *task); 36 struct task_struct *task);
37extern unsigned long copy_transact_vsx_to_user(void __user *to,
38 struct task_struct *task);
33extern unsigned long copy_vsx_from_user(struct task_struct *task, 39extern unsigned long copy_vsx_from_user(struct task_struct *task,
34 void __user *from); 40 void __user *from);
41extern unsigned long copy_transact_vsx_from_user(struct task_struct *task,
42 void __user *from);
35#endif 43#endif
36 44
37#ifdef CONFIG_PPC64 45#ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 804e323c139d..e4a88d340de6 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -43,6 +43,7 @@
43#include <asm/sigcontext.h> 43#include <asm/sigcontext.h>
44#include <asm/vdso.h> 44#include <asm/vdso.h>
45#include <asm/switch_to.h> 45#include <asm/switch_to.h>
46#include <asm/tm.h>
46#ifdef CONFIG_PPC64 47#ifdef CONFIG_PPC64
47#include "ppc32.h" 48#include "ppc32.h"
48#include <asm/unistd.h> 49#include <asm/unistd.h>
@@ -293,6 +294,10 @@ long sys_sigaction(int sig, struct old_sigaction __user *act,
293struct sigframe { 294struct sigframe {
294 struct sigcontext sctx; /* the sigcontext */ 295 struct sigcontext sctx; /* the sigcontext */
295 struct mcontext mctx; /* all the register values */ 296 struct mcontext mctx; /* all the register values */
297#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
298 struct sigcontext sctx_transact;
299 struct mcontext mctx_transact;
300#endif
296 /* 301 /*
297 * Programs using the rs6000/xcoff abi can save up to 19 gp 302 * Programs using the rs6000/xcoff abi can save up to 19 gp
298 * regs and 18 fp regs below sp before decrementing it. 303 * regs and 18 fp regs below sp before decrementing it.
@@ -321,6 +326,9 @@ struct rt_sigframe {
321 struct siginfo info; 326 struct siginfo info;
322#endif 327#endif
323 struct ucontext uc; 328 struct ucontext uc;
329#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
330 struct ucontext uc_transact;
331#endif
324 /* 332 /*
325 * Programs using the rs6000/xcoff abi can save up to 19 gp 333 * Programs using the rs6000/xcoff abi can save up to 19 gp
326 * regs and 18 fp regs below sp before decrementing it. 334 * regs and 18 fp regs below sp before decrementing it.
@@ -381,6 +389,61 @@ unsigned long copy_vsx_from_user(struct task_struct *task,
381 task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i]; 389 task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
382 return 0; 390 return 0;
383} 391}
392
393#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
394unsigned long copy_transact_fpr_to_user(void __user *to,
395 struct task_struct *task)
396{
397 double buf[ELF_NFPREG];
398 int i;
399
400 /* save FPR copy to local buffer then write to the thread_struct */
401 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
402 buf[i] = task->thread.TS_TRANS_FPR(i);
403 memcpy(&buf[i], &task->thread.transact_fpscr, sizeof(double));
404 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
405}
406
407unsigned long copy_transact_fpr_from_user(struct task_struct *task,
408 void __user *from)
409{
410 double buf[ELF_NFPREG];
411 int i;
412
413 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
414 return 1;
415 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
416 task->thread.TS_TRANS_FPR(i) = buf[i];
417 memcpy(&task->thread.transact_fpscr, &buf[i], sizeof(double));
418
419 return 0;
420}
421
422unsigned long copy_transact_vsx_to_user(void __user *to,
423 struct task_struct *task)
424{
425 double buf[ELF_NVSRHALFREG];
426 int i;
427
428 /* save FPR copy to local buffer then write to the thread_struct */
429 for (i = 0; i < ELF_NVSRHALFREG; i++)
430 buf[i] = task->thread.transact_fpr[i][TS_VSRLOWOFFSET];
431 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
432}
433
434unsigned long copy_transact_vsx_from_user(struct task_struct *task,
435 void __user *from)
436{
437 double buf[ELF_NVSRHALFREG];
438 int i;
439
440 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
441 return 1;
442 for (i = 0; i < ELF_NVSRHALFREG ; i++)
443 task->thread.transact_fpr[i][TS_VSRLOWOFFSET] = buf[i];
444 return 0;
445}
446#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
384#else 447#else
385inline unsigned long copy_fpr_to_user(void __user *to, 448inline unsigned long copy_fpr_to_user(void __user *to,
386 struct task_struct *task) 449 struct task_struct *task)
@@ -395,6 +458,22 @@ inline unsigned long copy_fpr_from_user(struct task_struct *task,
395 return __copy_from_user(task->thread.fpr, from, 458 return __copy_from_user(task->thread.fpr, from,
396 ELF_NFPREG * sizeof(double)); 459 ELF_NFPREG * sizeof(double));
397} 460}
461
462#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
463inline unsigned long copy_transact_fpr_to_user(void __user *to,
464 struct task_struct *task)
465{
466 return __copy_to_user(to, task->thread.transact_fpr,
467 ELF_NFPREG * sizeof(double));
468}
469
470inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
471 void __user *from)
472{
473 return __copy_from_user(task->thread.transact_fpr, from,
474 ELF_NFPREG * sizeof(double));
475}
476#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
398#endif 477#endif
399 478
400/* 479/*
@@ -483,6 +562,156 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
483 return 0; 562 return 0;
484} 563}
485 564
565#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
566/*
567 * Save the current user registers on the user stack.
568 * We only save the altivec/spe registers if the process has used
569 * altivec/spe instructions at some point.
570 * We also save the transactional registers to a second ucontext in the
571 * frame.
572 *
573 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
574 */
575static int save_tm_user_regs(struct pt_regs *regs,
576 struct mcontext __user *frame,
577 struct mcontext __user *tm_frame, int sigret)
578{
579 unsigned long msr = regs->msr;
580
581 /* tm_reclaim rolls back all reg states, updating thread.ckpt_regs,
582 * thread.transact_fpr[], thread.transact_vr[], etc.
583 */
584 tm_enable();
585 tm_reclaim(&current->thread, msr, TM_CAUSE_SIGNAL);
586
587 /* Make sure floating point registers are stored in regs */
588 flush_fp_to_thread(current);
589
590 /* Save both sets of general registers */
591 if (save_general_regs(&current->thread.ckpt_regs, frame)
592 || save_general_regs(regs, tm_frame))
593 return 1;
594
595 /* Stash the top half of the 64bit MSR into the 32bit MSR word
596 * of the transactional mcontext. This way we have a backward-compatible
597 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
598 * also look at what type of transaction (T or S) was active at the
599 * time of the signal.
600 */
601 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
602 return 1;
603
604#ifdef CONFIG_ALTIVEC
605 /* save altivec registers */
606 if (current->thread.used_vr) {
607 flush_altivec_to_thread(current);
608 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
609 ELF_NVRREG * sizeof(vector128)))
610 return 1;
611 if (msr & MSR_VEC) {
612 if (__copy_to_user(&tm_frame->mc_vregs,
613 current->thread.transact_vr,
614 ELF_NVRREG * sizeof(vector128)))
615 return 1;
616 } else {
617 if (__copy_to_user(&tm_frame->mc_vregs,
618 current->thread.vr,
619 ELF_NVRREG * sizeof(vector128)))
620 return 1;
621 }
622
623 /* set MSR_VEC in the saved MSR value to indicate that
624 * frame->mc_vregs contains valid data
625 */
626 msr |= MSR_VEC;
627 }
628
629 /* We always copy to/from vrsave, it's 0 if we don't have or don't
630 * use altivec. Since VSCR only contains 32 bits saved in the least
631 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
632 * most significant bits of that same vector. --BenH
633 */
634 if (__put_user(current->thread.vrsave,
635 (u32 __user *)&frame->mc_vregs[32]))
636 return 1;
637 if (msr & MSR_VEC) {
638 if (__put_user(current->thread.transact_vrsave,
639 (u32 __user *)&tm_frame->mc_vregs[32]))
640 return 1;
641 } else {
642 if (__put_user(current->thread.vrsave,
643 (u32 __user *)&tm_frame->mc_vregs[32]))
644 return 1;
645 }
646#endif /* CONFIG_ALTIVEC */
647
648 if (copy_fpr_to_user(&frame->mc_fregs, current))
649 return 1;
650 if (msr & MSR_FP) {
651 if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current))
652 return 1;
653 } else {
654 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
655 return 1;
656 }
657
658#ifdef CONFIG_VSX
659 /*
660 * Copy VSR 0-31 upper half from thread_struct to local
661 * buffer, then write that to userspace. Also set MSR_VSX in
662 * the saved MSR value to indicate that frame->mc_vregs
663 * contains valid data
664 */
665 if (current->thread.used_vsr) {
666 __giveup_vsx(current);
667 if (copy_vsx_to_user(&frame->mc_vsregs, current))
668 return 1;
669 if (msr & MSR_VSX) {
670 if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs,
671 current))
672 return 1;
673 } else {
674 if (copy_vsx_to_user(&tm_frame->mc_vsregs, current))
675 return 1;
676 }
677
678 msr |= MSR_VSX;
679 }
680#endif /* CONFIG_VSX */
681#ifdef CONFIG_SPE
682 /* SPE regs are not checkpointed with TM, so this section is
683 * simply the same as in save_user_regs().
684 */
685 if (current->thread.used_spe) {
686 flush_spe_to_thread(current);
687 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
688 ELF_NEVRREG * sizeof(u32)))
689 return 1;
690 /* set MSR_SPE in the saved MSR value to indicate that
691 * frame->mc_vregs contains valid data */
692 msr |= MSR_SPE;
693 }
694
695 /* We always copy to/from spefscr */
696 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
697 return 1;
698#endif /* CONFIG_SPE */
699
700 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
701 return 1;
702 if (sigret) {
703 /* Set up the sigreturn trampoline: li r0,sigret; sc */
704 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
705 || __put_user(0x44000002UL, &frame->tramp[1]))
706 return 1;
707 flush_icache_range((unsigned long) &frame->tramp[0],
708 (unsigned long) &frame->tramp[2]);
709 }
710
711 return 0;
712}
713#endif
714
486/* 715/*
487 * Restore the current user register values from the user stack, 716 * Restore the current user register values from the user stack,
488 * (except for MSR). 717 * (except for MSR).
@@ -588,6 +817,139 @@ static long restore_user_regs(struct pt_regs *regs,
588 return 0; 817 return 0;
589} 818}
590 819
820#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
821/*
822 * Restore the current user register values from the user stack, except for
823 * MSR, and recheckpoint the original checkpointed register state for processes
824 * in transactions.
825 */
826static long restore_tm_user_regs(struct pt_regs *regs,
827 struct mcontext __user *sr,
828 struct mcontext __user *tm_sr)
829{
830 long err;
831 unsigned long msr;
832#ifdef CONFIG_VSX
833 int i;
834#endif
835
836 /*
837 * restore general registers but not including MSR or SOFTE. Also
838 * take care of keeping r2 (TLS) intact if not a signal.
839 * See comment in signal_64.c:restore_tm_sigcontexts();
840 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
841 * were set by the signal delivery.
842 */
843 err = restore_general_regs(regs, tm_sr);
844 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
845
846 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
847
848 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
849 if (err)
850 return 1;
851
852 /* Restore the previous little-endian mode */
853 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
854
855 /*
856 * Do this before updating the thread state in
857 * current->thread.fpr/vr/evr. That way, if we get preempted
858 * and another task grabs the FPU/Altivec/SPE, it won't be
859 * tempted to save the current CPU state into the thread_struct
860 * and corrupt what we are writing there.
861 */
862 discard_lazy_cpu_state();
863
864#ifdef CONFIG_ALTIVEC
865 regs->msr &= ~MSR_VEC;
866 if (msr & MSR_VEC) {
867 /* restore altivec registers from the stack */
868 if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
869 sizeof(sr->mc_vregs)) ||
870 __copy_from_user(current->thread.transact_vr,
871 &tm_sr->mc_vregs,
872 sizeof(sr->mc_vregs)))
873 return 1;
874 } else if (current->thread.used_vr) {
875 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
876 memset(current->thread.transact_vr, 0,
877 ELF_NVRREG * sizeof(vector128));
878 }
879
880 /* Always get VRSAVE back */
881 if (__get_user(current->thread.vrsave,
882 (u32 __user *)&sr->mc_vregs[32]) ||
883 __get_user(current->thread.transact_vrsave,
884 (u32 __user *)&tm_sr->mc_vregs[32]))
885 return 1;
886#endif /* CONFIG_ALTIVEC */
887
888 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
889
890 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
891 copy_transact_fpr_from_user(current, &tm_sr->mc_fregs))
892 return 1;
893
894#ifdef CONFIG_VSX
895 regs->msr &= ~MSR_VSX;
896 if (msr & MSR_VSX) {
897 /*
898 * Restore altivec registers from the stack to a local
899 * buffer, then write this out to the thread_struct
900 */
901 if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
902 copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
903 return 1;
904 } else if (current->thread.used_vsr)
905 for (i = 0; i < 32 ; i++) {
906 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
907 current->thread.transact_fpr[i][TS_VSRLOWOFFSET] = 0;
908 }
909#endif /* CONFIG_VSX */
910
911#ifdef CONFIG_SPE
912 /* SPE regs are not checkpointed with TM, so this section is
913 * simply the same as in restore_user_regs().
914 */
915 regs->msr &= ~MSR_SPE;
916 if (msr & MSR_SPE) {
917 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
918 ELF_NEVRREG * sizeof(u32)))
919 return 1;
920 } else if (current->thread.used_spe)
921 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
922
923 /* Always get SPEFSCR back */
924 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
925 + ELF_NEVRREG))
926 return 1;
927#endif /* CONFIG_SPE */
928
929 /* Now, recheckpoint. This loads up all of the checkpointed (older)
930 * registers, including FP and V[S]Rs. After recheckpointing, the
931 * transactional versions should be loaded.
932 */
933 tm_enable();
934 /* This loads the checkpointed FP/VEC state, if used */
935 tm_recheckpoint(&current->thread, msr);
936 /* The task has moved into TM state S, so ensure MSR reflects this */
937 regs->msr = (regs->msr & ~MSR_TS_MASK) | MSR_TS_S;
938
939 /* This loads the speculative FP/VEC state, if used */
940 if (msr & MSR_FP) {
941 do_load_up_transact_fpu(&current->thread);
942 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
943 }
944 if (msr & MSR_VEC) {
945 do_load_up_transact_altivec(&current->thread);
946 regs->msr |= MSR_VEC;
947 }
948
949 return 0;
950}
951#endif
952
591#ifdef CONFIG_PPC64 953#ifdef CONFIG_PPC64
592long compat_sys_rt_sigaction(int sig, const struct sigaction32 __user *act, 954long compat_sys_rt_sigaction(int sig, const struct sigaction32 __user *act,
593 struct sigaction32 __user *oact, size_t sigsetsize) 955 struct sigaction32 __user *oact, size_t sigsetsize)
@@ -827,6 +1189,8 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
827 struct mcontext __user *frame; 1189 struct mcontext __user *frame;
828 void __user *addr; 1190 void __user *addr;
829 unsigned long newsp = 0; 1191 unsigned long newsp = 0;
1192 int sigret;
1193 unsigned long tramp;
830 1194
831 /* Set up Signal Frame */ 1195 /* Set up Signal Frame */
832 /* Put a Real Time Context onto stack */ 1196 /* Put a Real Time Context onto stack */
@@ -838,7 +1202,6 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
838 /* Put the siginfo & fill in most of the ucontext */ 1202 /* Put the siginfo & fill in most of the ucontext */
839 if (copy_siginfo_to_user(&rt_sf->info, info) 1203 if (copy_siginfo_to_user(&rt_sf->info, info)
840 || __put_user(0, &rt_sf->uc.uc_flags) 1204 || __put_user(0, &rt_sf->uc.uc_flags)
841 || __put_user(0, &rt_sf->uc.uc_link)
842 || __put_user(current->sas_ss_sp, &rt_sf->uc.uc_stack.ss_sp) 1205 || __put_user(current->sas_ss_sp, &rt_sf->uc.uc_stack.ss_sp)
843 || __put_user(sas_ss_flags(regs->gpr[1]), 1206 || __put_user(sas_ss_flags(regs->gpr[1]),
844 &rt_sf->uc.uc_stack.ss_flags) 1207 &rt_sf->uc.uc_stack.ss_flags)
@@ -852,14 +1215,37 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
852 frame = &rt_sf->uc.uc_mcontext; 1215 frame = &rt_sf->uc.uc_mcontext;
853 addr = frame; 1216 addr = frame;
854 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) { 1217 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) {
855 if (save_user_regs(regs, frame, 0, 1)) 1218 sigret = 0;
856 goto badframe; 1219 tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp;
857 regs->link = current->mm->context.vdso_base + vdso32_rt_sigtramp;
858 } else { 1220 } else {
859 if (save_user_regs(regs, frame, __NR_rt_sigreturn, 1)) 1221 sigret = __NR_rt_sigreturn;
1222 tramp = (unsigned long) frame->tramp;
1223 }
1224
1225#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1226 if (MSR_TM_ACTIVE(regs->msr)) {
1227 if (save_tm_user_regs(regs, &rt_sf->uc.uc_mcontext,
1228 &rt_sf->uc_transact.uc_mcontext, sigret))
860 goto badframe; 1229 goto badframe;
861 regs->link = (unsigned long) frame->tramp;
862 } 1230 }
1231 else
1232#endif
1233 if (save_user_regs(regs, frame, sigret, 1))
1234 goto badframe;
1235 regs->link = tramp;
1236
1237#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1238 if (MSR_TM_ACTIVE(regs->msr)) {
1239 if (__put_user((unsigned long)&rt_sf->uc_transact,
1240 &rt_sf->uc.uc_link)
1241 || __put_user(to_user_ptr(&rt_sf->uc_transact.uc_mcontext),
1242 &rt_sf->uc_transact.uc_regs))
1243 goto badframe;
1244 }
1245 else
1246#endif
1247 if (__put_user(0, &rt_sf->uc.uc_link))
1248 goto badframe;
863 1249
864 current->thread.fpscr.val = 0; /* turn off all fp exceptions */ 1250 current->thread.fpscr.val = 0; /* turn off all fp exceptions */
865 1251
@@ -878,6 +1264,13 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
878 regs->nip = (unsigned long) ka->sa.sa_handler; 1264 regs->nip = (unsigned long) ka->sa.sa_handler;
879 /* enter the signal handler in big-endian mode */ 1265 /* enter the signal handler in big-endian mode */
880 regs->msr &= ~MSR_LE; 1266 regs->msr &= ~MSR_LE;
1267#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1268 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1269 * just indicates to userland that we were doing a transaction, but we
1270 * don't want to return in transactional state:
1271 */
1272 regs->msr &= ~MSR_TS_MASK;
1273#endif
881 return 1; 1274 return 1;
882 1275
883badframe: 1276badframe:
@@ -925,6 +1318,35 @@ static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int
925 return 0; 1318 return 0;
926} 1319}
927 1320
1321#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1322static int do_setcontext_tm(struct ucontext __user *ucp,
1323 struct ucontext __user *tm_ucp,
1324 struct pt_regs *regs)
1325{
1326 sigset_t set;
1327 struct mcontext __user *mcp;
1328 struct mcontext __user *tm_mcp;
1329 u32 cmcp;
1330 u32 tm_cmcp;
1331
1332 if (get_sigset_t(&set, &ucp->uc_sigmask))
1333 return -EFAULT;
1334
1335 if (__get_user(cmcp, &ucp->uc_regs) ||
1336 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1337 return -EFAULT;
1338 mcp = (struct mcontext __user *)(u64)cmcp;
1339 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1340 /* no need to check access_ok(mcp), since mcp < 4GB */
1341
1342 set_current_blocked(&set);
1343 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1344 return -EFAULT;
1345
1346 return 0;
1347}
1348#endif
1349
928long sys_swapcontext(struct ucontext __user *old_ctx, 1350long sys_swapcontext(struct ucontext __user *old_ctx,
929 struct ucontext __user *new_ctx, 1351 struct ucontext __user *new_ctx,
930 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs) 1352 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
@@ -1020,7 +1442,12 @@ long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1020 struct pt_regs *regs) 1442 struct pt_regs *regs)
1021{ 1443{
1022 struct rt_sigframe __user *rt_sf; 1444 struct rt_sigframe __user *rt_sf;
1023 1445#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1446 struct ucontext __user *uc_transact;
1447 unsigned long msr_hi;
1448 unsigned long tmp;
1449 int tm_restore = 0;
1450#endif
1024 /* Always make any pending restarted system calls return -EINTR */ 1451 /* Always make any pending restarted system calls return -EINTR */
1025 current_thread_info()->restart_block.fn = do_no_restart_syscall; 1452 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1026 1453
@@ -1028,6 +1455,34 @@ long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1028 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16); 1455 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1029 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf))) 1456 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1030 goto bad; 1457 goto bad;
1458#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1459 if (__get_user(tmp, &rt_sf->uc.uc_link))
1460 goto bad;
1461 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1462 if (uc_transact) {
1463 u32 cmcp;
1464 struct mcontext __user *mcp;
1465
1466 if (__get_user(cmcp, &uc_transact->uc_regs))
1467 return -EFAULT;
1468 mcp = (struct mcontext __user *)(u64)cmcp;
1469 /* The top 32 bits of the MSR are stashed in the transactional
1470 * ucontext. */
1471 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1472 goto bad;
1473
1474 if (MSR_TM_SUSPENDED(msr_hi<<32)) {
1475 /* We only recheckpoint on return if we're
1476 * transaction.
1477 */
1478 tm_restore = 1;
1479 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1480 goto bad;
1481 }
1482 }
1483 if (!tm_restore)
1484 /* Fall through, for non-TM restore */
1485#endif
1031 if (do_setcontext(&rt_sf->uc, regs, 1)) 1486 if (do_setcontext(&rt_sf->uc, regs, 1))
1032 goto bad; 1487 goto bad;
1033 1488
@@ -1179,6 +1634,8 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
1179 struct sigcontext __user *sc; 1634 struct sigcontext __user *sc;
1180 struct sigframe __user *frame; 1635 struct sigframe __user *frame;
1181 unsigned long newsp = 0; 1636 unsigned long newsp = 0;
1637 int sigret;
1638 unsigned long tramp;
1182 1639
1183 /* Set up Signal Frame */ 1640 /* Set up Signal Frame */
1184 frame = get_sigframe(ka, regs, sizeof(*frame), 1); 1641 frame = get_sigframe(ka, regs, sizeof(*frame), 1);
@@ -1201,14 +1658,25 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
1201 goto badframe; 1658 goto badframe;
1202 1659
1203 if (vdso32_sigtramp && current->mm->context.vdso_base) { 1660 if (vdso32_sigtramp && current->mm->context.vdso_base) {
1204 if (save_user_regs(regs, &frame->mctx, 0, 1)) 1661 sigret = 0;
1205 goto badframe; 1662 tramp = current->mm->context.vdso_base + vdso32_sigtramp;
1206 regs->link = current->mm->context.vdso_base + vdso32_sigtramp;
1207 } else { 1663 } else {
1208 if (save_user_regs(regs, &frame->mctx, __NR_sigreturn, 1)) 1664 sigret = __NR_sigreturn;
1665 tramp = (unsigned long) frame->mctx.tramp;
1666 }
1667
1668#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1669 if (MSR_TM_ACTIVE(regs->msr)) {
1670 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1671 sigret))
1209 goto badframe; 1672 goto badframe;
1210 regs->link = (unsigned long) frame->mctx.tramp;
1211 } 1673 }
1674 else
1675#endif
1676 if (save_user_regs(regs, &frame->mctx, sigret, 1))
1677 goto badframe;
1678
1679 regs->link = tramp;
1212 1680
1213 current->thread.fpscr.val = 0; /* turn off all fp exceptions */ 1681 current->thread.fpscr.val = 0; /* turn off all fp exceptions */
1214 1682
@@ -1223,7 +1691,13 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
1223 regs->nip = (unsigned long) ka->sa.sa_handler; 1691 regs->nip = (unsigned long) ka->sa.sa_handler;
1224 /* enter the signal handler in big-endian mode */ 1692 /* enter the signal handler in big-endian mode */
1225 regs->msr &= ~MSR_LE; 1693 regs->msr &= ~MSR_LE;
1226 1694#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1695 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1696 * just indicates to userland that we were doing a transaction, but we
1697 * don't want to return in transactional state:
1698 */
1699 regs->msr &= ~MSR_TS_MASK;
1700#endif
1227 return 1; 1701 return 1;
1228 1702
1229badframe: 1703badframe:
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 1ca045d44324..7a76ee48a952 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -34,6 +34,7 @@
34#include <asm/syscalls.h> 34#include <asm/syscalls.h>
35#include <asm/vdso.h> 35#include <asm/vdso.h>
36#include <asm/switch_to.h> 36#include <asm/switch_to.h>
37#include <asm/tm.h>
37 38
38#include "signal.h" 39#include "signal.h"
39 40
@@ -56,6 +57,9 @@
56struct rt_sigframe { 57struct rt_sigframe {
57 /* sys_rt_sigreturn requires the ucontext be the first field */ 58 /* sys_rt_sigreturn requires the ucontext be the first field */
58 struct ucontext uc; 59 struct ucontext uc;
60#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
61 struct ucontext uc_transact;
62#endif
59 unsigned long _unused[2]; 63 unsigned long _unused[2];
60 unsigned int tramp[TRAMP_SIZE]; 64 unsigned int tramp[TRAMP_SIZE];
61 struct siginfo __user *pinfo; 65 struct siginfo __user *pinfo;
@@ -145,6 +149,145 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
145 return err; 149 return err;
146} 150}
147 151
152#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
153/*
154 * As above, but Transactional Memory is in use, so deliver sigcontexts
155 * containing checkpointed and transactional register states.
156 *
157 * To do this, we treclaim to gather both sets of registers and set up the
158 * 'normal' sigcontext registers with rolled-back register values such that a
159 * simple signal handler sees a correct checkpointed register state.
160 * If interested, a TM-aware sighandler can examine the transactional registers
161 * in the 2nd sigcontext to determine the real origin of the signal.
162 */
163static long setup_tm_sigcontexts(struct sigcontext __user *sc,
164 struct sigcontext __user *tm_sc,
165 struct pt_regs *regs,
166 int signr, sigset_t *set, unsigned long handler)
167{
168 /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
169 * process never used altivec yet (MSR_VEC is zero in pt_regs of
170 * the context). This is very important because we must ensure we
171 * don't lose the VRSAVE content that may have been set prior to
172 * the process doing its first vector operation
173 * Userland shall check AT_HWCAP to know wether it can rely on the
174 * v_regs pointer or not.
175 */
176#ifdef CONFIG_ALTIVEC
177 elf_vrreg_t __user *v_regs = (elf_vrreg_t __user *)
178 (((unsigned long)sc->vmx_reserve + 15) & ~0xful);
179 elf_vrreg_t __user *tm_v_regs = (elf_vrreg_t __user *)
180 (((unsigned long)tm_sc->vmx_reserve + 15) & ~0xful);
181#endif
182 unsigned long msr = regs->msr;
183 long err = 0;
184
185 BUG_ON(!MSR_TM_ACTIVE(regs->msr));
186
187 /* tm_reclaim rolls back all reg states, saving checkpointed (older)
188 * GPRs to thread.ckpt_regs and (if used) FPRs to (newer)
189 * thread.transact_fp and/or VRs to (newer) thread.transact_vr.
190 * THEN we save out FP/VRs, if necessary, to the checkpointed (older)
191 * thread.fr[]/vr[]s. The transactional (newer) GPRs are on the
192 * stack, in *regs.
193 */
194 tm_enable();
195 tm_reclaim(&current->thread, msr, TM_CAUSE_SIGNAL);
196
197 flush_fp_to_thread(current);
198
199#ifdef CONFIG_ALTIVEC
200 err |= __put_user(v_regs, &sc->v_regs);
201 err |= __put_user(tm_v_regs, &tm_sc->v_regs);
202
203 /* save altivec registers */
204 if (current->thread.used_vr) {
205 flush_altivec_to_thread(current);
206 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
207 err |= __copy_to_user(v_regs, current->thread.vr,
208 33 * sizeof(vector128));
209 /* If VEC was enabled there are transactional VRs valid too,
210 * else they're a copy of the checkpointed VRs.
211 */
212 if (msr & MSR_VEC)
213 err |= __copy_to_user(tm_v_regs,
214 current->thread.transact_vr,
215 33 * sizeof(vector128));
216 else
217 err |= __copy_to_user(tm_v_regs,
218 current->thread.vr,
219 33 * sizeof(vector128));
220
221 /* set MSR_VEC in the MSR value in the frame to indicate
222 * that sc->v_reg contains valid data.
223 */
224 msr |= MSR_VEC;
225 }
226 /* We always copy to/from vrsave, it's 0 if we don't have or don't
227 * use altivec.
228 */
229 err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
230 if (msr & MSR_VEC)
231 err |= __put_user(current->thread.transact_vrsave,
232 (u32 __user *)&tm_v_regs[33]);
233 else
234 err |= __put_user(current->thread.vrsave,
235 (u32 __user *)&tm_v_regs[33]);
236
237#else /* CONFIG_ALTIVEC */
238 err |= __put_user(0, &sc->v_regs);
239 err |= __put_user(0, &tm_sc->v_regs);
240#endif /* CONFIG_ALTIVEC */
241
242 /* copy fpr regs and fpscr */
243 err |= copy_fpr_to_user(&sc->fp_regs, current);
244 if (msr & MSR_FP)
245 err |= copy_transact_fpr_to_user(&tm_sc->fp_regs, current);
246 else
247 err |= copy_fpr_to_user(&tm_sc->fp_regs, current);
248
249#ifdef CONFIG_VSX
250 /*
251 * Copy VSX low doubleword to local buffer for formatting,
252 * then out to userspace. Update v_regs to point after the
253 * VMX data.
254 */
255 if (current->thread.used_vsr) {
256 __giveup_vsx(current);
257 v_regs += ELF_NVRREG;
258 tm_v_regs += ELF_NVRREG;
259
260 err |= copy_vsx_to_user(v_regs, current);
261
262 if (msr & MSR_VSX)
263 err |= copy_transact_vsx_to_user(tm_v_regs, current);
264 else
265 err |= copy_vsx_to_user(tm_v_regs, current);
266
267 /* set MSR_VSX in the MSR value in the frame to
268 * indicate that sc->vs_reg) contains valid data.
269 */
270 msr |= MSR_VSX;
271 }
272#endif /* CONFIG_VSX */
273
274 err |= __put_user(&sc->gp_regs, &sc->regs);
275 err |= __put_user(&tm_sc->gp_regs, &tm_sc->regs);
276 WARN_ON(!FULL_REGS(regs));
277 err |= __copy_to_user(&tm_sc->gp_regs, regs, GP_REGS_SIZE);
278 err |= __copy_to_user(&sc->gp_regs,
279 &current->thread.ckpt_regs, GP_REGS_SIZE);
280 err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]);
281 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
282 err |= __put_user(signr, &sc->signal);
283 err |= __put_user(handler, &sc->handler);
284 if (set != NULL)
285 err |= __put_user(set->sig[0], &sc->oldmask);
286
287 return err;
288}
289#endif
290
148/* 291/*
149 * Restore the sigcontext from the signal frame. 292 * Restore the sigcontext from the signal frame.
150 */ 293 */
@@ -241,6 +384,153 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
241 return err; 384 return err;
242} 385}
243 386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
388/*
389 * Restore the two sigcontexts from the frame of a transactional processes.
390 */
391
392static long restore_tm_sigcontexts(struct pt_regs *regs,
393 struct sigcontext __user *sc,
394 struct sigcontext __user *tm_sc)
395{
396#ifdef CONFIG_ALTIVEC
397 elf_vrreg_t __user *v_regs, *tm_v_regs;
398#endif
399 unsigned long err = 0;
400 unsigned long msr;
401#ifdef CONFIG_VSX
402 int i;
403#endif
404 /* copy the GPRs */
405 err |= __copy_from_user(regs->gpr, tm_sc->gp_regs, sizeof(regs->gpr));
406 err |= __copy_from_user(&current->thread.ckpt_regs, sc->gp_regs,
407 sizeof(regs->gpr));
408
409 /*
410 * TFHAR is restored from the checkpointed 'wound-back' ucontext's NIP.
411 * TEXASR was set by the signal delivery reclaim, as was TFIAR.
412 * Users doing anything abhorrent like thread-switching w/ signals for
413 * TM-Suspended code will have to back TEXASR/TFIAR up themselves.
414 * For the case of getting a signal and simply returning from it,
415 * we don't need to re-copy them here.
416 */
417 err |= __get_user(regs->nip, &tm_sc->gp_regs[PT_NIP]);
418 err |= __get_user(current->thread.tm_tfhar, &sc->gp_regs[PT_NIP]);
419
420 /* get MSR separately, transfer the LE bit if doing signal return */
421 err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
422 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
423
424 /* The following non-GPR non-FPR non-VR state is also checkpointed: */
425 err |= __get_user(regs->ctr, &tm_sc->gp_regs[PT_CTR]);
426 err |= __get_user(regs->link, &tm_sc->gp_regs[PT_LNK]);
427 err |= __get_user(regs->xer, &tm_sc->gp_regs[PT_XER]);
428 err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]);
429 err |= __get_user(current->thread.ckpt_regs.ctr,
430 &sc->gp_regs[PT_CTR]);
431 err |= __get_user(current->thread.ckpt_regs.link,
432 &sc->gp_regs[PT_LNK]);
433 err |= __get_user(current->thread.ckpt_regs.xer,
434 &sc->gp_regs[PT_XER]);
435 err |= __get_user(current->thread.ckpt_regs.ccr,
436 &sc->gp_regs[PT_CCR]);
437
438 /* These regs are not checkpointed; they can go in 'regs'. */
439 err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]);
440 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
441 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
442 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
443
444 /*
445 * Do this before updating the thread state in
446 * current->thread.fpr/vr. That way, if we get preempted
447 * and another task grabs the FPU/Altivec, it won't be
448 * tempted to save the current CPU state into the thread_struct
449 * and corrupt what we are writing there.
450 */
451 discard_lazy_cpu_state();
452
453 /*
454 * Force reload of FP/VEC.
455 * This has to be done before copying stuff into current->thread.fpr/vr
456 * for the reasons explained in the previous comment.
457 */
458 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
459
460#ifdef CONFIG_ALTIVEC
461 err |= __get_user(v_regs, &sc->v_regs);
462 err |= __get_user(tm_v_regs, &tm_sc->v_regs);
463 if (err)
464 return err;
465 if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
466 return -EFAULT;
467 if (tm_v_regs && !access_ok(VERIFY_READ,
468 tm_v_regs, 34 * sizeof(vector128)))
469 return -EFAULT;
470 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
471 if (v_regs != 0 && tm_v_regs != 0 && (msr & MSR_VEC) != 0) {
472 err |= __copy_from_user(current->thread.vr, v_regs,
473 33 * sizeof(vector128));
474 err |= __copy_from_user(current->thread.transact_vr, tm_v_regs,
475 33 * sizeof(vector128));
476 }
477 else if (current->thread.used_vr) {
478 memset(current->thread.vr, 0, 33 * sizeof(vector128));
479 memset(current->thread.transact_vr, 0, 33 * sizeof(vector128));
480 }
481 /* Always get VRSAVE back */
482 if (v_regs != 0 && tm_v_regs != 0) {
483 err |= __get_user(current->thread.vrsave,
484 (u32 __user *)&v_regs[33]);
485 err |= __get_user(current->thread.transact_vrsave,
486 (u32 __user *)&tm_v_regs[33]);
487 }
488 else {
489 current->thread.vrsave = 0;
490 current->thread.transact_vrsave = 0;
491 }
492#endif /* CONFIG_ALTIVEC */
493 /* restore floating point */
494 err |= copy_fpr_from_user(current, &sc->fp_regs);
495 err |= copy_transact_fpr_from_user(current, &tm_sc->fp_regs);
496#ifdef CONFIG_VSX
497 /*
498 * Get additional VSX data. Update v_regs to point after the
499 * VMX data. Copy VSX low doubleword from userspace to local
500 * buffer for formatting, then into the taskstruct.
501 */
502 if (v_regs && ((msr & MSR_VSX) != 0)) {
503 v_regs += ELF_NVRREG;
504 tm_v_regs += ELF_NVRREG;
505 err |= copy_vsx_from_user(current, v_regs);
506 err |= copy_transact_vsx_from_user(current, tm_v_regs);
507 } else {
508 for (i = 0; i < 32 ; i++) {
509 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
510 current->thread.transact_fpr[i][TS_VSRLOWOFFSET] = 0;
511 }
512 }
513#endif
514 tm_enable();
515 /* This loads the checkpointed FP/VEC state, if used */
516 tm_recheckpoint(&current->thread, msr);
517 /* The task has moved into TM state S, so ensure MSR reflects this: */
518 regs->msr = (regs->msr & ~MSR_TS_MASK) | __MASK(33);
519
520 /* This loads the speculative FP/VEC state, if used */
521 if (msr & MSR_FP) {
522 do_load_up_transact_fpu(&current->thread);
523 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
524 }
525 if (msr & MSR_VEC) {
526 do_load_up_transact_altivec(&current->thread);
527 regs->msr |= MSR_VEC;
528 }
529
530 return err;
531}
532#endif
533
244/* 534/*
245 * Setup the trampoline code on the stack 535 * Setup the trampoline code on the stack
246 */ 536 */
@@ -355,6 +645,9 @@ int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
355{ 645{
356 struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1]; 646 struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1];
357 sigset_t set; 647 sigset_t set;
648#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
649 unsigned long msr;
650#endif
358 651
359 /* Always make any pending restarted system calls return -EINTR */ 652 /* Always make any pending restarted system calls return -EINTR */
360 current_thread_info()->restart_block.fn = do_no_restart_syscall; 653 current_thread_info()->restart_block.fn = do_no_restart_syscall;
@@ -365,6 +658,21 @@ int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
365 if (__copy_from_user(&set, &uc->uc_sigmask, sizeof(set))) 658 if (__copy_from_user(&set, &uc->uc_sigmask, sizeof(set)))
366 goto badframe; 659 goto badframe;
367 set_current_blocked(&set); 660 set_current_blocked(&set);
661#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
662 if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR]))
663 goto badframe;
664 if (MSR_TM_SUSPENDED(msr)) {
665 /* We recheckpoint on return. */
666 struct ucontext __user *uc_transact;
667 if (__get_user(uc_transact, &uc->uc_link))
668 goto badframe;
669 if (restore_tm_sigcontexts(regs, &uc->uc_mcontext,
670 &uc_transact->uc_mcontext))
671 goto badframe;
672 }
673 else
674 /* Fall through, for non-TM restore */
675#endif
368 if (restore_sigcontext(regs, NULL, 1, &uc->uc_mcontext)) 676 if (restore_sigcontext(regs, NULL, 1, &uc->uc_mcontext))
369 goto badframe; 677 goto badframe;
370 678
@@ -415,19 +723,42 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
415 723
416 /* Create the ucontext. */ 724 /* Create the ucontext. */
417 err |= __put_user(0, &frame->uc.uc_flags); 725 err |= __put_user(0, &frame->uc.uc_flags);
418 err |= __put_user(0, &frame->uc.uc_link);
419 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); 726 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
420 err |= __put_user(sas_ss_flags(regs->gpr[1]), 727 err |= __put_user(sas_ss_flags(regs->gpr[1]),
421 &frame->uc.uc_stack.ss_flags); 728 &frame->uc.uc_stack.ss_flags);
422 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); 729 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
423 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, signr, NULL, 730#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
424 (unsigned long)ka->sa.sa_handler, 1); 731 if (MSR_TM_ACTIVE(regs->msr)) {
732 /* The ucontext_t passed to userland points to the second
733 * ucontext_t (for transactional state) with its uc_link ptr.
734 */
735 err |= __put_user(&frame->uc_transact, &frame->uc.uc_link);
736 err |= setup_tm_sigcontexts(&frame->uc.uc_mcontext,
737 &frame->uc_transact.uc_mcontext,
738 regs, signr,
739 NULL,
740 (unsigned long)ka->sa.sa_handler);
741 } else
742#endif
743 {
744 err |= __put_user(0, &frame->uc.uc_link);
745 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, signr,
746 NULL, (unsigned long)ka->sa.sa_handler,
747 1);
748 }
425 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); 749 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
426 if (err) 750 if (err)
427 goto badframe; 751 goto badframe;
428 752
429 /* Make sure signal handler doesn't get spurious FP exceptions */ 753 /* Make sure signal handler doesn't get spurious FP exceptions */
430 current->thread.fpscr.val = 0; 754 current->thread.fpscr.val = 0;
755#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
756 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
757 * just indicates to userland that we were doing a transaction, but we
758 * don't want to return in transactional state:
759 */
760 regs->msr &= ~MSR_TS_MASK;
761#endif
431 762
432 /* Set up to return from userspace. */ 763 /* Set up to return from userspace. */
433 if (vdso64_rt_sigtramp && current->mm->context.vdso_base) { 764 if (vdso64_rt_sigtramp && current->mm->context.vdso_base) {
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 793401e65088..76bd9da8cb71 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -610,7 +610,7 @@ static struct device_node *cpu_to_l2cache(int cpu)
610} 610}
611 611
612/* Activate a secondary processor. */ 612/* Activate a secondary processor. */
613void start_secondary(void *unused) 613__cpuinit void start_secondary(void *unused)
614{ 614{
615 unsigned int cpu = smp_processor_id(); 615 unsigned int cpu = smp_processor_id();
616 struct device_node *l2_cache; 616 struct device_node *l2_cache;
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
new file mode 100644
index 000000000000..84dbace657ce
--- /dev/null
+++ b/arch/powerpc/kernel/tm.S
@@ -0,0 +1,388 @@
1/*
2 * Transactional memory support routines to reclaim and recheckpoint
3 * transactional process state.
4 *
5 * Copyright 2012 Matt Evans & Michael Neuling, IBM Corporation.
6 */
7
8#include <asm/asm-offsets.h>
9#include <asm/ppc_asm.h>
10#include <asm/ppc-opcode.h>
11#include <asm/ptrace.h>
12#include <asm/reg.h>
13
14#ifdef CONFIG_VSX
15/* See fpu.S, this is very similar but to save/restore checkpointed FPRs/VSRs */
16#define __SAVE_32FPRS_VSRS_TRANSACT(n,c,base) \
17BEGIN_FTR_SECTION \
18 b 2f; \
19END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
20 SAVE_32FPRS_TRANSACT(n,base); \
21 b 3f; \
222: SAVE_32VSRS_TRANSACT(n,c,base); \
233:
24/* ...and this is just plain borrowed from there. */
25#define __REST_32FPRS_VSRS(n,c,base) \
26BEGIN_FTR_SECTION \
27 b 2f; \
28END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
29 REST_32FPRS(n,base); \
30 b 3f; \
312: REST_32VSRS(n,c,base); \
323:
33#else
34#define __SAVE_32FPRS_VSRS_TRANSACT(n,c,base) SAVE_32FPRS_TRANSACT(n, base)
35#define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base)
36#endif
37#define SAVE_32FPRS_VSRS_TRANSACT(n,c,base) \
38 __SAVE_32FPRS_VSRS_TRANSACT(n,__REG_##c,__REG_##base)
39#define REST_32FPRS_VSRS(n,c,base) \
40 __REST_32FPRS_VSRS(n,__REG_##c,__REG_##base)
41
42/* Stack frame offsets for local variables. */
43#define TM_FRAME_L0 TM_FRAME_SIZE-16
44#define TM_FRAME_L1 TM_FRAME_SIZE-8
45#define STACK_PARAM(x) (48+((x)*8))
46
47
48/* In order to access the TM SPRs, TM must be enabled. So, do so: */
49_GLOBAL(tm_enable)
50 mfmsr r4
51 li r3, MSR_TM >> 32
52 sldi r3, r3, 32
53 and. r0, r4, r3
54 bne 1f
55 or r4, r4, r3
56 mtmsrd r4
571: blr
58
59_GLOBAL(tm_save_sprs)
60 mfspr r0, SPRN_TFHAR
61 std r0, THREAD_TM_TFHAR(r3)
62 mfspr r0, SPRN_TEXASR
63 std r0, THREAD_TM_TEXASR(r3)
64 mfspr r0, SPRN_TFIAR
65 std r0, THREAD_TM_TFIAR(r3)
66 blr
67
68_GLOBAL(tm_restore_sprs)
69 ld r0, THREAD_TM_TFHAR(r3)
70 mtspr SPRN_TFHAR, r0
71 ld r0, THREAD_TM_TEXASR(r3)
72 mtspr SPRN_TEXASR, r0
73 ld r0, THREAD_TM_TFIAR(r3)
74 mtspr SPRN_TFIAR, r0
75 blr
76
77 /* Passed an 8-bit failure cause as first argument. */
78_GLOBAL(tm_abort)
79 TABORT(R3)
80 blr
81
82
83/* void tm_reclaim(struct thread_struct *thread,
84 * unsigned long orig_msr,
85 * uint8_t cause)
86 *
87 * - Performs a full reclaim. This destroys outstanding
88 * transactions and updates thread->regs.tm_ckpt_* with the
89 * original checkpointed state. Note that thread->regs is
90 * unchanged.
91 * - FP regs are written back to thread->transact_fpr before
92 * reclaiming. These are the transactional (current) versions.
93 *
94 * Purpose is to both abort transactions of, and preserve the state of,
95 * a transactions at a context switch. We preserve/restore both sets of process
96 * state to restore them when the thread's scheduled again. We continue in
97 * userland as though nothing happened, but when the transaction is resumed
98 * they will abort back to the checkpointed state we save out here.
99 *
100 * Call with IRQs off, stacks get all out of sync for some periods in here!
101 */
102_GLOBAL(tm_reclaim)
103 mfcr r6
104 mflr r0
105 std r6, 8(r1)
106 std r0, 16(r1)
107 std r2, 40(r1)
108 stdu r1, -TM_FRAME_SIZE(r1)
109
110 /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD]. */
111
112 std r3, STACK_PARAM(0)(r1)
113 SAVE_NVGPRS(r1)
114
115 mfmsr r14
116 mr r15, r14
117 ori r15, r15, MSR_FP
118 oris r15, r15, MSR_VEC@h
119#ifdef CONFIG_VSX
120 BEGIN_FTR_SECTION
121 oris r15,r15, MSR_VSX@h
122 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
123#endif
124 mtmsrd r15
125 std r14, TM_FRAME_L0(r1)
126
127 /* Stash the stack pointer away for use after reclaim */
128 std r1, PACAR1(r13)
129
130 /* ******************** FPR/VR/VSRs ************
131 * Before reclaiming, capture the current/transactional FPR/VR
132 * versions /if used/.
133 *
134 * (If VSX used, FP and VMX are implied. Or, we don't need to look
135 * at MSR.VSX as copying FP regs if .FP, vector regs if .VMX covers it.)
136 *
137 * We're passed the thread's MSR as parameter 2.
138 *
139 * We enabled VEC/FP/VSX in the msr above, so we can execute these
140 * instructions!
141 */
142 andis. r0, r4, MSR_VEC@h
143 beq dont_backup_vec
144
145 SAVE_32VRS_TRANSACT(0, r6, r3) /* r6 scratch, r3 thread */
146 mfvscr vr0
147 li r6, THREAD_TRANSACT_VSCR
148 stvx vr0, r3, r6
149 mfspr r0, SPRN_VRSAVE
150 std r0, THREAD_TRANSACT_VRSAVE(r3)
151
152dont_backup_vec:
153 andi. r0, r4, MSR_FP
154 beq dont_backup_fp
155
156 SAVE_32FPRS_VSRS_TRANSACT(0, R6, R3) /* r6 scratch, r3 thread */
157
158 mffs fr0
159 stfd fr0,THREAD_TRANSACT_FPSCR(r3)
160
161dont_backup_fp:
162 /* The moment we treclaim, ALL of our GPRs will switch
163 * to user register state. (FPRs, CCR etc. also!)
164 * Use an sprg and a tm_scratch in the PACA to shuffle.
165 */
166 TRECLAIM(R5) /* Cause in r5 */
167
168 /* ******************** GPRs ******************** */
169 /* Stash the checkpointed r13 away in the scratch SPR and get the real
170 * paca
171 */
172 SET_SCRATCH0(r13)
173 GET_PACA(r13)
174
175 /* Stash the checkpointed r1 away in paca tm_scratch and get the real
176 * stack pointer back
177 */
178 std r1, PACATMSCRATCH(r13)
179 ld r1, PACAR1(r13)
180
181 /* Now get some more GPRS free */
182 std r7, GPR7(r1) /* Temporary stash */
183 std r12, GPR12(r1) /* '' '' '' */
184 ld r12, STACK_PARAM(0)(r1) /* Param 0, thread_struct * */
185
186 addi r7, r12, PT_CKPT_REGS /* Thread's ckpt_regs */
187
188 /* Make r7 look like an exception frame so that we
189 * can use the neat GPRx(n) macros. r7 is NOT a pt_regs ptr!
190 */
191 subi r7, r7, STACK_FRAME_OVERHEAD
192
193 /* Sync the userland GPRs 2-12, 14-31 to thread->regs: */
194 SAVE_GPR(0, r7) /* user r0 */
195 SAVE_GPR(2, r7) /* user r2 */
196 SAVE_4GPRS(3, r7) /* user r3-r6 */
197 SAVE_4GPRS(8, r7) /* user r8-r11 */
198 ld r3, PACATMSCRATCH(r13) /* user r1 */
199 ld r4, GPR7(r1) /* user r7 */
200 ld r5, GPR12(r1) /* user r12 */
201 GET_SCRATCH0(6) /* user r13 */
202 std r3, GPR1(r7)
203 std r4, GPR7(r7)
204 std r5, GPR12(r7)
205 std r6, GPR13(r7)
206
207 SAVE_NVGPRS(r7) /* user r14-r31 */
208
209 /* ******************** NIP ******************** */
210 mfspr r3, SPRN_TFHAR
211 std r3, _NIP(r7) /* Returns to failhandler */
212 /* The checkpointed NIP is ignored when rescheduling/rechkpting,
213 * but is used in signal return to 'wind back' to the abort handler.
214 */
215
216 /* ******************** CR,LR,CCR,MSR ********** */
217 mfctr r3
218 mflr r4
219 mfcr r5
220 mfxer r6
221
222 std r3, _CTR(r7)
223 std r4, _LINK(r7)
224 std r5, _CCR(r7)
225 std r6, _XER(r7)
226
227 /* MSR and flags: We don't change CRs, and we don't need to alter
228 * MSR.
229 */
230
231 /* TM regs, incl TEXASR -- these live in thread_struct. Note they've
232 * been updated by the treclaim, to explain to userland the failure
233 * cause (aborted).
234 */
235 mfspr r0, SPRN_TEXASR
236 mfspr r3, SPRN_TFHAR
237 mfspr r4, SPRN_TFIAR
238 std r0, THREAD_TM_TEXASR(r12)
239 std r3, THREAD_TM_TFHAR(r12)
240 std r4, THREAD_TM_TFIAR(r12)
241
242 /* AMR and PPR are checkpointed too, but are unsupported by Linux. */
243
244 /* Restore original MSR/IRQ state & clear TM mode */
245 ld r14, TM_FRAME_L0(r1) /* Orig MSR */
246 li r15, 0
247 rldimi r14, r15, MSR_TS_LG, (63-MSR_TS_LG)-1
248 mtmsrd r14
249
250 REST_NVGPRS(r1)
251
252 addi r1, r1, TM_FRAME_SIZE
253 ld r4, 8(r1)
254 ld r0, 16(r1)
255 mtcr r4
256 mtlr r0
257 ld r2, 40(r1)
258 blr
259
260
261 /* void tm_recheckpoint(struct thread_struct *thread,
262 * unsigned long orig_msr)
263 * - Restore the checkpointed register state saved by tm_reclaim
264 * when we switch_to a process.
265 *
266 * Call with IRQs off, stacks get all out of sync for
267 * some periods in here!
268 */
269_GLOBAL(tm_recheckpoint)
270 mfcr r5
271 mflr r0
272 std r5, 8(r1)
273 std r0, 16(r1)
274 std r2, 40(r1)
275 stdu r1, -TM_FRAME_SIZE(r1)
276
277 /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD].
278 * This is used for backing up the NVGPRs:
279 */
280 SAVE_NVGPRS(r1)
281
282 std r1, PACAR1(r13)
283
284 /* Load complete register state from ts_ckpt* registers */
285
286 addi r7, r3, PT_CKPT_REGS /* Thread's ckpt_regs */
287
288 /* Make r7 look like an exception frame so that we
289 * can use the neat GPRx(n) macros. r7 is now NOT a pt_regs ptr!
290 */
291 subi r7, r7, STACK_FRAME_OVERHEAD
292
293 SET_SCRATCH0(r1)
294
295 mfmsr r6
296 /* R4 = original MSR to indicate whether thread used FP/Vector etc. */
297
298 /* Enable FP/vec in MSR if necessary! */
299 lis r5, MSR_VEC@h
300 ori r5, r5, MSR_FP
301 and. r5, r4, r5
302 beq restore_gprs /* if neither, skip both */
303
304#ifdef CONFIG_VSX
305 BEGIN_FTR_SECTION
306 oris r5, r5, MSR_VSX@h
307 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
308#endif
309 or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */
310 mtmsr r5
311
312 /* FP and VEC registers: These are recheckpointed from thread.fpr[]
313 * and thread.vr[] respectively. The thread.transact_fpr[] version
314 * is more modern, and will be loaded subsequently by any FPUnavailable
315 * trap.
316 */
317 andis. r0, r4, MSR_VEC@h
318 beq dont_restore_vec
319
320 li r5, THREAD_VSCR
321 lvx vr0, r3, r5
322 mtvscr vr0
323 REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */
324 ld r5, THREAD_VRSAVE(r3)
325 mtspr SPRN_VRSAVE, r5
326
327dont_restore_vec:
328 andi. r0, r4, MSR_FP
329 beq dont_restore_fp
330
331 lfd fr0, THREAD_FPSCR(r3)
332 MTFSF_L(fr0)
333 REST_32FPRS_VSRS(0, R4, R3)
334
335dont_restore_fp:
336 mtmsr r6 /* FP/Vec off again! */
337
338restore_gprs:
339 /* ******************** CR,LR,CCR,MSR ********** */
340 ld r3, _CTR(r7)
341 ld r4, _LINK(r7)
342 ld r5, _CCR(r7)
343 ld r6, _XER(r7)
344
345 mtctr r3
346 mtlr r4
347 mtcr r5
348 mtxer r6
349
350 /* MSR and flags: We don't change CRs, and we don't need to alter
351 * MSR.
352 */
353
354 REST_4GPRS(0, r7) /* GPR0-3 */
355 REST_GPR(4, r7) /* GPR4-6 */
356 REST_GPR(5, r7)
357 REST_GPR(6, r7)
358 REST_4GPRS(8, r7) /* GPR8-11 */
359 REST_2GPRS(12, r7) /* GPR12-13 */
360
361 REST_NVGPRS(r7) /* GPR14-31 */
362
363 ld r7, GPR7(r7) /* GPR7 */
364
365 /* Commit register state as checkpointed state: */
366 TRECHKPT
367
368 /* Our transactional state has now changed.
369 *
370 * Now just get out of here. Transactional (current) state will be
371 * updated once restore is called on the return path in the _switch-ed
372 * -to process.
373 */
374
375 GET_PACA(r13)
376 GET_SCRATCH0(r1)
377
378 REST_NVGPRS(r1)
379
380 addi r1, r1, TM_FRAME_SIZE
381 ld r4, 8(r1)
382 ld r0, 16(r1)
383 mtcr r4
384 mtlr r0
385 ld r2, 40(r1)
386 blr
387
388 /* ****************************************************************** */
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 32518401af68..f9b751b29558 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -58,6 +58,7 @@
58#include <asm/rio.h> 58#include <asm/rio.h>
59#include <asm/fadump.h> 59#include <asm/fadump.h>
60#include <asm/switch_to.h> 60#include <asm/switch_to.h>
61#include <asm/tm.h>
61#include <asm/debug.h> 62#include <asm/debug.h>
62 63
63#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 64#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
@@ -66,7 +67,7 @@ int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
66int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly; 67int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
67int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly; 68int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
68int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly; 69int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
69int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly; 70int (*__debugger_break_match)(struct pt_regs *regs) __read_mostly;
70int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly; 71int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
71 72
72EXPORT_SYMBOL(__debugger); 73EXPORT_SYMBOL(__debugger);
@@ -74,10 +75,17 @@ EXPORT_SYMBOL(__debugger_ipi);
74EXPORT_SYMBOL(__debugger_bpt); 75EXPORT_SYMBOL(__debugger_bpt);
75EXPORT_SYMBOL(__debugger_sstep); 76EXPORT_SYMBOL(__debugger_sstep);
76EXPORT_SYMBOL(__debugger_iabr_match); 77EXPORT_SYMBOL(__debugger_iabr_match);
77EXPORT_SYMBOL(__debugger_dabr_match); 78EXPORT_SYMBOL(__debugger_break_match);
78EXPORT_SYMBOL(__debugger_fault_handler); 79EXPORT_SYMBOL(__debugger_fault_handler);
79#endif 80#endif
80 81
82/* Transactional Memory trap debug */
83#ifdef TM_DEBUG_SW
84#define TM_DEBUG(x...) printk(KERN_INFO x)
85#else
86#define TM_DEBUG(x...) do { } while(0)
87#endif
88
81/* 89/*
82 * Trap & Exception support 90 * Trap & Exception support
83 */ 91 */
@@ -350,6 +358,7 @@ static inline int check_io_access(struct pt_regs *regs)
350 exception is in the MSR. */ 358 exception is in the MSR. */
351#define get_reason(regs) ((regs)->msr) 359#define get_reason(regs) ((regs)->msr)
352#define get_mc_reason(regs) ((regs)->msr) 360#define get_mc_reason(regs) ((regs)->msr)
361#define REASON_TM 0x200000
353#define REASON_FP 0x100000 362#define REASON_FP 0x100000
354#define REASON_ILLEGAL 0x80000 363#define REASON_ILLEGAL 0x80000
355#define REASON_PRIVILEGED 0x40000 364#define REASON_PRIVILEGED 0x40000
@@ -1020,6 +1029,38 @@ void __kprobes program_check_exception(struct pt_regs *regs)
1020 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 1029 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
1021 return; 1030 return;
1022 } 1031 }
1032#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1033 if (reason & REASON_TM) {
1034 /* This is a TM "Bad Thing Exception" program check.
1035 * This occurs when:
1036 * - An rfid/hrfid/mtmsrd attempts to cause an illegal
1037 * transition in TM states.
1038 * - A trechkpt is attempted when transactional.
1039 * - A treclaim is attempted when non transactional.
1040 * - A tend is illegally attempted.
1041 * - writing a TM SPR when transactional.
1042 */
1043 if (!user_mode(regs) &&
1044 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
1045 regs->nip += 4;
1046 return;
1047 }
1048 /* If usermode caused this, it's done something illegal and
1049 * gets a SIGILL slap on the wrist. We call it an illegal
1050 * operand to distinguish from the instruction just being bad
1051 * (e.g. executing a 'tend' on a CPU without TM!); it's an
1052 * illegal /placement/ of a valid instruction.
1053 */
1054 if (user_mode(regs)) {
1055 _exception(SIGILL, regs, ILL_ILLOPN, regs->nip);
1056 return;
1057 } else {
1058 printk(KERN_EMERG "Unexpected TM Bad Thing exception "
1059 "at %lx (msr 0x%x)\n", regs->nip, reason);
1060 die("Unrecoverable exception", regs, SIGABRT);
1061 }
1062 }
1063#endif
1023 1064
1024 /* We restore the interrupt state now */ 1065 /* We restore the interrupt state now */
1025 if (!arch_irq_disabled_regs(regs)) 1066 if (!arch_irq_disabled_regs(regs))
@@ -1160,6 +1201,109 @@ void vsx_unavailable_exception(struct pt_regs *regs)
1160 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT); 1201 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
1161} 1202}
1162 1203
1204void tm_unavailable_exception(struct pt_regs *regs)
1205{
1206 /* We restore the interrupt state now */
1207 if (!arch_irq_disabled_regs(regs))
1208 local_irq_enable();
1209
1210 /* Currently we never expect a TMU exception. Catch
1211 * this and kill the process!
1212 */
1213 printk(KERN_EMERG "Unexpected TM unavailable exception at %lx "
1214 "(msr %lx)\n",
1215 regs->nip, regs->msr);
1216
1217 if (user_mode(regs)) {
1218 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1219 return;
1220 }
1221
1222 die("Unexpected TM unavailable exception", regs, SIGABRT);
1223}
1224
1225#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1226
1227extern void do_load_up_fpu(struct pt_regs *regs);
1228
1229void fp_unavailable_tm(struct pt_regs *regs)
1230{
1231 /* Note: This does not handle any kind of FP laziness. */
1232
1233 TM_DEBUG("FP Unavailable trap whilst transactional at 0x%lx, MSR=%lx\n",
1234 regs->nip, regs->msr);
1235 tm_enable();
1236
1237 /* We can only have got here if the task started using FP after
1238 * beginning the transaction. So, the transactional regs are just a
1239 * copy of the checkpointed ones. But, we still need to recheckpoint
1240 * as we're enabling FP for the process; it will return, abort the
1241 * transaction, and probably retry but now with FP enabled. So the
1242 * checkpointed FP registers need to be loaded.
1243 */
1244 tm_reclaim(&current->thread, current->thread.regs->msr,
1245 TM_CAUSE_FAC_UNAV);
1246 /* Reclaim didn't save out any FPRs to transact_fprs. */
1247
1248 /* Enable FP for the task: */
1249 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
1250
1251 /* This loads and recheckpoints the FP registers from
1252 * thread.fpr[]. They will remain in registers after the
1253 * checkpoint so we don't need to reload them after.
1254 */
1255 tm_recheckpoint(&current->thread, regs->msr);
1256}
1257
1258#ifdef CONFIG_ALTIVEC
1259extern void do_load_up_altivec(struct pt_regs *regs);
1260
1261void altivec_unavailable_tm(struct pt_regs *regs)
1262{
1263 /* See the comments in fp_unavailable_tm(). This function operates
1264 * the same way.
1265 */
1266
1267 TM_DEBUG("Vector Unavailable trap whilst transactional at 0x%lx,"
1268 "MSR=%lx\n",
1269 regs->nip, regs->msr);
1270 tm_enable();
1271 tm_reclaim(&current->thread, current->thread.regs->msr,
1272 TM_CAUSE_FAC_UNAV);
1273 regs->msr |= MSR_VEC;
1274 tm_recheckpoint(&current->thread, regs->msr);
1275 current->thread.used_vr = 1;
1276}
1277#endif
1278
1279#ifdef CONFIG_VSX
1280void vsx_unavailable_tm(struct pt_regs *regs)
1281{
1282 /* See the comments in fp_unavailable_tm(). This works similarly,
1283 * though we're loading both FP and VEC registers in here.
1284 *
1285 * If FP isn't in use, load FP regs. If VEC isn't in use, load VEC
1286 * regs. Either way, set MSR_VSX.
1287 */
1288
1289 TM_DEBUG("VSX Unavailable trap whilst transactional at 0x%lx,"
1290 "MSR=%lx\n",
1291 regs->nip, regs->msr);
1292
1293 tm_enable();
1294 /* This reclaims FP and/or VR regs if they're already enabled */
1295 tm_reclaim(&current->thread, current->thread.regs->msr,
1296 TM_CAUSE_FAC_UNAV);
1297
1298 regs->msr |= MSR_VEC | MSR_FP | current->thread.fpexc_mode |
1299 MSR_VSX;
1300 /* This loads & recheckpoints FP and VRs. */
1301 tm_recheckpoint(&current->thread, regs->msr);
1302 current->thread.used_vsr = 1;
1303}
1304#endif
1305#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
1306
1163void performance_monitor_exception(struct pt_regs *regs) 1307void performance_monitor_exception(struct pt_regs *regs)
1164{ 1308{
1165 __get_cpu_var(irq_stat).pmu_irqs++; 1309 __get_cpu_var(irq_stat).pmu_irqs++;
@@ -1515,7 +1659,7 @@ void unrecoverable_exception(struct pt_regs *regs)
1515 die("Unrecoverable exception", regs, SIGABRT); 1659 die("Unrecoverable exception", regs, SIGABRT);
1516} 1660}
1517 1661
1518#ifdef CONFIG_BOOKE_WDT 1662#if defined(CONFIG_BOOKE_WDT) || defined(CONFIG_40x)
1519/* 1663/*
1520 * Default handler for a Watchdog exception, 1664 * Default handler for a Watchdog exception,
1521 * spins until a reboot occurs 1665 * spins until a reboot occurs
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index e830289d2e48..9e20999aaef2 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -7,6 +7,57 @@
7#include <asm/page.h> 7#include <asm/page.h>
8#include <asm/ptrace.h> 8#include <asm/ptrace.h>
9 9
10#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
11/*
12 * Wrapper to call load_up_altivec from C.
13 * void do_load_up_altivec(struct pt_regs *regs);
14 */
15_GLOBAL(do_load_up_altivec)
16 mflr r0
17 std r0, 16(r1)
18 stdu r1, -112(r1)
19
20 subi r6, r3, STACK_FRAME_OVERHEAD
21 /* load_up_altivec expects r12=MSR, r13=PACA, and returns
22 * with r12 = new MSR.
23 */
24 ld r12,_MSR(r6)
25 GET_PACA(r13)
26 bl load_up_altivec
27 std r12,_MSR(r6)
28
29 ld r0, 112+16(r1)
30 addi r1, r1, 112
31 mtlr r0
32 blr
33
34/* void do_load_up_transact_altivec(struct thread_struct *thread)
35 *
36 * This is similar to load_up_altivec but for the transactional version of the
37 * vector regs. It doesn't mess with the task MSR or valid flags.
38 * Furthermore, VEC laziness is not supported with TM currently.
39 */
40_GLOBAL(do_load_up_transact_altivec)
41 mfmsr r6
42 oris r5,r6,MSR_VEC@h
43 MTMSRD(r5)
44 isync
45
46 li r4,1
47 stw r4,THREAD_USED_VR(r3)
48
49 li r10,THREAD_TRANSACT_VSCR
50 lvx vr0,r10,r3
51 mtvscr vr0
52 REST_32VRS_TRANSACT(0,r4,r3)
53
54 /* Disable VEC again. */
55 MTMSRD(r6)
56 isync
57
58 blr
59#endif
60
10/* 61/*
11 * load_up_altivec(unused, unused, tsk) 62 * load_up_altivec(unused, unused, tsk)
12 * Disable VMX for the task which had it previously, 63 * Disable VMX for the task which had it previously,
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 65d1c08cf09e..654e479802f2 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -218,6 +218,11 @@ SECTIONS
218 218
219 .got : AT(ADDR(.got) - LOAD_OFFSET) { 219 .got : AT(ADDR(.got) - LOAD_OFFSET) {
220 __toc_start = .; 220 __toc_start = .;
221#ifndef CONFIG_RELOCATABLE
222 __prom_init_toc_start = .;
223 arch/powerpc/kernel/prom_init.o*(.toc .got)
224 __prom_init_toc_end = .;
225#endif
221 *(.got) 226 *(.got)
222 *(.toc) 227 *(.toc)
223 } 228 }
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 10b6c358dd77..e33d11f1b977 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -539,6 +539,11 @@ fast_guest_return:
539 539
540 /* Enter guest */ 540 /* Enter guest */
541 541
542BEGIN_FTR_SECTION
543 ld r5, VCPU_CFAR(r4)
544 mtspr SPRN_CFAR, r5
545END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
546
542 ld r5, VCPU_LR(r4) 547 ld r5, VCPU_LR(r4)
543 lwz r6, VCPU_CR(r4) 548 lwz r6, VCPU_CR(r4)
544 mtlr r5 549 mtlr r5
@@ -604,6 +609,10 @@ kvmppc_interrupt:
604 lwz r4, HSTATE_SCRATCH1(r13) 609 lwz r4, HSTATE_SCRATCH1(r13)
605 std r3, VCPU_GPR(R12)(r9) 610 std r3, VCPU_GPR(R12)(r9)
606 stw r4, VCPU_CR(r9) 611 stw r4, VCPU_CR(r9)
612BEGIN_FTR_SECTION
613 ld r3, HSTATE_CFAR(r13)
614 std r3, VCPU_CFAR(r9)
615END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
607 616
608 /* Restore R1/R2 so we can handle faults */ 617 /* Restore R1/R2 so we can handle faults */
609 ld r1, HSTATE_HOST_R1(r13) 618 ld r1, HSTATE_HOST_R1(r13)
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 28d38adeca73..6702442ca818 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -34,6 +34,8 @@
34#include <asm/kvm_book3s.h> 34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h> 35#include <asm/mmu_context.h>
36#include <asm/switch_to.h> 36#include <asm/switch_to.h>
37#include <asm/firmware.h>
38#include <asm/hvcall.h>
37#include <linux/gfp.h> 39#include <linux/gfp.h>
38#include <linux/sched.h> 40#include <linux/sched.h>
39#include <linux/vmalloc.h> 41#include <linux/vmalloc.h>
@@ -1284,12 +1286,21 @@ void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1284{ 1286{
1285} 1287}
1286 1288
1289static unsigned int kvm_global_user_count = 0;
1290static DEFINE_SPINLOCK(kvm_global_user_count_lock);
1291
1287int kvmppc_core_init_vm(struct kvm *kvm) 1292int kvmppc_core_init_vm(struct kvm *kvm)
1288{ 1293{
1289#ifdef CONFIG_PPC64 1294#ifdef CONFIG_PPC64
1290 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables); 1295 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
1291#endif 1296#endif
1292 1297
1298 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1299 spin_lock(&kvm_global_user_count_lock);
1300 if (++kvm_global_user_count == 1)
1301 pSeries_disable_reloc_on_exc();
1302 spin_unlock(&kvm_global_user_count_lock);
1303 }
1293 return 0; 1304 return 0;
1294} 1305}
1295 1306
@@ -1298,6 +1309,14 @@ void kvmppc_core_destroy_vm(struct kvm *kvm)
1298#ifdef CONFIG_PPC64 1309#ifdef CONFIG_PPC64
1299 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 1310 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1300#endif 1311#endif
1312
1313 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1314 spin_lock(&kvm_global_user_count_lock);
1315 BUG_ON(kvm_global_user_count == 0);
1316 if (--kvm_global_user_count == 0)
1317 pSeries_enable_reloc_on_exc();
1318 spin_unlock(&kvm_global_user_count_lock);
1319 }
1301} 1320}
1302 1321
1303static int kvmppc_book3s_init(void) 1322static int kvmppc_book3s_init(void)
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 746e0c895cd7..450433276699 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -4,7 +4,7 @@
4 4
5subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror 5subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
6 6
7ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 7ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
8 8
9CFLAGS_REMOVE_code-patching.o = -pg 9CFLAGS_REMOVE_code-patching.o = -pg
10CFLAGS_REMOVE_feature-fixups.o = -pg 10CFLAGS_REMOVE_feature-fixups.o = -pg
@@ -19,9 +19,7 @@ obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
19 checksum_wrappers_64.o hweight_64.o \ 19 checksum_wrappers_64.o hweight_64.o \
20 copyuser_power7.o string_64.o copypage_power7.o \ 20 copyuser_power7.o string_64.o copypage_power7.o \
21 memcpy_power7.o 21 memcpy_power7.o
22obj-$(CONFIG_XMON) += sstep.o ldstfp.o 22obj-$(CONFIG_PPC_EMULATE_SSTEP) += sstep.o ldstfp.o
23obj-$(CONFIG_KPROBES) += sstep.o ldstfp.o
24obj-$(CONFIG_HAVE_HW_BREAKPOINT) += sstep.o ldstfp.o
25 23
26ifeq ($(CONFIG_PPC64),y) 24ifeq ($(CONFIG_PPC64),y)
27obj-$(CONFIG_SMP) += locks.o 25obj-$(CONFIG_SMP) += locks.o
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 3787b61f7d20..cf16b5733eaa 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -4,7 +4,7 @@
4 4
5subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror 5subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
6 6
7ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 7ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
8 8
9obj-y := fault.o mem.o pgtable.o gup.o \ 9obj-y := fault.o mem.o pgtable.o gup.o \
10 init_$(CONFIG_WORD_SIZE).o \ 10 init_$(CONFIG_WORD_SIZE).o \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 3a8489a354e9..229951ffc351 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -249,8 +249,8 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
249#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \ 249#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
250 defined(CONFIG_PPC_BOOK3S_64)) 250 defined(CONFIG_PPC_BOOK3S_64))
251 if (error_code & DSISR_DABRMATCH) { 251 if (error_code & DSISR_DABRMATCH) {
252 /* DABR match */ 252 /* breakpoint match */
253 do_dabr(regs, address, error_code); 253 do_break(regs, address, error_code);
254 return 0; 254 return 0;
255 } 255 }
256#endif 256#endif
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 3a292be2e079..1b6e1271719f 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -55,6 +55,7 @@
55#include <asm/code-patching.h> 55#include <asm/code-patching.h>
56#include <asm/fadump.h> 56#include <asm/fadump.h>
57#include <asm/firmware.h> 57#include <asm/firmware.h>
58#include <asm/tm.h>
58 59
59#ifdef DEBUG 60#ifdef DEBUG
60#define DBG(fmt...) udbg_printf(fmt) 61#define DBG(fmt...) udbg_printf(fmt)
@@ -1171,6 +1172,21 @@ void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize,
1171 DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx); 1172 DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx);
1172 ppc_md.hpte_invalidate(slot, vpn, psize, ssize, local); 1173 ppc_md.hpte_invalidate(slot, vpn, psize, ssize, local);
1173 } pte_iterate_hashed_end(); 1174 } pte_iterate_hashed_end();
1175
1176#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1177 /* Transactions are not aborted by tlbiel, only tlbie.
1178 * Without, syncing a page back to a block device w/ PIO could pick up
1179 * transactional data (bad!) so we force an abort here. Before the
1180 * sync the page will be made read-only, which will flush_hash_page.
1181 * BIG ISSUE here: if the kernel uses a page from userspace without
1182 * unmapping it first, it may see the speculated version.
1183 */
1184 if (local && cpu_has_feature(CPU_FTR_TM) &&
1185 MSR_TM_ACTIVE(current->thread.regs->msr)) {
1186 tm_enable();
1187 tm_abort(TM_CAUSE_TLBI);
1188 }
1189#endif
1174} 1190}
1175 1191
1176void flush_hash_range(unsigned long number, int local) 1192void flush_hash_range(unsigned long number, int local)
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 09c64518b4d0..f1f7409a4183 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -207,13 +207,10 @@ void __init do_init_bootmem(void)
207 min_low_pfn = MEMORY_START >> PAGE_SHIFT; 207 min_low_pfn = MEMORY_START >> PAGE_SHIFT;
208 boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn); 208 boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
209 209
210 /* Add active regions with valid PFNs */ 210 /* Place all memblock_regions in the same node and merge contiguous
211 for_each_memblock(memory, reg) { 211 * memblock_regions
212 unsigned long start_pfn, end_pfn; 212 */
213 start_pfn = memblock_region_memory_base_pfn(reg); 213 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
214 end_pfn = memblock_region_memory_end_pfn(reg);
215 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
216 }
217 214
218 /* Add all physical memory to the bootmem map, mark each area 215 /* Add all physical memory to the bootmem map, mark each area
219 * present. 216 * present.
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index 73456c4cec28..751ec7bd5018 100644
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -1,6 +1,6 @@
1subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror 1subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
2 2
3ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 3ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
4 4
5obj-$(CONFIG_OPROFILE) += oprofile.o 5obj-$(CONFIG_OPROFILE) += oprofile.o
6 6
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index fa476d50791f..65362e98eb26 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -880,8 +880,16 @@ static int power_pmu_add(struct perf_event *event, int ef_flags)
880 cpuhw->events[n0] = event->hw.config; 880 cpuhw->events[n0] = event->hw.config;
881 cpuhw->flags[n0] = event->hw.event_base; 881 cpuhw->flags[n0] = event->hw.event_base;
882 882
883 /*
884 * This event may have been disabled/stopped in record_and_restart()
885 * because we exceeded the ->event_limit. If re-starting the event,
886 * clear the ->hw.state (STOPPED and UPTODATE flags), so the user
887 * notification is re-enabled.
888 */
883 if (!(ef_flags & PERF_EF_START)) 889 if (!(ef_flags & PERF_EF_START))
884 event->hw.state = PERF_HES_STOPPED | PERF_HES_UPTODATE; 890 event->hw.state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
891 else
892 event->hw.state = 0;
885 893
886 /* 894 /*
887 * If group events scheduling transaction was started, 895 * If group events scheduling transaction was started,
@@ -1359,6 +1367,8 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
1359 */ 1367 */
1360 val = 0; 1368 val = 0;
1361 left = local64_read(&event->hw.period_left) - delta; 1369 left = local64_read(&event->hw.period_left) - delta;
1370 if (delta == 0)
1371 left++;
1362 if (period) { 1372 if (period) {
1363 if (left <= 0) { 1373 if (left <= 0) {
1364 left += period; 1374 left += period;
@@ -1422,11 +1432,8 @@ unsigned long perf_instruction_pointer(struct pt_regs *regs)
1422 return regs->nip; 1432 return regs->nip;
1423} 1433}
1424 1434
1425static bool pmc_overflow(unsigned long val) 1435static bool pmc_overflow_power7(unsigned long val)
1426{ 1436{
1427 if ((int)val < 0)
1428 return true;
1429
1430 /* 1437 /*
1431 * Events on POWER7 can roll back if a speculative event doesn't 1438 * Events on POWER7 can roll back if a speculative event doesn't
1432 * eventually complete. Unfortunately in some rare cases they will 1439 * eventually complete. Unfortunately in some rare cases they will
@@ -1438,7 +1445,15 @@ static bool pmc_overflow(unsigned long val)
1438 * PMCs because a user might set a period of less than 256 and we 1445 * PMCs because a user might set a period of less than 256 and we
1439 * don't want to mistakenly reset them. 1446 * don't want to mistakenly reset them.
1440 */ 1447 */
1441 if (pvr_version_is(PVR_POWER7) && ((0x80000000 - val) <= 256)) 1448 if ((0x80000000 - val) <= 256)
1449 return true;
1450
1451 return false;
1452}
1453
1454static bool pmc_overflow(unsigned long val)
1455{
1456 if ((int)val < 0)
1442 return true; 1457 return true;
1443 1458
1444 return false; 1459 return false;
@@ -1449,11 +1464,11 @@ static bool pmc_overflow(unsigned long val)
1449 */ 1464 */
1450static void perf_event_interrupt(struct pt_regs *regs) 1465static void perf_event_interrupt(struct pt_regs *regs)
1451{ 1466{
1452 int i; 1467 int i, j;
1453 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 1468 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
1454 struct perf_event *event; 1469 struct perf_event *event;
1455 unsigned long val; 1470 unsigned long val[8];
1456 int found = 0; 1471 int found, active;
1457 int nmi; 1472 int nmi;
1458 1473
1459 if (cpuhw->n_limited) 1474 if (cpuhw->n_limited)
@@ -1468,33 +1483,53 @@ static void perf_event_interrupt(struct pt_regs *regs)
1468 else 1483 else
1469 irq_enter(); 1484 irq_enter();
1470 1485
1471 for (i = 0; i < cpuhw->n_events; ++i) { 1486 /* Read all the PMCs since we'll need them a bunch of times */
1472 event = cpuhw->event[i]; 1487 for (i = 0; i < ppmu->n_counter; ++i)
1473 if (!event->hw.idx || is_limited_pmc(event->hw.idx)) 1488 val[i] = read_pmc(i + 1);
1489
1490 /* Try to find what caused the IRQ */
1491 found = 0;
1492 for (i = 0; i < ppmu->n_counter; ++i) {
1493 if (!pmc_overflow(val[i]))
1474 continue; 1494 continue;
1475 val = read_pmc(event->hw.idx); 1495 if (is_limited_pmc(i + 1))
1476 if ((int)val < 0) { 1496 continue; /* these won't generate IRQs */
1477 /* event has overflowed */ 1497 /*
1478 found = 1; 1498 * We've found one that's overflowed. For active
1479 record_and_restart(event, val, regs); 1499 * counters we need to log this. For inactive
1500 * counters, we need to reset it anyway
1501 */
1502 found = 1;
1503 active = 0;
1504 for (j = 0; j < cpuhw->n_events; ++j) {
1505 event = cpuhw->event[j];
1506 if (event->hw.idx == (i + 1)) {
1507 active = 1;
1508 record_and_restart(event, val[i], regs);
1509 break;
1510 }
1480 } 1511 }
1512 if (!active)
1513 /* reset non active counters that have overflowed */
1514 write_pmc(i + 1, 0);
1481 } 1515 }
1482 1516 if (!found && pvr_version_is(PVR_POWER7)) {
1483 /* 1517 /* check active counters for special buggy p7 overflow */
1484 * In case we didn't find and reset the event that caused 1518 for (i = 0; i < cpuhw->n_events; ++i) {
1485 * the interrupt, scan all events and reset any that are 1519 event = cpuhw->event[i];
1486 * negative, to avoid getting continual interrupts. 1520 if (!event->hw.idx || is_limited_pmc(event->hw.idx))
1487 * Any that we processed in the previous loop will not be negative.
1488 */
1489 if (!found) {
1490 for (i = 0; i < ppmu->n_counter; ++i) {
1491 if (is_limited_pmc(i + 1))
1492 continue; 1521 continue;
1493 val = read_pmc(i + 1); 1522 if (pmc_overflow_power7(val[event->hw.idx - 1])) {
1494 if (pmc_overflow(val)) 1523 /* event has overflowed in a buggy way*/
1495 write_pmc(i + 1, 0); 1524 found = 1;
1525 record_and_restart(event,
1526 val[event->hw.idx - 1],
1527 regs);
1528 }
1496 } 1529 }
1497 } 1530 }
1531 if ((!found) && printk_ratelimit())
1532 printk(KERN_WARNING "Can't find PMC that caused IRQ\n");
1498 1533
1499 /* 1534 /*
1500 * Reset MMCR0 to its normal value. This will set PMXE and 1535 * Reset MMCR0 to its normal value. This will set PMXE and
diff --git a/arch/powerpc/perf/e500-pmu.c b/arch/powerpc/perf/e500-pmu.c
index cb2e2949c8d1..fb664929f5da 100644
--- a/arch/powerpc/perf/e500-pmu.c
+++ b/arch/powerpc/perf/e500-pmu.c
@@ -24,6 +24,8 @@ static int e500_generic_events[] = {
24 [PERF_COUNT_HW_CACHE_MISSES] = 41, /* Data L1 cache reloads */ 24 [PERF_COUNT_HW_CACHE_MISSES] = 41, /* Data L1 cache reloads */
25 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12, 25 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 12,
26 [PERF_COUNT_HW_BRANCH_MISSES] = 15, 26 [PERF_COUNT_HW_BRANCH_MISSES] = 15,
27 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 18,
28 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 19,
27}; 29};
28 30
29#define C(x) PERF_COUNT_HW_CACHE_##x 31#define C(x) PERF_COUNT_HW_CACHE_##x
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 8abf6fb8f410..0effe9f5a1ea 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -252,6 +252,14 @@ config PPC4xx_GPIO
252 help 252 help
253 Enable gpiolib support for ppc440 based boards 253 Enable gpiolib support for ppc440 based boards
254 254
255config PPC4xx_OCM
256 bool "PPC4xx On Chip Memory (OCM) support"
257 depends on 4xx
258 select PPC_LIB_RHEAP
259 help
260 Enable OCM support for PowerPC 4xx platforms with on chip memory,
261 OCM provides the fast place for memory access to improve performance.
262
255# 44x specific CPU modules, selected based on the board above. 263# 44x specific CPU modules, selected based on the board above.
256config 440EP 264config 440EP
257 bool 265 bool
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
index 9f771e05457c..52d57d281724 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -26,6 +26,7 @@
26 26
27#include <linux/of_platform.h> 27#include <linux/of_platform.h>
28#include <asm/mpc5xxx.h> 28#include <asm/mpc5xxx.h>
29#include <asm/mpc5121.h>
29#include <asm/clk_interface.h> 30#include <asm/clk_interface.h>
30 31
31#undef CLK_DEBUG 32#undef CLK_DEBUG
@@ -122,7 +123,7 @@ struct mpc512x_clockctl {
122 u32 dccr; /* DIU Clk Cnfg Reg */ 123 u32 dccr; /* DIU Clk Cnfg Reg */
123}; 124};
124 125
125struct mpc512x_clockctl __iomem *clockctl; 126static struct mpc512x_clockctl __iomem *clockctl;
126 127
127static int mpc5121_clk_enable(struct clk *clk) 128static int mpc5121_clk_enable(struct clk *clk)
128{ 129{
@@ -184,7 +185,7 @@ static unsigned long spmf_mult(void)
184 36, 40, 44, 48, 185 36, 40, 44, 48,
185 52, 56, 60, 64 186 52, 56, 60, 64
186 }; 187 };
187 int spmf = (clockctl->spmr >> 24) & 0xf; 188 int spmf = (in_be32(&clockctl->spmr) >> 24) & 0xf;
188 return spmf_to_mult[spmf]; 189 return spmf_to_mult[spmf];
189} 190}
190 191
@@ -206,7 +207,7 @@ static unsigned long sysdiv_div_x_2(void)
206 52, 56, 58, 62, 207 52, 56, 58, 62,
207 60, 64, 66, 208 60, 64, 66,
208 }; 209 };
209 int sysdiv = (clockctl->scfr2 >> 26) & 0x3f; 210 int sysdiv = (in_be32(&clockctl->scfr2) >> 26) & 0x3f;
210 return sysdiv_to_div_x_2[sysdiv]; 211 return sysdiv_to_div_x_2[sysdiv];
211} 212}
212 213
@@ -230,7 +231,7 @@ static unsigned long sys_to_ref(unsigned long rate)
230 231
231static long ips_to_ref(unsigned long rate) 232static long ips_to_ref(unsigned long rate)
232{ 233{
233 int ips_div = (clockctl->scfr1 >> 23) & 0x7; 234 int ips_div = (in_be32(&clockctl->scfr1) >> 23) & 0x7;
234 235
235 rate *= ips_div; /* csb_clk = ips_clk * ips_div */ 236 rate *= ips_div; /* csb_clk = ips_clk * ips_div */
236 rate *= 2; /* sys_clk = csb_clk * 2 */ 237 rate *= 2; /* sys_clk = csb_clk * 2 */
@@ -284,7 +285,7 @@ static struct clk sys_clk = {
284 285
285static void diu_clk_calc(struct clk *clk) 286static void diu_clk_calc(struct clk *clk)
286{ 287{
287 int diudiv_x_2 = clockctl->scfr1 & 0xff; 288 int diudiv_x_2 = in_be32(&clockctl->scfr1) & 0xff;
288 unsigned long rate; 289 unsigned long rate;
289 290
290 rate = sys_clk.rate; 291 rate = sys_clk.rate;
@@ -311,7 +312,7 @@ static void half_clk_calc(struct clk *clk)
311 312
312static void generic_div_clk_calc(struct clk *clk) 313static void generic_div_clk_calc(struct clk *clk)
313{ 314{
314 int div = (clockctl->scfr1 >> clk->div_shift) & 0x7; 315 int div = (in_be32(&clockctl->scfr1) >> clk->div_shift) & 0x7;
315 316
316 clk->rate = clk->parent->rate / div; 317 clk->rate = clk->parent->rate / div;
317} 318}
@@ -329,7 +330,7 @@ static struct clk csb_clk = {
329 330
330static void e300_clk_calc(struct clk *clk) 331static void e300_clk_calc(struct clk *clk)
331{ 332{
332 int spmf = (clockctl->spmr >> 16) & 0xf; 333 int spmf = (in_be32(&clockctl->spmr) >> 16) & 0xf;
333 int ratex2 = clk->parent->rate * spmf; 334 int ratex2 = clk->parent->rate * spmf;
334 335
335 clk->rate = ratex2 / 2; 336 clk->rate = ratex2 / 2;
@@ -551,7 +552,7 @@ static struct clk ac97_clk = {
551 .calc = ac97_clk_calc, 552 .calc = ac97_clk_calc,
552}; 553};
553 554
554struct clk *rate_clks[] = { 555static struct clk *rate_clks[] = {
555 &ref_clk, 556 &ref_clk,
556 &sys_clk, 557 &sys_clk,
557 &diu_clk, 558 &diu_clk,
@@ -607,7 +608,7 @@ static void rate_clks_init(void)
607 * There are two clk enable registers with 32 enable bits each 608 * There are two clk enable registers with 32 enable bits each
608 * psc clocks and device clocks are all stored in dev_clks 609 * psc clocks and device clocks are all stored in dev_clks
609 */ 610 */
610struct clk dev_clks[2][32]; 611static struct clk dev_clks[2][32];
611 612
612/* 613/*
613 * Given a psc number return the dev_clk 614 * Given a psc number return the dev_clk
@@ -648,12 +649,12 @@ static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
648 out_be32(&clockctl->pccr[pscnum], 0x00020000); 649 out_be32(&clockctl->pccr[pscnum], 0x00020000);
649 out_be32(&clockctl->pccr[pscnum], 0x00030000); 650 out_be32(&clockctl->pccr[pscnum], 0x00030000);
650 651
651 if (clockctl->pccr[pscnum] & 0x80) { 652 if (in_be32(&clockctl->pccr[pscnum]) & 0x80) {
652 clk->rate = spdif_rxclk.rate; 653 clk->rate = spdif_rxclk.rate;
653 return; 654 return;
654 } 655 }
655 656
656 switch ((clockctl->pccr[pscnum] >> 14) & 0x3) { 657 switch ((in_be32(&clockctl->pccr[pscnum]) >> 14) & 0x3) {
657 case 0: 658 case 0:
658 mclk_src = sys_clk.rate; 659 mclk_src = sys_clk.rate;
659 break; 660 break;
@@ -668,7 +669,7 @@ static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
668 break; 669 break;
669 } 670 }
670 671
671 mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1; 672 mclk_div = ((in_be32(&clockctl->pccr[pscnum]) >> 17) & 0x7fff) + 1;
672 clk->rate = mclk_src / mclk_div; 673 clk->rate = mclk_src / mclk_div;
673} 674}
674 675
@@ -680,13 +681,12 @@ static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
680static void psc_clks_init(void) 681static void psc_clks_init(void)
681{ 682{
682 struct device_node *np; 683 struct device_node *np;
683 const u32 *cell_index;
684 struct platform_device *ofdev; 684 struct platform_device *ofdev;
685 u32 reg;
685 686
686 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { 687 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
687 cell_index = of_get_property(np, "cell-index", NULL); 688 if (!of_property_read_u32(np, "reg", &reg)) {
688 if (cell_index) { 689 int pscnum = (reg & 0xf00) >> 8;
689 int pscnum = *cell_index;
690 struct clk *clk = psc_dev_clk(pscnum); 690 struct clk *clk = psc_dev_clk(pscnum);
691 691
692 clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL; 692 clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL;
@@ -696,7 +696,7 @@ static void psc_clks_init(void)
696 * AC97 is special rate clock does 696 * AC97 is special rate clock does
697 * not go through normal path 697 * not go through normal path
698 */ 698 */
699 if (strcmp("ac97", np->name) == 0) 699 if (of_device_is_compatible(np, "fsl,mpc5121-psc-ac97"))
700 clk->rate = ac97_clk.rate; 700 clk->rate = ac97_clk.rate;
701 else 701 else
702 psc_calc_rate(clk, pscnum, np); 702 psc_calc_rate(clk, pscnum, np);
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 35f14fda108a..d30235b7e3f7 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -68,10 +68,6 @@ struct fsl_diu_shared_fb {
68 bool in_use; 68 bool in_use;
69}; 69};
70 70
71void mpc512x_set_monitor_port(enum fsl_diu_monitor_port port)
72{
73}
74
75#define DIU_DIV_MASK 0x000000ff 71#define DIU_DIV_MASK 0x000000ff
76void mpc512x_set_pixel_clock(unsigned int pixclock) 72void mpc512x_set_pixel_clock(unsigned int pixclock)
77{ 73{
@@ -303,7 +299,6 @@ void __init mpc512x_setup_diu(void)
303 } 299 }
304 } 300 }
305 301
306 diu_ops.set_monitor_port = mpc512x_set_monitor_port;
307 diu_ops.set_pixel_clock = mpc512x_set_pixel_clock; 302 diu_ops.set_pixel_clock = mpc512x_set_pixel_clock;
308 diu_ops.valid_monitor_port = mpc512x_valid_monitor_port; 303 diu_ops.valid_monitor_port = mpc512x_valid_monitor_port;
309 diu_ops.release_bootmem = mpc512x_release_bootmem; 304 diu_ops.release_bootmem = mpc512x_release_bootmem;
@@ -431,8 +426,38 @@ void __init mpc512x_psc_fifo_init(void)
431 426
432void __init mpc512x_init(void) 427void __init mpc512x_init(void)
433{ 428{
434 mpc512x_declare_of_platform_devices();
435 mpc5121_clk_init(); 429 mpc5121_clk_init();
430 mpc512x_declare_of_platform_devices();
436 mpc512x_restart_init(); 431 mpc512x_restart_init();
437 mpc512x_psc_fifo_init(); 432 mpc512x_psc_fifo_init();
438} 433}
434
435/**
436 * mpc512x_cs_config - Setup chip select configuration
437 * @cs: chip select number
438 * @val: chip select configuration value
439 *
440 * Perform chip select configuration for devices on LocalPlus Bus.
441 * Intended to dynamically reconfigure the chip select parameters
442 * for configurable devices on the bus.
443 */
444int mpc512x_cs_config(unsigned int cs, u32 val)
445{
446 static struct mpc512x_lpc __iomem *lpc;
447 struct device_node *np;
448
449 if (cs > 7)
450 return -EINVAL;
451
452 if (!lpc) {
453 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-lpc");
454 lpc = of_iomap(np, 0);
455 of_node_put(np);
456 if (!lpc)
457 return -ENOMEM;
458 }
459
460 out_be32(&lpc->cs_cfg[cs], val);
461 return 0;
462}
463EXPORT_SYMBOL(mpc512x_cs_config);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index f9f4537f546d..be7b1aa4d54c 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -20,9 +20,9 @@
20#include <asm/mpc52xx.h> 20#include <asm/mpc52xx.h>
21#include <asm/time.h> 21#include <asm/time.h>
22 22
23#include <sysdev/bestcomm/bestcomm.h> 23#include <linux/fsl/bestcomm/bestcomm.h>
24#include <sysdev/bestcomm/bestcomm_priv.h> 24#include <linux/fsl/bestcomm/bestcomm_priv.h>
25#include <sysdev/bestcomm/gen_bd.h> 25#include <linux/fsl/bestcomm/gen_bd.h>
26 26
27MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); 27MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
28MODULE_DESCRIPTION("MPC5200 LocalPlus FIFO device driver"); 28MODULE_DESCRIPTION("MPC5200 LocalPlus FIFO device driver");
diff --git a/arch/powerpc/platforms/82xx/km82xx.c b/arch/powerpc/platforms/82xx/km82xx.c
index cf964e19573a..058cc1895c88 100644
--- a/arch/powerpc/platforms/82xx/km82xx.c
+++ b/arch/powerpc/platforms/82xx/km82xx.c
@@ -18,11 +18,11 @@
18#include <linux/fsl_devices.h> 18#include <linux/fsl_devices.h>
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20 20
21#include <asm/io.h> 21#include <linux/io.h>
22#include <asm/cpm2.h> 22#include <asm/cpm2.h>
23#include <asm/udbg.h> 23#include <asm/udbg.h>
24#include <asm/machdep.h> 24#include <asm/machdep.h>
25#include <asm/time.h> 25#include <linux/time.h>
26#include <asm/mpc8260.h> 26#include <asm/mpc8260.h>
27#include <asm/prom.h> 27#include <asm/prom.h>
28 28
@@ -36,7 +36,7 @@ static void __init km82xx_pic_init(void)
36 struct device_node *np = of_find_compatible_node(NULL, NULL, 36 struct device_node *np = of_find_compatible_node(NULL, NULL,
37 "fsl,pq2-pic"); 37 "fsl,pq2-pic");
38 if (!np) { 38 if (!np) {
39 printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); 39 pr_err("PIC init: can not find cpm-pic node\n");
40 return; 40 return;
41 } 41 }
42 42
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index fb94d10e5a4d..fc8b2d6a7d8d 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -71,11 +71,11 @@ err:
71 71
72void __init pq2_init_pci(void) 72void __init pq2_init_pci(void)
73{ 73{
74 struct device_node *np = NULL; 74 struct device_node *np;
75 75
76 ppc_md.pci_exclude_device = pq2_pci_exclude_device; 76 ppc_md.pci_exclude_device = pq2_pci_exclude_device;
77 77
78 while ((np = of_find_compatible_node(np, NULL, "fsl,pq2-pci"))) 78 for_each_compatible_node(np, NULL, "fsl,pq2-pci")
79 pq2_pci_add_bridge(np); 79 pq2_pci_add_bridge(np);
80} 80}
81#endif 81#endif
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c
index 89923d723349..bf4c4473abb9 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -28,8 +28,8 @@
28#include <linux/of_device.h> 28#include <linux/of_device.h>
29 29
30#include <linux/atomic.h> 30#include <linux/atomic.h>
31#include <asm/time.h> 31#include <linux/time.h>
32#include <asm/io.h> 32#include <linux/io.h>
33#include <asm/machdep.h> 33#include <asm/machdep.h>
34#include <asm/ipic.h> 34#include <asm/ipic.h>
35#include <asm/irq.h> 35#include <asm/irq.h>
@@ -43,6 +43,82 @@
43#include "mpc83xx.h" 43#include "mpc83xx.h"
44 44
45#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */ 45#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */
46
47static void quirk_mpc8360e_qe_enet10(void)
48{
49 /*
50 * handle mpc8360E Erratum QE_ENET10:
51 * RGMII AC values do not meet the specification
52 */
53 uint svid = mfspr(SPRN_SVR);
54 struct device_node *np_par;
55 struct resource res;
56 void __iomem *base;
57 int ret;
58
59 np_par = of_find_node_by_name(NULL, "par_io");
60 if (np_par == NULL) {
61 pr_warn("%s couldn;t find par_io node\n", __func__);
62 return;
63 }
64 /* Map Parallel I/O ports registers */
65 ret = of_address_to_resource(np_par, 0, &res);
66 if (ret) {
67 pr_warn("%s couldn;t map par_io registers\n", __func__);
68 return;
69 }
70
71 base = ioremap(res.start, res.end - res.start + 1);
72
73 /*
74 * set output delay adjustments to default values according
75 * table 5 in Errata Rev. 5, 9/2011:
76 *
77 * write 0b01 to UCC1 bits 18:19
78 * write 0b01 to UCC2 option 1 bits 4:5
79 * write 0b01 to UCC2 option 2 bits 16:17
80 */
81 clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
82
83 /*
84 * set output delay adjustments to default values according
85 * table 3-13 in Reference Manual Rev.3 05/2010:
86 *
87 * write 0b01 to UCC2 option 2 bits 16:17
88 * write 0b0101 to UCC1 bits 20:23
89 * write 0b0101 to UCC2 option 1 bits 24:27
90 */
91 clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
92
93 if (SVR_REV(svid) == 0x0021) {
94 /*
95 * UCC2 option 1: write 0b1010 to bits 24:27
96 * at address IMMRBAR+0x14AC
97 */
98 clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
99 } else if (SVR_REV(svid) == 0x0020) {
100 /*
101 * UCC1: write 0b11 to bits 18:19
102 * at address IMMRBAR+0x14A8
103 */
104 setbits32((base + 0xa8), 0x00003000);
105
106 /*
107 * UCC2 option 1: write 0b11 to bits 4:5
108 * at address IMMRBAR+0x14A8
109 */
110 setbits32((base + 0xa8), 0x0c000000);
111
112 /*
113 * UCC2 option 2: write 0b11 to bits 16:17
114 * at address IMMRBAR+0x14AC
115 */
116 setbits32((base + 0xac), 0x0000c000);
117 }
118 iounmap(base);
119 of_node_put(np_par);
120}
121
46/* ************************************************************************ 122/* ************************************************************************
47 * 123 *
48 * Setup the architecture 124 * Setup the architecture
@@ -72,84 +148,13 @@ static void __init mpc83xx_km_setup_arch(void)
72 148
73 for_each_node_by_name(np, "ucc") 149 for_each_node_by_name(np, "ucc")
74 par_io_of_config(np); 150 par_io_of_config(np);
75 }
76
77 np = of_find_compatible_node(NULL, "network", "ucc_geth");
78 if (np != NULL) {
79 /*
80 * handle mpc8360E Erratum QE_ENET10:
81 * RGMII AC values do not meet the specification
82 */
83 uint svid = mfspr(SPRN_SVR);
84 struct device_node *np_par;
85 struct resource res;
86 void __iomem *base;
87 int ret;
88
89 np_par = of_find_node_by_name(NULL, "par_io");
90 if (np_par == NULL) {
91 printk(KERN_WARNING "%s couldn;t find par_io node\n",
92 __func__);
93 return;
94 }
95 /* Map Parallel I/O ports registers */
96 ret = of_address_to_resource(np_par, 0, &res);
97 if (ret) {
98 printk(KERN_WARNING "%s couldn;t map par_io registers\n",
99 __func__);
100 return;
101 }
102
103 base = ioremap(res.start, res.end - res.start + 1);
104
105 /*
106 * set output delay adjustments to default values according
107 * table 5 in Errata Rev. 5, 9/2011:
108 *
109 * write 0b01 to UCC1 bits 18:19
110 * write 0b01 to UCC2 option 1 bits 4:5
111 * write 0b01 to UCC2 option 2 bits 16:17
112 */
113 clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
114 151
115 /* 152 /* Only apply this quirk when par_io is available */
116 * set output delay adjustments to default values according 153 np = of_find_compatible_node(NULL, "network", "ucc_geth");
117 * table 3-13 in Reference Manual Rev.3 05/2010: 154 if (np != NULL) {
118 * 155 quirk_mpc8360e_qe_enet10();
119 * write 0b01 to UCC2 option 2 bits 16:17 156 of_node_put(np);
120 * write 0b0101 to UCC1 bits 20:23
121 * write 0b0101 to UCC2 option 1 bits 24:27
122 */
123 clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
124
125 if (SVR_REV(svid) == 0x0021) {
126 /*
127 * UCC2 option 1: write 0b1010 to bits 24:27
128 * at address IMMRBAR+0x14AC
129 */
130 clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
131 } else if (SVR_REV(svid) == 0x0020) {
132 /*
133 * UCC1: write 0b11 to bits 18:19
134 * at address IMMRBAR+0x14A8
135 */
136 setbits32((base + 0xa8), 0x00003000);
137
138 /*
139 * UCC2 option 1: write 0b11 to bits 4:5
140 * at address IMMRBAR+0x14A8
141 */
142 setbits32((base + 0xa8), 0x0c000000);
143
144 /*
145 * UCC2 option 2: write 0b11 to bits 16:17
146 * at address IMMRBAR+0x14AC
147 */
148 setbits32((base + 0xac), 0x0000c000);
149 } 157 }
150 iounmap(base);
151 of_node_put(np_par);
152 of_node_put(np);
153 } 158 }
154#endif /* CONFIG_QUICC_ENGINE */ 159#endif /* CONFIG_QUICC_ENGINE */
155} 160}
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 92ab60a62711..a0dcd577fb0d 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -191,6 +191,13 @@ config SBC8548
191 help 191 help
192 This option enables support for the Wind River SBC8548 board 192 This option enables support for the Wind River SBC8548 board
193 193
194config PPA8548
195 bool "Prodrive PPA8548"
196 help
197 This option enables support for the Prodrive PPA8548 board.
198 select DEFAULT_UIMAGE
199 select HAS_RAPIDIO
200
194config GE_IMP3A 201config GE_IMP3A
195 bool "GE Intelligent Platforms IMP3A" 202 bool "GE Intelligent Platforms IMP3A"
196 select DEFAULT_UIMAGE 203 select DEFAULT_UIMAGE
@@ -245,6 +252,14 @@ config P4080_DS
245 help 252 help
246 This option enables support for the P4080 DS board 253 This option enables support for the P4080 DS board
247 254
255config SGY_CTS1000
256 tristate "Servergy CTS-1000 support"
257 select GPIOLIB
258 select OF_GPIO
259 depends on P4080_DS
260 help
261 Enable this to support functionality in Servergy's CTS-1000 systems.
262
248endif # PPC32 263endif # PPC32
249 264
250config P5020_DS 265config P5020_DS
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 76f679cb04a0..07d0dbb141c0 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -25,8 +25,10 @@ obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o
25obj-$(CONFIG_STX_GP3) += stx_gp3.o 25obj-$(CONFIG_STX_GP3) += stx_gp3.o
26obj-$(CONFIG_TQM85xx) += tqm85xx.o 26obj-$(CONFIG_TQM85xx) += tqm85xx.o
27obj-$(CONFIG_SBC8548) += sbc8548.o 27obj-$(CONFIG_SBC8548) += sbc8548.o
28obj-$(CONFIG_PPA8548) += ppa8548.o
28obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o 29obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
29obj-$(CONFIG_KSI8560) += ksi8560.o 30obj-$(CONFIG_KSI8560) += ksi8560.o
30obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o 31obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
31obj-$(CONFIG_GE_IMP3A) += ge_imp3a.o 32obj-$(CONFIG_GE_IMP3A) += ge_imp3a.o
32obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o 33obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o
34obj-$(CONFIG_SGY_CTS1000) += sgy_cts1000.o
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index bd12588fa252..a7b3621a8df5 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -206,9 +206,7 @@ static void __init mpc85xx_mds_reset_ucc_phys(void)
206 setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); 206 setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
207 clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); 207 clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
208 208
209 for (np = NULL; (np = of_find_compatible_node(np, 209 for_each_compatible_node(np, "network", "ucc_geth") {
210 "network",
211 "ucc_geth")) != NULL;) {
212 const unsigned int *prop; 210 const unsigned int *prop;
213 int ucc_num; 211 int ucc_num;
214 212
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index e346edf7f157..e611e79f23ce 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -106,42 +106,6 @@
106 (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \ 106 (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \
107 (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT)) 107 (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT))
108 108
109/**
110 * p1022ds_get_pixel_format: return the Area Descriptor for a given pixel depth
111 *
112 * The Area Descriptor is a 32-bit value that determine which bits in each
113 * pixel are to be used for each color.
114 */
115static u32 p1022ds_get_pixel_format(enum fsl_diu_monitor_port port,
116 unsigned int bits_per_pixel)
117{
118 switch (bits_per_pixel) {
119 case 32:
120 /* 0x88883316 */
121 return MAKE_AD(3, 2, 0, 1, 3, 8, 8, 8, 8);
122 case 24:
123 /* 0x88082219 */
124 return MAKE_AD(4, 0, 1, 2, 2, 0, 8, 8, 8);
125 case 16:
126 /* 0x65053118 */
127 return MAKE_AD(4, 2, 1, 0, 1, 5, 6, 5, 0);
128 default:
129 pr_err("fsl-diu: unsupported pixel depth %u\n", bits_per_pixel);
130 return 0;
131 }
132}
133
134/**
135 * p1022ds_set_gamma_table: update the gamma table, if necessary
136 *
137 * On some boards, the gamma table for some ports may need to be modified.
138 * This is not the case on the P1022DS, so we do nothing.
139*/
140static void p1022ds_set_gamma_table(enum fsl_diu_monitor_port port,
141 char *gamma_table_base)
142{
143}
144
145struct fsl_law { 109struct fsl_law {
146 u32 lawbar; 110 u32 lawbar;
147 u32 reserved1; 111 u32 reserved1;
@@ -302,7 +266,7 @@ static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
302 goto exit; 266 goto exit;
303 } 267 }
304 cs1_addr = lbc_br_to_phys(ecm, num_laws, br1); 268 cs1_addr = lbc_br_to_phys(ecm, num_laws, br1);
305 if (!cs0_addr) { 269 if (!cs1_addr) {
306 pr_err("p1022ds: could not determine physical address for CS1" 270 pr_err("p1022ds: could not determine physical address for CS1"
307 " (BR1=%08x)\n", br1); 271 " (BR1=%08x)\n", br1);
308 goto exit; 272 goto exit;
@@ -510,8 +474,6 @@ static void __init p1022_ds_setup_arch(void)
510 ppc_md.progress("p1022_ds_setup_arch()", 0); 474 ppc_md.progress("p1022_ds_setup_arch()", 0);
511 475
512#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 476#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
513 diu_ops.get_pixel_format = p1022ds_get_pixel_format;
514 diu_ops.set_gamma_table = p1022ds_set_gamma_table;
515 diu_ops.set_monitor_port = p1022ds_set_monitor_port; 477 diu_ops.set_monitor_port = p1022ds_set_monitor_port;
516 diu_ops.set_pixel_clock = p1022ds_set_pixel_clock; 478 diu_ops.set_pixel_clock = p1022ds_set_pixel_clock;
517 diu_ops.valid_monitor_port = p1022ds_valid_monitor_port; 479 diu_ops.valid_monitor_port = p1022ds_valid_monitor_port;
diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c
index 55ffa1cc380c..8c9297112b30 100644
--- a/arch/powerpc/platforms/85xx/p1022_rdk.c
+++ b/arch/powerpc/platforms/85xx/p1022_rdk.c
@@ -35,17 +35,6 @@
35#define CLKDVDR_PXCLK_MASK 0x00FF0000 35#define CLKDVDR_PXCLK_MASK 0x00FF0000
36 36
37/** 37/**
38 * p1022rdk_set_monitor_port: switch the output to a different monitor port
39 */
40static void p1022rdk_set_monitor_port(enum fsl_diu_monitor_port port)
41{
42 if (port != FSL_DIU_PORT_DVI) {
43 pr_err("p1022rdk: unsupported monitor port %i\n", port);
44 return;
45 }
46}
47
48/**
49 * p1022rdk_set_pixel_clock: program the DIU's clock 38 * p1022rdk_set_pixel_clock: program the DIU's clock
50 * 39 *
51 * @pixclock: the wavelength, in picoseconds, of the clock 40 * @pixclock: the wavelength, in picoseconds, of the clock
@@ -124,7 +113,6 @@ static void __init p1022_rdk_setup_arch(void)
124 ppc_md.progress("p1022_rdk_setup_arch()", 0); 113 ppc_md.progress("p1022_rdk_setup_arch()", 0);
125 114
126#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 115#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
127 diu_ops.set_monitor_port = p1022rdk_set_monitor_port;
128 diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock; 116 diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock;
129 diu_ops.valid_monitor_port = p1022rdk_valid_monitor_port; 117 diu_ops.valid_monitor_port = p1022rdk_valid_monitor_port;
130#endif 118#endif
diff --git a/arch/powerpc/platforms/85xx/ppa8548.c b/arch/powerpc/platforms/85xx/ppa8548.c
new file mode 100644
index 000000000000..6a7704b92c3b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/ppa8548.c
@@ -0,0 +1,98 @@
1/*
2 * ppa8548 setup and early boot code.
3 *
4 * Copyright 2009 Prodrive B.V..
5 *
6 * By Stef van Os (see MAINTAINERS for contact information)
7 *
8 * Based on the SBC8548 support - Copyright 2007 Wind River Systems Inc.
9 * Based on the MPC8548CDS support - Copyright 2005 Freescale Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#include <linux/stddef.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/reboot.h>
21#include <linux/seq_file.h>
22#include <linux/of_platform.h>
23
24#include <asm/machdep.h>
25#include <asm/udbg.h>
26#include <asm/mpic.h>
27
28#include <sysdev/fsl_soc.h>
29
30static void __init ppa8548_pic_init(void)
31{
32 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
33 0, 256, " OpenPIC ");
34 BUG_ON(mpic == NULL);
35 mpic_init(mpic);
36}
37
38/*
39 * Setup the architecture
40 */
41static void __init ppa8548_setup_arch(void)
42{
43 if (ppc_md.progress)
44 ppc_md.progress("ppa8548_setup_arch()", 0);
45}
46
47static void ppa8548_show_cpuinfo(struct seq_file *m)
48{
49 uint32_t svid, phid1;
50
51 svid = mfspr(SPRN_SVR);
52
53 seq_printf(m, "Vendor\t\t: Prodrive B.V.\n");
54 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
55
56 /* Display cpu Pll setting */
57 phid1 = mfspr(SPRN_HID1);
58 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
59}
60
61static struct of_device_id __initdata of_bus_ids[] = {
62 { .name = "soc", },
63 { .type = "soc", },
64 { .compatible = "simple-bus", },
65 { .compatible = "gianfar", },
66 { .compatible = "fsl,srio", },
67 {},
68};
69
70static int __init declare_of_platform_devices(void)
71{
72 of_platform_bus_probe(NULL, of_bus_ids, NULL);
73
74 return 0;
75}
76machine_device_initcall(ppa8548, declare_of_platform_devices);
77
78/*
79 * Called very early, device-tree isn't unflattened
80 */
81static int __init ppa8548_probe(void)
82{
83 unsigned long root = of_get_flat_dt_root();
84
85 return of_flat_dt_is_compatible(root, "ppa8548");
86}
87
88define_machine(ppa8548) {
89 .name = "ppa8548",
90 .probe = ppa8548_probe,
91 .setup_arch = ppa8548_setup_arch,
92 .init_IRQ = ppa8548_pic_init,
93 .show_cpuinfo = ppa8548_show_cpuinfo,
94 .get_irq = mpic_get_irq,
95 .restart = fsl_rstcr_restart,
96 .calibrate_decr = generic_calibrate_decr,
97 .progress = udbg_progress,
98};
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
index f6ea5618c733..5cefc5a9a144 100644
--- a/arch/powerpc/platforms/85xx/qemu_e500.c
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -29,9 +29,10 @@
29void __init qemu_e500_pic_init(void) 29void __init qemu_e500_pic_init(void)
30{ 30{
31 struct mpic *mpic; 31 struct mpic *mpic;
32 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
33 MPIC_ENABLE_COREINT;
32 34
33 mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU, 35 mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
34 0, 256, " OpenPIC ");
35 36
36 BUG_ON(mpic == NULL); 37 BUG_ON(mpic == NULL);
37 mpic_init(mpic); 38 mpic_init(mpic);
@@ -66,7 +67,7 @@ define_machine(qemu_e500) {
66#ifdef CONFIG_PCI 67#ifdef CONFIG_PCI
67 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 68 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
68#endif 69#endif
69 .get_irq = mpic_get_irq, 70 .get_irq = mpic_get_coreint_irq,
70 .restart = fsl_rstcr_restart, 71 .restart = fsl_rstcr_restart,
71 .calibrate_decr = generic_calibrate_decr, 72 .calibrate_decr = generic_calibrate_decr,
72 .progress = udbg_progress, 73 .progress = udbg_progress,
diff --git a/arch/powerpc/platforms/85xx/sgy_cts1000.c b/arch/powerpc/platforms/85xx/sgy_cts1000.c
new file mode 100644
index 000000000000..611e92f291c4
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/sgy_cts1000.c
@@ -0,0 +1,176 @@
1/*
2 * Servergy CTS-1000 Setup
3 *
4 * Maintained by Ben Collins <ben.c@servergy.com>
5 *
6 * Copyright 2012 by Servergy, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/platform_device.h>
15#include <linux/device.h>
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/of_gpio.h>
19#include <linux/workqueue.h>
20#include <linux/reboot.h>
21#include <linux/interrupt.h>
22
23#include <asm/machdep.h>
24
25static struct device_node *halt_node;
26
27static struct of_device_id child_match[] = {
28 {
29 .compatible = "sgy,gpio-halt",
30 },
31 {},
32};
33
34static void gpio_halt_wfn(struct work_struct *work)
35{
36 /* Likely wont return */
37 orderly_poweroff(true);
38}
39static DECLARE_WORK(gpio_halt_wq, gpio_halt_wfn);
40
41static void gpio_halt_cb(void)
42{
43 enum of_gpio_flags flags;
44 int trigger, gpio;
45
46 if (!halt_node)
47 return;
48
49 gpio = of_get_gpio_flags(halt_node, 0, &flags);
50
51 if (!gpio_is_valid(gpio))
52 return;
53
54 trigger = (flags == OF_GPIO_ACTIVE_LOW);
55
56 printk(KERN_INFO "gpio-halt: triggering GPIO.\n");
57
58 /* Probably wont return */
59 gpio_set_value(gpio, trigger);
60}
61
62/* This IRQ means someone pressed the power button and it is waiting for us
63 * to handle the shutdown/poweroff. */
64static irqreturn_t gpio_halt_irq(int irq, void *__data)
65{
66 printk(KERN_INFO "gpio-halt: shutdown due to power button IRQ.\n");
67 schedule_work(&gpio_halt_wq);
68
69 return IRQ_HANDLED;
70};
71
72static int __devinit gpio_halt_probe(struct platform_device *pdev)
73{
74 enum of_gpio_flags flags;
75 struct device_node *node = pdev->dev.of_node;
76 int gpio, err, irq;
77 int trigger;
78
79 if (!node)
80 return -ENODEV;
81
82 /* If there's no matching child, this isn't really an error */
83 halt_node = of_find_matching_node(node, child_match);
84 if (!halt_node)
85 return 0;
86
87 /* Technically we could just read the first one, but punish
88 * DT writers for invalid form. */
89 if (of_gpio_count(halt_node) != 1)
90 return -EINVAL;
91
92 /* Get the gpio number relative to the dynamic base. */
93 gpio = of_get_gpio_flags(halt_node, 0, &flags);
94 if (!gpio_is_valid(gpio))
95 return -EINVAL;
96
97 err = gpio_request(gpio, "gpio-halt");
98 if (err) {
99 printk(KERN_ERR "gpio-halt: error requesting GPIO %d.\n",
100 gpio);
101 halt_node = NULL;
102 return err;
103 }
104
105 trigger = (flags == OF_GPIO_ACTIVE_LOW);
106
107 gpio_direction_output(gpio, !trigger);
108
109 /* Now get the IRQ which tells us when the power button is hit */
110 irq = irq_of_parse_and_map(halt_node, 0);
111 err = request_irq(irq, gpio_halt_irq, IRQF_TRIGGER_RISING |
112 IRQF_TRIGGER_FALLING, "gpio-halt", halt_node);
113 if (err) {
114 printk(KERN_ERR "gpio-halt: error requesting IRQ %d for "
115 "GPIO %d.\n", irq, gpio);
116 gpio_free(gpio);
117 halt_node = NULL;
118 return err;
119 }
120
121 /* Register our halt function */
122 ppc_md.halt = gpio_halt_cb;
123 ppc_md.power_off = gpio_halt_cb;
124
125 printk(KERN_INFO "gpio-halt: registered GPIO %d (%d trigger, %d"
126 " irq).\n", gpio, trigger, irq);
127
128 return 0;
129}
130
131static int __devexit gpio_halt_remove(struct platform_device *pdev)
132{
133 if (halt_node) {
134 int gpio = of_get_gpio(halt_node, 0);
135 int irq = irq_of_parse_and_map(halt_node, 0);
136
137 free_irq(irq, halt_node);
138
139 ppc_md.halt = NULL;
140 ppc_md.power_off = NULL;
141
142 gpio_free(gpio);
143
144 halt_node = NULL;
145 }
146
147 return 0;
148}
149
150static struct of_device_id gpio_halt_match[] = {
151 /* We match on the gpio bus itself and scan the children since they
152 * wont be matched against us. We know the bus wont match until it
153 * has been registered too. */
154 {
155 .compatible = "fsl,qoriq-gpio",
156 },
157 {},
158};
159MODULE_DEVICE_TABLE(of, gpio_halt_match);
160
161static struct platform_driver gpio_halt_driver = {
162 .driver = {
163 .name = "gpio-halt",
164 .owner = THIS_MODULE,
165 .of_match_table = gpio_halt_match,
166 },
167 .probe = gpio_halt_probe,
168 .remove = __devexit_p(gpio_halt_remove),
169};
170
171module_platform_driver(gpio_halt_driver);
172
173MODULE_DESCRIPTION("Driver to support GPIO triggered system halt for Servergy CTS-1000 Systems.");
174MODULE_VERSION("1.0");
175MODULE_AUTHOR("Ben Collins <ben.c@servergy.com>");
176MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 48a920d51489..52de8bccfb30 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -352,8 +352,6 @@ config OF_RTC
352 Uses information from the OF or flattened device tree to instantiate 352 Uses information from the OF or flattened device tree to instantiate
353 platform devices for direct mapped RTC chips like the DS1742 or DS1743. 353 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
354 354
355source "arch/powerpc/sysdev/bestcomm/Kconfig"
356
357config SIMPLE_GPIO 355config SIMPLE_GPIO
358 bool "Support for simple, memory-mapped GPIO controllers" 356 bool "Support for simple, memory-mapped GPIO controllers"
359 depends on PPC 357 depends on PPC
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 72afd2888cad..cea2f09c4241 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -76,6 +76,7 @@ config PPC_BOOK3E_64
76 bool "Embedded processors" 76 bool "Embedded processors"
77 select PPC_FPU # Make it a choice ? 77 select PPC_FPU # Make it a choice ?
78 select PPC_SMP_MUXED_IPI 78 select PPC_SMP_MUXED_IPI
79 select PPC_DOORBELL
79 80
80endchoice 81endchoice
81 82
@@ -208,6 +209,7 @@ config PPC_FSL_BOOK3E
208 select FSL_EMB_PERFMON 209 select FSL_EMB_PERFMON
209 select PPC_SMP_MUXED_IPI 210 select PPC_SMP_MUXED_IPI
210 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 211 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
212 select PPC_DOORBELL
211 default y if FSL_BOOKE 213 default y if FSL_BOOKE
212 214
213config PTE_64BIT 215config PTE_64BIT
@@ -382,4 +384,8 @@ config NOT_COHERENT_CACHE
382config CHECK_CACHE_COHERENCY 384config CHECK_CACHE_COHERENCY
383 bool 385 bool
384 386
387config PPC_DOORBELL
388 bool
389 default n
390
385endmenu 391endmenu
diff --git a/arch/powerpc/platforms/cell/celleb_scc_sio.c b/arch/powerpc/platforms/cell/celleb_scc_sio.c
index 3a16c5b3c464..9c339ec646f5 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_sio.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_sio.c
@@ -42,14 +42,13 @@ static struct {
42static int __init txx9_serial_init(void) 42static int __init txx9_serial_init(void)
43{ 43{
44 extern int early_serial_txx9_setup(struct uart_port *port); 44 extern int early_serial_txx9_setup(struct uart_port *port);
45 struct device_node *node = NULL; 45 struct device_node *node;
46 int i; 46 int i;
47 struct uart_port req; 47 struct uart_port req;
48 struct of_irq irq; 48 struct of_irq irq;
49 struct resource res; 49 struct resource res;
50 50
51 while ((node = of_find_compatible_node(node, 51 for_each_compatible_node(node, "serial", "toshiba,sio-scc") {
52 "serial", "toshiba,sio-scc")) != NULL) {
53 for (i = 0; i < ARRAY_SIZE(txx9_scc_tab); i++) { 52 for (i = 0; i < ARRAY_SIZE(txx9_scc_tab); i++) {
54 if (!(txx9_serial_bitmap & (1<<i))) 53 if (!(txx9_serial_bitmap & (1<<i)))
55 continue; 54 continue;
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index 75d613313f10..b0ec78e8ad68 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -60,13 +60,12 @@ long spu_sys_callback(struct spu_syscall_block *s)
60 60
61 syscall = spu_syscall_table[s->nr_ret]; 61 syscall = spu_syscall_table[s->nr_ret];
62 62
63#ifdef DEBUG 63 pr_debug("SPU-syscall "
64 print_symbol(KERN_DEBUG "SPU-syscall %s:", (unsigned long)syscall); 64 "%pSR:syscall%lld(%llx, %llx, %llx, %llx, %llx, %llx)\n",
65 printk("syscall%ld(%lx, %lx, %lx, %lx, %lx, %lx)\n", 65 syscall,
66 s->nr_ret, 66 s->nr_ret,
67 s->parm[0], s->parm[1], s->parm[2], 67 s->parm[0], s->parm[1], s->parm[2],
68 s->parm[3], s->parm[4], s->parm[5]); 68 s->parm[3], s->parm[4], s->parm[5]);
69#endif
70 69
71 return syscall(s->parm[0], s->parm[1], s->parm[2], 70 return syscall(s->parm[0], s->parm[1], s->parm[2],
72 s->parm[3], s->parm[4], s->parm[5]); 71 s->parm[3], s->parm[4], s->parm[5]);
diff --git a/arch/powerpc/platforms/ps3/htab.c b/arch/powerpc/platforms/ps3/htab.c
index d00d7b0a3bda..6cc58201db8c 100644
--- a/arch/powerpc/platforms/ps3/htab.c
+++ b/arch/powerpc/platforms/ps3/htab.c
@@ -27,6 +27,7 @@
27#include <asm/lv1call.h> 27#include <asm/lv1call.h>
28#include <asm/ps3fb.h> 28#include <asm/ps3fb.h>
29 29
30#define PS3_VERBOSE_RESULT
30#include "platform.h" 31#include "platform.h"
31 32
32/** 33/**
@@ -75,8 +76,9 @@ static long ps3_hpte_insert(unsigned long hpte_group, unsigned long vpn,
75 76
76 if (result) { 77 if (result) {
77 /* all entries bolted !*/ 78 /* all entries bolted !*/
78 pr_info("%s:result=%d vpn=%lx pa=%lx ix=%lx v=%llx r=%llx\n", 79 pr_info("%s:result=%s vpn=%lx pa=%lx ix=%lx v=%llx r=%llx\n",
79 __func__, result, vpn, pa, hpte_group, hpte_v, hpte_r); 80 __func__, ps3_result(result), vpn, pa, hpte_group,
81 hpte_v, hpte_r);
80 BUG(); 82 BUG();
81 } 83 }
82 84
@@ -125,8 +127,8 @@ static long ps3_hpte_updatepp(unsigned long slot, unsigned long newpp,
125 &hpte_rs); 127 &hpte_rs);
126 128
127 if (result) { 129 if (result) {
128 pr_info("%s: res=%d read vpn=%lx slot=%lx psize=%d\n", 130 pr_info("%s: result=%s read vpn=%lx slot=%lx psize=%d\n",
129 __func__, result, vpn, slot, psize); 131 __func__, ps3_result(result), vpn, slot, psize);
130 BUG(); 132 BUG();
131 } 133 }
132 134
@@ -170,8 +172,8 @@ static void ps3_hpte_invalidate(unsigned long slot, unsigned long vpn,
170 result = lv1_write_htab_entry(PS3_LPAR_VAS_ID_CURRENT, slot, 0, 0); 172 result = lv1_write_htab_entry(PS3_LPAR_VAS_ID_CURRENT, slot, 0, 0);
171 173
172 if (result) { 174 if (result) {
173 pr_info("%s: res=%d vpn=%lx slot=%lx psize=%d\n", 175 pr_info("%s: result=%s vpn=%lx slot=%lx psize=%d\n",
174 __func__, result, vpn, slot, psize); 176 __func__, ps3_result(result), vpn, slot, psize);
175 BUG(); 177 BUG();
176 } 178 }
177 179
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 837cf49357ed..9a0941bc4d31 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -17,6 +17,7 @@ config PPC_PSERIES
17 select PPC_NATIVE 17 select PPC_NATIVE
18 select PPC_PCI_CHOICE if EXPERT 18 select PPC_PCI_CHOICE if EXPERT
19 select ZLIB_DEFLATE 19 select ZLIB_DEFLATE
20 select PPC_DOORBELL
20 default y 21 default y
21 22
22config PPC_SPLPAR 23config PPC_SPLPAR
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 890622b87c8f..53866e537a92 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -1,4 +1,4 @@
1ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 1ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
2ccflags-$(CONFIG_PPC_PSERIES_DEBUG) += -DDEBUG 2ccflags-$(CONFIG_PPC_PSERIES_DEBUG) += -DDEBUG
3 3
4obj-y := lpar.o hvCall.o nvram.o reconfig.o \ 4obj-y := lpar.o hvCall.o nvram.o reconfig.o \
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 9a04322b1736..6b73d6c44f51 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -788,7 +788,6 @@ static void eeh_add_device_late(struct pci_dev *dev)
788 dev->dev.archdata.edev = edev; 788 dev->dev.archdata.edev = edev;
789 789
790 eeh_addr_cache_insert_dev(dev); 790 eeh_addr_cache_insert_dev(dev);
791 eeh_sysfs_add_device(dev);
792} 791}
793 792
794/** 793/**
@@ -815,6 +814,29 @@ void eeh_add_device_tree_late(struct pci_bus *bus)
815EXPORT_SYMBOL_GPL(eeh_add_device_tree_late); 814EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
816 815
817/** 816/**
817 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
818 * @bus: PCI bus
819 *
820 * This routine must be used to add EEH sysfs files for PCI
821 * devices which are attached to the indicated PCI bus. The PCI bus
822 * is added after system boot through hotplug or dlpar.
823 */
824void eeh_add_sysfs_files(struct pci_bus *bus)
825{
826 struct pci_dev *dev;
827
828 list_for_each_entry(dev, &bus->devices, bus_list) {
829 eeh_sysfs_add_device(dev);
830 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
831 struct pci_bus *subbus = dev->subordinate;
832 if (subbus)
833 eeh_add_sysfs_files(subbus);
834 }
835 }
836}
837EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
838
839/**
818 * eeh_remove_device - Undo EEH setup for the indicated pci device 840 * eeh_remove_device - Undo EEH setup for the indicated pci device
819 * @dev: pci device to be removed 841 * @dev: pci device to be removed
820 * @purge_pe: remove the PE or not 842 * @purge_pe: remove the PE or not
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c
index 7b56118f531c..aa3693f7fb27 100644
--- a/arch/powerpc/platforms/pseries/firmware.c
+++ b/arch/powerpc/platforms/pseries/firmware.c
@@ -33,6 +33,11 @@ typedef struct {
33 char * name; 33 char * name;
34} firmware_feature_t; 34} firmware_feature_t;
35 35
36/*
37 * The names in this table match names in rtas/ibm,hypertas-functions. If the
38 * entry ends in a '*', only upto the '*' is matched. Otherwise the entire
39 * string must match.
40 */
36static __initdata firmware_feature_t 41static __initdata firmware_feature_t
37firmware_features_table[FIRMWARE_MAX_FEATURES] = { 42firmware_features_table[FIRMWARE_MAX_FEATURES] = {
38 {FW_FEATURE_PFT, "hcall-pft"}, 43 {FW_FEATURE_PFT, "hcall-pft"},
@@ -57,6 +62,7 @@ firmware_features_table[FIRMWARE_MAX_FEATURES] = {
57 {FW_FEATURE_SPLPAR, "hcall-splpar"}, 62 {FW_FEATURE_SPLPAR, "hcall-splpar"},
58 {FW_FEATURE_VPHN, "hcall-vphn"}, 63 {FW_FEATURE_VPHN, "hcall-vphn"},
59 {FW_FEATURE_SET_MODE, "hcall-set-mode"}, 64 {FW_FEATURE_SET_MODE, "hcall-set-mode"},
65 {FW_FEATURE_BEST_ENERGY, "hcall-best-energy-1*"},
60}; 66};
61 67
62/* Build up the firmware features bitmask using the contents of 68/* Build up the firmware features bitmask using the contents of
@@ -72,9 +78,20 @@ void __init fw_feature_init(const char *hypertas, unsigned long len)
72 78
73 for (s = hypertas; s < hypertas + len; s += strlen(s) + 1) { 79 for (s = hypertas; s < hypertas + len; s += strlen(s) + 1) {
74 for (i = 0; i < FIRMWARE_MAX_FEATURES; i++) { 80 for (i = 0; i < FIRMWARE_MAX_FEATURES; i++) {
81 const char *name = firmware_features_table[i].name;
82 size_t size;
75 /* check value against table of strings */ 83 /* check value against table of strings */
76 if (!firmware_features_table[i].name || 84 if (!name)
77 strcmp(firmware_features_table[i].name, s)) 85 continue;
86 /*
87 * If there is a '*' at the end of name, only check
88 * upto there
89 */
90 size = strlen(name);
91 if (size && name[size - 1] == '*') {
92 if (strncmp(name, s, size - 1))
93 continue;
94 } else if (strcmp(name, s))
78 continue; 95 continue;
79 96
80 /* we have a match */ 97 /* we have a match */
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index a38956269fbf..217ca5c75b20 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -127,9 +127,16 @@ static void pseries_mach_cpu_die(void)
127 get_lppaca()->donate_dedicated_cpu = 1; 127 get_lppaca()->donate_dedicated_cpu = 1;
128 128
129 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) { 129 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
130 while (!prep_irq_for_idle()) {
131 local_irq_enable();
132 local_irq_disable();
133 }
134
130 extended_cede_processor(cede_latency_hint); 135 extended_cede_processor(cede_latency_hint);
131 } 136 }
132 137
138 local_irq_disable();
139
133 if (!get_lppaca()->shared_proc) 140 if (!get_lppaca()->shared_proc)
134 get_lppaca()->donate_dedicated_cpu = 0; 141 get_lppaca()->donate_dedicated_cpu = 0;
135 get_lppaca()->idle = 0; 142 get_lppaca()->idle = 0;
@@ -137,6 +144,7 @@ static void pseries_mach_cpu_die(void)
137 if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) { 144 if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
138 unregister_slb_shadow(hwcpu); 145 unregister_slb_shadow(hwcpu);
139 146
147 hard_irq_disable();
140 /* 148 /*
141 * Call to start_secondary_resume() will not return. 149 * Call to start_secondary_resume() will not return.
142 * Kernel stack will be reset and start_secondary() 150 * Kernel stack will be reset and start_secondary()
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index e2685badb5db..1b2a174e7c59 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -382,6 +382,7 @@ static int tce_clearrange_multi_pSeriesLP(unsigned long start_pfn,
382 rc = plpar_tce_stuff((u64)be32_to_cpu(maprange->liobn), 382 rc = plpar_tce_stuff((u64)be32_to_cpu(maprange->liobn),
383 dma_offset, 383 dma_offset,
384 0, limit); 384 0, limit);
385 next += limit * tce_size;
385 num_tce -= limit; 386 num_tce -= limit;
386 } while (num_tce > 0 && !rc); 387 } while (num_tce > 0 && !rc);
387 388
@@ -786,33 +787,68 @@ static u64 find_existing_ddw(struct device_node *pdn)
786 return dma_addr; 787 return dma_addr;
787} 788}
788 789
790static void __restore_default_window(struct eeh_dev *edev,
791 u32 ddw_restore_token)
792{
793 u32 cfg_addr;
794 u64 buid;
795 int ret;
796
797 /*
798 * Get the config address and phb buid of the PE window.
799 * Rely on eeh to retrieve this for us.
800 * Retrieve them from the pci device, not the node with the
801 * dma-window property
802 */
803 cfg_addr = edev->config_addr;
804 if (edev->pe_config_addr)
805 cfg_addr = edev->pe_config_addr;
806 buid = edev->phb->buid;
807
808 do {
809 ret = rtas_call(ddw_restore_token, 3, 1, NULL, cfg_addr,
810 BUID_HI(buid), BUID_LO(buid));
811 } while (rtas_busy_delay(ret));
812 pr_info("ibm,reset-pe-dma-windows(%x) %x %x %x returned %d\n",
813 ddw_restore_token, cfg_addr, BUID_HI(buid), BUID_LO(buid), ret);
814}
815
789static int find_existing_ddw_windows(void) 816static int find_existing_ddw_windows(void)
790{ 817{
791 int len;
792 struct device_node *pdn; 818 struct device_node *pdn;
793 struct direct_window *window;
794 const struct dynamic_dma_window_prop *direct64; 819 const struct dynamic_dma_window_prop *direct64;
820 const u32 *ddw_extensions;
795 821
796 if (!firmware_has_feature(FW_FEATURE_LPAR)) 822 if (!firmware_has_feature(FW_FEATURE_LPAR))
797 return 0; 823 return 0;
798 824
799 for_each_node_with_property(pdn, DIRECT64_PROPNAME) { 825 for_each_node_with_property(pdn, DIRECT64_PROPNAME) {
800 direct64 = of_get_property(pdn, DIRECT64_PROPNAME, &len); 826 direct64 = of_get_property(pdn, DIRECT64_PROPNAME, NULL);
801 if (!direct64) 827 if (!direct64)
802 continue; 828 continue;
803 829
804 window = kzalloc(sizeof(*window), GFP_KERNEL); 830 /*
805 if (!window || len < sizeof(struct dynamic_dma_window_prop)) { 831 * We need to ensure the IOMMU table is active when we
806 kfree(window); 832 * return from the IOMMU setup so that the common code
807 remove_ddw(pdn); 833 * can clear the table or find the holes. To that end,
808 continue; 834 * first, remove any existing DDW configuration.
809 } 835 */
836 remove_ddw(pdn);
810 837
811 window->device = pdn; 838 /*
812 window->prop = direct64; 839 * Second, if we are running on a new enough level of
813 spin_lock(&direct_window_list_lock); 840 * firmware where the restore API is present, use it to
814 list_add(&window->list, &direct_window_list); 841 * restore the 32-bit window, which was removed in
815 spin_unlock(&direct_window_list_lock); 842 * create_ddw.
843 * If the API is not present, then create_ddw couldn't
844 * have removed the 32-bit window in the first place, so
845 * removing the DDW configuration should be sufficient.
846 */
847 ddw_extensions = of_get_property(pdn, "ibm,ddw-extensions",
848 NULL);
849 if (ddw_extensions && ddw_extensions[0] > 0)
850 __restore_default_window(of_node_to_eeh_dev(pdn),
851 ddw_extensions[1]);
816 } 852 }
817 853
818 return 0; 854 return 0;
@@ -883,32 +919,9 @@ static int create_ddw(struct pci_dev *dev, const u32 *ddw_avail,
883} 919}
884 920
885static void restore_default_window(struct pci_dev *dev, 921static void restore_default_window(struct pci_dev *dev,
886 u32 ddw_restore_token, unsigned long liobn) 922 u32 ddw_restore_token)
887{ 923{
888 struct eeh_dev *edev; 924 __restore_default_window(pci_dev_to_eeh_dev(dev), ddw_restore_token);
889 u32 cfg_addr;
890 u64 buid;
891 int ret;
892
893 /*
894 * Get the config address and phb buid of the PE window.
895 * Rely on eeh to retrieve this for us.
896 * Retrieve them from the pci device, not the node with the
897 * dma-window property
898 */
899 edev = pci_dev_to_eeh_dev(dev);
900 cfg_addr = edev->config_addr;
901 if (edev->pe_config_addr)
902 cfg_addr = edev->pe_config_addr;
903 buid = edev->phb->buid;
904
905 do {
906 ret = rtas_call(ddw_restore_token, 3, 1, NULL, cfg_addr,
907 BUID_HI(buid), BUID_LO(buid));
908 } while (rtas_busy_delay(ret));
909 dev_info(&dev->dev,
910 "ibm,reset-pe-dma-windows(%x) %x %x %x returned %d\n",
911 ddw_restore_token, cfg_addr, BUID_HI(buid), BUID_LO(buid), ret);
912} 925}
913 926
914/* 927/*
@@ -1099,7 +1112,7 @@ out_free_prop:
1099 1112
1100out_restore_window: 1113out_restore_window:
1101 if (ddw_restore_token) 1114 if (ddw_restore_token)
1102 restore_default_window(dev, ddw_restore_token, liobn); 1115 restore_default_window(dev, ddw_restore_token);
1103 1116
1104out_unlock: 1117out_unlock:
1105 mutex_unlock(&direct_window_init_mutex); 1118 mutex_unlock(&direct_window_init_mutex);
@@ -1295,6 +1308,7 @@ static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long acti
1295 1308
1296 switch (action) { 1309 switch (action) {
1297 case OF_RECONFIG_DETACH_NODE: 1310 case OF_RECONFIG_DETACH_NODE:
1311 remove_ddw(np);
1298 if (pci && pci->iommu_table) 1312 if (pci && pci->iommu_table)
1299 iommu_free_table(pci->iommu_table, np->full_name); 1313 iommu_free_table(pci->iommu_table, np->full_name);
1300 1314
@@ -1307,16 +1321,6 @@ static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long acti
1307 } 1321 }
1308 } 1322 }
1309 spin_unlock(&direct_window_list_lock); 1323 spin_unlock(&direct_window_list_lock);
1310
1311 /*
1312 * Because the notifier runs after isolation of the
1313 * slot, we are guaranteed any DMA window has already
1314 * been revoked and the TCEs have been marked invalid,
1315 * so we don't need a call to remove_ddw(np). However,
1316 * if an additional notifier action is added before the
1317 * isolate call, we should update this code for
1318 * completeness with such a call.
1319 */
1320 break; 1324 break;
1321 default: 1325 default:
1322 err = NOTIFY_DONE; 1326 err = NOTIFY_DONE;
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 56b864d777ee..0b580f413a9a 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -40,7 +40,8 @@ void pcibios_name_device(struct pci_dev *dev)
40 */ 40 */
41 dn = pci_device_to_OF_node(dev); 41 dn = pci_device_to_OF_node(dev);
42 if (dn) { 42 if (dn) {
43 const char *loc_code = of_get_property(dn, "ibm,loc-code", 0); 43 const char *loc_code = of_get_property(dn, "ibm,loc-code",
44 NULL);
44 if (loc_code) { 45 if (loc_code) {
45 int loc_len = strlen(loc_code); 46 int loc_len = strlen(loc_code);
46 if (loc_len < sizeof(dev->dev.name)) { 47 if (loc_len < sizeof(dev->dev.name)) {
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index e6cc34a67053..f368668d97b3 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -2,6 +2,7 @@
2#define _PSERIES_PLPAR_WRAPPERS_H 2#define _PSERIES_PLPAR_WRAPPERS_H
3 3
4#include <linux/string.h> 4#include <linux/string.h>
5#include <linux/irqflags.h>
5 6
6#include <asm/hvcall.h> 7#include <asm/hvcall.h>
7#include <asm/paca.h> 8#include <asm/paca.h>
@@ -41,7 +42,14 @@ static inline long extended_cede_processor(unsigned long latency_hint)
41 u8 old_latency_hint = get_cede_latency_hint(); 42 u8 old_latency_hint = get_cede_latency_hint();
42 43
43 set_cede_latency_hint(latency_hint); 44 set_cede_latency_hint(latency_hint);
45
44 rc = cede_processor(); 46 rc = cede_processor();
47#ifdef CONFIG_TRACE_IRQFLAGS
48 /* Ensure that H_CEDE returns with IRQs on */
49 if (WARN_ON(!(mfmsr() & MSR_EE)))
50 __hard_irq_enable();
51#endif
52
45 set_cede_latency_hint(old_latency_hint); 53 set_cede_latency_hint(old_latency_hint);
46 54
47 return rc; 55 return rc;
@@ -304,4 +312,14 @@ static inline long disable_reloc_on_exceptions(void) {
304 return plpar_set_mode(0, 3, 0, 0); 312 return plpar_set_mode(0, 3, 0, 0);
305} 313}
306 314
315static inline long plapr_set_ciabr(unsigned long ciabr)
316{
317 return plpar_set_mode(0, 1, ciabr, 0);
318}
319
320static inline long plapr_set_watchpoint0(unsigned long dawr0, unsigned long dawrx0)
321{
322 return plpar_set_mode(0, 2, dawr0, dawrx0);
323}
324
307#endif /* _PSERIES_PLPAR_WRAPPERS_H */ 325#endif /* _PSERIES_PLPAR_WRAPPERS_H */
diff --git a/arch/powerpc/platforms/pseries/pseries_energy.c b/arch/powerpc/platforms/pseries/pseries_energy.c
index af281dce510a..a91e6dadda2c 100644
--- a/arch/powerpc/platforms/pseries/pseries_energy.c
+++ b/arch/powerpc/platforms/pseries/pseries_energy.c
@@ -21,6 +21,7 @@
21#include <asm/cputhreads.h> 21#include <asm/cputhreads.h>
22#include <asm/page.h> 22#include <asm/page.h>
23#include <asm/hvcall.h> 23#include <asm/hvcall.h>
24#include <asm/firmware.h>
24 25
25 26
26#define MODULE_VERS "1.0" 27#define MODULE_VERS "1.0"
@@ -32,40 +33,6 @@ static int sysfs_entries;
32 33
33/* Helper routines */ 34/* Helper routines */
34 35
35/*
36 * Routine to detect firmware support for hcall
37 * return 1 if H_BEST_ENERGY is supported
38 * else return 0
39 */
40
41static int check_for_h_best_energy(void)
42{
43 struct device_node *rtas = NULL;
44 const char *hypertas, *s;
45 int length;
46 int rc = 0;
47
48 rtas = of_find_node_by_path("/rtas");
49 if (!rtas)
50 return 0;
51
52 hypertas = of_get_property(rtas, "ibm,hypertas-functions", &length);
53 if (!hypertas) {
54 of_node_put(rtas);
55 return 0;
56 }
57
58 /* hypertas will have list of strings with hcall names */
59 for (s = hypertas; s < hypertas + length; s += strlen(s) + 1) {
60 if (!strncmp("hcall-best-energy-1", s, 19)) {
61 rc = 1; /* Found the string */
62 break;
63 }
64 }
65 of_node_put(rtas);
66 return rc;
67}
68
69/* Helper Routines to convert between drc_index to cpu numbers */ 36/* Helper Routines to convert between drc_index to cpu numbers */
70 37
71static u32 cpu_to_drc_index(int cpu) 38static u32 cpu_to_drc_index(int cpu)
@@ -262,7 +229,7 @@ static int __init pseries_energy_init(void)
262 int cpu, err; 229 int cpu, err;
263 struct device *cpu_dev; 230 struct device *cpu_dev;
264 231
265 if (!check_for_h_best_energy()) { 232 if (!firmware_has_feature(FW_FEATURE_BEST_ENERGY)) {
266 printk(KERN_INFO "Hypercall H_BEST_ENERGY not supported\n"); 233 printk(KERN_INFO "Hypercall H_BEST_ENERGY not supported\n");
267 return 0; 234 return 0;
268 } 235 }
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 527e12c9573b..8bcc9ca6682f 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -65,6 +65,7 @@
65#include <asm/smp.h> 65#include <asm/smp.h>
66#include <asm/firmware.h> 66#include <asm/firmware.h>
67#include <asm/eeh.h> 67#include <asm/eeh.h>
68#include <asm/reg.h>
68 69
69#include "plpar_wrappers.h" 70#include "plpar_wrappers.h"
70#include "pseries.h" 71#include "pseries.h"
@@ -375,7 +376,7 @@ static void pSeries_idle(void)
375 * to ever be a problem in practice we can move this into a kernel thread to 376 * to ever be a problem in practice we can move this into a kernel thread to
376 * finish off the process later in boot. 377 * finish off the process later in boot.
377 */ 378 */
378static int __init pSeries_enable_reloc_on_exc(void) 379long pSeries_enable_reloc_on_exc(void)
379{ 380{
380 long rc; 381 long rc;
381 unsigned int delay, total_delay = 0; 382 unsigned int delay, total_delay = 0;
@@ -397,9 +398,9 @@ static int __init pSeries_enable_reloc_on_exc(void)
397 mdelay(delay); 398 mdelay(delay);
398 } 399 }
399} 400}
401EXPORT_SYMBOL(pSeries_enable_reloc_on_exc);
400 402
401#ifdef CONFIG_KEXEC 403long pSeries_disable_reloc_on_exc(void)
402static long pSeries_disable_reloc_on_exc(void)
403{ 404{
404 long rc; 405 long rc;
405 406
@@ -410,7 +411,9 @@ static long pSeries_disable_reloc_on_exc(void)
410 mdelay(get_longbusy_msecs(rc)); 411 mdelay(get_longbusy_msecs(rc));
411 } 412 }
412} 413}
414EXPORT_SYMBOL(pSeries_disable_reloc_on_exc);
413 415
416#ifdef CONFIG_KEXEC
414static void pSeries_machine_kexec(struct kimage *image) 417static void pSeries_machine_kexec(struct kimage *image)
415{ 418{
416 long rc; 419 long rc;
@@ -498,6 +501,14 @@ static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
498 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 501 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
499} 502}
500 503
504static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
505{
506 /* PAPR says we can't set HYP */
507 dawrx &= ~DAWRX_HYP;
508
509 return plapr_set_watchpoint0(dawr, dawrx);
510}
511
501#define CMO_CHARACTERISTICS_TOKEN 44 512#define CMO_CHARACTERISTICS_TOKEN 44
502#define CMO_MAXLENGTH 1026 513#define CMO_MAXLENGTH 1026
503 514
@@ -604,6 +615,9 @@ static void __init pSeries_init_early(void)
604 else if (firmware_has_feature(FW_FEATURE_DABR)) 615 else if (firmware_has_feature(FW_FEATURE_DABR))
605 ppc_md.set_dabr = pseries_set_dabr; 616 ppc_md.set_dabr = pseries_set_dabr;
606 617
618 if (firmware_has_feature(FW_FEATURE_SET_MODE))
619 ppc_md.set_dawr = pseries_set_dawr;
620
607 pSeries_cmo_feature_init(); 621 pSeries_cmo_feature_init();
608 iommu_init_early_pSeries(); 622 iommu_init_early_pSeries();
609 623
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 80cd0be71e06..12bc8c3663ad 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -42,6 +42,7 @@
42#include <asm/vdso_datapage.h> 42#include <asm/vdso_datapage.h>
43#include <asm/cputhreads.h> 43#include <asm/cputhreads.h>
44#include <asm/xics.h> 44#include <asm/xics.h>
45#include <asm/dbell.h>
45 46
46#include "plpar_wrappers.h" 47#include "plpar_wrappers.h"
47#include "pseries.h" 48#include "pseries.h"
@@ -54,6 +55,11 @@
54 */ 55 */
55static cpumask_var_t of_spin_mask; 56static cpumask_var_t of_spin_mask;
56 57
58/*
59 * If we multiplex IPI mechanisms, store the appropriate XICS IPI mechanism here
60 */
61static void (*xics_cause_ipi)(int cpu, unsigned long data);
62
57/* Query where a cpu is now. Return codes #defined in plpar_wrappers.h */ 63/* Query where a cpu is now. Return codes #defined in plpar_wrappers.h */
58int smp_query_cpu_stopped(unsigned int pcpu) 64int smp_query_cpu_stopped(unsigned int pcpu)
59{ 65{
@@ -137,6 +143,8 @@ static void smp_xics_setup_cpu(int cpu)
137{ 143{
138 if (cpu != boot_cpuid) 144 if (cpu != boot_cpuid)
139 xics_setup_cpu(); 145 xics_setup_cpu();
146 if (cpu_has_feature(CPU_FTR_DBELL))
147 doorbell_setup_this_cpu();
140 148
141 if (firmware_has_feature(FW_FEATURE_SPLPAR)) 149 if (firmware_has_feature(FW_FEATURE_SPLPAR))
142 vpa_init(cpu); 150 vpa_init(cpu);
@@ -195,6 +203,27 @@ static int smp_pSeries_cpu_bootable(unsigned int nr)
195 return 1; 203 return 1;
196} 204}
197 205
206/* Only used on systems that support multiple IPI mechanisms */
207static void pSeries_cause_ipi_mux(int cpu, unsigned long data)
208{
209 if (cpumask_test_cpu(cpu, cpu_sibling_mask(smp_processor_id())))
210 doorbell_cause_ipi(cpu, data);
211 else
212 xics_cause_ipi(cpu, data);
213}
214
215static __init int pSeries_smp_probe(void)
216{
217 int ret = xics_smp_probe();
218
219 if (cpu_has_feature(CPU_FTR_DBELL)) {
220 xics_cause_ipi = smp_ops->cause_ipi;
221 smp_ops->cause_ipi = pSeries_cause_ipi_mux;
222 }
223
224 return ret;
225}
226
198static struct smp_ops_t pSeries_mpic_smp_ops = { 227static struct smp_ops_t pSeries_mpic_smp_ops = {
199 .message_pass = smp_mpic_message_pass, 228 .message_pass = smp_mpic_message_pass,
200 .probe = smp_mpic_probe, 229 .probe = smp_mpic_probe,
@@ -204,8 +233,8 @@ static struct smp_ops_t pSeries_mpic_smp_ops = {
204 233
205static struct smp_ops_t pSeries_xics_smp_ops = { 234static struct smp_ops_t pSeries_xics_smp_ops = {
206 .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ 235 .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */
207 .cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */ 236 .cause_ipi = NULL, /* Filled at runtime by pSeries_smp_probe() */
208 .probe = xics_smp_probe, 237 .probe = pSeries_smp_probe,
209 .kick_cpu = smp_pSeries_kick_cpu, 238 .kick_cpu = smp_pSeries_kick_cpu,
210 .setup_cpu = smp_xics_setup_cpu, 239 .setup_cpu = smp_xics_setup_cpu,
211 .cpu_bootable = smp_pSeries_cpu_bootable, 240 .cpu_bootable = smp_pSeries_cpu_bootable,
diff --git a/arch/powerpc/platforms/wsp/Makefile b/arch/powerpc/platforms/wsp/Makefile
index 56817ac98fc9..162fc60125a2 100644
--- a/arch/powerpc/platforms/wsp/Makefile
+++ b/arch/powerpc/platforms/wsp/Makefile
@@ -1,4 +1,4 @@
1ccflags-y += -mno-minimal-toc 1ccflags-y += $(NO_MINIMAL_TOC)
2 2
3obj-y += setup.o ics.o wsp.o 3obj-y += setup.o ics.o wsp.o
4obj-$(CONFIG_PPC_PSR2) += psr2.o 4obj-$(CONFIG_PPC_PSR2) += psr2.o
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a57600b3a4e3..b0a518e97599 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -1,6 +1,6 @@
1subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror 1subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
2 2
3ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 3ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
4 4
5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o 5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) 6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
@@ -26,7 +26,6 @@ obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o
26obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o 26obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o
27obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o 27obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
28obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ 28obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
29obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
30mv64x60-$(CONFIG_PCI) += mv64x60_pci.o 29mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
31obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \ 30obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
32 mv64x60_udbg.o 31 mv64x60_udbg.o
@@ -37,6 +36,7 @@ obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
37obj-$(CONFIG_PPC_I8259) += i8259.o 36obj-$(CONFIG_PPC_I8259) += i8259.o
38obj-$(CONFIG_IPIC) += ipic.o 37obj-$(CONFIG_IPIC) += ipic.o
39obj-$(CONFIG_4xx) += uic.o 38obj-$(CONFIG_4xx) += uic.o
39obj-$(CONFIG_PPC4xx_OCM) += ppc4xx_ocm.o
40obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o 40obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o
41obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o 41obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o
42obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o 42obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o
diff --git a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
index 8cf93f029e17..afc2dbf37011 100644
--- a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
+++ b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
@@ -203,6 +203,7 @@ static struct of_device_id mpc85xx_l2ctlr_of_match[] = {
203 { .compatible = "fsl,p1024-l2-cache-controller",}, 203 { .compatible = "fsl,p1024-l2-cache-controller",},
204 { .compatible = "fsl,p1015-l2-cache-controller",}, 204 { .compatible = "fsl,p1015-l2-cache-controller",},
205 { .compatible = "fsl,p1010-l2-cache-controller",}, 205 { .compatible = "fsl,p1010-l2-cache-controller",},
206 { .compatible = "fsl,bsc9131-l2-cache-controller",},
206 {}, 207 {},
207}; 208};
208 209
diff --git a/arch/powerpc/sysdev/fsl_ifc.c b/arch/powerpc/sysdev/fsl_ifc.c
index 2a36fd6a9583..d7fc72239144 100644
--- a/arch/powerpc/sysdev/fsl_ifc.c
+++ b/arch/powerpc/sysdev/fsl_ifc.c
@@ -63,7 +63,7 @@ int fsl_ifc_find(phys_addr_t addr_base)
63 return -ENODEV; 63 return -ENODEV;
64 64
65 for (i = 0; i < ARRAY_SIZE(fsl_ifc_ctrl_dev->regs->cspr_cs); i++) { 65 for (i = 0; i < ARRAY_SIZE(fsl_ifc_ctrl_dev->regs->cspr_cs); i++) {
66 __be32 cspr = in_be32(&fsl_ifc_ctrl_dev->regs->cspr_cs[i].cspr); 66 u32 cspr = in_be32(&fsl_ifc_ctrl_dev->regs->cspr_cs[i].cspr);
67 if (cspr & CSPR_V && (cspr & CSPR_BA) == 67 if (cspr & CSPR_V && (cspr & CSPR_BA) ==
68 convert_ifc_address(addr_base)) 68 convert_ifc_address(addr_base))
69 return i; 69 return i;
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index 300be2d06a26..6bc5a546d49f 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -74,8 +74,8 @@ int fsl_lbc_find(phys_addr_t addr_base)
74 74
75 lbc = fsl_lbc_ctrl_dev->regs; 75 lbc = fsl_lbc_ctrl_dev->regs;
76 for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) { 76 for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) {
77 __be32 br = in_be32(&lbc->bank[i].br); 77 u32 br = in_be32(&lbc->bank[i].br);
78 __be32 or = in_be32(&lbc->bank[i].or); 78 u32 or = in_be32(&lbc->bank[i].or);
79 79
80 if (br & BR_V && (br & or & BR_BA) == fsl_lbc_addr(addr_base)) 80 if (br & BR_V && (br & or & BR_BA) == fsl_lbc_addr(addr_base))
81 return i; 81 return i;
@@ -97,7 +97,7 @@ EXPORT_SYMBOL(fsl_lbc_find);
97int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm) 97int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
98{ 98{
99 int bank; 99 int bank;
100 __be32 br; 100 u32 br;
101 struct fsl_lbc_regs __iomem *lbc; 101 struct fsl_lbc_regs __iomem *lbc;
102 102
103 bank = fsl_lbc_find(addr_base); 103 bank = fsl_lbc_find(addr_base);
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 6e53d97abd3f..178c99427b1c 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -28,7 +28,7 @@
28#include "fsl_msi.h" 28#include "fsl_msi.h"
29#include "fsl_pci.h" 29#include "fsl_pci.h"
30 30
31LIST_HEAD(msi_head); 31static LIST_HEAD(msi_head);
32 32
33struct fsl_msi_feature { 33struct fsl_msi_feature {
34 u32 fsl_pic_ip; 34 u32 fsl_pic_ip;
@@ -130,7 +130,7 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
130 struct pci_controller *hose = pci_bus_to_host(pdev->bus); 130 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
131 u64 address; /* Physical address of the MSIIR */ 131 u64 address; /* Physical address of the MSIIR */
132 int len; 132 int len;
133 const u64 *reg; 133 const __be64 *reg;
134 134
135 /* If the msi-address-64 property exists, then use it */ 135 /* If the msi-address-64 property exists, then use it */
136 reg = of_get_property(hose->dn, "msi-address-64", &len); 136 reg = of_get_property(hose->dn, "msi-address-64", &len);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 92a5915b1827..682084dba19b 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -421,13 +421,16 @@ void fsl_pcibios_fixup_bus(struct pci_bus *bus)
421 } 421 }
422} 422}
423 423
424int __init fsl_add_bridge(struct device_node *dev, int is_primary) 424int __init fsl_add_bridge(struct platform_device *pdev, int is_primary)
425{ 425{
426 int len; 426 int len;
427 struct pci_controller *hose; 427 struct pci_controller *hose;
428 struct resource rsrc; 428 struct resource rsrc;
429 const int *bus_range; 429 const int *bus_range;
430 u8 hdr_type, progif; 430 u8 hdr_type, progif;
431 struct device_node *dev;
432
433 dev = pdev->dev.of_node;
431 434
432 if (!of_device_is_available(dev)) { 435 if (!of_device_is_available(dev)) {
433 pr_warning("%s: disabled\n", dev->full_name); 436 pr_warning("%s: disabled\n", dev->full_name);
@@ -453,6 +456,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
453 if (!hose) 456 if (!hose)
454 return -ENOMEM; 457 return -ENOMEM;
455 458
459 /* set platform device as the parent */
460 hose->parent = &pdev->dev;
456 hose->first_busno = bus_range ? bus_range[0] : 0x0; 461 hose->first_busno = bus_range ? bus_range[0] : 0x0;
457 hose->last_busno = bus_range ? bus_range[1] : 0xff; 462 hose->last_busno = bus_range ? bus_range[1] : 0xff;
458 463
@@ -827,13 +832,18 @@ static const struct of_device_id pci_ids[] = {
827 { .compatible = "fsl,mpc8548-pcie", }, 832 { .compatible = "fsl,mpc8548-pcie", },
828 { .compatible = "fsl,mpc8610-pci", }, 833 { .compatible = "fsl,mpc8610-pci", },
829 { .compatible = "fsl,mpc8641-pcie", }, 834 { .compatible = "fsl,mpc8641-pcie", },
835 { .compatible = "fsl,qoriq-pcie-v2.1", },
836 { .compatible = "fsl,qoriq-pcie-v2.2", },
837 { .compatible = "fsl,qoriq-pcie-v2.3", },
838 { .compatible = "fsl,qoriq-pcie-v2.4", },
839
840 /*
841 * The following entries are for compatibility with older device
842 * trees.
843 */
830 { .compatible = "fsl,p1022-pcie", }, 844 { .compatible = "fsl,p1022-pcie", },
831 { .compatible = "fsl,p1010-pcie", },
832 { .compatible = "fsl,p1023-pcie", },
833 { .compatible = "fsl,p4080-pcie", }, 845 { .compatible = "fsl,p4080-pcie", },
834 { .compatible = "fsl,qoriq-pcie-v2.4", }, 846
835 { .compatible = "fsl,qoriq-pcie-v2.3", },
836 { .compatible = "fsl,qoriq-pcie-v2.2", },
837 {}, 847 {},
838}; 848};
839 849
@@ -880,7 +890,7 @@ static int fsl_pci_probe(struct platform_device *pdev)
880#endif 890#endif
881 891
882 node = pdev->dev.of_node; 892 node = pdev->dev.of_node;
883 ret = fsl_add_bridge(node, fsl_pci_primary == node); 893 ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
884 894
885#ifdef CONFIG_SWIOTLB 895#ifdef CONFIG_SWIOTLB
886 if (ret == 0) { 896 if (ret == 0) {
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index d078537adece..c495c00c8740 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -91,7 +91,7 @@ struct ccsr_pci {
91 __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */ 91 __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */
92}; 92};
93 93
94extern int fsl_add_bridge(struct device_node *dev, int is_primary); 94extern int fsl_add_bridge(struct platform_device *pdev, int is_primary);
95extern void fsl_pcibios_fixup_bus(struct pci_bus *bus); 95extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
96extern int mpc83xx_add_bridge(struct device_node *dev); 96extern int mpc83xx_add_bridge(struct device_node *dev);
97u64 fsl_pci_immrbar_base(struct pci_controller *hose); 97u64 fsl_pci_immrbar_base(struct pci_controller *hose);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 97118dc3d285..228cf91b91c1 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -58,10 +58,10 @@ phys_addr_t get_immrbase(void)
58 if (soc) { 58 if (soc) {
59 int size; 59 int size;
60 u32 naddr; 60 u32 naddr;
61 const u32 *prop = of_get_property(soc, "#address-cells", &size); 61 const __be32 *prop = of_get_property(soc, "#address-cells", &size);
62 62
63 if (prop && size == 4) 63 if (prop && size == 4)
64 naddr = *prop; 64 naddr = be32_to_cpup(prop);
65 else 65 else
66 naddr = 2; 66 naddr = 2;
67 67
diff --git a/arch/powerpc/sysdev/mpc5xxx_clocks.c b/arch/powerpc/sysdev/mpc5xxx_clocks.c
index 96f815a55dfd..5492dc5f56f4 100644
--- a/arch/powerpc/sysdev/mpc5xxx_clocks.c
+++ b/arch/powerpc/sysdev/mpc5xxx_clocks.c
@@ -9,9 +9,9 @@
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/of_platform.h> 10#include <linux/of_platform.h>
11#include <linux/export.h> 11#include <linux/export.h>
12#include <asm/mpc5xxx.h>
12 13
13unsigned int 14unsigned long mpc5xxx_get_bus_frequency(struct device_node *node)
14mpc5xxx_get_bus_frequency(struct device_node *node)
15{ 15{
16 struct device_node *np; 16 struct device_node *np;
17 const unsigned int *p_bus_freq = NULL; 17 const unsigned int *p_bus_freq = NULL;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 3b2efd41abf2..d30e6a676c89 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -54,7 +54,7 @@ static DEFINE_RAW_SPINLOCK(mpic_lock);
54 54
55#ifdef CONFIG_PPC32 /* XXX for now */ 55#ifdef CONFIG_PPC32 /* XXX for now */
56#ifdef CONFIG_IRQ_ALL_CPUS 56#ifdef CONFIG_IRQ_ALL_CPUS
57#define distribute_irqs (1) 57#define distribute_irqs (!(mpic->flags & MPIC_SINGLE_DEST_CPU))
58#else 58#else
59#define distribute_irqs (0) 59#define distribute_irqs (0)
60#endif 60#endif
@@ -1182,6 +1182,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1182 const char *vers; 1182 const char *vers;
1183 const u32 *psrc; 1183 const u32 *psrc;
1184 u32 last_irq; 1184 u32 last_irq;
1185 u32 fsl_version = 0;
1185 1186
1186 /* Default MPIC search parameters */ 1187 /* Default MPIC search parameters */
1187 static const struct of_device_id __initconst mpic_device_id[] = { 1188 static const struct of_device_id __initconst mpic_device_id[] = {
@@ -1314,7 +1315,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1314 mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); 1315 mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
1315 1316
1316 if (mpic->flags & MPIC_FSL) { 1317 if (mpic->flags & MPIC_FSL) {
1317 u32 brr1, version; 1318 u32 brr1;
1318 int ret; 1319 int ret;
1319 1320
1320 /* 1321 /*
@@ -1327,7 +1328,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1327 1328
1328 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs, 1329 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
1329 MPIC_FSL_BRR1); 1330 MPIC_FSL_BRR1);
1330 version = brr1 & MPIC_FSL_BRR1_VER; 1331 fsl_version = brr1 & MPIC_FSL_BRR1_VER;
1331 1332
1332 /* Error interrupt mask register (EIMR) is required for 1333 /* Error interrupt mask register (EIMR) is required for
1333 * handling individual device error interrupts. EIMR 1334 * handling individual device error interrupts. EIMR
@@ -1342,11 +1343,30 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1342 * is the number of vectors which have been consumed by 1343 * is the number of vectors which have been consumed by
1343 * ipis and timer interrupts. 1344 * ipis and timer interrupts.
1344 */ 1345 */
1345 if (version >= 0x401) { 1346 if (fsl_version >= 0x401) {
1346 ret = mpic_setup_error_int(mpic, intvec_top - 12); 1347 ret = mpic_setup_error_int(mpic, intvec_top - 12);
1347 if (ret) 1348 if (ret)
1348 return NULL; 1349 return NULL;
1349 } 1350 }
1351
1352 }
1353
1354 /*
1355 * EPR is only available starting with v4.0. To support
1356 * platforms that don't know the MPIC version at compile-time,
1357 * such as qemu-e500, turn off coreint if this MPIC doesn't
1358 * support it. Note that we never enable it if it wasn't
1359 * requested in the first place.
1360 *
1361 * This is done outside the MPIC_FSL check, so that we
1362 * also disable coreint if the MPIC node doesn't have
1363 * an "fsl,mpic" compatible at all. This will be the case
1364 * with device trees generated by older versions of QEMU.
1365 * fsl_version will be zero if MPIC_FSL is not set.
1366 */
1367 if (fsl_version < 0x400 && (flags & MPIC_ENABLE_COREINT)) {
1368 WARN_ON(ppc_md.get_irq != mpic_get_coreint_irq);
1369 ppc_md.get_irq = mpic_get_irq;
1350 } 1370 }
1351 1371
1352 /* Reset */ 1372 /* Reset */
diff --git a/arch/powerpc/sysdev/ppc4xx_ocm.c b/arch/powerpc/sysdev/ppc4xx_ocm.c
new file mode 100644
index 000000000000..1b15f93479c3
--- /dev/null
+++ b/arch/powerpc/sysdev/ppc4xx_ocm.c
@@ -0,0 +1,415 @@
1/*
2 * PowerPC 4xx OCM memory allocation support
3 *
4 * (C) Copyright 2009, Applied Micro Circuits Corporation
5 * Victor Gallardo (vgallardo@amcc.com)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <linux/kernel.h>
27#include <linux/dma-mapping.h>
28#include <linux/of.h>
29#include <asm/rheap.h>
30#include <asm/ppc4xx_ocm.h>
31#include <linux/slab.h>
32#include <linux/debugfs.h>
33
34#define OCM_DISABLED 0
35#define OCM_ENABLED 1
36
37struct ocm_block {
38 struct list_head list;
39 void __iomem *addr;
40 int size;
41 const char *owner;
42};
43
44/* non-cached or cached region */
45struct ocm_region {
46 phys_addr_t phys;
47 void __iomem *virt;
48
49 int memtotal;
50 int memfree;
51
52 rh_info_t *rh;
53 struct list_head list;
54};
55
56struct ocm_info {
57 int index;
58 int status;
59 int ready;
60
61 phys_addr_t phys;
62
63 int alignment;
64 int memtotal;
65 int cache_size;
66
67 struct ocm_region nc; /* non-cached region */
68 struct ocm_region c; /* cached region */
69};
70
71static struct ocm_info *ocm_nodes;
72static int ocm_count;
73
74static struct ocm_info *ocm_get_node(unsigned int index)
75{
76 if (index >= ocm_count) {
77 printk(KERN_ERR "PPC4XX OCM: invalid index");
78 return NULL;
79 }
80
81 return &ocm_nodes[index];
82}
83
84static int ocm_free_region(struct ocm_region *ocm_reg, const void *addr)
85{
86 struct ocm_block *blk, *tmp;
87 unsigned long offset;
88
89 if (!ocm_reg->virt)
90 return 0;
91
92 list_for_each_entry_safe(blk, tmp, &ocm_reg->list, list) {
93 if (blk->addr == addr) {
94 offset = addr - ocm_reg->virt;
95 ocm_reg->memfree += blk->size;
96 rh_free(ocm_reg->rh, offset);
97 list_del(&blk->list);
98 kfree(blk);
99 return 1;
100 }
101 }
102
103 return 0;
104}
105
106static void __init ocm_init_node(int count, struct device_node *node)
107{
108 struct ocm_info *ocm;
109
110 const unsigned int *cell_index;
111 const unsigned int *cache_size;
112 int len;
113
114 struct resource rsrc;
115 int ioflags;
116
117 ocm = ocm_get_node(count);
118
119 cell_index = of_get_property(node, "cell-index", &len);
120 if (!cell_index) {
121 printk(KERN_ERR "PPC4XX OCM: missing cell-index property");
122 return;
123 }
124 ocm->index = *cell_index;
125
126 if (of_device_is_available(node))
127 ocm->status = OCM_ENABLED;
128
129 cache_size = of_get_property(node, "cached-region-size", &len);
130 if (cache_size)
131 ocm->cache_size = *cache_size;
132
133 if (of_address_to_resource(node, 0, &rsrc)) {
134 printk(KERN_ERR "PPC4XX OCM%d: could not get resource address\n",
135 ocm->index);
136 return;
137 }
138
139 ocm->phys = rsrc.start;
140 ocm->memtotal = (rsrc.end - rsrc.start + 1);
141
142 printk(KERN_INFO "PPC4XX OCM%d: %d Bytes (%s)\n",
143 ocm->index, ocm->memtotal,
144 (ocm->status == OCM_DISABLED) ? "disabled" : "enabled");
145
146 if (ocm->status == OCM_DISABLED)
147 return;
148
149 /* request region */
150
151 if (!request_mem_region(ocm->phys, ocm->memtotal, "ppc4xx_ocm")) {
152 printk(KERN_ERR "PPC4XX OCM%d: could not request region\n",
153 ocm->index);
154 return;
155 }
156
157 /* Configure non-cached and cached regions */
158
159 ocm->nc.phys = ocm->phys;
160 ocm->nc.memtotal = ocm->memtotal - ocm->cache_size;
161 ocm->nc.memfree = ocm->nc.memtotal;
162
163 ocm->c.phys = ocm->phys + ocm->nc.memtotal;
164 ocm->c.memtotal = ocm->cache_size;
165 ocm->c.memfree = ocm->c.memtotal;
166
167 if (ocm->nc.memtotal == 0)
168 ocm->nc.phys = 0;
169
170 if (ocm->c.memtotal == 0)
171 ocm->c.phys = 0;
172
173 printk(KERN_INFO "PPC4XX OCM%d: %d Bytes (non-cached)\n",
174 ocm->index, ocm->nc.memtotal);
175
176 printk(KERN_INFO "PPC4XX OCM%d: %d Bytes (cached)\n",
177 ocm->index, ocm->c.memtotal);
178
179 /* ioremap the non-cached region */
180 if (ocm->nc.memtotal) {
181 ioflags = _PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_EXEC;
182 ocm->nc.virt = __ioremap(ocm->nc.phys, ocm->nc.memtotal,
183 ioflags);
184
185 if (!ocm->nc.virt) {
186 printk(KERN_ERR
187 "PPC4XX OCM%d: failed to ioremap non-cached memory\n",
188 ocm->index);
189 ocm->nc.memfree = 0;
190 return;
191 }
192 }
193
194 /* ioremap the cached region */
195
196 if (ocm->c.memtotal) {
197 ioflags = _PAGE_EXEC;
198 ocm->c.virt = __ioremap(ocm->c.phys, ocm->c.memtotal,
199 ioflags);
200
201 if (!ocm->c.virt) {
202 printk(KERN_ERR
203 "PPC4XX OCM%d: failed to ioremap cached memory\n",
204 ocm->index);
205 ocm->c.memfree = 0;
206 return;
207 }
208 }
209
210 /* Create Remote Heaps */
211
212 ocm->alignment = 4; /* default 4 byte alignment */
213
214 if (ocm->nc.virt) {
215 ocm->nc.rh = rh_create(ocm->alignment);
216 rh_attach_region(ocm->nc.rh, 0, ocm->nc.memtotal);
217 }
218
219 if (ocm->c.virt) {
220 ocm->c.rh = rh_create(ocm->alignment);
221 rh_attach_region(ocm->c.rh, 0, ocm->c.memtotal);
222 }
223
224 INIT_LIST_HEAD(&ocm->nc.list);
225 INIT_LIST_HEAD(&ocm->c.list);
226
227 ocm->ready = 1;
228
229 return;
230}
231
232static int ocm_debugfs_show(struct seq_file *m, void *v)
233{
234 struct ocm_block *blk, *tmp;
235 unsigned int i;
236
237 for (i = 0; i < ocm_count; i++) {
238 struct ocm_info *ocm = ocm_get_node(i);
239
240 if (!ocm || !ocm->ready)
241 continue;
242
243 seq_printf(m, "PPC4XX OCM : %d\n", ocm->index);
244 seq_printf(m, "PhysAddr : 0x%llx\n", ocm->phys);
245 seq_printf(m, "MemTotal : %d Bytes\n", ocm->memtotal);
246 seq_printf(m, "MemTotal(NC) : %d Bytes\n", ocm->nc.memtotal);
247 seq_printf(m, "MemTotal(C) : %d Bytes\n", ocm->c.memtotal);
248
249 seq_printf(m, "\n");
250
251 seq_printf(m, "NC.PhysAddr : 0x%llx\n", ocm->nc.phys);
252 seq_printf(m, "NC.VirtAddr : 0x%p\n", ocm->nc.virt);
253 seq_printf(m, "NC.MemTotal : %d Bytes\n", ocm->nc.memtotal);
254 seq_printf(m, "NC.MemFree : %d Bytes\n", ocm->nc.memfree);
255
256 list_for_each_entry_safe(blk, tmp, &ocm->nc.list, list) {
257 seq_printf(m, "NC.MemUsed : %d Bytes (%s)\n",
258 blk->size, blk->owner);
259 }
260
261 seq_printf(m, "\n");
262
263 seq_printf(m, "C.PhysAddr : 0x%llx\n", ocm->c.phys);
264 seq_printf(m, "C.VirtAddr : 0x%p\n", ocm->c.virt);
265 seq_printf(m, "C.MemTotal : %d Bytes\n", ocm->c.memtotal);
266 seq_printf(m, "C.MemFree : %d Bytes\n", ocm->c.memfree);
267
268 list_for_each_entry_safe(blk, tmp, &ocm->c.list, list) {
269 seq_printf(m, "C.MemUsed : %d Bytes (%s)\n",
270 blk->size, blk->owner);
271 }
272
273 seq_printf(m, "\n");
274 }
275
276 return 0;
277}
278
279static int ocm_debugfs_open(struct inode *inode, struct file *file)
280{
281 return single_open(file, ocm_debugfs_show, NULL);
282}
283
284static const struct file_operations ocm_debugfs_fops = {
285 .open = ocm_debugfs_open,
286 .read = seq_read,
287 .llseek = seq_lseek,
288 .release = single_release,
289};
290
291static int ocm_debugfs_init(void)
292{
293 struct dentry *junk;
294
295 junk = debugfs_create_dir("ppc4xx_ocm", 0);
296 if (!junk) {
297 printk(KERN_ALERT "debugfs ppc4xx ocm: failed to create dir\n");
298 return -1;
299 }
300
301 if (debugfs_create_file("info", 0644, junk, NULL, &ocm_debugfs_fops)) {
302 printk(KERN_ALERT "debugfs ppc4xx ocm: failed to create file\n");
303 return -1;
304 }
305
306 return 0;
307}
308
309void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
310 int flags, const char *owner)
311{
312 void __iomem *addr = NULL;
313 unsigned long offset;
314 struct ocm_info *ocm;
315 struct ocm_region *ocm_reg;
316 struct ocm_block *ocm_blk;
317 int i;
318
319 for (i = 0; i < ocm_count; i++) {
320 ocm = ocm_get_node(i);
321
322 if (!ocm || !ocm->ready)
323 continue;
324
325 if (flags == PPC4XX_OCM_NON_CACHED)
326 ocm_reg = &ocm->nc;
327 else
328 ocm_reg = &ocm->c;
329
330 if (!ocm_reg->virt)
331 continue;
332
333 if (align < ocm->alignment)
334 align = ocm->alignment;
335
336 offset = rh_alloc_align(ocm_reg->rh, size, align, NULL);
337
338 if (IS_ERR_VALUE(offset))
339 continue;
340
341 ocm_blk = kzalloc(sizeof(struct ocm_block *), GFP_KERNEL);
342 if (!ocm_blk) {
343 printk(KERN_ERR "PPC4XX OCM: could not allocate ocm block");
344 rh_free(ocm_reg->rh, offset);
345 break;
346 }
347
348 *phys = ocm_reg->phys + offset;
349 addr = ocm_reg->virt + offset;
350 size = ALIGN(size, align);
351
352 ocm_blk->addr = addr;
353 ocm_blk->size = size;
354 ocm_blk->owner = owner;
355 list_add_tail(&ocm_blk->list, &ocm_reg->list);
356
357 ocm_reg->memfree -= size;
358
359 break;
360 }
361
362 return addr;
363}
364
365void ppc4xx_ocm_free(const void *addr)
366{
367 int i;
368
369 if (!addr)
370 return;
371
372 for (i = 0; i < ocm_count; i++) {
373 struct ocm_info *ocm = ocm_get_node(i);
374
375 if (!ocm || !ocm->ready)
376 continue;
377
378 if (ocm_free_region(&ocm->nc, addr) ||
379 ocm_free_region(&ocm->c, addr))
380 return;
381 }
382}
383
384static int __init ppc4xx_ocm_init(void)
385{
386 struct device_node *np;
387 int count;
388
389 count = 0;
390 for_each_compatible_node(np, NULL, "ibm,ocm")
391 count++;
392
393 if (!count)
394 return 0;
395
396 ocm_nodes = kzalloc((count * sizeof(struct ocm_info)), GFP_KERNEL);
397 if (!ocm_nodes) {
398 printk(KERN_ERR "PPC4XX OCM: failed to allocate OCM nodes!\n");
399 return -ENOMEM;
400 }
401
402 ocm_count = count;
403 count = 0;
404
405 for_each_compatible_node(np, NULL, "ibm,ocm") {
406 ocm_init_node(count, np);
407 count++;
408 }
409
410 ocm_debugfs_init();
411
412 return 0;
413}
414
415arch_initcall(ppc4xx_ocm_init);
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c
index c782f85cf7e4..936575d99c5c 100644
--- a/arch/powerpc/sysdev/xics/ics-rtas.c
+++ b/arch/powerpc/sysdev/xics/ics-rtas.c
@@ -213,7 +213,7 @@ static int ics_rtas_host_match(struct ics *ics, struct device_node *node)
213 return !of_device_is_compatible(node, "chrp,iic"); 213 return !of_device_is_compatible(node, "chrp,iic");
214} 214}
215 215
216int ics_rtas_init(void) 216__init int ics_rtas_init(void)
217{ 217{
218 ibm_get_xive = rtas_token("ibm,get-xive"); 218 ibm_get_xive = rtas_token("ibm,get-xive");
219 ibm_set_xive = rtas_token("ibm,set-xive"); 219 ibm_set_xive = rtas_token("ibm,set-xive");
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
index b49fdbd15808..1278788d96e3 100644
--- a/arch/powerpc/xmon/Makefile
+++ b/arch/powerpc/xmon/Makefile
@@ -4,7 +4,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
4 4
5GCOV_PROFILE := n 5GCOV_PROFILE := n
6 6
7ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 7ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
8 8
9obj-y += xmon.o nonstdio.o 9obj-y += xmon.o nonstdio.o
10 10
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 1f8d2f10a432..13f85defabed 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -43,6 +43,7 @@
43#include <asm/setjmp.h> 43#include <asm/setjmp.h>
44#include <asm/reg.h> 44#include <asm/reg.h>
45#include <asm/debug.h> 45#include <asm/debug.h>
46#include <asm/hw_breakpoint.h>
46 47
47#ifdef CONFIG_PPC64 48#ifdef CONFIG_PPC64
48#include <asm/hvcall.h> 49#include <asm/hvcall.h>
@@ -607,7 +608,7 @@ static int xmon_sstep(struct pt_regs *regs)
607 return 1; 608 return 1;
608} 609}
609 610
610static int xmon_dabr_match(struct pt_regs *regs) 611static int xmon_break_match(struct pt_regs *regs)
611{ 612{
612 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) 613 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
613 return 0; 614 return 0;
@@ -740,8 +741,14 @@ static void insert_bpts(void)
740 741
741static void insert_cpu_bpts(void) 742static void insert_cpu_bpts(void)
742{ 743{
743 if (dabr.enabled) 744 struct arch_hw_breakpoint brk;
744 set_dabr(dabr.address | (dabr.enabled & 7), DABRX_ALL); 745
746 if (dabr.enabled) {
747 brk.address = dabr.address;
748 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
749 brk.len = 8;
750 set_breakpoint(&brk);
751 }
745 if (iabr && cpu_has_feature(CPU_FTR_IABR)) 752 if (iabr && cpu_has_feature(CPU_FTR_IABR))
746 mtspr(SPRN_IABR, iabr->address 753 mtspr(SPRN_IABR, iabr->address
747 | (iabr->enabled & (BP_IABR|BP_IABR_TE))); 754 | (iabr->enabled & (BP_IABR|BP_IABR_TE)));
@@ -769,7 +776,7 @@ static void remove_bpts(void)
769 776
770static void remove_cpu_bpts(void) 777static void remove_cpu_bpts(void)
771{ 778{
772 set_dabr(0, 0); 779 hw_breakpoint_disable();
773 if (cpu_has_feature(CPU_FTR_IABR)) 780 if (cpu_has_feature(CPU_FTR_IABR))
774 mtspr(SPRN_IABR, 0); 781 mtspr(SPRN_IABR, 0);
775} 782}
@@ -1138,7 +1145,7 @@ bpt_cmds(void)
1138 printf(badaddr); 1145 printf(badaddr);
1139 break; 1146 break;
1140 } 1147 }
1141 dabr.address &= ~7; 1148 dabr.address &= ~HW_BRK_TYPE_DABR;
1142 dabr.enabled = mode | BP_DABR; 1149 dabr.enabled = mode | BP_DABR;
1143 } 1150 }
1144 break; 1151 break;
@@ -2917,7 +2924,7 @@ static void xmon_init(int enable)
2917 __debugger_bpt = xmon_bpt; 2924 __debugger_bpt = xmon_bpt;
2918 __debugger_sstep = xmon_sstep; 2925 __debugger_sstep = xmon_sstep;
2919 __debugger_iabr_match = xmon_iabr_match; 2926 __debugger_iabr_match = xmon_iabr_match;
2920 __debugger_dabr_match = xmon_dabr_match; 2927 __debugger_break_match = xmon_break_match;
2921 __debugger_fault_handler = xmon_fault_handler; 2928 __debugger_fault_handler = xmon_fault_handler;
2922 } else { 2929 } else {
2923 __debugger = NULL; 2930 __debugger = NULL;
@@ -2925,7 +2932,7 @@ static void xmon_init(int enable)
2925 __debugger_bpt = NULL; 2932 __debugger_bpt = NULL;
2926 __debugger_sstep = NULL; 2933 __debugger_sstep = NULL;
2927 __debugger_iabr_match = NULL; 2934 __debugger_iabr_match = NULL;
2928 __debugger_dabr_match = NULL; 2935 __debugger_break_match = NULL;
2929 __debugger_fault_handler = NULL; 2936 __debugger_fault_handler = NULL;
2930 } 2937 }
2931} 2938}
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ff0e5f3c844e..4ebc7a6e6724 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1054,6 +1054,24 @@ config MICROCODE_OLD_INTERFACE
1054 def_bool y 1054 def_bool y
1055 depends on MICROCODE 1055 depends on MICROCODE
1056 1056
1057config MICROCODE_INTEL_LIB
1058 def_bool y
1059 depends on MICROCODE_INTEL
1060
1061config MICROCODE_INTEL_EARLY
1062 bool "Early load microcode"
1063 depends on MICROCODE_INTEL && BLK_DEV_INITRD
1064 default y
1065 help
1066 This option provides functionality to read additional microcode data
1067 at the beginning of initrd image. The data tells kernel to load
1068 microcode to CPU's as early as possible. No functional change if no
1069 microcode data is glued to the initrd, therefore it's safe to say Y.
1070
1071config MICROCODE_EARLY
1072 def_bool y
1073 depends on MICROCODE_INTEL_EARLY
1074
1057config X86_MSR 1075config X86_MSR
1058 tristate "/dev/cpu/*/msr - Model-specific register support" 1076 tristate "/dev/cpu/*/msr - Model-specific register support"
1059 ---help--- 1077 ---help---
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 43d921b4752c..6825e2efd1b4 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -57,4 +57,18 @@ static inline struct microcode_ops * __init init_amd_microcode(void)
57static inline void __exit exit_amd_microcode(void) {} 57static inline void __exit exit_amd_microcode(void) {}
58#endif 58#endif
59 59
60#ifdef CONFIG_MICROCODE_EARLY
61#define MAX_UCODE_COUNT 128
62extern void __init load_ucode_bsp(void);
63extern __init void load_ucode_ap(void);
64extern int __init save_microcode_in_initrd(void);
65#else
66static inline void __init load_ucode_bsp(void) {}
67static inline __init void load_ucode_ap(void) {}
68static inline int __init save_microcode_in_initrd(void)
69{
70 return 0;
71}
72#endif
73
60#endif /* _ASM_X86_MICROCODE_H */ 74#endif /* _ASM_X86_MICROCODE_H */
diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h
new file mode 100644
index 000000000000..5356f927d411
--- /dev/null
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -0,0 +1,85 @@
1#ifndef _ASM_X86_MICROCODE_INTEL_H
2#define _ASM_X86_MICROCODE_INTEL_H
3
4#include <asm/microcode.h>
5
6struct microcode_header_intel {
7 unsigned int hdrver;
8 unsigned int rev;
9 unsigned int date;
10 unsigned int sig;
11 unsigned int cksum;
12 unsigned int ldrver;
13 unsigned int pf;
14 unsigned int datasize;
15 unsigned int totalsize;
16 unsigned int reserved[3];
17};
18
19struct microcode_intel {
20 struct microcode_header_intel hdr;
21 unsigned int bits[0];
22};
23
24/* microcode format is extended from prescott processors */
25struct extended_signature {
26 unsigned int sig;
27 unsigned int pf;
28 unsigned int cksum;
29};
30
31struct extended_sigtable {
32 unsigned int count;
33 unsigned int cksum;
34 unsigned int reserved[3];
35 struct extended_signature sigs[0];
36};
37
38#define DEFAULT_UCODE_DATASIZE (2000)
39#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
40#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
41#define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
42#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
43#define DWSIZE (sizeof(u32))
44
45#define get_totalsize(mc) \
46 (((struct microcode_intel *)mc)->hdr.totalsize ? \
47 ((struct microcode_intel *)mc)->hdr.totalsize : \
48 DEFAULT_UCODE_TOTALSIZE)
49
50#define get_datasize(mc) \
51 (((struct microcode_intel *)mc)->hdr.datasize ? \
52 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
53
54#define sigmatch(s1, s2, p1, p2) \
55 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
56
57#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
58
59extern int
60get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev);
61extern int microcode_sanity_check(void *mc, int print_err);
62extern int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev);
63extern int
64update_match_revision(struct microcode_header_intel *mc_header, int rev);
65
66#ifdef CONFIG_MICROCODE_INTEL_EARLY
67extern void __init load_ucode_intel_bsp(void);
68extern void __cpuinit load_ucode_intel_ap(void);
69extern void show_ucode_info_early(void);
70#else
71static inline __init void load_ucode_intel_bsp(void) {}
72static inline __cpuinit void load_ucode_intel_ap(void) {}
73static inline void show_ucode_info_early(void) {}
74#endif
75
76#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
77extern int save_mc_for_early(u8 *mc);
78#else
79static inline int save_mc_for_early(u8 *mc)
80{
81 return 0;
82}
83#endif
84
85#endif /* _ASM_X86_MICROCODE_INTEL_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 8277941cbe99..3270116b1488 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -180,6 +180,14 @@ extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
180extern void detect_extended_topology(struct cpuinfo_x86 *c); 180extern void detect_extended_topology(struct cpuinfo_x86 *c);
181extern void detect_ht(struct cpuinfo_x86 *c); 181extern void detect_ht(struct cpuinfo_x86 *c);
182 182
183#ifdef CONFIG_X86_32
184extern int have_cpuid_p(void);
185#else
186static inline int have_cpuid_p(void)
187{
188 return 1;
189}
190#endif
183static inline void native_cpuid(unsigned int *eax, unsigned int *ebx, 191static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
184 unsigned int *ecx, unsigned int *edx) 192 unsigned int *ecx, unsigned int *edx)
185{ 193{
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h
index 6f414ed88620..6fd3fd769796 100644
--- a/arch/x86/include/asm/proto.h
+++ b/arch/x86/include/asm/proto.h
@@ -5,8 +5,6 @@
5 5
6/* misc architecture specific prototypes */ 6/* misc architecture specific prototypes */
7 7
8void early_idt_handler(void);
9
10void system_call(void); 8void system_call(void);
11void syscall_init(void); 9void syscall_init(void);
12 10
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 0fee48e279cc..50a7fc0f824a 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -20,10 +20,20 @@ static inline void __native_flush_tlb(void)
20 native_write_cr3(native_read_cr3()); 20 native_write_cr3(native_read_cr3());
21} 21}
22 22
23static inline void __native_flush_tlb_global_irq_disabled(void)
24{
25 unsigned long cr4;
26
27 cr4 = native_read_cr4();
28 /* clear PGE */
29 native_write_cr4(cr4 & ~X86_CR4_PGE);
30 /* write old PGE again and flush TLBs */
31 native_write_cr4(cr4);
32}
33
23static inline void __native_flush_tlb_global(void) 34static inline void __native_flush_tlb_global(void)
24{ 35{
25 unsigned long flags; 36 unsigned long flags;
26 unsigned long cr4;
27 37
28 /* 38 /*
29 * Read-modify-write to CR4 - protect it from preemption and 39 * Read-modify-write to CR4 - protect it from preemption and
@@ -32,11 +42,7 @@ static inline void __native_flush_tlb_global(void)
32 */ 42 */
33 raw_local_irq_save(flags); 43 raw_local_irq_save(flags);
34 44
35 cr4 = native_read_cr4(); 45 __native_flush_tlb_global_irq_disabled();
36 /* clear PGE */
37 native_write_cr4(cr4 & ~X86_CR4_PGE);
38 /* write old PGE again and flush TLBs */
39 native_write_cr4(cr4);
40 46
41 raw_local_irq_restore(flags); 47 raw_local_irq_restore(flags);
42} 48}
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index ac3b3d002833..7bd3bd310106 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -87,6 +87,9 @@ obj-$(CONFIG_PARAVIRT_CLOCK) += pvclock.o
87 87
88obj-$(CONFIG_PCSPKR_PLATFORM) += pcspeaker.o 88obj-$(CONFIG_PCSPKR_PLATFORM) += pcspeaker.o
89 89
90obj-$(CONFIG_MICROCODE_EARLY) += microcode_core_early.o
91obj-$(CONFIG_MICROCODE_INTEL_EARLY) += microcode_intel_early.o
92obj-$(CONFIG_MICROCODE_INTEL_LIB) += microcode_intel_lib.o
90microcode-y := microcode_core.o 93microcode-y := microcode_core.o
91microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o 94microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o
92microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o 95microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 9c3ab43a6954..d814772c5bed 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -37,6 +37,8 @@
37#include <asm/mce.h> 37#include <asm/mce.h>
38#include <asm/msr.h> 38#include <asm/msr.h>
39#include <asm/pat.h> 39#include <asm/pat.h>
40#include <asm/microcode.h>
41#include <asm/microcode_intel.h>
40 42
41#ifdef CONFIG_X86_LOCAL_APIC 43#ifdef CONFIG_X86_LOCAL_APIC
42#include <asm/uv/uv.h> 44#include <asm/uv/uv.h>
@@ -213,7 +215,7 @@ static inline int flag_is_changeable_p(u32 flag)
213} 215}
214 216
215/* Probe for the CPUID instruction */ 217/* Probe for the CPUID instruction */
216static int __cpuinit have_cpuid_p(void) 218int __cpuinit have_cpuid_p(void)
217{ 219{
218 return flag_is_changeable_p(X86_EFLAGS_ID); 220 return flag_is_changeable_p(X86_EFLAGS_ID);
219} 221}
@@ -249,11 +251,6 @@ static inline int flag_is_changeable_p(u32 flag)
249{ 251{
250 return 1; 252 return 1;
251} 253}
252/* Probe for the CPUID instruction */
253static inline int have_cpuid_p(void)
254{
255 return 1;
256}
257static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) 254static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
258{ 255{
259} 256}
@@ -1223,6 +1220,12 @@ void __cpuinit cpu_init(void)
1223 int cpu; 1220 int cpu;
1224 int i; 1221 int i;
1225 1222
1223 /*
1224 * Load microcode on this cpu if a valid microcode is available.
1225 * This is early microcode loading procedure.
1226 */
1227 load_ucode_ap();
1228
1226 cpu = stack_smp_processor_id(); 1229 cpu = stack_smp_processor_id();
1227 t = &per_cpu(init_tss, cpu); 1230 t = &per_cpu(init_tss, cpu);
1228 oist = &per_cpu(orig_ist, cpu); 1231 oist = &per_cpu(orig_ist, cpu);
@@ -1314,6 +1317,8 @@ void __cpuinit cpu_init(void)
1314 struct tss_struct *t = &per_cpu(init_tss, cpu); 1317 struct tss_struct *t = &per_cpu(init_tss, cpu);
1315 struct thread_struct *thread = &curr->thread; 1318 struct thread_struct *thread = &curr->thread;
1316 1319
1320 show_ucode_info_early();
1321
1317 if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) { 1322 if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) {
1318 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu); 1323 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu);
1319 for (;;) 1324 for (;;)
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 57334f4cd3af..c5e403f6d869 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -26,6 +26,7 @@
26#include <asm/e820.h> 26#include <asm/e820.h>
27#include <asm/bios_ebda.h> 27#include <asm/bios_ebda.h>
28#include <asm/bootparam_utils.h> 28#include <asm/bootparam_utils.h>
29#include <asm/microcode.h>
29 30
30/* 31/*
31 * Manage page tables very early on. 32 * Manage page tables very early on.
@@ -159,17 +160,17 @@ void __init x86_64_start_kernel(char * real_mode_data)
159 /* clear bss before set_intr_gate with early_idt_handler */ 160 /* clear bss before set_intr_gate with early_idt_handler */
160 clear_bss(); 161 clear_bss();
161 162
162 for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) { 163 for (i = 0; i < NUM_EXCEPTION_VECTORS; i++)
163#ifdef CONFIG_EARLY_PRINTK
164 set_intr_gate(i, &early_idt_handlers[i]); 164 set_intr_gate(i, &early_idt_handlers[i]);
165#else
166 set_intr_gate(i, early_idt_handler);
167#endif
168 }
169 load_idt((const struct desc_ptr *)&idt_descr); 165 load_idt((const struct desc_ptr *)&idt_descr);
170 166
171 copy_bootdata(__va(real_mode_data)); 167 copy_bootdata(__va(real_mode_data));
172 168
169 /*
170 * Load microcode early on BSP.
171 */
172 load_ucode_bsp();
173
173 if (console_loglevel == 10) 174 if (console_loglevel == 10)
174 early_printk("Kernel alive\n"); 175 early_printk("Kernel alive\n");
175 176
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 3c3f58a0808f..73afd11799ca 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -144,6 +144,11 @@ ENTRY(startup_32)
144 movl %eax, pa(olpc_ofw_pgd) 144 movl %eax, pa(olpc_ofw_pgd)
145#endif 145#endif
146 146
147#ifdef CONFIG_MICROCODE_EARLY
148 /* Early load ucode on BSP. */
149 call load_ucode_bsp
150#endif
151
147/* 152/*
148 * Initialize page tables. This creates a PDE and a set of page 153 * Initialize page tables. This creates a PDE and a set of page
149 * tables, which are located immediately beyond __brk_base. The variable 154 * tables, which are located immediately beyond __brk_base. The variable
@@ -299,6 +304,12 @@ ENTRY(startup_32_smp)
299 movl %eax,%ss 304 movl %eax,%ss
300 leal -__PAGE_OFFSET(%ecx),%esp 305 leal -__PAGE_OFFSET(%ecx),%esp
301 306
307#ifdef CONFIG_MICROCODE_EARLY
308 /* Early load ucode on AP. */
309 call load_ucode_ap
310#endif
311
312
302default_entry: 313default_entry:
303#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ 314#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
304 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ 315 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index d94f6d68be2a..b7de3b25adb5 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -336,6 +336,7 @@ early_idt_handlers:
336 i = i + 1 336 i = i + 1
337 .endr 337 .endr
338 338
339/* This is global to keep gas from relaxing the jumps */
339ENTRY(early_idt_handler) 340ENTRY(early_idt_handler)
340 cld 341 cld
341 342
@@ -404,6 +405,7 @@ ENTRY(early_idt_handler)
404 addq $16,%rsp # drop vector number and error code 405 addq $16,%rsp # drop vector number and error code
405 decl early_recursion_flag(%rip) 406 decl early_recursion_flag(%rip)
406 INTERRUPT_RETURN 407 INTERRUPT_RETURN
408ENDPROC(early_idt_handler)
407 409
408 __INITDATA 410 __INITDATA
409 411
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 3a04b224d0c0..22db92bbdf1a 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -364,10 +364,7 @@ static struct attribute_group mc_attr_group = {
364 364
365static void microcode_fini_cpu(int cpu) 365static void microcode_fini_cpu(int cpu)
366{ 366{
367 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
368
369 microcode_ops->microcode_fini_cpu(cpu); 367 microcode_ops->microcode_fini_cpu(cpu);
370 uci->valid = 0;
371} 368}
372 369
373static enum ucode_state microcode_resume_cpu(int cpu) 370static enum ucode_state microcode_resume_cpu(int cpu)
@@ -383,6 +380,10 @@ static enum ucode_state microcode_resume_cpu(int cpu)
383static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw) 380static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
384{ 381{
385 enum ucode_state ustate; 382 enum ucode_state ustate;
383 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
384
385 if (uci && uci->valid)
386 return UCODE_OK;
386 387
387 if (collect_cpu_info(cpu)) 388 if (collect_cpu_info(cpu))
388 return UCODE_ERROR; 389 return UCODE_ERROR;
diff --git a/arch/x86/kernel/microcode_core_early.c b/arch/x86/kernel/microcode_core_early.c
new file mode 100644
index 000000000000..577db8417d15
--- /dev/null
+++ b/arch/x86/kernel/microcode_core_early.c
@@ -0,0 +1,76 @@
1/*
2 * X86 CPU microcode early update for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 *
7 * This driver allows to early upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
12 * Software Developer's Manual.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
18 */
19#include <linux/module.h>
20#include <asm/microcode_intel.h>
21#include <asm/processor.h>
22
23#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
24#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
25#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
26#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
27#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
28#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
29#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
30
31#define CPUID_IS(a, b, c, ebx, ecx, edx) \
32 (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
33
34/*
35 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
36 * x86_vendor() gets vendor id for BSP.
37 *
38 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
39 * coding, we still use x86_vendor() to get vendor id for AP.
40 *
41 * x86_vendor() gets vendor information directly through cpuid.
42 */
43static int __cpuinit x86_vendor(void)
44{
45 u32 eax = 0x00000000;
46 u32 ebx, ecx = 0, edx;
47
48 if (!have_cpuid_p())
49 return X86_VENDOR_UNKNOWN;
50
51 native_cpuid(&eax, &ebx, &ecx, &edx);
52
53 if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
54 return X86_VENDOR_INTEL;
55
56 if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
57 return X86_VENDOR_AMD;
58
59 return X86_VENDOR_UNKNOWN;
60}
61
62void __init load_ucode_bsp(void)
63{
64 int vendor = x86_vendor();
65
66 if (vendor == X86_VENDOR_INTEL)
67 load_ucode_intel_bsp();
68}
69
70void __cpuinit load_ucode_ap(void)
71{
72 int vendor = x86_vendor();
73
74 if (vendor == X86_VENDOR_INTEL)
75 load_ucode_intel_ap();
76}
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 3544aed39338..5fb2cebf556b 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -79,7 +79,7 @@
79#include <linux/module.h> 79#include <linux/module.h>
80#include <linux/vmalloc.h> 80#include <linux/vmalloc.h>
81 81
82#include <asm/microcode.h> 82#include <asm/microcode_intel.h>
83#include <asm/processor.h> 83#include <asm/processor.h>
84#include <asm/msr.h> 84#include <asm/msr.h>
85 85
@@ -87,59 +87,6 @@ MODULE_DESCRIPTION("Microcode Update Driver");
87MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); 87MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
88MODULE_LICENSE("GPL"); 88MODULE_LICENSE("GPL");
89 89
90struct microcode_header_intel {
91 unsigned int hdrver;
92 unsigned int rev;
93 unsigned int date;
94 unsigned int sig;
95 unsigned int cksum;
96 unsigned int ldrver;
97 unsigned int pf;
98 unsigned int datasize;
99 unsigned int totalsize;
100 unsigned int reserved[3];
101};
102
103struct microcode_intel {
104 struct microcode_header_intel hdr;
105 unsigned int bits[0];
106};
107
108/* microcode format is extended from prescott processors */
109struct extended_signature {
110 unsigned int sig;
111 unsigned int pf;
112 unsigned int cksum;
113};
114
115struct extended_sigtable {
116 unsigned int count;
117 unsigned int cksum;
118 unsigned int reserved[3];
119 struct extended_signature sigs[0];
120};
121
122#define DEFAULT_UCODE_DATASIZE (2000)
123#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
124#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
125#define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
126#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
127#define DWSIZE (sizeof(u32))
128
129#define get_totalsize(mc) \
130 (((struct microcode_intel *)mc)->hdr.totalsize ? \
131 ((struct microcode_intel *)mc)->hdr.totalsize : \
132 DEFAULT_UCODE_TOTALSIZE)
133
134#define get_datasize(mc) \
135 (((struct microcode_intel *)mc)->hdr.datasize ? \
136 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
137
138#define sigmatch(s1, s2, p1, p2) \
139 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
140
141#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
142
143static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) 90static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
144{ 91{
145 struct cpuinfo_x86 *c = &cpu_data(cpu_num); 92 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
@@ -162,128 +109,25 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
162 return 0; 109 return 0;
163} 110}
164 111
165static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
166{
167 return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
168}
169
170static inline int
171update_match_revision(struct microcode_header_intel *mc_header, int rev)
172{
173 return (mc_header->rev <= rev) ? 0 : 1;
174}
175
176static int microcode_sanity_check(void *mc)
177{
178 unsigned long total_size, data_size, ext_table_size;
179 struct microcode_header_intel *mc_header = mc;
180 struct extended_sigtable *ext_header = NULL;
181 int sum, orig_sum, ext_sigcount = 0, i;
182 struct extended_signature *ext_sig;
183
184 total_size = get_totalsize(mc_header);
185 data_size = get_datasize(mc_header);
186
187 if (data_size + MC_HEADER_SIZE > total_size) {
188 pr_err("error! Bad data size in microcode data file\n");
189 return -EINVAL;
190 }
191
192 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
193 pr_err("error! Unknown microcode update format\n");
194 return -EINVAL;
195 }
196 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
197 if (ext_table_size) {
198 if ((ext_table_size < EXT_HEADER_SIZE)
199 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
200 pr_err("error! Small exttable size in microcode data file\n");
201 return -EINVAL;
202 }
203 ext_header = mc + MC_HEADER_SIZE + data_size;
204 if (ext_table_size != exttable_size(ext_header)) {
205 pr_err("error! Bad exttable size in microcode data file\n");
206 return -EFAULT;
207 }
208 ext_sigcount = ext_header->count;
209 }
210
211 /* check extended table checksum */
212 if (ext_table_size) {
213 int ext_table_sum = 0;
214 int *ext_tablep = (int *)ext_header;
215
216 i = ext_table_size / DWSIZE;
217 while (i--)
218 ext_table_sum += ext_tablep[i];
219 if (ext_table_sum) {
220 pr_warning("aborting, bad extended signature table checksum\n");
221 return -EINVAL;
222 }
223 }
224
225 /* calculate the checksum */
226 orig_sum = 0;
227 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
228 while (i--)
229 orig_sum += ((int *)mc)[i];
230 if (orig_sum) {
231 pr_err("aborting, bad checksum\n");
232 return -EINVAL;
233 }
234 if (!ext_table_size)
235 return 0;
236 /* check extended signature checksum */
237 for (i = 0; i < ext_sigcount; i++) {
238 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
239 EXT_SIGNATURE_SIZE * i;
240 sum = orig_sum
241 - (mc_header->sig + mc_header->pf + mc_header->cksum)
242 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
243 if (sum) {
244 pr_err("aborting, bad checksum\n");
245 return -EINVAL;
246 }
247 }
248 return 0;
249}
250
251/* 112/*
252 * return 0 - no update found 113 * return 0 - no update found
253 * return 1 - found update 114 * return 1 - found update
254 */ 115 */
255static int 116static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)
256get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
257{ 117{
258 struct microcode_header_intel *mc_header = mc; 118 struct cpu_signature cpu_sig;
259 struct extended_sigtable *ext_header; 119 unsigned int csig, cpf, crev;
260 unsigned long total_size = get_totalsize(mc_header);
261 int ext_sigcount, i;
262 struct extended_signature *ext_sig;
263
264 if (!update_match_revision(mc_header, rev))
265 return 0;
266
267 if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
268 return 1;
269 120
270 /* Look for ext. headers: */ 121 collect_cpu_info(cpu, &cpu_sig);
271 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
272 return 0;
273 122
274 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE; 123 csig = cpu_sig.sig;
275 ext_sigcount = ext_header->count; 124 cpf = cpu_sig.pf;
276 ext_sig = (void *)ext_header + EXT_HEADER_SIZE; 125 crev = cpu_sig.rev;
277 126
278 for (i = 0; i < ext_sigcount; i++) { 127 return get_matching_microcode(csig, cpf, mc_intel, crev);
279 if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
280 return 1;
281 ext_sig++;
282 }
283 return 0;
284} 128}
285 129
286static int apply_microcode(int cpu) 130int apply_microcode(int cpu)
287{ 131{
288 struct microcode_intel *mc_intel; 132 struct microcode_intel *mc_intel;
289 struct ucode_cpu_info *uci; 133 struct ucode_cpu_info *uci;
@@ -300,6 +144,14 @@ static int apply_microcode(int cpu)
300 if (mc_intel == NULL) 144 if (mc_intel == NULL)
301 return 0; 145 return 0;
302 146
147 /*
148 * Microcode on this CPU could be updated earlier. Only apply the
149 * microcode patch in mc_intel when it is newer than the one on this
150 * CPU.
151 */
152 if (get_matching_mc(mc_intel, cpu) == 0)
153 return 0;
154
303 /* write microcode via MSR 0x79 */ 155 /* write microcode via MSR 0x79 */
304 wrmsr(MSR_IA32_UCODE_WRITE, 156 wrmsr(MSR_IA32_UCODE_WRITE,
305 (unsigned long) mc_intel->bits, 157 (unsigned long) mc_intel->bits,
@@ -338,6 +190,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
338 unsigned int leftover = size; 190 unsigned int leftover = size;
339 enum ucode_state state = UCODE_OK; 191 enum ucode_state state = UCODE_OK;
340 unsigned int curr_mc_size = 0; 192 unsigned int curr_mc_size = 0;
193 unsigned int csig, cpf;
341 194
342 while (leftover) { 195 while (leftover) {
343 struct microcode_header_intel mc_header; 196 struct microcode_header_intel mc_header;
@@ -362,11 +215,13 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
362 } 215 }
363 216
364 if (get_ucode_data(mc, ucode_ptr, mc_size) || 217 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
365 microcode_sanity_check(mc) < 0) { 218 microcode_sanity_check(mc, 1) < 0) {
366 break; 219 break;
367 } 220 }
368 221
369 if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) { 222 csig = uci->cpu_sig.sig;
223 cpf = uci->cpu_sig.pf;
224 if (get_matching_microcode(csig, cpf, mc, new_rev)) {
370 vfree(new_mc); 225 vfree(new_mc);
371 new_rev = mc_header.rev; 226 new_rev = mc_header.rev;
372 new_mc = mc; 227 new_mc = mc;
@@ -393,6 +248,13 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
393 vfree(uci->mc); 248 vfree(uci->mc);
394 uci->mc = (struct microcode_intel *)new_mc; 249 uci->mc = (struct microcode_intel *)new_mc;
395 250
251 /*
252 * If early loading microcode is supported, save this mc into
253 * permanent memory. So it will be loaded early when a CPU is hot added
254 * or resumes.
255 */
256 save_mc_for_early(new_mc);
257
396 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n", 258 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
397 cpu, new_rev, uci->cpu_sig.rev); 259 cpu, new_rev, uci->cpu_sig.rev);
398out: 260out:
diff --git a/arch/x86/kernel/microcode_intel_early.c b/arch/x86/kernel/microcode_intel_early.c
new file mode 100644
index 000000000000..7890bc838952
--- /dev/null
+++ b/arch/x86/kernel/microcode_intel_early.c
@@ -0,0 +1,796 @@
1/*
2 * Intel CPU microcode early update for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 *
7 * This allows to early upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
12 * Software Developer's Manual.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
18 */
19#include <linux/module.h>
20#include <linux/mm.h>
21#include <linux/slab.h>
22#include <linux/earlycpio.h>
23#include <linux/initrd.h>
24#include <linux/cpu.h>
25#include <asm/msr.h>
26#include <asm/microcode_intel.h>
27#include <asm/processor.h>
28#include <asm/tlbflush.h>
29#include <asm/setup.h>
30
31unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
32struct mc_saved_data {
33 unsigned int mc_saved_count;
34 struct microcode_intel **mc_saved;
35} mc_saved_data;
36
37static enum ucode_state __cpuinit
38generic_load_microcode_early(struct microcode_intel **mc_saved_p,
39 unsigned int mc_saved_count,
40 struct ucode_cpu_info *uci)
41{
42 struct microcode_intel *ucode_ptr, *new_mc = NULL;
43 int new_rev = uci->cpu_sig.rev;
44 enum ucode_state state = UCODE_OK;
45 unsigned int mc_size;
46 struct microcode_header_intel *mc_header;
47 unsigned int csig = uci->cpu_sig.sig;
48 unsigned int cpf = uci->cpu_sig.pf;
49 int i;
50
51 for (i = 0; i < mc_saved_count; i++) {
52 ucode_ptr = mc_saved_p[i];
53
54 mc_header = (struct microcode_header_intel *)ucode_ptr;
55 mc_size = get_totalsize(mc_header);
56 if (get_matching_microcode(csig, cpf, ucode_ptr, new_rev)) {
57 new_rev = mc_header->rev;
58 new_mc = ucode_ptr;
59 }
60 }
61
62 if (!new_mc) {
63 state = UCODE_NFOUND;
64 goto out;
65 }
66
67 uci->mc = (struct microcode_intel *)new_mc;
68out:
69 return state;
70}
71
72static void __cpuinit
73microcode_pointer(struct microcode_intel **mc_saved,
74 unsigned long *mc_saved_in_initrd,
75 unsigned long initrd_start, int mc_saved_count)
76{
77 int i;
78
79 for (i = 0; i < mc_saved_count; i++)
80 mc_saved[i] = (struct microcode_intel *)
81 (mc_saved_in_initrd[i] + initrd_start);
82}
83
84#ifdef CONFIG_X86_32
85static void __cpuinit
86microcode_phys(struct microcode_intel **mc_saved_tmp,
87 struct mc_saved_data *mc_saved_data)
88{
89 int i;
90 struct microcode_intel ***mc_saved;
91
92 mc_saved = (struct microcode_intel ***)
93 __pa_symbol(&mc_saved_data->mc_saved);
94 for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
95 struct microcode_intel *p;
96
97 p = *(struct microcode_intel **)
98 __pa(mc_saved_data->mc_saved + i);
99 mc_saved_tmp[i] = (struct microcode_intel *)__pa(p);
100 }
101}
102#endif
103
104static enum ucode_state __cpuinit
105load_microcode(struct mc_saved_data *mc_saved_data,
106 unsigned long *mc_saved_in_initrd,
107 unsigned long initrd_start,
108 struct ucode_cpu_info *uci)
109{
110 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
111 unsigned int count = mc_saved_data->mc_saved_count;
112
113 if (!mc_saved_data->mc_saved) {
114 microcode_pointer(mc_saved_tmp, mc_saved_in_initrd,
115 initrd_start, count);
116
117 return generic_load_microcode_early(mc_saved_tmp, count, uci);
118 } else {
119#ifdef CONFIG_X86_32
120 microcode_phys(mc_saved_tmp, mc_saved_data);
121 return generic_load_microcode_early(mc_saved_tmp, count, uci);
122#else
123 return generic_load_microcode_early(mc_saved_data->mc_saved,
124 count, uci);
125#endif
126 }
127}
128
129static u8 get_x86_family(unsigned long sig)
130{
131 u8 x86;
132
133 x86 = (sig >> 8) & 0xf;
134
135 if (x86 == 0xf)
136 x86 += (sig >> 20) & 0xff;
137
138 return x86;
139}
140
141static u8 get_x86_model(unsigned long sig)
142{
143 u8 x86, x86_model;
144
145 x86 = get_x86_family(sig);
146 x86_model = (sig >> 4) & 0xf;
147
148 if (x86 == 0x6 || x86 == 0xf)
149 x86_model += ((sig >> 16) & 0xf) << 4;
150
151 return x86_model;
152}
153
154/*
155 * Given CPU signature and a microcode patch, this function finds if the
156 * microcode patch has matching family and model with the CPU.
157 */
158static enum ucode_state
159matching_model_microcode(struct microcode_header_intel *mc_header,
160 unsigned long sig)
161{
162 u8 x86, x86_model;
163 u8 x86_ucode, x86_model_ucode;
164 struct extended_sigtable *ext_header;
165 unsigned long total_size = get_totalsize(mc_header);
166 unsigned long data_size = get_datasize(mc_header);
167 int ext_sigcount, i;
168 struct extended_signature *ext_sig;
169
170 x86 = get_x86_family(sig);
171 x86_model = get_x86_model(sig);
172
173 x86_ucode = get_x86_family(mc_header->sig);
174 x86_model_ucode = get_x86_model(mc_header->sig);
175
176 if (x86 == x86_ucode && x86_model == x86_model_ucode)
177 return UCODE_OK;
178
179 /* Look for ext. headers: */
180 if (total_size <= data_size + MC_HEADER_SIZE)
181 return UCODE_NFOUND;
182
183 ext_header = (struct extended_sigtable *)
184 mc_header + data_size + MC_HEADER_SIZE;
185 ext_sigcount = ext_header->count;
186 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
187
188 for (i = 0; i < ext_sigcount; i++) {
189 x86_ucode = get_x86_family(ext_sig->sig);
190 x86_model_ucode = get_x86_model(ext_sig->sig);
191
192 if (x86 == x86_ucode && x86_model == x86_model_ucode)
193 return UCODE_OK;
194
195 ext_sig++;
196 }
197
198 return UCODE_NFOUND;
199}
200
201static int
202save_microcode(struct mc_saved_data *mc_saved_data,
203 struct microcode_intel **mc_saved_src,
204 unsigned int mc_saved_count)
205{
206 int i, j;
207 struct microcode_intel **mc_saved_p;
208 int ret;
209
210 if (!mc_saved_count)
211 return -EINVAL;
212
213 /*
214 * Copy new microcode data.
215 */
216 mc_saved_p = kmalloc(mc_saved_count*sizeof(struct microcode_intel *),
217 GFP_KERNEL);
218 if (!mc_saved_p)
219 return -ENOMEM;
220
221 for (i = 0; i < mc_saved_count; i++) {
222 struct microcode_intel *mc = mc_saved_src[i];
223 struct microcode_header_intel *mc_header = &mc->hdr;
224 unsigned long mc_size = get_totalsize(mc_header);
225 mc_saved_p[i] = kmalloc(mc_size, GFP_KERNEL);
226 if (!mc_saved_p[i]) {
227 ret = -ENOMEM;
228 goto err;
229 }
230 if (!mc_saved_src[i]) {
231 ret = -EINVAL;
232 goto err;
233 }
234 memcpy(mc_saved_p[i], mc, mc_size);
235 }
236
237 /*
238 * Point to newly saved microcode.
239 */
240 mc_saved_data->mc_saved = mc_saved_p;
241 mc_saved_data->mc_saved_count = mc_saved_count;
242
243 return 0;
244
245err:
246 for (j = 0; j <= i; j++)
247 kfree(mc_saved_p[j]);
248 kfree(mc_saved_p);
249
250 return ret;
251}
252
253/*
254 * A microcode patch in ucode_ptr is saved into mc_saved
255 * - if it has matching signature and newer revision compared to an existing
256 * patch mc_saved.
257 * - or if it is a newly discovered microcode patch.
258 *
259 * The microcode patch should have matching model with CPU.
260 */
261static void _save_mc(struct microcode_intel **mc_saved, u8 *ucode_ptr,
262 unsigned int *mc_saved_count_p)
263{
264 int i;
265 int found = 0;
266 unsigned int mc_saved_count = *mc_saved_count_p;
267 struct microcode_header_intel *mc_header;
268
269 mc_header = (struct microcode_header_intel *)ucode_ptr;
270 for (i = 0; i < mc_saved_count; i++) {
271 unsigned int sig, pf;
272 unsigned int new_rev;
273 struct microcode_header_intel *mc_saved_header =
274 (struct microcode_header_intel *)mc_saved[i];
275 sig = mc_saved_header->sig;
276 pf = mc_saved_header->pf;
277 new_rev = mc_header->rev;
278
279 if (get_matching_sig(sig, pf, ucode_ptr, new_rev)) {
280 found = 1;
281 if (update_match_revision(mc_header, new_rev)) {
282 /*
283 * Found an older ucode saved before.
284 * Replace the older one with this newer
285 * one.
286 */
287 mc_saved[i] =
288 (struct microcode_intel *)ucode_ptr;
289 break;
290 }
291 }
292 }
293 if (i >= mc_saved_count && !found)
294 /*
295 * This ucode is first time discovered in ucode file.
296 * Save it to memory.
297 */
298 mc_saved[mc_saved_count++] =
299 (struct microcode_intel *)ucode_ptr;
300
301 *mc_saved_count_p = mc_saved_count;
302}
303
304/*
305 * Get microcode matching with BSP's model. Only CPUs with the same model as
306 * BSP can stay in the platform.
307 */
308static enum ucode_state __init
309get_matching_model_microcode(int cpu, unsigned long start,
310 void *data, size_t size,
311 struct mc_saved_data *mc_saved_data,
312 unsigned long *mc_saved_in_initrd,
313 struct ucode_cpu_info *uci)
314{
315 u8 *ucode_ptr = data;
316 unsigned int leftover = size;
317 enum ucode_state state = UCODE_OK;
318 unsigned int mc_size;
319 struct microcode_header_intel *mc_header;
320 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
321 unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
322 int i;
323
324 while (leftover) {
325 mc_header = (struct microcode_header_intel *)ucode_ptr;
326
327 mc_size = get_totalsize(mc_header);
328 if (!mc_size || mc_size > leftover ||
329 microcode_sanity_check(ucode_ptr, 0) < 0)
330 break;
331
332 leftover -= mc_size;
333
334 /*
335 * Since APs with same family and model as the BSP may boot in
336 * the platform, we need to find and save microcode patches
337 * with the same family and model as the BSP.
338 */
339 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
340 UCODE_OK) {
341 ucode_ptr += mc_size;
342 continue;
343 }
344
345 _save_mc(mc_saved_tmp, ucode_ptr, &mc_saved_count);
346
347 ucode_ptr += mc_size;
348 }
349
350 if (leftover) {
351 state = UCODE_ERROR;
352 goto out;
353 }
354
355 if (mc_saved_count == 0) {
356 state = UCODE_NFOUND;
357 goto out;
358 }
359
360 for (i = 0; i < mc_saved_count; i++)
361 mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
362
363 mc_saved_data->mc_saved_count = mc_saved_count;
364out:
365 return state;
366}
367
368#define native_rdmsr(msr, val1, val2) \
369do { \
370 u64 __val = native_read_msr((msr)); \
371 (void)((val1) = (u32)__val); \
372 (void)((val2) = (u32)(__val >> 32)); \
373} while (0)
374
375#define native_wrmsr(msr, low, high) \
376 native_write_msr(msr, low, high);
377
378static int __cpuinit collect_cpu_info_early(struct ucode_cpu_info *uci)
379{
380 unsigned int val[2];
381 u8 x86, x86_model;
382 struct cpu_signature csig;
383 unsigned int eax, ebx, ecx, edx;
384
385 csig.sig = 0;
386 csig.pf = 0;
387 csig.rev = 0;
388
389 memset(uci, 0, sizeof(*uci));
390
391 eax = 0x00000001;
392 ecx = 0;
393 native_cpuid(&eax, &ebx, &ecx, &edx);
394 csig.sig = eax;
395
396 x86 = get_x86_family(csig.sig);
397 x86_model = get_x86_model(csig.sig);
398
399 if ((x86_model >= 5) || (x86 > 6)) {
400 /* get processor flags from MSR 0x17 */
401 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
402 csig.pf = 1 << ((val[1] >> 18) & 7);
403 }
404 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
405
406 /* As documented in the SDM: Do a CPUID 1 here */
407 sync_core();
408
409 /* get the current revision from MSR 0x8B */
410 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
411
412 csig.rev = val[1];
413
414 uci->cpu_sig = csig;
415 uci->valid = 1;
416
417 return 0;
418}
419
420#ifdef DEBUG
421static void __ref show_saved_mc(void)
422{
423 int i, j;
424 unsigned int sig, pf, rev, total_size, data_size, date;
425 struct ucode_cpu_info uci;
426
427 if (mc_saved_data.mc_saved_count == 0) {
428 pr_debug("no micorcode data saved.\n");
429 return;
430 }
431 pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
432
433 collect_cpu_info_early(&uci);
434
435 sig = uci.cpu_sig.sig;
436 pf = uci.cpu_sig.pf;
437 rev = uci.cpu_sig.rev;
438 pr_debug("CPU%d: sig=0x%x, pf=0x%x, rev=0x%x\n",
439 smp_processor_id(), sig, pf, rev);
440
441 for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
442 struct microcode_header_intel *mc_saved_header;
443 struct extended_sigtable *ext_header;
444 int ext_sigcount;
445 struct extended_signature *ext_sig;
446
447 mc_saved_header = (struct microcode_header_intel *)
448 mc_saved_data.mc_saved[i];
449 sig = mc_saved_header->sig;
450 pf = mc_saved_header->pf;
451 rev = mc_saved_header->rev;
452 total_size = get_totalsize(mc_saved_header);
453 data_size = get_datasize(mc_saved_header);
454 date = mc_saved_header->date;
455
456 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
457 i, sig, pf, rev, total_size,
458 date & 0xffff,
459 date >> 24,
460 (date >> 16) & 0xff);
461
462 /* Look for ext. headers: */
463 if (total_size <= data_size + MC_HEADER_SIZE)
464 continue;
465
466 ext_header = (struct extended_sigtable *)
467 mc_saved_header + data_size + MC_HEADER_SIZE;
468 ext_sigcount = ext_header->count;
469 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
470
471 for (j = 0; j < ext_sigcount; j++) {
472 sig = ext_sig->sig;
473 pf = ext_sig->pf;
474
475 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
476 j, sig, pf);
477
478 ext_sig++;
479 }
480
481 }
482}
483#else
484static inline void show_saved_mc(void)
485{
486}
487#endif
488
489#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
490/*
491 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
492 * hot added or resumes.
493 *
494 * Please make sure this mc should be a valid microcode patch before calling
495 * this function.
496 */
497int save_mc_for_early(u8 *mc)
498{
499 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
500 unsigned int mc_saved_count_init;
501 unsigned int mc_saved_count;
502 struct microcode_intel **mc_saved;
503 int ret = 0;
504 int i;
505
506 /*
507 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
508 * hotplug.
509 */
510 cpu_hotplug_driver_lock();
511
512 mc_saved_count_init = mc_saved_data.mc_saved_count;
513 mc_saved_count = mc_saved_data.mc_saved_count;
514 mc_saved = mc_saved_data.mc_saved;
515
516 if (mc_saved && mc_saved_count)
517 memcpy(mc_saved_tmp, mc_saved,
518 mc_saved_count * sizeof(struct mirocode_intel *));
519 /*
520 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
521 * version.
522 */
523
524 _save_mc(mc_saved_tmp, mc, &mc_saved_count);
525
526 /*
527 * Save the mc_save_tmp in global mc_saved_data.
528 */
529 ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
530 if (ret) {
531 pr_err("Can not save microcode patch.\n");
532 goto out;
533 }
534
535 show_saved_mc();
536
537 /*
538 * Free old saved microcod data.
539 */
540 if (mc_saved) {
541 for (i = 0; i < mc_saved_count_init; i++)
542 kfree(mc_saved[i]);
543 kfree(mc_saved);
544 }
545
546out:
547 cpu_hotplug_driver_unlock();
548
549 return ret;
550}
551EXPORT_SYMBOL_GPL(save_mc_for_early);
552#endif
553
554static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
555static __init enum ucode_state
556scan_microcode(unsigned long start, unsigned long end,
557 struct mc_saved_data *mc_saved_data,
558 unsigned long *mc_saved_in_initrd,
559 struct ucode_cpu_info *uci)
560{
561 unsigned int size = end - start + 1;
562 struct cpio_data cd;
563 long offset = 0;
564#ifdef CONFIG_X86_32
565 char *p = (char *)__pa_symbol(ucode_name);
566#else
567 char *p = ucode_name;
568#endif
569
570 cd.data = NULL;
571 cd.size = 0;
572
573 cd = find_cpio_data(p, (void *)start, size, &offset);
574 if (!cd.data)
575 return UCODE_ERROR;
576
577
578 return get_matching_model_microcode(0, start, cd.data, cd.size,
579 mc_saved_data, mc_saved_in_initrd,
580 uci);
581}
582
583/*
584 * Print ucode update info.
585 */
586static void __cpuinit
587print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
588{
589 int cpu = smp_processor_id();
590
591 pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
592 cpu,
593 uci->cpu_sig.rev,
594 date & 0xffff,
595 date >> 24,
596 (date >> 16) & 0xff);
597}
598
599#ifdef CONFIG_X86_32
600
601static int delay_ucode_info;
602static int current_mc_date;
603
604/*
605 * Print early updated ucode info after printk works. This is delayed info dump.
606 */
607void __cpuinit show_ucode_info_early(void)
608{
609 struct ucode_cpu_info uci;
610
611 if (delay_ucode_info) {
612 collect_cpu_info_early(&uci);
613 print_ucode_info(&uci, current_mc_date);
614 delay_ucode_info = 0;
615 }
616}
617
618/*
619 * At this point, we can not call printk() yet. Keep microcode patch number in
620 * mc_saved_data.mc_saved and delay printing microcode info in
621 * show_ucode_info_early() until printk() works.
622 */
623static void __cpuinit print_ucode(struct ucode_cpu_info *uci)
624{
625 struct microcode_intel *mc_intel;
626 int *delay_ucode_info_p;
627 int *current_mc_date_p;
628
629 mc_intel = uci->mc;
630 if (mc_intel == NULL)
631 return;
632
633 delay_ucode_info_p = (int *)__pa_symbol(&delay_ucode_info);
634 current_mc_date_p = (int *)__pa_symbol(&current_mc_date);
635
636 *delay_ucode_info_p = 1;
637 *current_mc_date_p = mc_intel->hdr.date;
638}
639#else
640
641/*
642 * Flush global tlb. We only do this in x86_64 where paging has been enabled
643 * already and PGE should be enabled as well.
644 */
645static inline void __cpuinit flush_tlb_early(void)
646{
647 __native_flush_tlb_global_irq_disabled();
648}
649
650static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci)
651{
652 struct microcode_intel *mc_intel;
653
654 mc_intel = uci->mc;
655 if (mc_intel == NULL)
656 return;
657
658 print_ucode_info(uci, mc_intel->hdr.date);
659}
660#endif
661
662static int apply_microcode_early(struct mc_saved_data *mc_saved_data,
663 struct ucode_cpu_info *uci)
664{
665 struct microcode_intel *mc_intel;
666 unsigned int val[2];
667
668 mc_intel = uci->mc;
669 if (mc_intel == NULL)
670 return 0;
671
672 /* write microcode via MSR 0x79 */
673 native_wrmsr(MSR_IA32_UCODE_WRITE,
674 (unsigned long) mc_intel->bits,
675 (unsigned long) mc_intel->bits >> 16 >> 16);
676 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
677
678 /* As documented in the SDM: Do a CPUID 1 here */
679 sync_core();
680
681 /* get the current revision from MSR 0x8B */
682 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
683 if (val[1] != mc_intel->hdr.rev)
684 return -1;
685
686#ifdef CONFIG_X86_64
687 /* Flush global tlb. This is precaution. */
688 flush_tlb_early();
689#endif
690 uci->cpu_sig.rev = val[1];
691
692 print_ucode(uci);
693
694 return 0;
695}
696
697/*
698 * This function converts microcode patch offsets previously stored in
699 * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
700 */
701int __init save_microcode_in_initrd(void)
702{
703 unsigned int count = mc_saved_data.mc_saved_count;
704 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
705 int ret = 0;
706
707 if (count == 0)
708 return ret;
709
710 microcode_pointer(mc_saved, mc_saved_in_initrd, initrd_start, count);
711 ret = save_microcode(&mc_saved_data, mc_saved, count);
712 if (ret)
713 pr_err("Can not save microcod patches from initrd");
714
715 show_saved_mc();
716
717 return ret;
718}
719
720static void __init
721_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
722 unsigned long *mc_saved_in_initrd,
723 unsigned long initrd_start_early,
724 unsigned long initrd_end_early,
725 struct ucode_cpu_info *uci)
726{
727 collect_cpu_info_early(uci);
728 scan_microcode(initrd_start_early, initrd_end_early, mc_saved_data,
729 mc_saved_in_initrd, uci);
730 load_microcode(mc_saved_data, mc_saved_in_initrd,
731 initrd_start_early, uci);
732 apply_microcode_early(mc_saved_data, uci);
733}
734
735void __init
736load_ucode_intel_bsp(void)
737{
738 u64 ramdisk_image, ramdisk_size;
739 unsigned long initrd_start_early, initrd_end_early;
740 struct ucode_cpu_info uci;
741#ifdef CONFIG_X86_32
742 struct boot_params *boot_params_p;
743
744 boot_params_p = (struct boot_params *)__pa_symbol(&boot_params);
745 ramdisk_image = boot_params_p->hdr.ramdisk_image;
746 ramdisk_size = boot_params_p->hdr.ramdisk_size;
747 initrd_start_early = ramdisk_image;
748 initrd_end_early = initrd_start_early + ramdisk_size;
749
750 _load_ucode_intel_bsp(
751 (struct mc_saved_data *)__pa_symbol(&mc_saved_data),
752 (unsigned long *)__pa_symbol(&mc_saved_in_initrd),
753 initrd_start_early, initrd_end_early, &uci);
754#else
755 ramdisk_image = boot_params.hdr.ramdisk_image;
756 ramdisk_size = boot_params.hdr.ramdisk_size;
757 initrd_start_early = ramdisk_image + PAGE_OFFSET;
758 initrd_end_early = initrd_start_early + ramdisk_size;
759
760 _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd,
761 initrd_start_early, initrd_end_early, &uci);
762#endif
763}
764
765void __cpuinit load_ucode_intel_ap(void)
766{
767 struct mc_saved_data *mc_saved_data_p;
768 struct ucode_cpu_info uci;
769 unsigned long *mc_saved_in_initrd_p;
770 unsigned long initrd_start_addr;
771#ifdef CONFIG_X86_32
772 unsigned long *initrd_start_p;
773
774 mc_saved_in_initrd_p =
775 (unsigned long *)__pa_symbol(mc_saved_in_initrd);
776 mc_saved_data_p = (struct mc_saved_data *)__pa_symbol(&mc_saved_data);
777 initrd_start_p = (unsigned long *)__pa_symbol(&initrd_start);
778 initrd_start_addr = (unsigned long)__pa_symbol(*initrd_start_p);
779#else
780 mc_saved_data_p = &mc_saved_data;
781 mc_saved_in_initrd_p = mc_saved_in_initrd;
782 initrd_start_addr = initrd_start;
783#endif
784
785 /*
786 * If there is no valid ucode previously saved in memory, no need to
787 * update ucode on this AP.
788 */
789 if (mc_saved_data_p->mc_saved_count == 0)
790 return;
791
792 collect_cpu_info_early(&uci);
793 load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
794 initrd_start_addr, &uci);
795 apply_microcode_early(mc_saved_data_p, &uci);
796}
diff --git a/arch/x86/kernel/microcode_intel_lib.c b/arch/x86/kernel/microcode_intel_lib.c
new file mode 100644
index 000000000000..ce69320d0179
--- /dev/null
+++ b/arch/x86/kernel/microcode_intel_lib.c
@@ -0,0 +1,174 @@
1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 *
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
14 *
15 * http://developer.intel.com/Assets/PDF/manual/253668.pdf
16 *
17 * For more information, go to http://www.urbanmyth.org/microcode
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 */
25#include <linux/firmware.h>
26#include <linux/uaccess.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29
30#include <asm/microcode_intel.h>
31#include <asm/processor.h>
32#include <asm/msr.h>
33
34static inline int
35update_match_cpu(unsigned int csig, unsigned int cpf,
36 unsigned int sig, unsigned int pf)
37{
38 return (!sigmatch(sig, csig, pf, cpf)) ? 0 : 1;
39}
40
41int
42update_match_revision(struct microcode_header_intel *mc_header, int rev)
43{
44 return (mc_header->rev <= rev) ? 0 : 1;
45}
46
47int microcode_sanity_check(void *mc, int print_err)
48{
49 unsigned long total_size, data_size, ext_table_size;
50 struct microcode_header_intel *mc_header = mc;
51 struct extended_sigtable *ext_header = NULL;
52 int sum, orig_sum, ext_sigcount = 0, i;
53 struct extended_signature *ext_sig;
54
55 total_size = get_totalsize(mc_header);
56 data_size = get_datasize(mc_header);
57
58 if (data_size + MC_HEADER_SIZE > total_size) {
59 if (print_err)
60 pr_err("error! Bad data size in microcode data file\n");
61 return -EINVAL;
62 }
63
64 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
65 if (print_err)
66 pr_err("error! Unknown microcode update format\n");
67 return -EINVAL;
68 }
69 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
70 if (ext_table_size) {
71 if ((ext_table_size < EXT_HEADER_SIZE)
72 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
73 if (print_err)
74 pr_err("error! Small exttable size in microcode data file\n");
75 return -EINVAL;
76 }
77 ext_header = mc + MC_HEADER_SIZE + data_size;
78 if (ext_table_size != exttable_size(ext_header)) {
79 if (print_err)
80 pr_err("error! Bad exttable size in microcode data file\n");
81 return -EFAULT;
82 }
83 ext_sigcount = ext_header->count;
84 }
85
86 /* check extended table checksum */
87 if (ext_table_size) {
88 int ext_table_sum = 0;
89 int *ext_tablep = (int *)ext_header;
90
91 i = ext_table_size / DWSIZE;
92 while (i--)
93 ext_table_sum += ext_tablep[i];
94 if (ext_table_sum) {
95 if (print_err)
96 pr_warn("aborting, bad extended signature table checksum\n");
97 return -EINVAL;
98 }
99 }
100
101 /* calculate the checksum */
102 orig_sum = 0;
103 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
104 while (i--)
105 orig_sum += ((int *)mc)[i];
106 if (orig_sum) {
107 if (print_err)
108 pr_err("aborting, bad checksum\n");
109 return -EINVAL;
110 }
111 if (!ext_table_size)
112 return 0;
113 /* check extended signature checksum */
114 for (i = 0; i < ext_sigcount; i++) {
115 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
116 EXT_SIGNATURE_SIZE * i;
117 sum = orig_sum
118 - (mc_header->sig + mc_header->pf + mc_header->cksum)
119 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
120 if (sum) {
121 if (print_err)
122 pr_err("aborting, bad checksum\n");
123 return -EINVAL;
124 }
125 }
126 return 0;
127}
128EXPORT_SYMBOL_GPL(microcode_sanity_check);
129
130/*
131 * return 0 - no update found
132 * return 1 - found update
133 */
134int get_matching_sig(unsigned int csig, int cpf, void *mc, int rev)
135{
136 struct microcode_header_intel *mc_header = mc;
137 struct extended_sigtable *ext_header;
138 unsigned long total_size = get_totalsize(mc_header);
139 int ext_sigcount, i;
140 struct extended_signature *ext_sig;
141
142 if (update_match_cpu(csig, cpf, mc_header->sig, mc_header->pf))
143 return 1;
144
145 /* Look for ext. headers: */
146 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
147 return 0;
148
149 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
150 ext_sigcount = ext_header->count;
151 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
152
153 for (i = 0; i < ext_sigcount; i++) {
154 if (update_match_cpu(csig, cpf, ext_sig->sig, ext_sig->pf))
155 return 1;
156 ext_sig++;
157 }
158 return 0;
159}
160
161/*
162 * return 0 - no update found
163 * return 1 - found update
164 */
165int get_matching_microcode(unsigned int csig, int cpf, void *mc, int rev)
166{
167 struct microcode_header_intel *mc_header = mc;
168
169 if (!update_match_revision(mc_header, rev))
170 return 0;
171
172 return get_matching_sig(csig, cpf, mc, rev);
173}
174EXPORT_SYMBOL_GPL(get_matching_microcode);
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index d41815265a0b..4903a03ae876 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -16,6 +16,7 @@
16#include <asm/tlb.h> 16#include <asm/tlb.h>
17#include <asm/proto.h> 17#include <asm/proto.h>
18#include <asm/dma.h> /* for MAX_DMA_PFN */ 18#include <asm/dma.h> /* for MAX_DMA_PFN */
19#include <asm/microcode.h>
19 20
20#include "mm_internal.h" 21#include "mm_internal.h"
21 22
@@ -534,6 +535,15 @@ void free_initmem(void)
534#ifdef CONFIG_BLK_DEV_INITRD 535#ifdef CONFIG_BLK_DEV_INITRD
535void __init free_initrd_mem(unsigned long start, unsigned long end) 536void __init free_initrd_mem(unsigned long start, unsigned long end)
536{ 537{
538#ifdef CONFIG_MICROCODE_EARLY
539 /*
540 * Remember, initrd memory may contain microcode or other useful things.
541 * Before we lose initrd mem, we need to find a place to hold them
542 * now that normal virtual memory is enabled.
543 */
544 save_microcode_in_initrd();
545#endif
546
537 /* 547 /*
538 * end could be not aligned, and We can not align that, 548 * end could be not aligned, and We can not align that,
539 * decompresser could be confused by aligned initrd_end 549 * decompresser could be confused by aligned initrd_end
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index f5e86eee4e0e..e8e34938c57d 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1408,7 +1408,6 @@ static void __xen_write_cr3(bool kernel, unsigned long cr3)
1408 xen_mc_callback(set_current_cr3, (void *)cr3); 1408 xen_mc_callback(set_current_cr3, (void *)cr3);
1409 } 1409 }
1410} 1410}
1411
1412static void xen_write_cr3(unsigned long cr3) 1411static void xen_write_cr3(unsigned long cr3)
1413{ 1412{
1414 BUG_ON(preemptible()); 1413 BUG_ON(preemptible());
@@ -1434,6 +1433,45 @@ static void xen_write_cr3(unsigned long cr3)
1434 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1433 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1435} 1434}
1436 1435
1436#ifdef CONFIG_X86_64
1437/*
1438 * At the start of the day - when Xen launches a guest, it has already
1439 * built pagetables for the guest. We diligently look over them
1440 * in xen_setup_kernel_pagetable and graft as appropiate them in the
1441 * init_level4_pgt and its friends. Then when we are happy we load
1442 * the new init_level4_pgt - and continue on.
1443 *
1444 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1445 * up the rest of the pagetables. When it has completed it loads the cr3.
1446 * N.B. that baremetal would start at 'start_kernel' (and the early
1447 * #PF handler would create bootstrap pagetables) - so we are running
1448 * with the same assumptions as what to do when write_cr3 is executed
1449 * at this point.
1450 *
1451 * Since there are no user-page tables at all, we have two variants
1452 * of xen_write_cr3 - the early bootup (this one), and the late one
1453 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1454 * the Linux kernel and user-space are both in ring 3 while the
1455 * hypervisor is in ring 0.
1456 */
1457static void __init xen_write_cr3_init(unsigned long cr3)
1458{
1459 BUG_ON(preemptible());
1460
1461 xen_mc_batch(); /* disables interrupts */
1462
1463 /* Update while interrupts are disabled, so its atomic with
1464 respect to ipis */
1465 this_cpu_write(xen_cr3, cr3);
1466
1467 __xen_write_cr3(true, cr3);
1468
1469 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1470
1471 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1472}
1473#endif
1474
1437static int xen_pgd_alloc(struct mm_struct *mm) 1475static int xen_pgd_alloc(struct mm_struct *mm)
1438{ 1476{
1439 pgd_t *pgd = mm->pgd; 1477 pgd_t *pgd = mm->pgd;
@@ -2102,11 +2140,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2102 .write_cr2 = xen_write_cr2, 2140 .write_cr2 = xen_write_cr2,
2103 2141
2104 .read_cr3 = xen_read_cr3, 2142 .read_cr3 = xen_read_cr3,
2105#ifdef CONFIG_X86_32
2106 .write_cr3 = xen_write_cr3_init, 2143 .write_cr3 = xen_write_cr3_init,
2107#else
2108 .write_cr3 = xen_write_cr3,
2109#endif
2110 2144
2111 .flush_tlb_user = xen_flush_tlb, 2145 .flush_tlb_user = xen_flush_tlb,
2112 .flush_tlb_kernel = xen_flush_tlb, 2146 .flush_tlb_kernel = xen_flush_tlb,
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 3f37520035dd..0880a14834aa 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -477,6 +477,13 @@ config CRYPTO_SHA1_ARM
477 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented 477 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
478 using optimized ARM assembler. 478 using optimized ARM assembler.
479 479
480config CRYPTO_SHA1_PPC
481 tristate "SHA1 digest algorithm (powerpc)"
482 depends on PPC
483 help
484 This is the powerpc hardware accelerated implementation of the
485 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
486
480config CRYPTO_SHA256 487config CRYPTO_SHA256
481 tristate "SHA224 and SHA256 digest algorithm" 488 tristate "SHA224 and SHA256 digest algorithm"
482 select CRYPTO_HASH 489 select CRYPTO_HASH
diff --git a/drivers/Makefile b/drivers/Makefile
index b359948fc02b..dce39a95fa71 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_PNP) += pnp/
29obj-y += amba/ 29obj-y += amba/
30# Many drivers will want to use DMA so this has to be made available 30# Many drivers will want to use DMA so this has to be made available
31# really early. 31# really early.
32obj-$(CONFIG_DMA_ENGINE) += dma/ 32obj-$(CONFIG_DMADEVICES) += dma/
33 33
34obj-$(CONFIG_VIRTIO) += virtio/ 34obj-$(CONFIG_VIRTIO) += virtio/
35obj-$(CONFIG_XEN) += xen/ 35obj-$(CONFIG_XEN) += xen/
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 652f57e83484..3a8fb28b71f2 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -26,9 +26,9 @@
26#include <asm/prom.h> 26#include <asm/prom.h>
27#include <asm/mpc52xx.h> 27#include <asm/mpc52xx.h>
28 28
29#include <sysdev/bestcomm/bestcomm.h> 29#include <linux/fsl/bestcomm/bestcomm.h>
30#include <sysdev/bestcomm/bestcomm_priv.h> 30#include <linux/fsl/bestcomm/bestcomm_priv.h>
31#include <sysdev/bestcomm/ata.h> 31#include <linux/fsl/bestcomm/ata.h>
32 32
33#define DRV_NAME "mpc52xx_ata" 33#define DRV_NAME "mpc52xx_ata"
34 34
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 85e81ec1451e..594bda9dcfc8 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -445,7 +445,7 @@ static struct entropy_store input_pool = {
445 .poolinfo = &poolinfo_table[0], 445 .poolinfo = &poolinfo_table[0],
446 .name = "input", 446 .name = "input",
447 .limit = 1, 447 .limit = 1,
448 .lock = __SPIN_LOCK_UNLOCKED(&input_pool.lock), 448 .lock = __SPIN_LOCK_UNLOCKED(input_pool.lock),
449 .pool = input_pool_data 449 .pool = input_pool_data
450}; 450};
451 451
@@ -454,7 +454,7 @@ static struct entropy_store blocking_pool = {
454 .name = "blocking", 454 .name = "blocking",
455 .limit = 1, 455 .limit = 1,
456 .pull = &input_pool, 456 .pull = &input_pool,
457 .lock = __SPIN_LOCK_UNLOCKED(&blocking_pool.lock), 457 .lock = __SPIN_LOCK_UNLOCKED(blocking_pool.lock),
458 .pool = blocking_pool_data 458 .pool = blocking_pool_data
459}; 459};
460 460
@@ -462,7 +462,7 @@ static struct entropy_store nonblocking_pool = {
462 .poolinfo = &poolinfo_table[1], 462 .poolinfo = &poolinfo_table[1],
463 .name = "nonblocking", 463 .name = "nonblocking",
464 .pull = &input_pool, 464 .pull = &input_pool,
465 .lock = __SPIN_LOCK_UNLOCKED(&nonblocking_pool.lock), 465 .lock = __SPIN_LOCK_UNLOCKED(nonblocking_pool.lock),
466 .pool = nonblocking_pool_data 466 .pool = nonblocking_pool_data
467}; 467};
468 468
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d4c12180c654..40179e749f08 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -125,6 +125,8 @@ config MPC512X_DMA
125 ---help--- 125 ---help---
126 Enable support for the Freescale MPC512x built-in DMA engine. 126 Enable support for the Freescale MPC512x built-in DMA engine.
127 127
128source "drivers/dma/bestcomm/Kconfig"
129
128config MV_XOR 130config MV_XOR
129 bool "Marvell XOR engine support" 131 bool "Marvell XOR engine support"
130 depends on PLAT_ORION 132 depends on PLAT_ORION
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 7428feaa8705..642d96736cf5 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_INTEL_IOATDMA) += ioat/
10obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o 10obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
11obj-$(CONFIG_FSL_DMA) += fsldma.o 11obj-$(CONFIG_FSL_DMA) += fsldma.o
12obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o 12obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
13obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
13obj-$(CONFIG_MV_XOR) += mv_xor.o 14obj-$(CONFIG_MV_XOR) += mv_xor.o
14obj-$(CONFIG_DW_DMAC) += dw_dmac.o 15obj-$(CONFIG_DW_DMAC) += dw_dmac.o
15obj-$(CONFIG_AT_HDMAC) += at_hdmac.o 16obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
diff --git a/arch/powerpc/sysdev/bestcomm/Kconfig b/drivers/dma/bestcomm/Kconfig
index 29e427085efb..29e427085efb 100644
--- a/arch/powerpc/sysdev/bestcomm/Kconfig
+++ b/drivers/dma/bestcomm/Kconfig
diff --git a/arch/powerpc/sysdev/bestcomm/Makefile b/drivers/dma/bestcomm/Makefile
index aed2df2a6580..aed2df2a6580 100644
--- a/arch/powerpc/sysdev/bestcomm/Makefile
+++ b/drivers/dma/bestcomm/Makefile
diff --git a/arch/powerpc/sysdev/bestcomm/ata.c b/drivers/dma/bestcomm/ata.c
index 901c9f91e5dd..2fd87f83cf90 100644
--- a/arch/powerpc/sysdev/bestcomm/ata.c
+++ b/drivers/dma/bestcomm/ata.c
@@ -18,9 +18,9 @@
18#include <linux/types.h> 18#include <linux/types.h>
19#include <asm/io.h> 19#include <asm/io.h>
20 20
21#include "bestcomm.h" 21#include <linux/fsl/bestcomm/bestcomm.h>
22#include "bestcomm_priv.h" 22#include <linux/fsl/bestcomm/bestcomm_priv.h>
23#include "ata.h" 23#include <linux/fsl/bestcomm/ata.h>
24 24
25 25
26/* ======================================================================== */ 26/* ======================================================================== */
diff --git a/arch/powerpc/sysdev/bestcomm/bcom_ata_task.c b/drivers/dma/bestcomm/bcom_ata_task.c
index cc6049a4e469..cc6049a4e469 100644
--- a/arch/powerpc/sysdev/bestcomm/bcom_ata_task.c
+++ b/drivers/dma/bestcomm/bcom_ata_task.c
diff --git a/arch/powerpc/sysdev/bestcomm/bcom_fec_rx_task.c b/drivers/dma/bestcomm/bcom_fec_rx_task.c
index a1ad6a02fcef..a1ad6a02fcef 100644
--- a/arch/powerpc/sysdev/bestcomm/bcom_fec_rx_task.c
+++ b/drivers/dma/bestcomm/bcom_fec_rx_task.c
diff --git a/arch/powerpc/sysdev/bestcomm/bcom_fec_tx_task.c b/drivers/dma/bestcomm/bcom_fec_tx_task.c
index b1c495c3a65a..b1c495c3a65a 100644
--- a/arch/powerpc/sysdev/bestcomm/bcom_fec_tx_task.c
+++ b/drivers/dma/bestcomm/bcom_fec_tx_task.c
diff --git a/arch/powerpc/sysdev/bestcomm/bcom_gen_bd_rx_task.c b/drivers/dma/bestcomm/bcom_gen_bd_rx_task.c
index efee022b0256..efee022b0256 100644
--- a/arch/powerpc/sysdev/bestcomm/bcom_gen_bd_rx_task.c
+++ b/drivers/dma/bestcomm/bcom_gen_bd_rx_task.c
diff --git a/arch/powerpc/sysdev/bestcomm/bcom_gen_bd_tx_task.c b/drivers/dma/bestcomm/bcom_gen_bd_tx_task.c
index c605aa42ecbb..c605aa42ecbb 100644
--- a/arch/powerpc/sysdev/bestcomm/bcom_gen_bd_tx_task.c
+++ b/drivers/dma/bestcomm/bcom_gen_bd_tx_task.c
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/drivers/dma/bestcomm/bestcomm.c
index 81c331481336..a8c2e2994d2e 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/drivers/dma/bestcomm/bestcomm.c
@@ -23,9 +23,9 @@
23#include <asm/irq.h> 23#include <asm/irq.h>
24#include <asm/mpc52xx.h> 24#include <asm/mpc52xx.h>
25 25
26#include "sram.h" 26#include <linux/fsl/bestcomm/sram.h>
27#include "bestcomm_priv.h" 27#include <linux/fsl/bestcomm/bestcomm_priv.h>
28#include "bestcomm.h" 28#include "linux/fsl/bestcomm/bestcomm.h"
29 29
30#define DRIVER_NAME "bestcomm-core" 30#define DRIVER_NAME "bestcomm-core"
31 31
diff --git a/arch/powerpc/sysdev/bestcomm/fec.c b/drivers/dma/bestcomm/fec.c
index 957a988d23ea..7f1fb1c999e4 100644
--- a/arch/powerpc/sysdev/bestcomm/fec.c
+++ b/drivers/dma/bestcomm/fec.c
@@ -16,9 +16,9 @@
16#include <linux/types.h> 16#include <linux/types.h>
17#include <asm/io.h> 17#include <asm/io.h>
18 18
19#include "bestcomm.h" 19#include <linux/fsl/bestcomm/bestcomm.h>
20#include "bestcomm_priv.h" 20#include <linux/fsl/bestcomm/bestcomm_priv.h>
21#include "fec.h" 21#include <linux/fsl/bestcomm/fec.h>
22 22
23 23
24/* ======================================================================== */ 24/* ======================================================================== */
diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.c b/drivers/dma/bestcomm/gen_bd.c
index e0a53e3147b2..1a5b22d88127 100644
--- a/arch/powerpc/sysdev/bestcomm/gen_bd.c
+++ b/drivers/dma/bestcomm/gen_bd.c
@@ -21,9 +21,9 @@
21#include <asm/mpc52xx.h> 21#include <asm/mpc52xx.h>
22#include <asm/mpc52xx_psc.h> 22#include <asm/mpc52xx_psc.h>
23 23
24#include "bestcomm.h" 24#include <linux/fsl/bestcomm/bestcomm.h>
25#include "bestcomm_priv.h" 25#include <linux/fsl/bestcomm/bestcomm_priv.h>
26#include "gen_bd.h" 26#include <linux/fsl/bestcomm/gen_bd.h>
27 27
28 28
29/* ======================================================================== */ 29/* ======================================================================== */
diff --git a/arch/powerpc/sysdev/bestcomm/sram.c b/drivers/dma/bestcomm/sram.c
index b6db23e085fb..5e2ed30ba2c4 100644
--- a/arch/powerpc/sysdev/bestcomm/sram.c
+++ b/drivers/dma/bestcomm/sram.c
@@ -23,7 +23,7 @@
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/mmu.h> 24#include <asm/mmu.h>
25 25
26#include "sram.h" 26#include <linux/fsl/bestcomm/sram.h>
27 27
28 28
29/* Struct keeping our 'state' */ 29/* Struct keeping our 'state' */
diff --git a/drivers/idle/i7300_idle.c b/drivers/idle/i7300_idle.c
index fa080ebd568f..ffeebc7e9f1c 100644
--- a/drivers/idle/i7300_idle.c
+++ b/drivers/idle/i7300_idle.c
@@ -75,7 +75,7 @@ static unsigned long past_skip;
75 75
76static struct pci_dev *fbd_dev; 76static struct pci_dev *fbd_dev;
77 77
78static spinlock_t i7300_idle_lock; 78static raw_spinlock_t i7300_idle_lock;
79static int i7300_idle_active; 79static int i7300_idle_active;
80 80
81static u8 i7300_idle_thrtctl_saved; 81static u8 i7300_idle_thrtctl_saved;
@@ -457,7 +457,7 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
457 idle_begin_time = ktime_get(); 457 idle_begin_time = ktime_get();
458 } 458 }
459 459
460 spin_lock_irqsave(&i7300_idle_lock, flags); 460 raw_spin_lock_irqsave(&i7300_idle_lock, flags);
461 if (val == IDLE_START) { 461 if (val == IDLE_START) {
462 462
463 cpumask_set_cpu(smp_processor_id(), idle_cpumask); 463 cpumask_set_cpu(smp_processor_id(), idle_cpumask);
@@ -506,7 +506,7 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
506 } 506 }
507 } 507 }
508end: 508end:
509 spin_unlock_irqrestore(&i7300_idle_lock, flags); 509 raw_spin_unlock_irqrestore(&i7300_idle_lock, flags);
510 return 0; 510 return 0;
511} 511}
512 512
@@ -548,7 +548,7 @@ struct debugfs_file_info {
548 548
549static int __init i7300_idle_init(void) 549static int __init i7300_idle_init(void)
550{ 550{
551 spin_lock_init(&i7300_idle_lock); 551 raw_spin_lock_init(&i7300_idle_lock);
552 total_us = 0; 552 total_us = 0;
553 553
554 if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload)) 554 if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload))
diff --git a/drivers/macintosh/windfarm_pm112.c b/drivers/macintosh/windfarm_pm112.c
index 35ef6e2582b8..3024685e4cca 100644
--- a/drivers/macintosh/windfarm_pm112.c
+++ b/drivers/macintosh/windfarm_pm112.c
@@ -681,7 +681,7 @@ static int __init wf_pm112_init(void)
681 681
682 /* Count the number of CPU cores */ 682 /* Count the number of CPU cores */
683 nr_cores = 0; 683 nr_cores = 0;
684 for (cpu = NULL; (cpu = of_find_node_by_type(cpu, "cpu")) != NULL; ) 684 for_each_node_by_type(cpu, "cpu")
685 ++nr_cores; 685 ++nr_cores;
686 686
687 printk(KERN_INFO "windfarm: initializing for dual-core desktop G5\n"); 687 printk(KERN_INFO "windfarm: initializing for dual-core desktop G5\n");
diff --git a/drivers/macintosh/windfarm_pm72.c b/drivers/macintosh/windfarm_pm72.c
index 6e5585357cd3..2f506b9d5a52 100644
--- a/drivers/macintosh/windfarm_pm72.c
+++ b/drivers/macintosh/windfarm_pm72.c
@@ -804,7 +804,7 @@ static int __init wf_pm72_init(void)
804 804
805 /* Count the number of CPU cores */ 805 /* Count the number of CPU cores */
806 nr_chips = 0; 806 nr_chips = 0;
807 for (cpu = NULL; (cpu = of_find_node_by_type(cpu, "cpu")) != NULL; ) 807 for_each_node_by_type(cpu, "cpu")
808 ++nr_chips; 808 ++nr_chips;
809 if (nr_chips > NR_CHIPS) 809 if (nr_chips > NR_CHIPS)
810 nr_chips = NR_CHIPS; 810 nr_chips = NR_CHIPS;
diff --git a/drivers/macintosh/windfarm_rm31.c b/drivers/macintosh/windfarm_rm31.c
index 844003fb4ef0..0b9a79b2f48a 100644
--- a/drivers/macintosh/windfarm_rm31.c
+++ b/drivers/macintosh/windfarm_rm31.c
@@ -696,7 +696,7 @@ static int __init wf_rm31_init(void)
696 696
697 /* Count the number of CPU cores */ 697 /* Count the number of CPU cores */
698 nr_chips = 0; 698 nr_chips = 0;
699 for (cpu = NULL; (cpu = of_find_node_by_type(cpu, "cpu")) != NULL; ) 699 for_each_node_by_type(cpu, "cpu")
700 ++nr_chips; 700 ++nr_chips;
701 if (nr_chips > NR_CHIPS) 701 if (nr_chips > NR_CHIPS)
702 nr_chips = NR_CHIPS; 702 nr_chips = NR_CHIPS;
diff --git a/drivers/net/ethernet/freescale/fec_mpc52xx.c b/drivers/net/ethernet/freescale/fec_mpc52xx.c
index 7f91b0c5c264..77943a6a1b8c 100644
--- a/drivers/net/ethernet/freescale/fec_mpc52xx.c
+++ b/drivers/net/ethernet/freescale/fec_mpc52xx.c
@@ -41,8 +41,8 @@
41#include <asm/delay.h> 41#include <asm/delay.h>
42#include <asm/mpc52xx.h> 42#include <asm/mpc52xx.h>
43 43
44#include <sysdev/bestcomm/bestcomm.h> 44#include <linux/fsl/bestcomm/bestcomm.h>
45#include <sysdev/bestcomm/fec.h> 45#include <linux/fsl/bestcomm/fec.h>
46 46
47#include "fec_mpc52xx.h" 47#include "fec_mpc52xx.h"
48 48
diff --git a/drivers/parisc/Kconfig b/drivers/parisc/Kconfig
index 620264936341..592de566e72f 100644
--- a/drivers/parisc/Kconfig
+++ b/drivers/parisc/Kconfig
@@ -128,6 +128,7 @@ config SUPERIO
128config CHASSIS_LCD_LED 128config CHASSIS_LCD_LED
129 bool "Chassis LCD and LED support" 129 bool "Chassis LCD and LED support"
130 default y 130 default y
131 select VM_EVENT_COUNTERS
131 help 132 help
132 Say Y here if you want to enable support for the Heartbeat, 133 Say Y here if you want to enable support for the Heartbeat,
133 Disk/Network activities LEDs on some PA-RISC machines, 134 Disk/Network activities LEDs on some PA-RISC machines,
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index 8e4e86b78428..9eae9834bcc7 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -580,15 +580,13 @@ dino_fixup_bus(struct pci_bus *bus)
580 580
581 } 581 }
582 582
583 DBG("DEBUG %s assigning %d [0x%lx,0x%lx]\n", 583 DBG("DEBUG %s assigning %d [%pR]\n",
584 dev_name(&bus->self->dev), i, 584 dev_name(&bus->self->dev), i,
585 bus->self->resource[i].start, 585 &bus->self->resource[i]);
586 bus->self->resource[i].end);
587 WARN_ON(pci_assign_resource(bus->self, i)); 586 WARN_ON(pci_assign_resource(bus->self, i));
588 DBG("DEBUG %s after assign %d [0x%lx,0x%lx]\n", 587 DBG("DEBUG %s after assign %d [%pR]\n",
589 dev_name(&bus->self->dev), i, 588 dev_name(&bus->self->dev), i,
590 bus->self->resource[i].start, 589 &bus->self->resource[i]);
591 bus->self->resource[i].end);
592 } 590 }
593 } 591 }
594 592
@@ -772,8 +770,7 @@ dino_bridge_init(struct dino_device *dino_dev, const char *name)
772 result = ccio_request_resource(dino_dev->hba.dev, &res[i]); 770 result = ccio_request_resource(dino_dev->hba.dev, &res[i]);
773 if (result < 0) { 771 if (result < 0) {
774 printk(KERN_ERR "%s: failed to claim PCI Bus address " 772 printk(KERN_ERR "%s: failed to claim PCI Bus address "
775 "space %d (0x%lx-0x%lx)!\n", name, i, 773 "space %d (%pR)!\n", name, i, &res[i]);
776 (unsigned long)res[i].start, (unsigned long)res[i].end);
777 return result; 774 return result;
778 } 775 }
779 } 776 }
diff --git a/drivers/parisc/hppb.c b/drivers/parisc/hppb.c
index 815db175d427..898208e4f302 100644
--- a/drivers/parisc/hppb.c
+++ b/drivers/parisc/hppb.c
@@ -74,10 +74,8 @@ static int hppb_probe(struct parisc_device *dev)
74 74
75 status = ccio_request_resource(dev, &card->mmio_region); 75 status = ccio_request_resource(dev, &card->mmio_region);
76 if(status < 0) { 76 if(status < 0) {
77 printk(KERN_ERR "%s: failed to claim HP-PB " 77 printk(KERN_ERR "%s: failed to claim HP-PB bus space (%pR)\n",
78 "bus space (0x%08llx, 0x%08llx)\n", 78 __FILE__, &card->mmio_region);
79 __FILE__, (unsigned long long) card->mmio_region.start,
80 (unsigned long long) card->mmio_region.end);
81 } 79 }
82 80
83 return 0; 81 return 0;
diff --git a/drivers/parisc/pdc_stable.c b/drivers/parisc/pdc_stable.c
index 246a92f677e4..0f54ab6260df 100644
--- a/drivers/parisc/pdc_stable.c
+++ b/drivers/parisc/pdc_stable.c
@@ -212,12 +212,10 @@ pdcspath_store(struct pdcspath_entry *entry)
212 entry, devpath, entry->addr); 212 entry, devpath, entry->addr);
213 213
214 /* addr, devpath and count must be word aligned */ 214 /* addr, devpath and count must be word aligned */
215 if (pdc_stable_write(entry->addr, devpath, sizeof(*devpath)) != PDC_OK) { 215 if (pdc_stable_write(entry->addr, devpath, sizeof(*devpath)) != PDC_OK)
216 printk(KERN_ERR "%s: an error occurred when writing to PDC.\n" 216 WARN(1, KERN_ERR "%s: an error occurred when writing to PDC.\n"
217 "It is likely that the Stable Storage data has been corrupted.\n" 217 "It is likely that the Stable Storage data has been corrupted.\n"
218 "Please check it carefully upon next reboot.\n", __func__); 218 "Please check it carefully upon next reboot.\n", __func__);
219 WARN_ON(1);
220 }
221 219
222 /* kobject is already registered */ 220 /* kobject is already registered */
223 entry->ready = 2; 221 entry->ready = 2;
diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c
index 5003458980d3..ac6e8e7a02df 100644
--- a/drivers/parisc/superio.c
+++ b/drivers/parisc/superio.c
@@ -274,7 +274,7 @@ superio_init(struct pci_dev *pcidev)
274 else 274 else
275 printk(KERN_ERR PFX "USB regulator not initialized!\n"); 275 printk(KERN_ERR PFX "USB regulator not initialized!\n");
276 276
277 if (request_irq(pdev->irq, superio_interrupt, IRQF_DISABLED, 277 if (request_irq(pdev->irq, superio_interrupt, 0,
278 SUPERIO, (void *)sio)) { 278 SUPERIO, (void *)sio)) {
279 279
280 printk(KERN_ERR PFX "could not get irq\n"); 280 printk(KERN_ERR PFX "could not get irq\n");
diff --git a/drivers/usb/chipidea/debug.c b/drivers/usb/chipidea/debug.c
index 3bc244d2636a..a62c4a47d52c 100644
--- a/drivers/usb/chipidea/debug.c
+++ b/drivers/usb/chipidea/debug.c
@@ -222,7 +222,7 @@ static struct {
222} dbg_data = { 222} dbg_data = {
223 .idx = 0, 223 .idx = 0,
224 .tty = 0, 224 .tty = 0,
225 .lck = __RW_LOCK_UNLOCKED(lck) 225 .lck = __RW_LOCK_UNLOCKED(dbg_data.lck)
226}; 226};
227 227
228/** 228/**
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 19cfd7a92563..41fbd9453c5f 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -944,7 +944,7 @@ static u32 fsl_diu_get_pixel_format(unsigned int bits_per_pixel)
944#define PF_COMP_0_MASK 0x0000000F 944#define PF_COMP_0_MASK 0x0000000F
945#define PF_COMP_0_SHIFT 0 945#define PF_COMP_0_SHIFT 0
946 946
947#define MAKE_PF(alpha, red, blue, green, size, c0, c1, c2, c3) \ 947#define MAKE_PF(alpha, red, green, blue, size, c0, c1, c2, c3) \
948 cpu_to_le32(PF_BYTE_F | (alpha << PF_ALPHA_C_SHIFT) | \ 948 cpu_to_le32(PF_BYTE_F | (alpha << PF_ALPHA_C_SHIFT) | \
949 (blue << PF_BLUE_C_SHIFT) | (green << PF_GREEN_C_SHIFT) | \ 949 (blue << PF_BLUE_C_SHIFT) | (green << PF_GREEN_C_SHIFT) | \
950 (red << PF_RED_C_SHIFT) | (c3 << PF_COMP_3_SHIFT) | \ 950 (red << PF_RED_C_SHIFT) | (c3 << PF_COMP_3_SHIFT) | \
@@ -954,10 +954,10 @@ static u32 fsl_diu_get_pixel_format(unsigned int bits_per_pixel)
954 switch (bits_per_pixel) { 954 switch (bits_per_pixel) {
955 case 32: 955 case 32:
956 /* 0x88883316 */ 956 /* 0x88883316 */
957 return MAKE_PF(3, 2, 0, 1, 3, 8, 8, 8, 8); 957 return MAKE_PF(3, 2, 1, 0, 3, 8, 8, 8, 8);
958 case 24: 958 case 24:
959 /* 0x88082219 */ 959 /* 0x88082219 */
960 return MAKE_PF(4, 0, 1, 2, 2, 0, 8, 8, 8); 960 return MAKE_PF(4, 0, 1, 2, 2, 8, 8, 8, 0);
961 case 16: 961 case 16:
962 /* 0x65053118 */ 962 /* 0x65053118 */
963 return MAKE_PF(4, 2, 1, 0, 1, 5, 6, 5, 0); 963 return MAKE_PF(4, 2, 1, 0, 1, 5, 6, 5, 0);
@@ -1232,6 +1232,16 @@ static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
1232 return 0; 1232 return 0;
1233} 1233}
1234 1234
1235static inline void fsl_diu_enable_interrupts(struct fsl_diu_data *data)
1236{
1237 u32 int_mask = INT_UNDRUN; /* enable underrun detection */
1238
1239 if (IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
1240 int_mask |= INT_VSYNC; /* enable vertical sync */
1241
1242 clrbits32(&data->diu_reg->int_mask, int_mask);
1243}
1244
1235/* turn on fb if count == 1 1245/* turn on fb if count == 1
1236 */ 1246 */
1237static int fsl_diu_open(struct fb_info *info, int user) 1247static int fsl_diu_open(struct fb_info *info, int user)
@@ -1251,19 +1261,7 @@ static int fsl_diu_open(struct fb_info *info, int user)
1251 if (res < 0) 1261 if (res < 0)
1252 mfbi->count--; 1262 mfbi->count--;
1253 else { 1263 else {
1254 struct fsl_diu_data *data = mfbi->parent; 1264 fsl_diu_enable_interrupts(mfbi->parent);
1255
1256#ifdef CONFIG_NOT_COHERENT_CACHE
1257 /*
1258 * Enable underrun detection and vertical sync
1259 * interrupts.
1260 */
1261 clrbits32(&data->diu_reg->int_mask,
1262 INT_UNDRUN | INT_VSYNC);
1263#else
1264 /* Enable underrun detection */
1265 clrbits32(&data->diu_reg->int_mask, INT_UNDRUN);
1266#endif
1267 fsl_diu_enable_panel(info); 1265 fsl_diu_enable_panel(info);
1268 } 1266 }
1269 } 1267 }
@@ -1283,9 +1281,18 @@ static int fsl_diu_release(struct fb_info *info, int user)
1283 mfbi->count--; 1281 mfbi->count--;
1284 if (mfbi->count == 0) { 1282 if (mfbi->count == 0) {
1285 struct fsl_diu_data *data = mfbi->parent; 1283 struct fsl_diu_data *data = mfbi->parent;
1284 bool disable = true;
1285 int i;
1286 1286
1287 /* Disable interrupts */ 1287 /* Disable interrupts only if all AOIs are closed */
1288 out_be32(&data->diu_reg->int_mask, 0xffffffff); 1288 for (i = 0; i < NUM_AOIS; i++) {
1289 struct mfb_info *mi = data->fsl_diu_info[i].par;
1290
1291 if (mi->count)
1292 disable = false;
1293 }
1294 if (disable)
1295 out_be32(&data->diu_reg->int_mask, 0xffffffff);
1289 fsl_diu_disable_panel(info); 1296 fsl_diu_disable_panel(info);
1290 } 1297 }
1291 1298
@@ -1614,14 +1621,6 @@ static int fsl_diu_probe(struct platform_device *pdev)
1614 out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr); 1621 out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr);
1615 out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr); 1622 out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr);
1616 1623
1617 for (i = 0; i < NUM_AOIS; i++) {
1618 ret = install_fb(&data->fsl_diu_info[i]);
1619 if (ret) {
1620 dev_err(&pdev->dev, "could not register fb %d\n", i);
1621 goto error;
1622 }
1623 }
1624
1625 /* 1624 /*
1626 * Older versions of U-Boot leave interrupts enabled, so disable 1625 * Older versions of U-Boot leave interrupts enabled, so disable
1627 * all of them and clear the status register. 1626 * all of them and clear the status register.
@@ -1630,12 +1629,21 @@ static int fsl_diu_probe(struct platform_device *pdev)
1630 in_be32(&data->diu_reg->int_status); 1629 in_be32(&data->diu_reg->int_status);
1631 1630
1632 ret = request_irq(data->irq, fsl_diu_isr, 0, "fsl-diu-fb", 1631 ret = request_irq(data->irq, fsl_diu_isr, 0, "fsl-diu-fb",
1633 &data->diu_reg); 1632 data->diu_reg);
1634 if (ret) { 1633 if (ret) {
1635 dev_err(&pdev->dev, "could not claim irq\n"); 1634 dev_err(&pdev->dev, "could not claim irq\n");
1636 goto error; 1635 goto error;
1637 } 1636 }
1638 1637
1638 for (i = 0; i < NUM_AOIS; i++) {
1639 ret = install_fb(&data->fsl_diu_info[i]);
1640 if (ret) {
1641 dev_err(&pdev->dev, "could not register fb %d\n", i);
1642 free_irq(data->irq, data->diu_reg);
1643 goto error;
1644 }
1645 }
1646
1639 sysfs_attr_init(&data->dev_attr.attr); 1647 sysfs_attr_init(&data->dev_attr.attr);
1640 data->dev_attr.attr.name = "monitor"; 1648 data->dev_attr.attr.name = "monitor";
1641 data->dev_attr.attr.mode = S_IRUGO|S_IWUSR; 1649 data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
@@ -1667,7 +1675,7 @@ static int fsl_diu_remove(struct platform_device *pdev)
1667 data = dev_get_drvdata(&pdev->dev); 1675 data = dev_get_drvdata(&pdev->dev);
1668 disable_lcdc(&data->fsl_diu_info[0]); 1676 disable_lcdc(&data->fsl_diu_info[0]);
1669 1677
1670 free_irq(data->irq, &data->diu_reg); 1678 free_irq(data->irq, data->diu_reg);
1671 1679
1672 for (i = 0; i < NUM_AOIS; i++) 1680 for (i = 0; i < NUM_AOIS; i++)
1673 uninstall_fb(&data->fsl_diu_info[i]); 1681 uninstall_fb(&data->fsl_diu_info[i]);
diff --git a/fs/file.c b/fs/file.c
index 2b3570b7caeb..3906d9577a18 100644
--- a/fs/file.c
+++ b/fs/file.c
@@ -516,7 +516,7 @@ struct files_struct init_files = {
516 .close_on_exec = init_files.close_on_exec_init, 516 .close_on_exec = init_files.close_on_exec_init,
517 .open_fds = init_files.open_fds_init, 517 .open_fds = init_files.open_fds_init,
518 }, 518 },
519 .file_lock = __SPIN_LOCK_UNLOCKED(init_task.file_lock), 519 .file_lock = __SPIN_LOCK_UNLOCKED(init_files.file_lock),
520}; 520};
521 521
522/* 522/*
diff --git a/include/asm-generic/cmpxchg-local.h b/include/asm-generic/cmpxchg-local.h
index 2533fddd34a6..d8d4c898c1bb 100644
--- a/include/asm-generic/cmpxchg-local.h
+++ b/include/asm-generic/cmpxchg-local.h
@@ -21,7 +21,7 @@ static inline unsigned long __cmpxchg_local_generic(volatile void *ptr,
21 if (size == 8 && sizeof(unsigned long) != 8) 21 if (size == 8 && sizeof(unsigned long) != 8)
22 wrong_size_cmpxchg(ptr); 22 wrong_size_cmpxchg(ptr);
23 23
24 local_irq_save(flags); 24 raw_local_irq_save(flags);
25 switch (size) { 25 switch (size) {
26 case 1: prev = *(u8 *)ptr; 26 case 1: prev = *(u8 *)ptr;
27 if (prev == old) 27 if (prev == old)
@@ -42,7 +42,7 @@ static inline unsigned long __cmpxchg_local_generic(volatile void *ptr,
42 default: 42 default:
43 wrong_size_cmpxchg(ptr); 43 wrong_size_cmpxchg(ptr);
44 } 44 }
45 local_irq_restore(flags); 45 raw_local_irq_restore(flags);
46 return prev; 46 return prev;
47} 47}
48 48
@@ -55,11 +55,11 @@ static inline u64 __cmpxchg64_local_generic(volatile void *ptr,
55 u64 prev; 55 u64 prev;
56 unsigned long flags; 56 unsigned long flags;
57 57
58 local_irq_save(flags); 58 raw_local_irq_save(flags);
59 prev = *(u64 *)ptr; 59 prev = *(u64 *)ptr;
60 if (prev == old) 60 if (prev == old)
61 *(u64 *)ptr = new; 61 *(u64 *)ptr = new;
62 local_irq_restore(flags); 62 raw_local_irq_restore(flags);
63 return prev; 63 return prev;
64} 64}
65 65
diff --git a/arch/powerpc/sysdev/bestcomm/ata.h b/include/linux/fsl/bestcomm/ata.h
index 0b2371811334..0b2371811334 100644
--- a/arch/powerpc/sysdev/bestcomm/ata.h
+++ b/include/linux/fsl/bestcomm/ata.h
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.h b/include/linux/fsl/bestcomm/bestcomm.h
index a0e2e6b19b57..a0e2e6b19b57 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.h
+++ b/include/linux/fsl/bestcomm/bestcomm.h
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h b/include/linux/fsl/bestcomm/bestcomm_priv.h
index 3b52f3ffbdf8..3b52f3ffbdf8 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
+++ b/include/linux/fsl/bestcomm/bestcomm_priv.h
diff --git a/arch/powerpc/sysdev/bestcomm/fec.h b/include/linux/fsl/bestcomm/fec.h
index ee565d94d503..ee565d94d503 100644
--- a/arch/powerpc/sysdev/bestcomm/fec.h
+++ b/include/linux/fsl/bestcomm/fec.h
diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.h b/include/linux/fsl/bestcomm/gen_bd.h
index de47260e69da..de47260e69da 100644
--- a/arch/powerpc/sysdev/bestcomm/gen_bd.h
+++ b/include/linux/fsl/bestcomm/gen_bd.h
diff --git a/arch/powerpc/sysdev/bestcomm/sram.h b/include/linux/fsl/bestcomm/sram.h
index b6d668963cce..b6d668963cce 100644
--- a/arch/powerpc/sysdev/bestcomm/sram.h
+++ b/include/linux/fsl/bestcomm/sram.h
diff --git a/include/linux/idr.h b/include/linux/idr.h
index de7e190f1af4..e5eb125effe6 100644
--- a/include/linux/idr.h
+++ b/include/linux/idr.h
@@ -136,7 +136,7 @@ struct ida {
136 struct ida_bitmap *free_bitmap; 136 struct ida_bitmap *free_bitmap;
137}; 137};
138 138
139#define IDA_INIT(name) { .idr = IDR_INIT(name), .free_bitmap = NULL, } 139#define IDA_INIT(name) { .idr = IDR_INIT((name).idr), .free_bitmap = NULL, }
140#define DEFINE_IDA(name) struct ida name = IDA_INIT(name) 140#define DEFINE_IDA(name) struct ida name = IDA_INIT(name)
141 141
142int ida_pre_get(struct ida *ida, gfp_t gfp_mask); 142int ida_pre_get(struct ida *ida, gfp_t gfp_mask);
diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h
index bfe88c4aa251..f1e877b79ed8 100644
--- a/include/linux/lockdep.h
+++ b/include/linux/lockdep.h
@@ -412,7 +412,7 @@ struct lock_class_key { };
412 412
413#define lockdep_depth(tsk) (0) 413#define lockdep_depth(tsk) (0)
414 414
415#define lockdep_assert_held(l) do { } while (0) 415#define lockdep_assert_held(l) do { (void)(l); } while (0)
416 416
417#define lockdep_recursing(tsk) (0) 417#define lockdep_recursing(tsk) (0)
418 418
diff --git a/include/linux/sched/rt.h b/include/linux/sched/rt.h
index 94e19ea28fc3..440434df3627 100644
--- a/include/linux/sched/rt.h
+++ b/include/linux/sched/rt.h
@@ -55,4 +55,10 @@ static inline bool tsk_is_pi_blocked(struct task_struct *tsk)
55extern void normalize_rt_tasks(void); 55extern void normalize_rt_tasks(void);
56 56
57 57
58/*
59 * default timeslice is 100 msecs (used only for SCHED_RR tasks).
60 * Timeslices get refilled after they expire.
61 */
62#define RR_TIMESLICE (100 * HZ / 1000)
63
58#endif /* _SCHED_RT_H */ 64#endif /* _SCHED_RT_H */
diff --git a/include/linux/sched/sysctl.h b/include/linux/sched/sysctl.h
index d2bb0ae979d0..bf8086b2506e 100644
--- a/include/linux/sched/sysctl.h
+++ b/include/linux/sched/sysctl.h
@@ -91,12 +91,6 @@ extern unsigned int sysctl_sched_cfs_bandwidth_slice;
91extern unsigned int sysctl_sched_autogroup_enabled; 91extern unsigned int sysctl_sched_autogroup_enabled;
92#endif 92#endif
93 93
94/*
95 * default timeslice is 100 msecs (used only for SCHED_RR tasks).
96 * Timeslices get refilled after they expire.
97 */
98#define RR_TIMESLICE (100 * HZ / 1000)
99
100extern int sched_rr_timeslice; 94extern int sched_rr_timeslice;
101 95
102extern int sched_rr_handler(struct ctl_table *table, int write, 96extern int sched_rr_handler(struct ctl_table *table, int write,
diff --git a/include/linux/seqlock.h b/include/linux/seqlock.h
index 600060e25ec6..18299057402f 100644
--- a/include/linux/seqlock.h
+++ b/include/linux/seqlock.h
@@ -30,92 +30,12 @@
30#include <linux/preempt.h> 30#include <linux/preempt.h>
31#include <asm/processor.h> 31#include <asm/processor.h>
32 32
33typedef struct {
34 unsigned sequence;
35 spinlock_t lock;
36} seqlock_t;
37
38/*
39 * These macros triggered gcc-3.x compile-time problems. We think these are
40 * OK now. Be cautious.
41 */
42#define __SEQLOCK_UNLOCKED(lockname) \
43 { 0, __SPIN_LOCK_UNLOCKED(lockname) }
44
45#define seqlock_init(x) \
46 do { \
47 (x)->sequence = 0; \
48 spin_lock_init(&(x)->lock); \
49 } while (0)
50
51#define DEFINE_SEQLOCK(x) \
52 seqlock_t x = __SEQLOCK_UNLOCKED(x)
53
54/* Lock out other writers and update the count.
55 * Acts like a normal spin_lock/unlock.
56 * Don't need preempt_disable() because that is in the spin_lock already.
57 */
58static inline void write_seqlock(seqlock_t *sl)
59{
60 spin_lock(&sl->lock);
61 ++sl->sequence;
62 smp_wmb();
63}
64
65static inline void write_sequnlock(seqlock_t *sl)
66{
67 smp_wmb();
68 sl->sequence++;
69 spin_unlock(&sl->lock);
70}
71
72static inline int write_tryseqlock(seqlock_t *sl)
73{
74 int ret = spin_trylock(&sl->lock);
75
76 if (ret) {
77 ++sl->sequence;
78 smp_wmb();
79 }
80 return ret;
81}
82
83/* Start of read calculation -- fetch last complete writer token */
84static __always_inline unsigned read_seqbegin(const seqlock_t *sl)
85{
86 unsigned ret;
87
88repeat:
89 ret = ACCESS_ONCE(sl->sequence);
90 if (unlikely(ret & 1)) {
91 cpu_relax();
92 goto repeat;
93 }
94 smp_rmb();
95
96 return ret;
97}
98
99/*
100 * Test if reader processed invalid data.
101 *
102 * If sequence value changed then writer changed data while in section.
103 */
104static __always_inline int read_seqretry(const seqlock_t *sl, unsigned start)
105{
106 smp_rmb();
107
108 return unlikely(sl->sequence != start);
109}
110
111
112/* 33/*
113 * Version using sequence counter only. 34 * Version using sequence counter only.
114 * This can be used when code has its own mutex protecting the 35 * This can be used when code has its own mutex protecting the
115 * updating starting before the write_seqcountbeqin() and ending 36 * updating starting before the write_seqcountbeqin() and ending
116 * after the write_seqcount_end(). 37 * after the write_seqcount_end().
117 */ 38 */
118
119typedef struct seqcount { 39typedef struct seqcount {
120 unsigned sequence; 40 unsigned sequence;
121} seqcount_t; 41} seqcount_t;
@@ -218,7 +138,6 @@ static inline int __read_seqcount_retry(const seqcount_t *s, unsigned start)
218static inline int read_seqcount_retry(const seqcount_t *s, unsigned start) 138static inline int read_seqcount_retry(const seqcount_t *s, unsigned start)
219{ 139{
220 smp_rmb(); 140 smp_rmb();
221
222 return __read_seqcount_retry(s, start); 141 return __read_seqcount_retry(s, start);
223} 142}
224 143
@@ -252,31 +171,101 @@ static inline void write_seqcount_barrier(seqcount_t *s)
252 s->sequence+=2; 171 s->sequence+=2;
253} 172}
254 173
174typedef struct {
175 struct seqcount seqcount;
176 spinlock_t lock;
177} seqlock_t;
178
255/* 179/*
256 * Possible sw/hw IRQ protected versions of the interfaces. 180 * These macros triggered gcc-3.x compile-time problems. We think these are
181 * OK now. Be cautious.
257 */ 182 */
258#define write_seqlock_irqsave(lock, flags) \ 183#define __SEQLOCK_UNLOCKED(lockname) \
259 do { local_irq_save(flags); write_seqlock(lock); } while (0) 184 { \
260#define write_seqlock_irq(lock) \ 185 .seqcount = SEQCNT_ZERO, \
261 do { local_irq_disable(); write_seqlock(lock); } while (0) 186 .lock = __SPIN_LOCK_UNLOCKED(lockname) \
262#define write_seqlock_bh(lock) \ 187 }
263 do { local_bh_disable(); write_seqlock(lock); } while (0) 188
189#define seqlock_init(x) \
190 do { \
191 seqcount_init(&(x)->seqcount); \
192 spin_lock_init(&(x)->lock); \
193 } while (0)
264 194
265#define write_sequnlock_irqrestore(lock, flags) \ 195#define DEFINE_SEQLOCK(x) \
266 do { write_sequnlock(lock); local_irq_restore(flags); } while(0) 196 seqlock_t x = __SEQLOCK_UNLOCKED(x)
267#define write_sequnlock_irq(lock) \
268 do { write_sequnlock(lock); local_irq_enable(); } while(0)
269#define write_sequnlock_bh(lock) \
270 do { write_sequnlock(lock); local_bh_enable(); } while(0)
271 197
272#define read_seqbegin_irqsave(lock, flags) \ 198/*
273 ({ local_irq_save(flags); read_seqbegin(lock); }) 199 * Read side functions for starting and finalizing a read side section.
200 */
201static inline unsigned read_seqbegin(const seqlock_t *sl)
202{
203 return read_seqcount_begin(&sl->seqcount);
204}
274 205
275#define read_seqretry_irqrestore(lock, iv, flags) \ 206static inline unsigned read_seqretry(const seqlock_t *sl, unsigned start)
276 ({ \ 207{
277 int ret = read_seqretry(lock, iv); \ 208 return read_seqcount_retry(&sl->seqcount, start);
278 local_irq_restore(flags); \ 209}
279 ret; \ 210
280 }) 211/*
212 * Lock out other writers and update the count.
213 * Acts like a normal spin_lock/unlock.
214 * Don't need preempt_disable() because that is in the spin_lock already.
215 */
216static inline void write_seqlock(seqlock_t *sl)
217{
218 spin_lock(&sl->lock);
219 write_seqcount_begin(&sl->seqcount);
220}
221
222static inline void write_sequnlock(seqlock_t *sl)
223{
224 write_seqcount_end(&sl->seqcount);
225 spin_unlock(&sl->lock);
226}
227
228static inline void write_seqlock_bh(seqlock_t *sl)
229{
230 spin_lock_bh(&sl->lock);
231 write_seqcount_begin(&sl->seqcount);
232}
233
234static inline void write_sequnlock_bh(seqlock_t *sl)
235{
236 write_seqcount_end(&sl->seqcount);
237 spin_unlock_bh(&sl->lock);
238}
239
240static inline void write_seqlock_irq(seqlock_t *sl)
241{
242 spin_lock_irq(&sl->lock);
243 write_seqcount_begin(&sl->seqcount);
244}
245
246static inline void write_sequnlock_irq(seqlock_t *sl)
247{
248 write_seqcount_end(&sl->seqcount);
249 spin_unlock_irq(&sl->lock);
250}
251
252static inline unsigned long __write_seqlock_irqsave(seqlock_t *sl)
253{
254 unsigned long flags;
255
256 spin_lock_irqsave(&sl->lock, flags);
257 write_seqcount_begin(&sl->seqcount);
258 return flags;
259}
260
261#define write_seqlock_irqsave(lock, flags) \
262 do { flags = __write_seqlock_irqsave(lock); } while (0)
263
264static inline void
265write_sequnlock_irqrestore(seqlock_t *sl, unsigned long flags)
266{
267 write_seqcount_end(&sl->seqcount);
268 spin_unlock_irqrestore(&sl->lock, flags);
269}
281 270
282#endif /* __LINUX_SEQLOCK_H */ 271#endif /* __LINUX_SEQLOCK_H */
diff --git a/kernel/futex.c b/kernel/futex.c
index 9618b6e9fb36..fbc07a29ec53 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -2472,8 +2472,6 @@ SYSCALL_DEFINE3(get_robust_list, int, pid,
2472 if (!futex_cmpxchg_enabled) 2472 if (!futex_cmpxchg_enabled)
2473 return -ENOSYS; 2473 return -ENOSYS;
2474 2474
2475 WARN_ONCE(1, "deprecated: get_robust_list will be deleted in 2013.\n");
2476
2477 rcu_read_lock(); 2475 rcu_read_lock();
2478 2476
2479 ret = -ESRCH; 2477 ret = -ESRCH;
diff --git a/kernel/futex_compat.c b/kernel/futex_compat.c
index 83e368b005fc..a9642d528630 100644
--- a/kernel/futex_compat.c
+++ b/kernel/futex_compat.c
@@ -142,8 +142,6 @@ compat_sys_get_robust_list(int pid, compat_uptr_t __user *head_ptr,
142 if (!futex_cmpxchg_enabled) 142 if (!futex_cmpxchg_enabled)
143 return -ENOSYS; 143 return -ENOSYS;
144 144
145 WARN_ONCE(1, "deprecated: get_robust_list will be deleted in 2013.\n");
146
147 rcu_read_lock(); 145 rcu_read_lock();
148 146
149 ret = -ESRCH; 147 ret = -ESRCH;
diff --git a/kernel/lockdep.c b/kernel/lockdep.c
index 7981e5b2350d..8a0efac4f99d 100644
--- a/kernel/lockdep.c
+++ b/kernel/lockdep.c
@@ -3190,9 +3190,14 @@ static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass,
3190#endif 3190#endif
3191 if (unlikely(curr->lockdep_depth >= MAX_LOCK_DEPTH)) { 3191 if (unlikely(curr->lockdep_depth >= MAX_LOCK_DEPTH)) {
3192 debug_locks_off(); 3192 debug_locks_off();
3193 printk("BUG: MAX_LOCK_DEPTH too low!\n"); 3193 printk("BUG: MAX_LOCK_DEPTH too low, depth: %i max: %lu!\n",
3194 curr->lockdep_depth, MAX_LOCK_DEPTH);
3194 printk("turning off the locking correctness validator.\n"); 3195 printk("turning off the locking correctness validator.\n");
3196
3197 lockdep_print_held_locks(current);
3198 debug_show_all_locks();
3195 dump_stack(); 3199 dump_stack();
3200
3196 return 0; 3201 return 0;
3197 } 3202 }
3198 3203
@@ -3203,7 +3208,7 @@ static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass,
3203} 3208}
3204 3209
3205static int 3210static int
3206print_unlock_inbalance_bug(struct task_struct *curr, struct lockdep_map *lock, 3211print_unlock_imbalance_bug(struct task_struct *curr, struct lockdep_map *lock,
3207 unsigned long ip) 3212 unsigned long ip)
3208{ 3213{
3209 if (!debug_locks_off()) 3214 if (!debug_locks_off())
@@ -3246,7 +3251,7 @@ static int check_unlock(struct task_struct *curr, struct lockdep_map *lock,
3246 return 0; 3251 return 0;
3247 3252
3248 if (curr->lockdep_depth <= 0) 3253 if (curr->lockdep_depth <= 0)
3249 return print_unlock_inbalance_bug(curr, lock, ip); 3254 return print_unlock_imbalance_bug(curr, lock, ip);
3250 3255
3251 return 1; 3256 return 1;
3252} 3257}
@@ -3317,7 +3322,7 @@ __lock_set_class(struct lockdep_map *lock, const char *name,
3317 goto found_it; 3322 goto found_it;
3318 prev_hlock = hlock; 3323 prev_hlock = hlock;
3319 } 3324 }
3320 return print_unlock_inbalance_bug(curr, lock, ip); 3325 return print_unlock_imbalance_bug(curr, lock, ip);
3321 3326
3322found_it: 3327found_it:
3323 lockdep_init_map(lock, name, key, 0); 3328 lockdep_init_map(lock, name, key, 0);
@@ -3384,7 +3389,7 @@ lock_release_non_nested(struct task_struct *curr,
3384 goto found_it; 3389 goto found_it;
3385 prev_hlock = hlock; 3390 prev_hlock = hlock;
3386 } 3391 }
3387 return print_unlock_inbalance_bug(curr, lock, ip); 3392 return print_unlock_imbalance_bug(curr, lock, ip);
3388 3393
3389found_it: 3394found_it:
3390 if (hlock->instance == lock) 3395 if (hlock->instance == lock)
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c
index b10a42bb0165..072bb066bb7d 100644
--- a/kernel/time/ntp.c
+++ b/kernel/time/ntp.c
@@ -23,7 +23,7 @@
23 * NTP timekeeping variables: 23 * NTP timekeeping variables:
24 */ 24 */
25 25
26DEFINE_SPINLOCK(ntp_lock); 26DEFINE_RAW_SPINLOCK(ntp_lock);
27 27
28 28
29/* USER_HZ period (usecs): */ 29/* USER_HZ period (usecs): */
@@ -348,7 +348,7 @@ void ntp_clear(void)
348{ 348{
349 unsigned long flags; 349 unsigned long flags;
350 350
351 spin_lock_irqsave(&ntp_lock, flags); 351 raw_spin_lock_irqsave(&ntp_lock, flags);
352 352
353 time_adjust = 0; /* stop active adjtime() */ 353 time_adjust = 0; /* stop active adjtime() */
354 time_status |= STA_UNSYNC; 354 time_status |= STA_UNSYNC;
@@ -362,7 +362,7 @@ void ntp_clear(void)
362 362
363 /* Clear PPS state variables */ 363 /* Clear PPS state variables */
364 pps_clear(); 364 pps_clear();
365 spin_unlock_irqrestore(&ntp_lock, flags); 365 raw_spin_unlock_irqrestore(&ntp_lock, flags);
366 366
367} 367}
368 368
@@ -372,9 +372,9 @@ u64 ntp_tick_length(void)
372 unsigned long flags; 372 unsigned long flags;
373 s64 ret; 373 s64 ret;
374 374
375 spin_lock_irqsave(&ntp_lock, flags); 375 raw_spin_lock_irqsave(&ntp_lock, flags);
376 ret = tick_length; 376 ret = tick_length;
377 spin_unlock_irqrestore(&ntp_lock, flags); 377 raw_spin_unlock_irqrestore(&ntp_lock, flags);
378 return ret; 378 return ret;
379} 379}
380 380
@@ -395,7 +395,7 @@ int second_overflow(unsigned long secs)
395 int leap = 0; 395 int leap = 0;
396 unsigned long flags; 396 unsigned long flags;
397 397
398 spin_lock_irqsave(&ntp_lock, flags); 398 raw_spin_lock_irqsave(&ntp_lock, flags);
399 399
400 /* 400 /*
401 * Leap second processing. If in leap-insert state at the end of the 401 * Leap second processing. If in leap-insert state at the end of the
@@ -479,7 +479,7 @@ int second_overflow(unsigned long secs)
479 time_adjust = 0; 479 time_adjust = 0;
480 480
481out: 481out:
482 spin_unlock_irqrestore(&ntp_lock, flags); 482 raw_spin_unlock_irqrestore(&ntp_lock, flags);
483 483
484 return leap; 484 return leap;
485} 485}
@@ -672,7 +672,7 @@ int do_adjtimex(struct timex *txc)
672 672
673 getnstimeofday(&ts); 673 getnstimeofday(&ts);
674 674
675 spin_lock_irq(&ntp_lock); 675 raw_spin_lock_irq(&ntp_lock);
676 676
677 if (txc->modes & ADJ_ADJTIME) { 677 if (txc->modes & ADJ_ADJTIME) {
678 long save_adjust = time_adjust; 678 long save_adjust = time_adjust;
@@ -714,7 +714,7 @@ int do_adjtimex(struct timex *txc)
714 /* fill PPS status fields */ 714 /* fill PPS status fields */
715 pps_fill_timex(txc); 715 pps_fill_timex(txc);
716 716
717 spin_unlock_irq(&ntp_lock); 717 raw_spin_unlock_irq(&ntp_lock);
718 718
719 txc->time.tv_sec = ts.tv_sec; 719 txc->time.tv_sec = ts.tv_sec;
720 txc->time.tv_usec = ts.tv_nsec; 720 txc->time.tv_usec = ts.tv_nsec;
@@ -912,7 +912,7 @@ void hardpps(const struct timespec *phase_ts, const struct timespec *raw_ts)
912 912
913 pts_norm = pps_normalize_ts(*phase_ts); 913 pts_norm = pps_normalize_ts(*phase_ts);
914 914
915 spin_lock_irqsave(&ntp_lock, flags); 915 raw_spin_lock_irqsave(&ntp_lock, flags);
916 916
917 /* clear the error bits, they will be set again if needed */ 917 /* clear the error bits, they will be set again if needed */
918 time_status &= ~(STA_PPSJITTER | STA_PPSWANDER | STA_PPSERROR); 918 time_status &= ~(STA_PPSJITTER | STA_PPSWANDER | STA_PPSERROR);
@@ -925,7 +925,7 @@ void hardpps(const struct timespec *phase_ts, const struct timespec *raw_ts)
925 * just start the frequency interval */ 925 * just start the frequency interval */
926 if (unlikely(pps_fbase.tv_sec == 0)) { 926 if (unlikely(pps_fbase.tv_sec == 0)) {
927 pps_fbase = *raw_ts; 927 pps_fbase = *raw_ts;
928 spin_unlock_irqrestore(&ntp_lock, flags); 928 raw_spin_unlock_irqrestore(&ntp_lock, flags);
929 return; 929 return;
930 } 930 }
931 931
@@ -940,7 +940,7 @@ void hardpps(const struct timespec *phase_ts, const struct timespec *raw_ts)
940 time_status |= STA_PPSJITTER; 940 time_status |= STA_PPSJITTER;
941 /* restart the frequency calibration interval */ 941 /* restart the frequency calibration interval */
942 pps_fbase = *raw_ts; 942 pps_fbase = *raw_ts;
943 spin_unlock_irqrestore(&ntp_lock, flags); 943 raw_spin_unlock_irqrestore(&ntp_lock, flags);
944 pr_err("hardpps: PPSJITTER: bad pulse\n"); 944 pr_err("hardpps: PPSJITTER: bad pulse\n");
945 return; 945 return;
946 } 946 }
@@ -957,7 +957,7 @@ void hardpps(const struct timespec *phase_ts, const struct timespec *raw_ts)
957 957
958 hardpps_update_phase(pts_norm.nsec); 958 hardpps_update_phase(pts_norm.nsec);
959 959
960 spin_unlock_irqrestore(&ntp_lock, flags); 960 raw_spin_unlock_irqrestore(&ntp_lock, flags);
961} 961}
962EXPORT_SYMBOL(hardpps); 962EXPORT_SYMBOL(hardpps);
963 963
diff --git a/kernel/watchdog.c b/kernel/watchdog.c
index 27689422aa92..4a944676358e 100644
--- a/kernel/watchdog.c
+++ b/kernel/watchdog.c
@@ -113,9 +113,9 @@ static int get_softlockup_thresh(void)
113 * resolution, and we don't need to waste time with a big divide when 113 * resolution, and we don't need to waste time with a big divide when
114 * 2^30ns == 1.074s. 114 * 2^30ns == 1.074s.
115 */ 115 */
116static unsigned long get_timestamp(int this_cpu) 116static unsigned long get_timestamp(void)
117{ 117{
118 return cpu_clock(this_cpu) >> 30LL; /* 2^30 ~= 10^9 */ 118 return local_clock() >> 30LL; /* 2^30 ~= 10^9 */
119} 119}
120 120
121static void set_sample_period(void) 121static void set_sample_period(void)
@@ -133,9 +133,7 @@ static void set_sample_period(void)
133/* Commands for resetting the watchdog */ 133/* Commands for resetting the watchdog */
134static void __touch_watchdog(void) 134static void __touch_watchdog(void)
135{ 135{
136 int this_cpu = smp_processor_id(); 136 __this_cpu_write(watchdog_touch_ts, get_timestamp());
137
138 __this_cpu_write(watchdog_touch_ts, get_timestamp(this_cpu));
139} 137}
140 138
141void touch_softlockup_watchdog(void) 139void touch_softlockup_watchdog(void)
@@ -196,7 +194,7 @@ static int is_hardlockup(void)
196 194
197static int is_softlockup(unsigned long touch_ts) 195static int is_softlockup(unsigned long touch_ts)
198{ 196{
199 unsigned long now = get_timestamp(smp_processor_id()); 197 unsigned long now = get_timestamp();
200 198
201 /* Warn about unreasonable delays: */ 199 /* Warn about unreasonable delays: */
202 if (time_after(now, touch_ts + get_softlockup_thresh())) 200 if (time_after(now, touch_ts + get_softlockup_thresh()))
diff --git a/lib/locking-selftest.c b/lib/locking-selftest.c
index 7aae0f2a5e0a..c3eb261a7df3 100644
--- a/lib/locking-selftest.c
+++ b/lib/locking-selftest.c
@@ -47,10 +47,10 @@ __setup("debug_locks_verbose=", setup_debug_locks_verbose);
47 * Normal standalone locks, for the circular and irq-context 47 * Normal standalone locks, for the circular and irq-context
48 * dependency tests: 48 * dependency tests:
49 */ 49 */
50static DEFINE_SPINLOCK(lock_A); 50static DEFINE_RAW_SPINLOCK(lock_A);
51static DEFINE_SPINLOCK(lock_B); 51static DEFINE_RAW_SPINLOCK(lock_B);
52static DEFINE_SPINLOCK(lock_C); 52static DEFINE_RAW_SPINLOCK(lock_C);
53static DEFINE_SPINLOCK(lock_D); 53static DEFINE_RAW_SPINLOCK(lock_D);
54 54
55static DEFINE_RWLOCK(rwlock_A); 55static DEFINE_RWLOCK(rwlock_A);
56static DEFINE_RWLOCK(rwlock_B); 56static DEFINE_RWLOCK(rwlock_B);
@@ -73,12 +73,12 @@ static DECLARE_RWSEM(rwsem_D);
73 * but X* and Y* are different classes. We do this so that 73 * but X* and Y* are different classes. We do this so that
74 * we do not trigger a real lockup: 74 * we do not trigger a real lockup:
75 */ 75 */
76static DEFINE_SPINLOCK(lock_X1); 76static DEFINE_RAW_SPINLOCK(lock_X1);
77static DEFINE_SPINLOCK(lock_X2); 77static DEFINE_RAW_SPINLOCK(lock_X2);
78static DEFINE_SPINLOCK(lock_Y1); 78static DEFINE_RAW_SPINLOCK(lock_Y1);
79static DEFINE_SPINLOCK(lock_Y2); 79static DEFINE_RAW_SPINLOCK(lock_Y2);
80static DEFINE_SPINLOCK(lock_Z1); 80static DEFINE_RAW_SPINLOCK(lock_Z1);
81static DEFINE_SPINLOCK(lock_Z2); 81static DEFINE_RAW_SPINLOCK(lock_Z2);
82 82
83static DEFINE_RWLOCK(rwlock_X1); 83static DEFINE_RWLOCK(rwlock_X1);
84static DEFINE_RWLOCK(rwlock_X2); 84static DEFINE_RWLOCK(rwlock_X2);
@@ -107,10 +107,10 @@ static DECLARE_RWSEM(rwsem_Z2);
107 */ 107 */
108#define INIT_CLASS_FUNC(class) \ 108#define INIT_CLASS_FUNC(class) \
109static noinline void \ 109static noinline void \
110init_class_##class(spinlock_t *lock, rwlock_t *rwlock, struct mutex *mutex, \ 110init_class_##class(raw_spinlock_t *lock, rwlock_t *rwlock, \
111 struct rw_semaphore *rwsem) \ 111 struct mutex *mutex, struct rw_semaphore *rwsem)\
112{ \ 112{ \
113 spin_lock_init(lock); \ 113 raw_spin_lock_init(lock); \
114 rwlock_init(rwlock); \ 114 rwlock_init(rwlock); \
115 mutex_init(mutex); \ 115 mutex_init(mutex); \
116 init_rwsem(rwsem); \ 116 init_rwsem(rwsem); \
@@ -168,10 +168,10 @@ static void init_shared_classes(void)
168 * Shortcuts for lock/unlock API variants, to keep 168 * Shortcuts for lock/unlock API variants, to keep
169 * the testcases compact: 169 * the testcases compact:
170 */ 170 */
171#define L(x) spin_lock(&lock_##x) 171#define L(x) raw_spin_lock(&lock_##x)
172#define U(x) spin_unlock(&lock_##x) 172#define U(x) raw_spin_unlock(&lock_##x)
173#define LU(x) L(x); U(x) 173#define LU(x) L(x); U(x)
174#define SI(x) spin_lock_init(&lock_##x) 174#define SI(x) raw_spin_lock_init(&lock_##x)
175 175
176#define WL(x) write_lock(&rwlock_##x) 176#define WL(x) write_lock(&rwlock_##x)
177#define WU(x) write_unlock(&rwlock_##x) 177#define WU(x) write_unlock(&rwlock_##x)
@@ -911,7 +911,7 @@ GENERATE_PERMUTATIONS_3_EVENTS(irq_read_recursion_soft)
911 911
912#define I2(x) \ 912#define I2(x) \
913 do { \ 913 do { \
914 spin_lock_init(&lock_##x); \ 914 raw_spin_lock_init(&lock_##x); \
915 rwlock_init(&rwlock_##x); \ 915 rwlock_init(&rwlock_##x); \
916 mutex_init(&mutex_##x); \ 916 mutex_init(&mutex_##x); \
917 init_rwsem(&rwsem_##x); \ 917 init_rwsem(&rwsem_##x); \
diff --git a/lib/rwsem-spinlock.c b/lib/rwsem-spinlock.c
index 7e0d6a58fc83..7542afbb22b3 100644
--- a/lib/rwsem-spinlock.c
+++ b/lib/rwsem-spinlock.c
@@ -73,20 +73,13 @@ __rwsem_do_wake(struct rw_semaphore *sem, int wakewrite)
73 goto dont_wake_writers; 73 goto dont_wake_writers;
74 } 74 }
75 75
76 /* if we are allowed to wake writers try to grant a single write lock 76 /*
77 * if there's a writer at the front of the queue 77 * as we support write lock stealing, we can't set sem->activity
78 * - we leave the 'waiting count' incremented to signify potential 78 * to -1 here to indicate we get the lock. Instead, we wake it up
79 * contention 79 * to let it go get it again.
80 */ 80 */
81 if (waiter->flags & RWSEM_WAITING_FOR_WRITE) { 81 if (waiter->flags & RWSEM_WAITING_FOR_WRITE) {
82 sem->activity = -1; 82 wake_up_process(waiter->task);
83 list_del(&waiter->list);
84 tsk = waiter->task;
85 /* Don't touch waiter after ->task has been NULLed */
86 smp_mb();
87 waiter->task = NULL;
88 wake_up_process(tsk);
89 put_task_struct(tsk);
90 goto out; 83 goto out;
91 } 84 }
92 85
@@ -121,18 +114,10 @@ static inline struct rw_semaphore *
121__rwsem_wake_one_writer(struct rw_semaphore *sem) 114__rwsem_wake_one_writer(struct rw_semaphore *sem)
122{ 115{
123 struct rwsem_waiter *waiter; 116 struct rwsem_waiter *waiter;
124 struct task_struct *tsk;
125
126 sem->activity = -1;
127 117
128 waiter = list_entry(sem->wait_list.next, struct rwsem_waiter, list); 118 waiter = list_entry(sem->wait_list.next, struct rwsem_waiter, list);
129 list_del(&waiter->list); 119 wake_up_process(waiter->task);
130 120
131 tsk = waiter->task;
132 smp_mb();
133 waiter->task = NULL;
134 wake_up_process(tsk);
135 put_task_struct(tsk);
136 return sem; 121 return sem;
137} 122}
138 123
@@ -204,7 +189,6 @@ int __down_read_trylock(struct rw_semaphore *sem)
204 189
205/* 190/*
206 * get a write lock on the semaphore 191 * get a write lock on the semaphore
207 * - we increment the waiting count anyway to indicate an exclusive lock
208 */ 192 */
209void __sched __down_write_nested(struct rw_semaphore *sem, int subclass) 193void __sched __down_write_nested(struct rw_semaphore *sem, int subclass)
210{ 194{
@@ -214,37 +198,32 @@ void __sched __down_write_nested(struct rw_semaphore *sem, int subclass)
214 198
215 raw_spin_lock_irqsave(&sem->wait_lock, flags); 199 raw_spin_lock_irqsave(&sem->wait_lock, flags);
216 200
217 if (sem->activity == 0 && list_empty(&sem->wait_list)) {
218 /* granted */
219 sem->activity = -1;
220 raw_spin_unlock_irqrestore(&sem->wait_lock, flags);
221 goto out;
222 }
223
224 tsk = current;
225 set_task_state(tsk, TASK_UNINTERRUPTIBLE);
226
227 /* set up my own style of waitqueue */ 201 /* set up my own style of waitqueue */
202 tsk = current;
228 waiter.task = tsk; 203 waiter.task = tsk;
229 waiter.flags = RWSEM_WAITING_FOR_WRITE; 204 waiter.flags = RWSEM_WAITING_FOR_WRITE;
230 get_task_struct(tsk);
231
232 list_add_tail(&waiter.list, &sem->wait_list); 205 list_add_tail(&waiter.list, &sem->wait_list);
233 206
234 /* we don't need to touch the semaphore struct anymore */ 207 /* wait for someone to release the lock */
235 raw_spin_unlock_irqrestore(&sem->wait_lock, flags);
236
237 /* wait to be given the lock */
238 for (;;) { 208 for (;;) {
239 if (!waiter.task) 209 /*
210 * That is the key to support write lock stealing: allows the
211 * task already on CPU to get the lock soon rather than put
212 * itself into sleep and waiting for system woke it or someone
213 * else in the head of the wait list up.
214 */
215 if (sem->activity == 0)
240 break; 216 break;
241 schedule();
242 set_task_state(tsk, TASK_UNINTERRUPTIBLE); 217 set_task_state(tsk, TASK_UNINTERRUPTIBLE);
218 raw_spin_unlock_irqrestore(&sem->wait_lock, flags);
219 schedule();
220 raw_spin_lock_irqsave(&sem->wait_lock, flags);
243 } 221 }
222 /* got the lock */
223 sem->activity = -1;
224 list_del(&waiter.list);
244 225
245 tsk->state = TASK_RUNNING; 226 raw_spin_unlock_irqrestore(&sem->wait_lock, flags);
246 out:
247 ;
248} 227}
249 228
250void __sched __down_write(struct rw_semaphore *sem) 229void __sched __down_write(struct rw_semaphore *sem)
@@ -262,8 +241,8 @@ int __down_write_trylock(struct rw_semaphore *sem)
262 241
263 raw_spin_lock_irqsave(&sem->wait_lock, flags); 242 raw_spin_lock_irqsave(&sem->wait_lock, flags);
264 243
265 if (sem->activity == 0 && list_empty(&sem->wait_list)) { 244 if (sem->activity == 0) {
266 /* granted */ 245 /* got the lock */
267 sem->activity = -1; 246 sem->activity = -1;
268 ret = 1; 247 ret = 1;
269 } 248 }
diff --git a/lib/rwsem.c b/lib/rwsem.c
index 8337e1b9bb8d..ad5e0df16ab4 100644
--- a/lib/rwsem.c
+++ b/lib/rwsem.c
@@ -2,6 +2,8 @@
2 * 2 *
3 * Written by David Howells (dhowells@redhat.com). 3 * Written by David Howells (dhowells@redhat.com).
4 * Derived from arch/i386/kernel/semaphore.c 4 * Derived from arch/i386/kernel/semaphore.c
5 *
6 * Writer lock-stealing by Alex Shi <alex.shi@intel.com>
5 */ 7 */
6#include <linux/rwsem.h> 8#include <linux/rwsem.h>
7#include <linux/sched.h> 9#include <linux/sched.h>
@@ -60,7 +62,7 @@ __rwsem_do_wake(struct rw_semaphore *sem, int wake_type)
60 struct rwsem_waiter *waiter; 62 struct rwsem_waiter *waiter;
61 struct task_struct *tsk; 63 struct task_struct *tsk;
62 struct list_head *next; 64 struct list_head *next;
63 signed long oldcount, woken, loop, adjustment; 65 signed long woken, loop, adjustment;
64 66
65 waiter = list_entry(sem->wait_list.next, struct rwsem_waiter, list); 67 waiter = list_entry(sem->wait_list.next, struct rwsem_waiter, list);
66 if (!(waiter->flags & RWSEM_WAITING_FOR_WRITE)) 68 if (!(waiter->flags & RWSEM_WAITING_FOR_WRITE))
@@ -72,30 +74,8 @@ __rwsem_do_wake(struct rw_semaphore *sem, int wake_type)
72 */ 74 */
73 goto out; 75 goto out;
74 76
75 /* There's a writer at the front of the queue - try to grant it the 77 /* Wake up the writing waiter and let the task grab the sem: */
76 * write lock. However, we only wake this writer if we can transition 78 wake_up_process(waiter->task);
77 * the active part of the count from 0 -> 1
78 */
79 adjustment = RWSEM_ACTIVE_WRITE_BIAS;
80 if (waiter->list.next == &sem->wait_list)
81 adjustment -= RWSEM_WAITING_BIAS;
82
83 try_again_write:
84 oldcount = rwsem_atomic_update(adjustment, sem) - adjustment;
85 if (oldcount & RWSEM_ACTIVE_MASK)
86 /* Someone grabbed the sem already */
87 goto undo_write;
88
89 /* We must be careful not to touch 'waiter' after we set ->task = NULL.
90 * It is an allocated on the waiter's stack and may become invalid at
91 * any time after that point (due to a wakeup from another source).
92 */
93 list_del(&waiter->list);
94 tsk = waiter->task;
95 smp_mb();
96 waiter->task = NULL;
97 wake_up_process(tsk);
98 put_task_struct(tsk);
99 goto out; 79 goto out;
100 80
101 readers_only: 81 readers_only:
@@ -157,12 +137,40 @@ __rwsem_do_wake(struct rw_semaphore *sem, int wake_type)
157 137
158 out: 138 out:
159 return sem; 139 return sem;
140}
141
142/* Try to get write sem, caller holds sem->wait_lock: */
143static int try_get_writer_sem(struct rw_semaphore *sem,
144 struct rwsem_waiter *waiter)
145{
146 struct rwsem_waiter *fwaiter;
147 long oldcount, adjustment;
160 148
161 /* undo the change to the active count, but check for a transition 149 /* only steal when first waiter is writing */
162 * 1->0 */ 150 fwaiter = list_entry(sem->wait_list.next, struct rwsem_waiter, list);
163 undo_write: 151 if (!(fwaiter->flags & RWSEM_WAITING_FOR_WRITE))
152 return 0;
153
154 adjustment = RWSEM_ACTIVE_WRITE_BIAS;
155 /* Only one waiter in the queue: */
156 if (fwaiter == waiter && waiter->list.next == &sem->wait_list)
157 adjustment -= RWSEM_WAITING_BIAS;
158
159try_again_write:
160 oldcount = rwsem_atomic_update(adjustment, sem) - adjustment;
161 if (!(oldcount & RWSEM_ACTIVE_MASK)) {
162 /* No active lock: */
163 struct task_struct *tsk = waiter->task;
164
165 list_del(&waiter->list);
166 smp_mb();
167 put_task_struct(tsk);
168 tsk->state = TASK_RUNNING;
169 return 1;
170 }
171 /* some one grabbed the sem already */
164 if (rwsem_atomic_update(-adjustment, sem) & RWSEM_ACTIVE_MASK) 172 if (rwsem_atomic_update(-adjustment, sem) & RWSEM_ACTIVE_MASK)
165 goto out; 173 return 0;
166 goto try_again_write; 174 goto try_again_write;
167} 175}
168 176
@@ -210,6 +218,15 @@ rwsem_down_failed_common(struct rw_semaphore *sem,
210 for (;;) { 218 for (;;) {
211 if (!waiter.task) 219 if (!waiter.task)
212 break; 220 break;
221
222 raw_spin_lock_irq(&sem->wait_lock);
223 /* Try to get the writer sem, may steal from the head writer: */
224 if (flags == RWSEM_WAITING_FOR_WRITE)
225 if (try_get_writer_sem(sem, &waiter)) {
226 raw_spin_unlock_irq(&sem->wait_lock);
227 return sem;
228 }
229 raw_spin_unlock_irq(&sem->wait_lock);
213 schedule(); 230 schedule();
214 set_task_state(tsk, TASK_UNINTERRUPTIBLE); 231 set_task_state(tsk, TASK_UNINTERRUPTIBLE);
215 } 232 }
diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
index 9997c039bb24..2a847ca494b5 100644
--- a/sound/soc/fsl/mpc5200_dma.c
+++ b/sound/soc/fsl/mpc5200_dma.c
@@ -14,8 +14,8 @@
14 14
15#include <sound/soc.h> 15#include <sound/soc.h>
16 16
17#include <sysdev/bestcomm/bestcomm.h> 17#include <linux/fsl/bestcomm/bestcomm.h>
18#include <sysdev/bestcomm/gen_bd.h> 18#include <linux/fsl/bestcomm/gen_bd.h>
19#include <asm/mpc52xx_psc.h> 19#include <asm/mpc52xx_psc.h>
20 20
21#include "mpc5200_dma.h" 21#include "mpc5200_dma.h"