diff options
-rw-r--r-- | drivers/media/video/gspca/sonixj.c | 125 |
1 files changed, 85 insertions, 40 deletions
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c index 93d4746ff95a..3e68b9926956 100644 --- a/drivers/media/video/gspca/sonixj.c +++ b/drivers/media/video/gspca/sonixj.c | |||
@@ -151,36 +151,36 @@ static struct v4l2_pix_format vga_mode[] = { | |||
151 | 151 | ||
152 | /*Data from sn9c102p+hv71331r */ | 152 | /*Data from sn9c102p+hv71331r */ |
153 | static const __u8 sn_hv7131[] = { | 153 | static const __u8 sn_hv7131[] = { |
154 | 0x00, 0x03, 0x64, 0x00, 0x1A, 0x20, 0x20, 0x20, 0xA1, 0x11, | ||
155 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 reg9 */ | 154 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 reg9 */ |
156 | 0x02, 0x09, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00, /* 00 */ | 155 | 0x00, 0x03, 0x64, 0x00, 0x1A, 0x20, 0x20, 0x20, 0xA1, 0x11, |
157 | /* rega regb regc regd rege regf reg10 reg11 */ | 156 | /* rega regb regc regd rege regf reg10 reg11 */ |
158 | 0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, 0x0a, 0x00, 0x00, 0x00, | 157 | 0x02, 0x09, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00, /* 00 */ |
159 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */ | 158 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */ |
160 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | 159 | 0x00, 0x01, 0x03, 0x28, 0x1e, 0x41, 0x0a, 0x00, 0x00, 0x00, |
161 | /* reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */ | 160 | /* reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */ |
161 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | ||
162 | }; | 162 | }; |
163 | 163 | ||
164 | static const __u8 sn_mi0360[] = { | 164 | static const __u8 sn_mi0360[] = { |
165 | 0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0xb1, 0x5d, | ||
166 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 reg9 */ | 165 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 reg9 */ |
167 | 0x07, 0x00, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00, | 166 | 0x00, 0x61, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0xb1, 0x5d, |
168 | /* rega regb regc regd rege regf reg10 reg11 */ | 167 | /* rega regb regc regd rege regf reg10 reg11 */ |
169 | 0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, 0x06, 0x00, 0x00, 0x00, | 168 | 0x07, 0x00, 0x00, 0x00, 0x00, 0x10, 0x03, 0x00, |
170 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */ | 169 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a reg1b */ |
171 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | 170 | 0x00, 0x02, 0x0a, 0x28, 0x1e, 0x61, 0x06, 0x00, 0x00, 0x00, |
172 | /* reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */ | 171 | /* reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23 */ |
172 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | ||
173 | }; | 173 | }; |
174 | 174 | ||
175 | static const __u8 sn_mo4000[] = { | 175 | static const __u8 sn_mo4000[] = { |
176 | 0x12, 0x23, 0x60, 0x00, 0x1A, 0x00, 0x20, 0x18, 0x81, | ||
177 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 */ | 176 | /* reg0 reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 */ |
178 | 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, | 177 | 0x12, 0x23, 0x60, 0x00, 0x1A, 0x00, 0x20, 0x18, 0x81, |
179 | /* reg9 rega regb regc regd rege regf reg10 reg11*/ | 178 | /* reg9 rega regb regc regd rege regf reg10 reg11*/ |
180 | 0x0b, 0x0f, 0x14, 0x28, 0x1e, 0x40, 0x08, 0x00, 0x00, | 179 | 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, |
181 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a*/ | 180 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a*/ |
182 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x25, 0x39, 0x4b, | 181 | 0x0b, 0x0f, 0x14, 0x28, 0x1e, 0x40, 0x08, 0x00, 0x00, |
183 | /* reg1b reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23*/ | 182 | /* reg1b reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23*/ |
183 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x25, 0x39, 0x4b, | ||
184 | 0x5c, 0x6b, 0x79, 0x87, 0x95, 0xa2, 0xaf, 0xbb, 0xc7, | 184 | 0x5c, 0x6b, 0x79, 0x87, 0x95, 0xa2, 0xaf, 0xbb, 0xc7, |
185 | 0xd3, 0xdf, 0xea, 0xf5 | 185 | 0xd3, 0xdf, 0xea, 0xf5 |
186 | }; | 186 | }; |
@@ -197,7 +197,7 @@ static const __u8 sn_ov7660[] = { | |||
197 | /* reg9 rega regb regc regd rege regf reg10 reg11*/ | 197 | /* reg9 rega regb regc regd rege regf reg10 reg11*/ |
198 | 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, | 198 | 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, |
199 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a*/ | 199 | /* reg12 reg13 reg14 reg15 reg16 reg17 reg18 reg19 reg1a*/ |
200 | 0x01, 0x01, 0x08, 0x28, 0x1e, 0x20, 0x07, 0x00, 0x00, | 200 | 0x01, 0x01, 0x14, 0x28, 0x1e, 0x00, 0x07, 0x00, 0x00, |
201 | /* reg1b reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23*/ | 201 | /* reg1b reg1c reg1d reg1e reg1f reg20 reg21 reg22 reg23*/ |
202 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | 202 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
203 | }; | 203 | }; |
@@ -215,6 +215,10 @@ static const __u8 regsn20[] = { | |||
215 | 0x00, 0x2d, 0x46, 0x5a, 0x6c, 0x7c, 0x8b, 0x99, | 215 | 0x00, 0x2d, 0x46, 0x5a, 0x6c, 0x7c, 0x8b, 0x99, |
216 | 0xa6, 0xb2, 0xbf, 0xca, 0xd5, 0xe0, 0xeb, 0xf5, 0xff | 216 | 0xa6, 0xb2, 0xbf, 0xca, 0xd5, 0xe0, 0xeb, 0xf5, 0xff |
217 | }; | 217 | }; |
218 | static const __u8 regsn20_sn9c120[] = { | ||
219 | 0x00, 0x25, 0x3c, 0x50, 0x62, 0x72, 0x81, 0x90, | ||
220 | 0x9e, 0xab, 0xb8, 0xc5, 0xd1, 0xdd, 0xe9, 0xf4, 0xff | ||
221 | }; | ||
218 | static const __u8 regsn20_sn9c325[] = { | 222 | static const __u8 regsn20_sn9c325[] = { |
219 | 0x0a, 0x3a, 0x56, 0x6c, 0x7e, 0x8d, 0x9a, 0xa4, | 223 | 0x0a, 0x3a, 0x56, 0x6c, 0x7e, 0x8d, 0x9a, 0xa4, |
220 | 0xaf, 0xbb, 0xc5, 0xcd, 0xd5, 0xde, 0xe8, 0xed, 0xf5 | 224 | 0xaf, 0xbb, 0xc5, 0xcd, 0xd5, 0xde, 0xe8, 0xed, 0xf5 |
@@ -226,6 +230,21 @@ static const __u8 reg84[] = { | |||
226 | /* 0x00, 0x00, 0x00, 0x00, 0x00 */ | 230 | /* 0x00, 0x00, 0x00, 0x00, 0x00 */ |
227 | 0xf7, 0x0f, 0x0a, 0x00, 0x00 | 231 | 0xf7, 0x0f, 0x0a, 0x00, 0x00 |
228 | }; | 232 | }; |
233 | static const __u8 reg84_sn9c120_1[] = { | ||
234 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
235 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
236 | 0x00, 0x00, 0x0c, 0x00, 0x00 | ||
237 | }; | ||
238 | static const __u8 reg84_sn9c120_2[] = { | ||
239 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
240 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
241 | 0x00, 0x00, 0x0c, 0x02, 0x3b | ||
242 | }; | ||
243 | static const __u8 reg84_sn9c120_3[] = { | ||
244 | 0x14, 0x00, 0x27, 0x00, 0x08, 0x00, 0xeb, 0x0f, | ||
245 | 0xd5, 0x0f, 0x42, 0x00, 0x41, 0x00, 0xca, 0x0f, | ||
246 | 0xf5, 0x0f, 0x0c, 0x02, 0x3b | ||
247 | }; | ||
229 | static const __u8 reg84_sn9c325[] = { | 248 | static const __u8 reg84_sn9c325[] = { |
230 | 0x14, 0x00, 0x27, 0x00, 0x07, 0x00, 0xe4, 0x0f, | 249 | 0x14, 0x00, 0x27, 0x00, 0x07, 0x00, 0xe4, 0x0f, |
231 | 0xd3, 0x0f, 0x4b, 0x00, 0x48, 0x00, 0xc0, 0x0f, | 250 | 0xd3, 0x0f, 0x4b, 0x00, 0x48, 0x00, 0xc0, 0x0f, |
@@ -345,17 +364,15 @@ static const __u8 ov7660_sensor_init[][8] = { | |||
345 | {0xa1, 0x21, 0x12, 0x05, 0x00, 0x00, 0x00, 0x10}, | 364 | {0xa1, 0x21, 0x12, 0x05, 0x00, 0x00, 0x00, 0x10}, |
346 | /* Outformat ?? rawRGB */ | 365 | /* Outformat ?? rawRGB */ |
347 | {0xa1, 0x21, 0x13, 0xb8, 0x00, 0x00, 0x00, 0x10}, /* init COM8 */ | 366 | {0xa1, 0x21, 0x13, 0xb8, 0x00, 0x00, 0x00, 0x10}, /* init COM8 */ |
348 | /* {0xd1, 0x21, 0x00, 0x01, 0x74, 0x92, 0x00, 0x10}, | 367 | {0xd1, 0x21, 0x00, 0x01, 0x74, 0x92, 0x00, 0x10}, |
349 | * GAIN BLUE RED VREF */ | 368 | /* {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10}, */ |
350 | {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10}, | ||
351 | /* GAIN BLUE RED VREF */ | 369 | /* GAIN BLUE RED VREF */ |
352 | {0xd1, 0x21, 0x04, 0x00, 0x7d, 0x62, 0x00, 0x10}, | 370 | {0xd1, 0x21, 0x04, 0x00, 0x7d, 0x62, 0x00, 0x10}, |
353 | /* COM 1 BAVE GEAVE AECHH */ | 371 | /* COM 1 BAVE GEAVE AECHH */ |
354 | {0xb1, 0x21, 0x08, 0x83, 0x01, 0x00, 0x00, 0x10}, /* RAVE COM2 */ | 372 | {0xb1, 0x21, 0x08, 0x83, 0x01, 0x00, 0x00, 0x10}, /* RAVE COM2 */ |
355 | {0xd1, 0x21, 0x0c, 0x00, 0x08, 0x04, 0x4f, 0x10}, /* COM 3 4 5 6 */ | 373 | {0xd1, 0x21, 0x0c, 0x00, 0x08, 0x04, 0x4f, 0x10}, /* COM 3 4 5 6 */ |
356 | /* {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xf8, 0x10}, | 374 | {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xf8, 0x10}, |
357 | * AECH CLKRC COM7 COM8 */ | 375 | /* {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xff, 0x10}, */ |
358 | {0xd1, 0x21, 0x10, 0x7f, 0x40, 0x05, 0xff, 0x10}, | ||
359 | /* AECH CLKRC COM7 COM8 */ | 376 | /* AECH CLKRC COM7 COM8 */ |
360 | {0xc1, 0x21, 0x14, 0x2c, 0x00, 0x02, 0x00, 0x10}, /* COM9 COM10 */ | 377 | {0xc1, 0x21, 0x14, 0x2c, 0x00, 0x02, 0x00, 0x10}, /* COM9 COM10 */ |
361 | {0xd1, 0x21, 0x17, 0x10, 0x60, 0x02, 0x7b, 0x10}, | 378 | {0xd1, 0x21, 0x17, 0x10, 0x60, 0x02, 0x7b, 0x10}, |
@@ -364,9 +381,8 @@ static const __u8 ov7660_sensor_init[][8] = { | |||
364 | {0xb1, 0x21, 0x1e, 0x01, 0x0e, 0x00, 0x00, 0x10}, /* MVFP LAEC */ | 381 | {0xb1, 0x21, 0x1e, 0x01, 0x0e, 0x00, 0x00, 0x10}, /* MVFP LAEC */ |
365 | {0xd1, 0x21, 0x20, 0x07, 0x07, 0x07, 0x07, 0x10}, | 382 | {0xd1, 0x21, 0x20, 0x07, 0x07, 0x07, 0x07, 0x10}, |
366 | /* BOS GBOS GROS ROS (BGGR offset) */ | 383 | /* BOS GBOS GROS ROS (BGGR offset) */ |
367 | /* {0xd1, 0x21, 0x24, 0x68, 0x58, 0xd4, 0x80, 0x10}, | 384 | {0xd1, 0x21, 0x24, 0x68, 0x58, 0xd4, 0x80, 0x10}, |
368 | * AEW AEB VPT BBIAS */ | 385 | /* {0xd1, 0x21, 0x24, 0x78, 0x68, 0xd4, 0x80, 0x10}, */ |
369 | {0xd1, 0x21, 0x24, 0x78, 0x68, 0xd4, 0x80, 0x10}, | ||
370 | /* AEW AEB VPT BBIAS */ | 386 | /* AEW AEB VPT BBIAS */ |
371 | {0xd1, 0x21, 0x28, 0x80, 0x30, 0x00, 0x00, 0x10}, | 387 | {0xd1, 0x21, 0x28, 0x80, 0x30, 0x00, 0x00, 0x10}, |
372 | /* GbBIAS RSVD EXHCH EXHCL */ | 388 | /* GbBIAS RSVD EXHCH EXHCL */ |
@@ -416,14 +432,15 @@ static const __u8 ov7660_sensor_init[][8] = { | |||
416 | {0xa1, 0x21, 0x10, 0x20, 0x00, 0x00, 0x00, 0x10}, /* 0x20 */ | 432 | {0xa1, 0x21, 0x10, 0x20, 0x00, 0x00, 0x00, 0x10}, /* 0x20 */ |
417 | {0xa1, 0x21, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x10}, | 433 | {0xa1, 0x21, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x10}, |
418 | {0xa1, 0x21, 0x2e, 0x00, 0x00, 0x00, 0x00, 0x10}, | 434 | {0xa1, 0x21, 0x2e, 0x00, 0x00, 0x00, 0x00, 0x10}, |
419 | {0xa1, 0x21, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x10}, | 435 | /* {0xa1, 0x21, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x10}, */ |
420 | /* {0xb1, 0x21, 0x01, 0x78, 0x78, 0x00, 0x00, 0x10}, */ | 436 | {0xa1, 0x21, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x10}, |
437 | {0xb1, 0x21, 0x01, 0x78, 0x78, 0x00, 0x00, 0x10}, | ||
421 | /****** (some exchanges in the win trace) ******/ | 438 | /****** (some exchanges in the win trace) ******/ |
422 | {0xa1, 0x21, 0x93, 0x00, 0x00, 0x00, 0x00, 0x10},/* dummy line hight */ | 439 | {0xa1, 0x21, 0x93, 0x00, 0x00, 0x00, 0x00, 0x10},/* dummy line hight */ |
423 | {0xa1, 0x21, 0x92, 0x25, 0x00, 0x00, 0x00, 0x10},/* dummy line low */ | 440 | {0xa1, 0x21, 0x92, 0x25, 0x00, 0x00, 0x00, 0x10},/* dummy line low */ |
424 | {0xa1, 0x21, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x10}, | 441 | {0xa1, 0x21, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x10}, |
425 | {0xa1, 0x21, 0x2b, 0x00, 0x00, 0x00, 0x00, 0x10}, | 442 | {0xa1, 0x21, 0x2b, 0x00, 0x00, 0x00, 0x00, 0x10}, |
426 | /* {0xa1, 0x21, 0x02, 0x90, 0x00, 0x00, 0x00, 0x10}, */ | 443 | {0xa1, 0x21, 0x02, 0x90, 0x00, 0x00, 0x00, 0x10}, |
427 | /****** (some exchanges in the win trace) ******/ | 444 | /****** (some exchanges in the win trace) ******/ |
428 | /**********startsensor KO if changed !!****/ | 445 | /**********startsensor KO if changed !!****/ |
429 | {0xa1, 0x21, 0x93, 0x01, 0x00, 0x00, 0x00, 0x10}, | 446 | {0xa1, 0x21, 0x93, 0x01, 0x00, 0x00, 0x00, 0x10}, |
@@ -649,14 +666,12 @@ static int configure_gpio(struct gspca_dev *gspca_dev, | |||
649 | 666 | ||
650 | regF1 = 0x00; | 667 | regF1 = 0x00; |
651 | reg_w(gspca_dev, 0xf1, ®F1, 1); | 668 | reg_w(gspca_dev, 0xf1, ®F1, 1); |
652 | 669 | reg_w(gspca_dev, 0x01, &sn9c1xx[0], 1); /*fixme:jfm was [1] en v1*/ | |
653 | reg_w(gspca_dev, 0x01, &sn9c1xx[0], 1); | ||
654 | /*fixme:jfm was [1] en v1*/ | ||
655 | 670 | ||
656 | /* configure gpio */ | 671 | /* configure gpio */ |
657 | reg_w(gspca_dev, 0x01, &sn9c1xx[1], 2); | 672 | reg_w(gspca_dev, 0x01, &sn9c1xx[1], 2); |
658 | reg_w(gspca_dev, 0x08, &sn9c1xx[8], 2); | 673 | reg_w(gspca_dev, 0x08, &sn9c1xx[8], 2); |
659 | reg_w(gspca_dev, 0x17, &sn9c1xx[0x17], 3); | 674 | reg_w(gspca_dev, 0x17, &sn9c1xx[0x17], 5); /* jfm was 3 */ |
660 | switch (sd->bridge) { | 675 | switch (sd->bridge) { |
661 | case BRIDGE_SN9C325: | 676 | case BRIDGE_SN9C325: |
662 | reg9a = reg9a_sn9c325; | 677 | reg9a = reg9a_sn9c325; |
@@ -808,8 +823,9 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
808 | switch (product) { | 823 | switch (product) { |
809 | case 0x6040: | 824 | case 0x6040: |
810 | sd->bridge = BRIDGE_SN9C102P; | 825 | sd->bridge = BRIDGE_SN9C102P; |
811 | sd->sensor = SENSOR_MI0360; /* from BW600.inf */ | 826 | /* sd->sensor = SENSOR_MI0360; * from BW600.inf */ |
812 | /* sd->sensor = SENSOR_HV7131R; * gspcav1 value */ | 827 | /*fixme: MI0360 base=5d ? */ |
828 | sd->sensor = SENSOR_HV7131R; /* gspcav1 value */ | ||
813 | sd->i2c_base = 0x11; | 829 | sd->i2c_base = 0x11; |
814 | break; | 830 | break; |
815 | /* case 0x607a: * from BW600.inf | 831 | /* case 0x607a: * from BW600.inf |
@@ -883,10 +899,11 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
883 | sd->i2c_base = 0x??; | 899 | sd->i2c_base = 0x??; |
884 | break; */ | 900 | break; */ |
885 | case 0x612a: | 901 | case 0x612a: |
886 | /* sd->bridge = BRIDGE_SN9C110; * in BW600.inf */ | 902 | /* sd->bridge = BRIDGE_SN9C110; * in BW600.inf */ |
887 | sd->bridge = BRIDGE_SN9C325; | 903 | sd->bridge = BRIDGE_SN9C325; |
888 | sd->sensor = SENSOR_OV7648; | 904 | sd->sensor = SENSOR_OV7648; |
889 | sd->i2c_base = 0x21; | 905 | sd->i2c_base = 0x21; |
906 | /*fixme: sensor_init has base = 00 et 6e!*/ | ||
890 | break; | 907 | break; |
891 | /* case 0x6123: * from BW600.inf | 908 | /* case 0x6123: * from BW600.inf |
892 | sd->bridge = BRIDGE_SN9C110; | 909 | sd->bridge = BRIDGE_SN9C110; |
@@ -1177,31 +1194,59 @@ static void sd_start(struct gspca_dev *gspca_dev) | |||
1177 | reg_w(gspca_dev, 0xc9, &DC29[5], 1); | 1194 | reg_w(gspca_dev, 0xc9, &DC29[5], 1); |
1178 | /*fixme:jfm end of ending sequence */ | 1195 | /*fixme:jfm end of ending sequence */ |
1179 | reg_w(gspca_dev, 0x18, &sn9c1xx[0x18], 1); | 1196 | reg_w(gspca_dev, 0x18, &sn9c1xx[0x18], 1); |
1180 | if (sd->bridge == BRIDGE_SN9C325) | 1197 | switch (sd->bridge) { |
1198 | case BRIDGE_SN9C325: | ||
1181 | data = 0xae; | 1199 | data = 0xae; |
1182 | else | 1200 | break; |
1201 | case BRIDGE_SN9C120: | ||
1202 | data = 0xa0; | ||
1203 | break; | ||
1204 | default: | ||
1183 | data = 0x60; | 1205 | data = 0x60; |
1206 | break; | ||
1207 | } | ||
1184 | reg_w(gspca_dev, 0x17, &data, 1); | 1208 | reg_w(gspca_dev, 0x17, &data, 1); |
1185 | reg_w(gspca_dev, 0x05, &sn9c1xx[5], 1); | 1209 | reg_w(gspca_dev, 0x05, &sn9c1xx[5], 1); |
1186 | reg_w(gspca_dev, 0x07, &sn9c1xx[7], 1); | 1210 | reg_w(gspca_dev, 0x07, &sn9c1xx[7], 1); |
1187 | reg_w(gspca_dev, 0x06, &sn9c1xx[6], 1); | 1211 | reg_w(gspca_dev, 0x06, &sn9c1xx[6], 1); |
1188 | reg_w(gspca_dev, 0x14, &sn9c1xx[0x14], 1); | 1212 | reg_w(gspca_dev, 0x14, &sn9c1xx[0x14], 1); |
1189 | if (sd->bridge == BRIDGE_SN9C325) { | 1213 | switch (sd->bridge) { |
1190 | reg_w(gspca_dev, 0x20, regsn20_sn9c325, 0x11); | 1214 | case BRIDGE_SN9C325: |
1215 | reg_w(gspca_dev, 0x20, regsn20_sn9c325, | ||
1216 | sizeof regsn20_sn9c325); | ||
1191 | for (i = 0; i < 8; i++) | 1217 | for (i = 0; i < 8; i++) |
1192 | reg_w(gspca_dev, 0x84, reg84_sn9c325, 0x15); | 1218 | reg_w(gspca_dev, 0x84, reg84_sn9c325, |
1219 | sizeof reg84_sn9c325); | ||
1193 | data = 0x0a; | 1220 | data = 0x0a; |
1194 | reg_w(gspca_dev, 0x9a, &data, 1); | 1221 | reg_w(gspca_dev, 0x9a, &data, 1); |
1195 | data = 0x60; | 1222 | data = 0x60; |
1196 | reg_w(gspca_dev, 0x99, &data, 1); | 1223 | reg_w(gspca_dev, 0x99, &data, 1); |
1197 | } else { | 1224 | break; |
1198 | reg_w(gspca_dev, 0x20, regsn20, 0x11); | 1225 | case BRIDGE_SN9C120: |
1226 | reg_w(gspca_dev, 0x20, regsn20_sn9c120, | ||
1227 | sizeof regsn20_sn9c120); | ||
1228 | for (i = 0; i < 2; i++) | ||
1229 | reg_w(gspca_dev, 0x84, reg84_sn9c120_1, | ||
1230 | sizeof reg84_sn9c120_1); | ||
1231 | for (i = 0; i < 6; i++) | ||
1232 | reg_w(gspca_dev, 0x84, reg84_sn9c120_2, | ||
1233 | sizeof reg84_sn9c120_2); | ||
1234 | reg_w(gspca_dev, 0x84, reg84_sn9c120_3, | ||
1235 | sizeof reg84_sn9c120_3); | ||
1236 | data = 0x05; | ||
1237 | reg_w(gspca_dev, 0x9a, &data, 1); | ||
1238 | data = 0x5b; | ||
1239 | reg_w(gspca_dev, 0x99, &data, 1); | ||
1240 | break; | ||
1241 | default: | ||
1242 | reg_w(gspca_dev, 0x20, regsn20, sizeof regsn20); | ||
1199 | for (i = 0; i < 8; i++) | 1243 | for (i = 0; i < 8; i++) |
1200 | reg_w(gspca_dev, 0x84, reg84, 0x15); | 1244 | reg_w(gspca_dev, 0x84, reg84, sizeof reg84); |
1201 | data = 0x08; | 1245 | data = 0x08; |
1202 | reg_w(gspca_dev, 0x9a, &data, 1); | 1246 | reg_w(gspca_dev, 0x9a, &data, 1); |
1203 | data = 0x59; | 1247 | data = 0x59; |
1204 | reg_w(gspca_dev, 0x99, &data, 1); | 1248 | reg_w(gspca_dev, 0x99, &data, 1); |
1249 | break; | ||
1205 | } | 1250 | } |
1206 | 1251 | ||
1207 | mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv; | 1252 | mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv; |