2 files changed, 8 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3427a7fdb882..e691b30b2817 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1260,6 +1260,10 @@ enum punit_power_well {
 #define   MI_ARB_DISPLAY_PRIORITY_A_B           (0 << 0)        /* display A > display B */
 #define   MI_ARB_DISPLAY_PRIORITY_B_A           (1 << 0)        /* display B > display A */
 
+#define MI_STATE        0x020e4 /* gen2 only */
+#define   MI_AGPBUSY_INT_EN                     (1 << 1) /* 85x only */
+#define   MI_AGPBUSY_830_MODE                   (1 << 0) /* 85x only */
+
 #define CACHE_MODE_0    0x02120 /* 915+ only */
 #define   CM0_PIPELINED_RENDER_FLUSH_DISABLE (1<<8)
 #define   CM0_IZ_OPT_DISABLE      (1<<6)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ab98dac3da73..b124ba4ca7e5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5514,6 +5514,10 @@ static void i85x_init_clock_gating(struct drm_device *dev)
         struct drm_i915_private *dev_priv = dev->dev_private;
 
         I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
+
+        /* interrupts should cause a wake up from C3 */
+        I915_WRITE(MI_STATE, _MASKED_BIT_ENABLE(MI_AGPBUSY_INT_EN) |
+                   _MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE));
 }
 
 static void i830_init_clock_gating(struct drm_device *dev)