4 files changed, 45 insertions, 40 deletions

diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index cd6a70647e32..49cafb61d290 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -16,6 +16,7 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/hdmi.h>
+#include <linux/mutex.h>
 #include <linux/of_device.h>
 
 #include <drm/drm_of.h>
@@ -126,6 +127,7 @@ struct dw_hdmi {
         struct i2c_adapter *ddc;
         void __iomem *regs;
 
+        struct mutex audio_mutex;
         unsigned int sample_rate;
         int ratio;
 
@@ -177,26 +179,23 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
         hdmi_modb(hdmi, data << shift, mask, reg);
 }
 
-static void hdmi_set_clock_regenerator_n(struct dw_hdmi *hdmi,
-                                         unsigned int value)
+static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
+                           unsigned int n)
 {
-        hdmi_writeb(hdmi, value & 0xff, HDMI_AUD_N1);
-        hdmi_writeb(hdmi, (value >> 8) & 0xff, HDMI_AUD_N2);
-        hdmi_writeb(hdmi, (value >> 16) & 0x0f, HDMI_AUD_N3);
+        /* Must be set/cleared first */
+        hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
 
         /* nshift factor = 0 */
         hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
-}
-
-static void hdmi_regenerate_cts(struct dw_hdmi *hdmi, unsigned int cts)
-{
-        /* Must be set/cleared first */
-        hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
 
-        hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
-        hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
         hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
                     HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+        hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
+        hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
+
+        hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
+        hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
+        hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
 }
 
 static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk,
@@ -355,18 +354,21 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
                 __func__, hdmi->sample_rate, hdmi->ratio,
                 pixel_clk, clk_n, clk_cts);
 
-        hdmi_set_clock_regenerator_n(hdmi, clk_n);
-        hdmi_regenerate_cts(hdmi, clk_cts);
+        hdmi_set_cts_n(hdmi, clk_cts, clk_n);
 }
 
 static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
 {
+        mutex_lock(&hdmi->audio_mutex);
         hdmi_set_clk_regenerator(hdmi, 74250000);
+        mutex_unlock(&hdmi->audio_mutex);
 }
 
 static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
 {
+        mutex_lock(&hdmi->audio_mutex);
         hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock);
+        mutex_unlock(&hdmi->audio_mutex);
 }
 
 /*
@@ -753,10 +755,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
 {
         unsigned res_idx, i;
         u8 val, msec;
-        const struct dw_hdmi_mpll_config *mpll_config =
-                                                hdmi->plat_data->mpll_cfg;
-        const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
-        const struct dw_hdmi_sym_term *sym_term =  hdmi->plat_data->sym_term;
+        const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+        const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
+        const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
+        const struct dw_hdmi_phy_config *phy_config = plat_data->phy_config;
 
         if (prep)
                 return -EINVAL;
@@ -827,18 +829,18 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
         hdmi_phy_i2c_write(hdmi, 0x0000, 0x13);  /* PLLPHBYCTRL */
         hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
 
-        for (i = 0; sym_term[i].mpixelclock != (~0UL); i++)
+        for (i = 0; phy_config[i].mpixelclock != (~0UL); i++)
                 if (hdmi->hdmi_data.video_mode.mpixelclock <=
-                    sym_term[i].mpixelclock)
+                    phy_config[i].mpixelclock)
                         break;
 
         /* RESISTANCE TERM 133Ohm Cfg */
-        hdmi_phy_i2c_write(hdmi, sym_term[i].term, 0x19);  /* TXTERM */
+        hdmi_phy_i2c_write(hdmi, phy_config[i].term, 0x19);  /* TXTERM */
         /* PREEMP Cgf 0.00 */
-        hdmi_phy_i2c_write(hdmi, sym_term[i].sym_ctr, 0x09);  /* CKSYMTXCTRL */
-
+        hdmi_phy_i2c_write(hdmi, phy_config[i].sym_ctr, 0x09); /* CKSYMTXCTRL */
         /* TX/CK LVL 10 */
-        hdmi_phy_i2c_write(hdmi, 0x01ad, 0x0E);  /* VLEVCTRL */
+        hdmi_phy_i2c_write(hdmi, phy_config[i].vlev_ctr, 0x0E); /* VLEVCTRL */
+
         /* REMOVE CLK TERM */
         hdmi_phy_i2c_write(hdmi, 0x8000, 0x05);  /* CKCALCTRL */
 
@@ -1569,6 +1571,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
         hdmi->ratio = 100;
         hdmi->encoder = encoder;
 
+        mutex_init(&hdmi->audio_mutex);
+
         of_property_read_u32(np, "reg-io-width", &val);
 
         switch (val) {
diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c
index 1834ac8998cc..a3ecf1069b76 100644
--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
@@ -75,10 +75,10 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
         },
 };
 
-static const struct dw_hdmi_sym_term imx_sym_term[] = {
-        /*pixelclk   symbol   term*/
-        { 148500000, 0x800d, 0x0005 },
-        { ~0UL,      0x0000, 0x0000 }
+static const struct dw_hdmi_phy_config imx_phy_config[] = {
+        /*pixelclk   symbol   term   vlev */
+        { 148500000, 0x800d, 0x0005, 0x01ad},
+        { ~0UL,      0x0000, 0x0000, 0x0000}
 };
 
 static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
@@ -163,7 +163,7 @@ static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
 static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
         .mpll_cfg   = imx_mpll_cfg,
         .cur_ctr    = imx_cur_ctr,
-        .sym_term   = imx_sym_term,
+        .phy_config = imx_phy_config,
         .dev_type   = IMX6Q_HDMI,
         .mode_valid = imx6q_hdmi_mode_valid,
 };
@@ -171,7 +171,7 @@ static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
 static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
         .mpll_cfg = imx_mpll_cfg,
         .cur_ctr  = imx_cur_ctr,
-        .sym_term = imx_sym_term,
+        .phy_config = imx_phy_config,
         .dev_type = IMX6DL_HDMI,
         .mode_valid = imx6dl_hdmi_mode_valid,
 };
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index d236faa05b19..80d6fc8a5cee 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -133,12 +133,12 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
         }
 };
 
-static const struct dw_hdmi_sym_term rockchip_sym_term[] = {
-        /*pixelclk   symbol   term*/
-        { 74250000,  0x8009, 0x0004 },
-        { 148500000, 0x8029, 0x0004 },
-        { 297000000, 0x8039, 0x0005 },
-        { ~0UL,      0x0000, 0x0000 }
+static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
+        /*pixelclk   symbol   term   vlev*/
+        { 74250000,  0x8009, 0x0004, 0x0272},
+        { 148500000, 0x802b, 0x0004, 0x028d},
+        { 297000000, 0x8039, 0x0005, 0x028d},
+        { ~0UL,      0x0000, 0x0000, 0x0000}
 };
 
 static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
@@ -230,7 +230,7 @@ static const struct dw_hdmi_plat_data rockchip_hdmi_drv_data = {
         .mode_valid = dw_hdmi_rockchip_mode_valid,
         .mpll_cfg   = rockchip_mpll_cfg,
         .cur_ctr    = rockchip_cur_ctr,
-        .sym_term   = rockchip_sym_term,
+        .phy_config = rockchip_phy_config,
         .dev_type   = RK3288_HDMI,
 };
 
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index 5a4f49005169..de13bfc35634 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -38,17 +38,18 @@ struct dw_hdmi_curr_ctrl {
         u16 curr[DW_HDMI_RES_MAX];
 };
 
-struct dw_hdmi_sym_term {
+struct dw_hdmi_phy_config {
         unsigned long mpixelclock;
         u16 sym_ctr;    /*clock symbol and transmitter control*/
         u16 term;       /*transmission termination value*/
+        u16 vlev_ctr;   /* voltage level control */
 };
 
 struct dw_hdmi_plat_data {
         enum dw_hdmi_devtype dev_type;
         const struct dw_hdmi_mpll_config *mpll_cfg;
         const struct dw_hdmi_curr_ctrl *cur_ctr;
-        const struct dw_hdmi_sym_term *sym_term;
+        const struct dw_hdmi_phy_config *phy_config;
         enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
                                            struct drm_display_mode *mode);
 };