diff options
-rw-r--r-- | drivers/gpio/Kconfig | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-adp5588.c | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-samsung.c | 16 | ||||
-rw-r--r-- | drivers/gpio/gpio-sodaville.c | 23 | ||||
-rw-r--r-- | drivers/of/gpio.c | 2 |
5 files changed, 21 insertions, 24 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index edadbdad31d0..e03653d69357 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -430,7 +430,7 @@ config GPIO_ML_IOH | |||
430 | 430 | ||
431 | config GPIO_SODAVILLE | 431 | config GPIO_SODAVILLE |
432 | bool "Intel Sodaville GPIO support" | 432 | bool "Intel Sodaville GPIO support" |
433 | depends on X86 && PCI && OF && BROKEN | 433 | depends on X86 && PCI && OF |
434 | select GPIO_GENERIC | 434 | select GPIO_GENERIC |
435 | select GENERIC_IRQ_CHIP | 435 | select GENERIC_IRQ_CHIP |
436 | help | 436 | help |
diff --git a/drivers/gpio/gpio-adp5588.c b/drivers/gpio/gpio-adp5588.c index 9ad1703d1408..ae5d7f12ce66 100644 --- a/drivers/gpio/gpio-adp5588.c +++ b/drivers/gpio/gpio-adp5588.c | |||
@@ -252,7 +252,7 @@ static irqreturn_t adp5588_irq_handler(int irq, void *devid) | |||
252 | if (ret < 0) | 252 | if (ret < 0) |
253 | memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); | 253 | memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); |
254 | 254 | ||
255 | for (bank = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO); | 255 | for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO); |
256 | bank++, bit = 0) { | 256 | bank++, bit = 0) { |
257 | pending = dev->irq_stat[bank] & dev->irq_mask[bank]; | 257 | pending = dev->irq_stat[bank] & dev->irq_mask[bank]; |
258 | 258 | ||
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 46277877b7ec..19d6fc0229c3 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c | |||
@@ -2382,8 +2382,8 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = { | |||
2382 | #endif | 2382 | #endif |
2383 | }; | 2383 | }; |
2384 | 2384 | ||
2385 | static struct samsung_gpio_chip exynos5_gpios_1[] = { | ||
2386 | #ifdef CONFIG_ARCH_EXYNOS5 | 2385 | #ifdef CONFIG_ARCH_EXYNOS5 |
2386 | static struct samsung_gpio_chip exynos5_gpios_1[] = { | ||
2387 | { | 2387 | { |
2388 | .chip = { | 2388 | .chip = { |
2389 | .base = EXYNOS5_GPA0(0), | 2389 | .base = EXYNOS5_GPA0(0), |
@@ -2541,11 +2541,11 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = { | |||
2541 | .to_irq = samsung_gpiolib_to_irq, | 2541 | .to_irq = samsung_gpiolib_to_irq, |
2542 | }, | 2542 | }, |
2543 | }, | 2543 | }, |
2544 | #endif | ||
2545 | }; | 2544 | }; |
2545 | #endif | ||
2546 | 2546 | ||
2547 | static struct samsung_gpio_chip exynos5_gpios_2[] = { | ||
2548 | #ifdef CONFIG_ARCH_EXYNOS5 | 2547 | #ifdef CONFIG_ARCH_EXYNOS5 |
2548 | static struct samsung_gpio_chip exynos5_gpios_2[] = { | ||
2549 | { | 2549 | { |
2550 | .chip = { | 2550 | .chip = { |
2551 | .base = EXYNOS5_GPE0(0), | 2551 | .base = EXYNOS5_GPE0(0), |
@@ -2602,11 +2602,11 @@ static struct samsung_gpio_chip exynos5_gpios_2[] = { | |||
2602 | 2602 | ||
2603 | }, | 2603 | }, |
2604 | }, | 2604 | }, |
2605 | #endif | ||
2606 | }; | 2605 | }; |
2606 | #endif | ||
2607 | 2607 | ||
2608 | static struct samsung_gpio_chip exynos5_gpios_3[] = { | ||
2609 | #ifdef CONFIG_ARCH_EXYNOS5 | 2608 | #ifdef CONFIG_ARCH_EXYNOS5 |
2609 | static struct samsung_gpio_chip exynos5_gpios_3[] = { | ||
2610 | { | 2610 | { |
2611 | .chip = { | 2611 | .chip = { |
2612 | .base = EXYNOS5_GPV0(0), | 2612 | .base = EXYNOS5_GPV0(0), |
@@ -2638,11 +2638,11 @@ static struct samsung_gpio_chip exynos5_gpios_3[] = { | |||
2638 | .label = "GPV4", | 2638 | .label = "GPV4", |
2639 | }, | 2639 | }, |
2640 | }, | 2640 | }, |
2641 | #endif | ||
2642 | }; | 2641 | }; |
2642 | #endif | ||
2643 | 2643 | ||
2644 | static struct samsung_gpio_chip exynos5_gpios_4[] = { | ||
2645 | #ifdef CONFIG_ARCH_EXYNOS5 | 2644 | #ifdef CONFIG_ARCH_EXYNOS5 |
2645 | static struct samsung_gpio_chip exynos5_gpios_4[] = { | ||
2646 | { | 2646 | { |
2647 | .chip = { | 2647 | .chip = { |
2648 | .base = EXYNOS5_GPZ(0), | 2648 | .base = EXYNOS5_GPZ(0), |
@@ -2650,8 +2650,8 @@ static struct samsung_gpio_chip exynos5_gpios_4[] = { | |||
2650 | .label = "GPZ", | 2650 | .label = "GPZ", |
2651 | }, | 2651 | }, |
2652 | }, | 2652 | }, |
2653 | #endif | ||
2654 | }; | 2653 | }; |
2654 | #endif | ||
2655 | 2655 | ||
2656 | 2656 | ||
2657 | #if defined(CONFIG_ARCH_EXYNOS) && defined(CONFIG_OF) | 2657 | #if defined(CONFIG_ARCH_EXYNOS) && defined(CONFIG_OF) |
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index 9ba15d31d242..031e5d24837d 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c | |||
@@ -41,7 +41,7 @@ | |||
41 | struct sdv_gpio_chip_data { | 41 | struct sdv_gpio_chip_data { |
42 | int irq_base; | 42 | int irq_base; |
43 | void __iomem *gpio_pub_base; | 43 | void __iomem *gpio_pub_base; |
44 | struct irq_domain id; | 44 | struct irq_domain *id; |
45 | struct irq_chip_generic *gc; | 45 | struct irq_chip_generic *gc; |
46 | struct bgpio_chip bgpio; | 46 | struct bgpio_chip bgpio; |
47 | }; | 47 | }; |
@@ -51,10 +51,9 @@ static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type) | |||
51 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); | 51 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
52 | struct sdv_gpio_chip_data *sd = gc->private; | 52 | struct sdv_gpio_chip_data *sd = gc->private; |
53 | void __iomem *type_reg; | 53 | void __iomem *type_reg; |
54 | u32 irq_offs = d->irq - sd->irq_base; | ||
55 | u32 reg; | 54 | u32 reg; |
56 | 55 | ||
57 | if (irq_offs < 8) | 56 | if (d->hwirq < 8) |
58 | type_reg = sd->gpio_pub_base + GPIT1R0; | 57 | type_reg = sd->gpio_pub_base + GPIT1R0; |
59 | else | 58 | else |
60 | type_reg = sd->gpio_pub_base + GPIT1R1; | 59 | type_reg = sd->gpio_pub_base + GPIT1R1; |
@@ -63,11 +62,11 @@ static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type) | |||
63 | 62 | ||
64 | switch (type) { | 63 | switch (type) { |
65 | case IRQ_TYPE_LEVEL_HIGH: | 64 | case IRQ_TYPE_LEVEL_HIGH: |
66 | reg &= ~BIT(4 * (irq_offs % 8)); | 65 | reg &= ~BIT(4 * (d->hwirq % 8)); |
67 | break; | 66 | break; |
68 | 67 | ||
69 | case IRQ_TYPE_LEVEL_LOW: | 68 | case IRQ_TYPE_LEVEL_LOW: |
70 | reg |= BIT(4 * (irq_offs % 8)); | 69 | reg |= BIT(4 * (d->hwirq % 8)); |
71 | break; | 70 | break; |
72 | 71 | ||
73 | default: | 72 | default: |
@@ -91,7 +90,7 @@ static irqreturn_t sdv_gpio_pub_irq_handler(int irq, void *data) | |||
91 | u32 irq_bit = __fls(irq_stat); | 90 | u32 irq_bit = __fls(irq_stat); |
92 | 91 | ||
93 | irq_stat &= ~BIT(irq_bit); | 92 | irq_stat &= ~BIT(irq_bit); |
94 | generic_handle_irq(sd->irq_base + irq_bit); | 93 | generic_handle_irq(irq_find_mapping(sd->id, irq_bit)); |
95 | } | 94 | } |
96 | 95 | ||
97 | return IRQ_HANDLED; | 96 | return IRQ_HANDLED; |
@@ -127,7 +126,7 @@ static int sdv_xlate(struct irq_domain *h, struct device_node *node, | |||
127 | } | 126 | } |
128 | 127 | ||
129 | static struct irq_domain_ops irq_domain_sdv_ops = { | 128 | static struct irq_domain_ops irq_domain_sdv_ops = { |
130 | .dt_translate = sdv_xlate, | 129 | .xlate = sdv_xlate, |
131 | }; | 130 | }; |
132 | 131 | ||
133 | static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, | 132 | static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, |
@@ -149,10 +148,6 @@ static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, | |||
149 | if (ret) | 148 | if (ret) |
150 | goto out_free_desc; | 149 | goto out_free_desc; |
151 | 150 | ||
152 | sd->id.irq_base = sd->irq_base; | ||
153 | sd->id.of_node = of_node_get(pdev->dev.of_node); | ||
154 | sd->id.ops = &irq_domain_sdv_ops; | ||
155 | |||
156 | /* | 151 | /* |
157 | * This gpio irq controller latches level irqs. Testing shows that if | 152 | * This gpio irq controller latches level irqs. Testing shows that if |
158 | * we unmask & ACK the IRQ before the source of the interrupt is gone | 153 | * we unmask & ACK the IRQ before the source of the interrupt is gone |
@@ -179,7 +174,10 @@ static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, | |||
179 | IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST, | 174 | IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST, |
180 | IRQ_LEVEL | IRQ_NOPROBE); | 175 | IRQ_LEVEL | IRQ_NOPROBE); |
181 | 176 | ||
182 | irq_domain_add(&sd->id); | 177 | sd->id = irq_domain_add_legacy(pdev->dev.of_node, SDV_NUM_PUB_GPIOS, |
178 | sd->irq_base, 0, &irq_domain_sdv_ops, sd); | ||
179 | if (!sd->id) | ||
180 | goto out_free_irq; | ||
183 | return 0; | 181 | return 0; |
184 | out_free_irq: | 182 | out_free_irq: |
185 | free_irq(pdev->irq, sd); | 183 | free_irq(pdev->irq, sd); |
@@ -260,7 +258,6 @@ static void sdv_gpio_remove(struct pci_dev *pdev) | |||
260 | { | 258 | { |
261 | struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev); | 259 | struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev); |
262 | 260 | ||
263 | irq_domain_del(&sd->id); | ||
264 | free_irq(pdev->irq, sd); | 261 | free_irq(pdev->irq, sd); |
265 | irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); | 262 | irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); |
266 | 263 | ||
diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c index bba81216b4db..bf984b6dc477 100644 --- a/drivers/of/gpio.c +++ b/drivers/of/gpio.c | |||
@@ -140,7 +140,7 @@ int of_gpio_simple_xlate(struct gpio_chip *gc, | |||
140 | if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells)) | 140 | if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells)) |
141 | return -EINVAL; | 141 | return -EINVAL; |
142 | 142 | ||
143 | if (gpiospec->args[0] > gc->ngpio) | 143 | if (gpiospec->args[0] >= gc->ngpio) |
144 | return -EINVAL; | 144 | return -EINVAL; |
145 | 145 | ||
146 | if (flags) | 146 | if (flags) |