diff options
-rw-r--r-- | arch/powerpc/kernel/ppc_ksyms.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/Makefile | 3 | ||||
-rw-r--r-- | include/asm-powerpc/dcr-native.h | 37 | ||||
-rw-r--r-- | include/asm-powerpc/dcr.h | 2 | ||||
-rw-r--r-- | include/asm-ppc/reg_booke.h | 36 |
5 files changed, 42 insertions, 38 deletions
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index 9179f0739ea2..95776b6af4e2 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c | |||
@@ -208,7 +208,7 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */ | |||
208 | extern long *intercept_table; | 208 | extern long *intercept_table; |
209 | EXPORT_SYMBOL(intercept_table); | 209 | EXPORT_SYMBOL(intercept_table); |
210 | #endif /* CONFIG_PPC_STD_MMU_32 */ | 210 | #endif /* CONFIG_PPC_STD_MMU_32 */ |
211 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | 211 | #ifdef CONFIG_PPC_DCR_NATIVE |
212 | EXPORT_SYMBOL(__mtdcr); | 212 | EXPORT_SYMBOL(__mtdcr); |
213 | EXPORT_SYMBOL(__mfdcr); | 213 | EXPORT_SYMBOL(__mfdcr); |
214 | #endif | 214 | #endif |
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 6cc34597a620..04d4917eb303 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -5,7 +5,8 @@ endif | |||
5 | obj-$(CONFIG_MPIC) += mpic.o | 5 | obj-$(CONFIG_MPIC) += mpic.o |
6 | obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o | 6 | obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o |
7 | obj-$(CONFIG_PPC_MPC106) += grackle.o | 7 | obj-$(CONFIG_PPC_MPC106) += grackle.o |
8 | obj-$(CONFIG_PPC_DCR) += dcr.o dcr-low.o | 8 | obj-$(CONFIG_PPC_DCR) += dcr.o |
9 | obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o | ||
9 | obj-$(CONFIG_U3_DART) += dart_iommu.o | 10 | obj-$(CONFIG_U3_DART) += dart_iommu.o |
10 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o | 11 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
11 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 12 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h index fd4a5f5e33d1..d7a1bc1551c6 100644 --- a/include/asm-powerpc/dcr-native.h +++ b/include/asm-powerpc/dcr-native.h | |||
@@ -20,8 +20,7 @@ | |||
20 | #ifndef _ASM_POWERPC_DCR_NATIVE_H | 20 | #ifndef _ASM_POWERPC_DCR_NATIVE_H |
21 | #define _ASM_POWERPC_DCR_NATIVE_H | 21 | #define _ASM_POWERPC_DCR_NATIVE_H |
22 | #ifdef __KERNEL__ | 22 | #ifdef __KERNEL__ |
23 | 23 | #ifndef __ASSEMBLY__ | |
24 | #include <asm/reg.h> | ||
25 | 24 | ||
26 | typedef struct {} dcr_host_t; | 25 | typedef struct {} dcr_host_t; |
27 | 26 | ||
@@ -32,7 +31,41 @@ typedef struct {} dcr_host_t; | |||
32 | #define dcr_read(host, dcr_n) mfdcr(dcr_n) | 31 | #define dcr_read(host, dcr_n) mfdcr(dcr_n) |
33 | #define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) | 32 | #define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) |
34 | 33 | ||
34 | /* Device Control Registers */ | ||
35 | void __mtdcr(int reg, unsigned int val); | ||
36 | unsigned int __mfdcr(int reg); | ||
37 | #define mfdcr(rn) \ | ||
38 | ({unsigned int rval; \ | ||
39 | if (__builtin_constant_p(rn)) \ | ||
40 | asm volatile("mfdcr %0," __stringify(rn) \ | ||
41 | : "=r" (rval)); \ | ||
42 | else \ | ||
43 | rval = __mfdcr(rn); \ | ||
44 | rval;}) | ||
45 | |||
46 | #define mtdcr(rn, v) \ | ||
47 | do { \ | ||
48 | if (__builtin_constant_p(rn)) \ | ||
49 | asm volatile("mtdcr " __stringify(rn) ",%0" \ | ||
50 | : : "r" (v)); \ | ||
51 | else \ | ||
52 | __mtdcr(rn, v); \ | ||
53 | } while (0) | ||
54 | |||
55 | /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ | ||
56 | #define mfdcri(base, reg) \ | ||
57 | ({ \ | ||
58 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
59 | mfdcr(base ## _CFGDATA); \ | ||
60 | }) | ||
61 | |||
62 | #define mtdcri(base, reg, data) \ | ||
63 | do { \ | ||
64 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
65 | mtdcr(base ## _CFGDATA, data); \ | ||
66 | } while (0) | ||
35 | 67 | ||
68 | #endif /* __ASSEMBLY__ */ | ||
36 | #endif /* __KERNEL__ */ | 69 | #endif /* __KERNEL__ */ |
37 | #endif /* _ASM_POWERPC_DCR_NATIVE_H */ | 70 | #endif /* _ASM_POWERPC_DCR_NATIVE_H */ |
38 | 71 | ||
diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h index 473f2c7fd892..b66c5e6941f0 100644 --- a/include/asm-powerpc/dcr.h +++ b/include/asm-powerpc/dcr.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #ifndef _ASM_POWERPC_DCR_H | 20 | #ifndef _ASM_POWERPC_DCR_H |
21 | #define _ASM_POWERPC_DCR_H | 21 | #define _ASM_POWERPC_DCR_H |
22 | #ifdef __KERNEL__ | 22 | #ifdef __KERNEL__ |
23 | #ifdef CONFIG_PPC_DCR | ||
23 | 24 | ||
24 | #ifdef CONFIG_PPC_DCR_NATIVE | 25 | #ifdef CONFIG_PPC_DCR_NATIVE |
25 | #include <asm/dcr-native.h> | 26 | #include <asm/dcr-native.h> |
@@ -38,5 +39,6 @@ extern unsigned int dcr_resource_len(struct device_node *np, | |||
38 | unsigned int index); | 39 | unsigned int index); |
39 | #endif /* CONFIG_PPC_MERGE */ | 40 | #endif /* CONFIG_PPC_MERGE */ |
40 | 41 | ||
42 | #endif /* CONFIG_PPC_DCR */ | ||
41 | #endif /* __KERNEL__ */ | 43 | #endif /* __KERNEL__ */ |
42 | #endif /* _ASM_POWERPC_DCR_H */ | 44 | #endif /* _ASM_POWERPC_DCR_H */ |
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 602fbadeaf48..a263fc1e65c4 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h | |||
@@ -9,41 +9,9 @@ | |||
9 | #ifndef __ASM_PPC_REG_BOOKE_H__ | 9 | #ifndef __ASM_PPC_REG_BOOKE_H__ |
10 | #define __ASM_PPC_REG_BOOKE_H__ | 10 | #define __ASM_PPC_REG_BOOKE_H__ |
11 | 11 | ||
12 | #ifndef __ASSEMBLY__ | 12 | #include <asm/dcr.h> |
13 | /* Device Control Registers */ | ||
14 | void __mtdcr(int reg, unsigned int val); | ||
15 | unsigned int __mfdcr(int reg); | ||
16 | #define mfdcr(rn) \ | ||
17 | ({unsigned int rval; \ | ||
18 | if (__builtin_constant_p(rn)) \ | ||
19 | asm volatile("mfdcr %0," __stringify(rn) \ | ||
20 | : "=r" (rval)); \ | ||
21 | else \ | ||
22 | rval = __mfdcr(rn); \ | ||
23 | rval;}) | ||
24 | |||
25 | #define mtdcr(rn, v) \ | ||
26 | do { \ | ||
27 | if (__builtin_constant_p(rn)) \ | ||
28 | asm volatile("mtdcr " __stringify(rn) ",%0" \ | ||
29 | : : "r" (v)); \ | ||
30 | else \ | ||
31 | __mtdcr(rn, v); \ | ||
32 | } while (0) | ||
33 | |||
34 | /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ | ||
35 | #define mfdcri(base, reg) \ | ||
36 | ({ \ | ||
37 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
38 | mfdcr(base ## _CFGDATA); \ | ||
39 | }) | ||
40 | |||
41 | #define mtdcri(base, reg, data) \ | ||
42 | do { \ | ||
43 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
44 | mtdcr(base ## _CFGDATA, data); \ | ||
45 | } while (0) | ||
46 | 13 | ||
14 | #ifndef __ASSEMBLY__ | ||
47 | /* Performance Monitor Registers */ | 15 | /* Performance Monitor Registers */ |
48 | #define mfpmr(rn) ({unsigned int rval; \ | 16 | #define mfpmr(rn) ({unsigned int rval; \ |
49 | asm volatile("mfpmr %0," __stringify(rn) \ | 17 | asm volatile("mfpmr %0," __stringify(rn) \ |